diff options
| author | Yann Sionneau <ysionneau@kalray.eu> | 2020-10-02 16:24:55 +0200 |
|---|---|---|
| committer | Waldemar Brodkorb <wbx@openadk.org> | 2020-10-02 19:10:36 +0200 |
| commit | 672a303852353ba9299f6f50190fca8b3abe4c1d (patch) | |
| tree | f204ea8dc0b5a3e4b2bd4251b8daf5f0783ae260 /libm/kvx/fesetenv.c | |
| parent | 4acf6f072cbc255b0b0d6cfd598a100f95d84f2a (diff) | |
kvx: add support for kvx arch to uClibc-ng
This commit adds support for Kalray VLIW family (kvx)
Kalray kv3 core is embedded in Kalray Coolidge SoC. This core which is the
third of the KV family has the following features:
32/64 bits execution mode
6-issue VLIW architecture
64 x 64bits general purpose registers
SIMD instructions
little-endian
In order to build a usable toolchain, build scripts are provided at the
following address: https://github.com/kalray/build-scripts.
Kalray uses FOSS which is available at https://github.com/kalray
This includes Linux kernel, uClibc-ng, gcc, binutils, etc.
Signed-off-by: Clément Léger <cleger@kalray.eu>
Signed-off-by: Guillaume Thouvenin <gthouvenin@kalray.eu>
Signed-off-by: Laurent Thevenoux <lthevenoux@kalray.eu>
Signed-off-by: Marc Poulhies <mpoulhies@kalray.eu>
Signed-off-by: Marius Gligor <mgligor@kalray.eu>
Signed-off-by: Yann Sionneau <ysionneau@kalray.eu>
Diffstat (limited to 'libm/kvx/fesetenv.c')
| -rw-r--r-- | libm/kvx/fesetenv.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/libm/kvx/fesetenv.c b/libm/kvx/fesetenv.c new file mode 100644 index 000000000..0a85f1128 --- /dev/null +++ b/libm/kvx/fesetenv.c @@ -0,0 +1,23 @@ +/* + (C) Copyright 2019 Kalray S.A. + This file provides fesetenv for the Coolidge processor. +*/ + +#include <fenv.h> + +int fesetenv(const fenv_t *envp) +{ + /* Mask *envp to be sure only valid bits are set */ + fenv_t fe = *envp; + fe &= (FE_ALL_EXCEPT|FE_RND_MASK); + + /* Set exception flags and rounding mode bit-fields of $cs, with + 'fe' as a set mask and FE_ALL_EXCEPT|FE_RND_MASK as a clear + mask. */ + __builtin_kvx_wfxl(KVX_SFR_CS, ((long long)fe << 32) | FE_ALL_EXCEPT | FE_RND_MASK); + + /* The above insn cannot fail (while the OS allows access to the + floating-point exception flags of the $cs register). Return + success. */ + return 0; +} |