kvx: add support for kvx arch to uClibc-ng

This commit adds support for Kalray VLIW family (kvx)

Kalray kv3 core is embedded in Kalray Coolidge SoC. This core which is the
third of the KV family has the following features:

    32/64 bits execution mode
    6-issue VLIW architecture
    64 x 64bits general purpose registers
    SIMD instructions
    little-endian

In order to build a usable toolchain, build scripts are provided at the
following address: https://github.com/kalray/build-scripts.

Kalray uses FOSS which is available at https://github.com/kalray
This includes Linux kernel, uClibc-ng, gcc, binutils, etc.

Signed-off-by: Clément Léger <cleger@kalray.eu>
Signed-off-by: Guillaume Thouvenin <gthouvenin@kalray.eu>
Signed-off-by: Laurent Thevenoux <lthevenoux@kalray.eu>
Signed-off-by: Marc Poulhies <mpoulhies@kalray.eu>
Signed-off-by: Marius Gligor <mgligor@kalray.eu>
Signed-off-by: Yann Sionneau <ysionneau@kalray.eu>

12 files changed, 266 insertions, 0 deletions

diff --git a/libm/kvx/Makefile.arch b/libm/kvx/Makefile.arch
new file mode 100644
index 000000000..e26adb6f1
--- /dev/null
+++ b/libm/kvx/Makefile.arch
@@ -0,0 +1,22 @@
+# Makefile for uClibc
+#
+# Copyright (C) 2000-2008 Erik Andersen <andersen@uclibc.org>
+# Copyright (C) 2018 Kalray Inc.
+#
+# Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
+
+
+ifeq ($(UCLIBC_HAS_FENV),y)
+libm_ARCH_SRC:=$(wildcard $(libm_ARCH_DIR)/*.c)
+libm_ARCH_OBJ:=$(patsubst $(libm_ARCH_DIR)/%.c,$(libm_ARCH_OUT)/%.o,$(libm_ARCH_SRC))
+endif
+
+libm_ARCH_OBJS:=$(libm_ARCH_OBJ)
+
+ifeq ($(DOPIC),y)
+libm-a-y+=$(libm_ARCH_OBJS:.o=.os)
+else
+libm-a-y+=$(libm_ARCH_OBJS)
+endif
+libm-so-y+=$(libm_ARCH_OBJS:.o=.os)
+
diff --git a/libm/kvx/feclearexcept.c b/libm/kvx/feclearexcept.c
new file mode 100644
index 000000000..d886cf30e
--- /dev/null
+++ b/libm/kvx/feclearexcept.c
@@ -0,0 +1,20 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides feclearexcept for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int feclearexcept(int excepts)
+{
+  /* Mask excepts to be sure only supported flag bits are set */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Set $cs with 'excepts' as a clear mask. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, excepts);
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fegetenv.c b/libm/kvx/fegetenv.c
new file mode 100644
index 000000000..0f99541b2
--- /dev/null
+++ b/libm/kvx/fegetenv.c
@@ -0,0 +1,21 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fegetenv for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fegetenv(fenv_t *envp)
+{
+  /* Get the current environment ($cs) */
+  fenv_t fe;
+  fe = __builtin_kvx_get(KVX_SFR_CS);
+
+  /* Mask $cs status to keep exception flags and rounding mode only. */
+  *envp = (fe & (FE_ALL_EXCEPT | FE_RND_MASK));
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fegetexceptflag.c b/libm/kvx/fegetexceptflag.c
new file mode 100644
index 000000000..72738ec09
--- /dev/null
+++ b/libm/kvx/fegetexceptflag.c
@@ -0,0 +1,24 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fegetexceptflag for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fegetexceptflag(fexcept_t *flagp, int excepts)
+{
+  /* Mask excepts to be sure only supported flag bits are set */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Get the current exception flags of the $cs register. */
+  fexcept_t flags;
+  flags = __builtin_kvx_get(KVX_SFR_CS);
+
+  /* Return the requested flags in flagp */
+  *flagp = flags & excepts;
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fegetround.c b/libm/kvx/fegetround.c
new file mode 100644
index 000000000..05e872506
--- /dev/null
+++ b/libm/kvx/fegetround.c
@@ -0,0 +1,16 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fegetround for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fegetround(void)
+{
+  /* Get all $cs flags (exception flags and rounding mode) */
+  fenv_t rm;
+  rm = __builtin_kvx_get(KVX_SFR_CS);
+
+  /* Return the rounding mode */
+  return rm & FE_RND_MASK;
+}
diff --git a/libm/kvx/feholdexcept.c b/libm/kvx/feholdexcept.c
new file mode 100644
index 000000000..e9dfc1862
--- /dev/null
+++ b/libm/kvx/feholdexcept.c
@@ -0,0 +1,26 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides feholdexcept for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int feholdexcept(fenv_t *envp)
+{
+  /* Get the current environment ($cs) */
+  fenv_t fe;
+  fe = __builtin_kvx_get(KVX_SFR_CS);
+
+  /* Mask $cs status to keep exception flags and rounding mode only. */
+  *envp = (fe & (FE_ALL_EXCEPT | FE_RND_MASK));
+
+  /* Set $cs with 'FE_ALL_EXCEPT' as a clear mask. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, FE_ALL_EXCEPT);
+  
+  /* KVX does not raise FP traps so it is always in a "non-stop" mode */
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/feraiseexcept.c b/libm/kvx/feraiseexcept.c
new file mode 100644
index 000000000..156bf66cf
--- /dev/null
+++ b/libm/kvx/feraiseexcept.c
@@ -0,0 +1,24 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides feraiseexcept for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int feraiseexcept(int excepts)
+{
+  /* Mask excepts to be sure only supported flag bits are set */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Set $cs with 'excepts' as a set mask. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, (long long)excepts << 32);
+
+  /* C99 requirements are met. The flags are raised at the same time
+     so order is preserved. FE_INEXACT is not raised if one of the
+     exceptions is FE_OVERFLOW or FE_UNDERFLOW. */
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fesetenv.c b/libm/kvx/fesetenv.c
new file mode 100644
index 000000000..0a85f1128
--- /dev/null
+++ b/libm/kvx/fesetenv.c
@@ -0,0 +1,23 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fesetenv for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fesetenv(const fenv_t *envp)
+{
+  /* Mask *envp to be sure only valid bits are set */
+  fenv_t fe = *envp;
+  fe &= (FE_ALL_EXCEPT|FE_RND_MASK);
+
+  /* Set exception flags and rounding mode bit-fields of $cs, with
+     'fe' as a set mask and FE_ALL_EXCEPT|FE_RND_MASK as a clear
+     mask. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, ((long long)fe << 32) | FE_ALL_EXCEPT | FE_RND_MASK);
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fesetexceptflag.c b/libm/kvx/fesetexceptflag.c
new file mode 100644
index 000000000..49180dc87
--- /dev/null
+++ b/libm/kvx/fesetexceptflag.c
@@ -0,0 +1,24 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fesetexceptflag for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fesetexceptflag(const fexcept_t *flagp, int excepts)
+{
+  /* Mask excepts to be sure only supported flag bits are set */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Set the requested flags */
+  fexcept_t flags = (*flagp & excepts);
+
+  /* Set $cs with 'flags' as a set mask and FE_ALL_EXCEPT as a clear
+     mask. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, (long long)flags << 32 | FE_ALL_EXCEPT);
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fesetround.c b/libm/kvx/fesetround.c
new file mode 100644
index 000000000..c1a24458e
--- /dev/null
+++ b/libm/kvx/fesetround.c
@@ -0,0 +1,21 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fesetround for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fesetround(int rounding_mode)
+{
+  /* Mask round to be sure only valid rounding bits are set */
+  rounding_mode &= FE_RND_MASK;
+
+  /* Set rounding mode bit-fields of $cs, with 'rounding_mode' as a
+     set mask and FE_RND_MASK as a clear mask. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, ((long long)rounding_mode << 32) | FE_RND_MASK);
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}
diff --git a/libm/kvx/fetestexcept.c b/libm/kvx/fetestexcept.c
new file mode 100644
index 000000000..b8ed8f0e6
--- /dev/null
+++ b/libm/kvx/fetestexcept.c
@@ -0,0 +1,21 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides fesetexcept for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int fetestexcept(int excepts)
+{
+  /* Mask excepts to be sure only supported flag bits are set */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Get the current exception flags of the $cs register. */
+  fexcept_t flags;
+  flags = __builtin_kvx_get(KVX_SFR_CS);
+
+  /* Return the floating-point exception macros that are both included
+     in excepts and correspond to the floating-point exceptions
+     currently set. */
+  return (flags & excepts);
+}
diff --git a/libm/kvx/feupdateenv.c b/libm/kvx/feupdateenv.c
new file mode 100644
index 000000000..f64510308
--- /dev/null
+++ b/libm/kvx/feupdateenv.c
@@ -0,0 +1,24 @@
+/*
+  (C) Copyright 2019 Kalray S.A.
+  This file provides feupdateenv for the Coolidge processor.
+*/
+
+#include <fenv.h>
+
+int feupdateenv(const fenv_t *envp)
+{
+  /* Mask *envp to be sure only valid bits are set */
+  fenv_t fe = *envp;
+  fe &= (FE_ALL_EXCEPT|FE_RND_MASK);
+
+  /* Update exception flags and rounding mode bit-fields of $cs, with
+     'fe' as a set mask and FE_RND_MASK as a clear mask. FE_ALL_EXCEPT
+     is not cleared: restores rounding mode and updates exception
+     flags. */
+  __builtin_kvx_wfxl(KVX_SFR_CS, ((long long)fe << 32) | FE_RND_MASK);
+
+  /* The above insn cannot fail (while the OS allows access to the
+     floating-point exception flags of the $cs register). Return
+     success. */
+  return 0;
+}