1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
|
/*
* Stolen from glibc-2.2.2 by Eddie C. Dost <ecd@atecom.com>
*/
.text
.globl _dl_linux_resolve
.type _dl_linux_resolve, @function
.balign 16
_dl_linux_resolve:
mov.l r3, @-r15
mov.l r4, @-r15
mov.l r5, @-r15
mov.l r6, @-r15
mov.l r7, @-r15
mov.l r12, @-r15
movt r3 ! Save T flag
mov.l r3, @-r15
#ifdef HAVE_FPU
sts.l fpscr, @-r15
mov #8,r3
swap.w r3, r3
lds r3, fpscr
fmov.s fr11, @-r15
fmov.s fr10, @-r15
fmov.s fr9, @-r15
fmov.s fr8, @-r15
fmov.s fr7, @-r15
fmov.s fr6, @-r15
fmov.s fr5, @-r15
fmov.s fr4, @-r15
#endif
sts.l pr, @-r15
mov r2, r4 ! link map address
mov.l 3f, r0
jsr @r0 ! Call resolver
mov r1, r5 ! Reloc offset
lds.l @r15+, pr ! Get register content back
#ifdef HAVE_FPU
fmov.s @r15+, fr4
fmov.s @r15+, fr5
fmov.s @r15+, fr6
fmov.s @r15+, fr7
fmov.s @r15+, fr8
fmov.s @r15+, fr9
fmov.s @r15+, fr10
fmov.s @r15+, fr11
lds.l @r15+, fpscr
#endif
mov.l @r15+, r3
shal r3 ! Load T flag
mov.l @r15+, r12
mov.l @r15+, r7
mov.l @r15+, r6
mov.l @r15+, r5
mov.l @r15+, r4
jmp @r0 ! Jump to function address
mov.l @r15+, r3
.balign 4
3:
.long _dl_linux_resolver
.size _dl_linux_resolve, . - _dl_linux_resolve
|