diff options
60 files changed, 2755 insertions, 99 deletions
diff --git a/extra/Configs/Config.in.arch b/extra/Configs/Config.in.arch index 53734d971..24c0db157 100644 --- a/extra/Configs/Config.in.arch +++ b/extra/Configs/Config.in.arch @@ -165,7 +165,9 @@ config UCLIBC_HAS_FENV depends on UCLIBC_HAS_FLOATS depends on TARGET_i386 || \ TARGET_aarch64 || \ + TARGET_arc || \ TARGET_arm || \ + TARGET_csky || \ TARGET_m68k || \ TARGET_metag || \ TARGET_mips || \ @@ -174,6 +176,7 @@ config UCLIBC_HAS_FENV (TARGET_powerpc && CONFIG_E500) || \ TARGET_riscv32 || \ TARGET_riscv64 || \ + (TARGET_sh && (CONFIG_SH4 || CONFIG_SH4A)) || \ TARGET_sparc || \ TARGET_x86_64 help diff --git a/libc/sysdeps/linux/csky/bits/fenv.h b/libc/sysdeps/linux/csky/bits/fenv.h index 3359e1f8e..1428f385a 100644 --- a/libc/sysdeps/linux/csky/bits/fenv.h +++ b/libc/sysdeps/linux/csky/bits/fenv.h @@ -1,65 +1,108 @@ -/* - * Copyright (C) 2017 Hangzhou C-SKY Microsystems co.,ltd. - * - * Licensed under the LGPL v2.1 or later, see the file COPYING.LIB - * in this tarball. - */ +/* Floating point environment. C-SKY version. + Copyright (C) 2018-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <https://www.gnu.org/licenses/>. */ #ifndef _FENV_H # error "Never use <bits/fenv.h> directly; include <fenv.h> instead." #endif -/* Define bits representing the exception. We use the bit positions of - the appropriate bits in the FPSR Accrued Exception Byte. */ +#ifdef __csky_hard_float__ +/* Define bits representing the exception. We use the bit positions + of the appropriate bits in the FPU control word. */ enum { - FE_INEXACT = 1 << 3, -#define FE_INEXACT FE_INEXACT - FE_DIVBYZERO = 1 << 4, -#define FE_DIVBYZERO FE_DIVBYZERO - FE_UNDERFLOW = 1 << 5, -#define FE_UNDERFLOW FE_UNDERFLOW - FE_OVERFLOW = 1 << 6, -#define FE_OVERFLOW FE_OVERFLOW - FE_INVALID = 1 << 7 -#define FE_INVALID FE_INVALID + FE_INVALID = +#define FE_INVALID 0x01 + FE_INVALID, + FE_DIVBYZERO = +#define FE_DIVBYZERO 0x02 + FE_DIVBYZERO, + FE_OVERFLOW = +#define FE_OVERFLOW 0x04 + FE_OVERFLOW, + FE_UNDERFLOW = +#define FE_UNDERFLOW 0x08 + FE_UNDERFLOW, + FE_INEXACT = +#define FE_INEXACT 0x10 + FE_INEXACT, + __FE_DENORMAL = 0x20 }; #define FE_ALL_EXCEPT \ (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID) -/* The csky FPU supports all of the four defined rounding modes. We use - the bit positions in the FPCR Mode Control Byte as the values for the - appropriate macros. */ +/* The C-SKY FPU supports all of the four defined rounding modes. We + use again the bit positions in the FPU control word as the values + for the appropriate macros. */ +enum + { + FE_TONEAREST = +#define FE_TONEAREST (0x0 << 24) + FE_TONEAREST, + FE_TOWARDZERO = +#define FE_TOWARDZERO (0x1 << 24) + FE_TOWARDZERO, + FE_UPWARD = +#define FE_UPWARD (0x2 << 24) + FE_UPWARD, + FE_DOWNWARD = +#define FE_DOWNWARD (0x3 << 24) + FE_DOWNWARD, + __FE_ROUND_MASK = (0x3 << 24) + }; + +#else + +/* In the soft-float case, only rounding to nearest is supported, with + no exceptions. */ + enum { - FE_TONEAREST = 0, -#define FE_TONEAREST FE_TONEAREST - FE_TOWARDZERO = 1 << 4, -#define FE_TOWARDZERO FE_TOWARDZERO - FE_DOWNWARD = 2 << 4, -#define FE_DOWNWARD FE_DOWNWARD - FE_UPWARD = 3 << 4 -#define FE_UPWARD FE_UPWARD + __FE_UNDEFINED = -1, + + FE_TONEAREST = +# define FE_TONEAREST 0x0 + FE_TONEAREST }; +# define FE_ALL_EXCEPT 0 + +#endif + /* Type representing exception flags. */ typedef unsigned int fexcept_t; -/* Type representing floating-point environment. This structure - corresponds to the layout of the block written by `fmovem'. */ +/* Type representing floating-point environment. */ typedef struct - { - unsigned int __control_register; - unsigned int __status_register; - unsigned int __instruction_address; - } -fenv_t; +{ + unsigned int __fpcr; + unsigned int __fpsr; +} fenv_t; /* If the default argument is used we use this value. */ -#define FE_DFL_ENV ((__const fenv_t *) -1) +#define FE_DFL_ENV ((const fenv_t *) -1) -#ifdef __USE_GNU +#if defined __USE_GNU && defined __csky_hard_float__ /* Floating-point environment where none of the exceptions are masked. */ -# define FE_NOMASK_ENV ((__const fenv_t *) -2) +# define FE_NOMASK_ENV ((const fenv_t *) -2) #endif + +/* Type representing floating-point control modes. */ +typedef unsigned int femode_t; + +/* Default floating-point control modes. */ +# define FE_DFL_MODE ((const femode_t *) -1L) diff --git a/libc/sysdeps/linux/csky/fpu_control.h b/libc/sysdeps/linux/csky/fpu_control.h new file mode 100644 index 000000000..a2d615554 --- /dev/null +++ b/libc/sysdeps/linux/csky/fpu_control.h @@ -0,0 +1,147 @@ +/* FPU control word bits. C-SKY version. + Copyright (C) 2018-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <https://www.gnu.org/licenses/>. */ + +#ifndef _FPU_CONTROL_H +#define _FPU_CONTROL_H + +/* C-SKY FPU floating point control register bits. + + 31-28 -> Reserved (read as 0, write with 0). + 27 -> 0: Flush denormalized results to zero. + 1: Flush denormalized results to signed minimal normal number. + 26 -> Reserved (read as 0, write with 0). + 25-24 -> Rounding control. + 23-6 -> Reserved (read as 0, write with 0). + 5 -> Enable exception for input denormalized exception. + 4 -> Enable exception for inexact exception. + 3 -> Enable exception for underflow exception. + 2 -> Enable exception for overflow exception. + 1 -> Enable exception for division by zero exception. + 0 -> Enable exception for invalid operation exception. + + Rounding Control: + 00 - Rounding to nearest (RN). + 01 - Rounding toward zero (RZ). + 10 - Rounding (up) toward plus infinity (RP). + 11 - Rounding (down)toward minus infinity (RM). + + C-SKY FPU floating point exception status register bits. + + 15 -> Accumulate bit for any exception. + 14 -> Reserved (read as 0, write with 0). + 13 -> Cause bit for input denormalized exception. + 12 -> Cause bit for inexact exception. + 11 -> Cause bit for underflow exception. + 10 -> Cause bit for overflow exception. + 9 -> Cause bit for division by zero exception. + 8 -> Cause bit for invalid operation exception. + 7 -> Flag bit for any exception. + 6 -> Reserved (read as 0, write with 0). + 5 -> Flag exception for input denormalized exception. + 4 -> Flag exception for inexact exception. + 3 -> Flag exception for underflow exception. + 2 -> Flag exception for overflow exception. + 1 -> Flag exception for division by zero exception. + 0 -> Flag exception for invalid operation exception. */ + +#include <features.h> + +#ifdef __csky_soft_float__ + +# define _FPU_RESERVED 0xffffffff +# define _FPU_DEFAULT 0x00000000 +typedef unsigned int fpu_control_t; +# define _FPU_GETCW(cw) (cw) = 0 +# define _FPU_SETCW(cw) (void) (cw) +# define _FPU_GETFPSR(cw) (cw) = 0 +# define _FPU_SETFPSR(cw) (void) (cw) +extern fpu_control_t __fpu_control; + +#else /* __csky_soft_float__ */ + +/* Masking of interrupts. */ +# define _FPU_MASK_IDE (1 << 5) /* Input denormalized exception. */ +# define _FPU_MASK_IXE (1 << 4) /* Inexact exception. */ +# define _FPU_MASK_UFE (1 << 3) /* Underflow exception. */ +# define _FPU_MASK_OFE (1 << 2) /* Overflow exception. */ +# define _FPU_MASK_DZE (1 << 1) /* Division by zero exception. */ +# define _FPU_MASK_IOE (1 << 0) /* Invalid operation exception. */ + +# define _FPU_MASK_FEA (1 << 15) /* Case for any exception. */ +# define _FPU_MASK_FEC (1 << 7) /* Flag for any exception. */ + +/* Flush denormalized numbers to zero. */ +# define _FPU_FLUSH_TZ 0x8000000 + +/* Rounding control. */ +# define _FPU_RC_NEAREST (0x0 << 24) /* RECOMMENDED. */ +# define _FPU_RC_ZERO (0x1 << 24) +# define _FPU_RC_UP (0x2 << 24) +# define _FPU_RC_DOWN (0x3 << 24) + +# define _FPU_RESERVED 0xf460ffc0 /* Reserved bits in cw. */ +# define _FPU_FPSR_RESERVED 0xffff4040 + +/* The fdlibm code requires strict IEEE double precision arithmetic, + and no interrupts for exceptions, rounding to nearest. */ + +# define _FPU_DEFAULT 0x00000000 +# define _FPU_FPSR_DEFAULT 0x00000000 + +/* IEEE: same as above, but exceptions. */ +# define _FPU_FPCR_IEEE 0x0000001F +# define _FPU_FPSR_IEEE 0x00000000 + +/* Type of the control word. */ +typedef unsigned int fpu_control_t; + +/* Macros for accessing the hardware control word. */ +# if (__CSKY__ == 2) +# define _FPU_GETCW(cw) __asm__ volatile ("mfcr %0, cr<1, 2>" : "=a" (cw)) +# define _FPU_SETCW(cw) __asm__ volatile ("mtcr %0, cr<1, 2>" : : "a" (cw)) +# define _FPU_GETFPSR(cw) __asm__ volatile ("mfcr %0, cr<2, 2>" : "=a" (cw)) +# define _FPU_SETFPSR(cw) __asm__ volatile ("mtcr %0, cr<2, 2>" : : "a" (cw)) +# else +# define _FPU_GETCW(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \ + " btsti %0, 31 \n" \ + " bt 1b \n" \ + " cprcr %0, cpcr1\n" : "=b" (cw)) + +# define _FPU_SETCW(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \ + " btsti r7, 31 \n" \ + " bt 1b \n" \ + " cpwcr %0, cpcr1 \n" \ + : : "b" (cw) : "r7") + +# define _FPU_GETFPSR(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \ + " btsti %0, 31 \n" \ + " bt 1b \n" \ + " cprcr %0, cpcr4\n" : "=b" (cw)) + +# define _FPU_SETFPSR(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \ + " btsti r7, 31 \n" \ + " bt 1b \n" \ + " cpwcr %0, cpcr4 \n" \ + : : "b" (cw) : "r7") +# endif /* __CSKY__ != 2 */ + +/* Default control word set at startup. */ +extern fpu_control_t __fpu_control; + +#endif /* !__csky_soft_float__ */ + +#endif /* fpu_control.h */ diff --git a/libc/sysdeps/linux/sh/bits/fenv.h b/libc/sysdeps/linux/sh/bits/fenv.h index 38c303ff2..349e7ddde 100644 --- a/libc/sysdeps/linux/sh/bits/fenv.h +++ b/libc/sysdeps/linux/sh/bits/fenv.h @@ -1,5 +1,4 @@ -/* Copyright (C) 1999, 2000 Free Software Foundation, Inc. - This file is part of the GNU C Library. +/* Copyright (C) 1999-2025 Free Software Foundation, Inc. The GNU C Library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public @@ -13,7 +12,7 @@ You should have received a copy of the GNU Lesser General Public License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ + <https://www.gnu.org/licenses/>. */ #ifndef _FENV_H # error "Never use <bits/fenv.h> directly; include <fenv.h> instead." @@ -24,34 +23,39 @@ of the appropriate bits in the FPU control word. */ enum { - FE_INEXACT = 0x04, -#define FE_INEXACT FE_INEXACT - FE_UNDERFLOW = 0x08, -#define FE_UNDERFLOW FE_UNDERFLOW - FE_OVERFLOW = 0x10, -#define FE_OVERFLOW FE_OVERFLOW - FE_DIVBYZERO = 0x20, -#define FE_DIVBYZERO FE_DIVBYZERO - FE_INVALID = 0x40, -#define FE_INVALID FE_INVALID + FE_INEXACT = +#define FE_INEXACT 0x04 + FE_INEXACT, + FE_UNDERFLOW = +#define FE_UNDERFLOW 0x08 + FE_UNDERFLOW, + FE_OVERFLOW = +#define FE_OVERFLOW 0x10 + FE_OVERFLOW, + FE_DIVBYZERO = +#define FE_DIVBYZERO 0x20 + FE_DIVBYZERO, + FE_INVALID = +#define FE_INVALID 0x40 + FE_INVALID, }; #define FE_ALL_EXCEPT \ (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID) -/* The SH FPU supports all of the four defined rounding modes. We - use again the bit positions in the FPU control word as the values - for the appropriate macros. */ +/* The SH FPU supports two of the four defined rounding modes: round to nearest + and round to zero. We use again the bit positions in the FPU control word + as the values for the appropriate macros. */ enum { - FE_TONEAREST = 0x0, -#define FE_TONEAREST FE_TONEAREST - FE_TOWARDZERO = 0x1, -#define FE_TOWARDZERO FE_TOWARDZERO - FE_UPWARD = 0x2, -#define FE_UPWARD FE_UPWARD - FE_DOWNWARD = 0x3 -#define FE_DOWNWARD FE_DOWNWARD + __FE_UNDEFINED = -1, + + FE_TONEAREST = +#define FE_TONEAREST 0x0 + FE_TONEAREST, + FE_TOWARDZERO = +#define FE_TOWARDZERO 0x1 + FE_TOWARDZERO, }; @@ -68,4 +72,10 @@ typedef struct fenv_t; /* If the default argument is used we use this value. */ -#define FE_DFL_ENV ((fenv_t *) -1) +#define FE_DFL_ENV ((const fenv_t *) -1) + +/* Type representing floating-point control modes. */ +typedef unsigned int femode_t; + +/* Default floating-point control modes. */ +# define FE_DFL_MODE ((const femode_t *) -1L) diff --git a/libc/sysdeps/linux/sh/fpu_control.h b/libc/sysdeps/linux/sh/fpu_control.h index 8143041fe..d5f401f91 100644 --- a/libc/sysdeps/linux/sh/fpu_control.h +++ b/libc/sysdeps/linux/sh/fpu_control.h @@ -1,6 +1,5 @@ /* FPU control word definitions. SH version. - Copyright (C) 1999, 2000, 2009 Free Software Foundation, Inc. - This file is part of the GNU C Library. + Copyright (C) 1999-2025 Free Software Foundation, Inc. The GNU C Library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public @@ -14,14 +13,23 @@ You should have received a copy of the GNU Lesser General Public License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ + <https://www.gnu.org/licenses/>. */ #ifndef _FPU_CONTROL_H #define _FPU_CONTROL_H -#ifndef __SH4__ -#error This file is only correct for sh4 -#endif +#if !defined(__SH_FPU_ANY__) + +#define _FPU_RESERVED 0xffffffff +#define _FPU_DEFAULT 0x00000000 +typedef unsigned int fpu_control_t; +#define _FPU_GETCW(cw) (cw) = 0 +#define _FPU_SETCW(cw) (void) (cw) +extern fpu_control_t __fpu_control; + +#else + +#include <features.h> /* masking of interrupts */ #define _FPU_MASK_VM 0x0800 /* Invalid operation */ @@ -48,16 +56,20 @@ typedef unsigned int fpu_control_t; #define _FPU_GETCW(cw) __asm__ ("sts fpscr,%0" : "=r" (cw)) #if defined __GNUC__ -/* GCC provides this function */ +__BEGIN_DECLS + +/* GCC provides this function. */ extern void __set_fpscr (unsigned long); #define _FPU_SETCW(cw) __set_fpscr ((cw)) #else #define _FPU_SETCW(cw) __asm__ ("lds %0,fpscr" : : "r" (cw)) #endif -#if 0 /* Default control word set at startup. */ extern fpu_control_t __fpu_control; -#endif + +__END_DECLS + +#endif /* __SH_FPU_ANY__ */ #endif /* _FPU_CONTROL_H */ diff --git a/libm/arc/Makefile.arch b/libm/arc/Makefile.arch new file mode 100644 index 000000000..bd38690be --- /dev/null +++ b/libm/arc/Makefile.arch @@ -0,0 +1,16 @@ +# Makefile for uClibc-ng +# Licensed under the LGPL v2.1 or later, see the file COPYING.LIB in this tarball. + +ifeq ($(UCLIBC_HAS_FENV),y) +libm_ARCH_SRC:=$(wildcard $(libm_ARCH_DIR)/*.c) +libm_ARCH_OBJ:=$(patsubst $(libm_ARCH_DIR)/%.c,$(libm_ARCH_OUT)/%.o,$(libm_ARCH_SRC)) +endif + +libm_ARCH_OBJS:=$(libm_ARCH_OBJ) + +ifeq ($(DOPIC),y) +libm-a-y+=$(libm_ARCH_OBJS:.o=.os) +else +libm-a-y+=$(libm_ARCH_OBJS) +endif +libm-so-y+=$(libm_ARCH_OBJS:.o=.os) diff --git a/libm/arc/fclrexcpt.c b/libm/arc/fclrexcpt.c new file mode 100644 index 000000000..76631657d --- /dev/null +++ b/libm/arc/fclrexcpt.c @@ -0,0 +1,34 @@ +/* Clear given exceptions in current floating-point environment. + Copyright (C) 2020-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <https://www.gnu.org/licenses/>. */ + +#include <fenv.h> +#include <fpu_control.h> + +int +feclearexcept (int excepts) +{ + unsigned int fpsr; + + _FPU_GETS (fpsr); + + /* Clear the relevant bits, FWE is preserved. */ + fpsr &= ~excepts; + + _FPU_SETS (fpsr); + + return 0; +} diff --git a/libm/arc/fegetenv.c b/libm/arc/fegetenv.c new file mode 100644 index 000000000..ad332c3e5 --- /dev/null +++ b/libm/arc/fegetenv.c @@ -0,0 +1,33 @@ +/* Store current floating-point environment. + Copyright (C) 2020-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <https://www.gnu.org/licenses/>. */ + +#include <fenv.h> +#include <fpu_control.h> + +int +fegetenv (fenv_t *envp) +{ + unsigned int fpcr; + unsigned int fpsr; + + _FPU_GETCW (fpcr); + _FPU_GETS (fpsr); + envp->__fpcr = fpcr; + envp->__fpsr = fpsr; + + return 0; +} diff --git a/libm/arc/fegetmode.c b/libm/arc/fegetmode.c new file mode 100644 index 000000000..e6aebbc87 --- /dev/null +++ b/libm/arc/fegetmode.c @@ -0,0 +1,30 @@ +/* Store current floating-point control modes. + Copyright (C) 2020-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + <https://www.gnu.org/licenses/>. */ + +#include <fenv.h> +#include <fpu_control.h> + +int +fegetmode (femode_t *modep) +{ + unsigned int fpcr; + + _FPU_GETCW (fpcr); + *modep = fpcr; + + return 0; +} diff --git a/libm/arc/fegetround.c b/libm/arc/fegetround.c new file mode 100644 index 000000000..4dc476a7c --- /dev/null +++ b/ |