summaryrefslogtreecommitdiff
path: root/libm/x86_64/fesetmode.c
diff options
context:
space:
mode:
authorWaldemar Brodkorb <wbx@uclibc-ng.org>2017-12-03 21:12:34 +0100
committerWaldemar Brodkorb <wbx@uclibc-ng.org>2017-12-03 21:12:34 +0100
commitedce88cfef2f2a62647c2ab9536ca29694fab292 (patch)
tree5cfc13c44a91bb8b983ee137de38e136289db81e /libm/x86_64/fesetmode.c
parentc69db851309995c525b3993a10dc13dabdeb7b33 (diff)
x86_64: add fenv support from glibc
Diffstat (limited to 'libm/x86_64/fesetmode.c')
-rw-r--r--libm/x86_64/fesetmode.c49
1 files changed, 49 insertions, 0 deletions
diff --git a/libm/x86_64/fesetmode.c b/libm/x86_64/fesetmode.c
new file mode 100644
index 000000000..487be9747
--- /dev/null
+++ b/libm/x86_64/fesetmode.c
@@ -0,0 +1,49 @@
+/* Install given floating-point control modes. x86_64 version.
+ Copyright (C) 2016-2017 Free Software Foundation, Inc.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+/* All exceptions, including the x86-specific "denormal operand"
+ exception. */
+#define FE_ALL_EXCEPT_X86 (FE_ALL_EXCEPT | __FE_DENORM)
+
+int
+fesetmode (const femode_t *modep)
+{
+ fpu_control_t cw;
+ unsigned int mxcsr;
+ __asm__ ("stmxcsr %0" : "=m" (mxcsr));
+ /* Preserve SSE exception flags but restore other state in
+ MXCSR. */
+ mxcsr &= FE_ALL_EXCEPT_X86;
+ if (modep == FE_DFL_MODE)
+ {
+ cw = _FPU_DEFAULT;
+ /* Default MXCSR state has all bits zero except for those
+ masking exceptions. */
+ mxcsr |= FE_ALL_EXCEPT_X86 << 7;
+ }
+ else
+ {
+ cw = modep->__control_word;
+ mxcsr |= modep->__mxcsr & ~FE_ALL_EXCEPT_X86;
+ }
+ _FPU_SETCW (cw);
+ __asm__ ("ldmxcsr %0" : : "m" (mxcsr));
+ return 0;
+}