diff options
| author | Eric Andersen <andersen@codepoet.org> | 2002-11-08 02:18:16 +0000 |
|---|---|---|
| committer | Eric Andersen <andersen@codepoet.org> | 2002-11-08 02:18:16 +0000 |
| commit | 92e03da6a446faa5ad8946fc90794e918db90454 (patch) | |
| tree | a79cd864f60b5153ea6ec8880a4e2761e28cc9f6 /ldso/ldso/sh/dl-sysdep.h | |
| parent | 8d6489ff23a5649c5ffdfcea7ad466cc82752de6 (diff) | |
Another SuperH patch from Stefan Allius. This make it so
the SuperH lib loader can be compiled by GCC 3.3
Diffstat (limited to 'ldso/ldso/sh/dl-sysdep.h')
| -rw-r--r-- | ldso/ldso/sh/dl-sysdep.h | 86 |
1 files changed, 41 insertions, 45 deletions
diff --git a/ldso/ldso/sh/dl-sysdep.h b/ldso/ldso/sh/dl-sysdep.h index 4e7f8b590..70241e2d7 100644 --- a/ldso/ldso/sh/dl-sysdep.h +++ b/ldso/ldso/sh/dl-sysdep.h @@ -83,11 +83,9 @@ extern unsigned long _dl_linux_resolver(struct elf_resolve * tpnt, int reloc_ent static __inline__ unsigned int _dl_urem(unsigned int n, unsigned int base) { -register unsigned int __r0 __asm__ ("r0"); -register unsigned int __r4 __asm__ ("r4") = n; -register unsigned int __r5 __asm__ ("r5") = base; - - __asm__ ("" \ + int res; + + __asm__ (""\ "mov #0, r0\n\t" \ "div0u\n\t" \ "" \ @@ -95,49 +93,47 @@ register unsigned int __r5 __asm__ ("r5") = base; "! bit and divide it by whats in %2. Put the answer bit\n\t" \ "! into the T bit so it can come out again at the bottom\n\t" \ "" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ "" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ "" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ "" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4 ; div1 r5, r0\n\t" \ - "rotcl r4\n\t" \ - "mov r4, r0\n\t" - - : "=r" (__r0) - : "r" (__r4), "r" (__r5) - : "r4", "cc"); - - return n - (base * __r0); + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1 ; div1 %2, r0\n\t" \ + "rotcl %1\n\t" + : "=r" (res) + : "0" (n), "r" (base) + : "r0","cc"); + + return n - (base * res); } #define do_rem(result, n, base) ((result) = _dl_urem((n), (base))) |