1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
|
/* Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ulrich Drepper <drepper@redhat.com>, 2002.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, write to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307 USA. */
#include <stdint.h>
#if defined __CONFIG_GENERIC_I386__ || defined __CONFIG_I386__
# warning this file is only good for 486 or better
#endif
typedef int8_t atomic8_t;
typedef uint8_t uatomic8_t;
typedef int_fast8_t atomic_fast8_t;
typedef uint_fast8_t uatomic_fast8_t;
typedef int16_t atomic16_t;
typedef uint16_t uatomic16_t;
typedef int_fast16_t atomic_fast16_t;
typedef uint_fast16_t uatomic_fast16_t;
typedef int32_t atomic32_t;
typedef uint32_t uatomic32_t;
typedef int_fast32_t atomic_fast32_t;
typedef uint_fast32_t uatomic_fast32_t;
typedef int64_t atomic64_t;
typedef uint64_t uatomic64_t;
typedef int_fast64_t atomic_fast64_t;
typedef uint_fast64_t uatomic_fast64_t;
typedef intptr_t atomicptr_t;
typedef uintptr_t uatomicptr_t;
typedef intmax_t atomic_max_t;
typedef uintmax_t uatomic_max_t;
#ifndef LOCK_PREFIX
# ifdef UP
# define LOCK_PREFIX /* nothing */
# else
# define LOCK_PREFIX "lock;"
# endif
#endif
#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
__asm __volatile (LOCK_PREFIX "cmpxchgb %b2, %1" \
: "=a" (ret), "=m" (*mem) \
: "q" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
__asm __volatile (LOCK_PREFIX "cmpxchgw %w2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "m" (*mem), "0" (oldval)); \
ret; })
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
__asm __volatile (LOCK_PREFIX "cmpxchgl %2, %1" \
: "=a" (ret), "=m" (*mem) \
: "r" (newval), "m" (*mem), "0" (oldval)); \
ret; })
/* XXX We do not really need 64-bit compare-and-exchange. At least
not in the moment. Using it would mean causing portability
problems since not many other 32-bit architectures have support for
such an operation. So don't define any code for now. If it is
really going to be used the code below can be used on Intel Pentium
and later, but NOT on i486. */
#if 1
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
({ __typeof (*mem) ret = *(mem); abort (); ret = (newval); ret = (oldval); })
#else
# ifdef __PIC__
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
__asm __volatile ("xchgl %2, %%ebx\n\t" \
LOCK_PREFIX "cmpxchg8b %1\n\t" \
"xchgl %2, %%ebx" \
: "=A" (ret), "=m" (*mem) \
: "DS" (((unsigned long long int) (newval)) \
& 0xffffffff), \
"c" (((unsigned long long int) (newval)) >> 32), \
"m" (*mem), "a" (((unsigned long long int) (oldval)) \
& 0xffffffff), \
"d" (((unsigned long long int) (oldval)) >> 32)); \
ret; })
# else
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
({ __typeof (*mem) ret; \
__asm __volatile (LOCK_PREFIX "cmpxchg8b %1" \
: "=A" (ret), "=m" (*mem) \
: "b" (((unsigned long long int) (newval)) \
& 0xffffffff), \
"c" (((unsigned long long int) (newval)) >> 32), \
"m" (*mem), "a" (((unsigned long long int) (oldval)) \
& 0xffffffff), \
"d" (((unsigned long long int) (oldval)) >> 32)); \
ret; })
# endif
#endif
/* Note that we need no lock prefix. */
#define atomic_exchange_acq(mem, newvalue) \
({ __typeof (*mem) result; \
if (sizeof (*mem) == 1) \
__asm __volatile ("xchgb %b0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile ("xchgw %w0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile ("xchgl %0, %1" \
: "=r" (result), "=m" (*mem) \
: "0" (newvalue), "m" (*mem)); \
else \
{ \
result = 0; \
abort (); \
} \
result; })
#define atomic_exchange_and_add(mem, value) \
({ __typeof (*mem) __result; \
__typeof (value) __addval = (value); \
if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "xaddb %b0, %1" \
: "=r" (__result), "=m" (*mem) \
: "0" (__addval), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "xaddw %w0, %1" \
: "=r" (__result), "=m" (*mem) \
: "0" (__addval), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "xaddl %0, %1" \
: "=r" (__result), "=m" (*mem) \
: "0" (__addval), "m" (*mem)); \
else \
{ \
__typeof (mem) __memp = (mem); \
__typeof (*mem) __tmpval; \
__result = *__memp; \
do \
__tmpval = __result; \
while ((__result = __arch_compare_and_exchange_val_64_acq \
(__memp, __result + __addval, __result)) == __tmpval); \
} \
__result; })
#define atomic_add(mem, value) \
(void) ({ if (__builtin_constant_p (value) && (value) == 1) \
atomic_increment (mem); \
else if (__builtin_constant_p (value) && (value) == -1) \
atomic_decrement (mem); \
else if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "addb %b1, %0" \
: "=m" (*mem) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "addw %w1, %0" \
: "=m" (*mem) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "addl %1, %0" \
: "=m" (*mem) \
: "ir" (value), "m" (*mem)); \
else \
{ \
__typeof (value) __addval = (value); \
__typeof (mem) __memp = (mem); \
__typeof (*mem) __oldval = *__memp; \
__typeof (*mem) __tmpval; \
do \
__tmpval = __oldval; \
while ((__oldval = __arch_compare_and_exchange_val_64_acq \
(__memp, __oldval + __addval, __oldval)) == __tmpval); \
} \
})
#define atomic_add_negative(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "addb %b2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "iq" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "addw %w2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "addl %2, %0; sets %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else \
abort (); \
__result; })
#define atomic_add_zero(mem, value) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "addb %b2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "addw %w2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "addl %2, %0; setz %1" \
: "=m" (*mem), "=qm" (__result) \
: "ir" (value), "m" (*mem)); \
else \
abort (); \
__result; })
#define atomic_increment(mem) \
(void) ({ if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "incb %b0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "incw %w0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "incl %0" \
: "=m" (*mem) \
: "m" (*mem)); \
else \
{ \
__typeof (mem) __memp = (mem); \
__typeof (*mem) __oldval = *__memp; \
__typeof (*mem) __tmpval; \
do \
__tmpval = __oldval; \
while ((__oldval = __arch_compare_and_exchange_val_64_acq \
(__memp, __oldval + 1, __oldval)) == __tmpval); \
} \
})
#define atomic_increment_and_test(mem) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "incb %0; sete %b1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "incw %0; sete %w1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "incl %0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else \
abort (); \
__result; })
#define atomic_decrement(mem) \
(void) ({ if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "decb %b0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "decw %w0" \
: "=m" (*mem) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "decl %0" \
: "=m" (*mem) \
: "m" (*mem)); \
else \
{ \
__typeof (mem) __memp = (mem); \
__typeof (*mem) __oldval = *__memp; \
__typeof (*mem) __tmpval; \
do \
__tmpval = __oldval; \
while ((__oldval = __arch_compare_and_exchange_val_64_acq \
(__memp, __oldval - 1, __oldval)) == __tmpval); \
} \
})
#define atomic_decrement_and_test(mem) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "decb %b0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "decw %w0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "decl %0; sete %1" \
: "=m" (*mem), "=qm" (__result) \
: "m" (*mem)); \
else \
abort (); \
__result; })
#define atomic_bit_set(mem, bit) \
(void) ({ if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "orb %b2, %0" \
: "=m" (*mem) \
: "m" (*mem), "ir" (1 << (bit))); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "orw %w2, %0" \
: "=m" (*mem) \
: "m" (*mem), "ir" (1 << (bit))); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "orl %2, %0" \
: "=m" (*mem) \
: "m" (*mem), "ir" (1 << (bit))); \
else \
abort (); \
})
#define atomic_bit_test_set(mem, bit) \
({ unsigned char __result; \
if (sizeof (*mem) == 1) \
__asm __volatile (LOCK_PREFIX "btsb %3, %1; setc %0" \
: "=q" (__result), "=m" (*mem) \
: "m" (*mem), "ir" (bit)); \
else if (sizeof (*mem) == 2) \
__asm __volatile (LOCK_PREFIX "btsw %3, %1; setc %0" \
: "=q" (__result), "=m" (*mem) \
: "m" (*mem), "ir" (bit)); \
else if (sizeof (*mem) == 4) \
__asm __volatile (LOCK_PREFIX "btsl %3, %1; setc %0" \
: "=q" (__result), "=m" (*mem) \
: "m" (*mem), "ir" (bit)); \
else \
abort (); \
__result; })
#define atomic_delay() __asm__ ("rep; nop")
|
