Age | Commit message (Collapse) | Author |
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Follow GNU C Library from c579f48edba88380635ab98cb612030e3ed8691e
and remove the PID caching. These simplifies the architecture specific
assembly code.
The run of the test suite found no regressions, it even solves
some of the test failures for x86/x86_64/sparc.
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Vineet Gupta <Vineet.Gupta1@synopsys.com>
Acked-by: Matthew Fortune <Matthew.Fortune@imgtec.com>
Acked-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com>
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License notices in most of the source files refer to an outdated
FSF address. Replace it with URL, like in the rest of the source
files.Signed-off-by: Nikola Forró <nforro@redhat.com>
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Most changes are mechanical replacement of 'retw' instruction with
'abi_ret' macro, defined to 'retw' or 'ret' according to ABI.
Assembly code that makes calls is duplicated for call0 ABI with changed
register numbers for parameters/return value and call instruction.
'entry' instructions are replaced with 'abi_entry' macro.
More interesting changes:
- non-leaf assembly functions (e.g. _dl_tlsdesc_dynamic,
_dl_linux_resolve, SYSCALL_ERROR_HANDLER, PSEUDO) now need to preserve
registers around intermediate calls they make, use temporary stack
frame for that;
- setjmp/longjmp only need to save and restore return address, stack
pointer and callee-saved registers in the jmpbuf;
- __clone and syscall functions had hardcoded offsets to parameter
passed on stack, on call0 ABI they don't need stack frame, so the
offset is different. Replace these offsets with FRAMESIZE macro.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Changes from:
https://github.com/foss-xtensa/uClibc/commits/xtensa_nptl
Author: Chris Zankel <chris@zankel.net>
Author: Baruch Siach <baruch@tkos.co.il>
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This matches a similar change made to glibc.
No functional changes here.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The following patches add support for the Xtensa processor architecture
to uClibc. They are based on a recent SVN checkout (12/05/2007).
The first patch (attached to this post) adds Xtensa support to various
shared configuration and make files. The following patches then include
the Xtensa specific files and directories.
I welcome any feedback and would appreciate it if you could include the
patches into the mainline tree. I am certainly committed to maintain the port.
Bob Wilson was kind enough to review the patches.
Some notes about the architecture: Xtensa is a configurable and
extensible processor architecture developed by Tensilica. For more
information, please visit: www.linux-xtensa.org.
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