| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-01-28 | remove PID caching | Waldemar Brodkorb | |
| Follow GNU C Library from c579f48edba88380635ab98cb612030e3ed8691e and remove the PID caching. These simplifies the architecture specific assembly code. The run of the test suite found no regressions, it even solves some of the test failures for x86/x86_64/sparc. Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Vineet Gupta <Vineet.Gupta1@synopsys.com> Acked-by: Matthew Fortune <Matthew.Fortune@imgtec.com> Acked-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com> | |||
| 2013-03-14 | metag: Add NPTL support | Markos Chandras | |
| Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com> | |||
| 2013-03-14 | Add support for the Meta architecture | Markos Chandras | |
| Meta cores are 32-bit, hardware multithreaded, general purpose, embedded processors which also feature a DSP instruction set, and can be found in many digital radios. They are capable of running different operating systems on different hardware threads, for example a digital radio might run RTOSes for DAB decoding and audio decoding on 3 hardware threads, and run Linux on the 4th hardware thread to manage the user interface, networking etc. HTPs are also capable of running SMP Linux on multiple hardware threads. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com> | |||
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index : uclibc-ng.git | |
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