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Linuxthreads.new isn't really useful with the existence
of NPTL/TLS for well supported architectures. There is no
reason to use LT.new for ARM/MIPS or other architectures
supporting NPTL/TLS. It is not available for noMMU architectures
like Blackfin or FR-V. To simplify the live of the few uClibc-ng
developers, LT.new is removed and LT.old is renamed to LT.
LINUXTHREADS_OLD -> UCLIBC_HAS_LINUXTHREADS
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Currently, the Thumb support on ARM has three related Config.in
options, which are not trivial for users to understand, and are in
fact not needed:
- The USE_BX option is not needed: knowing whether BX is available or
not is easy. If you have an ARM > v4 or ARMv4T, then BX is
available, otherwise it's not. This is the logic used in glibc.
- The USE_LDREXSTREX option is not needed: whenever Thumb2 is
available, ldrex/strex are available, so we can simply rely on
__thumb2__ to determine whether ldrex/strex should be used, without
requiring a Config.in option.
- Once USE_BX and USE_LDREXSTREX are removed, the only thing left
that COMPILE_IN_THUMB does is to set -mthumb. This makes the option
unnecessary, as on ARM at least, the user is already supposed to
pass -march=<foo> or other compiler options tuning the library for
a specific ARM variant. There is no reason to do otherwise for
Thumb, which allows to get rid of the COMPILE_IN_THUMB option.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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As suggested on the uCLibc mailing list:
http://lists.uclibc.org/pipermail/uclibc/2014-November/048702.html
http://lists.uclibc.org/pipermail/uclibc/2014-November/048703.html
http://lists.uclibc.org/pipermail/uclibc/2014-November/048704.html
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Called getpid() When creating a new process with clone(), getpid() returns
the father_process's value. It should be child_process's value.
The reason is missing a RESET_PID in the arm clone impl.
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
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As Will noticed, the header this check is currently done in
is asm-only, and is not meant to be included from C code.
This breaks compilation when compiled for a Thumb2-aware CPU.
Move the BX check to its own header, and revert 7a246fd.
Reported-by: Will Newton <will.newton@gmail.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
Cc: Will Newton <will.newton@gmail.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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The conditional load needs to be made part of an IT block on Thumb2
cores.
Signed-off-by: Will Newton <will.newton@linaro.org>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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If the syscall returns with an error the stack pointer and r4 register
are not restored because the instruction 'ldmnefd sp!, {r4}' is executed
after branching to '__error' label.
This bug has been spotted out by running './utstest clone 5' from LTP
built with -fstack-protector-all compiler flag as log below:
root@cortex-a9:/usr/tests/ltp/testcases/bin# ./utstest clone 5
stack smashing detected: ./utstest terminated()
Regression introduced by commit e58798e107d652644629a1daaa95d76430808d53
Signed-off-by: Filippo Arcidiacono <filippo.arcidiacono@st.com>
Signed-off-by: Giuseppe Di Giore <giuseppe.di-giore@st.com>
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
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This matches a similar change made to glibc.
No functional changes here.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* SAVE_PID, RESTORE_PID in vfork.S
* clone.S tweaks to allow for the pid to be reset
Signed-off-by: Austin Foxley <austinf@cetoncorp.com>
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The attached patch adds support for compiling arm uClibc as pure Thumb code.
This is needed because some recent ARM codes do not implement traditional ARM
mode. Specifically:
* Cortex-M1 - An extremely minimal FPGA based core that only implements
Thumb-1 (aka ARMv6-M).
* Cortex-M3 - A Thumb-2 only ARMv7-M core.
Most of uClibc already builds in Thumb mode, all that is left are a handful of
assembly bits.
Tested on arm-uclinuxeabi.
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The patch fixes up the .align directives to '2' (i.e. a multiple
of 4) not '4' (a multiple of 16 - apparently an error since it seems
to be unnecessary, there is no advantage here in cache line alignment).
this is an arm "feature" ... the value given to .align is not in bytes:
.align 4 in arm means .align 2 ^ 4
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This patch changes all cases where the ARM assembler mov pc,rx
instructions are used to ensure that the thumb/arm interwork change of
process more works - in essence mov pc,rx needs to become bx rc.
The ldr pc or ldm rx, {pc} instructions are not changed - this is
fine on ARM >=v5 but will fail to restore thumb mode on ARM v4T,
i.e. this code will not provide support for thumb on ARM v4T.
One mov pc is left in resolve.S, this is fixed in a different patch -
thumb-resolve.patch
The changes are protected by __THUMB_INTERWORK__ - the original
mov instruction will work on newer architectures and is required on
arch v4 (not v4t) and earlier - those which did not support thumb -
so this is safe. See gcc lib1asmfuncs for a more exact test.
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missing headers, other jump relocs removed
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Hide __syscall_error from outside libc.
From Peter Mazinger.
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on both x86 and arm...
-Erik
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