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Add acquire/release variants for atomic functions cmpxchg/xchg and
provide a memory barrier after/before exchange. For cmpxchg use compiler
builtins. For xchg functions add memory barrier explicitly.
These barriers are required to keep memory consistency of ARCv3 CPU
cores in SMP.
For ARC700 barriers are not required and the compiler doesn't provide
_atomic_compare_exchange*, use current asm insertion without
acquire/release variants for ARC700.
Signed-off-by: Pavel Kozlov <pavel.kozlov@synopsys.com>
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For hardware configurations lacking LLOCK/SCOND (say ARC750),
use a syscall to atomically do the cmpxchg.
This is costly and painful, but really the only way out.
Note that kenrel only guarantees this to work in a UP configuraion
Reported-by: Avinash Patil <avinashp@quantenna.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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ARC EX instruction maps directly to this primitive, thus helps elide the
llock/scond based retry loop where possible.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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