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By capping max padding to not be bigger than three next insns,
we avoid having ridiculously big NOPs like this one:
53:66 66 66 66 2e 0f 1f nopw %cs:0x0(%rax,%rax,1)
5a:84 00 00 00 00 00
which was bigger than next three insns combined!
Size changes:
text data bss dec hex filename
102 0 0 102 66 x86_64/memcpy.o
102 0 0 102 66 x86_64.old/memcpy.o
90 0 0 90 5a x86_64/mempcpy.o
102 0 0 102 66 x86_64.old/mempcpy.o
210 0 0 210 d2 x86_64/memset.o
242 0 0 242 f2 x86_64.old/memset.o
213 0 0 213 d5 x86_64/stpcpy.o
220 0 0 220 dc x86_64.old/stpcpy.o
428 0 0 428 1ac x86_64/strcat.o
444 0 0 444 1bc x86_64.old/strcat.o
417 0 0 417 1a1 x86_64/strchr.o
418 0 0 418 1a2 x86_64.old/strchr.o
33 0 0 33 21 x86_64/strcmp.o
33 0 0 33 21 x86_64.old/strcmp.o
213 0 0 213 d5 x86_64/strcpy.o
220 0 0 220 dc x86_64.old/strcpy.o
135 0 0 135 87 x86_64/strcspn.o
151 0 0 151 97 x86_64.old/strcspn.o
225 0 0 225 e1 x86_64/strlen.o
233 0 0 233 e9 x86_64.old/strlen.o
140 0 0 140 8c x86_64/strpbrk.o
156 0 0 156 9c x86_64.old/strpbrk.o
135 0 0 135 87 x86_64/strspn.o
151 0 0 151 97 x86_64.old/strspn.o
Also, a few files got their .text alignment relaxed from 16 to 8 bytes,
which reduces padding at link time.
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e.g. testb $0xff, %cl -> testb %cl, %cl
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The attached patch adds support for compiling arm uClibc as pure Thumb code.
This is needed because some recent ARM codes do not implement traditional ARM
mode. Specifically:
* Cortex-M1 - An extremely minimal FPGA based core that only implements
Thumb-1 (aka ARMv6-M).
* Cortex-M3 - A Thumb-2 only ARMv7-M core.
Most of uClibc already builds in Thumb mode, all that is left are a handful of
assembly bits.
Tested on arm-uclinuxeabi.
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Also, remove the hidden __memset symbol from memset.S
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Found a problem with the AVR32 optimized bzero() code. Due to a
missing #include, it actually generated no code.
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This patch uses the HIDDEN_JUMPTARGET instead of the __GI_ prefix in AVR32
assembler files. This is done to follow the code style in uClibc.
Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
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The following patches add support for the Xtensa processor architecture
to uClibc. They are based on a recent SVN checkout (12/05/2007).
The first patch (attached to this post) adds Xtensa support to various
shared configuration and make files. The following patches then include
the Xtensa specific files and directories.
I welcome any feedback and would appreciate it if you could include the
patches into the mainline tree. I am certainly committed to maintain the port.
Bob Wilson was kind enough to review the patches.
Some notes about the architecture: Xtensa is a configurable and
extensible processor architecture developed by Tensilica. For more
information, please visit: www.linux-xtensa.org.
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on their own local copies while static linking dont hit link failures when other uClibc code force the libc.a objects to be pulled in via the hidden alias symbols
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<hcegtvedt@atmel.com>
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I got the library to compile with the attached patches, though dynamic
loader crashes early.
In buildroot I changed the architecture name by hand from sparc to
sparc64, otherwise the compiler produced 32-bit files with V9 (64-bit)
instructions. This configuration is not supported by QEMU, so I aimed
for pure 64-bit. I think Sparc64 option needs to be added to
buildroot.
The _Qp_ ops seem to be required by the ABI. This and setjmp patches
are just hacks to get the compilation further. The _Qp_ ops can be
found in glibc, would it be OK to use those?
V9 assembler requires declarations for global register use.
The mem* functions in sparc32 directory did not work. They are
actually used only by the hybrid 32-bit + V9 CPU configuration.
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AC_CHECK_LIB() to see if a function exists rather than checking the headers
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from i386 and x86_64.
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The attached patch works around some compilation failures on
ia64 caused by the use of the C preprocessor ## operator, and
allows the ia64 default configuration to build again -- or, at
least get as far as an x86 build does (the current source tree
has some problems compiling because of conflicting type
declarations for __kernel_dev_t).
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Import mips64 version of memset, memcpy from glibc.
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The rationale is that we already have the length of the string to
duplicate (from doing the malloc()), and memcpy() should then always be
faster than strcpy() (or at least as fast).
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is an if/jump
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building gdb and binutils statically
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there is a missing include for <bits/uClibc_uintmaxtostr.h> in
libc/string/_syserrmsg.h, where _syserrmsg.h uses __UIM_BUFLEN_INT
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bcopy/bzero/bcmp/index/rindex
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defined, gettimeofday has other prototype and tm_gmtoff/tm_zone do not exist
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_ISOC99/XOPEN_SOURCE
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most of global data relocations are back
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libc.a/libc.so, the diffs go into libc-static-y/libc-shared-y exclusively, add IMA to libc, don't use any MSRC anymore
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add support for using BX instruction for THUMB aware architectures
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is a useless attempt
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