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-rw-r--r--libm/powerpc/e500/fpu/fenv_libc.h4
-rw-r--r--libm/powerpc/e500/spe-raise.c10
2 files changed, 7 insertions, 7 deletions
diff --git a/libm/powerpc/e500/fpu/fenv_libc.h b/libm/powerpc/e500/fpu/fenv_libc.h
index cd003eab7..22c3f1452 100644
--- a/libm/powerpc/e500/fpu/fenv_libc.h
+++ b/libm/powerpc/e500/fpu/fenv_libc.h
@@ -28,11 +28,11 @@ extern int __feraiseexcept_internal (int __excepts);
/* Equivalent to fegetenv, but returns a fenv_t instead of taking a
pointer. */
#define fegetenv_register() \
- ({ unsigned fscr; asm volatile ("mfspefscr %0" : "=r" (fscr)); fscr; })
+ ({ unsigned fscr; __asm__ __volatile__ ("mfspefscr %0" : "=r" (fscr)); fscr; })
/* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */
#define fesetenv_register(fscr) \
- ({ asm volatile ("mtspefscr %0" : : "r" (fscr)); })
+ ({ __asm__ __volatile__ ("mtspefscr %0" : : "r" (fscr)); })
typedef union
{
diff --git a/libm/powerpc/e500/spe-raise.c b/libm/powerpc/e500/spe-raise.c
index fb53dcec7..b83087fd0 100644
--- a/libm/powerpc/e500/spe-raise.c
+++ b/libm/powerpc/e500/spe-raise.c
@@ -33,33 +33,33 @@ __FERAISEEXCEPT_INTERNAL (int excepts)
{
/* ?? Does not set sticky bit ?? */
/* 0 / 0 */
- asm volatile ("efsdiv %0,%0,%1" : : "r" (0), "r" (0));
+ __asm__ __volatile__ ("efsdiv %0,%0,%1" : : "r" (0), "r" (0));
}
if ((FE_DIVBYZERO & excepts) != 0)
{
/* 1.0 / 0.0 */
- asm volatile ("efsdiv %0,%0,%1" : : "r" (1.0F), "r" (0));
+ __asm__ __volatile__ ("efsdiv %0,%0,%1" : : "r" (1.0F), "r" (0));
}
if ((FE_OVERFLOW & excepts) != 0)
{
/* ?? Does not set sticky bit ?? */
/* Largest normalized number plus itself. */
- asm volatile ("efsadd %0,%0,%1" : : "r" (0x7f7fffff), "r" (0x7f7fffff));
+ __asm__ __volatile__ ("efsadd %0,%0,%1" : : "r" (0x7f7fffff), "r" (0x7f7fffff));
}
if ((FE_UNDERFLOW & excepts) != 0)
{
/* ?? Does not set sticky bit ?? */
/* Smallest normalized number times itself. */
- asm volatile ("efsmul %0,%0,%1" : : "r" (0x800000), "r" (0x800000));
+ __asm__ __volatile__ ("efsmul %0,%0,%1" : : "r" (0x800000), "r" (0x800000));
}
if ((FE_INEXACT & excepts) != 0)
{
/* Smallest normalized minus 1.0 raises the inexact flag. */
- asm volatile ("efssub %0,%0,%1" : : "r" (0x00800000), "r" (1.0F));
+ __asm__ __volatile__ ("efssub %0,%0,%1" : : "r" (0x00800000), "r" (1.0F));
}
/* Success. */