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-rw-r--r--libc/sysdeps/linux/mips/bits/fenv.h82
-rw-r--r--libc/sysdeps/linux/mips/fpu_control.h68
2 files changed, 108 insertions, 42 deletions
diff --git a/libc/sysdeps/linux/mips/bits/fenv.h b/libc/sysdeps/linux/mips/bits/fenv.h
index 944101f75..25ae4d9ca 100644
--- a/libc/sysdeps/linux/mips/bits/fenv.h
+++ b/libc/sysdeps/linux/mips/bits/fenv.h
@@ -1,5 +1,4 @@
-/* Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
+/* Copyright (C) 1998-2025 Free Software Foundation, Inc.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
@@ -12,31 +11,38 @@
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
+ License along with the GNU C Library. If not, see
+ <https://www.gnu.org/licenses/>. */
#ifndef _FENV_H
# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
#endif
+#ifdef __mips_hard_float
+
/* Define bits representing the exception. We use the bit positions
of the appropriate bits in the FPU control word. */
enum
{
- FE_INEXACT = 0x04,
-#define FE_INEXACT FE_INEXACT
- FE_UNDERFLOW = 0x08,
-#define FE_UNDERFLOW FE_UNDERFLOW
- FE_OVERFLOW = 0x10,
-#define FE_OVERFLOW FE_OVERFLOW
- FE_DIVBYZERO = 0x20,
-#define FE_DIVBYZERO FE_DIVBYZERO
- FE_INVALID = 0x40,
-#define FE_INVALID FE_INVALID
+ FE_INEXACT =
+# define FE_INEXACT 0x04
+ FE_INEXACT,
+ FE_UNDERFLOW =
+# define FE_UNDERFLOW 0x08
+ FE_UNDERFLOW,
+ FE_OVERFLOW =
+# define FE_OVERFLOW 0x10
+ FE_OVERFLOW,
+ FE_DIVBYZERO =
+# define FE_DIVBYZERO 0x20
+ FE_DIVBYZERO,
+ FE_INVALID =
+# define FE_INVALID 0x40
+ FE_INVALID,
};
-#define FE_ALL_EXCEPT \
+# define FE_ALL_EXCEPT \
(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
/* The MIPS FPU supports all of the four defined rounding modes. We
@@ -44,16 +50,38 @@ enum
for the appropriate macros. */
enum
{
- FE_TONEAREST = 0x0,
-#define FE_TONEAREST FE_TONEAREST
- FE_TOWARDZERO = 0x1,
-#define FE_TOWARDZERO FE_TOWARDZERO
- FE_UPWARD = 0x2,
-#define FE_UPWARD FE_UPWARD
- FE_DOWNWARD = 0x3
-#define FE_DOWNWARD FE_DOWNWARD
+ FE_TONEAREST =
+# define FE_TONEAREST 0x0
+ FE_TONEAREST,
+ FE_TOWARDZERO =
+# define FE_TOWARDZERO 0x1
+ FE_TOWARDZERO,
+ FE_UPWARD =
+# define FE_UPWARD 0x2
+ FE_UPWARD,
+ FE_DOWNWARD =
+# define FE_DOWNWARD 0x3
+ FE_DOWNWARD
};
+#else
+
+/* In the soft-float case, only rounding to nearest is supported, with
+ no exceptions. */
+
+enum
+ {
+ __FE_UNDEFINED = -1,
+
+ FE_TONEAREST =
+# define FE_TONEAREST 0x0
+ FE_TONEAREST
+ };
+
+# define FE_ALL_EXCEPT 0
+
+#endif
+
/* Type representing exception flags. */
typedef unsigned short int fexcept_t;
@@ -70,7 +98,13 @@ fenv_t;
/* If the default argument is used we use this value. */
#define FE_DFL_ENV ((const fenv_t *) -1)
-#ifdef __USE_GNU
+#if defined __USE_GNU && defined __mips_hard_float
/* Floating-point environment where none of the exception is masked. */
# define FE_NOMASK_ENV ((const fenv_t *) -2)
#endif
+
+/* Type representing floating-point control modes. */
+typedef unsigned int femode_t;
+
+/* Default floating-point control modes. */
+# define FE_DFL_MODE ((const femode_t *) -1L)
diff --git a/libc/sysdeps/linux/mips/fpu_control.h b/libc/sysdeps/linux/mips/fpu_control.h
index f855af506..6aa05e4cf 100644
--- a/libc/sysdeps/linux/mips/fpu_control.h
+++ b/libc/sysdeps/linux/mips/fpu_control.h
@@ -1,7 +1,5 @@
/* FPU control word bits. Mips version.
- Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
- Contributed by Olaf Flebbe and Ralf Baechle.
+ Copyright (C) 1996-2025 Free Software Foundation, Inc.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
@@ -14,8 +12,8 @@
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
+ License along with the GNU C Library. If not, see
+ <https://www.gnu.org/licenses/>. */
#ifndef _FPU_CONTROL_H
#define _FPU_CONTROL_H
@@ -28,7 +26,10 @@
* causing unimplemented operation exception. This bit is only
* available for MIPS III and newer.
* 23 -> Condition bit
- * 22-18 -> reserved (read as 0, write with 0)
+ * 22-21 -> reserved for architecture implementers
+ * 20 -> reserved (read as 0, write with 0)
+ * 19 -> IEEE 754-2008 non-arithmetic ABS.fmt and NEG.fmt enable
+ * 18 -> IEEE 754-2008 recommended NaN encoding enable
* 17 -> cause bit for unimplemented operation
* 16 -> cause bit for invalid exception
* 15 -> cause bit for division by zero exception
@@ -57,43 +58,74 @@
#include <features.h>
-/* masking of interrupts */
+#ifdef __mips_soft_float
+
+#define _FPU_RESERVED 0xffffffff
+#define _FPU_DEFAULT 0x00000000
+typedef unsigned int fpu_control_t;
+#define _FPU_GETCW(cw) (cw) = 0
+#define _FPU_SETCW(cw) (void) (cw)
+extern fpu_control_t __fpu_control;
+
+#else /* __mips_soft_float */
+
+/* Masks for interrupts. */
#define _FPU_MASK_V 0x0800 /* Invalid operation */
#define _FPU_MASK_Z 0x0400 /* Division by zero */
#define _FPU_MASK_O 0x0200 /* Overflow */
#define _FPU_MASK_U 0x0100 /* Underflow */
#define _FPU_MASK_I 0x0080 /* Inexact operation */
-/* flush denormalized numbers to zero */
+/* Flush denormalized numbers to zero. */
#define _FPU_FLUSH_TZ 0x1000000
-/* rounding control */
+/* IEEE 754-2008 compliance control. */
+#define _FPU_ABS2008 0x80000
+#define _FPU_NAN2008 0x40000
+
+/* Rounding control. */
#define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */
#define _FPU_RC_ZERO 0x1
#define _FPU_RC_UP 0x2
#define _FPU_RC_DOWN 0x3
+/* Mask for rounding control. */
+#define _FPU_RC_MASK 0x3
-#define _FPU_RESERVED 0xfe3c0000 /* Reserved bits in cw */
+#define _FPU_RESERVED 0xfe8c0000 /* Reserved bits in cw, incl ABS/NAN2008. */
/* The fdlibm code requires strict IEEE double precision arithmetic,
and no interrupts for exceptions, rounding to nearest. */
+#ifdef __mips_nan2008
+# define _FPU_DEFAULT 0x000C0000
+#else
+# define _FPU_DEFAULT 0x00000000
+#endif
-#define _FPU_DEFAULT 0x00000000
-
-/* IEEE: same as above, but exceptions */
-#define _FPU_IEEE 0x00000F80
+/* IEEE: same as above, but exceptions. */
+#ifdef __mips_nan2008
+# define _FPU_IEEE 0x000C0F80
+#else
+# define _FPU_IEEE 0x00000F80
+#endif
/* Type of the control word. */
typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
/* Macros for accessing the hardware control word. */
-#define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
-#define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
+extern fpu_control_t __mips_fpu_getcw (void) __THROW;
+extern void __mips_fpu_setcw (fpu_control_t) __THROW;
+#ifdef __mips16
+# define _FPU_GETCW(cw) do { (cw) = __mips_fpu_getcw (); } while (0)
+# define _FPU_SETCW(cw) __mips_fpu_setcw (cw)
+#else
+# define _FPU_GETCW(cw) __asm__ volatile ("cfc1 %0,$31" : "=r" (cw))
+# define _FPU_SETCW(cw) __asm__ volatile ("ctc1 %0,$31" : : "r" (cw))
+#endif
-#if 0
/* Default control word set at startup. */
extern fpu_control_t __fpu_control;
-#endif
+
+#endif /* __mips_soft_float */
#endif /* fpu_control.h */
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-02 13:23:22 +0000