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-rw-r--r--libc/sysdeps/linux/mips/sys/asm.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/libc/sysdeps/linux/mips/sys/asm.h b/libc/sysdeps/linux/mips/sys/asm.h
index 79d143975..d424ed3b1 100644
--- a/libc/sysdeps/linux/mips/sys/asm.h
+++ b/libc/sysdeps/linux/mips/sys/asm.h
@@ -472,4 +472,20 @@ symbol = value
# define MTC0 dmtc0
#endif
+/* The MIPS archtectures do not have a uniform memory model. Particular
+ platforms may provide additional guarantees - for instance, the R4000
+ LL and SC instructions implicitly perform a SYNC, and the 4K promises
+ strong ordering.
+
+ However, in the absence of those guarantees, we must assume weak ordering
+ and SYNC explicitly where necessary.
+
+ Some obsolete MIPS processors may not support the SYNC instruction. This
+ applies to "true" MIPS I processors; most of the processors which compile
+ using MIPS I implement parts of MIPS II. */
+
+#ifndef MIPS_SYNC
+# define MIPS_SYNC sync
+#endif
+
#endif /* sys/asm.h */