diff options
author | Eric Andersen <andersen@codepoet.org> | 2001-09-27 05:25:55 +0000 |
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committer | Eric Andersen <andersen@codepoet.org> | 2001-09-27 05:25:55 +0000 |
commit | fec403c593168e63ad7e6414f6e8df8ab11a7d8f (patch) | |
tree | 3868f9ddf22cdddb92728f05ea5008f702fca2f8 /libc/sysdeps/linux/arm/bits/fenv.h | |
parent | 2512c847453c24b928c34beed88902fbb6877b7a (diff) |
Finish syncing up arm
Diffstat (limited to 'libc/sysdeps/linux/arm/bits/fenv.h')
-rw-r--r-- | libc/sysdeps/linux/arm/bits/fenv.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/libc/sysdeps/linux/arm/bits/fenv.h b/libc/sysdeps/linux/arm/bits/fenv.h new file mode 100644 index 000000000..7bd242385 --- /dev/null +++ b/libc/sysdeps/linux/arm/bits/fenv.h @@ -0,0 +1,58 @@ +/* Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, write to the Free + Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + 02111-1307 USA. */ + +#ifndef _FENV_H +# error "Never use <bits/fenv.h> directly; include <fenv.h> instead." +#endif + +/* Define bits representing exceptions in the FPU status word. */ +enum + { + FE_INVALID = 1, +#define FE_INVALID FE_INVALID + FE_DIVBYZERO = 2, +#define FE_DIVBYZERO FE_DIVBYZERO + FE_OVERFLOW = 4, +#define FE_OVERFLOW FE_OVERFLOW + FE_UNDERFLOW = 8, +#define FE_UNDERFLOW FE_UNDERFLOW + }; + +/* Amount to shift by to convert an exception to a mask bit. */ +#define FE_EXCEPT_SHIFT 16 + +/* All supported exceptions. */ +#define FE_ALL_EXCEPT \ + (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW) + +/* The ARM FPU basically only supports round-to-nearest. Other rounding + modes exist, but you have to encode them in the actual instruction. */ +#define FE_TONEAREST 0 + +/* Type representing exception flags. */ +typedef unsigned long int fexcept_t; + +/* Type representing floating-point environment. */ +typedef struct + { + unsigned long int __cw; + } +fenv_t; + +/* If the default argument is used we use this value. */ +#define FE_DFL_ENV ((fenv_t *) -1l) |