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authorSergey Matyukevich <sergey.matyukevich@synopsys.com>2022-09-20 16:14:21 +0400
committerWaldemar Brodkorb <wbx@openadk.org>2022-09-27 12:01:23 +0200
commitde6be7bc60f190a0d746945a3a5a143bc93a1a65 (patch)
treec0782171a037b778f09a8dd19b8cd170c88ce702 /libc/sysdeps/linux/arc/bits
parenta7c587f5cd390f92970c2c4b5a538ac27ea3f119 (diff)
arc: add support for ARCv3 32-bit processors
New ARCv3 ISA includes both 64-bit and 32-bit CPU family. This patch adds support for 32-bit ARCv3 HS5x processors. Signed-off-by: Sergey Matyukevich <sergey.matyukevich@synopsys.com> Signed-off-by: Pavel Kozlov <pavel.kozlov@synopsys.com>
Diffstat (limited to 'libc/sysdeps/linux/arc/bits')
-rw-r--r--libc/sysdeps/linux/arc/bits/syscalls.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/libc/sysdeps/linux/arc/bits/syscalls.h b/libc/sysdeps/linux/arc/bits/syscalls.h
index c858d788b..000b6b631 100644
--- a/libc/sysdeps/linux/arc/bits/syscalls.h
+++ b/libc/sysdeps/linux/arc/bits/syscalls.h
@@ -100,7 +100,7 @@ extern long __syscall_error (int);
#ifdef __A7__
#define ARC_TRAP_INSN "trap0 \n\t"
-#elif defined(__HS__)
+#else
#define ARC_TRAP_INSN "trap_s 0 \n\t"
#endif
@@ -182,7 +182,7 @@ extern long __syscall_error (int);
#ifdef __A7__
#define ARC_TRAP_INSN trap0
-#elif defined(__HS__)
+#else
#define ARC_TRAP_INSN trap_s 0
#endif