Merge remote-tracking branch 'origin/master' into prelink

* origin/master: (137 commits)
  utils/ldd: Check for returned pointer from strrchr not the value it holds
  cris: add provide arch-specific vfork implementation
  lutimes.c, stubs.c: fix compiling lutimes, if __NR_utimensat is not defined
  bump version to 0.9.32-rc3-git
  release 0.9.32-rc3
  memalign: include sys/param.h for MAX
  arm/bits/atomic.h: Include common/bit/atomic.h for thumb1
  wctype.h: fix libc_hidden_proto for iswupper and add it for iswspace
  add libc_hidden_proto for wcs[n]casecmp_l
  really fix missing __libc_drand48_data
  Revert "missing prototype of __libc_drand48_data fixed"
  missing prototype of __libc_drand48_data fixed
  time.c, time.h: remove unused hidden strftime/strptime
  nanosleep.c: remove duplicated libc_hidden_proto
  ctype.c, ctype.h: remove commented parts that were banned for removal after 0.9.31
  _wctype.c, wctype.h: remove unused isw* and wctype_l hidden functions
  time.c, wchar.h: remove unused hidden wcsftime
  str[n]casecmp.c: fix hidden usage
  remove unused hidden functions
  frv/memset.S: add missing libc_hidden_def
  ...

Conflicts:
	ldso/ldso/ldso.c

Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>

1 files changed, 122 insertions, 0 deletions

diff --git a/ldso/ldso/c6x/dl-startup.h b/ldso/ldso/c6x/dl-startup.h
new file mode 100644
index 000000000..b9ea30409
--- /dev/null
+++ b/ldso/ldso/c6x/dl-startup.h
@@ -0,0 +1,122 @@
+/* Copyright (C) 2010 Texas Instruments Incorporated
+ * Contributed by Mark Salter <msalter@redhat.com>
+ *
+ * Borrowed heavily from frv arch:
+ * Copyright (C) 2003 Red Hat, Inc.
+ * 
+ * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
+ */
+
+#undef DL_START
+#define DL_START(X)   \
+int  \
+_dl_start (unsigned placeholder, \
+	   struct elf32_dsbt_loadmap *dl_boot_progmap, \
+	   struct elf32_dsbt_loadmap *dl_boot_ldsomap, \
+	   Elf32_Dyn *dl_boot_ldso_dyn_pointer,	       \
+	   X)
+
+/*
+ * On entry, the kernel has set up the stack thusly:
+ *
+ *	0(sp)			pad0
+ *	4(sp)			pad1
+ *	8(sp)			argc
+ *	12(sp)			argv[0]
+ *	...
+ *	(4*(argc+3))(sp)	NULL
+ *	(4*(argc+4))(sp)	envp[0]
+ *	...
+ *				NULL
+ *
+ * Register values are unspecified, except:
+ *
+ *	B4  --> executable loadmap address
+ *	A6  --> interpreter loadmap address
+ *	B6  --> dynamic section address
+ *	B14 --> our DP setup by kernel
+ *
+ * NB: DSBT index is always 0 for the executable
+ *     and 1 for the interpreter
+ */
+
+__asm__("	.text\n"
+	".globl _start\n"
+	"_start:\n"
+	"          B .S2		_dl_start\n"
+	"          STW .D2T2		B14, *+B14[1]\n"
+	"          ADD .D1X		B15,8,A8\n"
+	"          ADDKPC .S2		ret_from_dl,B3,2\n"
+	"ret_from_dl:\n"
+	"	   B .S2X		A4\n"
+	" ||       LDW .D2T2		*+B14[0],B14\n"
+	" 	   ADDKPC .S2		__dl_fini,B0,0\n"
+	"          MV .S1X		B0,A4\n"
+	"	   NOP\n"
+	"	   NOP\n"
+	"	   NOP\n"
+	"__dl_fini:\n"
+	"          LDW .D2T2		*+B14[1],B14\n"
+	"	   NOP		4\n"
+	" 	   LDW .D2T1		*+B14($GOT(_dl_fini)), A0\n"
+	"          NOP		4\n"
+	"	   BNOP .S2X		A0, 5\n");
+
+__asm__("	.text\n"
+	"__c6x_cache_sync:\n"
+	"	   MVK .S2		330,B0\n"
+	"	   SWE\n"
+	"	   NOP\n"
+	"	   BNOP .S2		B3,5\n"
+	"	   NOP\n"
+	"	   NOP\n"
+	"	   NOP\n"
+	"	   NOP\n"
+	"\n"
+);
+
+/*
+ * Get a pointer to the argv array.  On many platforms this can be just
+ * the address of the first argument, on other platforms we need to
+ * do something a little more subtle here.
+ */
+#define GET_ARGV(ARGVP, ARGS) ARGVP = (((unsigned long*) ARGS) + 1)
+
+struct elf32_dsbt_loadmap;
+
+/*
+ * Here is a macro to perform a relocation.  This is only used when
+ * bootstrapping the dynamic loader.  RELP is the relocation that we
+ * are performing, REL is the pointer to the address we are relocating.
+ * SYMBOL is the symbol involved in the relocation, and LOAD is the
+ * load address.
+ */
+#define PERFORM_BOOTSTRAP_RELOC(RELP,REL,SYMBOL,LOAD,SYMTAB) \
+	switch(ELF32_R_TYPE((RELP)->r_info)){				\
+	case R_C6000_ABS_L16:						\
+	    {								\
+		    unsigned int opcode = *(REL);			\
+		    unsigned int v = (SYMBOL) + (RELP)->r_addend;	\
+		    opcode &= ~0x7fff80;				\
+		    opcode |= ((v & 0xffff) << 7);			\
+		    *(REL) = opcode;					\
+	    }								\
+	    break;							\
+	case R_C6000_ABS_H16:						\
+	    {								\
+		    unsigned int opcode = *(REL);			\
+		    unsigned int v = (SYMBOL) + (RELP)->r_addend;	\
+		    opcode &= ~0x7fff80;				\
+		    opcode |= ((v >> 9) & 0x7fff80);			\
+		    *(REL) = opcode;					\
+	    }								\
+	    break;							\
+	case R_C6000_ABS32:						\
+	    *(REL) = (SYMBOL) + (RELP)->r_addend;			\
+	    break;							\
+	default:							\
+	  _dl_exit(1);							\
+	}
+
+extern void __c6x_cache_sync(unsigned long start, unsigned long end)
+  attribute_hidden;