Another SuperH patch from Stefan Allius. This make it so

the SuperH lib loader can be compiled by GCC 3.3

3 files changed, 93 insertions, 94 deletions

diff --git a/ldso/ldso/sh/dl-sysdep.h b/ldso/ldso/sh/dl-sysdep.h
index 4e7f8b590..70241e2d7 100644
--- a/ldso/ldso/sh/dl-sysdep.h
+++ b/ldso/ldso/sh/dl-sysdep.h
@@ -83,11 +83,9 @@ extern unsigned long _dl_linux_resolver(struct elf_resolve * tpnt, int reloc_ent
 static __inline__ unsigned int
 _dl_urem(unsigned int n, unsigned int base)
 {
-register unsigned int __r0 __asm__ ("r0");
-register unsigned int __r4 __asm__ ("r4") = n;
-register unsigned int __r5 __asm__ ("r5") = base;
-
-	__asm__ ("" \
+  int res;
+  
+	__asm__ (""\
 		"mov	#0, r0\n\t" \
 		"div0u\n\t" \
 		"" \
@@ -95,49 +93,47 @@ register unsigned int __r5 __asm__ ("r5") = base;
 		"! bit and divide it by whats in %2.  Put the answer bit\n\t" \
 		"! into the T bit so it can come out again at the bottom\n\t" \
 		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
 		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
 		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
  		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4\n\t"			\
-		"mov  r4, r0\n\t"
-
-		: "=r" (__r0)
-		: "r" (__r4), "r" (__r5)
-		: "r4", "cc");
-
-	return n - (base * __r0);
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1\n\t"
+		: "=r" (res)
+		: "0" (n), "r" (base)
+		: "r0","cc");
+
+	return n - (base * res);
 }
 
 #define do_rem(result, n, base)     ((result) = _dl_urem((n), (base)))
diff --git a/ldso/ldso/sh/ld_sysdep.h b/ldso/ldso/sh/ld_sysdep.h
index 4e7f8b590..70241e2d7 100644
--- a/ldso/ldso/sh/ld_sysdep.h
+++ b/ldso/ldso/sh/ld_sysdep.h
@@ -83,11 +83,9 @@ extern unsigned long _dl_linux_resolver(struct elf_resolve * tpnt, int reloc_ent
 static __inline__ unsigned int
 _dl_urem(unsigned int n, unsigned int base)
 {
-register unsigned int __r0 __asm__ ("r0");
-register unsigned int __r4 __asm__ ("r4") = n;
-register unsigned int __r5 __asm__ ("r5") = base;
-
-	__asm__ ("" \
+  int res;
+  
+	__asm__ (""\
 		"mov	#0, r0\n\t" \
 		"div0u\n\t" \
 		"" \
@@ -95,49 +93,47 @@ register unsigned int __r5 __asm__ ("r5") = base;
 		"! bit and divide it by whats in %2.  Put the answer bit\n\t" \
 		"! into the T bit so it can come out again at the bottom\n\t" \
 		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
 		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
 		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
  		""				\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4 ; div1 r5, r0\n\t"	\
-		"rotcl	r4\n\t"			\
-		"mov  r4, r0\n\t"
-
-		: "=r" (__r0)
-		: "r" (__r4), "r" (__r5)
-		: "r4", "cc");
-
-	return n - (base * __r0);
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1 ; div1 %2, r0\n\t"	\
+		"rotcl	%1\n\t"
+		: "=r" (res)
+		: "0" (n), "r" (base)
+		: "r0","cc");
+
+	return n - (base * res);
 }
 
 #define do_rem(result, n, base)     ((result) = _dl_urem((n), (base)))
diff --git a/ldso/ldso/sh/resolve.S b/ldso/ldso/sh/resolve.S
index f3eac9b32..1d3bc5cdc 100644
--- a/ldso/ldso/sh/resolve.S
+++ b/ldso/ldso/sh/resolve.S
@@ -49,10 +49,14 @@ _dl_linux_resolve:
 	mov     r2, r0          ! link map address in r2 (SH PIC ABI)
 1:
 	mov     r0, r4          ! link map address in r0 (GNUs PLT)
+	mova    .LG, r0
+	mov.l   .LG, r5
+	add     r5, r0
 	mov.l   3f, r5
-	bsrf    r5
-	mov	r1, r5		! Reloc offset
-.jmp_loc:
+	mov.l   @(r0, r5),r5
+	jsr     @r5
+	 mov	r1, r5		! Reloc offset
+
 	lds.l	@r15+, pr	! Get register content back
 
 #ifdef HAVE_FPU
@@ -78,7 +82,10 @@ _dl_linux_resolve:
 	 mov.l	@r15+, r3
 
 	.balign	4
+
 3:
-	.long   _dl_linux_resolver@PLT-(.jmp_loc-(.))
+	.long   _dl_linux_resolver@GOT
+.LG:
+	.long	_GLOBAL_OFFSET_TABLE_
 	.size	_dl_linux_resolve, . - _dl_linux_resolve