arm: simplify handling of Thumb related options

Currently, the Thumb support on ARM has three related Config.in
options, which are not trivial for users to understand, and are in
fact not needed:

 - The USE_BX option is not needed: knowing whether BX is available or
   not is easy. If you have an ARM > v4 or ARMv4T, then BX is
   available, otherwise it's not. This is the logic used in glibc.

 - The USE_LDREXSTREX option is not needed: whenever Thumb2 is
   available, ldrex/strex are available, so we can simply rely on
   __thumb2__ to determine whether ldrex/strex should be used, without
   requiring a Config.in option.

 - Once USE_BX and USE_LDREXSTREX are removed, the only thing left
   that COMPILE_IN_THUMB does is to set -mthumb. This makes the option
   unnecessary, as on ARM at least, the user is already supposed to
   pass -march=<foo> or other compiler options tuning the library for
   a specific ARM variant. There is no reason to do otherwise for
   Thumb, which allows to get rid of the COMPILE_IN_THUMB option.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

5 files changed, 8 insertions, 34 deletions

diff --git a/Rules.mak b/Rules.mak
index fc53ad13a..dc1a02e51 100644
--- a/Rules.mak
+++ b/Rules.mak
@@ -392,7 +392,6 @@ endif
 ifeq ($(TARGET_ARCH),arm)
 	CPU_CFLAGS-$(ARCH_LITTLE_ENDIAN)+=-mlittle-endian
 	CPU_CFLAGS-$(ARCH_BIG_ENDIAN)+=-mbig-endian
-	CPU_CFLAGS-$(COMPILE_IN_THUMB_MODE)+=-mthumb
 endif
 
 ifeq ($(TARGET_ARCH),metag)
diff --git a/extra/Configs/Config.arm b/extra/Configs/Config.arm
index 00cf98281..0d02e3f10 100644
--- a/extra/Configs/Config.arm
+++ b/extra/Configs/Config.arm
@@ -24,25 +24,3 @@ config CONFIG_ARM_EABI
 
 	  If you say 'n' here, then the library will be built for the
 	  old Linux ABI.
-
-config COMPILE_IN_THUMB_MODE
-	bool "Build using Thumb mode"
-	select USE_BX
-	select USE_LDREXSTREX
-	help
-	  Say 'y' here to force building uClibc in thumb mode.
-	  Say 'n' to use your compiler's default mode.
-
-config USE_BX
-	bool "Use BX in function return"
-	help
-	  Say 'y' to use BX to return from functions on your thumb-aware
-	  processor. Say 'y' if you need to use interworking. Say 'n' if not.
-	  It is safe to say 'y' even if you're not doing interworking.
-
-config USE_LDREXSTREX
-	bool "Use load-store exclusive ASM ops (not supported in SmartFusion)"
-	depends on COMPILE_IN_THUMB_MODE
-	default n
-	help
-	  Say 'y' to use LDREX/STREX ASM ops.
diff --git a/libc/sysdeps/linux/arm/bits/arm_bx.h b/libc/sysdeps/linux/arm/bits/arm_bx.h
index 2c290896d..1c775b681 100644
--- a/libc/sysdeps/linux/arm/bits/arm_bx.h
+++ b/libc/sysdeps/linux/arm/bits/arm_bx.h
@@ -23,13 +23,11 @@
 #error Please include features.h first
 #endif /* features.h not yet included */
 
-#if defined(__USE_BX__)
-# if (__ARM_ARCH <= 4 && !defined __ARM_ARCH_4T__)
-#  error Use of BX was requested, but is not available on the target processor.
-# endif /* ARCH level */
-#endif /* __USE_BX__ */
+#if __ARM_ARCH > 4 || defined (__ARM_ARCH_4T__)
+# define ARCH_HAS_BX
+#endif
 
-#if defined(__USE_BX__) && (__ARM_ARCH > 4 || (__ARM_ARCH == 4 && defined __ARM_ARCH_4T__))
+#if defined(ARCH_HAS_BX)
 # define BX(reg)	bx reg
 # define BXC(cond, reg)	bx##cond reg
 #else
diff --git a/libc/sysdeps/linux/arm/clone.S b/libc/sysdeps/linux/arm/clone.S
index b4c7d8a02..fd7590dd0 100644
--- a/libc/sysdeps/linux/arm/clone.S
+++ b/libc/sysdeps/linux/arm/clone.S
@@ -69,7 +69,7 @@ __clone:
 
 	@ pick the function arg and call address off the stack and execute
 	ldr	r0, [sp, #4]
-#if defined(__USE_BX__)
+#if defined(ARCH_HAS_BX)
 	ldr	r1, [sp]
 	bl	2f	@ blx r1
 #else
diff --git a/libpthread/linuxthreads.old/sysdeps/arm/pt-machine.h b/libpthread/linuxthreads.old/sysdeps/arm/pt-machine.h
index 2b877f980..fc17e9bc7 100644
--- a/libpthread/linuxthreads.old/sysdeps/arm/pt-machine.h
+++ b/libpthread/linuxthreads.old/sysdeps/arm/pt-machine.h
@@ -28,8 +28,7 @@
 # define PT_EI __extern_always_inline
 #endif
 
-#if defined(__thumb__)
-#if defined(__USE_LDREXSTREX__)
+#if defined(__thumb2__)
 PT_EI long int ldrex(int *spinlock)
 {
 	long int ret;
@@ -63,7 +62,7 @@ testandset (int *spinlock)
   return ret;
 }
 
-#else /* __USE_LDREXSTREX__ */
+#elif defined(__thumb__)
 
 /* This will not work on ARM1 or ARM2 because SWP is lacking on those
    machines.  Unfortunately we have no way to detect this at compile
@@ -88,7 +87,7 @@ PT_EI long int testandset (int *spinlock)
 	: "0"(1), "r"(spinlock));
   return ret;
 }
-#endif
+
 #else /* __thumb__ */
 
 PT_EI long int testandset (int *spinlock);