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-rw-r--r--toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0004-elf2flt.c-add-new-relocation-types-for-xtensa.patch188
-rw-r--r--toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0005-elf2flt-add-riscv-64-bits-support.patch137
-rw-r--r--toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch125
3 files changed, 450 insertions, 0 deletions
diff --git a/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0004-elf2flt.c-add-new-relocation-types-for-xtensa.patch b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0004-elf2flt.c-add-new-relocation-types-for-xtensa.patch
new file mode 100644
index 000000000..953bd79cc
--- /dev/null
+++ b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0004-elf2flt.c-add-new-relocation-types-for-xtensa.patch
@@ -0,0 +1,188 @@
+From d7eb73163bcea31168c438fc132a0967ac172e3d Mon Sep 17 00:00:00 2001
+From: Max Filippov <jcmvbkbc@gmail.com>
+Date: Thu, 7 May 2020 21:11:43 -0700
+Subject: [PATCH] elf2flt.c: add new relocation types for xtensa
+
+Xtensa have added new relocation types R_XTENSA_[NP]DIFF{8,16,32} with
+the same properties as the existing types R_XTENSA_DIFF{8,16,32}.
+Add them to the list of ignored relocation types.
+
+This fixes the following error when invoking elf2flt on xtensa binaries
+built with the recent binutils:
+
+ ERROR: reloc type R_XTENSA_PDIFF32 unsupported in this context
+
+Reported-by: Romain Naour <romain.naour@gmail.com>
+Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
+Backported from: d7eb73163bcea31168c438fc132a0967ac172e3d
+---
+ Makefile.in | 3 ++-
+ configure | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++++
+ configure.ac | 14 ++++++++++++
+ elf2flt.c | 8 +++++++
+ 4 files changed, 88 insertions(+), 1 deletion(-)
+
+diff --git a/Makefile.in b/Makefile.in
+index 52b3347d7f43..0529c7f0a25a 100644
+--- a/Makefile.in
++++ b/Makefile.in
+@@ -30,7 +30,8 @@ DEFS = @DEFS@ \
+ -DNO_GOT_CHECK=@got_check@ \
+ -DUSE_EMIT_RELOCS=@emit_relocs@ \
+ -DEMIT_CTOR_DTOR=@emit_ctor_dtor@ \
+- -DALWAYS_RELOC_TEXT=@always_reloc_text@
++ -DALWAYS_RELOC_TEXT=@always_reloc_text@ \
++ -DHAVE_BFD_XTENSA_PDIFF_RELOCS=@HAVE_BFD_XTENSA_PDIFF_RELOCS@
+ EXEEXT = @EXEEXT@
+ OBJEXT = @OBJEXT@
+
+diff --git a/configure b/configure
+index bb8e33f9cb28..bca38c34247e 100755
+--- a/configure
++++ b/configure
+@@ -621,6 +621,7 @@ ac_includes_default="\
+
+ ac_subst_vars='LTLIBOBJS
+ LIBOBJS
++HAVE_BFD_XTENSA_PDIFF_RELOCS
+ SYMBOL_PREFIX
+ always_reloc_text
+ emit_ctor_dtor
+@@ -1729,6 +1730,52 @@ fi
+
+ } # ac_fn_c_try_link
+
++# ac_fn_c_check_decl LINENO SYMBOL VAR INCLUDES
++# ---------------------------------------------
++# Tests whether SYMBOL is declared in INCLUDES, setting cache variable VAR
++# accordingly.
++ac_fn_c_check_decl ()
++{
++ as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
++ as_decl_name=`echo $2|sed 's/ *(.*//'`
++ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
++ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
++$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
++if eval \${$3+:} false; then :
++ $as_echo_n "(cached) " >&6
++else
++ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h. */
++$4
++int
++main ()
++{
++#ifndef $as_decl_name
++#ifdef __cplusplus
++ (void) $as_decl_use;
++#else
++ (void) $as_decl_name;
++#endif
++#endif
++
++ ;
++ return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++ eval "$3=yes"
++else
++ eval "$3=no"
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++fi
++eval ac_res=\$$3
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
++$as_echo "$ac_res" >&6; }
++ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
++
++} # ac_fn_c_check_decl
++
+ # ac_fn_c_check_func LINENO FUNC VAR
+ # ----------------------------------
+ # Tests whether FUNC exists, setting the cache variable VAR accordingly
+@@ -4272,6 +4319,22 @@ $as_echo "#define const /**/" >>confdefs.h
+ fi
+
+
++HAVE_BFD_XTENSA_PDIFF_RELOCS=0
++case $target in
++ xtensa*)
++ OLD_CPPFLAGS=$CPPFLAGS
++ CPPFLAGS="-I$bfd_include_dir -I$binutils_include_dir $CPPFLAGS"
++ ac_fn_c_check_decl "$LINENO" "R_XTENSA_PDIFF8" "ac_cv_have_decl_R_XTENSA_PDIFF8" "#include \"bfd.h\"
++ #include \"elf/xtensa.h\"
++"
++if test "x$ac_cv_have_decl_R_XTENSA_PDIFF8" = xyes; then :
++ HAVE_BFD_XTENSA_PDIFF_RELOCS=1
++fi
++
++ CPPFLAGS=$OLD_CPPFLAGS
++ ;;
++esac
++
+ for ac_func in vprintf
+ do :
+ ac_fn_c_check_func "$LINENO" "vprintf" "ac_cv_func_vprintf"
+@@ -4333,6 +4396,7 @@ fi
+
+
+
++
+ ac_config_files="$ac_config_files ld-elf2flt.sh:ld-elf2flt.in Makefile elf2flt.ld"
+
+ cat >confcache <<\_ACEOF
+diff --git a/configure.ac b/configure.ac
+index d6b4119eb18a..19969b1045f6 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -202,6 +202,19 @@ AC_CHECK_HEADERS(fcntl.h unistd.h bfd.h)
+ dnl Checks for typedefs, structures, and compiler characteristics.
+ AC_C_CONST
+
++HAVE_BFD_XTENSA_PDIFF_RELOCS=0
++case $target in
++ xtensa*)
++ AS_VAR_COPY([OLD_CPPFLAGS], [CPPFLAGS])
++ AS_VAR_SET([CPPFLAGS], ["-I$bfd_include_dir -I$binutils_include_dir $CPPFLAGS"])
++ AC_CHECK_DECL([R_XTENSA_PDIFF8],
++ [HAVE_BFD_XTENSA_PDIFF_RELOCS=1],,
++ [#include "bfd.h"
++ #include "elf/xtensa.h"])
++ AS_VAR_COPY([CPPFLAGS], [OLD_CPPFLAGS])
++ ;;
++esac
++
+ dnl Checks for library functions.
+ AC_FUNC_VPRINTF
+
+@@ -235,6 +248,7 @@ AC_SUBST(emit_relocs)
+ AC_SUBST(emit_ctor_dtor)
+ AC_SUBST(always_reloc_text)
+ AC_SUBST(SYMBOL_PREFIX)
++AC_SUBST(HAVE_BFD_XTENSA_PDIFF_RELOCS)
+
+ AC_OUTPUT(ld-elf2flt.sh:ld-elf2flt.in Makefile elf2flt.ld)
+
+diff --git a/elf2flt.c b/elf2flt.c
+index b7c4a490df02..961534973f56 100644
+--- a/elf2flt.c
++++ b/elf2flt.c
+@@ -776,6 +776,14 @@ output_relocs (
+ case R_XTENSA_DIFF8:
+ case R_XTENSA_DIFF16:
+ case R_XTENSA_DIFF32:
++#if HAVE_BFD_XTENSA_PDIFF_RELOCS
++ case R_XTENSA_PDIFF8:
++ case R_XTENSA_PDIFF16:
++ case R_XTENSA_PDIFF32:
++ case R_XTENSA_NDIFF8:
++ case R_XTENSA_NDIFF16:
++ case R_XTENSA_NDIFF32:
++#endif
+ case R_XTENSA_32_PCREL:
+ continue;
+ case R_XTENSA_32:
+--
+2.20.1
+
diff --git a/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0005-elf2flt-add-riscv-64-bits-support.patch b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0005-elf2flt-add-riscv-64-bits-support.patch
new file mode 100644
index 000000000..4b0075844
--- /dev/null
+++ b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0005-elf2flt-add-riscv-64-bits-support.patch
@@ -0,0 +1,137 @@
+From 1dea576eac4289602adc4a37f48c80330bf82e63 Mon Sep 17 00:00:00 2001
+From: Damien Le Moal <damien.lemoal@wdc.com>
+Date: Wed, 9 Sep 2020 17:31:33 +0900
+Subject: [PATCH] elf2flt: add riscv 64-bits support
+
+Add support for riscv 64bits ISA by defining the relocation types
+R_RISCV_32_PCREL, R_RISCV_ADD32, R_RISCV_SUB32, R_RISCV_32 and
+R_RISCV_64. riscv64 support also needs the __global_pointer$ symbol to
+be defined right after the relocation tables in the data section.
+Furthermore, the .got and .got.plt sections must be reversed. These 2
+requirements are handled with runtime modifications of the default
+linker script using the append_sed() function.
+(1) For the .got.plt and .got sections order swap, append_sed() is used
+to rename "(.got.plt)" to "(.got.tmp)" and to rename "(.got)" to
+"(.got.plt)". A last call finalize the name swap by replacing
+"(.got.tmp)" with "(.got)"
+(2) For the global pointer synbol, a definition line starting with
+"RISCV_GP" is added. The "RISCV_GP" string is removed if the target CPU
+type is riscv64. The definition line is dropped for other CPU types.
+
+With these changes, buildroot/busybox builds and run on NOMMU
+systems with kernel 5.13. Tested on Canaan Kendryte K210 boards.
+
+This patch is based on earlier work by Christoph Hellwig <hch@lst.de>.
+
+Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
+---
+ elf2flt.c | 23 +++++++++++++++++++++++
+ elf2flt.ld.in | 9 +++++----
+ ld-elf2flt.c | 16 ++++++++++++++++
+ 3 files changed, 44 insertions(+), 4 deletions(-)
+
+diff --git a/elf2flt.c b/elf2flt.c
+index f87f1fc..dbce467 100644
+--- a/elf2flt.c
++++ b/elf2flt.c
+@@ -80,6 +80,8 @@ const char *elf2flt_progname;
+ #include <elf/v850.h>
+ #elif defined(TARGET_xtensa)
+ #include <elf/xtensa.h>
++#elif defined(TARGET_riscv64)
++#include <elf/riscv.h>
+ #endif
+
+ #if defined(__MINGW32__)
+@@ -122,6 +124,8 @@ const char *elf2flt_progname;
+ #define ARCH "nios2"
+ #elif defined(TARGET_xtensa)
+ #define ARCH "xtensa"
++#elif defined(TARGET_riscv64)
++#define ARCH "riscv64"
+ #else
+ #error "Don't know how to support your CPU architecture??"
+ #endif
+@@ -797,6 +801,16 @@ output_relocs (
+ goto good_32bit_resolved_reloc;
+ default:
+ goto bad_resolved_reloc;
++#elif defined(TARGET_riscv64)
++ case R_RISCV_32_PCREL:
++ case R_RISCV_ADD32:
++ case R_RISCV_SUB32:
++ continue;
++ case R_RISCV_32:
++ case R_RISCV_64:
++ goto good_32bit_resolved_reloc;
++ default:
++ goto bad_resolved_reloc;
+ #else
+ default:
+ /* The default is to assume that the
+@@ -1806,6 +1820,15 @@ int main(int argc, char *argv[])
+ if (!load_to_ram && !pfile)
+ load_to_ram = 1;
+
++#if defined(TARGET_riscv64)
++ /*
++ * riscv only supports loading text and data contiguously.
++ * So fail if load_to_ram is false.
++ */
++ if (!load_to_ram)
++ fatal("Loading to RAM ('-r' option) is required");
++#endif
++
+ fname = argv[argc-1];
+
+ if (pfile) {
+diff --git a/elf2flt.ld.in b/elf2flt.ld.in
+index ec1fe6f..c0c44b8 100644
+--- a/elf2flt.ld.in
++++ b/elf2flt.ld.in
+@@ -70,10 +70,11 @@ W_RODAT *(.gnu.linkonce.r*)
+ . = ALIGN(0x20) ;
+ LONG(-1)
+ . = ALIGN(0x20) ;
+-R_RODAT *(.rodata)
+-R_RODAT *(.rodata1)
+-R_RODAT *(.rodata.*)
+-R_RODAT *(.gnu.linkonce.r*)
++RISCV_GP: __global_pointer$ = . + 0x800 ;
++R_RODAT *(.rodata)
++R_RODAT *(.rodata1)
++R_RODAT *(.rodata.*)
++R_RODAT *(.gnu.linkonce.r*)
+ *(.data)
+ *(.data1)
+ *(.data.*)
+diff --git a/ld-elf2flt.c b/ld-elf2flt.c
+index e5de506..31b565f 100644
+--- a/ld-elf2flt.c
++++ b/ld-elf2flt.c
+@@ -324,6 +324,22 @@ static int do_final_link(void)
+ append_option(&other_options, concat(got_offset, "=", buf, NULL));
+ }
+
++ if (streq(TARGET_CPU, "riscv64")) {
++ /*
++ * The .got section must come before the .got.plt section
++ * (gcc/ld bug ?).
++ */
++ append_sed(&sed, "(.got.plt)", "(.got.tmp)");
++ append_sed(&sed, "(.got.plt)", "(.got)");
++ append_sed(&sed, "(.got.tmp)", "(.got.plt)");
++
++ /* The global pointer symbol is defined after the GOT. */
++ append_sed(&sed, "^RISCV_GP:", "");
++ } else {
++ /* Get rid of the global pointer definition. */
++ append_sed(&sed, "^RISCV_GP:", NULL);
++ }
++
+ /* Locate the default linker script, if we don't have one provided. */
+ if (!linker_script)
+ linker_script = concat(ldscriptpath, "/elf2flt.ld", NULL);
+--
+2.31.1
+
diff --git a/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch
new file mode 100644
index 000000000..d20b993da
--- /dev/null
+++ b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch
@@ -0,0 +1,125 @@
+diff -Nur elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12.orig/elf2flt.c elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12/elf2flt.c
+--- elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12.orig/elf2flt.c 2023-01-30 08:48:56.632981732 +0100
++++ elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12/elf2flt.c 2023-01-30 08:53:34.510426754 +0100
+@@ -222,7 +222,7 @@
+ long i;
+ printf("SYMBOL TABLE:\n");
+ for (i=0; i<number_of_symbols; i++) {
+- printf(" NAME=%s VALUE=0x%"BFD_VMA_FMT"x\n",
++ printf(" NAME=%s VALUE=0x%x\n",
+ symbol_table[i]->name, symbol_table[i]->value);
+ }
+ printf("\n");
+@@ -458,7 +458,7 @@
+ if (r == NULL)
+ continue;
+ if (verbose)
+- printf(" RELOCS: %s [%p]: flags=0x%x vma=0x%"BFD_VMA_FMT"x\n",
++ printf(" RELOCS: %s [%p]: flags=0x%x vma=0x%x\n",
+ r->name, r, r->flags, elf2flt_bfd_section_vma(abs_bfd, r));
+ if ((r->flags & SEC_RELOC) == 0)
+ continue;
+@@ -903,8 +903,8 @@
+ if (verbose)
+ fprintf(stderr,
+ "%s vma=0x%x, "
+- "value=0x%"BFD_VMA_FMT"x, "
+- "address=0x%"BFD_VMA_FMT"x "
++ "value=0x%x, "
++ "address=0x%x "
+ "sym_addr=0x%x rs=0x%x, opcode=0x%x\n",
+ "ABS32",
+ sym_vma, (*(q->sym_ptr_ptr))->value,
+@@ -922,8 +922,8 @@
+ if (verbose)
+ fprintf(stderr,
+ "%s vma=0x%x, "
+- "value=0x%"BFD_VMA_FMT"x, "
+- "address=0x%"BFD_VMA_FMT"x "
++ "value=0x%x, "
++ "address=0x%x "
+ "sym_addr=0x%x rs=0x%x, opcode=0x%x\n",
+ "PLT32",
+ sym_vma, (*(q->sym_ptr_ptr))->value,
+@@ -945,7 +945,7 @@
+ case R_V850_ZDA_16_16_OFFSET:
+ case R_V850_ZDA_16_16_SPLIT_OFFSET:
+ /* Can't support zero-relocations. */
+- printf ("ERROR: %s+0x%"BFD_VMA_FMT"x: zero relocations not supported\n",
++ printf ("ERROR: %s+0x%x: zero relocations not supported\n",
+ sym_name, q->addend);
+ continue;
+ #endif /* TARGET_v850 */
+@@ -1038,15 +1038,15 @@
+ sprintf(&addstr[0], "+0x%ld", sym_addr - (*(q->sym_ptr_ptr))->value -
+ elf2flt_bfd_section_vma(abs_bfd, sym_section));
+ if (verbose)
+- printf(" RELOC[%d]: offset=0x%"BFD_VMA_FMT"x symbol=%s%s "
++ printf(" RELOC[%d]: offset=0x%x symbol=%s%s "
+ "section=%s size=%d "
+- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x)\n",
++ "fixup=0x%x (reloc=0x%x)\n",
+ flat_reloc_count,
+ q->address, sym_name, addstr,
+ section_name, sym_reloc_size,
+ sym_addr, section_vma + q->address);
+ if (verbose)
+- printf("reloc[%d] = 0x%"BFD_VMA_FMT"x\n",
++ printf("reloc[%d] = 0x%x\n",
+ flat_reloc_count, section_vma + q->address);
+
+ continue;
+@@ -1163,9 +1163,9 @@
+ temp |= (exist_val & 0x3f);
+ *(unsigned long *)r_mem = htoniosl(temp);
+ if (verbose)
+- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s "
++ printf("omit: offset=0x%x symbol=%s%s "
+ "section=%s size=%d "
+- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x) GPREL\n",
++ "fixup=0x%x (reloc=0x%x) GPREL\n",
+ q->address, sym_name, addstr,
+ section_name, sym_reloc_size,
+ sym_addr, section_vma + q->address);
+@@ -1183,9 +1183,9 @@
+ exist_val |= ((sym_addr & 0xFFFF) << 6);
+ *(unsigned long *)r_mem = htoniosl(exist_val);
+ if (verbose)
+- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s "
++ printf("omit: offset=0x%x symbol=%s%s "
+ "section=%s size=%d "
+- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x) PCREL\n",
++ "fixup=0x%x (reloc=0x%x) PCREL\n",
+ q->address, sym_name, addstr,
+ section_name, sym_reloc_size,
+ sym_addr, section_vma + q->address);
+@@ -1200,7 +1200,7 @@
+ && (p[-1]->sym_ptr_ptr == p[0]->sym_ptr_ptr)
+ && (p[-1]->addend == p[0]->addend)) {
+ if (verbose)
+- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s "
++ printf("omit: offset=0x%x symbol=%s%s "
+ "section=%s size=%d LO16\n",
+ q->address, sym_name, addstr,
+ section_name, sym_reloc_size);
+@@ -1610,9 +1610,9 @@
+ }
+
+ if (verbose)
+- printf(" RELOC[%d]: offset=0x%"BFD_VMA_FMT"x symbol=%s%s "
++ printf(" RELOC[%d]: offset=0x%x symbol=%s%s "
+ "section=%s size=%d "
+- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x)\n",
++ "fixup=0x%x (reloc=0x%x)\n",
+ flat_reloc_count,
+ q->address, sym_name, addstr,
+ section_name, sym_reloc_size,
+@@ -1630,7 +1630,7 @@
+ (section_vma + q->address);
+
+ if (verbose)
+- printf("reloc[%d] = 0x%"BFD_VMA_FMT"x\n",
++ printf("reloc[%d] = 0x%x\n",
+ flat_reloc_count, section_vma + q->address);
+ #else
+ switch ((*p)->howto->type) {