diff options
Diffstat (limited to 'target/linux/patches/6.1.7')
5 files changed, 127 insertions, 0 deletions
diff --git a/target/linux/patches/6.1.7/board-rockpi4-0003-arm64-dts-pcie.patch b/target/linux/patches/6.1.7/board-rockpi4-0003-arm64-dts-pcie.patch new file mode 100644 index 000000000..1777e7a86 --- /dev/null +++ b/target/linux/patches/6.1.7/board-rockpi4-0003-arm64-dts-pcie.patch @@ -0,0 +1,35 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +index 1ae1ebd4e..2f84397d5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +@@ -62,6 +62,8 @@ + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + +@@ -434,6 +459,21 @@ + gpio1830-supply = <&vcc_3v0>; + }; + ++&pcie0 { ++ ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ max-link-speed = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqnb_cpm>; ++ vpcie12v-supply = <&vcc12v_dcin>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ status = "okay"; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ + &pmu_io_domains { + status = "okay"; + diff --git a/target/linux/patches/6.1.7/enable-ethernet-bpi-m2-plus.patch b/target/linux/patches/6.1.7/enable-ethernet-bpi-m2-plus.patch new file mode 100644 index 000000000..7e9abd9ce --- /dev/null +++ b/target/linux/patches/6.1.7/enable-ethernet-bpi-m2-plus.patch @@ -0,0 +1,15 @@ +diff -Nur linux-6.0.11.orig/arch/arm/boot/dts/sunxi-h3-h5.dtsi linux-6.0.11/arch/arm/boot/dts/sunxi-h3-h5.dtsi +--- linux-6.0.11.orig/arch/arm/boot/dts/sunxi-h3-h5.dtsi 2022-12-02 17:43:18.000000000 +0100 ++++ linux-6.0.11/arch/arm/boot/dts/sunxi-h3-h5.dtsi 2022-12-19 08:06:16.836436057 +0100 +@@ -532,7 +532,10 @@ + reset-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; +- status = "disabled"; ++ status = "okay"; ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; + + mdio: mdio { + #address-cells = <1>; diff --git a/target/linux/patches/6.1.7/riscv32.patch b/target/linux/patches/6.1.7/riscv32.patch new file mode 100644 index 000000000..648b0de4d --- /dev/null +++ b/target/linux/patches/6.1.7/riscv32.patch @@ -0,0 +1,49 @@ +diff -Nur linux-6.0.15.orig/arch/riscv/include/uapi/asm/unistd.h linux-6.0.15/arch/riscv/include/uapi/asm/unistd.h +--- linux-6.0.15.orig/arch/riscv/include/uapi/asm/unistd.h 2022-12-21 17:41:16.000000000 +0100 ++++ linux-6.0.15/arch/riscv/include/uapi/asm/unistd.h 2023-01-09 11:28:16.590796198 +0100 +@@ -15,9 +15,14 @@ + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +-#if defined(__LP64__) && !defined(__SYSCALL_COMPAT) ++#ifndef __SYSCALL_COMPAT + #define __ARCH_WANT_NEW_STAT + #define __ARCH_WANT_SET_GET_RLIMIT ++#endif /* __SYSCALL_COMPAT */ ++ ++#ifndef __LP64__ ++#define __ARCH_WANT_STAT64 ++#define __ARCH_WANT_TIME32_SYSCALLS + #endif /* __LP64__ */ + + #define __ARCH_WANT_SYS_CLONE3 +diff -Nur linux-6.0.15.orig/arch/riscv/Kconfig linux-6.0.15/arch/riscv/Kconfig +--- linux-6.0.15.orig/arch/riscv/Kconfig 2022-12-21 17:41:16.000000000 +0100 ++++ linux-6.0.15/arch/riscv/Kconfig 2023-01-09 14:27:16.560750598 +0100 +@@ -163,8 +163,9 @@ + + config PAGE_OFFSET + hex +- default 0xC0000000 if 32BIT ++ default 0xC0000000 if 32BIT && MMU + default 0x80000000 if 64BIT && !MMU ++ default 0x80000000 if !MMU + default 0xff60000000000000 if 64BIT + + config KASAN_SHADOW_OFFSET +@@ -262,7 +263,6 @@ + select GENERIC_LIB_ASHRDI3 + select GENERIC_LIB_LSHRDI3 + select GENERIC_LIB_UCMPDI2 +- select MMU + + config ARCH_RV64I + bool "RV64I" +@@ -670,7 +670,6 @@ + default !NONPORTABLE + select EFI + select OF +- select MMU + + menu "Power management options" + diff --git a/target/linux/patches/6.1.7/rockchip-115200.patch b/target/linux/patches/6.1.7/rockchip-115200.patch new file mode 100644 index 000000000..ad8a2d7a7 --- /dev/null +++ b/target/linux/patches/6.1.7/rockchip-115200.patch @@ -0,0 +1,12 @@ +diff -Nur linux-5.15.81.orig/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi linux-5.15.81/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +--- linux-5.15.81.orig/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi 2022-12-02 17:41:12.000000000 +0100 ++++ linux-5.15.81/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi 2022-12-22 09:51:57.370394227 +0100 +@@ -17,7 +17,7 @@ + }; + + chosen { +- stdout-path = "serial2:1500000n8"; ++ stdout-path = "serial2:115200n8"; + }; + + clkin_gmac: external-gmac-clock { diff --git a/target/linux/patches/6.1.7/rockchip-pcie-timeout.patch b/target/linux/patches/6.1.7/rockchip-pcie-timeout.patch new file mode 100644 index 000000000..2ef7df2da --- /dev/null +++ b/target/linux/patches/6.1.7/rockchip-pcie-timeout.patch @@ -0,0 +1,16 @@ +diff -Nur linux-6.0.11.orig/drivers/pci/controller/pcie-rockchip-host.c linux-6.0.11/drivers/pci/controller/pcie-rockchip-host.c +--- linux-6.0.11.orig/drivers/pci/controller/pcie-rockchip-host.c 2022-12-02 17:43:18.000000000 +0100 ++++ linux-6.0.11/drivers/pci/controller/pcie-rockchip-host.c 2022-12-24 11:12:25.753213273 +0100 +@@ -327,10 +327,10 @@ + + gpiod_set_value_cansleep(rockchip->ep_gpio, 1); + +- /* 500ms timeout value should be enough for Gen1/2 training */ ++ /* 1000ms timeout value should be enough for Gen1/2 training */ + err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, + status, PCIE_LINK_UP(status), 20, +- 500 * USEC_PER_MSEC); ++ 1000 * USEC_PER_MSEC); + if (err) { + dev_err(dev, "PCIe link training gen1 timeout!\n"); + goto err_power_off_phy; |