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authorWaldemar Brodkorb <wbx@openadk.org>2013-12-20 18:41:11 +0100
committerWaldemar Brodkorb <wbx@openadk.org>2013-12-20 18:41:11 +0100
commit272b9fb572a6b1f585cf6f4f4150b07f1c1537bf (patch)
tree5ede8c935478f6db39bf8efc7ea14919e58d6aa1 /toolchain/kernel-headers
parentbde68f551d953927d476dc4f5ccd1c89ca001539 (diff)
parented95e17c2e88caff425eca534a794ea0c489fc5c (diff)
Merge branch 'master' of git+ssh://openadk.org/git/openadk
Diffstat (limited to 'toolchain/kernel-headers')
-rw-r--r--toolchain/kernel-headers/patches/3.6.11/cleankernel.patch11
-rw-r--r--toolchain/kernel-headers/patches/3.6.11/microperl.patch24
-rw-r--r--toolchain/kernel-headers/patches/3.6.11/mkpiggy.patch28
-rw-r--r--toolchain/kernel-headers/patches/3.6.11/relocs.patch3131
-rw-r--r--toolchain/kernel-headers/patches/3.6.11/sortext.patch22
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/cleankernel.patch11
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/cris-header.patch68
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/headersinst-xargs.patch22
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/microperl.patch24
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/mkpiggy.patch28
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/relocs.patch3131
-rw-r--r--toolchain/kernel-headers/patches/3.9.11/sortext.patch4949
12 files changed, 0 insertions, 11449 deletions
diff --git a/toolchain/kernel-headers/patches/3.6.11/cleankernel.patch b/toolchain/kernel-headers/patches/3.6.11/cleankernel.patch
deleted file mode 100644
index f8d5448ee..000000000
--- a/toolchain/kernel-headers/patches/3.6.11/cleankernel.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.29.1.orig/scripts/Makefile.headersinst linux-2.6.29.1/scripts/Makefile.headersinst
---- linux-2.6.29.1.orig/scripts/Makefile.headersinst 2009-04-02 22:55:27.000000000 +0200
-+++ linux-2.6.29.1/scripts/Makefile.headersinst 2009-04-17 20:56:09.143476927 +0200
-@@ -65,7 +65,6 @@
-
- targets += $(install-file)
- $(install-file): scripts/headers_install.pl $(input-files) FORCE
-- $(if $(unwanted),$(call cmd,remove),)
- $(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
- $(call if_changed,install)
-
diff --git a/toolchain/kernel-headers/patches/3.6.11/microperl.patch b/toolchain/kernel-headers/patches/3.6.11/microperl.patch
deleted file mode 100644
index 44c39f6e8..000000000
--- a/toolchain/kernel-headers/patches/3.6.11/microperl.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nur linux-3.4.2.orig/scripts/headers_check.pl linux-3.4.2/scripts/headers_check.pl
---- linux-3.4.2.orig/scripts/headers_check.pl 2012-06-09 17:36:33.000000000 +0200
-+++ linux-3.4.2/scripts/headers_check.pl 2012-06-15 12:45:43.000000000 +0200
-@@ -18,7 +18,7 @@
- #
- # 3) Check for leaked CONFIG_ symbols
-
--use strict;
-+#use strict;
- use File::Basename;
-
- my ($dir, $arch, @files) = @ARGV;
-diff -Nur linux-3.4.2.orig/scripts/headers_install.pl linux-3.4.2/scripts/headers_install.pl
---- linux-3.4.2.orig/scripts/headers_install.pl 2012-06-09 17:36:33.000000000 +0200
-+++ linux-3.4.2/scripts/headers_install.pl 2012-06-15 12:45:11.000000000 +0200
-@@ -16,7 +16,7 @@
- # 2) Drop include of compiler.h
- # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
-
--use strict;
-+#use strict;
-
- my ($readdir, $installdir, $arch, @files) = @ARGV;
-
diff --git a/toolchain/kernel-headers/patches/3.6.11/mkpiggy.patch b/toolchain/kernel-headers/patches/3.6.11/mkpiggy.patch
deleted file mode 100644
index d4e815cd2..000000000
--- a/toolchain/kernel-headers/patches/3.6.11/mkpiggy.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-diff -Nur linux-3.4.4.orig/arch/x86/boot/compressed/mkpiggy.c linux-3.4.4/arch/x86/boot/compressed/mkpiggy.c
---- linux-3.4.4.orig/arch/x86/boot/compressed/mkpiggy.c 2012-06-22 20:37:50.000000000 +0200
-+++ linux-3.4.4/arch/x86/boot/compressed/mkpiggy.c 2012-07-03 09:48:02.000000000 +0200
-@@ -29,7 +29,14 @@
- #include <stdio.h>
- #include <string.h>
- #include <inttypes.h>
--#include <tools/le_byteshift.h>
-+
-+static uint32_t getle32(const void *p)
-+{
-+ const uint8_t *cp = p;
-+
-+ return (uint32_t)cp[0] + ((uint32_t)cp[1] << 8) +
-+ ((uint32_t)cp[2] << 16) + ((uint32_t)cp[3] << 24);
-+}
-
- int main(int argc, char *argv[])
- {
-@@ -62,7 +69,7 @@
- }
-
- ilen = ftell(f);
-- olen = get_unaligned_le32(&olen);
-+ olen = getle32(&olen);
- fclose(f);
-
- /*
diff --git a/toolchain/kernel-headers/patches/3.6.11/relocs.patch b/toolchain/kernel-headers/patches/3.6.11/relocs.patch
deleted file mode 100644
index 43c5bb580..000000000
--- a/toolchain/kernel-headers/patches/3.6.11/relocs.patch
+++ /dev/null
@@ -1,3131 +0,0 @@
-diff -Nur linux-3.4.4.orig/arch/x86/tools/relocs.c linux-3.4.4/arch/x86/tools/relocs.c
---- linux-3.4.4.orig/arch/x86/tools/relocs.c 2012-06-22 20:37:50.000000000 +0200
-+++ linux-3.4.4/arch/x86/tools/relocs.c 2012-07-03 09:19:18.000000000 +0200
-@@ -5,12 +5,3123 @@
- #include <string.h>
- #include <errno.h>
- #include <unistd.h>
--#include <elf.h>
--#include <byteswap.h>
-+//#include <elf.h>
-+//#include <byteswap.h>
- #define USE_BSD
--#include <endian.h>
-+//#include <endian.h>
- #include <regex.h>
--#include <tools/le_byteshift.h>
-+//#include <tools/le_byteshift.h>
-+
-+static inline void __put_unaligned_le16(int val, int *p)
-+{
-+ *p++ = val;
-+ *p++ = val >> 8;
-+}
-+
-+static inline void __put_unaligned_le32(int val, int *p)
-+{
-+ __put_unaligned_le16(val >> 16, p + 2);
-+ __put_unaligned_le16(val, p);
-+}
-+
-+static inline void __put_unaligned_le64(int val, int *p)
-+{
-+ __put_unaligned_le32(val >> 32, p + 4);
-+ __put_unaligned_le32(val, p);
-+}
-+
-+static inline void put_unaligned_le16(int val, void *p)
-+{
-+ __put_unaligned_le16(val, p);
-+}
-+
-+static inline void put_unaligned_le32(int val, void *p)
-+{
-+ __put_unaligned_le32(val, p);
-+}
-+
-+static inline void put_unaligned_le64(int val, void *p)
-+{
-+ __put_unaligned_le64(val, p);
-+}
-+
-+/* Type for a 16-bit quantity. */
-+typedef uint16_t Elf32_Half;
-+typedef uint16_t Elf64_Half;
-+
-+/* Types for signed and unsigned 32-bit quantities. */
-+typedef uint32_t Elf32_Word;
-+typedef int32_t Elf32_Sword;
-+typedef uint32_t Elf64_Word;
-+typedef int32_t Elf64_Sword;
-+
-+/* Types for signed and unsigned 64-bit quantities. */
-+typedef uint64_t Elf32_Xword;
-+typedef int64_t Elf32_Sxword;
-+typedef uint64_t Elf64_Xword;
-+typedef int64_t Elf64_Sxword;
-+
-+/* Type of addresses. */
-+typedef uint32_t Elf32_Addr;
-+typedef uint64_t Elf64_Addr;
-+
-+/* Type of file offsets. */
-+typedef uint32_t Elf32_Off;
-+typedef uint64_t Elf64_Off;
-+
-+/* Type for section indices, which are 16-bit quantities. */
-+typedef uint16_t Elf32_Section;
-+typedef uint16_t Elf64_Section;
-+
-+/* Type for version symbol information. */
-+typedef Elf32_Half Elf32_Versym;
-+typedef Elf64_Half Elf64_Versym;
-+
-+
-+/* The ELF file header. This appears at the start of every ELF file. */
-+
-+#define EI_NIDENT (16)
-+
-+typedef struct
-+{
-+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */
-+ Elf32_Half e_type; /* Object file type */
-+ Elf32_Half e_machine; /* Architecture */
-+ Elf32_Word e_version; /* Object file version */
-+ Elf32_Addr e_entry; /* Entry point virtual address */
-+ Elf32_Off e_phoff; /* Program header table file offset */
-+ Elf32_Off e_shoff; /* Section header table file offset */
-+ Elf32_Word e_flags; /* Processor-specific flags */
-+ Elf32_Half e_ehsize; /* ELF header size in bytes */
-+ Elf32_Half e_phentsize; /* Program header table entry size */
-+ Elf32_Half e_phnum; /* Program header table entry count */
-+ Elf32_Half e_shentsize; /* Section header table entry size */
-+ Elf32_Half e_shnum; /* Section header table entry count */
-+ Elf32_Half e_shstrndx; /* Section header string table index */
-+} Elf32_Ehdr;
-+
-+typedef struct
-+{
-+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */
-+ Elf64_Half e_type; /* Object file type */
-+ Elf64_Half e_machine; /* Architecture */
-+ Elf64_Word e_version; /* Object file version */
-+ Elf64_Addr e_entry; /* Entry point virtual address */
-+ Elf64_Off e_phoff; /* Program header table file offset */
-+ Elf64_Off e_shoff; /* Section header table file offset */
-+ Elf64_Word e_flags; /* Processor-specific flags */
-+ Elf64_Half e_ehsize; /* ELF header size in bytes */
-+ Elf64_Half e_phentsize; /* Program header table entry size */
-+ Elf64_Half e_phnum; /* Program header table entry count */
-+ Elf64_Half e_shentsize; /* Section header table entry size */
-+ Elf64_Half e_shnum; /* Section header table entry count */
-+ Elf64_Half e_shstrndx; /* Section header string table index */
-+} Elf64_Ehdr;
-+
-+/* Fields in the e_ident array. The EI_* macros are indices into the
-+ array. The macros under each EI_* macro are the values the byte
-+ may have. */
-+
-+#define EI_MAG0 0 /* File identification byte 0 index */
-+#define ELFMAG0 0x7f /* Magic number byte 0 */
-+
-+#define EI_MAG1 1 /* File identification byte 1 index */
-+#define ELFMAG1 'E' /* Magic number byte 1 */
-+
-+#define EI_MAG2 2 /* File identification byte 2 index */
-+#define ELFMAG2 'L' /* Magic number byte 2 */
-+
-+#define EI_MAG3 3 /* File identification byte 3 index */
-+#define ELFMAG3 'F' /* Magic number byte 3 */
-+
-+/* Conglomeration of the identification bytes, for easy testing as a word. */
-+#define ELFMAG "\177ELF"
-+#define SELFMAG 4
-+#if __BYTE_ORDER == __LITTLE_ENDIAN
-+# define ELFMAG_U32 ((uint32_t)(ELFMAG0 + 0x100 * (ELFMAG1 + (0x100 * (ELFMAG2 + 0x100 * ELFMAG3)))))
-+#elif __BYTE_ORDER == __BIG_ENDIAN
-+# define ELFMAG_U32 ((uint32_t)((((ELFMAG0 * 0x100) + ELFMAG1) * 0x100 + ELFMAG2) * 0x100 + ELFMAG3))
-+#endif
-+
-+#define EI_CLASS 4 /* File class byte index */
-+#define ELFCLASSNONE 0 /* Invalid class */
-+#define ELFCLASS32 1 /* 32-bit objects */
-+#define ELFCLASS64 2 /* 64-bit objects */
-+#define ELFCLASSNUM 3
-+
-+#define EI_DATA 5 /* Data encoding byte index */
-+#define ELFDATANONE 0 /* Invalid data encoding */
-+#define ELFDATA2LSB 1 /* 2's complement, little endian */
-+#define ELFDATA2MSB 2 /* 2's complement, big endian */
-+#define ELFDATANUM 3
-+
-+#define EI_VERSION 6 /* File version byte index */
-+ /* Value must be EV_CURRENT */
-+
-+#define EI_OSABI 7 /* OS ABI identification */
-+#define ELFOSABI_NONE 0 /* UNIX System V ABI */
-+#define ELFOSABI_SYSV 0 /* Alias. */
-+#define ELFOSABI_HPUX 1 /* HP-UX */
-+#define ELFOSABI_NETBSD 2 /* NetBSD. */
-+#define ELFOSABI_LINUX 3 /* Linux. */
-+#define ELFOSABI_HURD 4 /* GNU/Hurd */
-+#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */
-+#define ELFOSABI_AIX 7 /* IBM AIX. */
-+#define ELFOSABI_IRIX 8 /* SGI Irix. */
-+#define ELFOSABI_FREEBSD 9 /* FreeBSD. */
-+#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */
-+#define ELFOSABI_MODESTO 11 /* Novell Modesto. */
-+#define ELFOSABI_OPENBSD 12 /* OpenBSD. */
-+#define ELFOSABI_OPENVMS 13 /* OpenVMS */
-+#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
-+#define ELFOSABI_AROS 15 /* Amiga Research OS */
-+#define ELFOSABI_ARM 97 /* ARM */
-+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
-+
-+#define EI_ABIVERSION 8 /* ABI version */
-+
-+#define EI_PAD 9 /* Byte index of padding bytes */
-+
-+/* Legal values for e_type (object file type). */
-+
-+#define ET_NONE 0 /* No file type */
-+#define ET_REL 1 /* Relocatable file */
-+#define ET_EXEC 2 /* Executable file */
-+#define ET_DYN 3 /* Shared object file */
-+#define ET_CORE 4 /* Core file */
-+#define ET_NUM 5 /* Number of defined types */
-+#define ET_LOOS 0xfe00 /* OS-specific range start */
-+#define ET_HIOS 0xfeff /* OS-specific range end */
-+#define ET_LOPROC 0xff00 /* Processor-specific range start */
-+#define ET_HIPROC 0xffff /* Processor-specific range end */
-+
-+/* Legal values for e_machine (architecture). */
-+
-+#define EM_NONE 0 /* No machine */
-+#define EM_M32 1 /* AT&T WE 32100 */
-+#define EM_SPARC 2 /* SUN SPARC */
-+#define EM_386 3 /* Intel 80386 */
-+#define EM_68K 4 /* Motorola m68k family */
-+#define EM_88K 5 /* Motorola m88k family */
-+#define EM_486 6 /* Intel 80486 *//* Reserved for future use */
-+#define EM_860 7 /* Intel 80860 */
-+#define EM_MIPS 8 /* MIPS R3000 big-endian */
-+#define EM_S370 9 /* IBM System/370 */
-+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */
-+
-+#define EM_PARISC 15 /* HPPA */
-+#define EM_VPP500 17 /* Fujitsu VPP500 */
-+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
-+#define EM_960 19 /* Intel 80960 */
-+#define EM_PPC 20 /* PowerPC */
-+#define EM_PPC64 21 /* PowerPC 64-bit */
-+#define EM_S390 22 /* IBM S390 */
-+
-+#define EM_V800 36 /* NEC V800 series */
-+#define EM_FR20 37 /* Fujitsu FR20 */
-+#define EM_RH32 38 /* TRW RH-32 */
-+#define EM_MCORE 39 /* Motorola M*Core */ /* May also be taken by Fujitsu MMA */
-+#define EM_RCE 39 /* Old name for MCore */
-+#define EM_ARM 40 /* ARM */
-+#define EM_FAKE_ALPHA 41 /* Digital Alpha */
-+#define EM_SH 42 /* Renesas SH */
-+#define EM_SPARCV9 43 /* SPARC v9 64-bit */
-+#define EM_TRICORE 44 /* Siemens Tricore */
-+#define EM_ARC 45 /* Argonaut RISC Core */
-+#define EM_H8_300 46 /* Renesas H8/300 */
-+#define EM_H8_300H 47 /* Renesas H8/300H */
-+#define EM_H8S 48 /* Renesas H8S */
-+#define EM_H8_500 49 /* Renesas H8/500 */
-+#define EM_IA_64 50 /* Intel Merced */
-+#define EM_MIPS_X 51 /* Stanford MIPS-X */
-+#define EM_COLDFIRE 52 /* Motorola Coldfire */
-+#define EM_68HC12 53 /* Motorola M68HC12 */
-+#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/
-+#define EM_PCP 55 /* Siemens PCP */
-+#define EM_NCPU 56 /* Sony nCPU embeeded RISC */
-+#define EM_NDR1 57 /* Denso NDR1 microprocessor */
-+#define EM_STARCORE 58 /* Motorola Start*Core processor */
-+#define EM_ME16 59 /* Toyota ME16 processor */
-+#define EM_ST100 60 /* STMicroelectronic ST100 processor */
-+#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/
-+#define EM_X86_64 62 /* AMD x86-64 architecture */
-+#define EM_PDSP 63 /* Sony DSP Processor */
-+
-+#define EM_FX66 66 /* Siemens FX66 microcontroller */
-+#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */
-+#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */
-+#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */
-+#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */
-+#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */
-+#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */
-+#define EM_SVX 73 /* Silicon Graphics SVx */
-+#define EM_ST19 74 /* STMicroelectronics ST19 8 bit mc */
-+#define EM_VAX 75 /* Digital VAX */
-+#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
-+#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */
-+#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */
-+#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */
-+#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */
-+#define EM_HUANY 81 /* Harvard University machine-independent object files */
-+#define EM_PRISM 82 /* SiTera Prism */
-+#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */
-+#define EM_FR30 84 /* Fujitsu FR30 */
-+#define EM_D10V 85 /* Mitsubishi D10V */
-+#define EM_D30V 86 /* Mitsubishi D30V */
-+#define EM_V850 87 /* NEC v850 */
-+#define EM_M32R 88 /* Renesas M32R */
-+#define EM_MN10300 89 /* Matsushita MN10300 */
-+#define EM_MN10200 90 /* Matsushita MN10200 */
-+#define EM_PJ 91 /* picoJava */
-+#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
-+#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
-+#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
-+#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
-+#define EM_CR 103 /* National Semiconductor CompactRISC */
-+#define EM_MSP430 105 /* TI msp430 micro controller */
-+#define EM_BLACKFIN 106 /* Analog Devices Blackfin */
-+#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
-+#define EM_CRX 114 /* National Semiconductor CRX */
-+#define EM_NUM 95
-+#define EM_TI_C6000 140
-+
-+/* If it is necessary to assign new unofficial EM_* values, please pick large
-+ random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
-+ with official or non-GNU unofficial values.
-+
-+ NOTE: Do not just increment the most recent number by one.
-+ Somebody else somewhere will do exactly the same thing, and you
-+ will have a collision. Instead, pick a random number.
-+
-+ Normally, each entity or maintainer responsible for a machine with an
-+ unofficial e_machine number should eventually ask registry@caldera.com for
-+ an officially blessed number to be added to the list above. */
-+
-+/* picoJava */
-+#define EM_PJ_OLD 99
-+
-+/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
-+#define EM_CYGNUS_POWERPC 0x9025
-+
-+/* Old version of Sparc v9, from before the ABI; this should be
-+ removed shortly. */
-+#define EM_OLD_SPARCV9 11
-+
-+/* Old version of PowerPC, this should be removed shortly. */
-+#define EM_PPC_OLD 17
-+
-+/* (Deprecated) Temporary number for the OpenRISC processor. */
-+#define EM_OR32 0x8472
-+
-+/* Renesas M32C and M16C. */
-+#define EM_M32C 0xFEB0
-+
-+/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
-+#define EM_CYGNUS_M32R 0x9041
-+
-+/* old S/390 backend magic number. Written in the absence of an ABI. */
-+#define EM_S390_OLD 0xa390
-+
-+/* D10V backend magic number. Written in the absence of an ABI. */
-+#define EM_CYGNUS_D10V 0x7650
-+
-+/* D30V backend magic number. Written in the absence of an ABI. */
-+#define EM_CYGNUS_D30V 0x7676
-+
-+/* V850 backend magic number. Written in the absense of an ABI. */
-+#define EM_CYGNUS_V850 0x9080
-+
-+/* mn10200 and mn10300 backend magic numbers.
-+ Written in the absense of an ABI. */
-+#define EM_CYGNUS_MN10200 0xdead
-+#define EM_CYGNUS_MN10300 0xbeef
-+
-+/* FR30 magic number - no EABI available. */
-+#define EM_CYGNUS_FR30 0x3330
-+
-+/* AVR magic number
-+ Written in the absense of an ABI. */
-+#define EM_AVR_OLD 0x1057
-+
-+/* OpenRISC magic number
-+ Written in the absense of an ABI. */
-+#define EM_OPENRISC_OLD 0x3426
-+
-+/* DLX magic number
-+ Written in the absense of an ABI. */
-+#define EM_DLX 0x5aa5
-+
-+#define EM_XSTORMY16 0xad45
-+
-+/* FRV magic number - no EABI available??. */
-+#define EM_CYGNUS_FRV 0x5441
-+
-+/* Ubicom IP2xxx; no ABI */
-+#define EM_IP2K_OLD 0x8217
-+
-+#define EM_MT 0x2530 /* Morpho MT; no ABI */
-+
-+/* MSP430 magic number
-+ Written in the absense everything. */
-+#define EM_MSP430_OLD 0x1059
-+
-+/* Vitesse IQ2000. */
-+#define EM_IQ2000 0xFEBA
-+
-+/* Old, unofficial value for Xtensa. */
-+#define EM_XTENSA_OLD 0xabc7
-+
-+/* Alpha backend magic number. Written in the absence of an ABI. */
-+#define EM_ALPHA 0x9026
-+
-+/* NIOS magic number - no EABI available. */
-+#define EM_NIOS32 0xFEBB
-+
-+/* AVR32 magic number from ATMEL */
-+#define EM_AVR32 0x18ad
-+
-+/* V850 backend magic number. Written in the absense of an ABI. */
-+#define EM_CYGNUS_V850 0x9080
-+
-+/* Legal values for e_version (version). */
-+
-+#define EV_NONE 0 /* Invalid ELF version */
-+#define EV_CURRENT 1 /* Current version */
-+#define EV_NUM 2
-+
-+/* Section header. */
-+
-+typedef struct
-+{
-+ Elf32_Word sh_name; /* Section name (string tbl index) */
-+ Elf32_Word sh_type; /* Section type */
-+ Elf32_Word sh_flags; /* Section flags */
-+ Elf32_Addr sh_addr; /* Section virtual addr at execution */
-+ Elf32_Off sh_offset; /* Section file offset */
-+ Elf32_Word sh_size; /* Section size in bytes */
-+ Elf32_Word sh_link; /* Link to another section */
-+ Elf32_Word sh_info; /* Additional section information */
-+ Elf32_Word sh_addralign; /* Section alignment */
-+ Elf32_Word sh_entsize; /* Entry size if section holds table */
-+} Elf32_Shdr;
-+
-+typedef struct
-+{
-+ Elf64_Word sh_name; /* Section name (string tbl index) */
-+ Elf64_Word sh_type; /* Section type */
-+ Elf64_Xword sh_flags; /* Section flags */
-+ Elf64_Addr sh_addr; /* Section virtual addr at execution */
-+ Elf64_Off sh_offset; /* Section file offset */
-+ Elf64_Xword sh_size; /* Section size in bytes */
-+ Elf64_Word sh_link; /* Link to another section */
-+ Elf64_Word sh_info; /* Additional section information */
-+ Elf64_Xword sh_addralign; /* Section alignment */
-+ Elf64_Xword sh_entsize; /* Entry size if section holds table */
-+} Elf64_Shdr;
-+
-+/* Special section indices. */
-+
-+#define SHN_UNDEF 0 /* Undefined section */
-+#define SHN_LORESERVE 0xff00 /* Start of reserved indices */
-+#define SHN_LOPROC 0xff00 /* Start of processor-specific */
-+#define SHN_BEFORE 0xff00 /* Order section before all others
-+ (Solaris). */
-+#define SHN_AFTER 0xff01 /* Order section after all others
-+ (Solaris). */
-+#define SHN_HIPROC 0xff1f /* End of processor-specific */
-+#define SHN_LOOS 0xff20 /* Start of OS-specific */
-+#define SHN_HIOS 0xff3f /* End of OS-specific */
-+#define SHN_ABS 0xfff1 /* Associated symbol is absolute */
-+#define SHN_COMMON 0xfff2 /* Associated symbol is common */
-+#define SHN_XINDEX 0xffff /* Index is in extra table. */
-+#define SHN_HIRESERVE 0xffff /* End of reserved indices */
-+
-+/* Legal values for sh_type (section type). */
-+
-+#define SHT_NULL 0 /* Section header table entry unused */
-+#define SHT_PROGBITS 1 /* Program data */
-+#define SHT_SYMTAB 2 /* Symbol table */
-+#define SHT_STRTAB 3 /* String table */
-+#define SHT_RELA 4 /* Relocation entries with addends */
-+#define SHT_HASH 5 /* Symbol hash table */
-+#define SHT_DYNAMIC 6 /* Dynamic linking information */
-+#define SHT_NOTE 7 /* Notes */
-+#define SHT_NOBITS 8 /* Program space with no data (bss) */
-+#define SHT_REL 9 /* Relocation entries, no addends */
-+#define SHT_SHLIB 10 /* Reserved */
-+#define SHT_DYNSYM 11 /* Dynamic linker symbol table */
-+#define SHT_INIT_ARRAY 14 /* Array of constructors */
-+#define SHT_FINI_ARRAY 15 /* Array of destructors */
-+#define SHT_PREINIT_ARRAY 16 /* Array of pre-constructors */
-+#define SHT_GROUP 17 /* Section group */
-+#define SHT_SYMTAB_SHNDX 18 /* Extended section indeces */
-+#define SHT_NUM 19 /* Number of defined types. */
-+#define SHT_LOOS 0x60000000 /* Start OS-specific */
-+#define SHT_GNU_HASH 0x6ffffff6 /* GNU-style hash table. */
-+#define SHT_GNU_LIBLIST 0x6ffffff7 /* Prelink library list */
-+#define SHT_CHECKSUM 0x6ffffff8 /* Checksum for DSO content. */
-+#define SHT_LOSUNW 0x6ffffffa /* Sun-specific low bound. */
-+#define SHT_SUNW_move 0x6ffffffa
-+#define SHT_SUNW_COMDAT 0x6ffffffb
-+#define SHT_SUNW_syminfo 0x6ffffffc
-+#define SHT_GNU_verdef 0x6ffffffd /* Version definition section. */
-+#define SHT_GNU_verneed 0x6ffffffe /* Version needs section. */
-+#define SHT_GNU_versym 0x6fffffff /* Version symbol table. */
-+#define SHT_HISUNW 0x6fffffff /* Sun-specific high bound. */
-+#define SHT_HIOS 0x6fffffff /* End OS-specific type */
-+#define SHT_LOPROC 0x70000000 /* Start of processor-specific */
-+#define SHT_HIPROC 0x7fffffff /* End of processor-specific */
-+#define SHT_LOUSER 0x80000000 /* Start of application-specific */
-+#define SHT_HIUSER 0x8fffffff /* End of application-specific */
-+
-+/* Legal values for sh_flags (section flags). */
-+
-+#define SHF_WRITE (1 << 0) /* Writable */
-+#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */
-+#define SHF_EXECINSTR (1 << 2) /* Executable */
-+#define SHF_MERGE (1 << 4) /* Might be merged */
-+#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */
-+#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */
-+#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */
-+#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling
-+ required */
-+#define SHF_GROUP (1 << 9) /* Section is member of a group. */
-+#define SHF_TLS (1 << 10) /* Section hold thread-local data. */
-+#define SHF_MASKOS 0x0ff00000 /* OS-specific. */
-+#define SHF_MASKPROC 0xf0000000 /* Processor-specific */
-+#define SHF_ORDERED (1 << 30) /* Special ordering requirement
-+ (Solaris). */
-+#define SHF_EXCLUDE (1 << 31) /* Section is excluded unless
-+ referenced or allocated (Solaris).*/
-+
-+/* Section group handling. */
-+#define GRP_COMDAT 0x1 /* Mark group as COMDAT. */
-+
-+/* Symbol table entry. */
-+
-+typedef struct
-+{
-+ Elf32_Word st_name; /* Symbol name (string tbl index) */
-+ Elf32_Addr st_value; /* Symbol value */
-+ Elf32_Word st_size; /* Symbol size */
-+ unsigned char st_info; /* Symbol type and binding */
-+ unsigned char st_other; /* Symbol visibility */
-+ Elf32_Section st_shndx; /* Section index */
-+} Elf32_Sym;
-+
-+typedef struct
-+{
-+ Elf64_Word st_name; /* Symbol name (string tbl index) */
-+ unsigned char st_info; /* Symbol type and binding */
-+ unsigned char st_other; /* Symbol visibility */
-+ Elf64_Section st_shndx; /* Section index */
-+ Elf64_Addr st_value; /* Symbol value */
-+ Elf64_Xword st_size; /* Symbol size */
-+} Elf64_Sym;
-+
-+/* The syminfo section if available contains additional information about
-+ every dynamic symbol. */
-+
-+typedef struct
-+{
-+ Elf32_Half si_boundto; /* Direct bindings, symbol bound to */
-+ Elf32_Half si_flags; /* Per symbol flags */
-+} Elf32_Syminfo;
-+
-+typedef struct
-+{
-+ Elf64_Half si_boundto; /* Direct bindings, symbol bound to */
-+ Elf64_Half si_flags; /* Per symbol flags */
-+} Elf64_Syminfo;
-+
-+/* Possible values for si_boundto. */
-+#define SYMINFO_BT_SELF 0xffff /* Symbol bound to self */
-+#define SYMINFO_BT_PARENT 0xfffe /* Symbol bound to parent */
-+#define SYMINFO_BT_LOWRESERVE 0xff00 /* Beginning of reserved entries */
-+
-+/* Possible bitmasks for si_flags. */
-+#define SYMINFO_FLG_DIRECT 0x0001 /* Direct bound symbol */
-+#define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-thru symbol for translator */
-+#define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */
-+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* Symbol bound to object to be lazy
-+ loaded */
-+/* Syminfo version values. */
-+#define SYMINFO_NONE 0
-+#define SYMINFO_CURRENT 1
-+#define SYMINFO_NUM 2
-+
-+
-+/* How to extract and insert information held in the st_info field. */
-+
-+#define ELF32_ST_BIND(val) (((unsigned char) (val)) >> 4)
-+#define ELF32_ST_TYPE(val) ((val) & 0xf)
-+#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf))
-+
-+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field. */
-+#define ELF64_ST_BIND(val) ELF32_ST_BIND (val)
-+#define ELF64_ST_TYPE(val) ELF32_ST_TYPE (val)
-+#define ELF64_ST_INFO(bind, type) ELF32_ST_INFO ((bind), (type))
-+
-+/* Legal values for ST_BIND subfield of st_info (symbol binding). */
-+
-+#define STB_LOCAL 0 /* Local symbol */
-+#define STB_GLOBAL 1 /* Global symbol */
-+#define STB_WEAK 2 /* Weak symbol */
-+#define STB_NUM 3 /* Number of defined types. */
-+#define STB_LOOS 10 /* Start of OS-specific */
-+#define STB_HIOS 12 /* End of OS-specific */
-+#define STB_LOPROC 13 /* Start of processor-specific */
-+#define STB_HIPROC 15 /* End of processor-specific */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type). */
-+
-+#define STT_NOTYPE 0 /* Symbol type is unspecified */
-+#define STT_OBJECT 1 /* Symbol is a data object */
-+#define STT_FUNC 2 /* Symbol is a code object */
-+#define STT_SECTION 3 /* Symbol associated with a section */
-+#define STT_FILE 4 /* Symbol's name is file name */
-+#define STT_COMMON 5 /* Symbol is a common data object */
-+#define STT_TLS 6 /* Symbol is thread-local data object*/
-+#define STT_NUM 7 /* Number of defined types. */
-+#define STT_LOOS 10 /* Start of OS-specific */
-+#define STT_HIOS 12 /* End of OS-specific */
-+#define STT_LOPROC 13 /* Start of processor-specific */
-+#define STT_HIPROC 15 /* End of processor-specific */
-+
-+
-+/* Symbol table indices are found in the hash buckets and chain table
-+ of a symbol hash table section. This special index value indicates
-+ the end of a chain, meaning no further symbols are found in that bucket. */
-+
-+#define STN_UNDEF 0 /* End of a chain. */
-+
-+
-+/* How to extract and insert information held in the st_other field. */
-+
-+#define ELF32_ST_VISIBILITY(o) ((o) & 0x03)
-+
-+/* For ELF64 the definitions are the same. */
-+#define ELF64_ST_VISIBILITY(o) ELF32_ST_VISIBILITY (o)
-+
-+/* Symbol visibility specification encoded in the st_other field. */
-+#define STV_DEFAULT 0 /* Default symbol visibility rules */
-+#define STV_INTERNAL 1 /* Processor specific hidden class */
-+#define STV_HIDDEN 2 /* Sym unavailable in other modules */
-+#define STV_PROTECTED 3 /* Not preemptible, not exported */
-+
-+
-+/* Relocation table entry without addend (in section of type SHT_REL). */
-+
-+typedef struct
-+{
-+ Elf32_Addr r_offset; /* Address */
-+ Elf32_Word r_info; /* Relocation type and symbol index */
-+} Elf32_Rel;
-+
-+/* I have seen two different definitions of the Elf64_Rel and
-+ Elf64_Rela structures, so we'll leave them out until Novell (or
-+ whoever) gets their act together. */
-+/* The following, at least, is used on Sparc v9, MIPS, and Alpha. */
-+
-+typedef struct
-+{
-+ Elf64_Addr r_offset; /* Address */
-+ Elf64_Xword r_info; /* Relocation type and symbol index */
-+} Elf64_Rel;
-+
-+/* Relocation table entry with addend (in section of type SHT_RELA). */
-+
-+typedef struct
-+{
-+ Elf32_Addr r_offset; /* Address */
-+ Elf32_Word r_info; /* Relocation type and symbol index */
-+ Elf32_Sword r_addend; /* Addend */
-+} Elf32_Rela;
-+
-+typedef struct
-+{
-+ Elf64_Addr r_offset; /* Address */
-+ Elf64_Xword r_info; /* Relocation type and symbol index */
-+ Elf64_Sxword r_addend; /* Addend */
-+} Elf64_Rela;
-+
-+/* How to extract and insert information held in the r_info field. */
-+
-+#define ELF32_R_SYM(val) ((val) >> 8)
-+#define ELF32_R_TYPE(val) ((val) & 0xff)
-+#define ELF32_R_INFO(sym, type) (((sym) << 8) + ((type) & 0xff))
-+
-+#define ELF64_R_SYM(i) ((i) >> 32)
-+#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
-+#define ELF64_R_INFO(sym,type) ((((Elf64_Xword) (sym)) << 32) + (type))
-+
-+/* Program segment header. */
-+
-+typedef struct
-+{
-+ Elf32_Word p_type; /* Segment type */
-+ Elf32_Off p_offset; /* Segment file offset */
-+ Elf32_Addr p_vaddr; /* Segment virtual address */
-+ Elf32_Addr p_paddr; /* Segment physical address */
-+ Elf32_Word p_filesz; /* Segment size in file */
-+ Elf32_Word p_memsz; /* Segment size in memory */
-+ Elf32_Word p_flags; /* Segment flags */
-+ Elf32_Word p_align; /* Segment alignment */
-+} Elf32_Phdr;
-+
-+typedef struct
-+{
-+ Elf64_Word p_type; /* Segment type */
-+ Elf64_Word p_flags; /* Segment flags */
-+ Elf64_Off p_offset; /* Segment file offset */
-+ Elf64_Addr p_vaddr; /* Segment virtual address */
-+ Elf64_Addr p_paddr; /* Segment physical address */
-+ Elf64_Xword p_filesz; /* Segment size in file */
-+ Elf64_Xword p_memsz; /* Segment size in memory */
-+ Elf64_Xword p_align; /* Segment alignment */
-+} Elf64_Phdr;
-+
-+/* Legal values for p_type (segment type). */
-+
-+#define PT_NULL 0 /* Program header table entry unused */
-+#define PT_LOAD 1 /* Loadable program segment */
-+#define PT_DYNAMIC 2 /* Dynamic linking information */
-+#define PT_INTERP 3 /* Program interpreter */
-+#define PT_NOTE 4 /* Auxiliary information */
-+#define PT_SHLIB 5 /* Reserved */
-+#define PT_PHDR 6 /* Entry for header table itself */
-+#define PT_TLS 7 /* Thread-local storage segment */
-+#define PT_NUM 8 /* Number of defined types */
-+#define PT_LOOS 0x60000000 /* Start of OS-specific */
-+#define PT_GNU_EH_FRAME 0x6474e550 /* GCC .eh_frame_hdr segment */
-+#define PT_GNU_STACK 0x6474e551 /* Indicates stack executability */
-+#define PT_GNU_RELRO 0x6474e552 /* Read-only after relocation */
-+#define PT_PAX_FLAGS 0x65041580 /* Indicates PaX flag markings */
-+#define PT_LOSUNW 0x6ffffffa
-+#define PT_SUNWBSS 0x6ffffffa /* Sun Specific segment */
-+#define PT_SUNWSTACK 0x6ffffffb /* Stack segment */
-+#define PT_HISUNW 0x6fffffff
-+#define PT_HIOS 0x6fffffff /* End of OS-specific */
-+#define PT_LOPROC 0x70000000 /* Start of processor-specific */
-+#define PT_HIPROC 0x7fffffff /* End of processor-specific */
-+
-+/* Legal values for p_flags (segment flags). */
-+
-+#define PF_X (1 << 0) /* Segment is executable */
-+#define PF_W (1 << 1) /* Segment is writable */
-+#define PF_R (1 << 2) /* Segment is readable */
-+#define PF_PAGEEXEC (1 << 4) /* Enable PAGEEXEC */
-+#define PF_NOPAGEEXEC (1 << 5) /* Disable PAGEEXEC */
-+#define PF_SEGMEXEC (1 << 6) /* Enable SEGMEXEC */
-+#define PF_NOSEGMEXEC (1 << 7) /* Disable SEGMEXEC */
-+#define PF_MPROTECT (1 << 8) /* Enable MPROTECT */
-+#define PF_NOMPROTECT (1 << 9) /* Disable MPROTECT */
-+#define PF_RANDEXEC (1 << 10) /* Enable RANDEXEC */
-+#define PF_NORANDEXEC (1 << 11) /* Disable RANDEXEC */
-+#define PF_EMUTRAMP (1 << 12) /* Enable EMUTRAMP */
-+#define PF_NOEMUTRAMP (1 << 13) /* Disable EMUTRAMP */
-+#define PF_RANDMMAP (1 << 14) /* Enable RANDMMAP */
-+#define PF_NORANDMMAP (1 << 15) /* Disable RANDMMAP */
-+#define PF_MASKOS 0x0ff00000 /* OS-specific */
-+#define PF_MASKPROC 0xf0000000 /* Processor-specific */
-+
-+/* Legal values for note segment descriptor types for core files. */
-+
-+#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */
-+#define NT_FPREGSET 2 /* Contains copy of fpregset struct */
-+#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */
-+#define NT_PRXREG 4 /* Contains copy of prxregset struct */
-+#define NT_TASKSTRUCT 4 /* Contains copy of task structure */
-+#define NT_PLATFORM 5 /* String from sysinfo(SI_PLATFORM) */
-+#define NT_AUXV 6 /* Contains copy of auxv array */
-+#define NT_GWINDOWS 7 /* Contains copy of gwindows struct */
-+#define NT_ASRS 8 /* Contains copy of asrset struct */
-+#define NT_PSTATUS 10 /* Contains copy of pstatus struct */
-+#define NT_PSINFO 13 /* Contains copy of psinfo struct */
-+#define NT_PRCRED 14 /* Contains copy of prcred struct */
-+#define NT_UTSNAME 15 /* Contains copy of utsname struct */
-+#define NT_LWPSTATUS 16 /* Contains copy of lwpstatus struct */
-+#define NT_LWPSINFO 17 /* Contains copy of lwpinfo struct */
-+#define NT_PRFPXREG 20 /* Contains copy of fprxregset struct*/
-+
-+/* Legal values for the note segment descriptor types for object files. */
-+
-+#define NT_VERSION 1 /* Contains a version string. */
-+
-+
-+/* Dynamic section entry. */
-+
-+typedef struct
-+{
-+ Elf32_Sword d_tag; /* Dynamic entry type */
-+ union
-+ {
-+ Elf32_Word d_val; /* Integer value */
-+ Elf32_Addr d_ptr; /* Address value */
-+ } d_un;
-+} Elf32_Dyn;
-+
-+typedef struct
-+{
-+ Elf64_Sxword d_tag; /* Dynamic entry type */
-+ union
-+ {
-+ Elf64_Xword d_val; /* Integer value */
-+ Elf64_Addr d_ptr; /* Address value */
-+ } d_un;
-+} Elf64_Dyn;
-+
-+/* Legal values for d_tag (dynamic entry type). */
-+
-+#define DT_NULL 0 /* Marks end of dynamic section */
-+#define DT_NEEDED 1 /* Name of needed library */
-+#define DT_PLTRELSZ 2 /* Size in bytes of PLT relocs */
-+#define DT_PLTGOT 3 /* Processor defined value */
-+#define DT_HASH 4 /* Address of symbol hash table */
-+#define DT_STRTAB 5 /* Address of string table */
-+#define DT_SYMTAB 6 /* Address of symbol table */
-+#define DT_RELA 7 /* Address of Rela relocs */
-+#define DT_RELASZ 8 /* Total size of Rela relocs */
-+#define DT_RELAENT 9 /* Size of one Rela reloc */
-+#define DT_STRSZ 10 /* Size of string table */
-+#define DT_SYMENT 11 /* Size of one symbol table entry */
-+#define DT_INIT 12 /* Address of init function */
-+#define DT_FINI 13 /* Address of termination function */
-+#define DT_SONAME 14 /* Name of shared object */
-+#define DT_RPATH 15 /* Library search path (deprecated) */
-+#define DT_SYMBOLIC 16 /* Start symbol search here */
-+#define DT_REL 17 /* Address of Rel relocs */
-+#define DT_RELSZ 18 /* Total size of Rel relocs */
-+#define DT_RELENT 19 /* Size of one Rel reloc */
-+#define DT_PLTREL 20 /* Type of reloc in PLT */
-+#define DT_DEBUG 21 /* For debugging; unspecified */
-+#define DT_TEXTREL 22 /* Reloc might modify .text */
-+#define DT_JMPREL 23 /* Address of PLT relocs */
-+#define DT_BIND_NOW 24 /* Process relocations of object */
-+#define DT_INIT_ARRAY 25 /* Array with addresses of init fct */
-+#define DT_FINI_ARRAY 26 /* Array with addresses of fini fct */
-+#define DT_INIT_ARRAYSZ 27 /* Size in bytes of DT_INIT_ARRAY */
-+#define DT_FINI_ARRAYSZ 28 /* Size in bytes of DT_FINI_ARRAY */
-+#define DT_RUNPATH 29 /* Library search path */
-+#define DT_FLAGS 30 /* Flags for the object being loaded */
-+#define DT_ENCODING 32 /* Start of encoded range */
-+#define DT_PREINIT_ARRAY 32 /* Array with addresses of preinit fct*/
-+#define DT_PREINIT_ARRAYSZ 33 /* size in bytes of DT_PREINIT_ARRAY */
-+#define DT_NUM 34 /* Number used */
-+#define DT_LOOS 0x6000000d /* Start of OS-specific */
-+#define DT_HIOS 0x6ffff000 /* End of OS-specific */
-+#define DT_LOPROC 0x70000000 /* Start of processor-specific */
-+#define DT_HIPROC 0x7fffffff /* End of processor-specific */
-+#define DT_PROCNUM DT_MIPS_NUM /* Most used by any processor */
-+
-+/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
-+ Dyn.d_un.d_val field of the Elf*_Dyn structure. This follows Sun's
-+ approach. */
-+#define DT_VALRNGLO 0x6ffffd00
-+#define DT_GNU_PRELINKED 0x6ffffdf5 /* Prelinking timestamp */
-+#define DT_GNU_CONFLICTSZ 0x6ffffdf6 /* Size of conflict section */
-+#define DT_GNU_LIBLISTSZ 0x6ffffdf7 /* Size of library list */
-+#define DT_CHECKSUM 0x6ffffdf8
-+#define DT_PLTPADSZ 0x6ffffdf9
-+#define DT_MOVEENT 0x6ffffdfa
-+#define DT_MOVESZ 0x6ffffdfb
-+#define DT_FEATURE_1 0x6ffffdfc /* Feature selection (DTF_*). */
-+#define DT_POSFLAG_1 0x6ffffdfd /* Flags for DT_* entries, effecting
-+ the following DT_* entry. */
-+#define DT_SYMINSZ 0x6ffffdfe /* Size of syminfo table (in bytes) */
-+#define DT_SYMINENT 0x6ffffdff /* Entry size of syminfo */
-+#define DT_VALRNGHI 0x6ffffdff
-+#define DT_VALTAGIDX(tag) (DT_VALRNGHI - (tag)) /* Reverse order! */
-+#define DT_VALNUM 12
-+
-+/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
-+ Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
-+
-+ If any adjustment is made to the ELF object after it has been
-+ built these entries will need to be adjusted. */
-+#define DT_ADDRRNGLO 0x6ffffe00
-+#define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table. */
-+#define DT_GNU_CONFLICT 0x6ffffef8 /* Start of conflict section */
-+#define DT_GNU_LIBLIST 0x6ffffef9 /* Library list */
-+#define DT_CONFIG 0x6ffffefa /* Configuration information. */
-+#define DT_DEPAUDIT 0x6ffffefb /* Dependency auditing. */
-+#define DT_AUDIT 0x6ffffefc /* Object auditing. */
-+#define DT_PLTPAD 0x6ffffefd /* PLT padding. */
-+#define DT_MOVETAB 0x6ffffefe /* Move table. */
-+#define DT_SYMINFO 0x6ffffeff /* Syminfo table. */
-+#define DT_ADDRRNGHI 0x6ffffeff
-+#define DT_ADDRTAGIDX(tag) (DT_ADDRRNGHI - (tag)) /* Reverse order! */
-+#define DT_ADDRNUM 10
-+
-+/* The versioning entry types. The next are defined as part of the
-+ GNU extension. */
-+#define DT_VERSYM 0x6ffffff0
-+
-+#define DT_RELACOUNT 0x6ffffff9
-+#define DT_RELCOUNT 0x6ffffffa
-+
-+/* These were chosen by Sun. */
-+#define DT_FLAGS_1 0x6ffffffb /* State flags, see DF_1_* below. */
-+#define DT_VERDEF 0x6ffffffc /* Address of version definition
-+ table */
-+#define DT_VERDEFNUM 0x6ffffffd /* Number of version definitions */
-+#define DT_VERNEED 0x6ffffffe /* Address of table with needed
-+ versions */
-+#define DT_VERNEEDNUM 0x6fffffff /* Number of needed versions */
-+#define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) /* Reverse order! */
-+#define DT_VERSIONTAGNUM 16
-+
-+/* Sun added these machine-independent extensions in the "processor-specific"
-+ range. Be compatible. */
-+#define DT_AUXILIARY 0x7ffffffd /* Shared object to load before self */
-+#define DT_FILTER 0x7fffffff /* Shared object to get values from */
-+#define DT_EXTRATAGIDX(tag) ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
-+#define DT_EXTRANUM 3
-+
-+/* Values of `d_un.d_val' in the DT_FLAGS entry. */
-+#define DF_ORIGIN 0x00000001 /* Object may use DF_ORIGIN */
-+#define DF_SYMBOLIC 0x00000002 /* Symbol resolutions starts here */
-+#define DF_TEXTREL 0x00000004 /* Object contains text relocations */
-+#define DF_BIND_NOW 0x00000008 /* No lazy binding for this object */
-+#define DF_STATIC_TLS 0x00000010 /* Module uses the static TLS model */
-+
-+/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
-+ entry in the dynamic section. */
-+#define DF_1_NOW 0x00000001 /* Set RTLD_NOW for this object. */
-+#define DF_1_GLOBAL 0x00000002 /* Set RTLD_GLOBAL for this object. */
-+#define DF_1_GROUP 0x00000004 /* Set RTLD_GROUP for this object. */
-+#define DF_1_NODELETE 0x00000008 /* Set RTLD_NODELETE for this object.*/
-+#define DF_1_LOADFLTR 0x00000010 /* Trigger filtee loading at runtime.*/
-+#define DF_1_INITFIRST 0x00000020 /* Set RTLD_INITFIRST for this object*/
-+#define DF_1_NOOPEN 0x00000040 /* Set RTLD_NOOPEN for this object. */
-+#define DF_1_ORIGIN 0x00000080 /* $ORIGIN must be handled. */
-+#define DF_1_DIRECT 0x00000100 /* Direct binding enabled. */
-+#define DF_1_TRANS 0x00000200
-+#define DF_1_INTERPOSE 0x00000400 /* Object is used to interpose. */
-+#define DF_1_NODEFLIB 0x00000800 /* Ignore default lib search path. */
-+#define DF_1_NODUMP 0x00001000 /* Object can't be dldump'ed. */
-+#define DF_1_CONFALT 0x00002000 /* Configuration alternative created.*/
-+#define DF_1_ENDFILTEE 0x00004000 /* Filtee terminates filters search. */
-+#define DF_1_DISPRELDNE 0x00008000 /* Disp reloc applied at build time. */
-+#define DF_1_DISPRELPND 0x00010000 /* Disp reloc applied at run-time. */
-+
-+/* Flags for the feature selection in DT_FEATURE_1. */
-+#define DTF_1_PARINIT 0x00000001
-+#define DTF_1_CONFEXP 0x00000002
-+
-+/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry. */
-+#define DF_P1_LAZYLOAD 0x00000001 /* Lazyload following object. */
-+#define DF_P1_GROUPPERM 0x00000002 /* Symbols from next object are not
-+ generally available. */
-+
-+/* Version definition sections. */
-+
-+typedef struct
-+{
-+ Elf32_Half vd_version; /* Version revision */
-+ Elf32_Half vd_flags; /* Version information */
-+ Elf32_Half vd_ndx; /* Version Index */
-+ Elf32_Half vd_cnt; /* Number of associated aux entries */
-+ Elf32_Word vd_hash; /* Version name hash value */
-+ Elf32_Word vd_aux; /* Offset in bytes to verdaux array */
-+ Elf32_Word vd_next; /* Offset in bytes to next verdef
-+ entry */
-+} Elf32_Verdef;
-+
-+typedef struct
-+{
-+ Elf64_Half vd_version; /* Version revision */
-+ Elf64_Half vd_flags; /* Version information */
-+ Elf64_Half vd_ndx; /* Version Index */
-+ Elf64_Half vd_cnt; /* Number of associated aux entries */
-+ Elf64_Word vd_hash; /* Version name hash value */
-+ Elf64_Word vd_aux; /* Offset in bytes to verdaux array */
-+ Elf64_Word vd_next; /* Offset in bytes to next verdef
-+ entry */
-+} Elf64_Verdef;
-+
-+
-+/* Legal values for vd_version (version revision). */
-+#define VER_DEF_NONE 0 /* No version */
-+#define VER_DEF_CURRENT 1 /* Current version */
-+#define VER_DEF_NUM 2 /* Given version number */
-+
-+/* Legal values for vd_flags (version information flags). */
-+#define VER_FLG_BASE 0x1 /* Version definition of file itself */
-+#define VER_FLG_WEAK 0x2 /* Weak version identifier */
-+
-+/* Versym symbol index values. */
-+#define VER_NDX_LOCAL 0 /* Symbol is local. */
-+#define VER_NDX_GLOBAL 1 /* Symbol is global. */
-+#define VER_NDX_LORESERVE 0xff00 /* Beginning of reserved entries. */
-+#define VER_NDX_ELIMINATE 0xff01 /* Symbol is to be eliminated. */
-+
-+/* Auxialiary version information. */
-+
-+typedef struct
-+{
-+ Elf32_Word vda_name; /* Version or dependency names */
-+ Elf32_Word vda_next; /* Offset in bytes to next verdaux
-+ entry */
-+} Elf32_Verdaux;
-+
-+typedef struct
-+{
-+ Elf64_Word vda_name; /* Version or dependency names */
-+ Elf64_Word vda_next; /* Offset in bytes to next verdaux
-+ entry */
-+} Elf64_Verdaux;
-+
-+
-+/* Version dependency section. */
-+
-+typedef struct
-+{
-+ Elf32_Half vn_version; /* Version of structure */
-+ Elf32_Half vn_cnt; /* Number of associated aux entries */
-+ Elf32_Word vn_file; /* Offset of filename for this
-+ dependency */
-+ Elf32_Word vn_aux; /* Offset in bytes to vernaux array */
-+ Elf32_Word vn_next; /* Offset in bytes to next verneed
-+ entry */
-+} Elf32_Verneed;
-+
-+typedef struct
-+{
-+ Elf64_Half vn_version; /* Version of structure */
-+ Elf64_Half vn_cnt; /* Number of associated aux entries */
-+ Elf64_Word vn_file; /* Offset of filename for this
-+ dependency */
-+ Elf64_Word vn_aux; /* Offset in bytes to vernaux array */
-+ Elf64_Word vn_next; /* Offset in bytes to next verneed
-+ entry */
-+} Elf64_Verneed;
-+
-+
-+/* Legal values for vn_version (version revision). */
-+#define VER_NEED_NONE 0 /* No version */
-+#define VER_NEED_CURRENT 1 /* Current version */
-+#define VER_NEED_NUM 2 /* Given version number */
-+
-+/* Auxiliary needed version information. */
-+
-+typedef struct
-+{
-+ Elf32_Word vna_hash; /* Hash value of dependency name */
-+ Elf32_Half vna_flags; /* Dependency specific information */
-+ Elf32_Half vna_other; /* Unused */
-+ Elf32_Word vna_name; /* Dependency name string offset */
-+ Elf32_Word vna_next; /* Offset in bytes to next vernaux
-+ entry */
-+} Elf32_Vernaux;
-+
-+typedef struct
-+{
-+ Elf64_Word vna_hash; /* Hash value of dependency name */
-+ Elf64_Half vna_flags; /* Dependency specific information */
-+ Elf64_Half vna_other; /* Unused */
-+ Elf64_Word vna_name; /* Dependency name string offset */
-+ Elf64_Word vna_next; /* Offset in bytes to next vernaux
-+ entry */
-+} Elf64_Vernaux;
-+
-+
-+/* Legal values for vna_flags. */
-+#define VER_FLG_WEAK 0x2 /* Weak version identifier */
-+
-+
-+/* Auxiliary vector. */
-+
-+/* This vector is normally only used by the program interpreter. The
-+ usual definition in an ABI supplement uses the name auxv_t. The
-+ vector is not usually defined in a standard <elf.h> file, but it
-+ can't hurt. We rename it to avoid conflicts. The sizes of these
-+ types are an arrangement between the exec server and the program
-+ interpreter, so we don't fully specify them here. */
-+
-+typedef struct
-+{
-+ uint32_t a_type; /* Entry type */
-+ union
-+ {
-+ uint32_t a_val; /* Integer value */
-+ /* We use to have pointer elements added here. We cannot do that,
-+ though, since it does not work when using 32-bit definitions
-+ on 64-bit platforms and vice versa. */
-+ } a_un;
-+} Elf32_auxv_t;
-+
-+typedef struct
-+{
-+ uint64_t a_type; /* Entry type */
-+ union
-+ {
-+ uint64_t a_val; /* Integer value */
-+ /* We use to have pointer elements added here. We cannot do that,
-+ though, since it does not work when using 32-bit definitions
-+ on 64-bit platforms and vice versa. */
-+ } a_un;
-+} Elf64_auxv_t;
-+
-+/* Legal values for a_type (entry type). */
-+
-+#define AT_NULL 0 /* End of vector */
-+#define AT_IGNORE 1 /* Entry should be ignored */
-+#define AT_EXECFD 2 /* File descriptor of program */
-+#define AT_PHDR 3 /* Program headers for program */
-+#define AT_PHENT 4 /* Size of program header entry */
-+#define AT_PHNUM 5 /* Number of program headers */
-+#define AT_PAGESZ 6 /* System page size */
-+#define AT_BASE 7 /* Base address of interpreter */
-+#define AT_FLAGS 8 /* Flags */
-+#define AT_ENTRY 9 /* Entry point of program */
-+#define AT_NOTELF 10 /* Program is not ELF */
-+#define AT_UID 11 /* Real uid */
-+#define AT_EUID 12 /* Effective uid */
-+#define AT_GID 13 /* Real gid */
-+#define AT_EGID 14 /* Effective gid */
-+#define AT_CLKTCK 17 /* Frequency of times() */
-+
-+/* Some more special a_type values describing the hardware. */
-+#define AT_PLATFORM 15 /* String identifying platform. */
-+#define AT_HWCAP 16 /* Machine dependent hints about
-+ processor capabilities. */
-+
-+/* This entry gives some information about the FPU initialization
-+ performed by the kernel. */
-+#define AT_FPUCW 18 /* Used FPU control word. */
-+
-+/* Cache block sizes. */
-+#define AT_DCACHEBSIZE 19 /* Data cache block size. */
-+#define AT_ICACHEBSIZE 20 /* Instruction cache block size. */
-+#define AT_UCACHEBSIZE 21 /* Unified cache block size. */
-+
-+/* A special ignored value for PPC, used by the kernel to control the
-+ interpretation of the AUXV. Must be > 16. */
-+#define AT_IGNOREPPC 22 /* Entry should be ignored. */
-+
-+#define AT_SECURE 23 /* Boolean, was exec setuid-like? */
-+
-+/* Pointer to the global system page used for system calls and other
-+ nice things. */
-+#define AT_SYSINFO 32
-+#define AT_SYSINFO_EHDR 33
-+
-+/* Shapes of the caches. Bits 0-3 contains associativity; bits 4-7 contains
-+ log2 of line size; mask those to get cache size. */
-+#define AT_L1I_CACHESHAPE 34
-+#define AT_L1D_CACHESHAPE 35
-+#define AT_L2_CACHESHAPE 36
-+#define AT_L3_CACHESHAPE 37
-+
-+/* Note section contents. Each entry in the note section begins with
-+ a header of a fixed form. */
-+
-+typedef struct
-+{
-+ Elf32_Word n_namesz; /* Length of the note's name. */
-+ Elf32_Word n_descsz; /* Length of the note's descriptor. */
-+ Elf32_Word n_type; /* Type of the note. */
-+} Elf32_Nhdr;
-+
-+typedef struct
-+{
-+ Elf64_Word n_namesz; /* Length of the note's name. */
-+ Elf64_Word n_descsz; /* Length of the note's descriptor. */
-+ Elf64_Word n_type; /* Type of the note. */
-+} Elf64_Nhdr;
-+
-+/* Known names of notes. */
-+
-+/* Solaris entries in the note section have this name. */
-+#define ELF_NOTE_SOLARIS "SUNW Solaris"
-+
-+/* Note entries for GNU systems have this name. */
-+#define ELF_NOTE_GNU "GNU"
-+
-+
-+/* Defined types of notes for Solaris. */
-+
-+/* Value of descriptor (one word) is desired pagesize for the binary. */
-+#define ELF_NOTE_PAGESIZE_HINT 1
-+
-+
-+/* Defined note types for GNU systems. */
-+
-+/* ABI information. The descriptor consists of words:
-+ word 0: OS descriptor
-+ word 1: major version of the ABI
-+ word 2: minor version of the ABI
-+ word 3: subminor version of the ABI
-+*/
-+#define ELF_NOTE_ABI 1
-+
-+/* Known OSes. These value can appear in word 0 of an ELF_NOTE_ABI
-+ note section entry. */
-+#define ELF_NOTE_OS_LINUX 0
-+#define ELF_NOTE_OS_GNU 1
-+#define ELF_NOTE_OS_SOLARIS2 2
-+#define ELF_NOTE_OS_FREEBSD 3
-+
-+
-+/* Move records. */
-+typedef struct
-+{
-+ Elf32_Xword m_value; /* Symbol value. */
-+ Elf32_Word m_info; /* Size and index. */
-+ Elf32_Word m_poffset; /* Symbol offset. */
-+ Elf32_Half m_repeat; /* Repeat count. */
-+ Elf32_Half m_stride; /* Stride info. */
-+} Elf32_Move;
-+
-+typedef struct
-+{
-+ Elf64_Xword m_value; /* Symbol value. */
-+ Elf64_Xword m_info; /* Size and index. */
-+ Elf64_Xword m_poffset; /* Symbol offset. */
-+ Elf64_Half m_repeat; /* Repeat count. */
-+ Elf64_Half m_stride; /* Stride info. */
-+} Elf64_Move;
-+
-+/* Macro to construct move records. */
-+#define ELF32_M_SYM(info) ((info) >> 8)
-+#define ELF32_M_SIZE(info) ((unsigned char) (info))
-+#define ELF32_M_INFO(sym, size) (((sym) << 8) + (unsigned char) (size))
-+
-+#define ELF64_M_SYM(info) ELF32_M_SYM (info)
-+#define ELF64_M_SIZE(info) ELF32_M_SIZE (info)
-+#define ELF64_M_INFO(sym, size) ELF32_M_INFO (sym, size)
-+
-+
-+/* Motorola 68k specific definitions. */
-+
-+/* Values for Elf32_Ehdr.e_flags. */
-+#define EF_CPU32 0x00810000
-+
-+/* m68k relocs. */
-+
-+#define R_68K_NONE 0 /* No reloc */
-+#define R_68K_32 1 /* Direct 32 bit */
-+#define R_68K_16 2 /* Direct 16 bit */
-+#define R_68K_8 3 /* Direct 8 bit */
-+#define R_68K_PC32 4 /* PC relative 32 bit */
-+#define R_68K_PC16 5 /* PC relative 16 bit */
-+#define R_68K_PC8 6 /* PC relative 8 bit */
-+#define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */
-+#define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */
-+#define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */
-+#define R_68K_GOT32O 10 /* 32 bit GOT offset */
-+#define R_68K_GOT16O 11 /* 16 bit GOT offset */
-+#define R_68K_GOT8O 12 /* 8 bit GOT offset */
-+#define R_68K_PLT32 13 /* 32 bit PC relative PLT address */
-+#define R_68K_PLT16 14 /* 16 bit PC relative PLT address */
-+#define R_68K_PLT8 15 /* 8 bit PC relative PLT address */
-+#define R_68K_PLT32O 16 /* 32 bit PLT offset */
-+#define R_68K_PLT16O 17 /* 16 bit PLT offset */
-+#define R_68K_PLT8O 18 /* 8 bit PLT offset */
-+#define R_68K_COPY 19 /* Copy symbol at runtime */
-+#define R_68K_GLOB_DAT 20 /* Create GOT entry */
-+#define R_68K_JMP_SLOT 21 /* Create PLT entry */
-+#define R_68K_RELATIVE 22 /* Adjust by program base */
-+/* Keep this the last entry. */
-+#define R_68K_NUM 23
-+
-+/* Intel 80386 specific definitions. */
-+
-+/* i386 relocs. */
-+
-+#define R_386_NONE 0 /* No reloc */
-+#define R_386_32 1 /* Direct 32 bit */
-+#define R_386_PC32 2 /* PC relative 32 bit */
-+#define R_386_GOT32 3 /* 32 bit GOT entry */
-+#define R_386_PLT32 4 /* 32 bit PLT address */
-+#define R_386_COPY 5 /* Copy symbol at runtime */
-+#define R_386_GLOB_DAT 6 /* Create GOT entry */
-+#define R_386_JMP_SLOT 7 /* Create PLT entry */
-+#define R_386_RELATIVE 8 /* Adjust by program base */
-+#define R_386_GOTOFF 9 /* 32 bit offset to GOT */
-+#define R_386_GOTPC 10 /* 32 bit PC relative offset to GOT */
-+#define R_386_32PLT 11
-+#define R_386_TLS_TPOFF 14 /* Offset in static TLS block */
-+#define R_386_TLS_IE 15 /* Address of GOT entry for static TLS
-+ block offset */
-+#define R_386_TLS_GOTIE 16 /* GOT entry for static TLS block
-+ offset */
-+#define R_386_TLS_LE 17 /* Offset relative to static TLS
-+ block */
-+#define R_386_TLS_GD 18 /* Direct 32 bit for GNU version of
-+ general dynamic thread local data */
-+#define R_386_TLS_LDM 19 /* Direct 32 bit for GNU version of
-+ local dynamic thread local data
-+ in LE code */
-+#define R_386_16 20
-+#define R_386_PC16 21
-+#define R_386_8 22
-+#define R_386_PC8 23
-+#define R_386_TLS_GD_32 24 /* Direct 32 bit for general dynamic
-+ thread local data */
-+#define R_386_TLS_GD_PUSH 25 /* Tag for pushl in GD TLS code */
-+#define R_386_TLS_GD_CALL 26 /* Relocation for call to
-+ __tls_get_addr() */
-+#define R_386_TLS_GD_POP 27 /* Tag for popl in GD TLS code */
-+#define R_386_TLS_LDM_32 28 /* Direct 32 bit for local dynamic
-+ thread local data in LE code */
-+#define R_386_TLS_LDM_PUSH 29 /* Tag for pushl in LDM TLS code */
-+#define R_386_TLS_LDM_CALL 30 /* Relocation for call to
-+ __tls_get_addr() in LDM code */
-+#define R_386_TLS_LDM_POP 31 /* Tag for popl in LDM TLS code */
-+#define R_386_TLS_LDO_32 32 /* Offset relative to TLS block */
-+#define R_386_TLS_IE_32 33 /* GOT entry for negated static TLS
-+ block offset */
-+#define R_386_TLS_LE_32 34 /* Negated offset relative to static
-+ TLS block */
-+#define R_386_TLS_DTPMOD32 35 /* ID of module containing symbol */
-+#define R_386_TLS_DTPOFF32 36 /* Offset in TLS block */
-+#define R_386_TLS_TPOFF32 37 /* Negated offset in static TLS block */
-+/* Keep this the last entry. */
-+#define R_386_NUM 38
-+
-+/* Blackfin specific definitions. */
-+#define R_BFIN_UNUSED0 0x00
-+#define R_BFIN_PCREL5M2 0x01
-+#define R_BFIN_UNUSED1 0x02
-+#define R_BFIN_PCREL10 0x03
-+#define R_BFIN_PCREL12_JUMP 0x04
-+#define R_BFIN_RIMM16 0x05
-+#define R_BFIN_LUIMM16 0x06
-+#define R_BFIN_HUIMM16 0x07
-+#define R_BFIN_PCREL12_JUMP_S 0x08
-+#define R_BFIN_PCREL24_JUMP_X 0x09
-+#define R_BFIN_PCREL24 0x0a
-+#define R_BFIN_UNUSEDB 0x0b
-+#define R_BFIN_UNUSEDC 0x0c
-+#define R_BFIN_PCREL24_JUMP_L 0x0d
-+#define R_BFIN_PCREL24_CALL_X 0x0e
-+#define R_BFIN_var_eq_symb 0x0f
-+#define R_BFIN_BYTE_DATA 0x10
-+#define R_BFIN_BYTE2_DATA 0x11
-+#define R_BFIN_BYTE4_DATA 0x12
-+#define R_BFIN_PCREL11 0x13
-+
-+#define R_BFIN_GOT17M4 0x14
-+#define R_BFIN_GOTHI 0x15
-+#define R_BFIN_GOTLO 0x16
-+#define R_BFIN_FUNCDESC 0x17
-+#define R_BFIN_FUNCDESC_GOT17M4 0x18
-+#define R_BFIN_FUNCDESC_GOTHI 0x19
-+#define R_BFIN_FUNCDESC_GOTLO 0x1a
-+#define R_BFIN_FUNCDESC_VALUE 0x1b
-+#define R_BFIN_FUNCDESC_GOTOFF17M4 0x1c
-+#define R_BFIN_FUNCDESC_GOTOFFHI 0x1d
-+#define R_BFIN_FUNCDESC_GOTOFFLO 0x1e
-+#define R_BFIN_GOTOFF17M4 0x1f
-+#define R_BFIN_GOTOFFHI 0x20
-+#define R_BFIN_GOTOFFLO 0x21
-+
-+#define EF_BFIN_PIC 0x00000001 /* -fpic */
-+#define EF_BFIN_FDPIC 0x00000002 /* -mfdpic */
-+#define EF_BFIN_CODE_IN_L1 0x00000010 /* --code-in-l1 */
-+#define EF_BFIN_DATA_IN_L1 0x00000020 /* --data-in-l1 */
-+
-+/* FR-V specific definitions. */
-+#define R_FRV_NONE 0 /* No reloc. */
-+#define R_FRV_32 1 /* Direct 32 bit. */
-+/* Canonical function descriptor address. */
-+#define R_FRV_FUNCDESC 14
-+/* Private function descriptor initialization. */
-+#define R_FRV_FUNCDESC_VALUE 18
-+
-+ /* gpr support */
-+#define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */
-+#define EF_FRV_GPR_32 0x00000001 /* -mgpr-32 */
-+#define EF_FRV_GPR_64 0x00000002 /* -mgpr-64 */
-+
-+ /* fpr support */
-+#define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */
-+#define EF_FRV_FPR_32 0x00000004 /* -mfpr-32 */
-+#define EF_FRV_FPR_64 0x00000008 /* -mfpr-64 */
-+#define EF_FRV_FPR_NONE 0x0000000c /* -msoft-float */
-+
-+#define EF_FRV_PIC 0x00000100
-+#define EF_FRV_FDPIC 0x00008000
-+
-+/* SUN SPARC specific definitions. */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type). */
-+
-+#define STT_SPARC_REGISTER 13 /* Global register reserved to app. */
-+
-+/* Values for Elf64_Ehdr.e_flags. */
-+
-+#define EF_SPARCV9_MM 3
-+#define EF_SPARCV9_TSO 0
-+#define EF_SPARCV9_PSO 1
-+#define EF_SPARCV9_RMO 2
-+#define EF_SPARC_LEDATA 0x800000 /* little endian data */
-+#define EF_SPARC_EXT_MASK 0xFFFF00
-+#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
-+#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
-+#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
-+#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
-+
-+/* SPARC relocs. */
-+
-+#define R_SPARC_NONE 0 /* No reloc */
-+#define R_SPARC_8 1 /* Direct 8 bit */
-+#define R_SPARC_16 2 /* Direct 16 bit */
-+#define R_SPARC_32 3 /* Direct 32 bit */
-+#define R_SPARC_DISP8 4 /* PC relative 8 bit */
-+#define R_SPARC_DISP16 5 /* PC relative 16 bit */
-+#define R_SPARC_DISP32 6 /* PC relative 32 bit */
-+#define R_SPARC_WDISP30 7 /* PC relative 30 bit shifted */
-+#define R_SPARC_WDISP22 8 /* PC relative 22 bit shifted */
-+#define R_SPARC_HI22 9 /* High 22 bit */
-+#define R_SPARC_22 10 /* Direct 22 bit */
-+#define R_SPARC_13 11 /* Direct 13 bit */
-+#define R_SPARC_LO10 12 /* Truncated 10 bit */
-+#define R_SPARC_GOT10 13 /* Truncated 10 bit GOT entry */
-+#define R_SPARC_GOT13 14 /* 13 bit GOT entry */
-+#define R_SPARC_GOT22 15 /* 22 bit GOT entry shifted */
-+#define R_SPARC_PC10 16 /* PC relative 10 bit truncated */
-+#define R_SPARC_PC22 17 /* PC relative 22 bit shifted */
-+#define R_SPARC_WPLT30 18 /* 30 bit PC relative PLT address */
-+#define R_SPARC_COPY 19 /* Copy symbol at runtime */
-+#define R_SPARC_GLOB_DAT 20 /* Create GOT entry */
-+#define R_SPARC_JMP_SLOT 21 /* Create PLT entry */
-+#define R_SPARC_RELATIVE 22 /* Adjust by program base */
-+#define R_SPARC_UA32 23 /* Direct 32 bit unaligned */
-+
-+/* Additional Sparc64 relocs. */
-+
-+#define R_SPARC_PLT32 24 /* Direct 32 bit ref to PLT entry */
-+#define R_SPARC_HIPLT22 25 /* High 22 bit PLT entry */
-+#define R_SPARC_LOPLT10 26 /* Truncated 10 bit PLT entry */
-+#define R_SPARC_PCPLT32 27 /* PC rel 32 bit ref to PLT entry */
-+#define R_SPARC_PCPLT22 28 /* PC rel high 22 bit PLT entry */
-+#define R_SPARC_PCPLT10 29 /* PC rel trunc 10 bit PLT entry */
-+#define R_SPARC_10 30 /* Direct 10 bit */
-+#define R_SPARC_11 31 /* Direct 11 bit */
-+#define R_SPARC_64 32 /* Direct 64 bit */
-+#define R_SPARC_OLO10 33 /* 10bit with secondary 13bit addend */
-+#define R_SPARC_HH22 34 /* Top 22 bits of direct 64 bit */
-+#define R_SPARC_HM10 35 /* High middle 10 bits of ... */
-+#define R_SPARC_LM22 36 /* Low middle 22 bits of ... */
-+#define R_SPARC_PC_HH22 37 /* Top 22 bits of pc rel 64 bit */
-+#define R_SPARC_PC_HM10 38 /* High middle 10 bit of ... */
-+#define R_SPARC_PC_LM22 39 /* Low miggle 22 bits of ... */
-+#define R_SPARC_WDISP16 40 /* PC relative 16 bit shifted */
-+#define R_SPARC_WDISP19 41 /* PC relative 19 bit shifted */
-+#define R_SPARC_7 43 /* Direct 7 bit */
-+#define R_SPARC_5 44 /* Direct 5 bit */
-+#define R_SPARC_6 45 /* Direct 6 bit */
-+#define R_SPARC_DISP64 46 /* PC relative 64 bit */
-+#define R_SPARC_PLT64 47 /* Direct 64 bit ref to PLT entry */
-+#define R_SPARC_HIX22 48 /* High 22 bit complemented */
-+#define R_SPARC_LOX10 49 /* Truncated 11 bit complemented */
-+#define R_SPARC_H44 50 /* Direct high 12 of 44 bit */
-+#define R_SPARC_M44 51 /* Direct mid 22 of 44 bit */
-+#define R_SPARC_L44 52 /* Direct low 10 of 44 bit */
-+#define R_SPARC_REGISTER 53 /* Global register usage */
-+#define R_SPARC_UA64 54 /* Direct 64 bit unaligned */
-+#define R_SPARC_UA16 55 /* Direct 16 bit unaligned */
-+#define R_SPARC_TLS_GD_HI22 56
-+#define R_SPARC_TLS_GD_LO10 57
-+#define R_SPARC_TLS_GD_ADD 58
-+#define R_SPARC_TLS_GD_CALL 59
-+#define R_SPARC_TLS_LDM_HI22 60
-+#define R_SPARC_TLS_LDM_LO10 61
-+#define R_SPARC_TLS_LDM_ADD 62
-+#define R_SPARC_TLS_LDM_CALL 63
-+#define R_SPARC_TLS_LDO_HIX22 64
-+#define R_SPARC_TLS_LDO_LOX10 65
-+#define R_SPARC_TLS_LDO_ADD 66
-+#define R_SPARC_TLS_IE_HI22 67
-+#define R_SPARC_TLS_IE_LO10 68
-+#define R_SPARC_TLS_IE_LD 69
-+#define R_SPARC_TLS_IE_LDX 70
-+#define R_SPARC_TLS_IE_ADD 71
-+#define R_SPARC_TLS_LE_HIX22 72
-+#define R_SPARC_TLS_LE_LOX10 73
-+#define R_SPARC_TLS_DTPMOD32 74
-+#define R_SPARC_TLS_DTPMOD64 75
-+#define R_SPARC_TLS_DTPOFF32 76
-+#define R_SPARC_TLS_DTPOFF64 77
-+#define R_SPARC_TLS_TPOFF32 78
-+#define R_SPARC_TLS_TPOFF64 79
-+/* Keep this the last entry. */
-+#define R_SPARC_NUM 80
-+
-+/* For Sparc64, legal values for d_tag of Elf64_Dyn. */
-+
-+#define DT_SPARC_REGISTER 0x70000001
-+#define DT_SPARC_NUM 2
-+
-+/* Bits present in AT_HWCAP, primarily for Sparc32. */
-+
-+#define HWCAP_SPARC_FLUSH 1 /* The cpu supports flush insn. */
-+#define HWCAP_SPARC_STBAR 2
-+#define HWCAP_SPARC_SWAP 4
-+#define HWCAP_SPARC_MULDIV 8
-+#define HWCAP_SPARC_V9 16 /* The cpu is v9, so v8plus is ok. */
-+#define HWCAP_SPARC_ULTRA3 32
-+
-+/* MIPS R3000 specific definitions. */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr. */
-+
-+#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used */
-+#define EF_MIPS_PIC 2 /* Contains PIC code */
-+#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */
-+#define EF_MIPS_XGOT 8
-+#define EF_MIPS_64BIT_WHIRL 16
-+#define EF_MIPS_ABI2 32
-+#define EF_MIPS_ABI_ON32 64
-+#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */
-+
-+/* Legal values for MIPS architecture level. */
-+
-+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
-+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
-+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
-+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
-+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
-+#define EF_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */
-+#define EF_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */
-+
-+/* The following are non-official names and should not be used. */
-+
-+#define E_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
-+#define E_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
-+#define E_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
-+#define E_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
-+#define E_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
-+#define E_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */
-+#define E_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */
-+
-+/* Special section indices. */
-+
-+#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */
-+#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
-+#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
-+#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
-+#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
-+
-+/* Legal values for sh_type field of Elf32_Shdr. */
-+
-+#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */
-+#define SHT_MIPS_MSYM 0x70000001
-+#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */
-+#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */
-+#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */
-+#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information*/
-+#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */
-+#define SHT_MIPS_PACKAGE 0x70000007
-+#define SHT_MIPS_PACKSYM 0x70000008
-+#define SHT_MIPS_RELD 0x70000009
-+#define SHT_MIPS_IFACE 0x7000000b
-+#define SHT_MIPS_CONTENT 0x7000000c
-+#define SHT_MIPS_OPTIONS 0x7000000d /* Miscellaneous options. */
-+#define SHT_MIPS_SHDR 0x70000010
-+#define SHT_MIPS_FDESC 0x70000011
-+#define SHT_MIPS_EXTSYM 0x70000012
-+#define SHT_MIPS_DENSE 0x70000013
-+#define SHT_MIPS_PDESC 0x70000014
-+#define SHT_MIPS_LOCSYM 0x70000015
-+#define SHT_MIPS_AUXSYM 0x70000016
-+#define SHT_MIPS_OPTSYM 0x70000017
-+#define SHT_MIPS_LOCSTR 0x70000018
-+#define SHT_MIPS_LINE 0x70000019
-+#define SHT_MIPS_RFDESC 0x7000001a
-+#define SHT_MIPS_DELTASYM 0x7000001b
-+#define SHT_MIPS_DELTAINST 0x7000001c
-+#define SHT_MIPS_DELTACLASS 0x7000001d
-+#define SHT_MIPS_DWARF 0x7000001e /* DWARF debugging information. */
-+#define SHT_MIPS_DELTADECL 0x7000001f
-+#define SHT_MIPS_SYMBOL_LIB 0x70000020
-+#define SHT_MIPS_EVENTS 0x70000021 /* Event section. */
-+#define SHT_MIPS_TRANSLATE 0x70000022
-+#define SHT_MIPS_PIXIE 0x70000023
-+#define SHT_MIPS_XLATE 0x70000024
-+#define SHT_MIPS_XLATE_DEBUG 0x70000025
-+#define SHT_MIPS_WHIRL 0x70000026
-+#define SHT_MIPS_EH_REGION 0x70000027
-+#define SHT_MIPS_XLATE_OLD 0x70000028
-+#define SHT_MIPS_PDR_EXCEPTION 0x70000029
-+
-+/* Legal values for sh_flags field of Elf32_Shdr. */
-+
-+#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */
-+#define SHF_MIPS_MERGE 0x20000000
-+#define SHF_MIPS_ADDR 0x40000000
-+#define SHF_MIPS_STRINGS 0x80000000
-+#define SHF_MIPS_NOSTRIP 0x08000000
-+#define SHF_MIPS_LOCAL 0x04000000
-+#define SHF_MIPS_NAMES 0x02000000
-+#define SHF_MIPS_NODUPE 0x01000000
-+
-+
-+/* Symbol tables. */
-+
-+/* MIPS specific values for `st_other'. */
-+#define STO_MIPS_DEFAULT 0x0
-+#define STO_MIPS_INTERNAL 0x1
-+#define STO_MIPS_HIDDEN 0x2
-+#define STO_MIPS_PROTECTED 0x3
-+#define STO_MIPS_PLT 0x8
-+#define STO_MIPS_SC_ALIGN_UNUSED 0xff
-+
-+/* MIPS specific values for `st_info'. */
-+#define STB_MIPS_SPLIT_COMMON 13
-+
-+/* Entries found in sections of type SHT_MIPS_GPTAB. */
-+
-+typedef union
-+{
-+ struct
-+ {
-+ Elf32_Word gt_current_g_value; /* -G value used for compilation */
-+ Elf32_Word gt_unused; /* Not used */
-+ } gt_header; /* First entry in section */
-+ struct
-+ {
-+ Elf32_Word gt_g_value; /* If this value were used for -G */
-+ Elf32_Word gt_bytes; /* This many bytes would be used */
-+ } gt_entry; /* Subsequent entries in section */
-+} Elf32_gptab;
-+
-+/* Entry found in sections of type SHT_MIPS_REGINFO. */
-+
-+typedef struct
-+{
-+ Elf32_Word ri_gprmask; /* General registers used */
-+ Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */
-+ Elf32_Sword ri_gp_value; /* $gp register value */
-+} Elf32_RegInfo;
-+
-+/* Entries found in sections of type SHT_MIPS_OPTIONS. */
-+
-+typedef struct
-+{
-+ unsigned char kind; /* Determines interpretation of the
-+ variable part of descriptor. */
-+ unsigned char size; /* Size of descriptor, including header. */
-+ Elf32_Section section; /* Section header index of section affected,
-+ 0 for global options. */
-+ Elf32_Word info; /* Kind-specific information. */
-+} Elf_Options;
-+
-+/* Values for `kind' field in Elf_Options. */
-+
-+#define ODK_NULL 0 /* Undefined. */
-+#define ODK_REGINFO 1 /* Register usage information. */
-+#define ODK_EXCEPTIONS 2 /* Exception processing options. */
-+#define ODK_PAD 3 /* Section padding options. */
-+#define ODK_HWPATCH 4 /* Hardware workarounds performed */
-+#define ODK_FILL 5 /* record the fill value used by the linker. */
-+#define ODK_TAGS 6 /* reserve space for desktop tools to write. */
-+#define ODK_HWAND 7 /* HW workarounds. 'AND' bits when merging. */
-+#define ODK_HWOR 8 /* HW workarounds. 'OR' bits when merging. */
-+
-+/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries. */
-+
-+#define OEX_FPU_MIN 0x1f /* FPE's which MUST be enabled. */
-+#define OEX_FPU_MAX 0x1f00 /* FPE's which MAY be enabled. */
-+#define OEX_PAGE0 0x10000 /* page zero must be mapped. */
-+#define OEX_SMM 0x20000 /* Force sequential memory mode? */
-+#define OEX_FPDBUG 0x40000 /* Force floating point debug mode? */
-+#define OEX_PRECISEFP OEX_FPDBUG
-+#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults? */
-+
-+#define OEX_FPU_INVAL 0x10
-+#define OEX_FPU_DIV0 0x08
-+#define OEX_FPU_OFLO 0x04
-+#define OEX_FPU_UFLO 0x02
-+#define OEX_FPU_INEX 0x01
-+
-+/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry. */
-+
-+#define OHW_R4KEOP 0x1 /* R4000 end-of-page patch. */
-+#define OHW_R8KPFETCH 0x2 /* may need R8000 prefetch patch. */
-+#define OHW_R5KEOP 0x4 /* R5000 end-of-page patch. */
-+#define OHW_R5KCVTL 0x8 /* R5000 cvt.[ds].l bug. clean=1. */
-+
-+#define OPAD_PREFIX 0x1
-+#define OPAD_POSTFIX 0x2
-+#define OPAD_SYMBOL 0x4
-+
-+/* Entry found in `.options' section. */
-+
-+typedef struct
-+{
-+ Elf32_Word hwp_flags1; /* Extra flags. */
-+ Elf32_Word hwp_flags2; /* Extra flags. */
-+} Elf_Options_Hw;
-+
-+/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries. */
-+
-+#define OHWA0_R4KEOP_CHECKED 0x00000001
-+#define OHWA1_R4KEOP_CLEAN 0x00000002
-+
-+/* MIPS relocs. */
-+
-+#define R_MIPS_NONE 0 /* No reloc */
-+#define R_MIPS_16 1 /* Direct 16 bit */
-+#define R_MIPS_32 2 /* Direct 32 bit */
-+#define R_MIPS_REL32 3 /* PC relative 32 bit */
-+#define R_MIPS_26 4 /* Direct 26 bit shifted */
-+#define R_MIPS_HI16 5 /* High 16 bit */
-+#define R_MIPS_LO16 6 /* Low 16 bit */
-+#define R_MIPS_GPREL16 7 /* GP relative 16 bit */
-+#define R_MIPS_LITERAL 8 /* 16 bit literal entry */
-+#define R_MIPS_GOT16 9 /* 16 bit GOT entry */
-+#define R_MIPS_PC16 10 /* PC relative 16 bit */
-+#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */
-+#define R_MIPS_GPREL32 12 /* GP relative 32 bit */
-+
-+#define R_MIPS_SHIFT5 16
-+#define R_MIPS_SHIFT6 17
-+#define R_MIPS_64 18
-+#define R_MIPS_GOT_DISP 19
-+#define R_MIPS_GOT_PAGE 20
-+#define R_MIPS_GOT_OFST 21
-+#define R_MIPS_GOT_HI16 22
-+#define R_MIPS_GOT_LO16 23
-+#define R_MIPS_SUB 24
-+#define R_MIPS_INSERT_A 25
-+#define R_MIPS_INSERT_B 26
-+#define R_MIPS_DELETE 27
-+#define R_MIPS_HIGHER 28
-+#define R_MIPS_HIGHEST 29
-+#define R_MIPS_CALL_HI16 30
-+#define R_MIPS_CALL_LO16 31
-+#define R_MIPS_SCN_DISP 32
-+#define R_MIPS_REL16 33
-+#define R_MIPS_ADD_IMMEDIATE 34
-+#define R_MIPS_PJUMP 35
-+#define R_MIPS_RELGOT 36
-+#define R_MIPS_JALR 37
-+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
-+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
-+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
-+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
-+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
-+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
-+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
-+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
-+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
-+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
-+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
-+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
-+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
-+#define R_MIPS_GLOB_DAT 51
-+#define R_MIPS_COPY 126
-+#define R_MIPS_JUMP_SLOT 127
-+/* Keep this the last entry. */
-+#define R_MIPS_NUM 128
-+
-+/* Legal values for p_type field of Elf32_Phdr. */
-+
-+#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
-+#define PT_MIPS_RTPROC 0x70000001 /* Runtime procedure table. */
-+#define PT_MIPS_OPTIONS 0x70000002
-+
-+/* Special program header types. */
-+
-+#define PF_MIPS_LOCAL 0x10000000
-+
-+/* Legal values for d_tag field of Elf32_Dyn. */
-+
-+#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime linker interface version */
-+#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */
-+#define DT_MIPS_ICHECKSUM 0x70000003 /* Checksum */
-+#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */
-+#define DT_MIPS_FLAGS 0x70000005 /* Flags */
-+#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Base address */
-+#define DT_MIPS_MSYM 0x70000007
-+#define DT_MIPS_CONFLICT 0x70000008 /* Address of CONFLICT section */
-+#define DT_MIPS_LIBLIST 0x70000009 /* Address of LIBLIST section */
-+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local GOT entries */
-+#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of CONFLICT entries */
-+#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of LIBLIST entries */
-+#define DT_MIPS_SYMTABNO 0x70000011 /* Number of DYNSYM entries */
-+#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */
-+#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in DYNSYM */
-+#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */
-+#define DT_MIPS_RLD_MAP 0x70000016 /* Address of run time loader map. */
-+#define DT_MIPS_DELTA_CLASS 0x70000017 /* Delta C++ class definition. */
-+#define DT_MIPS_DELTA_CLASS_NO 0x70000018 /* Number of entries in
-+ DT_MIPS_DELTA_CLASS. */
-+#define DT_MIPS_DELTA_INSTANCE 0x70000019 /* Delta C++ class instances. */
-+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
-+ DT_MIPS_DELTA_INSTANCE. */
-+#define DT_MIPS_DELTA_RELOC 0x7000001b /* Delta relocations. */
-+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
-+ DT_MIPS_DELTA_RELOC. */
-+#define DT_MIPS_DELTA_SYM 0x7000001d /* Delta symbols that Delta
-+ relocations refer to. */
-+#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
-+ DT_MIPS_DELTA_SYM. */
-+#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
-+ class declaration. */
-+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
-+ DT_MIPS_DELTA_CLASSSYM. */
-+#define DT_MIPS_CXX_FLAGS 0x70000022 /* Flags indicating for C++ flavor. */
-+#define DT_MIPS_PIXIE_INIT 0x70000023
-+#define DT_MIPS_SYMBOL_LIB 0x70000024
-+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
-+#define DT_MIPS_LOCAL_GOTIDX 0x70000026
-+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
-+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
-+#define DT_MIPS_OPTIONS 0x70000029 /* Address of .options. */
-+#define DT_MIPS_INTERFACE 0x7000002a /* Address of .interface. */
-+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
-+#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
-+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
-+ function stored in GOT. */
-+#define DT_MIPS_PERF_SUFFIX 0x7000002e /* Default suffix of dso to be added
-+ by rld on dlopen() calls. */
-+#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
-+#define DT_MIPS_GP_VALUE 0x70000030 /* GP value for aux GOTs. */
-+#define DT_MIPS_AUX_DYNAMIC 0x70000031 /* Address of aux .dynamic. */
-+/* The address of .got.plt in an executable using the new non-PIC ABI. */
-+#define DT_MIPS_PLTGOT 0x70000032
-+/* The base of the PLT in an executable using the new non-PIC ABI if that
-+ PLT is writable. For a non-writable PLT, this is omitted or has a zero
-+ value. */
-+#define DT_MIPS_RWPLT 0x70000034
-+#define DT_MIPS_NUM 0x35
-+
-+/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry. */
-+
-+#define RHF_NONE 0 /* No flags */
-+#define RHF_QUICKSTART (1 << 0) /* Use quickstart */
-+#define RHF_NOTPOT (1 << 1) /* Hash size not power of 2 */
-+#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2) /* Ignore LD_LIBRARY_PATH */
-+#define RHF_NO_MOVE (1 << 3)
-+#define RHF_SGI_ONLY (1 << 4)
-+#define RHF_GUARANTEE_INIT (1 << 5)
-+#define RHF_DELTA_C_PLUS_PLUS (1 << 6)
-+#define RHF_GUARANTEE_START_INIT (1 << 7)
-+#define RHF_PIXIE (1 << 8)
-+#define RHF_DEFAULT_DELAY_LOAD (1 << 9)
-+#define RHF_REQUICKSTART (1 << 10)
-+#define RHF_REQUICKSTARTED (1 << 11)
-+#define RHF_CORD (1 << 12)
-+#define RHF_NO_UNRES_UNDEF (1 << 13)
-+#define RHF_RLD_ORDER_SAFE (1 << 14)
-+
-+/* Entries found in sections of type SHT_MIPS_LIBLIST. */
-+
-+typedef struct
-+{
-+ Elf32_Word l_name; /* Name (string table index) */
-+ Elf32_Word l_time_stamp; /* Timestamp */
-+ Elf32_Word l_checksum; /* Checksum */
-+ Elf32_Word l_version; /* Interface version */
-+ Elf32_Word l_flags; /* Flags */
-+} Elf32_Lib;
-+
-+typedef struct
-+{
-+ Elf64_Word l_name; /* Name (string table index) */
-+ Elf64_Word l_time_stamp; /* Timestamp */
-+ Elf64_Word l_checksum; /* Checksum */
-+ Elf64_Word l_version; /* Interface version */
-+ Elf64_Word l_flags; /* Flags */
-+} Elf64_Lib;
-+
-+
-+/* Legal values for l_flags. */
-+
-+#define LL_NONE 0
-+#define LL_EXACT_MATCH (1 << 0) /* Require exact match */
-+#define LL_IGNORE_INT_VER (1 << 1) /* Ignore interface version */
-+#define LL_REQUIRE_MINOR (1 << 2)
-+#define LL_EXPORTS (1 << 3)
-+#define LL_DELAY_LOAD (1 << 4)
-+#define LL_DELTA (1 << 5)
-+
-+/* Entries found in sections of type SHT_MIPS_CONFLICT. */
-+
-+typedef Elf32_Addr Elf32_Conflict;
-+
-+
-+/* HPPA specific definitions. */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr. */
-+
-+#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
-+#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
-+#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
-+#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
-+#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
-+ prediction. */
-+#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
-+#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
-+
-+/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
-+
-+#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
-+#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
-+#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
-+
-+/* Additional section indeces. */
-+
-+#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
-+ symbols in ANSI C. */
-+#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
-+
-+/* Legal values for sh_type field of Elf32_Shdr. */
-+
-+#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
-+#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
-+#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
-+
-+/* Legal values for sh_flags field of Elf32_Shdr. */
-+
-+#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
-+#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
-+#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type). */
-+
-+#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
-+
-+#define STT_HP_OPAQUE (STT_LOOS + 0x1)
-+#define STT_HP_STUB (STT_LOOS + 0x2)
-+
-+/* HPPA relocs. */
-+
-+#define R_PARISC_NONE 0 /* No reloc. */
-+#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
-+#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
-+#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
-+#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
-+#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
-+#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
-+#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
-+#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
-+#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
-+#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
-+#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
-+#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
-+#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
-+#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
-+#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
-+#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
-+#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
-+#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
-+#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
-+#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
-+#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
-+#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
-+#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
-+#define R_PARISC_FPTR64 64 /* 64 bits function address. */
-+#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
-+#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
-+#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
-+#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
-+#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
-+#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
-+#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
-+#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
-+#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
-+#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
-+#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
-+#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
-+#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
-+#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
-+#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
-+#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
-+#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
-+#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
-+#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
-+#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
-+#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
-+#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
-+#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
-+#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
-+#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
-+#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
-+#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
-+#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
-+#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
-+#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
-+#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
-+#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
-+#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
-+#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
-+#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
-+#define R_PARISC_LORESERVE 128
-+#define R_PARISC_COPY 128 /* Copy relocation. */
-+#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
-+#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
-+#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
-+#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
-+#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
-+#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
-+#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
-+#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
-+#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
-+#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
-+#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
-+#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
-+#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
-+#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
-+#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
-+#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
-+#define R_PARISC_HIRESERVE 255
-+
-+/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
-+
-+#define PT_HP_TLS (PT_LOOS + 0x0)
-+#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
-+#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
-+#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
-+#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
-+#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
-+#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
-+#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
-+#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
-+#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
-+#define PT_HP_PARALLEL (PT_LOOS + 0x10)
-+#define PT_HP_FASTBIND (PT_LOOS + 0x11)
-+#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
-+#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
-+#define PT_HP_STACK (PT_LOOS + 0x14)
-+
-+#define PT_PARISC_ARCHEXT 0x70000000
-+#define PT_PARISC_UNWIND 0x70000001
-+
-+/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
-+
-+#define PF_PARISC_SBP 0x08000000
-+
-+#define PF_HP_PAGE_SIZE 0x00100000
-+#define PF_HP_FAR_SHARED 0x00200000
-+#define PF_HP_NEAR_SHARED 0x00400000
-+#define PF_HP_CODE 0x01000000
-+#define PF_HP_MODIFY 0x02000000
-+#define PF_HP_LAZYSWAP 0x04000000
-+#define PF_HP_SBP 0x08000000
-+
-+
-+/* Alpha specific definitions. */
-+
-+/* Legal values for e_flags field of Elf64_Ehdr. */
-+
-+#define EF_ALPHA_32BIT 1 /* All addresses must be < 2GB. */
-+#define EF_ALPHA_CANRELAX 2 /* Relocations for relaxing exist. */
-+
-+/* Legal values for sh_type field of Elf64_Shdr. */
-+
-+/* These two are primerily concerned with ECOFF debugging info. */
-+#define SHT_ALPHA_DEBUG 0x70000001
-+#define SHT_ALPHA_REGINFO 0x70000002
-+
-+/* Legal values for sh_flags field of Elf64_Shdr. */
-+
-+#define SHF_ALPHA_GPREL 0x10000000
-+
-+/* Legal values for st_other field of Elf64_Sym. */
-+#define STO_ALPHA_NOPV 0x80 /* No PV required. */
-+#define STO_ALPHA_STD_GPLOAD 0x88 /* PV only used for initial ldgp. */
-+
-+/* Alpha relocs. */
-+
-+#define R_ALPHA_NONE 0 /* No reloc */
-+#define R_ALPHA_REFLONG 1 /* Direct 32 bit */
-+#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */
-+#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */
-+#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */
-+#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */
-+#define R_ALPHA_GPDISP 6 /* Add displacement to GP */
-+#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */
-+#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */
-+#define R_ALPHA_SREL16 9 /* PC relative 16 bit */
-+#define R_ALPHA_SREL32 10 /* PC relative 32 bit */
-+#define R_ALPHA_SREL64 11 /* PC relative 64 bit */
-+#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */
-+#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */
-+#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */
-+#define R_ALPHA_COPY 24 /* Copy symbol at runtime */
-+#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */
-+#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */
-+#define R_ALPHA_RELATIVE 27 /* Adjust by program base */
-+#define R_ALPHA_TLS_GD_HI 28
-+#define R_ALPHA_TLSGD 29
-+#define R_ALPHA_TLS_LDM 30
-+#define R_ALPHA_DTPMOD64 31
-+#define R_ALPHA_GOTDTPREL 32
-+#define R_ALPHA_DTPREL64 33
-+#define R_ALPHA_DTPRELHI 34
-+#define R_ALPHA_DTPRELLO 35
-+#define R_ALPHA_DTPREL16 36
-+#define R_ALPHA_GOTTPREL 37
-+#define R_ALPHA_TPREL64 38
-+#define R_ALPHA_TPRELHI 39
-+#define R_ALPHA_TPRELLO 40
-+#define R_ALPHA_TPREL16 41
-+/* Keep this the last entry. */
-+#define R_ALPHA_NUM 46
-+
-+/* Magic values of the LITUSE relocation addend. */
-+#define LITUSE_ALPHA_ADDR 0
-+#define LITUSE_ALPHA_BASE 1
-+#define LITUSE_ALPHA_BYTOFF 2
-+#define LITUSE_ALPHA_JSR 3
-+#define LITUSE_ALPHA_TLS_GD 4
-+#define LITUSE_ALPHA_TLS_LDM 5
-+
-+/* Legal values for d_tag of Elf64_Dyn. */
-+#define DT_ALPHA_PLTRO (DT_LOPROC + 0)
-+#define DT_ALPHA_NUM 1
-+
-+/* PowerPC specific declarations */
-+
-+/* Values for Elf32/64_Ehdr.e_flags. */
-+#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */
-+
-+/* Cygnus local bits below */
-+#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/
-+#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib
-+ flag */
-+
-+/* PowerPC relocations defined by the ABIs */
-+#define R_PPC_NONE 0
-+#define R_PPC_ADDR32 1 /* 32bit absolute address */
-+#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
-+#define R_PPC_ADDR16 3 /* 16bit absolute address */
-+#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
-+#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
-+#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
-+#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
-+#define R_PPC_ADDR14_BRTAKEN 8
-+#define R_PPC_ADDR14_BRNTAKEN 9
-+#define R_PPC_REL24 10 /* PC relative 26 bit */
-+#define R_PPC_REL14 11 /* PC relative 16 bit */
-+#define R_PPC_REL14_BRTAKEN 12
-+#define R_PPC_REL14_BRNTAKEN 13
-+#define R_PPC_GOT16 14
-+#define R_PPC_GOT16_LO 15
-+#define R_PPC_GOT16_HI 16
-+#define R_PPC_GOT16_HA 17
-+#define R_PPC_PLTREL24 18
-+#define R_PPC_COPY 19
-+#define R_PPC_GLOB_DAT 20
-+#define R_PPC_JMP_SLOT 21
-+#define R_PPC_RELATIVE 22
-+#define R_PPC_LOCAL24PC 23
-+#define R_PPC_UADDR32 24
-+#define R_PPC_UADDR16 25
-+#define R_PPC_REL32 26
-+#define R_PPC_PLT32 27
-+#define R_PPC_PLTREL32 28
-+#define R_PPC_PLT16_LO 29
-+#define R_PPC_PLT16_HI 30
-+#define R_PPC_PLT16_HA 31
-+#define R_PPC_SDAREL16 32
-+#define R_PPC_SECTOFF 33
-+#define R_PPC_SECTOFF_LO 34
-+#define R_PPC_SECTOFF_HI 35
-+#define R_PPC_SECTOFF_HA 36
-+
-+/* PowerPC relocations defined for the TLS access ABI. */
-+#define R_PPC_TLS 67 /* none (sym+add)@tls */
-+#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
-+#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
-+#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
-+#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
-+#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
-+#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
-+#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
-+#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
-+#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
-+#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
-+#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
-+#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
-+#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
-+#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
-+#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
-+#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
-+#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
-+#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
-+#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
-+#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
-+#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
-+#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
-+#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
-+#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
-+#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
-+#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
-+#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
-+
-+/* Keep this the last entry. */
-+#define R_PPC_NUM 95
-+
-+/* The remaining relocs are from the Embedded ELF ABI, and are not
-+ in the SVR4 ELF ABI. */
-+#define R_PPC_EMB_NADDR32 101
-+#define R_PPC_EMB_NADDR16 102
-+#define R_PPC_EMB_NADDR16_LO 103
-+#define R_PPC_EMB_NADDR16_HI 104
-+#define R_PPC_EMB_NADDR16_HA 105
-+#define R_PPC_EMB_SDAI16 106
-+#define R_PPC_EMB_SDA2I16 107
-+#define R_PPC_EMB_SDA2REL 108
-+#define R_PPC_EMB_SDA21 109 /* 16 bit offset in SDA */
-+#define R_PPC_EMB_MRKREF 110
-+#define R_PPC_EMB_RELSEC16 111
-+#define R_PPC_EMB_RELST_LO 112
-+#define R_PPC_EMB_RELST_HI 113
-+#define R_PPC_EMB_RELST_HA 114
-+#define R_PPC_EMB_BIT_FLD 115
-+#define R_PPC_EMB_RELSDA 116 /* 16 bit relative offset in SDA */
-+
-+/* Diab tool relocations. */
-+#define R_PPC_DIAB_SDA21_LO 180 /* like EMB_SDA21, but lower 16 bit */
-+#define R_PPC_DIAB_SDA21_HI 181 /* like EMB_SDA21, but high 16 bit */
-+#define R_PPC_DIAB_SDA21_HA 182 /* like EMB_SDA21, adjusted high 16 */
-+#define R_PPC_DIAB_RELSDA_LO 183 /* like EMB_RELSDA, but lower 16 bit */
-+#define R_PPC_DIAB_RELSDA_HI 184 /* like EMB_RELSDA, but high 16 bit */
-+#define R_PPC_DIAB_RELSDA_HA 185 /* like EMB_RELSDA, adjusted high 16 */
-+
-+/* GNU relocs used in PIC code sequences. */
-+#define R_PPC_REL16 249 /* word32 (sym+add-.) */
-+#define R_PPC_REL16_LO 250 /* half16 (sym+add-.)@l */
-+#define R_PPC_REL16_HI 251 /* half16 (sym+add-.)@h */
-+#define R_PPC_REL16_HA 252 /* half16 (sym+add-.)@ha */
-+
-+/* This is a phony reloc to handle any old fashioned TOC16 references
-+ that may still be in object files. */
-+#define R_PPC_TOC16 255
-+
-+/* PowerPC specific values for the Dyn d_tag field. */
-+#define DT_PPC_GOT (DT_LOPROC + 0)
-+#define DT_PPC_NUM 1
-+
-+/* PowerPC64 relocations defined by the ABIs */
-+#define R_PPC64_NONE R_PPC_NONE
-+#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address */
-+#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned */
-+#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address */
-+#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of address */
-+#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of address. */
-+#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
-+#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned */
-+#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
-+#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
-+#define R_PPC64_REL24 R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
-+#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit */
-+#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
-+#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
-+#define R_PPC64_GOT16 R_PPC_GOT16
-+#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
-+#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
-+#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
-+
-+#define R_PPC64_COPY R_PPC_COPY
-+#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
-+#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
-+#define R_PPC64_RELATIVE R_PPC_RELATIVE
-+
-+#define R_PPC64_UADDR32 R_PPC_UADDR32
-+#define R_PPC64_UADDR16 R_PPC_UADDR16
-+#define R_PPC64_REL32 R_PPC_REL32
-+#define R_PPC64_PLT32 R_PPC_PLT32
-+#define R_PPC64_PLTREL32 R_PPC_PLTREL32
-+#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
-+#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
-+#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
-+
-+#define R_PPC64_SECTOFF R_PPC_SECTOFF
-+#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
-+#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
-+#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
-+#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2 */
-+#define R_PPC64_ADDR64 38 /* doubleword64 S + A */
-+#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A) */
-+#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A) */
-+#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A) */
-+#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A) */
-+#define R_PPC64_UADDR64 43 /* doubleword64 S + A */
-+#define R_PPC64_REL64 44 /* doubleword64 S + A - P */
-+#define R_PPC64_PLT64 45 /* doubleword64 L + A */
-+#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P */
-+#define R_PPC64_TOC16 47 /* half16* S + A - .TOC */
-+#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.) */
-+#define R_PPC64_TOC 51 /* doubleword64 .TOC */
-+#define R_PPC64_PLTGOT16 52 /* half16* M + A */
-+#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A) */
-+#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A) */
-+#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A) */
-+
-+#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2 */
-+#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2 */
-+#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2 */
-+#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2 */
-+#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2 */
-+#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2 */
-+#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2 */
-+#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2 */
-+#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2 */
-+#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2 */
-+#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2 */
-+
-+/* PowerPC64 relocations defined for the TLS access ABI. */
-+#define R_PPC64_TLS 67 /* none (sym+add)@tls */
-+#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
-+#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
-+#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
-+#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
-+#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
-+#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
-+#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
-+#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
-+#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
-+#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
-+#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
-+#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
-+#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
-+#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
-+#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
-+#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
-+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-+#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
-+#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
-+#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
-+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-+#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
-+#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
-+#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
-+#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
-+#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
-+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
-+#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
-+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
-+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
-+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
-+
-+/* Keep this the last entry. */
-+#define R_PPC64_NUM 107
-+
-+/* PowerPC64 specific values for the Dyn d_tag field. */
-+#define DT_PPC64_GLINK (DT_LOPROC + 0)
-+#define DT_PPC64_OPD (DT_LOPROC + 1)
-+#define DT_PPC64_OPDSZ (DT_LOPROC + 2)
-+#define DT_PPC64_NUM 3
-+
-+
-+/* ARM specific declarations */
-+
-+/* Processor specific flags for the ELF header e_flags field. */
-+#define EF_ARM_RELEXEC 0x01
-+#define EF_ARM_HASENTRY 0x02
-+#define EF_ARM_INTERWORK 0x04
-+#define EF_ARM_APCS_26 0x08
-+#define EF_ARM_APCS_FLOAT 0x10
-+#define EF_ARM_PIC 0x20
-+#define EF_ARM_ALIGN8 0x40 /* 8-bit structure alignment is in use */
-+#define EF_ARM_NEW_ABI 0x80
-+#define EF_ARM_OLD_ABI 0x100
-+
-+/* Other constants defined in the ARM ELF spec. version B-01. */
-+/* NB. These conflict with values defined above. */
-+#define EF_ARM_SYMSARESORTED 0x04
-+#define EF_ARM_DYNSYMSUSESEGIDX 0x08
-+#define EF_ARM_MAPSYMSFIRST 0x10
-+#define EF_ARM_EABIMASK 0XFF000000
-+
-+#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
-+#define EF_ARM_EABI_UNKNOWN 0x00000000
-+#define EF_ARM_EABI_VER1 0x01000000
-+#define EF_ARM_EABI_VER2 0x02000000
-+
-+/* Additional symbol types for Thumb */
-+#define STT_ARM_TFUNC 0xd
-+
-+/* ARM-specific values for sh_flags */
-+#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */
-+#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined
-+ in the input to a link step */
-+
-+/* ARM-specific program header flags */
-+#define PF_ARM_SB 0x10000000 /* Segment contains the location
-+ addressed by the static base */
-+
-+/* Processor specific values for the Phdr p_type field. */
-+#define PT_ARM_EXIDX 0x70000001 /* .ARM.exidx segment */
-+
-+/* ARM relocs. */
-+
-+#define R_ARM_NONE 0 /* No reloc */
-+#define R_ARM_PC24 1 /* PC relative 26 bit branch */
-+#define R_ARM_ABS32 2 /* Direct 32 bit */
-+#define R_ARM_REL32 3 /* PC relative 32 bit */
-+#define R_ARM_PC13 4
-+#define R_ARM_ABS16 5 /* Direct 16 bit */
-+#define R_ARM_ABS12 6 /* Direct 12 bit */
-+#define R_ARM_THM_ABS5 7
-+#define R_ARM_ABS8 8 /* Direct 8 bit */
-+#define R_ARM_SBREL32 9
-+#define R_ARM_THM_PC22 10
-+#define R_ARM_THM_PC8 11
-+#define R_ARM_AMP_VCALL9 12
-+#define R_ARM_SWI24 13
-+#define R_ARM_THM_SWI8 14
-+#define R_ARM_XPC25 15
-+#define R_ARM_THM_XPC22 16
-+#define R_ARM_TLS_DTPMOD32 17
-+#define R_ARM_TLS_DTPOFF32 18
-+#define R_ARM_TLS_TPOFF32 19
-+#define R_ARM_COPY 20 /* Copy symbol at runtime */
-+#define R_ARM_GLOB_DAT 21 /* Create GOT entry */
-+#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */
-+#define R_ARM_RELATIVE 23 /* Adjust by program base */
-+#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
-+#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
-+#define R_ARM_GOT32 26 /* 32 bit GOT entry */
-+#define R_ARM_PLT32 27 /* 32 bit PLT address */
-+#define R_ARM_ALU_PCREL_7_0 32
-+#define R_ARM_ALU_PCREL_15_8 33
-+#define R_ARM_ALU_PCREL_23_15 34
-+#define R_ARM_LDR_SBREL_11_0 35
-+#define R_ARM_ALU_SBREL_19_12 36
-+#define R_ARM_ALU_SBREL_27_20 37
-+#define R_ARM_GNU_VTENTRY 100
-+#define R_ARM_GNU_VTINHERIT 101
-+#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
-+#define R_ARM_THM_PC9 103 /* thumb conditional branch */
-+#define R_ARM_TLS_GD32 104
-+#define R_ARM_TLS_LDM32 105
-+#define R_ARM_TLS_LDO32 106
-+#define R_ARM_TLS_IE32 107
-+#define R_ARM_TLS_LE32 108
-+#define R_ARM_TLS_LDO12 109
-+#define R_ARM_TLS_LE12 110
-+#define R_ARM_TLS_IE12GP 111
-+#define R_ARM_RXPC25 249
-+#define R_ARM_RSBREL32 250
-+#define R_ARM_THM_RPC22 251
-+#define R_ARM_RREL32 252
-+#define R_ARM_RABS22 253
-+#define R_ARM_RPC24 254
-+#define R_ARM_RBASE 255
-+/* Keep this the last entry. */
-+#define R_ARM_NUM 256
-+
-+/* IA-64 specific declarations. */
-+
-+/* Processor specific flags for the Ehdr e_flags field. */
-+#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
-+#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
-+#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */
-+
-+/* Processor specific values for the Phdr p_type field. */
-+#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */
-+#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */
-+#define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12)
-+#define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13)
-+#define PT_IA_64_HP_STACK (PT_LOOS + 0x14)
-+
-+/* Processor specific flags for the Phdr p_flags field. */
-+#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */
-+
-+/* Processor specific values for the Shdr sh_type field. */
-+#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */
-+#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */
-+
-+/* Processor specific flags for the Shdr sh_flags field. */
-+#define SHF_IA_64_SHORT 0x10000000 /* section near gp */
-+#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */
-+
-+/* Processor specific values for the Dyn d_tag field. */
-+#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0)
-+#define DT_IA_64_NUM 1
-+
-+/* IA-64 relocations. */
-+#define R_IA64_NONE 0x00 /* none */
-+#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */
-+#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */
-+#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */
-+#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */
-+#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */
-+#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */
-+#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */
-+#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */
-+#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */
-+#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */
-+#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */
-+#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */
-+#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */
-+#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */
-+#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */
-+#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */
-+#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */
-+#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */
-+#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */
-+#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */
-+#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */
-+#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */
-+#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */
-+#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */
-+#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */
-+#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */
-+#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */
-+#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */
-+#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */
-+#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */
-+#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */
-+#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */
-+#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */
-+#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */
-+#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */
-+#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */
-+#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */
-+#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */
-+#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */
-+#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */
-+#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */
-+#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */
-+#define R_IA64_REL32MSB 0x6c /* data 4 + REL */
-+#define R_IA64_REL32LSB 0x6d /* data 4 + REL */
-+#define R_IA64_REL64MSB 0x6e /* data 8 + REL */
-+#define R_IA64_REL64LSB 0x6f /* data 8 + REL */
-+#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */
-+#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */
-+#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */
-+#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */
-+#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */
-+#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */
-+#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */
-+#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
-+#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
-+#define R_IA64_COPY 0x84 /* copy relocation */
-+#define R_IA64_SUB 0x85 /* Addend and symbol difference */
-+#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */
-+#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */
-+#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */
-+#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */
-+#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */
-+#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */
-+#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */
-+#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */
-+#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */
-+#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */
-+#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */
-+#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */
-+#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */
-+#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */
-+#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */
-+#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */
-+
-+/* SH specific declarations */
-+
-+/* SH specific values for `st_other'. */
-+
-+/* If set, this is a symbol pointing to SHmedia code, which will be branched
-+ to, so need to add 1 to the symbol value. */
-+#define STO_SH5_ISA32 (1 << 2)
-+
-+/* SH relocs. */
-+#define R_SH_NONE 0
-+#define R_SH_DIR32 1
-+#define R_SH_REL32 2
-+#define R_SH_DIR8WPN 3
-+#define R_SH_IND12W 4
-+#define R_SH_DIR8WPL 5
-+#define R_SH_DIR8WPZ 6
-+#define R_SH_DIR8BP 7
-+#define R_SH_DIR8W 8
-+#define R_SH_DIR8L 9
-+#define R_SH_SWITCH16 25
-+#define R_SH_SWITCH32 26
-+#define R_SH_USES 27
-+#define R_SH_COUNT 28
-+#define R_SH_ALIGN 29
-+#define R_SH_CODE 30
-+#define R_SH_DATA 31
-+#define R_SH_LABEL 32
-+#define R_SH_SWITCH8 33
-+#define R_SH_GNU_VTINHERIT 34
-+#define R_SH_GNU_VTENTRY 35
-+#define R_SH_TLS_GD_32 144
-+#define R_SH_TLS_LD_32 145
-+#define R_SH_TLS_LDO_32 146
-+#define R_SH_TLS_IE_32 147
-+#define R_SH_TLS_LE_32 148
-+#define R_SH_TLS_DTPMOD32 149
-+#define R_SH_TLS_DTPOFF32 150
-+#define R_SH_TLS_TPOFF32 151
-+#define R_SH_GOT32 160
-+#define R_SH_PLT32 161
-+#define R_SH_COPY 162
-+#define R_SH_GLOB_DAT 163
-+#define R_SH_JMP_SLOT 164
-+#define R_SH_RELATIVE 165
-+#define R_SH_GOTOFF 166
-+#define R_SH_GOTPC 167
-+#define R_SH_RELATIVE_LOW16 197
-+#define R_SH_RELATIVE_MEDLOW16 198
-+#define R_SH_IMM_LOW16 246
-+#define R_SH_IMM_LOW16_PCREL 247
-+#define R_SH_IMM_MEDLOW16 248
-+#define R_SH_IMM_MEDLOW16_PCREL 249
-+
-+/* Keep this the last entry. */
-+#define R_SH_NUM 256
-+
-+/* Additional s390 relocs */
-+
-+#define R_390_NONE 0 /* No reloc. */
-+#define R_390_8 1 /* Direct 8 bit. */
-+#define R_390_12 2 /* Direct 12 bit. */
-+#define R_390_16 3 /* Direct 16 bit. */
-+#define R_390_32 4 /* Direct 32 bit. */
-+#define R_390_PC32 5 /* PC relative 32 bit. */
-+#define R_390_GOT12 6 /* 12 bit GOT offset. */
-+#define R_390_GOT32 7 /* 32 bit GOT offset. */
-+#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
-+#define R_390_COPY 9 /* Copy symbol at runtime. */
-+#define R_390_GLOB_DAT 10 /* Create GOT entry. */
-+#define R_390_JMP_SLOT 11 /* Create PLT entry. */
-+#define R_390_RELATIVE 12 /* Adjust by program base. */
-+#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
-+#define R_390_GOTPC 14 /* 32 bit PC relative offset to GOT. */
-+#define R_390_GOT16 15 /* 16 bit GOT offset. */
-+#define R_390_PC16 16 /* PC relative 16 bit. */
-+#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
-+#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
-+#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
-+#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
-+#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
-+#define R_390_64 22 /* Direct 64 bit. */
-+#define R_390_PC64 23 /* PC relative 64 bit. */
-+#define R_390_GOT64 24 /* 64 bit GOT offset. */
-+#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
-+#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
-+#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
-+#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
-+#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
-+#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
-+#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
-+#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
-+#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
-+#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
-+#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */
-+#define R_390_TLS_GDCALL 38 /* Tag for function call in general
-+ dynamic TLS code. */
-+#define R_390_TLS_LDCALL 39 /* Tag for function call in local
-+ dynamic TLS code. */
-+#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
-+ thread local data. */
-+#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
-+ thread local data. */
-+#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
-+ block offset. */
-+#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
-+ block offset. */
-+#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
-+ block offset. */
-+#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
-+ thread local data in LE code. */
-+#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
-+ thread local data in LE code. */
-+#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
-+ negated static TLS block offset. */
-+#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
-+ negated static TLS block offset. */
-+#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
-+ negated static TLS block offset. */
-+#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
-+ static TLS block. */
-+#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
-+ static TLS block. */
-+#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
-+ block. */
-+#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
-+ block. */
-+#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */
-+#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
-+#define R_390_TLS_TPOFF 56 /* Negated offset in static TLS
-+ block. */
-+#define R_390_20 57 /* Direct 20 bit. */
-+#define R_390_GOT20 58 /* 20 bit GOT offset. */
-+#define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */
-+#define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS
-+ block offset. */
-+/* Keep this the last entry. */
-+#define R_390_NUM 61
-+
-+
-+/* CRIS flags. */
-+#define EF_CRIS_VARIANT_MASK 0x0000000e
-+#define EF_CRIS_VARIANT_ANY_V0_V10 0x00000000
-+#define EF_CRIS_VARIANT_V32 0x00000002
-+#define EF_CRIS_VARIANT_COMMON_V10_V32 0x00000004
-+
-+/* CRIS relocations. */
-+#define R_CRIS_NONE 0
-+#define R_CRIS_8 1
-+#define R_CRIS_16 2
-+#define R_CRIS_32 3
-+#define R_CRIS_8_PCREL 4
-+#define R_CRIS_16_PCREL 5
-+#define R_CRIS_32_PCREL 6
-+#define R_CRIS_GNU_VTINHERIT 7
-+#define R_CRIS_GNU_VTENTRY 8
-+#define R_CRIS_COPY 9
-+#define R_CRIS_GLOB_DAT 10
-+#define R_CRIS_JUMP_SLOT 11
-+#define R_CRIS_RELATIVE 12
-+#define R_CRIS_16_GOT 13
-+#define R_CRIS_32_GOT 14
-+#define R_CRIS_16_GOTPLT 15
-+#define R_CRIS_32_GOTPLT 16
-+#define R_CRIS_32_GOTREL 17
-+#define R_CRIS_32_PLT_GOTREL 18
-+#define R_CRIS_32_PLT_PCREL 19
-+
-+/* Keep this the last entry. */
-+#define R_CRIS_NUM 20
-+
-+
-+/* AMD x86-64 relocations. */
-+#define R_X86_64_NONE 0 /* No reloc */
-+#define R_X86_64_64 1 /* Direct 64 bit */
-+#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
-+#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
-+#define R_X86_64_PLT32 4 /* 32 bit PLT address */
-+#define R_X86_64_COPY 5 /* Copy symbol at runtime */
-+#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
-+#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
-+#define R_X86_64_RELATIVE 8 /* Adjust by program base */
-+#define R_X86_64_GOTPCREL 9 /* 32 bit signed PC relative
-+ offset to GOT */
-+#define R_X86_64_32 10 /* Direct 32 bit zero extended */
-+#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
-+#define R_X86_64_16 12 /* Direct 16 bit zero extended */
-+#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
-+#define R_X86_64_8 14 /* Direct 8 bit sign extended */
-+#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
-+#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */
-+#define R_X86_64_DTPOFF64 17 /* Offset in module's TLS block */
-+#define R_X86_64_TPOFF64 18 /* Offset in initial TLS block */
-+#define R_X86_64_TLSGD 19 /* 32 bit signed PC relative offset
-+ to two GOT entries for GD symbol */
-+#define R_X86_64_TLSLD 20 /* 32 bit signed PC relative offset
-+ to two GOT entries for LD symbol */
-+#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */
-+#define R_X86_64_GOTTPOFF 22 /* 32 bit signed PC relative offset
-+ to GOT entry for IE symbol */
-+#define R_X86_64_TPOFF32 23 /* Offset in initial TLS block */
-+
-+#define R_X86_64_NUM 24
-+
-+
-+/* AM33 relocations. */
-+#define R_MN10300_NONE 0 /* No reloc. */
-+#define R_MN10300_32 1 /* Direct 32 bit. */
-+#define R_MN10300_16 2 /* Direct 16 bit. */
-+#define R_MN10300_8 3 /* Direct 8 bit. */
-+#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
-+#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
-+#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
-+#define R_MN10300_GNU_VTINHERIT 7 /* Ancient C++ vtable garbage... */
-+#define R_MN10300_GNU_VTENTRY 8 /* ... collection annotation. */
-+#define R_MN10300_24 9 /* Direct 24 bit. */
-+#define R_MN10300_GOTPC32 10 /* 32-bit PCrel offset to GOT. */
-+#define R_MN10300_GOTPC16 11 /* 16-bit PCrel offset to GOT. */
-+#define R_MN10300_GOTOFF32 12 /* 32-bit offset from GOT. */
-+#define R_MN10300_GOTOFF24 13 /* 24-bit offset from GOT. */
-+#define R_MN10300_GOTOFF16 14 /* 16-bit offset from GOT. */
-+#define R_MN10300_PLT32 15 /* 32-bit PCrel to PLT entry. */
-+#define R_MN10300_PLT16 16 /* 16-bit PCrel to PLT entry. */
-+#define R_MN10300_GOT32 17 /* 32-bit offset to GOT entry. */
-+#define R_MN10300_GOT24 18 /* 24-bit offset to GOT entry. */
-+#define R_MN10300_GOT16 19 /* 16-bit offset to GOT entry. */
-+#define R_MN10300_COPY 20 /* Copy symbol at runtime. */
-+#define R_MN10300_GLOB_DAT 21 /* Create GOT entry. */
-+#define R_MN10300_JMP_SLOT 22 /* Create PLT entry. */
-+#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
-+
-+#define R_MN10300_NUM 24
-+
-+
-+/* M32R relocs. */
-+#define R_M32R_NONE 0 /* No reloc. */
-+#define R_M32R_16 1 /* Direct 16 bit. */
-+#define R_M32R_32 2 /* Direct 32 bit. */
-+#define R_M32R_24 3 /* Direct 24 bit. */
-+#define R_M32R_10_PCREL 4 /* PC relative 10 bit shifted. */
-+#define R_M32R_18_PCREL 5 /* PC relative 18 bit shifted. */
-+#define R_M32R_26_PCREL 6 /* PC relative 26 bit shifted. */
-+#define R_M32R_HI16_ULO 7 /* High 16 bit with unsigned low. */
-+#define R_M32R_HI16_SLO 8 /* High 16 bit with signed low. */
-+#define R_M32R_LO16 9 /* Low 16 bit. */
-+#define R_M32R_SDA16 10 /* 16 bit offset in SDA. */
-+#define R_M32R_GNU_VTINHERIT 11
-+#define R_M32R_GNU_VTENTRY 12
-+/* M32R relocs use SHT_RELA. */
-+#define R_M32R_16_RELA 33 /* Direct 16 bit. */
-+#define R_M32R_32_RELA 34 /* Direct 32 bit. */
-+#define R_M32R_24_RELA 35 /* Direct 24 bit. */
-+#define R_M32R_10_PCREL_RELA 36 /* PC relative 10 bit shifted. */
-+#define R_M32R_18_PCREL_RELA 37 /* PC relative 18 bit shifted. */
-+#define R_M32R_26_PCREL_RELA 38 /* PC relative 26 bit shifted. */
-+#define R_M32R_HI16_ULO_RELA 39 /* High 16 bit with unsigned low */
-+#define R_M32R_HI16_SLO_RELA 40 /* High 16 bit with signed low */
-+#define R_M32R_LO16_RELA 41 /* Low 16 bit */
-+#define R_M32R_SDA16_RELA 42 /* 16 bit offset in SDA */
-+#define R_M32R_RELA_GNU_VTINHERIT 43
-+#define R_M32R_RELA_GNU_VTENTRY 44
-+
-+#define R_M32R_GOT24 48 /* 24 bit GOT entry */
-+#define R_M32R_26_PLTREL 49 /* 26 bit PC relative to PLT shifted */
-+#define R_M32R_COPY 50 /* Copy symbol at runtime */
-+#define R_M32R_GLOB_DAT 51 /* Create GOT entry */
-+#define R_M32R_JMP_SLOT 52 /* Create PLT entry */
-+#define R_M32R_RELATIVE 53 /* Adjust by program base */
-+#define R_M32R_GOTOFF 54 /* 24 bit offset to GOT */
-+#define R_M32R_GOTPC24 55 /* 24 bit PC relative offset to GOT */
-+#define R_M32R_GOT16_HI_ULO 56 /* High 16 bit GOT entry with unsigned
-+ low */
-+#define R_M32R_GOT16_HI_SLO 57 /* High 16 bit GOT entry with signed
-+ low */
-+#define R_M32R_GOT16_LO 58 /* Low 16 bit GOT entry */
-+#define R_M32R_GOTPC_HI_ULO 59 /* High 16 bit PC relative offset to
-+ GOT with unsigned low */
-+#define R_M32R_GOTPC_HI_SLO 60 /* High 16 bit PC relative offset to
-+ GOT with signed low */
-+#define R_M32R_GOTPC_LO 61 /* Low 16 bit PC relative offset to
-+ GOT */
-+#define R_M32R_GOTOFF_HI_ULO 62 /* High 16 bit offset to GOT
-+ with unsigned low */
-+#define R_M32R_GOTOFF_HI_SLO 63 /* High 16 bit offset to GOT
-+ with signed low */
-+#define R_M32R_GOTOFF_LO 64 /* Low 16 bit offset to GOT */
-+#define R_M32R_NUM 256 /* Keep this the last entry. */
-+
-+/* i960 Relocations */
-+#define R_960_NONE 0
-+#define R_960_12 1
-+#define R_960_32 2
-+#define R_960_IP24 3
-+#define R_960_SUB 4
-+#define R_960_OPTCALL 5
-+#define R_960_OPTCALLX 6
-+#define R_960_OPTCALLXA 7
-+/* Keep this the last entry. */
-+#define R_960_NUM 8
-+
-+
-+/* v850 relocations. */
-+#define R_V850_NONE 0
-+#define R_V850_9_PCREL 1
-+#define R_V850_22_PCREL 2
-+#define R_V850_HI16_S 3
-+#define R_V850_HI16 4
-+#define R_V850_LO16 5
-+#define R_V850_32 6
-+#define R_V850_16 7
-+#define R_V850_8 8
-+#define R_V850_SDA_16_16_OFFSET 9 /* For ld.b, st.b, set1, clr1,
-+ not1, tst1, movea, movhi */
-+#define R_V850_SDA_15_16_OFFSET 10 /* For ld.w, ld.h, ld.hu, st.w, st.h */
-+#define R_V850_ZDA_16_16_OFFSET 11 /* For ld.b, st.b, set1, clr1,
-+ not1, tst1, movea, movhi */
-+#define R_V850_ZDA_15_16_OFFSET 12 /* For ld.w, ld.h, ld.hu, st.w, st.h */
-+#define R_V850_TDA_6_8_OFFSET 13 /* For sst.w, sld.w */
-+#define R_V850_TDA_7_8_OFFSET 14 /* For sst.h, sld.h */
-+#define R_V850_TDA_7_7_OFFSET 15 /* For sst.b, sld.b */
-+#define R_V850_TDA_16_16_OFFSET 16 /* For set1, clr1, not1, tst1,
-+ movea, movhi */
-+/* CYGNUS LOCAL v850e */
-+#define R_V850_TDA_4_5_OFFSET 17 /* For sld.hu */
-+#define R_V850_TDA_4_4_OFFSET 18 /* For sld.bu */
-+#define R_V850_SDA_16_16_SPLIT_OFFSET 19 /* For ld.bu */
-+#define R_V850_ZDA_16_16_SPLIT_OFFSET 20 /* For ld.bu */
-+#define R_V850_CALLT_6_7_OFFSET 21 /* For callt */
-+#define R_V850_CALLT_16_16_OFFSET 22 /* For callt */
-+/* END CYGNUS LOCAL */
-+#define R_V850_GNU_VTINHERIT 23
-+#define R_V850_GNU_VTENTRY 24
-+/* Keep this the last entry. */
-+#define R_V850_NUM 25
-+
-+/* Atmel AVR32 relocations. */
-+#define R_AVR32_NONE 0
-+#define R_AVR32_32 1
-+#define R_AVR32_16 2
-+#define R_AVR32_8 3
-+#define R_AVR32_32_PCREL 4
-+#define R_AVR32_16_PCREL 5
-+#define R_AVR32_8_PCREL 6
-+#define R_AVR32_DIFF32 7
-+#define R_AVR32_DIFF16 8
-+#define R_AVR32_DIFF8 9
-+#define R_AVR32_GOT32 10
-+#define R_AVR32_GOT16 11
-+#define R_AVR32_GOT8 12
-+#define R_AVR32_21S 13
-+#define R_AVR32_16U 14
-+#define R_AVR32_16S 15
-+#define R_AVR32_8S 16
-+#define R_AVR32_8S_EXT 17
-+#define R_AVR32_22H_PCREL 18
-+#define R_AVR32_18W_PCREL 19
-+#define R_AVR32_16B_PCREL 20
-+#define R_AVR32_16N_PCREL 21
-+#define R_AVR32_14UW_PCREL 22
-+#define R_AVR32_11H_PCREL 23
-+#define R_AVR32_10UW_PCREL 24
-+#define R_AVR32_9H_PCREL 25
-+#define R_AVR32_9UW_PCREL 26
-+#define R_AVR32_HI16 27
-+#define R_AVR32_LO16 28
-+#define R_AVR32_GOTPC 29
-+#define R_AVR32_GOTCALL 30
-+#define R_AVR32_LDA_GOT 31
-+#define R_AVR32_GOT21S 32
-+#define R_AVR32_GOT18SW 33
-+#define R_AVR32_GOT16S 34
-+#define R_AVR32_GOT7UW 35
-+#define R_AVR32_32_CPENT 36
-+#define R_AVR32_CPCALL 37
-+#define R_AVR32_16_CP 38
-+#define R_AVR32_9W_CP 39
-+#define R_AVR32_RELATIVE 40
-+#define R_AVR32_GLOB_DAT 41
-+#define R_AVR32_JMP_SLOT 42
-+#define R_AVR32_ALIGN 43
-+#define R_AVR32_NUM 44
-+
-+/* AVR32 dynamic tags */
-+#define DT_AVR32_GOTSZ 0x70000001 /* Total size of GOT in bytes */
-+
-+/* Renesas H8/300 Relocations */
-+#define R_H8_NONE 0
-+#define R_H8_DIR32 1
-+#define R_H8_DIR32_28 2
-+#define R_H8_DIR32_24 3
-+#define R_H8_DIR32_16 4
-+#define R_H8_DIR32U 6
-+#define R_H8_DIR32U_28 7
-+#define R_H8_DIR32U_24 8
-+#define R_H8_DIR32U_20 9
-+#define R_H8_DIR32U_16 10
-+#define R_H8_DIR24 11
-+#define R_H8_DIR24_20 12
-+#define R_H8_DIR24_16 13
-+#define R_H8_DIR24U 14
-+#define R_H8_DIR24U_20 15
-+#define R_H8_DIR24U_16 16
-+#define R_H8_DIR16 17
-+#define R_H8_DIR16U 18
-+#define R_H8_DIR16S_32 19
-+#define R_H8_DIR16S_28 20
-+#define R_H8_DIR16S_24 21
-+#define R_H8_DIR16S_20 22
-+#define R_H8_DIR16S 23
-+#define R_H8_DIR8 24
-+#define R_H8_DIR8U 25
-+#define R_H8_DIR8Z_32 26
-+#define R_H8_DIR8Z_28 27
-+#define R_H8_DIR8Z_24 28
-+#define R_H8_DIR8Z_20 29
-+#define R_H8_DIR8Z_16 30
-+#define R_H8_PCREL16 31
-+#define R_H8_PCREL8 32
-+#define R_H8_BPOS 33
-+#define R_H8_PCREL32 34
-+#define R_H8_GOT32O 35
-+#define R_H8_GOT16O 36
-+#define R_H8_DIR16A8 59
-+#define R_H8_DIR16R8 60
-+#define R_H8_DIR24A8 61
-+#define R_H8_DIR24R8 62
-+#define R_H8_DIR32A16 63
-+#define R_H8_ABS32 65
-+#define R_H8_ABS32A16 127
-+#define R_H8_NUM 128
-+
-+/* NIOS relocations. */
-+#define R_NIOS_NONE 0
-+#define R_NIOS_32 1 /* A 32 bit absolute relocation.*/
-+#define R_NIOS_LO16_LO5 2 /* A LO-16 5 bit absolute relocation. */
-+#define R_NIOS_LO16_HI11 3 /* A LO-16 top 11 bit absolute relocation. */
-+#define R_NIOS_HI16_LO5 4 /* A HI-16 5 bit absolute relocation. */
-+#define R_NIOS_HI16_HI11 5 /* A HI-16 top 11 bit absolute relocation. */
-+#define R_NIOS_PCREL6 6 /* A 6 bit relative relocation. */
-+#define R_NIOS_PCREL8 7 /* An 8 bit relative relocation. */
-+#define R_NIOS_PCREL11 8 /* An 11 bit relative relocation. */
-+#define R_NIOS_16 9 /* A 16 bit absolute relocation. */
-+#define R_NIOS_H_LO5 10 /* Low 5-bits of absolute relocation in halfwords. */
-+#define R_NIOS_H_HI11 11 /* Top 11 bits of 16-bit absolute relocation in halfwords. */
-+#define R_NIOS_H_XLO5 12 /* Low 5 bits of top 16-bits of 32-bit absolute relocation in halfwords. */
-+#define R_NIOS_H_XHI11 13 /* Top 11 bits of top 16-bits of 32-bit absolute relocation in halfwords. */
-+#define R_NIOS_H_16 14 /* Half-word @h value */
-+#define R_NIOS_H_32 15 /* Word @h value */
-+#define R_NIOS_GNU_VTINHERIT 200 /* GNU extension to record C++ vtable hierarchy */
-+#define R_NIOS_GNU_VTENTRY 201 /* GNU extension to record C++ vtable member usage */
-+/* Keep this the last entry. */
-+#define R_NIOS_NUM 202
-+
-+/* NIOS II relocations */
-+#define R_NIOS2_NONE 0
-+#define R_NIOS2_S16 1
-+#define R_NIOS2_U16 2
-+#define R_NIOS2_PCREL16 3
-+#define R_NIOS2_CALL26 4
-+#define R_NIOS2_IMM5 5
-+#define R_NIOS2_CACHE_OPX 6
-+#define R_NIOS2_IMM6 7
-+#define R_NIOS2_IMM8 8
-+#define R_NIOS2_HI16 9
-+#define R_NIOS2_LO16 10
-+#define R_NIOS2_HIADJ16 11
-+#define R_NIOS2_BFD_RELOC_32 12
-+#define R_NIOS2_BFD_RELOC_16 13
-+#define R_NIOS2_BFD_RELOC_8 14
-+#define R_NIOS2_GPREL 15
-+#define R_NIOS2_GNU_VTINHERIT 16
-+#define R_NIOS2_GNU_VTENTRY 17
-+#define R_NIOS2_UJMP 18
-+#define R_NIOS2_CJMP 19
-+#define R_NIOS2_CALLR 20
-+#define R_NIOS2_ALIGN 21
-+/* Keep this the last entry. */
-+#define R_NIOS2_NUM 22
-+
-+/* Xtensa-specific declarations */
-+
-+/* Xtensa values for the Dyn d_tag field. */
-+#define DT_XTENSA_GOT_LOC_OFF (DT_LOPROC + 0)
-+#define DT_XTENSA_GOT_LOC_SZ (DT_LOPROC + 1)
-+#define DT_XTENSA_NUM 2
-+
-+/* Xtensa relocations. */
-+#define R_XTENSA_NONE 0
-+#define R_XTENSA_32 1
-+#define R_XTENSA_RTLD 2
-+#define R_XTENSA_GLOB_DAT 3
-+#define R_XTENSA_JMP_SLOT 4
-+#define R_XTENSA_RELATIVE 5
-+#define R_XTENSA_PLT 6
-+#define R_XTENSA_OP0 8
-+#define R_XTENSA_OP1 9
-+#define R_XTENSA_OP2 10
-+#define R_XTENSA_ASM_EXPAND 11
-+#define R_XTENSA_ASM_SIMPLIFY 12
-+#define R_XTENSA_GNU_VTINHERIT 15
-+#define R_XTENSA_GNU_VTENTRY 16
-+#define R_XTENSA_DIFF8 17
-+#define R_XTENSA_DIFF16 18
-+#define R_XTENSA_DIFF32 19
-+#define R_XTENSA_SLOT0_OP 20
-+#define R_XTENSA_SLOT1_OP 21
-+#define R_XTENSA_SLOT2_OP 22
-+#define R_XTENSA_SLOT3_OP 23
-+#define R_XTENSA_SLOT4_OP 24
-+#define R_XTENSA_SLOT5_OP 25
-+#define R_XTENSA_SLOT6_OP 26
-+#define R_XTENSA_SLOT7_OP 27
-+#define R_XTENSA_SLOT8_OP 28
-+#define R_XTENSA_SLOT9_OP 29
-+#define R_XTENSA_SLOT10_OP 30
-+#define R_XTENSA_SLOT11_OP 31
-+#define R_XTENSA_SLOT12_OP 32
-+#define R_XTENSA_SLOT13_OP 33
-+#define R_XTENSA_SLOT14_OP 34
-+#define R_XTENSA_SLOT0_ALT 35
-+#define R_XTENSA_SLOT1_ALT 36
-+#define R_XTENSA_SLOT2_ALT 37
-+#define R_XTENSA_SLOT3_ALT 38
-+#define R_XTENSA_SLOT4_ALT 39
-+#define R_XTENSA_SLOT5_ALT 40
-+#define R_XTENSA_SLOT6_ALT 41
-+#define R_XTENSA_SLOT7_ALT 42
-+#define R_XTENSA_SLOT8_ALT 43
-+#define R_XTENSA_SLOT9_ALT 44
-+#define R_XTENSA_SLOT10_ALT 45
-+#define R_XTENSA_SLOT11_ALT 46
-+#define R_XTENSA_SLOT12_ALT 47
-+#define R_XTENSA_SLOT13_ALT 48
-+#define R_XTENSA_SLOT14_ALT 49
-+/* Keep this the last entry. */
-+#define R_XTENSA_NUM 50
-+
-+/* C6X specific relocs */
-+#define R_C6000_NONE 0
-+#define R_C6000_ABS32 1
-+#define R_C6000_ABS16 2
-+#define R_C6000_ABS8 3
-+#define R_C6000_PCR_S21 4
-+#define R_C6000_PCR_S12 5
-+#define R_C6000_PCR_S10 6
-+#define R_C6000_PCR_S7 7
-+#define R_C6000_ABS_S16 8
-+#define R_C6000_ABS_L16 9
-+#define R_C6000_ABS_H16 10
-+#define R_C6000_SBR_U15_B 11
-+#define R_C6000_SBR_U15_H 12
-+#define R_C6000_SBR_U15_W 13
-+#define R_C6000_SBR_S16 14
-+#define R_C6000_SBR_L16_B 15
-+#define R_C6000_SBR_L16_H 16
-+#define R_C6000_SBR_L16_W 17
-+#define R_C6000_SBR_H16_B 18
-+#define R_C6000_SBR_H16_H 19
-+#define R_C6000_SBR_H16_W 20
-+#define R_C6000_SBR_GOT_U15_W 21
-+#define R_C6000_SBR_GOT_L16_W 22
-+#define R_C6000_SBR_GOT_H16_W 23
-+#define R_C6000_DSBT_INDEX 24
-+#define R_C6000_PREL31 25
-+#define R_C6000_COPY 26
-+#define R_C6000_JUMP_SLOT 27
-+#define R_C6000_SBR_GOT32 28
-+#define R_C6000_PCR_H16 29
-+#define R_C6000_PCR_L16 30
-+#define R_C6000_ALIGN 253
-+#define R_C6000_FPHEAD 254
-+#define R_C6000_NOCMP 255
-+
-+/* C6x specific values for the Dyn d_tag field. */
-+#define DT_C6000_DSBT_BASE (DT_LOPROC + 0)
-+#define DT_C6000_DSBT_SIZE (DT_LOPROC + 1)
-+#define DT_C6000_PREEMPTMAP (DT_LOPROC + 2)
-+#define DT_C6000_DSBT_INDEX (DT_LOPROC + 3)
-+
-+#define DT_C6000_NUM 4
-
- static void die(char *fmt, ...);
-
diff --git a/toolchain/kernel-headers/patches/3.6.11/sortext.patch b/toolchain/kernel-headers/patches/3.6.11/sortext.patch
deleted file mode 100644
index d82b76a2d..000000000
--- a/toolchain/kernel-headers/patches/3.6.11/sortext.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-diff -Nur linux-3.5.2.orig/arch/mips/Kconfig linux-3.5.2/arch/mips/Kconfig
---- linux-3.5.2.orig/arch/mips/Kconfig 2012-08-15 16:55:25.000000000 +0200
-+++ linux-3.5.2/arch/mips/Kconfig 2012-08-23 11:10:29.000000000 +0200
-@@ -31,7 +31,6 @@
- select HAVE_MEMBLOCK_NODE_MAP
- select ARCH_DISCARD_MEMBLOCK
- select GENERIC_SMP_IDLE_THREAD
-- select BUILDTIME_EXTABLE_SORT
- select GENERIC_CLOCKEVENTS
- select GENERIC_CMOS_UPDATE
-
-diff -Nur linux-3.5.2.orig/arch/x86/Kconfig linux-3.5.2/arch/x86/Kconfig
---- linux-3.5.2.orig/arch/x86/Kconfig 2012-08-15 16:55:25.000000000 +0200
-+++ linux-3.5.2/arch/x86/Kconfig 2012-08-23 11:10:17.000000000 +0200
-@@ -85,7 +85,6 @@
- select DCACHE_WORD_ACCESS
- select GENERIC_SMP_IDLE_THREAD
- select HAVE_ARCH_SECCOMP_FILTER
-- select BUILDTIME_EXTABLE_SORT
- select GENERIC_CMOS_UPDATE
- select CLOCKSOURCE_WATCHDOG
- select GENERIC_CLOCKEVENTS
diff --git a/toolchain/kernel-headers/patches/3.9.11/cleankernel.patch b/toolchain/kernel-headers/patches/3.9.11/cleankernel.patch
deleted file mode 100644
index f8d5448ee..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/cleankernel.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.29.1.orig/scripts/Makefile.headersinst linux-2.6.29.1/scripts/Makefile.headersinst
---- linux-2.6.29.1.orig/scripts/Makefile.headersinst 2009-04-02 22:55:27.000000000 +0200
-+++ linux-2.6.29.1/scripts/Makefile.headersinst 2009-04-17 20:56:09.143476927 +0200
-@@ -65,7 +65,6 @@
-
- targets += $(install-file)
- $(install-file): scripts/headers_install.pl $(input-files) FORCE
-- $(if $(unwanted),$(call cmd,remove),)
- $(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
- $(call if_changed,install)
-
diff --git a/toolchain/kernel-headers/patches/3.9.11/cris-header.patch b/toolchain/kernel-headers/patches/3.9.11/cris-header.patch
deleted file mode 100644
index 24df09aa9..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/cris-header.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-diff -Nur linux-3.9.11.orig/arch/cris/include/arch-v10/arch/Kbuild linux-3.9.11/arch/cris/include/arch-v10/arch/Kbuild
---- linux-3.9.11.orig/arch/cris/include/arch-v10/arch/Kbuild 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/arch/cris/include/arch-v10/arch/Kbuild 2013-10-14 11:02:43.000000000 +0200
-@@ -1 +1,5 @@
- # CRISv10 arch
-+header-y += ptrace.h
-+header-y += user.h
-+header-y += elf.h
-+header-y += system.h
-diff -Nur linux-3.9.11.orig/arch/cris/include/asm/Kbuild linux-3.9.11/arch/cris/include/asm/Kbuild
---- linux-3.9.11.orig/arch/cris/include/asm/Kbuild 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/arch/cris/include/asm/Kbuild 2013-10-13 18:34:22.000000000 +0200
-@@ -1,9 +1,11 @@
-
--header-y += arch-v10/
--header-y += arch-v32/
--
-+header-y += ../arch-v10/arch/
-+header-y += ../arch-v32/arch/
-+header-y += elf.h
-+header-y += user.h
-
- generic-y += clkdev.h
- generic-y += exec.h
- generic-y += module.h
- generic-y += trace_clock.h
-+generic-y += user.h
-diff -Nur linux-3.9.11.orig/arch/cris/include/uapi/asm/Kbuild linux-3.9.11/arch/cris/include/uapi/asm/Kbuild
---- linux-3.9.11.orig/arch/cris/include/uapi/asm/Kbuild 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/arch/cris/include/uapi/asm/Kbuild 2013-10-13 16:18:43.000000000 +0200
-@@ -1,8 +1,8 @@
- # UAPI Header export list
- include include/uapi/asm-generic/Kbuild.asm
-
--header-y += arch-v10/
--header-y += arch-v32/
-+header-y += ../arch-v10/arch/
-+header-y += ../arch-v32/arch/
- header-y += auxvec.h
- header-y += bitsperlong.h
- header-y += byteorder.h
-diff -Nur linux-3.9.11.orig/include/uapi/asm-generic/Kbuild linux-3.9.11/include/uapi/asm-generic/Kbuild
---- linux-3.9.11.orig/include/uapi/asm-generic/Kbuild 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/include/uapi/asm-generic/Kbuild 2013-10-13 20:09:39.000000000 +0200
-@@ -34,3 +34,4 @@
- header-y += types.h
- header-y += ucontext.h
- header-y += unistd.h
-+header-y += user.h
-diff -Nur linux-3.9.11.orig/include/uapi/asm-generic/Kbuild.asm linux-3.9.11/include/uapi/asm-generic/Kbuild.asm
---- linux-3.9.11.orig/include/uapi/asm-generic/Kbuild.asm 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/include/uapi/asm-generic/Kbuild.asm 2013-10-13 18:42:03.000000000 +0200
-@@ -18,6 +18,7 @@
- header-y += ipcbuf.h
- header-y += mman.h
- header-y += msgbuf.h
-+header-y += page.h
- header-y += param.h
- header-y += poll.h
- header-y += posix_types.h
-@@ -38,6 +39,7 @@
- header-y += termios.h
- header-y += types.h
- header-y += unistd.h
-+header-y += user.h
-
- header-y += $(foreach hdr,$(opt-header), \
- $(if \
diff --git a/toolchain/kernel-headers/patches/3.9.11/headersinst-xargs.patch b/toolchain/kernel-headers/patches/3.9.11/headersinst-xargs.patch
deleted file mode 100644
index 62222b21b..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/headersinst-xargs.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-diff -Nur linux-3.9.9.orig/scripts/Makefile.headersinst linux-3.9.9/scripts/Makefile.headersinst
---- linux-3.9.9.orig/scripts/Makefile.headersinst 2013-07-03 19:56:36.000000000 +0200
-+++ linux-3.9.9/scripts/Makefile.headersinst 2013-07-18 15:46:50.000000000 +0200
-@@ -72,7 +72,7 @@
- quiet_cmd_install = INSTALL $(printdir) ($(words $(all-files))\
- file$(if $(word 2, $(all-files)),s))
- cmd_install = \
-- $(PERL) $< $(installdir) $(SRCARCH) $(input-files); \
-+ xargs $(PERL) $< $(installdir) $(SRCARCH) < $(INSTALL_HDR_PATH)/.input-files; \
- for F in $(wrapper-files); do \
- echo "\#include <asm-generic/$$F>" > $(installdir)/$$F; \
- done; \
-@@ -101,7 +101,9 @@
- $(install-file): scripts/headers_install.pl $(input-files) FORCE
- $(if $(unwanted),$(call cmd,remove),)
- $(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
-+ @echo $(input-files) > $(INSTALL_HDR_PATH)/.input-files
- $(call if_changed,install)
-+ @rm $(INSTALL_HDR_PATH)/.input-files
-
- else
- __headerscheck: $(subdirs) $(check-file)
diff --git a/toolchain/kernel-headers/patches/3.9.11/microperl.patch b/toolchain/kernel-headers/patches/3.9.11/microperl.patch
deleted file mode 100644
index 44c39f6e8..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/microperl.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nur linux-3.4.2.orig/scripts/headers_check.pl linux-3.4.2/scripts/headers_check.pl
---- linux-3.4.2.orig/scripts/headers_check.pl 2012-06-09 17:36:33.000000000 +0200
-+++ linux-3.4.2/scripts/headers_check.pl 2012-06-15 12:45:43.000000000 +0200
-@@ -18,7 +18,7 @@
- #
- # 3) Check for leaked CONFIG_ symbols
-
--use strict;
-+#use strict;
- use File::Basename;
-
- my ($dir, $arch, @files) = @ARGV;
-diff -Nur linux-3.4.2.orig/scripts/headers_install.pl linux-3.4.2/scripts/headers_install.pl
---- linux-3.4.2.orig/scripts/headers_install.pl 2012-06-09 17:36:33.000000000 +0200
-+++ linux-3.4.2/scripts/headers_install.pl 2012-06-15 12:45:11.000000000 +0200
-@@ -16,7 +16,7 @@
- # 2) Drop include of compiler.h
- # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
-
--use strict;
-+#use strict;
-
- my ($readdir, $installdir, $arch, @files) = @ARGV;
-
diff --git a/toolchain/kernel-headers/patches/3.9.11/mkpiggy.patch b/toolchain/kernel-headers/patches/3.9.11/mkpiggy.patch
deleted file mode 100644
index d4e815cd2..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/mkpiggy.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-diff -Nur linux-3.4.4.orig/arch/x86/boot/compressed/mkpiggy.c linux-3.4.4/arch/x86/boot/compressed/mkpiggy.c
---- linux-3.4.4.orig/arch/x86/boot/compressed/mkpiggy.c 2012-06-22 20:37:50.000000000 +0200
-+++ linux-3.4.4/arch/x86/boot/compressed/mkpiggy.c 2012-07-03 09:48:02.000000000 +0200
-@@ -29,7 +29,14 @@
- #include <stdio.h>
- #include <string.h>
- #include <inttypes.h>
--#include <tools/le_byteshift.h>
-+
-+static uint32_t getle32(const void *p)
-+{
-+ const uint8_t *cp = p;
-+
-+ return (uint32_t)cp[0] + ((uint32_t)cp[1] << 8) +
-+ ((uint32_t)cp[2] << 16) + ((uint32_t)cp[3] << 24);
-+}
-
- int main(int argc, char *argv[])
- {
-@@ -62,7 +69,7 @@
- }
-
- ilen = ftell(f);
-- olen = get_unaligned_le32(&olen);
-+ olen = getle32(&olen);
- fclose(f);
-
- /*
diff --git a/toolchain/kernel-headers/patches/3.9.11/relocs.patch b/toolchain/kernel-headers/patches/3.9.11/relocs.patch
deleted file mode 100644
index 43c5bb580..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/relocs.patch
+++ /dev/null
@@ -1,3131 +0,0 @@
-diff -Nur linux-3.4.4.orig/arch/x86/tools/relocs.c linux-3.4.4/arch/x86/tools/relocs.c
---- linux-3.4.4.orig/arch/x86/tools/relocs.c 2012-06-22 20:37:50.000000000 +0200
-+++ linux-3.4.4/arch/x86/tools/relocs.c 2012-07-03 09:19:18.000000000 +0200
-@@ -5,12 +5,3123 @@
- #include <string.h>
- #include <errno.h>
- #include <unistd.h>
--#include <elf.h>
--#include <byteswap.h>
-+//#include <elf.h>
-+//#include <byteswap.h>
- #define USE_BSD
--#include <endian.h>
-+//#include <endian.h>
- #include <regex.h>
--#include <tools/le_byteshift.h>
-+//#include <tools/le_byteshift.h>
-+
-+static inline void __put_unaligned_le16(int val, int *p)
-+{
-+ *p++ = val;
-+ *p++ = val >> 8;
-+}
-+
-+static inline void __put_unaligned_le32(int val, int *p)
-+{
-+ __put_unaligned_le16(val >> 16, p + 2);
-+ __put_unaligned_le16(val, p);
-+}
-+
-+static inline void __put_unaligned_le64(int val, int *p)
-+{
-+ __put_unaligned_le32(val >> 32, p + 4);
-+ __put_unaligned_le32(val, p);
-+}
-+
-+static inline void put_unaligned_le16(int val, void *p)
-+{
-+ __put_unaligned_le16(val, p);
-+}
-+
-+static inline void put_unaligned_le32(int val, void *p)
-+{
-+ __put_unaligned_le32(val, p);
-+}
-+
-+static inline void put_unaligned_le64(int val, void *p)
-+{
-+ __put_unaligned_le64(val, p);
-+}
-+
-+/* Type for a 16-bit quantity. */
-+typedef uint16_t Elf32_Half;
-+typedef uint16_t Elf64_Half;
-+
-+/* Types for signed and unsigned 32-bit quantities. */
-+typedef uint32_t Elf32_Word;
-+typedef int32_t Elf32_Sword;
-+typedef uint32_t Elf64_Word;
-+typedef int32_t Elf64_Sword;
-+
-+/* Types for signed and unsigned 64-bit quantities. */
-+typedef uint64_t Elf32_Xword;
-+typedef int64_t Elf32_Sxword;
-+typedef uint64_t Elf64_Xword;
-+typedef int64_t Elf64_Sxword;
-+
-+/* Type of addresses. */
-+typedef uint32_t Elf32_Addr;
-+typedef uint64_t Elf64_Addr;
-+
-+/* Type of file offsets. */
-+typedef uint32_t Elf32_Off;
-+typedef uint64_t Elf64_Off;
-+
-+/* Type for section indices, which are 16-bit quantities. */
-+typedef uint16_t Elf32_Section;
-+typedef uint16_t Elf64_Section;
-+
-+/* Type for version symbol information. */
-+typedef Elf32_Half Elf32_Versym;
-+typedef Elf64_Half Elf64_Versym;
-+
-+
-+/* The ELF file header. This appears at the start of every ELF file. */
-+
-+#define EI_NIDENT (16)
-+
-+typedef struct
-+{
-+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */
-+ Elf32_Half e_type; /* Object file type */
-+ Elf32_Half e_machine; /* Architecture */
-+ Elf32_Word e_version; /* Object file version */
-+ Elf32_Addr e_entry; /* Entry point virtual address */
-+ Elf32_Off e_phoff; /* Program header table file offset */
-+ Elf32_Off e_shoff; /* Section header table file offset */
-+ Elf32_Word e_flags; /* Processor-specific flags */
-+ Elf32_Half e_ehsize; /* ELF header size in bytes */
-+ Elf32_Half e_phentsize; /* Program header table entry size */
-+ Elf32_Half e_phnum; /* Program header table entry count */
-+ Elf32_Half e_shentsize; /* Section header table entry size */
-+ Elf32_Half e_shnum; /* Section header table entry count */
-+ Elf32_Half e_shstrndx; /* Section header string table index */
-+} Elf32_Ehdr;
-+
-+typedef struct
-+{
-+ unsigned char e_ident[EI_NIDENT]; /* Magic number and other info */
-+ Elf64_Half e_type; /* Object file type */
-+ Elf64_Half e_machine; /* Architecture */
-+ Elf64_Word e_version; /* Object file version */
-+ Elf64_Addr e_entry; /* Entry point virtual address */
-+ Elf64_Off e_phoff; /* Program header table file offset */
-+ Elf64_Off e_shoff; /* Section header table file offset */
-+ Elf64_Word e_flags; /* Processor-specific flags */
-+ Elf64_Half e_ehsize; /* ELF header size in bytes */
-+ Elf64_Half e_phentsize; /* Program header table entry size */
-+ Elf64_Half e_phnum; /* Program header table entry count */
-+ Elf64_Half e_shentsize; /* Section header table entry size */
-+ Elf64_Half e_shnum; /* Section header table entry count */
-+ Elf64_Half e_shstrndx; /* Section header string table index */
-+} Elf64_Ehdr;
-+
-+/* Fields in the e_ident array. The EI_* macros are indices into the
-+ array. The macros under each EI_* macro are the values the byte
-+ may have. */
-+
-+#define EI_MAG0 0 /* File identification byte 0 index */
-+#define ELFMAG0 0x7f /* Magic number byte 0 */
-+
-+#define EI_MAG1 1 /* File identification byte 1 index */
-+#define ELFMAG1 'E' /* Magic number byte 1 */
-+
-+#define EI_MAG2 2 /* File identification byte 2 index */
-+#define ELFMAG2 'L' /* Magic number byte 2 */
-+
-+#define EI_MAG3 3 /* File identification byte 3 index */
-+#define ELFMAG3 'F' /* Magic number byte 3 */
-+
-+/* Conglomeration of the identification bytes, for easy testing as a word. */
-+#define ELFMAG "\177ELF"
-+#define SELFMAG 4
-+#if __BYTE_ORDER == __LITTLE_ENDIAN
-+# define ELFMAG_U32 ((uint32_t)(ELFMAG0 + 0x100 * (ELFMAG1 + (0x100 * (ELFMAG2 + 0x100 * ELFMAG3)))))
-+#elif __BYTE_ORDER == __BIG_ENDIAN
-+# define ELFMAG_U32 ((uint32_t)((((ELFMAG0 * 0x100) + ELFMAG1) * 0x100 + ELFMAG2) * 0x100 + ELFMAG3))
-+#endif
-+
-+#define EI_CLASS 4 /* File class byte index */
-+#define ELFCLASSNONE 0 /* Invalid class */
-+#define ELFCLASS32 1 /* 32-bit objects */
-+#define ELFCLASS64 2 /* 64-bit objects */
-+#define ELFCLASSNUM 3
-+
-+#define EI_DATA 5 /* Data encoding byte index */
-+#define ELFDATANONE 0 /* Invalid data encoding */
-+#define ELFDATA2LSB 1 /* 2's complement, little endian */
-+#define ELFDATA2MSB 2 /* 2's complement, big endian */
-+#define ELFDATANUM 3
-+
-+#define EI_VERSION 6 /* File version byte index */
-+ /* Value must be EV_CURRENT */
-+
-+#define EI_OSABI 7 /* OS ABI identification */
-+#define ELFOSABI_NONE 0 /* UNIX System V ABI */
-+#define ELFOSABI_SYSV 0 /* Alias. */
-+#define ELFOSABI_HPUX 1 /* HP-UX */
-+#define ELFOSABI_NETBSD 2 /* NetBSD. */
-+#define ELFOSABI_LINUX 3 /* Linux. */
-+#define ELFOSABI_HURD 4 /* GNU/Hurd */
-+#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */
-+#define ELFOSABI_AIX 7 /* IBM AIX. */
-+#define ELFOSABI_IRIX 8 /* SGI Irix. */
-+#define ELFOSABI_FREEBSD 9 /* FreeBSD. */
-+#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */
-+#define ELFOSABI_MODESTO 11 /* Novell Modesto. */
-+#define ELFOSABI_OPENBSD 12 /* OpenBSD. */
-+#define ELFOSABI_OPENVMS 13 /* OpenVMS */
-+#define ELFOSABI_NSK 14 /* Hewlett-Packard Non-Stop Kernel */
-+#define ELFOSABI_AROS 15 /* Amiga Research OS */
-+#define ELFOSABI_ARM 97 /* ARM */
-+#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */
-+
-+#define EI_ABIVERSION 8 /* ABI version */
-+
-+#define EI_PAD 9 /* Byte index of padding bytes */
-+
-+/* Legal values for e_type (object file type). */
-+
-+#define ET_NONE 0 /* No file type */
-+#define ET_REL 1 /* Relocatable file */
-+#define ET_EXEC 2 /* Executable file */
-+#define ET_DYN 3 /* Shared object file */
-+#define ET_CORE 4 /* Core file */
-+#define ET_NUM 5 /* Number of defined types */
-+#define ET_LOOS 0xfe00 /* OS-specific range start */
-+#define ET_HIOS 0xfeff /* OS-specific range end */
-+#define ET_LOPROC 0xff00 /* Processor-specific range start */
-+#define ET_HIPROC 0xffff /* Processor-specific range end */
-+
-+/* Legal values for e_machine (architecture). */
-+
-+#define EM_NONE 0 /* No machine */
-+#define EM_M32 1 /* AT&T WE 32100 */
-+#define EM_SPARC 2 /* SUN SPARC */
-+#define EM_386 3 /* Intel 80386 */
-+#define EM_68K 4 /* Motorola m68k family */
-+#define EM_88K 5 /* Motorola m88k family */
-+#define EM_486 6 /* Intel 80486 *//* Reserved for future use */
-+#define EM_860 7 /* Intel 80860 */
-+#define EM_MIPS 8 /* MIPS R3000 big-endian */
-+#define EM_S370 9 /* IBM System/370 */
-+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */
-+
-+#define EM_PARISC 15 /* HPPA */
-+#define EM_VPP500 17 /* Fujitsu VPP500 */
-+#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
-+#define EM_960 19 /* Intel 80960 */
-+#define EM_PPC 20 /* PowerPC */
-+#define EM_PPC64 21 /* PowerPC 64-bit */
-+#define EM_S390 22 /* IBM S390 */
-+
-+#define EM_V800 36 /* NEC V800 series */
-+#define EM_FR20 37 /* Fujitsu FR20 */
-+#define EM_RH32 38 /* TRW RH-32 */
-+#define EM_MCORE 39 /* Motorola M*Core */ /* May also be taken by Fujitsu MMA */
-+#define EM_RCE 39 /* Old name for MCore */
-+#define EM_ARM 40 /* ARM */
-+#define EM_FAKE_ALPHA 41 /* Digital Alpha */
-+#define EM_SH 42 /* Renesas SH */
-+#define EM_SPARCV9 43 /* SPARC v9 64-bit */
-+#define EM_TRICORE 44 /* Siemens Tricore */
-+#define EM_ARC 45 /* Argonaut RISC Core */
-+#define EM_H8_300 46 /* Renesas H8/300 */
-+#define EM_H8_300H 47 /* Renesas H8/300H */
-+#define EM_H8S 48 /* Renesas H8S */
-+#define EM_H8_500 49 /* Renesas H8/500 */
-+#define EM_IA_64 50 /* Intel Merced */
-+#define EM_MIPS_X 51 /* Stanford MIPS-X */
-+#define EM_COLDFIRE 52 /* Motorola Coldfire */
-+#define EM_68HC12 53 /* Motorola M68HC12 */
-+#define EM_MMA 54 /* Fujitsu MMA Multimedia Accelerator*/
-+#define EM_PCP 55 /* Siemens PCP */
-+#define EM_NCPU 56 /* Sony nCPU embeeded RISC */
-+#define EM_NDR1 57 /* Denso NDR1 microprocessor */
-+#define EM_STARCORE 58 /* Motorola Start*Core processor */
-+#define EM_ME16 59 /* Toyota ME16 processor */
-+#define EM_ST100 60 /* STMicroelectronic ST100 processor */
-+#define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/
-+#define EM_X86_64 62 /* AMD x86-64 architecture */
-+#define EM_PDSP 63 /* Sony DSP Processor */
-+
-+#define EM_FX66 66 /* Siemens FX66 microcontroller */
-+#define EM_ST9PLUS 67 /* STMicroelectronics ST9+ 8/16 mc */
-+#define EM_ST7 68 /* STmicroelectronics ST7 8 bit mc */
-+#define EM_68HC16 69 /* Motorola MC68HC16 microcontroller */
-+#define EM_68HC11 70 /* Motorola MC68HC11 microcontroller */
-+#define EM_68HC08 71 /* Motorola MC68HC08 microcontroller */
-+#define EM_68HC05 72 /* Motorola MC68HC05 microcontroller */
-+#define EM_SVX 73 /* Silicon Graphics SVx */
-+#define EM_ST19 74 /* STMicroelectronics ST19 8 bit mc */
-+#define EM_VAX 75 /* Digital VAX */
-+#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
-+#define EM_JAVELIN 77 /* Infineon Technologies 32-bit embedded processor */
-+#define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */
-+#define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */
-+#define EM_MMIX 80 /* Donald Knuth's educational 64-bit processor */
-+#define EM_HUANY 81 /* Harvard University machine-independent object files */
-+#define EM_PRISM 82 /* SiTera Prism */
-+#define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */
-+#define EM_FR30 84 /* Fujitsu FR30 */
-+#define EM_D10V 85 /* Mitsubishi D10V */
-+#define EM_D30V 86 /* Mitsubishi D30V */
-+#define EM_V850 87 /* NEC v850 */
-+#define EM_M32R 88 /* Renesas M32R */
-+#define EM_MN10300 89 /* Matsushita MN10300 */
-+#define EM_MN10200 90 /* Matsushita MN10200 */
-+#define EM_PJ 91 /* picoJava */
-+#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
-+#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
-+#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
-+#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
-+#define EM_CR 103 /* National Semiconductor CompactRISC */
-+#define EM_MSP430 105 /* TI msp430 micro controller */
-+#define EM_BLACKFIN 106 /* Analog Devices Blackfin */
-+#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
-+#define EM_CRX 114 /* National Semiconductor CRX */
-+#define EM_NUM 95
-+#define EM_TI_C6000 140
-+
-+/* If it is necessary to assign new unofficial EM_* values, please pick large
-+ random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
-+ with official or non-GNU unofficial values.
-+
-+ NOTE: Do not just increment the most recent number by one.
-+ Somebody else somewhere will do exactly the same thing, and you
-+ will have a collision. Instead, pick a random number.
-+
-+ Normally, each entity or maintainer responsible for a machine with an
-+ unofficial e_machine number should eventually ask registry@caldera.com for
-+ an officially blessed number to be added to the list above. */
-+
-+/* picoJava */
-+#define EM_PJ_OLD 99
-+
-+/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
-+#define EM_CYGNUS_POWERPC 0x9025
-+
-+/* Old version of Sparc v9, from before the ABI; this should be
-+ removed shortly. */
-+#define EM_OLD_SPARCV9 11
-+
-+/* Old version of PowerPC, this should be removed shortly. */
-+#define EM_PPC_OLD 17
-+
-+/* (Deprecated) Temporary number for the OpenRISC processor. */
-+#define EM_OR32 0x8472
-+
-+/* Renesas M32C and M16C. */
-+#define EM_M32C 0xFEB0
-+
-+/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
-+#define EM_CYGNUS_M32R 0x9041
-+
-+/* old S/390 backend magic number. Written in the absence of an ABI. */
-+#define EM_S390_OLD 0xa390
-+
-+/* D10V backend magic number. Written in the absence of an ABI. */
-+#define EM_CYGNUS_D10V 0x7650
-+
-+/* D30V backend magic number. Written in the absence of an ABI. */
-+#define EM_CYGNUS_D30V 0x7676
-+
-+/* V850 backend magic number. Written in the absense of an ABI. */
-+#define EM_CYGNUS_V850 0x9080
-+
-+/* mn10200 and mn10300 backend magic numbers.
-+ Written in the absense of an ABI. */
-+#define EM_CYGNUS_MN10200 0xdead
-+#define EM_CYGNUS_MN10300 0xbeef
-+
-+/* FR30 magic number - no EABI available. */
-+#define EM_CYGNUS_FR30 0x3330
-+
-+/* AVR magic number
-+ Written in the absense of an ABI. */
-+#define EM_AVR_OLD 0x1057
-+
-+/* OpenRISC magic number
-+ Written in the absense of an ABI. */
-+#define EM_OPENRISC_OLD 0x3426
-+
-+/* DLX magic number
-+ Written in the absense of an ABI. */
-+#define EM_DLX 0x5aa5
-+
-+#define EM_XSTORMY16 0xad45
-+
-+/* FRV magic number - no EABI available??. */
-+#define EM_CYGNUS_FRV 0x5441
-+
-+/* Ubicom IP2xxx; no ABI */
-+#define EM_IP2K_OLD 0x8217
-+
-+#define EM_MT 0x2530 /* Morpho MT; no ABI */
-+
-+/* MSP430 magic number
-+ Written in the absense everything. */
-+#define EM_MSP430_OLD 0x1059
-+
-+/* Vitesse IQ2000. */
-+#define EM_IQ2000 0xFEBA
-+
-+/* Old, unofficial value for Xtensa. */
-+#define EM_XTENSA_OLD 0xabc7
-+
-+/* Alpha backend magic number. Written in the absence of an ABI. */
-+#define EM_ALPHA 0x9026
-+
-+/* NIOS magic number - no EABI available. */
-+#define EM_NIOS32 0xFEBB
-+
-+/* AVR32 magic number from ATMEL */
-+#define EM_AVR32 0x18ad
-+
-+/* V850 backend magic number. Written in the absense of an ABI. */
-+#define EM_CYGNUS_V850 0x9080
-+
-+/* Legal values for e_version (version). */
-+
-+#define EV_NONE 0 /* Invalid ELF version */
-+#define EV_CURRENT 1 /* Current version */
-+#define EV_NUM 2
-+
-+/* Section header. */
-+
-+typedef struct
-+{
-+ Elf32_Word sh_name; /* Section name (string tbl index) */
-+ Elf32_Word sh_type; /* Section type */
-+ Elf32_Word sh_flags; /* Section flags */
-+ Elf32_Addr sh_addr; /* Section virtual addr at execution */
-+ Elf32_Off sh_offset; /* Section file offset */
-+ Elf32_Word sh_size; /* Section size in bytes */
-+ Elf32_Word sh_link; /* Link to another section */
-+ Elf32_Word sh_info; /* Additional section information */
-+ Elf32_Word sh_addralign; /* Section alignment */
-+ Elf32_Word sh_entsize; /* Entry size if section holds table */
-+} Elf32_Shdr;
-+
-+typedef struct
-+{
-+ Elf64_Word sh_name; /* Section name (string tbl index) */
-+ Elf64_Word sh_type; /* Section type */
-+ Elf64_Xword sh_flags; /* Section flags */
-+ Elf64_Addr sh_addr; /* Section virtual addr at execution */
-+ Elf64_Off sh_offset; /* Section file offset */
-+ Elf64_Xword sh_size; /* Section size in bytes */
-+ Elf64_Word sh_link; /* Link to another section */
-+ Elf64_Word sh_info; /* Additional section information */
-+ Elf64_Xword sh_addralign; /* Section alignment */
-+ Elf64_Xword sh_entsize; /* Entry size if section holds table */
-+} Elf64_Shdr;
-+
-+/* Special section indices. */
-+
-+#define SHN_UNDEF 0 /* Undefined section */
-+#define SHN_LORESERVE 0xff00 /* Start of reserved indices */
-+#define SHN_LOPROC 0xff00 /* Start of processor-specific */
-+#define SHN_BEFORE 0xff00 /* Order section before all others
-+ (Solaris). */
-+#define SHN_AFTER 0xff01 /* Order section after all others
-+ (Solaris). */
-+#define SHN_HIPROC 0xff1f /* End of processor-specific */
-+#define SHN_LOOS 0xff20 /* Start of OS-specific */
-+#define SHN_HIOS 0xff3f /* End of OS-specific */
-+#define SHN_ABS 0xfff1 /* Associated symbol is absolute */
-+#define SHN_COMMON 0xfff2 /* Associated symbol is common */
-+#define SHN_XINDEX 0xffff /* Index is in extra table. */
-+#define SHN_HIRESERVE 0xffff /* End of reserved indices */
-+
-+/* Legal values for sh_type (section type). */
-+
-+#define SHT_NULL 0 /* Section header table entry unused */
-+#define SHT_PROGBITS 1 /* Program data */
-+#define SHT_SYMTAB 2 /* Symbol table */
-+#define SHT_STRTAB 3 /* String table */
-+#define SHT_RELA 4 /* Relocation entries with addends */
-+#define SHT_HASH 5 /* Symbol hash table */
-+#define SHT_DYNAMIC 6 /* Dynamic linking information */
-+#define SHT_NOTE 7 /* Notes */
-+#define SHT_NOBITS 8 /* Program space with no data (bss) */
-+#define SHT_REL 9 /* Relocation entries, no addends */
-+#define SHT_SHLIB 10 /* Reserved */
-+#define SHT_DYNSYM 11 /* Dynamic linker symbol table */
-+#define SHT_INIT_ARRAY 14 /* Array of constructors */
-+#define SHT_FINI_ARRAY 15 /* Array of destructors */
-+#define SHT_PREINIT_ARRAY 16 /* Array of pre-constructors */
-+#define SHT_GROUP 17 /* Section group */
-+#define SHT_SYMTAB_SHNDX 18 /* Extended section indeces */
-+#define SHT_NUM 19 /* Number of defined types. */
-+#define SHT_LOOS 0x60000000 /* Start OS-specific */
-+#define SHT_GNU_HASH 0x6ffffff6 /* GNU-style hash table. */
-+#define SHT_GNU_LIBLIST 0x6ffffff7 /* Prelink library list */
-+#define SHT_CHECKSUM 0x6ffffff8 /* Checksum for DSO content. */
-+#define SHT_LOSUNW 0x6ffffffa /* Sun-specific low bound. */
-+#define SHT_SUNW_move 0x6ffffffa
-+#define SHT_SUNW_COMDAT 0x6ffffffb
-+#define SHT_SUNW_syminfo 0x6ffffffc
-+#define SHT_GNU_verdef 0x6ffffffd /* Version definition section. */
-+#define SHT_GNU_verneed 0x6ffffffe /* Version needs section. */
-+#define SHT_GNU_versym 0x6fffffff /* Version symbol table. */
-+#define SHT_HISUNW 0x6fffffff /* Sun-specific high bound. */
-+#define SHT_HIOS 0x6fffffff /* End OS-specific type */
-+#define SHT_LOPROC 0x70000000 /* Start of processor-specific */
-+#define SHT_HIPROC 0x7fffffff /* End of processor-specific */
-+#define SHT_LOUSER 0x80000000 /* Start of application-specific */
-+#define SHT_HIUSER 0x8fffffff /* End of application-specific */
-+
-+/* Legal values for sh_flags (section flags). */
-+
-+#define SHF_WRITE (1 << 0) /* Writable */
-+#define SHF_ALLOC (1 << 1) /* Occupies memory during execution */
-+#define SHF_EXECINSTR (1 << 2) /* Executable */
-+#define SHF_MERGE (1 << 4) /* Might be merged */
-+#define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */
-+#define SHF_INFO_LINK (1 << 6) /* `sh_info' contains SHT index */
-+#define SHF_LINK_ORDER (1 << 7) /* Preserve order after combining */
-+#define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling
-+ required */
-+#define SHF_GROUP (1 << 9) /* Section is member of a group. */
-+#define SHF_TLS (1 << 10) /* Section hold thread-local data. */
-+#define SHF_MASKOS 0x0ff00000 /* OS-specific. */
-+#define SHF_MASKPROC 0xf0000000 /* Processor-specific */
-+#define SHF_ORDERED (1 << 30) /* Special ordering requirement
-+ (Solaris). */
-+#define SHF_EXCLUDE (1 << 31) /* Section is excluded unless
-+ referenced or allocated (Solaris).*/
-+
-+/* Section group handling. */
-+#define GRP_COMDAT 0x1 /* Mark group as COMDAT. */
-+
-+/* Symbol table entry. */
-+
-+typedef struct
-+{
-+ Elf32_Word st_name; /* Symbol name (string tbl index) */
-+ Elf32_Addr st_value; /* Symbol value */
-+ Elf32_Word st_size; /* Symbol size */
-+ unsigned char st_info; /* Symbol type and binding */
-+ unsigned char st_other; /* Symbol visibility */
-+ Elf32_Section st_shndx; /* Section index */
-+} Elf32_Sym;
-+
-+typedef struct
-+{
-+ Elf64_Word st_name; /* Symbol name (string tbl index) */
-+ unsigned char st_info; /* Symbol type and binding */
-+ unsigned char st_other; /* Symbol visibility */
-+ Elf64_Section st_shndx; /* Section index */
-+ Elf64_Addr st_value; /* Symbol value */
-+ Elf64_Xword st_size; /* Symbol size */
-+} Elf64_Sym;
-+
-+/* The syminfo section if available contains additional information about
-+ every dynamic symbol. */
-+
-+typedef struct
-+{
-+ Elf32_Half si_boundto; /* Direct bindings, symbol bound to */
-+ Elf32_Half si_flags; /* Per symbol flags */
-+} Elf32_Syminfo;
-+
-+typedef struct
-+{
-+ Elf64_Half si_boundto; /* Direct bindings, symbol bound to */
-+ Elf64_Half si_flags; /* Per symbol flags */
-+} Elf64_Syminfo;
-+
-+/* Possible values for si_boundto. */
-+#define SYMINFO_BT_SELF 0xffff /* Symbol bound to self */
-+#define SYMINFO_BT_PARENT 0xfffe /* Symbol bound to parent */
-+#define SYMINFO_BT_LOWRESERVE 0xff00 /* Beginning of reserved entries */
-+
-+/* Possible bitmasks for si_flags. */
-+#define SYMINFO_FLG_DIRECT 0x0001 /* Direct bound symbol */
-+#define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-thru symbol for translator */
-+#define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */
-+#define SYMINFO_FLG_LAZYLOAD 0x0008 /* Symbol bound to object to be lazy
-+ loaded */
-+/* Syminfo version values. */
-+#define SYMINFO_NONE 0
-+#define SYMINFO_CURRENT 1
-+#define SYMINFO_NUM 2
-+
-+
-+/* How to extract and insert information held in the st_info field. */
-+
-+#define ELF32_ST_BIND(val) (((unsigned char) (val)) >> 4)
-+#define ELF32_ST_TYPE(val) ((val) & 0xf)
-+#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf))
-+
-+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field. */
-+#define ELF64_ST_BIND(val) ELF32_ST_BIND (val)
-+#define ELF64_ST_TYPE(val) ELF32_ST_TYPE (val)
-+#define ELF64_ST_INFO(bind, type) ELF32_ST_INFO ((bind), (type))
-+
-+/* Legal values for ST_BIND subfield of st_info (symbol binding). */
-+
-+#define STB_LOCAL 0 /* Local symbol */
-+#define STB_GLOBAL 1 /* Global symbol */
-+#define STB_WEAK 2 /* Weak symbol */
-+#define STB_NUM 3 /* Number of defined types. */
-+#define STB_LOOS 10 /* Start of OS-specific */
-+#define STB_HIOS 12 /* End of OS-specific */
-+#define STB_LOPROC 13 /* Start of processor-specific */
-+#define STB_HIPROC 15 /* End of processor-specific */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type). */
-+
-+#define STT_NOTYPE 0 /* Symbol type is unspecified */
-+#define STT_OBJECT 1 /* Symbol is a data object */
-+#define STT_FUNC 2 /* Symbol is a code object */
-+#define STT_SECTION 3 /* Symbol associated with a section */
-+#define STT_FILE 4 /* Symbol's name is file name */
-+#define STT_COMMON 5 /* Symbol is a common data object */
-+#define STT_TLS 6 /* Symbol is thread-local data object*/
-+#define STT_NUM 7 /* Number of defined types. */
-+#define STT_LOOS 10 /* Start of OS-specific */
-+#define STT_HIOS 12 /* End of OS-specific */
-+#define STT_LOPROC 13 /* Start of processor-specific */
-+#define STT_HIPROC 15 /* End of processor-specific */
-+
-+
-+/* Symbol table indices are found in the hash buckets and chain table
-+ of a symbol hash table section. This special index value indicates
-+ the end of a chain, meaning no further symbols are found in that bucket. */
-+
-+#define STN_UNDEF 0 /* End of a chain. */
-+
-+
-+/* How to extract and insert information held in the st_other field. */
-+
-+#define ELF32_ST_VISIBILITY(o) ((o) & 0x03)
-+
-+/* For ELF64 the definitions are the same. */
-+#define ELF64_ST_VISIBILITY(o) ELF32_ST_VISIBILITY (o)
-+
-+/* Symbol visibility specification encoded in the st_other field. */
-+#define STV_DEFAULT 0 /* Default symbol visibility rules */
-+#define STV_INTERNAL 1 /* Processor specific hidden class */
-+#define STV_HIDDEN 2 /* Sym unavailable in other modules */
-+#define STV_PROTECTED 3 /* Not preemptible, not exported */
-+
-+
-+/* Relocation table entry without addend (in section of type SHT_REL). */
-+
-+typedef struct
-+{
-+ Elf32_Addr r_offset; /* Address */
-+ Elf32_Word r_info; /* Relocation type and symbol index */
-+} Elf32_Rel;
-+
-+/* I have seen two different definitions of the Elf64_Rel and
-+ Elf64_Rela structures, so we'll leave them out until Novell (or
-+ whoever) gets their act together. */
-+/* The following, at least, is used on Sparc v9, MIPS, and Alpha. */
-+
-+typedef struct
-+{
-+ Elf64_Addr r_offset; /* Address */
-+ Elf64_Xword r_info; /* Relocation type and symbol index */
-+} Elf64_Rel;
-+
-+/* Relocation table entry with addend (in section of type SHT_RELA). */
-+
-+typedef struct
-+{
-+ Elf32_Addr r_offset; /* Address */
-+ Elf32_Word r_info; /* Relocation type and symbol index */
-+ Elf32_Sword r_addend; /* Addend */
-+} Elf32_Rela;
-+
-+typedef struct
-+{
-+ Elf64_Addr r_offset; /* Address */
-+ Elf64_Xword r_info; /* Relocation type and symbol index */
-+ Elf64_Sxword r_addend; /* Addend */
-+} Elf64_Rela;
-+
-+/* How to extract and insert information held in the r_info field. */
-+
-+#define ELF32_R_SYM(val) ((val) >> 8)
-+#define ELF32_R_TYPE(val) ((val) & 0xff)
-+#define ELF32_R_INFO(sym, type) (((sym) << 8) + ((type) & 0xff))
-+
-+#define ELF64_R_SYM(i) ((i) >> 32)
-+#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
-+#define ELF64_R_INFO(sym,type) ((((Elf64_Xword) (sym)) << 32) + (type))
-+
-+/* Program segment header. */
-+
-+typedef struct
-+{
-+ Elf32_Word p_type; /* Segment type */
-+ Elf32_Off p_offset; /* Segment file offset */
-+ Elf32_Addr p_vaddr; /* Segment virtual address */
-+ Elf32_Addr p_paddr; /* Segment physical address */
-+ Elf32_Word p_filesz; /* Segment size in file */
-+ Elf32_Word p_memsz; /* Segment size in memory */
-+ Elf32_Word p_flags; /* Segment flags */
-+ Elf32_Word p_align; /* Segment alignment */
-+} Elf32_Phdr;
-+
-+typedef struct
-+{
-+ Elf64_Word p_type; /* Segment type */
-+ Elf64_Word p_flags; /* Segment flags */
-+ Elf64_Off p_offset; /* Segment file offset */
-+ Elf64_Addr p_vaddr; /* Segment virtual address */
-+ Elf64_Addr p_paddr; /* Segment physical address */
-+ Elf64_Xword p_filesz; /* Segment size in file */
-+ Elf64_Xword p_memsz; /* Segment size in memory */
-+ Elf64_Xword p_align; /* Segment alignment */
-+} Elf64_Phdr;
-+
-+/* Legal values for p_type (segment type). */
-+
-+#define PT_NULL 0 /* Program header table entry unused */
-+#define PT_LOAD 1 /* Loadable program segment */
-+#define PT_DYNAMIC 2 /* Dynamic linking information */
-+#define PT_INTERP 3 /* Program interpreter */
-+#define PT_NOTE 4 /* Auxiliary information */
-+#define PT_SHLIB 5 /* Reserved */
-+#define PT_PHDR 6 /* Entry for header table itself */
-+#define PT_TLS 7 /* Thread-local storage segment */
-+#define PT_NUM 8 /* Number of defined types */
-+#define PT_LOOS 0x60000000 /* Start of OS-specific */
-+#define PT_GNU_EH_FRAME 0x6474e550 /* GCC .eh_frame_hdr segment */
-+#define PT_GNU_STACK 0x6474e551 /* Indicates stack executability */
-+#define PT_GNU_RELRO 0x6474e552 /* Read-only after relocation */
-+#define PT_PAX_FLAGS 0x65041580 /* Indicates PaX flag markings */
-+#define PT_LOSUNW 0x6ffffffa
-+#define PT_SUNWBSS 0x6ffffffa /* Sun Specific segment */
-+#define PT_SUNWSTACK 0x6ffffffb /* Stack segment */
-+#define PT_HISUNW 0x6fffffff
-+#define PT_HIOS 0x6fffffff /* End of OS-specific */
-+#define PT_LOPROC 0x70000000 /* Start of processor-specific */
-+#define PT_HIPROC 0x7fffffff /* End of processor-specific */
-+
-+/* Legal values for p_flags (segment flags). */
-+
-+#define PF_X (1 << 0) /* Segment is executable */
-+#define PF_W (1 << 1) /* Segment is writable */
-+#define PF_R (1 << 2) /* Segment is readable */
-+#define PF_PAGEEXEC (1 << 4) /* Enable PAGEEXEC */
-+#define PF_NOPAGEEXEC (1 << 5) /* Disable PAGEEXEC */
-+#define PF_SEGMEXEC (1 << 6) /* Enable SEGMEXEC */
-+#define PF_NOSEGMEXEC (1 << 7) /* Disable SEGMEXEC */
-+#define PF_MPROTECT (1 << 8) /* Enable MPROTECT */
-+#define PF_NOMPROTECT (1 << 9) /* Disable MPROTECT */
-+#define PF_RANDEXEC (1 << 10) /* Enable RANDEXEC */
-+#define PF_NORANDEXEC (1 << 11) /* Disable RANDEXEC */
-+#define PF_EMUTRAMP (1 << 12) /* Enable EMUTRAMP */
-+#define PF_NOEMUTRAMP (1 << 13) /* Disable EMUTRAMP */
-+#define PF_RANDMMAP (1 << 14) /* Enable RANDMMAP */
-+#define PF_NORANDMMAP (1 << 15) /* Disable RANDMMAP */
-+#define PF_MASKOS 0x0ff00000 /* OS-specific */
-+#define PF_MASKPROC 0xf0000000 /* Processor-specific */
-+
-+/* Legal values for note segment descriptor types for core files. */
-+
-+#define NT_PRSTATUS 1 /* Contains copy of prstatus struct */
-+#define NT_FPREGSET 2 /* Contains copy of fpregset struct */
-+#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */
-+#define NT_PRXREG 4 /* Contains copy of prxregset struct */
-+#define NT_TASKSTRUCT 4 /* Contains copy of task structure */
-+#define NT_PLATFORM 5 /* String from sysinfo(SI_PLATFORM) */
-+#define NT_AUXV 6 /* Contains copy of auxv array */
-+#define NT_GWINDOWS 7 /* Contains copy of gwindows struct */
-+#define NT_ASRS 8 /* Contains copy of asrset struct */
-+#define NT_PSTATUS 10 /* Contains copy of pstatus struct */
-+#define NT_PSINFO 13 /* Contains copy of psinfo struct */
-+#define NT_PRCRED 14 /* Contains copy of prcred struct */
-+#define NT_UTSNAME 15 /* Contains copy of utsname struct */
-+#define NT_LWPSTATUS 16 /* Contains copy of lwpstatus struct */
-+#define NT_LWPSINFO 17 /* Contains copy of lwpinfo struct */
-+#define NT_PRFPXREG 20 /* Contains copy of fprxregset struct*/
-+
-+/* Legal values for the note segment descriptor types for object files. */
-+
-+#define NT_VERSION 1 /* Contains a version string. */
-+
-+
-+/* Dynamic section entry. */
-+
-+typedef struct
-+{
-+ Elf32_Sword d_tag; /* Dynamic entry type */
-+ union
-+ {
-+ Elf32_Word d_val; /* Integer value */
-+ Elf32_Addr d_ptr; /* Address value */
-+ } d_un;
-+} Elf32_Dyn;
-+
-+typedef struct
-+{
-+ Elf64_Sxword d_tag; /* Dynamic entry type */
-+ union
-+ {
-+ Elf64_Xword d_val; /* Integer value */
-+ Elf64_Addr d_ptr; /* Address value */
-+ } d_un;
-+} Elf64_Dyn;
-+
-+/* Legal values for d_tag (dynamic entry type). */
-+
-+#define DT_NULL 0 /* Marks end of dynamic section */
-+#define DT_NEEDED 1 /* Name of needed library */
-+#define DT_PLTRELSZ 2 /* Size in bytes of PLT relocs */
-+#define DT_PLTGOT 3 /* Processor defined value */
-+#define DT_HASH 4 /* Address of symbol hash table */
-+#define DT_STRTAB 5 /* Address of string table */
-+#define DT_SYMTAB 6 /* Address of symbol table */
-+#define DT_RELA 7 /* Address of Rela relocs */
-+#define DT_RELASZ 8 /* Total size of Rela relocs */
-+#define DT_RELAENT 9 /* Size of one Rela reloc */
-+#define DT_STRSZ 10 /* Size of string table */
-+#define DT_SYMENT 11 /* Size of one symbol table entry */
-+#define DT_INIT 12 /* Address of init function */
-+#define DT_FINI 13 /* Address of termination function */
-+#define DT_SONAME 14 /* Name of shared object */
-+#define DT_RPATH 15 /* Library search path (deprecated) */
-+#define DT_SYMBOLIC 16 /* Start symbol search here */
-+#define DT_REL 17 /* Address of Rel relocs */
-+#define DT_RELSZ 18 /* Total size of Rel relocs */
-+#define DT_RELENT 19 /* Size of one Rel reloc */
-+#define DT_PLTREL 20 /* Type of reloc in PLT */
-+#define DT_DEBUG 21 /* For debugging; unspecified */
-+#define DT_TEXTREL 22 /* Reloc might modify .text */
-+#define DT_JMPREL 23 /* Address of PLT relocs */
-+#define DT_BIND_NOW 24 /* Process relocations of object */
-+#define DT_INIT_ARRAY 25 /* Array with addresses of init fct */
-+#define DT_FINI_ARRAY 26 /* Array with addresses of fini fct */
-+#define DT_INIT_ARRAYSZ 27 /* Size in bytes of DT_INIT_ARRAY */
-+#define DT_FINI_ARRAYSZ 28 /* Size in bytes of DT_FINI_ARRAY */
-+#define DT_RUNPATH 29 /* Library search path */
-+#define DT_FLAGS 30 /* Flags for the object being loaded */
-+#define DT_ENCODING 32 /* Start of encoded range */
-+#define DT_PREINIT_ARRAY 32 /* Array with addresses of preinit fct*/
-+#define DT_PREINIT_ARRAYSZ 33 /* size in bytes of DT_PREINIT_ARRAY */
-+#define DT_NUM 34 /* Number used */
-+#define DT_LOOS 0x6000000d /* Start of OS-specific */
-+#define DT_HIOS 0x6ffff000 /* End of OS-specific */
-+#define DT_LOPROC 0x70000000 /* Start of processor-specific */
-+#define DT_HIPROC 0x7fffffff /* End of processor-specific */
-+#define DT_PROCNUM DT_MIPS_NUM /* Most used by any processor */
-+
-+/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
-+ Dyn.d_un.d_val field of the Elf*_Dyn structure. This follows Sun's
-+ approach. */
-+#define DT_VALRNGLO 0x6ffffd00
-+#define DT_GNU_PRELINKED 0x6ffffdf5 /* Prelinking timestamp */
-+#define DT_GNU_CONFLICTSZ 0x6ffffdf6 /* Size of conflict section */
-+#define DT_GNU_LIBLISTSZ 0x6ffffdf7 /* Size of library list */
-+#define DT_CHECKSUM 0x6ffffdf8
-+#define DT_PLTPADSZ 0x6ffffdf9
-+#define DT_MOVEENT 0x6ffffdfa
-+#define DT_MOVESZ 0x6ffffdfb
-+#define DT_FEATURE_1 0x6ffffdfc /* Feature selection (DTF_*). */
-+#define DT_POSFLAG_1 0x6ffffdfd /* Flags for DT_* entries, effecting
-+ the following DT_* entry. */
-+#define DT_SYMINSZ 0x6ffffdfe /* Size of syminfo table (in bytes) */
-+#define DT_SYMINENT 0x6ffffdff /* Entry size of syminfo */
-+#define DT_VALRNGHI 0x6ffffdff
-+#define DT_VALTAGIDX(tag) (DT_VALRNGHI - (tag)) /* Reverse order! */
-+#define DT_VALNUM 12
-+
-+/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
-+ Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
-+
-+ If any adjustment is made to the ELF object after it has been
-+ built these entries will need to be adjusted. */
-+#define DT_ADDRRNGLO 0x6ffffe00
-+#define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table. */
-+#define DT_GNU_CONFLICT 0x6ffffef8 /* Start of conflict section */
-+#define DT_GNU_LIBLIST 0x6ffffef9 /* Library list */
-+#define DT_CONFIG 0x6ffffefa /* Configuration information. */
-+#define DT_DEPAUDIT 0x6ffffefb /* Dependency auditing. */
-+#define DT_AUDIT 0x6ffffefc /* Object auditing. */
-+#define DT_PLTPAD 0x6ffffefd /* PLT padding. */
-+#define DT_MOVETAB 0x6ffffefe /* Move table. */
-+#define DT_SYMINFO 0x6ffffeff /* Syminfo table. */
-+#define DT_ADDRRNGHI 0x6ffffeff
-+#define DT_ADDRTAGIDX(tag) (DT_ADDRRNGHI - (tag)) /* Reverse order! */
-+#define DT_ADDRNUM 10
-+
-+/* The versioning entry types. The next are defined as part of the
-+ GNU extension. */
-+#define DT_VERSYM 0x6ffffff0
-+
-+#define DT_RELACOUNT 0x6ffffff9
-+#define DT_RELCOUNT 0x6ffffffa
-+
-+/* These were chosen by Sun. */
-+#define DT_FLAGS_1 0x6ffffffb /* State flags, see DF_1_* below. */
-+#define DT_VERDEF 0x6ffffffc /* Address of version definition
-+ table */
-+#define DT_VERDEFNUM 0x6ffffffd /* Number of version definitions */
-+#define DT_VERNEED 0x6ffffffe /* Address of table with needed
-+ versions */
-+#define DT_VERNEEDNUM 0x6fffffff /* Number of needed versions */
-+#define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) /* Reverse order! */
-+#define DT_VERSIONTAGNUM 16
-+
-+/* Sun added these machine-independent extensions in the "processor-specific"
-+ range. Be compatible. */
-+#define DT_AUXILIARY 0x7ffffffd /* Shared object to load before self */
-+#define DT_FILTER 0x7fffffff /* Shared object to get values from */
-+#define DT_EXTRATAGIDX(tag) ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
-+#define DT_EXTRANUM 3
-+
-+/* Values of `d_un.d_val' in the DT_FLAGS entry. */
-+#define DF_ORIGIN 0x00000001 /* Object may use DF_ORIGIN */
-+#define DF_SYMBOLIC 0x00000002 /* Symbol resolutions starts here */
-+#define DF_TEXTREL 0x00000004 /* Object contains text relocations */
-+#define DF_BIND_NOW 0x00000008 /* No lazy binding for this object */
-+#define DF_STATIC_TLS 0x00000010 /* Module uses the static TLS model */
-+
-+/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
-+ entry in the dynamic section. */
-+#define DF_1_NOW 0x00000001 /* Set RTLD_NOW for this object. */
-+#define DF_1_GLOBAL 0x00000002 /* Set RTLD_GLOBAL for this object. */
-+#define DF_1_GROUP 0x00000004 /* Set RTLD_GROUP for this object. */
-+#define DF_1_NODELETE 0x00000008 /* Set RTLD_NODELETE for this object.*/
-+#define DF_1_LOADFLTR 0x00000010 /* Trigger filtee loading at runtime.*/
-+#define DF_1_INITFIRST 0x00000020 /* Set RTLD_INITFIRST for this object*/
-+#define DF_1_NOOPEN 0x00000040 /* Set RTLD_NOOPEN for this object. */
-+#define DF_1_ORIGIN 0x00000080 /* $ORIGIN must be handled. */
-+#define DF_1_DIRECT 0x00000100 /* Direct binding enabled. */
-+#define DF_1_TRANS 0x00000200
-+#define DF_1_INTERPOSE 0x00000400 /* Object is used to interpose. */
-+#define DF_1_NODEFLIB 0x00000800 /* Ignore default lib search path. */
-+#define DF_1_NODUMP 0x00001000 /* Object can't be dldump'ed. */
-+#define DF_1_CONFALT 0x00002000 /* Configuration alternative created.*/
-+#define DF_1_ENDFILTEE 0x00004000 /* Filtee terminates filters search. */
-+#define DF_1_DISPRELDNE 0x00008000 /* Disp reloc applied at build time. */
-+#define DF_1_DISPRELPND 0x00010000 /* Disp reloc applied at run-time. */
-+
-+/* Flags for the feature selection in DT_FEATURE_1. */
-+#define DTF_1_PARINIT 0x00000001
-+#define DTF_1_CONFEXP 0x00000002
-+
-+/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry. */
-+#define DF_P1_LAZYLOAD 0x00000001 /* Lazyload following object. */
-+#define DF_P1_GROUPPERM 0x00000002 /* Symbols from next object are not
-+ generally available. */
-+
-+/* Version definition sections. */
-+
-+typedef struct
-+{
-+ Elf32_Half vd_version; /* Version revision */
-+ Elf32_Half vd_flags; /* Version information */
-+ Elf32_Half vd_ndx; /* Version Index */
-+ Elf32_Half vd_cnt; /* Number of associated aux entries */
-+ Elf32_Word vd_hash; /* Version name hash value */
-+ Elf32_Word vd_aux; /* Offset in bytes to verdaux array */
-+ Elf32_Word vd_next; /* Offset in bytes to next verdef
-+ entry */
-+} Elf32_Verdef;
-+
-+typedef struct
-+{
-+ Elf64_Half vd_version; /* Version revision */
-+ Elf64_Half vd_flags; /* Version information */
-+ Elf64_Half vd_ndx; /* Version Index */
-+ Elf64_Half vd_cnt; /* Number of associated aux entries */
-+ Elf64_Word vd_hash; /* Version name hash value */
-+ Elf64_Word vd_aux; /* Offset in bytes to verdaux array */
-+ Elf64_Word vd_next; /* Offset in bytes to next verdef
-+ entry */
-+} Elf64_Verdef;
-+
-+
-+/* Legal values for vd_version (version revision). */
-+#define VER_DEF_NONE 0 /* No version */
-+#define VER_DEF_CURRENT 1 /* Current version */
-+#define VER_DEF_NUM 2 /* Given version number */
-+
-+/* Legal values for vd_flags (version information flags). */
-+#define VER_FLG_BASE 0x1 /* Version definition of file itself */
-+#define VER_FLG_WEAK 0x2 /* Weak version identifier */
-+
-+/* Versym symbol index values. */
-+#define VER_NDX_LOCAL 0 /* Symbol is local. */
-+#define VER_NDX_GLOBAL 1 /* Symbol is global. */
-+#define VER_NDX_LORESERVE 0xff00 /* Beginning of reserved entries. */
-+#define VER_NDX_ELIMINATE 0xff01 /* Symbol is to be eliminated. */
-+
-+/* Auxialiary version information. */
-+
-+typedef struct
-+{
-+ Elf32_Word vda_name; /* Version or dependency names */
-+ Elf32_Word vda_next; /* Offset in bytes to next verdaux
-+ entry */
-+} Elf32_Verdaux;
-+
-+typedef struct
-+{
-+ Elf64_Word vda_name; /* Version or dependency names */
-+ Elf64_Word vda_next; /* Offset in bytes to next verdaux
-+ entry */
-+} Elf64_Verdaux;
-+
-+
-+/* Version dependency section. */
-+
-+typedef struct
-+{
-+ Elf32_Half vn_version; /* Version of structure */
-+ Elf32_Half vn_cnt; /* Number of associated aux entries */
-+ Elf32_Word vn_file; /* Offset of filename for this
-+ dependency */
-+ Elf32_Word vn_aux; /* Offset in bytes to vernaux array */
-+ Elf32_Word vn_next; /* Offset in bytes to next verneed
-+ entry */
-+} Elf32_Verneed;
-+
-+typedef struct
-+{
-+ Elf64_Half vn_version; /* Version of structure */
-+ Elf64_Half vn_cnt; /* Number of associated aux entries */
-+ Elf64_Word vn_file; /* Offset of filename for this
-+ dependency */
-+ Elf64_Word vn_aux; /* Offset in bytes to vernaux array */
-+ Elf64_Word vn_next; /* Offset in bytes to next verneed
-+ entry */
-+} Elf64_Verneed;
-+
-+
-+/* Legal values for vn_version (version revision). */
-+#define VER_NEED_NONE 0 /* No version */
-+#define VER_NEED_CURRENT 1 /* Current version */
-+#define VER_NEED_NUM 2 /* Given version number */
-+
-+/* Auxiliary needed version information. */
-+
-+typedef struct
-+{
-+ Elf32_Word vna_hash; /* Hash value of dependency name */
-+ Elf32_Half vna_flags; /* Dependency specific information */
-+ Elf32_Half vna_other; /* Unused */
-+ Elf32_Word vna_name; /* Dependency name string offset */
-+ Elf32_Word vna_next; /* Offset in bytes to next vernaux
-+ entry */
-+} Elf32_Vernaux;
-+
-+typedef struct
-+{
-+ Elf64_Word vna_hash; /* Hash value of dependency name */
-+ Elf64_Half vna_flags; /* Dependency specific information */
-+ Elf64_Half vna_other; /* Unused */
-+ Elf64_Word vna_name; /* Dependency name string offset */
-+ Elf64_Word vna_next; /* Offset in bytes to next vernaux
-+ entry */
-+} Elf64_Vernaux;
-+
-+
-+/* Legal values for vna_flags. */
-+#define VER_FLG_WEAK 0x2 /* Weak version identifier */
-+
-+
-+/* Auxiliary vector. */
-+
-+/* This vector is normally only used by the program interpreter. The
-+ usual definition in an ABI supplement uses the name auxv_t. The
-+ vector is not usually defined in a standard <elf.h> file, but it
-+ can't hurt. We rename it to avoid conflicts. The sizes of these
-+ types are an arrangement between the exec server and the program
-+ interpreter, so we don't fully specify them here. */
-+
-+typedef struct
-+{
-+ uint32_t a_type; /* Entry type */
-+ union
-+ {
-+ uint32_t a_val; /* Integer value */
-+ /* We use to have pointer elements added here. We cannot do that,
-+ though, since it does not work when using 32-bit definitions
-+ on 64-bit platforms and vice versa. */
-+ } a_un;
-+} Elf32_auxv_t;
-+
-+typedef struct
-+{
-+ uint64_t a_type; /* Entry type */
-+ union
-+ {
-+ uint64_t a_val; /* Integer value */
-+ /* We use to have pointer elements added here. We cannot do that,
-+ though, since it does not work when using 32-bit definitions
-+ on 64-bit platforms and vice versa. */
-+ } a_un;
-+} Elf64_auxv_t;
-+
-+/* Legal values for a_type (entry type). */
-+
-+#define AT_NULL 0 /* End of vector */
-+#define AT_IGNORE 1 /* Entry should be ignored */
-+#define AT_EXECFD 2 /* File descriptor of program */
-+#define AT_PHDR 3 /* Program headers for program */
-+#define AT_PHENT 4 /* Size of program header entry */
-+#define AT_PHNUM 5 /* Number of program headers */
-+#define AT_PAGESZ 6 /* System page size */
-+#define AT_BASE 7 /* Base address of interpreter */
-+#define AT_FLAGS 8 /* Flags */
-+#define AT_ENTRY 9 /* Entry point of program */
-+#define AT_NOTELF 10 /* Program is not ELF */
-+#define AT_UID 11 /* Real uid */
-+#define AT_EUID 12 /* Effective uid */
-+#define AT_GID 13 /* Real gid */
-+#define AT_EGID 14 /* Effective gid */
-+#define AT_CLKTCK 17 /* Frequency of times() */
-+
-+/* Some more special a_type values describing the hardware. */
-+#define AT_PLATFORM 15 /* String identifying platform. */
-+#define AT_HWCAP 16 /* Machine dependent hints about
-+ processor capabilities. */
-+
-+/* This entry gives some information about the FPU initialization
-+ performed by the kernel. */
-+#define AT_FPUCW 18 /* Used FPU control word. */
-+
-+/* Cache block sizes. */
-+#define AT_DCACHEBSIZE 19 /* Data cache block size. */
-+#define AT_ICACHEBSIZE 20 /* Instruction cache block size. */
-+#define AT_UCACHEBSIZE 21 /* Unified cache block size. */
-+
-+/* A special ignored value for PPC, used by the kernel to control the
-+ interpretation of the AUXV. Must be > 16. */
-+#define AT_IGNOREPPC 22 /* Entry should be ignored. */
-+
-+#define AT_SECURE 23 /* Boolean, was exec setuid-like? */
-+
-+/* Pointer to the global system page used for system calls and other
-+ nice things. */
-+#define AT_SYSINFO 32
-+#define AT_SYSINFO_EHDR 33
-+
-+/* Shapes of the caches. Bits 0-3 contains associativity; bits 4-7 contains
-+ log2 of line size; mask those to get cache size. */
-+#define AT_L1I_CACHESHAPE 34
-+#define AT_L1D_CACHESHAPE 35
-+#define AT_L2_CACHESHAPE 36
-+#define AT_L3_CACHESHAPE 37
-+
-+/* Note section contents. Each entry in the note section begins with
-+ a header of a fixed form. */
-+
-+typedef struct
-+{
-+ Elf32_Word n_namesz; /* Length of the note's name. */
-+ Elf32_Word n_descsz; /* Length of the note's descriptor. */
-+ Elf32_Word n_type; /* Type of the note. */
-+} Elf32_Nhdr;
-+
-+typedef struct
-+{
-+ Elf64_Word n_namesz; /* Length of the note's name. */
-+ Elf64_Word n_descsz; /* Length of the note's descriptor. */
-+ Elf64_Word n_type; /* Type of the note. */
-+} Elf64_Nhdr;
-+
-+/* Known names of notes. */
-+
-+/* Solaris entries in the note section have this name. */
-+#define ELF_NOTE_SOLARIS "SUNW Solaris"
-+
-+/* Note entries for GNU systems have this name. */
-+#define ELF_NOTE_GNU "GNU"
-+
-+
-+/* Defined types of notes for Solaris. */
-+
-+/* Value of descriptor (one word) is desired pagesize for the binary. */
-+#define ELF_NOTE_PAGESIZE_HINT 1
-+
-+
-+/* Defined note types for GNU systems. */
-+
-+/* ABI information. The descriptor consists of words:
-+ word 0: OS descriptor
-+ word 1: major version of the ABI
-+ word 2: minor version of the ABI
-+ word 3: subminor version of the ABI
-+*/
-+#define ELF_NOTE_ABI 1
-+
-+/* Known OSes. These value can appear in word 0 of an ELF_NOTE_ABI
-+ note section entry. */
-+#define ELF_NOTE_OS_LINUX 0
-+#define ELF_NOTE_OS_GNU 1
-+#define ELF_NOTE_OS_SOLARIS2 2
-+#define ELF_NOTE_OS_FREEBSD 3
-+
-+
-+/* Move records. */
-+typedef struct
-+{
-+ Elf32_Xword m_value; /* Symbol value. */
-+ Elf32_Word m_info; /* Size and index. */
-+ Elf32_Word m_poffset; /* Symbol offset. */
-+ Elf32_Half m_repeat; /* Repeat count. */
-+ Elf32_Half m_stride; /* Stride info. */
-+} Elf32_Move;
-+
-+typedef struct
-+{
-+ Elf64_Xword m_value; /* Symbol value. */
-+ Elf64_Xword m_info; /* Size and index. */
-+ Elf64_Xword m_poffset; /* Symbol offset. */
-+ Elf64_Half m_repeat; /* Repeat count. */
-+ Elf64_Half m_stride; /* Stride info. */
-+} Elf64_Move;
-+
-+/* Macro to construct move records. */
-+#define ELF32_M_SYM(info) ((info) >> 8)
-+#define ELF32_M_SIZE(info) ((unsigned char) (info))
-+#define ELF32_M_INFO(sym, size) (((sym) << 8) + (unsigned char) (size))
-+
-+#define ELF64_M_SYM(info) ELF32_M_SYM (info)
-+#define ELF64_M_SIZE(info) ELF32_M_SIZE (info)
-+#define ELF64_M_INFO(sym, size) ELF32_M_INFO (sym, size)
-+
-+
-+/* Motorola 68k specific definitions. */
-+
-+/* Values for Elf32_Ehdr.e_flags. */
-+#define EF_CPU32 0x00810000
-+
-+/* m68k relocs. */
-+
-+#define R_68K_NONE 0 /* No reloc */
-+#define R_68K_32 1 /* Direct 32 bit */
-+#define R_68K_16 2 /* Direct 16 bit */
-+#define R_68K_8 3 /* Direct 8 bit */
-+#define R_68K_PC32 4 /* PC relative 32 bit */
-+#define R_68K_PC16 5 /* PC relative 16 bit */
-+#define R_68K_PC8 6 /* PC relative 8 bit */
-+#define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */
-+#define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */
-+#define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */
-+#define R_68K_GOT32O 10 /* 32 bit GOT offset */
-+#define R_68K_GOT16O 11 /* 16 bit GOT offset */
-+#define R_68K_GOT8O 12 /* 8 bit GOT offset */
-+#define R_68K_PLT32 13 /* 32 bit PC relative PLT address */
-+#define R_68K_PLT16 14 /* 16 bit PC relative PLT address */
-+#define R_68K_PLT8 15 /* 8 bit PC relative PLT address */
-+#define R_68K_PLT32O 16 /* 32 bit PLT offset */
-+#define R_68K_PLT16O 17 /* 16 bit PLT offset */
-+#define R_68K_PLT8O 18 /* 8 bit PLT offset */
-+#define R_68K_COPY 19 /* Copy symbol at runtime */
-+#define R_68K_GLOB_DAT 20 /* Create GOT entry */
-+#define R_68K_JMP_SLOT 21 /* Create PLT entry */
-+#define R_68K_RELATIVE 22 /* Adjust by program base */
-+/* Keep this the last entry. */
-+#define R_68K_NUM 23
-+
-+/* Intel 80386 specific definitions. */
-+
-+/* i386 relocs. */
-+
-+#define R_386_NONE 0 /* No reloc */
-+#define R_386_32 1 /* Direct 32 bit */
-+#define R_386_PC32 2 /* PC relative 32 bit */
-+#define R_386_GOT32 3 /* 32 bit GOT entry */
-+#define R_386_PLT32 4 /* 32 bit PLT address */
-+#define R_386_COPY 5 /* Copy symbol at runtime */
-+#define R_386_GLOB_DAT 6 /* Create GOT entry */
-+#define R_386_JMP_SLOT 7 /* Create PLT entry */
-+#define R_386_RELATIVE 8 /* Adjust by program base */
-+#define R_386_GOTOFF 9 /* 32 bit offset to GOT */
-+#define R_386_GOTPC 10 /* 32 bit PC relative offset to GOT */
-+#define R_386_32PLT 11
-+#define R_386_TLS_TPOFF 14 /* Offset in static TLS block */
-+#define R_386_TLS_IE 15 /* Address of GOT entry for static TLS
-+ block offset */
-+#define R_386_TLS_GOTIE 16 /* GOT entry for static TLS block
-+ offset */
-+#define R_386_TLS_LE 17 /* Offset relative to static TLS
-+ block */
-+#define R_386_TLS_GD 18 /* Direct 32 bit for GNU version of
-+ general dynamic thread local data */
-+#define R_386_TLS_LDM 19 /* Direct 32 bit for GNU version of
-+ local dynamic thread local data
-+ in LE code */
-+#define R_386_16 20
-+#define R_386_PC16 21
-+#define R_386_8 22
-+#define R_386_PC8 23
-+#define R_386_TLS_GD_32 24 /* Direct 32 bit for general dynamic
-+ thread local data */
-+#define R_386_TLS_GD_PUSH 25 /* Tag for pushl in GD TLS code */
-+#define R_386_TLS_GD_CALL 26 /* Relocation for call to
-+ __tls_get_addr() */
-+#define R_386_TLS_GD_POP 27 /* Tag for popl in GD TLS code */
-+#define R_386_TLS_LDM_32 28 /* Direct 32 bit for local dynamic
-+ thread local data in LE code */
-+#define R_386_TLS_LDM_PUSH 29 /* Tag for pushl in LDM TLS code */
-+#define R_386_TLS_LDM_CALL 30 /* Relocation for call to
-+ __tls_get_addr() in LDM code */
-+#define R_386_TLS_LDM_POP 31 /* Tag for popl in LDM TLS code */
-+#define R_386_TLS_LDO_32 32 /* Offset relative to TLS block */
-+#define R_386_TLS_IE_32 33 /* GOT entry for negated static TLS
-+ block offset */
-+#define R_386_TLS_LE_32 34 /* Negated offset relative to static
-+ TLS block */
-+#define R_386_TLS_DTPMOD32 35 /* ID of module containing symbol */
-+#define R_386_TLS_DTPOFF32 36 /* Offset in TLS block */
-+#define R_386_TLS_TPOFF32 37 /* Negated offset in static TLS block */
-+/* Keep this the last entry. */
-+#define R_386_NUM 38
-+
-+/* Blackfin specific definitions. */
-+#define R_BFIN_UNUSED0 0x00
-+#define R_BFIN_PCREL5M2 0x01
-+#define R_BFIN_UNUSED1 0x02
-+#define R_BFIN_PCREL10 0x03
-+#define R_BFIN_PCREL12_JUMP 0x04
-+#define R_BFIN_RIMM16 0x05
-+#define R_BFIN_LUIMM16 0x06
-+#define R_BFIN_HUIMM16 0x07
-+#define R_BFIN_PCREL12_JUMP_S 0x08
-+#define R_BFIN_PCREL24_JUMP_X 0x09
-+#define R_BFIN_PCREL24 0x0a
-+#define R_BFIN_UNUSEDB 0x0b
-+#define R_BFIN_UNUSEDC 0x0c
-+#define R_BFIN_PCREL24_JUMP_L 0x0d
-+#define R_BFIN_PCREL24_CALL_X 0x0e
-+#define R_BFIN_var_eq_symb 0x0f
-+#define R_BFIN_BYTE_DATA 0x10
-+#define R_BFIN_BYTE2_DATA 0x11
-+#define R_BFIN_BYTE4_DATA 0x12
-+#define R_BFIN_PCREL11 0x13
-+
-+#define R_BFIN_GOT17M4 0x14
-+#define R_BFIN_GOTHI 0x15
-+#define R_BFIN_GOTLO 0x16
-+#define R_BFIN_FUNCDESC 0x17
-+#define R_BFIN_FUNCDESC_GOT17M4 0x18
-+#define R_BFIN_FUNCDESC_GOTHI 0x19
-+#define R_BFIN_FUNCDESC_GOTLO 0x1a
-+#define R_BFIN_FUNCDESC_VALUE 0x1b
-+#define R_BFIN_FUNCDESC_GOTOFF17M4 0x1c
-+#define R_BFIN_FUNCDESC_GOTOFFHI 0x1d
-+#define R_BFIN_FUNCDESC_GOTOFFLO 0x1e
-+#define R_BFIN_GOTOFF17M4 0x1f
-+#define R_BFIN_GOTOFFHI 0x20
-+#define R_BFIN_GOTOFFLO 0x21
-+
-+#define EF_BFIN_PIC 0x00000001 /* -fpic */
-+#define EF_BFIN_FDPIC 0x00000002 /* -mfdpic */
-+#define EF_BFIN_CODE_IN_L1 0x00000010 /* --code-in-l1 */
-+#define EF_BFIN_DATA_IN_L1 0x00000020 /* --data-in-l1 */
-+
-+/* FR-V specific definitions. */
-+#define R_FRV_NONE 0 /* No reloc. */
-+#define R_FRV_32 1 /* Direct 32 bit. */
-+/* Canonical function descriptor address. */
-+#define R_FRV_FUNCDESC 14
-+/* Private function descriptor initialization. */
-+#define R_FRV_FUNCDESC_VALUE 18
-+
-+ /* gpr support */
-+#define EF_FRV_GPR_MASK 0x00000003 /* mask for # of gprs */
-+#define EF_FRV_GPR_32 0x00000001 /* -mgpr-32 */
-+#define EF_FRV_GPR_64 0x00000002 /* -mgpr-64 */
-+
-+ /* fpr support */
-+#define EF_FRV_FPR_MASK 0x0000000c /* mask for # of fprs */
-+#define EF_FRV_FPR_32 0x00000004 /* -mfpr-32 */
-+#define EF_FRV_FPR_64 0x00000008 /* -mfpr-64 */
-+#define EF_FRV_FPR_NONE 0x0000000c /* -msoft-float */
-+
-+#define EF_FRV_PIC 0x00000100
-+#define EF_FRV_FDPIC 0x00008000
-+
-+/* SUN SPARC specific definitions. */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type). */
-+
-+#define STT_SPARC_REGISTER 13 /* Global register reserved to app. */
-+
-+/* Values for Elf64_Ehdr.e_flags. */
-+
-+#define EF_SPARCV9_MM 3
-+#define EF_SPARCV9_TSO 0
-+#define EF_SPARCV9_PSO 1
-+#define EF_SPARCV9_RMO 2
-+#define EF_SPARC_LEDATA 0x800000 /* little endian data */
-+#define EF_SPARC_EXT_MASK 0xFFFF00
-+#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */
-+#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */
-+#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */
-+#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */
-+
-+/* SPARC relocs. */
-+
-+#define R_SPARC_NONE 0 /* No reloc */
-+#define R_SPARC_8 1 /* Direct 8 bit */
-+#define R_SPARC_16 2 /* Direct 16 bit */
-+#define R_SPARC_32 3 /* Direct 32 bit */
-+#define R_SPARC_DISP8 4 /* PC relative 8 bit */
-+#define R_SPARC_DISP16 5 /* PC relative 16 bit */
-+#define R_SPARC_DISP32 6 /* PC relative 32 bit */
-+#define R_SPARC_WDISP30 7 /* PC relative 30 bit shifted */
-+#define R_SPARC_WDISP22 8 /* PC relative 22 bit shifted */
-+#define R_SPARC_HI22 9 /* High 22 bit */
-+#define R_SPARC_22 10 /* Direct 22 bit */
-+#define R_SPARC_13 11 /* Direct 13 bit */
-+#define R_SPARC_LO10 12 /* Truncated 10 bit */
-+#define R_SPARC_GOT10 13 /* Truncated 10 bit GOT entry */
-+#define R_SPARC_GOT13 14 /* 13 bit GOT entry */
-+#define R_SPARC_GOT22 15 /* 22 bit GOT entry shifted */
-+#define R_SPARC_PC10 16 /* PC relative 10 bit truncated */
-+#define R_SPARC_PC22 17 /* PC relative 22 bit shifted */
-+#define R_SPARC_WPLT30 18 /* 30 bit PC relative PLT address */
-+#define R_SPARC_COPY 19 /* Copy symbol at runtime */
-+#define R_SPARC_GLOB_DAT 20 /* Create GOT entry */
-+#define R_SPARC_JMP_SLOT 21 /* Create PLT entry */
-+#define R_SPARC_RELATIVE 22 /* Adjust by program base */
-+#define R_SPARC_UA32 23 /* Direct 32 bit unaligned */
-+
-+/* Additional Sparc64 relocs. */
-+
-+#define R_SPARC_PLT32 24 /* Direct 32 bit ref to PLT entry */
-+#define R_SPARC_HIPLT22 25 /* High 22 bit PLT entry */
-+#define R_SPARC_LOPLT10 26 /* Truncated 10 bit PLT entry */
-+#define R_SPARC_PCPLT32 27 /* PC rel 32 bit ref to PLT entry */
-+#define R_SPARC_PCPLT22 28 /* PC rel high 22 bit PLT entry */
-+#define R_SPARC_PCPLT10 29 /* PC rel trunc 10 bit PLT entry */
-+#define R_SPARC_10 30 /* Direct 10 bit */
-+#define R_SPARC_11 31 /* Direct 11 bit */
-+#define R_SPARC_64 32 /* Direct 64 bit */
-+#define R_SPARC_OLO10 33 /* 10bit with secondary 13bit addend */
-+#define R_SPARC_HH22 34 /* Top 22 bits of direct 64 bit */
-+#define R_SPARC_HM10 35 /* High middle 10 bits of ... */
-+#define R_SPARC_LM22 36 /* Low middle 22 bits of ... */
-+#define R_SPARC_PC_HH22 37 /* Top 22 bits of pc rel 64 bit */
-+#define R_SPARC_PC_HM10 38 /* High middle 10 bit of ... */
-+#define R_SPARC_PC_LM22 39 /* Low miggle 22 bits of ... */
-+#define R_SPARC_WDISP16 40 /* PC relative 16 bit shifted */
-+#define R_SPARC_WDISP19 41 /* PC relative 19 bit shifted */
-+#define R_SPARC_7 43 /* Direct 7 bit */
-+#define R_SPARC_5 44 /* Direct 5 bit */
-+#define R_SPARC_6 45 /* Direct 6 bit */
-+#define R_SPARC_DISP64 46 /* PC relative 64 bit */
-+#define R_SPARC_PLT64 47 /* Direct 64 bit ref to PLT entry */
-+#define R_SPARC_HIX22 48 /* High 22 bit complemented */
-+#define R_SPARC_LOX10 49 /* Truncated 11 bit complemented */
-+#define R_SPARC_H44 50 /* Direct high 12 of 44 bit */
-+#define R_SPARC_M44 51 /* Direct mid 22 of 44 bit */
-+#define R_SPARC_L44 52 /* Direct low 10 of 44 bit */
-+#define R_SPARC_REGISTER 53 /* Global register usage */
-+#define R_SPARC_UA64 54 /* Direct 64 bit unaligned */
-+#define R_SPARC_UA16 55 /* Direct 16 bit unaligned */
-+#define R_SPARC_TLS_GD_HI22 56
-+#define R_SPARC_TLS_GD_LO10 57
-+#define R_SPARC_TLS_GD_ADD 58
-+#define R_SPARC_TLS_GD_CALL 59
-+#define R_SPARC_TLS_LDM_HI22 60
-+#define R_SPARC_TLS_LDM_LO10 61
-+#define R_SPARC_TLS_LDM_ADD 62
-+#define R_SPARC_TLS_LDM_CALL 63
-+#define R_SPARC_TLS_LDO_HIX22 64
-+#define R_SPARC_TLS_LDO_LOX10 65
-+#define R_SPARC_TLS_LDO_ADD 66
-+#define R_SPARC_TLS_IE_HI22 67
-+#define R_SPARC_TLS_IE_LO10 68
-+#define R_SPARC_TLS_IE_LD 69
-+#define R_SPARC_TLS_IE_LDX 70
-+#define R_SPARC_TLS_IE_ADD 71
-+#define R_SPARC_TLS_LE_HIX22 72
-+#define R_SPARC_TLS_LE_LOX10 73
-+#define R_SPARC_TLS_DTPMOD32 74
-+#define R_SPARC_TLS_DTPMOD64 75
-+#define R_SPARC_TLS_DTPOFF32 76
-+#define R_SPARC_TLS_DTPOFF64 77
-+#define R_SPARC_TLS_TPOFF32 78
-+#define R_SPARC_TLS_TPOFF64 79
-+/* Keep this the last entry. */
-+#define R_SPARC_NUM 80
-+
-+/* For Sparc64, legal values for d_tag of Elf64_Dyn. */
-+
-+#define DT_SPARC_REGISTER 0x70000001
-+#define DT_SPARC_NUM 2
-+
-+/* Bits present in AT_HWCAP, primarily for Sparc32. */
-+
-+#define HWCAP_SPARC_FLUSH 1 /* The cpu supports flush insn. */
-+#define HWCAP_SPARC_STBAR 2
-+#define HWCAP_SPARC_SWAP 4
-+#define HWCAP_SPARC_MULDIV 8
-+#define HWCAP_SPARC_V9 16 /* The cpu is v9, so v8plus is ok. */
-+#define HWCAP_SPARC_ULTRA3 32
-+
-+/* MIPS R3000 specific definitions. */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr. */
-+
-+#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used */
-+#define EF_MIPS_PIC 2 /* Contains PIC code */
-+#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */
-+#define EF_MIPS_XGOT 8
-+#define EF_MIPS_64BIT_WHIRL 16
-+#define EF_MIPS_ABI2 32
-+#define EF_MIPS_ABI_ON32 64
-+#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */
-+
-+/* Legal values for MIPS architecture level. */
-+
-+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
-+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
-+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
-+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
-+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
-+#define EF_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */
-+#define EF_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */
-+
-+/* The following are non-official names and should not be used. */
-+
-+#define E_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
-+#define E_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
-+#define E_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
-+#define E_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
-+#define E_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
-+#define E_MIPS_ARCH_32 0x60000000 /* MIPS32 code. */
-+#define E_MIPS_ARCH_64 0x70000000 /* MIPS64 code. */
-+
-+/* Special section indices. */
-+
-+#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */
-+#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
-+#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
-+#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
-+#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
-+
-+/* Legal values for sh_type field of Elf32_Shdr. */
-+
-+#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */
-+#define SHT_MIPS_MSYM 0x70000001
-+#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */
-+#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */
-+#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */
-+#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information*/
-+#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */
-+#define SHT_MIPS_PACKAGE 0x70000007
-+#define SHT_MIPS_PACKSYM 0x70000008
-+#define SHT_MIPS_RELD 0x70000009
-+#define SHT_MIPS_IFACE 0x7000000b
-+#define SHT_MIPS_CONTENT 0x7000000c
-+#define SHT_MIPS_OPTIONS 0x7000000d /* Miscellaneous options. */
-+#define SHT_MIPS_SHDR 0x70000010
-+#define SHT_MIPS_FDESC 0x70000011
-+#define SHT_MIPS_EXTSYM 0x70000012
-+#define SHT_MIPS_DENSE 0x70000013
-+#define SHT_MIPS_PDESC 0x70000014
-+#define SHT_MIPS_LOCSYM 0x70000015
-+#define SHT_MIPS_AUXSYM 0x70000016
-+#define SHT_MIPS_OPTSYM 0x70000017
-+#define SHT_MIPS_LOCSTR 0x70000018
-+#define SHT_MIPS_LINE 0x70000019
-+#define SHT_MIPS_RFDESC 0x7000001a
-+#define SHT_MIPS_DELTASYM 0x7000001b
-+#define SHT_MIPS_DELTAINST 0x7000001c
-+#define SHT_MIPS_DELTACLASS 0x7000001d
-+#define SHT_MIPS_DWARF 0x7000001e /* DWARF debugging information. */
-+#define SHT_MIPS_DELTADECL 0x7000001f
-+#define SHT_MIPS_SYMBOL_LIB 0x70000020
-+#define SHT_MIPS_EVENTS 0x70000021 /* Event section. */
-+#define SHT_MIPS_TRANSLATE 0x70000022
-+#define SHT_MIPS_PIXIE 0x70000023
-+#define SHT_MIPS_XLATE 0x70000024
-+#define SHT_MIPS_XLATE_DEBUG 0x70000025
-+#define SHT_MIPS_WHIRL 0x70000026
-+#define SHT_MIPS_EH_REGION 0x70000027
-+#define SHT_MIPS_XLATE_OLD 0x70000028
-+#define SHT_MIPS_PDR_EXCEPTION 0x70000029
-+
-+/* Legal values for sh_flags field of Elf32_Shdr. */
-+
-+#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */
-+#define SHF_MIPS_MERGE 0x20000000
-+#define SHF_MIPS_ADDR 0x40000000
-+#define SHF_MIPS_STRINGS 0x80000000
-+#define SHF_MIPS_NOSTRIP 0x08000000
-+#define SHF_MIPS_LOCAL 0x04000000
-+#define SHF_MIPS_NAMES 0x02000000
-+#define SHF_MIPS_NODUPE 0x01000000
-+
-+
-+/* Symbol tables. */
-+
-+/* MIPS specific values for `st_other'. */
-+#define STO_MIPS_DEFAULT 0x0
-+#define STO_MIPS_INTERNAL 0x1
-+#define STO_MIPS_HIDDEN 0x2
-+#define STO_MIPS_PROTECTED 0x3
-+#define STO_MIPS_PLT 0x8
-+#define STO_MIPS_SC_ALIGN_UNUSED 0xff
-+
-+/* MIPS specific values for `st_info'. */
-+#define STB_MIPS_SPLIT_COMMON 13
-+
-+/* Entries found in sections of type SHT_MIPS_GPTAB. */
-+
-+typedef union
-+{
-+ struct
-+ {
-+ Elf32_Word gt_current_g_value; /* -G value used for compilation */
-+ Elf32_Word gt_unused; /* Not used */
-+ } gt_header; /* First entry in section */
-+ struct
-+ {
-+ Elf32_Word gt_g_value; /* If this value were used for -G */
-+ Elf32_Word gt_bytes; /* This many bytes would be used */
-+ } gt_entry; /* Subsequent entries in section */
-+} Elf32_gptab;
-+
-+/* Entry found in sections of type SHT_MIPS_REGINFO. */
-+
-+typedef struct
-+{
-+ Elf32_Word ri_gprmask; /* General registers used */
-+ Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */
-+ Elf32_Sword ri_gp_value; /* $gp register value */
-+} Elf32_RegInfo;
-+
-+/* Entries found in sections of type SHT_MIPS_OPTIONS. */
-+
-+typedef struct
-+{
-+ unsigned char kind; /* Determines interpretation of the
-+ variable part of descriptor. */
-+ unsigned char size; /* Size of descriptor, including header. */
-+ Elf32_Section section; /* Section header index of section affected,
-+ 0 for global options. */
-+ Elf32_Word info; /* Kind-specific information. */
-+} Elf_Options;
-+
-+/* Values for `kind' field in Elf_Options. */
-+
-+#define ODK_NULL 0 /* Undefined. */
-+#define ODK_REGINFO 1 /* Register usage information. */
-+#define ODK_EXCEPTIONS 2 /* Exception processing options. */
-+#define ODK_PAD 3 /* Section padding options. */
-+#define ODK_HWPATCH 4 /* Hardware workarounds performed */
-+#define ODK_FILL 5 /* record the fill value used by the linker. */
-+#define ODK_TAGS 6 /* reserve space for desktop tools to write. */
-+#define ODK_HWAND 7 /* HW workarounds. 'AND' bits when merging. */
-+#define ODK_HWOR 8 /* HW workarounds. 'OR' bits when merging. */
-+
-+/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries. */
-+
-+#define OEX_FPU_MIN 0x1f /* FPE's which MUST be enabled. */
-+#define OEX_FPU_MAX 0x1f00 /* FPE's which MAY be enabled. */
-+#define OEX_PAGE0 0x10000 /* page zero must be mapped. */
-+#define OEX_SMM 0x20000 /* Force sequential memory mode? */
-+#define OEX_FPDBUG 0x40000 /* Force floating point debug mode? */
-+#define OEX_PRECISEFP OEX_FPDBUG
-+#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults? */
-+
-+#define OEX_FPU_INVAL 0x10
-+#define OEX_FPU_DIV0 0x08
-+#define OEX_FPU_OFLO 0x04
-+#define OEX_FPU_UFLO 0x02
-+#define OEX_FPU_INEX 0x01
-+
-+/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry. */
-+
-+#define OHW_R4KEOP 0x1 /* R4000 end-of-page patch. */
-+#define OHW_R8KPFETCH 0x2 /* may need R8000 prefetch patch. */
-+#define OHW_R5KEOP 0x4 /* R5000 end-of-page patch. */
-+#define OHW_R5KCVTL 0x8 /* R5000 cvt.[ds].l bug. clean=1. */
-+
-+#define OPAD_PREFIX 0x1
-+#define OPAD_POSTFIX 0x2
-+#define OPAD_SYMBOL 0x4
-+
-+/* Entry found in `.options' section. */
-+
-+typedef struct
-+{
-+ Elf32_Word hwp_flags1; /* Extra flags. */
-+ Elf32_Word hwp_flags2; /* Extra flags. */
-+} Elf_Options_Hw;
-+
-+/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries. */
-+
-+#define OHWA0_R4KEOP_CHECKED 0x00000001
-+#define OHWA1_R4KEOP_CLEAN 0x00000002
-+
-+/* MIPS relocs. */
-+
-+#define R_MIPS_NONE 0 /* No reloc */
-+#define R_MIPS_16 1 /* Direct 16 bit */
-+#define R_MIPS_32 2 /* Direct 32 bit */
-+#define R_MIPS_REL32 3 /* PC relative 32 bit */
-+#define R_MIPS_26 4 /* Direct 26 bit shifted */
-+#define R_MIPS_HI16 5 /* High 16 bit */
-+#define R_MIPS_LO16 6 /* Low 16 bit */
-+#define R_MIPS_GPREL16 7 /* GP relative 16 bit */
-+#define R_MIPS_LITERAL 8 /* 16 bit literal entry */
-+#define R_MIPS_GOT16 9 /* 16 bit GOT entry */
-+#define R_MIPS_PC16 10 /* PC relative 16 bit */
-+#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */
-+#define R_MIPS_GPREL32 12 /* GP relative 32 bit */
-+
-+#define R_MIPS_SHIFT5 16
-+#define R_MIPS_SHIFT6 17
-+#define R_MIPS_64 18
-+#define R_MIPS_GOT_DISP 19
-+#define R_MIPS_GOT_PAGE 20
-+#define R_MIPS_GOT_OFST 21
-+#define R_MIPS_GOT_HI16 22
-+#define R_MIPS_GOT_LO16 23
-+#define R_MIPS_SUB 24
-+#define R_MIPS_INSERT_A 25
-+#define R_MIPS_INSERT_B 26
-+#define R_MIPS_DELETE 27
-+#define R_MIPS_HIGHER 28
-+#define R_MIPS_HIGHEST 29
-+#define R_MIPS_CALL_HI16 30
-+#define R_MIPS_CALL_LO16 31
-+#define R_MIPS_SCN_DISP 32
-+#define R_MIPS_REL16 33
-+#define R_MIPS_ADD_IMMEDIATE 34
-+#define R_MIPS_PJUMP 35
-+#define R_MIPS_RELGOT 36
-+#define R_MIPS_JALR 37
-+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
-+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
-+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
-+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
-+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
-+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
-+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
-+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
-+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
-+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
-+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
-+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
-+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
-+#define R_MIPS_GLOB_DAT 51
-+#define R_MIPS_COPY 126
-+#define R_MIPS_JUMP_SLOT 127
-+/* Keep this the last entry. */
-+#define R_MIPS_NUM 128
-+
-+/* Legal values for p_type field of Elf32_Phdr. */
-+
-+#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
-+#define PT_MIPS_RTPROC 0x70000001 /* Runtime procedure table. */
-+#define PT_MIPS_OPTIONS 0x70000002
-+
-+/* Special program header types. */
-+
-+#define PF_MIPS_LOCAL 0x10000000
-+
-+/* Legal values for d_tag field of Elf32_Dyn. */
-+
-+#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime linker interface version */
-+#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */
-+#define DT_MIPS_ICHECKSUM 0x70000003 /* Checksum */
-+#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */
-+#define DT_MIPS_FLAGS 0x70000005 /* Flags */
-+#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Base address */
-+#define DT_MIPS_MSYM 0x70000007
-+#define DT_MIPS_CONFLICT 0x70000008 /* Address of CONFLICT section */
-+#define DT_MIPS_LIBLIST 0x70000009 /* Address of LIBLIST section */
-+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local GOT entries */
-+#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of CONFLICT entries */
-+#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of LIBLIST entries */
-+#define DT_MIPS_SYMTABNO 0x70000011 /* Number of DYNSYM entries */
-+#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */
-+#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in DYNSYM */
-+#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */
-+#define DT_MIPS_RLD_MAP 0x70000016 /* Address of run time loader map. */
-+#define DT_MIPS_DELTA_CLASS 0x70000017 /* Delta C++ class definition. */
-+#define DT_MIPS_DELTA_CLASS_NO 0x70000018 /* Number of entries in
-+ DT_MIPS_DELTA_CLASS. */
-+#define DT_MIPS_DELTA_INSTANCE 0x70000019 /* Delta C++ class instances. */
-+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
-+ DT_MIPS_DELTA_INSTANCE. */
-+#define DT_MIPS_DELTA_RELOC 0x7000001b /* Delta relocations. */
-+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
-+ DT_MIPS_DELTA_RELOC. */
-+#define DT_MIPS_DELTA_SYM 0x7000001d /* Delta symbols that Delta
-+ relocations refer to. */
-+#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
-+ DT_MIPS_DELTA_SYM. */
-+#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
-+ class declaration. */
-+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
-+ DT_MIPS_DELTA_CLASSSYM. */
-+#define DT_MIPS_CXX_FLAGS 0x70000022 /* Flags indicating for C++ flavor. */
-+#define DT_MIPS_PIXIE_INIT 0x70000023
-+#define DT_MIPS_SYMBOL_LIB 0x70000024
-+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
-+#define DT_MIPS_LOCAL_GOTIDX 0x70000026
-+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
-+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
-+#define DT_MIPS_OPTIONS 0x70000029 /* Address of .options. */
-+#define DT_MIPS_INTERFACE 0x7000002a /* Address of .interface. */
-+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
-+#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
-+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
-+ function stored in GOT. */
-+#define DT_MIPS_PERF_SUFFIX 0x7000002e /* Default suffix of dso to be added
-+ by rld on dlopen() calls. */
-+#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
-+#define DT_MIPS_GP_VALUE 0x70000030 /* GP value for aux GOTs. */
-+#define DT_MIPS_AUX_DYNAMIC 0x70000031 /* Address of aux .dynamic. */
-+/* The address of .got.plt in an executable using the new non-PIC ABI. */
-+#define DT_MIPS_PLTGOT 0x70000032
-+/* The base of the PLT in an executable using the new non-PIC ABI if that
-+ PLT is writable. For a non-writable PLT, this is omitted or has a zero
-+ value. */
-+#define DT_MIPS_RWPLT 0x70000034
-+#define DT_MIPS_NUM 0x35
-+
-+/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry. */
-+
-+#define RHF_NONE 0 /* No flags */
-+#define RHF_QUICKSTART (1 << 0) /* Use quickstart */
-+#define RHF_NOTPOT (1 << 1) /* Hash size not power of 2 */
-+#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2) /* Ignore LD_LIBRARY_PATH */
-+#define RHF_NO_MOVE (1 << 3)
-+#define RHF_SGI_ONLY (1 << 4)
-+#define RHF_GUARANTEE_INIT (1 << 5)
-+#define RHF_DELTA_C_PLUS_PLUS (1 << 6)
-+#define RHF_GUARANTEE_START_INIT (1 << 7)
-+#define RHF_PIXIE (1 << 8)
-+#define RHF_DEFAULT_DELAY_LOAD (1 << 9)
-+#define RHF_REQUICKSTART (1 << 10)
-+#define RHF_REQUICKSTARTED (1 << 11)
-+#define RHF_CORD (1 << 12)
-+#define RHF_NO_UNRES_UNDEF (1 << 13)
-+#define RHF_RLD_ORDER_SAFE (1 << 14)
-+
-+/* Entries found in sections of type SHT_MIPS_LIBLIST. */
-+
-+typedef struct
-+{
-+ Elf32_Word l_name; /* Name (string table index) */
-+ Elf32_Word l_time_stamp; /* Timestamp */
-+ Elf32_Word l_checksum; /* Checksum */
-+ Elf32_Word l_version; /* Interface version */
-+ Elf32_Word l_flags; /* Flags */
-+} Elf32_Lib;
-+
-+typedef struct
-+{
-+ Elf64_Word l_name; /* Name (string table index) */
-+ Elf64_Word l_time_stamp; /* Timestamp */
-+ Elf64_Word l_checksum; /* Checksum */
-+ Elf64_Word l_version; /* Interface version */
-+ Elf64_Word l_flags; /* Flags */
-+} Elf64_Lib;
-+
-+
-+/* Legal values for l_flags. */
-+
-+#define LL_NONE 0
-+#define LL_EXACT_MATCH (1 << 0) /* Require exact match */
-+#define LL_IGNORE_INT_VER (1 << 1) /* Ignore interface version */
-+#define LL_REQUIRE_MINOR (1 << 2)
-+#define LL_EXPORTS (1 << 3)
-+#define LL_DELAY_LOAD (1 << 4)
-+#define LL_DELTA (1 << 5)
-+
-+/* Entries found in sections of type SHT_MIPS_CONFLICT. */
-+
-+typedef Elf32_Addr Elf32_Conflict;
-+
-+
-+/* HPPA specific definitions. */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr. */
-+
-+#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
-+#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
-+#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
-+#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
-+#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
-+ prediction. */
-+#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
-+#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
-+
-+/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
-+
-+#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
-+#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
-+#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
-+
-+/* Additional section indeces. */
-+
-+#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
-+ symbols in ANSI C. */
-+#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
-+
-+/* Legal values for sh_type field of Elf32_Shdr. */
-+
-+#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
-+#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
-+#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
-+
-+/* Legal values for sh_flags field of Elf32_Shdr. */
-+
-+#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
-+#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
-+#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type). */
-+
-+#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
-+
-+#define STT_HP_OPAQUE (STT_LOOS + 0x1)
-+#define STT_HP_STUB (STT_LOOS + 0x2)
-+
-+/* HPPA relocs. */
-+
-+#define R_PARISC_NONE 0 /* No reloc. */
-+#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
-+#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
-+#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
-+#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
-+#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
-+#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
-+#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
-+#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
-+#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
-+#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
-+#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
-+#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
-+#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
-+#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
-+#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
-+#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
-+#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
-+#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
-+#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
-+#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
-+#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
-+#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
-+#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
-+#define R_PARISC_FPTR64 64 /* 64 bits function address. */
-+#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
-+#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
-+#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
-+#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
-+#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
-+#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
-+#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
-+#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
-+#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
-+#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
-+#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
-+#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
-+#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
-+#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
-+#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
-+#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
-+#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
-+#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
-+#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
-+#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
-+#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
-+#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
-+#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
-+#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
-+#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
-+#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
-+#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
-+#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
-+#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
-+#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
-+#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
-+#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
-+#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
-+#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
-+#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
-+#define R_PARISC_LORESERVE 128
-+#define R_PARISC_COPY 128 /* Copy relocation. */
-+#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
-+#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
-+#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
-+#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
-+#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
-+#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
-+#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
-+#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
-+#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
-+#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
-+#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
-+#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
-+#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
-+#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
-+#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
-+#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
-+#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
-+#define R_PARISC_HIRESERVE 255
-+
-+/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
-+
-+#define PT_HP_TLS (PT_LOOS + 0x0)
-+#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
-+#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
-+#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
-+#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
-+#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
-+#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
-+#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
-+#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
-+#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
-+#define PT_HP_PARALLEL (PT_LOOS + 0x10)
-+#define PT_HP_FASTBIND (PT_LOOS + 0x11)
-+#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
-+#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
-+#define PT_HP_STACK (PT_LOOS + 0x14)
-+
-+#define PT_PARISC_ARCHEXT 0x70000000
-+#define PT_PARISC_UNWIND 0x70000001
-+
-+/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
-+
-+#define PF_PARISC_SBP 0x08000000
-+
-+#define PF_HP_PAGE_SIZE 0x00100000
-+#define PF_HP_FAR_SHARED 0x00200000
-+#define PF_HP_NEAR_SHARED 0x00400000
-+#define PF_HP_CODE 0x01000000
-+#define PF_HP_MODIFY 0x02000000
-+#define PF_HP_LAZYSWAP 0x04000000
-+#define PF_HP_SBP 0x08000000
-+
-+
-+/* Alpha specific definitions. */
-+
-+/* Legal values for e_flags field of Elf64_Ehdr. */
-+
-+#define EF_ALPHA_32BIT 1 /* All addresses must be < 2GB. */
-+#define EF_ALPHA_CANRELAX 2 /* Relocations for relaxing exist. */
-+
-+/* Legal values for sh_type field of Elf64_Shdr. */
-+
-+/* These two are primerily concerned with ECOFF debugging info. */
-+#define SHT_ALPHA_DEBUG 0x70000001
-+#define SHT_ALPHA_REGINFO 0x70000002
-+
-+/* Legal values for sh_flags field of Elf64_Shdr. */
-+
-+#define SHF_ALPHA_GPREL 0x10000000
-+
-+/* Legal values for st_other field of Elf64_Sym. */
-+#define STO_ALPHA_NOPV 0x80 /* No PV required. */
-+#define STO_ALPHA_STD_GPLOAD 0x88 /* PV only used for initial ldgp. */
-+
-+/* Alpha relocs. */
-+
-+#define R_ALPHA_NONE 0 /* No reloc */
-+#define R_ALPHA_REFLONG 1 /* Direct 32 bit */
-+#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */
-+#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */
-+#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */
-+#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */
-+#define R_ALPHA_GPDISP 6 /* Add displacement to GP */
-+#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */
-+#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */
-+#define R_ALPHA_SREL16 9 /* PC relative 16 bit */
-+#define R_ALPHA_SREL32 10 /* PC relative 32 bit */
-+#define R_ALPHA_SREL64 11 /* PC relative 64 bit */
-+#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */
-+#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */
-+#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */
-+#define R_ALPHA_COPY 24 /* Copy symbol at runtime */
-+#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */
-+#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */
-+#define R_ALPHA_RELATIVE 27 /* Adjust by program base */
-+#define R_ALPHA_TLS_GD_HI 28
-+#define R_ALPHA_TLSGD 29
-+#define R_ALPHA_TLS_LDM 30
-+#define R_ALPHA_DTPMOD64 31
-+#define R_ALPHA_GOTDTPREL 32
-+#define R_ALPHA_DTPREL64 33
-+#define R_ALPHA_DTPRELHI 34
-+#define R_ALPHA_DTPRELLO 35
-+#define R_ALPHA_DTPREL16 36
-+#define R_ALPHA_GOTTPREL 37
-+#define R_ALPHA_TPREL64 38
-+#define R_ALPHA_TPRELHI 39
-+#define R_ALPHA_TPRELLO 40
-+#define R_ALPHA_TPREL16 41
-+/* Keep this the last entry. */
-+#define R_ALPHA_NUM 46
-+
-+/* Magic values of the LITUSE relocation addend. */
-+#define LITUSE_ALPHA_ADDR 0
-+#define LITUSE_ALPHA_BASE 1
-+#define LITUSE_ALPHA_BYTOFF 2
-+#define LITUSE_ALPHA_JSR 3
-+#define LITUSE_ALPHA_TLS_GD 4
-+#define LITUSE_ALPHA_TLS_LDM 5
-+
-+/* Legal values for d_tag of Elf64_Dyn. */
-+#define DT_ALPHA_PLTRO (DT_LOPROC + 0)
-+#define DT_ALPHA_NUM 1
-+
-+/* PowerPC specific declarations */
-+
-+/* Values for Elf32/64_Ehdr.e_flags. */
-+#define EF_PPC_EMB 0x80000000 /* PowerPC embedded flag */
-+
-+/* Cygnus local bits below */
-+#define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/
-+#define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib
-+ flag */
-+
-+/* PowerPC relocations defined by the ABIs */
-+#define R_PPC_NONE 0
-+#define R_PPC_ADDR32 1 /* 32bit absolute address */
-+#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
-+#define R_PPC_ADDR16 3 /* 16bit absolute address */
-+#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
-+#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
-+#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
-+#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
-+#define R_PPC_ADDR14_BRTAKEN 8
-+#define R_PPC_ADDR14_BRNTAKEN 9
-+#define R_PPC_REL24 10 /* PC relative 26 bit */
-+#define R_PPC_REL14 11 /* PC relative 16 bit */
-+#define R_PPC_REL14_BRTAKEN 12
-+#define R_PPC_REL14_BRNTAKEN 13
-+#define R_PPC_GOT16 14
-+#define R_PPC_GOT16_LO 15
-+#define R_PPC_GOT16_HI 16
-+#define R_PPC_GOT16_HA 17
-+#define R_PPC_PLTREL24 18
-+#define R_PPC_COPY 19
-+#define R_PPC_GLOB_DAT 20
-+#define R_PPC_JMP_SLOT 21
-+#define R_PPC_RELATIVE 22
-+#define R_PPC_LOCAL24PC 23
-+#define R_PPC_UADDR32 24
-+#define R_PPC_UADDR16 25
-+#define R_PPC_REL32 26
-+#define R_PPC_PLT32 27
-+#define R_PPC_PLTREL32 28
-+#define R_PPC_PLT16_LO 29
-+#define R_PPC_PLT16_HI 30
-+#define R_PPC_PLT16_HA 31
-+#define R_PPC_SDAREL16 32
-+#define R_PPC_SECTOFF 33
-+#define R_PPC_SECTOFF_LO 34
-+#define R_PPC_SECTOFF_HI 35
-+#define R_PPC_SECTOFF_HA 36
-+
-+/* PowerPC relocations defined for the TLS access ABI. */
-+#define R_PPC_TLS 67 /* none (sym+add)@tls */
-+#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
-+#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
-+#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
-+#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
-+#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
-+#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
-+#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
-+#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
-+#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
-+#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
-+#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
-+#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
-+#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
-+#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
-+#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
-+#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
-+#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
-+#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
-+#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
-+#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
-+#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
-+#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
-+#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
-+#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
-+#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
-+#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
-+#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
-+
-+/* Keep this the last entry. */
-+#define R_PPC_NUM 95
-+
-+/* The remaining relocs are from the Embedded ELF ABI, and are not
-+ in the SVR4 ELF ABI. */
-+#define R_PPC_EMB_NADDR32 101
-+#define R_PPC_EMB_NADDR16 102
-+#define R_PPC_EMB_NADDR16_LO 103
-+#define R_PPC_EMB_NADDR16_HI 104
-+#define R_PPC_EMB_NADDR16_HA 105
-+#define R_PPC_EMB_SDAI16 106
-+#define R_PPC_EMB_SDA2I16 107
-+#define R_PPC_EMB_SDA2REL 108
-+#define R_PPC_EMB_SDA21 109 /* 16 bit offset in SDA */
-+#define R_PPC_EMB_MRKREF 110
-+#define R_PPC_EMB_RELSEC16 111
-+#define R_PPC_EMB_RELST_LO 112
-+#define R_PPC_EMB_RELST_HI 113
-+#define R_PPC_EMB_RELST_HA 114
-+#define R_PPC_EMB_BIT_FLD 115
-+#define R_PPC_EMB_RELSDA 116 /* 16 bit relative offset in SDA */
-+
-+/* Diab tool relocations. */
-+#define R_PPC_DIAB_SDA21_LO 180 /* like EMB_SDA21, but lower 16 bit */
-+#define R_PPC_DIAB_SDA21_HI 181 /* like EMB_SDA21, but high 16 bit */
-+#define R_PPC_DIAB_SDA21_HA 182 /* like EMB_SDA21, adjusted high 16 */
-+#define R_PPC_DIAB_RELSDA_LO 183 /* like EMB_RELSDA, but lower 16 bit */
-+#define R_PPC_DIAB_RELSDA_HI 184 /* like EMB_RELSDA, but high 16 bit */
-+#define R_PPC_DIAB_RELSDA_HA 185 /* like EMB_RELSDA, adjusted high 16 */
-+
-+/* GNU relocs used in PIC code sequences. */
-+#define R_PPC_REL16 249 /* word32 (sym+add-.) */
-+#define R_PPC_REL16_LO 250 /* half16 (sym+add-.)@l */
-+#define R_PPC_REL16_HI 251 /* half16 (sym+add-.)@h */
-+#define R_PPC_REL16_HA 252 /* half16 (sym+add-.)@ha */
-+
-+/* This is a phony reloc to handle any old fashioned TOC16 references
-+ that may still be in object files. */
-+#define R_PPC_TOC16 255
-+
-+/* PowerPC specific values for the Dyn d_tag field. */
-+#define DT_PPC_GOT (DT_LOPROC + 0)
-+#define DT_PPC_NUM 1
-+
-+/* PowerPC64 relocations defined by the ABIs */
-+#define R_PPC64_NONE R_PPC_NONE
-+#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address */
-+#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned */
-+#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address */
-+#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of address */
-+#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of address. */
-+#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
-+#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned */
-+#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
-+#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
-+#define R_PPC64_REL24 R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
-+#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit */
-+#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
-+#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
-+#define R_PPC64_GOT16 R_PPC_GOT16
-+#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
-+#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
-+#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
-+
-+#define R_PPC64_COPY R_PPC_COPY
-+#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
-+#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
-+#define R_PPC64_RELATIVE R_PPC_RELATIVE
-+
-+#define R_PPC64_UADDR32 R_PPC_UADDR32
-+#define R_PPC64_UADDR16 R_PPC_UADDR16
-+#define R_PPC64_REL32 R_PPC_REL32
-+#define R_PPC64_PLT32 R_PPC_PLT32
-+#define R_PPC64_PLTREL32 R_PPC_PLTREL32
-+#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
-+#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
-+#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
-+
-+#define R_PPC64_SECTOFF R_PPC_SECTOFF
-+#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
-+#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
-+#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
-+#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2 */
-+#define R_PPC64_ADDR64 38 /* doubleword64 S + A */
-+#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A) */
-+#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A) */
-+#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A) */
-+#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A) */
-+#define R_PPC64_UADDR64 43 /* doubleword64 S + A */
-+#define R_PPC64_REL64 44 /* doubleword64 S + A - P */
-+#define R_PPC64_PLT64 45 /* doubleword64 L + A */
-+#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P */
-+#define R_PPC64_TOC16 47 /* half16* S + A - .TOC */
-+#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.) */
-+#define R_PPC64_TOC 51 /* doubleword64 .TOC */
-+#define R_PPC64_PLTGOT16 52 /* half16* M + A */
-+#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A) */
-+#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A) */
-+#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A) */
-+
-+#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2 */
-+#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2 */
-+#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2 */
-+#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2 */
-+#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2 */
-+#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2 */
-+#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2 */
-+#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2 */
-+#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2 */
-+#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2 */
-+#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2 */
-+
-+/* PowerPC64 relocations defined for the TLS access ABI. */
-+#define R_PPC64_TLS 67 /* none (sym+add)@tls */
-+#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
-+#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
-+#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
-+#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
-+#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
-+#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
-+#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
-+#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
-+#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
-+#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
-+#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
-+#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
-+#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
-+#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
-+#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
-+#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
-+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-+#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
-+#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
-+#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
-+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-+#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
-+#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
-+#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
-+#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
-+#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
-+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
-+#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
-+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
-+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
-+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
-+
-+/* Keep this the last entry. */
-+#define R_PPC64_NUM 107
-+
-+/* PowerPC64 specific values for the Dyn d_tag field. */
-+#define DT_PPC64_GLINK (DT_LOPROC + 0)
-+#define DT_PPC64_OPD (DT_LOPROC + 1)
-+#define DT_PPC64_OPDSZ (DT_LOPROC + 2)
-+#define DT_PPC64_NUM 3
-+
-+
-+/* ARM specific declarations */
-+
-+/* Processor specific flags for the ELF header e_flags field. */
-+#define EF_ARM_RELEXEC 0x01
-+#define EF_ARM_HASENTRY 0x02
-+#define EF_ARM_INTERWORK 0x04
-+#define EF_ARM_APCS_26 0x08
-+#define EF_ARM_APCS_FLOAT 0x10
-+#define EF_ARM_PIC 0x20
-+#define EF_ARM_ALIGN8 0x40 /* 8-bit structure alignment is in use */
-+#define EF_ARM_NEW_ABI 0x80
-+#define EF_ARM_OLD_ABI 0x100
-+
-+/* Other constants defined in the ARM ELF spec. version B-01. */
-+/* NB. These conflict with values defined above. */
-+#define EF_ARM_SYMSARESORTED 0x04
-+#define EF_ARM_DYNSYMSUSESEGIDX 0x08
-+#define EF_ARM_MAPSYMSFIRST 0x10
-+#define EF_ARM_EABIMASK 0XFF000000
-+
-+#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
-+#define EF_ARM_EABI_UNKNOWN 0x00000000
-+#define EF_ARM_EABI_VER1 0x01000000
-+#define EF_ARM_EABI_VER2 0x02000000
-+
-+/* Additional symbol types for Thumb */
-+#define STT_ARM_TFUNC 0xd
-+
-+/* ARM-specific values for sh_flags */
-+#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */
-+#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined
-+ in the input to a link step */
-+
-+/* ARM-specific program header flags */
-+#define PF_ARM_SB 0x10000000 /* Segment contains the location
-+ addressed by the static base */
-+
-+/* Processor specific values for the Phdr p_type field. */
-+#define PT_ARM_EXIDX 0x70000001 /* .ARM.exidx segment */
-+
-+/* ARM relocs. */
-+
-+#define R_ARM_NONE 0 /* No reloc */
-+#define R_ARM_PC24 1 /* PC relative 26 bit branch */
-+#define R_ARM_ABS32 2 /* Direct 32 bit */
-+#define R_ARM_REL32 3 /* PC relative 32 bit */
-+#define R_ARM_PC13 4
-+#define R_ARM_ABS16 5 /* Direct 16 bit */
-+#define R_ARM_ABS12 6 /* Direct 12 bit */
-+#define R_ARM_THM_ABS5 7
-+#define R_ARM_ABS8 8 /* Direct 8 bit */
-+#define R_ARM_SBREL32 9
-+#define R_ARM_THM_PC22 10
-+#define R_ARM_THM_PC8 11
-+#define R_ARM_AMP_VCALL9 12
-+#define R_ARM_SWI24 13
-+#define R_ARM_THM_SWI8 14
-+#define R_ARM_XPC25 15
-+#define R_ARM_THM_XPC22 16
-+#define R_ARM_TLS_DTPMOD32 17
-+#define R_ARM_TLS_DTPOFF32 18
-+#define R_ARM_TLS_TPOFF32 19
-+#define R_ARM_COPY 20 /* Copy symbol at runtime */
-+#define R_ARM_GLOB_DAT 21 /* Create GOT entry */
-+#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */
-+#define R_ARM_RELATIVE 23 /* Adjust by program base */
-+#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
-+#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
-+#define R_ARM_GOT32 26 /* 32 bit GOT entry */
-+#define R_ARM_PLT32 27 /* 32 bit PLT address */
-+#define R_ARM_ALU_PCREL_7_0 32
-+#define R_ARM_ALU_PCREL_15_8 33
-+#define R_ARM_ALU_PCREL_23_15 34
-+#define R_ARM_LDR_SBREL_11_0 35
-+#define R_ARM_ALU_SBREL_19_12 36
-+#define R_ARM_ALU_SBREL_27_20 37
-+#define R_ARM_GNU_VTENTRY 100
-+#define R_ARM_GNU_VTINHERIT 101
-+#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
-+#define R_ARM_THM_PC9 103 /* thumb conditional branch */
-+#define R_ARM_TLS_GD32 104
-+#define R_ARM_TLS_LDM32 105
-+#define R_ARM_TLS_LDO32 106
-+#define R_ARM_TLS_IE32 107
-+#define R_ARM_TLS_LE32 108
-+#define R_ARM_TLS_LDO12 109
-+#define R_ARM_TLS_LE12 110
-+#define R_ARM_TLS_IE12GP 111
-+#define R_ARM_RXPC25 249
-+#define R_ARM_RSBREL32 250
-+#define R_ARM_THM_RPC22 251
-+#define R_ARM_RREL32 252
-+#define R_ARM_RABS22 253
-+#define R_ARM_RPC24 254
-+#define R_ARM_RBASE 255
-+/* Keep this the last entry. */
-+#define R_ARM_NUM 256
-+
-+/* IA-64 specific declarations. */
-+
-+/* Processor specific flags for the Ehdr e_flags field. */
-+#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
-+#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
-+#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */
-+
-+/* Processor specific values for the Phdr p_type field. */
-+#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */
-+#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */
-+#define PT_IA_64_HP_OPT_ANOT (PT_LOOS + 0x12)
-+#define PT_IA_64_HP_HSL_ANOT (PT_LOOS + 0x13)
-+#define PT_IA_64_HP_STACK (PT_LOOS + 0x14)
-+
-+/* Processor specific flags for the Phdr p_flags field. */
-+#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */
-+
-+/* Processor specific values for the Shdr sh_type field. */
-+#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */
-+#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */
-+
-+/* Processor specific flags for the Shdr sh_flags field. */
-+#define SHF_IA_64_SHORT 0x10000000 /* section near gp */
-+#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */
-+
-+/* Processor specific values for the Dyn d_tag field. */
-+#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0)
-+#define DT_IA_64_NUM 1
-+
-+/* IA-64 relocations. */
-+#define R_IA64_NONE 0x00 /* none */
-+#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */
-+#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */
-+#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */
-+#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */
-+#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */
-+#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */
-+#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */
-+#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */
-+#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */
-+#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */
-+#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */
-+#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */
-+#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */
-+#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */
-+#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */
-+#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */
-+#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */
-+#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */
-+#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */
-+#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */
-+#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */
-+#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */
-+#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */
-+#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */
-+#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */
-+#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */
-+#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */
-+#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */
-+#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */
-+#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */
-+#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */
-+#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */
-+#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */
-+#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */
-+#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */
-+#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */
-+#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */
-+#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */
-+#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */
-+#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */
-+#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */
-+#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */
-+#define R_IA64_REL32MSB 0x6c /* data 4 + REL */
-+#define R_IA64_REL32LSB 0x6d /* data 4 + REL */
-+#define R_IA64_REL64MSB 0x6e /* data 8 + REL */
-+#define R_IA64_REL64LSB 0x6f /* data 8 + REL */
-+#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */
-+#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */
-+#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */
-+#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */
-+#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */
-+#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */
-+#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */
-+#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
-+#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
-+#define R_IA64_COPY 0x84 /* copy relocation */
-+#define R_IA64_SUB 0x85 /* Addend and symbol difference */
-+#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */
-+#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */
-+#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */
-+#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */
-+#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */
-+#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */
-+#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */
-+#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */
-+#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */
-+#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */
-+#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */
-+#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */
-+#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */
-+#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */
-+#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */
-+#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */
-+
-+/* SH specific declarations */
-+
-+/* SH specific values for `st_other'. */
-+
-+/* If set, this is a symbol pointing to SHmedia code, which will be branched
-+ to, so need to add 1 to the symbol value. */
-+#define STO_SH5_ISA32 (1 << 2)
-+
-+/* SH relocs. */
-+#define R_SH_NONE 0
-+#define R_SH_DIR32 1
-+#define R_SH_REL32 2
-+#define R_SH_DIR8WPN 3
-+#define R_SH_IND12W 4
-+#define R_SH_DIR8WPL 5
-+#define R_SH_DIR8WPZ 6
-+#define R_SH_DIR8BP 7
-+#define R_SH_DIR8W 8
-+#define R_SH_DIR8L 9
-+#define R_SH_SWITCH16 25
-+#define R_SH_SWITCH32 26
-+#define R_SH_USES 27
-+#define R_SH_COUNT 28
-+#define R_SH_ALIGN 29
-+#define R_SH_CODE 30
-+#define R_SH_DATA 31
-+#define R_SH_LABEL 32
-+#define R_SH_SWITCH8 33
-+#define R_SH_GNU_VTINHERIT 34
-+#define R_SH_GNU_VTENTRY 35
-+#define R_SH_TLS_GD_32 144
-+#define R_SH_TLS_LD_32 145
-+#define R_SH_TLS_LDO_32 146
-+#define R_SH_TLS_IE_32 147
-+#define R_SH_TLS_LE_32 148
-+#define R_SH_TLS_DTPMOD32 149
-+#define R_SH_TLS_DTPOFF32 150
-+#define R_SH_TLS_TPOFF32 151
-+#define R_SH_GOT32 160
-+#define R_SH_PLT32 161
-+#define R_SH_COPY 162
-+#define R_SH_GLOB_DAT 163
-+#define R_SH_JMP_SLOT 164
-+#define R_SH_RELATIVE 165
-+#define R_SH_GOTOFF 166
-+#define R_SH_GOTPC 167
-+#define R_SH_RELATIVE_LOW16 197
-+#define R_SH_RELATIVE_MEDLOW16 198
-+#define R_SH_IMM_LOW16 246
-+#define R_SH_IMM_LOW16_PCREL 247
-+#define R_SH_IMM_MEDLOW16 248
-+#define R_SH_IMM_MEDLOW16_PCREL 249
-+
-+/* Keep this the last entry. */
-+#define R_SH_NUM 256
-+
-+/* Additional s390 relocs */
-+
-+#define R_390_NONE 0 /* No reloc. */
-+#define R_390_8 1 /* Direct 8 bit. */
-+#define R_390_12 2 /* Direct 12 bit. */
-+#define R_390_16 3 /* Direct 16 bit. */
-+#define R_390_32 4 /* Direct 32 bit. */
-+#define R_390_PC32 5 /* PC relative 32 bit. */
-+#define R_390_GOT12 6 /* 12 bit GOT offset. */
-+#define R_390_GOT32 7 /* 32 bit GOT offset. */
-+#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
-+#define R_390_COPY 9 /* Copy symbol at runtime. */
-+#define R_390_GLOB_DAT 10 /* Create GOT entry. */
-+#define R_390_JMP_SLOT 11 /* Create PLT entry. */
-+#define R_390_RELATIVE 12 /* Adjust by program base. */
-+#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
-+#define R_390_GOTPC 14 /* 32 bit PC relative offset to GOT. */
-+#define R_390_GOT16 15 /* 16 bit GOT offset. */
-+#define R_390_PC16 16 /* PC relative 16 bit. */
-+#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
-+#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
-+#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
-+#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
-+#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
-+#define R_390_64 22 /* Direct 64 bit. */
-+#define R_390_PC64 23 /* PC relative 64 bit. */
-+#define R_390_GOT64 24 /* 64 bit GOT offset. */
-+#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
-+#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
-+#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
-+#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
-+#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
-+#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
-+#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
-+#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
-+#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
-+#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
-+#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */
-+#define R_390_TLS_GDCALL 38 /* Tag for function call in general
-+ dynamic TLS code. */
-+#define R_390_TLS_LDCALL 39 /* Tag for function call in local
-+ dynamic TLS code. */
-+#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
-+ thread local data. */
-+#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
-+ thread local data. */
-+#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
-+ block offset. */
-+#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
-+ block offset. */
-+#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
-+ block offset. */
-+#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
-+ thread local data in LE code. */
-+#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
-+ thread local data in LE code. */
-+#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
-+ negated static TLS block offset. */
-+#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
-+ negated static TLS block offset. */
-+#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
-+ negated static TLS block offset. */
-+#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
-+ static TLS block. */
-+#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
-+ static TLS block. */
-+#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
-+ block. */
-+#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
-+ block. */
-+#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */
-+#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
-+#define R_390_TLS_TPOFF 56 /* Negated offset in static TLS
-+ block. */
-+#define R_390_20 57 /* Direct 20 bit. */
-+#define R_390_GOT20 58 /* 20 bit GOT offset. */
-+#define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */
-+#define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS
-+ block offset. */
-+/* Keep this the last entry. */
-+#define R_390_NUM 61
-+
-+
-+/* CRIS flags. */
-+#define EF_CRIS_VARIANT_MASK 0x0000000e
-+#define EF_CRIS_VARIANT_ANY_V0_V10 0x00000000
-+#define EF_CRIS_VARIANT_V32 0x00000002
-+#define EF_CRIS_VARIANT_COMMON_V10_V32 0x00000004
-+
-+/* CRIS relocations. */
-+#define R_CRIS_NONE 0
-+#define R_CRIS_8 1
-+#define R_CRIS_16 2
-+#define R_CRIS_32 3
-+#define R_CRIS_8_PCREL 4
-+#define R_CRIS_16_PCREL 5
-+#define R_CRIS_32_PCREL 6
-+#define R_CRIS_GNU_VTINHERIT 7
-+#define R_CRIS_GNU_VTENTRY 8
-+#define R_CRIS_COPY 9
-+#define R_CRIS_GLOB_DAT 10
-+#define R_CRIS_JUMP_SLOT 11
-+#define R_CRIS_RELATIVE 12
-+#define R_CRIS_16_GOT 13
-+#define R_CRIS_32_GOT 14
-+#define R_CRIS_16_GOTPLT 15
-+#define R_CRIS_32_GOTPLT 16
-+#define R_CRIS_32_GOTREL 17
-+#define R_CRIS_32_PLT_GOTREL 18
-+#define R_CRIS_32_PLT_PCREL 19
-+
-+/* Keep this the last entry. */
-+#define R_CRIS_NUM 20
-+
-+
-+/* AMD x86-64 relocations. */
-+#define R_X86_64_NONE 0 /* No reloc */
-+#define R_X86_64_64 1 /* Direct 64 bit */
-+#define R_X86_64_PC32 2 /* PC relative 32 bit signed */
-+#define R_X86_64_GOT32 3 /* 32 bit GOT entry */
-+#define R_X86_64_PLT32 4 /* 32 bit PLT address */
-+#define R_X86_64_COPY 5 /* Copy symbol at runtime */
-+#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */
-+#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */
-+#define R_X86_64_RELATIVE 8 /* Adjust by program base */
-+#define R_X86_64_GOTPCREL 9 /* 32 bit signed PC relative
-+ offset to GOT */
-+#define R_X86_64_32 10 /* Direct 32 bit zero extended */
-+#define R_X86_64_32S 11 /* Direct 32 bit sign extended */
-+#define R_X86_64_16 12 /* Direct 16 bit zero extended */
-+#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
-+#define R_X86_64_8 14 /* Direct 8 bit sign extended */
-+#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
-+#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */
-+#define R_X86_64_DTPOFF64 17 /* Offset in module's TLS block */
-+#define R_X86_64_TPOFF64 18 /* Offset in initial TLS block */
-+#define R_X86_64_TLSGD 19 /* 32 bit signed PC relative offset
-+ to two GOT entries for GD symbol */
-+#define R_X86_64_TLSLD 20 /* 32 bit signed PC relative offset
-+ to two GOT entries for LD symbol */
-+#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */
-+#define R_X86_64_GOTTPOFF 22 /* 32 bit signed PC relative offset
-+ to GOT entry for IE symbol */
-+#define R_X86_64_TPOFF32 23 /* Offset in initial TLS block */
-+
-+#define R_X86_64_NUM 24
-+
-+
-+/* AM33 relocations. */
-+#define R_MN10300_NONE 0 /* No reloc. */
-+#define R_MN10300_32 1 /* Direct 32 bit. */
-+#define R_MN10300_16 2 /* Direct 16 bit. */
-+#define R_MN10300_8 3 /* Direct 8 bit. */
-+#define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
-+#define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
-+#define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
-+#define R_MN10300_GNU_VTINHERIT 7 /* Ancient C++ vtable garbage... */
-+#define R_MN10300_GNU_VTENTRY 8 /* ... collection annotation. */
-+#define R_MN10300_24 9 /* Direct 24 bit. */
-+#define R_MN10300_GOTPC32 10 /* 32-bit PCrel offset to GOT. */
-+#define R_MN10300_GOTPC16 11 /* 16-bit PCrel offset to GOT. */
-+#define R_MN10300_GOTOFF32 12 /* 32-bit offset from GOT. */
-+#define R_MN10300_GOTOFF24 13 /* 24-bit offset from GOT. */
-+#define R_MN10300_GOTOFF16 14 /* 16-bit offset from GOT. */
-+#define R_MN10300_PLT32 15 /* 32-bit PCrel to PLT entry. */
-+#define R_MN10300_PLT16 16 /* 16-bit PCrel to PLT entry. */
-+#define R_MN10300_GOT32 17 /* 32-bit offset to GOT entry. */
-+#define R_MN10300_GOT24 18 /* 24-bit offset to GOT entry. */
-+#define R_MN10300_GOT16 19 /* 16-bit offset to GOT entry. */
-+#define R_MN10300_COPY 20 /* Copy symbol at runtime. */
-+#define R_MN10300_GLOB_DAT 21 /* Create GOT entry. */
-+#define R_MN10300_JMP_SLOT 22 /* Create PLT entry. */
-+#define R_MN10300_RELATIVE 23 /* Adjust by program base. */
-+
-+#define R_MN10300_NUM 24
-+
-+
-+/* M32R relocs. */
-+#define R_M32R_NONE 0 /* No reloc. */
-+#define R_M32R_16 1 /* Direct 16 bit. */
-+#define R_M32R_32 2 /* Direct 32 bit. */
-+#define R_M32R_24 3 /* Direct 24 bit. */
-+#define R_M32R_10_PCREL 4 /* PC relative 10 bit shifted. */
-+#define R_M32R_18_PCREL 5 /* PC relative 18 bit shifted. */
-+#define R_M32R_26_PCREL 6 /* PC relative 26 bit shifted. */
-+#define R_M32R_HI16_ULO 7 /* High 16 bit with unsigned low. */
-+#define R_M32R_HI16_SLO 8 /* High 16 bit with signed low. */
-+#define R_M32R_LO16 9 /* Low 16 bit. */
-+#define R_M32R_SDA16 10 /* 16 bit offset in SDA. */
-+#define R_M32R_GNU_VTINHERIT 11
-+#define R_M32R_GNU_VTENTRY 12
-+/* M32R relocs use SHT_RELA. */
-+#define R_M32R_16_RELA 33 /* Direct 16 bit. */
-+#define R_M32R_32_RELA 34 /* Direct 32 bit. */
-+#define R_M32R_24_RELA 35 /* Direct 24 bit. */
-+#define R_M32R_10_PCREL_RELA 36 /* PC relative 10 bit shifted. */
-+#define R_M32R_18_PCREL_RELA 37 /* PC relative 18 bit shifted. */
-+#define R_M32R_26_PCREL_RELA 38 /* PC relative 26 bit shifted. */
-+#define R_M32R_HI16_ULO_RELA 39 /* High 16 bit with unsigned low */
-+#define R_M32R_HI16_SLO_RELA 40 /* High 16 bit with signed low */
-+#define R_M32R_LO16_RELA 41 /* Low 16 bit */
-+#define R_M32R_SDA16_RELA 42 /* 16 bit offset in SDA */
-+#define R_M32R_RELA_GNU_VTINHERIT 43
-+#define R_M32R_RELA_GNU_VTENTRY 44
-+
-+#define R_M32R_GOT24 48 /* 24 bit GOT entry */
-+#define R_M32R_26_PLTREL 49 /* 26 bit PC relative to PLT shifted */
-+#define R_M32R_COPY 50 /* Copy symbol at runtime */
-+#define R_M32R_GLOB_DAT 51 /* Create GOT entry */
-+#define R_M32R_JMP_SLOT 52 /* Create PLT entry */
-+#define R_M32R_RELATIVE 53 /* Adjust by program base */
-+#define R_M32R_GOTOFF 54 /* 24 bit offset to GOT */
-+#define R_M32R_GOTPC24 55 /* 24 bit PC relative offset to GOT */
-+#define R_M32R_GOT16_HI_ULO 56 /* High 16 bit GOT entry with unsigned
-+ low */
-+#define R_M32R_GOT16_HI_SLO 57 /* High 16 bit GOT entry with signed
-+ low */
-+#define R_M32R_GOT16_LO 58 /* Low 16 bit GOT entry */
-+#define R_M32R_GOTPC_HI_ULO 59 /* High 16 bit PC relative offset to
-+ GOT with unsigned low */
-+#define R_M32R_GOTPC_HI_SLO 60 /* High 16 bit PC relative offset to
-+ GOT with signed low */
-+#define R_M32R_GOTPC_LO 61 /* Low 16 bit PC relative offset to
-+ GOT */
-+#define R_M32R_GOTOFF_HI_ULO 62 /* High 16 bit offset to GOT
-+ with unsigned low */
-+#define R_M32R_GOTOFF_HI_SLO 63 /* High 16 bit offset to GOT
-+ with signed low */
-+#define R_M32R_GOTOFF_LO 64 /* Low 16 bit offset to GOT */
-+#define R_M32R_NUM 256 /* Keep this the last entry. */
-+
-+/* i960 Relocations */
-+#define R_960_NONE 0
-+#define R_960_12 1
-+#define R_960_32 2
-+#define R_960_IP24 3
-+#define R_960_SUB 4
-+#define R_960_OPTCALL 5
-+#define R_960_OPTCALLX 6
-+#define R_960_OPTCALLXA 7
-+/* Keep this the last entry. */
-+#define R_960_NUM 8
-+
-+
-+/* v850 relocations. */
-+#define R_V850_NONE 0
-+#define R_V850_9_PCREL 1
-+#define R_V850_22_PCREL 2
-+#define R_V850_HI16_S 3
-+#define R_V850_HI16 4
-+#define R_V850_LO16 5
-+#define R_V850_32 6
-+#define R_V850_16 7
-+#define R_V850_8 8
-+#define R_V850_SDA_16_16_OFFSET 9 /* For ld.b, st.b, set1, clr1,
-+ not1, tst1, movea, movhi */
-+#define R_V850_SDA_15_16_OFFSET 10 /* For ld.w, ld.h, ld.hu, st.w, st.h */
-+#define R_V850_ZDA_16_16_OFFSET 11 /* For ld.b, st.b, set1, clr1,
-+ not1, tst1, movea, movhi */
-+#define R_V850_ZDA_15_16_OFFSET 12 /* For ld.w, ld.h, ld.hu, st.w, st.h */
-+#define R_V850_TDA_6_8_OFFSET 13 /* For sst.w, sld.w */
-+#define R_V850_TDA_7_8_OFFSET 14 /* For sst.h, sld.h */
-+#define R_V850_TDA_7_7_OFFSET 15 /* For sst.b, sld.b */
-+#define R_V850_TDA_16_16_OFFSET 16 /* For set1, clr1, not1, tst1,
-+ movea, movhi */
-+/* CYGNUS LOCAL v850e */
-+#define R_V850_TDA_4_5_OFFSET 17 /* For sld.hu */
-+#define R_V850_TDA_4_4_OFFSET 18 /* For sld.bu */
-+#define R_V850_SDA_16_16_SPLIT_OFFSET 19 /* For ld.bu */
-+#define R_V850_ZDA_16_16_SPLIT_OFFSET 20 /* For ld.bu */
-+#define R_V850_CALLT_6_7_OFFSET 21 /* For callt */
-+#define R_V850_CALLT_16_16_OFFSET 22 /* For callt */
-+/* END CYGNUS LOCAL */
-+#define R_V850_GNU_VTINHERIT 23
-+#define R_V850_GNU_VTENTRY 24
-+/* Keep this the last entry. */
-+#define R_V850_NUM 25
-+
-+/* Atmel AVR32 relocations. */
-+#define R_AVR32_NONE 0
-+#define R_AVR32_32 1
-+#define R_AVR32_16 2
-+#define R_AVR32_8 3
-+#define R_AVR32_32_PCREL 4
-+#define R_AVR32_16_PCREL 5
-+#define R_AVR32_8_PCREL 6
-+#define R_AVR32_DIFF32 7
-+#define R_AVR32_DIFF16 8
-+#define R_AVR32_DIFF8 9
-+#define R_AVR32_GOT32 10
-+#define R_AVR32_GOT16 11
-+#define R_AVR32_GOT8 12
-+#define R_AVR32_21S 13
-+#define R_AVR32_16U 14
-+#define R_AVR32_16S 15
-+#define R_AVR32_8S 16
-+#define R_AVR32_8S_EXT 17
-+#define R_AVR32_22H_PCREL 18
-+#define R_AVR32_18W_PCREL 19
-+#define R_AVR32_16B_PCREL 20
-+#define R_AVR32_16N_PCREL 21
-+#define R_AVR32_14UW_PCREL 22
-+#define R_AVR32_11H_PCREL 23
-+#define R_AVR32_10UW_PCREL 24
-+#define R_AVR32_9H_PCREL 25
-+#define R_AVR32_9UW_PCREL 26
-+#define R_AVR32_HI16 27
-+#define R_AVR32_LO16 28
-+#define R_AVR32_GOTPC 29
-+#define R_AVR32_GOTCALL 30
-+#define R_AVR32_LDA_GOT 31
-+#define R_AVR32_GOT21S 32
-+#define R_AVR32_GOT18SW 33
-+#define R_AVR32_GOT16S 34
-+#define R_AVR32_GOT7UW 35
-+#define R_AVR32_32_CPENT 36
-+#define R_AVR32_CPCALL 37
-+#define R_AVR32_16_CP 38
-+#define R_AVR32_9W_CP 39
-+#define R_AVR32_RELATIVE 40
-+#define R_AVR32_GLOB_DAT 41
-+#define R_AVR32_JMP_SLOT 42
-+#define R_AVR32_ALIGN 43
-+#define R_AVR32_NUM 44
-+
-+/* AVR32 dynamic tags */
-+#define DT_AVR32_GOTSZ 0x70000001 /* Total size of GOT in bytes */
-+
-+/* Renesas H8/300 Relocations */
-+#define R_H8_NONE 0
-+#define R_H8_DIR32 1
-+#define R_H8_DIR32_28 2
-+#define R_H8_DIR32_24 3
-+#define R_H8_DIR32_16 4
-+#define R_H8_DIR32U 6
-+#define R_H8_DIR32U_28 7
-+#define R_H8_DIR32U_24 8
-+#define R_H8_DIR32U_20 9
-+#define R_H8_DIR32U_16 10
-+#define R_H8_DIR24 11
-+#define R_H8_DIR24_20 12
-+#define R_H8_DIR24_16 13
-+#define R_H8_DIR24U 14
-+#define R_H8_DIR24U_20 15
-+#define R_H8_DIR24U_16 16
-+#define R_H8_DIR16 17
-+#define R_H8_DIR16U 18
-+#define R_H8_DIR16S_32 19
-+#define R_H8_DIR16S_28 20
-+#define R_H8_DIR16S_24 21
-+#define R_H8_DIR16S_20 22
-+#define R_H8_DIR16S 23
-+#define R_H8_DIR8 24
-+#define R_H8_DIR8U 25
-+#define R_H8_DIR8Z_32 26
-+#define R_H8_DIR8Z_28 27
-+#define R_H8_DIR8Z_24 28
-+#define R_H8_DIR8Z_20 29
-+#define R_H8_DIR8Z_16 30
-+#define R_H8_PCREL16 31
-+#define R_H8_PCREL8 32
-+#define R_H8_BPOS 33
-+#define R_H8_PCREL32 34
-+#define R_H8_GOT32O 35
-+#define R_H8_GOT16O 36
-+#define R_H8_DIR16A8 59
-+#define R_H8_DIR16R8 60
-+#define R_H8_DIR24A8 61
-+#define R_H8_DIR24R8 62
-+#define R_H8_DIR32A16 63
-+#define R_H8_ABS32 65
-+#define R_H8_ABS32A16 127
-+#define R_H8_NUM 128
-+
-+/* NIOS relocations. */
-+#define R_NIOS_NONE 0
-+#define R_NIOS_32 1 /* A 32 bit absolute relocation.*/
-+#define R_NIOS_LO16_LO5 2 /* A LO-16 5 bit absolute relocation. */
-+#define R_NIOS_LO16_HI11 3 /* A LO-16 top 11 bit absolute relocation. */
-+#define R_NIOS_HI16_LO5 4 /* A HI-16 5 bit absolute relocation. */
-+#define R_NIOS_HI16_HI11 5 /* A HI-16 top 11 bit absolute relocation. */
-+#define R_NIOS_PCREL6 6 /* A 6 bit relative relocation. */
-+#define R_NIOS_PCREL8 7 /* An 8 bit relative relocation. */
-+#define R_NIOS_PCREL11 8 /* An 11 bit relative relocation. */
-+#define R_NIOS_16 9 /* A 16 bit absolute relocation. */
-+#define R_NIOS_H_LO5 10 /* Low 5-bits of absolute relocation in halfwords. */
-+#define R_NIOS_H_HI11 11 /* Top 11 bits of 16-bit absolute relocation in halfwords. */
-+#define R_NIOS_H_XLO5 12 /* Low 5 bits of top 16-bits of 32-bit absolute relocation in halfwords. */
-+#define R_NIOS_H_XHI11 13 /* Top 11 bits of top 16-bits of 32-bit absolute relocation in halfwords. */
-+#define R_NIOS_H_16 14 /* Half-word @h value */
-+#define R_NIOS_H_32 15 /* Word @h value */
-+#define R_NIOS_GNU_VTINHERIT 200 /* GNU extension to record C++ vtable hierarchy */
-+#define R_NIOS_GNU_VTENTRY 201 /* GNU extension to record C++ vtable member usage */
-+/* Keep this the last entry. */
-+#define R_NIOS_NUM 202
-+
-+/* NIOS II relocations */
-+#define R_NIOS2_NONE 0
-+#define R_NIOS2_S16 1
-+#define R_NIOS2_U16 2
-+#define R_NIOS2_PCREL16 3
-+#define R_NIOS2_CALL26 4
-+#define R_NIOS2_IMM5 5
-+#define R_NIOS2_CACHE_OPX 6
-+#define R_NIOS2_IMM6 7
-+#define R_NIOS2_IMM8 8
-+#define R_NIOS2_HI16 9
-+#define R_NIOS2_LO16 10
-+#define R_NIOS2_HIADJ16 11
-+#define R_NIOS2_BFD_RELOC_32 12
-+#define R_NIOS2_BFD_RELOC_16 13
-+#define R_NIOS2_BFD_RELOC_8 14
-+#define R_NIOS2_GPREL 15
-+#define R_NIOS2_GNU_VTINHERIT 16
-+#define R_NIOS2_GNU_VTENTRY 17
-+#define R_NIOS2_UJMP 18
-+#define R_NIOS2_CJMP 19
-+#define R_NIOS2_CALLR 20
-+#define R_NIOS2_ALIGN 21
-+/* Keep this the last entry. */
-+#define R_NIOS2_NUM 22
-+
-+/* Xtensa-specific declarations */
-+
-+/* Xtensa values for the Dyn d_tag field. */
-+#define DT_XTENSA_GOT_LOC_OFF (DT_LOPROC + 0)
-+#define DT_XTENSA_GOT_LOC_SZ (DT_LOPROC + 1)
-+#define DT_XTENSA_NUM 2
-+
-+/* Xtensa relocations. */
-+#define R_XTENSA_NONE 0
-+#define R_XTENSA_32 1
-+#define R_XTENSA_RTLD 2
-+#define R_XTENSA_GLOB_DAT 3
-+#define R_XTENSA_JMP_SLOT 4
-+#define R_XTENSA_RELATIVE 5
-+#define R_XTENSA_PLT 6
-+#define R_XTENSA_OP0 8
-+#define R_XTENSA_OP1 9
-+#define R_XTENSA_OP2 10
-+#define R_XTENSA_ASM_EXPAND 11
-+#define R_XTENSA_ASM_SIMPLIFY 12
-+#define R_XTENSA_GNU_VTINHERIT 15
-+#define R_XTENSA_GNU_VTENTRY 16
-+#define R_XTENSA_DIFF8 17
-+#define R_XTENSA_DIFF16 18
-+#define R_XTENSA_DIFF32 19
-+#define R_XTENSA_SLOT0_OP 20
-+#define R_XTENSA_SLOT1_OP 21
-+#define R_XTENSA_SLOT2_OP 22
-+#define R_XTENSA_SLOT3_OP 23
-+#define R_XTENSA_SLOT4_OP 24
-+#define R_XTENSA_SLOT5_OP 25
-+#define R_XTENSA_SLOT6_OP 26
-+#define R_XTENSA_SLOT7_OP 27
-+#define R_XTENSA_SLOT8_OP 28
-+#define R_XTENSA_SLOT9_OP 29
-+#define R_XTENSA_SLOT10_OP 30
-+#define R_XTENSA_SLOT11_OP 31
-+#define R_XTENSA_SLOT12_OP 32
-+#define R_XTENSA_SLOT13_OP 33
-+#define R_XTENSA_SLOT14_OP 34
-+#define R_XTENSA_SLOT0_ALT 35
-+#define R_XTENSA_SLOT1_ALT 36
-+#define R_XTENSA_SLOT2_ALT 37
-+#define R_XTENSA_SLOT3_ALT 38
-+#define R_XTENSA_SLOT4_ALT 39
-+#define R_XTENSA_SLOT5_ALT 40
-+#define R_XTENSA_SLOT6_ALT 41
-+#define R_XTENSA_SLOT7_ALT 42
-+#define R_XTENSA_SLOT8_ALT 43
-+#define R_XTENSA_SLOT9_ALT 44
-+#define R_XTENSA_SLOT10_ALT 45
-+#define R_XTENSA_SLOT11_ALT 46
-+#define R_XTENSA_SLOT12_ALT 47
-+#define R_XTENSA_SLOT13_ALT 48
-+#define R_XTENSA_SLOT14_ALT 49
-+/* Keep this the last entry. */
-+#define R_XTENSA_NUM 50
-+
-+/* C6X specific relocs */
-+#define R_C6000_NONE 0
-+#define R_C6000_ABS32 1
-+#define R_C6000_ABS16 2
-+#define R_C6000_ABS8 3
-+#define R_C6000_PCR_S21 4
-+#define R_C6000_PCR_S12 5
-+#define R_C6000_PCR_S10 6
-+#define R_C6000_PCR_S7 7
-+#define R_C6000_ABS_S16 8
-+#define R_C6000_ABS_L16 9
-+#define R_C6000_ABS_H16 10
-+#define R_C6000_SBR_U15_B 11
-+#define R_C6000_SBR_U15_H 12
-+#define R_C6000_SBR_U15_W 13
-+#define R_C6000_SBR_S16 14
-+#define R_C6000_SBR_L16_B 15
-+#define R_C6000_SBR_L16_H 16
-+#define R_C6000_SBR_L16_W 17
-+#define R_C6000_SBR_H16_B 18
-+#define R_C6000_SBR_H16_H 19
-+#define R_C6000_SBR_H16_W 20
-+#define R_C6000_SBR_GOT_U15_W 21
-+#define R_C6000_SBR_GOT_L16_W 22
-+#define R_C6000_SBR_GOT_H16_W 23
-+#define R_C6000_DSBT_INDEX 24
-+#define R_C6000_PREL31 25
-+#define R_C6000_COPY 26
-+#define R_C6000_JUMP_SLOT 27
-+#define R_C6000_SBR_GOT32 28
-+#define R_C6000_PCR_H16 29
-+#define R_C6000_PCR_L16 30
-+#define R_C6000_ALIGN 253
-+#define R_C6000_FPHEAD 254
-+#define R_C6000_NOCMP 255
-+
-+/* C6x specific values for the Dyn d_tag field. */
-+#define DT_C6000_DSBT_BASE (DT_LOPROC + 0)
-+#define DT_C6000_DSBT_SIZE (DT_LOPROC + 1)
-+#define DT_C6000_PREEMPTMAP (DT_LOPROC + 2)
-+#define DT_C6000_DSBT_INDEX (DT_LOPROC + 3)
-+
-+#define DT_C6000_NUM 4
-
- static void die(char *fmt, ...);
-
diff --git a/toolchain/kernel-headers/patches/3.9.11/sortext.patch b/toolchain/kernel-headers/patches/3.9.11/sortext.patch
deleted file mode 100644
index 45a8a4985..000000000
--- a/toolchain/kernel-headers/patches/3.9.11/sortext.patch
+++ /dev/null
@@ -1,4949 +0,0 @@
-diff -Nur linux-3.9.11.orig/arch/arm/Kconfig linux-3.9.11/arch/arm/Kconfig
---- linux-3.9.11.orig/arch/arm/Kconfig 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/arch/arm/Kconfig 2013-09-12 07:26:36.000000000 +0200
-@@ -6,7 +6,6 @@
- select ARCH_HAVE_CUSTOM_GPIO_H
- select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
- select ARCH_WANT_IPC_PARSE_VERSION
-- select BUILDTIME_EXTABLE_SORT if MMU
- select CPU_PM if (SUSPEND || CPU_IDLE)
- select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
- select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
-diff -Nur linux-3.9.11.orig/arch/mips/Kconfig linux-3.9.11/arch/mips/Kconfig
---- linux-3.9.11.orig/arch/mips/Kconfig 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/arch/mips/Kconfig 2013-09-12 07:26:20.000000000 +0200
-@@ -34,7 +34,6 @@
- select HAVE_MEMBLOCK_NODE_MAP
- select ARCH_DISCARD_MEMBLOCK
- select GENERIC_SMP_IDLE_THREAD
-- select BUILDTIME_EXTABLE_SORT
- select GENERIC_CLOCKEVENTS
- select GENERIC_CMOS_UPDATE
- select HAVE_MOD_ARCH_SPECIFIC
-diff -Nur linux-3.9.11.orig/arch/mips/Kconfig.orig linux-3.9.11/arch/mips/Kconfig.orig
---- linux-3.9.11.orig/arch/mips/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.9.11/arch/mips/Kconfig.orig 2013-07-21 02:16:17.000000000 +0200
-@@ -0,0 +1,2557 @@
-+config MIPS
-+ bool
-+ default y
-+ select HAVE_GENERIC_DMA_COHERENT
-+ select HAVE_IDE
-+ select HAVE_OPROFILE
-+ select HAVE_PERF_EVENTS
-+ select PERF_USE_VMALLOC
-+ select HAVE_ARCH_KGDB
-+ select ARCH_HAVE_CUSTOM_GPIO_H
-+ select HAVE_FUNCTION_TRACER
-+ select HAVE_FUNCTION_TRACE_MCOUNT_TEST
-+ select HAVE_DYNAMIC_FTRACE
-+ select HAVE_FTRACE_MCOUNT_RECORD
-+ select HAVE_C_RECORDMCOUNT
-+ select HAVE_FUNCTION_GRAPH_TRACER
-+ select HAVE_KPROBES
-+ select HAVE_KRETPROBES
-+ select HAVE_DEBUG_KMEMLEAK
-+ select ARCH_BINFMT_ELF_RANDOMIZE_PIE
-+ select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
-+ select RTC_LIB if !MACH_LOONGSON
-+ select GENERIC_ATOMIC64 if !64BIT
-+ select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
-+ select HAVE_DMA_ATTRS
-+ select HAVE_DMA_API_DEBUG
-+ select HAVE_GENERIC_HARDIRQS
-+ select GENERIC_IRQ_PROBE
-+ select GENERIC_IRQ_SHOW
-+ select HAVE_ARCH_JUMP_LABEL
-+ select ARCH_WANT_IPC_PARSE_VERSION
-+ select IRQ_FORCED_THREADING
-+ select HAVE_MEMBLOCK
-+ select HAVE_MEMBLOCK_NODE_MAP
-+ select ARCH_DISCARD_MEMBLOCK
-+ select GENERIC_SMP_IDLE_THREAD
-+ select BUILDTIME_EXTABLE_SORT
-+ select GENERIC_CLOCKEVENTS
-+ select GENERIC_CMOS_UPDATE
-+ select HAVE_MOD_ARCH_SPECIFIC
-+ select VIRT_TO_BUS
-+ select MODULES_USE_ELF_REL if MODULES
-+ select MODULES_USE_ELF_RELA if MODULES && 64BIT
-+ select CLONE_BACKWARDS
-+
-+menu "Machine selection"
-+
-+config ZONE_DMA
-+ bool
-+
-+choice
-+ prompt "System type"
-+ default SGI_IP22
-+
-+config MIPS_ALCHEMY
-+ bool "Alchemy processor based machines"
-+ select 64BIT_PHYS_ADDR
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select IRQ_CPU
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_APM_EMULATION
-+ select GENERIC_GPIO
-+ select ARCH_WANT_OPTIONAL_GPIOLIB
-+ select SYS_SUPPORTS_ZBOOT
-+ select USB_ARCH_HAS_OHCI
-+ select USB_ARCH_HAS_EHCI
-+
-+config AR7
-+ bool "Texas Instruments AR7"
-+ select BOOT_ELF32
-+ select DMA_NONCOHERENT
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select IRQ_CPU
-+ select NO_EXCEPT_FILL
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_ZBOOT_UART16550
-+ select ARCH_REQUIRE_GPIOLIB
-+ select VLYNQ
-+ select HAVE_CLK
-+ help
-+ Support for the Texas Instruments AR7 System-on-a-Chip
-+ family: TNETD7100, 7200 and 7300.
-+
-+config ATH79
-+ bool "Atheros AR71XX/AR724X/AR913X based boards"
-+ select ARCH_REQUIRE_GPIOLIB
-+ select BOOT_RAW
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select HAVE_CLK
-+ select IRQ_CPU
-+ select MIPS_MACHINE
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ help
-+ Support for the Atheros AR71XX/AR724X/AR913X SoCs.
-+
-+config BCM47XX
-+ bool "Broadcom BCM47XX based boards"
-+ select ARCH_WANT_OPTIONAL_GPIOLIB
-+ select BOOT_RAW
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select FW_CFE
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select NO_EXCEPT_FILL
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_HAS_EARLY_PRINTK
-+ help
-+ Support for BCM47XX based boards
-+
-+config BCM63XX
-+ bool "Broadcom BCM63XX based boards"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_HAS_EARLY_PRINTK
-+ select SWAP_IO_SPACE
-+ select ARCH_REQUIRE_GPIOLIB
-+ select HAVE_CLK
-+ help
-+ Support for BCM63XX based boards
-+
-+config MIPS_COBALT
-+ bool "Cobalt Server"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select CEVT_GT641XX
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select I8253
-+ select I8259
-+ select IRQ_CPU
-+ select IRQ_GT641XX
-+ select PCI_GT64XXX_PCI0
-+ select PCI
-+ select SYS_HAS_CPU_NEVADA
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config MACH_DECSTATION
-+ bool "DECstations"
-+ select BOOT_ELF32
-+ select CEVT_DS1287
-+ select CEVT_R4K
-+ select CSRC_IOASIC
-+ select CSRC_R4K
-+ select CPU_DADDI_WORKAROUNDS if 64BIT
-+ select CPU_R4000_WORKAROUNDS if 64BIT
-+ select CPU_R4400_WORKAROUNDS if 64BIT
-+ select DMA_NONCOHERENT
-+ select NO_IOPORT
-+ select IRQ_CPU
-+ select SYS_HAS_CPU_R3000
-+ select SYS_HAS_CPU_R4X00
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_128HZ
-+ select SYS_SUPPORTS_256HZ
-+ select SYS_SUPPORTS_1024HZ
-+ help
-+ This enables support for DEC's MIPS based workstations. For details
-+ see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
-+ DECstation porting pages on <http://decstation.unix-ag.org/>.
-+
-+ If you have one of the following DECstation Models you definitely
-+ want to choose R4xx0 for the CPU Type:
-+
-+ DECstation 5000/50
-+ DECstation 5000/150
-+ DECstation 5000/260
-+ DECsystem 5900/260
-+
-+ otherwise choose R3000.
-+
-+config MACH_JAZZ
-+ bool "Jazz family of machines"
-+ select FW_ARC
-+ select FW_ARC32
-+ select ARCH_MAY_HAVE_PC_FDC
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
-+ select GENERIC_ISA_DMA
-+ select HAVE_PCSPKR_PLATFORM
-+ select IRQ_CPU
-+ select I8253
-+ select I8259
-+ select ISA
-+ select SYS_HAS_CPU_R4X00
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_100HZ
-+ help
-+ This a family of machines based on the MIPS R4030 chipset which was
-+ used by several vendors to build RISC/os and Windows NT workstations.
-+ Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
-+ Olivetti M700-10 workstations.
-+
-+config MACH_JZ4740
-+ bool "Ingenic JZ4740 based machines"
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_ZBOOT_UART16550
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select GENERIC_GPIO
-+ select ARCH_REQUIRE_GPIOLIB
-+ select SYS_HAS_EARLY_PRINTK
-+ select HAVE_PWM
-+ select HAVE_CLK
-+ select GENERIC_IRQ_CHIP
-+
-+config LANTIQ
-+ bool "Lantiq based platforms"
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_MULTITHREADING
-+ select SYS_HAS_EARLY_PRINTK
-+ select ARCH_REQUIRE_GPIOLIB
-+ select SWAP_IO_SPACE
-+ select BOOT_RAW
-+ select HAVE_MACH_CLKDEV
-+ select CLKDEV_LOOKUP
-+ select USE_OF
-+ select PINCTRL
-+ select PINCTRL_LANTIQ
-+
-+config LASAT
-+ bool "LASAT Networks platforms"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select SYS_HAS_EARLY_PRINTK
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select PCI_GT64XXX_PCI0
-+ select MIPS_NILE4
-+ select R5000_CPU_SCACHE
-+ select SYS_HAS_CPU_R5000
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config MACH_LOONGSON
-+ bool "Loongson family of machines"
-+ select SYS_SUPPORTS_ZBOOT
-+ help
-+ This enables the support of Loongson family of machines.
-+
-+ Loongson is a family of general-purpose MIPS-compatible CPUs.
-+ developed at Institute of Computing Technology (ICT),
-+ Chinese Academy of Sciences (CAS) in the People's Republic
-+ of China. The chief architect is Professor Weiwu Hu.
-+
-+config MACH_LOONGSON1
-+ bool "Loongson 1 family of machines"
-+ select SYS_SUPPORTS_ZBOOT
-+ help
-+ This enables support for the Loongson 1 based machines.
-+
-+ Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
-+ the ICT (Institute of Computing Technology) and the Chinese Academy
-+ of Sciences.
-+
-+config MIPS_MALTA
-+ bool "MIPS Malta board"
-+ select ARCH_MAY_HAVE_PC_FDC
-+ select BOOT_ELF32
-+ select BOOT_RAW
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select CSRC_GIC
-+ select DMA_NONCOHERENT
-+ select GENERIC_ISA_DMA
-+ select HAVE_PCSPKR_PLATFORM
-+ select IRQ_CPU
-+ select IRQ_GIC
-+ select HW_HAS_PCI
-+ select I8253
-+ select I8259
-+ select MIPS_BOARDS_GEN
-+ select MIPS_BONITO64
-+ select MIPS_CPU_SCACHE
-+ select PCI_GT64XXX_PCI0
-+ select MIPS_MSC
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_HAS_CPU_MIPS64_R1
-+ select SYS_HAS_CPU_MIPS64_R2
-+ select SYS_HAS_CPU_NEVADA
-+ select SYS_HAS_CPU_RM7000
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_MIPS_CMP
-+ select SYS_SUPPORTS_MULTITHREADING
-+ select SYS_SUPPORTS_SMARTMIPS
-+ select SYS_SUPPORTS_ZBOOT
-+ help
-+ This enables support for the MIPS Technologies Malta evaluation
-+ board.
-+
-+config MIPS_SEAD3
-+ bool "MIPS SEAD3 board"
-+ select BOOT_ELF32
-+ select BOOT_RAW
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select CPU_MIPSR2_IRQ_VI
-+ select CPU_MIPSR2_IRQ_EI
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select IRQ_GIC
-+ select MIPS_BOARDS_GEN
-+ select MIPS_CPU_SCACHE
-+ select MIPS_MSC
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_HAS_CPU_MIPS64_R1
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_SMARTMIPS
-+ select USB_ARCH_HAS_EHCI
-+ select USB_EHCI_BIG_ENDIAN_DESC
-+ select USB_EHCI_BIG_ENDIAN_MMIO
-+ select USE_OF
-+ help
-+ This enables support for the MIPS Technologies SEAD3 evaluation
-+ board.
-+
-+config NEC_MARKEINS
-+ bool "NEC EMMA2RH Mark-eins board"
-+ select SOC_EMMA2RH
-+ select HW_HAS_PCI
-+ help
-+ This enables support for the NEC Electronics Mark-eins boards.
-+
-+config MACH_VR41XX
-+ bool "NEC VR4100 series based machines"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select SYS_HAS_CPU_VR41XX
-+ select ARCH_REQUIRE_GPIOLIB
-+
-+config NXP_STB220
-+ bool "NXP STB220 board"
-+ select SOC_PNX833X
-+ help
-+ Support for NXP Semiconductors STB220 Development Board.
-+
-+config NXP_STB225
-+ bool "NXP 225 board"
-+ select SOC_PNX833X
-+ select SOC_PNX8335
-+ help
-+ Support for NXP Semiconductors STB225 Development Board.
-+
-+config PMC_MSP
-+ bool "PMC-Sierra MSP chipsets"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select SWAP_IO_SPACE
-+ select NO_EXCEPT_FILL
-+ select BOOT_RAW
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select IRQ_CPU
-+ select SERIAL_8250
-+ select SERIAL_8250_CONSOLE
-+ help
-+ This adds support for the PMC-Sierra family of Multi-Service
-+ Processor System-On-A-Chips. These parts include a number
-+ of integrated peripherals, interfaces and DSPs in addition to
-+ a variety of MIPS cores.
-+
-+config POWERTV
-+ bool "Cisco PowerTV"
-+ select BOOT_ELF32
-+ select CEVT_R4K
-+ select CPU_MIPSR2_IRQ_VI
-+ select CPU_MIPSR2_IRQ_EI
-+ select CSRC_POWERTV
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select USB_OHCI_LITTLE_ENDIAN
-+ help
-+ This enables support for the Cisco PowerTV Platform.
-+
-+config RALINK
-+ bool "Ralink based machines"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select BOOT_RAW
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select USE_OF
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_HAS_EARLY_PRINTK
-+ select HAVE_MACH_CLKDEV
-+ select CLKDEV_LOOKUP
-+
-+config SGI_IP22
-+ bool "SGI IP22 (Indy/Indigo2)"
-+ select FW_ARC
-+ select FW_ARC32
-+ select BOOT_ELF32
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DEFAULT_SGI_PARTITION
-+ select DMA_NONCOHERENT
-+ select HW_HAS_EISA
-+ select I8253
-+ select I8259
-+ select IP22_CPU_SCACHE
-+ select IRQ_CPU
-+ select GENERIC_ISA_DMA_SUPPORT_BROKEN
-+ select SGI_HAS_I8042
-+ select SGI_HAS_INDYDOG
-+ select SGI_HAS_HAL2
-+ select SGI_HAS_SEEQ
-+ select SGI_HAS_WD93
-+ select SGI_HAS_ZILOG
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_R4X00
-+ select SYS_HAS_CPU_R5000
-+ #
-+ # Disable EARLY_PRINTK for now since it leads to overwritten prom
-+ # memory during early boot on some machines.
-+ #
-+ # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
-+ # for a more details discussion
-+ #
-+ # select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ help
-+ This are the SGI Indy, Challenge S and Indigo2, as well as certain
-+ OEM variants like the Tandem CMN B006S. To compile a Linux kernel
-+ that runs on these, say Y here.
-+
-+config SGI_IP27
-+ bool "SGI IP27 (Origin200/2000)"
-+ select FW_ARC
-+ select FW_ARC64
-+ select BOOT_ELF64
-+ select DEFAULT_SGI_PARTITION
-+ select DMA_COHERENT
-+ select SYS_HAS_EARLY_PRINTK
-+ select HW_HAS_PCI
-+ select NR_CPUS_DEFAULT_64
-+ select SYS_HAS_CPU_R10000
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_NUMA
-+ select SYS_SUPPORTS_SMP
-+ help
-+ This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
-+ workstations. To compile a Linux kernel that runs on these, say Y
-+ here.
-+
-+config SGI_IP28
-+ bool "SGI IP28 (Indigo2 R10k)"
-+ select FW_ARC
-+ select FW_ARC64
-+ select BOOT_ELF64
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DEFAULT_SGI_PARTITION
-+ select DMA_NONCOHERENT
-+ select GENERIC_ISA_DMA_SUPPORT_BROKEN
-+ select IRQ_CPU
-+ select HW_HAS_EISA
-+ select I8253
-+ select I8259
-+ select SGI_HAS_I8042
-+ select SGI_HAS_INDYDOG
-+ select SGI_HAS_HAL2
-+ select SGI_HAS_SEEQ
-+ select SGI_HAS_WD93
-+ select SGI_HAS_ZILOG
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_R10000
-+ #
-+ # Disable EARLY_PRINTK for now since it leads to overwritten prom
-+ # memory during early boot on some machines.
-+ #
-+ # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
-+ # for a more details discussion
-+ #
-+ # select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ help
-+ This is the SGI Indigo2 with R10000 processor. To compile a Linux
-+ kernel that runs on these, say Y here.
-+
-+config SGI_IP32
-+ bool "SGI IP32 (O2)"
-+ select FW_ARC
-+ select FW_ARC32
-+ select BOOT_ELF32
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select R5000_CPU_SCACHE
-+ select RM7000_CPU_SCACHE
-+ select SYS_HAS_CPU_R5000
-+ select SYS_HAS_CPU_R10000 if BROKEN
-+ select SYS_HAS_CPU_RM7000
-+ select SYS_HAS_CPU_NEVADA
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ help
-+ If you want this kernel to run on SGI O2 workstation, say Y here.
-+
-+config SIBYTE_CRHINE
-+ bool "Sibyte BCM91120C-CRhine"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select SIBYTE_BCM1120
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config SIBYTE_CARMEL
-+ bool "Sibyte BCM91120x-Carmel"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select SIBYTE_BCM1120
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config SIBYTE_CRHONE
-+ bool "Sibyte BCM91125C-CRhone"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select SIBYTE_BCM1125
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config SIBYTE_RHONE
-+ bool "Sibyte BCM91125E-Rhone"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select SIBYTE_BCM1125H
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config SIBYTE_SWARM
-+ bool "Sibyte BCM91250A-SWARM"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select HAVE_PATA_PLATFORM
-+ select NR_CPUS_DEFAULT_2
-+ select SIBYTE_SB1250
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select ZONE_DMA32 if 64BIT
-+
-+config SIBYTE_LITTLESUR
-+ bool "Sibyte BCM91250C2-LittleSur"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select HAVE_PATA_PLATFORM
-+ select NR_CPUS_DEFAULT_2
-+ select SIBYTE_SB1250
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config SIBYTE_SENTOSA
-+ bool "Sibyte BCM91250E-Sentosa"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select NR_CPUS_DEFAULT_2
-+ select SIBYTE_SB1250
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+
-+config SIBYTE_BIGSUR
-+ bool "Sibyte BCM91480B-BigSur"
-+ select BOOT_ELF32
-+ select DMA_COHERENT
-+ select NR_CPUS_DEFAULT_4
-+ select SIBYTE_BCM1x80
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_SB1
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select ZONE_DMA32 if 64BIT
-+
-+config SNI_RM
-+ bool "SNI RM200/300/400"
-+ select FW_ARC if CPU_LITTLE_ENDIAN
-+ select FW_ARC32 if CPU_LITTLE_ENDIAN
-+ select FW_SNIPROM if CPU_BIG_ENDIAN
-+ select ARCH_MAY_HAVE_PC_FDC
-+ select BOOT_ELF32
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
-+ select DMA_NONCOHERENT
-+ select GENERIC_ISA_DMA
-+ select HAVE_PCSPKR_PLATFORM
-+ select HW_HAS_EISA
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select I8253
-+ select I8259
-+ select ISA
-+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
-+ select SYS_HAS_CPU_R4X00
-+ select SYS_HAS_CPU_R5000
-+ select SYS_HAS_CPU_R10000
-+ select R5000_CPU_SCACHE
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ help
-+ The SNI RM200/300/400 are MIPS-based machines manufactured by
-+ Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
-+ Technology and now in turn merged with Fujitsu. Say Y here to
-+ support this machine type.
-+
-+config MACH_TX39XX
-+ bool "Toshiba TX39 series based machines"
-+
-+config MACH_TX49XX
-+ bool "Toshiba TX49 series based machines"
-+
-+config MIKROTIK_RB532
-+ bool "Mikrotik RB532 boards"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select IRQ_CPU
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SWAP_IO_SPACE
-+ select BOOT_RAW
-+ select ARCH_REQUIRE_GPIOLIB
-+ help
-+ Support the Mikrotik(tm) RouterBoard 532 series,
-+ based on the IDT RC32434 SoC.
-+
-+config WR_PPMC
-+ bool "Wind River PPMC board"
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select IRQ_CPU
-+ select BOOT_ELF32
-+ select DMA_NONCOHERENT
-+ select HW_HAS_PCI
-+ select PCI_GT64XXX_PCI0
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_MIPS32_R1
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_HAS_CPU_MIPS64_R1
-+ select SYS_HAS_CPU_NEVADA
-+ select SYS_HAS_CPU_RM7000
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ help
-+ This enables support for the Wind River MIPS32 4KC PPMC evaluation
-+ board, which is based on GT64120 bridge chip.
-+
-+config CAVIUM_OCTEON_SIMULATOR
-+ bool "Cavium Networks Octeon Simulator"
-+ select CEVT_R4K
-+ select 64BIT_PHYS_ADDR
-+ select DMA_COHERENT
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+ select SYS_HAS_CPU_CAVIUM_OCTEON
-+ select HOLES_IN_ZONE
-+ help
-+ The Octeon simulator is software performance model of the Cavium
-+ Octeon Processor. It supports simulating Octeon processors on x86
-+ hardware.
-+
-+config CAVIUM_OCTEON_REFERENCE_BOARD
-+ bool "Cavium Networks Octeon reference board"
-+ select CEVT_R4K
-+ select 64BIT_PHYS_ADDR
-+ select DMA_COHERENT
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select EDAC_SUPPORT
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+ select SYS_HAS_EARLY_PRINTK
-+ select SYS_HAS_CPU_CAVIUM_OCTEON
-+ select SWAP_IO_SPACE
-+ select HW_HAS_PCI
-+ select ARCH_SUPPORTS_MSI
-+ select ZONE_DMA32
-+ select USB_ARCH_HAS_OHCI
-+ select USB_ARCH_HAS_EHCI
-+ select HOLES_IN_ZONE
-+ help
-+ This option supports all of the Octeon reference boards from Cavium
-+ Networks. It builds a kernel that dynamically determines the Octeon
-+ CPU type and supports all known board reference implementations.
-+ Some of the supported boards are:
-+ EBT3000
-+ EBH3000
-+ EBH3100
-+ Thunder
-+ Kodama
-+ Hikari
-+ Say Y here for most Octeon reference boards.
-+
-+config NLM_XLR_BOARD
-+ bool "Netlogic XLR/XLS based systems"
-+ select BOOT_ELF32
-+ select NLM_COMMON
-+ select SYS_HAS_CPU_XLR
-+ select SYS_SUPPORTS_SMP
-+ select HW_HAS_PCI
-+ select SWAP_IO_SPACE
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select 64BIT_PHYS_ADDR
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select DMA_COHERENT
-+ select NR_CPUS_DEFAULT_32
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select IRQ_CPU
-+ select ARCH_SUPPORTS_MSI
-+ select ZONE_DMA32 if 64BIT
-+ select SYNC_R4K
-+ select SYS_HAS_EARLY_PRINTK
-+ select USB_ARCH_HAS_OHCI if USB_SUPPORT
-+ select USB_ARCH_HAS_EHCI if USB_SUPPORT
-+ help
-+ Support for systems based on Netlogic XLR and XLS processors.
-+ Say Y here if you have a XLR or XLS based board.
-+
-+config NLM_XLP_BOARD
-+ bool "Netlogic XLP based systems"
-+ select BOOT_ELF32
-+ select NLM_COMMON
-+ select SYS_HAS_CPU_XLP
-+ select SYS_SUPPORTS_SMP
-+ select HW_HAS_PCI
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select 64BIT_PHYS_ADDR
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_HIGHMEM
-+ select DMA_COHERENT
-+ select NR_CPUS_DEFAULT_32
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select IRQ_CPU
-+ select ZONE_DMA32 if 64BIT
-+ select SYNC_R4K
-+ select SYS_HAS_EARLY_PRINTK
-+ select USE_OF
-+ help
-+ This board is based on Netlogic XLP Processor.
-+ Say Y here if you have a XLP based board.
-+
-+endchoice
-+
-+source "arch/mips/alchemy/Kconfig"
-+source "arch/mips/ath79/Kconfig"
-+source "arch/mips/bcm47xx/Kconfig"
-+source "arch/mips/bcm63xx/Kconfig"
-+source "arch/mips/jazz/Kconfig"
-+source "arch/mips/jz4740/Kconfig"
-+source "arch/mips/lantiq/Kconfig"
-+source "arch/mips/lasat/Kconfig"
-+source "arch/mips/pmcs-msp71xx/Kconfig"
-+source "arch/mips/powertv/Kconfig"
-+source "arch/mips/ralink/Kconfig"
-+source "arch/mips/sgi-ip27/Kconfig"
-+source "arch/mips/sibyte/Kconfig"
-+source "arch/mips/txx9/Kconfig"
-+source "arch/mips/vr41xx/Kconfig"
-+source "arch/mips/cavium-octeon/Kconfig"
-+source "arch/mips/loongson/Kconfig"
-+source "arch/mips/loongson1/Kconfig"
-+source "arch/mips/netlogic/Kconfig"
-+
-+endmenu
-+
-+config RWSEM_GENERIC_SPINLOCK
-+ bool
-+ default y
-+
-+config RWSEM_XCHGADD_ALGORITHM
-+ bool
-+
-+config ARCH_HAS_ILOG2_U32
-+ bool
-+ default n
-+
-+config ARCH_HAS_ILOG2_U64
-+ bool
-+ default n
-+
-+config GENERIC_HWEIGHT
-+ bool
-+ default y
-+
-+config GENERIC_CALIBRATE_DELAY
-+ bool
-+ default y
-+
-+config SCHED_OMIT_FRAME_POINTER
-+ bool
-+ default y
-+
-+#
-+# Select some configuration options automatically based on user selections.
-+#
-+config FW_ARC
-+ bool
-+
-+config ARCH_MAY_HAVE_PC_FDC
-+ bool
-+
-+config BOOT_RAW
-+ bool
-+
-+config CEVT_BCM1480
-+ bool
-+
-+config CEVT_DS1287
-+ bool
-+
-+config CEVT_GT641XX
-+ bool
-+
-+config CEVT_R4K
-+ bool
-+
-+config CEVT_SB1250
-+ bool
-+
-+config CEVT_TXX9
-+ bool
-+
-+config CSRC_BCM1480
-+ bool
-+
-+config CSRC_IOASIC
-+ bool
-+
-+config CSRC_POWERTV
-+ bool
-+
-+config CSRC_R4K
-+ bool
-+
-+config CSRC_GIC
-+ bool
-+
-+config CSRC_SB1250
-+ bool
-+
-+config GPIO_TXX9
-+ select GENERIC_GPIO
-+ select ARCH_REQUIRE_GPIOLIB
-+ bool
-+
-+config FW_CFE
-+ bool
-+
-+config ARCH_DMA_ADDR_T_64BIT
-+ def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
-+
-+config DMA_COHERENT
-+ bool
-+
-+config DMA_NONCOHERENT
-+ bool
-+ select NEED_DMA_MAP_STATE
-+
-+config NEED_DMA_MAP_STATE
-+ bool
-+
-+config SYS_HAS_EARLY_PRINTK
-+ bool
-+
-+config HOTPLUG_CPU
-+ bool "Support for hot-pluggable CPUs"
-+ depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
-+ help
-+ Say Y here to allow turning CPUs off and on. CPUs can be
-+ controlled through /sys/devices/system/cpu.
-+ (Note: power management support will enable this option
-+ automatically on SMP systems. )
-+ Say N if you want to disable CPU hotplug.
-+
-+config SYS_SUPPORTS_HOTPLUG_CPU
-+ bool
-+
-+config I8259
-+ bool
-+
-+config MIPS_BONITO64
-+ bool
-+
-+config MIPS_MSC
-+ bool
-+
-+config MIPS_NILE4
-+ bool
-+
-+config MIPS_DISABLE_OBSOLETE_IDE
-+ bool
-+
-+config SYNC_R4K
-+ bool
-+
-+config MIPS_MACHINE
-+ def_bool n
-+
-+config NO_IOPORT
-+ def_bool n
-+
-+config GENERIC_ISA_DMA
-+ bool
-+ select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
-+ select ISA_DMA_API
-+
-+config GENERIC_ISA_DMA_SUPPORT_BROKEN
-+ bool
-+ select GENERIC_ISA_DMA
-+
-+config ISA_DMA_API
-+ bool
-+
-+config GENERIC_GPIO
-+ bool
-+
-+config HOLES_IN_ZONE
-+ bool
-+
-+#
-+# Endianness selection. Sufficiently obscure so many users don't know what to
-+# answer,so we try hard to limit the available choices. Also the use of a
-+# choice statement should be more obvious to the user.
-+#
-+choice
-+ prompt "Endianness selection"
-+ help
-+ Some MIPS machines can be configured for either little or big endian
-+ byte order. These modes require different kernels and a different
-+ Linux distribution. In general there is one preferred byteorder for a
-+ particular system but some systems are just as commonly used in the
-+ one or the other endianness.
-+
-+config CPU_BIG_ENDIAN
-+ bool "Big endian"
-+ depends on SYS_SUPPORTS_BIG_ENDIAN
-+
-+config CPU_LITTLE_ENDIAN
-+ bool "Little endian"
-+ depends on SYS_SUPPORTS_LITTLE_ENDIAN
-+ help
-+
-+endchoice
-+
-+config EXPORT_UASM
-+ bool
-+
-+config SYS_SUPPORTS_APM_EMULATION
-+ bool
-+
-+config SYS_SUPPORTS_BIG_ENDIAN
-+ bool
-+
-+config SYS_SUPPORTS_LITTLE_ENDIAN
-+ bool
-+
-+config SYS_SUPPORTS_HUGETLBFS
-+ bool
-+ depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
-+ default y
-+
-+config MIPS_HUGE_TLB_SUPPORT
-+ def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
-+
-+config IRQ_CPU
-+ bool
-+
-+config IRQ_CPU_RM7K
-+ bool
-+
-+config IRQ_MSP_SLP
-+ bool
-+
-+config IRQ_MSP_CIC
-+ bool
-+
-+config IRQ_TXX9
-+ bool
-+
-+config IRQ_GT641XX
-+ bool
-+
-+config IRQ_GIC
-+ bool
-+
-+config MIPS_BOARDS_GEN
-+ bool
-+
-+config PCI_GT64XXX_PCI0
-+ bool
-+
-+config NO_EXCEPT_FILL
-+ bool
-+
-+config SOC_EMMA2RH
-+ bool
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select SWAP_IO_SPACE
-+ select SYS_HAS_CPU_R5500
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+
-+config SOC_PNX833X
-+ bool
-+ select CEVT_R4K
-+ select CSRC_R4K
-+ select IRQ_CPU
-+ select DMA_NONCOHERENT
-+ select SYS_HAS_CPU_MIPS32_R2
-+ select SYS_SUPPORTS_32BIT_KERNEL
-+ select SYS_SUPPORTS_LITTLE_ENDIAN
-+ select SYS_SUPPORTS_BIG_ENDIAN
-+ select GENERIC_GPIO
-+ select CPU_MIPSR2_IRQ_VI
-+
-+config SOC_PNX8335
-+ bool
-+ select SOC_PNX833X
-+
-+config SWAP_IO_SPACE
-+ bool
-+
-+config SGI_HAS_INDYDOG
-+ bool
-+
-+config SGI_HAS_HAL2
-+ bool
-+
-+config SGI_HAS_SEEQ
-+ bool
-+
-+config SGI_HAS_WD93
-+ bool
-+
-+config SGI_HAS_ZILOG
-+ bool
-+
-+config SGI_HAS_I8042
-+ bool
-+
-+config DEFAULT_SGI_PARTITION
-+ bool
-+
-+config FW_ARC32
-+ bool
-+
-+config FW_SNIPROM
-+ bool
-+
-+config BOOT_ELF32
-+ bool
-+
-+config MIPS_L1_CACHE_SHIFT
-+ int
-+ default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
-+ default "6" if MIPS_CPU_SCACHE
-+ default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
-+ default "5"
-+
-+config HAVE_STD_PC_SERIAL_PORT
-+ bool
-+
-+config ARC_CONSOLE
-+ bool "ARC console support"
-+ depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
-+
-+config ARC_MEMORY
-+ bool
-+ depends on MACH_JAZZ || SNI_RM || SGI_IP32
-+ default y
-+
-+config ARC_PROMLIB
-+ bool
-+ depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
-+ default y
-+
-+config FW_ARC64
-+ bool
-+
-+config BOOT_ELF64
-+ bool
-+
-+menu "CPU selection"
-+
-+choice
-+ prompt "CPU type"
-+ default CPU_R4X00
-+
-+config CPU_LOONGSON2E
-+ bool "Loongson 2E"
-+ depends on SYS_HAS_CPU_LOONGSON2E
-+ select CPU_LOONGSON2
-+ help
-+ The Loongson 2E processor implements the MIPS III instruction set
-+ with many extensions.
-+
-+ It has an internal FPGA northbridge, which is compatible to
-+ bonito64.
-+
-+config CPU_LOONGSON2F
-+ bool "Loongson 2F"
-+ depends on SYS_HAS_CPU_LOONGSON2F
-+ select CPU_LOONGSON2
-+ select GENERIC_GPIO
-+ select ARCH_REQUIRE_GPIOLIB
-+ help
-+ The Loongson 2F processor implements the MIPS III instruction set
-+ with many extensions.
-+
-+ Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
-+ have a similar programming interface with FPGA northbridge used in
-+ Loongson2E.
-+
-+config CPU_LOONGSON1B
-+ bool "Loongson 1B"
-+ depends on SYS_HAS_CPU_LOONGSON1B
-+ select CPU_LOONGSON1
-+ help
-+ The Loongson 1B is a 32-bit SoC, which implements the MIPS32
-+ release 2 instruction set.
-+
-+config CPU_MIPS32_R1
-+ bool "MIPS32 Release 1"
-+ depends on SYS_HAS_CPU_MIPS32_R1
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ help
-+ Choose this option to build a kernel for release 1 or later of the
-+ MIPS32 architecture. Most modern embedded systems with a 32-bit
-+ MIPS processor are based on a MIPS32 processor. If you know the
-+ specific type of processor in your system, choose those that one
-+ otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
-+ Release 2 of the MIPS32 architecture is available since several
-+ years so chances are you even have a MIPS32 Release 2 processor
-+ in which case you should choose CPU_MIPS32_R2 instead for better
-+ performance.
-+
-+config CPU_MIPS32_R2
-+ bool "MIPS32 Release 2"
-+ depends on SYS_HAS_CPU_MIPS32_R2
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ help
-+ Choose this option to build a kernel for release 2 or later of the
-+ MIPS32 architecture. Most modern embedded systems with a 32-bit
-+ MIPS processor are based on a MIPS32 processor. If you know the
-+ specific type of processor in your system, choose those that one
-+ otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
-+
-+config CPU_MIPS64_R1
-+ bool "MIPS64 Release 1"
-+ depends on SYS_HAS_CPU_MIPS64_R1
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ Choose this option to build a kernel for release 1 or later of the
-+ MIPS64 architecture. Many modern embedded systems with a 64-bit
-+ MIPS processor are based on a MIPS64 processor. If you know the
-+ specific type of processor in your system, choose those that one
-+ otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
-+ Release 2 of the MIPS64 architecture is available since several
-+ years so chances are you even have a MIPS64 Release 2 processor
-+ in which case you should choose CPU_MIPS64_R2 instead for better
-+ performance.
-+
-+config CPU_MIPS64_R2
-+ bool "MIPS64 Release 2"
-+ depends on SYS_HAS_CPU_MIPS64_R2
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ Choose this option to build a kernel for release 2 or later of the
-+ MIPS64 architecture. Many modern embedded systems with a 64-bit
-+ MIPS processor are based on a MIPS64 processor. If you know the
-+ specific type of processor in your system, choose those that one
-+ otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
-+
-+config CPU_R3000
-+ bool "R3000"
-+ depends on SYS_HAS_CPU_R3000
-+ select CPU_HAS_WB
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ help
-+ Please make sure to pick the right CPU type. Linux/MIPS is not
-+ designed to be generic, i.e. Kernels compiled for R3000 CPUs will
-+ *not* work on R4000 machines and vice versa. However, since most
-+ of the supported machines have an R4000 (or similar) CPU, R4x00
-+ might be a safe bet. If the resulting kernel does not work,
-+ try to recompile with R3000.
-+
-+config CPU_TX39XX
-+ bool "R39XX"
-+ depends on SYS_HAS_CPU_TX39XX
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+
-+config CPU_VR41XX
-+ bool "R41xx"
-+ depends on SYS_HAS_CPU_VR41XX
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ help
-+ The options selects support for the NEC VR4100 series of processors.
-+ Only choose this option if you have one of these processors as a
-+ kernel built with this option will not run on any other type of
-+ processor or vice versa.
-+
-+config CPU_R4300
-+ bool "R4300"
-+ depends on SYS_HAS_CPU_R4300
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ help
-+ MIPS Technologies R4300-series processors.
-+
-+config CPU_R4X00
-+ bool "R4x00"
-+ depends on SYS_HAS_CPU_R4X00
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ MIPS Technologies R4000-series processors other than 4300, including
-+ the R4000, R4400, R4600, and 4700.
-+
-+config CPU_TX49XX
-+ bool "R49XX"
-+ depends on SYS_HAS_CPU_TX49XX
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HUGEPAGES
-+
-+config CPU_R5000
-+ bool "R5000"
-+ depends on SYS_HAS_CPU_R5000
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ MIPS Technologies R5000-series processors other than the Nevada.
-+
-+config CPU_R5432
-+ bool "R5432"
-+ depends on SYS_HAS_CPU_R5432
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HUGEPAGES
-+
-+config CPU_R5500
-+ bool "R5500"
-+ depends on SYS_HAS_CPU_R5500
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
-+ instruction set.
-+
-+config CPU_R6000
-+ bool "R6000"
-+ depends on SYS_HAS_CPU_R6000
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ help
-+ MIPS Technologies R6000 and R6000A series processors. Note these
-+ processors are extremely rare and the support for them is incomplete.
-+
-+config CPU_NEVADA
-+ bool "RM52xx"
-+ depends on SYS_HAS_CPU_NEVADA
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ QED / PMC-Sierra RM52xx-series ("Nevada") processors.
-+
-+config CPU_R8000
-+ bool "R8000"
-+ depends on SYS_HAS_CPU_R8000
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ help
-+ MIPS Technologies R8000 processors. Note these processors are
-+ uncommon and the support for them is incomplete.
-+
-+config CPU_R10000
-+ bool "R10000"
-+ depends on SYS_HAS_CPU_R10000
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+ help
-+ MIPS Technologies R10000-series processors.
-+
-+config CPU_RM7000
-+ bool "RM7000"
-+ depends on SYS_HAS_CPU_RM7000
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+
-+config CPU_SB1
-+ bool "SB1"
-+ depends on SYS_HAS_CPU_SB1
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+ select WEAK_ORDERING
-+
-+config CPU_CAVIUM_OCTEON
-+ bool "Cavium Octeon processor"
-+ depends on SYS_HAS_CPU_CAVIUM_OCTEON
-+ select ARCH_SPARSEMEM_ENABLE
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select SYS_SUPPORTS_SMP
-+ select NR_CPUS_DEFAULT_16
-+ select WEAK_ORDERING
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+ select LIBFDT
-+ select USE_OF
-+ help
-+ The Cavium Octeon processor is a highly integrated chip containing
-+ many ethernet hardware widgets for networking tasks. The processor
-+ can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
-+ Full details can be found at http://www.caviumnetworks.com.
-+
-+config CPU_BMIPS3300
-+ bool "BMIPS3300"
-+ depends on SYS_HAS_CPU_BMIPS3300
-+ select CPU_BMIPS
-+ help
-+ Broadcom BMIPS3300 processors.
-+
-+config CPU_BMIPS4350
-+ bool "BMIPS4350"
-+ depends on SYS_HAS_CPU_BMIPS4350
-+ select CPU_BMIPS
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+ help
-+ Broadcom BMIPS4350 ("VIPER") processors.
-+
-+config CPU_BMIPS4380
-+ bool "BMIPS4380"
-+ depends on SYS_HAS_CPU_BMIPS4380
-+ select CPU_BMIPS
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+ help
-+ Broadcom BMIPS4380 processors.
-+
-+config CPU_BMIPS5000
-+ bool "BMIPS5000"
-+ depends on SYS_HAS_CPU_BMIPS5000
-+ select CPU_BMIPS
-+ select CPU_SUPPORTS_HIGHMEM
-+ select MIPS_CPU_SCACHE
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+ help
-+ Broadcom BMIPS5000 processors.
-+
-+config CPU_XLR
-+ bool "Netlogic XLR SoC"
-+ depends on SYS_HAS_CPU_XLR
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+ select WEAK_ORDERING
-+ select WEAK_REORDERING_BEYOND_LLSC
-+ help
-+ Netlogic Microsystems XLR/XLS processors.
-+
-+config CPU_XLP
-+ bool "Netlogic XLP SoC"
-+ depends on SYS_HAS_CPU_XLP
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select WEAK_ORDERING
-+ select WEAK_REORDERING_BEYOND_LLSC
-+ select CPU_HAS_PREFETCH
-+ select CPU_MIPSR2
-+ help
-+ Netlogic Microsystems XLP processors.
-+endchoice
-+
-+if CPU_LOONGSON2F
-+config CPU_NOP_WORKAROUNDS
-+ bool
-+
-+config CPU_JUMP_WORKAROUNDS
-+ bool
-+
-+config CPU_LOONGSON2F_WORKAROUNDS
-+ bool "Loongson 2F Workarounds"
-+ default y
-+ select CPU_NOP_WORKAROUNDS
-+ select CPU_JUMP_WORKAROUNDS
-+ help
-+ Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
-+ require workarounds. Without workarounds the system may hang
-+ unexpectedly. For more information please refer to the gas
-+ -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
-+
-+ Loongson 2F03 and later have fixed these issues and no workarounds
-+ are needed. The workarounds have no significant side effect on them
-+ but may decrease the performance of the system so this option should
-+ be disabled unless the kernel is intended to be run on 2F01 or 2F02
-+ systems.
-+
-+ If unsure, please say Y.
-+endif # CPU_LOONGSON2F
-+
-+config SYS_SUPPORTS_ZBOOT
-+ bool
-+ select HAVE_KERNEL_GZIP
-+ select HAVE_KERNEL_BZIP2
-+ select HAVE_KERNEL_LZMA
-+ select HAVE_KERNEL_LZO
-+
-+config SYS_SUPPORTS_ZBOOT_UART16550
-+ bool
-+ select SYS_SUPPORTS_ZBOOT
-+
-+config CPU_LOONGSON2
-+ bool
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_64BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+ select CPU_SUPPORTS_HUGEPAGES
-+
-+config CPU_LOONGSON1
-+ bool
-+ select CPU_MIPS32
-+ select CPU_MIPSR2
-+ select CPU_HAS_PREFETCH
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select CPU_SUPPORTS_HIGHMEM
-+
-+config CPU_BMIPS
-+ bool
-+ select CPU_MIPS32
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select SWAP_IO_SPACE
-+ select WEAK_ORDERING
-+
-+config SYS_HAS_CPU_LOONGSON2E
-+ bool
-+
-+config SYS_HAS_CPU_LOONGSON2F
-+ bool
-+ select CPU_SUPPORTS_CPUFREQ
-+ select CPU_SUPPORTS_ADDRWINCFG if 64BIT
-+ select CPU_SUPPORTS_UNCACHED_ACCELERATED
-+
-+config SYS_HAS_CPU_LOONGSON1B
-+ bool
-+
-+config SYS_HAS_CPU_MIPS32_R1
-+ bool
-+
-+config SYS_HAS_CPU_MIPS32_R2
-+ bool
-+
-+config SYS_HAS_CPU_MIPS64_R1
-+ bool
-+
-+config SYS_HAS_CPU_MIPS64_R2
-+ bool
-+
-+config SYS_HAS_CPU_R3000
-+ bool
-+
-+config SYS_HAS_CPU_TX39XX
-+ bool
-+
-+config SYS_HAS_CPU_VR41XX
-+ bool
-+
-+config SYS_HAS_CPU_R4300
-+ bool
-+
-+config SYS_HAS_CPU_R4X00
-+ bool
-+
-+config SYS_HAS_CPU_TX49XX
-+ bool
-+
-+config SYS_HAS_CPU_R5000
-+ bool
-+
-+config SYS_HAS_CPU_R5432
-+ bool
-+
-+config SYS_HAS_CPU_R5500
-+ bool
-+
-+config SYS_HAS_CPU_R6000
-+ bool
-+
-+config SYS_HAS_CPU_NEVADA
-+ bool
-+
-+config SYS_HAS_CPU_R8000
-+ bool
-+
-+config SYS_HAS_CPU_R10000
-+ bool
-+
-+config SYS_HAS_CPU_RM7000
-+ bool
-+
-+config SYS_HAS_CPU_SB1
-+ bool
-+
-+config SYS_HAS_CPU_CAVIUM_OCTEON
-+ bool
-+
-+config SYS_HAS_CPU_BMIPS3300
-+ bool
-+
-+config SYS_HAS_CPU_BMIPS4350
-+ bool
-+
-+config SYS_HAS_CPU_BMIPS4380
-+ bool
-+
-+config SYS_HAS_CPU_BMIPS5000
-+ bool
-+
-+config SYS_HAS_CPU_XLR
-+ bool
-+
-+config SYS_HAS_CPU_XLP
-+ bool
-+
-+#
-+# CPU may reorder R->R, R->W, W->R, W->W
-+# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
-+#
-+config WEAK_ORDERING
-+ bool
-+
-+#
-+# CPU may reorder reads and writes beyond LL/SC
-+# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
-+#
-+config WEAK_REORDERING_BEYOND_LLSC
-+ bool
-+endmenu
-+
-+#
-+# These two indicate any level of the MIPS32 and MIPS64 architecture
-+#
-+config CPU_MIPS32
-+ bool
-+ default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
-+
-+config CPU_MIPS64
-+ bool
-+ default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
-+
-+#
-+# These two indicate the revision of the architecture, either Release 1 or Release 2
-+#
-+config CPU_MIPSR1
-+ bool
-+ default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
-+
-+config CPU_MIPSR2
-+ bool
-+ default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
-+
-+config SYS_SUPPORTS_32BIT_KERNEL
-+ bool
-+config SYS_SUPPORTS_64BIT_KERNEL
-+ bool
-+config CPU_SUPPORTS_32BIT_KERNEL
-+ bool
-+config CPU_SUPPORTS_64BIT_KERNEL
-+ bool
-+config CPU_SUPPORTS_CPUFREQ
-+ bool
-+config CPU_SUPPORTS_ADDRWINCFG
-+ bool
-+config CPU_SUPPORTS_HUGEPAGES
-+ bool
-+config CPU_SUPPORTS_UNCACHED_ACCELERATED
-+ bool
-+config MIPS_PGD_C0_CONTEXT
-+ bool
-+ default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
-+
-+#
-+# Set to y for ptrace access to watch registers.
-+#
-+config HARDWARE_WATCHPOINTS
-+ bool
-+ default y if CPU_MIPSR1 || CPU_MIPSR2
-+
-+menu "Kernel type"
-+
-+choice
-+ prompt "Kernel code model"
-+ help
-+ You should only select this option if you have a workload that
-+ actually benefits from 64-bit processing or if your machine has
-+ large memory. You will only be presented a single option in this
-+ menu if your system does not support both 32-bit and 64-bit kernels.
-+
-+config 32BIT
-+ bool "32-bit kernel"
-+ depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
-+ select TRAD_SIGNALS
-+ help
-+ Select this option if you want to build a 32-bit kernel.
-+config 64BIT
-+ bool "64-bit kernel"
-+ depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
-+ select HAVE_SYSCALL_WRAPPERS
-+ help
-+ Select this option if you want to build a 64-bit kernel.
-+
-+endchoice
-+
-+choice
-+ prompt "Kernel page size"
-+ default PAGE_SIZE_4KB
-+
-+config PAGE_SIZE_4KB
-+ bool "4kB"
-+ depends on !CPU_LOONGSON2
-+ help
-+ This option select the standard 4kB Linux page size. On some
-+ R3000-family processors this is the only available page size. Using
-+ 4kB page size will minimize memory consumption and is therefore
-+ recommended for low memory systems.
-+
-+config PAGE_SIZE_8KB
-+ bool "8kB"
-+ depends on CPU_R8000 || CPU_CAVIUM_OCTEON
-+ help
-+ Using 8kB page size will result in higher performance kernel at
-+ the price of higher memory consumption. This option is available
-+ only on R8000 and cnMIPS processors. Note that you will need a
-+ suitable Linux distribution to support this.
-+
-+config PAGE_SIZE_16KB
-+ bool "16kB"
-+ depends on !CPU_R3000 && !CPU_TX39XX
-+ help
-+ Using 16kB page size will result in higher performance kernel at
-+ the price of higher memory consumption. This option is available on
-+ all non-R3000 family processors. Note that you will need a suitable
-+ Linux distribution to support this.
-+
-+config PAGE_SIZE_32KB
-+ bool "32kB"
-+ depends on CPU_CAVIUM_OCTEON
-+ help
-+ Using 32kB page size will result in higher performance kernel at
-+ the price of higher memory consumption. This option is available
-+ only on cnMIPS cores. Note that you will need a suitable Linux
-+ distribution to support this.
-+
-+config PAGE_SIZE_64KB
-+ bool "64kB"
-+ depends on !CPU_R3000 && !CPU_TX39XX
-+ help
-+ Using 64kB page size will result in higher performance kernel at
-+ the price of higher memory consumption. This option is available on
-+ all non-R3000 family processor. Not that at the time of this
-+ writing this option is still high experimental.
-+
-+endchoice
-+
-+config FORCE_MAX_ZONEORDER
-+ int "Maximum zone order"
-+ range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB
-+ default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB
-+ range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB
-+ default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB
-+ range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB
-+ default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB
-+ range 11 64
-+ default "11"
-+ help
-+ The kernel memory allocator divides physically contiguous memory
-+ blocks into "zones", where each zone is a power of two number of
-+ pages. This option selects the largest power of two that the kernel
-+ keeps in the memory allocator. If you need to allocate very large
-+ blocks of physically contiguous memory, then you may need to
-+ increase this value.
-+
-+ This config option is actually maximum order plus one. For example,
-+ a value of 11 means that the largest free memory block is 2^10 pages.
-+
-+ The page size is not necessarily 4KB. Keep this in mind
-+ when choosing a value for this option.
-+
-+config BOARD_SCACHE
-+ bool
-+
-+config IP22_CPU_SCACHE
-+ bool
-+ select BOARD_SCACHE
-+
-+#
-+# Support for a MIPS32 / MIPS64 style S-caches
-+#
-+config MIPS_CPU_SCACHE
-+ bool
-+ select BOARD_SCACHE
-+
-+config R5000_CPU_SCACHE
-+ bool
-+ select BOARD_SCACHE
-+
-+config RM7000_CPU_SCACHE
-+ bool
-+ select BOARD_SCACHE
-+
-+config SIBYTE_DMA_PAGEOPS
-+ bool "Use DMA to clear/copy pages"
-+ depends on CPU_SB1
-+ help
-+ Instead of using the CPU to zero and copy pages, use a Data Mover
-+ channel. These DMA channels are otherwise unused by the standard
-+ SiByte Linux port. Seems to give a small performance benefit.
-+
-+config CPU_HAS_PREFETCH
-+ bool
-+
-+config CPU_GENERIC_DUMP_TLB
-+ bool
-+ default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
-+
-+config CPU_R4K_FPU
-+ bool
-+ default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
-+
-+config CPU_R4K_CACHE_TLB
-+ bool
-+ default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
-+
-+choice
-+ prompt "MIPS MT options"
-+
-+config MIPS_MT_DISABLED
-+ bool "Disable multithreading support."
-+ help
-+ Use this option if your workload can't take advantage of
-+ MIPS hardware multithreading support. On systems that don't have
-+ the option of an MT-enabled processor this option will be the only
-+ option in this menu.
-+
-+config MIPS_MT_SMP
-+ bool "Use 1 TC on each available VPE for SMP"
-+ depends on SYS_SUPPORTS_MULTITHREADING
-+ select CPU_MIPSR2_IRQ_VI
-+ select CPU_MIPSR2_IRQ_EI
-+ select MIPS_MT
-+ select NR_CPUS_DEFAULT_2
-+ select SMP
-+ select SYS_SUPPORTS_SCHED_SMT if SMP
-+ select SYS_SUPPORTS_SMP
-+ select SMP_UP
-+ select MIPS_PERF_SHARED_TC_COUNTERS
-+ help
-+ This is a kernel model which is known a VSMP but lately has been
-+ marketesed into SMVP.
-+ Virtual SMP uses the processor's VPEs to implement virtual
-+ processors. In currently available configuration of the 34K processor
-+ this allows for a dual processor. Both processors will share the same
-+ primary caches; each will obtain the half of the TLB for it's own
-+ exclusive use. For a layman this model can be described as similar to
-+ what Intel calls Hyperthreading.
-+
-+ For further information see http://www.linux-mips.org/wiki/34K#VSMP
-+
-+config MIPS_MT_SMTC
-+ bool "SMTC: Use all TCs on all VPEs for SMP"
-+ depends on CPU_MIPS32_R2
-+ #depends on CPU_MIPS64_R2 # once there is hardware ...
-+ depends on SYS_SUPPORTS_MULTITHREADING
-+ select CPU_MIPSR2_IRQ_VI
-+ select CPU_MIPSR2_IRQ_EI
-+ select MIPS_MT
-+ select NR_CPUS_DEFAULT_8
-+ select SMP
-+ select SYS_SUPPORTS_SMP
-+ select SMP_UP
-+ help
-+ This is a kernel model which is known a SMTC or lately has been
-+ marketesed into SMVP.
-+ is presenting the available TC's of the core as processors to Linux.
-+ On currently available 34K processors this means a Linux system will
-+ see up to 5 processors. The implementation of the SMTC kernel differs
-+ significantly from VSMP and cannot efficiently coexist in the same
-+ kernel binary so the choice between VSMP and SMTC is a compile time
-+ decision.
-+
-+ For further information see http://www.linux-mips.org/wiki/34K#SMTC
-+
-+endchoice
-+
-+config MIPS_MT
-+ bool
-+
-+config SCHED_SMT
-+ bool "SMT (multithreading) scheduler support"
-+ depends on SYS_SUPPORTS_SCHED_SMT
-+ default n
-+ help
-+ SMT scheduler support improves the CPU scheduler's decision making
-+ when dealing with MIPS MT enabled cores at a cost of slightly
-+ increased overhead in some places. If unsure say N here.
-+
-+config SYS_SUPPORTS_SCHED_SMT
-+ bool
-+
-+config SYS_SUPPORTS_MULTITHREADING
-+ bool
-+
-+config MIPS_MT_FPAFF
-+ bool "Dynamic FPU affinity for FP-intensive threads"
-+ default y
-+ depends on MIPS_MT_SMP || MIPS_MT_SMTC
-+
-+config MIPS_VPE_LOADER
-+ bool "VPE loader support."
-+ depends on SYS_SUPPORTS_MULTITHREADING
-+ select CPU_MIPSR2_IRQ_VI
-+ select CPU_MIPSR2_IRQ_EI
-+ select MIPS_MT
-+ help
-+ Includes a loader for loading an elf relocatable object
-+ onto another VPE and running it.
-+
-+config MIPS_MT_SMTC_IM_BACKSTOP
-+ bool "Use per-TC register bits as backstop for inhibited IM bits"
-+ depends on MIPS_MT_SMTC
-+ default n
-+ help
-+ To support multiple TC microthreads acting as "CPUs" within
-+ a VPE, VPE-wide interrupt mask bits must be specially manipulated
-+ during interrupt handling. To support legacy drivers and interrupt
-+ controller management code, SMTC has a "backstop" to track and
-+ if necessary restore the interrupt mask. This has some performance
-+ impact on interrupt service overhead.
-+
-+config MIPS_MT_SMTC_IRQAFF
-+ bool "Support IRQ affinity API"
-+ depends on MIPS_MT_SMTC
-+ default n
-+ help
-+ Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
-+ for SMTC Linux kernel. Requires platform support, of which
-+ an example can be found in the MIPS kernel i8259 and Malta
-+ platform code. Adds some overhead to interrupt dispatch, and
-+ should be used only if you know what you are doing.
-+
-+config MIPS_VPE_LOADER_TOM
-+ bool "Load VPE program into memory hidden from linux"
-+ depends on MIPS_VPE_LOADER
-+ default y
-+ help
-+ The loader can use memory that is present but has been hidden from
-+ Linux using the kernel command line option "mem=xxMB". It's up to
-+ you to ensure the amount you put in the option and the space your
-+ program requires is less or equal to the amount physically present.
-+
-+# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
-+config MIPS_VPE_APSP_API
-+ bool "Enable support for AP/SP API (RTLX)"
-+ depends on MIPS_VPE_LOADER
-+ help
-+
-+config MIPS_CMP
-+ bool "MIPS CMP framework support"
-+ depends on SYS_SUPPORTS_MIPS_CMP
-+ select SYNC_R4K
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_SCHED_SMT if SMP
-+ select WEAK_ORDERING
-+ default n
-+ help
-+ This is a placeholder option for the GCMP work. It will need to
-+ be handled differently...
-+
-+config SB1_PASS_1_WORKAROUNDS
-+ bool
-+ depends on CPU_SB1_PASS_1
-+ default y
-+
-+config SB1_PASS_2_WORKAROUNDS
-+ bool
-+ depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
-+ default y
-+
-+config SB1_PASS_2_1_WORKAROUNDS
-+ bool
-+ depends on CPU_SB1 && CPU_SB1_PASS_2
-+ default y
-+
-+config 64BIT_PHYS_ADDR
-+ bool
-+
-+config ARCH_PHYS_ADDR_T_64BIT
-+ def_bool 64BIT_PHYS_ADDR
-+
-+config CPU_HAS_SMARTMIPS
-+ depends on SYS_SUPPORTS_SMARTMIPS
-+ bool "Support for the SmartMIPS ASE"
-+ help
-+ SmartMIPS is a extension of the MIPS32 architecture aimed at
-+ increased security at both hardware and software level for
-+ smartcards. Enabling this option will allow proper use of the
-+ SmartMIPS instructions by Linux applications. However a kernel with
-+ this option will not work on a MIPS core without SmartMIPS core. If
-+ you don't know you probably don't have SmartMIPS and should say N
-+ here.
-+
-+config CPU_HAS_WB
-+ bool
-+
-+config XKS01
-+ bool
-+
-+#
-+# Vectored interrupt mode is an R2 feature
-+#
-+config CPU_MIPSR2_IRQ_VI
-+ bool
-+
-+#
-+# Extended interrupt mode is an R2 feature
-+#
-+config CPU_MIPSR2_IRQ_EI
-+ bool
-+
-+config CPU_HAS_SYNC
-+ bool
-+ depends on !CPU_R3000
-+ default y
-+
-+#
-+# CPU non-features
-+#
-+config CPU_DADDI_WORKAROUNDS
-+ bool
-+
-+config CPU_R4000_WORKAROUNDS
-+ bool
-+ select CPU_R4400_WORKAROUNDS
-+
-+config CPU_R4400_WORKAROUNDS
-+ bool
-+
-+#
-+# - Highmem only makes sense for the 32-bit kernel.
-+# - The current highmem code will only work properly on physically indexed
-+# caches such as R3000, SB1, R7000 or those that look like they're virtually
-+# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
-+# moment we protect the user and offer the highmem option only on machines
-+# where it's known to be safe. This will not offer highmem on a few systems
-+# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
-+# indexed CPUs but we're playing safe.
-+# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
-+# know they might have memory configurations that could make use of highmem
-+# support.
-+#
-+config HIGHMEM
-+ bool "High Memory Support"
-+ depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
-+
-+config CPU_SUPPORTS_HIGHMEM
-+ bool
-+
-+config SYS_SUPPORTS_HIGHMEM
-+ bool
-+
-+config SYS_SUPPORTS_SMARTMIPS
-+ bool
-+
-+config ARCH_FLATMEM_ENABLE
-+ def_bool y
-+ depends on !NUMA && !CPU_LOONGSON2
-+
-+config ARCH_DISCONTIGMEM_ENABLE
-+ bool
-+ default y if SGI_IP27
-+ help
-+ Say Y to support efficient handling of discontiguous physical memory,
-+ for architectures which are either NUMA (Non-Uniform Memory Access)
-+ or have huge holes in the physical address space for other reasons.
-+ See <file:Documentation/vm/numa> for more.
-+
-+config ARCH_SPARSEMEM_ENABLE
-+ bool
-+ select SPARSEMEM_STATIC
-+
-+config NUMA
-+ bool "NUMA Support"
-+ depends on SYS_SUPPORTS_NUMA
-+ help
-+ Say Y to compile the kernel to support NUMA (Non-Uniform Memory
-+ Access). This option improves performance on systems with more
-+ than two nodes; on two node systems it is generally better to
-+ leave it disabled; on single node systems disable this option
-+ disabled.
-+
-+config SYS_SUPPORTS_NUMA
-+ bool
-+
-+config NODES_SHIFT
-+ int
-+ default "6"
-+ depends on NEED_MULTIPLE_NODES
-+
-+config HW_PERF_EVENTS
-+ bool "Enable hardware performance counter support for perf events"
-+ depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
-+ default y
-+ help
-+ Enable hardware performance counter support for perf events. If
-+ disabled, perf events will use software events only.
-+
-+source "mm/Kconfig"
-+
-+config SMP
-+ bool "Multi-Processing support"
-+ depends on SYS_SUPPORTS_SMP
-+ select USE_GENERIC_SMP_HELPERS
-+ help
-+ This enables support for systems with more than one CPU. If you have
-+ a system with only one CPU, like most personal computers, say N. If
-+ you have a system with more than one CPU, say Y.
-+
-+ If you say N here, the kernel will run on single and multiprocessor
-+ machines, but will use only one CPU of a multiprocessor machine. If
-+ you say Y here, the kernel will run on many, but not all,
-+ singleprocessor machines. On a singleprocessor machine, the kernel
-+ will run faster if you say N here.
-+
-+ People using multiprocessor machines who say Y here should also say
-+ Y to "Enhanced Real Time Clock Support", below.
-+
-+ See also the SMP-HOWTO available at
-+ <http://www.tldp.org/docs.html#howto>.
-+
-+ If you don't know what to do here, say N.
-+
-+config SMP_UP
-+ bool
-+
-+config SYS_SUPPORTS_MIPS_CMP
-+ bool
-+
-+config SYS_SUPPORTS_SMP
-+ bool
-+
-+config NR_CPUS_DEFAULT_1
-+ bool
-+
-+config NR_CPUS_DEFAULT_2
-+ bool
-+
-+config NR_CPUS_DEFAULT_4
-+ bool
-+
-+config NR_CPUS_DEFAULT_8
-+ bool
-+
-+config NR_CPUS_DEFAULT_16
-+ bool
-+
-+config NR_CPUS_DEFAULT_32
-+ bool
-+
-+config NR_CPUS_DEFAULT_64
-+ bool
-+
-+config NR_CPUS
-+ int "Maximum number of CPUs (2-64)"
-+ range 1 64 if NR_CPUS_DEFAULT_1
-+ depends on SMP
-+ default "1" if NR_CPUS_DEFAULT_1
-+ default "2" if NR_CPUS_DEFAULT_2
-+ default "4" if NR_CPUS_DEFAULT_4
-+ default "8" if NR_CPUS_DEFAULT_8
-+ default "16" if NR_CPUS_DEFAULT_16
-+ default "32" if NR_CPUS_DEFAULT_32
-+ default "64" if NR_CPUS_DEFAULT_64
-+ help
-+ This allows you to specify the maximum number of CPUs which this
-+ kernel will support. The maximum supported value is 32 for 32-bit
-+ kernel and 64 for 64-bit kernels; the minimum value which makes
-+ sense is 1 for Qemu (useful only for kernel debugging purposes)
-+ and 2 for all others.
-+
-+ This is purely to save memory - each supported CPU adds
-+ approximately eight kilobytes to the kernel image. For best
-+ performance should round up your number of processors to the next
-+ power of two.
-+
-+config MIPS_PERF_SHARED_TC_COUNTERS
-+ bool
-+
-+#
-+# Timer Interrupt Frequency Configuration
-+#
-+
-+choice
-+ prompt "Timer frequency"
-+ default HZ_250
-+ help
-+ Allows the configuration of the timer frequency.
-+
-+ config HZ_48
-+ bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+ config HZ_100
-+ bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+ config HZ_128
-+ bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+ config HZ_250
-+ bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+ config HZ_256
-+ bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+ config HZ_1000
-+ bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+ config HZ_1024
-+ bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
-+
-+endchoice
-+
-+config SYS_SUPPORTS_48HZ
-+ bool
-+
-+config SYS_SUPPORTS_100HZ
-+ bool
-+
-+config SYS_SUPPORTS_128HZ
-+ bool
-+
-+config SYS_SUPPORTS_250HZ
-+ bool
-+
-+config SYS_SUPPORTS_256HZ
-+ bool
-+
-+config SYS_SUPPORTS_1000HZ
-+ bool
-+
-+config SYS_SUPPORTS_1024HZ
-+ bool
-+
-+config SYS_SUPPORTS_ARBIT_HZ
-+ bool
-+ default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
-+ !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
-+ !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
-+ !SYS_SUPPORTS_1024HZ
-+
-+config HZ
-+ int
-+ default 48 if HZ_48
-+ default 100 if HZ_100
-+ default 128 if HZ_128
-+ default 250 if HZ_250
-+ default 256 if HZ_256
-+ default 1000 if HZ_1000
-+ default 1024 if HZ_1024
-+
-+source "kernel/Kconfig.preempt"
-+
-+config KEXEC
-+ bool "Kexec system call"
-+ help
-+ kexec is a system call that implements the ability to shutdown your
-+ current kernel, and to start another kernel. It is like a reboot
-+ but it is independent of the system firmware. And like a reboot
-+ you can start any kernel with it, not just Linux.
-+
-+ The name comes from the similarity to the exec system call.
-+
-+ It is an ongoing process to be certain the hardware in a machine
-+ is properly shutdown, so do not be surprised if this code does not
-+ initially work for you. It may help to enable device hotplugging
-+ support. As of this writing the exact hardware interface is
-+ strongly in flux, so no good recommendation can be made.
-+
-+config CRASH_DUMP
-+ bool "Kernel crash dumps"
-+ help
-+ Generate crash dump after being started by kexec.
-+ This should be normally only set in special crash dump kernels
-+ which are loaded in the main kernel with kexec-tools into
-+ a specially reserved region and then later executed after
-+ a crash by kdump/kexec. The crash dump kernel must be compiled
-+ to a memory address not used by the main kernel or firmware using
-+ PHYSICAL_START.
-+
-+config PHYSICAL_START
-+ hex "Physical address where the kernel is loaded"
-+ default "0xffffffff84000000" if 64BIT
-+ default "0x84000000" if 32BIT
-+ depends on CRASH_DUMP
-+ help
-+ This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
-+ If you plan to use kernel for capturing the crash dump change
-+ this value to start of the reserved region (the "X" value as
-+ specified in the "crashkernel=YM@XM" command line boot parameter
-+ passed to the panic-ed kernel).
-+
-+config SECCOMP
-+ bool "Enable seccomp to safely compute untrusted bytecode"
-+ depends on PROC_FS
-+ default y
-+ help
-+ This kernel feature is useful for number crunching applications
-+ that may need to compute untrusted bytecode during their
-+ execution. By using pipes or other transports made available to
-+ the process as file descriptors supporting the read/write
-+ syscalls, it's possible to isolate those applications in
-+ their own address space using seccomp. Once seccomp is
-+ enabled via /proc/<pid>/seccomp, it cannot be disabled
-+ and the task is only allowed to execute a few safe syscalls
-+ defined by each seccomp mode.
-+
-+ If unsure, say Y. Only embedded should say N here.
-+
-+config USE_OF
-+ bool
-+ select OF
-+ select OF_EARLY_FLATTREE
-+ select IRQ_DOMAIN
-+
-+endmenu
-+
-+config LOCKDEP_SUPPORT
-+ bool
-+ default y
-+
-+config STACKTRACE_SUPPORT
-+ bool
-+ default y
-+
-+source "init/Kconfig"
-+
-+source "kernel/Kconfig.freezer"
-+
-+menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
-+
-+config HW_HAS_EISA
-+ bool
-+config HW_HAS_PCI
-+ bool
-+
-+config PCI
-+ bool "Support for PCI controller"
-+ depends on HW_HAS_PCI
-+ select PCI_DOMAINS
-+ select GENERIC_PCI_IOMAP
-+ select NO_GENERIC_PCI_IOPORT_MAP
-+ help
-+ Find out whether you have a PCI motherboard. PCI is the name of a
-+ bus system, i.e. the way the CPU talks to the other stuff inside
-+ your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
-+ say Y, otherwise N.
-+
-+config PCI_DOMAINS
-+ bool
-+
-+source "drivers/pci/Kconfig"
-+
-+source "drivers/pci/pcie/Kconfig"
-+
-+#
-+# ISA support is now enabled via select. Too many systems still have the one
-+# or other ISA chip on the board that users don't know about so don't expect
-+# users to choose the right thing ...
-+#
-+config ISA
-+ bool
-+
-+config EISA
-+ bool "EISA support"
-+ depends on HW_HAS_EISA
-+ select ISA
-+ select GENERIC_ISA_DMA
-+ ---help---
-+ The Extended Industry Standard Architecture (EISA) bus was
-+ developed as an open alternative to the IBM MicroChannel bus.
-+
-+ The EISA bus provided some of the features of the IBM MicroChannel
-+ bus while maintaining backward compatibility with cards made for
-+ the older ISA bus. The EISA bus saw limited use between 1988 and
-+ 1995 when it was made obsolete by the PCI bus.
-+
-+ Say Y here if you are building a kernel for an EISA-based machine.
-+
-+ Otherwise, say N.
-+
-+source "drivers/eisa/Kconfig"
-+
-+config TC
-+ bool "TURBOchannel support"
-+ depends on MACH_DECSTATION
-+ help
-+ TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
-+ processors. TURBOchannel programming specifications are available
-+ at:
-+ <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
-+ and:
-+ <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
-+ Linux driver support status is documented at:
-+ <http://www.linux-mips.org/wiki/DECstation>
-+
-+config MMU
-+ bool
-+ default y
-+
-+config I8253
-+ bool
-+ select CLKSRC_I8253
-+ select CLKEVT_I8253
-+ select MIPS_EXTERNAL_TIMER
-+
-+config ZONE_DMA32
-+ bool
-+
-+source "drivers/pcmcia/Kconfig"
-+
-+source "drivers/pci/hotplug/Kconfig"
-+
-+config RAPIDIO
-+ bool "RapidIO support"
-+ depends on PCI
-+ default n
-+ help
-+ If you say Y here, the kernel will include drivers and
-+ infrastructure code to support RapidIO interconnect devices.
-+
-+source "drivers/rapidio/Kconfig"
-+
-+endmenu
-+
-+menu "Executable file formats"
-+
-+source "fs/Kconfig.binfmt"
-+
-+config TRAD_SIGNALS
-+ bool
-+
-+config MIPS32_COMPAT
-+ bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
-+ depends on 64BIT
-+ help
-+ Select this option if you want Linux/MIPS 32-bit binary
-+ compatibility. Since all software available for Linux/MIPS is
-+ currently 32-bit you should say Y here.
-+
-+config COMPAT
-+ bool
-+ depends on MIPS32_COMPAT
-+ select ARCH_WANT_OLD_COMPAT_IPC
-+ default y
-+
-+config SYSVIPC_COMPAT
-+ bool
-+ depends on COMPAT && SYSVIPC
-+ default y
-+
-+config MIPS32_O32
-+ bool "Kernel support for o32 binaries"
-+ depends on MIPS32_COMPAT
-+ help
-+ Select this option if you want to run o32 binaries. These are pure
-+ 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
-+ existing binaries are in this format.
-+
-+ If unsure, say Y.
-+
-+config MIPS32_N32
-+ bool "Kernel support for n32 binaries"
-+ depends on MIPS32_COMPAT
-+ help
-+ Select this option if you want to run n32 binaries. These are
-+ 64-bit binaries using 32-bit quantities for addressing and certain
-+ data that would normally be 64-bit. They are used in special
-+ cases.
-+
-+ If unsure, say N.
-+
-+config BINFMT_ELF32
-+ bool
-+ default y if MIPS32_O32 || MIPS32_N32
-+
-+endmenu
-+
-+menu "Power management options"
-+
-+config ARCH_HIBERNATION_POSSIBLE
-+ def_bool y
-+ depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
-+
-+config ARCH_SUSPEND_POSSIBLE
-+ def_bool y
-+ depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
-+
-+source "kernel/power/Kconfig"
-+
-+endmenu
-+
-+source "arch/mips/kernel/cpufreq/Kconfig"
-+
-+source "net/Kconfig"
-+
-+source "drivers/Kconfig"
-+
-+source "drivers/firmware/Kconfig"
-+
-+source "fs/Kconfig"
-+
-+source "arch/mips/Kconfig.debug"
-+
-+source "security/Kconfig"
-+
-+source "crypto/Kconfig"
-+
-+source "lib/Kconfig"
-diff -Nur linux-3.9.11.orig/arch/x86/Kconfig linux-3.9.11/arch/x86/Kconfig
---- linux-3.9.11.orig/arch/x86/Kconfig 2013-07-21 02:16:17.000000000 +0200
-+++ linux-3.9.11/arch/x86/Kconfig 2013-09-12 07:26:20.000000000 +0200
-@@ -99,7 +99,6 @@
- select GENERIC_SMP_IDLE_THREAD
- select ARCH_WANT_IPC_PARSE_VERSION if X86_32
- select HAVE_ARCH_SECCOMP_FILTER
-- select BUILDTIME_EXTABLE_SORT
- select GENERIC_CMOS_UPDATE
- select CLOCKSOURCE_WATCHDOG
- select GENERIC_CLOCKEVENTS
-diff -Nur linux-3.9.11.orig/arch/x86/Kconfig.orig linux-3.9.11/arch/x86/Kconfig.orig
---- linux-3.9.11.orig/arch/x86/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.9.11/arch/x86/Kconfig.orig 2013-07-21 02:16:17.000000000 +0200
-@@ -0,0 +1,2351 @@
-+# Select 32 or 64 bit
-+config 64BIT
-+ bool "64-bit kernel" if ARCH = "x86"
-+ default ARCH != "i386"
-+ ---help---
-+ Say yes to build a 64-bit kernel - formerly known as x86_64
-+ Say no to build a 32-bit kernel - formerly known as i386
-+
-+config X86_32
-+ def_bool y
-+ depends on !64BIT
-+ select CLKSRC_I8253
-+ select HAVE_UID16
-+
-+config X86_64
-+ def_bool y
-+ depends on 64BIT
-+ select X86_DEV_DMA_OPS
-+
-+### Arch settings
-+config X86
-+ def_bool y
-+ select HAVE_AOUT if X86_32
-+ select HAVE_UNSTABLE_SCHED_CLOCK
-+ select ARCH_SUPPORTS_NUMA_BALANCING
-+ select ARCH_WANTS_PROT_NUMA_PROT_NONE
-+ select HAVE_IDE
-+ select HAVE_OPROFILE
-+ select HAVE_PCSPKR_PLATFORM
-+ select HAVE_PERF_EVENTS
-+ select HAVE_IOREMAP_PROT
-+ select HAVE_KPROBES
-+ select HAVE_MEMBLOCK
-+ select HAVE_MEMBLOCK_NODE_MAP
-+ select ARCH_DISCARD_MEMBLOCK
-+ select ARCH_WANT_OPTIONAL_GPIOLIB
-+ select ARCH_WANT_FRAME_POINTERS
-+ select HAVE_DMA_ATTRS
-+ select HAVE_DMA_CONTIGUOUS if !SWIOTLB
-+ select HAVE_KRETPROBES
-+ select HAVE_OPTPROBES
-+ select HAVE_KPROBES_ON_FTRACE
-+ select HAVE_FTRACE_MCOUNT_RECORD
-+ select HAVE_FENTRY if X86_64
-+ select HAVE_C_RECORDMCOUNT
-+ select HAVE_DYNAMIC_FTRACE
-+ select HAVE_DYNAMIC_FTRACE_WITH_REGS
-+ select HAVE_FUNCTION_TRACER
-+ select HAVE_FUNCTION_GRAPH_TRACER
-+ select HAVE_FUNCTION_GRAPH_FP_TEST
-+ select HAVE_FUNCTION_TRACE_MCOUNT_TEST
-+ select HAVE_SYSCALL_TRACEPOINTS
-+ select SYSCTL_EXCEPTION_TRACE
-+ select HAVE_KVM
-+ select HAVE_ARCH_KGDB
-+ select HAVE_ARCH_TRACEHOOK
-+ select HAVE_GENERIC_DMA_COHERENT if X86_32
-+ select HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ select USER_STACKTRACE_SUPPORT
-+ select HAVE_REGS_AND_STACK_ACCESS_API
-+ select HAVE_DMA_API_DEBUG
-+ select HAVE_KERNEL_GZIP
-+ select HAVE_KERNEL_BZIP2
-+ select HAVE_KERNEL_LZMA
-+ select HAVE_KERNEL_XZ
-+ select HAVE_KERNEL_LZO
-+ select HAVE_HW_BREAKPOINT
-+ select HAVE_MIXED_BREAKPOINTS_REGS
-+ select PERF_EVENTS
-+ select HAVE_PERF_EVENTS_NMI
-+ select HAVE_PERF_REGS
-+ select HAVE_PERF_USER_STACK_DUMP
-+ select HAVE_DEBUG_KMEMLEAK
-+ select ANON_INODES
-+ select HAVE_ALIGNED_STRUCT_PAGE if SLUB
-+ select HAVE_CMPXCHG_LOCAL
-+ select HAVE_CMPXCHG_DOUBLE
-+ select HAVE_ARCH_KMEMCHECK
-+ select HAVE_USER_RETURN_NOTIFIER
-+ select ARCH_BINFMT_ELF_RANDOMIZE_PIE
-+ select HAVE_ARCH_JUMP_LABEL
-+ select HAVE_TEXT_POKE_SMP
-+ select HAVE_GENERIC_HARDIRQS
-+ select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
-+ select SPARSE_IRQ
-+ select GENERIC_FIND_FIRST_BIT
-+ select GENERIC_IRQ_PROBE
-+ select GENERIC_PENDING_IRQ if SMP
-+ select GENERIC_IRQ_SHOW
-+ select GENERIC_CLOCKEVENTS_MIN_ADJUST
-+ select IRQ_FORCED_THREADING
-+ select USE_GENERIC_SMP_HELPERS if SMP
-+ select HAVE_BPF_JIT if X86_64
-+ select HAVE_ARCH_TRANSPARENT_HUGEPAGE
-+ select CLKEVT_I8253
-+ select ARCH_HAVE_NMI_SAFE_CMPXCHG
-+ select GENERIC_IOMAP
-+ select DCACHE_WORD_ACCESS
-+ select GENERIC_SMP_IDLE_THREAD
-+ select ARCH_WANT_IPC_PARSE_VERSION if X86_32
-+ select HAVE_ARCH_SECCOMP_FILTER
-+ select BUILDTIME_EXTABLE_SORT
-+ select GENERIC_CMOS_UPDATE
-+ select CLOCKSOURCE_WATCHDOG
-+ select GENERIC_CLOCKEVENTS
-+ select ARCH_CLOCKSOURCE_DATA if X86_64
-+ select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC)
-+ select GENERIC_TIME_VSYSCALL if X86_64
-+ select KTIME_SCALAR if X86_32
-+ select GENERIC_STRNCPY_FROM_USER
-+ select GENERIC_STRNLEN_USER
-+ select HAVE_CONTEXT_TRACKING if X86_64
-+ select HAVE_IRQ_TIME_ACCOUNTING
-+ select VIRT_TO_BUS
-+ select MODULES_USE_ELF_REL if X86_32
-+ select MODULES_USE_ELF_RELA if X86_64
-+ select CLONE_BACKWARDS if X86_32
-+ select ARCH_USE_BUILTIN_BSWAP
-+ select OLD_SIGSUSPEND3 if X86_32 || IA32_EMULATION
-+ select OLD_SIGACTION if X86_32
-+ select COMPAT_OLD_SIGACTION if IA32_EMULATION
-+
-+config INSTRUCTION_DECODER
-+ def_bool y
-+ depends on KPROBES || PERF_EVENTS || UPROBES
-+
-+config OUTPUT_FORMAT
-+ string
-+ default "elf32-i386" if X86_32
-+ default "elf64-x86-64" if X86_64
-+
-+config ARCH_DEFCONFIG
-+ string
-+ default "arch/x86/configs/i386_defconfig" if X86_32
-+ default "arch/x86/configs/x86_64_defconfig" if X86_64
-+
-+config LOCKDEP_SUPPORT
-+ def_bool y
-+
-+config STACKTRACE_SUPPORT
-+ def_bool y
-+
-+config HAVE_LATENCYTOP_SUPPORT
-+ def_bool y
-+
-+config MMU
-+ def_bool y
-+
-+config SBUS
-+ bool
-+
-+config NEED_DMA_MAP_STATE
-+ def_bool y
-+ depends on X86_64 || INTEL_IOMMU || DMA_API_DEBUG
-+
-+config NEED_SG_DMA_LENGTH
-+ def_bool y
-+
-+config GENERIC_ISA_DMA
-+ def_bool y
-+ depends on ISA_DMA_API
-+
-+config GENERIC_BUG
-+ def_bool y
-+ depends on BUG
-+ select GENERIC_BUG_RELATIVE_POINTERS if X86_64
-+
-+config GENERIC_BUG_RELATIVE_POINTERS
-+ bool
-+
-+config GENERIC_HWEIGHT
-+ def_bool y
-+
-+config GENERIC_GPIO
-+ bool
-+
-+config ARCH_MAY_HAVE_PC_FDC
-+ def_bool y
-+ depends on ISA_DMA_API
-+
-+config RWSEM_XCHGADD_ALGORITHM
-+ def_bool y
-+
-+config GENERIC_CALIBRATE_DELAY
-+ def_bool y
-+
-+config ARCH_HAS_CPU_RELAX
-+ def_bool y
-+
-+config ARCH_HAS_DEFAULT_IDLE
-+ def_bool y
-+
-+config ARCH_HAS_CACHE_LINE_SIZE
-+ def_bool y
-+
-+config ARCH_HAS_CPU_AUTOPROBE
-+ def_bool y
-+
-+config HAVE_SETUP_PER_CPU_AREA
-+ def_bool y
-+
-+config NEED_PER_CPU_EMBED_FIRST_CHUNK
-+ def_bool y
-+
-+config NEED_PER_CPU_PAGE_FIRST_CHUNK
-+ def_bool y
-+
-+config ARCH_HIBERNATION_POSSIBLE
-+ def_bool y
-+
-+config ARCH_SUSPEND_POSSIBLE
-+ def_bool y
-+
-+config ZONE_DMA32
-+ bool
-+ default X86_64
-+
-+config AUDIT_ARCH
-+ bool
-+ default X86_64
-+
-+config ARCH_SUPPORTS_OPTIMIZED_INLINING
-+ def_bool y
-+
-+config ARCH_SUPPORTS_DEBUG_PAGEALLOC
-+ def_bool y
-+
-+config HAVE_INTEL_TXT
-+ def_bool y
-+ depends on INTEL_IOMMU && ACPI
-+
-+config X86_32_SMP
-+ def_bool y
-+ depends on X86_32 && SMP
-+
-+config X86_64_SMP
-+ def_bool y
-+ depends on X86_64 && SMP
-+
-+config X86_HT
-+ def_bool y
-+ depends on SMP
-+
-+config X86_32_LAZY_GS
-+ def_bool y
-+ depends on X86_32 && !CC_STACKPROTECTOR
-+
-+config ARCH_HWEIGHT_CFLAGS
-+ string
-+ default "-fcall-saved-ecx -fcall-saved-edx" if X86_32
-+ default "-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" if X86_64
-+
-+config ARCH_CPU_PROBE_RELEASE
-+ def_bool y
-+ depends on HOTPLUG_CPU
-+
-+config ARCH_SUPPORTS_UPROBES
-+ def_bool y
-+
-+source "init/Kconfig"
-+source "kernel/Kconfig.freezer"
-+
-+menu "Processor type and features"
-+
-+config ZONE_DMA
-+ bool "DMA memory allocation support" if EXPERT
-+ default y
-+ help
-+ DMA memory allocation support allows devices with less than 32-bit
-+ addressing to allocate within the first 16MB of address space.
-+ Disable if no such devices will be used.
-+
-+ If unsure, say Y.
-+
-+config SMP
-+ bool "Symmetric multi-processing support"
-+ ---help---
-+ This enables support for systems with more than one CPU. If you have
-+ a system with only one CPU, like most personal computers, say N. If
-+ you have a system with more than one CPU, say Y.
-+
-+ If you say N here, the kernel will run on single and multiprocessor
-+ machines, but will use only one CPU of a multiprocessor machine. If
-+ you say Y here, the kernel will run on many, but not all,
-+ singleprocessor machines. On a singleprocessor machine, the kernel
-+ will run faster if you say N here.
-+
-+ Note that if you say Y here and choose architecture "586" or
-+ "Pentium" under "Processor family", the kernel will not work on 486
-+ architectures. Similarly, multiprocessor kernels for the "PPro"
-+ architecture may not work on all Pentium based boards.
-+
-+ People using multiprocessor machines who say Y here should also say
-+ Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
-+ Management" code will be disabled if you say Y here.
-+
-+ See also <file:Documentation/x86/i386/IO-APIC.txt>,
-+ <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
-+ <http://www.tldp.org/docs.html#howto>.
-+
-+ If you don't know what to do here, say N.
-+
-+config X86_X2APIC
-+ bool "Support x2apic"
-+ depends on X86_LOCAL_APIC && X86_64 && IRQ_REMAP
-+ ---help---
-+ This enables x2apic support on CPUs that have this feature.
-+
-+ This allows 32-bit apic IDs (so it can support very large systems),
-+ and accesses the local apic via MSRs not via mmio.
-+
-+ If you don't know what to do here, say N.
-+
-+config X86_MPPARSE
-+ bool "Enable MPS table" if ACPI || SFI
-+ default y
-+ depends on X86_LOCAL_APIC
-+ ---help---
-+ For old smp systems that do not have proper acpi support. Newer systems
-+ (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
-+
-+config X86_BIGSMP
-+ bool "Support for big SMP systems with more than 8 CPUs"
-+ depends on X86_32 && SMP
-+ ---help---
-+ This option is needed for the systems that have more than 8 CPUs
-+
-+config GOLDFISH
-+ def_bool y
-+ depends on X86_GOLDFISH
-+
-+if X86_32
-+config X86_EXTENDED_PLATFORM
-+ bool "Support for extended (non-PC) x86 platforms"
-+ default y
-+ ---help---
-+ If you disable this option then the kernel will only support
-+ standard PC platforms. (which covers the vast majority of
-+ systems out there.)
-+
-+ If you enable this option then you'll be able to select support
-+ for the following (non-PC) 32 bit x86 platforms:
-+ AMD Elan
-+ NUMAQ (IBM/Sequent)
-+ RDC R-321x SoC
-+ SGI 320/540 (Visual Workstation)
-+ STA2X11-based (e.g. Northville)
-+ Summit/EXA (IBM x440)
-+ Unisys ES7000 IA32 series
-+ Moorestown MID devices
-+
-+ If you have one of these systems, or if you want to build a
-+ generic distribution kernel, say Y here - otherwise say N.
-+endif
-+
-+if X86_64
-+config X86_EXTENDED_PLATFORM
-+ bool "Support for extended (non-PC) x86 platforms"
-+ default y
-+ ---help---
-+ If you disable this option then the kernel will only support
-+ standard PC platforms. (which covers the vast majority of
-+ systems out there.)
-+
-+ If you enable this option then you'll be able to select support
-+ for the following (non-PC) 64 bit x86 platforms:
-+ Numascale NumaChip
-+ ScaleMP vSMP
-+ SGI Ultraviolet
-+
-+ If you have one of these systems, or if you want to build a
-+ generic distribution kernel, say Y here - otherwise say N.
-+endif
-+# This is an alphabetically sorted list of 64 bit extended platforms
-+# Please maintain the alphabetic order if and when there are additions
-+config X86_NUMACHIP
-+ bool "Numascale NumaChip"
-+ depends on X86_64
-+ depends on X86_EXTENDED_PLATFORM
-+ depends on NUMA
-+ depends on SMP
-+ depends on X86_X2APIC
-+ depends on PCI_MMCONFIG
-+ ---help---
-+ Adds support for Numascale NumaChip large-SMP systems. Needed to
-+ enable more than ~168 cores.
-+ If you don't have one of these, you should say N here.
-+
-+config X86_VSMP
-+ bool "ScaleMP vSMP"
-+ select PARAVIRT_GUEST
-+ select PARAVIRT
-+ depends on X86_64 && PCI
-+ depends on X86_EXTENDED_PLATFORM
-+ depends on SMP
-+ ---help---
-+ Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
-+ supposed to run on these EM64T-based machines. Only choose this option
-+ if you have one of these machines.
-+
-+config X86_UV
-+ bool "SGI Ultraviolet"
-+ depends on X86_64
-+ depends on X86_EXTENDED_PLATFORM
-+ depends on NUMA
-+ depends on X86_X2APIC
-+ ---help---
-+ This option is needed in order to support SGI Ultraviolet systems.
-+ If you don't have one of these, you should say N here.
-+
-+# Following is an alphabetically sorted list of 32 bit extended platforms
-+# Please maintain the alphabetic order if and when there are additions
-+
-+config X86_GOLDFISH
-+ bool "Goldfish (Virtual Platform)"
-+ depends on X86_32
-+ ---help---
-+ Enable support for the Goldfish virtual platform used primarily
-+ for Android development. Unless you are building for the Android
-+ Goldfish emulator say N here.
-+
-+config X86_INTEL_CE
-+ bool "CE4100 TV platform"
-+ depends on PCI
-+ depends on PCI_GODIRECT
-+ depends on X86_32
-+ depends on X86_EXTENDED_PLATFORM
-+ select X86_REBOOTFIXUPS
-+ select OF
-+ select OF_EARLY_FLATTREE
-+ select IRQ_DOMAIN
-+ ---help---
-+ Select for the Intel CE media processor (CE4100) SOC.
-+ This option compiles in support for the CE4100 SOC for settop
-+ boxes and media devices.
-+
-+config X86_WANT_INTEL_MID
-+ bool "Intel MID platform support"
-+ depends on X86_32
-+ depends on X86_EXTENDED_PLATFORM
-+ ---help---
-+ Select to build a kernel capable of supporting Intel MID platform
-+ systems which do not have the PCI legacy interfaces (Moorestown,
-+ Medfield). If you are building for a PC class system say N here.
-+
-+if X86_WANT_INTEL_MID
-+
-+config X86_INTEL_MID
-+ bool
-+
-+config X86_MDFLD
-+ bool "Medfield MID platform"
-+ depends on PCI
-+ depends on PCI_GOANY
-+ depends on X86_IO_APIC
-+ select X86_INTEL_MID
-+ select SFI
-+ select DW_APB_TIMER
-+ select APB_TIMER
-+ select I2C
-+ select SPI
-+ select INTEL_SCU_IPC
-+ select X86_PLATFORM_DEVICES
-+ select MFD_INTEL_MSIC
-+ ---help---
-+ Medfield is Intel's Low Power Intel Architecture (LPIA) based Moblin
-+ Internet Device(MID) platform.
-+ Unlike standard x86 PCs, Medfield does not have many legacy devices
-+ nor standard legacy replacement devices/features. e.g. Medfield does
-+ not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
-+
-+endif
-+
-+config X86_INTEL_LPSS
-+ bool "Intel Low Power Subsystem Support"
-+ depends on ACPI
-+ select COMMON_CLK
-+ ---help---
-+ Select to build support for Intel Low Power Subsystem such as
-+ found on Intel Lynxpoint PCH. Selecting this option enables
-+ things like clock tree (common clock framework) which are needed
-+ by the LPSS peripheral drivers.
-+
-+config X86_RDC321X
-+ bool "RDC R-321x SoC"
-+ depends on X86_32
-+ depends on X86_EXTENDED_PLATFORM
-+ select M486
-+ select X86_REBOOTFIXUPS
-+ ---help---
-+ This option is needed for RDC R-321x system-on-chip, also known
-+ as R-8610-(G).
-+ If you don't have one of these chips, you should say N here.
-+
-+config X86_32_NON_STANDARD
-+ bool "Support non-standard 32-bit SMP architectures"
-+ depends on X86_32 && SMP
-+ depends on X86_EXTENDED_PLATFORM
-+ ---help---
-+ This option compiles in the NUMAQ, Summit, bigsmp, ES7000,
-+ STA2X11, default subarchitectures. It is intended for a generic
-+ binary kernel. If you select them all, kernel will probe it
-+ one by one and will fallback to default.
-+
-+# Alphabetically sorted list of Non standard 32 bit platforms
-+
-+config X86_NUMAQ
-+ bool "NUMAQ (IBM/Sequent)"
-+ depends on X86_32_NON_STANDARD
-+ depends on PCI
-+ select NUMA
-+ select X86_MPPARSE
-+ ---help---
-+ This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
-+ NUMA multiquad box. This changes the way that processors are
-+ bootstrapped, and uses Clustered Logical APIC addressing mode instead
-+ of Flat Logical. You will need a new lynxer.elf file to flash your
-+ firmware with - send email to <Martin.Bligh@us.ibm.com>.
-+
-+config X86_SUPPORTS_MEMORY_FAILURE
-+ def_bool y
-+ # MCE code calls memory_failure():
-+ depends on X86_MCE
-+ # On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
-+ depends on !X86_NUMAQ
-+ # On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
-+ depends on X86_64 || !SPARSEMEM
-+ select ARCH_SUPPORTS_MEMORY_FAILURE
-+
-+config X86_VISWS
-+ bool "SGI 320/540 (Visual Workstation)"
-+ depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT
-+ depends on X86_32_NON_STANDARD
-+ ---help---
-+ The SGI Visual Workstation series is an IA32-based workstation
-+ based on SGI systems chips with some legacy PC hardware attached.
-+
-+ Say Y here to create a kernel to run on the SGI 320 or 540.
-+
-+ A kernel compiled for the Visual Workstation will run on general
-+ PCs as well. See <file:Documentation/sgi-visws.txt> for details.
-+
-+config STA2X11
-+ bool "STA2X11 Companion Chip Support"
-+ depends on X86_32_NON_STANDARD && PCI
-+ select X86_DEV_DMA_OPS
-+ select X86_DMA_REMAP
-+ select SWIOTLB
-+ select MFD_STA2X11
-+ select ARCH_REQUIRE_GPIOLIB
-+ default n
-+ ---help---
-+ This adds support for boards based on the STA2X11 IO-Hub,
-+ a.k.a. "ConneXt". The chip is used in place of the standard
-+ PC chipset, so all "standard" peripherals are missing. If this
-+ option is selected the kernel will still be able to boot on
-+ standard PC machines.
-+
-+config X86_SUMMIT
-+ bool "Summit/EXA (IBM x440)"
-+ depends on X86_32_NON_STANDARD
-+ ---help---
-+ This option is needed for IBM systems that use the Summit/EXA chipset.
-+ In particular, it is needed for the x440.
-+
-+config X86_ES7000
-+ bool "Unisys ES7000 IA32 series"
-+ depends on X86_32_NON_STANDARD && X86_BIGSMP
-+ ---help---
-+ Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
-+ supposed to run on an IA32-based Unisys ES7000 system.
-+
-+config X86_32_IRIS
-+ tristate "Eurobraille/Iris poweroff module"
-+ depends on X86_32
-+ ---help---
-+ The Iris machines from EuroBraille do not have APM or ACPI support
-+ to shut themselves down properly. A special I/O sequence is
-+ needed to do so, which is what this module does at
-+ kernel shutdown.
-+
-+ This is only for Iris machines from EuroBraille.
-+
-+ If unused, say N.
-+
-+config SCHED_OMIT_FRAME_POINTER
-+ def_bool y
-+ prompt "Single-depth WCHAN output"
-+ depends on X86
-+ ---help---
-+ Calculate simpler /proc/<PID>/wchan values. If this option
-+ is disabled then wchan values will recurse back to the
-+ caller function. This provides more accurate wchan values,
-+ at the expense of slightly more scheduling overhead.
-+
-+ If in doubt, say "Y".
-+
-+menuconfig PARAVIRT_GUEST
-+ bool "Paravirtualized guest support"
-+ ---help---
-+ Say Y here to get to see options related to running Linux under
-+ various hypervisors. This option alone does not add any kernel code.
-+
-+ If you say N, all options in this submenu will be skipped and disabled.
-+
-+if PARAVIRT_GUEST
-+
-+config PARAVIRT_TIME_ACCOUNTING
-+ bool "Paravirtual steal time accounting"
-+ select PARAVIRT
-+ default n
-+ ---help---
-+ Select this option to enable fine granularity task steal time
-+ accounting. Time spent executing other tasks in parallel with
-+ the current vCPU is discounted from the vCPU power. To account for
-+ that, there can be a small performance impact.
-+
-+ If in doubt, say N here.
-+
-+source "arch/x86/xen/Kconfig"
-+
-+config KVM_GUEST
-+ bool "KVM Guest support (including kvmclock)"
-+ select PARAVIRT
-+ select PARAVIRT
-+ select PARAVIRT_CLOCK
-+ default y if PARAVIRT_GUEST
-+ ---help---
-+ This option enables various optimizations for running under the KVM
-+ hypervisor. It includes a paravirtualized clock, so that instead
-+ of relying on a PIT (or probably other) emulation by the
-+ underlying device model, the host provides the guest with
-+ timing infrastructure such as time of day, and system time
-+
-+source "arch/x86/lguest/Kconfig"
-+
-+config PARAVIRT
-+ bool "Enable paravirtualization code"
-+ ---help---
-+ This changes the kernel so it can modify itself when it is run
-+ under a hypervisor, potentially improving performance significantly
-+ over full virtualization. However, when run without a hypervisor
-+ the kernel is theoretically slower and slightly larger.
-+
-+config PARAVIRT_SPINLOCKS
-+ bool "Paravirtualization layer for spinlocks"
-+ depends on PARAVIRT && SMP
-+ ---help---
-+ Paravirtualized spinlocks allow a pvops backend to replace the
-+ spinlock implementation with something virtualization-friendly
-+ (for example, block the virtual CPU rather than spinning).
-+
-+ Unfortunately the downside is an up to 5% performance hit on
-+ native kernels, with various workloads.
-+
-+ If you are unsure how to answer this question, answer N.
-+
-+config PARAVIRT_CLOCK
-+ bool
-+
-+endif
-+
-+config PARAVIRT_DEBUG
-+ bool "paravirt-ops debugging"
-+ depends on PARAVIRT && DEBUG_KERNEL
-+ ---help---
-+ Enable to debug paravirt_ops internals. Specifically, BUG if
-+ a paravirt_op is missing when it is called.
-+
-+config NO_BOOTMEM
-+ def_bool y
-+
-+config MEMTEST
-+ bool "Memtest"
-+ ---help---
-+ This option adds a kernel parameter 'memtest', which allows memtest
-+ to be set.
-+ memtest=0, mean disabled; -- default
-+ memtest=1, mean do 1 test pattern;
-+ ...
-+ memtest=4, mean do 4 test patterns.
-+ If you are unsure how to answer this question, answer N.
-+
-+config X86_SUMMIT_NUMA
-+ def_bool y
-+ depends on X86_32 && NUMA && X86_32_NON_STANDARD
-+
-+config X86_CYCLONE_TIMER
-+ def_bool y
-+ depends on X86_SUMMIT
-+
-+source "arch/x86/Kconfig.cpu"
-+
-+config HPET_TIMER
-+ def_bool X86_64
-+ prompt "HPET Timer Support" if X86_32
-+ ---help---
-+ Use the IA-PC HPET (High Precision Event Timer) to manage
-+ time in preference to the PIT and RTC, if a HPET is
-+ present.
-+ HPET is the next generation timer replacing legacy 8254s.
-+ The HPET provides a stable time base on SMP
-+ systems, unlike the TSC, but it is more expensive to access,
-+ as it is off-chip. You can find the HPET spec at
-+ <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
-+
-+ You can safely choose Y here. However, HPET will only be
-+ activated if the platform and the BIOS support this feature.
-+ Otherwise the 8254 will be used for timing services.
-+
-+ Choose N to continue using the legacy 8254 timer.
-+
-+config HPET_EMULATE_RTC
-+ def_bool y
-+ depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
-+
-+config APB_TIMER
-+ def_bool y if X86_INTEL_MID
-+ prompt "Intel MID APB Timer Support" if X86_INTEL_MID
-+ select DW_APB_TIMER
-+ depends on X86_INTEL_MID && SFI
-+ help
-+ APB timer is the replacement for 8254, HPET on X86 MID platforms.
-+ The APBT provides a stable time base on SMP
-+ systems, unlike the TSC, but it is more expensive to access,
-+ as it is off-chip. APB timers are always running regardless of CPU
-+ C states, they are used as per CPU clockevent device when possible.
-+
-+# Mark as expert because too many people got it wrong.
-+# The code disables itself when not needed.
-+config DMI
-+ default y
-+ bool "Enable DMI scanning" if EXPERT
-+ ---help---
-+ Enabled scanning of DMI to identify machine quirks. Say Y
-+ here unless you have verified that your setup is not
-+ affected by entries in the DMI blacklist. Required by PNP
-+ BIOS code.
-+
-+config GART_IOMMU
-+ bool "GART IOMMU support" if EXPERT
-+ default y
-+ select SWIOTLB
-+ depends on X86_64 && PCI && AMD_NB
-+ ---help---
-+ Support for full DMA access of devices with 32bit memory access only
-+ on systems with more than 3GB. This is usually needed for USB,
-+ sound, many IDE/SATA chipsets and some other devices.
-+ Provides a driver for the AMD Athlon64/Opteron/Turion/Sempron GART
-+ based hardware IOMMU and a software bounce buffer based IOMMU used
-+ on Intel systems and as fallback.
-+ The code is only active when needed (enough memory and limited
-+ device) unless CONFIG_IOMMU_DEBUG or iommu=force is specified
-+ too.
-+
-+config CALGARY_IOMMU
-+ bool "IBM Calgary IOMMU support"
-+ select SWIOTLB
-+ depends on X86_64 && PCI
-+ ---help---
-+ Support for hardware IOMMUs in IBM's xSeries x366 and x460
-+ systems. Needed to run systems with more than 3GB of memory
-+ properly with 32-bit PCI devices that do not support DAC
-+ (Double Address Cycle). Calgary also supports bus level
-+ isolation, where all DMAs pass through the IOMMU. This
-+ prevents them from going anywhere except their intended
-+ destination. This catches hard-to-find kernel bugs and
-+ mis-behaving drivers and devices that do not use the DMA-API
-+ properly to set up their DMA buffers. The IOMMU can be
-+ turned off at boot time with the iommu=off parameter.
-+ Normally the kernel will make the right choice by itself.
-+ If unsure, say Y.
-+
-+config CALGARY_IOMMU_ENABLED_BY_DEFAULT
-+ def_bool y
-+ prompt "Should Calgary be enabled by default?"
-+ depends on CALGARY_IOMMU
-+ ---help---
-+ Should Calgary be enabled by default? if you choose 'y', Calgary
-+ will be used (if it exists). If you choose 'n', Calgary will not be
-+ used even if it exists. If you choose 'n' and would like to use
-+ Calgary anyway, pass 'iommu=calgary' on the kernel command line.
-+ If unsure, say Y.
-+
-+# need this always selected by IOMMU for the VIA workaround
-+config SWIOTLB
-+ def_bool y if X86_64
-+ ---help---
-+ Support for software bounce buffers used on x86-64 systems
-+ which don't have a hardware IOMMU. Using this PCI devices
-+ which can only access 32-bits of memory can be used on systems
-+ with more than 3 GB of memory.
-+ If unsure, say Y.
-+
-+config IOMMU_HELPER
-+ def_bool y
-+ depends on CALGARY_IOMMU || GART_IOMMU || SWIOTLB || AMD_IOMMU
-+
-+config MAXSMP
-+ bool "Enable Maximum number of SMP Processors and NUMA Nodes"
-+ depends on X86_64 && SMP && DEBUG_KERNEL
-+ select CPUMASK_OFFSTACK
-+ ---help---
-+ Enable maximum number of CPUS and NUMA Nodes for this architecture.
-+ If unsure, say N.
-+
-+config NR_CPUS
-+ int "Maximum number of CPUs" if SMP && !MAXSMP
-+ range 2 8 if SMP && X86_32 && !X86_BIGSMP
-+ range 2 512 if SMP && !MAXSMP
-+ default "1" if !SMP
-+ default "4096" if MAXSMP
-+ default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
-+ default "8" if SMP
-+ ---help---
-+ This allows you to specify the maximum number of CPUs which this
-+ kernel will support. The maximum supported value is 512 and the
-+ minimum value which makes sense is 2.
-+
-+ This is purely to save memory - each supported CPU adds
-+ approximately eight kilobytes to the kernel image.
-+
-+config SCHED_SMT
-+ bool "SMT (Hyperthreading) scheduler support"
-+ depends on X86_HT
-+ ---help---
-+ SMT scheduler support improves the CPU scheduler's decision making
-+ when dealing with Intel Pentium 4 chips with HyperThreading at a
-+ cost of slightly increased overhead in some places. If unsure say
-+ N here.
-+
-+config SCHED_MC
-+ def_bool y
-+ prompt "Multi-core scheduler support"
-+ depends on X86_HT
-+ ---help---
-+ Multi-core scheduler support improves the CPU scheduler's decision
-+ making when dealing with multi-core CPU chips at a cost of slightly
-+ increased overhead in some places. If unsure say N here.
-+
-+source "kernel/Kconfig.preempt"
-+
-+config X86_UP_APIC
-+ bool "Local APIC support on uniprocessors"
-+ depends on X86_32 && !SMP && !X86_32_NON_STANDARD
-+ ---help---
-+ A local APIC (Advanced Programmable Interrupt Controller) is an
-+ integrated interrupt controller in the CPU. If you have a single-CPU
-+ system which has a processor with a local APIC, you can say Y here to
-+ enable and use it. If you say Y here even though your machine doesn't
-+ have a local APIC, then the kernel will still run with no slowdown at
-+ all. The local APIC supports CPU-generated self-interrupts (timer,
-+ performance counters), and the NMI watchdog which detects hard
-+ lockups.
-+
-+config X86_UP_IOAPIC
-+ bool "IO-APIC support on uniprocessors"
-+ depends on X86_UP_APIC
-+ ---help---
-+ An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
-+ SMP-capable replacement for PC-style interrupt controllers. Most
-+ SMP systems and many recent uniprocessor systems have one.
-+
-+ If you have a single-CPU system with an IO-APIC, you can say Y here
-+ to use it. If you say Y here even though your machine doesn't have
-+ an IO-APIC, then the kernel will still run with no slowdown at all.
-+
-+config X86_LOCAL_APIC
-+ def_bool y
-+ depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
-+
-+config X86_IO_APIC
-+ def_bool y
-+ depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_IOAPIC
-+
-+config X86_VISWS_APIC
-+ def_bool y
-+ depends on X86_32 && X86_VISWS
-+
-+config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
-+ bool "Reroute for broken boot IRQs"
-+ depends on X86_IO_APIC
-+ ---help---
-+ This option enables a workaround that fixes a source of
-+ spurious interrupts. This is recommended when threaded
-+ interrupt handling is used on systems where the generation of
-+ superfluous "boot interrupts" cannot be disabled.
-+
-+ Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
-+ entry in the chipset's IO-APIC is masked (as, e.g. the RT
-+ kernel does during interrupt handling). On chipsets where this
-+ boot IRQ generation cannot be disabled, this workaround keeps
-+ the original IRQ line masked so that only the equivalent "boot
-+ IRQ" is delivered to the CPUs. The workaround also tells the
-+ kernel to set up the IRQ handler on the boot IRQ line. In this
-+ way only one interrupt is delivered to the kernel. Otherwise
-+ the spurious second interrupt may cause the kernel to bring
-+ down (vital) interrupt lines.
-+
-+ Only affects "broken" chipsets. Interrupt sharing may be
-+ increased on these systems.
-+
-+config X86_MCE
-+ bool "Machine Check / overheating reporting"
-+ default y
-+ ---help---
-+ Machine Check support allows the processor to notify the
-+ kernel if it detects a problem (e.g. overheating, data corruption).
-+ The action the kernel takes depends on the severity of the problem,
-+ ranging from warning messages to halting the machine.
-+
-+config X86_MCE_INTEL
-+ def_bool y
-+ prompt "Intel MCE features"
-+ depends on X86_MCE && X86_LOCAL_APIC
-+ ---help---
-+ Additional support for intel specific MCE features such as
-+ the thermal monitor.
-+
-+config X86_MCE_AMD
-+ def_bool y
-+ prompt "AMD MCE features"
-+ depends on X86_MCE && X86_LOCAL_APIC
-+ ---help---
-+ Additional support for AMD specific MCE features such as
-+ the DRAM Error Threshold.
-+
-+config X86_ANCIENT_MCE
-+ bool "Support for old Pentium 5 / WinChip machine checks"
-+ depends on X86_32 && X86_MCE
-+ ---help---
-+ Include support for machine check handling on old Pentium 5 or WinChip
-+ systems. These typically need to be enabled explicitely on the command
-+ line.
-+
-+config X86_MCE_THRESHOLD
-+ depends on X86_MCE_AMD || X86_MCE_INTEL
-+ def_bool y
-+
-+config X86_MCE_INJECT
-+ depends on X86_MCE
-+ tristate "Machine check injector support"
-+ ---help---
-+ Provide support for injecting machine checks for testing purposes.
-+ If you don't know what a machine check is and you don't do kernel
-+ QA it is safe to say n.
-+
-+config X86_THERMAL_VECTOR
-+ def_bool y
-+ depends on X86_MCE_INTEL
-+
-+config VM86
-+ bool "Enable VM86 support" if EXPERT
-+ default y
-+ depends on X86_32
-+ ---help---
-+ This option is required by programs like DOSEMU to run 16-bit legacy
-+ code on X86 processors. It also may be needed by software like
-+ XFree86 to initialize some video cards via BIOS. Disabling this
-+ option saves about 6k.
-+
-+config TOSHIBA
-+ tristate "Toshiba Laptop support"
-+ depends on X86_32
-+ ---help---
-+ This adds a driver to safely access the System Management Mode of
-+ the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
-+ not work on models with a Phoenix BIOS. The System Management Mode
-+ is used to set the BIOS and power saving options on Toshiba portables.
-+
-+ For information on utilities to make use of this driver see the
-+ Toshiba Linux utilities web site at:
-+ <http://www.buzzard.org.uk/toshiba/>.
-+
-+ Say Y if you intend to run this kernel on a Toshiba portable.
-+ Say N otherwise.
-+
-+config I8K
-+ tristate "Dell laptop support"
-+ select HWMON
-+ ---help---
-+ This adds a driver to safely access the System Management Mode
-+ of the CPU on the Dell Inspiron 8000. The System Management Mode
-+ is used to read cpu temperature and cooling fan status and to
-+ control the fans on the I8K portables.
-+
-+ This driver has been tested only on the Inspiron 8000 but it may
-+ also work with other Dell laptops. You can force loading on other
-+ models by passing the parameter `force=1' to the module. Use at
-+ your own risk.
-+
-+ For information on utilities to make use of this driver see the
-+ I8K Linux utilities web site at:
-+ <http://people.debian.org/~dz/i8k/>
-+
-+ Say Y if you intend to run this kernel on a Dell Inspiron 8000.
-+ Say N otherwise.
-+
-+config X86_REBOOTFIXUPS
-+ bool "Enable X86 board specific fixups for reboot"
-+ depends on X86_32
-+ ---help---
-+ This enables chipset and/or board specific fixups to be done
-+ in order to get reboot to work correctly. This is only needed on
-+ some combinations of hardware and BIOS. The symptom, for which
-+ this config is intended, is when reboot ends with a stalled/hung
-+ system.
-+
-+ Currently, the only fixup is for the Geode machines using
-+ CS5530A and CS5536 chipsets and the RDC R-321x SoC.
-+
-+ Say Y if you want to enable the fixup. Currently, it's safe to
-+ enable this option even if you don't need it.
-+ Say N otherwise.
-+
-+config MICROCODE
-+ tristate "CPU microcode loading support"
-+ select FW_LOADER
-+ ---help---
-+
-+ If you say Y here, you will be able to update the microcode on
-+ certain Intel and AMD processors. The Intel support is for the
-+ IA32 family, e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4,
-+ Xeon etc. The AMD support is for families 0x10 and later. You will
-+ obviously need the actual microcode binary data itself which is not
-+ shipped with the Linux kernel.
-+
-+ This option selects the general module only, you need to select
-+ at least one vendor specific module as well.
-+
-+ To compile this driver as a module, choose M here: the module
-+ will be called microcode.
-+
-+config MICROCODE_INTEL
-+ bool "Intel microcode loading support"
-+ depends on MICROCODE
-+ default MICROCODE
-+ select FW_LOADER
-+ ---help---
-+ This options enables microcode patch loading support for Intel
-+ processors.
-+
-+ For latest news and information on obtaining all the required
-+ Intel ingredients for this driver, check:
-+ <http://www.urbanmyth.org/microcode/>.
-+
-+config MICROCODE_AMD
-+ bool "AMD microcode loading support"
-+ depends on MICROCODE
-+ select FW_LOADER
-+ ---help---
-+ If you select this option, microcode patch loading support for AMD
-+ processors will be enabled.
-+
-+config MICROCODE_OLD_INTERFACE
-+ def_bool y
-+ depends on MICROCODE
-+
-+config MICROCODE_INTEL_LIB
-+ def_bool y
-+ depends on MICROCODE_INTEL
-+
-+config MICROCODE_INTEL_EARLY
-+ bool "Early load microcode"
-+ depends on MICROCODE_INTEL && BLK_DEV_INITRD
-+ default y
-+ help
-+ This option provides functionality to read additional microcode data
-+ at the beginning of initrd image. The data tells kernel to load
-+ microcode to CPU's as early as possible. No functional change if no
-+ microcode data is glued to the initrd, therefore it's safe to say Y.
-+
-+config MICROCODE_EARLY
-+ def_bool y
-+ depends on MICROCODE_INTEL_EARLY
-+
-+config X86_MSR
-+ tristate "/dev/cpu/*/msr - Model-specific register support"
-+ ---help---
-+ This device gives privileged processes access to the x86
-+ Model-Specific Registers (MSRs). It is a character device with
-+ major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
-+ MSR accesses are directed to a specific CPU on multi-processor
-+ systems.
-+
-+config X86_CPUID
-+ tristate "/dev/cpu/*/cpuid - CPU information support"
-+ ---help---
-+ This device gives processes access to the x86 CPUID instruction to
-+ be executed on a specific processor. It is a character device
-+ with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
-+ /dev/cpu/31/cpuid.
-+
-+choice
-+ prompt "High Memory Support"
-+ default HIGHMEM64G if X86_NUMAQ
-+ default HIGHMEM4G
-+ depends on X86_32
-+
-+config NOHIGHMEM
-+ bool "off"
-+ depends on !X86_NUMAQ
-+ ---help---
-+ Linux can use up to 64 Gigabytes of physical memory on x86 systems.
-+ However, the address space of 32-bit x86 processors is only 4
-+ Gigabytes large. That means that, if you have a large amount of
-+ physical memory, not all of it can be "permanently mapped" by the
-+ kernel. The physical memory that's not permanently mapped is called
-+ "high memory".
-+
-+ If you are compiling a kernel which will never run on a machine with
-+ more than 1 Gigabyte total physical RAM, answer "off" here (default
-+ choice and suitable for most users). This will result in a "3GB/1GB"
-+ split: 3GB are mapped so that each process sees a 3GB virtual memory
-+ space and the remaining part of the 4GB virtual memory space is used
-+ by the kernel to permanently map as much physical memory as
-+ possible.
-+
-+ If the machine has between 1 and 4 Gigabytes physical RAM, then
-+ answer "4GB" here.
-+
-+ If more than 4 Gigabytes is used then answer "64GB" here. This
-+ selection turns Intel PAE (Physical Address Extension) mode on.
-+ PAE implements 3-level paging on IA32 processors. PAE is fully
-+ supported by Linux, PAE mode is implemented on all recent Intel
-+ processors (Pentium Pro and better). NOTE: If you say "64GB" here,
-+ then the kernel will not boot on CPUs that don't support PAE!
-+
-+ The actual amount of total physical memory will either be
-+ auto detected or can be forced by using a kernel command line option
-+ such as "mem=256M". (Try "man bootparam" or see the documentation of
-+ your boot loader (lilo or loadlin) about how to pass options to the
-+ kernel at boot time.)
-+
-+ If unsure, say "off".
-+
-+config HIGHMEM4G
-+ bool "4GB"
-+ depends on !X86_NUMAQ
-+ ---help---
-+ Select this if you have a 32-bit processor and between 1 and 4
-+ gigabytes of physical RAM.
-+
-+config HIGHMEM64G
-+ bool "64GB"
-+ depends on !M486
-+ select X86_PAE
-+ ---help---
-+ Select this if you have a 32-bit processor and more than 4
-+ gigabytes of physical RAM.
-+
-+endchoice
-+
-+choice
-+ prompt "Memory split" if EXPERT
-+ default VMSPLIT_3G
-+ depends on X86_32
-+ ---help---
-+ Select the desired split between kernel and user memory.
-+
-+ If the address range available to the kernel is less than the
-+ physical memory installed, the remaining memory will be available
-+ as "high memory". Accessing high memory is a little more costly
-+ than low memory, as it needs to be mapped into the kernel first.
-+ Note that increasing the kernel address space limits the range
-+ available to user programs, making the address space there
-+ tighter. Selecting anything other than the default 3G/1G split
-+ will also likely make your kernel incompatible with binary-only
-+ kernel modules.
-+
-+ If you are not absolutely sure what you are doing, leave this
-+ option alone!
-+
-+ config VMSPLIT_3G
-+ bool "3G/1G user/kernel split"
-+ config VMSPLIT_3G_OPT
-+ depends on !X86_PAE
-+ bool "3G/1G user/kernel split (for full 1G low memory)"
-+ config VMSPLIT_2G
-+ bool "2G/2G user/kernel split"
-+ config VMSPLIT_2G_OPT
-+ depends on !X86_PAE
-+ bool "2G/2G user/kernel split (for full 2G low memory)"
-+ config VMSPLIT_1G
-+ bool "1G/3G user/kernel split"
-+endchoice
-+
-+config PAGE_OFFSET
-+ hex
-+ default 0xB0000000 if VMSPLIT_3G_OPT
-+ default 0x80000000 if VMSPLIT_2G
-+ default 0x78000000 if VMSPLIT_2G_OPT
-+ default 0x40000000 if VMSPLIT_1G
-+ default 0xC0000000
-+ depends on X86_32
-+
-+config HIGHMEM
-+ def_bool y
-+ depends on X86_32 && (HIGHMEM64G || HIGHMEM4G)
-+
-+config X86_PAE
-+ bool "PAE (Physical Address Extension) Support"
-+ depends on X86_32 && !HIGHMEM4G
-+ ---help---
-+ PAE is required for NX support, and furthermore enables
-+ larger swapspace support for non-overcommit purposes. It
-+ has the cost of more pagetable lookup overhead, and also
-+ consumes more pagetable space per process.
-+
-+config ARCH_PHYS_ADDR_T_64BIT
-+ def_bool y
-+ depends on X86_64 || X86_PAE
-+
-+config ARCH_DMA_ADDR_T_64BIT
-+ def_bool y
-+ depends on X86_64 || HIGHMEM64G
-+
-+config DIRECT_GBPAGES
-+ bool "Enable 1GB pages for kernel pagetables" if EXPERT
-+ default y
-+ depends on X86_64
-+ ---help---
-+ Allow the kernel linear mapping to use 1GB pages on CPUs that
-+ support it. This can improve the kernel's performance a tiny bit by
-+ reducing TLB pressure. If in doubt, say "Y".
-+
-+# Common NUMA Features
-+config NUMA
-+ bool "Numa Memory Allocation and Scheduler Support"
-+ depends on SMP
-+ depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI))
-+ default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
-+ ---help---
-+ Enable NUMA (Non Uniform Memory Access) support.
-+
-+ The kernel will try to allocate memory used by a CPU on the
-+ local memory controller of the CPU and add some more
-+ NUMA awareness to the kernel.
-+
-+ For 64-bit this is recommended if the system is Intel Core i7
-+ (or later), AMD Opteron, or EM64T NUMA.
-+
-+ For 32-bit this is only needed on (rare) 32-bit-only platforms
-+ that support NUMA topologies, such as NUMAQ / Summit, or if you
-+ boot a 32-bit kernel on a 64-bit NUMA platform.
-+
-+ Otherwise, you should say N.
-+
-+comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
-+ depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
-+
-+config AMD_NUMA
-+ def_bool y
-+ prompt "Old style AMD Opteron NUMA detection"
-+ depends on X86_64 && NUMA && PCI
-+ ---help---
-+ Enable AMD NUMA node topology detection. You should say Y here if
-+ you have a multi processor AMD system. This uses an old method to
-+ read the NUMA configuration directly from the builtin Northbridge
-+ of Opteron. It is recommended to use X86_64_ACPI_NUMA instead,
-+ which also takes priority if both are compiled in.
-+
-+config X86_64_ACPI_NUMA
-+ def_bool y
-+ prompt "ACPI NUMA detection"
-+ depends on X86_64 && NUMA && ACPI && PCI
-+ select ACPI_NUMA
-+ ---help---
-+ Enable ACPI SRAT based node topology detection.
-+
-+# Some NUMA nodes have memory ranges that span
-+# other nodes. Even though a pfn is valid and
-+# between a node's start and end pfns, it may not
-+# reside on that node. See memmap_init_zone()
-+# for details.
-+config NODES_SPAN_OTHER_NODES
-+ def_bool y
-+ depends on X86_64_ACPI_NUMA
-+
-+config NUMA_EMU
-+ bool "NUMA emulation"
-+ depends on NUMA
-+ ---help---
-+ Enable NUMA emulation. A flat machine will be split
-+ into virtual nodes when booted with "numa=fake=N", where N is the
-+ number of nodes. This is only useful for debugging.
-+
-+config NODES_SHIFT
-+ int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
-+ range 1 10
-+ default "10" if MAXSMP
-+ default "6" if X86_64
-+ default "4" if X86_NUMAQ
-+ default "3"
-+ depends on NEED_MULTIPLE_NODES
-+ ---help---
-+ Specify the maximum number of NUMA Nodes available on the target
-+ system. Increases memory reserved to accommodate various tables.
-+
-+config ARCH_HAVE_MEMORY_PRESENT
-+ def_bool y
-+ depends on X86_32 && DISCONTIGMEM
-+
-+config NEED_NODE_MEMMAP_SIZE
-+ def_bool y
-+ depends on X86_32 && (DISCONTIGMEM || SPARSEMEM)
-+
-+config ARCH_FLATMEM_ENABLE
-+ def_bool y
-+ depends on X86_32 && !NUMA
-+
-+config ARCH_DISCONTIGMEM_ENABLE
-+ def_bool y
-+ depends on NUMA && X86_32
-+
-+config ARCH_DISCONTIGMEM_DEFAULT
-+ def_bool y
-+ depends on NUMA && X86_32
-+
-+config ARCH_SPARSEMEM_ENABLE
-+ def_bool y
-+ depends on X86_64 || NUMA || X86_32 || X86_32_NON_STANDARD
-+ select SPARSEMEM_STATIC if X86_32
-+ select SPARSEMEM_VMEMMAP_ENABLE if X86_64
-+
-+config ARCH_SPARSEMEM_DEFAULT
-+ def_bool y
-+ depends on X86_64
-+
-+config ARCH_SELECT_MEMORY_MODEL
-+ def_bool y
-+ depends on ARCH_SPARSEMEM_ENABLE
-+
-+config ARCH_MEMORY_PROBE
-+ def_bool y
-+ depends on X86_64 && MEMORY_HOTPLUG
-+
-+config ARCH_PROC_KCORE_TEXT
-+ def_bool y
-+ depends on X86_64 && PROC_KCORE
-+
-+config ILLEGAL_POINTER_VALUE
-+ hex
-+ default 0 if X86_32
-+ default 0xdead000000000000 if X86_64
-+
-+source "mm/Kconfig"
-+
-+config HIGHPTE
-+ bool "Allocate 3rd-level pagetables from highmem"
-+ depends on HIGHMEM
-+ ---help---
-+ The VM uses one page table entry for each page of physical memory.
-+ For systems with a lot of RAM, this can be wasteful of precious
-+ low memory. Setting this option will put user-space page table
-+ entries in high memory.
-+
-+config X86_CHECK_BIOS_CORRUPTION
-+ bool "Check for low memory corruption"
-+ ---help---
-+ Periodically check for memory corruption in low memory, which
-+ is suspected to be caused by BIOS. Even when enabled in the
-+ configuration, it is disabled at runtime. Enable it by
-+ setting "memory_corruption_check=1" on the kernel command
-+ line. By default it scans the low 64k of memory every 60
-+ seconds; see the memory_corruption_check_size and
-+ memory_corruption_check_period parameters in
-+ Documentation/kernel-parameters.txt to adjust this.
-+
-+ When enabled with the default parameters, this option has
-+ almost no overhead, as it reserves a relatively small amount
-+ of memory and scans it infrequently. It both detects corruption
-+ and prevents it from affecting the running system.
-+
-+ It is, however, intended as a diagnostic tool; if repeatable
-+ BIOS-originated corruption always affects the same memory,
-+ you can use memmap= to prevent the kernel from using that
-+ memory.
-+
-+config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
-+ bool "Set the default setting of memory_corruption_check"
-+ depends on X86_CHECK_BIOS_CORRUPTION
-+ default y
-+ ---help---
-+ Set whether the default state of memory_corruption_check is
-+ on or off.
-+
-+config X86_RESERVE_LOW
-+ int "Amount of low memory, in kilobytes, to reserve for the BIOS"
-+ default 64
-+ range 4 640
-+ ---help---
-+ Specify the amount of low memory to reserve for the BIOS.
-+
-+ The first page contains BIOS data structures that the kernel
-+ must not use, so that page must always be reserved.
-+
-+ By default we reserve the first 64K of physical RAM, as a
-+ number of BIOSes are known to corrupt that memory range
-+ during events such as suspend/resume or monitor cable
-+ insertion, so it must not be used by the kernel.
-+
-+ You can set this to 4 if you are absolutely sure that you
-+ trust the BIOS to get all its memory reservations and usages
-+ right. If you know your BIOS have problems beyond the
-+ default 64K area, you can set this to 640 to avoid using the
-+ entire low memory range.
-+
-+ If you have doubts about the BIOS (e.g. suspend/resume does
-+ not work or there's kernel crashes after certain hardware
-+ hotplug events) then you might want to enable
-+ X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check
-+ typical corruption patterns.
-+
-+ Leave this to the default value of 64 if you are unsure.
-+
-+config MATH_EMULATION
-+ bool
-+ prompt "Math emulation" if X86_32
-+ ---help---
-+ Linux can emulate a math coprocessor (used for floating point
-+ operations) if you don't have one. 486DX and Pentium processors have
-+ a math coprocessor built in, 486SX and 386 do not, unless you added
-+ a 487DX or 387, respectively. (The messages during boot time can
-+ give you some hints here ["man dmesg"].) Everyone needs either a
-+ coprocessor or this emulation.
-+
-+ If you don't have a math coprocessor, you need to say Y here; if you
-+ say Y here even though you have a coprocessor, the coprocessor will
-+ be used nevertheless. (This behavior can be changed with the kernel
-+ command line option "no387", which comes handy if your coprocessor
-+ is broken. Try "man bootparam" or see the documentation of your boot
-+ loader (lilo or loadlin) about how to pass options to the kernel at
-+ boot time.) This means that it is a good idea to say Y here if you
-+ intend to use this kernel on different machines.
-+
-+ More information about the internals of the Linux math coprocessor
-+ emulation can be found in <file:arch/x86/math-emu/README>.
-+
-+ If you are not sure, say Y; apart from resulting in a 66 KB bigger
-+ kernel, it won't hurt.
-+
-+config MTRR
-+ def_bool y
-+ prompt "MTRR (Memory Type Range Register) support" if EXPERT
-+ ---help---
-+ On Intel P6 family processors (Pentium Pro, Pentium II and later)
-+ the Memory Type Range Registers (MTRRs) may be used to control
-+ processor access to memory ranges. This is most useful if you have
-+ a video (VGA) card on a PCI or AGP bus. Enabling write-combining
-+ allows bus write transfers to be combined into a larger transfer
-+ before bursting over the PCI/AGP bus. This can increase performance
-+ of image write operations 2.5 times or more. Saying Y here creates a
-+ /proc/mtrr file which may be used to manipulate your processor's
-+ MTRRs. Typically the X server should use this.
-+
-+ This code has a reasonably generic interface so that similar
-+ control registers on other processors can be easily supported
-+ as well:
-+
-+ The Cyrix 6x86, 6x86MX and M II processors have Address Range
-+ Registers (ARRs) which provide a similar functionality to MTRRs. For
-+ these, the ARRs are used to emulate the MTRRs.
-+ The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
-+ MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
-+ write-combining. All of these processors are supported by this code
-+ and it makes sense to say Y here if you have one of them.
-+
-+ Saying Y here also fixes a problem with buggy SMP BIOSes which only
-+ set the MTRRs for the boot CPU and not for the secondary CPUs. This
-+ can lead to all sorts of problems, so it's good to say Y here.
-+
-+ You can safely say Y even if your machine doesn't have MTRRs, you'll
-+ just add about 9 KB to your kernel.
-+
-+ See <file:Documentation/x86/mtrr.txt> for more information.
-+
-+config MTRR_SANITIZER
-+ def_bool y
-+ prompt "MTRR cleanup support"
-+ depends on MTRR
-+ ---help---
-+ Convert MTRR layout from continuous to discrete, so X drivers can
-+ add writeback entries.
-+
-+ Can be disabled with disable_mtrr_cleanup on the kernel command line.
-+ The largest mtrr entry size for a continuous block can be set with
-+ mtrr_chunk_size.
-+
-+ If unsure, say Y.
-+
-+config MTRR_SANITIZER_ENABLE_DEFAULT
-+ int "MTRR cleanup enable value (0-1)"
-+ range 0 1
-+ default "0"
-+ depends on MTRR_SANITIZER
-+ ---help---
-+ Enable mtrr cleanup default value
-+
-+config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
-+ int "MTRR cleanup spare reg num (0-7)"
-+ range 0 7
-+ default "1"
-+ depends on MTRR_SANITIZER
-+ ---help---
-+ mtrr cleanup spare entries default, it can be changed via
-+ mtrr_spare_reg_nr=N on the kernel command line.
-+
-+config X86_PAT
-+ def_bool y
-+ prompt "x86 PAT support" if EXPERT
-+ depends on MTRR
-+ ---help---
-+ Use PAT attributes to setup page level cache control.
-+
-+ PATs are the modern equivalents of MTRRs and are much more
-+ flexible than MTRRs.
-+
-+ Say N here if you see bootup problems (boot crash, boot hang,
-+ spontaneous reboots) or a non-working video driver.
-+
-+ If unsure, say Y.
-+
-+config ARCH_USES_PG_UNCACHED
-+ def_bool y
-+ depends on X86_PAT
-+
-+config ARCH_RANDOM
-+ def_bool y
-+ prompt "x86 architectural random number generator" if EXPERT
-+ ---help---
-+ Enable the x86 architectural RDRAND instruction
-+ (Intel Bull Mountain technology) to generate random numbers.
-+ If supported, this is a high bandwidth, cryptographically
-+ secure hardware random number generator.
-+
-+config X86_SMAP
-+ def_bool y
-+ prompt "Supervisor Mode Access Prevention" if EXPERT
-+ ---help---
-+ Supervisor Mode Access Prevention (SMAP) is a security
-+ feature in newer Intel processors. There is a small
-+ performance cost if this enabled and turned on; there is
-+ also a small increase in the kernel size if this is enabled.
-+
-+ If unsure, say Y.
-+
-+config EFI
-+ bool "EFI runtime service support"
-+ depends on ACPI
-+ select UCS2_STRING
-+ ---help---
-+ This enables the kernel to use EFI runtime services that are
-+ available (such as the EFI variable services).
-+
-+ This option is only useful on systems that have EFI firmware.
-+ In addition, you should use the latest ELILO loader available
-+ at <http://elilo.sourceforge.net> in order to take advantage
-+ of EFI runtime services. However, even with this option, the
-+ resultant kernel should continue to boot on existing non-EFI
-+ platforms.
-+
-+config EFI_STUB
-+ bool "EFI stub support"
-+ depends on EFI
-+ ---help---
-+ This kernel feature allows a bzImage to be loaded directly
-+ by EFI firmware without the use of a bootloader.
-+
-+ See Documentation/x86/efi-stub.txt for more information.
-+
-+config SECCOMP
-+ def_bool y
-+ prompt "Enable seccomp to safely compute untrusted bytecode"
-+ ---help---
-+ This kernel feature is useful for number crunching applications
-+ that may need to compute untrusted bytecode during their
-+ execution. By using pipes or other transports made available to
-+ the process as file descriptors supporting the read/write
-+ syscalls, it's possible to isolate those applications in
-+ their own address space using seccomp. Once seccomp is
-+ enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
-+ and the task is only allowed to execute a few safe syscalls
-+ defined by each seccomp mode.
-+
-+ If unsure, say Y. Only embedded should say N here.
-+
-+config CC_STACKPROTECTOR
-+ bool "Enable -fstack-protector buffer overflow detection"
-+ ---help---
-+ This option turns on the -fstack-protector GCC feature. This
-+ feature puts, at the beginning of functions, a canary value on
-+ the stack just before the return address, and validates
-+ the value just before actually returning. Stack based buffer
-+ overflows (that need to overwrite this return address) now also
-+ overwrite the canary, which gets detected and the attack is then
-+ neutralized via a kernel panic.
-+
-+ This feature requires gcc version 4.2 or above, or a distribution
-+ gcc with the feature backported. Older versions are automatically
-+ detected and for those versions, this configuration option is
-+ ignored. (and a warning is printed during bootup)
-+
-+source kernel/Kconfig.hz
-+
-+config KEXEC
-+ bool "kexec system call"
-+ ---help---
-+ kexec is a system call that implements the ability to shutdown your
-+ current kernel, and to start another kernel. It is like a reboot
-+ but it is independent of the system firmware. And like a reboot
-+ you can start any kernel with it, not just Linux.
-+
-+ The name comes from the similarity to the exec system call.
-+
-+ It is an ongoing process to be certain the hardware in a machine
-+ is properly shutdown, so do not be surprised if this code does not
-+ initially work for you. It may help to enable device hotplugging
-+ support. As of this writing the exact hardware interface is
-+ strongly in flux, so no good recommendation can be made.
-+
-+config CRASH_DUMP
-+ bool "kernel crash dumps"
-+ depends on X86_64 || (X86_32 && HIGHMEM)
-+ ---help---
-+ Generate crash dump after being started by kexec.
-+ This should be normally only set in special crash dump kernels
-+ which are loaded in the main kernel with kexec-tools into
-+ a specially reserved region and then later executed after
-+ a crash by kdump/kexec. The crash dump kernel must be compiled
-+ to a memory address not used by the main kernel or BIOS using
-+ PHYSICAL_START, or it must be built as a relocatable image
-+ (CONFIG_RELOCATABLE=y).
-+ For more details see Documentation/kdump/kdump.txt
-+
-+config KEXEC_JUMP
-+ bool "kexec jump"
-+ depends on KEXEC && HIBERNATION
-+ ---help---
-+ Jump between original kernel and kexeced kernel and invoke
-+ code in physical address mode via KEXEC
-+
-+config PHYSICAL_START
-+ hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
-+ default "0x1000000"
-+ ---help---
-+ This gives the physical address where the kernel is loaded.
-+
-+ If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
-+ bzImage will decompress itself to above physical address and
-+ run from there. Otherwise, bzImage will run from the address where
-+ it has been loaded by the boot loader and will ignore above physical
-+ address.
-+
-+ In normal kdump cases one does not have to set/change this option
-+ as now bzImage can be compiled as a completely relocatable image
-+ (CONFIG_RELOCATABLE=y) and be used to load and run from a different
-+ address. This option is mainly useful for the folks who don't want
-+ to use a bzImage for capturing the crash dump and want to use a
-+ vmlinux instead. vmlinux is not relocatable hence a kernel needs
-+ to be specifically compiled to run from a specific memory area
-+ (normally a reserved region) and this option comes handy.
-+
-+ So if you are using bzImage for capturing the crash dump,
-+ leave the value here unchanged to 0x1000000 and set
-+ CONFIG_RELOCATABLE=y. Otherwise if you plan to use vmlinux
-+ for capturing the crash dump change this value to start of
-+ the reserved region. In other words, it can be set based on
-+ the "X" value as specified in the "crashkernel=YM@XM"
-+ command line boot parameter passed to the panic-ed
-+ kernel. Please take a look at Documentation/kdump/kdump.txt
-+ for more details about crash dumps.
-+
-+ Usage of bzImage for capturing the crash dump is recommended as
-+ one does not have to build two kernels. Same kernel can be used
-+ as production kernel and capture kernel. Above option should have
-+ gone away after relocatable bzImage support is introduced. But it
-+ is present because there are users out there who continue to use
-+ vmlinux for dump capture. This option should go away down the
-+ line.
-+
-+ Don't change this unless you know what you are doing.
-+
-+config RELOCATABLE
-+ bool "Build a relocatable kernel"
-+ default y
-+ ---help---
-+ This builds a kernel image that retains relocation information
-+ so it can be loaded someplace besides the default 1MB.
-+ The relocations tend to make the kernel binary about 10% larger,
-+ but are discarded at runtime.
-+
-+ One use is for the kexec on panic case where the recovery kernel
-+ must live at a different physical address than the primary
-+ kernel.
-+
-+ Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
-+ it has been loaded at and the compile time physical address
-+ (CONFIG_PHYSICAL_START) is ignored.
-+
-+# Relocation on x86-32 needs some additional build support
-+config X86_NEED_RELOCS
-+ def_bool y
-+ depends on X86_32 && RELOCATABLE
-+
-+config PHYSICAL_ALIGN
-+ hex "Alignment value to which kernel should be aligned" if X86_32
-+ default "0x1000000"
-+ range 0x2000 0x1000000
-+ ---help---
-+ This value puts the alignment restrictions on physical address
-+ where kernel is loaded and run from. Kernel is compiled for an
-+ address which meets above alignment restriction.
-+
-+ If bootloader loads the kernel at a non-aligned address and
-+ CONFIG_RELOCATABLE is set, kernel will move itself to nearest
-+ address aligned to above value and run from there.
-+
-+ If bootloader loads the kernel at a non-aligned address and
-+ CONFIG_RELOCATABLE is not set, kernel will ignore the run time
-+ load address and decompress itself to the address it has been
-+ compiled for and run from there. The address for which kernel is
-+ compiled already meets above alignment restrictions. Hence the
-+ end result is that kernel runs from a physical address meeting
-+ above alignment restrictions.
-+
-+ Don't change this unless you know what you are doing.
-+
-+config HOTPLUG_CPU
-+ bool "Support for hot-pluggable CPUs"
-+ depends on SMP && HOTPLUG
-+ ---help---
-+ Say Y here to allow turning CPUs off and on. CPUs can be
-+ controlled through /sys/devices/system/cpu.
-+ ( Note: power management support will enable this option
-+ automatically on SMP systems. )
-+ Say N if you want to disable CPU hotplug.
-+
-+config BOOTPARAM_HOTPLUG_CPU0
-+ bool "Set default setting of cpu0_hotpluggable"
-+ default n
-+ depends on HOTPLUG_CPU
-+ ---help---
-+ Set whether default state of cpu0_hotpluggable is on or off.
-+
-+ Say Y here to enable CPU0 hotplug by default. If this switch
-+ is turned on, there is no need to give cpu0_hotplug kernel
-+ parameter and the CPU0 hotplug feature is enabled by default.
-+
-+ Please note: there are two known CPU0 dependencies if you want
-+ to enable the CPU0 hotplug feature either by this switch or by
-+ cpu0_hotplug kernel parameter.
-+
-+ First, resume from hibernate or suspend always starts from CPU0.
-+ So hibernate and suspend are prevented if CPU0 is offline.
-+
-+ Second dependency is PIC interrupts always go to CPU0. CPU0 can not
-+ offline if any interrupt can not migrate out of CPU0. There may
-+ be other CPU0 dependencies.
-+
-+ Please make sure the dependencies are under your control before
-+ you enable this feature.
-+
-+ Say N if you don't want to enable CPU0 hotplug feature by default.
-+ You still can enable the CPU0 hotplug feature at boot by kernel
-+ parameter cpu0_hotplug.
-+
-+config DEBUG_HOTPLUG_CPU0
-+ def_bool n
-+ prompt "Debug CPU0 hotplug"
-+ depends on HOTPLUG_CPU
-+ ---help---
-+ Enabling this option offlines CPU0 (if CPU0 can be offlined) as
-+ soon as possible and boots up userspace with CPU0 offlined. User
-+ can online CPU0 back after boot time.
-+
-+ To debug CPU0 hotplug, you need to enable CPU0 offline/online
-+ feature by either turning on CONFIG_BOOTPARAM_HOTPLUG_CPU0 during
-+ compilation or giving cpu0_hotplug kernel parameter at boot.
-+
-+ If unsure, say N.
-+
-+config COMPAT_VDSO
-+ def_bool y
-+ prompt "Compat VDSO support"
-+ depends on X86_32 || IA32_EMULATION
-+ ---help---
-+ Map the 32-bit VDSO to the predictable old-style address too.
-+
-+ Say N here if you are running a sufficiently recent glibc
-+ version (2.3.3 or later), to remove the high-mapped
-+ VDSO mapping and to exclusively use the randomized VDSO.
-+
-+ If unsure, say Y.
-+
-+config CMDLINE_BOOL
-+ bool "Built-in kernel command line"
-+ ---help---
-+ Allow for specifying boot arguments to the kernel at
-+ build time. On some systems (e.g. embedded ones), it is
-+ necessary or convenient to provide some or all of the
-+ kernel boot arguments with the kernel itself (that is,
-+ to not rely on the boot loader to provide them.)
-+
-+ To compile command line arguments into the kernel,
-+ set this option to 'Y', then fill in the
-+ the boot arguments in CONFIG_CMDLINE.
-+
-+ Systems with fully functional boot loaders (i.e. non-embedded)
-+ should leave this option set to 'N'.
-+
-+config CMDLINE
-+ string "Built-in kernel command string"
-+ depends on CMDLINE_BOOL
-+ default ""
-+ ---help---
-+ Enter arguments here that should be compiled into the kernel
-+ image and used at boot time. If the boot loader provides a
-+ command line at boot time, it is appended to this string to
-+ form the full kernel command line, when the system boots.
-+
-+ However, you can use the CONFIG_CMDLINE_OVERRIDE option to
-+ change this behavior.
-+
-+ In most cases, the command line (whether built-in or provided
-+ by the boot loader) should specify the device for the root
-+ file system.
-+
-+config CMDLINE_OVERRIDE
-+ bool "Built-in command line overrides boot loader arguments"
-+ depends on CMDLINE_BOOL
-+ ---help---
-+ Set this option to 'Y' to have the kernel ignore the boot loader
-+ command line, and use ONLY the built-in command line.
-+
-+ This is used to work around broken boot loaders. This should
-+ be set to 'N' under normal conditions.
-+
-+endmenu
-+
-+config ARCH_ENABLE_MEMORY_HOTPLUG
-+ def_bool y
-+ depends on X86_64 || (X86_32 && HIGHMEM)
-+
-+config ARCH_ENABLE_MEMORY_HOTREMOVE
-+ def_bool y
-+ depends on MEMORY_HOTPLUG
-+
-+config USE_PERCPU_NUMA_NODE_ID
-+ def_bool y
-+ depends on NUMA
-+
-+menu "Power management and ACPI options"
-+
-+config ARCH_HIBERNATION_HEADER
-+ def_bool y
-+ depends on X86_64 && HIBERNATION
-+
-+source "kernel/power/Kconfig"
-+
-+source "drivers/acpi/Kconfig"
-+
-+source "drivers/sfi/Kconfig"
-+
-+config X86_APM_BOOT
-+ def_bool y
-+ depends on APM
-+
-+menuconfig APM
-+ tristate "APM (Advanced Power Management) BIOS support"
-+ depends on X86_32 && PM_SLEEP
-+ ---help---
-+ APM is a BIOS specification for saving power using several different
-+ techniques. This is mostly useful for battery powered laptops with
-+ APM compliant BIOSes. If you say Y here, the system time will be
-+ reset after a RESUME operation, the /proc/apm device will provide
-+ battery status information, and user-space programs will receive
-+ notification of APM "events" (e.g. battery status change).
-+
-+ If you select "Y" here, you can disable actual use of the APM
-+ BIOS by passing the "apm=off" option to the kernel at boot time.
-+
-+ Note that the APM support is almost completely disabled for
-+ machines with more than one CPU.
-+
-+ In order to use APM, you will need supporting software. For location
-+ and more information, read <file:Documentation/power/apm-acpi.txt>
-+ and the Battery Powered Linux mini-HOWTO, available from
-+ <http://www.tldp.org/docs.html#howto>.
-+
-+ This driver does not spin down disk drives (see the hdparm(8)
-+ manpage ("man 8 hdparm") for that), and it doesn't turn off
-+ VESA-compliant "green" monitors.
-+
-+ This driver does not support the TI 4000M TravelMate and the ACER
-+ 486/DX4/75 because they don't have compliant BIOSes. Many "green"
-+ desktop machines also don't have compliant BIOSes, and this driver
-+ may cause those machines to panic during the boot phase.
-+
-+ Generally, if you don't have a battery in your machine, there isn't
-+ much point in using this driver and you should say N. If you get
-+ random kernel OOPSes or reboots that don't seem to be related to
-+ anything, try disabling/enabling this option (or disabling/enabling
-+ APM in your BIOS).
-+
-+ Some other things you should try when experiencing seemingly random,
-+ "weird" problems:
-+
-+ 1) make sure that you have enough swap space and that it is
-+ enabled.
-+ 2) pass the "no-hlt" option to the kernel
-+ 3) switch on floating point emulation in the kernel and pass
-+ the "no387" option to the kernel
-+ 4) pass the "floppy=nodma" option to the kernel
-+ 5) pass the "mem=4M" option to the kernel (thereby disabling
-+ all but the first 4 MB of RAM)
-+ 6) make sure that the CPU is not over clocked.
-+ 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
-+ 8) disable the cache from your BIOS settings
-+ 9) install a fan for the video card or exchange video RAM
-+ 10) install a better fan for the CPU
-+ 11) exchange RAM chips
-+ 12) exchange the motherboard.
-+
-+ To compile this driver as a module, choose M here: the
-+ module will be called apm.
-+
-+if APM
-+
-+config APM_IGNORE_USER_SUSPEND
-+ bool "Ignore USER SUSPEND"
-+ ---help---
-+ This option will ignore USER SUSPEND requests. On machines with a
-+ compliant APM BIOS, you want to say N. However, on the NEC Versa M
-+ series notebooks, it is necessary to say Y because of a BIOS bug.
-+
-+config APM_DO_ENABLE
-+ bool "Enable PM at boot time"
-+ ---help---
-+ Enable APM features at boot time. From page 36 of the APM BIOS
-+ specification: "When disabled, the APM BIOS does not automatically
-+ power manage devices, enter the Standby State, enter the Suspend
-+ State, or take power saving steps in response to CPU Idle calls."
-+ This driver will make CPU Idle calls when Linux is idle (unless this
-+ feature is turned off -- see "Do CPU IDLE calls", below). This
-+ should always save battery power, but more complicated APM features
-+ will be dependent on your BIOS implementation. You may need to turn
-+ this option off if your computer hangs at boot time when using APM
-+ support, or if it beeps continuously instead of suspending. Turn
-+ this off if you have a NEC UltraLite Versa 33/C or a Toshiba
-+ T400CDT. This is off by default since most machines do fine without
-+ this feature.
-+
-+config APM_CPU_IDLE
-+ depends on CPU_IDLE
-+ bool "Make CPU Idle calls when idle"
-+ ---help---
-+ Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
-+ On some machines, this can activate improved power savings, such as
-+ a slowed CPU clock rate, when the machine is idle. These idle calls
-+ are made after the idle loop has run for some length of time (e.g.,
-+ 333 mS). On some machines, this will cause a hang at boot time or
-+ whenever the CPU becomes idle. (On machines with more than one CPU,
-+ this option does nothing.)
-+
-+config APM_DISPLAY_BLANK
-+ bool "Enable console blanking using APM"
-+ ---help---
-+ Enable console blanking using the APM. Some laptops can use this to
-+ turn off the LCD backlight when the screen blanker of the Linux
-+ virtual console blanks the screen. Note that this is only used by
-+ the virtual console screen blanker, and won't turn off the backlight
-+ when using the X Window system. This also doesn't have anything to
-+ do with your VESA-compliant power-saving monitor. Further, this
-+ option doesn't work for all laptops -- it might not turn off your
-+ backlight at all, or it might print a lot of errors to the console,
-+ especially if you are using gpm.
-+
-+config APM_ALLOW_INTS
-+ bool "Allow interrupts during APM BIOS calls"
-+ ---help---
-+ Normally we disable external interrupts while we are making calls to
-+ the APM BIOS as a measure to lessen the effects of a badly behaving
-+ BIOS implementation. The BIOS should reenable interrupts if it
-+ needs to. Unfortunately, some BIOSes do not -- especially those in
-+ many of the newer IBM Thinkpads. If you experience hangs when you
-+ suspend, try setting this to Y. Otherwise, say N.
-+
-+endif # APM
-+
-+source "drivers/cpufreq/Kconfig"
-+
-+source "drivers/cpuidle/Kconfig"
-+
-+source "drivers/idle/Kconfig"
-+
-+endmenu
-+
-+
-+menu "Bus options (PCI etc.)"
-+
-+config PCI
-+ bool "PCI support"
-+ default y
-+ select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
-+ ---help---
-+ Find out whether you have a PCI motherboard. PCI is the name of a
-+ bus system, i.e. the way the CPU talks to the other stuff inside
-+ your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
-+ VESA. If you have PCI, say Y, otherwise N.
-+
-+choice
-+ prompt "PCI access mode"
-+ depends on X86_32 && PCI
-+ default PCI_GOANY
-+ ---help---
-+ On PCI systems, the BIOS can be used to detect the PCI devices and
-+ determine their configuration. However, some old PCI motherboards
-+ have BIOS bugs and may crash if this is done. Also, some embedded
-+ PCI-based systems don't have any BIOS at all. Linux can also try to
-+ detect the PCI hardware directly without using the BIOS.
-+
-+ With this option, you can specify how Linux should detect the
-+ PCI devices. If you choose "BIOS", the BIOS will be used,
-+ if you choose "Direct", the BIOS won't be used, and if you
-+ choose "MMConfig", then PCI Express MMCONFIG will be used.
-+ If you choose "Any", the kernel will try MMCONFIG, then the
-+ direct access method and falls back to the BIOS if that doesn't
-+ work. If unsure, go with the default, which is "Any".
-+
-+config PCI_GOBIOS
-+ bool "BIOS"
-+
-+config PCI_GOMMCONFIG
-+ bool "MMConfig"
-+
-+config PCI_GODIRECT
-+ bool "Direct"
-+
-+config PCI_GOOLPC
-+ bool "OLPC XO-1"
-+ depends on OLPC
-+
-+config PCI_GOANY
-+ bool "Any"
-+
-+endchoice
-+
-+config PCI_BIOS
-+ def_bool y
-+ depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY)
-+
-+# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
-+config PCI_DIRECT
-+ def_bool y
-+ depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
-+
-+config PCI_MMCONFIG
-+ def_bool y
-+ depends on X86_32 && PCI && (ACPI || SFI) && (PCI_GOMMCONFIG || PCI_GOANY)
-+
-+config PCI_OLPC
-+ def_bool y
-+ depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY)
-+
-+config PCI_XEN
-+ def_bool y
-+ depends on PCI && XEN
-+ select SWIOTLB_XEN
-+
-+config PCI_DOMAINS
-+ def_bool y
-+ depends on PCI
-+
-+config PCI_MMCONFIG
-+ bool "Support mmconfig PCI config space access"
-+ depends on X86_64 && PCI && ACPI
-+
-+config PCI_CNB20LE_QUIRK
-+ bool "Read CNB20LE Host Bridge Windows" if EXPERT
-+ depends on PCI
-+ help
-+ Read the PCI windows out of the CNB20LE host bridge. This allows
-+ PCI hotplug to work on systems with the CNB20LE chipset which do
-+ not have ACPI.
-+
-+ There's no public spec for this chipset, and this functionality
-+ is known to be incomplete.
-+
-+ You should say N unless you know you need this.
-+
-+source "drivers/pci/pcie/Kconfig"
-+
-+source "drivers/pci/Kconfig"
-+
-+# x86_64 have no ISA slots, but can have ISA-style DMA.
-+config ISA_DMA_API
-+ bool "ISA-style DMA support" if (X86_64 && EXPERT)
-+ default y
-+ help
-+ Enables ISA-style DMA support for devices requiring such controllers.
-+ If unsure, say Y.
-+
-+if X86_32
-+
-+config ISA
-+ bool "ISA support"
-+ ---help---
-+ Find out whether you have ISA slots on your motherboard. ISA is the
-+ name of a bus system, i.e. the way the CPU talks to the other stuff
-+ inside your box. Other bus systems are PCI, EISA, MicroChannel
-+ (MCA) or VESA. ISA is an older system, now being displaced by PCI;
-+ newer boards don't support it. If you have ISA, say Y, otherwise N.
-+
-+config EISA
-+ bool "EISA support"
-+ depends on ISA
-+ ---help---
-+ The Extended Industry Standard Architecture (EISA) bus was
-+ developed as an open alternative to the IBM MicroChannel bus.
-+
-+ The EISA bus provided some of the features of the IBM MicroChannel
-+ bus while maintaining backward compatibility with cards made for
-+ the older ISA bus. The EISA bus saw limited use between 1988 and
-+ 1995 when it was made obsolete by the PCI bus.
-+
-+ Say Y here if you are building a kernel for an EISA-based machine.
-+
-+ Otherwise, say N.
-+
-+source "drivers/eisa/Kconfig"
-+
-+config SCx200
-+ tristate "NatSemi SCx200 support"
-+ ---help---
-+ This provides basic support for National Semiconductor's
-+ (now AMD's) Geode processors. The driver probes for the
-+ PCI-IDs of several on-chip devices, so its a good dependency
-+ for other scx200_* drivers.
-+
-+ If compiled as a module, the driver is named scx200.
-+
-+config SCx200HR_TIMER
-+ tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
-+ depends on SCx200
-+ default y
-+ ---help---
-+ This driver provides a clocksource built upon the on-chip
-+ 27MHz high-resolution timer. Its also a workaround for
-+ NSC Geode SC-1100's buggy TSC, which loses time when the
-+ processor goes idle (as is done by the scheduler). The
-+ other workaround is idle=poll boot option.
-+
-+config OLPC
-+ bool "One Laptop Per Child support"
-+ depends on !X86_PAE
-+ select GPIOLIB
-+ select OF
-+ select OF_PROMTREE
-+ select IRQ_DOMAIN
-+ ---help---
-+ Add support for detecting the unique features of the OLPC
-+ XO hardware.
-+
-+config OLPC_XO1_PM
-+ bool "OLPC XO-1 Power Management"
-+ depends on OLPC && MFD_CS5535 && PM_SLEEP
-+ select MFD_CORE
-+ ---help---
-+ Add support for poweroff and suspend of the OLPC XO-1 laptop.
-+
-+config OLPC_XO1_RTC
-+ bool "OLPC XO-1 Real Time Clock"
-+ depends on OLPC_XO1_PM && RTC_DRV_CMOS
-+ ---help---
-+ Add support for the XO-1 real time clock, which can be used as a
-+ programmable wakeup source.
-+
-+config OLPC_XO1_SCI
-+ bool "OLPC XO-1 SCI extras"
-+ depends on OLPC && OLPC_XO1_PM
-+ depends on INPUT=y
-+ select POWER_SUPPLY
-+ select GPIO_CS5535
-+ select MFD_CORE
-+ ---help---
-+ Add support for SCI-based features of the OLPC XO-1 laptop:
-+ - EC-driven system wakeups
-+ - Power button
-+ - Ebook switch
-+ - Lid switch
-+ - AC adapter status updates
-+ - Battery status updates
-+
-+config OLPC_XO15_SCI
-+ bool "OLPC XO-1.5 SCI extras"
-+ depends on OLPC && ACPI
-+ select POWER_SUPPLY
-+ ---help---
-+ Add support for SCI-based features of the OLPC XO-1.5 laptop:
-+ - EC-driven system wakeups
-+ - AC adapter status updates
-+ - Battery status updates
-+
-+config ALIX
-+ bool "PCEngines ALIX System Support (LED setup)"
-+ select GPIOLIB
-+ ---help---
-+ This option enables system support for the PCEngines ALIX.
-+ At present this just sets up LEDs for GPIO control on
-+ ALIX2/3/6 boards. However, other system specific setup should
-+ get added here.
-+
-+ Note: You must still enable the drivers for GPIO and LED support
-+ (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs
-+
-+ Note: You have to set alix.force=1 for boards with Award BIOS.
-+
-+config NET5501
-+ bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)"
-+ select GPIOLIB
-+ ---help---
-+ This option enables system support for the Soekris Engineering net5501.
-+
-+config GEOS
-+ bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)"
-+ select GPIOLIB
-+ depends on DMI
-+ ---help---
-+ This option enables system support for the Traverse Technologies GEOS.
-+
-+config TS5500
-+ bool "Technologic Systems TS-5500 platform support"
-+ depends on MELAN
-+ select CHECK_SIGNATURE
-+ select NEW_LEDS
-+ select LEDS_CLASS
-+ ---help---
-+ This option enables system support for the Technologic Systems TS-5500.
-+
-+endif # X86_32
-+
-+config AMD_NB
-+ def_bool y
-+ depends on CPU_SUP_AMD && PCI
-+
-+source "drivers/pcmcia/Kconfig"
-+
-+source "drivers/pci/hotplug/Kconfig"
-+
-+config RAPIDIO
-+ bool "RapidIO support"
-+ depends on PCI
-+ default n
-+ help
-+ If you say Y here, the kernel will include drivers and
-+ infrastructure code to support RapidIO interconnect devices.
-+
-+source "drivers/rapidio/Kconfig"
-+
-+endmenu
-+
-+
-+menu "Executable file formats / Emulations"
-+
-+source "fs/Kconfig.binfmt"
-+
-+config IA32_EMULATION
-+ bool "IA32 Emulation"
-+ depends on X86_64
-+ select BINFMT_ELF
-+ select COMPAT_BINFMT_ELF
-+ select HAVE_UID16
-+ ---help---
-+ Include code to run legacy 32-bit programs under a
-+ 64-bit kernel. You should likely turn this on, unless you're
-+ 100% sure that you don't have any 32-bit programs left.
-+
-+config IA32_AOUT
-+ tristate "IA32 a.out support"
-+ depends on IA32_EMULATION
-+ ---help---
-+ Support old a.out binaries in the 32bit emulation.
-+
-+config X86_X32
-+ bool "x32 ABI for 64-bit mode"
-+ depends on X86_64 && IA32_EMULATION
-+ ---help---
-+ Include code to run binaries for the x32 native 32-bit ABI
-+ for 64-bit processors. An x32 process gets access to the
-+ full 64-bit register file and wide data path while leaving
-+ pointers at 32 bits for smaller memory footprint.
-+
-+ You will need a recent binutils (2.22 or later) with
-+ elf32_x86_64 support enabled to compile a kernel with this
-+ option set.
-+
-+config COMPAT
-+ def_bool y
-+ depends on IA32_EMULATION || X86_X32
-+ select ARCH_WANT_OLD_COMPAT_IPC
-+
-+if COMPAT
-+config COMPAT_FOR_U64_ALIGNMENT
-+ def_bool y
-+
-+config SYSVIPC_COMPAT
-+ def_bool y
-+ depends on SYSVIPC
-+
-+config KEYS_COMPAT
-+ def_bool y
-+ depends on KEYS
-+endif
-+
-+endmenu
-+
-+
-+config HAVE_ATOMIC_IOMAP
-+ def_bool y
-+ depends on X86_32
-+
-+config HAVE_TEXT_POKE_SMP
-+ bool
-+ select STOP_MACHINE if SMP
-+
-+config X86_DEV_DMA_OPS
-+ bool
-+ depends on X86_64 || STA2X11
-+
-+config X86_DMA_REMAP
-+ bool
-+ depends on STA2X11
-+
-+source "net/Kconfig"
-+
-+source "drivers/Kconfig"
-+
-+source "drivers/firmware/Kconfig"
-+
-+source "fs/Kconfig"
-+
-+source "arch/x86/Kconfig.debug"
-+
-+source "security/Kconfig"
-+
-+source "crypto/Kconfig"
-+
-+source "arch/x86/kvm/Kconfig"
-+
-+source "lib/Kconfig"