Merge branch 'master' of git+ssh://openadk.org/git/openadk

10 files changed, 14452 insertions, 4462 deletions

diff --git a/target/linux/Config.in b/target/linux/Config.in
index cf4890059..7b52a3003 100644
--- a/target/linux/Config.in
+++ b/target/linux/Config.in
@@ -20,5 +20,6 @@ source target/linux/config/Config.in.misc
 source target/linux/config/Config.in.mips
 source target/linux/config/Config.in.lib
 source target/linux/config/Config.in.pm
+source target/linux/config/Config.in.spi
 source target/linux/config/Config.in.kvm
 source target/linux/config/Config.in.debug
diff --git a/target/linux/config/Config.in.flash b/target/linux/config/Config.in.flash
index 4d9bf6828..3e2898617 100644
--- a/target/linux/config/Config.in.flash
+++ b/target/linux/config/Config.in.flash
@@ -43,8 +43,7 @@ config ADK_KERNEL_MTD_CFI_ADV_OPTIONS
 
 config ADK_KERNEL_MTD_NAND_RB4XX
 	boolean
-	default y if ADK_TARGET_SYSTEM_MIKROTIK_RB411
-	default y if ADK_TARGET_SYSTEM_MIKROTIK_RB433
+	default y if ADK_TARGET_SYSTEM_MIKROTIK_RB4XX
 	default n
 
 config ADK_KERNEL_MTD_AR7_PARTS
diff --git a/target/linux/config/Config.in.netdevice b/target/linux/config/Config.in.netdevice
index aeabbb45a..d9a8cd9dc 100644
--- a/target/linux/config/Config.in.netdevice
+++ b/target/linux/config/Config.in.netdevice
@@ -114,8 +114,7 @@ config ADK_KERNEL_AG71XX
 	select ADK_KERNEL_NET_PCI
 	select ADK_KERNEL_MII
 	select ADK_KERNEL_NETDEV_1000
-	default y if ADK_TARGET_SYSTEM_MIKROTIK_RB411
-	default y if ADK_TARGET_SYSTEM_MIKROTIK_RB433
+	default y if ADK_TARGET_SYSTEM_MIKROTIK_RB4XX
 	default n
 	help
 
diff --git a/target/linux/config/Config.in.spi b/target/linux/config/Config.in.spi
new file mode 100644
index 000000000..a141f8231
--- /dev/null
+++ b/target/linux/config/Config.in.spi
@@ -0,0 +1,14 @@
+config ADK_KERNEL_SPI
+	boolean
+
+config ADK_KERNEL_SPI_AR71XX
+	select ADK_KERNEL_SPI
+	boolean
+
+config ADK_KERNEL_SPI_RB4XX
+	select ADK_KERNEL_SPI
+	boolean
+
+config ADK_KERNEL_SPI_RB4XX_CPLD
+	select ADK_KERNEL_SPI
+	boolean
diff --git a/target/linux/patches/2.6.39/rb4xx.patch b/target/linux/patches/2.6.39/rb4xx.patch
index 1739221bf..49fd204d7 100644
--- a/target/linux/patches/2.6.39/rb4xx.patch
+++ b/target/linux/patches/2.6.39/rb4xx.patch
@@ -1,385 +1,7 @@
-diff -Nur linux-2.6.39.orig/arch/mips/Kconfig linux-2.6.39/arch/mips/Kconfig
---- linux-2.6.39.orig/arch/mips/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/Kconfig	2011-05-27 14:36:50.000000000 +0200
-@@ -84,6 +84,23 @@
- 	help
- 	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
- 
-+config ATHEROS_AR71XX
-+	bool "Atheros AR71xx based boards"
-+	select CEVT_R4K
-+	select CSRC_R4K
-+	select DMA_NONCOHERENT
-+	select HW_HAS_PCI
-+	select IRQ_CPU
-+	select ARCH_REQUIRE_GPIOLIB
-+	select SYS_HAS_CPU_MIPS32_R1
-+	select SYS_HAS_CPU_MIPS32_R2
-+	select SYS_SUPPORTS_32BIT_KERNEL
-+	select SYS_SUPPORTS_BIG_ENDIAN
-+	select SYS_HAS_EARLY_PRINTK
-+	select MIPS_MACHINE
-+	help
-+	  Support for Atheros AR71xx based boards.
-+
- config BCM47XX
- 	bool "Broadcom BCM47XX based boards"
- 	select CEVT_R4K
-@@ -740,6 +757,7 @@
- 
- source "arch/mips/alchemy/Kconfig"
- source "arch/mips/ath79/Kconfig"
-+source "arch/mips/ar71xx/Kconfig"
- source "arch/mips/bcm63xx/Kconfig"
- source "arch/mips/jazz/Kconfig"
- source "arch/mips/jz4740/Kconfig"
-diff -Nur linux-2.6.39.orig/arch/mips/Makefile linux-2.6.39/arch/mips/Makefile
---- linux-2.6.39.orig/arch/mips/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/Makefile	2011-05-27 14:36:50.000000000 +0200
-@@ -158,6 +158,13 @@
- endif
- cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
- 
-+#
-+# Atheros AR71xx
-+#
-+core-$(CONFIG_ATHEROS_AR71XX)	+= arch/mips/ar71xx/
-+cflags-$(CONFIG_ATHEROS_AR71XX)	+= -I$(srctree)/arch/mips/include/asm/mach-ar71xx
-+load-$(CONFIG_ATHEROS_AR71XX)	+= 0xffffffff80060000
-+
- cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)
- cflags-$(CONFIG_CPU_R4400_WORKAROUNDS)	+= $(call cc-option,-mfix-r4400,)
- cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS)	+= $(call cc-option,-mno-daddi,)
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/Kconfig linux-2.6.39/arch/mips/ar71xx/Kconfig
---- linux-2.6.39.orig/arch/mips/ar71xx/Kconfig	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/Kconfig	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,264 @@
-+if ATHEROS_AR71XX
-+
-+menu "Atheros AR71xx machine selection"
-+
-+config AR71XX_MACH_AP81
-+	bool "Atheros AP81 board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_AP83
-+	bool "Atheros AP83 board support"
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_DIR_600_A1
-+	bool "D-Link DIR-600 rev. A1 support"
-+	select AR71XX_DEV_AP91_ETH
-+	select AR71XX_DEV_AP91_PCI if PCI
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_NVRAM
-+	default n
-+
-+config AR71XX_MACH_DIR_615_C1
-+	bool "D-Link DIR-615 rev. C1 support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_NVRAM
-+	default n
-+
-+config AR71XX_MACH_DIR_825_B1
-+	bool "D-Link DIR-825 rev. B1 board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AP94_PCI if PCI
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_PB42
-+	bool "Atheros PB42 board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_PB42_PCI if PCI
-+	default n
-+
-+config AR71XX_MACH_PB44
-+	bool "Atheros PB44 board support"
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_PB42_PCI if PCI
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_PB92
-+	bool "Atheros PB92 board support"
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_PB9X_PCI if PCI
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_AW_NR580
-+	bool "AzureWave AW-NR580 board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_PB42_PCI if PCI
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_WZR_HP_G300NH
-+	bool "Buffalo WZR-HP-G300NH board support"
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default y
-+
-+config AR71XX_MACH_WP543
-+	bool "Compex WP543/WPJ543 board support"
-+	select MYLOADER
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_PB42_PCI if PCI
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_WRT160NL
-+	bool "Linksys WRT160NL board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	select AR71XX_NVRAM
-+	default n
-+
-+config AR71XX_MACH_WRT400N
-+	bool "Linksys WRT400N board support"
-+	select AR71XX_DEV_AP94_PCI if PCI
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_RB4XX
-+	bool "MikroTik RouterBOARD 4xx series support"
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_RB750
-+	bool "MikroTik RouterBOARD 750 support"
-+	select AR71XX_DEV_AP91_ETH
-+	default n
-+
-+config AR71XX_MACH_WNDR3700
-+	bool "NETGEAR WNDR3700 board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AP94_PCI if PCI
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_WNR2000
-+	bool "NETGEAR WNR2000 board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_MZK_W04NU
-+	bool "Planex MZK-W04NU board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_MZK_W300NH
-+	bool "Planex MZK-W300NH board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_NBG460N
-+	bool "Zyxel NBG460N/550N/550NH board support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+	
-+config AR71XX_MACH_TL_WR741ND
-+	bool "TP-LINK TL-WR741ND support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AP91_ETH
-+	select AR71XX_DEV_AP91_PCI if PCI
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_TL_WR841N_V1
-+	bool "TP-LINK TL-WR841N v1 support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_PB42_PCI if PCI
-+	select AR71XX_DEV_DSA
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_TL_WR941ND
-+	bool "TP-LINK TL-WR941ND support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_DSA
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	default n
-+
-+config AR71XX_MACH_TL_WR1043ND
-+	bool "TP-LINK TL-WR1043ND support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_USB
-+	default n
-+
-+config AR71XX_MACH_TEW_632BRP
-+	bool "TRENDnet TEW-632BRP support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AR913X_WMAC
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_NVRAM
-+	default n
-+
-+config AR71XX_MACH_UBNT
-+	bool "Ubiquiti AR71xx based boards support"
-+	select AR71XX_DEV_M25P80
-+	select AR71XX_DEV_AP91_PCI if PCI
-+	select AR71XX_DEV_GPIO_BUTTONS
-+	select AR71XX_DEV_LEDS_GPIO
-+	select AR71XX_DEV_PB42_PCI if PCI
-+	select AR71XX_DEV_USB
-+	default n
-+
-+endmenu
-+
-+config AR71XX_DEV_M25P80
-+	def_bool n
-+
-+config AR71XX_DEV_AP91_PCI
-+	def_bool n
-+
-+config AR71XX_DEV_AP91_ETH
-+	def_bool n
-+
-+config AR71XX_DEV_AP94_PCI
-+	def_bool n
-+
-+config AR71XX_DEV_AR913X_WMAC
-+	def_bool n
-+
-+config AR71XX_DEV_DSA
-+	def_bool n
-+
-+config AR71XX_DEV_GPIO_BUTTONS
-+	def_bool n
-+
-+config AR71XX_DEV_LEDS_GPIO
-+	def_bool n
-+
-+config AR71XX_DEV_PB42_PCI
-+	def_bool n
-+
-+config AR71XX_DEV_PB9X_PCI
-+	def_bool n
-+
-+config AR71XX_DEV_USB
-+	def_bool n
-+
-+config AR71XX_NVRAM
-+	def_bool n
-+
-+endif
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/Makefile linux-2.6.39/arch/mips/ar71xx/Makefile
---- linux-2.6.39.orig/arch/mips/ar71xx/Makefile	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/Makefile	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,54 @@
-+#
-+# Makefile for the Atheros AR71xx SoC specific parts of the kernel
-+#
-+# Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+# Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+#
-+# This program is free software; you can redistribute it and/or modify it
-+# under the terms of the GNU General Public License version 2 as published
-+# by the Free Software Foundation.
-+
-+obj-y	:= prom.o irq.o setup.o devices.o gpio.o ar71xx.o
-+
-+obj-$(CONFIG_EARLY_PRINTK)		+= early_printk.o
-+obj-$(CONFIG_PCI)			+= pci.o
-+
-+obj-$(CONFIG_AR71XX_DEV_AP91_ETH)	+= dev-ap91-eth.o
-+obj-$(CONFIG_AR71XX_DEV_AP91_PCI)	+= dev-ap91-pci.o
-+obj-$(CONFIG_AR71XX_DEV_AP94_PCI)	+= dev-ap94-pci.o
-+obj-$(CONFIG_AR71XX_DEV_AR913X_WMAC)	+= dev-ar913x-wmac.o
-+obj-$(CONFIG_AR71XX_DEV_DSA)		+= dev-dsa.o
-+obj-$(CONFIG_AR71XX_DEV_GPIO_BUTTONS)	+= dev-gpio-buttons.o
-+obj-$(CONFIG_AR71XX_DEV_LEDS_GPIO)	+= dev-leds-gpio.o
-+obj-$(CONFIG_AR71XX_DEV_M25P80)		+= dev-m25p80.o
-+obj-$(CONFIG_AR71XX_DEV_PB42_PCI)	+= dev-pb42-pci.o
-+obj-$(CONFIG_AR71XX_DEV_PB9X_PCI)	+= dev-pb9x-pci.o
-+obj-$(CONFIG_AR71XX_DEV_USB)		+= dev-usb.o
-+
-+obj-$(CONFIG_AR71XX_NVRAM)		+= nvram.o
-+
-+obj-$(CONFIG_AR71XX_MACH_AP81)		+= mach-ap81.o
-+obj-$(CONFIG_AR71XX_MACH_AP83)		+= mach-ap83.o
-+obj-$(CONFIG_AR71XX_MACH_AW_NR580)	+= mach-aw-nr580.o
-+obj-$(CONFIG_AR71XX_MACH_DIR_600_A1)	+= mach-dir-600-a1.o
-+obj-$(CONFIG_AR71XX_MACH_DIR_615_C1)	+= mach-dir-615-c1.o
-+obj-$(CONFIG_AR71XX_MACH_DIR_825_B1)	+= mach-dir-825-b1.o
-+obj-$(CONFIG_AR71XX_MACH_MZK_W04NU)	+= mach-mzk-w04nu.o
-+obj-$(CONFIG_AR71XX_MACH_MZK_W300NH)	+= mach-mzk-w300nh.o
-+obj-$(CONFIG_AR71XX_MACH_NBG460N)	+= mach-nbg460n.o
-+obj-$(CONFIG_AR71XX_MACH_PB42)		+= mach-pb42.o
-+obj-$(CONFIG_AR71XX_MACH_PB44)		+= mach-pb44.o
-+obj-$(CONFIG_AR71XX_MACH_PB92)		+= mach-pb92.o
-+obj-$(CONFIG_AR71XX_MACH_RB4XX)		+= mach-rb4xx.o
-+obj-$(CONFIG_AR71XX_MACH_RB750)		+= mach-rb750.o
-+obj-$(CONFIG_AR71XX_MACH_TEW_632BRP)	+= mach-tew-632brp.o
-+obj-$(CONFIG_AR71XX_MACH_TL_WR741ND)	+= mach-tl-wr741nd.o
-+obj-$(CONFIG_AR71XX_MACH_TL_WR841N_V1)	+= mach-tl-wr841n.o
-+obj-$(CONFIG_AR71XX_MACH_TL_WR941ND)	+= mach-tl-wr941nd.o
-+obj-$(CONFIG_AR71XX_MACH_TL_WR1043ND)	+= mach-tl-wr1043nd.o
-+obj-$(CONFIG_AR71XX_MACH_UBNT)		+= mach-ubnt.o
-+obj-$(CONFIG_AR71XX_MACH_WNDR3700)	+= mach-wndr3700.o
-+obj-$(CONFIG_AR71XX_MACH_WNR2000)	+= mach-wnr2000.o
-+obj-$(CONFIG_AR71XX_MACH_WP543)		+= mach-wp543.o
-+obj-$(CONFIG_AR71XX_MACH_WRT160NL)	+= mach-wrt160nl.o
-+obj-$(CONFIG_AR71XX_MACH_WRT400N)	+= mach-wrt400n.o
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar71xx/ar71xx.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/ar71xx.c	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,177 @@
++++ linux-2.6.39/arch/mips/ar71xx/ar71xx.c	2011-08-24 02:41:55.227990426 +0200
+@@ -0,0 +1,230 @@
 +/*
 + *  AR71xx SoC routines
 + *
@@ -395,10 +17,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar7
 +#include <linux/module.h>
 +#include <linux/types.h>
 +#include <linux/mutex.h>
++#include <linux/spinlock.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
 +static DEFINE_MUTEX(ar71xx_flash_mutex);
++static DEFINE_SPINLOCK(ar71xx_device_lock);
 +
 +void __iomem *ar71xx_ddr_base;
 +EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
@@ -425,30 +49,47 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar7
 +	case AR71XX_SOC_AR7130:
 +	case AR71XX_SOC_AR7141:
 +	case AR71XX_SOC_AR7161:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
 +		ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
 +		mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
 +		t |= mask;
 +		t &= ~mask_inv;
 +		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	case AR71XX_SOC_AR9130:
 +	case AR71XX_SOC_AR9132:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
 +		ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
++		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
++		t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t | mask);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
++		t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t | mask);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	default:
@@ -467,30 +108,47 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar7
 +	case AR71XX_SOC_AR7130:
 +	case AR71XX_SOC_AR7141:
 +	case AR71XX_SOC_AR7161:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
 +		ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
 +		mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
 +		t &= ~mask;
 +		t |= mask_inv;
 +		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	case AR71XX_SOC_AR9130:
 +	case AR71XX_SOC_AR9132:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
 +		ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
++		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
++		t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR933X_RESET_REG_RESET_MODULE, t & ~mask);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
++		t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR934X_RESET_REG_RESET_MODULE, t & ~mask);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	default:
@@ -508,24 +166,39 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar7
 +	case AR71XX_SOC_AR7130:
 +	case AR71XX_SOC_AR7141:
 +	case AR71XX_SOC_AR7161:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	case AR71XX_SOC_AR9130:
 +	case AR71XX_SOC_AR9132:
-+		local_irq_save(flags);
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
 +		t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
-+		local_irq_restore(flags);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
++		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
++		t = ar71xx_reset_rr(AR933X_RESET_REG_RESET_MODULE);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		spin_lock_irqsave(&ar71xx_device_lock, flags);
++		t = ar71xx_reset_rr(AR934X_RESET_REG_RESET_MODULE);
++		spin_unlock_irqrestore(&ar71xx_device_lock, flags);
 +		break;
 +
 +	default:
@@ -539,10 +212,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar7
 +void ar71xx_ddr_flush(u32 reg)
 +{
 +	ar71xx_ddr_wr(reg, 1);
-+	while ((ar71xx_ddr_rr(reg) & 0x1));
++	while ((ar71xx_ddr_rr(reg) & 0x1))
++		;
 +
 +	ar71xx_ddr_wr(reg, 1);
-+	while ((ar71xx_ddr_rr(reg) & 0x1));
++	while ((ar71xx_ddr_rr(reg) & 0x1))
++		;
 +}
 +EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
 +
@@ -557,111 +232,10 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.39/arch/mips/ar7
 +	mutex_unlock(&ar71xx_flash_mutex);
 +}
 +EXPORT_SYMBOL_GPL(ar71xx_flash_release);
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-eth.c linux-2.6.39/arch/mips/ar71xx/dev-ap91-eth.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-eth.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ap91-eth.c	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,70 @@
-+/*
-+ *  Atheros AP91 reference board ethernet initialization
-+ *
-+ *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include "devices.h"
-+#include "dev-dsa.h"
-+#include "dev-ap91-eth.h"
-+
-+static struct dsa_chip_data ap91_dsa_chip = {
-+	.port_names[0]  = "cpu",
-+	.port_names[1]  = "lan1",
-+	.port_names[2]  = "lan2",
-+	.port_names[3]  = "lan3",
-+	.port_names[4]  = "lan4",
-+};
-+
-+static struct dsa_platform_data ap91_dsa_data = {
-+	.nr_chips	= 1,
-+	.chip		= &ap91_dsa_chip,
-+};
-+
-+static void ap91_eth_set_port_name(unsigned port, const char *name)
-+{
-+	if (port < 1 || port > 5)
-+		return;
-+
-+	if (name)
-+		ap91_dsa_chip.port_names[port] = (char *) name;
-+}
-+
-+void __init ap91_eth_init(u8 *mac_addr, const char *port_names[])
-+{
-+	if (mac_addr)
-+		ar71xx_set_mac_base(mac_addr);
-+
-+	if (port_names) {
-+		int i;
-+
-+		for (i = 0; i < AP91_ETH_NUM_PORT_NAMES; i++)
-+			ap91_eth_set_port_name(i + 1, port_names[i]);
-+	}
-+
-+	/* WAN port */
-+	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
-+	ar71xx_eth0_data.speed = SPEED_100;
-+	ar71xx_eth0_data.duplex = DUPLEX_FULL;
-+	ar71xx_eth0_data.fifo_cfg1 = 0x0fff0000;
-+	ar71xx_eth0_data.fifo_cfg2 = 0x00001fff;
-+	ar71xx_eth0_data.fifo_cfg3 = 0x008001ff;
-+
-+	/* LAN ports */
-+	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
-+	ar71xx_eth1_data.speed = SPEED_1000;
-+	ar71xx_eth1_data.duplex = DUPLEX_FULL;
-+	ar71xx_eth1_data.fifo_cfg1 = 0x0fff0000;
-+	ar71xx_eth1_data.fifo_cfg2 = 0x00001fff;
-+	ar71xx_eth1_data.fifo_cfg3 = 0x008001ff;
-+
-+	ar71xx_add_device_mdio(0x0);
-+	ar71xx_add_device_eth(1);
-+	ar71xx_add_device_eth(0);
-+
-+	ar71xx_add_device_dsa(1, &ap91_dsa_data);
-+}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-eth.h linux-2.6.39/arch/mips/ar71xx/dev-ap91-eth.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-eth.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ap91-eth.h	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,23 @@
-+/*
-+ *  Atheros AP91 reference board ethernet initialization
-+ *
-+ *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef _AR71XX_DEV_AP91_ETH_H
-+#define _AR71XX_DEV_AP91_ETH_H
-+
-+#define AP91_ETH_NUM_PORT_NAMES	4
-+
-+#if defined(CONFIG_AR71XX_DEV_AP91_ETH)
-+void ap91_eth_init(u8 *mac_addr, const char *port_names[]) __init;
-+#else
-+static inline void ap91_eth_init(u8 *mac_addr) { }
-+#endif
-+
-+#endif /* _AR71XX_DEV_AP91_ETH_H */
-+
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.c linux-2.6.39/arch/mips/ar71xx/dev-ap91-pci.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ap91-pci.c	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,114 @@
++++ linux-2.6.39/arch/mips/ar71xx/dev-ap91-pci.c	2011-08-24 02:41:55.277990824 +0200
+@@ -0,0 +1,71 @@
 +/*
 + *  Atheros AP91 reference board PCI initialization
 + *
@@ -680,10 +254,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.c linux-2.6.39/arch/mi
 +#include <asm/mach-ar71xx/pci.h>
 +
 +#include "dev-ap91-pci.h"
++#include "pci-ath9k-fixup.h"
 +
-+static struct ath9k_platform_data ap91_wmac_data;
++static struct ath9k_platform_data ap91_wmac_data = {
++	.led_pin = -1,
++};
 +static char ap91_wmac_mac[6];
-+static int ap91_pci_fixup_enabled;
 +
 +static struct ar71xx_pci_irq ap91_pci_irqs[] __initdata = {
 +	{
@@ -695,7 +271,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.c linux-2.6.39/arch/mi
 +
 +static int ap91_pci_plat_dev_init(struct pci_dev *dev)
 +{
-+	switch(PCI_SLOT(dev->devfn)) {
++	switch (PCI_SLOT(dev->devfn)) {
 +	case 0:
 +		dev->dev.platform_data = &ap91_wmac_data;
 +		break;
@@ -704,61 +280,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.c linux-2.6.39/arch/mi
 +	return 0;
 +}
 +
-+static void ap91_pci_fixup(struct pci_dev *dev)
++__init void ap91_pci_setup_wmac_led_pin(int pin)
 +{
-+	void __iomem *mem;
-+	u16 *cal_data;
-+	u16 cmd;
-+	u32 val;
-+
-+	if (!ap91_pci_fixup_enabled)
-+		return;
-+
-+	printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
-+
-+	cal_data = ap91_wmac_data.eeprom_data;
-+	if (*cal_data != 0xa55a) {
-+		printk(KERN_ERR "PCI: no calibration data found for %s\n",
-+		       pci_name(dev));
-+		return;
-+	}
-+
-+	mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
-+	if (!mem) {
-+		printk(KERN_ERR "PCI: ioremap error for device %s\n",
-+		       pci_name(dev));
-+		return;
-+	}
-+
-+	/* Setup the PCI device to allow access to the internal registers */
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
-+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-+	pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+        /* set pointer to first reg address */
-+	cal_data += 3;
-+	while (*cal_data != 0xffff) {
-+		u32 reg;
-+		reg = *cal_data++;
-+		val = *cal_data++;
-+		val |= (*cal_data++) << 16;
-+
-+		__raw_writel(val, mem + reg);
-+		udelay(100);
-+	}
-+
-+	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
-+	dev->vendor = val & 0xffff;
-+	dev->device = (val >> 16) & 0xffff;
-+
-+	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
-+	dev->revision = val & 0xff;
-+	dev->class = val >> 8; /* upper 3 bytes */
++	ap91_wmac_data.led_pin = pin;
++}
 +
-+	iounmap(mem);
++__init void ap91_pci_setup_wmac_gpio(u32 mask, u32 val)
++{
++	ap91_wmac_data.gpio_mask = mask;
++	ap91_wmac_data.gpio_val = val;
 +}
-+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap91_pci_fixup);
 +
 +void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr)
 +{
@@ -774,12 +305,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.c linux-2.6.39/arch/mi
 +	ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init;
 +	ar71xx_pci_init(ARRAY_SIZE(ap91_pci_irqs), ap91_pci_irqs);
 +
-+	ap91_pci_fixup_enabled = 1;
++	pci_enable_ath9k_fixup(0, ap91_wmac_data.eeprom_data);
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.h linux-2.6.39/arch/mips/ar71xx/dev-ap91-pci.h
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ap91-pci.h	2011-05-27 14:36:50.000000000 +0200
-@@ -0,0 +1,21 @@
++++ linux-2.6.39/arch/mips/ar71xx/dev-ap91-pci.h	2011-08-24 02:41:55.287981779 +0200
+@@ -0,0 +1,25 @@
 +/*
 + *  Atheros AP91 reference board PCI initialization
 + *
@@ -795,16 +326,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap91-pci.h linux-2.6.39/arch/mi
 +
 +#if defined(CONFIG_AR71XX_DEV_AP91_PCI)
 +void ap91_pci_init(u8 *cal_data, u8 *mac_addr) __init;
++void ap91_pci_setup_wmac_led_pin(int pin) __init;
++void ap91_pci_setup_wmac_gpio(u32 mask, u32 val) __init;
 +#else
 +static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) { }
++static inline void ap91_pci_setup_wmac_led_pin(int pin) { }
++static inline void ap91_pci_setup_wmac_gpio(u32 mask, u32 gpio) { }
 +#endif
 +
 +#endif /* _AR71XX_DEV_AP91_PCI_H */
 +
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.c linux-2.6.39/arch/mips/ar71xx/dev-ap94-pci.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ap94-pci.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,159 @@
++++ linux-2.6.39/arch/mips/ar71xx/dev-ap94-pci.c	2011-08-24 02:41:55.287981779 +0200
+@@ -0,0 +1,109 @@
 +/*
 + *  Atheros AP94 reference board PCI initialization
 + *
@@ -823,28 +358,32 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.c linux-2.6.39/arch/mi
 +#include <asm/mach-ar71xx/pci.h>
 +
 +#include "dev-ap94-pci.h"
++#include "pci-ath9k-fixup.h"
 +
-+static struct ath9k_platform_data ap94_wmac0_data;
-+static struct ath9k_platform_data ap94_wmac1_data;
++static struct ath9k_platform_data ap94_wmac0_data = {
++	.led_pin = -1,
++};
++static struct ath9k_platform_data ap94_wmac1_data = {
++	.led_pin = -1,
++};
 +static char ap94_wmac0_mac[6];
 +static char ap94_wmac1_mac[6];
-+static int ap94_pci_fixup_enabled;
 +
 +static struct ar71xx_pci_irq ap94_pci_irqs[] __initdata = {
-+        {
-+                .slot   = 0,
-+                .pin    = 1,
-+                .irq    = AR71XX_PCI_IRQ_DEV0,
-+        }, {
-+                .slot   = 1,
-+                .pin    = 1,
-+                .irq    = AR71XX_PCI_IRQ_DEV1,
-+        }
++	{
++		.slot   = 0,
++		.pin    = 1,
++		.irq    = AR71XX_PCI_IRQ_DEV0,
++	}, {
++		.slot   = 1,
++		.pin    = 1,
++		.irq    = AR71XX_PCI_IRQ_DEV1,
++	}
 +};
 +
 +static int ap94_pci_plat_dev_init(struct pci_dev *dev)
 +{
-+	switch(PCI_SLOT(dev->devfn)) {
++	switch (PCI_SLOT(dev->devfn)) {
 +	case 17:
 +		dev->dev.platform_data = &ap94_wmac0_data;
 +		break;
@@ -857,85 +396,30 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.c linux-2.6.39/arch/mi
 +	return 0;
 +}
 +
-+static void ap94_pci_fixup(struct pci_dev *dev)
++__init void ap94_pci_setup_wmac_led_pin(unsigned wmac, int pin)
 +{
-+	void __iomem *mem;
-+	u16 *cal_data;
-+	u16 cmd;
-+	u32 bar0;
-+	u32 val;
-+
-+	if (!ap94_pci_fixup_enabled)
-+		return;
-+
-+	switch (PCI_SLOT(dev->devfn)) {
-+	case 17:
-+		cal_data = ap94_wmac0_data.eeprom_data;
++	switch (wmac) {
++	case 0:
++		ap94_wmac0_data.led_pin = pin;
 +		break;
-+	case 18:
-+		cal_data = ap94_wmac1_data.eeprom_data;
++	case 1:
++		ap94_wmac1_data.led_pin = pin;
 +		break;
-+	default:
-+		return;
-+	}
-+
-+	if (*cal_data != 0xa55a) {
-+		printk(KERN_ERR "PCI: no calibration data found for %s\n",
-+		       pci_name(dev));
-+		return;
-+	}
-+
-+	mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
-+	if (!mem) {
-+		printk(KERN_ERR "PCI: ioremap error for device %s\n",
-+		       pci_name(dev));
-+		return;
 +	}
-+
-+	printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
-+
-+	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+
-+	/* Setup the PCI device to allow access to the internal registers */
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
-+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-+	pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+	/* set pointer to first reg address */
-+	cal_data += 3;
-+	while (*cal_data != 0xffff) {
-+		u32 reg;
-+		reg = *cal_data++;
-+		val = *cal_data++;
-+		val |= (*cal_data++) << 16;
-+
-+		__raw_writel(val, mem + reg);
-+		udelay(100);
-+	}
-+
-+	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
-+	dev->vendor = val & 0xffff;
-+	dev->device = (val >> 16) & 0xffff;
-+
-+	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
-+	dev->revision = val & 0xff;
-+	dev->class = val >> 8; /* upper 3 bytes */
-+
-+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+	cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-+	pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
-+
-+	iounmap(mem);
 +}
-+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap94_pci_fixup);
 +
-+void __init ap94_pci_enable_quirk_wndr3700(void)
++__init void ap94_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val)
 +{
-+	ap94_wmac0_data.quirk_wndr3700 = 1;
-+	ap94_wmac1_data.quirk_wndr3700 = 1;
++	switch (wmac) {
++	case 0:
++		ap94_wmac0_data.gpio_mask = mask;
++		ap94_wmac0_data.gpio_val = val;
++		break;
++	case 1:
++		ap94_wmac1_data.gpio_mask = mask;
++		ap94_wmac1_data.gpio_val = val;
++		break;
++	}
 +}
 +
 +void __init ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
@@ -962,12 +446,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.c linux-2.6.39/arch/mi
 +	ar71xx_pci_plat_dev_init = ap94_pci_plat_dev_init;
 +	ar71xx_pci_init(ARRAY_SIZE(ap94_pci_irqs), ap94_pci_irqs);
 +
-+	ap94_pci_fixup_enabled = 1;
++	pci_enable_ath9k_fixup(17, ap94_wmac0_data.eeprom_data);
++	pci_enable_ath9k_fixup(18, ap94_wmac1_data.eeprom_data);
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.h linux-2.6.39/arch/mips/ar71xx/dev-ap94-pci.h
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ap94-pci.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,28 @@
++++ linux-2.6.39/arch/mips/ar71xx/dev-ap94-pci.h	2011-08-24 02:41:55.287981779 +0200
+@@ -0,0 +1,31 @@
 +/*
 + *  Atheros AP94 reference board PCI initialization
 + *
@@ -985,28 +470,32 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ap94-pci.h linux-2.6.39/arch/mi
 +void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
 +		   u8 *cal_data1, u8 *mac_addr1) __init;
 +
-+void ap94_pci_enable_quirk_wndr3700(void) __init;
++void ap94_pci_setup_wmac_led_pin(unsigned wmac, int pin) __init;
++void ap94_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) __init;
 +
 +#else
 +static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
 +				 u8 *cal_data1, u8 *mac_addr1) {}
 +
-+static inline void ap94_pci_enable_quirk_wndr3700(void) {}
++static inline void ap94_pci_setup_wmac_led_pin(unsigned wmac, int pin) {}
++static inline void ap94_pci_setup_wmac_gpio(unsigned wmac,
++					    u32 mask, u32 val) {}
 +#endif
 +
 +#endif /* _AR71XX_DEV_AP94_PCI_H */
 +
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ar913x-wmac.c linux-2.6.39/arch/mips/ar71xx/dev-ar913x-wmac.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-ar913x-wmac.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ar913x-wmac.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,68 @@
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ar9xxx-wmac.c linux-2.6.39/arch/mips/ar71xx/dev-ar9xxx-wmac.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-ar9xxx-wmac.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-ar9xxx-wmac.c	2011-08-24 02:41:55.287981779 +0200
+@@ -0,0 +1,154 @@
 +/*
-+ *  Atheros AR913x SoC built-in WMAC device support
++ *  Atheros AR9XXX SoCs built-in WMAC device support
 + *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -1022,15 +511,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ar913x-wmac.c linux-2.6.39/arch
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +
-+static struct ath9k_platform_data ar913x_wmac_data;
-+static char ar913x_wmac_mac[6];
++#define MHZ_25	(25 * 1000 * 1000)
++
++static struct ath9k_platform_data ar9xxx_wmac_data = {
++	.led_pin = -1,
++};
++static char ar9xxx_wmac_mac[6];
 +
-+static struct resource ar913x_wmac_resources[] = {
++static struct resource ar9xxx_wmac_resources[] = {
 +	{
-+		.start	= AR91XX_WMAC_BASE,
-+		.end	= AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
++		/* .start and .end fields are filled dynamically */
 +		.flags	= IORESOURCE_MEM,
 +	}, {
 +		.start	= AR71XX_CPU_IRQ_IP2,
@@ -1039,61 +531,205 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ar913x-wmac.c linux-2.6.39/arch
 +	},
 +};
 +
-+static struct platform_device ar913x_wmac_device = {
++static struct platform_device ar9xxx_wmac_device = {
 +	.name		= "ath9k",
 +	.id		= -1,
-+	.resource	= ar913x_wmac_resources,
-+	.num_resources	= ARRAY_SIZE(ar913x_wmac_resources),
++	.resource	= ar9xxx_wmac_resources,
++	.num_resources	= ARRAY_SIZE(ar9xxx_wmac_resources),
 +	.dev = {
-+		.platform_data = &ar913x_wmac_data,
++		.platform_data = &ar9xxx_wmac_data,
 +	},
 +};
 +
-+void __init ar913x_add_device_wmac(u8 *cal_data, u8 *mac_addr)
++static void ar913x_wmac_init(void)
 +{
-+	if (cal_data)
-+		memcpy(ar913x_wmac_data.eeprom_data, cal_data,
-+		       sizeof(ar913x_wmac_data.eeprom_data));
-+
-+	if (mac_addr) {
-+		memcpy(ar913x_wmac_mac, mac_addr, sizeof(ar913x_wmac_mac));
-+		ar913x_wmac_data.macaddr = ar913x_wmac_mac;
-+	}
-+
 +	ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
 +	mdelay(10);
 +
 +	ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
 +	mdelay(10);
 +
-+	platform_device_register(&ar913x_wmac_device);
++	ar9xxx_wmac_resources[0].start = AR91XX_WMAC_BASE;
++	ar9xxx_wmac_resources[0].end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1;
 +}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ar913x-wmac.h linux-2.6.39/arch/mips/ar71xx/dev-ar913x-wmac.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-ar913x-wmac.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-ar913x-wmac.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,19 @@
++
++static int ar933x_r1_get_wmac_revision(void)
++{
++	return ar71xx_soc_rev;
++}
++
++static int ar933x_wmac_reset(void)
++{
++	unsigned retries = 0;
++
++	ar71xx_device_stop(AR933X_RESET_WMAC);
++	ar71xx_device_start(AR933X_RESET_WMAC);
++
++	while (1) {
++		u32 bootstrap;
++
++		bootstrap = ar71xx_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
++		if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0)
++			return 0;
++
++		if (retries > 20)
++			break;
++
++		udelay(10000);
++		retries++;
++	}
++
++	pr_err("ar93xx: WMAC reset timed out");
++	return -ETIMEDOUT;
++}
++
++static void ar933x_wmac_init(void)
++{
++	ar9xxx_wmac_device.name = "ar933x_wmac";
++	ar9xxx_wmac_resources[0].start = AR933X_WMAC_BASE;
++	ar9xxx_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
++	if (ar71xx_ref_freq == MHZ_25)
++		ar9xxx_wmac_data.is_clk_25mhz = true;
++
++	if (ar71xx_soc_rev == 1)
++		ar9xxx_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision;
++
++	ar9xxx_wmac_data.external_reset = ar933x_wmac_reset;
++
++	ar933x_wmac_reset();
++}
++
++static void ar934x_wmac_init(void)
++{
++	ar9xxx_wmac_device.name = "ar934x_wmac";
++	ar9xxx_wmac_resources[0].start = AR934X_WMAC_BASE;
++	ar9xxx_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
++	if (ar71xx_ref_freq == MHZ_25)
++		ar9xxx_wmac_data.is_clk_25mhz = true;
++}
++
++void __init ar9xxx_add_device_wmac(u8 *cal_data, u8 *mac_addr)
++{
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++		ar913x_wmac_init();
++		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		ar933x_wmac_init();
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		ar934x_wmac_init();
++		break;
++
++	default:
++		BUG();
++	}
++
++	if (cal_data)
++		memcpy(ar9xxx_wmac_data.eeprom_data, cal_data,
++		       sizeof(ar9xxx_wmac_data.eeprom_data));
++
++	if (mac_addr) {
++		memcpy(ar9xxx_wmac_mac, mac_addr, sizeof(ar9xxx_wmac_mac));
++		ar9xxx_wmac_data.macaddr = ar9xxx_wmac_mac;
++	}
++
++	platform_device_register(&ar9xxx_wmac_device);
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-ar9xxx-wmac.h linux-2.6.39/arch/mips/ar71xx/dev-ar9xxx-wmac.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-ar9xxx-wmac.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-ar9xxx-wmac.h	2011-08-24 02:41:55.297981663 +0200
+@@ -0,0 +1,20 @@
 +/*
-+ *  Atheros AR913x SoC built-in WMAC device support
++ *  Atheros AR9XXX SoCs built-in WMAC device support
 + *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_AR9XXX_WMAC_H
++#define _AR71XX_DEV_AR9XXX_WMAC_H
++
++void ar9xxx_add_device_wmac(u8 *cal_data, u8 *mac_addr) __init;
++
++#endif /* _AR71XX_DEV_AR9XXX_WMAC_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-db120-pci.c linux-2.6.39/arch/mips/ar71xx/dev-db120-pci.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-db120-pci.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-db120-pci.c	2011-08-24 02:41:55.317990461 +0200
+@@ -0,0 +1,31 @@
++/*
++ *  Atheros db120 reference board PCI initialization
++ *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
++ *
++ *  Parts of this file are based on Atheros linux 2.6.31 BSP
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
 + *  by the Free Software Foundation.
 + */
 +
-+#ifndef _AR71XX_DEV_AR913X_WMAC_H
-+#define _AR71XX_DEV_AR913X_WMAC_H
++#include <linux/pci.h>
 +
-+void ar913x_add_device_wmac(u8 *cal_data, u8 *mac_addr) __init;
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++#include "dev-db120-pci.h"
++
++static struct ar71xx_pci_irq db120_pci_irqs[] __initdata = {
++	{
++		.slot	= 0,
++		.pin	= 1,
++		.irq	= AR71XX_PCI_IRQ_DEV0,
++	}
++};
++
++void __init db120_pci_init(void)
++{
++	ar71xx_pci_init(ARRAY_SIZE(db120_pci_irqs), db120_pci_irqs);
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-db120-pci.h linux-2.6.39/arch/mips/ar71xx/dev-db120-pci.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-db120-pci.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-db120-pci.h	2011-08-24 02:41:55.327990934 +0200
+@@ -0,0 +1,22 @@
++/*
++ *  Atheros DB120 reference board PCI initialization
++ *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
++ *
++ *  Parts of this file are based on Atheros linux 2.6.31 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
 +
-+#endif /* _AR71XX_DEV_AR913X_WMAC_H */
++#ifndef _AR71XX_DEV_DB120_PCI_H
++#define _AR71XX_DEV_DB120_PCI_H
++
++#if defined(CONFIG_AR71XX_DEV_DB120_PCI)
++void db120_pci_init(void);
++#else
++static inline void db120_pci_init(void) { }
++#endif
++
++#endif /* _AR71XX_DEV_DB120_PCI_H */
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-dsa.c linux-2.6.39/arch/mips/ar71xx/dev-dsa.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-dsa.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-dsa.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/ar71xx/dev-dsa.c	2011-08-24 02:41:55.337990441 +0200
 @@ -0,0 +1,50 @@
 +/*
 + *  Atheros AR71xx DSA switch device support
@@ -1147,7 +783,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-dsa.c linux-2.6.39/arch/mips/ar
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-dsa.h linux-2.6.39/arch/mips/ar71xx/dev-dsa.h
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-dsa.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-dsa.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/ar71xx/dev-dsa.h	2011-08-24 02:41:55.347990727 +0200
 @@ -0,0 +1,20 @@
 +/*
 + *  Atheros AR71xx DSA switch device support
@@ -1171,7 +807,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-dsa.h linux-2.6.39/arch/mips/ar
 +#endif /* _AR71XX_DEV_DSA_H */
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.c linux-2.6.39/arch/mips/ar71xx/dev-gpio-buttons.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-gpio-buttons.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/ar71xx/dev-gpio-buttons.c	2011-08-24 02:41:55.347990727 +0200
 @@ -0,0 +1,58 @@
 +/*
 + *  Atheros AR71xx GPIO button support
@@ -1185,18 +821,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.c linux-2.6.39/arc
 + */
 +
 +#include "linux/init.h"
++#include "linux/slab.h"
 +#include <linux/platform_device.h>
 +
 +#include "dev-gpio-buttons.h"
 +
-+void __init ar71xx_add_device_gpio_buttons(int id,
-+					   unsigned poll_interval,
-+					   unsigned nbuttons,
-+					   struct gpio_button *buttons)
++void __init ar71xx_register_gpio_keys_polled(int id,
++					     unsigned poll_interval,
++					     unsigned nbuttons,
++					     struct gpio_keys_button *buttons)
 +{
 +	struct platform_device *pdev;
-+	struct gpio_buttons_platform_data pdata;
-+	struct gpio_button *p;
++	struct gpio_keys_platform_data pdata;
++	struct gpio_keys_button *p;
 +	int err;
 +
 +	p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
@@ -1205,7 +842,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.c linux-2.6.39/arc
 +
 +	memcpy(p, buttons, nbuttons * sizeof(*p));
 +
-+	pdev = platform_device_alloc("gpio-buttons", id);
++	pdev = platform_device_alloc("gpio-keys-polled", id);
 +	if (!pdev)
 +		goto err_free_buttons;
 +
@@ -1218,7 +855,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.c linux-2.6.39/arc
 +	if (err)
 +		goto err_put_pdev;
 +
-+
 +	err = platform_device_add(pdev);
 +	if (err)
 +		goto err_put_pdev;
@@ -1233,8 +869,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.c linux-2.6.39/arc
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.h linux-2.6.39/arch/mips/ar71xx/dev-gpio-buttons.h
 --- linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-gpio-buttons.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,25 @@
++++ linux-2.6.39/arch/mips/ar71xx/dev-gpio-buttons.h	2011-08-24 02:41:55.347990727 +0200
+@@ -0,0 +1,23 @@
 +/*
 + *  Atheros AR71xx GPIO button support
 + *
@@ -1250,505 +886,27 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-gpio-buttons.h linux-2.6.39/arc
 +#define _AR71XX_DEV_GPIO_BUTTONS_H
 +
 +#include <linux/input.h>
-+#include <linux/gpio_buttons.h>
-+
-+#include <asm/mach-ar71xx/platform.h>
++#include <linux/gpio_keys.h>
 +
-+void ar71xx_add_device_gpio_buttons(int id,
-+				    unsigned poll_interval,
-+				    unsigned nbuttons,
-+				    struct gpio_button *buttons) __init;
++void ar71xx_register_gpio_keys_polled(int id,
++				      unsigned poll_interval,
++				      unsigned nbuttons,
++				      struct gpio_keys_button *buttons);
 +
 +#endif /* _AR71XX_DEV_GPIO_BUTTONS_H */
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.c linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,57 @@
-+/*
-+ *  Atheros AR71xx GPIO LED device support
-+ *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+#include "dev-leds-gpio.h"
-+
-+void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
-+					struct gpio_led *leds)
-+{
-+	struct platform_device *pdev;
-+	struct gpio_led_platform_data pdata;
-+	struct gpio_led *p;
-+	int err;
-+
-+	p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
-+	if (!p)
-+		return;
-+
-+	memcpy(p, leds, num_leds * sizeof(*p));
-+
-+	pdev = platform_device_alloc("leds-gpio", id);
-+	if (!pdev)
-+		goto err_free_leds;
-+
-+	memset(&pdata, 0, sizeof(pdata));
-+	pdata.num_leds = num_leds;
-+	pdata.leds = p;
-+
-+	err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
-+	if (err)
-+		goto err_put_pdev;
-+
-+	err = platform_device_add(pdev);
-+	if (err)
-+		goto err_put_pdev;
-+
-+	return;
-+
-+err_put_pdev:
-+	platform_device_put(pdev);
-+
-+err_free_leds:
-+	kfree(p);
-+}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.h linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,21 @@
-+/*
-+ *  Atheros AR71xx GPIO LED device support
-+ *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef _AR71XX_DEV_LEDS_GPIO_H
-+#define _AR71XX_DEV_LEDS_GPIO_H
-+
-+#include <linux/leds.h>
-+
-+void ar71xx_add_device_leds_gpio(int id,
-+				 unsigned num_leds,
-+				 struct gpio_led *leds) __init;
-+
-+#endif /* _AR71XX_DEV_LEDS_GPIO_H */
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.c linux-2.6.39/arch/mips/ar71xx/dev-m25p80.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-m25p80.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,30 @@
-+/*
-+ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
-+
-+#include "devices.h"
-+#include "dev-m25p80.h"
-+
-+static struct spi_board_info ar71xx_spi_info[] = {
-+	{
-+		.bus_num	= 0,
-+		.chip_select	= 0,
-+		.max_speed_hz	= 25000000,
-+		.modalias	= "m25p80",
-+	}
-+};
-+
-+void __init ar71xx_add_device_m25p80(struct flash_platform_data *pdata)
-+{
-+	ar71xx_spi_info[0].platform_data = pdata;
-+	ar71xx_add_device_spi(NULL, ar71xx_spi_info,
-+			      ARRAY_SIZE(ar71xx_spi_info));
-+}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.h linux-2.6.39/arch/mips/ar71xx/dev-m25p80.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-m25p80.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,16 @@
-+/*
-+ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef _AR71XX_DEV_M25P80_H
-+#define _AR71XX_DEV_M25P80_H
-+
-+#include <linux/spi/flash.h>
-+
-+void ar71xx_add_device_m25p80(struct flash_platform_data *pdata) __init;
-+
-+#endif /* _AR71XX_DEV_M25P80_H */
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.c linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,40 @@
-+/*
-+ *  Atheros PB42 reference board PCI initialization
-+ *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/pci.h>
-+
-+#include <asm/mach-ar71xx/ar71xx.h>
-+#include <asm/mach-ar71xx/pci.h>
-+
-+#include "dev-pb42-pci.h"
-+
-+static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
-+	{
-+		.slot	= 0,
-+		.pin	= 1,
-+		.irq	= AR71XX_PCI_IRQ_DEV0,
-+	}, {
-+		.slot	= 1,
-+		.pin	= 1,
-+		.irq	= AR71XX_PCI_IRQ_DEV1,
-+	}, {
-+		.slot	= 2,
-+		.pin	= 1,
-+		.irq	= AR71XX_PCI_IRQ_DEV2,
-+	}
-+};
-+
-+void __init pb42_pci_init(void)
-+{
-+	ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
-+}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.h linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,21 @@
-+/*
-+ *  Atheros PB42 reference board PCI initialization
-+ *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef _AR71XX_DEV_PB42_PCI_H
-+#define _AR71XX_DEV_PB42_PCI_H
-+
-+#if defined(CONFIG_AR71XX_DEV_PB42_PCI)
-+void pb42_pci_init(void) __init;
-+#else
-+static inline void pb42_pci_init(void) { }
-+#endif
-+
-+#endif /* _AR71XX_DEV_PB42_PCI_H */
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.c linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,33 @@
-+/*
-+ *  Atheros PB9x reference board PCI initialization
-+ *
-+ *  Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/pci.h>
-+
-+#include <asm/mach-ar71xx/ar71xx.h>
-+#include <asm/mach-ar71xx/pci.h>
-+
-+#include "dev-pb9x-pci.h"
-+
-+static struct ar71xx_pci_irq pb9x_pci_irqs[] __initdata = {
-+	{
-+		.slot	= 0,
-+		.pin	= 1,
-+		.irq	= AR71XX_PCI_IRQ_DEV0,
-+	}
-+};
-+
-+void __init pb9x_pci_init(void)
-+{
-+	ar71xx_pci_init(ARRAY_SIZE(pb9x_pci_irqs), pb9x_pci_irqs);
-+}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.h linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,22 @@
-+/*
-+ *  Atheros PB9x reference board PCI initialization
-+ *
-+ *  Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef _AR71XX_DEV_PB9X_PCI_H
-+#define _AR71XX_DEV_PB9X_PCI_H
-+
-+#if defined(CONFIG_AR71XX_DEV_PB9X_PCI)
-+void pb9x_pci_init(void) __init;
-+#else
-+static inline void pb9x_pci_init(void) { }
-+#endif
-+
-+#endif /* _AR71XX_DEV_PB9X_PCI_H */
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.c linux-2.6.39/arch/mips/ar71xx/dev-usb.c
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-usb.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,181 @@
-+/*
-+ *  Atheros AR71xx USB host device support
-+ *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/mach-ar71xx/ar71xx.h>
-+#include <asm/mach-ar71xx/platform.h>
-+
-+#include "dev-usb.h"
-+
-+/*
-+ * OHCI (USB full speed host controller)
-+ */
-+static struct resource ar71xx_ohci_resources[] = {
-+	[0] = {
-+		.start	= AR71XX_OHCI_BASE,
-+		.end	= AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= AR71XX_MISC_IRQ_OHCI,
-+		.end	= AR71XX_MISC_IRQ_OHCI,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct resource ar7240_ohci_resources[] = {
-+	[0] = {
-+		.start	= AR7240_OHCI_BASE,
-+		.end	= AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= AR71XX_CPU_IRQ_USB,
-+		.end	= AR71XX_CPU_IRQ_USB,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
-+static struct platform_device ar71xx_ohci_device = {
-+	.name		= "ar71xx-ohci",
-+	.id		= -1,
-+	.resource	= ar71xx_ohci_resources,
-+	.num_resources	= ARRAY_SIZE(ar71xx_ohci_resources),
-+	.dev = {
-+		.dma_mask		= &ar71xx_ohci_dmamask,
-+		.coherent_dma_mask	= DMA_BIT_MASK(32),
-+	},
-+};
-+
-+/*
-+ * EHCI (USB full speed host controller)
-+ */
-+static struct resource ar71xx_ehci_resources[] = {
-+	[0] = {
-+		.start	= AR71XX_EHCI_BASE,
-+		.end	= AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= AR71XX_CPU_IRQ_USB,
-+		.end	= AR71XX_CPU_IRQ_USB,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
-+static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
-+
-+static struct platform_device ar71xx_ehci_device = {
-+	.name		= "ar71xx-ehci",
-+	.id		= -1,
-+	.resource	= ar71xx_ehci_resources,
-+	.num_resources	= ARRAY_SIZE(ar71xx_ehci_resources),
-+	.dev = {
-+		.dma_mask		= &ar71xx_ehci_dmamask,
-+		.coherent_dma_mask	= DMA_BIT_MASK(32),
-+		.platform_data		= &ar71xx_ehci_data,
-+	},
-+};
-+
-+#define AR71XX_USB_RESET_MASK \
-+	(RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
-+	| RESET_MODULE_USB_OHCI_DLL)
-+
-+#define AR7240_USB_RESET_MASK \
-+	(RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
-+
-+static void __init ar71xx_usb_setup(void)
-+{
-+	ar71xx_device_stop(AR71XX_USB_RESET_MASK);
-+	mdelay(1000);
-+	ar71xx_device_start(AR71XX_USB_RESET_MASK);
-+
-+	/* Turning on the Buff and Desc swap bits */
-+	ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
-+
-+	/* WAR for HW bug. Here it adjusts the duration between two SOFS */
-+	ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
-+
-+	mdelay(900);
-+
-+	platform_device_register(&ar71xx_ohci_device);
-+	platform_device_register(&ar71xx_ehci_device);
-+}
-+
-+static void __init ar7240_usb_setup(void)
-+{
-+	ar71xx_device_stop(AR7240_USB_RESET_MASK);
-+	mdelay(1000);
-+	ar71xx_device_start(AR7240_USB_RESET_MASK);
-+
-+	/* WAR for HW bug. Here it adjusts the duration between two SOFS */
-+	ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
-+
-+	if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
-+		ar71xx_ehci_data.is_ar91xx = 1;
-+		ar71xx_ehci_device.resource = ar7240_ohci_resources;
-+		ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
-+		platform_device_register(&ar71xx_ehci_device);
-+	} else {
-+		ar71xx_ohci_device.resource = ar7240_ohci_resources;
-+		ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
-+		platform_device_register(&ar71xx_ohci_device);
-+	}
-+}
-+
-+static void __init ar91xx_usb_setup(void)
-+{
-+	ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
-+	mdelay(10);
-+
-+	ar71xx_device_start(RESET_MODULE_USB_HOST);
-+	mdelay(10);
-+
-+	ar71xx_device_start(RESET_MODULE_USB_PHY);
-+	mdelay(10);
-+
-+	ar71xx_ehci_data.is_ar91xx = 1;
-+	platform_device_register(&ar71xx_ehci_device);
-+}
-+
-+void __init ar71xx_add_device_usb(void)
-+{
-+	switch (ar71xx_soc) {
-+	case AR71XX_SOC_AR7240:
-+	case AR71XX_SOC_AR7241:
-+	case AR71XX_SOC_AR7242:
-+		ar7240_usb_setup();
-+		break;
-+
-+	case AR71XX_SOC_AR7130:
-+	case AR71XX_SOC_AR7141:
-+	case AR71XX_SOC_AR7161:
-+		ar71xx_usb_setup();
-+		break;
-+
-+	case AR71XX_SOC_AR9130:
-+	case AR71XX_SOC_AR9132:
-+		ar91xx_usb_setup();
-+		break;
-+
-+	default:
-+		BUG();
-+	}
-+}
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.h linux-2.6.39/arch/mips/ar71xx/dev-usb.h
---- linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/dev-usb.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,17 @@
-+/*
-+ *  Atheros AR71xx USB host device support
-+ *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#ifndef _AR71XX_DEV_USB_H
-+#define _AR71XX_DEV_USB_H
-+
-+void ar71xx_add_device_usb(void) __init;
-+
-+#endif /* _AR71XX_DEV_USB_H */
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar71xx/devices.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/devices.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/devices.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,575 @@
++++ linux-2.6.39/arch/mips/ar71xx/devices.c	2011-08-24 02:41:55.347990727 +0200
+@@ -0,0 +1,765 @@
 +/*
 + *  Atheros AR71xx SoC platform devices
 + *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.31 BSP
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -1763,10 +921,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +#include <linux/serial_8250.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/ar933x_uart_platform.h>
 +
 +#include "devices.h"
 +
-+static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
++unsigned char ar71xx_mac_base[ETH_ALEN] __initdata;
 +
 +static struct resource ar71xx_uart_resources[] = {
 +	{
@@ -1799,10 +958,65 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +	},
 +};
 +
++static struct resource ar933x_uart_resources[] = {
++	{
++		.start  = AR933X_UART_BASE,
++		.end    = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
++		.flags  = IORESOURCE_MEM,
++	},
++	{
++		.start  = AR71XX_MISC_IRQ_UART,
++		.end    = AR71XX_MISC_IRQ_UART,
++		.flags  = IORESOURCE_IRQ,
++	},
++};
++
++static struct ar933x_uart_platform_data ar933x_uart_data;
++static struct platform_device ar933x_uart_device = {
++	.name           = "ar933x-uart",
++	.id             = -1,
++	.resource       = ar933x_uart_resources,
++	.num_resources  = ARRAY_SIZE(ar933x_uart_resources),
++	.dev = {
++		.platform_data  = &ar933x_uart_data,
++	},
++};
++
 +void __init ar71xx_add_device_uart(void)
 +{
-+	ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
-+	platform_device_register(&ar71xx_uart_device);
++	struct platform_device *pdev;
++
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++	case AR71XX_SOC_AR7240:
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++		pdev = &ar71xx_uart_device;
++		ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
++		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		pdev = &ar933x_uart_device;
++		ar933x_uart_data.uartclk = ar71xx_ref_freq;
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		pdev = &ar71xx_uart_device;
++		ar71xx_uart_data[0].uartclk = ar71xx_ref_freq;
++		break;
++
++	default:
++		BUG();
++	}
++
++	platform_device_register(pdev);
 +}
 +
 +static struct resource ar71xx_mdio_resources[] = {
@@ -1826,23 +1040,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +	},
 +};
 +
-+void __init ar71xx_add_device_mdio(u32 phy_mask)
-+{
-+	switch (ar71xx_soc) {
-+	case AR71XX_SOC_AR7240:
-+	case AR71XX_SOC_AR7241:
-+	case AR71XX_SOC_AR7242:
-+		ar71xx_mdio_data.is_ar7240 = 1;
-+		break;
-+	default:
-+		break;
-+	}
-+
-+	ar71xx_mdio_data.phy_mask = phy_mask;
-+
-+	platform_device_register(&ar71xx_mdio_device);
-+}
-+
 +static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
 +{
 +	void __iomem *base;
@@ -1872,6 +1069,37 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +	iounmap(base);
 +}
 +
++void __init ar71xx_add_device_mdio(u32 phy_mask)
++{
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7240:
++		ar71xx_mdio_data.is_ar7240 = 1;
++		break;
++	case AR71XX_SOC_AR7241:
++		ar71xx_mdio_data.is_ar7240 = 1;
++		ar71xx_mdio_resources[0].start = AR71XX_GE1_BASE;
++		ar71xx_mdio_resources[0].end = AR71XX_GE1_BASE + 0x200 - 1;
++		break;
++	case AR71XX_SOC_AR7242:
++		ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG,
++			       AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000,
++			       AR71XX_ETH0_PLL_SHIFT);
++		break;
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		ar71xx_mdio_data.is_ar7240 = 1;
++		ar71xx_mdio_resources[0].start = AR71XX_GE1_BASE;
++		ar71xx_mdio_resources[0].end = AR71XX_GE1_BASE + 0x200 - 1;
++		break;
++	default:
++		break;
++	}
++
++	ar71xx_mdio_data.phy_mask = phy_mask;
++
++	platform_device_register(&ar71xx_mdio_device);
++}
++
 +struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
 +struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
 +
@@ -1934,6 +1162,14 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +	/* TODO */
 +}
 +
++static void ar7242_set_pll_ge0(int speed)
++{
++	u32 val = ar71xx_get_eth_pll(0, speed);
++
++	ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR7242_PLL_REG_ETH0_INT_CLOCK,
++		       val, AR71XX_ETH0_PLL_SHIFT);
++}
++
 +static void ar91xx_set_pll_ge0(int speed)
 +{
 +	u32 val = ar71xx_get_eth_pll(0, speed);
@@ -1950,6 +1186,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +			 val, AR91XX_ETH1_PLL_SHIFT);
 +}
 +
++static void ar933x_set_pll_ge0(int speed)
++{
++	/* TODO */
++}
++
++static void ar933x_set_pll_ge1(int speed)
++{
++	/* TODO */
++}
++
 +static void ar71xx_ddr_flush_ge0(void)
 +{
 +	ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
@@ -1980,6 +1226,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 +}
 +
++static void ar933x_ddr_flush_ge0(void)
++{
++	ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE0);
++}
++
++static void ar933x_ddr_flush_ge1(void)
++{
++	ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE1);
++}
++
 +static struct resource ar71xx_eth0_resources[] = {
 +	{
 +		.name	= "mac_base",
@@ -2054,10 +1310,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +#define AR724X_PLL_VAL_100	0x00001099
 +#define AR724X_PLL_VAL_10	0x00991099
 +
++#define AR7242_PLL_VAL_1000	0x1c000000
++#define AR7242_PLL_VAL_100	0x00000101
++#define AR7242_PLL_VAL_10	0x00001616
++
 +#define AR91XX_PLL_VAL_1000	0x1a000000
 +#define AR91XX_PLL_VAL_100	0x13000a44
 +#define AR91XX_PLL_VAL_10	0x00441099
 +
++#define AR933X_PLL_VAL_1000	0x00110000
++#define AR933X_PLL_VAL_100	0x00001099
++#define AR933X_PLL_VAL_10	0x00991099
++
 +static void __init ar71xx_init_eth_pll_data(unsigned int id)
 +{
 +	struct ar71xx_eth_pll_data *pll_data;
@@ -2085,18 +1349,31 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
-+	case AR71XX_SOC_AR7242:
 +		pll_10 = AR724X_PLL_VAL_10;
 +		pll_100 = AR724X_PLL_VAL_100;
 +		pll_1000 = AR724X_PLL_VAL_1000;
 +		break;
 +
++	case AR71XX_SOC_AR7242:
++		pll_10 = AR7242_PLL_VAL_10;
++		pll_100 = AR7242_PLL_VAL_100;
++		pll_1000 = AR7242_PLL_VAL_1000;
++		break;
++
 +	case AR71XX_SOC_AR9130:
 +	case AR71XX_SOC_AR9132:
 +		pll_10 = AR91XX_PLL_VAL_10;
 +		pll_100 = AR91XX_PLL_VAL_100;
 +		pll_1000 = AR91XX_PLL_VAL_1000;
 +		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		pll_10 = AR933X_PLL_VAL_10;
++		pll_100 = AR933X_PLL_VAL_100;
++		pll_1000 = AR933X_PLL_VAL_1000;
++		break;
++
 +	default:
 +		BUG();
 +	}
@@ -2180,17 +1457,47 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +		pdata->has_gbit = 1;
 +		break;
 +
-+	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
++		ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO |
++					      RESET_MODULE_GE0_PHY;
++		ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO |
++					      RESET_MODULE_GE1_PHY;
++		pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
++				      : ar724x_ddr_flush_ge0;
++		pdata->set_pll =  id ? ar724x_set_pll_ge1
++				     : ar7242_set_pll_ge0;
++		pdata->has_gbit = 1;
++		pdata->is_ar724x = 1;
++
++		if (!pdata->fifo_cfg1)
++			pdata->fifo_cfg1 = 0x0010ffff;
++		if (!pdata->fifo_cfg2)
++			pdata->fifo_cfg2 = 0x015500aa;
++		if (!pdata->fifo_cfg3)
++			pdata->fifo_cfg3 = 0x01f00140;
++		break;
++
++	case AR71XX_SOC_AR7241:
 +		ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO;
 +		ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO;
 +		/* fall through */
 +	case AR71XX_SOC_AR7240:
++		ar71xx_eth0_data.reset_bit |= RESET_MODULE_GE0_PHY;
++		ar71xx_eth1_data.reset_bit |= RESET_MODULE_GE1_PHY;
 +		pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
 +				      : ar724x_ddr_flush_ge0;
 +		pdata->set_pll =  id ? ar724x_set_pll_ge1
 +				     : ar724x_set_pll_ge0;
 +		pdata->is_ar724x = 1;
++		if (ar71xx_soc == AR71XX_SOC_AR7240)
++			pdata->is_ar7240 = 1;
++
++		if (!pdata->fifo_cfg1)
++			pdata->fifo_cfg1 = 0x0010ffff;
++		if (!pdata->fifo_cfg2)
++			pdata->fifo_cfg2 = 0x015500aa;
++		if (!pdata->fifo_cfg3)
++			pdata->fifo_cfg3 = 0x01f00140;
 +		break;
 +
 +	case AR71XX_SOC_AR9130:
@@ -2210,6 +1517,27 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +		pdata->has_gbit = 1;
 +		break;
 +
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		ar71xx_eth0_data.reset_bit = AR933X_RESET_GE0_MAC |
++					     AR933X_RESET_GE0_MDIO;
++		ar71xx_eth1_data.reset_bit = AR933X_RESET_GE1_MAC |
++					     AR933X_RESET_GE1_MDIO;
++		pdata->ddr_flush = id ? ar933x_ddr_flush_ge1
++				      : ar933x_ddr_flush_ge0;
++		pdata->set_pll =  id ? ar933x_set_pll_ge1
++				     : ar933x_set_pll_ge0;
++		pdata->has_gbit = 1;
++		pdata->is_ar724x = 1;
++
++		if (!pdata->fifo_cfg1)
++			pdata->fifo_cfg1 = 0x0010ffff;
++		if (!pdata->fifo_cfg2)
++			pdata->fifo_cfg2 = 0x015500aa;
++		if (!pdata->fifo_cfg3)
++			pdata->fifo_cfg3 = 0x01f00140;
++		break;
++
 +	default:
 +		BUG();
 +	}
@@ -2227,10 +1555,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +		break;
 +	}
 +
-+	if (is_valid_ether_addr(ar71xx_mac_base)) {
-+		memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
-+		pdata->mac_addr[5] += ar71xx_eth_instance;
-+	} else {
++	if (!is_valid_ether_addr(pdata->mac_addr)) {
 +		random_ether_addr(pdata->mac_addr);
 +		printk(KERN_DEBUG
 +			"ar71xx: using random MAC address for eth%d\n",
@@ -2317,10 +1642,31 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.c linux-2.6.39/arch/mips/ar
 +	return 1;
 +}
 +__setup("kmac=", ar71xx_kmac_setup);
++
++void __init ar71xx_init_mac(unsigned char *dst, const unsigned char *src,
++			    unsigned offset)
++{
++	u32 t;
++
++	if (!is_valid_ether_addr(src)) {
++		memset(dst, '\0', ETH_ALEN);
++		return;
++	}
++
++	t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]);
++	t += offset;
++
++	dst[0] = src[0];
++	dst[1] = src[1];
++	dst[2] = src[2];
++	dst[3] = (t >> 16) & 0xff;
++	dst[4] = (t >> 8) & 0xff;
++	dst[5] = t & 0xff;
++}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.h linux-2.6.39/arch/mips/ar71xx/devices.h
 --- linux-2.6.39.orig/arch/mips/ar71xx/devices.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/devices.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,48 @@
++++ linux-2.6.39/arch/mips/ar71xx/devices.h	2011-08-24 02:41:55.347990727 +0200
+@@ -0,0 +1,50 @@
 +/*
 + *  Atheros AR71xx SoC device definitions
 + *
@@ -2343,8 +1689,10 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.h linux-2.6.39/arch/mips/ar
 +			   struct spi_board_info const *info,
 +			   unsigned n) __init;
 +
-+void ar71xx_set_mac_base(unsigned char *mac) __init;
++extern unsigned char ar71xx_mac_base[] __initdata;
 +void ar71xx_parse_mac_addr(char *mac_str) __init;
++void ar71xx_init_mac(unsigned char *dst, const unsigned char *src,
++		     unsigned offset) __init;
 +
 +struct ar71xx_eth_pll_data {
 +	u32	pll_10;
@@ -2369,48 +1717,610 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/devices.h linux-2.6.39/arch/mips/ar
 +void ar71xx_add_device_wdt(void) __init;
 +
 +#endif /* __AR71XX_DEVICES_H */
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/early_printk.c linux-2.6.39/arch/mips/ar71xx/early_printk.c
---- linux-2.6.39.orig/arch/mips/ar71xx/early_printk.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/early_printk.c	2011-05-27 14:36:51.000000000 +0200
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.c linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.c	2011-08-24 02:41:55.347990727 +0200
+@@ -0,0 +1,57 @@
++/*
++ *  Atheros AR71xx GPIO LED device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include "dev-leds-gpio.h"
++
++void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
++					struct gpio_led *leds)
++{
++	struct platform_device *pdev;
++	struct gpio_led_platform_data pdata;
++	struct gpio_led *p;
++	int err;
++
++	p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
++	if (!p)
++		return;
++
++	memcpy(p, leds, num_leds * sizeof(*p));
++
++	pdev = platform_device_alloc("leds-gpio", id);
++	if (!pdev)
++		goto err_free_leds;
++
++	memset(&pdata, 0, sizeof(pdata));
++	pdata.num_leds = num_leds;
++	pdata.leds = p;
++
++	err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
++	if (err)
++		goto err_put_pdev;
++
++	err = platform_device_add(pdev);
++	if (err)
++		goto err_put_pdev;
++
++	return;
++
++err_put_pdev:
++	platform_device_put(pdev);
++
++err_free_leds:
++	kfree(p);
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.h linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-leds-gpio.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-leds-gpio.h	2011-08-24 02:41:55.367990903 +0200
+@@ -0,0 +1,21 @@
++/*
++ *  Atheros AR71xx GPIO LED device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_LEDS_GPIO_H
++#define _AR71XX_DEV_LEDS_GPIO_H
++
++#include <linux/leds.h>
++
++void ar71xx_add_device_leds_gpio(int id,
++				 unsigned num_leds,
++				 struct gpio_led *leds) __init;
++
++#endif /* _AR71XX_DEV_LEDS_GPIO_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.c linux-2.6.39/arch/mips/ar71xx/dev-m25p80.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-m25p80.c	2011-08-24 02:41:55.367990903 +0200
 @@ -0,0 +1,30 @@
 +/*
-+ *  Atheros AR71xx SoC early printk support
++ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/init.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
++
++#include "devices.h"
++#include "dev-m25p80.h"
++
++static struct spi_board_info ar71xx_spi_info[] = {
++	{
++		.bus_num	= 0,
++		.chip_select	= 0,
++		.max_speed_hz	= 25000000,
++		.modalias	= "m25p80",
++	}
++};
++
++void __init ar71xx_add_device_m25p80(struct flash_platform_data *pdata)
++{
++	ar71xx_spi_info[0].platform_data = pdata;
++	ar71xx_add_device_spi(NULL, ar71xx_spi_info,
++			      ARRAY_SIZE(ar71xx_spi_info));
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.h linux-2.6.39/arch/mips/ar71xx/dev-m25p80.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-m25p80.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-m25p80.h	2011-08-24 02:41:55.377990515 +0200
+@@ -0,0 +1,16 @@
++/*
++ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_M25P80_H
++#define _AR71XX_DEV_M25P80_H
++
++#include <linux/spi/flash.h>
++
++void ar71xx_add_device_m25p80(struct flash_platform_data *pdata) __init;
++
++#endif /* _AR71XX_DEV_M25P80_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.c linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.c	2011-08-24 02:41:55.377990515 +0200
+@@ -0,0 +1,40 @@
++/*
++ *  Atheros PB42 reference board PCI initialization
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++#include "dev-pb42-pci.h"
++
++static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
++	{
++		.slot	= 0,
++		.pin	= 1,
++		.irq	= AR71XX_PCI_IRQ_DEV0,
++	}, {
++		.slot	= 1,
++		.pin	= 1,
++		.irq	= AR71XX_PCI_IRQ_DEV1,
++	}, {
++		.slot	= 2,
++		.pin	= 1,
++		.irq	= AR71XX_PCI_IRQ_DEV2,
++	}
++};
++
++void __init pb42_pci_init(void)
++{
++	ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.h linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb42-pci.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-pb42-pci.h	2011-08-24 02:41:55.387991243 +0200
+@@ -0,0 +1,21 @@
++/*
++ *  Atheros PB42 reference board PCI initialization
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_PB42_PCI_H
++#define _AR71XX_DEV_PB42_PCI_H
++
++#if defined(CONFIG_AR71XX_DEV_PB42_PCI)
++void pb42_pci_init(void) __init;
++#else
++static inline void pb42_pci_init(void) { }
++#endif
++
++#endif /* _AR71XX_DEV_PB42_PCI_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.c linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.c	2011-08-24 02:41:55.387991243 +0200
+@@ -0,0 +1,33 @@
++/*
++ *  Atheros PB9x reference board PCI initialization
 + *
++ *  Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
 + *  by the Free Software Foundation.
 + */
 +
++#include <linux/pci.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++#include "dev-pb9x-pci.h"
++
++static struct ar71xx_pci_irq pb9x_pci_irqs[] __initdata = {
++	{
++		.slot	= 0,
++		.pin	= 1,
++		.irq	= AR71XX_PCI_IRQ_DEV0,
++	}
++};
++
++void __init pb9x_pci_init(void)
++{
++	ar71xx_pci_init(ARRAY_SIZE(pb9x_pci_irqs), pb9x_pci_irqs);
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.h linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-pb9x-pci.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-pb9x-pci.h	2011-08-24 02:41:55.387991243 +0200
+@@ -0,0 +1,22 @@
++/*
++ *  Atheros PB9x reference board PCI initialization
++ *
++ *  Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_PB9X_PCI_H
++#define _AR71XX_DEV_PB9X_PCI_H
++
++#if defined(CONFIG_AR71XX_DEV_PB9X_PCI)
++void pb9x_pci_init(void) __init;
++#else
++static inline void pb9x_pci_init(void) { }
++#endif
++
++#endif /* _AR71XX_DEV_PB9X_PCI_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.c linux-2.6.39/arch/mips/ar71xx/dev-usb.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-usb.c	2011-08-24 02:41:55.417990329 +0200
+@@ -0,0 +1,199 @@
++/*
++ *  Atheros AR71xx USB host device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/platform_device.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/platform.h>
++
++#include "dev-usb.h"
++
++/*
++ * OHCI (USB full speed host controller)
++ */
++static struct resource ar71xx_ohci_resources[] = {
++	[0] = {
++		.start	= AR71XX_OHCI_BASE,
++		.end	= AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AR71XX_MISC_IRQ_OHCI,
++		.end	= AR71XX_MISC_IRQ_OHCI,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct resource ar7240_ohci_resources[] = {
++	[0] = {
++		.start	= AR7240_OHCI_BASE,
++		.end	= AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AR71XX_CPU_IRQ_USB,
++		.end	= AR71XX_CPU_IRQ_USB,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
++static struct platform_device ar71xx_ohci_device = {
++	.name		= "ar71xx-ohci",
++	.id		= -1,
++	.resource	= ar71xx_ohci_resources,
++	.num_resources	= ARRAY_SIZE(ar71xx_ohci_resources),
++	.dev = {
++		.dma_mask		= &ar71xx_ohci_dmamask,
++		.coherent_dma_mask	= DMA_BIT_MASK(32),
++	},
++};
++
++/*
++ * EHCI (USB high/full speed host controller)
++ */
++static struct resource ar71xx_ehci_resources[] = {
++	[0] = {
++		.start	= AR71XX_EHCI_BASE,
++		.end	= AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AR71XX_CPU_IRQ_USB,
++		.end	= AR71XX_CPU_IRQ_USB,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
++static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
++
++static struct platform_device ar71xx_ehci_device = {
++	.name		= "ar71xx-ehci",
++	.id		= -1,
++	.resource	= ar71xx_ehci_resources,
++	.num_resources	= ARRAY_SIZE(ar71xx_ehci_resources),
++	.dev = {
++		.dma_mask		= &ar71xx_ehci_dmamask,
++		.coherent_dma_mask	= DMA_BIT_MASK(32),
++		.platform_data		= &ar71xx_ehci_data,
++	},
++};
++
++#define AR71XX_USB_RESET_MASK \
++	(RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
++	| RESET_MODULE_USB_OHCI_DLL)
++
++#define AR7240_USB_RESET_MASK \
++	(RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
++
++static void __init ar71xx_usb_setup(void)
++{
++	ar71xx_device_stop(AR71XX_USB_RESET_MASK);
++	mdelay(1000);
++	ar71xx_device_start(AR71XX_USB_RESET_MASK);
++
++	/* Turning on the Buff and Desc swap bits */
++	ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
++
++	/* WAR for HW bug. Here it adjusts the duration between two SOFS */
++	ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
++
++	mdelay(900);
++
++	platform_device_register(&ar71xx_ohci_device);
++	platform_device_register(&ar71xx_ehci_device);
++}
++
++static void __init ar7240_usb_setup(void)
++{
++	ar71xx_device_stop(AR7240_USB_RESET_MASK);
++	mdelay(1000);
++	ar71xx_device_start(AR7240_USB_RESET_MASK);
++
++	/* WAR for HW bug. Here it adjusts the duration between two SOFS */
++	ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
++
++	ar71xx_ohci_device.resource = ar7240_ohci_resources;
++	ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
++	platform_device_register(&ar71xx_ohci_device);
++}
++
++static void __init ar7241_usb_setup(void)
++{
++	ar71xx_device_start(AR724X_RESET_USBSUS_OVERRIDE);
++	mdelay(10);
++
++	ar71xx_device_start(AR724X_RESET_USB_HOST);
++	mdelay(10);
++
++	ar71xx_device_start(AR724X_RESET_USB_PHY);
++	mdelay(10);
++
++	ar71xx_ehci_data.is_ar91xx = 1;
++	ar71xx_ehci_device.resource = ar7240_ohci_resources;
++	ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
++	platform_device_register(&ar71xx_ehci_device);
++}
++
++static void __init ar91xx_usb_setup(void)
++{
++	ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
++	mdelay(10);
++
++	ar71xx_device_start(RESET_MODULE_USB_HOST);
++	mdelay(10);
++
++	ar71xx_device_start(RESET_MODULE_USB_PHY);
++	mdelay(10);
++
++	ar71xx_ehci_data.is_ar91xx = 1;
++	platform_device_register(&ar71xx_ehci_device);
++}
++
++void __init ar71xx_add_device_usb(void)
++{
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7240:
++		ar7240_usb_setup();
++		break;
++
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++		ar7241_usb_setup();
++		break;
++
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++		ar71xx_usb_setup();
++		break;
++
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		ar91xx_usb_setup();
++		break;
++
++	default:
++		BUG();
++	}
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.h linux-2.6.39/arch/mips/ar71xx/dev-usb.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/dev-usb.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/dev-usb.h	2011-08-24 02:41:55.427989786 +0200
+@@ -0,0 +1,17 @@
++/*
++ *  Atheros AR71xx USB host device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_USB_H
++#define _AR71XX_DEV_USB_H
++
++void ar71xx_add_device_usb(void) __init;
++
++#endif /* _AR71XX_DEV_USB_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/early_printk.c linux-2.6.39/arch/mips/ar71xx/early_printk.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/early_printk.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/early_printk.c	2011-08-24 02:41:55.427989786 +0200
+@@ -0,0 +1,96 @@
++/*
++ *  Atheros AR7xxx/AR9xxx SoC early printk support
++ *
++ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/errno.h>
 +#include <linux/io.h>
 +#include <linux/serial_reg.h>
 +#include <asm/addrspace.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/ar933x_uart.h>
++
++static void (*_prom_putchar) (unsigned char);
++
++static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
++{
++	u32 t;
 +
-+#define UART_READ(r) \
-+	__raw_readl((void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE) + 4 * (r)))
++	do {
++		t = __raw_readl(reg);
++		if ((t & mask) == val)
++			break;
++	} while (1);
++}
 +
-+#define UART_WRITE(r, v) \
-+	__raw_writel((v), (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE) + 4*(r)))
++static void prom_putchar_ar71xx(unsigned char ch)
++{
++	void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
 +
-+void prom_putchar(unsigned char ch)
++	prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
++	__raw_writel(ch, base + UART_TX * 4);
++	prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
++}
++
++static void prom_putchar_ar933x(unsigned char ch)
 +{
-+	while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
-+	UART_WRITE(UART_TX, ch);
-+	while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
++	void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
++
++	prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
++			  AR933X_UART_DATA_TX_CSR);
++	__raw_writel(AR933X_UART_DATA_TX_CSR | ch, base + AR933X_UART_DATA_REG);
++	prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
++			  AR933X_UART_DATA_TX_CSR);
 +}
 +
++static void prom_putchar_dummy(unsigned char ch)
++{
++	/* nothing to do */
++}
++
++static void prom_putchar_init(void)
++{
++	void __iomem *base;
++	u32 id;
++
++	base = (void __iomem *)(KSEG1ADDR(AR71XX_RESET_BASE));
++	id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
++	id &= REV_ID_MAJOR_MASK;
++
++	switch (id) {
++	case REV_ID_MAJOR_AR71XX:
++	case REV_ID_MAJOR_AR7240:
++	case REV_ID_MAJOR_AR7241:
++	case REV_ID_MAJOR_AR7242:
++	case REV_ID_MAJOR_AR913X:
++	case REV_ID_MAJOR_AR9341:
++	case REV_ID_MAJOR_AR9342:
++	case REV_ID_MAJOR_AR9344:
++		_prom_putchar = prom_putchar_ar71xx;
++		break;
++
++	case REV_ID_MAJOR_AR9330:
++	case REV_ID_MAJOR_AR9331:
++		_prom_putchar = prom_putchar_ar933x;
++		break;
++
++	default:
++		_prom_putchar = prom_putchar_dummy;
++		break;
++	}
++}
++
++void prom_putchar(unsigned char ch)
++{
++	if (!_prom_putchar)
++		prom_putchar_init();
++
++	_prom_putchar(ch);
++}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/gpio.c linux-2.6.39/arch/mips/ar71xx/gpio.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/gpio.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/gpio.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,182 @@
++++ linux-2.6.39/arch/mips/ar71xx/gpio.c	2011-08-24 02:41:55.457989607 +0200
+@@ -0,0 +1,193 @@
 +/*
-+ *  Atheros AR71xx SoC GPIO API support
++ *  Atheros AR7XXX/AR9XXX SoC GPIO API support
 + *
-+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
 + *  This program is free software; you can redistribute it and/or modify it
@@ -2581,6 +2491,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/gpio.c linux-2.6.39/arch/mips/ar71x
 +		ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT;
 +		break;
 +
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		ar71xx_gpio_chip.ngpio = AR933X_GPIO_COUNT;
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		ar71xx_gpio_chip.ngpio = AR934X_GPIO_COUNT;
++		break;
++
 +	default:
 +		BUG();
 +	}
@@ -2591,15 +2512,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/gpio.c linux-2.6.39/arch/mips/ar71x
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx/irq.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/irq.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/irq.c	2011-06-01 13:50:58.000000000 +0200
-@@ -0,0 +1,293 @@
++++ linux-2.6.39/arch/mips/ar71xx/irq.c	2011-08-24 02:41:55.457989607 +0200
+@@ -0,0 +1,377 @@
 +/*
 + *  Atheros AR71xx SoC specific interrupt handling
 + *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.31 BSP
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -2616,8 +2539,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
-+static int ip2_flush_reg;
-+
 +static void ar71xx_gpio_irq_dispatch(void)
 +{
 +	void __iomem *base = ar71xx_gpio_base;
@@ -2634,13 +2555,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +
 +static void ar71xx_gpio_irq_unmask(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
 +	void __iomem *base = ar71xx_gpio_base;
 +	u32 t;
 +
-+	d->irq -= AR71XX_GPIO_IRQ_BASE;
-+
 +	t = __raw_readl(base + GPIO_REG_INT_ENABLE);
-+	__raw_writel(t | (1 << d->irq), base + GPIO_REG_INT_ENABLE);
++	__raw_writel(t | (1 << irq), base + GPIO_REG_INT_ENABLE);
 +
 +	/* flush write */
 +	(void) __raw_readl(base + GPIO_REG_INT_ENABLE);
@@ -2648,34 +2568,22 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +
 +static void ar71xx_gpio_irq_mask(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
 +	void __iomem *base = ar71xx_gpio_base;
 +	u32 t;
 +
-+	d->irq -= AR71XX_GPIO_IRQ_BASE;
-+
 +	t = __raw_readl(base + GPIO_REG_INT_ENABLE);
-+	__raw_writel(t & ~(1 << d->irq), base + GPIO_REG_INT_ENABLE);
++	__raw_writel(t & ~(1 << irq), base + GPIO_REG_INT_ENABLE);
 +
 +	/* flush write */
 +	(void) __raw_readl(base + GPIO_REG_INT_ENABLE);
 +}
 +
-+#if 0
-+static int ar71xx_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
-+{
-+	/* TODO: implement */
-+	return 0;
-+}
-+#else
-+#define ar71xx_gpio_irq_set_type	NULL
-+#endif
-+
 +static struct irq_chip ar71xx_gpio_irq_chip = {
 +	.name		= "AR71XX GPIO",
-+	.irq_unmask		= ar71xx_gpio_irq_unmask,
-+	.irq_mask		= ar71xx_gpio_irq_mask,
++	.irq_unmask	= ar71xx_gpio_irq_unmask,
++	.irq_mask	= ar71xx_gpio_irq_mask,
 +	.irq_mask_ack	= ar71xx_gpio_irq_mask,
-+	.irq_set_type	= ar71xx_gpio_irq_set_type,
 +};
 +
 +static struct irqaction ar71xx_gpio_irqaction = {
@@ -2683,7 +2591,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +	.name		= "cascade [AR71XX GPIO]",
 +};
 +
-+#define GPIO_IRQ_INIT_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH)
 +#define GPIO_INT_ALL	0xffff
 +
 +static void __init ar71xx_gpio_irq_init(void)
@@ -2701,10 +2608,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +	__raw_writel(GPIO_INT_ALL, base + GPIO_REG_INT_POLARITY);
 +
 +	for (i = AR71XX_GPIO_IRQ_BASE;
-+	     i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++) {
++	     i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
 +		irq_set_chip_and_handler(i, &ar71xx_gpio_irq_chip,
 +					 handle_level_irq);
-+	}
 +
 +	setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
 +}
@@ -2740,19 +2646,33 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +	else if (pending & MISC_INT_WDOG)
 +		do_IRQ(AR71XX_MISC_IRQ_WDOG);
 +
++	else if (pending & MISC_INT_TIMER2)
++		do_IRQ(AR71XX_MISC_IRQ_TIMER2);
++
++	else if (pending & MISC_INT_TIMER3)
++		do_IRQ(AR71XX_MISC_IRQ_TIMER3);
++
++	else if (pending & MISC_INT_TIMER4)
++		do_IRQ(AR71XX_MISC_IRQ_TIMER4);
++
++	else if (pending & MISC_INT_DDR_PERF)
++		do_IRQ(AR71XX_MISC_IRQ_DDR_PERF);
++
++	else if (pending & MISC_INT_ENET_LINK)
++		do_IRQ(AR71XX_MISC_IRQ_ENET_LINK);
++
 +	else
 +		spurious_interrupt();
 +}
 +
 +static void ar71xx_misc_irq_unmask(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
 +	void __iomem *base = ar71xx_reset_base;
 +	u32 t;
 +
-+	d->irq -= AR71XX_MISC_IRQ_BASE;
-+
 +	t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-+	__raw_writel(t | (1 << d->irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
++	__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
 +
 +	/* flush write */
 +	(void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
@@ -2760,25 +2680,23 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +
 +static void ar71xx_misc_irq_mask(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
 +	void __iomem *base = ar71xx_reset_base;
 +	u32 t;
 +
-+	d->irq -= AR71XX_MISC_IRQ_BASE;
-+
 +	t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
-+	__raw_writel(t & ~(1 << d->irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
++	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
 +
 +	/* flush write */
 +	(void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
 +}
 +
-+static void ar724x_misc_irq_ack(unsigned int irq)
++static void ar724x_misc_irq_ack(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
 +	void __iomem *base = ar71xx_reset_base;
 +	u32 t;
 +
-+	irq -= AR71XX_MISC_IRQ_BASE;
-+
 +	t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
 +	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
 +
@@ -2788,8 +2706,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +
 +static struct irq_chip ar71xx_misc_irq_chip = {
 +	.name		= "AR71XX MISC",
-+	.irq_unmask		= ar71xx_misc_irq_unmask,
-+	.irq_mask		= ar71xx_misc_irq_mask,
++	.irq_unmask	= ar71xx_misc_irq_unmask,
++	.irq_mask	= ar71xx_misc_irq_mask,
 +};
 +
 +static struct irqaction ar71xx_misc_irqaction = {
@@ -2809,6 +2727,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
 +		ar71xx_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
 +		break;
 +	default:
@@ -2817,14 +2740,82 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +	}
 +
 +	for (i = AR71XX_MISC_IRQ_BASE;
-+	     i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
++	     i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
 +		irq_set_chip_and_handler(i, &ar71xx_misc_irq_chip,
 +					 handle_level_irq);
-+	}
 +
 +	setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
 +}
 +
++/*
++ * The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for
++ * these devices typically allocate coherent DMA memory, however the
++ * DMA controller may still have some unsynchronized data in the FIFO.
++ * Issue a flush in the handlers to ensure that the driver sees
++ * the update.
++ */
++static void ar71xx_ip2_handler(void)
++{
++	ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_PCI);
++	do_IRQ(AR71XX_CPU_IRQ_IP2);
++}
++
++static void ar724x_ip2_handler(void)
++{
++	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE);
++	do_IRQ(AR71XX_CPU_IRQ_IP2);
++}
++
++static void ar913x_ip2_handler(void)
++{
++	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC);
++	do_IRQ(AR71XX_CPU_IRQ_IP2);
++}
++
++static void ar933x_ip2_handler(void)
++{
++	ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_WMAC);
++	do_IRQ(AR71XX_CPU_IRQ_IP2);
++}
++
++static void ar934x_ip2_handler(void)
++{
++	ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_PCIE);
++	do_IRQ(AR71XX_CPU_IRQ_IP2);
++}
++
++static void ar71xx_ip3_handler(void)
++{
++	ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_USB);
++	do_IRQ(AR71XX_CPU_IRQ_USB);
++}
++
++static void ar724x_ip3_handler(void)
++{
++	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_USB);
++	do_IRQ(AR71XX_CPU_IRQ_USB);
++}
++
++static void ar913x_ip3_handler(void)
++{
++	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_USB);
++	do_IRQ(AR71XX_CPU_IRQ_USB);
++}
++
++static void ar933x_ip3_handler(void)
++{
++	ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_USB);
++	do_IRQ(AR71XX_CPU_IRQ_USB);
++}
++
++static void ar934x_ip3_handler(void)
++{
++	do_IRQ(AR71XX_CPU_IRQ_USB);
++}
++
++static void (*ip2_handler)(void);
++static void (*ip3_handler)(void);
++
 +asmlinkage void plat_irq_dispatch(void)
 +{
 +	unsigned long pending;
@@ -2834,17 +2825,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +	if (pending & STATUSF_IP7)
 +		do_IRQ(AR71XX_CPU_IRQ_TIMER);
 +
-+	else if (pending & STATUSF_IP2) {
-+		/*
-+		 * This IRQ is meant for a PCI device. Drivers for PCI devices
-+		 * typically allocate coherent DMA memory for the descriptor
-+		 * ring, however the DMA controller may still have some
-+		 * unsynchronized data in the FIFO.
-+		 * Issue a flush here to ensure that the driver sees the update.
-+		 */
-+		ar71xx_ddr_flush(ip2_flush_reg);
-+		do_IRQ(AR71XX_CPU_IRQ_IP2);
-+	}
++	else if (pending & STATUSF_IP2)
++		ip2_handler();
 +
 +	else if (pending & STATUSF_IP4)
 +		do_IRQ(AR71XX_CPU_IRQ_GE0);
@@ -2853,31 +2835,54 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +		do_IRQ(AR71XX_CPU_IRQ_GE1);
 +
 +	else if (pending & STATUSF_IP3)
-+		do_IRQ(AR71XX_CPU_IRQ_USB);
++		ip3_handler();
 +
 +	else if (pending & STATUSF_IP6)
 +		ar71xx_misc_irq_dispatch();
 +
-+	else
-+		spurious_interrupt();
++	spurious_interrupt();
 +}
 +
 +void __init arch_init_irq(void)
 +{
-+	switch(ar71xx_soc) {
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++		ip2_handler = ar71xx_ip2_handler;
++		ip3_handler = ar71xx_ip3_handler;
++		break;
++
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
-+		ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
++		ip2_handler = ar724x_ip2_handler;
++		ip3_handler = ar724x_ip3_handler;
 +		break;
++
 +	case AR71XX_SOC_AR9130:
 +	case AR71XX_SOC_AR9132:
-+		ip2_flush_reg = AR91XX_DDR_REG_FLUSH_WMAC;
++		ip2_handler = ar913x_ip2_handler;
++		ip3_handler = ar913x_ip3_handler;
 +		break;
-+	default:
-+		ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		ip2_handler = ar933x_ip2_handler;
++		ip3_handler = ar933x_ip3_handler;
 +		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		ip2_handler = ar934x_ip2_handler;
++		ip3_handler = ar934x_ip3_handler;
++		break;
++
++	default:
++		BUG();
 +	}
++
 +	mips_cpu_irq_init();
 +
 +	ar71xx_misc_irq_init();
@@ -2886,10 +2891,683 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/irq.c linux-2.6.39/arch/mips/ar71xx
 +
 +	ar71xx_gpio_irq_init();
 +}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/Kconfig linux-2.6.39/arch/mips/ar71xx/Kconfig
+--- linux-2.6.39.orig/arch/mips/ar71xx/Kconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/Kconfig	2011-08-24 04:20:27.209240389 +0200
+@@ -0,0 +1,420 @@
++if ATHEROS_AR71XX
++
++menu "Atheros AR71xx machine selection"
++
++config AR71XX_MACH_AP81
++	bool "Atheros AP81 board support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_AP83
++	bool "Atheros AP83 board support"
++	select SOC_AR913X
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_AP96
++	bool "Atheros AP96 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP94_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_AP121
++	bool "Atheros AP121 board support"
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	select AR71XX_DEV_AR9XXX_WMAC
++	select SOC_AR933X
++	default n
++
++config AR71XX_MACH_DB120
++	bool "Atheros DB120 board support"
++	select SOC_AR934X
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_DB120_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_DIR_600_A1
++	bool "D-Link DIR-600 rev. A1 support"
++	select SOC_AR724X
++	select AR71XX_DEV_AP91_PCI if PCI
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_NVRAM
++	default n
++
++config AR71XX_MACH_DIR_615_C1
++	bool "D-Link DIR-615 rev. C1 support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_NVRAM
++	default n
++
++config AR71XX_MACH_DIR_825_B1
++	bool "D-Link DIR-825 rev. B1 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP94_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_JA76PF
++	bool "jjPlus JA76PF board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_JWAP003
++	bool "jjPlus JWAP003 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_PB42
++	bool "Atheros PB42 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB42_PCI if PCI
++	default n
++
++config AR71XX_MACH_PB44
++	bool "Atheros PB44 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_PB92
++	bool "Atheros PB92 board support"
++	select SOC_AR724X
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB9X_PCI if PCI
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_AW_NR580
++	bool "AzureWave AW-NR580 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_WZR_HP_AG300H
++	bool "Buffalo WZR-HP-AG300H board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_WZR_HP_G300NH
++	bool "Buffalo WZR-HP-G300NH board support"
++	select SOC_AR913X
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	select RTL8366_SMI
++	default n
++
++config AR71XX_MACH_WP543
++	bool "Compex WP543/WPJ543 board support"
++	select SOC_AR71XX
++	select MYLOADER
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_WRT160NL
++	bool "Linksys WRT160NL board support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	select AR71XX_NVRAM
++	default n
++
++config AR71XX_MACH_WRT400N
++	bool "Linksys WRT400N board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_AP94_PCI if PCI
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_RB4XX
++	bool "MikroTik RouterBOARD 4xx series support"
++	select SOC_AR71XX
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_RB750
++	bool "MikroTik RouterBOARD 750 support"
++	select SOC_AR724X
++	default n
++
++config AR71XX_MACH_WNDR3700
++	bool "NETGEAR WNDR3700 board support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP94_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_WNR2000
++	bool "NETGEAR WNR2000 board support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_MZK_W04NU
++	bool "Planex MZK-W04NU board support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_MZK_W300NH
++	bool "Planex MZK-W300NH board support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_NBG460N
++	bool "Zyxel NBG460N/550N/550NH board support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_TL_MR3X20
++	bool "TP-LINK TL-MR3220/3420 support"
++	select SOC_AR724X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP91_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_TL_WA901ND
++	bool "TP-LINK TL-WA901ND support"
++	select SOC_AR724X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP91_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_TL_WA901ND_V2
++	bool "TP-LINK TL-WA901ND v2 support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_TL_WR741ND
++	bool "TP-LINK TL-WR741ND support"
++	select SOC_AR724X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP91_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_TL_WR841N_V1
++	bool "TP-LINK TL-WR841N v1 support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_DSA
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_TL_WR941ND
++	bool "TP-LINK TL-WR941ND support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_DSA
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_TL_WR1043ND
++	bool "TP-LINK TL-WR1043ND support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_TEW_632BRP
++	bool "TRENDnet TEW-632BRP support"
++	select SOC_AR913X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AR9XXX_WMAC
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_NVRAM
++	default n
++
++config AR71XX_MACH_UBNT
++	bool "Ubiquiti AR71xx based boards support"
++	select SOC_AR71XX
++	select SOC_AR724X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP91_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	select AR71XX_DEV_PB42_PCI if PCI
++	select AR71XX_DEV_USB
++	default n
++
++config AR71XX_MACH_EAP7660D
++	bool "Senao EAP7660D support"
++	select SOC_AR71XX
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++config AR71XX_MACH_ZCN_1523H
++	bool "Zcomax ZCN-1523H support"
++	select SOC_AR724X
++	select AR71XX_DEV_M25P80
++	select AR71XX_DEV_AP91_PCI if PCI
++	select AR71XX_DEV_GPIO_BUTTONS
++	select AR71XX_DEV_LEDS_GPIO
++	default n
++
++endmenu
++
++config SOC_AR71XX
++	bool
++	select USB_ARCH_HAS_EHCI
++	select USB_ARCH_HAS_OHCI
++
++config SOC_AR724X
++	bool
++	select USB_ARCH_HAS_EHCI
++	select USB_ARCH_HAS_OHCI
++
++config SOC_AR913X
++	bool
++	select USB_ARCH_HAS_EHCI
++
++config SOC_AR934X
++	bool
++	select USB_ARCH_HAS_EHCI
++
++config AR71XX_DEV_M25P80
++	def_bool n
++
++config AR71XX_DEV_AP91_PCI
++	select AR71XX_PCI_ATH9K_FIXUP
++	def_bool n
++
++config AR71XX_DEV_AP94_PCI
++	select AR71XX_PCI_ATH9K_FIXUP
++	def_bool n
++
++config AR71XX_DEV_AR9XXX_WMAC
++	def_bool n
++
++config AR71XX_DEV_DB120_PCI
++	select AR71XX_PCI_ATH9K_FIXUP
++	def_bool n
++
++config AR71XX_DEV_DSA
++	def_bool n
++
++config AR71XX_DEV_GPIO_BUTTONS
++	def_bool n
++
++config AR71XX_DEV_LEDS_GPIO
++	def_bool n
++
++config AR71XX_DEV_PB42_PCI
++	def_bool n
++
++config AR71XX_DEV_PB9X_PCI
++	def_bool n
++
++config AR71XX_DEV_USB
++	def_bool n
++
++config AR71XX_NVRAM
++	def_bool n
++
++config AR71XX_PCI_ATH9K_FIXUP
++	def_bool n
++
++config SOC_AR933X
++	bool
++	select USB_ARCH_HAS_EHCI
++
++endif
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap121.c linux-2.6.39/arch/mips/ar71xx/mach-ap121.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-ap121.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-ap121.c	2011-08-24 02:41:55.477989660 +0200
+@@ -0,0 +1,245 @@
++/*
++ *  Atheros AP121 board support
++ *
++ *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/spi/flash.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-ar9xxx-wmac.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-m25p80.h"
++#include "dev-usb.h"
++
++#define AP121_GPIO_LED_WLAN		0
++#define AP121_GPIO_LED_USB		1
++
++#define AP121_GPIO_BTN_JUMPSTART	11
++#define AP121_GPIO_BTN_RESET		12
++
++#define AP121_KEYS_POLL_INTERVAL	20	/* msecs */
++#define AP121_KEYS_DEBOUNCE_INTERVAL	(3 * AP121_KEYS_POLL_INTERVAL)
++
++#define AP121_MAC0_OFFSET	0x0000
++#define AP121_MAC1_OFFSET	0x0006
++#define AP121_CALDATA_OFFSET	0x1000
++#define AP121_WMAC_MAC_OFFSET	0x1002
++
++#define AP121_MINI_GPIO_LED_WLAN	0
++#define AP121_MINI_GPIO_BTN_JUMPSTART	12
++#define AP121_MINI_GPIO_BTN_RESET	11
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition ap121_parts[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	},
++	{
++		.name		= "rootfs",
++		.offset		= 0x010000,
++		.size		= 0x130000,
++	},
++	{
++		.name		= "uImage",
++		.offset		= 0x140000,
++		.size		= 0x0a0000,
++	},
++	{
++		.name		= "NVRAM",
++		.offset		= 0x1e0000,
++		.size		= 0x010000,
++	},
++	{
++		.name		= "ART",
++		.offset		= 0x1f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	},
++};
++#define ap121_nr_parts		ARRAY_SIZE(ap121_parts)
++
++static struct mtd_partition ap121_mini_parts[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x040000,
++		.mask_flags	= MTD_WRITEABLE,
++	},
++	{
++		.name		= "u-boot-env",
++		.offset		= 0x040000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	},
++	{
++		.name		= "rootfs",
++		.offset		= 0x050000,
++		.size		= 0x2b0000,
++	},
++	{
++		.name		= "uImage",
++		.offset		= 0x300000,
++		.size		= 0x0e0000,
++	},
++	{
++		.name		= "NVRAM",
++		.offset		= 0x3e0000,
++		.size		= 0x010000,
++	},
++	{
++		.name		= "ART",
++		.offset		= 0x3f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	},
++};
++
++#define ap121_mini_nr_parts	ARRAY_SIZE(ap121_parts)
++
++#else
++#define ap121_parts		NULL
++#define ap121_nr_parts		0
++#define ap121_mini_parts	NULL
++#define ap121_mini_nr_parts	0
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data ap121_flash_data = {
++	.parts		= ap121_parts,
++	.nr_parts	= ap121_nr_parts,
++};
++
++static struct gpio_led ap121_leds_gpio[] __initdata = {
++	{
++		.name		= "ap121:green:usb",
++		.gpio		= AP121_GPIO_LED_USB,
++		.active_low	= 0,
++	},
++	{
++		.name		= "ap121:green:wlan",
++		.gpio		= AP121_GPIO_LED_WLAN,
++		.active_low	= 0,
++	},
++};
++
++static struct gpio_keys_button ap121_gpio_keys[] __initdata = {
++	{
++		.desc		= "jumpstart button",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= AP121_GPIO_BTN_JUMPSTART,
++		.active_low	= 1,
++	},
++	{
++		.desc		= "reset button",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= AP121_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_led ap121_mini_leds_gpio[] __initdata = {
++	{
++		.name		= "ap121:green:wlan",
++		.gpio		= AP121_MINI_GPIO_LED_WLAN,
++		.active_low	= 0,
++	},
++};
++
++static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = {
++	{
++		.desc		= "jumpstart button",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= AP121_MINI_GPIO_BTN_JUMPSTART,
++		.active_low	= 1,
++	},
++	{
++		.desc		= "reset button",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= AP121_MINI_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}
++};
++
++static void __init ap121_common_setup(void)
++{
++	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
++
++	ar71xx_add_device_m25p80(&ap121_flash_data);
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0);
++
++	/* WAN port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(4);
++
++	/* LAN ports */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++	ar71xx_eth1_data.has_ar7240_switch = 1;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++	ar71xx_add_device_eth(0);
++
++	ar9xxx_add_device_wmac(art + AP121_CALDATA_OFFSET,
++			       art + AP121_WMAC_MAC_OFFSET);
++}
++
++static void __init ap121_setup(void)
++{
++	ap121_flash_data.parts = ap121_parts;
++	ap121_flash_data.nr_parts = ap121_nr_parts;
++
++	ap121_common_setup();
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio),
++					ap121_leds_gpio);
++	ar71xx_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ap121_gpio_keys),
++					 ap121_gpio_keys);
++
++	ar71xx_add_device_usb();
++}
++
++static void __init ap121_mini_setup(void)
++{
++	ap121_flash_data.parts = ap121_mini_parts;
++	ap121_flash_data.nr_parts = ap121_mini_nr_parts;
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio),
++					ap121_mini_leds_gpio);
++	ar71xx_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ap121_mini_gpio_keys),
++					 ap121_mini_gpio_keys);
++
++	ap121_common_setup();
++}
++
++MIPS_MACHINE(AR71XX_MACH_AP121, "AP121", "Atheros AP121",
++	     ap121_setup);
++
++MIPS_MACHINE(AR71XX_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI",
++	     ap121_mini_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/ar71xx/mach-ap81.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-ap81.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,140 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-ap81.c	2011-08-24 02:41:55.477989660 +0200
+@@ -0,0 +1,142 @@
 +/*
 + *  Atheros AP81 board support
 + *
@@ -2909,7 +3587,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "dev-usb.h"
@@ -2922,7 +3600,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +#define AP81_GPIO_BTN_SW4	12
 +#define AP81_GPIO_BTN_SW1	21
 +
-+#define AP81_BUTTONS_POLL_INTERVAL	20
++#define AP81_KEYS_POLL_INTERVAL		20 /* msecs */
++#define AP81_KEYS_DEBOUNCE_INTERVAL	(3 * AP81_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition ap81_partitions[] = {
@@ -2931,19 +3610,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "u-boot-env",
 +		.offset		= 0x040000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x050000,
 +		.size		= 0x500000,
-+	} , {
++	}, {
 +		.name		= "uImage",
 +		.offset		= 0x550000,
 +		.size		= 0x100000,
-+	} , {
++	}, {
 +		.name		= "ART",
 +		.offset		= 0x650000,
 +		.size		= 0x1b0000,
@@ -2954,8 +3633,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +
 +static struct flash_platform_data ap81_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = ap81_partitions,
-+        .nr_parts       = ARRAY_SIZE(ap81_partitions),
++	.parts		= ap81_partitions,
++	.nr_parts	= ARRAY_SIZE(ap81_partitions),
 +#endif
 +};
 +
@@ -2979,19 +3658,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +	}
 +};
 +
-+static struct gpio_button ap81_gpio_buttons[] __initdata = {
++static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "sw1",
 +		.type		= EV_KEY,
 +		.code		= BTN_0,
-+		.threshold	= 3,
++		.debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= AP81_GPIO_BTN_SW1,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "sw4",
 +		.type		= EV_KEY,
 +		.code		= BTN_1,
-+		.threshold	= 3,
++		.debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= AP81_GPIO_BTN_SW4,
 +		.active_low	= 1,
 +	}
@@ -3001,14 +3680,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +{
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(eeprom);
 +	ar71xx_add_device_mdio(0x0);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +	ar71xx_eth0_data.has_ar8216 = 1;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.phy_mask = 0x10;
 +
@@ -3022,18 +3702,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap81.c linux-2.6.39/arch/mips/
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
 +					ap81_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, AP81_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(ap81_gpio_buttons),
-+					ap81_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ap81_gpio_keys),
++					 ap81_gpio_keys);
 +
-+	ar913x_add_device_wmac(eeprom, NULL);
++	ar9xxx_add_device_wmac(eeprom, NULL);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_AP81, "AP81", "Atheros AP81", ap81_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/ar71xx/mach-ap83.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-ap83.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,266 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-ap83.c	2011-08-24 02:41:55.477989660 +0200
+@@ -0,0 +1,267 @@
 +/*
 + *  Atheros AP83 board support
 + *
@@ -3058,7 +3738,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +
 +#include "machtype.h"
 +#include "devices.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "dev-usb.h"
@@ -3074,7 +3754,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +#define AP83_050_GPIO_VSC7385_MOSI	16
 +#define AP83_050_GPIO_VSC7385_SCK	17
 +
-+#define AP83_BUTTONS_POLL_INTERVAL	20
++#define AP83_KEYS_POLL_INTERVAL		20	/* msecs */
++#define AP83_KEYS_DEBOUNCE_INTERVAL	(3 * AP83_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition ap83_flash_partitions[] = {
@@ -3083,25 +3764,25 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "u-boot-env",
 +		.offset		= 0x040000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x060000,
 +		.size		= 0x140000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x1a0000,
 +		.size		= 0x650000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x7f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x060000,
 +		.size		= 0x790000,
@@ -3112,8 +3793,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +static struct ar91xx_flash_platform_data ap83_flash_data = {
 +	.width		= 2,
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = ap83_flash_partitions,
-+        .nr_parts       = ARRAY_SIZE(ap83_flash_partitions),
++	.parts		= ap83_flash_partitions,
++	.nr_parts	= ARRAY_SIZE(ap83_flash_partitions),
 +#endif
 +};
 +
@@ -3151,19 +3832,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +	},
 +};
 +
-+static struct gpio_button ap83_gpio_buttons[] __initdata = {
++static struct gpio_keys_button ap83_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "soft_reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= AP83_GPIO_BTN_RESET,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "jumpstart",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= AP83_GPIO_BTN_JUMPSTART,
 +		.active_low	= 1,
 +	}
@@ -3232,15 +3913,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +{
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(eeprom);
-+
 +	ar71xx_add_device_mdio(0xfffffffe);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.phy_mask = 0x1;
 +
 +	ar71xx_add_device_eth(0);
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth1_data.speed = SPEED_1000;
 +	ar71xx_eth1_data.duplex = DUPLEX_FULL;
@@ -3252,13 +3933,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio),
 +					ap83_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, AP83_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(ap83_gpio_buttons),
-+					ap83_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ap83_gpio_keys),
++					 ap83_gpio_keys);
 +
 +	ar71xx_add_device_usb();
 +
-+	ar913x_add_device_wmac(eeprom, NULL);
++	ar9xxx_add_device_wmac(eeprom, NULL);
 +
 +	platform_device_register(&ap83_flash_device);
 +
@@ -3267,7 +3948,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +
 +static void __init ap83_040_setup(void)
 +{
-+	ap83_flash_data.is_shared=1;
++	ap83_flash_data.is_shared = 1;
 +	ap83_generic_setup();
 +	platform_device_register(&ap83_040_spi_device);
 +}
@@ -3300,10 +3981,194 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap83.c linux-2.6.39/arch/mips/
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_AP83, "AP83", "Atheros AP83", ap83_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ap96.c linux-2.6.39/arch/mips/ar71xx/mach-ap96.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-ap96.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-ap96.c	2011-08-24 02:41:55.477989660 +0200
+@@ -0,0 +1,180 @@
++/*
++ *  Atheros AP96 board support
++ *
++ *  Copyright (C) 2009 Marco Porsch
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2010 Atheros Communications
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-ap94-pci.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-usb.h"
++
++#define AP96_GPIO_LED_12_GREEN		0
++#define AP96_GPIO_LED_3_GREEN		1
++#define AP96_GPIO_LED_2_GREEN		2
++#define AP96_GPIO_LED_WPS_GREEN		4
++#define AP96_GPIO_LED_5_GREEN		5
++#define AP96_GPIO_LED_4_ORANGE		6
++
++/* Reset button - next to the power connector */
++#define AP96_GPIO_BTN_RESET		3
++/* WPS button - next to a led on right */
++#define AP96_GPIO_BTN_WPS		8
++
++#define AP96_KEYS_POLL_INTERVAL		20	/* msecs */
++#define AP96_KEYS_DEBOUNCE_INTERVAL	(3 * AP96_KEYS_POLL_INTERVAL)
++
++#define AP96_WMAC0_MAC_OFFSET		0x120c
++#define AP96_WMAC1_MAC_OFFSET		0x520c
++#define AP96_CALDATA0_OFFSET		0x1000
++#define AP96_CALDATA1_OFFSET		0x5000
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition ap96_partitions[] = {
++	{
++		.name		= "uboot",
++		.offset		= 0,
++		.size		= 0x030000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "env",
++		.offset		= 0x030000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x040000,
++		.size		= 0x600000,
++	}, {
++		.name		= "uImage",
++		.offset		= 0x640000,
++		.size		= 0x1b0000,
++	}, {
++		.name		= "caldata",
++		.offset		= 0x7f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}
++};
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data ap96_flash_data = {
++#ifdef CONFIG_MTD_PARTITIONS
++	.parts		= ap96_partitions,
++	.nr_parts	= ARRAY_SIZE(ap96_partitions),
++#endif
++};
++
++/*
++ * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12
++ * below (from left to right on the board). Led 1 seems to be on whenever the
++ * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange;
++ * others are green.
++ *
++ * In addition, there is one led next to a button on the right side for WPS.
++ */
++static struct gpio_led ap96_leds_gpio[] __initdata = {
++	{
++		.name		= "ap96:green:led2",
++		.gpio		= AP96_GPIO_LED_2_GREEN,
++		.active_low	= 1,
++	}, {
++		.name		= "ap96:green:led3",
++		.gpio		= AP96_GPIO_LED_3_GREEN,
++		.active_low	= 1,
++	}, {
++		.name		= "ap96:orange:led4",
++		.gpio		= AP96_GPIO_LED_4_ORANGE,
++		.active_low	= 1,
++	}, {
++		.name		= "ap96:green:led5",
++		.gpio		= AP96_GPIO_LED_5_GREEN,
++		.active_low	= 1,
++	}, {
++		.name		= "ap96:green:led12",
++		.gpio		= AP96_GPIO_LED_12_GREEN,
++		.active_low	= 1,
++	}, { /* next to a button on right */
++		.name		= "ap96:green:wps",
++		.gpio		= AP96_GPIO_LED_WPS_GREEN,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_keys_button ap96_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= AP96_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}, {
++		.desc		= "wps",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= AP96_GPIO_BTN_WPS,
++		.active_low	= 1,
++	}
++};
++
++#define AP96_WAN_PHYMASK 0x10
++#define AP96_LAN_PHYMASK 0x0f
++
++static void __init ap96_setup(void)
++{
++	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
++
++	ar71xx_add_device_mdio(~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK));
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art, 0);
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth0_data.phy_mask = AP96_LAN_PHYMASK;
++	ar71xx_eth0_data.speed = SPEED_1000;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_eth(0);
++
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art, 1);
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth1_data.phy_mask = AP96_WAN_PHYMASK;
++
++	ar71xx_eth1_pll_data.pll_1000 = 0x1f000000;
++
++	ar71xx_add_device_eth(1);
++
++	ar71xx_add_device_usb();
++
++	ar71xx_add_device_m25p80(&ap96_flash_data);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio),
++					ap96_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ap96_gpio_keys),
++					 ap96_gpio_keys);
++
++	ap94_pci_init(art + AP96_CALDATA0_OFFSET,
++		      art + AP96_WMAC0_MAC_OFFSET,
++		      art + AP96_CALDATA1_OFFSET,
++		      art + AP96_WMAC1_MAC_OFFSET);
++}
++
++MIPS_MACHINE(AR71XX_MACH_AP96, "AP96", "Atheros AP96", ap96_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-aw-nr580.c linux-2.6.39/arch/mips/ar71xx/mach-aw-nr580.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-aw-nr580.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-aw-nr580.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,101 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-aw-nr580.c	2011-08-24 02:41:55.487989871 +0200
+@@ -0,0 +1,102 @@
 +/*
 + *  AzureWave AW-NR580 board support
 + *
@@ -3337,7 +4202,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-aw-nr580.c linux-2.6.39/arch/m
 +#define AW_NR580_GPIO_BTN_WPS		3
 +#define AW_NR580_GPIO_BTN_RESET		11
 +
-+#define AW_NR580_BUTTONS_POLL_INTERVAL	20
++#define AW_NR580_KEYS_POLL_INTERVAL	20	/* msecs */
++#define AW_NR580_KEYS_DEBOUNCE_INTERVAL	(3 * AW_NR580_KEYS_POLL_INTERVAL)
 +
 +static struct gpio_led aw_nr580_leds_gpio[] __initdata = {
 +	{
@@ -3363,19 +4229,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-aw-nr580.c linux-2.6.39/arch/m
 +	}
 +};
 +
-+static struct gpio_button aw_nr580_gpio_buttons[] __initdata = {
++static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= AW_NR580_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= AW_NR580_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}
@@ -3398,17 +4264,155 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-aw-nr580.c linux-2.6.39/arch/m
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio),
 +					aw_nr580_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, AW_NR580_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(aw_nr580_gpio_buttons),
-+					aw_nr580_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(aw_nr580_gpio_keys),
++					 aw_nr580_gpio_keys);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580",
 +	     aw_nr580_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-db120.c linux-2.6.39/arch/mips/ar71xx/mach-db120.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-db120.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-db120.c	2011-08-24 02:41:55.487989871 +0200
+@@ -0,0 +1,134 @@
++/*
++ *  Atheros DB120 board (WASP SoC) support
++ *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-usb.h"
++#include "dev-ar9xxx-wmac.h"
++#include "dev-db120-pci.h"
++
++#define DB120_GPIO_LED_USB	11
++#define DB120_GPIO_LED_WLAN_5G	12
++#define DB120_GPIO_LED_WLAN_2G	13
++#define DB120_GPIO_LED_STATUS	14
++#define DB120_GPIO_LED_WPS	15
++
++#define DB120_GPIO_BTN_SW1	16
++
++#define DB120_CALDATA_OFFSET	0x1000
++#define DB120_WMAC_MAC_OFFSET	0x1002
++
++#define DB120_KEYS_POLL_INTERVAL	20	/* msecs */
++#define DB120_KEYS_DEBOUNCE_INTERVAL	(3 * DB120_KEYS_POLL_INTERVAL)
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition db120_partitions[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x040000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "u-boot-env",
++		.offset		= 0x040000,
++		.size		= 0x010000,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x050000,
++		.size		= 0x630000,
++	}, {
++		.name		= "uImage",
++		.offset		= 0x680000,
++		.size		= 0x160000,
++	}, {
++		.name		= "NVRAM",
++		.offset		= 0x7E0000,
++		.size		= 0x010000,
++	}, {
++		.name		= "ART",
++		.offset		= 0x7F0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}
++};
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data db120_flash_data = {
++#ifdef CONFIG_MTD_PARTITIONS
++	.parts		= db120_partitions,
++	.nr_parts	= ARRAY_SIZE(db120_partitions),
++#endif
++};
++
++static struct gpio_led db120_leds_gpio[] __initdata = {
++	{
++		.name		= "db120:green:status",
++		.gpio		= DB120_GPIO_LED_STATUS,
++		.active_low	= 1,
++	}, {
++		.name		= "db120:green:wps",
++		.gpio		= DB120_GPIO_LED_WPS,
++		.active_low	= 1,
++	}, {
++		.name		= "db120:green:wlan-5g",
++		.gpio		= DB120_GPIO_LED_WLAN_5G,
++		.active_low	= 1,
++	}, {
++		.name		= "db120:green:wlan-2g",
++		.gpio		= DB120_GPIO_LED_WLAN_2G,
++		.active_low	= 1,
++	}, {
++		.name		= "db120:green:usb",
++		.gpio		= DB120_GPIO_LED_USB,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_keys_button db120_gpio_keys[] __initdata = {
++	{
++		.desc		= "sw1",
++		.type		= EV_KEY,
++		.code		= BTN_0,
++		.debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= DB120_GPIO_BTN_SW1,
++		.active_low	= 1,
++	}
++};
++
++static void __init db120_setup(void)
++{
++	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
++
++	ar71xx_add_device_usb();
++
++	ar71xx_add_device_m25p80(&db120_flash_data);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
++					db120_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(db120_gpio_keys),
++					 db120_gpio_keys);
++
++	ar9xxx_add_device_wmac(art + DB120_CALDATA_OFFSET,
++				art + DB120_WMAC_MAC_OFFSET);
++
++	db120_pci_init();
++}
++
++MIPS_MACHINE(AR71XX_MACH_DB120, "DB120", "Atheros DB120", db120_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch/mips/ar71xx/mach-dir-600-a1.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-dir-600-a1.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,138 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-dir-600-a1.c	2011-08-24 02:41:55.487989871 +0200
+@@ -0,0 +1,159 @@
 +/*
 + *  D-Link DIR-600 rev. A1 board support
 + *
@@ -3427,7 +4431,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ap91-eth.h"
 +#include "dev-ap91-pci.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
@@ -3440,7 +4443,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch
 +#define DIR_600_A1_GPIO_BTN_RESET		8
 +#define DIR_600_A1_GPIO_BTN_WPS			12
 +
-+#define DIR_600_A1_BUTTONS_POLL_INTERVAL	20
++#define DIR_600_A1_KEYS_POLL_INTERVAL	20	/* msecs */
++#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL)
 +
 +#define DIR_600_A1_NVRAM_ADDR	0x1f030000
 +#define DIR_600_A1_NVRAM_SIZE	0x10000
@@ -3484,8 +4488,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch
 +
 +static struct flash_platform_data dir_600_a1_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = dir_600_a1_partitions,
-+        .nr_parts       = ARRAY_SIZE(dir_600_a1_partitions),
++	.parts		= dir_600_a1_partitions,
++	.nr_parts	= ARRAY_SIZE(dir_600_a1_partitions),
 +#endif
 +};
 +
@@ -3503,19 +4507,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch
 +	}
 +};
 +
-+static struct gpio_button dir_600_a1_gpio_buttons[] __initdata = {
++static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= DIR_600_A1_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= DIR_600_A1_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}
@@ -3529,19 +4533,40 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch
 +	u8 *mac = NULL;
 +
 +	if (nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE,
-+			         "lan_mac=", mac_buff) == 0)
++				"lan_mac=", mac_buff) == 0) {
++		ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_buff, 0);
++		ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_buff, 1);
 +		mac = mac_buff;
++	}
 +
 +	ar71xx_add_device_m25p80(&dir_600_a1_flash_data);
 +
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
 +					dir_600_a1_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, DIR_600_A1_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(dir_600_a1_gpio_buttons),
-+					dir_600_a1_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(dir_600_a1_gpio_keys),
++					 dir_600_a1_gpio_keys);
++
++	ar71xx_eth1_data.has_ar7240_switch = 1;
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
++
++	/* WAN port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(4);
++
++	/* LAN ports */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++	ar71xx_add_device_eth(0);
 +
-+	ap91_eth_init(mac, NULL);
 +	ap91_pci_init(ee, mac);
 +}
 +
@@ -3549,8 +4574,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-600-a1.c linux-2.6.39/arch
 +	     dir_600_a1_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch/mips/ar71xx/mach-dir-615-c1.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-dir-615-c1.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,173 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-dir-615-c1.c	2011-08-24 02:41:55.487989871 +0200
+@@ -0,0 +1,175 @@
 +/*
 + *  D-Link DIR-615 rev C1 board support
 + *
@@ -3570,7 +4595,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "nvram.h"
@@ -3588,7 +4613,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +#define DIR_615C1_GPIO_BTN_WPS		12
 +#define DIR_615C1_GPIO_BTN_RESET	21
 +
-+#define DIR_615C1_BUTTONS_POLL_INTERVAL	20
++#define DIR_615C1_KEYS_POLL_INTERVAL	20	/* msecs */
++#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL)
 +
 +#define DIR_615C1_CONFIG_ADDR		0x1f020000
 +#define DIR_615C1_CONFIG_SIZE		0x10000
@@ -3600,24 +4626,24 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +		.offset		= 0,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "config",
 +		.offset		= 0x020000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x030000,
-+		.size		= 0x0d0000,
-+	} , {
++		.size		= 0x0e0000,
++	}, {
 +		.name		= "rootfs",
-+		.offset		= 0x100000,
-+		.size		= 0x2f0000,
-+	} , {
++		.offset		= 0x110000,
++		.size		= 0x2e0000,
++	}, {
 +		.name		= "art",
 +		.offset		= 0x3f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x030000,
 +		.size		= 0x3c0000,
@@ -3627,8 +4653,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +
 +static struct flash_platform_data dir_615c1_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = dir_615c1_partitions,
-+        .nr_parts       = ARRAY_SIZE(dir_615c1_partitions),
++	.parts		= dir_615c1_partitions,
++	.nr_parts	= ARRAY_SIZE(dir_615c1_partitions),
 +#endif
 +};
 +
@@ -3649,13 +4675,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +		.name		= "dir-615c1:green:wancpu",
 +		.gpio		= DIR_615C1_GPIO_LED_GREEN_WANCPU,
 +		.active_low	= 1,
-+        }, {
++	}, {
 +		.name		= "dir-615c1:green:wlan",
 +		.gpio		= DIR_615C1_GPIO_LED_GREEN_WLAN,
 +		.active_low	= 1,
-+        }, {
-+		.name           = "dir-615c1:green:status",
-+		.gpio           = DIR_615C1_GPIO_LED_GREEN_STATUS,
++	}, {
++		.name		= "dir-615c1:green:status",
++		.gpio		= DIR_615C1_GPIO_LED_GREEN_STATUS,
 +		.active_low     = 1,
 +	}, {
 +		.name		= "dir-615c1:orange:wan",
@@ -3665,18 +4691,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +
 +};
 +
-+static struct gpio_button dir_615c1_gpio_buttons[] __initdata = {
++static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= DIR_615C1_GPIO_BTN_RESET,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= DIR_615C1_GPIO_BTN_WPS,
 +	}
 +};
@@ -3694,8 +4720,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +	u8 *wlan_mac = NULL;
 +
 +	if (nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE,
-+			         "lan_mac=", mac) == 0) {
-+		ar71xx_set_mac_base(mac);
++					"lan_mac=", mac) == 0) {
++		ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++		ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
 +		wlan_mac = mac;
 +	}
 +
@@ -3715,19 +4742,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-615-c1.c linux-2.6.39/arch
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio),
 +					dir_615c1_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, DIR_615C1_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(dir_615c1_gpio_buttons),
-+					dir_615c1_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(dir_615c1_gpio_keys),
++					 dir_615c1_gpio_keys);
 +
-+	ar913x_add_device_wmac(eeprom, wlan_mac);
++	ar9xxx_add_device_wmac(eeprom, wlan_mac);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1",
 +	     dir_615c1_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch/mips/ar71xx/mach-dir-825-b1.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-dir-825-b1.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,192 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-dir-825-b1.c	2011-08-24 02:41:55.487989871 +0200
+@@ -0,0 +1,198 @@
 +/*
 + *  D-Link DIR-825 rev. B1 board support
 + *
@@ -3744,7 +4771,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/partitions.h>
 +#include <linux/delay.h>
-+#include <linux/rtl8366s.h>
++#include <linux/rtl8366.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
@@ -3759,17 +4786,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +#define DIR825B1_GPIO_LED_BLUE_USB		0
 +#define DIR825B1_GPIO_LED_ORANGE_POWER		1
 +#define DIR825B1_GPIO_LED_BLUE_POWER		2
-+#define DIR825B1_GPIO_LED_BLUE_POWERSAVE	4
++#define DIR825B1_GPIO_LED_BLUE_WPS		4
 +#define DIR825B1_GPIO_LED_ORANGE_PLANET		6
 +#define DIR825B1_GPIO_LED_BLUE_PLANET		11
 +
 +#define DIR825B1_GPIO_BTN_RESET			3
-+#define DIR825B1_GPIO_BTN_POWERSAVE		8
++#define DIR825B1_GPIO_BTN_WPS			8
 +
 +#define DIR825B1_GPIO_RTL8366_SDA		5
 +#define DIR825B1_GPIO_RTL8366_SCK		7
 +
-+#define DIR825B1_BUTTONS_POLL_INTERVAL		20
++#define DIR825B1_KEYS_POLL_INTERVAL		20	/* msecs */
++#define DIR825B1_KEYS_DEBOUNCE_INTERVAL		(3 * DIR825B1_KEYS_POLL_INTERVAL)
 +
 +#define DIR825B1_CAL_LOCATION_0			0x1f661000
 +#define DIR825B1_CAL_LOCATION_1			0x1f665000
@@ -3784,21 +4812,21 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "config",
 +		.offset		= 0x040000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x050000,
 +		.size		= 0x610000,
-+	} , {
++	}, {
 +		.name		= "caldata",
 +		.offset		= 0x660000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "unknown",
 +		.offset		= 0x670000,
 +		.size		= 0x190000,
@@ -3809,8 +4837,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +
 +static struct flash_platform_data dir825b1_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = dir825b1_partitions,
-+        .nr_parts       = ARRAY_SIZE(dir825b1_partitions),
++	.parts          = dir825b1_partitions,
++	.nr_parts       = ARRAY_SIZE(dir825b1_partitions),
 +#endif
 +};
 +
@@ -3828,8 +4856,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +		.gpio		= DIR825B1_GPIO_LED_BLUE_POWER,
 +		.active_low	= 1,
 +	}, {
-+		.name		= "dir825b1:blue:powersave",
-+		.gpio		= DIR825B1_GPIO_LED_BLUE_POWERSAVE,
++		.name		= "dir825b1:blue:wps",
++		.gpio		= DIR825B1_GPIO_LED_BLUE_WPS,
 +		.active_low	= 1,
 +	}, {
 +		.name		= "dir825b1:orange:planet",
@@ -3842,27 +4870,33 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +	}
 +};
 +
-+static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
++static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= DIR825B1_GPIO_BTN_RESET,
 +		.active_low	= 1,
-+	} , {
-+		.desc		= "powersave",
++	}, {
++		.desc		= "wps",
 +		.type		= EV_KEY,
-+		.code		= BTN_1,
-+		.threshold	= 3,
-+		.gpio		= DIR825B1_GPIO_BTN_POWERSAVE,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= DIR825B1_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}
 +};
 +
-+static struct rtl8366s_platform_data dir825b1_rtl8366s_data = {
-+	.gpio_sda        = DIR825B1_GPIO_RTL8366_SDA,
-+	.gpio_sck        = DIR825B1_GPIO_RTL8366_SCK,
++static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
++	{ .reg = 0x06, .val = 0x0108 },
++};
++
++static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
++	.gpio_sda	= DIR825B1_GPIO_RTL8366_SDA,
++	.gpio_sck	= DIR825B1_GPIO_RTL8366_SCK,
++	.num_initvals	= ARRAY_SIZE(dir825b1_rtl8366s_initvals),
++	.initvals	= dir825b1_rtl8366s_initvals,
 +};
 +
 +static struct platform_device dir825b1_rtl8366s_device = {
@@ -3875,22 +4909,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +
 +static void __init dir825b1_setup(void)
 +{
-+        u8 mac[6], i;
-+
-+	memcpy(mac, (u8*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
-+	for(i = 5; i >= 3; i--)
-+		if(++mac[i] != 0x00) break;
-+
-+	ar71xx_set_mac_base(mac);
++	u8 *mac = (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_1);
 +
 +	ar71xx_add_device_mdio(0x0);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1);
 +	ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.speed = SPEED_1000;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +	ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 2);
 +	ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth1_data.phy_mask = 0x10;
@@ -3904,14 +4934,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
 +					dir825b1_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(dir825b1_gpio_buttons),
-+					dir825b1_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(dir825b1_gpio_keys),
++					 dir825b1_gpio_keys);
 +
 +	ar71xx_add_device_usb();
 +
 +	platform_device_register(&dir825b1_rtl8366s_device);
 +
++	ap94_pci_setup_wmac_led_pin(0, 5);
++	ap94_pci_setup_wmac_led_pin(1, 5);
++
 +	ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
 +		      (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_0),
 +		      (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
@@ -3920,10 +4953,387 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-dir-825-b1.c linux-2.6.39/arch
 +
 +MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
 +	     dir825b1_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-eap7660d.c linux-2.6.39/arch/mips/ar71xx/mach-eap7660d.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-eap7660d.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-eap7660d.c	2011-08-24 02:41:55.497990784 +0200
+@@ -0,0 +1,180 @@
++/*
++ *  Senao EAP7660D board support
++ *
++ *  Copyright (C) 2010 Daniel Golle <daniel.golle@gmail.com>
++ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <linux/ath5k_platform.h>
++#include <linux/delay.h>
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-m25p80.h"
++
++#define EAP7660D_KEYS_POLL_INTERVAL	20	/* msecs */
++#define EAP7660D_KEYS_DEBOUNCE_INTERVAL	(3 * EAP7660D_KEYS_POLL_INTERVAL)
++
++#define EAP7660D_GPIO_DS4		7
++#define EAP7660D_GPIO_DS5		2
++#define EAP7660D_GPIO_DS7		0
++#define EAP7660D_GPIO_DS8		4
++#define EAP7660D_GPIO_SW1		3
++#define EAP7660D_GPIO_SW3		8
++#define EAP7660D_PHYMASK		BIT(20)
++#define EAP7660D_BOARDCONFIG		0x1F7F0000
++#define EAP7660D_GBIC_MAC_OFFSET	0x1000
++#define EAP7660D_WMAC0_MAC_OFFSET	0x1010
++#define EAP7660D_WMAC1_MAC_OFFSET	0x1016
++#define EAP7660D_WMAC0_CALDATA_OFFSET	0x2000
++#define EAP7660D_WMAC1_CALDATA_OFFSET	0x3000
++
++static struct ath5k_platform_data eap7660d_wmac0_data;
++static struct ath5k_platform_data eap7660d_wmac1_data;
++static char eap7660d_wmac0_mac[6];
++static char eap7660d_wmac1_mac[6];
++static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS];
++static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS];
++
++#ifdef CONFIG_PCI
++static struct ar71xx_pci_irq eap7660d_pci_irqs[] __initdata = {
++	{
++		.slot   = 0,
++		.pin    = 1,
++		.irq    = AR71XX_PCI_IRQ_DEV0,
++	}, {
++		.slot   = 1,
++		.pin    = 1,
++		.irq    = AR71XX_PCI_IRQ_DEV1,
++	}
++};
++
++static int eap7660d_pci_plat_dev_init(struct pci_dev *dev)
++{
++	switch (PCI_SLOT(dev->devfn)) {
++	case 17:
++		dev->dev.platform_data = &eap7660d_wmac0_data;
++		break;
++
++	case 18:
++		dev->dev.platform_data = &eap7660d_wmac1_data;
++		break;
++	}
++
++	return 0;
++}
++
++void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
++			      u8 *cal_data1, u8 *mac_addr1)
++{
++	if (cal_data0 && *cal_data0 == 0xa55a) {
++		memcpy(eap7660d_wmac0_eeprom, cal_data0,
++			ATH5K_PLAT_EEP_MAX_WORDS);
++		eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom;
++	}
++
++	if (cal_data1 && *cal_data1 == 0xa55a) {
++		memcpy(eap7660d_wmac1_eeprom, cal_data1,
++			ATH5K_PLAT_EEP_MAX_WORDS);
++		eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom;
++	}
++
++	if (mac_addr0) {
++		memcpy(eap7660d_wmac0_mac, mac_addr0,
++			sizeof(eap7660d_wmac0_mac));
++		eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac;
++	}
++
++	if (mac_addr1) {
++		memcpy(eap7660d_wmac1_mac, mac_addr1,
++			sizeof(eap7660d_wmac1_mac));
++		eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac;
++	}
++
++	ar71xx_pci_plat_dev_init = eap7660d_pci_plat_dev_init;
++	ar71xx_pci_init(ARRAY_SIZE(eap7660d_pci_irqs), eap7660d_pci_irqs);
++}
++#else
++static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
++				     u8 *cal_data1, u8 *mac_addr1)
++{
++}
++#endif /* CONFIG_PCI */
++
++static struct gpio_led eap7660d_leds_gpio[] __initdata = {
++	{
++		.name		= "eap7660d:green:ds8",
++		.gpio		= EAP7660D_GPIO_DS8,
++		.active_low	= 0,
++	},
++	{
++		.name		= "eap7660d:green:ds5",
++		.gpio		= EAP7660D_GPIO_DS5,
++		.active_low	= 0,
++	},
++	{
++		.name		= "eap7660d:green:ds7",
++		.gpio		= EAP7660D_GPIO_DS7,
++		.active_low	= 0,
++	},
++	{
++		.name		= "eap7660d:green:ds4",
++		.gpio		= EAP7660D_GPIO_DS4,
++		.active_low	= 0,
++	}
++};
++
++static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= EAP7660D_GPIO_SW1,
++		.active_low	= 1,
++	},
++	{
++		.desc		= "wps",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= EAP7660D_GPIO_SW3,
++		.active_low	= 1,
++	}
++};
++
++static void __init eap7660d_setup(void)
++{
++	u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG);
++
++	ar71xx_add_device_mdio(~EAP7660D_PHYMASK);
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr,
++			boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0);
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth0_data.phy_mask = EAP7660D_PHYMASK;
++	ar71xx_add_device_eth(0);
++	ar71xx_add_device_m25p80(NULL);
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio),
++					eap7660d_leds_gpio);
++	ar71xx_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(eap7660d_gpio_keys),
++					 eap7660d_gpio_keys);
++	eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET,
++			boardconfig + EAP7660D_WMAC0_MAC_OFFSET,
++			boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET,
++			boardconfig + EAP7660D_WMAC1_MAC_OFFSET);
++};
++
++MIPS_MACHINE(AR71XX_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D",
++	     eap7660d_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ja76pf.c linux-2.6.39/arch/mips/ar71xx/mach-ja76pf.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-ja76pf.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-ja76pf.c	2011-08-24 02:41:55.517989552 +0200
+@@ -0,0 +1,102 @@
++/*
++ *  jjPlus JA76PF board support
++ */
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <linux/platform_device.h>
++#include <linux/i2c.h>
++#include <linux/i2c-gpio.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-gpio-buttons.h"
++#include "dev-pb42-pci.h"
++#include "dev-usb.h"
++#include "dev-leds-gpio.h"
++
++#define JA76PF_KEYS_POLL_INTERVAL	20	/* msecs */
++#define JA76PF_KEYS_DEBOUNCE_INTERVAL	(3 * JA76PF_KEYS_POLL_INTERVAL)
++
++#define JA76PF_GPIO_I2C_SCL		0
++#define JA76PF_GPIO_I2C_SDA		1
++#define JA76PF_GPIO_LED_1		5
++#define JA76PF_GPIO_LED_2		4
++#define JA76PF_GPIO_LED_3		3
++#define JA76PF_GPIO_BTN_RESET		11
++
++static struct gpio_led ja76pf_leds_gpio[] __initdata = {
++	{
++		.name		= "ja76pf:green:led1",
++		.gpio		= JA76PF_GPIO_LED_1,
++		.active_low	= 1,
++	}, {
++		.name		= "ja76pf:green:led2",
++		.gpio		= JA76PF_GPIO_LED_2,
++		.active_low	= 1,
++	}, {
++		.name		= "ja76pf:green:led3",
++		.gpio		= JA76PF_GPIO_LED_3,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= JA76PF_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}
++};
++
++static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = {
++	.sda_pin	= JA76PF_GPIO_I2C_SDA,
++	.scl_pin	= JA76PF_GPIO_I2C_SCL,
++};
++
++static struct platform_device ja76pf_i2c_gpio_device = {
++	.name		= "i2c-gpio",
++	.id		= 0,
++	.dev = {
++		.platform_data  = &ja76pf_i2c_gpio_data,
++	}
++};
++
++#define JA76PF_WAN_PHYMASK	(1 << 4)
++#define JA76PF_LAN_PHYMASK	((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3))
++#define JA76PF_MDIO_PHYMASK	(JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK)
++
++static void __init ja76pf_init(void)
++{
++	ar71xx_add_device_m25p80(NULL);
++
++	ar71xx_add_device_mdio(~JA76PF_MDIO_PHYMASK);
++
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth0_data.phy_mask = JA76PF_LAN_PHYMASK;
++
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth1_data.phy_mask = JA76PF_WAN_PHYMASK;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_eth(0);
++	ar71xx_add_device_eth(1);
++
++	platform_device_register(&ja76pf_i2c_gpio_device);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio),
++					ja76pf_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ja76pf_gpio_keys),
++					 ja76pf_gpio_keys);
++
++	ar71xx_add_device_usb();
++	pb42_pci_init();
++}
++
++MIPS_MACHINE(AR71XX_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-jwap003.c linux-2.6.39/arch/mips/ar71xx/mach-jwap003.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-jwap003.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-jwap003.c	2011-08-24 02:41:55.517989552 +0200
+@@ -0,0 +1,83 @@
++/*
++ *  jjPlus JWAP003 board support
++ *
++ */
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <linux/i2c.h>
++#include <linux/i2c-gpio.h>
++#include <linux/platform_device.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-gpio-buttons.h"
++#include "dev-pb42-pci.h"
++#include "dev-usb.h"
++
++#define JWAP003_KEYS_POLL_INTERVAL	20	/* msecs */
++#define JWAP003_KEYS_DEBOUNCE_INTERVAL	(3 * JWAP003_KEYS_POLL_INTERVAL)
++
++#define JWAP003_GPIO_WPS	11
++#define JWAP003_GPIO_I2C_SCL	0
++#define JWAP003_GPIO_I2C_SDA	1
++
++static struct gpio_keys_button jwap003_gpio_keys[] __initdata = {
++	{
++		.desc		= "wps",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= JWAP003_GPIO_WPS,
++		.active_low	= 1,
++	}
++};
++
++static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = {
++	.sda_pin	= JWAP003_GPIO_I2C_SDA,
++	.scl_pin	= JWAP003_GPIO_I2C_SCL,
++};
++
++static struct platform_device jwap003_i2c_gpio_device = {
++	.name		= "i2c-gpio",
++	.id		= 0,
++	.dev = {
++		.platform_data  = &jwap003_i2c_gpio_data,
++	}
++};
++
++#define JWAP003_WAN_PHYMASK	BIT(0)
++#define JWAP003_LAN_PHYMASK	BIT(4)
++
++static void __init jwap003_init(void)
++{
++	ar71xx_add_device_m25p80(NULL);
++
++	ar71xx_add_device_mdio(0x0);
++
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.phy_mask = JWAP003_WAN_PHYMASK;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.has_ar8216 = 1;
++
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.phy_mask = JWAP003_LAN_PHYMASK;
++	ar71xx_eth1_data.speed = SPEED_100;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_eth(0);
++	ar71xx_add_device_eth(1);
++
++	platform_device_register(&jwap003_i2c_gpio_device);
++
++	ar71xx_add_device_usb();
++
++	ar71xx_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(jwap003_gpio_keys),
++					 jwap003_gpio_keys);
++
++	pb42_pci_init();
++}
++
++MIPS_MACHINE(AR71XX_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/mips/ar71xx/mach-mzk-w04nu.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-mzk-w04nu.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,165 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-mzk-w04nu.c	2011-08-24 02:41:55.517989552 +0200
+@@ -0,0 +1,166 @@
 +/*
 + *  Planex MZK-W04NU board support
 + *
@@ -3941,7 +5351,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +
 +#include "machtype.h"
 +#include "devices.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "dev-m25p80.h"
@@ -3958,7 +5368,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +#define MZK_W04NU_GPIO_BTN_WPS		12
 +#define MZK_W04NU_GPIO_BTN_RESET	21
 +
-+#define MZK_W04NU_BUTTONS_POLL_INTERVAL	20
++#define MZK_W04NU_KEYS_POLL_INTERVAL	20	/* msecs */
++#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition mzk_w04nu_partitions[] = {
@@ -3967,24 +5378,24 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "u-boot-env",
 +		.offset		= 0x040000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x050000,
 +		.size		= 0x160000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x1b0000,
 +		.size		= 0x630000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x7e0000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x050000,
 +		.size		= 0x790000,
@@ -3994,8 +5405,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +
 +static struct flash_platform_data mzk_w04nu_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = mzk_w04nu_partitions,
-+        .nr_parts       = ARRAY_SIZE(mzk_w04nu_partitions),
++	.parts          = mzk_w04nu_partitions,
++	.nr_parts       = ARRAY_SIZE(mzk_w04nu_partitions),
 +#endif
 +};
 +
@@ -4027,26 +5438,26 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +	}
 +};
 +
-+static struct gpio_button mzk_w04nu_gpio_buttons[] __initdata = {
++static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= MZK_W04NU_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= MZK_W04NU_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "aprouter",
 +		.type		= EV_KEY,
 +		.code		= BTN_2,
-+		.threshold	= 3,
++		.debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= MZK_W04NU_GPIO_BTN_APROUTER,
 +		.active_low	= 0,
 +	}
@@ -4059,15 +5470,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +{
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(eeprom);
-+
 +	ar71xx_add_device_mdio(MZK_W04NU_MDIO_MASK);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +	ar71xx_eth0_data.has_ar8216 = 1;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK;
 +
@@ -4079,20 +5490,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w04nu.c linux-2.6.39/arch/
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio),
 +					mzk_w04nu_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, MZK_W04NU_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(mzk_w04nu_gpio_buttons),
-+					mzk_w04nu_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(mzk_w04nu_gpio_keys),
++					 mzk_w04nu_gpio_keys);
 +	ar71xx_add_device_usb();
 +
-+	ar913x_add_device_wmac(eeprom, NULL);
++	ar9xxx_add_device_wmac(eeprom, NULL);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU",
 +	     mzk_w04nu_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch/mips/ar71xx/mach-mzk-w300nh.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-mzk-w300nh.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,158 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-mzk-w300nh.c	2011-08-24 02:41:55.527982711 +0200
+@@ -0,0 +1,159 @@
 +/*
 + *  Planex MZK-W300NH board support
 + *
@@ -4112,7 +5523,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +
@@ -4126,7 +5537,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +#define MZK_W300NH_GPIO_BTN_WPS		12
 +#define MZK_W300NH_GPIO_BTN_RESET	21
 +
-+#define MZK_W04NU_BUTTONS_POLL_INTERVAL	20
++#define MZK_W300NH_KEYS_POLL_INTERVAL	20	/* msecs */
++#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition mzk_w300nh_partitions[] = {
@@ -4135,24 +5547,24 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "u-boot-env",
 +		.offset		= 0x040000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x050000,
 +		.size		= 0x160000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x1b0000,
 +		.size		= 0x630000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x7e0000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x050000,
 +		.size		= 0x790000,
@@ -4162,8 +5574,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +
 +static struct flash_platform_data mzk_w300nh_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = mzk_w300nh_partitions,
-+        .nr_parts       = ARRAY_SIZE(mzk_w300nh_partitions),
++	.parts		= mzk_w300nh_partitions,
++	.nr_parts	= ARRAY_SIZE(mzk_w300nh_partitions),
 +#endif
 +};
 +
@@ -4191,26 +5603,26 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +	}
 +};
 +
-+static struct gpio_button mzk_w300nh_gpio_buttons[] __initdata = {
++static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= MZK_W300NH_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= MZK_W300NH_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "aprouter",
 +		.type		= EV_KEY,
 +		.code		= BTN_2,
-+		.threshold	= 3,
++		.debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= MZK_W300NH_GPIO_BTN_APROUTER,
 +		.active_low	= 0,
 +	}
@@ -4223,15 +5635,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +{
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(eeprom);
-+
 +	ar71xx_add_device_mdio(MZK_W300NH_MDIO_MASK);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +	ar71xx_eth0_data.has_ar8216 = 1;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK;
 +
@@ -4241,20 +5653,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-mzk-w300nh.c linux-2.6.39/arch
 +	ar71xx_add_device_m25p80(&mzk_w300nh_flash_data);
 +
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio),
-+				    mzk_w300nh_leds_gpio);
++					mzk_w300nh_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, MZK_W04NU_BUTTONS_POLL_INTERVAL,
-+				       ARRAY_SIZE(mzk_w300nh_gpio_buttons),
-+				       mzk_w300nh_gpio_buttons);
-+	ar913x_add_device_wmac(eeprom, NULL);
++	ar71xx_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(mzk_w300nh_gpio_keys),
++					 mzk_w300nh_gpio_keys);
++	ar9xxx_add_device_wmac(eeprom, NULL);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH",
 +	     mzk_w300nh_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mips/ar71xx/mach-nbg460n.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-nbg460n.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,222 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-nbg460n.c	2011-08-24 02:41:55.537990605 +0200
+@@ -0,0 +1,225 @@
 +/*
 + *  Zyxel NBG 460N/550N/550NH board support
 + *
@@ -4271,7 +5683,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/partitions.h>
 +#include <linux/delay.h>
-+#include <linux/rtl8366s.h>
++#include <linux/rtl8366.h>
 +
 +#include <linux/i2c.h>
 +#include <linux/i2c-algo-bit.h>
@@ -4282,7 +5694,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +
@@ -4295,7 +5707,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +/* Buttons */
 +#define NBG460N_GPIO_BTN_WPS		12
 +#define NBG460N_GPIO_BTN_RESET		21
-+#define NBG460N_BUTTONS_POLL_INTERVAL	20
++
++#define NBG460N_KEYS_POLL_INTERVAL	20	/* msecs */
++#define NBG460N_KEYS_DEBOUNCE_INTERVAL	(3 * NBG460N_KEYS_POLL_INTERVAL)
 +
 +/* RTC chip PCF8563 I2C interface */
 +#define NBG460N_GPIO_PCF8563_SDA	8
@@ -4312,28 +5726,28 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +		.offset		= 0,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "U-Boot Config",
 +		.offset		= 0x010000,
 +		.size		= 0x030000,
-+	} , {
++	}, {
 +		.name		= "U-Boot",
 +		.offset		= 0x040000,
 +		.size		= 0x030000,
-+	} , {
++	}, {
 +		.name		= "linux",
 +		.offset		= 0x070000,
 +		.size		= 0x0e0000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x150000,
 +		.size		= 0x2a0000,
-+	} , {
++	}, {
 +		.name		= "CalibData",
 +		.offset		= 0x3f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x070000,
 +		.size		= 0x380000,
@@ -4343,8 +5757,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +
 +static struct flash_platform_data nbg460n_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = nbg460n_partitions,
-+        .nr_parts       = ARRAY_SIZE(nbg460n_partitions),
++	.parts		= nbg460n_partitions,
++	.nr_parts       = ARRAY_SIZE(nbg460n_partitions),
 +#endif
 +};
 +
@@ -4371,19 +5785,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +	}
 +};
 +
-+static struct gpio_button nbg460n_gpio_buttons[] __initdata = {
++static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= NBG460N_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= NBG460N_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}
@@ -4421,9 +5835,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +}
 +
 +
-+static struct rtl8366s_platform_data nbg460n_rtl8366s_data = {
-+	.gpio_sda        = NBG460N_GPIO_RTL8366_SDA,
-+	.gpio_sck        = NBG460N_GPIO_RTL8366_SCK,
++static struct rtl8366_platform_data nbg460n_rtl8366s_data = {
++	.gpio_sda	= NBG460N_GPIO_RTL8366_SDA,
++	.gpio_sck	= NBG460N_GPIO_RTL8366_SCK,
 +};
 +
 +static struct platform_device nbg460n_rtl8366s_device = {
@@ -4436,20 +5850,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +
 +static void __init nbg460n_setup(void)
 +{
-+	/* end of bootloader sector contains mac address*/
++	/* end of bootloader sector contains mac address */
 +	u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8);
 +	/* last sector contains wlan calib data */
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(mac);
-+
 +	/* LAN Port */
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
 +	ar71xx_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev;
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.speed = SPEED_1000;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +
 +	/* WAN Port */
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
 +	ar71xx_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev;
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth1_data.phy_mask = 0x10;
@@ -4463,7 +5877,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +	/* register flash */
 +	ar71xx_add_device_m25p80(&nbg460n_flash_data);
 +
-+	ar913x_add_device_wmac(eeprom, mac);
++	ar9xxx_add_device_wmac(eeprom, mac);
 +
 +	/* register RTC chip */
 +	nbg460n_i2c_init();
@@ -4471,16 +5885,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-nbg460n.c linux-2.6.39/arch/mi
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio),
 +					nbg460n_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, NBG460N_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(nbg460n_gpio_buttons),
-+					nbg460n_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(nbg460n_gpio_keys),
++					 nbg460n_gpio_keys);
 +}
 +
-+MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", nbg460n_setup);
++MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH",
++	     nbg460n_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb42.c linux-2.6.39/arch/mips/ar71xx/mach-pb42.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-pb42.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-pb42.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,71 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-pb42.c	2011-08-24 02:41:55.537990605 +0200
+@@ -0,0 +1,74 @@
 +/*
 + *  Atheros PB42 board support
 + *
@@ -4501,24 +5916,25 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb42.c linux-2.6.39/arch/mips/
 +#include "dev-pb42-pci.h"
 +#include "dev-usb.h"
 +
-+#define PB42_BUTTONS_POLL_INTERVAL	20
++#define PB42_KEYS_POLL_INTERVAL		20	/* msecs */
++#define PB42_KEYS_DEBOUNCE_INTERVAL	(3 * PB42_KEYS_POLL_INTERVAL)
 +
 +#define PB42_GPIO_BTN_SW4	8
 +#define PB42_GPIO_BTN_SW5	3
 +
-+static struct gpio_button pb42_gpio_buttons[] __initdata = {
++static struct gpio_keys_button pb42_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "sw4",
 +		.type		= EV_KEY,
 +		.code		= BTN_0,
-+		.threshold	= 3,
++		.debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= PB42_GPIO_BTN_SW4,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "sw5",
 +		.type		= EV_KEY,
 +		.code		= BTN_1,
-+		.threshold	= 3,
++		.debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= PB42_GPIO_BTN_SW5,
 +		.active_low	= 1,
 +	}
@@ -4534,9 +5950,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb42.c linux-2.6.39/arch/mips/
 +
 +	ar71xx_add_device_mdio(~PB42_MDIO_PHYMASK);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 +	ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.speed = SPEED_100;
 +	ar71xx_eth1_data.duplex = DUPLEX_FULL;
@@ -4544,9 +5962,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb42.c linux-2.6.39/arch/mips/
 +	ar71xx_add_device_eth(0);
 +	ar71xx_add_device_eth(1);
 +
-+	ar71xx_add_device_gpio_buttons(-1, PB42_BUTTONS_POLL_INTERVAL,
-+				       ARRAY_SIZE(pb42_gpio_buttons),
-+				       pb42_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(pb42_gpio_keys),
++					 pb42_gpio_keys);
 +
 +	pb42_pci_init();
 +}
@@ -4554,8 +5972,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb42.c linux-2.6.39/arch/mips/
 +MIPS_MACHINE(AR71XX_MACH_PB42, "PB42", "Atheros PB42", pb42_init);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c linux-2.6.39/arch/mips/ar71xx/mach-pb44.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-pb44.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,207 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-pb44.c	2011-08-24 02:41:55.537990605 +0200
+@@ -0,0 +1,213 @@
 +/*
 + *  Atheros PB44 board support
 + *
@@ -4612,6 +6030,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c linux-2.6.39/arch/mips/
 +#define PB44_GPIO_LED_JUMP1	(PB44_GPIO_EXP_BASE + PB44_PCF8757_LED_JUMP1)
 +#define PB44_GPIO_LED_JUMP2	(PB44_GPIO_EXP_BASE + PB44_PCF8757_LED_JUMP2)
 +
++#define PB44_KEYS_POLL_INTERVAL		20	/* msecs */
++#define PB44_KEYS_DEBOUNCE_INTERVAL	(3 * PB44_KEYS_POLL_INTERVAL)
++
 +static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
 +	.sda_pin        = PB44_GPIO_I2C_SDA,
 +	.scl_pin        = PB44_GPIO_I2C_SCL,
@@ -4648,19 +6069,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c linux-2.6.39/arch/mips/
 +	},
 +};
 +
-+static struct gpio_button pb44_gpio_buttons[] __initdata = {
++static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "soft_reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= PB44_GPIO_SW_RESET,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "jumpstart",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= PB44_GPIO_SW_JUMP,
 +		.active_low	= 1,
 +	}
@@ -4731,11 +6152,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c linux-2.6.39/arch/mips/
 +{
 +	ar71xx_add_device_mdio(~PB44_MDIO_PHYMASK);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.phy_mask = PB44_WAN_PHYMASK;
 +
 +	ar71xx_add_device_eth(0);
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth1_data.speed = SPEED_1000;
 +	ar71xx_eth1_data.duplex = DUPLEX_FULL;
@@ -4748,7 +6171,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c linux-2.6.39/arch/mips/
 +	pb42_pci_init();
 +
 +	i2c_register_board_info(0, pb44_i2c_board_info,
-+ 				ARRAY_SIZE(pb44_i2c_board_info));
++				ARRAY_SIZE(pb44_i2c_board_info));
 +
 +	platform_device_register(&pb44_i2c_gpio_device);
 +
@@ -4756,17 +6179,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb44.c linux-2.6.39/arch/mips/
 +	platform_device_register(&pb44_spi_device);
 +
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
-+				    pb44_leds_gpio);
++					pb44_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, 20, ARRAY_SIZE(pb44_gpio_buttons),
-+				       pb44_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(pb44_gpio_keys),
++					 pb44_gpio_keys);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_PB44, "PB44", "Atheros PB44", pb44_init);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb92.c linux-2.6.39/arch/mips/ar71xx/mach-pb92.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-pb92.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-pb92.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,109 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-pb92.c	2011-08-24 02:41:55.567991163 +0200
+@@ -0,0 +1,105 @@
 +/*
 + *  Atheros PB92 board support
 + *
@@ -4797,19 +6221,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb92.c linux-2.6.39/arch/mips/
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "u-boot-env",
 +		.offset		= 0x040000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x050000,
 +		.size		= 0x2b0000,
-+	} , {
++	}, {
 +		.name		= "uImage",
 +		.offset		= 0x300000,
 +		.size		= 0x0e0000,
-+	} , {
++	}, {
 +		.name		= "ART",
 +		.offset		= 0x3e0000,
 +		.size		= 0x020000,
@@ -4820,30 +6244,30 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb92.c linux-2.6.39/arch/mips/
 +
 +static struct flash_platform_data pb92_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = pb92_partitions,
-+        .nr_parts       = ARRAY_SIZE(pb92_partitions),
++	.parts		= pb92_partitions,
++	.nr_parts	= ARRAY_SIZE(pb92_partitions),
 +#endif
 +};
 +
-+
-+#define PB92_BUTTONS_POLL_INTERVAL	20
++#define PB92_KEYS_POLL_INTERVAL		20	/* msecs */
++#define PB92_KEYS_DEBOUNCE_INTERVAL	(3 * PB92_KEYS_POLL_INTERVAL)
 +
 +#define PB92_GPIO_BTN_SW4	8
 +#define PB92_GPIO_BTN_SW5	3
 +
-+static struct gpio_button pb92_gpio_buttons[] __initdata = {
++static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "sw4",
 +		.type		= EV_KEY,
 +		.code		= BTN_0,
-+		.threshold	= 3,
++		.debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= PB92_GPIO_BTN_SW4,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "sw5",
 +		.type		= EV_KEY,
 +		.code		= BTN_1,
-+		.threshold	= 3,
++		.debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= PB92_GPIO_BTN_SW5,
 +		.active_low	= 1,
 +	}
@@ -4853,24 +6277,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb92.c linux-2.6.39/arch/mips/
 +{
 +	u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
 +
-+	ar71xx_set_mac_base(mac);
 +	ar71xx_add_device_m25p80(&pb92_flash_data);
 +
-+	ar71xx_add_device_mdio(~0);
-+	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_add_device_mdio(~BIT(0));
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.speed = SPEED_1000;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
-+
-+	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
-+	ar71xx_eth1_data.speed = SPEED_1000;
-+	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(0);
 +
 +	ar71xx_add_device_eth(0);
-+	ar71xx_add_device_eth(1);
 +
-+	ar71xx_add_device_gpio_buttons(-1, PB92_BUTTONS_POLL_INTERVAL,
-+				       ARRAY_SIZE(pb92_gpio_buttons),
-+				       pb92_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(pb92_gpio_keys),
++					 pb92_gpio_keys);
 +
 +	pb9x_pci_init();
 +}
@@ -4878,12 +6298,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-pb92.c linux-2.6.39/arch/mips/
 +MIPS_MACHINE(AR71XX_MACH_PB92, "PB92", "Atheros PB92", pb92_init);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips/ar71xx/mach-rb4xx.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-rb4xx.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,290 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-rb4xx.c	2011-08-24 02:41:55.567991163 +0200
+@@ -0,0 +1,344 @@
 +/*
 + *  MikroTik RouterBOARD 4xx series support
 + *
-+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
 + *  This program is free software; you can redistribute it and/or modify it
@@ -4897,9 +6317,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +#include <linux/spi/spi.h>
 +#include <linux/spi/flash.h>
 +#include <linux/spi/mmc_spi.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +#include <asm/mach-ar71xx/pci.h>
++#include <asm/mach-ar71xx/rb4xx_cpld.h>
 +
 +#include "machtype.h"
 +#include "devices.h"
@@ -4910,22 +6333,50 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +#define RB4XX_GPIO_USER_LED	4
 +#define RB4XX_GPIO_RESET_SWITCH	7
 +
-+#define RB4XX_BUTTONS_POLL_INTERVAL	20
++#define RB4XX_GPIO_CPLD_BASE	32
++#define RB4XX_GPIO_CPLD_LED1	(RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1)
++#define RB4XX_GPIO_CPLD_LED2	(RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2)
++#define RB4XX_GPIO_CPLD_LED3	(RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3)
++#define RB4XX_GPIO_CPLD_LED4	(RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4)
++#define RB4XX_GPIO_CPLD_LED5	(RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5)
++
++#define RB4XX_KEYS_POLL_INTERVAL	20	/* msecs */
++#define RB4XX_KEYS_DEBOUNCE_INTERVAL	(3 * RB4XX_KEYS_POLL_INTERVAL)
 +
 +static struct gpio_led rb4xx_leds_gpio[] __initdata = {
 +	{
 +		.name		= "rb4xx:yellow:user",
 +		.gpio		= RB4XX_GPIO_USER_LED,
 +		.active_low	= 0,
++	}, {
++		.name		= "rb4xx:green:led1",
++		.gpio		= RB4XX_GPIO_CPLD_LED1,
++		.active_low	= 1,
++	}, {
++		.name		= "rb4xx:green:led2",
++		.gpio		= RB4XX_GPIO_CPLD_LED2,
++		.active_low	= 1,
++	}, {
++		.name		= "rb4xx:green:led3",
++		.gpio		= RB4XX_GPIO_CPLD_LED3,
++		.active_low	= 1,
++	}, {
++		.name		= "rb4xx:green:led4",
++		.gpio		= RB4XX_GPIO_CPLD_LED4,
++		.active_low	= 1,
++	}, {
++		.name		= "rb4xx:green:led5",
++		.gpio		= RB4XX_GPIO_CPLD_LED5,
++		.active_low	= 0,
 +	},
 +};
 +
-+static struct gpio_button rb4xx_gpio_buttons[] __initdata = {
++static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset_switch",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= RB4XX_GPIO_RESET_SWITCH,
 +		.active_low	= 1,
 +	}
@@ -4960,107 +6411,117 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +	}
 +};
 +
-+#if 0
-+/*
-+ * SPI device support is experimental
-+ */
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition rb4xx_partitions[] = {
++	{
++		.name		= "routerboot",
++		.offset		= 0,
++		.size		= 0x0b000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "hard_config",
++		.offset		= 0x0b000,
++		.size		= 0x01000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "bios",
++		.offset		= 0x0d000,
++		.size		= 0x02000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "soft_config",
++		.offset		= 0x0f000,
++		.size		= 0x01000,
++	}
++};
++#define rb4xx_num_partitions	ARRAY_SIZE(rb4xx_partitions)
++#else /* CONFIG_MTD_PARTITIONS */
++#define rb4xx_partitions	NULL
++#define rb4xx_num_partitions	0
++#endif /* CONFIG_MTD_PARTITIONS */
++
 +static struct flash_platform_data rb4xx_flash_data = {
-+	.type	= "pm25lv512",
++	.type		= "pm25lv512",
++	.parts		= rb4xx_partitions,
++	.nr_parts	= rb4xx_num_partitions,
 +};
 +
-+static struct spi_board_info rb4xx_spi_info[] = {
-+	{
-+		.bus_num	= 0,
-+		.chip_select	= 0,
-+		.max_speed_hz	= 25000000,
-+		.modalias	= "m25p80",
-+		.platform_data	= &rb4xx_flash_data,
-+	}
++static struct rb4xx_cpld_platform_data rb4xx_cpld_data = {
++	.gpio_base	= RB4XX_GPIO_CPLD_BASE,
 +};
 +
-+static struct mmc_spi_platform_data rb433_mmc_data = {
++static struct mmc_spi_platform_data rb4xx_mmc_data = {
 +	.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
 +};
 +
-+static struct spi_board_info rb433_spi_info[] = {
++static struct spi_board_info rb4xx_spi_info[] = {
 +	{
 +		.bus_num	= 0,
 +		.chip_select	= 0,
 +		.max_speed_hz	= 25000000,
 +		.modalias	= "m25p80",
-+		.platform_data	= &rb433_flash_data,
++		.platform_data	= &rb4xx_flash_data,
 +	}, {
 +		.bus_num	= 0,
-+		.chip_select	= 2,
++		.chip_select	= 1,
 +		.max_speed_hz	= 25000000,
-+		.modalias	= "mmc_spi",
-+		.platform_data	= &rb433_mmc_data,
++		.modalias	= "spi-rb4xx-cpld",
++		.platform_data	= &rb4xx_cpld_data,
 +	}
 +};
 +
-+static u32 rb433_spi_get_ioc_base(u8 chip_select, int cs_high, int is_on)
-+{
-+	u32 ret;
-+
-+	if (is_on == AR71XX_SPI_CS_INACTIVE) {
-+		ret = SPI_IOC_CS0 | SPI_IOC_CS1;
-+	} else {
-+		if (cs_high) {
-+			ret = SPI_IOC_CS0 | SPI_IOC_CS1;
-+		} else {
-+			if ((chip_select ^ 2) == 0)
-+				ret = SPI_IOC_CS1 ^ (SPI_IOC_CS0 | SPI_IOC_CS1);
-+			else
-+				ret = SPI_IOC_CS0 ^ (SPI_IOC_CS0 | SPI_IOC_CS1);
-+		}
++static struct spi_board_info rb4xx_microsd_info[] = {
++	{
++		.bus_num	= 0,
++		.chip_select	= 2,
++		.max_speed_hz	= 25000000,
++		.modalias	= "mmc_spi",
++		.platform_data	= &rb4xx_mmc_data,
 +	}
++};
 +
-+	return ret;
-+}
 +
-+struct ar71xx_spi_platform_data rb433_spi_data = {
-+	.bus_num		= 0,
-+	.num_chipselect		= 3,
-+	.get_ioc_base		= rb433_spi_get_ioc_base,
++static struct resource rb4xx_spi_resources[] = {
++	{
++		.start	= AR71XX_SPI_BASE,
++		.end	= AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	},
 +};
 +
-+static void rb4xx_add_device_spi(void)
-+{
-+	ar71xx_add_device_spi(NULL, rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
-+}
-+
-+static void rb433_add_device_spi(void)
-+{
-+	ar71xx_add_device_spi(&rb433_spi_data, rb433_spi_info,
-+				ARRAY_SIZE(rb433_spi_info));
-+}
-+#else
-+static inline void rb4xx_add_device_spi(void) {}
-+static inline void rb433_add_device_spi(void) {}
-+#endif
++static struct platform_device rb4xx_spi_device = {
++	.name		= "rb4xx-spi",
++	.id		= -1,
++	.resource	= rb4xx_spi_resources,
++	.num_resources	= ARRAY_SIZE(rb4xx_spi_resources),
++};
 +
 +static void __init rb4xx_generic_setup(void)
 +{
 +	ar71xx_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
-+				    AR71XX_GPIO_FUNC_SPI_CS2_EN);
++					AR71XX_GPIO_FUNC_SPI_CS2_EN);
 +
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio),
 +					rb4xx_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, RB4XX_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(rb4xx_gpio_buttons),
-+					rb4xx_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(rb4xx_gpio_keys),
++					 rb4xx_gpio_keys);
 +
++	spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info));
++	platform_device_register(&rb4xx_spi_device);
 +	platform_device_register(&rb4xx_nand_device);
 +}
 +
 +static void __init rb411_setup(void)
 +{
 +	rb4xx_generic_setup();
-+	rb4xx_add_device_spi();
++	spi_register_board_info(rb4xx_microsd_info,
++				ARRAY_SIZE(rb4xx_microsd_info));
 +
 +	ar71xx_add_device_mdio(0xfffffffc);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 +	ar71xx_eth0_data.phy_mask = 0x00000003;
 +
@@ -5081,19 +6542,25 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +MIPS_MACHINE(AR71XX_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U",
 +	     rb411u_setup);
 +
++#define RB433_LAN_PHYMASK	BIT(0)
++#define RB433_WAN_PHYMASK	BIT(4)
++#define RB433_MDIO_PHYMASK	(RB433_LAN_PHYMASK | RB433_WAN_PHYMASK)
++
 +static void __init rb433_setup(void)
 +{
 +	rb4xx_generic_setup();
-+	rb433_add_device_spi();
++	spi_register_board_info(rb4xx_microsd_info,
++				ARRAY_SIZE(rb4xx_microsd_info));
 +
-+	ar71xx_add_device_mdio(0xffffffe9);
++	ar71xx_add_device_mdio(~RB433_MDIO_PHYMASK);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
-+	ar71xx_eth0_data.speed = SPEED_100;
-+	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = RB433_LAN_PHYMASK;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
-+	ar71xx_eth1_data.phy_mask = 0x00000010;
++	ar71xx_eth1_data.phy_mask = RB433_WAN_PHYMASK;
 +
 +	ar71xx_add_device_eth(1);
 +	ar71xx_add_device_eth(0);
@@ -5113,20 +6580,24 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +MIPS_MACHINE(AR71XX_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH",
 +	     rb433u_setup);
 +
++#define RB450_LAN_PHYMASK	BIT(0)
++#define RB450_WAN_PHYMASK	BIT(4)
++#define RB450_MDIO_PHYMASK	(RB450_LAN_PHYMASK | RB450_WAN_PHYMASK)
++
 +static void __init rb450_generic_setup(int gige)
 +{
 +	rb4xx_generic_setup();
-+	rb4xx_add_device_spi();
++	ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK);
 +
-+	ar71xx_add_device_mdio(0xffffffe0);
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
++	ar71xx_eth0_data.phy_if_mode = (gige) ?
++		PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
++	ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK;
 +
-+	ar71xx_eth0_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
-+	ar71xx_eth0_data.phy_mask = (gige) ? (1 << 0) : 0;
-+	ar71xx_eth0_data.speed = (gige) ? SPEED_1000 : SPEED_100;
-+	ar71xx_eth0_data.duplex = DUPLEX_FULL;
-+
-+	ar71xx_eth1_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
-+	ar71xx_eth1_data.phy_mask = 0x00000010;
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
++	ar71xx_eth1_data.phy_if_mode = (gige) ?
++		PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK;
 +
 +	ar71xx_add_device_eth(1);
 +	ar71xx_add_device_eth(0);
@@ -5143,6 +6614,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +static void __init rb450g_setup(void)
 +{
 +	rb450_generic_setup(1);
++	spi_register_board_info(rb4xx_microsd_info,
++				ARRAY_SIZE(rb4xx_microsd_info));
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G",
@@ -5151,14 +6624,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +static void __init rb493_setup(void)
 +{
 +	rb4xx_generic_setup();
-+	rb4xx_add_device_spi();
 +
 +	ar71xx_add_device_mdio(0x3fffff00);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.phy_mask = 0x00000001;
 +
@@ -5172,8 +6646,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb4xx.c linux-2.6.39/arch/mips
 +	     rb493_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c linux-2.6.39/arch/mips/ar71xx/mach-rb750.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-rb750.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,133 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-rb750.c	2011-08-24 02:41:55.567991163 +0200
+@@ -0,0 +1,144 @@
 +/*
 + *  MikroTik RouterBOARD 750 support
 + *
@@ -5189,7 +6663,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c linux-2.6.39/arch/mips
 +#include <asm/mach-ar71xx/mach-rb750.h>
 +
 +#include "machtype.h"
-+#include "dev-ap91-eth.h"
++#include "devices.h"
 +
 +static struct rb750_led_data rb750_leds[] = {
 +	{
@@ -5231,13 +6705,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c linux-2.6.39/arch/mips
 +	}
 +};
 +
-+static const char *rb750_port_names[AP91_ETH_NUM_PORT_NAMES] __initdata = {
-+	"port5",
-+	"port4",
-+	"port3",
-+	"port2",
-+};
-+
 +static struct platform_device rb750_nand_device = {
 +	.name	= "rb750-nand",
 +	.id	= -1,
@@ -5286,7 +6753,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c linux-2.6.39/arch/mips
 +
 +	ret = 1;
 +
-+ unlock:
++unlock:
 +	spin_unlock_irqrestore(&lock, flags);
 +	return ret;
 +}
@@ -5300,7 +6767,25 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c linux-2.6.39/arch/mips
 +				     AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
 +				     AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
 +
-+	ap91_eth_init(NULL, rb750_port_names);
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 1);
++
++	/* WAN port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(4);
++
++	/* LAN ports */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++	ar71xx_eth1_data.has_ar7240_switch = 1;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++	ar71xx_add_device_eth(0);
++
 +	platform_device_register(&rb750_leds_device);
 +	platform_device_register(&rb750_nand_device);
 +}
@@ -5309,8 +6794,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-rb750.c linux-2.6.39/arch/mips
 +	     rb750_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch/mips/ar71xx/mach-tew-632brp.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-tew-632brp.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,149 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-tew-632brp.c	2011-08-24 02:41:55.577989822 +0200
+@@ -0,0 +1,151 @@
 +/*
 + *  TrendNET TEW-632BRP board support
 + *
@@ -5330,7 +6815,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "nvram.h"
@@ -5341,7 +6826,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +#define TEW_632BRP_GPIO_BTN_WPS		12
 +#define TEW_632BRP_GPIO_BTN_RESET	21
 +
-+#define TEW_632BRP_BUTTONS_POLL_INTERVAL	20
++#define TEW_632BRP_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL)
 +
 +#define TEW_632BRP_CONFIG_ADDR	0x1f020000
 +#define TEW_632BRP_CONFIG_SIZE	0x10000
@@ -5353,24 +6839,24 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +		.offset		= 0,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "config",
 +		.offset		= 0x020000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x030000,
-+		.size		= 0x0d0000,
-+	} , {
++		.size		= 0x0e0000,
++	}, {
 +		.name		= "rootfs",
-+		.offset		= 0x100000,
-+		.size		= 0x2f0000,
-+	} , {
++		.offset		= 0x110000,
++		.size		= 0x2e0000,
++	}, {
 +		.name		= "art",
 +		.offset		= 0x3f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x030000,
 +		.size		= 0x3c0000,
@@ -5380,8 +6866,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +
 +static struct flash_platform_data tew_632brp_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = tew_632brp_partitions,
-+        .nr_parts       = ARRAY_SIZE(tew_632brp_partitions),
++	.parts		= tew_632brp_partitions,
++	.nr_parts	= ARRAY_SIZE(tew_632brp_partitions),
 +#endif
 +};
 +
@@ -5401,18 +6887,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +	}
 +};
 +
-+static struct gpio_button tew_632brp_gpio_buttons[] __initdata = {
++static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TEW_632BRP_GPIO_BTN_RESET,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TEW_632BRP_GPIO_BTN_WPS,
 +	}
 +};
@@ -5430,8 +6916,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +	u8 *wlan_mac = NULL;
 +
 +	if (nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE,
-+			         "lan_mac=", mac) == 0) {
-+		ar71xx_set_mac_base(mac);
++				"lan_mac=", mac) == 0) {
++		ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++		ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
 +		wlan_mac = mac;
 +	}
 +
@@ -5451,18 +6938,458 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tew-632brp.c linux-2.6.39/arch
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio),
 +					tew_632brp_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, TEW_632BRP_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(tew_632brp_gpio_buttons),
-+					tew_632brp_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tew_632brp_gpio_keys),
++					 tew_632brp_gpio_keys);
 +
-+	ar913x_add_device_wmac(eeprom, wlan_mac);
++	ar9xxx_add_device_wmac(eeprom, wlan_mac);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP",
 +	     tew_632brp_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-mr3x20.c linux-2.6.39/arch/mips/ar71xx/mach-tl-mr3x20.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-mr3x20.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-mr3x20.c	2011-08-24 02:41:55.577989822 +0200
+@@ -0,0 +1,166 @@
++/*
++ *  TP-LINK TL-MR3220/3420 board support
++ *
++ *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/gpio.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-ap91-pci.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-usb.h"
++
++#define TL_MR3X20_GPIO_LED_QSS		0
++#define TL_MR3X20_GPIO_LED_SYSTEM	1
++#define TL_MR3X20_GPIO_LED_3G		8
++
++#define TL_MR3X20_GPIO_BTN_RESET	11
++#define TL_MR3X20_GPIO_BTN_QSS		12
++
++#define TL_MR3X20_GPIO_USB_POWER	6
++
++#define TL_MR3X20_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL)
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition tl_mr3x20_partitions[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x020000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "kernel",
++		.offset		= 0x020000,
++		.size		= 0x140000,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x160000,
++		.size		= 0x290000,
++	}, {
++		.name		= "art",
++		.offset		= 0x3f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "firmware",
++		.offset		= 0x020000,
++		.size		= 0x3d0000,
++	}
++};
++#define tl_mr3x20_num_partitions	ARRAY_SIZE(tl_mr3x20_partitions)
++#else
++#define tl_mr3x20_partitions		NULL
++#define tl_mr3x20_num_partitions	0
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data tl_mr3x20_flash_data = {
++	.parts		= tl_mr3x20_partitions,
++	.nr_parts	= tl_mr3x20_num_partitions,
++};
++
++static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = {
++	{
++		.name		= "tl-mr3x20:green:system",
++		.gpio		= TL_MR3X20_GPIO_LED_SYSTEM,
++		.active_low	= 1,
++	}, {
++		.name		= "tl-mr3x20:green:qss",
++		.gpio		= TL_MR3X20_GPIO_LED_QSS,
++		.active_low	= 1,
++	}, {
++		.name		= "tl-mr3x20:green:3g",
++		.gpio		= TL_MR3X20_GPIO_LED_3G,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= TL_MR3X20_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}, {
++		.desc		= "qss",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= TL_MR3X20_GPIO_BTN_QSS,
++		.active_low	= 1,
++	}
++};
++
++static void __init tl_mr3x20_setup(void)
++{
++	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
++	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
++
++	/* enable power for the USB port */
++	gpio_request(TL_MR3X20_GPIO_USB_POWER, "USB power");
++	gpio_direction_output(TL_MR3X20_GPIO_USB_POWER, 1);
++
++	ar71xx_add_device_m25p80(&tl_mr3x20_flash_data);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio),
++					tl_mr3x20_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_mr3x20_gpio_keys),
++					 tl_mr3x20_gpio_keys);
++
++	ar71xx_eth1_data.has_ar7240_switch = 1;
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
++
++	/* WAN port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(4);
++
++	/* LAN ports */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++	ar71xx_add_device_eth(0);
++
++	ar71xx_add_device_usb();
++
++	ap91_pci_init(ee, mac);
++}
++
++static void __init tl_mr3220_setup(void)
++{
++	tl_mr3x20_setup();
++	ap91_pci_setup_wmac_led_pin(1);
++}
++
++MIPS_MACHINE(AR71XX_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220",
++	     tl_mr3220_setup);
++
++static void __init tl_mr3420_setup(void)
++{
++	tl_mr3x20_setup();
++	ap91_pci_setup_wmac_led_pin(0);
++}
++
++MIPS_MACHINE(AR71XX_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420",
++	     tl_mr3420_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wa901nd.c linux-2.6.39/arch/mips/ar71xx/mach-tl-wa901nd.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wa901nd.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wa901nd.c	2011-08-24 02:41:55.587990766 +0200
+@@ -0,0 +1,130 @@
++/*
++ *  TP-LINK TL-WA901ND board support
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2010 Pieter Hollants <pieter@hollants.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-ap91-pci.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++
++#define TL_WA901ND_GPIO_LED_QSS		0
++#define TL_WA901ND_GPIO_LED_SYSTEM	1
++
++#define TL_WA901ND_GPIO_BTN_RESET	11
++#define TL_WA901ND_GPIO_BTN_QSS		12
++
++#define TL_WA901ND_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL)
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition tl_wa901nd_partitions[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x020000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "kernel",
++		.offset		= 0x020000,
++		.size		= 0x140000,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x160000,
++		.size		= 0x290000,
++	}, {
++		.name		= "art",
++		.offset		= 0x3f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "firmware",
++		.offset		= 0x020000,
++		.size		= 0x3d0000,
++	}
++};
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data tl_wa901nd_flash_data = {
++#ifdef CONFIG_MTD_PARTITIONS
++	.parts		= tl_wa901nd_partitions,
++	.nr_parts	= ARRAY_SIZE(tl_wa901nd_partitions),
++#endif
++};
++
++static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = {
++	{
++		.name		= "tl-wa901nd:green:system",
++		.gpio		= TL_WA901ND_GPIO_LED_SYSTEM,
++		.active_low	= 1,
++	}, {
++		.name		= "tl-wa901nd:green:qss",
++		.gpio		= TL_WA901ND_GPIO_LED_QSS,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= BTN_0,
++		.debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= TL_WA901ND_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}, {
++		.desc		= "qss",
++		.type		= EV_KEY,
++		.code		= BTN_1,
++		.debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= TL_WA901ND_GPIO_BTN_QSS,
++		.active_low	= 1,
++	}
++};
++
++static void __init tl_wa901nd_setup(void)
++{
++	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
++	u8 *ee  = (u8 *) KSEG1ADDR(0x1fff1000);
++
++	/*
++	 * ar71xx_eth0 would be the WAN port, but is not connected on
++	 * the TL-WA901ND. ar71xx_eth1 connects to the internal switch chip,
++	 * however we have a single LAN port only.
++	 */
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 0);
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed       = SPEED_1000;
++	ar71xx_eth1_data.duplex      = DUPLEX_FULL;
++	ar71xx_eth1_data.has_ar7240_switch = 1;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++
++	ar71xx_add_device_m25p80(&tl_wa901nd_flash_data);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio),
++					tl_wa901nd_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_wa901nd_gpio_keys),
++					 tl_wa901nd_gpio_keys);
++
++	ap91_pci_init(ee, mac);
++}
++
++MIPS_MACHINE(AR71XX_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND",
++	     tl_wa901nd_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wa901nd-v2.c linux-2.6.39/arch/mips/ar71xx/mach-tl-wa901nd-v2.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wa901nd-v2.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wa901nd-v2.c	2011-08-24 02:41:55.587990766 +0200
+@@ -0,0 +1,132 @@
++/*
++ *  TP-LINK TL-WA901ND v2 board support
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2010 Pieter Hollants <pieter@hollants.com>
++ *  Copyright (C) 2011 Jonathan Bennett <jbscience87@gmail.com>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-ar9xxx-wmac.h"
++
++#define TL_WA901ND_V2_GPIO_LED_QSS		4
++#define TL_WA901ND_V2_GPIO_LED_SYSTEM		2
++#define TL_WA901ND_V2_GPIO_LED_WLAN		9
++
++
++#define TL_WA901ND_V2_GPIO_BTN_RESET		3
++#define TL_WA901ND_V2_GPIO_BTN_QSS		7
++
++#define TL_WA901ND_V2_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL	\
++					(3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL)
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition tl_wa901nd_v2_partitions[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x020000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "kernel",
++		.offset		= 0x020000,
++		.size		= 0x140000,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x160000,
++		.size		= 0x290000,
++	}, {
++		.name		= "art",
++		.offset		= 0x3f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "firmware",
++		.offset		= 0x020000,
++		.size		= 0x3d0000,
++	}
++};
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data tl_wa901nd_v2_flash_data = {
++#ifdef CONFIG_MTD_PARTITIONS
++	.parts		= tl_wa901nd_v2_partitions,
++	.nr_parts	= ARRAY_SIZE(tl_wa901nd_v2_partitions),
++#endif
++};
++
++static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = {
++	{
++		.name		= "tl-wa901nd-v2:green:system",
++		.gpio		= TL_WA901ND_V2_GPIO_LED_SYSTEM,
++		.active_low	= 1,
++	}, {
++		.name		= "tl-wa901nd-v2:green:qss",
++		.gpio		= TL_WA901ND_V2_GPIO_LED_QSS,
++	}, {
++		.name		= "tl-wa901nd-v2:green:wlan",
++		.gpio		= TL_WA901ND_V2_GPIO_LED_WLAN,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= TL_WA901ND_V2_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}, {
++		.desc		= "qss",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= TL_WA901ND_V2_GPIO_BTN_QSS,
++		.active_low	= 1,
++	}
++};
++
++static void __init tl_wa901nd_v2_setup(void)
++{
++	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
++	u8 *eeprom  = (u8 *) KSEG1ADDR(0x1fff1000);
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
++	ar71xx_eth0_data.phy_mask = 0x00001000;
++	ar71xx_add_device_mdio(0x0);
++
++	ar71xx_eth0_data.reset_bit = RESET_MODULE_GE0_MAC |
++				     RESET_MODULE_GE0_PHY;
++	ar71xx_add_device_eth(0);
++
++	ar71xx_add_device_m25p80(&tl_wa901nd_v2_flash_data);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio),
++					tl_wa901nd_v2_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_wa901nd_v2_gpio_keys),
++					 tl_wa901nd_v2_gpio_keys);
++
++        ar9xxx_add_device_wmac(eeprom, mac);
++}
++
++MIPS_MACHINE(AR71XX_MACH_TL_WA901ND_V2, "TL-WA901ND-v2",
++	     "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arch/mips/ar71xx/mach-tl-wr1043nd.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr1043nd.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr1043nd.c	2011-08-24 02:41:55.587990766 +0200
 @@ -0,0 +1,156 @@
 +/*
 + *  TP-LINK TL-WR1043ND board support
@@ -5477,13 +7404,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arc
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/partitions.h>
 +#include <linux/platform_device.h>
-+#include <linux/rtl8366rb.h>
++#include <linux/rtl8366.h>
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "dev-usb.h"
@@ -5499,7 +7426,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arc
 +#define TL_WR1043ND_GPIO_RTL8366_SDA	18
 +#define TL_WR1043ND_GPIO_RTL8366_SCK	19
 +
-+#define TL_WR1043ND_BUTTONS_POLL_INTERVAL     20
++#define TL_WR1043ND_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition tl_wr1043nd_partitions[] = {
@@ -5508,20 +7436,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arc
 +		.offset		= 0,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x020000,
 +		.size		= 0x140000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x160000,
 +		.size		= 0x690000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x7f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x020000,
 +		.size		= 0x7d0000,
@@ -5556,25 +7484,25 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arc
 +	}
 +};
 +
-+static struct gpio_button tl_wr1043nd_gpio_buttons[] __initdata = {
++static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR1043ND_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "qss",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR1043ND_GPIO_BTN_QSS,
 +		.active_low	= 1,
 +	}
 +};
 +
-+static struct rtl8366rb_platform_data tl_wr1043nd_rtl8366rb_data = {
++static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = {
 +	.gpio_sda        = TL_WR1043ND_GPIO_RTL8366_SDA,
 +	.gpio_sck        = TL_WR1043ND_GPIO_RTL8366_SCK,
 +};
@@ -5592,8 +7520,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arc
 +	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(mac);
-+
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
 +	ar71xx_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev;
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.speed = SPEED_1000;
@@ -5611,19 +7538,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr1043nd.c linux-2.6.39/arc
 +
 +	platform_device_register(&tl_wr1043nd_rtl8366rb_device);
 +
-+	ar71xx_add_device_gpio_buttons(-1, TL_WR1043ND_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(tl_wr1043nd_gpio_buttons),
-+					tl_wr1043nd_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_wr1043nd_gpio_keys),
++					 tl_wr1043nd_gpio_keys);
 +
-+	ar913x_add_device_wmac(eeprom, mac);
++	ar9xxx_add_device_wmac(eeprom, mac);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND",
 +	     tl_wr1043nd_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch/mips/ar71xx/mach-tl-wr741nd.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr741nd.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,115 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr741nd.c	2011-08-24 02:41:55.587990766 +0200
+@@ -0,0 +1,135 @@
 +/*
 + *  TP-LINK TL-WR741ND board support
 + *
@@ -5642,7 +7569,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ap91-eth.h"
 +#include "dev-ap91-pci.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
@@ -5653,7 +7579,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch
 +#define TL_WR741ND_GPIO_BTN_RESET	11
 +#define TL_WR741ND_GPIO_BTN_QSS		12
 +
-+#define TL_WR741ND_BUTTONS_POLL_INTERVAL	20
++#define TL_WR741ND_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition tl_wr741nd_partitions[] = {
@@ -5662,20 +7589,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch
 +		.offset		= 0,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x020000,
 +		.size		= 0x140000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x160000,
 +		.size		= 0x290000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x3f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x020000,
 +		.size		= 0x3d0000,
@@ -5685,8 +7612,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch
 +
 +static struct flash_platform_data tl_wr741nd_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = tl_wr741nd_partitions,
-+        .nr_parts       = ARRAY_SIZE(tl_wr741nd_partitions),
++	.parts		= tl_wr741nd_partitions,
++	.nr_parts	= ARRAY_SIZE(tl_wr741nd_partitions),
 +#endif
 +};
 +
@@ -5702,19 +7629,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch
 +	}
 +};
 +
-+static struct gpio_button tl_wr741nd_gpio_buttons[] __initdata = {
++static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR741ND_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "qss",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR741ND_GPIO_BTN_QSS,
 +		.active_low	= 1,
 +	}
@@ -5730,19 +7657,39 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr741nd.c linux-2.6.39/arch
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio),
 +					tl_wr741nd_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, TL_WR741ND_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(tl_wr741nd_gpio_buttons),
-+					tl_wr741nd_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_wr741nd_gpio_keys),
++					 tl_wr741nd_gpio_keys);
++
++	ar71xx_eth1_data.has_ar7240_switch = 1;
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
++
++	/* WAN port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(4);
++
++	/* LAN ports */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++	ar71xx_add_device_eth(0);
++
++	ap91_pci_setup_wmac_led_pin(1);
 +
-+	ap91_eth_init(mac, NULL);
 +	ap91_pci_init(ee, mac);
 +}
 +MIPS_MACHINE(AR71XX_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND",
 +	     tl_wr741nd_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/mips/ar71xx/mach-tl-wr841n.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr841n.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,143 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr841n.c	2011-08-24 02:41:55.597982750 +0200
+@@ -0,0 +1,144 @@
 +/*
 + *  TP-LINK TL-WR841N board support
 + *
@@ -5773,7 +7720,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +#define TL_WR841ND_V1_GPIO_BTN_RESET	3
 +#define TL_WR841ND_V1_GPIO_BTN_QSS	7
 +
-+#define TL_WR841ND_V1_BUTTONS_POLL_INTERVAL	20
++#define TL_WR841ND_V1_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \
++				(3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition tl_wr841n_v1_partitions[] = {
@@ -5782,20 +7731,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +		.offset		= 0,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x020000,
 +		.size		= 0x140000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x160000,
 +		.size		= 0x280000,
-+	} , {
++	}, {
 +		.name		= "config",
 +		.offset		= 0x3e0000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x020000,
 +		.size		= 0x3c0000,
@@ -5805,8 +7754,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +
 +static struct flash_platform_data tl_wr841n_v1_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = tl_wr841n_v1_partitions,
-+        .nr_parts       = ARRAY_SIZE(tl_wr841n_v1_partitions),
++	.parts		= tl_wr841n_v1_partitions,
++	.nr_parts	= ARRAY_SIZE(tl_wr841n_v1_partitions),
 +#endif
 +};
 +
@@ -5824,19 +7773,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +	}
 +};
 +
-+static struct gpio_button tl_wr841n_v1_gpio_buttons[] __initdata = {
++static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR841ND_V1_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "qss",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR841ND_V1_GPIO_BTN_QSS,
 +		.active_low	= 1,
 +	}
@@ -5860,10 +7809,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +{
 +	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 +
-+	ar71xx_set_mac_base(mac);
-+
 +	ar71xx_add_device_mdio(0x0);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
@@ -5877,9 +7825,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio),
 +					tl_wr841n_v1_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, TL_WR841ND_V1_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(tl_wr841n_v1_gpio_buttons),
-+					tl_wr841n_v1_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_wr841n_v1_gpio_keys),
++					 tl_wr841n_v1_gpio_keys);
 +
 +	pb42_pci_init();
 +}
@@ -5888,8 +7836,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr841n.c linux-2.6.39/arch/
 +	     tl_wr841n_v1_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch/mips/ar71xx/mach-tl-wr941nd.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr941nd.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,142 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-tl-wr941nd.c	2011-08-24 02:41:55.597982750 +0200
+@@ -0,0 +1,147 @@
 +/*
 + *  TP-LINK TL-WR941ND board support
 + *
@@ -5909,18 +7857,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch
 +#include "devices.h"
 +#include "dev-dsa.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +
 +#define TL_WR941ND_GPIO_LED_SYSTEM	2
 +#define TL_WR941ND_GPIO_LED_QSS_RED	4
 +#define TL_WR941ND_GPIO_LED_QSS_GREEN	5
++#define TL_WR941ND_GPIO_LED_WLAN	9
 +
 +#define TL_WR941ND_GPIO_BTN_RESET	3
 +#define TL_WR941ND_GPIO_BTN_QSS		7
 +
-+#define TL_WR941ND_BUTTONS_POLL_INTERVAL	20
++#define TL_WR941ND_KEYS_POLL_INTERVAL	20	/* msecs */
++#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition tl_wr941nd_partitions[] = {
@@ -5929,20 +7879,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch
 +		.offset		= 0,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x020000,
 +		.size		= 0x140000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x160000,
 +		.size		= 0x290000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x3f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x020000,
 +		.size		= 0x3d0000,
@@ -5952,8 +7902,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch
 +
 +static struct flash_platform_data tl_wr941nd_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = tl_wr941nd_partitions,
-+        .nr_parts       = ARRAY_SIZE(tl_wr941nd_partitions),
++	.parts		= tl_wr941nd_partitions,
++	.nr_parts	= ARRAY_SIZE(tl_wr941nd_partitions),
 +#endif
 +};
 +
@@ -5968,22 +7918,26 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch
 +	}, {
 +		.name		= "tl-wr941nd:green:qss",
 +		.gpio		= TL_WR941ND_GPIO_LED_QSS_GREEN,
++	}, {
++		.name		= "tl-wr941nd:green:wlan",
++		.gpio		= TL_WR941ND_GPIO_LED_WLAN,
++		.active_low	= 1,
 +	}
 +};
 +
-+static struct gpio_button tl_wr941nd_gpio_buttons[] __initdata = {
++static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR941ND_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "qss",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= TL_WR941ND_GPIO_BTN_QSS,
 +		.active_low	= 1,
 +	}
@@ -6008,10 +7962,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch
 +	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(mac);
-+
 +	ar71xx_add_device_mdio(0x0);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
@@ -6024,18 +7977,97 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-tl-wr941nd.c linux-2.6.39/arch
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio),
 +					tl_wr941nd_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, TL_WR941ND_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(tl_wr941nd_gpio_buttons),
-+					tl_wr941nd_gpio_buttons);
-+	ar913x_add_device_wmac(eeprom, mac);
++	ar71xx_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(tl_wr941nd_gpio_keys),
++					 tl_wr941nd_gpio_keys);
++	ar9xxx_add_device_wmac(eeprom, mac);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND",
 +	     tl_wr941nd_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/machtype.h linux-2.6.39/arch/mips/ar71xx/machtype.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/machtype.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/machtype.h	2011-08-24 02:41:55.597982750 +0200
+@@ -0,0 +1,75 @@
++/*
++ *  Atheros AR71xx machine type definitions
++ *
++ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_MACHTYPE_H
++#define _AR71XX_MACHTYPE_H
++
++#include <asm/mips_machine.h>
++
++enum ar71xx_mach_type {
++	AR71XX_MACH_GENERIC = 0,
++	AR71XX_MACH_AP121,	/* Atheros AP121 */
++	AR71XX_MACH_AP121_MINI,	/* Atheros AP121-MINI */
++	AR71XX_MACH_AP81,	/* Atheros AP81 */
++	AR71XX_MACH_AP83,	/* Atheros AP83 */
++	AR71XX_MACH_AW_NR580,	/* AzureWave AW-NR580 */
++	AR71XX_MACH_DIR_600_A1,	/* D-Link DIR-600 rev. A1 */
++	AR71XX_MACH_DIR_615_C1,	/* D-Link DIR-615 rev. C1 */
++	AR71XX_MACH_DIR_825_B1,	/* D-Link DIR-825 rev. B1 */
++	AR71XX_MACH_JA76PF,	/* jjPlus JA76PF */
++	AR71XX_MACH_JWAP003,	/* jjPlus JWAP003 */
++	AR71XX_MACH_RB_411,	/* MikroTik RouterBOARD 411/411A/411AH */
++	AR71XX_MACH_RB_411U,	/* MikroTik RouterBOARD 411U */
++	AR71XX_MACH_RB_433,	/* MikroTik RouterBOARD 433/433AH */
++	AR71XX_MACH_RB_433U,	/* MikroTik RouterBOARD 433UAH */
++	AR71XX_MACH_RB_450,	/* MikroTik RouterBOARD 450 */
++	AR71XX_MACH_RB_450G,	/* MikroTik RouterBOARD 450G */
++	AR71XX_MACH_RB_493,	/* Mikrotik RouterBOARD 493/493AH */
++	AR71XX_MACH_RB_750,	/* MikroTik RouterBOARD 750 */
++	AR71XX_MACH_PB42,	/* Atheros PB42 */
++	AR71XX_MACH_PB44,	/* Atheros PB44 */
++	AR71XX_MACH_PB92,	/* Atheros PB92 */
++	AR71XX_MACH_MZK_W04NU,	/* Planex MZK-W04NU */
++	AR71XX_MACH_MZK_W300NH,	/* Planex MZK-W300NH */
++	AR71XX_MACH_NBG460N,	/* Zyxel NBG460N/550N/550NH */
++	AR71XX_MACH_TEW_632BRP,	/* TRENDnet TEW-632BRP */
++	AR71XX_MACH_TL_MR3220,	/* TP-LINK TL-MR3220 */
++	AR71XX_MACH_TL_MR3420,	/* TP-LINK TL-MR3420 */
++	AR71XX_MACH_TL_WA901ND,	/* TP-LINK TL-WA901ND */
++	AR71XX_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */
++	AR71XX_MACH_TL_WR741ND,	/* TP-LINK TL-WR741ND */
++	AR71XX_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */
++	AR71XX_MACH_TL_WR941ND,	/* TP-LINK TL-WR941ND */
++	AR71XX_MACH_TL_WR1043ND, /* TP-LINK TL-WR1041ND */
++	AR71XX_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */
++	AR71XX_MACH_UBNT_LSX,	/* Ubiquiti LSX */
++	AR71XX_MACH_UBNT_RS,	/* Ubiquiti RouterStation */
++	AR71XX_MACH_UBNT_RSPRO,	/* Ubiquiti RouterStation Pro */
++	AR71XX_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */
++	AR71XX_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */
++	AR71XX_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */
++	AR71XX_MACH_WNDR3700,	/* NETGEAR WNDR3700 */
++	AR71XX_MACH_WNDR3700V2,	/* NETGEAR WNDR3700v2 */
++	AR71XX_MACH_WNR2000,	/* NETGEAR WNR2000 */
++	AR71XX_MACH_WP543,	/* Compex WP543 */
++	AR71XX_MACH_WRT160NL,	/* Linksys WRT160NL */
++	AR71XX_MACH_WRT400N,	/* Linksys WRT400N */
++	AR71XX_MACH_WZR_HP_AG300H, /* Buffalo WZR-HP-AG300H */
++	AR71XX_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */
++	AR71XX_MACH_EAP7660D,	/* Senao EAP7660D */
++	AR71XX_MACH_ZCN_1523H_2, /* Zcomax ZCN-1523H-2-xx */
++	AR71XX_MACH_ZCN_1523H_5, /* Zcomax ZCN-1523H-5-xx */
++	AR71XX_MACH_AP96,	/* Atheros AP96 */
++	AR71XX_MACH_UBNT_UNIFI, /* Unifi */
++	AR71XX_MACH_DB120,      /* Atheros DB120 (AR934x based) */
++};
++
++#endif /* _AR71XX_MACHTYPE_H */
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/ar71xx/mach-ubnt.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-ubnt.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,281 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-ubnt.c	2011-08-24 02:41:55.597982750 +0200
+@@ -0,0 +1,333 @@
 +/*
 + *  Ubiquiti RouterStation support
 + *
@@ -6076,7 +8108,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +#define UBNT_M_GPIO_LED_L4	7
 +#define UBNT_M_GPIO_BTN_RESET	12
 +
-+#define UBNT_BUTTONS_POLL_INTERVAL	20
++#define UBNT_KEYS_POLL_INTERVAL		20	/* msecs */
++#define UBNT_KEYS_DEBOUNCE_INTERVAL	(3 * UBNT_KEYS_POLL_INTERVAL)
 +
 +static struct gpio_led ubnt_rs_leds_gpio[] __initdata = {
 +	{
@@ -6138,23 +8171,23 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +	}
 +};
 +
-+static struct gpio_button ubnt_gpio_buttons[] __initdata = {
++static struct gpio_keys_button ubnt_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "sw4",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= UBNT_RS_GPIO_SW4,
 +		.active_low	= 1,
 +	}
 +};
 +
-+static struct gpio_button ubnt_m_gpio_buttons[] __initdata = {
++static struct gpio_keys_button ubnt_m_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= UBNT_M_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}
@@ -6164,15 +8197,26 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +{
 +	ar71xx_add_device_m25p80(NULL);
 +
-+	ar71xx_add_device_gpio_buttons(-1, UBNT_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(ubnt_gpio_buttons),
-+					ubnt_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ubnt_gpio_keys),
++					 ubnt_gpio_keys);
 +
 +	pb42_pci_init();
 +}
 +
-+#define UBNT_RS_WAN_PHYMASK	(1 << 20)
-+#define UBNT_RS_LAN_PHYMASK	((1 << 16) | (1 << 17) | (1 << 18) | (1 << 19))
++/*
++ * There is Secondary MAC address duplicate problem with some UBNT HW batches.
++ * Do not increase Secondary MAC address by 1 but do workaround
++ * with 'Locally Administrated' bit.
++ */
++static void __init ubnt_init_secondary_mac(unsigned char *mac_base)
++{
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_base, 0);
++	ar71xx_eth1_data.mac_addr[0] |= 0x02;
++}
++
++#define UBNT_RS_WAN_PHYMASK	BIT(20)
++#define UBNT_RS_LAN_PHYMASK	(BIT(16) | BIT(17) | BIT(18) | BIT(19))
 +
 +static void __init ubnt_rs_setup(void)
 +{
@@ -6180,9 +8224,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +
 +	ar71xx_add_device_mdio(~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK));
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 +	ar71xx_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK;
 +
++	ubnt_init_secondary_mac(ar71xx_mac_base);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.speed = SPEED_100;
 +	ar71xx_eth1_data.duplex = DUPLEX_FULL;
@@ -6199,21 +8245,21 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +MIPS_MACHINE(AR71XX_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation",
 +	     ubnt_rs_setup);
 +
-+MIPS_MACHINE(AR71XX_MACH_UBNT_AR71XX, "Ubiquiti AR71xx-based board",
-+	     "Ubiquiti RouterStation", ubnt_rs_setup);
-+
-+#define UBNT_RSPRO_WAN_PHYMASK	(1 << 4)
-+#define UBNT_RSPRO_LAN_PHYMASK	((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3))
++#define UBNT_RSPRO_WAN_PHYMASK	BIT(4)
++#define UBNT_RSPRO_LAN_PHYMASK	(BIT(0) | BIT(1) | BIT(2) | BIT(3))
 +
 +static void __init ubnt_rspro_setup(void)
 +{
 +	ubnt_generic_setup();
 +
-+	ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK | UBNT_RSPRO_LAN_PHYMASK));
++	ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK |
++				 UBNT_RSPRO_LAN_PHYMASK));
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK;
 +
++	ubnt_init_secondary_mac(ar71xx_mac_base);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK;
 +	ar71xx_eth1_data.speed = SPEED_1000;
@@ -6238,7 +8284,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +
 +MIPS_MACHINE(AR71XX_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup);
 +
-+#define UBNT_LSSR71_PHY_MASK	(1 << 1)
++#define UBNT_LSSR71_PHY_MASK	BIT(1)
 +
 +static void __init ubnt_lssr71_setup(void)
 +{
@@ -6246,6 +8292,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +
 +	ar71xx_add_device_mdio(~UBNT_LSSR71_PHY_MASK);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 +	ar71xx_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK;
 +
@@ -6258,23 +8305,24 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +MIPS_MACHINE(AR71XX_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71",
 +	     ubnt_lssr71_setup);
 +
++#define UBNT_M_WAN_PHYMASK	BIT(4)
++
 +static void __init ubnt_m_setup(void)
 +{
-+	u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
++	u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
++	u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
 +	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(mac);
-+
 +	ar71xx_add_device_m25p80(NULL);
 +
-+	ar71xx_add_device_mdio(~0);
++	ar71xx_add_device_mdio(~UBNT_M_WAN_PHYMASK);
 +
-+	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac2, 0);
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
-+	ar71xx_eth0_data.fifo_cfg1 = 0x0010ffff;
-+	ar71xx_eth0_data.fifo_cfg2 = 0x015500aa;
-+	ar71xx_eth0_data.fifo_cfg3 = 0x01f00140;
++	ar71xx_eth0_data.phy_mask = UBNT_M_WAN_PHYMASK;
 +
 +	ar71xx_add_device_eth(0);
 +
@@ -6283,9 +8331,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_m_leds_gpio),
 +					ubnt_m_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, UBNT_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(ubnt_m_gpio_buttons),
-+					ubnt_m_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(ubnt_m_gpio_keys),
++					 ubnt_m_gpio_keys);
 +}
 +
 +static void __init ubnt_rocket_m_setup(void)
@@ -6305,22 +8353,58 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-ubnt.c linux-2.6.39/arch/mips/
 +{
 +	ubnt_m_setup();
 +
++	ar71xx_eth1_data.has_ar7240_switch = 1;
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.speed = SPEED_1000;
 +	ar71xx_eth1_data.duplex = DUPLEX_FULL;
-+	ar71xx_eth1_data.fifo_cfg1 = 0x0010ffff;
-+	ar71xx_eth1_data.fifo_cfg2 = 0x015500aa;
-+	ar71xx_eth1_data.fifo_cfg3 = 0x01f00140;
 +
 +	ar71xx_add_device_eth(1);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M",
 +	     ubnt_nano_m_setup);
++
++static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = {
++	{
++		.name		= "ubnt:orange:dome",
++		.gpio		= 1,
++		.active_low	= 0,
++	}, {
++		.name		= "ubnt:green:dome",
++		.gpio		= 0,
++		.active_low	= 0,
++	}
++};
++
++static void __init ubnt_unifi_setup(void)
++{
++	u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
++	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
++
++	ar71xx_add_device_m25p80(NULL);
++
++	ar71xx_add_device_mdio(~UBNT_M_WAN_PHYMASK);
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = UBNT_M_WAN_PHYMASK;
++
++	ar71xx_add_device_eth(0);
++
++	ap91_pci_init(ee, NULL);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio),
++					ubnt_unifi_leds_gpio);
++}
++
++MIPS_MACHINE(AR71XX_MACH_UBNT_UNIFI, "UBNT-XM", "Ubiquiti UniFi",
++	     ubnt_unifi_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/mips/ar71xx/mach-wndr3700.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-wndr3700.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,209 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-wndr3700.c	2011-08-24 02:41:55.607980283 +0200
+@@ -0,0 +1,290 @@
 +/*
 + *  Netgear WNDR3700 board support
 + *
@@ -6336,7 +8420,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/m
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/partitions.h>
 +#include <linux/delay.h>
-+#include <linux/rtl8366s.h>
++#include <linux/rtl8366.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
@@ -6361,7 +8445,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/m
 +#define WNDR3700_GPIO_RTL8366_SDA	5
 +#define WNDR3700_GPIO_RTL8366_SCK	7
 +
-+#define WNDR3700_BUTTONS_POLL_INTERVAL    20
++#define WNDR3700_KEYS_POLL_INTERVAL	20	/* msecs */
++#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL)
++
++#define WNDR3700_ETH0_MAC_OFFSET	0
++#define WNDR3700_ETH1_MAC_OFFSET	0x6
 +
 +#define WNDR3700_WMAC0_MAC_OFFSET	0
 +#define WNDR3700_WMAC1_MAC_OFFSET	0xc
@@ -6375,55 +8463,105 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/m
 +		.offset		= 0,
 +		.size		= 0x050000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "env",
 +		.offset		= 0x050000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x070000,
 +		.size		= 0x720000,
-+	} , {
++	}, {
 +		.name		= "config",
 +		.offset		= 0x790000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "config_bak",
 +		.offset		= 0x7a0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "pot",
 +		.offset		= 0x7b0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "traffic_meter",
 +		.offset		= 0x7c0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "language",
 +		.offset		= 0x7d0000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "caldata",
 +		.offset		= 0x7f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
 +	}
 +};
-+#endif /* CONFIG_MTD_PARTITIONS */
 +
-+static struct flash_platform_data wndr3700_flash_data = {
-+#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = wndr3700_partitions,
-+        .nr_parts       = ARRAY_SIZE(wndr3700_partitions),
-+#endif
++static struct mtd_partition wndr3700v2_partitions[] = {
++	{
++		.name		= "uboot",
++		.offset		= 0,
++		.size		= 0x050000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "env",
++		.offset		= 0x050000,
++		.size		= 0x020000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x070000,
++		.size		= 0xe40000,
++	}, {
++		.name		= "config",
++		.offset		= 0xeb0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "config_bak",
++		.offset		= 0xec0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "pot",
++		.offset		= 0xed0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "traffic_meter",
++		.offset		= 0xee0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "language",
++		.offset		= 0xef0000,
++		.size		= 0x100000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "caldata",
++		.offset		= 0xff0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}
 +};
++#define wndr3700_num_partitions		ARRAY_SIZE(wndr3700_partitions)
++#define wndr3700v2_num_partitions	ARRAY_SIZE(wndr3700v2_partitions)
++#else
++#define wndr3700_partitions		NULL
++#define wndr3700_num_partitions		0
++#define wndr3700v2_partitions		NULL
++#define wndr3700v2_num_partitions	0
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct flash_platform_data wndr3700_flash_data;
 +
 +static struct gpio_led wndr3700_leds_gpio[] __initdata = {
 +	{
@@ -6449,34 +8587,34 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/m
 +	}
 +};
 +
-+static struct gpio_button wndr3700_gpio_buttons[] __initdata = {
++static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WNDR3700_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WNDR3700_GPIO_BTN_WPS,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "wifi",
 +		.type		= EV_KEY,
 +		.code		= BTN_2,
-+		.threshold	= 3,
++		.debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WNDR3700_GPIO_BTN_WIFI,
 +		.active_low	= 1,
 +	}
 +};
 +
-+static struct rtl8366s_platform_data wndr3700_rtl8366s_data = {
-+	.gpio_sda        = WNDR3700_GPIO_RTL8366_SDA,
-+	.gpio_sck        = WNDR3700_GPIO_RTL8366_SCK,
++static struct rtl8366_platform_data wndr3700_rtl8366s_data = {
++	.gpio_sda	= WNDR3700_GPIO_RTL8366_SDA,
++	.gpio_sck	= WNDR3700_GPIO_RTL8366_SCK,
 +};
 +
 +static struct platform_device wndr3700_rtl8366s_device = {
@@ -6487,18 +8625,20 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/m
 +	}
 +};
 +
-+static void __init wndr3700_setup(void)
++static void __init wndr3700_common_setup(void)
 +{
 +	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 +
-+	ar71xx_set_mac_base(art);
-+
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr,
++			art + WNDR3700_ETH0_MAC_OFFSET, 0);
 +	ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
 +	ar71xx_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev;
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.speed = SPEED_1000;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr,
++			art + WNDR3700_ETH1_MAC_OFFSET, 0);
 +	ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
 +	ar71xx_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev;
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
@@ -6511,29 +8651,54 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wndr3700.c linux-2.6.39/arch/m
 +
 +	ar71xx_add_device_m25p80(&wndr3700_flash_data);
 +
-+        ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio),
-+				    wndr3700_leds_gpio);
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio),
++					wndr3700_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, WNDR3700_BUTTONS_POLL_INTERVAL,
-+				      ARRAY_SIZE(wndr3700_gpio_buttons),
-+				      wndr3700_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wndr3700_gpio_keys),
++					 wndr3700_gpio_keys);
 +
 +	platform_device_register(&wndr3700_rtl8366s_device);
 +	platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0);
 +
-+	ap94_pci_enable_quirk_wndr3700();
++	ap94_pci_setup_wmac_led_pin(0, 5);
++	ap94_pci_setup_wmac_led_pin(1, 5);
++
++	/* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */
++	ap94_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6));
++
++	/* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */
++	ap94_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6));
++
 +	ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET,
 +		      art + WNDR3700_WMAC0_MAC_OFFSET,
 +		      art + WNDR3700_CALDATA1_OFFSET,
 +		      art + WNDR3700_WMAC1_MAC_OFFSET);
 +}
 +
++static void __init wndr3700_setup(void)
++{
++	wndr3700_flash_data.parts = wndr3700_partitions,
++	wndr3700_flash_data.nr_parts = wndr3700_num_partitions,
++	wndr3700_common_setup();
++}
++
 +MIPS_MACHINE(AR71XX_MACH_WNDR3700, "WNDR3700", "NETGEAR WNDR3700",
 +	     wndr3700_setup);
++
++static void __init wndr3700v2_setup(void)
++{
++	wndr3700_flash_data.parts = wndr3700v2_partitions,
++	wndr3700_flash_data.nr_parts = wndr3700v2_num_partitions,
++	wndr3700_common_setup();
++}
++
++MIPS_MACHINE(AR71XX_MACH_WNDR3700V2, "WNDR3700v2", "NETGEAR WNDR3700v2",
++	     wndr3700v2_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mips/ar71xx/mach-wnr2000.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-wnr2000.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,148 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-wnr2000.c	2011-08-24 02:41:55.617990333 +0200
+@@ -0,0 +1,150 @@
 +/*
 + *  NETGEAR WNR2000 board support
 + *
@@ -6554,7 +8719,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +
@@ -6565,7 +8730,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +#define WNR2000_GPIO_BTN_RESET		21
 +#define WNR2000_GPIO_BTN_WPS		8
 +
-+#define WNR2000_BUTTONS_POLL_INTERVAL	20
++#define WNR2000_KEYS_POLL_INTERVAL	20	/* msecs */
++#define WNR2000_KEYS_DEBOUNCE_INTERVAL	(3 * WNR2000_KEYS_POLL_INTERVAL)
 +
 +#ifdef CONFIG_MTD_PARTITIONS
 +static struct mtd_partition wnr2000_partitions[] = {
@@ -6574,31 +8740,31 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "u-boot-env",
 +		.offset		= 0x040000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x050000,
 +		.size		= 0x240000,
-+	} , {
++	}, {
 +		.name		= "user-config",
 +		.offset		= 0x290000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "uImage",
 +		.offset		= 0x2a0000,
 +		.size		= 0x120000,
-+	} , {
++	}, {
 +		.name		= "language_table",
 +		.offset		= 0x3c0000,
 +		.size		= 0x020000,
-+	} , {
++	}, {
 +		.name		= "rootfs_checksum",
 +		.offset		= 0x3e0000,
 +		.size		= 0x010000,
-+	} , {
++	}, {
 +		.name		= "art",
 +		.offset		= 0x3f0000,
 +		.size		= 0x010000,
@@ -6609,8 +8775,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +
 +static struct flash_platform_data wnr2000_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = wnr2000_partitions,
-+        .nr_parts       = ARRAY_SIZE(wnr2000_partitions),
++	.parts		= wnr2000_partitions,
++	.nr_parts	= ARRAY_SIZE(wnr2000_partitions),
 +#endif
 +};
 +
@@ -6634,18 +8800,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +	}
 +};
 +
-+static struct gpio_button wnr2000_gpio_buttons[] __initdata = {
++static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WNR2000_GPIO_BTN_RESET,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WNR2000_GPIO_BTN_WPS,
 +	}
 +};
@@ -6654,14 +8820,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +{
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
 +
-+	ar71xx_set_mac_base(eeprom);
 +	ar71xx_add_device_mdio(0x0);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, eeprom, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +	ar71xx_eth0_data.has_ar8216 = 1;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, eeprom, 1);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.phy_mask = 0x10;
 +
@@ -6673,19 +8840,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wnr2000.c linux-2.6.39/arch/mi
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio),
 +					wnr2000_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, WNR2000_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(wnr2000_gpio_buttons),
-+					wnr2000_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wnr2000_gpio_keys),
++					 wnr2000_gpio_keys);
 +
 +
-+	ar913x_add_device_wmac(eeprom, NULL);
++	ar9xxx_add_device_wmac(eeprom, NULL);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wp543.c linux-2.6.39/arch/mips/ar71xx/mach-wp543.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-wp543.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-wp543.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,99 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-wp543.c	2011-08-24 02:41:55.617990333 +0200
+@@ -0,0 +1,101 @@
 +/*
 + *  Compex WP543/WPJ543 board support
 + *
@@ -6718,7 +8885,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wp543.c linux-2.6.39/arch/mips
 +#define WP543_GPIO_LED_DIAG	7
 +#define WP543_GPIO_SW4		8
 +
-+#define WP543_BUTTONS_POLL_INTERVAL	20
++#define WP543_KEYS_POLL_INTERVAL	20	/* msecs */
++#define WP543_KEYS_DEBOUNCE_INTERVAL	(3 * WP543_KEYS_POLL_INTERVAL)
 +
 +static struct gpio_led wp543_leds_gpio[] __initdata = {
 +	{
@@ -6744,18 +8912,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wp543.c linux-2.6.39/arch/mips
 +	}
 +};
 +
-+static struct gpio_button wp543_gpio_buttons[] __initdata = {
++static struct gpio_keys_button wp543_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "sw6",
 +		.type		= EV_KEY,
 +		.code		= BTN_0,
-+		.threshold	= 3,
++		.debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WP543_GPIO_SW6,
 +	}, {
 +		.desc		= "sw4",
 +		.type		= EV_KEY,
 +		.code		= BTN_1,
-+		.threshold	= 3,
++		.debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WP543_GPIO_SW4,
 +	}
 +};
@@ -6766,6 +8934,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wp543.c linux-2.6.39/arch/mips
 +
 +	ar71xx_add_device_mdio(0xfffffff7);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 +	ar71xx_eth0_data.phy_mask = 0x08;
 +	ar71xx_eth0_data.reset_bit = RESET_MODULE_GE0_MAC |
@@ -6779,16 +8948,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wp543.c linux-2.6.39/arch/mips
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio),
 +					wp543_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, WP543_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(wp543_gpio_buttons),
-+					wp543_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wp543_gpio_keys),
++					 wp543_gpio_keys);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_WP543, "WP543", "Compex WP543", wp543_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/mips/ar71xx/mach-wrt160nl.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-wrt160nl.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,158 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-wrt160nl.c	2011-08-24 02:41:55.617990333 +0200
+@@ -0,0 +1,161 @@
 +/*
 + *  Linksys WRT160NL board support
 + *
@@ -6807,7 +8976,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +#include "machtype.h"
 +#include "devices.h"
 +#include "dev-m25p80.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "dev-usb.h"
@@ -6821,7 +8990,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +#define WRT160NL_GPIO_BTN_WPS		7
 +#define WRT160NL_GPIO_BTN_RESET		21
 +
-+#define WRT160NL_BUTTONS_POLL_INTERVAL	20
++#define WRT160NL_KEYS_POLL_INTERVAL	20	/* msecs */
++#define WRT160NL_KEYS_DEBOUNCE_INTERVAL	(3 * WRT160NL_KEYS_POLL_INTERVAL)
 +
 +#define WRT160NL_NVRAM_ADDR	0x1f7e0000
 +#define WRT160NL_NVRAM_SIZE	0x10000
@@ -6833,25 +9003,25 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +		.offset		= 0,
 +		.size		= 0x040000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "kernel",
 +		.offset		= 0x040000,
 +		.size		= 0x0e0000,
-+	} , {
++	}, {
 +		.name		= "filesytem",
 +		.offset		= 0x120000,
 +		.size		= 0x6c0000,
-+	} , {
++	}, {
 +		.name		= "nvram",
 +		.offset		= 0x7e0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "ART",
 +		.offset		= 0x7f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x040000,
 +		.size		= 0x7a0000,
@@ -6861,8 +9031,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +
 +static struct flash_platform_data wrt160nl_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = wrt160nl_partitions,
-+        .nr_parts       = ARRAY_SIZE(wrt160nl_partitions),
++	.parts		= wrt160nl_partitions,
++	.nr_parts	= ARRAY_SIZE(wrt160nl_partitions),
 +#endif
 +};
 +
@@ -6887,19 +9057,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +	}
 +};
 +
-+static struct gpio_button wrt160nl_gpio_buttons[] __initdata = {
++static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WRT160NL_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "wps",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WRT160NL_GPIO_BTN_WPS,
 +		.active_low	= 1,
 +	}
@@ -6912,8 +9082,10 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +	u8 mac[6];
 +
 +	if (nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE,
-+			         "lan_hwaddr=", mac) == 0)
-+		ar71xx_set_mac_base(mac);
++				 "lan_hwaddr=", mac) == 0) {
++		ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++		ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
++	}
 +
 +	ar71xx_add_device_mdio(0x0);
 +
@@ -6931,17 +9103,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +	ar71xx_add_device_usb();
 +
 +	if (nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE,
-+			         "wl0_hwaddr=", mac) == 0)
-+		ar913x_add_device_wmac(eeprom, mac);
++				 "wl0_hwaddr=", mac) == 0)
++		ar9xxx_add_device_wmac(eeprom, mac);
 +	else
-+		ar913x_add_device_wmac(eeprom, NULL);
++		ar9xxx_add_device_wmac(eeprom, NULL);
 +
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio),
 +					wrt160nl_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, WRT160NL_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(wrt160nl_gpio_buttons),
-+					wrt160nl_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wrt160nl_gpio_keys),
++					 wrt160nl_gpio_keys);
 +
 +}
 +
@@ -6949,8 +9121,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt160nl.c linux-2.6.39/arch/m
 +	     wrt160nl_setup);
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mips/ar71xx/mach-wrt400n.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-wrt400n.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,168 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-wrt400n.c	2011-08-24 02:41:55.617990333 +0200
+@@ -0,0 +1,164 @@
 +/*
 + *  Linksys WRT400N board support
 + *
@@ -6982,7 +9154,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mi
 +#define WRT400N_GPIO_BTN_RESET	8
 +#define WRT400N_GPIO_BTN_WLSEC	3
 +
-+#define WRT400N_BUTTONS_POLL_INTERVAL	20
++#define WRT400N_KEYS_POLL_INTERVAL	20	/* msecs */
++#define WRT400N_KEYS_DEBOUNE_INTERVAL	(3 * WRT400N_KEYS_POLL_INTERVAL)
 +
 +#define WRT400N_MAC_ADDR_OFFSET		0x120c
 +#define WRT400N_CALDATA0_OFFSET		0x1000
@@ -6995,40 +9168,40 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mi
 +		.offset		= 0,
 +		.size		= 0x030000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "env",
 +		.offset		= 0x030000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "linux",
 +		.offset		= 0x040000,
 +		.size		= 0x140000,
-+	} , {
++	}, {
 +		.name		= "rootfs",
 +		.offset		= 0x180000,
 +		.size		= 0x630000,
-+	} , {
++	}, {
 +		.name		= "nvram",
 +		.offset		= 0x7b0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "factory",
 +		.offset		= 0x7c0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "language",
 +		.offset		= 0x7d0000,
 +		.size		= 0x020000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "caldata",
 +		.offset		= 0x7f0000,
 +		.size		= 0x010000,
 +		.mask_flags	= MTD_WRITEABLE,
-+	} , {
++	}, {
 +		.name		= "firmware",
 +		.offset		= 0x040000,
 +		.size		= 0x770000,
@@ -7038,8 +9211,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mi
 +
 +static struct flash_platform_data wrt400n_flash_data = {
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = wrt400n_partitions,
-+        .nr_parts       = ARRAY_SIZE(wrt400n_partitions),
++	.parts		= wrt400n_partitions,
++	.nr_parts	= ARRAY_SIZE(wrt400n_partitions),
 +#endif
 +};
 +
@@ -7063,19 +9236,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mi
 +	}
 +};
 +
-+static struct gpio_button wrt400n_gpio_buttons[] __initdata = {
++static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL,
 +		.gpio		= WRT400N_GPIO_BTN_RESET,
 +		.active_low	= 1,
-+	} , {
++	}, {
 +		.desc		= "wlsec",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL,
 +		.gpio		= WRT400N_GPIO_BTN_WLSEC,
 +		.active_low	= 1,
 +	}
@@ -7084,21 +9257,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mi
 +static void __init wrt400n_setup(void)
 +{
 +	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
-+	u8 mac[6];
-+	int i;
-+
-+	memcpy(mac, art + WRT400N_MAC_ADDR_OFFSET, 6);
-+	for (i = 5; i >= 3; i--)
-+		if (++mac[i] != 0x00) break;
-+
-+	ar71xx_set_mac_base(mac);
++	u8 *mac = art + WRT400N_MAC_ADDR_OFFSET;
 +
 +	ar71xx_add_device_mdio(0x0);
 +
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1);
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth0_data.speed = SPEED_100;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 2);
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
 +	ar71xx_eth1_data.phy_mask = 0x10;
 +
@@ -7110,19 +9278,254 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wrt400n.c linux-2.6.39/arch/mi
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio),
 +					wrt400n_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, WRT400N_BUTTONS_POLL_INTERVAL,
-+					ARRAY_SIZE(wrt400n_gpio_buttons),
-+					wrt400n_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wrt400n_gpio_keys),
++					 wrt400n_gpio_keys);
 +
 +	ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL,
 +		      art + WRT400N_CALDATA1_OFFSET, NULL);
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-ag300h.c linux-2.6.39/arch/mips/ar71xx/mach-wzr-hp-ag300h.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-ag300h.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-wzr-hp-ag300h.c	2011-08-24 02:41:55.628193451 +0200
+@@ -0,0 +1,231 @@
++/*
++ *  Buffalo WZR-HP-AG300H board support
++ *
++ *  Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <linux/mtd/concat.h>
++
++#include <asm/mips_machine.h>
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/gpio.h>
++
++#include "machtype.h"
++#include "devices.h"
++#include "dev-ap94-pci.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++#include "dev-m25p80.h"
++#include "dev-usb.h"
++
++#define WZRHPAG300H_MAC_OFFSET		0x20c
++#define WZRHPAG300H_KEYS_POLL_INTERVAL     20      /* msecs */
++#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL)
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition wzrhpag300h_flash_partitions[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x0040000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "u-boot-env",
++		.offset		= 0x0040000,
++		.size		= 0x0010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "art",
++		.offset		= 0x0050000,
++		.size		= 0x0010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "kernel",
++		.offset		= 0x0060000,
++		.size		= 0x0100000,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x0160000,
++		.size		= 0x1e90000,
++	}, {
++		.name		= "user_property",
++		.offset		= 0x1ff0000,
++		.size		= 0x0010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "firmware",
++		.offset		= 0x0060000,
++		.size		= 0x1f90000,
++	}
++};
++
++#endif /* CONFIG_MTD_PARTITIONS */
++
++static struct mtd_info *concat_devs[2] = { NULL, NULL };
++static struct work_struct mtd_concat_work;
++
++static void mtd_concat_add_work(struct work_struct *work)
++{
++	struct mtd_info *mtd;
++
++	mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash");
++
++#ifdef CONFIG_MTD_PARTITIONS
++	add_mtd_partitions(mtd, wzrhpag300h_flash_partitions,
++			   ARRAY_SIZE(wzrhpag300h_flash_partitions));
++#else
++	add_mtd_device(mtd);
++#endif
++}
++
++static void mtd_concat_add(struct mtd_info *mtd)
++{
++	static bool registered = false;
++
++	if (registered)
++		return;
++
++	if (!strcmp(mtd->name, "spi0.0"))
++		concat_devs[0] = mtd;
++	else if (!strcmp(mtd->name, "spi0.1"))
++		concat_devs[1] = mtd;
++	else
++		return;
++
++	if (!concat_devs[0] || !concat_devs[1])
++		return;
++
++	registered = true;
++	INIT_WORK(&mtd_concat_work, mtd_concat_add_work);
++	schedule_work(&mtd_concat_work);
++}
++
++static void mtd_concat_remove(struct mtd_info *mtd)
++{
++}
++
++static void add_mtd_concat_notifier(void)
++{
++	static struct mtd_notifier not = {
++		.add = mtd_concat_add,
++		.remove = mtd_concat_remove,
++	};
++
++	register_mtd_user(&not);
++}
++
++static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = {
++	{
++		.name		= "wzr-hp-ag300h:red:diag",
++		.gpio		= 1,
++		.active_low	= 1,
++	},
++};
++
++
++static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= 11,
++		.active_low	= 1,
++	}, {
++		.desc		= "usb",
++		.type		= EV_KEY,
++		.code		= BTN_2,
++		.debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= 3,
++		.active_low	= 1,
++	}, {
++		.desc		= "aoss",
++		.type		= EV_KEY,
++		.code		= KEY_WPS_BUTTON,
++		.debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= 5,
++		.active_low	= 1,
++	}, {
++		.desc		= "router_auto",
++		.type		= EV_KEY,
++		.code		= BTN_6,
++		.debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= 6,
++		.active_low	= 1,
++	}, {
++		.desc		= "router_off",
++		.type		= EV_KEY,
++		.code		= BTN_5,
++		.debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= 7,
++		.active_low	= 1,
++	}
++};
++
++static struct spi_board_info ar71xx_spi_info[] = {
++	{
++		.bus_num	= 0,
++		.chip_select	= 0,
++		.max_speed_hz   = 25000000,
++		.modalias   = "m25p80",
++	},
++	{
++		.bus_num	= 0,
++		.chip_select	= 1,
++		.max_speed_hz   = 25000000,
++		.modalias   = "m25p80",
++	}
++};
++
++static void __init wzrhpag300h_setup(void)
++{
++	u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000);
++	u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000);
++	u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET;
++	u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET;
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac1, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac2, 1);
++
++	ar71xx_add_device_mdio(~(BIT(0) | BIT(4)));
++
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth0_data.speed = SPEED_1000;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.phy_mask = BIT(0);
++
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
++	ar71xx_eth1_data.phy_mask = BIT(4);
++
++	ar71xx_add_device_eth(0);
++	ar71xx_add_device_eth(1);
++
++	ar71xx_add_device_usb();
++	gpio_request(2, "usb");
++	gpio_direction_output(2, 1);
++
++	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio),
++					wzrhpag300h_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wzrhpag300h_gpio_keys),
++					 wzrhpag300h_gpio_keys);
++
++	ar71xx_add_device_spi(NULL, ar71xx_spi_info,
++			      ARRAY_SIZE(ar71xx_spi_info));
++
++	add_mtd_concat_notifier();
++
++	ap94_pci_init(eeprom1, mac1, eeprom2, mac2);
++}
++
++MIPS_MACHINE(AR71XX_MACH_WZR_HP_AG300H, "WZR-HP-AG300H",
++	     "Buffalo WZR-HP-AG300H", wzrhpag300h_setup);
++
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/arch/mips/ar71xx/mach-wzr-hp-g300nh.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/mach-wzr-hp-g300nh.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,265 @@
++++ linux-2.6.39/arch/mips/ar71xx/mach-wzr-hp-g300nh.c	2011-08-24 02:41:55.649418561 +0200
+@@ -0,0 +1,292 @@
 +/*
 + *  Buffalo WZR-HP-G300NH board support
 + *
@@ -7137,7 +9540,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/partitions.h>
 +#include <linux/nxp_74hc153.h>
-+#include <linux/rtl8366s.h>
++#include <linux/rtl8366.h>
 +
 +#include <asm/mips_machine.h>
 +#include <asm/mach-ar71xx/ar71xx.h>
@@ -7145,7 +9548,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +
 +#include "machtype.h"
 +#include "devices.h"
-+#include "dev-ar913x-wmac.h"
++#include "dev-ar9xxx-wmac.h"
 +#include "dev-gpio-buttons.h"
 +#include "dev-leds-gpio.h"
 +#include "dev-usb.h"
@@ -7173,7 +9576,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6)
 +#define WZRHPG300NH_GPIO_BTN_QOS_OFF	(WZRHPG300NH_GPIO_EXP_BASE + 7)
 +
-+#define WZRHPG300NH_BUTTONS_POLL_INTERVAL	20
++#define WZRHPG300NH_KEYS_POLL_INTERVAL	20	/* msecs */
++#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL)
 +
 +#define WZRHPG300NH_MAC_OFFSET		0x20c
 +
@@ -7218,8 +9622,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +static struct ar91xx_flash_platform_data wzrhpg300nh_flash_data = {
 +	.width		= 2,
 +#ifdef CONFIG_MTD_PARTITIONS
-+        .parts          = wzrhpg300nh_flash_partitions,
-+        .nr_parts       = ARRAY_SIZE(wzrhpg300nh_flash_partitions),
++	.parts		= wzrhpg300nh_flash_partitions,
++	.nr_parts	= ARRAY_SIZE(wzrhpg300nh_flash_partitions),
 +#endif
 +};
 +
@@ -7268,54 +9672,54 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +	}
 +};
 +
-+static struct gpio_button wzrhpg300nh_gpio_buttons[] __initdata = {
++static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = {
 +	{
 +		.desc		= "reset",
 +		.type		= EV_KEY,
 +		.code		= KEY_RESTART,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_RESET,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "aoss",
 +		.type		= EV_KEY,
 +		.code		= KEY_WPS_BUTTON,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_AOSS,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "usb",
 +		.type		= EV_KEY,
 +		.code		= BTN_2,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_USB,
 +		.active_low	= 1,
 +	}, {
 +		.desc		= "qos_on",
 +		.type		= EV_KEY,
 +		.code		= BTN_3,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_QOS_ON,
 +		.active_low	= 0,
 +	}, {
 +		.desc		= "qos_off",
 +		.type		= EV_KEY,
 +		.code		= BTN_4,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_QOS_OFF,
 +		.active_low	= 0,
 +	}, {
 +		.desc		= "router_on",
 +		.type		= EV_KEY,
 +		.code		= BTN_5,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_ROUTER_ON,
 +		.active_low	= 0,
 +	}, {
 +		.desc		= "router_auto",
 +		.type		= EV_KEY,
 +		.code		= BTN_6,
-+		.threshold	= 3,
++		.debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL,
 +		.gpio		= WZRHPG300NH_GPIO_BTN_ROUTER_AUTO,
 +		.active_low	= 0,
 +	}
@@ -7337,33 +9741,55 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +	}
 +};
 +
-+static struct rtl8366s_platform_data wzrhpg300nh_rtl8366s_data = {
-+	.gpio_sda        = WZRHPG300NH_GPIO_RTL8366_SDA,
-+	.gpio_sck        = WZRHPG300NH_GPIO_RTL8366_SCK,
++static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = {
++	.gpio_sda	= WZRHPG300NH_GPIO_RTL8366_SDA,
++	.gpio_sck	= WZRHPG300NH_GPIO_RTL8366_SCK,
 +};
 +
 +static struct platform_device wzrhpg300nh_rtl8366s_device = {
 +	.name		= RTL8366S_DRIVER_NAME,
 +	.id		= -1,
 +	.dev = {
-+		.platform_data	= &wzrhpg300nh_rtl8366s_data,
++		.platform_data	= &wzrhpg300nh_rtl8366_data,
++	}
++};
++
++static struct platform_device wzrhpg300nh_rtl8366rb_device = {
++	.name           = RTL8366RB_DRIVER_NAME,
++	.id             = -1,
++	.dev = {
++		.platform_data  = &wzrhpg300nh_rtl8366_data,
 +	}
 +};
 +
 +static void __init wzrhpg300nh_setup(void)
 +{
 +	u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
++	u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET;
++	bool hasrtl8366rb = false;
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
 +
-+	ar71xx_set_mac_base(eeprom + WZRHPG300NH_MAC_OFFSET);
++	if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB)
++		hasrtl8366rb = true;
++
++	if (hasrtl8366rb) {
++		ar71xx_eth0_pll_data.pll_1000 = 0x1f000000;
++		ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev;
++		ar71xx_eth1_pll_data.pll_1000 = 0x100;
++		ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev;
++	} else {
++		ar71xx_eth0_pll_data.pll_1000 = 0x1e000100;
++		ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev;
++		ar71xx_eth1_pll_data.pll_1000 = 0x1e000100;
++		ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev;
++	}
 +
-+	ar71xx_eth0_pll_data.pll_1000 = 0x1e000100;
-+	ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev;
 +	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth0_data.speed = SPEED_1000;
 +	ar71xx_eth0_data.duplex = DUPLEX_FULL;
 +
-+	ar71xx_eth1_pll_data.pll_1000 = 0x1e000100;
-+	ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev;
 +	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 +	ar71xx_eth1_data.phy_mask = 0x10;
 +
@@ -7371,90 +9797,319 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-wzr-hp-g300nh.c linux-2.6.39/a
 +	ar71xx_add_device_eth(1);
 +
 +	ar71xx_add_device_usb();
-+	ar913x_add_device_wmac(eeprom, NULL);
++	ar9xxx_add_device_wmac(eeprom, NULL);
 +
 +	platform_device_register(&wzrhpg300nh_74hc153_device);
 +	platform_device_register(&wzrhpg300nh_flash_device);
-+	platform_device_register(&wzrhpg300nh_rtl8366s_device);
++
++	if (hasrtl8366rb)
++		platform_device_register(&wzrhpg300nh_rtl8366rb_device);
++	else
++		platform_device_register(&wzrhpg300nh_rtl8366s_device);
 +
 +	ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio),
-+				    wzrhpg300nh_leds_gpio);
++					wzrhpg300nh_leds_gpio);
 +
-+	ar71xx_add_device_gpio_buttons(-1, WZRHPG300NH_BUTTONS_POLL_INTERVAL,
-+				       ARRAY_SIZE(wzrhpg300nh_gpio_buttons),
-+				       wzrhpg300nh_gpio_buttons);
++	ar71xx_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(wzrhpg300nh_gpio_keys),
++					 wzrhpg300nh_gpio_keys);
 +
 +}
 +
 +MIPS_MACHINE(AR71XX_MACH_WZR_HP_G300NH, "WZR-HP-G300NH",
 +	     "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup);
-diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/machtype.h linux-2.6.39/arch/mips/ar71xx/machtype.h
---- linux-2.6.39.orig/arch/mips/ar71xx/machtype.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/machtype.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,60 @@
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/mach-zcn-1523h.c linux-2.6.39/arch/mips/ar71xx/mach-zcn-1523h.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/mach-zcn-1523h.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/mach-zcn-1523h.c	2011-08-24 02:41:55.649418561 +0200
+@@ -0,0 +1,214 @@
 +/*
-+ *  Atheros AR71xx machine type definitions
++ *  Zcomax ZCN-1523H-2-8/5-16 board support
 + *
-+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
 + *  by the Free Software Foundation.
 + */
 +
-+#ifndef _AR71XX_MACHTYPE_H
-+#define _AR71XX_MACHTYPE_H
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
 +
-+#include <asm/mips_machine.h>
++#include <asm/mach-ar71xx/ar71xx.h>
 +
-+enum ar71xx_mach_type {
-+	AR71XX_MACH_GENERIC = 0,
-+	AR71XX_MACH_AP81,	/* Atheros AP81 */
-+	AR71XX_MACH_AP83,	/* Atheros AP83 */
-+	AR71XX_MACH_AW_NR580,	/* AzureWave AW-NR580 */
-+	AR71XX_MACH_DIR_600_A1,	/* D-Link DIR-600 rev. A1 */
-+	AR71XX_MACH_DIR_615_C1,	/* D-Link DIR-615 rev. C1 */
-+	AR71XX_MACH_DIR_825_B1,	/* D-Link DIR-825 rev. B1 */
-+	AR71XX_MACH_RB_411,	/* MikroTik RouterBOARD 411/411A/411AH */
-+	AR71XX_MACH_RB_411U,	/* MikroTik RouterBOARD 411U */
-+	AR71XX_MACH_RB_433,	/* MikroTik RouterBOARD 433/433AH */
-+	AR71XX_MACH_RB_433U,	/* MikroTik RouterBOARD 433UAH */
-+	AR71XX_MACH_RB_450,	/* MikroTik RouterBOARD 450 */
-+	AR71XX_MACH_RB_450G,	/* MikroTik RouterBOARD 450G */
-+	AR71XX_MACH_RB_493,	/* Mikrotik RouterBOARD 493/493AH */
-+	AR71XX_MACH_RB_750,	/* MikroTik RouterBOARD 750 */
-+	AR71XX_MACH_PB42,	/* Atheros PB42 */
-+	AR71XX_MACH_PB44,	/* Atheros PB44 */
-+	AR71XX_MACH_PB92,	/* Atheros PB92 */
-+	AR71XX_MACH_MZK_W04NU,	/* Planex MZK-W04NU */
-+	AR71XX_MACH_MZK_W300NH,	/* Planex MZK-W300NH */
-+	AR71XX_MACH_NBG460N,	/* Zyxel NBG460N/550N/550NH */
-+	AR71XX_MACH_TEW_632BRP,	/* TRENDnet TEW-632BRP */
-+	AR71XX_MACH_TL_WR741ND,	/* TP-LINK TL-WR741ND */
-+	AR71XX_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */
-+	AR71XX_MACH_TL_WR941ND,	/* TP-LINK TL-WR941ND */
-+	AR71XX_MACH_TL_WR1043ND, /* TP-LINK TL-WR1041ND */
-+	AR71XX_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */
-+	AR71XX_MACH_UBNT_LSX,	/* Ubiquiti LSX */
-+	AR71XX_MACH_UBNT_RS,	/* Ubiquiti RouterStation */
-+	AR71XX_MACH_UBNT_AR71XX, /* Ubiquiti AR71xx-based board */
-+	AR71XX_MACH_UBNT_RSPRO,	/* Ubiquiti RouterStation Pro */
-+	AR71XX_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */
-+	AR71XX_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */
-+	AR71XX_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */
-+	AR71XX_MACH_WNDR3700,	/* NETGEAR WNDR3700 */
-+	AR71XX_MACH_WNR2000,	/* NETGEAR WNR2000 */
-+	AR71XX_MACH_WP543,	/* Compex WP543 */
-+	AR71XX_MACH_WRT160NL,	/* Linksys WRT160NL */
-+	AR71XX_MACH_WRT400N,	/* Linksys WRT400N */
-+	AR71XX_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */
++#include "machtype.h"
++#include "devices.h"
++#include "dev-m25p80.h"
++#include "dev-ap91-pci.h"
++#include "dev-gpio-buttons.h"
++#include "dev-leds-gpio.h"
++
++#define ZCN_1523H_GPIO_BTN_RESET	0
++#define ZCN_1523H_GPIO_LED_INIT		11
++#define ZCN_1523H_GPIO_LED_LAN1		17
++
++#define ZCN_1523H_2_GPIO_LED_WEAK	13
++#define ZCN_1523H_2_GPIO_LED_MEDIUM	14
++#define ZCN_1523H_2_GPIO_LED_STRONG	15
++
++#define ZCN_1523H_5_GPIO_LED_UNKNOWN	1
++#define ZCN_1523H_5_GPIO_LED_LAN2	13
++#define ZCN_1523H_5_GPIO_LED_WEAK	14
++#define ZCN_1523H_5_GPIO_LED_MEDIUM	15
++#define ZCN_1523H_5_GPIO_LED_STRONG	16
++
++#define ZCN_1523H_KEYS_POLL_INTERVAL	20	/* msecs */
++#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL)
++
++#ifdef CONFIG_MTD_PARTITIONS
++static struct mtd_partition zcn_1523h_partitions[] = {
++	{
++		.name		= "u-boot",
++		.offset		= 0,
++		.size		= 0x040000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "u-boot-env",
++		.offset		= 0x040000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "rootfs",
++		.offset		= 0x050000,
++		.size		= 0x610000,
++	}, {
++		.name		= "kernel",
++		.offset		= 0x660000,
++		.size		= 0x170000,
++	}, {
++		.name		= "configure",
++		.offset		= 0x7d0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "mfg",
++		.offset		= 0x7e0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "eeprom",
++		.offset		= 0x7f0000,
++		.size		= 0x010000,
++		.mask_flags	= MTD_WRITEABLE,
++	}, {
++		.name		= "firmware",
++		.offset		= 0x050000,
++		.size		= 0x780000,
++	}
 +};
++#endif /* CONFIG_MTD_PARTITIONS */
 +
-+#endif /* _AR71XX_MACHTYPE_H */
++static struct flash_platform_data zcn_1523h_flash_data = {
++#ifdef CONFIG_MTD_PARTITIONS
++	.parts		= zcn_1523h_partitions,
++	.nr_parts	= ARRAY_SIZE(zcn_1523h_partitions),
++#endif
++};
++
++static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = {
++	{
++		.desc		= "reset",
++		.type		= EV_KEY,
++		.code		= KEY_RESTART,
++		.debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL,
++		.gpio		= ZCN_1523H_GPIO_BTN_RESET,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_led zcn_1523h_leds_gpio[] __initdata = {
++	{
++		.name		= "zcn-1523h:amber:init",
++		.gpio		= ZCN_1523H_GPIO_LED_INIT,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:green:lan1",
++		.gpio		= ZCN_1523H_GPIO_LED_LAN1,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = {
++	{
++		.name		= "zcn-1523h:red:weak",
++		.gpio		= ZCN_1523H_2_GPIO_LED_WEAK,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:amber:medium",
++		.gpio		= ZCN_1523H_2_GPIO_LED_MEDIUM,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:green:strong",
++		.gpio		= ZCN_1523H_2_GPIO_LED_STRONG,
++		.active_low	= 1,
++	}
++};
++
++static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = {
++	{
++		.name		= "zcn-1523h:red:weak",
++		.gpio		= ZCN_1523H_5_GPIO_LED_WEAK,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:amber:medium",
++		.gpio		= ZCN_1523H_5_GPIO_LED_MEDIUM,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:green:strong",
++		.gpio		= ZCN_1523H_5_GPIO_LED_STRONG,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:green:lan2",
++		.gpio		= ZCN_1523H_5_GPIO_LED_LAN2,
++		.active_low	= 1,
++	}, {
++		.name		= "zcn-1523h:amber:unknown",
++		.gpio		= ZCN_1523H_5_GPIO_LED_UNKNOWN,
++	}
++};
++
++static void __init zcn_1523h_generic_setup(void)
++{
++	u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004);
++	u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
++
++	ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
++				     AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
++				     AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
++				     AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
++				     AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
++
++	ar71xx_add_device_m25p80(&zcn_1523h_flash_data);
++
++	ar71xx_add_device_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio),
++					zcn_1523h_leds_gpio);
++
++	ar71xx_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL,
++					 ARRAY_SIZE(zcn_1523h_gpio_keys),
++					 zcn_1523h_gpio_keys);
++
++	ap91_pci_init(ee, mac);
++
++	ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
++	ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
++
++	/* LAN1 port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++
++	/* LAN2 port */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(0);
++}
++
++static void __init zcn_1523h_2_setup(void)
++{
++	zcn_1523h_generic_setup();
++	ap91_pci_setup_wmac_gpio(BIT(9), 0);
++
++	ar71xx_add_device_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio),
++					zcn_1523h_2_leds_gpio);
++}
++
++MIPS_MACHINE(AR71XX_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2",
++	     zcn_1523h_2_setup);
++
++static void __init zcn_1523h_5_setup(void)
++{
++	zcn_1523h_generic_setup();
++	ap91_pci_setup_wmac_gpio(BIT(8), 0);
++
++	ar71xx_add_device_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio),
++					zcn_1523h_5_leds_gpio);
++	ar71xx_add_device_eth(1);
++}
++
++MIPS_MACHINE(AR71XX_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5",
++	     zcn_1523h_5_setup);
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/Makefile linux-2.6.39/arch/mips/ar71xx/Makefile
+--- linux-2.6.39.orig/arch/mips/ar71xx/Makefile	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/Makefile	2011-08-24 02:41:55.677990354 +0200
+@@ -0,0 +1,67 @@
++#
++# Makefile for the Atheros AR71xx SoC specific parts of the kernel
++#
++# Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++# Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++#
++# This program is free software; you can redistribute it and/or modify it
++# under the terms of the GNU General Public License version 2 as published
++# by the Free Software Foundation.
++
++obj-y	:= prom.o irq.o setup.o devices.o gpio.o ar71xx.o
++
++obj-$(CONFIG_EARLY_PRINTK)		+= early_printk.o
++obj-$(CONFIG_PCI)			+= pci.o
++
++obj-$(CONFIG_AR71XX_DEV_AP91_PCI)	+= dev-ap91-pci.o
++obj-$(CONFIG_AR71XX_DEV_AP94_PCI)	+= dev-ap94-pci.o
++obj-$(CONFIG_AR71XX_DEV_AR9XXX_WMAC)	+= dev-ar9xxx-wmac.o
++obj-$(CONFIG_AR71XX_DEV_DB120_PCI)	+= dev-db120-pci.o
++obj-$(CONFIG_AR71XX_DEV_DSA)		+= dev-dsa.o
++obj-$(CONFIG_AR71XX_DEV_GPIO_BUTTONS)	+= dev-gpio-buttons.o
++obj-$(CONFIG_AR71XX_DEV_LEDS_GPIO)	+= dev-leds-gpio.o
++obj-$(CONFIG_AR71XX_DEV_M25P80)		+= dev-m25p80.o
++obj-$(CONFIG_AR71XX_DEV_PB42_PCI)	+= dev-pb42-pci.o
++obj-$(CONFIG_AR71XX_DEV_PB9X_PCI)	+= dev-pb9x-pci.o
++obj-$(CONFIG_AR71XX_DEV_USB)		+= dev-usb.o
++
++obj-$(CONFIG_AR71XX_NVRAM)		+= nvram.o
++obj-$(CONFIG_AR71XX_PCI_ATH9K_FIXUP)	+= pci-ath9k-fixup.o
++
++obj-$(CONFIG_AR71XX_MACH_AP121)		+= mach-ap121.o
++obj-$(CONFIG_AR71XX_MACH_AP81)		+= mach-ap81.o
++obj-$(CONFIG_AR71XX_MACH_AP83)		+= mach-ap83.o
++obj-$(CONFIG_AR71XX_MACH_AP96)		+= mach-ap96.o
++obj-$(CONFIG_AR71XX_MACH_AW_NR580)	+= mach-aw-nr580.o
++obj-$(CONFIG_AR71XX_MACH_DB120)		+= mach-db120.o
++obj-$(CONFIG_AR71XX_MACH_DIR_600_A1)	+= mach-dir-600-a1.o
++obj-$(CONFIG_AR71XX_MACH_DIR_615_C1)	+= mach-dir-615-c1.o
++obj-$(CONFIG_AR71XX_MACH_DIR_825_B1)	+= mach-dir-825-b1.o
++obj-$(CONFIG_AR71XX_MACH_EAP7660D)	+= mach-eap7660d.o
++obj-$(CONFIG_AR71XX_MACH_JA76PF)	+= mach-ja76pf.o
++obj-$(CONFIG_AR71XX_MACH_JWAP003)	+= mach-jwap003.o
++obj-$(CONFIG_AR71XX_MACH_MZK_W04NU)	+= mach-mzk-w04nu.o
++obj-$(CONFIG_AR71XX_MACH_MZK_W300NH)	+= mach-mzk-w300nh.o
++obj-$(CONFIG_AR71XX_MACH_NBG460N)	+= mach-nbg460n.o
++obj-$(CONFIG_AR71XX_MACH_PB42)		+= mach-pb42.o
++obj-$(CONFIG_AR71XX_MACH_PB44)		+= mach-pb44.o
++obj-$(CONFIG_AR71XX_MACH_PB92)		+= mach-pb92.o
++obj-$(CONFIG_AR71XX_MACH_RB4XX)		+= mach-rb4xx.o
++obj-$(CONFIG_AR71XX_MACH_RB750)		+= mach-rb750.o
++obj-$(CONFIG_AR71XX_MACH_TEW_632BRP)	+= mach-tew-632brp.o
++obj-$(CONFIG_AR71XX_MACH_TL_MR3X20)	+= mach-tl-mr3x20.o
++obj-$(CONFIG_AR71XX_MACH_TL_WA901ND)	+= mach-tl-wa901nd.o
++obj-$(CONFIG_AR71XX_MACH_TL_WA901ND_V2)	+= mach-tl-wa901nd-v2.o
++obj-$(CONFIG_AR71XX_MACH_TL_WR741ND)	+= mach-tl-wr741nd.o
++obj-$(CONFIG_AR71XX_MACH_TL_WR841N_V1)	+= mach-tl-wr841n.o
++obj-$(CONFIG_AR71XX_MACH_TL_WR941ND)	+= mach-tl-wr941nd.o
++obj-$(CONFIG_AR71XX_MACH_TL_WR1043ND)	+= mach-tl-wr1043nd.o
++obj-$(CONFIG_AR71XX_MACH_UBNT)		+= mach-ubnt.o
++obj-$(CONFIG_AR71XX_MACH_WNDR3700)	+= mach-wndr3700.o
++obj-$(CONFIG_AR71XX_MACH_WNR2000)	+= mach-wnr2000.o
++obj-$(CONFIG_AR71XX_MACH_WP543)		+= mach-wp543.o
++obj-$(CONFIG_AR71XX_MACH_WRT160NL)	+= mach-wrt160nl.o
++obj-$(CONFIG_AR71XX_MACH_WRT400N)	+= mach-wrt400n.o
++obj-$(CONFIG_AR71XX_MACH_WZR_HP_G300NH)	+= mach-wzr-hp-g300nh.o
++obj-$(CONFIG_AR71XX_MACH_WZR_HP_AG300H)	+= mach-wzr-hp-ag300h.o
++obj-$(CONFIG_AR71XX_MACH_ZCN_1523H)	+= mach-zcn-1523h.o
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/nvram.c linux-2.6.39/arch/mips/ar71xx/nvram.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/nvram.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/nvram.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/ar71xx/nvram.c	2011-08-24 02:41:55.677990354 +0200
 @@ -0,0 +1,75 @@
 +/*
 + *  Atheros AR71xx minimal nvram support
@@ -7527,13 +10182,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/nvram.c linux-2.6.39/arch/mips/ar71
 +
 +	ret = 0;
 +
-+ free:
++free:
 +	vfree(buf);
 +	return ret;
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/nvram.h linux-2.6.39/arch/mips/ar71xx/nvram.h
 --- linux-2.6.39.orig/arch/mips/ar71xx/nvram.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/nvram.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/ar71xx/nvram.h	2011-08-24 02:41:55.687991145 +0200
 @@ -0,0 +1,19 @@
 +/*
 + *  Atheros AR71xx minimal nvram support
@@ -7554,10 +10209,147 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/nvram.h linux-2.6.39/arch/mips/ar71
 +			 const char *name, char *mac) __init;
 +
 +#endif /* _AR71XX_NVRAM_H */
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/pci-ath9k-fixup.c linux-2.6.39/arch/mips/ar71xx/pci-ath9k-fixup.c
+--- linux-2.6.39.orig/arch/mips/ar71xx/pci-ath9k-fixup.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/pci-ath9k-fixup.c	2011-08-24 02:41:55.697990606 +0200
+@@ -0,0 +1,123 @@
++/*
++ *  Atheros AP94 reference board PCI initialization
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++struct ath9k_fixup {
++	u16		*cal_data;
++	unsigned	slot;
++};
++
++static int ath9k_num_fixups;
++static struct ath9k_fixup ath9k_fixups[2];
++
++static void ath9k_pci_fixup(struct pci_dev *dev)
++{
++	void __iomem *mem;
++	u16 *cal_data = NULL;
++	u16 cmd;
++	u32 bar0;
++	u32 val;
++	unsigned i;
++
++	for (i = 0; i < ath9k_num_fixups; i++) {
++		if (ath9k_fixups[i].cal_data == NULL)
++			continue;
++
++		if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
++			continue;
++
++		cal_data = ath9k_fixups[i].cal_data;
++		break;
++	}
++
++	if (cal_data == NULL)
++		return;
++
++	if (*cal_data != 0xa55a) {
++		pr_err("pci %s: invalid calibration data\n", pci_name(dev));
++		return;
++	}
++
++	pr_info("pci %s: fixup device configuration\n", pci_name(dev));
++
++	mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
++	if (!mem) {
++		pr_err("pci %s: ioremap error\n", pci_name(dev));
++		return;
++	}
++
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7161:
++		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
++				       AR71XX_PCI_MEM_BASE);
++		break;
++	case AR71XX_SOC_AR7240:
++		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
++		break;
++
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff);
++		break;
++
++	default:
++		BUG();
++	}
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	/* set pointer to first reg address */
++	cal_data += 3;
++	while (*cal_data != 0xffff) {
++		u32 reg;
++		reg = *cal_data++;
++		val = *cal_data++;
++		val |= (*cal_data++) << 16;
++
++		__raw_writel(val, mem + reg);
++		udelay(100);
++	}
++
++	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++	dev->vendor = val & 0xffff;
++	dev->device = (val >> 16) & 0xffff;
++
++	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++	dev->revision = val & 0xff;
++	dev->class = val >> 8; /* upper 3 bytes */
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
++
++	iounmap(mem);
++}
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
++
++void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data)
++{
++	if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
++		return;
++
++	ath9k_fixups[ath9k_num_fixups].slot = slot;
++	ath9k_fixups[ath9k_num_fixups].cal_data = cal_data;
++	ath9k_num_fixups++;
++}
+diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/pci-ath9k-fixup.h linux-2.6.39/arch/mips/ar71xx/pci-ath9k-fixup.h
+--- linux-2.6.39.orig/arch/mips/ar71xx/pci-ath9k-fixup.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/ar71xx/pci-ath9k-fixup.h	2011-08-24 02:41:55.697990606 +0200
+@@ -0,0 +1,6 @@
++#ifndef _PCI_ATH9K_FIXUP
++#define _PCI_ATH9K_FIXUP
++
++void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init;
++
++#endif /* _PCI_ATH9K_FIXUP */
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/pci.c linux-2.6.39/arch/mips/ar71xx/pci.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/pci.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,93 @@
++++ linux-2.6.39/arch/mips/ar71xx/pci.c	2011-08-24 02:41:55.697990606 +0200
+@@ -0,0 +1,97 @@
 +/*
 + *  Atheros AR71xx PCI setup code
 + *
@@ -7614,6 +10406,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/pci.c linux-2.6.39/arch/mips/ar71xx
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
 +		ret = ar724x_pcibios_map_irq(dev, slot, pin);
 +		break;
 +
@@ -7639,6 +10433,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/pci.c linux-2.6.39/arch/mips/ar71xx
 +	case AR71XX_SOC_AR7240:
 +	case AR71XX_SOC_AR7241:
 +	case AR71XX_SOC_AR7242:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
 +		ret = ar724x_pcibios_init();
 +		break;
 +
@@ -7653,12 +10449,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/pci.c linux-2.6.39/arch/mips/ar71xx
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/prom.c linux-2.6.39/arch/mips/ar71xx/prom.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/prom.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/prom.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,105 @@
++++ linux-2.6.39/arch/mips/ar71xx/prom.c	2011-08-24 02:41:55.737990425 +0200
+@@ -0,0 +1,189 @@
 +/*
 + *  Atheros AR71xx SoC specific prom routines
 + *
-+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
 + *  This program is free software; you can redistribute it and/or modify it
@@ -7673,6 +10469,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/prom.c linux-2.6.39/arch/mips/ar71x
 +
 +#include <asm/bootinfo.h>
 +#include <asm/addrspace.h>
++#include <asm/fw/myloader/myloader.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
@@ -7698,30 +10495,90 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/prom.c linux-2.6.39/arch/mips/ar71x
 +	strlcat(arcs_cmdline, buf, sizeof(arcs_cmdline));
 +}
 +
-+static void __init ar71xx_prom_find_env(char **envp, const char *name)
++static const char * __init ar71xx_prom_find_env(char **envp, const char *name)
 +{
-+	int len = strlen(name);
++	const char *ret = NULL;
++	int len;
 +	char **p;
 +
 +	if (!is_valid_ram_addr(envp))
-+		return;
++		return NULL;
 +
++	len = strlen(name);
 +	for (p = envp; is_valid_ram_addr(*p); p++) {
 +		if (strncmp(name, *p, len) == 0 && (*p)[len] == '=') {
-+			ar71xx_prom_append_cmdline(name, *p + len + 1);
++			ret = *p + len + 1;
 +			break;
 +		}
 +
 +		/* RedBoot env comes in pointer pairs - key, value */
 +		if (strncmp(name, *p, len) == 0 && (*p)[len] == 0)
 +			if (is_valid_ram_addr(*(++p))) {
-+				ar71xx_prom_append_cmdline(name, *p);
++				ret = *p;
 +				break;
 +			}
 +	}
++
++	return ret;
 +}
 +
-+static int inline ar71xx_use__image_cmdline(void) { return 0; }
++static int __init ar71xx_prom_init_myloader(void)
++{
++	struct myloader_info *mylo;
++	char mac_buf[32];
++	char *mac;
++
++	mylo = myloader_get_info();
++	if (!mylo)
++		return 0;
++
++	switch (mylo->did) {
++	case DEVID_COMPEX_WP543:
++		ar71xx_prom_append_cmdline("board", "WP543");
++		break;
++	default:
++		printk(KERN_WARNING "prom: unknown device id: %x\n",
++				mylo->did);
++		return 0;
++	}
++
++	mac = mylo->macs[0];
++	snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x",
++		 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
++
++	ar71xx_prom_append_cmdline("ethaddr", mac_buf);
++
++	return 1;
++}
++
++#ifdef CONFIG_IMAGE_CMDLINE_HACK
++extern char __image_cmdline[];
++
++static int __init ar71xx_use__image_cmdline(void)
++{
++	char *p = __image_cmdline;
++	int replace = 0;
++
++	if (*p == '-') {
++		replace = 1;
++		p++;
++	}
++
++	if (*p == '\0')
++		return 0;
++
++	if (replace) {
++		strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline));
++	} else {
++		strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
++		strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
++	}
++
++	return 1;
++}
++#else
++static inline int ar71xx_use__image_cmdline(void) { return 0; }
++#endif
 +
 +static __init void ar71xx_prom_init_cmdline(int argc, char **argv)
 +{
@@ -7742,6 +10599,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/prom.c linux-2.6.39/arch/mips/ar71x
 +
 +void __init prom_init(void)
 +{
++	const char *env;
 +	char **envp;
 +
 +	printk(KERN_DEBUG "prom: fw_arg0=%08x, fw_arg1=%08x, "
@@ -7750,10 +10608,32 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/prom.c linux-2.6.39/arch/mips/ar71x
 +			(unsigned int)fw_arg2, (unsigned int)fw_arg3);
 +
 +
++	if (ar71xx_prom_init_myloader())
++		return;
++
 +	ar71xx_prom_init_cmdline(fw_arg0, (char **)fw_arg1);
 +
 +	envp = (char **)fw_arg2;
-+	ar71xx_prom_find_env(envp, "board");
++	if (!strstr(arcs_cmdline, "ethaddr=")) {
++		env = ar71xx_prom_find_env(envp, "ethaddr");
++		if (env)
++			ar71xx_prom_append_cmdline("ethaddr", env);
++	}
++
++	if (!strstr(arcs_cmdline, "board=")) {
++		env = ar71xx_prom_find_env(envp, "board");
++		if (env) {
++			/* Workaround for buggy bootloaders */
++			if (strcmp(env, "RouterStation") == 0 ||
++			    strcmp(env, "Ubiquiti AR71xx-based board") == 0)
++				env = "UBNT-RS";
++
++			if (strcmp(env, "RouterStation PRO") == 0)
++				env = "UBNT-RSPRO";
++
++			ar71xx_prom_append_cmdline("board", env);
++		}
++	}
 +}
 +
 +void __init prom_free_prom_memory(void)
@@ -7762,15 +10642,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/prom.c linux-2.6.39/arch/mips/ar71x
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71xx/setup.c
 --- linux-2.6.39.orig/arch/mips/ar71xx/setup.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/ar71xx/setup.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,310 @@
++++ linux-2.6.39/arch/mips/ar71xx/setup.c	2011-08-24 02:41:55.737990425 +0200
+@@ -0,0 +1,446 @@
 +/*
 + *  Atheros AR71xx SoC specific setup
 + *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.31 BSP
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -7792,9 +10674,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +#include "devices.h"
 +
 +#define AR71XX_SYS_TYPE_LEN	64
-+#define AR71XX_BASE_FREQ	40000000
-+#define AR91XX_BASE_FREQ	5000000
-+#define AR724X_BASE_FREQ	5000000
 +
 +u32 ar71xx_cpu_freq;
 +EXPORT_SYMBOL_GPL(ar71xx_cpu_freq);
@@ -7805,9 +10684,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +u32 ar71xx_ddr_freq;
 +EXPORT_SYMBOL_GPL(ar71xx_ddr_freq);
 +
++u32 ar71xx_ref_freq;
++EXPORT_SYMBOL_GPL(ar71xx_ref_freq);
++
 +enum ar71xx_soc_type ar71xx_soc;
 +EXPORT_SYMBOL_GPL(ar71xx_soc);
 +
++u32 ar71xx_soc_rev;
++EXPORT_SYMBOL_GPL(ar71xx_soc_rev);
++
 +static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN];
 +
 +static void ar71xx_restart(char *command)
@@ -7829,7 +10714,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	unsigned long size;
 +
 +	for (size = AR71XX_MEM_SIZE_MIN; size < AR71XX_MEM_SIZE_MAX;
-+	     size <<= 1 ) {
++	     size <<= 1) {
 +		if (!memcmp(ar71xx_detect_mem_size,
 +			    ar71xx_detect_mem_size + size, 1024))
 +			break;
@@ -7875,19 +10760,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	case REV_ID_MAJOR_AR7240:
 +		ar71xx_soc = AR71XX_SOC_AR7240;
 +		chip = "7240";
-+		rev = (id & AR724X_REV_ID_REVISION_MASK);
++		rev = id & AR724X_REV_ID_REVISION_MASK;
 +		break;
 +
 +	case REV_ID_MAJOR_AR7241:
 +		ar71xx_soc = AR71XX_SOC_AR7241;
 +		chip = "7241";
-+		rev = (id & AR724X_REV_ID_REVISION_MASK);
++		rev = id & AR724X_REV_ID_REVISION_MASK;
 +		break;
 +
 +	case REV_ID_MAJOR_AR7242:
 +		ar71xx_soc = AR71XX_SOC_AR7242;
 +		chip = "7242";
-+		rev = (id & AR724X_REV_ID_REVISION_MASK);
++		rev = id & AR724X_REV_ID_REVISION_MASK;
 +		break;
 +
 +	case REV_ID_MAJOR_AR913X:
@@ -7907,11 +10792,76 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +		}
 +		break;
 +
++	case REV_ID_MAJOR_AR9330:
++		ar71xx_soc = AR71XX_SOC_AR9330;
++		chip = "9330";
++		rev = id & AR933X_REV_ID_REVISION_MASK;
++		break;
++
++	case REV_ID_MAJOR_AR9331:
++		ar71xx_soc = AR71XX_SOC_AR9331;
++		chip = "9331";
++		rev = id & AR933X_REV_ID_REVISION_MASK;
++		break;
++
++	case REV_ID_MAJOR_AR9342:
++		ar71xx_soc = AR71XX_SOC_AR9342;
++		chip = "9342";
++		rev = id & AR934X_REV_ID_REVISION_MASK;
++		break;
++
++	case REV_ID_MAJOR_AR9344:
++		ar71xx_soc = AR71XX_SOC_AR9344;
++		chip = "9344";
++		rev = id & AR934X_REV_ID_REVISION_MASK;
++		break;
++
 +	default:
 +		panic("ar71xx: unknown chip id:0x%08x\n", id);
 +	}
 +
++	ar71xx_soc_rev = rev;
++
 +	sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev);
++	pr_info("SoC: %s\n", ar71xx_sys_type);
++}
++
++static void __init ar934x_detect_sys_frequency(void)
++{
++	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
++
++	if (ar71xx_reset_rr(AR934X_RESET_REG_BOOTSTRAP) & AR934X_REF_CLK_40)
++		ar71xx_ref_freq = 40 * 1000 * 1000;
++	else
++		ar71xx_ref_freq = 25 * 1000 * 1000;
++
++	clk_ctrl = ar71xx_pll_rr(AR934X_PLL_REG_DDR_CTRL_CLOCK);
++
++	pll = ar71xx_pll_rr(AR934X_PLL_REG_CPU_CONFIG);
++	out_div	= AR934X_CPU_PLL_CFG_OUTDIV_GET(pll);
++	ref_div	= AR934X_CPU_PLL_CFG_REFDIV_GET(pll);
++	nint	= AR934X_CPU_PLL_CFG_NINT_GET(pll);
++	frac	= AR934X_CPU_PLL_CFG_NFRAC_GET(pll);
++	postdiv = AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_GET(clk_ctrl);
++	ar71xx_cpu_freq = ((nint * ar71xx_ref_freq / ref_div) >> out_div) /
++			  (postdiv + 1);
++
++	out_div	= AR934X_DDR_PLL_CFG_OUTDIV_GET(pll);
++	ref_div	= AR934X_DDR_PLL_CFG_REFDIV_GET(pll);
++	nint	= AR934X_DDR_PLL_CFG_NINT_GET(pll);
++	frac	= AR934X_DDR_PLL_CFG_NFRAC_GET(pll);
++	postdiv = AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_GET(clk_ctrl);
++	ar71xx_ddr_freq = ((nint * ar71xx_ref_freq / ref_div) >> out_div) /
++			  (postdiv + 1);
++
++	postdiv = AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_GET(clk_ctrl);
++
++	if (AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_GET(clk_ctrl)) {
++		ar71xx_ahb_freq = ar71xx_ddr_freq / (postdiv + 1);
++	} else {
++		ar71xx_ahb_freq = ar71xx_cpu_freq / (postdiv + 1);
++	}
++
 +}
 +
 +static void __init ar91xx_detect_sys_frequency(void)
@@ -7920,10 +10870,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	u32 freq;
 +	u32 div;
 +
++	ar71xx_ref_freq = 5 * 1000 * 1000;
++
 +	pll = ar71xx_pll_rr(AR91XX_PLL_REG_CPU_CONFIG);
 +
 +	div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK);
-+	freq = div * AR91XX_BASE_FREQ;
++	freq = div * ar71xx_ref_freq;
 +
 +	ar71xx_cpu_freq = freq;
 +
@@ -7940,10 +10892,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	u32 freq;
 +	u32 div;
 +
++	ar71xx_ref_freq = 40 * 1000 * 1000;
++
 +	pll = ar71xx_pll_rr(AR71XX_PLL_REG_CPU_CONFIG);
 +
 +	div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1;
-+	freq = div * AR71XX_BASE_FREQ;
++	freq = div * ar71xx_ref_freq;
 +
 +	div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;
 +	ar71xx_cpu_freq = freq / div;
@@ -7961,10 +10915,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	u32 freq;
 +	u32 div;
 +
++	ar71xx_ref_freq = 5 * 1000 * 1000;
++
 +	pll = ar71xx_pll_rr(AR724X_PLL_REG_CPU_CONFIG);
 +
 +	div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);
-+	freq = div * AR724X_BASE_FREQ;
++	freq = div * ar71xx_ref_freq;
 +
 +	div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
 +	freq *= div;
@@ -7978,6 +10934,56 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	ar71xx_ahb_freq = ar71xx_cpu_freq / div;
 +}
 +
++static void __init ar933x_detect_sys_frequency(void)
++{
++	u32 clock_ctrl;
++	u32 cpu_config;
++	u32 freq;
++	u32 t;
++
++	t = ar71xx_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
++	if (t & AR933X_BOOTSTRAP_REF_CLK_40)
++		ar71xx_ref_freq = (40 * 1000 * 1000);
++	else
++		ar71xx_ref_freq = (25 * 1000 * 1000);
++
++	clock_ctrl = ar71xx_pll_rr(AR933X_PLL_CLOCK_CTRL_REG);
++	if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) {
++		ar71xx_cpu_freq = ar71xx_ref_freq;
++		ar71xx_ahb_freq = ar71xx_ref_freq;
++		ar71xx_ddr_freq = ar71xx_ref_freq;
++	} else {
++		cpu_config = ar71xx_pll_rr(AR933X_PLL_CPU_CONFIG_REG);
++
++		t = (cpu_config >> AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
++		    AR933X_PLL_CPU_CONFIG_REFDIV_MASK;
++		freq = ar71xx_ref_freq / t;
++
++		t = (cpu_config >> AR933X_PLL_CPU_CONFIG_NINT_SHIFT) &
++		    AR933X_PLL_CPU_CONFIG_NINT_MASK;
++		freq *= t;
++
++		t = (cpu_config >> AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
++		    AR933X_PLL_CPU_CONFIG_OUTDIV_MASK;
++		if (t == 0)
++			t = 1;
++
++		freq >>= t;
++
++		t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT) &
++		     AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK) + 1;
++		ar71xx_cpu_freq = freq / t;
++
++		t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) &
++		      AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK) + 1;
++		ar71xx_ddr_freq = freq / t;
++
++		t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT) &
++		     AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1;
++		ar71xx_ahb_freq = freq / t;
++	}
++}
++
 +static void __init detect_sys_frequency(void)
 +{
 +	switch (ar71xx_soc) {
@@ -7998,6 +11004,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +		ar91xx_detect_sys_frequency();
 +		break;
 +
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++		ar933x_detect_sys_frequency();
++		break;
++
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		ar934x_detect_sys_frequency();
++		break;
 +	default:
 +		BUG();
 +	}
@@ -8035,12 +11051,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +	ar71xx_detect_sys_type();
 +	detect_sys_frequency();
 +
-+	printk(KERN_INFO
-+		"%s, CPU:%u.%03u MHz, AHB:%u.%03u MHz, DDR:%u.%03u MHz\n",
-+		ar71xx_sys_type,
++	pr_info("Clocks: CPU:%u.%03uMHz, DDR:%u.%03uMHz, AHB:%u.%03uMHz, "
++		"Ref:%u.%03uMHz",
 +		ar71xx_cpu_freq / 1000000, (ar71xx_cpu_freq / 1000) % 1000,
++		ar71xx_ddr_freq / 1000000, (ar71xx_ddr_freq / 1000) % 1000,
 +		ar71xx_ahb_freq / 1000000, (ar71xx_ahb_freq / 1000) % 1000,
-+		ar71xx_ddr_freq / 1000000, (ar71xx_ddr_freq / 1000) % 1000);
++		ar71xx_ref_freq / 1000000, (ar71xx_ref_freq / 1000) % 1000);
 +
 +	_machine_restart = ar71xx_restart;
 +	_machine_halt = ar71xx_halt;
@@ -8074,17 +11090,110 @@ diff -Nur linux-2.6.39.orig/arch/mips/ar71xx/setup.c linux-2.6.39/arch/mips/ar71
 +
 +MIPS_MACHINE(AR71XX_MACH_GENERIC, "Generic", "Generic AR71xx board",
 +	     ar71xx_generic_init);
+diff -Nur linux-2.6.39.orig/arch/mips/include/asm/checksum.h linux-2.6.39/arch/mips/include/asm/checksum.h
+--- linux-2.6.39.orig/arch/mips/include/asm/checksum.h	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/checksum.h	2011-08-24 05:53:21.109231561 +0200
+@@ -12,6 +12,7 @@
+ #define _ASM_CHECKSUM_H
+ 
+ #include <linux/in6.h>
++#include <linux/unaligned/packed_struct.h>
+ 
+ #include <asm/uaccess.h>
+ 
+@@ -104,26 +105,30 @@
+ 	const unsigned int *stop = word + ihl;
+ 	unsigned int csum;
+ 	int carry;
++	unsigned int w;
+ 
+-	csum = word[0];
+-	csum += word[1];
+-	carry = (csum < word[1]);
++	csum = __get_unaligned_cpu32(word++);
++
++	w = __get_unaligned_cpu32(word++);
++	csum += w;
++	carry = (csum < w);
+ 	csum += carry;
+ 
+-	csum += word[2];
+-	carry = (csum < word[2]);
++	w = __get_unaligned_cpu32(word++);
++	csum += w;
++	carry = (csum < w);
+ 	csum += carry;
+ 
+-	csum += word[3];
+-	carry = (csum < word[3]);
++	w = __get_unaligned_cpu32(word++);
++	csum += w;
++	carry = (csum < w);
+ 	csum += carry;
+ 
+-	word += 4;
+ 	do {
+-		csum += *word;
+-		carry = (csum < *word);
++		w = __get_unaligned_cpu32(word++);
++		csum += w;
++		carry = (csum < w);
+ 		csum += carry;
+-		word++;
+ 	} while (word != stop);
+ 
+ 	return csum_fold(csum);
+diff -Nur linux-2.6.39.orig/arch/mips/include/asm/fw/myloader/myloader.h linux-2.6.39/arch/mips/include/asm/fw/myloader/myloader.h
+--- linux-2.6.39.orig/arch/mips/include/asm/fw/myloader/myloader.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/include/asm/fw/myloader/myloader.h	2011-04-27 12:19:21.887662064 +0200
+@@ -0,0 +1,34 @@
++/*
++ *  Compex's MyLoader specific definitions
++ *
++ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
++
++#ifndef _ASM_MIPS_FW_MYLOADER_H
++#define _ASM_MIPS_FW_MYLOADER_H
++
++#include <linux/myloader.h>
++
++struct myloader_info {
++	uint32_t	vid;
++	uint32_t	did;
++	uint32_t	svid;
++	uint32_t	sdid;
++	uint8_t		macs[MYLO_ETHADDR_COUNT][6];
++};
++
++#ifdef CONFIG_MYLOADER
++extern struct myloader_info *myloader_get_info(void) __init;
++#else
++static inline struct myloader_info *myloader_get_info(void)
++{
++	return NULL;
++}
++#endif /* CONFIG_MYLOADER */
++
++#endif /* _ASM_MIPS_FW_MYLOADER_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar71xx.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar71xx.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,514 @@
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar71xx.h	2011-08-06 09:32:36.758018150 +0200
+@@ -0,0 +1,769 @@
 +/*
 + *  Atheros AR71xx SoC specific definitions
 + *
++ *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
-+ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.15 BSP
++ *  Parts of this file are based on Atheros 2.6.31 BSP
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -8148,15 +11257,23 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define AR91XX_WMAC_BASE	(AR71XX_APB_BASE + 0x000C0000)
 +#define AR91XX_WMAC_SIZE	0x30000
 +
++#define AR933X_UART_BASE	(AR71XX_APB_BASE + 0x00020000)
++#define AR933X_UART_SIZE	0x14
++#define AR933X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
++#define AR933X_WMAC_SIZE	0x20000
++
++#define AR934X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
++#define AR934X_WMAC_SIZE	0x20000
++
 +#define AR71XX_MEM_SIZE_MIN	0x0200000
 +#define AR71XX_MEM_SIZE_MAX	0x10000000
 +
 +#define AR71XX_CPU_IRQ_BASE	0
 +#define AR71XX_MISC_IRQ_BASE	8
-+#define AR71XX_MISC_IRQ_COUNT	8
-+#define AR71XX_GPIO_IRQ_BASE	16
++#define AR71XX_MISC_IRQ_COUNT	32
++#define AR71XX_GPIO_IRQ_BASE	40
 +#define AR71XX_GPIO_IRQ_COUNT	32
-+#define AR71XX_PCI_IRQ_BASE     48
++#define AR71XX_PCI_IRQ_BASE	72
 +#define AR71XX_PCI_IRQ_COUNT	8
 +
 +#define AR71XX_CPU_IRQ_IP2	(AR71XX_CPU_IRQ_BASE + 2)
@@ -8174,6 +11291,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define AR71XX_MISC_IRQ_PERFC	(AR71XX_MISC_IRQ_BASE + 5)
 +#define AR71XX_MISC_IRQ_OHCI	(AR71XX_MISC_IRQ_BASE + 6)
 +#define AR71XX_MISC_IRQ_DMA	(AR71XX_MISC_IRQ_BASE + 7)
++#define AR71XX_MISC_IRQ_TIMER2	(AR71XX_MISC_IRQ_BASE + 8)
++#define AR71XX_MISC_IRQ_TIMER3	(AR71XX_MISC_IRQ_BASE + 9)
++#define AR71XX_MISC_IRQ_TIMER4	(AR71XX_MISC_IRQ_BASE + 10)
++#define AR71XX_MISC_IRQ_DDR_PERF	(AR71XX_MISC_IRQ_BASE + 11)
++#define AR71XX_MISC_IRQ_ENET_LINK	(AR71XX_MISC_IRQ_BASE + 12)
 +
 +#define AR71XX_GPIO_IRQ(_x)	(AR71XX_GPIO_IRQ_BASE + (_x))
 +
@@ -8185,6 +11307,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +extern u32 ar71xx_ahb_freq;
 +extern u32 ar71xx_cpu_freq;
 +extern u32 ar71xx_ddr_freq;
++extern u32 ar71xx_ref_freq;
 +
 +enum ar71xx_soc_type {
 +	AR71XX_SOC_UNKNOWN,
@@ -8195,8 +11318,14 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +	AR71XX_SOC_AR7241,
 +	AR71XX_SOC_AR7242,
 +	AR71XX_SOC_AR9130,
-+	AR71XX_SOC_AR9132
++	AR71XX_SOC_AR9132,
++	AR71XX_SOC_AR9330,
++	AR71XX_SOC_AR9331,
++	AR71XX_SOC_AR9341,
++	AR71XX_SOC_AR9342,
++	AR71XX_SOC_AR9344,
 +};
++extern u32 ar71xx_soc_rev;
 +
 +extern enum ar71xx_soc_type ar71xx_soc;
 +
@@ -8232,6 +11361,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define AR724X_DDR_DIV_SHIFT		22
 +#define AR724X_DDR_DIV_MASK		0x3
 +
++#define AR7242_PLL_REG_ETH0_INT_CLOCK	0x2c
++
 +#define AR91XX_PLL_REG_CPU_CONFIG	0x00
 +#define AR91XX_PLL_REG_ETH_CONFIG	0x04
 +#define AR91XX_PLL_REG_ETH0_INT_CLOCK	0x14
@@ -8247,6 +11378,185 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define AR91XX_ETH0_PLL_SHIFT		20
 +#define AR91XX_ETH1_PLL_SHIFT		22
 +
++#define AR933X_PLL_CPU_CONFIG_REG	0x00
++#define AR933X_PLL_CLOCK_CTRL_REG	0x08
++
++#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT	10
++#define AR933X_PLL_CPU_CONFIG_NINT_MASK		0x3f
++#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT	16
++#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK	0x1f
++#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT	23
++#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK	0x7
++
++#define AR933X_PLL_CLOCK_CTRL_BYPASS		BIT(2)
++#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT	5
++#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK	0x3
++#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT	10
++#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK	0x3
++#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT	15
++#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK	0x7
++
++#define AR934X_PLL_REG_CPU_CONFIG	0x00
++#define AR934X_PLL_REG_DDR_CTRL_CLOCK	0x8
++
++#define AR934X_CPU_PLL_CFG_OUTDIV_MSB	21
++#define AR934X_CPU_PLL_CFG_OUTDIV_LSB	19
++#define AR934X_CPU_PLL_CFG_OUTDIV_MASK	0x00380000
++
++#define AR934X_CPU_PLL_CFG_OUTDIV_GET(x)		\
++	(((x) & AR934X_CPU_PLL_CFG_OUTDIV_MASK) >>	\
++	AR934X_CPU_PLL_CFG_OUTDIV_LSB)
++
++#define AR934X_DDR_PLL_CFG_OUTDIV_MSB	25
++#define AR934X_DDR_PLL_CFG_OUTDIV_LSB	23
++#define AR934X_DDR_PLL_CFG_OUTDIV_MASK	0x03800000
++
++#define AR934X_DDR_PLL_CFG_OUTDIV_GET(x) 		\
++	(((x) & AR934X_DDR_PLL_CFG_OUTDIV_MASK) >> 	\
++	AR934X_DDR_PLL_CFG_OUTDIV_LSB)
++
++#define AR934X_DDR_PLL_CFG_OUTDIV_SET(x) 		\
++	(((x) << AR934X_DDR_PLL_CFG_OUTDIV_LSB) & 	\
++	AR934X_DDR_PLL_CFG_OUTDIV_MASK)
++
++#define AR934X_CPU_PLL_CFG_REFDIV_MSB	16
++#define AR934X_CPU_PLL_CFG_REFDIV_LSB	12
++#define AR934X_CPU_PLL_CFG_REFDIV_MASK	0x0001f000
++
++#define AR934X_CPU_PLL_CFG_REFDIV_GET(x) 		\
++	(((x) & AR934X_CPU_PLL_CFG_REFDIV_MASK) >> 	\
++	AR934X_CPU_PLL_CFG_REFDIV_LSB)
++
++#define AR934X_CPU_PLL_CFG_REFDIV_SET(x) 		\
++	(((x) << AR934X_CPU_PLL_CFG_REFDIV_LSB) & 	\
++	AR934X_CPU_PLL_CFG_REFDIV_MASK)
++
++#define AR934X_CPU_PLL_CFG_REFDIV_RESET	2
++
++#define AR934X_CPU_PLL_CFG_NINT_MSB	11
++#define AR934X_CPU_PLL_CFG_NINT_LSB	6
++#define AR934X_CPU_PLL_CFG_NINT_MASK	0x00000fc0
++
++#define AR934X_CPU_PLL_CFG_NINT_GET(x)			\
++	(((x) & AR934X_CPU_PLL_CFG_NINT_MASK) >> 	\
++	AR934X_CPU_PLL_CFG_NINT_LSB)
++
++#define AR934X_CPU_PLL_CFG_NINT_SET(x)			\
++	(((x) << AR934X_CPU_PLL_CFG_NINT_LSB) & 	\
++	AR934X_CPU_PLL_CFG_NINT_MASK)
++
++#define AR934X_CPU_PLL_CFG_NINT_RESET	20
++
++#define AR934X_CPU_PLL_CFG_NFRAC_MSB	5
++#define AR934X_CPU_PLL_CFG_NFRAC_LSB	0
++#define AR934X_CPU_PLL_CFG_NFRAC_MASK	0x0000003f
++
++#define AR934X_CPU_PLL_CFG_NFRAC_GET(x)		\
++	(((x) & AR934X_CPU_PLL_CFG_NFRAC_MASK) >> 	\
++	AR934X_CPU_PLL_CFG_NFRAC_LSB)
++
++#define AR934X_CPU_PLL_CFG_NFRAC_SET(x)		\
++	(((x) << AR934X_CPU_PLL_CFG_NFRAC_LSB) & 	\
++	AR934X_CPU_PLL_CFG_NFRAC_MASK)
++
++#define AR934X_DDR_PLL_CFG_REFDIV_MSB	20
++#define AR934X_DDR_PLL_CFG_REFDIV_LSB	16
++#define AR934X_DDR_PLL_CFG_REFDIV_MASK	0x001f0000
++
++#define AR934X_DDR_PLL_CFG_REFDIV_GET(x) 		\
++	(((x) & AR934X_DDR_PLL_CFG_REFDIV_MASK) >> 	\
++	AR934X_DDR_PLL_CFG_REFDIV_LSB)
++
++#define AR934X_DDR_PLL_CFG_REFDIV_SET(x) 		\
++	(((x) << AR934X_DDR_PLL_CFG_REFDIV_LSB) &	\
++	AR934X_DDR_PLL_CFG_REFDIV_MASK)
++
++#define AR934X_DDR_PLL_CFG_REFDIV_RESET	2
++
++#define AR934X_DDR_PLL_CFG_NINT_MSB	15
++#define AR934X_DDR_PLL_CFG_NINT_LSB	10
++#define AR934X_DDR_PLL_CFG_NINT_MASK	0x0000fc00
++
++#define AR934X_DDR_PLL_CFG_NINT_GET(x)			\
++	(((x) & AR934X_DDR_PLL_CFG_NINT_MASK) >> 	\
++	AR934X_DDR_PLL_CFG_NINT_LSB)
++
++#define AR934X_DDR_PLL_CFG_NINT_SET(x)			\
++	(((x) << AR934X_DDR_PLL_CFG_NINT_LSB) &		\
++	AR934X_DDR_PLL_CFG_NINT_MASK)
++
++#define AR934X_DDR_PLL_CFG_NINT_RESET	20
++
++#define AR934X_DDR_PLL_CFG_NFRAC_MSB	9
++#define AR934X_DDR_PLL_CFG_NFRAC_LSB	0
++#define AR934X_DDR_PLL_CFG_NFRAC_MASK	0x000003ff
++
++#define AR934X_DDR_PLL_CFG_NFRAC_GET(x)		\
++	(((x) & AR934X_DDR_PLL_CFG_NFRAC_MASK) >> 	\
++	AR934X_DDR_PLL_CFG_NFRAC_LSB)
++
++#define AR934X_DDR_PLL_CFG_NFRAC_SET(x)		\
++	(((x) << AR934X_DDR_PLL_CFG_NFRAC_LSB) & 	\
++	AR934X_DDR_PLL_CFG_NFRAC_MASK)
++
++#define AR934X_DDR_PLL_CFG_NFRAC_RESET	512
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MSB	19
++#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_LSB	15
++#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK	0x000f8000
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_GET(x)		\
++	(((x) & AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK) >>	\
++	AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_LSB)
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SET(x)		\
++	(((x) << AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_LSB) & 	\
++	AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK)
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHB_POST_DIV_RESET		0
++
++#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MSB	14
++#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_LSB	10
++#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK	0x00007c00
++
++#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_GET(x)		\
++	(((x) & AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK) >> 	\
++	AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_LSB)
++
++#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SET(x)		\
++	(((x) << AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_LSB) & 	\
++	AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK)
++
++#define AR934X_CPU_DDR_CLK_CTRL_DDR_POST_DIV_RESET 	0
++
++#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MSB	9
++#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_LSB	5
++#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK	0x000003e0
++
++#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_GET(x)		\
++	(((x) & AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK) >> 	\
++	AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_LSB)
++
++#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SET(x)		\
++	(((x) << AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_LSB) & 	\
++	AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK)
++
++#define AR934X_CPU_DDR_CLK_CTRL_CPU_POST_DIV_RESET	0
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MSB	24
++#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_LSB	24
++#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MASK	0x01000000
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_GET(x) 	\
++	(((x) & AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MASK) >> \
++	AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_LSB)
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_SET(x) 	\
++	(((x) << AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_LSB) & \
++	AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_MASK)
++
++#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_RESET	1
++
 +extern void __iomem *ar71xx_pll_base;
 +
 +static inline void ar71xx_pll_wr(unsigned reg, u32 val)
@@ -8335,6 +11645,14 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +
 +#define AR91XX_GPIO_COUNT	22
 +
++#define AR933X_GPIO_COUNT	30
++
++#define AR934X_GPIO_FUNC_SPI_CS_1_EN	BIT(14)
++#define AR934X_GPIO_FUNC_SPI_CS_0_EN	BIT(13)
++
++#define AR934X_GPIO_COUNT		32
++#define AR934X_GPIO_FUNC_DDR_DQOE_EN	BIT(17)
++
 +extern void __iomem *ar71xx_gpio_base;
 +
 +static inline void ar71xx_gpio_wr(unsigned reg, u32 value)
@@ -8378,6 +11696,17 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define AR91XX_DDR_REG_FLUSH_USB	0x84
 +#define AR91XX_DDR_REG_FLUSH_WMAC	0x88
 +
++#define AR933X_DDR_REG_FLUSH_GE0	0x7c
++#define AR933X_DDR_REG_FLUSH_GE1	0x80
++#define AR933X_DDR_REG_FLUSH_USB	0x84
++#define AR933X_DDR_REG_FLUSH_WMAC	0x88
++
++#define AR934X_DDR_REG_FLUSH_GE0	0x9c
++#define AR934X_DDR_REG_FLUSH_GE1	0xa0
++#define AR934X_DDR_REG_FLUSH_USB	0xa4
++#define AR934X_DDR_REG_FLUSH_PCIE	0xa8
++
++
 +#define PCI_WIN0_OFFS	0x10000000
 +#define PCI_WIN1_OFFS	0x11000000
 +#define PCI_WIN2_OFFS	0x12000000
@@ -8465,6 +11794,16 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +
 +#define AR724X_RESET_REG_RESET_MODULE		0x1c
 +
++#define AR933X_RESET_REG_RESET_MODULE		0x1c
++#define AR933X_RESET_REG_BOOTSTRAP		0xac
++#define AR933X_BOOTSTRAP_EEPBUSY		BIT(4)
++#define AR933X_BOOTSTRAP_REF_CLK_40		BIT(0)
++
++#define AR934X_RESET_REG_RESET_MODULE		0x1c
++#define AR934X_RESET_REG_BOOTSTRAP		0xb0
++/* 0 - 25MHz   1 - 40 MHz */
++#define AR934X_REF_CLK_40			(1 << 4)
++
 +#define WDOG_CTRL_LAST_RESET		BIT(31)
 +#define WDOG_CTRL_ACTION_MASK		3
 +#define WDOG_CTRL_ACTION_NONE		0	/* no action */
@@ -8472,6 +11811,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define WDOG_CTRL_ACTION_NMI		2	/* NMI */
 +#define WDOG_CTRL_ACTION_FCR		3	/* full chip reset */
 +
++#define MISC_INT_ENET_LINK		BIT(12)
++#define MISC_INT_DDR_PERF		BIT(11)
++#define MISC_INT_TIMER4		BIT(10)
++#define MISC_INT_TIMER3		BIT(9)
++#define MISC_INT_TIMER2		BIT(8)
 +#define MISC_INT_DMA			BIT(7)
 +#define MISC_INT_OHCI			BIT(6)
 +#define MISC_INT_PERFC			BIT(5)
@@ -8512,6 +11856,15 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define AR724X_RESET_PCIE_PHY_SERIAL	BIT(10)
 +#define AR724X_RESET_PCIE_PHY		BIT(7)
 +#define AR724X_RESET_PCIE		BIT(6)
++#define AR724X_RESET_USB_HOST		BIT(5)
++#define AR724X_RESET_USB_PHY		BIT(4)
++#define AR724X_RESET_USBSUS_OVERRIDE	BIT(3)
++
++#define AR933X_RESET_WMAC		BIT(11)
++#define AR933X_RESET_GE1_MDIO		BIT(23)
++#define AR933X_RESET_GE0_MDIO		BIT(22)
++#define AR933X_RESET_GE1_MAC		BIT(13)
++#define AR933X_RESET_GE0_MAC		BIT(9)
 +
 +#define REV_ID_MAJOR_MASK	0xfff0
 +#define REV_ID_MAJOR_AR71XX	0x00a0
@@ -8519,6 +11872,11 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#define REV_ID_MAJOR_AR7240	0x00c0
 +#define REV_ID_MAJOR_AR7241	0x0100
 +#define REV_ID_MAJOR_AR7242	0x1100
++#define REV_ID_MAJOR_AR9330	0x0110
++#define REV_ID_MAJOR_AR9331	0x1110
++#define REV_ID_MAJOR_AR9341	0x0120
++#define REV_ID_MAJOR_AR9342	0x1120
++#define REV_ID_MAJOR_AR9344	0x2120
 +
 +#define AR71XX_REV_ID_MINOR_MASK	0x3
 +#define AR71XX_REV_ID_MINOR_AR7130	0x0
@@ -8535,6 +11893,10 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +
 +#define AR724X_REV_ID_REVISION_MASK	0x3
 +
++#define AR933X_REV_ID_REVISION_MASK	0xf
++
++#define AR934X_REV_ID_REVISION_MASK	0xf
++
 +extern void __iomem *ar71xx_reset_base;
 +
 +static inline void ar71xx_reset_wr(unsigned reg, u32 val)
@@ -8594,7 +11956,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar71xx.h linux-2.6
 +#endif /* __ASM_MACH_AR71XX_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h	2011-04-27 12:19:21.867661560 +0200
 @@ -0,0 +1,26 @@
 +/*
 + *  AR91xx parallel flash driver platform data definitions
@@ -8622,9 +11984,102 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar91xx_flash.h lin
 +};
 +
 +#endif /* __AR91XX_FLASH_H */
+diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h
+--- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar933x_uart.h	2011-08-06 09:32:36.758018150 +0200
+@@ -0,0 +1,67 @@
++/*
++ *  Atheros AR933X UART defines
++ *
++ *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef __AR933X_UART_H
++#define __AR933X_UART_H
++
++#define AR933X_UART_REGS_SIZE		20
++#define AR933X_UART_FIFO_SIZE		16
++
++#define AR933X_UART_DATA_REG		0x00
++#define AR933X_UART_CS_REG		0x04
++#define AR933X_UART_CLOCK_REG		0x08
++#define AR933X_UART_INT_REG		0x0c
++#define AR933X_UART_INT_EN_REG		0x10
++
++#define AR933X_UART_DATA_TX_RX_MASK	0xff
++#define AR933X_UART_DATA_RX_CSR		BIT(8)
++#define AR933X_UART_DATA_TX_CSR		BIT(9)
++
++#define AR933X_UART_CS_PARITY_S		0
++#define AR933X_UART_CS_PARITY_M		0x3
++#define   AR933X_UART_CS_PARITY_NONE	0
++#define   AR933X_UART_CS_PARITY_ODD	1
++#define   AR933X_UART_CS_PARITY_EVEN	2
++#define AR933X_UART_CS_IF_MODE_S	2
++#define AR933X_UART_CS_IF_MODE_M	0x3
++#define   AR933X_UART_CS_IF_MODE_NONE	0
++#define   AR933X_UART_CS_IF_MODE_DTE	1
++#define   AR933X_UART_CS_IF_MODE_DCE	2
++#define AR933X_UART_CS_FLOW_CTRL_S	4
++#define AR933X_UART_CS_FLOW_CTRL_M	0x3
++#define AR933X_UART_CS_DMA_EN		BIT(6)
++#define AR933X_UART_CS_TX_READY_ORIDE	BIT(7)
++#define AR933X_UART_CS_RX_READY_ORIDE	BIT(8)
++#define AR933X_UART_CS_TX_READY		BIT(9)
++#define AR933X_UART_CS_RX_BREAK		BIT(10)
++#define AR933X_UART_CS_TX_BREAK		BIT(11)
++#define AR933X_UART_CS_HOST_INT		BIT(12)
++#define AR933X_UART_CS_HOST_INT_EN	BIT(13)
++#define AR933X_UART_CS_TX_BUSY		BIT(14)
++#define AR933X_UART_CS_RX_BUSY		BIT(15)
++
++#define AR933X_UART_CLOCK_STEP_M	0xffff
++#define AR933X_UART_CLOCK_SCALE_M	0xfff
++#define AR933X_UART_CLOCK_SCALE_S	16
++#define AR933X_UART_CLOCK_STEP_M	0xffff
++
++#define AR933X_UART_INT_RX_VALID	BIT(0)
++#define AR933X_UART_INT_TX_READY	BIT(1)
++#define AR933X_UART_INT_RX_FRAMING_ERR	BIT(2)
++#define AR933X_UART_INT_RX_OFLOW_ERR	BIT(3)
++#define AR933X_UART_INT_TX_OFLOW_ERR	BIT(4)
++#define AR933X_UART_INT_RX_PARITY_ERR	BIT(5)
++#define AR933X_UART_INT_RX_BREAK_ON	BIT(6)
++#define AR933X_UART_INT_RX_BREAK_OFF	BIT(7)
++#define AR933X_UART_INT_RX_FULL		BIT(8)
++#define AR933X_UART_INT_TX_EMPTY	BIT(9)
++#define AR933X_UART_INT_ALLINTS		0x3ff
++
++#endif /* __AR933X_UART_H */
+diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h
+--- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/ar933x_uart_platform.h	2011-08-06 09:32:36.758018150 +0200
+@@ -0,0 +1,18 @@
++/*
++ *  Platform data definition for Atheros AR933X UART
++ *
++ *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR933X_UART_PLATFORM_H
++#define _AR933X_UART_PLATFORM_H
++
++struct ar933x_uart_platform_data {
++	unsigned	uartclk;
++};
++
++#endif /* _AR933X_UART_PLATFORM_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/cpu-feature-overrides.h	2011-04-27 12:19:21.877661867 +0200
 @@ -0,0 +1,56 @@
 +/*
 + *  Atheros AR71xx specific CPU feature overrides
@@ -8684,7 +12139,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/cpu-feature-overri
 +#endif /* __ASM_MACH_AR71XX_CPU_FEATURE_OVERRIDES_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/gpio.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/gpio.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/gpio.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/gpio.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/gpio.h	2011-04-27 12:19:21.877661867 +0200
 @@ -0,0 +1,53 @@
 +/*
 + *  Atheros AR71xx GPIO API definitions
@@ -8741,7 +12196,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/gpio.h linux-2.6.3
 +#endif /* __ASM_MACH_AR71XX_GPIO_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/irq.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/irq.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/irq.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/irq.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/irq.h	2011-04-27 12:19:21.877661867 +0200
 @@ -0,0 +1,17 @@
 +/*
 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
@@ -8755,14 +12210,14 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/irq.h linux-2.6.39
 +#define __ASM_MACH_AR71XX_IRQ_H
 +
 +#define MIPS_CPU_IRQ_BASE	0
-+#define NR_IRQS			56
++#define NR_IRQS			80
 +
 +#include_next <irq.h>
 +
 +#endif /* __ASM_MACH_AR71XX_IRQ_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.h	2011-04-27 12:19:21.877661867 +0200
 @@ -0,0 +1,32 @@
 +/*
 + *  Atheros AR71xx specific kernel entry setup
@@ -8798,7 +12253,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/kernel-entry-init.
 +#endif /* __ASM_MACH_AR71XX_KERNEL_ENTRY_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/mach-rb750.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/mach-rb750.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/mach-rb750.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/mach-rb750.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/mach-rb750.h	2011-04-27 12:19:21.877661867 +0200
 @@ -0,0 +1,66 @@
 +/*
 + *  MikroTik RouterBOARD 750 definitions
@@ -8869,14 +12324,14 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/mach-rb750.h linux
 \ No newline at end of file
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/mangle-port.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/mangle-port.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/mangle-port.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/mangle-port.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/mangle-port.h	2011-04-27 12:19:21.877661867 +0200
 @@ -0,0 +1,45 @@
 +/*
 + *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
 + *  This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h
-+ * 	Copyright (C) 2003, 2004 Ralf Baechle
++ *      Copyright (C) 2003, 2004 Ralf Baechle
 + *
 + *  This program is free software; you can redistribute it and/or modify it
 + *  under the terms of the GNU General Public License version 2 as published
@@ -8918,8 +12373,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/mangle-port.h linu
 +#endif /* __ASM_MACH_AR71XX_MANGLE_PORT_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/pci.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/pci.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/pci.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/pci.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,39 @@
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/pci.h	2011-04-27 12:19:21.877661867 +0200
+@@ -0,0 +1,46 @@
 +/*
 + *  Atheros AR71xx SoC specific PCI definitions
 + *
@@ -8942,6 +12397,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/pci.h linux-2.6.39
 +	u8	pin;
 +};
 +
++#ifdef CONFIG_PCI
 +extern int (*ar71xx_pci_plat_dev_init)(struct pci_dev *dev);
 +extern unsigned ar71xx_pci_nr_irqs __initdata;
 +extern struct ar71xx_pci_irq *ar71xx_pci_irq_map __initdata;
@@ -8957,12 +12413,18 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/pci.h linux-2.6.39
 +int ar724x_pcibios_init(void) __init;
 +
 +int ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) __init;
++#else
++static inline int ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
++{
++	return 0;
++}
++#endif
 +
 +#endif /* __ASM_MACH_AR71XX_PCI_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/platform.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/platform.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/platform.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/platform.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,61 @@
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/platform.h	2011-08-22 07:40:11.890481646 +0200
+@@ -0,0 +1,63 @@
 +/*
 + *  Atheros AR71xx SoC specific platform data definitions
 + *
@@ -8994,11 +12456,13 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/platform.h linux-2
 +
 +	u8		has_gbit:1;
 +	u8		is_ar91xx:1;
++	u8		is_ar7240:1;
 +	u8		is_ar724x:1;
 +	u8		has_ar8216:1;
++	u8		has_ar7240_switch:1;
 +
-+	void		(* ddr_flush)(void);
-+	void		(* set_pll)(int speed);
++	void		(*ddr_flush)(void);
++	void		(*set_pll)(int speed);
 +
 +	u32		fifo_cfg1;
 +	u32		fifo_cfg2;
@@ -9024,9 +12488,61 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/platform.h linux-2
 +#define AR71XX_SPI_CS_ACTIVE	1
 +
 +#endif /* __ASM_MACH_AR71XX_PLATFORM_H */
+diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h
+--- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/rb4xx_cpld.h	2011-04-27 12:19:21.867661560 +0200
+@@ -0,0 +1,48 @@
++/*
++ * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards
++ *
++ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This file was based on the patches for Linux 2.6.27.39 published by
++ * MikroTik for their RouterBoard 4xx series devices.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#define CPLD_GPIO_nLED1		0
++#define CPLD_GPIO_nLED2		1
++#define CPLD_GPIO_nLED3		2
++#define CPLD_GPIO_nLED4		3
++#define CPLD_GPIO_FAN		4
++#define CPLD_GPIO_ALE		5
++#define CPLD_GPIO_CLE		6
++#define CPLD_GPIO_nCE		7
++#define CPLD_GPIO_nLED5		8
++
++#define CPLD_NUM_GPIOS		9
++
++#define CPLD_CFG_nLED1		BIT(CPLD_GPIO_nLED1)
++#define CPLD_CFG_nLED2		BIT(CPLD_GPIO_nLED2)
++#define CPLD_CFG_nLED3		BIT(CPLD_GPIO_nLED3)
++#define CPLD_CFG_nLED4		BIT(CPLD_GPIO_nLED4)
++#define CPLD_CFG_FAN		BIT(CPLD_GPIO_FAN)
++#define CPLD_CFG_ALE		BIT(CPLD_GPIO_ALE)
++#define CPLD_CFG_CLE		BIT(CPLD_GPIO_CLE)
++#define CPLD_CFG_nCE		BIT(CPLD_GPIO_nCE)
++#define CPLD_CFG_nLED5		BIT(CPLD_GPIO_nLED5)
++
++struct rb4xx_cpld_platform_data {
++	unsigned	gpio_base;
++};
++
++extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value);
++extern int rb4xx_cpld_read(unsigned char *rx_buf,
++			   const unsigned char *verify_buf,
++			   unsigned cnt);
++extern int rb4xx_cpld_read_from(unsigned addr,
++				unsigned char *rx_buf,
++				const unsigned char *verify_buf,
++				unsigned cnt);
++extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count);
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/war.h linux-2.6.39/arch/mips/include/asm/mach-ar71xx/war.h
 --- linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/war.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/war.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/mach-ar71xx/war.h	2011-04-27 12:19:21.867661560 +0200
 @@ -0,0 +1,25 @@
 +/*
 + * This file is subject to the terms and conditions of the GNU General Public
@@ -9055,7 +12571,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/mach-ar71xx/war.h linux-2.6.39
 +#endif /* __ASM_MACH_AR71XX_WAR_H */
 diff -Nur linux-2.6.39.orig/arch/mips/include/asm/time.h linux-2.6.39/arch/mips/include/asm/time.h
 --- linux-2.6.39.orig/arch/mips/include/asm/time.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/include/asm/time.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/include/asm/time.h	2011-08-24 05:53:05.239228886 +0200
 @@ -52,6 +52,7 @@
   */
  #ifdef CONFIG_CEVT_R4K_LIB
@@ -9064,28 +12580,2538 @@ diff -Nur linux-2.6.39.orig/arch/mips/include/asm/time.h linux-2.6.39/arch/mips/
  extern int r4k_clockevent_init(void);
  #endif
  
-diff -Nur linux-2.6.39.orig/arch/mips/kernel/Makefile linux-2.6.39/arch/mips/kernel/Makefile
---- linux-2.6.39.orig/arch/mips/kernel/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/kernel/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -94,6 +94,7 @@
+diff -Nur linux-2.6.39.orig/arch/mips/Kconfig linux-2.6.39/arch/mips/Kconfig
+--- linux-2.6.39.orig/arch/mips/Kconfig	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/arch/mips/Kconfig	2011-08-24 02:42:39.969240338 +0200
+@@ -84,6 +84,23 @@
+ 	help
+ 	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
+ 
++config ATHEROS_AR71XX
++	bool "Atheros AR71xx based boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select ARCH_REQUIRE_GPIOLIB
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_HAS_EARLY_PRINTK
++	select MIPS_MACHINE
++	help
++	  Support for Atheros AR71xx based boards.
++
+ config BCM47XX
+ 	bool "Broadcom BCM47XX based boards"
+ 	select CEVT_R4K
+@@ -739,6 +756,7 @@
+ endchoice
  
- obj-$(CONFIG_KEXEC)		+= machine_kexec.o relocate_kernel.o
- obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
-+obj-$(CONFIG_MIPS_MACHINE)	+= mips_machine.o
- obj-$(CONFIG_SPINLOCK_TEST)	+= spinlock_test.o
- obj-$(CONFIG_MIPS_MACHINE)	+= mips_machine.o
+ source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ar71xx/Kconfig"
+ source "arch/mips/ath79/Kconfig"
+ source "arch/mips/bcm63xx/Kconfig"
+ source "arch/mips/jazz/Kconfig"
+@@ -907,6 +925,9 @@
+ config MIPS_DISABLE_OBSOLETE_IDE
+ 	bool
+ 
++config MYLOADER
++	bool
++
+ config SYNC_R4K
+ 	bool
  
+diff -Nur linux-2.6.39.orig/arch/mips/Kconfig.orig linux-2.6.39/arch/mips/Kconfig.orig
+--- linux-2.6.39.orig/arch/mips/Kconfig.orig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/arch/mips/Kconfig.orig	2011-08-22 16:21:32.077979816 +0200
+@@ -0,0 +1,2472 @@
++config MIPS
++	bool
++	default y
++	select HAVE_GENERIC_DMA_COHERENT
++	select HAVE_IDE
++	select HAVE_OPROFILE
++	select HAVE_IRQ_WORK
++	select HAVE_PERF_EVENTS
++	select PERF_USE_VMALLOC
++	select HAVE_ARCH_KGDB
++	select HAVE_FUNCTION_TRACER
++	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
++	select HAVE_DYNAMIC_FTRACE
++	select HAVE_FTRACE_MCOUNT_RECORD
++	select HAVE_C_RECORDMCOUNT
++	select HAVE_FUNCTION_GRAPH_TRACER
++	select HAVE_KPROBES
++	select HAVE_KRETPROBES
++	select RTC_LIB if !MACH_LOONGSON
++	select GENERIC_ATOMIC64 if !64BIT
++	select HAVE_DMA_ATTRS
++	select HAVE_DMA_API_DEBUG
++	select HAVE_GENERIC_HARDIRQS
++	select GENERIC_IRQ_PROBE
++	select GENERIC_IRQ_SHOW
++	select HAVE_ARCH_JUMP_LABEL
++
++menu "Machine selection"
++
++config ZONE_DMA
++	bool
++
++choice
++	prompt "System type"
++	default SGI_IP22
++
++config MIPS_ALCHEMY
++	bool "Alchemy processor based machines"
++	select 64BIT_PHYS_ADDR
++	select CEVT_R4K_LIB
++	select CSRC_R4K_LIB
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_APM_EMULATION
++	select GENERIC_GPIO
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	select SYS_SUPPORTS_ZBOOT
++
++config AR7
++	bool "Texas Instruments AR7"
++	select BOOT_ELF32
++	select DMA_NONCOHERENT
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select NO_EXCEPT_FILL
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_ZBOOT_UART16550
++	select ARCH_REQUIRE_GPIOLIB
++	select GCD
++	select VLYNQ
++	help
++	  Support for the Texas Instruments AR7 System-on-a-Chip
++	  family: TNETD7100, 7200 and 7300.
++
++config ATH79
++	bool "Atheros AR71XX/AR724X/AR913X based boards"
++	select ARCH_REQUIRE_GPIOLIB
++	select BOOT_RAW
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select MIPS_MACHINE
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	help
++	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
++
++config ATHEROS_AR71XX
++	bool "Atheros AR71xx based boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select ARCH_REQUIRE_GPIOLIB
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_HAS_EARLY_PRINTK
++	select MIPS_MACHINE
++	help
++	  Support for Atheros AR71xx based boards.
++
++config BCM47XX
++	bool "Broadcom BCM47XX based boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SSB
++	select SSB_DRIVER_MIPS
++	select SSB_DRIVER_EXTIF
++	select SSB_EMBEDDED
++	select SSB_B43_PCI_BRIDGE if PCI
++	select SSB_PCICORE_HOSTMODE if PCI
++	select GENERIC_GPIO
++	select SYS_HAS_EARLY_PRINTK
++	select CFE
++	help
++	 Support for BCM47XX based boards
++
++config BCM63XX
++	bool "Broadcom BCM63XX based boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_HAS_EARLY_PRINTK
++	select SWAP_IO_SPACE
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	 Support for BCM63XX based boards
++
++config MIPS_COBALT
++	bool "Cobalt Server"
++	select CEVT_R4K
++	select CSRC_R4K
++	select CEVT_GT641XX
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select I8253
++	select I8259
++	select IRQ_CPU
++	select IRQ_GT641XX
++	select PCI_GT64XXX_PCI0
++	select PCI
++	select SYS_HAS_CPU_NEVADA
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config MACH_DECSTATION
++	bool "DECstations"
++	select BOOT_ELF32
++	select CEVT_DS1287
++	select CEVT_R4K
++	select CSRC_IOASIC
++	select CSRC_R4K
++	select CPU_DADDI_WORKAROUNDS if 64BIT
++	select CPU_R4000_WORKAROUNDS if 64BIT
++	select CPU_R4400_WORKAROUNDS if 64BIT
++	select DMA_NONCOHERENT
++	select NO_IOPORT
++	select IRQ_CPU
++	select SYS_HAS_CPU_R3000
++	select SYS_HAS_CPU_R4X00
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_128HZ
++	select SYS_SUPPORTS_256HZ
++	select SYS_SUPPORTS_1024HZ
++	help
++	  This enables support for DEC's MIPS based workstations.  For details
++	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
++	  DECstation porting pages on <http://decstation.unix-ag.org/>.
++
++	  If you have one of the following DECstation Models you definitely
++	  want to choose R4xx0 for the CPU Type:
++
++		DECstation 5000/50
++		DECstation 5000/150
++		DECstation 5000/260
++		DECsystem 5900/260
++
++	  otherwise choose R3000.
++
++config MACH_JAZZ
++	bool "Jazz family of machines"
++	select ARC
++	select ARC32
++	select ARCH_MAY_HAVE_PC_FDC
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
++	select GENERIC_ISA_DMA
++	select IRQ_CPU
++	select I8253
++	select I8259
++	select ISA
++	select SYS_HAS_CPU_R4X00
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
++	select SYS_SUPPORTS_100HZ
++	help
++	 This a family of machines based on the MIPS R4030 chipset which was
++	 used by several vendors to build RISC/os and Windows NT workstations.
++	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
++	 Olivetti M700-10 workstations.
++
++config MACH_JZ4740
++	bool "Ingenic JZ4740 based machines"
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select GENERIC_GPIO
++	select ARCH_REQUIRE_GPIOLIB
++	select SYS_HAS_EARLY_PRINTK
++	select HAVE_PWM
++	select HAVE_CLK
++
++config LASAT
++	bool "LASAT Networks platforms"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select SYS_HAS_EARLY_PRINTK
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select PCI_GT64XXX_PCI0
++	select MIPS_NILE4
++	select R5000_CPU_SCACHE
++	select SYS_HAS_CPU_R5000
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config MACH_LOONGSON
++	bool "Loongson family of machines"
++	select SYS_SUPPORTS_ZBOOT
++	help
++	  This enables the support of Loongson family of machines.
++
++	  Loongson is a family of general-purpose MIPS-compatible CPUs.
++	  developed at Institute of Computing Technology (ICT),
++	  Chinese Academy of Sciences (CAS) in the People's Republic
++	  of China. The chief architect is Professor Weiwu Hu.
++
++config MIPS_MALTA
++	bool "MIPS Malta board"
++	select ARCH_MAY_HAVE_PC_FDC
++	select BOOT_ELF32
++	select BOOT_RAW
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select GENERIC_ISA_DMA
++	select IRQ_CPU
++	select IRQ_GIC
++	select HW_HAS_PCI
++	select I8253
++	select I8259
++	select MIPS_BOARDS_GEN
++	select MIPS_BONITO64
++	select MIPS_CPU_SCACHE
++	select PCI_GT64XXX_PCI0
++	select MIPS_MSC
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_CPU_MIPS64_R1
++	select SYS_HAS_CPU_NEVADA
++	select SYS_HAS_CPU_RM7000
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_MIPS_CMP
++	select SYS_SUPPORTS_MULTITHREADING
++	select SYS_SUPPORTS_SMARTMIPS
++	select SYS_SUPPORTS_ZBOOT
++	help
++	  This enables support for the MIPS Technologies Malta evaluation
++	  board.
++
++config MIPS_SIM
++	bool 'MIPS simulator (MIPSsim)'
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select SYS_HAS_EARLY_PRINTK
++	select IRQ_CPU
++	select BOOT_RAW
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_MULTITHREADING
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++	  This option enables support for MIPS Technologies MIPSsim software
++	  emulator.
++
++config NEC_MARKEINS
++	bool "NEC EMMA2RH Mark-eins board"
++	select SOC_EMMA2RH
++	select HW_HAS_PCI
++	help
++	  This enables support for the NEC Electronics Mark-eins boards.
++
++config MACH_VR41XX
++	bool "NEC VR4100 series based machines"
++	select CEVT_R4K
++	select CSRC_R4K
++	select SYS_HAS_CPU_VR41XX
++	select ARCH_REQUIRE_GPIOLIB
++
++config NXP_STB220
++	bool "NXP STB220 board"
++	select SOC_PNX833X
++	help
++	 Support for NXP Semiconductors STB220 Development Board.
++
++config NXP_STB225
++	bool "NXP 225 board"
++	select SOC_PNX833X
++	select SOC_PNX8335
++	help
++	 Support for NXP Semiconductors STB225 Development Board.
++
++config PNX8550_JBS
++	bool "NXP PNX8550 based JBS board"
++	select PNX8550
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config PNX8550_STB810
++	bool "NXP PNX8550 based STB810 board"
++	select PNX8550
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config PMC_MSP
++	bool "PMC-Sierra MSP chipsets"
++	depends on EXPERIMENTAL
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select SWAP_IO_SPACE
++	select NO_EXCEPT_FILL
++	select BOOT_RAW
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select IRQ_CPU
++	select SERIAL_8250
++	select SERIAL_8250_CONSOLE
++	help
++	  This adds support for the PMC-Sierra family of Multi-Service
++	  Processor System-On-A-Chips.  These parts include a number
++	  of integrated peripherals, interfaces and DSPs in addition to
++	  a variety of MIPS cores.
++
++config PMC_YOSEMITE
++	bool "PMC-Sierra Yosemite eval board"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_COHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select IRQ_CPU_RM7K
++	select IRQ_CPU_RM9K
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_RM9000
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_SMP
++	help
++	  Yosemite is an evaluation board for the RM9000x2 processor
++	  manufactured by PMC-Sierra.
++
++config POWERTV
++	bool "Cisco PowerTV"
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CPU_MIPSR2_IRQ_VI
++	select CPU_MIPSR2_IRQ_EI
++	select CSRC_POWERTV
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select USB_OHCI_LITTLE_ENDIAN
++	help
++	  This enables support for the Cisco PowerTV Platform.
++
++config SGI_IP22
++	bool "SGI IP22 (Indy/Indigo2)"
++	select ARC
++	select ARC32
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION
++	select DMA_NONCOHERENT
++	select HW_HAS_EISA
++	select I8253
++	select I8259
++	select IP22_CPU_SCACHE
++	select IRQ_CPU
++	select GENERIC_ISA_DMA_SUPPORT_BROKEN
++	select SGI_HAS_I8042
++	select SGI_HAS_INDYDOG
++	select SGI_HAS_HAL2
++	select SGI_HAS_SEEQ
++	select SGI_HAS_WD93
++	select SGI_HAS_ZILOG
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_R4X00
++	select SYS_HAS_CPU_R5000
++	#
++	# Disable EARLY_PRINTK for now since it leads to overwritten prom
++	# memory during early boot on some machines.
++	#
++	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
++	# for a more details discussion
++	#
++	# select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	help
++	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
++	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
++	  that runs on these, say Y here.
++
++config SGI_IP27
++	bool "SGI IP27 (Origin200/2000)"
++	select ARC
++	select ARC64
++	select BOOT_ELF64
++	select DEFAULT_SGI_PARTITION
++	select DMA_COHERENT
++	select SYS_HAS_EARLY_PRINTK
++	select HW_HAS_PCI
++	select NR_CPUS_DEFAULT_64
++	select SYS_HAS_CPU_R10000
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_NUMA
++	select SYS_SUPPORTS_SMP
++	help
++	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
++	  workstations.  To compile a Linux kernel that runs on these, say Y
++	  here.
++
++config SGI_IP28
++	bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
++	depends on EXPERIMENTAL
++	select ARC
++	select ARC64
++	select BOOT_ELF64
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION
++	select DMA_NONCOHERENT
++	select GENERIC_ISA_DMA_SUPPORT_BROKEN
++	select IRQ_CPU
++	select HW_HAS_EISA
++	select I8253
++	select I8259
++	select SGI_HAS_I8042
++	select SGI_HAS_INDYDOG
++	select SGI_HAS_HAL2
++	select SGI_HAS_SEEQ
++	select SGI_HAS_WD93
++	select SGI_HAS_ZILOG
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_R10000
++	#
++	# Disable EARLY_PRINTK for now since it leads to overwritten prom
++	# memory during early boot on some machines.
++	#
++	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
++	# for a more details discussion
++	#
++	# select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++      help
++        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
++        kernel that runs on these, say Y here.
++
++config SGI_IP32
++	bool "SGI IP32 (O2)"
++	select ARC
++	select ARC32
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select R5000_CPU_SCACHE
++	select RM7000_CPU_SCACHE
++	select SYS_HAS_CPU_R5000
++	select SYS_HAS_CPU_R10000 if BROKEN
++	select SYS_HAS_CPU_RM7000
++	select SYS_HAS_CPU_NEVADA
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	help
++	  If you want this kernel to run on SGI O2 workstation, say Y here.
++
++config SIBYTE_CRHINE
++	bool "Sibyte BCM91120C-CRhine"
++	depends on EXPERIMENTAL
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1120
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_CARMEL
++	bool "Sibyte BCM91120x-Carmel"
++	depends on EXPERIMENTAL
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1120
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_CRHONE
++	bool "Sibyte BCM91125C-CRhone"
++	depends on EXPERIMENTAL
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1125
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_RHONE
++	bool "Sibyte BCM91125E-Rhone"
++	depends on EXPERIMENTAL
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1125H
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_SWARM
++	bool "Sibyte BCM91250A-SWARM"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select HAVE_PATA_PLATFORM
++	select NR_CPUS_DEFAULT_2
++	select SIBYTE_SB1250
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select ZONE_DMA32 if 64BIT
++
++config SIBYTE_LITTLESUR
++	bool "Sibyte BCM91250C2-LittleSur"
++	depends on EXPERIMENTAL
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select HAVE_PATA_PLATFORM
++	select NR_CPUS_DEFAULT_2
++	select SIBYTE_SB1250
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_SENTOSA
++	bool "Sibyte BCM91250E-Sentosa"
++	depends on EXPERIMENTAL
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select NR_CPUS_DEFAULT_2
++	select SIBYTE_SB1250
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_BIGSUR
++	bool "Sibyte BCM91480B-BigSur"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select NR_CPUS_DEFAULT_4
++	select SIBYTE_BCM1x80
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select ZONE_DMA32 if 64BIT
++
++config SNI_RM
++	bool "SNI RM200/300/400"
++	select ARC if CPU_LITTLE_ENDIAN
++	select ARC32 if CPU_LITTLE_ENDIAN
++	select SNIPROM if CPU_BIG_ENDIAN
++	select ARCH_MAY_HAVE_PC_FDC
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
++	select DMA_NONCOHERENT
++	select GENERIC_ISA_DMA
++	select HW_HAS_EISA
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select I8253
++	select I8259
++	select ISA
++	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
++	select SYS_HAS_CPU_R4X00
++	select SYS_HAS_CPU_R5000
++	select SYS_HAS_CPU_R10000
++	select R5000_CPU_SCACHE
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++	  The SNI RM200/300/400 are MIPS-based machines manufactured by
++	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
++	  Technology and now in turn merged with Fujitsu.  Say Y here to
++	  support this machine type.
++
++config MACH_TX39XX
++	bool "Toshiba TX39 series based machines"
++
++config MACH_TX49XX
++	bool "Toshiba TX49 series based machines"
++
++config MIKROTIK_RB532
++	bool "Mikrotik RB532 boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SWAP_IO_SPACE
++	select BOOT_RAW
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support the Mikrotik(tm) RouterBoard 532 series,
++	  based on the IDT RC32434 SoC.
++
++config WR_PPMC
++	bool "Wind River PPMC board"
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select BOOT_ELF32
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select PCI_GT64XXX_PCI0
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_CPU_MIPS64_R1
++	select SYS_HAS_CPU_NEVADA
++	select SYS_HAS_CPU_RM7000
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++	  This enables support for the Wind River MIPS32 4KC PPMC evaluation
++	  board, which is based on GT64120 bridge chip.
++
++config CAVIUM_OCTEON_SIMULATOR
++	bool "Cavium Networks Octeon Simulator"
++	select CEVT_R4K
++	select 64BIT_PHYS_ADDR
++	select DMA_COHERENT
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select SYS_HAS_CPU_CAVIUM_OCTEON
++	help
++	  The Octeon simulator is software performance model of the Cavium
++	  Octeon Processor. It supports simulating Octeon processors on x86
++	  hardware.
++
++config CAVIUM_OCTEON_REFERENCE_BOARD
++	bool "Cavium Networks Octeon reference board"
++	select CEVT_R4K
++	select 64BIT_PHYS_ADDR
++	select DMA_COHERENT
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_HAS_CPU_CAVIUM_OCTEON
++	select SWAP_IO_SPACE
++	select HW_HAS_PCI
++	select ARCH_SUPPORTS_MSI
++	select ZONE_DMA32
++	select USB_ARCH_HAS_OHCI
++	select USB_ARCH_HAS_EHCI
++	help
++	  This option supports all of the Octeon reference boards from Cavium
++	  Networks. It builds a kernel that dynamically determines the Octeon
++	  CPU type and supports all known board reference implementations.
++	  Some of the supported boards are:
++		EBT3000
++		EBH3000
++		EBH3100
++		Thunder
++		Kodama
++		Hikari
++	  Say Y here for most Octeon reference boards.
++
++endchoice
++
++source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ar71xx/Kconfig"
++source "arch/mips/ath79/Kconfig"
++source "arch/mips/bcm63xx/Kconfig"
++source "arch/mips/jazz/Kconfig"
++source "arch/mips/jz4740/Kconfig"
++source "arch/mips/lasat/Kconfig"
++source "arch/mips/pmc-sierra/Kconfig"
++source "arch/mips/powertv/Kconfig"
++source "arch/mips/sgi-ip27/Kconfig"
++source "arch/mips/sibyte/Kconfig"
++source "arch/mips/txx9/Kconfig"
++source "arch/mips/vr41xx/Kconfig"
++source "arch/mips/cavium-octeon/Kconfig"
++source "arch/mips/loongson/Kconfig"
++
++endmenu
++
++config RWSEM_GENERIC_SPINLOCK
++	bool
++	default y
++
++config RWSEM_XCHGADD_ALGORITHM
++	bool
++
++config ARCH_HAS_ILOG2_U32
++	bool
++	default n
++
++config ARCH_HAS_ILOG2_U64
++	bool
++	default n
++
++config ARCH_SUPPORTS_OPROFILE
++	bool
++	default y if !MIPS_MT_SMTC
++
++config GENERIC_FIND_NEXT_BIT
++	bool
++	default y
++
++config GENERIC_FIND_BIT_LE
++	bool
++	default y
++
++config GENERIC_HWEIGHT
++	bool
++	default y
++
++config GENERIC_CALIBRATE_DELAY
++	bool
++	default y
++
++config GENERIC_CLOCKEVENTS
++	bool
++	default y
++
++config GENERIC_CMOS_UPDATE
++	bool
++	default y
++
++config SCHED_OMIT_FRAME_POINTER
++	bool
++	default y
++
++#
++# Select some configuration options automatically based on user selections.
++#
++config ARC
++	bool
++
++config ARCH_MAY_HAVE_PC_FDC
++	bool
++
++config BOOT_RAW
++	bool
++
++config CEVT_BCM1480
++	bool
++
++config CEVT_DS1287
++	bool
++
++config CEVT_GT641XX
++	bool
++
++config CEVT_R4K_LIB
++	bool
++
++config CEVT_R4K
++	select CEVT_R4K_LIB
++	bool
++
++config CEVT_SB1250
++	bool
++
++config CEVT_TXX9
++	bool
++
++config CSRC_BCM1480
++	bool
++
++config CSRC_IOASIC
++	bool
++
++config CSRC_POWERTV
++	bool
++
++config CSRC_R4K_LIB
++	bool
++
++config CSRC_R4K
++	select CSRC_R4K_LIB
++	bool
++
++config CSRC_SB1250
++	bool
++
++config GPIO_TXX9
++	select GENERIC_GPIO
++	select ARCH_REQUIRE_GPIOLIB
++	bool
++
++config CFE
++	bool
++
++config ARCH_DMA_ADDR_T_64BIT
++	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
++
++config DMA_COHERENT
++	bool
++
++config DMA_NONCOHERENT
++	bool
++	select NEED_DMA_MAP_STATE
++
++config NEED_DMA_MAP_STATE
++	bool
++
++config SYS_HAS_EARLY_PRINTK
++	bool
++
++config HOTPLUG_CPU
++	bool "Support for hot-pluggable CPUs"
++	depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
++	help
++	  Say Y here to allow turning CPUs off and on. CPUs can be
++	  controlled through /sys/devices/system/cpu.
++	  (Note: power management support will enable this option
++	    automatically on SMP systems. )
++	  Say N if you want to disable CPU hotplug.
++
++config SYS_SUPPORTS_HOTPLUG_CPU
++	bool
++
++config I8259
++	bool
++
++config MIPS_BONITO64
++	bool
++
++config MIPS_MSC
++	bool
++
++config MIPS_NILE4
++	bool
++
++config MIPS_DISABLE_OBSOLETE_IDE
++	bool
++
++config SYNC_R4K
++	bool
++
++config MIPS_MACHINE
++	def_bool n
++
++config NO_IOPORT
++	def_bool n
++
++config GENERIC_ISA_DMA
++	bool
++	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
++	select ISA_DMA_API
++
++config GENERIC_ISA_DMA_SUPPORT_BROKEN
++	bool
++	select GENERIC_ISA_DMA
++
++config ISA_DMA_API
++	bool
++
++config GENERIC_GPIO
++	bool
++
++#
++# Endianess selection.  Sufficiently obscure so many users don't know what to
++# answer,so we try hard to limit the available choices.  Also the use of a
++# choice statement should be more obvious to the user.
++#
++choice
++	prompt "Endianess selection"
++	help
++	  Some MIPS machines can be configured for either little or big endian
++	  byte order. These modes require different kernels and a different
++	  Linux distribution.  In general there is one preferred byteorder for a
++	  particular system but some systems are just as commonly used in the
++	  one or the other endianness.
++
++config CPU_BIG_ENDIAN
++	bool "Big endian"
++	depends on SYS_SUPPORTS_BIG_ENDIAN
++
++config CPU_LITTLE_ENDIAN
++	bool "Little endian"
++	depends on SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++
++endchoice
++
++config EXPORT_UASM
++	bool
++
++config SYS_SUPPORTS_APM_EMULATION
++	bool
++
++config SYS_SUPPORTS_BIG_ENDIAN
++	bool
++
++config SYS_SUPPORTS_LITTLE_ENDIAN
++	bool
++
++config SYS_SUPPORTS_HUGETLBFS
++	bool
++	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
++	default y
++
++config IRQ_CPU
++	bool
++
++config IRQ_CPU_RM7K
++	bool
++
++config IRQ_CPU_RM9K
++	bool
++
++config IRQ_MSP_SLP
++	bool
++
++config IRQ_MSP_CIC
++	bool
++
++config IRQ_TXX9
++	bool
++
++config IRQ_GT641XX
++	bool
++
++config IRQ_GIC
++	bool
++
++config MIPS_BOARDS_GEN
++	bool
++
++config PCI_GT64XXX_PCI0
++	bool
++
++config NO_EXCEPT_FILL
++	bool
++
++config MIPS_RM9122
++	bool
++	select SERIAL_RM9000
++
++config SOC_EMMA2RH
++	bool
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_R5500
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++
++config SOC_PNX833X
++	bool
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select DMA_NONCOHERENT
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select GENERIC_GPIO
++	select CPU_MIPSR2_IRQ_VI
++
++config SOC_PNX8335
++	bool
++	select SOC_PNX833X
++
++config PNX8550
++	bool
++	select SOC_PNX8550
++
++config SOC_PNX8550
++	bool
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select GENERIC_GPIO
++
++config SWAP_IO_SPACE
++	bool
++
++config SERIAL_RM9000
++	bool
++
++config SGI_HAS_INDYDOG
++	bool
++
++config SGI_HAS_HAL2
++	bool
++
++config SGI_HAS_SEEQ
++	bool
++
++config SGI_HAS_WD93
++	bool
++
++config SGI_HAS_ZILOG
++	bool
++
++config SGI_HAS_I8042
++	bool
++
++config DEFAULT_SGI_PARTITION
++	bool
++
++config ARC32
++	bool
++
++config SNIPROM
++	bool
++
++config BOOT_ELF32
++	bool
++
++config MIPS_L1_CACHE_SHIFT
++	int
++	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
++	default "6" if MIPS_CPU_SCACHE
++	default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
++	default "5"
++
++config HAVE_STD_PC_SERIAL_PORT
++	bool
++
++config ARC_CONSOLE
++	bool "ARC console support"
++	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
++
++config ARC_MEMORY
++	bool
++	depends on MACH_JAZZ || SNI_RM || SGI_IP32
++	default y
++
++config ARC_PROMLIB
++	bool
++	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
++	default y
++
++config ARC64
++	bool
++
++config BOOT_ELF64
++	bool
++
++menu "CPU selection"
++
++choice
++	prompt "CPU type"
++	default CPU_R4X00
++
++config CPU_LOONGSON2E
++	bool "Loongson 2E"
++	depends on SYS_HAS_CPU_LOONGSON2E
++	select CPU_LOONGSON2
++	help
++	  The Loongson 2E processor implements the MIPS III instruction set
++	  with many extensions.
++
++	  It has an internal FPGA northbridge, which is compatible to
++	  bonito64.
++
++config CPU_LOONGSON2F
++	bool "Loongson 2F"
++	depends on SYS_HAS_CPU_LOONGSON2F
++	select CPU_LOONGSON2
++	select GENERIC_GPIO
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  The Loongson 2F processor implements the MIPS III instruction set
++	  with many extensions.
++
++	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
++	  have a similar programming interface with FPGA northbridge used in
++	  Loongson2E.
++
++config CPU_MIPS32_R1
++	bool "MIPS32 Release 1"
++	depends on SYS_HAS_CPU_MIPS32_R1
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	help
++	  Choose this option to build a kernel for release 1 or later of the
++	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
++	  MIPS processor are based on a MIPS32 processor.  If you know the
++	  specific type of processor in your system, choose those that one
++	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
++	  Release 2 of the MIPS32 architecture is available since several
++	  years so chances are you even have a MIPS32 Release 2 processor
++	  in which case you should choose CPU_MIPS32_R2 instead for better
++	  performance.
++
++config CPU_MIPS32_R2
++	bool "MIPS32 Release 2"
++	depends on SYS_HAS_CPU_MIPS32_R2
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	help
++	  Choose this option to build a kernel for release 2 or later of the
++	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
++	  MIPS processor are based on a MIPS32 processor.  If you know the
++	  specific type of processor in your system, choose those that one
++	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
++
++config CPU_MIPS64_R1
++	bool "MIPS64 Release 1"
++	depends on SYS_HAS_CPU_MIPS64_R1
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	select CPU_SUPPORTS_HUGEPAGES
++	help
++	  Choose this option to build a kernel for release 1 or later of the
++	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
++	  MIPS processor are based on a MIPS64 processor.  If you know the
++	  specific type of processor in your system, choose those that one
++	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
++	  Release 2 of the MIPS64 architecture is available since several
++	  years so chances are you even have a MIPS64 Release 2 processor
++	  in which case you should choose CPU_MIPS64_R2 instead for better
++	  performance.
++
++config CPU_MIPS64_R2
++	bool "MIPS64 Release 2"
++	depends on SYS_HAS_CPU_MIPS64_R2
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	select CPU_SUPPORTS_HUGEPAGES
++	help
++	  Choose this option to build a kernel for release 2 or later of the
++	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
++	  MIPS processor are based on a MIPS64 processor.  If you know the
++	  specific type of processor in your system, choose those that one
++	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
++
++config CPU_R3000
++	bool "R3000"
++	depends on SYS_HAS_CPU_R3000
++	select CPU_HAS_WB
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	help
++	  Please make sure to pick the right CPU type. Linux/MIPS is not
++	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
++	  *not* work on R4000 machines and vice versa.  However, since most
++	  of the supported machines have an R4000 (or similar) CPU, R4x00
++	  might be a safe bet.  If the resulting kernel does not work,
++	  try to recompile with R3000.
++
++config CPU_TX39XX
++	bool "R39XX"
++	depends on SYS_HAS_CPU_TX39XX
++	select CPU_SUPPORTS_32BIT_KERNEL
++
++config CPU_VR41XX
++	bool "R41xx"
++	depends on SYS_HAS_CPU_VR41XX
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	help
++	  The options selects support for the NEC VR4100 series of processors.
++	  Only choose this option if you have one of these processors as a
++	  kernel built with this option will not run on any other type of
++	  processor or vice versa.
++
++config CPU_R4300
++	bool "R4300"
++	depends on SYS_HAS_CPU_R4300
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	help
++	  MIPS Technologies R4300-series processors.
++
++config CPU_R4X00
++	bool "R4x00"
++	depends on SYS_HAS_CPU_R4X00
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	help
++	  MIPS Technologies R4000-series processors other than 4300, including
++	  the R4000, R4400, R4600, and 4700.
++
++config CPU_TX49XX
++	bool "R49XX"
++	depends on SYS_HAS_CPU_TX49XX
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++
++config CPU_R5000
++	bool "R5000"
++	depends on SYS_HAS_CPU_R5000
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	help
++	  MIPS Technologies R5000-series processors other than the Nevada.
++
++config CPU_R5432
++	bool "R5432"
++	depends on SYS_HAS_CPU_R5432
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++
++config CPU_R5500
++	bool "R5500"
++	depends on SYS_HAS_CPU_R5500
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HUGEPAGES
++	help
++	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
++	  instruction set.
++
++config CPU_R6000
++	bool "R6000"
++	depends on EXPERIMENTAL
++	depends on SYS_HAS_CPU_R6000
++	select CPU_SUPPORTS_32BIT_KERNEL
++	help
++	  MIPS Technologies R6000 and R6000A series processors.  Note these
++	  processors are extremely rare and the support for them is incomplete.
++
++config CPU_NEVADA
++	bool "RM52xx"
++	depends on SYS_HAS_CPU_NEVADA
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	help
++	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
++
++config CPU_R8000
++	bool "R8000"
++	depends on EXPERIMENTAL
++	depends on SYS_HAS_CPU_R8000
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_64BIT_KERNEL
++	help
++	  MIPS Technologies R8000 processors.  Note these processors are
++	  uncommon and the support for them is incomplete.
++
++config CPU_R10000
++	bool "R10000"
++	depends on SYS_HAS_CPU_R10000
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	help
++	  MIPS Technologies R10000-series processors.
++
++config CPU_RM7000
++	bool "RM7000"
++	depends on SYS_HAS_CPU_RM7000
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++
++config CPU_RM9000
++	bool "RM9000"
++	depends on SYS_HAS_CPU_RM9000
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	select WEAK_ORDERING
++
++config CPU_SB1
++	bool "SB1"
++	depends on SYS_HAS_CPU_SB1
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	select WEAK_ORDERING
++
++config CPU_CAVIUM_OCTEON
++	bool "Cavium Octeon processor"
++	depends on SYS_HAS_CPU_CAVIUM_OCTEON
++	select CPU_HAS_PREFETCH
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_SMP
++	select NR_CPUS_DEFAULT_16
++	select WEAK_ORDERING
++	select CPU_SUPPORTS_HIGHMEM
++	select CPU_SUPPORTS_HUGEPAGES
++	help
++	  The Cavium Octeon processor is a highly integrated chip containing
++	  many ethernet hardware widgets for networking tasks. The processor
++	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
++	  Full details can be found at http://www.caviumnetworks.com.
++
++config CPU_BMIPS3300
++	bool "BMIPS3300"
++	depends on SYS_HAS_CPU_BMIPS3300
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SWAP_IO_SPACE
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select WEAK_ORDERING
++	help
++	  Broadcom BMIPS3300 processors.
++
++config CPU_BMIPS4350
++	bool "BMIPS4350"
++	depends on SYS_HAS_CPU_BMIPS4350
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SWAP_IO_SPACE
++	select SYS_SUPPORTS_SMP
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select WEAK_ORDERING
++	help
++	  Broadcom BMIPS4350 ("VIPER") processors.
++
++config CPU_BMIPS4380
++	bool "BMIPS4380"
++	depends on SYS_HAS_CPU_BMIPS4380
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SWAP_IO_SPACE
++	select SYS_SUPPORTS_SMP
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select WEAK_ORDERING
++	help
++	  Broadcom BMIPS4380 processors.
++
++config CPU_BMIPS5000
++	bool "BMIPS5000"
++	depends on SYS_HAS_CPU_BMIPS5000
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SWAP_IO_SPACE
++	select SYS_SUPPORTS_SMP
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select WEAK_ORDERING
++	help
++	  Broadcom BMIPS5000 processors.
++
++endchoice
++
++if CPU_LOONGSON2F
++config CPU_NOP_WORKAROUNDS
++	bool
++
++config CPU_JUMP_WORKAROUNDS
++	bool
++
++config CPU_LOONGSON2F_WORKAROUNDS
++	bool "Loongson 2F Workarounds"
++	default y
++	select CPU_NOP_WORKAROUNDS
++	select CPU_JUMP_WORKAROUNDS
++	help
++	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
++	  require workarounds.  Without workarounds the system may hang
++	  unexpectedly.  For more information please refer to the gas
++	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
++
++	  Loongson 2F03 and later have fixed these issues and no workarounds
++	  are needed.  The workarounds have no significant side effect on them
++	  but may decrease the performance of the system so this option should
++	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
++	  systems.
++
++	  If unsure, please say Y.
++endif # CPU_LOONGSON2F
++
++config SYS_SUPPORTS_ZBOOT
++	bool
++	select HAVE_KERNEL_GZIP
++	select HAVE_KERNEL_BZIP2
++	select HAVE_KERNEL_LZMA
++	select HAVE_KERNEL_LZO
++
++config SYS_SUPPORTS_ZBOOT_UART16550
++	bool
++	select SYS_SUPPORTS_ZBOOT
++
++config CPU_LOONGSON2
++	bool
++	select CPU_SUPPORTS_32BIT_KERNEL
++	select CPU_SUPPORTS_64BIT_KERNEL
++	select CPU_SUPPORTS_HIGHMEM
++
++config SYS_HAS_CPU_LOONGSON2E
++	bool
++
++config SYS_HAS_CPU_LOONGSON2F
++	bool
++	select CPU_SUPPORTS_CPUFREQ
++	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
++	select CPU_SUPPORTS_UNCACHED_ACCELERATED
++
++config SYS_HAS_CPU_MIPS32_R1
++	bool
++
++config SYS_HAS_CPU_MIPS32_R2
++	bool
++
++config SYS_HAS_CPU_MIPS64_R1
++	bool
++
++config SYS_HAS_CPU_MIPS64_R2
++	bool
++
++config SYS_HAS_CPU_R3000
++	bool
++
++config SYS_HAS_CPU_TX39XX
++	bool
++
++config SYS_HAS_CPU_VR41XX
++	bool
++
++config SYS_HAS_CPU_R4300
++	bool
++
++config SYS_HAS_CPU_R4X00
++	bool
++
++config SYS_HAS_CPU_TX49XX
++	bool
++
++config SYS_HAS_CPU_R5000
++	bool
++
++config SYS_HAS_CPU_R5432
++	bool
++
++config SYS_HAS_CPU_R5500
++	bool
++
++config SYS_HAS_CPU_R6000
++	bool
++
++config SYS_HAS_CPU_NEVADA
++	bool
++
++config SYS_HAS_CPU_R8000
++	bool
++
++config SYS_HAS_CPU_R10000
++	bool
++
++config SYS_HAS_CPU_RM7000
++	bool
++
++config SYS_HAS_CPU_RM9000
++	bool
++
++config SYS_HAS_CPU_SB1
++	bool
++
++config SYS_HAS_CPU_CAVIUM_OCTEON
++	bool
++
++config SYS_HAS_CPU_BMIPS3300
++	bool
++
++config SYS_HAS_CPU_BMIPS4350
++	bool
++
++config SYS_HAS_CPU_BMIPS4380
++	bool
++
++config SYS_HAS_CPU_BMIPS5000
++	bool
++
++#
++# CPU may reorder R->R, R->W, W->R, W->W
++# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
++#
++config WEAK_ORDERING
++	bool
++
++#
++# CPU may reorder reads and writes beyond LL/SC
++# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
++#
++config WEAK_REORDERING_BEYOND_LLSC
++	bool
++endmenu
++
++#
++# These two indicate any level of the MIPS32 and MIPS64 architecture
++#
++config CPU_MIPS32
++	bool
++	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
++
++config CPU_MIPS64
++	bool
++	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
++
++#
++# These two indicate the revision of the architecture, either Release 1 or Release 2
++#
++config CPU_MIPSR1
++	bool
++	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
++
++config CPU_MIPSR2
++	bool
++	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
++
++config SYS_SUPPORTS_32BIT_KERNEL
++	bool
++config SYS_SUPPORTS_64BIT_KERNEL
++	bool
++config CPU_SUPPORTS_32BIT_KERNEL
++	bool
++config CPU_SUPPORTS_64BIT_KERNEL
++	bool
++config CPU_SUPPORTS_CPUFREQ
++	bool
++config CPU_SUPPORTS_ADDRWINCFG
++	bool
++config CPU_SUPPORTS_HUGEPAGES
++	bool
++config CPU_SUPPORTS_UNCACHED_ACCELERATED
++	bool
++config MIPS_PGD_C0_CONTEXT
++	bool
++	default y if 64BIT && CPU_MIPSR2
++
++#
++# Set to y for ptrace access to watch registers.
++#
++config HARDWARE_WATCHPOINTS
++       bool
++       default y if CPU_MIPSR1 || CPU_MIPSR2
++
++menu "Kernel type"
++
++choice
++
++	prompt "Kernel code model"
++	help
++	  You should only select this option if you have a workload that
++	  actually benefits from 64-bit processing or if your machine has
++	  large memory.  You will only be presented a single option in this
++	  menu if your system does not support both 32-bit and 64-bit kernels.
++
++config 32BIT
++	bool "32-bit kernel"
++	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
++	select TRAD_SIGNALS
++	help
++	  Select this option if you want to build a 32-bit kernel.
++config 64BIT
++	bool "64-bit kernel"
++	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
++	select HAVE_SYSCALL_WRAPPERS
++	help
++	  Select this option if you want to build a 64-bit kernel.
++
++endchoice
++
++choice
++	prompt "Kernel page size"
++	default PAGE_SIZE_4KB
++
++config PAGE_SIZE_4KB
++	bool "4kB"
++	depends on !CPU_LOONGSON2
++	help
++	 This option select the standard 4kB Linux page size.  On some
++	 R3000-family processors this is the only available page size.  Using
++	 4kB page size will minimize memory consumption and is therefore
++	 recommended for low memory systems.
++
++config PAGE_SIZE_8KB
++	bool "8kB"
++	depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON
++	help
++	  Using 8kB page size will result in higher performance kernel at
++	  the price of higher memory consumption.  This option is available
++	  only on R8000 and cnMIPS processors.  Note that you will need a
++	  suitable Linux distribution to support this.
++
++config PAGE_SIZE_16KB
++	bool "16kB"
++	depends on !CPU_R3000 && !CPU_TX39XX
++	help
++	  Using 16kB page size will result in higher performance kernel at
++	  the price of higher memory consumption.  This option is available on
++	  all non-R3000 family processors.  Note that you will need a suitable
++	  Linux distribution to support this.
++
++config PAGE_SIZE_32KB
++	bool "32kB"
++	depends on CPU_CAVIUM_OCTEON
++	help
++	  Using 32kB page size will result in higher performance kernel at
++	  the price of higher memory consumption.  This option is available
++	  only on cnMIPS cores.  Note that you will need a suitable Linux
++	  distribution to support this.
++
++config PAGE_SIZE_64KB
++	bool "64kB"
++	depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
++	help
++	  Using 64kB page size will result in higher performance kernel at
++	  the price of higher memory consumption.  This option is available on
++	  all non-R3000 family processor.  Not that at the time of this
++	  writing this option is still high experimental.
++
++endchoice
++
++config FORCE_MAX_ZONEORDER
++	int "Maximum zone order"
++	range 13 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
++	default "13" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
++	range 12 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
++	default "12" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
++	range 11 64
++	default "11"
++	help
++	  The kernel memory allocator divides physically contiguous memory
++	  blocks into "zones", where each zone is a power of two number of
++	  pages.  This option selects the largest power of two that the kernel
++	  keeps in the memory allocator.  If you need to allocate very large
++	  blocks of physically contiguous memory, then you may need to
++	  increase this value.
++
++	  This config option is actually maximum order plus one. For example,
++	  a value of 11 means that the largest free memory block is 2^10 pages.
++
++	  The page size is not necessarily 4KB.  Keep this in mind
++	  when choosing a value for this option.
++
++config BOARD_SCACHE
++	bool
++
++config IP22_CPU_SCACHE
++	bool
++	select BOARD_SCACHE
++
++#
++# Support for a MIPS32 / MIPS64 style S-caches
++#
++config MIPS_CPU_SCACHE
++	bool
++	select BOARD_SCACHE
++
++config R5000_CPU_SCACHE
++	bool
++	select BOARD_SCACHE
++
++config RM7000_CPU_SCACHE
++	bool
++	select BOARD_SCACHE
++
++config SIBYTE_DMA_PAGEOPS
++	bool "Use DMA to clear/copy pages"
++	depends on CPU_SB1
++	help
++	  Instead of using the CPU to zero and copy pages, use a Data Mover
++	  channel.  These DMA channels are otherwise unused by the standard
++	  SiByte Linux port.  Seems to give a small performance benefit.
++
++config CPU_HAS_PREFETCH
++	bool
++
++choice
++	prompt "MIPS MT options"
++
++config MIPS_MT_DISABLED
++	bool "Disable multithreading support."
++	help
++	  Use this option if your workload can't take advantage of
++	  MIPS hardware multithreading support.  On systems that don't have
++	  the option of an MT-enabled processor this option will be the only
++	  option in this menu.
++
++config MIPS_MT_SMP
++	bool "Use 1 TC on each available VPE for SMP"
++	depends on SYS_SUPPORTS_MULTITHREADING
++	select CPU_MIPSR2_IRQ_VI
++	select CPU_MIPSR2_IRQ_EI
++	select MIPS_MT
++	select NR_CPUS_DEFAULT_2
++	select SMP
++	select SYS_SUPPORTS_SCHED_SMT if SMP
++	select SYS_SUPPORTS_SMP
++	select SMP_UP
++	help
++	  This is a kernel model which is known a VSMP but lately has been
++	  marketesed into SMVP.
++	  Virtual SMP uses the processor's VPEs  to implement virtual
++	  processors. In currently available configuration of the 34K processor
++	  this allows for a dual processor. Both processors will share the same
++	  primary caches; each will obtain the half of the TLB for it's own
++	  exclusive use. For a layman this model can be described as similar to
++	  what Intel calls Hyperthreading.
++
++	  For further information see http://www.linux-mips.org/wiki/34K#VSMP
++
++config MIPS_MT_SMTC
++	bool "SMTC: Use all TCs on all VPEs for SMP"
++	depends on CPU_MIPS32_R2
++	#depends on CPU_MIPS64_R2		# once there is hardware ...
++	depends on SYS_SUPPORTS_MULTITHREADING
++	select CPU_MIPSR2_IRQ_VI
++	select CPU_MIPSR2_IRQ_EI
++	select MIPS_MT
++	select NR_CPUS_DEFAULT_8
++	select SMP
++	select SYS_SUPPORTS_SMP
++	select SMP_UP
++	help
++	  This is a kernel model which is known a SMTC or lately has been
++	  marketesed into SMVP.
++	  is presenting the available TC's of the core as processors to Linux.
++	  On currently available 34K processors this means a Linux system will
++	  see up to 5 processors. The implementation of the SMTC kernel differs
++	  significantly from VSMP and cannot efficiently coexist in the same
++	  kernel binary so the choice between VSMP and SMTC is a compile time
++	  decision.
++
++	  For further information see http://www.linux-mips.org/wiki/34K#SMTC
++
++endchoice
++
++config MIPS_MT
++	bool
++
++config SCHED_SMT
++	bool "SMT (multithreading) scheduler support"
++	depends on SYS_SUPPORTS_SCHED_SMT
++	default n
++	help
++	  SMT scheduler support improves the CPU scheduler's decision making
++	  when dealing with MIPS MT enabled cores at a cost of slightly
++	  increased overhead in some places. If unsure say N here.
++
++config SYS_SUPPORTS_SCHED_SMT
++	bool
++
++
++config SYS_SUPPORTS_MULTITHREADING
++	bool
++
++config MIPS_MT_FPAFF
++	bool "Dynamic FPU affinity for FP-intensive threads"
++	default y
++	depends on MIPS_MT_SMP || MIPS_MT_SMTC
++
++config MIPS_VPE_LOADER
++	bool "VPE loader support."
++	depends on SYS_SUPPORTS_MULTITHREADING
++	select CPU_MIPSR2_IRQ_VI
++	select CPU_MIPSR2_IRQ_EI
++	select MIPS_MT
++	help
++	  Includes a loader for loading an elf relocatable object
++	  onto another VPE and running it.
++
++config MIPS_MT_SMTC_IM_BACKSTOP
++	bool "Use per-TC register bits as backstop for inhibited IM bits"
++	depends on MIPS_MT_SMTC
++	default n
++	help
++	  To support multiple TC microthreads acting as "CPUs" within
++	  a VPE, VPE-wide interrupt mask bits must be specially manipulated
++	  during interrupt handling. To support legacy drivers and interrupt
++	  controller management code, SMTC has a "backstop" to track and
++	  if necessary restore the interrupt mask. This has some performance
++	  impact on interrupt service overhead.
++
++config MIPS_MT_SMTC_IRQAFF
++	bool "Support IRQ affinity API"
++	depends on MIPS_MT_SMTC
++	default n
++	help
++	  Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
++	  for SMTC Linux kernel. Requires platform support, of which
++	  an example can be found in the MIPS kernel i8259 and Malta
++	  platform code.  Adds some overhead to interrupt dispatch, and
++	  should be used only if you know what you are doing.
++
++config MIPS_VPE_LOADER_TOM
++	bool "Load VPE program into memory hidden from linux"
++	depends on MIPS_VPE_LOADER
++	default y
++	help
++	  The loader can use memory that is present but has been hidden from
++	  Linux using the kernel command line option "mem=xxMB". It's up to
++	  you to ensure the amount you put in the option and the space your
++	  program requires is less or equal to the amount physically present.
++
++# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
++config MIPS_VPE_APSP_API
++	bool "Enable support for AP/SP API (RTLX)"
++	depends on MIPS_VPE_LOADER
++	help
++
++config MIPS_APSP_KSPD
++	bool "Enable KSPD"
++	depends on MIPS_VPE_APSP_API
++	default y
++	help
++	  KSPD is a kernel daemon that accepts syscall requests from the SP
++	  side, actions them and returns the results. It also handles the
++	  "exit" syscall notifying other kernel modules the SP program is
++	  exiting.  You probably want to say yes here.
++
++config MIPS_CMP
++	bool "MIPS CMP framework support"
++	depends on SYS_SUPPORTS_MIPS_CMP
++	select SYNC_R4K
++	select SYS_SUPPORTS_SMP
++	select SYS_SUPPORTS_SCHED_SMT if SMP
++	select WEAK_ORDERING
++	default n
++	help
++	  This is a placeholder option for the GCMP work. It will need to
++	  be handled differently...
++
++config SB1_PASS_1_WORKAROUNDS
++	bool
++	depends on CPU_SB1_PASS_1
++	default y
++
++config SB1_PASS_2_WORKAROUNDS
++	bool
++	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
++	default y
++
++config SB1_PASS_2_1_WORKAROUNDS
++	bool
++	depends on CPU_SB1 && CPU_SB1_PASS_2
++	default y
++
++config 64BIT_PHYS_ADDR
++	bool
++
++config ARCH_PHYS_ADDR_T_64BIT
++       def_bool 64BIT_PHYS_ADDR
++
++config CPU_HAS_SMARTMIPS
++	depends on SYS_SUPPORTS_SMARTMIPS
++	bool "Support for the SmartMIPS ASE"
++	help
++	  SmartMIPS is a extension of the MIPS32 architecture aimed at
++	  increased security at both hardware and software level for
++	  smartcards.  Enabling this option will allow proper use of the
++	  SmartMIPS instructions by Linux applications.  However a kernel with
++	  this option will not work on a MIPS core without SmartMIPS core.  If
++	  you don't know you probably don't have SmartMIPS and should say N
++	  here.
++
++config CPU_HAS_WB
++	bool
++
++#
++# Vectored interrupt mode is an R2 feature
++#
++config CPU_MIPSR2_IRQ_VI
++	bool
++
++#
++# Extended interrupt mode is an R2 feature
++#
++config CPU_MIPSR2_IRQ_EI
++	bool
++
++config CPU_HAS_SYNC
++	bool
++	depends on !CPU_R3000
++	default y
++
++config GENERIC_CLOCKEVENTS_BROADCAST
++	bool
++
++#
++# CPU non-features
++#
++config CPU_DADDI_WORKAROUNDS
++	bool
++
++config CPU_R4000_WORKAROUNDS
++	bool
++	select CPU_R4400_WORKAROUNDS
++
++config CPU_R4400_WORKAROUNDS
++	bool
++
++#
++# - Highmem only makes sense for the 32-bit kernel.
++# - The current highmem code will only work properly on physically indexed
++#   caches such as R3000, SB1, R7000 or those that look like they're virtually
++#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
++#   moment we protect the user and offer the highmem option only on machines
++#   where it's known to be safe.  This will not offer highmem on a few systems
++#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
++#   indexed CPUs but we're playing safe.
++# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
++#   know they might have memory configurations that could make use of highmem
++#   support.
++#
++config HIGHMEM
++	bool "High Memory Support"
++	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
++
++config CPU_SUPPORTS_HIGHMEM
++	bool
++
++config SYS_SUPPORTS_HIGHMEM
++	bool
++
++config SYS_SUPPORTS_SMARTMIPS
++	bool
++
++config ARCH_FLATMEM_ENABLE
++	def_bool y
++	depends on !NUMA && !CPU_LOONGSON2
++
++config ARCH_DISCONTIGMEM_ENABLE
++	bool
++	default y if SGI_IP27
++	help
++	  Say Y to support efficient handling of discontiguous physical memory,
++	  for architectures which are either NUMA (Non-Uniform Memory Access)
++	  or have huge holes in the physical address space for other reasons.
++	  See <file:Documentation/vm/numa> for more.
++
++config ARCH_POPULATES_NODE_MAP
++	def_bool y
++
++config ARCH_SPARSEMEM_ENABLE
++	bool
++	select SPARSEMEM_STATIC
++
++config NUMA
++	bool "NUMA Support"
++	depends on SYS_SUPPORTS_NUMA
++	help
++	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
++	  Access).  This option improves performance on systems with more
++	  than two nodes; on two node systems it is generally better to
++	  leave it disabled; on single node systems disable this option
++	  disabled.
++
++config SYS_SUPPORTS_NUMA
++	bool
++
++config NODES_SHIFT
++	int
++	default "6"
++	depends on NEED_MULTIPLE_NODES
++
++config HW_PERF_EVENTS
++	bool "Enable hardware performance counter support for perf events"
++	depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32
++	default y
++	help
++	  Enable hardware performance counter support for perf events. If
++	  disabled, perf events will use software events only.
++
++source "mm/Kconfig"
++
++config SMP
++	bool "Multi-Processing support"
++	depends on SYS_SUPPORTS_SMP
++	select IRQ_PER_CPU
++	select USE_GENERIC_SMP_HELPERS
++	help
++	  This enables support for systems with more than one CPU. If you have
++	  a system with only one CPU, like most personal computers, say N. If
++	  you have a system with more than one CPU, say Y.
++
++	  If you say N here, the kernel will run on single and multiprocessor
++	  machines, but will use only one CPU of a multiprocessor machine. If
++	  you say Y here, the kernel will run on many, but not all,
++	  singleprocessor machines. On a singleprocessor machine, the kernel
++	  will run faster if you say N here.
++
++	  People using multiprocessor machines who say Y here should also say
++	  Y to "Enhanced Real Time Clock Support", below.
++
++	  See also the SMP-HOWTO available at
++	  <http://www.tldp.org/docs.html#howto>.
++
++	  If you don't know what to do here, say N.
++
++config SMP_UP
++	bool
++
++config SYS_SUPPORTS_MIPS_CMP
++	bool
++
++config SYS_SUPPORTS_SMP
++	bool
++
++config NR_CPUS_DEFAULT_1
++	bool
++
++config NR_CPUS_DEFAULT_2
++	bool
++
++config NR_CPUS_DEFAULT_4
++	bool
++
++config NR_CPUS_DEFAULT_8
++	bool
++
++config NR_CPUS_DEFAULT_16
++	bool
++
++config NR_CPUS_DEFAULT_32
++	bool
++
++config NR_CPUS_DEFAULT_64
++	bool
++
++config NR_CPUS
++	int "Maximum number of CPUs (2-64)"
++	range 1 64 if NR_CPUS_DEFAULT_1
++	depends on SMP
++	default "1" if NR_CPUS_DEFAULT_1
++	default "2" if NR_CPUS_DEFAULT_2
++	default "4" if NR_CPUS_DEFAULT_4
++	default "8" if NR_CPUS_DEFAULT_8
++	default "16" if NR_CPUS_DEFAULT_16
++	default "32" if NR_CPUS_DEFAULT_32
++	default "64" if NR_CPUS_DEFAULT_64
++	help
++	  This allows you to specify the maximum number of CPUs which this
++	  kernel will support.  The maximum supported value is 32 for 32-bit
++	  kernel and 64 for 64-bit kernels; the minimum value which makes
++	  sense is 1 for Qemu (useful only for kernel debugging purposes)
++	  and 2 for all others.
++
++	  This is purely to save memory - each supported CPU adds
++	  approximately eight kilobytes to the kernel image.  For best
++	  performance should round up your number of processors to the next
++	  power of two.
++
++source "kernel/time/Kconfig"
++
++#
++# Timer Interrupt Frequency Configuration
++#
++
++choice
++	prompt "Timer frequency"
++	default HZ_250
++	help
++	 Allows the configuration of the timer frequency.
++
++	config HZ_48
++		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
++
++	config HZ_100
++		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
++
++	config HZ_128
++		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
++
++	config HZ_250
++		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
++
++	config HZ_256
++		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
++
++	config HZ_1000
++		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
++
++	config HZ_1024
++		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
++
++endchoice
++
++config SYS_SUPPORTS_48HZ
++	bool
++
++config SYS_SUPPORTS_100HZ
++	bool
++
++config SYS_SUPPORTS_128HZ
++	bool
++
++config SYS_SUPPORTS_250HZ
++	bool
++
++config SYS_SUPPORTS_256HZ
++	bool
++
++config SYS_SUPPORTS_1000HZ
++	bool
++
++config SYS_SUPPORTS_1024HZ
++	bool
++
++config SYS_SUPPORTS_ARBIT_HZ
++	bool
++	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
++		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
++		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
++		     !SYS_SUPPORTS_1024HZ
++
++config HZ
++	int
++	default 48 if HZ_48
++	default 100 if HZ_100
++	default 128 if HZ_128
++	default 250 if HZ_250
++	default 256 if HZ_256
++	default 1000 if HZ_1000
++	default 1024 if HZ_1024
++
++source "kernel/Kconfig.preempt"
++
++config MIPS_INSANE_LARGE
++	bool "Support for large 64-bit configurations"
++	depends on CPU_R10000 && 64BIT
++	help
++	  MIPS R10000 does support a 44 bit / 16TB address space as opposed to
++	  previous 64-bit processors which only supported 40 bit / 1TB. If you
++	  need processes of more than 1TB virtual address space, say Y here.
++	  This will result in additional memory usage, so it is not
++	  recommended for normal users.
++
++config KEXEC
++	bool "Kexec system call (EXPERIMENTAL)"
++	depends on EXPERIMENTAL
++	help
++	  kexec is a system call that implements the ability to shutdown your
++	  current kernel, and to start another kernel.  It is like a reboot
++	  but it is independent of the system firmware.   And like a reboot
++	  you can start any kernel with it, not just Linux.
++
++	  The name comes from the similarity to the exec system call.
++
++	  It is an ongoing process to be certain the hardware in a machine
++	  is properly shutdown, so do not be surprised if this code does not
++	  initially work for you.  It may help to enable device hotplugging
++	  support.  As of this writing the exact hardware interface is
++	  strongly in flux, so no good recommendation can be made.
++
++config SECCOMP
++	bool "Enable seccomp to safely compute untrusted bytecode"
++	depends on PROC_FS
++	default y
++	help
++	  This kernel feature is useful for number crunching applications
++	  that may need to compute untrusted bytecode during their
++	  execution. By using pipes or other transports made available to
++	  the process as file descriptors supporting the read/write
++	  syscalls, it's possible to isolate those applications in
++	  their own address space using seccomp. Once seccomp is
++	  enabled via /proc/<pid>/seccomp, it cannot be disabled
++	  and the task is only allowed to execute a few safe syscalls
++	  defined by each seccomp mode.
++
++	  If unsure, say Y. Only embedded should say N here.
++
++config USE_OF
++	bool "Flattened Device Tree support"
++	select OF
++	select OF_EARLY_FLATTREE
++	help
++	  Include support for flattened device tree machine descriptions.
++
++endmenu
++
++config LOCKDEP_SUPPORT
++	bool
++	default y
++
++config STACKTRACE_SUPPORT
++	bool
++	default y
++
++source "init/Kconfig"
++
++source "kernel/Kconfig.freezer"
++
++menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
++
++config HW_HAS_EISA
++	bool
++config HW_HAS_PCI
++	bool
++
++config PCI
++	bool "Support for PCI controller"
++	depends on HW_HAS_PCI
++	select PCI_DOMAINS
++	help
++	  Find out whether you have a PCI motherboard. PCI is the name of a
++	  bus system, i.e. the way the CPU talks to the other stuff inside
++	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
++	  say Y, otherwise N.
++
++config PCI_DOMAINS
++	bool
++
++source "drivers/pci/Kconfig"
++
++#
++# ISA support is now enabled via select.  Too many systems still have the one
++# or other ISA chip on the board that users don't know about so don't expect
++# users to choose the right thing ...
++#
++config ISA
++	bool
++
++config EISA
++	bool "EISA support"
++	depends on HW_HAS_EISA
++	select ISA
++	select GENERIC_ISA_DMA
++	---help---
++	  The Extended Industry Standard Architecture (EISA) bus was
++	  developed as an open alternative to the IBM MicroChannel bus.
++
++	  The EISA bus provided some of the features of the IBM MicroChannel
++	  bus while maintaining backward compatibility with cards made for
++	  the older ISA bus.  The EISA bus saw limited use between 1988 and
++	  1995 when it was made obsolete by the PCI bus.
++
++	  Say Y here if you are building a kernel for an EISA-based machine.
++
++	  Otherwise, say N.
++
++source "drivers/eisa/Kconfig"
++
++config TC
++	bool "TURBOchannel support"
++	depends on MACH_DECSTATION
++	help
++	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
++	  processors.  TURBOchannel programming specifications are available
++	  at:
++	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
++	  and:
++	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
++	  Linux driver support status is documented at:
++	  <http://www.linux-mips.org/wiki/DECstation>
++
++#config ACCESSBUS
++#	bool "Access.Bus support"
++#	depends on TC
++
++config MMU
++	bool
++	default y
++
++config I8253
++	bool
++	select MIPS_EXTERNAL_TIMER
++
++config ZONE_DMA32
++	bool
++
++source "drivers/pcmcia/Kconfig"
++
++source "drivers/pci/hotplug/Kconfig"
++
++config RAPIDIO
++	bool "RapidIO support"
++	depends on PCI
++	default n
++	help
++	  If you say Y here, the kernel will include drivers and
++	  infrastructure code to support RapidIO interconnect devices.
++
++source "drivers/rapidio/Kconfig"
++
++endmenu
++
++menu "Executable file formats"
++
++source "fs/Kconfig.binfmt"
++
++config TRAD_SIGNALS
++	bool
++
++config MIPS32_COMPAT
++	bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
++	depends on 64BIT
++	help
++	  Select this option if you want Linux/MIPS 32-bit binary
++	  compatibility. Since all software available for Linux/MIPS is
++	  currently 32-bit you should say Y here.
++
++config COMPAT
++	bool
++	depends on MIPS32_COMPAT
++	default y
++
++config SYSVIPC_COMPAT
++	bool
++	depends on COMPAT && SYSVIPC
++	default y
++
++config MIPS32_O32
++	bool "Kernel support for o32 binaries"
++	depends on MIPS32_COMPAT
++	help
++	  Select this option if you want to run o32 binaries.  These are pure
++	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
++	  existing binaries are in this format.
++
++	  If unsure, say Y.
++
++config MIPS32_N32
++	bool "Kernel support for n32 binaries"
++	depends on MIPS32_COMPAT
++	help
++	  Select this option if you want to run n32 binaries.  These are
++	  64-bit binaries using 32-bit quantities for addressing and certain
++	  data that would normally be 64-bit.  They are used in special
++	  cases.
++
++	  If unsure, say N.
++
++config BINFMT_ELF32
++	bool
++	default y if MIPS32_O32 || MIPS32_N32
++
++endmenu
++
++menu "Power management options"
++
++config ARCH_HIBERNATION_POSSIBLE
++	def_bool y
++	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
++
++config ARCH_SUSPEND_POSSIBLE
++	def_bool y
++	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
++
++source "kernel/power/Kconfig"
++
++endmenu
++
++source "arch/mips/kernel/cpufreq/Kconfig"
++
++source "net/Kconfig"
++
++source "drivers/Kconfig"
++
++source "fs/Kconfig"
++
++source "arch/mips/Kconfig.debug"
++
++source "security/Kconfig"
++
++source "crypto/Kconfig"
++
++menuconfig VIRTUALIZATION
++	bool "Virtualization"
++	default n
++	---help---
++	  Say Y here to get to see options for using your Linux host to run other
++	  operating systems inside virtual machines (guests).
++	  This option alone does not add any kernel code.
++
++	  If you say N, all options in this submenu will be skipped and disabled.
++
++if VIRTUALIZATION
++
++source drivers/virtio/Kconfig
++
++endif # VIRTUALIZATION
++
++source "lib/Kconfig"
 diff -Nur linux-2.6.39.orig/arch/mips/kernel/traps.c linux-2.6.39/arch/mips/kernel/traps.c
 --- linux-2.6.39.orig/arch/mips/kernel/traps.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/kernel/traps.c	2011-05-27 14:36:51.000000000 +0200
-@@ -46,6 +46,7 @@
- #include <asm/ptrace.h>
- #include <asm/sections.h>
- #include <asm/system.h>
++++ linux-2.6.39/arch/mips/kernel/traps.c	2011-08-24 05:53:05.179230891 +0200
+@@ -54,6 +54,7 @@
+ #include <asm/types.h>
+ #include <asm/stacktrace.h>
+ #include <asm/uasm.h>
 +#include <asm/time.h>
- #include <asm/tlbdebug.h>
- #include <asm/traps.h>
- #include <asm/uaccess.h>
+ 
+ extern void check_wait(void);
+ extern asmlinkage void r4k_wait(void);
 @@ -1576,6 +1577,8 @@
  	if (cpu_has_mips_r2) {
  		cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
@@ -9095,9 +15121,34 @@ diff -Nur linux-2.6.39.orig/arch/mips/kernel/traps.c linux-2.6.39/arch/mips/kern
  		cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
  		if (cp0_perfcount_irq == cp0_compare_irq)
  			cp0_perfcount_irq = -1;
+diff -Nur linux-2.6.39.orig/arch/mips/Makefile linux-2.6.39/arch/mips/Makefile
+--- linux-2.6.39.orig/arch/mips/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/arch/mips/Makefile	2011-08-24 02:42:39.917989402 +0200
+@@ -158,6 +158,13 @@
+ endif
+ cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
+ 
++#
++# Atheros AR71xx
++#
++core-$(CONFIG_ATHEROS_AR71XX)	+= arch/mips/ar71xx/
++cflags-$(CONFIG_ATHEROS_AR71XX)	+= -I$(srctree)/arch/mips/include/asm/mach-ar71xx
++load-$(CONFIG_ATHEROS_AR71XX)	+= 0xffffffff80060000
++
+ cflags-$(CONFIG_CPU_R4000_WORKAROUNDS)	+= $(call cc-option,-mfix-r4000,)
+ cflags-$(CONFIG_CPU_R4400_WORKAROUNDS)	+= $(call cc-option,-mfix-r4400,)
+ cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS)	+= $(call cc-option,-mno-daddi,)
+@@ -174,6 +181,7 @@
+ #
+ libs-$(CONFIG_ARC)		+= arch/mips/fw/arc/
+ libs-$(CONFIG_CFE)		+= arch/mips/fw/cfe/
++libs-$(CONFIG_MYLOADER)		+= arch/mips/fw/myloader/
+ libs-$(CONFIG_SNIPROM)		+= arch/mips/fw/sni/
+ libs-y				+= arch/mips/fw/lib/
+ 
 diff -Nur linux-2.6.39.orig/arch/mips/pci/Makefile linux-2.6.39/arch/mips/pci/Makefile
 --- linux-2.6.39.orig/arch/mips/pci/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/pci/Makefile	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/arch/mips/pci/Makefile	2011-08-22 16:21:37.437981205 +0200
 @@ -18,6 +18,7 @@
  obj-$(CONFIG_BCM47XX)		+= pci-bcm47xx.o
  obj-$(CONFIG_BCM63XX)		+= pci-bcm63xx.o fixup-bcm63xx.o \
@@ -9108,8 +15159,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/Makefile linux-2.6.39/arch/mips/pci/Ma
  # These are still pretty much in the old state, watch, go blind.
 diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pci/pci-ar71xx.c
 --- linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/pci/pci-ar71xx.c	2011-06-01 14:02:22.000000000 +0200
-@@ -0,0 +1,408 @@
++++ linux-2.6.39/arch/mips/pci/pci-ar71xx.c	2011-08-06 09:32:37.098016752 +0200
+@@ -0,0 +1,415 @@
 +/*
 + *  Atheros AR71xx PCI host controller driver
 + *
@@ -9219,7 +15270,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +		__raw_writel(ahb_err, base + PCI_REG_AHB_ERR);
 +	}
 +
-+	return ((ahb_err | pci_err) ? 1 : 0);
++	return (ahb_err | pci_err) ? 1 : 0;
 +}
 +
 +static inline int ar71xx_pci_set_cfgaddr(struct pci_bus *bus,
@@ -9248,6 +15299,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +	static u32 mask[8] = {0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0};
 +	unsigned long flags;
 +	u32 data;
++	int retry = 0;
 +	int ret;
 +
 +	ret = PCIBIOS_SUCCESSFUL;
@@ -9255,6 +15307,7 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +	DBG("PCI: read config: %02x:%02x.%01x/%02x:%01d\n", bus->number,
 +			PCI_SLOT(devfn), PCI_FUNC(devfn), where, size);
 +
++retry:
 +	spin_lock_irqsave(&ar71xx_pci_lock, flags);
 +
 +	if (bus->number == 0 && devfn == 0) {
@@ -9288,6 +15341,14 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +
 +	*value = (data >> (8 * (where & 3))) & mask[size & 7];
 +
++	/*
++	 * PCI controller bug: sometimes reads to the PCI_COMMAND register
++	 * return 0xffff, even though the PCI trace shows the correct value.
++	 * Work around this by retrying reads to this register
++	 */
++	if (where == PCI_COMMAND && (*value & 0xffff) == 0xffff && retry++ < 2)
++		goto retry;
++
 +	return ret;
 +}
 +
@@ -9433,13 +15494,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +
 +static void ar71xx_pci_irq_unmask(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
 +	void __iomem *base = ar71xx_reset_base;
 +	u32 t;
 +
-+	d->irq -= AR71XX_PCI_IRQ_BASE;
-+
 +	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+	__raw_writel(t | (1 << d->irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
++	__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 +
 +	/* flush write */
 +	(void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -9447,13 +15507,12 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +
 +static void ar71xx_pci_irq_mask(struct irq_data *d)
 +{
++	unsigned int irq = d->irq - AR71XX_PCI_IRQ_BASE;
 +	void __iomem *base = ar71xx_reset_base;
 +	u32 t;
 +
-+	d->irq -= AR71XX_PCI_IRQ_BASE;
-+
 +	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
-+	__raw_writel(t & ~(1 << d->irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
++	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 +
 +	/* flush write */
 +	(void) __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -9461,8 +15520,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +
 +static struct irq_chip ar71xx_pci_irq_chip = {
 +	.name		= "AR71XX PCI ",
-+	.irq_mask		= ar71xx_pci_irq_mask,
-+	.irq_unmask		= ar71xx_pci_irq_unmask,
++	.irq_mask	= ar71xx_pci_irq_mask,
++	.irq_unmask	= ar71xx_pci_irq_unmask,
 +	.irq_mask_ack	= ar71xx_pci_irq_mask,
 +};
 +
@@ -9475,10 +15534,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +	__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
 +
 +	for (i = AR71XX_PCI_IRQ_BASE;
-+	     i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) {
++	     i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
 +		irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
 +					 handle_level_irq);
-+	}
 +
 +	irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
 +}
@@ -9520,8 +15578,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar71xx.c linux-2.6.39/arch/mips/pc
 +}
 diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pci/pci-ar724x.c
 --- linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/arch/mips/pci/pci-ar724x.c	2011-06-01 14:02:22.000000000 +0200
-@@ -0,0 +1,394 @@
++++ linux-2.6.39/arch/mips/pci/pci-ar724x.c	2011-08-06 09:32:37.088017079 +0200
+@@ -0,0 +1,389 @@
 +/*
 + *  Atheros AR724x PCI host controller driver
 + *
@@ -9635,10 +15693,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +	 * if we set the BAR with proper base address
 +	 */
 +	if ((where == 0x10) && (size == 4)) {
-+		if (ar71xx_soc == AR71XX_SOC_AR7240)
-+			ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff);
-+		else
-+			ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0x1000ffff);
++		u32 val;
++		val = (ar71xx_soc == AR71XX_SOC_AR7240) ? 0xffff : 0x1000ffff;
++		ar724x_pci_write(ar724x_pci_devcfg_base, where, size, val);
 +	}
 +
 +	return PCIBIOS_SUCCESSFUL;
@@ -9780,7 +15837,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +		return -ENODEV;
 +	}
 +
-+	if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
++	if (ar71xx_soc == AR71XX_SOC_AR7241 ||
++	    ar71xx_soc == AR71XX_SOC_AR7242) {
 +		t = __raw_readl(base + AR724X_PCI_REG_APP);
 +		t |= BIT(16);
 +		__raw_writel(t, base + AR724X_PCI_REG_APP);
@@ -9811,8 +15869,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +
 +	switch (d->irq) {
 +	case AR71XX_PCI_IRQ_DEV0:
-+		d->irq -= AR71XX_PCI_IRQ_BASE;
-+
 +		t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
 +		__raw_writel(t | AR724X_PCI_INT_DEV0,
 +			     base + AR724X_PCI_REG_INT_MASK);
@@ -9828,8 +15884,6 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +
 +	switch (d->irq) {
 +	case AR71XX_PCI_IRQ_DEV0:
-+		d->irq -= AR71XX_PCI_IRQ_BASE;
-+
 +		t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
 +		__raw_writel(t & ~AR724X_PCI_INT_DEV0,
 +			     base + AR724X_PCI_REG_INT_MASK);
@@ -9848,8 +15902,8 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +
 +static struct irq_chip ar724x_pci_irq_chip = {
 +	.name		= "AR724X PCI ",
-+	.irq_mask		= ar724x_pci_irq_mask,
-+	.irq_unmask		= ar724x_pci_irq_unmask,
++	.irq_mask	= ar724x_pci_irq_mask,
++	.irq_unmask	= ar724x_pci_irq_unmask,
 +	.irq_mask_ack	= ar724x_pci_irq_mask,
 +};
 +
@@ -9869,10 +15923,9 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +	__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
 +
 +	for (i = AR71XX_PCI_IRQ_BASE;
-+	     i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) {
++	     i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
 +		irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
 +					 handle_level_irq);
-+	}
 +
 +	irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
 +}
@@ -9907,48 +15960,19 @@ diff -Nur linux-2.6.39.orig/arch/mips/pci/pci-ar724x.c linux-2.6.39/arch/mips/pc
 +
 +	return 0;
 +
-+ err_unmap_ctrl:
++err_unmap_ctrl:
 +	iounmap(ar724x_pci_ctrl_base);
-+  err_unmap_devcfg:
++err_unmap_devcfg:
 +	iounmap(ar724x_pci_devcfg_base);
-+ err_unmap_localcfg:
++err_unmap_localcfg:
 +	iounmap(ar724x_pci_localcfg_base);
-+ err:
++err:
 +	return ret;
 +}
-diff -Nur linux-2.6.39.orig/drivers/char/Kconfig linux-2.6.39/drivers/char/Kconfig
---- linux-2.6.39.orig/drivers/char/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/char/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -511,6 +511,14 @@
- 	  pc8736x_gpio drivers.  If those drivers are built as
- 	  modules, this one will be too, named nsc_gpio
- 
-+config GPIO_DEVICE
-+	tristate "GPIO device support"
-+	depends on GENERIC_GPIO
-+	help
-+	  Say Y to enable Linux GPIO device support.  This allows control of
-+	  GPIO pins using a character device
-+
-+
- config RAW_DRIVER
- 	tristate "RAW driver (/dev/raw/rawN)"
- 	depends on BLOCK
-diff -Nur linux-2.6.39.orig/drivers/char/Makefile linux-2.6.39/drivers/char/Makefile
---- linux-2.6.39.orig/drivers/char/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/char/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -47,6 +47,7 @@
- obj-$(CONFIG_SCx200_GPIO)	+= scx200_gpio.o
- obj-$(CONFIG_PC8736x_GPIO)	+= pc8736x_gpio.o
- obj-$(CONFIG_NSC_GPIO)		+= nsc_gpio.o
-+obj-$(CONFIG_GPIO_DEVICE)	+= gpio_dev.o
- obj-$(CONFIG_GPIO_TB0219)	+= tb0219.o
- obj-$(CONFIG_TELCLOCK)		+= tlclk.o
- 
 diff -Nur linux-2.6.39.orig/drivers/gpio/nxp_74hc153.c linux-2.6.39/drivers/gpio/nxp_74hc153.c
 --- linux-2.6.39.orig/drivers/gpio/nxp_74hc153.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/gpio/nxp_74hc153.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,246 @@
++++ linux-2.6.39/drivers/gpio/nxp_74hc153.c	2011-04-27 12:19:22.327664626 +0200
+@@ -0,0 +1,247 @@
 +/*
 + *  NXP 74HC153 - Dual 4-input multiplexer GPIO driver
 + *
@@ -9962,6 +15986,7 @@ diff -Nur linux-2.6.39.orig/drivers/gpio/nxp_74hc153.c linux-2.6.39/drivers/gpio
 +#include <linux/module.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
++#include <linux/slab.h>
 +#include <linux/platform_device.h>
 +#include <linux/nxp_74hc153.h>
 +
@@ -10129,15 +16154,15 @@ diff -Nur linux-2.6.39.orig/drivers/gpio/nxp_74hc153.c linux-2.6.39/drivers/gpio
 +	platform_set_drvdata(pdev, nxp);
 +	return 0;
 +
-+ err_free_2y:
++err_free_2y:
 +	gpio_free(pdata->gpio_pin_2y);
-+ err_free_1y:
++err_free_1y:
 +	gpio_free(pdata->gpio_pin_1y);
-+ err_free_s1:
++err_free_s1:
 +	gpio_free(pdata->gpio_pin_s1);
-+ err_free_s0:
++err_free_s0:
 +	gpio_free(pdata->gpio_pin_s0);
-+ err_free_nxp:
++err_free_nxp:
 +	kfree(nxp);
 +	return err;
 +}
@@ -10195,263 +16220,10 @@ diff -Nur linux-2.6.39.orig/drivers/gpio/nxp_74hc153.c linux-2.6.39/drivers/gpio
 +MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC153");
 +MODULE_LICENSE("GPL v2");
 +MODULE_ALIAS("platform:" NXP_74HC153_DRIVER_NAME);
-diff -Nur linux-2.6.39.orig/drivers/input/misc/Kconfig linux-2.6.39/drivers/input/misc/Kconfig
---- linux-2.6.39.orig/drivers/input/misc/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/input/misc/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -467,4 +467,20 @@
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called xen-kbdfront.
- 
-+config INPUT_GPIO_BUTTONS
-+	tristate "Polled GPIO buttons interface"
-+	depends on GENERIC_GPIO
-+	select INPUT_POLLDEV
-+	help
-+	  This driver implements support for buttons connected
-+	  to GPIO pins of various CPUs (and some other chips).
-+
-+	  Say Y here if your device has buttons connected
-+	  directly to such GPIO pins.  Your board-specific
-+	  setup logic must also provide a platform device,
-+	  with configuration data saying which GPIOs are used.
-+
-+	  To compile this driver as a module, choose M here: the
-+	  module will be called gpio-buttons.
-+
- endif
-diff -Nur linux-2.6.39.orig/drivers/input/misc/Makefile linux-2.6.39/drivers/input/misc/Makefile
---- linux-2.6.39.orig/drivers/input/misc/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/input/misc/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -44,4 +44,5 @@
- obj-$(CONFIG_INPUT_WM831X_ON)		+= wm831x-on.o
- obj-$(CONFIG_INPUT_XEN_KBDDEV_FRONTEND)	+= xen-kbdfront.o
- obj-$(CONFIG_INPUT_YEALINK)		+= yealink.o
-+obj-$(CONFIG_INPUT_GPIO_BUTTONS)	+= gpio_buttons.o
- 
-diff -Nur linux-2.6.39.orig/drivers/input/misc/gpio_buttons.c linux-2.6.39/drivers/input/misc/gpio_buttons.c
---- linux-2.6.39.orig/drivers/input/misc/gpio_buttons.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/input/misc/gpio_buttons.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,216 @@
-+/*
-+ *  Driver for buttons on GPIO lines not capable of generating interrupts
-+ *
-+ *  Copyright (C) 2007-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2010 Nuno Goncalves <nunojpg@gmail.com>
-+ *
-+ *  This file was based on: /drivers/input/misc/cobalt_btns.c
-+ *	Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
-+ *
-+ *  also was based on: /drivers/input/keyboard/gpio_keys.c
-+ *	Copyright 2005 Phil Blundell
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License version 2 as
-+ *  published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/slab.h>
-+
-+#include <linux/input.h>
-+#include <linux/input-polldev.h>
-+#include <linux/ioport.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/gpio_buttons.h>
-+
-+#include <asm/gpio.h>
-+
-+#define DRV_NAME	"gpio-buttons"
-+#define DRV_VERSION	"0.1.2"
-+#define PFX		DRV_NAME ": "
-+
-+struct gpio_button_data {
-+	int last_state;
-+	int count;
-+};
-+
-+struct gpio_buttons_dev {
-+	struct input_polled_dev *poll_dev;
-+	struct gpio_buttons_platform_data *pdata;
-+	struct gpio_button_data *data;
-+};
-+
-+static void gpio_buttons_poll(struct input_polled_dev *dev)
-+{
-+	struct gpio_buttons_dev *bdev = dev->private;
-+	struct gpio_buttons_platform_data *pdata = bdev->pdata;
-+	struct input_dev *input = dev->input;
-+	int i;
-+
-+	for (i = 0; i < bdev->pdata->nbuttons; i++) {
-+		struct gpio_button *button = &pdata->buttons[i];
-+		unsigned int type = button->type ?: EV_KEY;
-+		int state;
-+
-+		if (bdev->data[i].count < button->threshold) {
-+			bdev->data[i].count++;
-+			continue;
-+		}
-+
-+		state = gpio_get_value(button->gpio) ? 1 : 0;
-+		if (state != bdev->data[i].last_state) {
-+			input_event(input, type, button->code,
-+				    !!(state ^ button->active_low));
-+			input_sync(input);
-+			bdev->data[i].count = 0;
-+			bdev->data[i].last_state = state;
-+		}
-+	}
-+}
-+
-+static int __devinit gpio_buttons_probe(struct platform_device *pdev)
-+{
-+	struct gpio_buttons_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_buttons_dev *bdev;
-+	struct input_polled_dev *poll_dev;
-+	struct input_dev *input;
-+	int error, i;
-+
-+	if (!pdata)
-+		return -ENXIO;
-+
-+	bdev = kzalloc(sizeof(struct gpio_buttons_dev) +
-+		       sizeof(struct gpio_button_data) * pdata->nbuttons,
-+		       GFP_KERNEL);
-+	if (!bdev) {
-+		printk(KERN_ERR DRV_NAME "no memory for device\n");
-+		return -ENOMEM;
-+	}
-+
-+	bdev->data = (struct gpio_button_data *) &bdev[1];
-+
-+	poll_dev = input_allocate_polled_device();
-+	if (!poll_dev) {
-+		printk(KERN_ERR DRV_NAME "no memory for polled device\n");
-+		error = -ENOMEM;
-+		goto err_free_bdev;
-+	}
-+
-+	poll_dev->private = bdev;
-+	poll_dev->poll = gpio_buttons_poll;
-+	poll_dev->poll_interval = pdata->poll_interval;
-+
-+	input = poll_dev->input;
-+
-+	input->evbit[0] = BIT(EV_KEY);
-+	input->name = pdev->name;
-+	input->phys = "gpio-buttons/input0";
-+	input->dev.parent = &pdev->dev;
-+
-+	input->id.bustype = BUS_HOST;
-+	input->id.vendor = 0x0001;
-+	input->id.product = 0x0001;
-+	input->id.version = 0x0100;
-+
-+	for (i = 0; i < pdata->nbuttons; i++) {
-+		struct gpio_button *button = &pdata->buttons[i];
-+		unsigned int gpio = button->gpio;
-+		unsigned int type = button->type ?: EV_KEY;
-+
-+		error = gpio_request(gpio, button->desc ?
-+				button->desc : DRV_NAME);
-+		if (error) {
-+			printk(KERN_ERR PFX "unable to claim gpio %u, "
-+				"error %d\n", gpio, error);
-+			goto err_free_gpio;
-+		}
-+
-+		error = gpio_direction_input(gpio);
-+		if (error) {
-+			printk(KERN_ERR PFX "unable to set direction on "
-+				"gpio %u, error %d\n", gpio, error);
-+			goto err_free_gpio;
-+		}
-+
-+		input_set_capability(input, type, button->code);
-+		bdev->data[i].last_state = gpio_get_value(button->gpio) ? 1 : 0;
-+	}
-+
-+	bdev->poll_dev = poll_dev;
-+	bdev->pdata = pdata;
-+	platform_set_drvdata(pdev, bdev);
-+
-+	error = input_register_polled_device(poll_dev);
-+	if (error) {
-+		printk(KERN_ERR PFX "unable to register polled device, "
-+			"error %d\n", error);
-+		goto err_free_gpio;
-+	}
-+
-+	return 0;
-+
-+err_free_gpio:
-+	for (i = i - 1; i >= 0; i--)
-+		gpio_free(pdata->buttons[i].gpio);
-+
-+	input_free_polled_device(poll_dev);
-+
-+err_free_bdev:
-+	kfree(bdev);
-+
-+	platform_set_drvdata(pdev, NULL);
-+	return error;
-+}
-+
-+static int __devexit gpio_buttons_remove(struct platform_device *pdev)
-+{
-+	struct gpio_buttons_dev *bdev = platform_get_drvdata(pdev);
-+	struct gpio_buttons_platform_data *pdata = bdev->pdata;
-+	int i;
-+
-+	input_unregister_polled_device(bdev->poll_dev);
-+
-+	for (i = 0; i < pdata->nbuttons; i++)
-+		gpio_free(pdata->buttons[i].gpio);
-+
-+	input_free_polled_device(bdev->poll_dev);
-+
-+	kfree(bdev);
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver gpio_buttons_driver = {
-+	.probe	= gpio_buttons_probe,
-+	.remove	= __devexit_p(gpio_buttons_remove),
-+	.driver	= {
-+		.name	= DRV_NAME,
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init gpio_buttons_init(void)
-+{
-+	printk(KERN_INFO DRV_NAME " driver version " DRV_VERSION "\n");
-+	return platform_driver_register(&gpio_buttons_driver);
-+}
-+
-+static void __exit gpio_buttons_exit(void)
-+{
-+	platform_driver_unregister(&gpio_buttons_driver);
-+}
-+
-+module_init(gpio_buttons_init);
-+module_exit(gpio_buttons_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
-+MODULE_VERSION(DRV_VERSION);
-+MODULE_DESCRIPTION("Polled buttons driver for CPU GPIOs");
-+
 diff -Nur linux-2.6.39.orig/drivers/leds/leds-rb750.c linux-2.6.39/drivers/leds/leds-rb750.c
 --- linux-2.6.39.orig/drivers/leds/leds-rb750.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/leds/leds-rb750.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,140 @@
++++ linux-2.6.39/drivers/leds/leds-rb750.c	2011-04-27 12:19:22.267661616 +0200
+@@ -0,0 +1,141 @@
 +/*
 + * LED driver for the RouterBOARD 750
 + *
@@ -10466,6 +16238,7 @@ diff -Nur linux-2.6.39.orig/drivers/leds/leds-rb750.c linux-2.6.39/drivers/leds/
 +#include <linux/init.h>
 +#include <linux/platform_device.h>
 +#include <linux/leds.h>
++#include <linux/slab.h>
 +
 +#include <asm/mach-ar71xx/mach-rb750.h>
 +
@@ -10543,7 +16316,7 @@ diff -Nur linux-2.6.39.orig/drivers/leds/leds-rb750.c linux-2.6.39/drivers/leds/
 +	platform_set_drvdata(pdev, drvdata);
 +	return 0;
 +
-+ err:
++err:
 +	for (i = i - 1; i >= 0; i--)
 +		led_classdev_unregister(&drvdata->led_devs[i].cdev);
 +
@@ -10594,7 +16367,7 @@ diff -Nur linux-2.6.39.orig/drivers/leds/leds-rb750.c linux-2.6.39/drivers/leds/
 +MODULE_LICENSE("GPL v2");
 diff -Nur linux-2.6.39.orig/drivers/leds/leds-wndr3700-usb.c linux-2.6.39/drivers/leds/leds-wndr3700-usb.c
 --- linux-2.6.39.orig/drivers/leds/leds-wndr3700-usb.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/leds/leds-wndr3700-usb.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/leds/leds-wndr3700-usb.c	2011-04-27 12:19:22.267661616 +0200
 @@ -0,0 +1,75 @@
 +/*
 + *  USB LED driver for the NETGEAR WNDR3700
@@ -10671,37 +16444,84 @@ diff -Nur linux-2.6.39.orig/drivers/leds/leds-wndr3700-usb.c linux-2.6.39/driver
 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 +MODULE_LICENSE("GPL v2");
 +MODULE_ALIAS("platform:" DRIVER_NAME);
-diff -Nur linux-2.6.39.orig/drivers/mtd/maps/Kconfig linux-2.6.39/drivers/mtd/maps/Kconfig
---- linux-2.6.39.orig/drivers/mtd/maps/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/mtd/maps/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -260,6 +260,13 @@
- 	  Support for parsing CFE image tag and creating MTD partitions on
- 	  Broadcom BCM63xx boards.
+diff -Nur linux-2.6.39.orig/drivers/Makefile linux-2.6.39/drivers/Makefile
+--- linux-2.6.39.orig/drivers/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/Makefile	2011-08-23 15:10:42.370478643 +0200
+@@ -46,8 +46,8 @@
+ obj-$(CONFIG_SCSI)		+= scsi/
+ obj-$(CONFIG_ATA)		+= ata/
+ obj-$(CONFIG_TARGET_CORE)	+= target/
+-obj-$(CONFIG_MTD)		+= mtd/
+ obj-$(CONFIG_SPI)		+= spi/
++obj-$(CONFIG_MTD)		+= mtd/
+ obj-y				+= net/
+ obj-$(CONFIG_ATM)		+= atm/
+ obj-$(CONFIG_FUSION)		+= message/
+diff -Nur linux-2.6.39.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.6.39/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.39.orig/drivers/mtd/chips/cfi_cmdset_0002.c	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/mtd/chips/cfi_cmdset_0002.c	2011-08-22 16:22:28.477979654 +0200
+@@ -39,7 +39,7 @@
+ #include <linux/mtd/xip.h>
  
-+config MTD_AR91XX_FLASH
-+	tristate "Atheros AR91xx parallel flash support"
-+	depends on ATHEROS_AR71XX
-+	select MTD_COMPLEX_MAPPINGS
-+	help
-+	  Parallel flash driver for the Atheros AR91xx based boards.
-+
- config MTD_DILNETPC
- 	tristate "CFI Flash device mapped on DIL/Net PC"
- 	depends on X86 && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
-diff -Nur linux-2.6.39.orig/drivers/mtd/maps/Makefile linux-2.6.39/drivers/mtd/maps/Makefile
---- linux-2.6.39.orig/drivers/mtd/maps/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/mtd/maps/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -7,6 +7,7 @@
- endif
+ #define AMD_BOOTLOC_BUG
+-#define FORCE_WORD_WRITE 0
++#define FORCE_WORD_WRITE 1
  
- # Chip mappings
-+obj-$(CONFIG_MTD_AR91XX_FLASH)	+= ar91xx_flash.o
- obj-$(CONFIG_MTD_CDB89712)	+= cdb89712.o
- obj-$(CONFIG_MTD_ARM_INTEGRATOR)+= integrator-flash.o
- obj-$(CONFIG_MTD_CFI_FLAGADM)	+= cfi_flagadm.o
+ #define MAX_WORD_RETRIES 3
+ 
+@@ -50,7 +50,9 @@
+ 
+ static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
++#if !FORCE_WORD_WRITE
+ static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
++#endif
+ static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
+ static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
+ static void cfi_amdstd_sync (struct mtd_info *);
+@@ -186,6 +188,7 @@
+ }
+ #endif
+ 
++#if !FORCE_WORD_WRITE
+ static void fixup_use_write_buffers(struct mtd_info *mtd)
+ {
+ 	struct map_info *map = mtd->priv;
+@@ -195,6 +198,7 @@
+ 		mtd->write = cfi_amdstd_write_buffers;
+ 	}
+ }
++#endif /* !FORCE_WORD_WRITE */
+ 
+ /* Atmel chips don't use the same PRI format as AMD chips */
+ static void fixup_convert_atmel_pri(struct mtd_info *mtd)
+@@ -1377,6 +1381,7 @@
+ /*
+  * FIXME: interleaved mode not tested, and probably not supported!
+  */
++#if !FORCE_WORD_WRITE
+ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
+ 				    unsigned long adr, const u_char *buf,
+ 				    int len)
+@@ -1487,7 +1492,6 @@
+ 	return ret;
+ }
+ 
+-
+ static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
+ 				    size_t *retlen, const u_char *buf)
+ {
+@@ -1566,6 +1570,7 @@
+ 
+ 	return 0;
+ }
++#endif /* !FORCE_WORD_WRITE */
+ 
+ 
+ /*
 diff -Nur linux-2.6.39.orig/drivers/mtd/maps/ar91xx_flash.c linux-2.6.39/drivers/mtd/maps/ar91xx_flash.c
 --- linux-2.6.39.orig/drivers/mtd/maps/ar91xx_flash.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/mtd/maps/ar91xx_flash.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/mtd/maps/ar91xx_flash.c	2011-04-27 12:19:22.177661504 +0200
 @@ -0,0 +1,310 @@
 +/*
 + * Parallel flash driver for the Atheros AR91xx SoC
@@ -10932,7 +16752,7 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/maps/ar91xx_flash.c linux-2.6.39/drivers
 +	add_mtd_device(info->mtd);
 +	return 0;
 +
-+ err_out:
++err_out:
 +	ar91xx_flash_remove(pdev);
 +	return err;
 +}
@@ -10951,7 +16771,7 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/maps/ar91xx_flash.c linux-2.6.39/drivers
 +
 +	return 0;
 +
-+ fail:
++fail:
 +	if (info->mtd->suspend) {
 +		BUG_ON(!info->mtd->resume);
 +		info->mtd->resume(info->mtd);
@@ -11013,21 +16833,50 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/maps/ar91xx_flash.c linux-2.6.39/drivers
 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 +MODULE_DESCRIPTION("Parallel flash driver for the Atheros AR91xx SoC");
 +MODULE_ALIAS("platform:" DRV_NAME);
+diff -Nur linux-2.6.39.orig/drivers/mtd/maps/Kconfig linux-2.6.39/drivers/mtd/maps/Kconfig
+--- linux-2.6.39.orig/drivers/mtd/maps/Kconfig	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/mtd/maps/Kconfig	2011-08-22 16:22:06.367979538 +0200
+@@ -260,6 +260,13 @@
+ 	  Support for parsing CFE image tag and creating MTD partitions on
+ 	  Broadcom BCM63xx boards.
+ 
++config MTD_AR91XX_FLASH
++	tristate "Atheros AR91xx parallel flash support"
++	depends on ATHEROS_AR71XX
++	select MTD_COMPLEX_MAPPINGS
++	help
++	  Parallel flash driver for the Atheros AR91xx based boards.
++
+ config MTD_DILNETPC
+ 	tristate "CFI Flash device mapped on DIL/Net PC"
+ 	depends on X86 && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN
+diff -Nur linux-2.6.39.orig/drivers/mtd/maps/Makefile linux-2.6.39/drivers/mtd/maps/Makefile
+--- linux-2.6.39.orig/drivers/mtd/maps/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/mtd/maps/Makefile	2011-08-22 16:22:06.387979567 +0200
+@@ -40,6 +40,7 @@
+ obj-$(CONFIG_MTD_DBOX2)		+= dbox2-flash.o
+ obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
+ obj-$(CONFIG_MTD_PCI)		+= pci.o
++obj-$(CONFIG_MTD_AR91XX_FLASH)	+= ar91xx_flash.o
+ obj-$(CONFIG_MTD_AUTCPU12)	+= autcpu12-nvram.o
+ obj-$(CONFIG_MTD_EDB7312)	+= edb7312.o
+ obj-$(CONFIG_MTD_IMPA7)		+= impa7.o
 diff -Nur linux-2.6.39.orig/drivers/mtd/nand/Kconfig linux-2.6.39/drivers/mtd/nand/Kconfig
 --- linux-2.6.39.orig/drivers/mtd/nand/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/mtd/nand/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -531,4 +531,8 @@
++++ linux-2.6.39/drivers/mtd/nand/Kconfig	2011-08-23 14:22:33.407989933 +0200
+@@ -531,4 +531,9 @@
  	  Enables support for NAND Flash chips on the ST Microelectronics
  	  Flexible Static Memory Controller (FSMC)
  
 +config MTD_NAND_RB4XX
 +	tristate "NAND flash driver for RouterBoard 4xx series"
 +	depends on MTD_NAND && AR71XX_MACH_RB4XX
++	select SPI_AR71XX
 +
  endif # MTD_NAND
 diff -Nur linux-2.6.39.orig/drivers/mtd/nand/Makefile linux-2.6.39/drivers/mtd/nand/Makefile
 --- linux-2.6.39.orig/drivers/mtd/nand/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/mtd/nand/Makefile	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/mtd/nand/Makefile	2011-08-22 16:22:41.217981942 +0200
 @@ -34,6 +34,7 @@
  obj-$(CONFIG_MTD_NAND_PXA3xx)		+= pxa3xx_nand.o
  obj-$(CONFIG_MTD_NAND_TMIO)		+= tmio_nand.o
@@ -11038,12 +16887,12 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/Makefile linux-2.6.39/drivers/mtd/n
  obj-$(CONFIG_MTD_NAND_ORION)		+= orion_nand.o
 diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/mtd/nand/rb4xx_nand.c
 --- linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/mtd/nand/rb4xx_nand.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,513 @@
++++ linux-2.6.39/drivers/mtd/nand/rb4xx_nand.c	2011-08-23 11:36:58.637983055 +0200
+@@ -0,0 +1,311 @@
 +/*
 + *  NAND flash driver for the MikroTik RouterBoard 4xx series
 + *
-+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
 + *  This file was based on the driver for Linux 2.6.22 published by
@@ -11065,49 +16914,16 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/m
 +#include <linux/slab.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/rb4xx_cpld.h>
 +
 +#define DRV_NAME        "rb4xx-nand"
-+#define DRV_VERSION     "0.1.10"
++#define DRV_VERSION     "0.2.0"
 +#define DRV_DESC        "NAND flash driver for RouterBoard 4xx series"
 +
-+#define USE_FAST_READ	1
-+#define USE_FAST_WRITE	1
-+#undef RB4XX_NAND_DEBUG
-+
-+#ifdef RB4XX_NAND_DEBUG
-+#define DBG(fmt, arg...)	printk(KERN_DEBUG DRV_NAME ": " fmt, ## arg)
-+#else
-+#define DBG(fmt, arg...)	do {} while (0)
-+#endif
-+
-+#define RB4XX_NAND_GPIO_RDY	5
-+#define RB4XX_FLASH_HZ		33333334
-+#define RB4XX_NAND_HZ		33333334
-+
-+#define SPI_CTRL_FASTEST	0x40
-+#define SPI_CTRL_SAFE		0x43	/* 25 MHz for AHB 200 MHz */
-+#define SBIT_IOC_BASE		SPI_IOC_CS1
-+#define SBIT_IOC_DO_SHIFT	0
-+#define SBIT_IOC_DO		(1u << SBIT_IOC_DO_SHIFT)
-+#define SBIT_IOC_DO2_SHIFT	18
-+#define SBIT_IOC_DO2		(1u << SBIT_IOC_DO2_SHIFT)
-+
-+#define CPLD_CMD_WRITE_MULT	0x08	/* send cmd, n x send data, read data */
-+#define CPLD_CMD_WRITE_CFG	0x09	/* send cmd, n x send cfg */
-+#define CPLD_CMD_READ_MULT	0x0a	/* send cmd, send idle, n x read data */
-+#define CPLD_CMD_READ_FAST	0x0b	/* send cmd, 4 x idle, n x read data */
-+
-+#define CFG_BIT_nCE	0x80
-+#define CFG_BIT_CLE	0x40
-+#define CFG_BIT_ALE	0x20
-+#define CFG_BIT_FAN	0x10
-+#define CFG_BIT_nLED4	0x08
-+#define CFG_BIT_nLED3	0x04
-+#define CFG_BIT_nLED2	0x02
-+#define CFG_BIT_nLED1	0x01
-+
-+#define CFG_BIT_nLEDS \
-+	(CFG_BIT_nLED1 | CFG_BIT_nLED2 | CFG_BIT_nLED3 | CFG_BIT_nLED4)
++#define RB4XX_NAND_GPIO_READY	5
++#define RB4XX_NAND_GPIO_ALE	37
++#define RB4XX_NAND_GPIO_CLE	38
++#define RB4XX_NAND_GPIO_NCE	39
 +
 +struct rb4xx_nand_info {
 +	struct nand_chip	chip;
@@ -11135,332 +16951,150 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/m
 +	{
 +		.name	= "kernel",
 +		.offset	= (256 * 1024),
-+		.size	= (4 * 1024 * 1024) - (256 * 1024),
++		.size	= (6 * 1024 * 1024) - (256 * 1024),
 +	},
 +	{
 +		.name	= "rootfs",
 +		.offset	= MTDPART_OFS_NXTBLK,
-+		.size	= (1024*1024*64) - (1024*256) - (4 * 1024 * 1024)
-+	},
-+	{
-+		.name	= "cfgfs",
-+		.offset	= (1024*1024*64) - (1024*256),
-+		.size	= (1024*256),
++		.size	= MTDPART_SIZ_FULL,
 +	},
 +};
 +
-+#if USE_FAST_READ
-+#define SPI_NDATA_BASE	0x00800000
-+static unsigned spi_ctrl_fread = SPI_CTRL_SAFE;
-+static unsigned spi_ctrl_flash = SPI_CTRL_SAFE;
-+extern unsigned mips_hpt_frequency;
-+#endif
-+
-+static inline unsigned rb4xx_spi_rreg(unsigned r)
-+{
-+	return __raw_readl((void * __iomem)(KSEG1ADDR(AR71XX_SPI_BASE) + r));
-+}
-+
-+static inline void rb4xx_spi_wreg(unsigned r, unsigned v)
-+{
-+	__raw_writel(v, (void * __iomem)(KSEG1ADDR(AR71XX_SPI_BASE) + r));
-+}
-+
-+static inline void do_spi_clk(int bit)
-+{
-+	unsigned bval = SBIT_IOC_BASE | (bit & 1);
-+
-+	rb4xx_spi_wreg(SPI_REG_IOC, bval);
-+	rb4xx_spi_wreg(SPI_REG_IOC, bval | SPI_IOC_CLK);
-+}
-+
-+static void do_spi_byte(uint8_t byte)
++static int rb4xx_nand_dev_ready(struct mtd_info *mtd)
 +{
-+	do_spi_clk(byte >> 7);
-+	do_spi_clk(byte >> 6);
-+	do_spi_clk(byte >> 5);
-+	do_spi_clk(byte >> 4);
-+	do_spi_clk(byte >> 3);
-+	do_spi_clk(byte >> 2);
-+	do_spi_clk(byte >> 1);
-+	do_spi_clk(byte);
-+
-+	DBG("spi_byte sent 0x%02x got 0x%x\n",
-+					byte, rb4xx_spi_rreg(SPI_REG_RDS));
++	return gpio_get_value_cansleep(RB4XX_NAND_GPIO_READY);
 +}
 +
-+#if USE_FAST_WRITE
-+static inline void do_spi_clk_fast(int bit1, int bit2)
++static void rb4xx_nand_write_cmd(unsigned char cmd)
 +{
-+	unsigned bval = (SBIT_IOC_BASE |
-+			((bit1 << SBIT_IOC_DO_SHIFT) & SBIT_IOC_DO) |
-+			((bit2 << SBIT_IOC_DO2_SHIFT) & SBIT_IOC_DO2));
++	unsigned char data = cmd;
++	int err;
 +
-+	rb4xx_spi_wreg(SPI_REG_IOC, bval);
-+	rb4xx_spi_wreg(SPI_REG_IOC, bval | SPI_IOC_CLK);
++	err = rb4xx_cpld_write(&data, 1);
++	if (err)
++		pr_err("rb4xx_nand: write cmd failed, err=%d\n", err);
 +}
 +
-+static inline void do_spi_byte_fast(uint8_t byte)
++static void rb4xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
++				unsigned int ctrl)
 +{
-+	do_spi_clk_fast(byte >> 7, byte >> 6);
-+	do_spi_clk_fast(byte >> 5, byte >> 4);
-+	do_spi_clk_fast(byte >> 3, byte >> 2);
-+	do_spi_clk_fast(byte >> 1, byte >> 0);
++	if (ctrl & NAND_CTRL_CHANGE) {
++		gpio_set_value_cansleep(RB4XX_NAND_GPIO_CLE,
++					(ctrl & NAND_CLE) ? 1 : 0);
++		gpio_set_value_cansleep(RB4XX_NAND_GPIO_ALE,
++					(ctrl & NAND_ALE) ? 1 : 0);
++		gpio_set_value_cansleep(RB4XX_NAND_GPIO_NCE,
++					(ctrl & NAND_NCE) ? 0 : 1);
++	}
 +
-+	DBG("spi_byte_fast sent 0x%02x got 0x%x\n",
-+					byte, rb4xx_spi_rreg(SPI_REG_RDS));
-+}
-+#else
-+static inline void do_spi_byte_fast(uint8_t byte)
-+{
-+	do_spi_byte(byte);
++	if (cmd != NAND_CMD_NONE)
++		rb4xx_nand_write_cmd(cmd);
 +}
-+#endif /* USE_FAST_WRITE */
 +
-+static int do_spi_cmd(unsigned cmd, unsigned sendCnt, const uint8_t *sendData,
-+		unsigned recvCnt, uint8_t *recvData,
-+		const uint8_t *verifyData, int fastWrite)
++static unsigned char rb4xx_nand_read_byte(struct mtd_info *mtd)
 +{
-+	unsigned i;
-+
-+	DBG("SPI cmd 0x%x send %u recv %u\n", cmd, sendCnt, recvCnt);
-+
-+	rb4xx_spi_wreg(SPI_REG_FS, SPI_FS_GPIO);
-+	rb4xx_spi_wreg(SPI_REG_CTRL, SPI_CTRL_FASTEST);
-+
-+	do_spi_byte(cmd);
-+#if 0
-+	if (cmd == CPLD_CMD_READ_FAST) {
-+		do_spi_byte(0x80);
-+		do_spi_byte(0);
-+		do_spi_byte(0);
-+	}
-+#endif
-+	for (i = 0; i < sendCnt; ++i) {
-+		if (fastWrite)
-+			do_spi_byte_fast(sendData[i]);
-+		else
-+			do_spi_byte(sendData[i]);
-+	}
-+
-+	for (i = 0; i < recvCnt; ++i) {
-+		if (fastWrite)
-+			do_spi_byte_fast(0);
-+		else
-+			do_spi_byte(0);
++	unsigned char data = 0;
++	int err;
 +
-+		if (recvData) {
-+			recvData[i] = rb4xx_spi_rreg(SPI_REG_RDS) & 0xff;
-+		} else if (verifyData) {
-+			if (verifyData[i] != (rb4xx_spi_rreg(SPI_REG_RDS)
-+							 & 0xff))
-+				break;
-+		}
++	err = rb4xx_cpld_read(&data, NULL, 1);
++	if (err) {
++		pr_err("rb4xx_nand: read data failed, err=%d\n", err);
++		data = 0xff;
 +	}
 +
-+	rb4xx_spi_wreg(SPI_REG_IOC, SBIT_IOC_BASE | SPI_IOC_CS0);
-+	rb4xx_spi_wreg(SPI_REG_CTRL, spi_ctrl_flash);
-+	rb4xx_spi_wreg(SPI_REG_FS, 0);
-+
-+	return i == recvCnt;
++	return data;
 +}
 +
-+static int got_write = 1;
-+
-+static void rb4xx_nand_write_data(const uint8_t *byte, unsigned cnt)
++static void rb4xx_nand_write_buf(struct mtd_info *mtd, const unsigned char *buf,
++				 int len)
 +{
-+	do_spi_cmd(CPLD_CMD_WRITE_MULT, cnt, byte, 1, NULL, NULL, 1);
-+	got_write = 1;
-+}
++	int err;
 +
-+static void rb4xx_nand_write_byte(uint8_t byte)
-+{
-+	rb4xx_nand_write_data(&byte, 1);
++	err = rb4xx_cpld_write(buf, len);
++	if (err)
++		pr_err("rb4xx_nand: write buf failed, err=%d\n", err);
 +}
 +
-+#if USE_FAST_READ
-+static uint8_t *rb4xx_nand_read_getaddr(unsigned cnt)
++static void rb4xx_nand_read_buf(struct mtd_info *mtd, unsigned char *buf,
++				int len)
 +{
-+	static unsigned nboffset = 0x100000;
-+	unsigned addr;
-+
-+	if (got_write) {
-+		nboffset = (nboffset + 31) & ~31;
-+		if (nboffset >= 0x100000)	/* 1MB */
-+			nboffset = 0;
-+
-+		got_write = 0;
-+		rb4xx_spi_wreg(SPI_REG_FS, SPI_FS_GPIO);
-+		rb4xx_spi_wreg(SPI_REG_CTRL, spi_ctrl_fread);
-+		rb4xx_spi_wreg(SPI_REG_FS, 0);
-+	}
-+
-+	addr = KSEG1ADDR(AR71XX_SPI_BASE + SPI_NDATA_BASE) + nboffset;
-+	DBG("rb4xx_nand_read_getaddr 0x%x cnt 0x%x\n", addr, cnt);
++	int err;
 +
-+	nboffset += cnt;
-+	return (uint8_t *)addr;
++	err = rb4xx_cpld_read(buf, NULL, len);
++	if (err)
++		pr_err("rb4xx_nand: read buf failed, err=%d\n", err);
 +}
 +
-+static void rb4xx_nand_read_data(uint8_t *buf, unsigned cnt)
++static int __init rb4xx_nand_probe(struct platform_device *pdev)
 +{
-+	unsigned size32 = cnt & ~31;
-+	unsigned remain = cnt & 31;
++	struct rb4xx_nand_info	*info;
++	int ret;
 +
-+	if (size32) {
-+		uint8_t *addr = rb4xx_nand_read_getaddr(size32);
-+		memcpy(buf, (void *)addr, size32);
-+	}
++	printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
 +
-+	if (remain) {
-+		do_spi_cmd(CPLD_CMD_READ_MULT, 1, buf, remain,
-+			   buf + size32, NULL, 0);
++	ret = gpio_request(RB4XX_NAND_GPIO_READY, "NAND RDY");
++	if (ret) {
++		dev_err(&pdev->dev, "unable to request gpio %d\n",
++			RB4XX_NAND_GPIO_READY);
++		goto err;
 +	}
-+}
 +
-+static int rb4xx_nand_verify_data(const uint8_t *buf, unsigned cnt)
-+{
-+	unsigned size32 = cnt & ~31;
-+	unsigned remain = cnt & 31;
-+
-+	if (size32) {
-+		uint8_t *addr = rb4xx_nand_read_getaddr(size32);
-+		if (memcmp(buf, (void *)addr, size32) != 0)
-+			return 0;
++	ret = gpio_direction_input(RB4XX_NAND_GPIO_READY);
++	if (ret) {
++		dev_err(&pdev->dev, "unable to set input mode on gpio %d\n",
++			RB4XX_NAND_GPIO_READY);
++		goto err_free_gpio_ready;
 +	}
 +
-+	if (remain) {
-+		return do_spi_cmd(CPLD_CMD_READ_MULT, 1, buf, remain,
-+				  NULL, buf + size32, 0);
++	ret = gpio_request(RB4XX_NAND_GPIO_ALE, "NAND ALE");
++	if (ret) {
++		dev_err(&pdev->dev, "unable to request gpio %d\n",
++			RB4XX_NAND_GPIO_ALE);
++		goto err_free_gpio_ready;
 +	}
-+	return 1;
-+}
-+#else /* USE_FAST_READ */
-+static void rb4xx_nand_read_data(uint8_t *buf, unsigned cnt)
-+{
-+	do_spi_cmd(CPLD_CMD_READ_MULT, 1, buf, cnt, buf, NULL, 0);
-+}
-+
-+static int rb4xx_nand_verify_data(const uint8_t *buf, unsigned cnt)
-+{
-+	return do_spi_cmd(CPLD_CMD_READ_MULT, 1, buf, cnt, NULL, buf, 0);
-+}
-+#endif /* USE_FAST_READ */
-+
-+static void rb4xx_nand_write_cfg(uint8_t byte)
-+{
-+	do_spi_cmd(CPLD_CMD_WRITE_CFG, 1, &byte, 0, NULL, NULL, 0);
-+	got_write = 1;
-+}
-+
-+static int rb4xx_nand_dev_ready(struct mtd_info *mtd)
-+{
-+	return gpio_get_value(RB4XX_NAND_GPIO_RDY);
-+}
 +
-+static void rb4xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
-+				unsigned int ctrl)
-+{
-+	if (ctrl & NAND_CTRL_CHANGE) {
-+		uint8_t cfg = CFG_BIT_nLEDS;
-+
-+		cfg |= (ctrl & NAND_CLE) ? CFG_BIT_CLE : 0;
-+		cfg |= (ctrl & NAND_ALE) ? CFG_BIT_ALE : 0;
-+		cfg |= (ctrl & NAND_NCE) ? 0 : CFG_BIT_nCE;
-+
-+		rb4xx_nand_write_cfg(cfg);
++	ret = gpio_direction_output(RB4XX_NAND_GPIO_ALE, 0);
++	if (ret) {
++		dev_err(&pdev->dev, "unable to set output mode on gpio %d\n",
++			RB4XX_NAND_GPIO_ALE);
++		goto err_free_gpio_ale;
 +	}
 +
-+	if (cmd != NAND_CMD_NONE)
-+		rb4xx_nand_write_byte(cmd);
-+}
-+
-+static uint8_t rb4xx_nand_read_byte(struct mtd_info *mtd)
-+{
-+	uint8_t byte = 0;
-+
-+	rb4xx_nand_read_data(&byte, 1);
-+	return byte;
-+}
-+
-+static void rb4xx_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
-+				int len)
-+{
-+	rb4xx_nand_write_data(buf, len);
-+}
-+
-+static void rb4xx_nand_read_buf(struct mtd_info *mtd, uint8_t *buf,
-+				int len)
-+{
-+	rb4xx_nand_read_data(buf, len);
-+}
-+
-+static int rb4xx_nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf,
-+				int len)
-+{
-+	if (!rb4xx_nand_verify_data(buf, len))
-+		return -EFAULT;
-+
-+	return 0;
-+}
-+
-+static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
-+{
-+	unsigned div;
-+
-+	div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
-+	/*
-+	 * CPU has a bug at (div == 0) - first bit read is random
-+	 */
-+	if (div == 0)
-+		++div;
-+
-+	if (name) {
-+		unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
-+		unsigned div_real = 2 * (div + 1);
-+		printk(KERN_INFO "%s SPI clock %u kHz (AHB %u kHz / %u)\n",
-+		       name,
-+		       ahb_khz / div_real,
-+		       ahb_khz, div_real);
++	ret = gpio_request(RB4XX_NAND_GPIO_CLE, "NAND CLE");
++	if (ret) {
++		dev_err(&pdev->dev, "unable to request gpio %d\n",
++			RB4XX_NAND_GPIO_CLE);
++		goto err_free_gpio_ale;
 +	}
 +
-+	return SPI_CTRL_FASTEST + div;
-+}
-+
-+static int __init rb4xx_nand_probe(struct platform_device *pdev)
-+{
-+	struct rb4xx_nand_info	*info;
-+	int ret;
-+
-+	printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
++	ret = gpio_direction_output(RB4XX_NAND_GPIO_CLE, 0);
++	if (ret) {
++		dev_err(&pdev->dev, "unable to set output mode on gpio %d\n",
++			RB4XX_NAND_GPIO_CLE);
++		goto err_free_gpio_cle;
++	}
 +
-+	ret = gpio_request(RB4XX_NAND_GPIO_RDY, "NAND RDY");
++	ret = gpio_request(RB4XX_NAND_GPIO_NCE, "NAND NCE");
 +	if (ret) {
-+		printk(KERN_ERR "rb4xx-nand: gpio request failed\n");
-+		return ret;
++		dev_err(&pdev->dev, "unable to request gpio %d\n",
++			RB4XX_NAND_GPIO_NCE);
++		goto err_free_gpio_cle;
 +	}
 +
-+	ret = gpio_direction_input(RB4XX_NAND_GPIO_RDY);
++	ret = gpio_direction_output(RB4XX_NAND_GPIO_NCE, 1);
 +	if (ret) {
-+		printk(KERN_ERR "rb4xx-nand: unable to set input mode "
-+					"on gpio%d\n", RB4XX_NAND_GPIO_RDY);
-+		goto err_free_gpio;
++		dev_err(&pdev->dev, "unable to set output mode on gpio %d\n",
++			RB4XX_NAND_GPIO_ALE);
++		goto err_free_gpio_nce;
 +	}
 +
 +	info = kzalloc(sizeof(*info), GFP_KERNEL);
 +	if (!info) {
-+		printk(KERN_ERR "rb4xx-nand: no memory for private data\n");
++		dev_err(&pdev->dev, "rb4xx-nand: no memory for private data\n");
 +		ret = -ENOMEM;
-+		goto err_free_gpio;
++		goto err_free_gpio_nce;
 +	}
 +
-+#if USE_FAST_READ
-+	spi_ctrl_fread = get_spi_ctrl(RB4XX_NAND_HZ, "NAND");
-+#endif
-+	spi_ctrl_flash = get_spi_ctrl(RB4XX_FLASH_HZ, "FLASH");
-+
-+	rb4xx_nand_write_cfg(CFG_BIT_nLEDS | CFG_BIT_nCE);
-+
 +	info->chip.priv	= &info;
 +	info->mtd.priv	= &info->chip;
 +	info->mtd.owner	= THIS_MODULE;
@@ -11470,7 +17104,9 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/m
 +	info->chip.read_byte	= rb4xx_nand_read_byte;
 +	info->chip.write_buf	= rb4xx_nand_write_buf;
 +	info->chip.read_buf	= rb4xx_nand_read_buf;
++#if 0
 +	info->chip.verify_buf	= rb4xx_nand_verify_buf;
++#endif
 +
 +	info->chip.chip_delay	= 25;
 +	info->chip.ecc.mode	= NAND_ECC_SOFT;
@@ -11510,8 +17146,15 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/m
 +	platform_set_drvdata(pdev, NULL);
 +err_free_info:
 +	kfree(info);
-+err_free_gpio:
-+	gpio_free(RB4XX_NAND_GPIO_RDY);
++err_free_gpio_nce:
++	gpio_free(RB4XX_NAND_GPIO_NCE);
++err_free_gpio_cle:
++	gpio_free(RB4XX_NAND_GPIO_CLE);
++err_free_gpio_ale:
++	gpio_free(RB4XX_NAND_GPIO_ALE);
++err_free_gpio_ready:
++	gpio_free(RB4XX_NAND_GPIO_READY);
++err:
 +	return ret;
 +}
 +
@@ -11522,6 +17165,10 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/m
 +	nand_release(&info->mtd);
 +	platform_set_drvdata(pdev, NULL);
 +	kfree(info);
++	gpio_free(RB4XX_NAND_GPIO_NCE);
++	gpio_free(RB4XX_NAND_GPIO_CLE);
++	gpio_free(RB4XX_NAND_GPIO_ALE);
++	gpio_free(RB4XX_NAND_GPIO_READY);
 +
 +	return 0;
 +}
@@ -11555,8 +17202,8 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb4xx_nand.c linux-2.6.39/drivers/m
 +MODULE_LICENSE("GPL v2");
 diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb750_nand.c linux-2.6.39/drivers/mtd/nand/rb750_nand.c
 --- linux-2.6.39.orig/drivers/mtd/nand/rb750_nand.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/mtd/nand/rb750_nand.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,360 @@
++++ linux-2.6.39/drivers/mtd/nand/rb750_nand.c	2011-04-27 12:19:22.177661504 +0200
+@@ -0,0 +1,361 @@
 +/*
 + *  NAND flash driver for the MikroTik RouterBOARD 750
 + *
@@ -11573,6 +17220,7 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb750_nand.c linux-2.6.39/drivers/m
 +#include <linux/mtd/partitions.h>
 +#include <linux/platform_device.h>
 +#include <linux/io.h>
++#include <linux/slab.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +#include <asm/mach-ar71xx/mach-rb750.h>
@@ -11871,11 +17519,11 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb750_nand.c linux-2.6.39/drivers/m
 +
 +	return 0;
 +
-+ err_release_nand:
++err_release_nand:
 +	nand_release(&info->mtd);
-+ err_set_drvdata:
++err_set_drvdata:
 +	platform_set_drvdata(pdev, NULL);
-+ err_free_info:
++err_free_info:
 +	kfree(info);
 +	return ret;
 +}
@@ -11919,8 +17567,8 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/nand/rb750_nand.c linux-2.6.39/drivers/m
 +MODULE_LICENSE("GPL v2");
 diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd/wrt160nl_part.c
 --- linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/mtd/wrt160nl_part.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,181 @@
++++ linux-2.6.39/drivers/mtd/wrt160nl_part.c	2011-08-06 09:32:37.138017083 +0200
+@@ -0,0 +1,190 @@
 +/*
 + * Copyright (C) 2009 Christian Daniel <cd@maintech.de>
 + * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
@@ -12001,6 +17649,10 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd
 +
 +static struct mtd_partition trx_parts[TRX_PARTS];
 +
++#define WRT160NL_UBOOT_LEN	0x40000
++#define WRT160NL_ART_LEN	0x10000
++#define WRT160NL_NVRAM_LEN	0x10000
++
 +static int wrt160nl_parse_partitions(struct mtd_info *master,
 +				     struct mtd_partition **pparts,
 +				     unsigned long origin)
@@ -12010,6 +17662,9 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd
 +	struct uimage_header *uheader;
 +	size_t retlen;
 +	unsigned int kernel_len;
++	unsigned int uboot_len = max(master->erasesize, WRT160NL_UBOOT_LEN);
++	unsigned int nvram_len = max(master->erasesize, WRT160NL_NVRAM_LEN);
++	unsigned int art_len = max(master->erasesize, WRT160NL_ART_LEN);
 +	int ret;
 +
 +	header = vmalloc(sizeof(*header));
@@ -12018,7 +17673,7 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd
 +		goto out;
 +	}
 +
-+	ret = master->read(master, 4 * master->erasesize, sizeof(*header),
++	ret = master->read(master, uboot_len, sizeof(*header),
 +			   &retlen, (void *) header);
 +	if (ret)
 +		goto free_hdr;
@@ -12046,11 +17701,12 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd
 +		goto free_hdr;
 +	}
 +
-+	kernel_len = le32_to_cpu(theader->offsets[1]) + sizeof(struct cybertan_header);
++	kernel_len = le32_to_cpu(theader->offsets[1]) +
++		sizeof(struct cybertan_header);
 +
 +	trx_parts[0].name = "u-boot";
 +	trx_parts[0].offset = 0;
-+	trx_parts[0].size = 4 * master->erasesize;
++	trx_parts[0].size = uboot_len;
 +	trx_parts[0].mask_flags = MTD_WRITEABLE;
 +
 +	trx_parts[1].name = "kernel";
@@ -12060,30 +17716,31 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd
 +
 +	trx_parts[2].name = "rootfs";
 +	trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size;
-+	trx_parts[2].size = master->size - 6 * master->erasesize - trx_parts[1].size;
++	trx_parts[2].size = master->size - uboot_len - nvram_len - art_len -
++		trx_parts[1].size;
 +	trx_parts[2].mask_flags = 0;
 +
 +	trx_parts[3].name = "nvram";
-+	trx_parts[3].offset = master->size - 2 * master->erasesize;
-+	trx_parts[3].size = master->erasesize;
++	trx_parts[3].offset = master->size - nvram_len - art_len;
++	trx_parts[3].size = nvram_len;
 +	trx_parts[3].mask_flags = MTD_WRITEABLE;
 +
 +	trx_parts[4].name = "art";
-+	trx_parts[4].offset = master->size - master->erasesize;
-+	trx_parts[4].size = master->erasesize;
++	trx_parts[4].offset = master->size - art_len;
++	trx_parts[4].size = art_len;
 +	trx_parts[4].mask_flags = MTD_WRITEABLE;
 +
 +	trx_parts[5].name = "firmware";
-+	trx_parts[5].offset = 4 * master->erasesize;
-+	trx_parts[5].size = master->size - 6 * master->erasesize;
++	trx_parts[5].offset = uboot_len;
++	trx_parts[5].size = master->size - uboot_len - nvram_len - art_len;
 +	trx_parts[5].mask_flags = 0;
 +
 +	*pparts = trx_parts;
 +	ret = TRX_PARTS;
 +
-+ free_hdr:
++free_hdr:
 +	vfree(header);
-+ out:
++out:
 +	return ret;
 +}
 +
@@ -12102,88 +17759,1387 @@ diff -Nur linux-2.6.39.orig/drivers/mtd/wrt160nl_part.c linux-2.6.39/drivers/mtd
 +
 +MODULE_LICENSE("GPL");
 +MODULE_AUTHOR("Christian Daniel <cd@maintech.de>");
-diff -Nur linux-2.6.39.orig/drivers/net/Kconfig linux-2.6.39/drivers/net/Kconfig
---- linux-2.6.39.orig/drivers/net/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -2071,6 +2071,8 @@
- 
- 	  The safe and default value for this is N.
- 
-+source drivers/net/ag71xx/Kconfig
+diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ar7240.c linux-2.6.39/drivers/net/ag71xx/ag71xx_ar7240.c
+--- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ar7240.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_ar7240.c	2011-08-06 09:32:37.298018216 +0200
+@@ -0,0 +1,913 @@
++/*
++ *  Driver for the built-in ethernet switch of the Atheros AR7240 SoC
++ *  Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (c) 2010 Felix Fietkau <nbd@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ *
++ */
 +
- config DL2K
- 	tristate "DL2000/TC902x-based Gigabit Ethernet support"
- 	depends on PCI
-diff -Nur linux-2.6.39.orig/drivers/net/Makefile linux-2.6.39/drivers/net/Makefile
---- linux-2.6.39.orig/drivers/net/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -112,6 +112,7 @@
- # end link order section
- #
- 
-+obj-$(CONFIG_AG71XX) += ag71xx/
- obj-$(CONFIG_SUNDANCE) += sundance.o
- obj-$(CONFIG_HAMACHI) += hamachi.o
- obj-$(CONFIG_NET) += Space.o loopback.o
-diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/Kconfig linux-2.6.39/drivers/net/ag71xx/Kconfig
---- linux-2.6.39.orig/drivers/net/ag71xx/Kconfig	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,33 @@
-+config AG71XX
-+	tristate "Atheros AR71xx built-in ethernet mac support"
-+	depends on ATHEROS_AR71XX
-+	select PHYLIB
-+	help
-+	  If you wish to compile a kernel for AR71xx/91xx and enable
-+	  ethernet support, then you should always answer Y to this.
++#include <linux/etherdevice.h>
++#include <linux/list.h>
++#include <linux/netdevice.h>
++#include <linux/phy.h>
++#include <linux/mii.h>
++#include <linux/bitops.h>
++#include <linux/switch.h>
++#include "ag71xx.h"
 +
-+if AG71XX
++#define BITM(_count)	(BIT(_count) - 1)
++#define BITS(_shift, _count)	(BITM(_count) << _shift)
 +
-+config AG71XX_DEBUG
-+	bool "Atheros AR71xx built-in ethernet driver debugging"
-+	default n
-+	help
-+	  Atheros AR71xx built-in ethernet driver debugging messages.
++#define AR7240_REG_MASK_CTRL		0x00
++#define AR7240_MASK_CTRL_REVISION_M	BITM(8)
++#define AR7240_MASK_CTRL_VERSION_M	BITM(8)
++#define AR7240_MASK_CTRL_VERSION_S	8
++#define AR7240_MASK_CTRL_SOFT_RESET	BIT(31)
 +
-+config AG71XX_DEBUG_FS
-+	bool "Atheros AR71xx built-in ethernet driver debugfs support"
-+	depends on DEBUG_FS
-+	default n
-+	help
-+	  Say Y, if you need access to various statistics provided by
-+	  the ag71xx driver.
++#define AR7240_REG_MAC_ADDR0		0x20
++#define AR7240_REG_MAC_ADDR1		0x24
 +
-+config AG71XX_AR8216_SUPPORT
-+	bool "special support for the Atheros AR8216 switch"
-+	default n
-+	default y if AR71XX_MACH_WNR2000 || AR71XX_MACH_MZK_W04NU
-+	help
-+	  Say 'y' here if you want to enable special support for the
-+	  Atheros AR8216 switch found on some boards.
++#define AR7240_REG_FLOOD_MASK		0x2c
++#define AR7240_FLOOD_MASK_BROAD_TO_CPU	BIT(26)
 +
-+endif
-diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/Makefile linux-2.6.39/drivers/net/ag71xx/Makefile
---- linux-2.6.39.orig/drivers/net/ag71xx/Makefile	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,14 @@
-+#
-+# Makefile for the Atheros AR71xx built-in ethernet macs
-+#
++#define AR7240_REG_GLOBAL_CTRL		0x30
++#define AR7240_GLOBAL_CTRL_MTU_M	BITM(12)
 +
-+ag71xx-y	+= ag71xx_main.o
-+ag71xx-y	+= ag71xx_ethtool.o
-+ag71xx-y	+= ag71xx_phy.o
-+ag71xx-y	+= ag71xx_mdio.o
++#define AR7240_REG_VTU			0x0040
++#define   AR7240_VTU_OP			BITM(3)
++#define   AR7240_VTU_OP_NOOP		0x0
++#define   AR7240_VTU_OP_FLUSH		0x1
++#define   AR7240_VTU_OP_LOAD		0x2
++#define   AR7240_VTU_OP_PURGE		0x3
++#define   AR7240_VTU_OP_REMOVE_PORT	0x4
++#define   AR7240_VTU_ACTIVE		BIT(3)
++#define   AR7240_VTU_FULL		BIT(4)
++#define   AR7240_VTU_PORT		BITS(8, 4)
++#define   AR7240_VTU_PORT_S		8
++#define   AR7240_VTU_VID		BITS(16, 12)
++#define   AR7240_VTU_VID_S		16
++#define   AR7240_VTU_PRIO		BITS(28, 3)
++#define   AR7240_VTU_PRIO_S		28
++#define   AR7240_VTU_PRIO_EN		BIT(31)
++
++#define AR7240_REG_VTU_DATA		0x0044
++#define   AR7240_VTUDATA_MEMBER		BITS(0, 10)
++#define   AR7240_VTUDATA_VALID		BIT(11)
++
++#define AR7240_REG_ATU			0x50
++#define AR7240_ATU_FLUSH_ALL		0x1
 +
-+ag71xx-$(CONFIG_AG71XX_DEBUG_FS)	+= ag71xx_debugfs.o
-+ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT)	+= ag71xx_ar8216.o
++#define AR7240_REG_AT_CTRL		0x5c
++#define AR7240_AT_CTRL_AGE_TIME		BITS(0, 15)
++#define AR7240_AT_CTRL_AGE_EN		BIT(17)
++#define AR7240_AT_CTRL_LEARN_CHANGE	BIT(18)
++#define AR7240_AT_CTRL_ARP_EN		BIT(20)
 +
-+obj-$(CONFIG_AG71XX)	+= ag71xx.o
++#define AR7240_REG_TAG_PRIORITY		0x70
++
++#define AR7240_REG_SERVICE_TAG		0x74
++#define AR7240_SERVICE_TAG_M		BITM(16)
++
++#define AR7240_REG_CPU_PORT		0x78
++#define AR7240_MIRROR_PORT_S		4
++#define AR7240_CPU_PORT_EN		BIT(8)
++
++#define AR7240_REG_MIB_FUNCTION0	0x80
++#define AR7240_MIB_TIMER_M		BITM(16)
++#define AR7240_MIB_AT_HALF_EN		BIT(16)
++#define AR7240_MIB_BUSY			BIT(17)
++#define AR7240_MIB_FUNC_S		24
++#define AR7240_MIB_FUNC_NO_OP		0x0
++#define AR7240_MIB_FUNC_FLUSH		0x1
++#define AR7240_MIB_FUNC_CAPTURE		0x3
++
++#define AR7240_REG_MDIO_CTRL		0x98
++#define AR7240_MDIO_CTRL_DATA_M		BITM(16)
++#define AR7240_MDIO_CTRL_REG_ADDR_S	16
++#define AR7240_MDIO_CTRL_PHY_ADDR_S	21
++#define AR7240_MDIO_CTRL_CMD_WRITE	0
++#define AR7240_MDIO_CTRL_CMD_READ	BIT(27)
++#define AR7240_MDIO_CTRL_MASTER_EN	BIT(30)
++#define AR7240_MDIO_CTRL_BUSY		BIT(31)
++
++#define AR7240_REG_PORT_BASE(_port)	(0x100 + (_port) * 0x100)
++
++#define AR7240_REG_PORT_STATUS(_port)	(AR7240_REG_PORT_BASE((_port)) + 0x00)
++#define AR7240_PORT_STATUS_SPEED_M	BITM(2)
++#define AR7240_PORT_STATUS_SPEED_10	0
++#define AR7240_PORT_STATUS_SPEED_100	1
++#define AR7240_PORT_STATUS_SPEED_1000	2
++#define AR7240_PORT_STATUS_TXMAC	BIT(2)
++#define AR7240_PORT_STATUS_RXMAC	BIT(3)
++#define AR7240_PORT_STATUS_TXFLOW	BIT(4)
++#define AR7240_PORT_STATUS_RXFLOW	BIT(5)
++#define AR7240_PORT_STATUS_DUPLEX	BIT(6)
++#define AR7240_PORT_STATUS_LINK_UP	BIT(8)
++#define AR7240_PORT_STATUS_LINK_AUTO	BIT(9)
++#define AR7240_PORT_STATUS_LINK_PAUSE	BIT(10)
++
++#define AR7240_REG_PORT_CTRL(_port)	(AR7240_REG_PORT_BASE((_port)) + 0x04)
++#define AR7240_PORT_CTRL_STATE_M	BITM(3)
++#define	AR7240_PORT_CTRL_STATE_DISABLED	0
++#define AR7240_PORT_CTRL_STATE_BLOCK	1
++#define AR7240_PORT_CTRL_STATE_LISTEN	2
++#define AR7240_PORT_CTRL_STATE_LEARN	3
++#define AR7240_PORT_CTRL_STATE_FORWARD	4
++#define AR7240_PORT_CTRL_LEARN_LOCK	BIT(7)
++#define AR7240_PORT_CTRL_VLAN_MODE_S	8
++#define AR7240_PORT_CTRL_VLAN_MODE_KEEP	0
++#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1
++#define AR7240_PORT_CTRL_VLAN_MODE_ADD	2
++#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3
++#define AR7240_PORT_CTRL_IGMP_SNOOP	BIT(10)
++#define AR7240_PORT_CTRL_HEADER		BIT(11)
++#define AR7240_PORT_CTRL_MAC_LOOP	BIT(12)
++#define AR7240_PORT_CTRL_SINGLE_VLAN	BIT(13)
++#define AR7240_PORT_CTRL_LEARN		BIT(14)
++#define AR7240_PORT_CTRL_DOUBLE_TAG	BIT(15)
++#define AR7240_PORT_CTRL_MIRROR_TX	BIT(16)
++#define AR7240_PORT_CTRL_MIRROR_RX	BIT(17)
++
++#define AR7240_REG_PORT_VLAN(_port)	(AR7240_REG_PORT_BASE((_port)) + 0x08)
++
++#define AR7240_PORT_VLAN_DEFAULT_ID_S	0
++#define AR7240_PORT_VLAN_DEST_PORTS_S	16
++#define AR7240_PORT_VLAN_MODE_S		30
++#define AR7240_PORT_VLAN_MODE_PORT_ONLY	0
++#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK	1
++#define AR7240_PORT_VLAN_MODE_VLAN_ONLY	2
++#define AR7240_PORT_VLAN_MODE_SECURE	3
++
++
++#define AR7240_REG_STATS_BASE(_port)	(0x20000 + (_port) * 0x100)
++
++#define AR7240_STATS_RXBROAD		0x00
++#define AR7240_STATS_RXPAUSE		0x04
++#define AR7240_STATS_RXMULTI		0x08
++#define AR7240_STATS_RXFCSERR		0x0c
++#define AR7240_STATS_RXALIGNERR		0x10
++#define AR7240_STATS_RXRUNT		0x14
++#define AR7240_STATS_RXFRAGMENT		0x18
++#define AR7240_STATS_RX64BYTE		0x1c
++#define AR7240_STATS_RX128BYTE		0x20
++#define AR7240_STATS_RX256BYTE		0x24
++#define AR7240_STATS_RX512BYTE		0x28
++#define AR7240_STATS_RX1024BYTE		0x2c
++#define AR7240_STATS_RX1518BYTE		0x30
++#define AR7240_STATS_RXMAXBYTE		0x34
++#define AR7240_STATS_RXTOOLONG		0x38
++#define AR7240_STATS_RXGOODBYTE		0x3c
++#define AR7240_STATS_RXBADBYTE		0x44
++#define AR7240_STATS_RXOVERFLOW		0x4c
++#define AR7240_STATS_FILTERED		0x50
++#define AR7240_STATS_TXBROAD		0x54
++#define AR7240_STATS_TXPAUSE		0x58
++#define AR7240_STATS_TXMULTI		0x5c
++#define AR7240_STATS_TXUNDERRUN		0x60
++#define AR7240_STATS_TX64BYTE		0x64
++#define AR7240_STATS_TX128BYTE		0x68
++#define AR7240_STATS_TX256BYTE		0x6c
++#define AR7240_STATS_TX512BYTE		0x70
++#define AR7240_STATS_TX1024BYTE		0x74
++#define AR7240_STATS_TX1518BYTE		0x78
++#define AR7240_STATS_TXMAXBYTE		0x7c
++#define AR7240_STATS_TXOVERSIZE		0x80
++#define AR7240_STATS_TXBYTE		0x84
++#define AR7240_STATS_TXCOLLISION	0x8c
++#define AR7240_STATS_TXABORTCOL		0x90
++#define AR7240_STATS_TXMULTICOL		0x94
++#define AR7240_STATS_TXSINGLECOL	0x98
++#define AR7240_STATS_TXEXCDEFER		0x9c
++#define AR7240_STATS_TXDEFER		0xa0
++#define AR7240_STATS_TXLATECOL		0xa4
++
++#define AR7240_PORT_CPU		0
++#define AR7240_NUM_PORTS	6
++#define AR7240_NUM_PHYS		5
++
++#define AR7240_PHY_ID1		0x004d
++#define AR7240_PHY_ID2		0xd041
++
++#define AR7240_PORT_MASK(_port)		BIT((_port))
++#define AR7240_PORT_MASK_ALL		BITM(AR7240_NUM_PORTS)
++#define AR7240_PORT_MASK_BUT(_port)	(AR7240_PORT_MASK_ALL & ~BIT((_port)))
++
++#define AR7240_MAX_VLANS	16
++
++#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev)
++
++struct ar7240sw {
++	struct mii_bus	*mii_bus;
++	struct switch_dev swdev;
++	bool vlan;
++	u16 vlan_id[AR7240_MAX_VLANS];
++	u8 vlan_table[AR7240_MAX_VLANS];
++	u8 vlan_tagged;
++	u16 pvid[AR7240_NUM_PORTS];
++};
++
++struct ar7240sw_hw_stat {
++	char string[ETH_GSTRING_LEN];
++	int sizeof_stat;
++	int reg;
++};
++
++static DEFINE_MUTEX(reg_mutex);
++
++static inline void ar7240sw_init(struct ar7240sw *as, struct mii_bus *mii)
++{
++	as->mii_bus = mii;
++}
++
++static inline u16 mk_phy_addr(u32 reg)
++{
++	return 0x17 & ((reg >> 4) | 0x10);
++}
++
++static inline u16 mk_phy_reg(u32 reg)
++{
++	return (reg << 1) & 0x1e;
++}
++
++static inline u16 mk_high_addr(u32 reg)
++{
++	return (reg >> 7) & 0x1ff;
++}
++
++static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg)
++{
++	unsigned long flags;
++	u16 phy_addr;
++	u16 phy_reg;
++	u32 hi, lo;
++
++	reg = (reg & 0xfffffffc) >> 2;
++	phy_addr = mk_phy_addr(reg);
++	phy_reg = mk_phy_reg(reg);
++
++	local_irq_save(flags);
++	ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg));
++	lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg);
++	hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1);
++	local_irq_restore(flags);
++
++	return (hi << 16) | lo;
++}
++
++static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val)
++{
++	unsigned long flags;
++	u16 phy_addr;
++	u16 phy_reg;
++
++	reg = (reg & 0xfffffffc) >> 2;
++	phy_addr = mk_phy_addr(reg);
++	phy_reg = mk_phy_reg(reg);
++
++	local_irq_save(flags);
++	ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg));
++	ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16));
++	ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff));
++	local_irq_restore(flags);
++}
++
++static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr)
++{
++	u32 ret;
++
++	mutex_lock(&reg_mutex);
++	ret = __ar7240sw_reg_read(mii, reg_addr);
++	mutex_unlock(&reg_mutex);
++
++	return ret;
++}
++
++static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val)
++{
++	mutex_lock(&reg_mutex);
++	__ar7240sw_reg_write(mii, reg_addr, reg_val);
++	mutex_unlock(&reg_mutex);
++}
++
++static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val)
++{
++	u32 t;
++
++	mutex_lock(&reg_mutex);
++	t = __ar7240sw_reg_read(mii, reg);
++	t &= ~mask;
++	t |= val;
++	__ar7240sw_reg_write(mii, reg, t);
++	mutex_unlock(&reg_mutex);
++
++	return t;
++}
++
++static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val)
++{
++	u32 t;
++
++	mutex_lock(&reg_mutex);
++	t = __ar7240sw_reg_read(mii, reg);
++	t |= val;
++	__ar7240sw_reg_write(mii, reg, t);
++	mutex_unlock(&reg_mutex);
++}
++
++static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val,
++			       unsigned timeout)
++{
++	int i;
++
++	for (i = 0; i < timeout; i++) {
++		u32 t;
++
++		t = __ar7240sw_reg_read(mii, reg);
++		if ((t & mask) == val)
++			return 0;
++
++		msleep(1);
++	}
++
++	return -ETIMEDOUT;
++}
++
++static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val,
++			     unsigned timeout)
++{
++	int ret;
++
++	mutex_lock(&reg_mutex);
++	ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout);
++	mutex_unlock(&reg_mutex);
++	return ret;
++}
++
++u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr,
++		      unsigned reg_addr)
++{
++	u32 t, val = 0xffff;
++	int err;
++
++	if (phy_addr >= AR7240_NUM_PHYS)
++		return 0xffff;
++
++	mutex_lock(&reg_mutex);
++	t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
++	    (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
++	    AR7240_MDIO_CTRL_MASTER_EN |
++	    AR7240_MDIO_CTRL_BUSY |
++	    AR7240_MDIO_CTRL_CMD_READ;
++
++	__ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t);
++	err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL,
++				  AR7240_MDIO_CTRL_BUSY, 0, 5);
++	if (!err)
++		val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL);
++	mutex_unlock(&reg_mutex);
++
++	return val & AR7240_MDIO_CTRL_DATA_M;
++}
++
++int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr,
++		       unsigned reg_addr, u16 reg_val)
++{
++	u32 t;
++	int ret;
++
++	if (phy_addr >= AR7240_NUM_PHYS)
++		return -EINVAL;
++
++	mutex_lock(&reg_mutex);
++	t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
++	    (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
++	    AR7240_MDIO_CTRL_MASTER_EN |
++	    AR7240_MDIO_CTRL_BUSY |
++	    AR7240_MDIO_CTRL_CMD_WRITE |
++	    reg_val;
++
++	__ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t);
++	ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL,
++				  AR7240_MDIO_CTRL_BUSY, 0, 5);
++	mutex_unlock(&reg_mutex);
++
++	return ret;
++}
++
++static int ar7240sw_capture_stats(struct ar7240sw *as)
++{
++	struct mii_bus *mii = as->mii_bus;
++	int ret;
++
++	/* Capture the hardware statistics for all ports */
++	ar7240sw_reg_write(mii, AR7240_REG_MIB_FUNCTION0,
++			   (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S));
++
++	/* Wait for the capturing to complete. */
++	ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0,
++				AR7240_MIB_BUSY, 0, 10);
++	return ret;
++}
++
++static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port)
++{
++	ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port),
++			   AR7240_PORT_CTRL_STATE_DISABLED);
++}
++
++static void ar7240sw_setup(struct ar7240sw *as)
++{
++	struct mii_bus *mii = as->mii_bus;
++
++	/* Enable CPU port, and disable mirror port */
++	ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT,
++			   AR7240_CPU_PORT_EN |
++			   (15 << AR7240_MIRROR_PORT_S));
++
++	/* Setup TAG priority mapping */
++	ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50);
++
++	/* Enable ARP frame acknowledge, aging, MAC replacing */
++	ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL,
++		0x2b /* 5 min age time */ |
++		AR7240_AT_CTRL_AGE_EN |
++		AR7240_AT_CTRL_ARP_EN |
++		AR7240_AT_CTRL_LEARN_CHANGE);
++
++	/* Enable Broadcast frames transmitted to the CPU */
++	ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK,
++			 AR7240_FLOOD_MASK_BROAD_TO_CPU);
++
++	/* setup MTU */
++	ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M,
++			 1536);
++
++	/* setup Service TAG */
++	ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0);
++}
++
++static int ar7240sw_reset(struct ar7240sw *as)
++{
++	struct mii_bus *mii = as->mii_bus;
++	int ret;
++	int i;
++
++	/* Set all ports to disabled state. */
++	for (i = 0; i < AR7240_NUM_PORTS; i++)
++		ar7240sw_disable_port(as, i);
++
++	/* Wait for transmit queues to drain. */
++	msleep(2);
++
++	/* Reset the switch. */
++	ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL,
++			   AR7240_MASK_CTRL_SOFT_RESET);
++
++	ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
++				AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
++
++	ar7240sw_setup(as);
++	return ret;
++}
++
++static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask)
++{
++	struct mii_bus *mii = as->mii_bus;
++	u32 ctrl;
++	u32 dest_ports;
++	u32 vlan;
++
++	ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN |
++		AR7240_PORT_CTRL_SINGLE_VLAN;
++
++	if (port == AR7240_PORT_CPU) {
++		ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port),
++				   AR7240_PORT_STATUS_SPEED_1000 |
++				   AR7240_PORT_STATUS_TXFLOW |
++				   AR7240_PORT_STATUS_RXFLOW |
++				   AR7240_PORT_STATUS_TXMAC |
++				   AR7240_PORT_STATUS_RXMAC |
++				   AR7240_PORT_STATUS_DUPLEX);
++	} else {
++		ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port),
++				   AR7240_PORT_STATUS_LINK_AUTO);
++	}
++
++	/* Set the default VID for this port */
++	if (as->vlan) {
++		vlan = as->vlan_id[as->pvid[port]];
++		vlan |= AR7240_PORT_VLAN_MODE_SECURE <<
++			AR7240_PORT_VLAN_MODE_S;
++	} else {
++		vlan = port;
++		vlan |= AR7240_PORT_VLAN_MODE_PORT_ONLY <<
++			AR7240_PORT_VLAN_MODE_S;
++	}
++
++	if (as->vlan && (as->vlan_tagged & BIT(port))) {
++		ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD <<
++			AR7240_PORT_CTRL_VLAN_MODE_S;
++	} else {
++		ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP <<
++			AR7240_PORT_CTRL_VLAN_MODE_S;
++	}
++
++	if (!portmask) {
++		if (port == AR7240_PORT_CPU)
++			portmask = AR7240_PORT_MASK_BUT(AR7240_PORT_CPU);
++		else
++			portmask = AR7240_PORT_MASK(AR7240_PORT_CPU);
++	}
++
++	/* allow the port to talk to all other ports, but exclude its
++	 * own ID to prevent frames from being reflected back to the
++	 * port that they came from */
++	dest_ports = AR7240_PORT_MASK_BUT(port);
++
++	/* set default VID and and destination ports for this VLAN */
++	vlan |= (portmask << AR7240_PORT_VLAN_DEST_PORTS_S);
++
++	ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl);
++	ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan);
++}
++
++static int ar7240_set_addr(struct ar7240sw *as, u8 *addr)
++{
++	struct mii_bus *mii = as->mii_bus;
++	u32 t;
++
++	t = (addr[4] << 8) | addr[5];
++	ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t);
++
++	t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
++	ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t);
++
++	return 0;
++}
++
++static int
++ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	as->vlan_id[val->port_vlan] = val->value.i;
++	return 0;
++}
++
++static int
++ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	val->value.i = as->vlan_id[val->port_vlan];
++	return 0;
++}
++
++static int
++ar7240_set_pvid(struct switch_dev *dev, int port, int vlan)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++
++	/* make sure no invalid PVIDs get set */
++
++	if (vlan >= dev->vlans)
++		return -EINVAL;
++
++	as->pvid[port] = vlan;
++	return 0;
++}
++
++static int
++ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	*vlan = as->pvid[port];
++	return 0;
++}
++
++static int
++ar7240_get_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	u8 ports = as->vlan_table[val->port_vlan];
++	int i;
++
++	val->len = 0;
++	for (i = 0; i < AR7240_NUM_PORTS; i++) {
++		struct switch_port *p;
++
++		if (!(ports & (1 << i)))
++			continue;
++
++		p = &val->value.ports[val->len++];
++		p->id = i;
++		if (as->vlan_tagged & (1 << i))
++			p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
++		else
++			p->flags = 0;
++	}
++	return 0;
++}
++
++static int
++ar7240_set_ports(struct switch_dev *dev, struct switch_val *val)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	u8 *vt = &as->vlan_table[val->port_vlan];
++	int i, j;
++
++	*vt = 0;
++	for (i = 0; i < val->len; i++) {
++		struct switch_port *p = &val->value.ports[i];
++
++		if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
++			as->vlan_tagged |= (1 << p->id);
++		else {
++			as->vlan_tagged &= ~(1 << p->id);
++			as->pvid[p->id] = val->port_vlan;
++
++			/* make sure that an untagged port does not
++			 * appear in other vlans */
++			for (j = 0; j < AR7240_MAX_VLANS; j++) {
++				if (j == val->port_vlan)
++					continue;
++				as->vlan_table[j] &= ~(1 << p->id);
++			}
++		}
++
++		*vt |= 1 << p->id;
++	}
++	return 0;
++}
++
++static int
++ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	as->vlan = !!val->value.i;
++	return 0;
++}
++
++static int
++ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
++		struct switch_val *val)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	val->value.i = as->vlan;
++	return 0;
++}
++
++
++static void
++ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val)
++{
++	struct mii_bus *mii = as->mii_bus;
++
++	if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5))
++		return;
++
++	if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) {
++		val &= AR7240_VTUDATA_MEMBER;
++		val |= AR7240_VTUDATA_VALID;
++		ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val);
++	}
++	op |= AR7240_VTU_ACTIVE;
++	ar7240sw_reg_write(mii, AR7240_REG_VTU, op);
++}
++
++static int
++ar7240_hw_apply(struct switch_dev *dev)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	u8 portmask[AR7240_NUM_PORTS];
++	int i, j;
++
++	/* flush all vlan translation unit entries */
++	ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0);
++
++	memset(portmask, 0, sizeof(portmask));
++	if (as->vlan) {
++		/* calculate the port destination masks and load vlans
++		 * into the vlan translation unit */
++		for (j = 0; j < AR7240_MAX_VLANS; j++) {
++			u8 vp = as->vlan_table[j];
++
++			if (!vp)
++				continue;
++
++			for (i = 0; i < AR7240_NUM_PORTS; i++) {
++				u8 mask = (1 << i);
++				if (vp & mask)
++					portmask[i] |= vp & ~mask;
++			}
++
++			ar7240_vtu_op(as,
++				AR7240_VTU_OP_LOAD |
++				(as->vlan_id[j] << AR7240_VTU_VID_S),
++				as->vlan_table[j]);
++		}
++	} else {
++		/* vlan disabled:
++		 * isolate all ports, but connect them to the cpu port */
++		for (i = 0; i < AR7240_NUM_PORTS; i++) {
++			if (i == AR7240_PORT_CPU)
++				continue;
++
++			portmask[i] = 1 << AR7240_PORT_CPU;
++			portmask[AR7240_PORT_CPU] |= (1 << i);
++		}
++	}
++
++	/* update the port destination mask registers and tag settings */
++	for (i = 0; i < AR7240_NUM_PORTS; i++)
++		ar7240sw_setup_port(as, i, portmask[i]);
++
++	return 0;
++}
++
++static int
++ar7240_reset_switch(struct switch_dev *dev)
++{
++	struct ar7240sw *as = sw_to_ar7240(dev);
++	ar7240sw_reset(as);
++	return 0;
++}
++
++static struct switch_attr ar7240_globals[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "enable_vlan",
++		.description = "Enable VLAN mode",
++		.set = ar7240_set_vlan,
++		.get = ar7240_get_vlan,
++		.max = 1
++	},
++};
++
++static struct switch_attr ar7240_port[] = {
++};
++
++static struct switch_attr ar7240_vlan[] = {
++	{
++		.type = SWITCH_TYPE_INT,
++		.name = "vid",
++		.description = "VLAN ID",
++		.set = ar7240_set_vid,
++		.get = ar7240_get_vid,
++		.max = 4094,
++	},
++};
++
++static const struct switch_dev_ops ar7240_ops = {
++	.attr_global = {
++		.attr = ar7240_globals,
++		.n_attr = ARRAY_SIZE(ar7240_globals),
++	},
++	.attr_port = {
++		.attr = ar7240_port,
++		.n_attr = ARRAY_SIZE(ar7240_port),
++	},
++	.attr_vlan = {
++		.attr = ar7240_vlan,
++		.n_attr = ARRAY_SIZE(ar7240_vlan),
++	},
++	.get_port_pvid = ar7240_get_pvid,
++	.set_port_pvid = ar7240_set_pvid,
++	.get_vlan_ports = ar7240_get_ports,
++	.set_vlan_ports = ar7240_set_ports,
++	.apply_config = ar7240_hw_apply,
++	.reset_switch = ar7240_reset_switch,
++};
++
++static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
++{
++	struct mii_bus *mii = ag->mii_bus;
++	struct ar7240sw *as;
++	struct switch_dev *swdev;
++	u32 ctrl;
++	u16 phy_id1;
++	u16 phy_id2;
++	u8 ver;
++	int i;
++
++	as = kzalloc(sizeof(*as), GFP_KERNEL);
++	if (!as)
++		return NULL;
++
++	ar7240sw_init(as, mii);
++
++	ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL);
++
++	ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
++	if (ver != 1) {
++		pr_err("%s: unsupported chip, ctrl=%08x\n",
++			ag->dev->name, ctrl);
++		return NULL;
++	}
++
++	phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1);
++	phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2);
++	if (phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) {
++		pr_err("%s: unknown phy id '%04x:%04x'\n",
++		       ag->dev->name, phy_id1, phy_id2);
++		return NULL;
++	}
++
++	swdev = &as->swdev;
++	swdev->name = "AR7240 built-in switch";
++	swdev->ports = AR7240_NUM_PORTS;
++	swdev->cpu_port = AR7240_PORT_CPU;
++	swdev->vlans = AR7240_MAX_VLANS;
++	swdev->ops = &ar7240_ops;
++
++	if (register_switch(&as->swdev, ag->dev) < 0) {
++		kfree(as);
++		return NULL;
++	}
++
++	pr_info("%s: Found an AR7240 built-in switch\n", ag->dev->name);
++
++	/* initialize defaults */
++	for (i = 0; i < AR7240_MAX_VLANS; i++)
++		as->vlan_id[i] = i;
++
++	as->vlan_table[0] = AR7240_PORT_MASK_ALL;
++
++	return as;
++}
++
++static void link_function(struct work_struct *work) {
++	struct ag71xx *ag = container_of(work, struct ag71xx, link_work.work);
++	unsigned long flags;
++	int i;
++	int status = 0;
++
++	for (i = 0; i < 4; i++) {
++		int link = ar7240sw_phy_read(ag->mii_bus, i, MII_BMSR);
++		if(link & BMSR_LSTATUS) {
++			status = 1;
++			break;
++		}
++	}
++
++	spin_lock_irqsave(&ag->lock, flags);
++	if(status != ag->link) {
++		ag->link = status;
++		ag71xx_link_adjust(ag);
++	}
++	spin_unlock_irqrestore(&ag->lock, flags);
++
++	schedule_delayed_work(&ag->link_work, HZ / 2);
++}
++
++void ag71xx_ar7240_start(struct ag71xx *ag)
++{
++	struct ar7240sw *as = ag->phy_priv;
++
++	ar7240sw_reset(as);
++
++	ag->speed = SPEED_1000;
++	ag->duplex = 1;
++
++	ar7240_set_addr(as, ag->dev->dev_addr);
++	ar7240_hw_apply(&as->swdev);
++
++	schedule_delayed_work(&ag->link_work, HZ / 10);
++}
++
++void ag71xx_ar7240_stop(struct ag71xx *ag)
++{
++	cancel_delayed_work_sync(&ag->link_work);
++}
++
++int __devinit ag71xx_ar7240_init(struct ag71xx *ag)
++{
++	struct ar7240sw *as;
++
++	as = ar7240_probe(ag);
++	if (!as)
++		return -ENODEV;
++
++	ag->phy_priv = as;
++	ar7240sw_reset(as);
++
++	INIT_DELAYED_WORK(&ag->link_work, link_function);
++
++	return 0;
++}
++
++void ag71xx_ar7240_cleanup(struct ag71xx *ag)
++{
++	struct ar7240sw *as = ag->phy_priv;
++
++	if (!as)
++		return;
++
++	unregister_switch(&as->swdev);
++	kfree(as);
++	ag->phy_priv = NULL;
++}
+diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ar8216.c linux-2.6.39/drivers/net/ag71xx/ag71xx_ar8216.c
+--- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ar8216.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_ar8216.c	2011-04-27 12:19:22.257663952 +0200
+@@ -0,0 +1,44 @@
++/*
++ *  Atheros AR71xx built-in ethernet mac driver
++ *  Special support for the Atheros ar8216 switch chip
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  Based on Atheros' AG7100 driver
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include "ag71xx.h"
++
++#define AR8216_PACKET_TYPE_MASK		0xf
++#define AR8216_PACKET_TYPE_NORMAL	0
++
++#define AR8216_HEADER_LEN	2
++
++void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb)
++{
++	skb_push(skb, AR8216_HEADER_LEN);
++	skb->data[0] = 0x10;
++	skb->data[1] = 0x80;
++}
++
++int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb,
++				int pktlen)
++{
++	u8 type;
++
++	type = skb->data[1] & AR8216_PACKET_TYPE_MASK;
++	switch (type) {
++	case AR8216_PACKET_TYPE_NORMAL:
++		break;
++
++	default:
++		return -EINVAL;
++	}
++
++	skb_pull(skb, AR8216_HEADER_LEN);
++	return 0;
++}
+diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_debugfs.c linux-2.6.39/drivers/net/ag71xx/ag71xx_debugfs.c
+--- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_debugfs.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_debugfs.c	2011-08-06 09:32:37.298018216 +0200
+@@ -0,0 +1,280 @@
++/*
++ *  Atheros AR71xx built-in ethernet mac driver
++ *
++ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Based on Atheros' AG7100 driver
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/debugfs.h>
++
++#include "ag71xx.h"
++
++static struct dentry *ag71xx_debugfs_root;
++
++static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file)
++{
++	file->private_data = inode->i_private;
++	return 0;
++}
 +
++void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status)
++{
++	if (status)
++		ag->debug.int_stats.total++;
++	if (status & AG71XX_INT_TX_PS)
++		ag->debug.int_stats.tx_ps++;
++	if (status & AG71XX_INT_TX_UR)
++		ag->debug.int_stats.tx_ur++;
++	if (status & AG71XX_INT_TX_BE)
++		ag->debug.int_stats.tx_be++;
++	if (status & AG71XX_INT_RX_PR)
++		ag->debug.int_stats.rx_pr++;
++	if (status & AG71XX_INT_RX_OF)
++		ag->debug.int_stats.rx_of++;
++	if (status & AG71XX_INT_RX_BE)
++		ag->debug.int_stats.rx_be++;
++}
++
++static ssize_t read_file_int_stats(struct file *file, char __user *user_buf,
++				   size_t count, loff_t *ppos)
++{
++#define PR_INT_STAT(_label, _field)					\
++	len += snprintf(buf + len, sizeof(buf) - len,			\
++		"%20s: %10lu\n", _label, ag->debug.int_stats._field);
++
++	struct ag71xx *ag = file->private_data;
++	char buf[256];
++	unsigned int len = 0;
++
++	PR_INT_STAT("TX Packet Sent", tx_ps);
++	PR_INT_STAT("TX Underrun", tx_ur);
++	PR_INT_STAT("TX Bus Error", tx_be);
++	PR_INT_STAT("RX Packet Received", rx_pr);
++	PR_INT_STAT("RX Overflow", rx_of);
++	PR_INT_STAT("RX Bus Error", rx_be);
++	len += snprintf(buf + len, sizeof(buf) - len, "\n");
++	PR_INT_STAT("Total", total);
++
++	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
++#undef PR_INT_STAT
++}
++
++static const struct file_operations ag71xx_fops_int_stats = {
++	.open	= ag71xx_debugfs_generic_open,
++	.read	= read_file_int_stats,
++	.owner	= THIS_MODULE
++};
++
++void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx)
++{
++	struct ag71xx_napi_stats *stats = &ag->debug.napi_stats;
++
++	if (rx) {
++		stats->rx_count++;
++		stats->rx_packets += rx;
++		if (rx <= AG71XX_NAPI_WEIGHT)
++			stats->rx[rx]++;
++		if (rx > stats->rx_packets_max)
++			stats->rx_packets_max = rx;
++	}
++
++	if (tx) {
++		stats->tx_count++;
++		stats->tx_packets += tx;
++		if (tx <= AG71XX_NAPI_WEIGHT)
++			stats->tx[tx]++;
++		if (tx > stats->tx_packets_max)
++			stats->tx_packets_max = tx;
++	}
++}
++
++static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf,
++				    size_t count, loff_t *ppos)
++{
++	struct ag71xx *ag = file->private_data;
++	struct ag71xx_napi_stats *stats = &ag->debug.napi_stats;
++	char *buf;
++	unsigned int buflen;
++	unsigned int len = 0;
++	unsigned long rx_avg = 0;
++	unsigned long tx_avg = 0;
++	int ret;
++	int i;
++
++	buflen = 2048;
++	buf = kmalloc(buflen, GFP_KERNEL);
++	if (!buf)
++		return -ENOMEM;
++
++	if (stats->rx_count)
++		rx_avg = stats->rx_packets / stats->rx_count;
++
++	if (stats->tx_count)
++		tx_avg = stats->tx_packets / stats->tx_count;
++
++	len += snprintf(buf + len, buflen - len, "%3s  %10s %10s\n",
++			"len", "rx", "tx");
++
++	for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++)
++		len += snprintf(buf + len, buflen - len,
++				"%3d: %10lu %10lu\n",
++				i, stats->rx[i], stats->tx[i]);
++
++	len += snprintf(buf + len, buflen - len, "\n");
++
++	len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
++			"sum", stats->rx_count, stats->tx_count);
++	len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
++			"avg", rx_avg, tx_avg);
++	len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
++			"max", stats->rx_packets_max, stats->tx_packets_max);
++	len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
++			"pkt", stats->rx_packets, stats->tx_packets);
++
++	ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
++	kfree(buf);
++
++	return ret;
++}
++
++static const struct file_operations ag71xx_fops_napi_stats = {
++	.open	= ag71xx_debugfs_generic_open,
++	.read	= read_file_napi_stats,
++	.owner	= THIS_MODULE
++};
++
++#define DESC_PRINT_LEN	64
++
++static ssize_t read_file_ring(struct file *file, char __user *user_buf,
++			      size_t count, loff_t *ppos,
++			      struct ag71xx *ag,
++			      struct ag71xx_ring *ring,
++			      unsigned desc_reg)
++{
++	char *buf;
++	unsigned int buflen;
++	unsigned int len = 0;
++	unsigned long flags;
++	ssize_t ret;
++	int curr;
++	int dirty;
++	u32 desc_hw;
++	int i;
++
++	buflen = (ring->size * DESC_PRINT_LEN);
++	buf = kmalloc(buflen, GFP_KERNEL);
++	if (!buf)
++		return -ENOMEM;
++
++	len += snprintf(buf + len, buflen - len,
++			"Idx ... %-8s %-8s %-8s %-8s . %-10s\n",
++			"desc", "next", "data", "ctrl", "timestamp");
++
++	spin_lock_irqsave(&ag->lock, flags);
++
++	curr = (ring->curr % ring->size);
++	dirty = (ring->dirty % ring->size);
++	desc_hw = ag71xx_rr(ag, desc_reg);
++	for (i = 0; i < ring->size; i++) {
++		struct ag71xx_buf *ab = &ring->buf[i];
++		u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size;
++
++		len += snprintf(buf + len, buflen - len,
++			"%3d %c%c%c %08x %08x %08x %08x %c %10lu\n",
++			i,
++			(i == curr) ? 'C' : ' ',
++			(i == dirty) ? 'D' : ' ',
++			(desc_hw == desc_dma) ? 'H' : ' ',
++			desc_dma,
++			ab->desc->next,
++			ab->desc->data,
++			ab->desc->ctrl,
++			(ab->desc->ctrl & DESC_EMPTY) ? 'E' : '*',
++			ab->timestamp);
++	}
++
++	spin_unlock_irqrestore(&ag->lock, flags);
++
++	ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
++	kfree(buf);
++
++	return ret;
++}
++
++static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf,
++				 size_t count, loff_t *ppos)
++{
++	struct ag71xx *ag = file->private_data;
++
++	return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring,
++			      AG71XX_REG_TX_DESC);
++}
++
++static const struct file_operations ag71xx_fops_tx_ring = {
++	.open	= ag71xx_debugfs_generic_open,
++	.read	= read_file_tx_ring,
++	.owner	= THIS_MODULE
++};
++
++static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf,
++				 size_t count, loff_t *ppos)
++{
++	struct ag71xx *ag = file->private_data;
++
++	return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring,
++			      AG71XX_REG_RX_DESC);
++}
++
++static const struct file_operations ag71xx_fops_rx_ring = {
++	.open	= ag71xx_debugfs_generic_open,
++	.read	= read_file_rx_ring,
++	.owner	= THIS_MODULE
++};
++
++void ag71xx_debugfs_exit(struct ag71xx *ag)
++{
++	debugfs_remove_recursive(ag->debug.debugfs_dir);
++}
++
++int ag71xx_debugfs_init(struct ag71xx *ag)
++{
++	ag->debug.debugfs_dir = debugfs_create_dir(ag->dev->name,
++						   ag71xx_debugfs_root);
++	if (!ag->debug.debugfs_dir)
++		return -ENOMEM;
++
++	debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir,
++			    ag, &ag71xx_fops_int_stats);
++	debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir,
++			    ag, &ag71xx_fops_napi_stats);
++	debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir,
++			    ag, &ag71xx_fops_tx_ring);
++	debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir,
++			    ag, &ag71xx_fops_rx_ring);
++
++	return 0;
++}
++
++int ag71xx_debugfs_root_init(void)
++{
++	if (ag71xx_debugfs_root)
++		return -EBUSY;
++
++	ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
++	if (!ag71xx_debugfs_root)
++		return -ENOENT;
++
++	return 0;
++}
++
++void ag71xx_debugfs_root_exit(void)
++{
++	debugfs_remove(ag71xx_debugfs_root);
++	ag71xx_debugfs_root = NULL;
++}
+diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ethtool.c linux-2.6.39/drivers/net/ag71xx/ag71xx_ethtool.c
+--- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ethtool.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_ethtool.c	2011-08-06 09:32:37.308017908 +0200
+@@ -0,0 +1,124 @@
++/*
++ *  Atheros AR71xx built-in ethernet mac driver
++ *
++ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Based on Atheros' AG7100 driver
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include "ag71xx.h"
++
++static int ag71xx_ethtool_get_settings(struct net_device *dev,
++				       struct ethtool_cmd *cmd)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++	struct phy_device *phydev = ag->phy_dev;
++
++	if (!phydev)
++		return -ENODEV;
++
++	return phy_ethtool_gset(phydev, cmd);
++}
++
++static int ag71xx_ethtool_set_settings(struct net_device *dev,
++				       struct ethtool_cmd *cmd)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++	struct phy_device *phydev = ag->phy_dev;
++
++	if (!phydev)
++		return -ENODEV;
++
++	return phy_ethtool_sset(phydev, cmd);
++}
++
++static void ag71xx_ethtool_get_drvinfo(struct net_device *dev,
++				       struct ethtool_drvinfo *info)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++
++	strcpy(info->driver, ag->pdev->dev.driver->name);
++	strcpy(info->version, AG71XX_DRV_VERSION);
++	strcpy(info->bus_info, dev_name(&ag->pdev->dev));
++}
++
++static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++
++	return ag->msg_enable;
++}
++
++static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++
++	ag->msg_enable = msg_level;
++}
++
++static void ag71xx_ethtool_get_ringparam(struct net_device *dev,
++					 struct ethtool_ringparam *er)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++
++	er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX;
++	er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX;
++	er->rx_mini_max_pending = 0;
++	er->rx_jumbo_max_pending = 0;
++
++	er->tx_pending = ag->tx_ring.size;
++	er->rx_pending = ag->rx_ring.size;
++	er->rx_mini_pending = 0;
++	er->rx_jumbo_pending = 0;
++}
++
++static int ag71xx_ethtool_set_ringparam(struct net_device *dev,
++					struct ethtool_ringparam *er)
++{
++	struct ag71xx *ag = netdev_priv(dev);
++	unsigned tx_size;
++	unsigned rx_size;
++	int err;
++
++	if (er->rx_mini_pending != 0||
++	    er->rx_jumbo_pending != 0 ||
++	    er->rx_pending == 0 ||
++	    er->tx_pending == 0)
++		return -EINVAL;
++
++	tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ?
++		  er->tx_pending : AG71XX_TX_RING_SIZE_MAX;
++
++	rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ?
++		  er->rx_pending : AG71XX_RX_RING_SIZE_MAX;
++
++	if (netif_running(dev)) {
++		err = dev->netdev_ops->ndo_stop(dev);
++		if (err)
++			return err;
++	}
++
++	ag->tx_ring.size = tx_size;
++	ag->rx_ring.size = rx_size;
++
++	if (netif_running(dev))
++		err = dev->netdev_ops->ndo_open(dev);
++
++	return err;
++}
++
++struct ethtool_ops ag71xx_ethtool_ops = {
++	.set_settings	= ag71xx_ethtool_set_settings,
++	.get_settings	= ag71xx_ethtool_get_settings,
++	.get_drvinfo	= ag71xx_ethtool_get_drvinfo,
++	.get_msglevel	= ag71xx_ethtool_get_msglevel,
++	.set_msglevel	= ag71xx_ethtool_set_msglevel,
++	.get_ringparam	= ag71xx_ethtool_get_ringparam,
++	.set_ringparam	= ag71xx_ethtool_set_ringparam,
++	.get_link	= ethtool_op_get_link,
++};
 diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net/ag71xx/ag71xx.h
 --- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,500 @@
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx.h	2011-08-22 07:40:12.160480642 +0200
+@@ -0,0 +1,518 @@
 +/*
 + *  Atheros AR71xx built-in ethernet mac driver
 + *
@@ -12211,6 +19167,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +#include <linux/platform_device.h>
 +#include <linux/ethtool.h>
 +#include <linux/etherdevice.h>
++#include <linux/if_vlan.h>
 +#include <linux/phy.h>
 +#include <linux/skbuff.h>
 +#include <linux/dma-mapping.h>
@@ -12221,8 +19178,6 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +#include <asm/mach-ar71xx/ar71xx.h>
 +#include <asm/mach-ar71xx/platform.h>
 +
-+#define ETH_FCS_LEN	4
-+
 +#define AG71XX_DRV_NAME		"ag71xx"
 +#define AG71XX_DRV_VERSION	"0.5.35"
 +
@@ -12236,18 +19191,16 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +#define AG71XX_INT_POLL	(AG71XX_INT_RX | AG71XX_INT_TX)
 +#define AG71XX_INT_INIT	(AG71XX_INT_ERR | AG71XX_INT_POLL)
 +
-+#define AG71XX_TX_FIFO_LEN	2048
-+#define AG71XX_TX_MTU_LEN	1536
++#define AG71XX_TX_MTU_LEN	1540
 +#define AG71XX_RX_PKT_RESERVE	64
 +#define AG71XX_RX_PKT_SIZE	\
-+	(AG71XX_RX_PKT_RESERVE + ETH_HLEN + ETH_FRAME_LEN + ETH_FCS_LEN)
++	(AG71XX_RX_PKT_RESERVE + ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
 +
-+#define AG71XX_TX_RING_SIZE	64
-+#define AG71XX_TX_THRES_STOP	(AG71XX_TX_RING_SIZE - 4)
-+#define AG71XX_TX_THRES_WAKEUP	\
-+		(AG71XX_TX_RING_SIZE - (AG71XX_TX_RING_SIZE / 4))
++#define AG71XX_TX_RING_SIZE_DEFAULT	64
++#define AG71XX_RX_RING_SIZE_DEFAULT	128
 +
-+#define AG71XX_RX_RING_SIZE	128
++#define AG71XX_TX_RING_SIZE_MAX		256
++#define AG71XX_RX_RING_SIZE_MAX		256
 +
 +#ifdef CONFIG_AG71XX_DEBUG
 +#define DBG(fmt, args...)	printk(KERN_DEBUG fmt, ## args)
@@ -12275,9 +19228,9 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +
 +struct ag71xx_buf {
 +	struct sk_buff		*skb;
-+	struct ag71xx_desc 	*desc;
++	struct ag71xx_desc	*desc;
 +	dma_addr_t		dma_addr;
-+	u32			pad;
++	unsigned long		timestamp;
 +};
 +
 +struct ag71xx_ring {
@@ -12322,8 +19275,6 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +
 +struct ag71xx_debug {
 +	struct dentry		*debugfs_dir;
-+	struct dentry		*debugfs_int_stats;
-+	struct dentry		*debugfs_napi_stats;
 +
 +	struct ag71xx_int_stats int_stats;
 +	struct ag71xx_napi_stats napi_stats;
@@ -12339,17 +19290,22 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +	struct napi_struct	napi;
 +	u32			msg_enable;
 +
++	struct ag71xx_desc	*stop_desc;
++	dma_addr_t		stop_desc_dma;
++
 +	struct ag71xx_ring	rx_ring;
 +	struct ag71xx_ring	tx_ring;
 +
 +	struct mii_bus		*mii_bus;
 +	struct phy_device	*phy_dev;
++	void			*phy_priv;
 +
 +	unsigned int		link;
 +	unsigned int		speed;
-+	int 			duplex;
++	int			duplex;
 +
 +	struct work_struct	restart_work;
++	struct delayed_work	link_work;
 +	struct timer_list	oom_timer;
 +
 +#ifdef CONFIG_AG71XX_DEBUG_FS
@@ -12375,12 +19331,12 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +
 +static inline int ag71xx_desc_empty(struct ag71xx_desc *desc)
 +{
-+	return ((desc->ctrl & DESC_EMPTY) != 0);
++	return (desc->ctrl & DESC_EMPTY) != 0;
 +}
 +
 +static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
 +{
-+	return (desc->ctrl & DESC_PKTLEN_M);
++	return desc->ctrl & DESC_PKTLEN_M;
 +}
 +
 +/* Register offsets */
@@ -12422,6 +19378,10 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +#define AG71XX_REG_INT_ENABLE	0x0198
 +#define AG71XX_REG_INT_STATUS	0x019c
 +
++#define AG71XX_REG_FIFO_DEPTH	0x01a8
++#define AG71XX_REG_RX_SM	0x01b0
++#define AG71XX_REG_TX_SM	0x01b4
++
 +#define MAC_CFG1_TXE		BIT(0)	/* Tx Enable */
 +#define MAC_CFG1_STX		BIT(1)	/* Synchronize Tx Enable */
 +#define MAC_CFG1_RXE		BIT(2)	/* Rx Enable */
@@ -12537,6 +19497,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +	switch (reg) {
 +	case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
 +	case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
++	case AG71XX_REG_MII_CFG:
 +		break;
 +
 +	default:
@@ -12617,7 +19578,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +	return __raw_readl(ag->mii_ctrl);
 +}
 +
-+static void inline ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
++static inline void ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
 +					  unsigned int mii_if)
 +{
 +	u32 t;
@@ -12628,7 +19589,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +	ag71xx_mii_ctrl_wr(ag, t);
 +}
 +
-+static void inline ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
++static inline void ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
 +					     unsigned int speed)
 +{
 +	u32 t;
@@ -12683,335 +19644,24 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx.h linux-2.6.39/drivers/net
 +						    int rx, int tx) {}
 +#endif /* CONFIG_AG71XX_DEBUG_FS */
 +
-+#endif /* _AG71XX_H */
-diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ar8216.c linux-2.6.39/drivers/net/ag71xx/ag71xx_ar8216.c
---- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ar8216.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx_ar8216.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,44 @@
-+/*
-+ *  Atheros AR71xx built-in ethernet mac driver
-+ *  Special support for the Atheros ar8216 switch chip
-+ *
-+ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  Based on Atheros' AG7100 driver
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
++void ag71xx_ar7240_start(struct ag71xx *ag);
++void ag71xx_ar7240_stop(struct ag71xx *ag);
++int ag71xx_ar7240_init(struct ag71xx *ag);
++void ag71xx_ar7240_cleanup(struct ag71xx *ag);
 +
-+#include "ag71xx.h"
++int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg);
++void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val);
 +
-+#define AR8216_PACKET_TYPE_MASK		0xf
-+#define AR8216_PACKET_TYPE_NORMAL	0
-+
-+#define AR8216_HEADER_LEN	2
-+
-+void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb)
-+{
-+	skb_push(skb, AR8216_HEADER_LEN);
-+	skb->data[0] = 0x10;
-+	skb->data[1] = 0x80;
-+}
-+
-+int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb,
-+				int pktlen)
-+{
-+	u8 type;
-+
-+	type = skb->data[1] & AR8216_PACKET_TYPE_MASK;
-+	switch (type) {
-+	case AR8216_PACKET_TYPE_NORMAL:
-+		break;
-+
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	skb_pull(skb, AR8216_HEADER_LEN);
-+	return 0;
-+}
-diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_debugfs.c linux-2.6.39/drivers/net/ag71xx/ag71xx_debugfs.c
---- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_debugfs.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx_debugfs.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,197 @@
-+/*
-+ *  Atheros AR71xx built-in ethernet mac driver
-+ *
-+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Based on Atheros' AG7100 driver
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include <linux/debugfs.h>
-+
-+#include "ag71xx.h"
-+
-+static struct dentry *ag71xx_debugfs_root;
-+
-+static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file)
-+{
-+	file->private_data = inode->i_private;
-+	return 0;
-+}
-+
-+void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status)
-+{
-+	if (status)
-+		ag->debug.int_stats.total++;
-+	if (status & AG71XX_INT_TX_PS)
-+		ag->debug.int_stats.tx_ps++;
-+	if (status & AG71XX_INT_TX_UR)
-+		ag->debug.int_stats.tx_ur++;
-+	if (status & AG71XX_INT_TX_BE)
-+		ag->debug.int_stats.tx_be++;
-+	if (status & AG71XX_INT_RX_PR)
-+		ag->debug.int_stats.rx_pr++;
-+	if (status & AG71XX_INT_RX_OF)
-+		ag->debug.int_stats.rx_of++;
-+	if (status & AG71XX_INT_RX_BE)
-+		ag->debug.int_stats.rx_be++;
-+}
-+
-+static ssize_t read_file_int_stats(struct file *file, char __user *user_buf,
-+				   size_t count, loff_t *ppos)
-+{
-+#define PR_INT_STAT(_label, _field) 					\
-+	len += snprintf(buf + len, sizeof(buf) - len, 			\
-+		"%20s: %10lu\n", _label, ag->debug.int_stats._field);
-+
-+	struct ag71xx *ag = file->private_data;
-+	char buf[256];
-+	unsigned int len = 0;
-+
-+	PR_INT_STAT("TX Packet Sent", tx_ps);
-+	PR_INT_STAT("TX Underrun", tx_ur);
-+	PR_INT_STAT("TX Bus Error", tx_be);
-+	PR_INT_STAT("RX Packet Received", rx_pr);
-+	PR_INT_STAT("RX Overflow", rx_of);
-+	PR_INT_STAT("RX Bus Error", rx_be);
-+	len += snprintf(buf + len, sizeof(buf) - len, "\n");
-+	PR_INT_STAT("Total", total);
++u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr,
++		      unsigned reg_addr);
++int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr,
++		       unsigned reg_addr, u16 reg_val);
 +
-+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
-+#undef PR_INT_STAT
-+}
-+
-+static const struct file_operations ag71xx_fops_int_stats = {
-+	.open	= ag71xx_debugfs_generic_open,
-+	.read	= read_file_int_stats,
-+	.owner	= THIS_MODULE
-+};
-+
-+void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx)
-+{
-+	struct ag71xx_napi_stats *stats = &ag->debug.napi_stats;
-+
-+	if (rx) {
-+		stats->rx_count++;
-+		stats->rx_packets += rx;
-+		if (rx <= AG71XX_NAPI_WEIGHT)
-+			stats->rx[rx]++;
-+		if (rx > stats->rx_packets_max)
-+			stats->rx_packets_max = rx;
-+	}
-+
-+	if (tx) {
-+		stats->tx_count++;
-+		stats->tx_packets += tx;
-+		if (tx <= AG71XX_NAPI_WEIGHT)
-+			stats->tx[tx]++;
-+		if (tx > stats->tx_packets_max)
-+			stats->tx_packets_max = tx;
-+	}
-+}
-+
-+static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf,
-+				    size_t count, loff_t *ppos)
-+{
-+	struct ag71xx *ag = file->private_data;
-+	struct ag71xx_napi_stats *stats = &ag->debug.napi_stats;
-+	char buf[2048];
-+	unsigned int len = 0;
-+	unsigned long rx_avg = 0;
-+	unsigned long tx_avg = 0;
-+	int i;
-+
-+	if (stats->rx_count)
-+		rx_avg = stats->rx_packets / stats->rx_count;
-+
-+	if (stats->tx_count)
-+		tx_avg = stats->tx_packets / stats->tx_count;
-+
-+	len += snprintf(buf + len, sizeof(buf) - len, "%3s  %10s %10s\n",
-+			"len", "rx", "tx");
-+
-+	for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++)
-+		len += snprintf(buf + len, sizeof(buf) - len,
-+				"%3d: %10lu %10lu\n",
-+				i, stats->rx[i], stats->tx[i]);
-+
-+	len += snprintf(buf + len, sizeof(buf) - len, "\n");
-+
-+	len += snprintf(buf + len, sizeof(buf) - len, "%3s: %10lu %10lu\n",
-+			"sum", stats->rx_count, stats->tx_count);
-+	len += snprintf(buf + len, sizeof(buf) - len, "%3s: %10lu %10lu\n",
-+			"avg", rx_avg, tx_avg);
-+	len += snprintf(buf + len, sizeof(buf) - len, "%3s: %10lu %10lu\n",
-+			"max", stats->rx_packets_max, stats->tx_packets_max);
-+	len += snprintf(buf + len, sizeof(buf) - len, "%3s: %10lu %10lu\n",
-+			"pkt", stats->rx_packets, stats->tx_packets);
-+
-+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);
-+}
-+
-+static const struct file_operations ag71xx_fops_napi_stats = {
-+	.open	= ag71xx_debugfs_generic_open,
-+	.read	= read_file_napi_stats,
-+	.owner	= THIS_MODULE
-+};
-+
-+void ag71xx_debugfs_exit(struct ag71xx *ag)
-+{
-+	debugfs_remove(ag->debug.debugfs_napi_stats);
-+	debugfs_remove(ag->debug.debugfs_int_stats);
-+	debugfs_remove(ag->debug.debugfs_dir);
-+}
-+
-+int ag71xx_debugfs_init(struct ag71xx *ag)
-+{
-+	ag->debug.debugfs_dir = debugfs_create_dir(ag->dev->name,
-+						   ag71xx_debugfs_root);
-+	if (!ag->debug.debugfs_dir)
-+		goto err;
-+
-+	ag->debug.debugfs_int_stats =
-+			debugfs_create_file("int_stats",
-+					    S_IRUGO,
-+					    ag->debug.debugfs_dir,
-+					    ag,
-+					    &ag71xx_fops_int_stats);
-+	if (!ag->debug.debugfs_int_stats)
-+		goto err;
-+
-+	ag->debug.debugfs_napi_stats =
-+			debugfs_create_file("napi_stats",
-+					    S_IRUGO,
-+					    ag->debug.debugfs_dir,
-+					    ag,
-+					    &ag71xx_fops_napi_stats);
-+	if (!ag->debug.debugfs_napi_stats)
-+		goto err;
-+
-+	return 0;
-+
-+ err:
-+	ag71xx_debugfs_exit(ag);
-+	return -ENOMEM;
-+}
-+
-+int ag71xx_debugfs_root_init(void)
-+{
-+	if (ag71xx_debugfs_root)
-+		return -EBUSY;
-+
-+	ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
-+	if (!ag71xx_debugfs_root)
-+		return -ENOENT;
-+
-+	return 0;
-+}
-+
-+void ag71xx_debugfs_root_exit(void)
-+{
-+	debugfs_remove(ag71xx_debugfs_root);
-+	ag71xx_debugfs_root = NULL;
-+}
-diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ethtool.c linux-2.6.39/drivers/net/ag71xx/ag71xx_ethtool.c
---- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_ethtool.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx_ethtool.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,71 @@
-+/*
-+ *  Atheros AR71xx built-in ethernet mac driver
-+ *
-+ *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ *  Based on Atheros' AG7100 driver
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ */
-+
-+#include "ag71xx.h"
-+
-+static int ag71xx_ethtool_get_settings(struct net_device *dev,
-+				       struct ethtool_cmd *cmd)
-+{
-+	struct ag71xx *ag = netdev_priv(dev);
-+	struct phy_device *phydev = ag->phy_dev;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_gset(phydev, cmd);
-+}
-+
-+static int ag71xx_ethtool_set_settings(struct net_device *dev,
-+				       struct ethtool_cmd *cmd)
-+{
-+	struct ag71xx *ag = netdev_priv(dev);
-+	struct phy_device *phydev = ag->phy_dev;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_sset(phydev, cmd);
-+}
-+
-+static void ag71xx_ethtool_get_drvinfo(struct net_device *dev,
-+				       struct ethtool_drvinfo *info)
-+{
-+	struct ag71xx *ag = netdev_priv(dev);
-+
-+	strcpy(info->driver, ag->pdev->dev.driver->name);
-+	strcpy(info->version, AG71XX_DRV_VERSION);
-+	strcpy(info->bus_info, dev_name(&ag->pdev->dev));
-+}
-+
-+static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev)
-+{
-+	struct ag71xx *ag = netdev_priv(dev);
-+
-+	return ag->msg_enable;
-+}
-+
-+static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level)
-+{
-+	struct ag71xx *ag = netdev_priv(dev);
-+
-+	ag->msg_enable = msg_level;
-+}
-+
-+struct ethtool_ops ag71xx_ethtool_ops = {
-+	.set_settings	= ag71xx_ethtool_set_settings,
-+	.get_settings	= ag71xx_ethtool_get_settings,
-+	.get_drvinfo	= ag71xx_ethtool_get_drvinfo,
-+	.get_msglevel	= ag71xx_ethtool_get_msglevel,
-+	.set_msglevel	= ag71xx_ethtool_set_msglevel,
-+	.get_link	= ethtool_op_get_link,
-+};
++#endif /* _AG71XX_H */
 diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/drivers/net/ag71xx/ag71xx_main.c
 --- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx_main.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,1184 @@
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_main.c	2011-08-22 07:40:12.160480642 +0200
+@@ -0,0 +1,1291 @@
 +/*
 + *  Atheros AR71xx built-in ethernet mac driver
 + *
@@ -13028,14 +19678,14 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +#include "ag71xx.h"
 +
 +#define AG71XX_DEFAULT_MSG_ENABLE	\
-+	( NETIF_MSG_DRV 		\
++	(NETIF_MSG_DRV			\
 +	| NETIF_MSG_PROBE		\
 +	| NETIF_MSG_LINK		\
 +	| NETIF_MSG_TIMER		\
 +	| NETIF_MSG_IFDOWN		\
 +	| NETIF_MSG_IFUP		\
 +	| NETIF_MSG_RX_ERR		\
-+	| NETIF_MSG_TX_ERR )
++	| NETIF_MSG_TX_ERR)
 +
 +static int ag71xx_msg_level = -1;
 +
@@ -13104,7 +19754,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +				  ring->descs_cpu, ring->descs_dma);
 +}
 +
-+static int ag71xx_ring_alloc(struct ag71xx_ring *ring, unsigned int size)
++static int ag71xx_ring_alloc(struct ag71xx_ring *ring)
 +{
 +	int err;
 +	int i;
@@ -13117,30 +19767,30 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +		ring->desc_size = roundup(ring->desc_size, cache_line_size());
 +	}
 +
-+	ring->descs_cpu = dma_alloc_coherent(NULL, size * ring->desc_size,
++	ring->descs_cpu = dma_alloc_coherent(NULL, ring->size * ring->desc_size,
 +					     &ring->descs_dma, GFP_ATOMIC);
 +	if (!ring->descs_cpu) {
 +		err = -ENOMEM;
 +		goto err;
 +	}
 +
-+	ring->size = size;
 +
-+	ring->buf = kzalloc(size * sizeof(*ring->buf), GFP_KERNEL);
++	ring->buf = kzalloc(ring->size * sizeof(*ring->buf), GFP_KERNEL);
 +	if (!ring->buf) {
 +		err = -ENOMEM;
 +		goto err;
 +	}
 +
-+	for (i = 0; i < size; i++) {
-+		ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[i * ring->desc_size];
++	for (i = 0; i < ring->size; i++) {
++		int idx = i * ring->desc_size;
++		ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx];
 +		DBG("ag71xx: ring %p, desc %d at %p\n",
 +			ring, i, ring->buf[i].desc);
 +	}
 +
 +	return 0;
 +
-+ err:
++err:
 +	return err;
 +}
 +
@@ -13150,7 +19800,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	struct net_device *dev = ag->dev;
 +
 +	while (ring->curr != ring->dirty) {
-+		u32 i = ring->dirty % AG71XX_TX_RING_SIZE;
++		u32 i = ring->dirty % ring->size;
 +
 +		if (!ag71xx_desc_empty(ring->buf[i].desc)) {
 +			ring->buf[i].desc->ctrl = 0;
@@ -13175,9 +19825,9 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	struct ag71xx_ring *ring = &ag->tx_ring;
 +	int i;
 +
-+	for (i = 0; i < AG71XX_TX_RING_SIZE; i++) {
++	for (i = 0; i < ring->size; i++) {
 +		ring->buf[i].desc->next = (u32) (ring->descs_dma +
-+			ring->desc_size * ((i + 1) % AG71XX_TX_RING_SIZE));
++			ring->desc_size * ((i + 1) % ring->size));
 +
 +		ring->buf[i].desc->ctrl = DESC_EMPTY;
 +		ring->buf[i].skb = NULL;
@@ -13198,7 +19848,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	if (!ring->buf)
 +		return;
 +
-+	for (i = 0; i < AG71XX_RX_RING_SIZE; i++)
++	for (i = 0; i < ring->size; i++)
 +		if (ring->buf[i].skb) {
 +			dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr,
 +					 AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE);
@@ -13232,16 +19882,16 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	int ret;
 +
 +	ret = 0;
-+	for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
++	for (i = 0; i < ring->size; i++) {
 +		ring->buf[i].desc->next = (u32) (ring->descs_dma +
-+			ring->desc_size * ((i + 1) % AG71XX_RX_RING_SIZE));
++			ring->desc_size * ((i + 1) % ring->size));
 +
 +		DBG("ag71xx: RX desc at %p, next is %08x\n",
 +			ring->buf[i].desc,
 +			ring->buf[i].desc->next);
 +	}
 +
-+	for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
++	for (i = 0; i < ring->size; i++) {
 +		struct sk_buff *skb;
 +		dma_addr_t dma_addr;
 +
@@ -13282,7 +19932,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	for (; ring->curr - ring->dirty > 0; ring->dirty++) {
 +		unsigned int i;
 +
-+		i = ring->dirty % AG71XX_RX_RING_SIZE;
++		i = ring->dirty % ring->size;
 +
 +		if (ring->buf[i].skb == NULL) {
 +			dma_addr_t dma_addr;
@@ -13320,13 +19970,13 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +{
 +	int ret;
 +
-+	ret = ag71xx_ring_alloc(&ag->tx_ring, AG71XX_TX_RING_SIZE);
++	ret = ag71xx_ring_alloc(&ag->tx_ring);
 +	if (ret)
 +		return ret;
 +
 +	ag71xx_ring_tx_init(ag);
 +
-+	ret = ag71xx_ring_alloc(&ag->rx_ring, AG71XX_RX_RING_SIZE);
++	ret = ag71xx_ring_alloc(&ag->rx_ring);
 +	if (ret)
 +		return ret;
 +
@@ -13357,93 +20007,6 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	return "?";
 +}
 +
-+void ag71xx_link_adjust(struct ag71xx *ag)
-+{
-+	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
-+	u32 cfg2;
-+	u32 ifctl;
-+	u32 fifo5;
-+	u32 mii_speed;
-+
-+	if (!ag->link) {
-+		netif_carrier_off(ag->dev);
-+		if (netif_msg_link(ag))
-+			printk(KERN_INFO "%s: link down\n", ag->dev->name);
-+		return;
-+	}
-+
-+	cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
-+	cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
-+	cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
-+
-+	ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
-+	ifctl &= ~(MAC_IFCTL_SPEED);
-+
-+	fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
-+	fifo5 &= ~FIFO_CFG5_BM;
-+
-+	switch (ag->speed) {
-+	case SPEED_1000:
-+		mii_speed =  MII_CTRL_SPEED_1000;
-+		cfg2 |= MAC_CFG2_IF_1000;
-+		fifo5 |= FIFO_CFG5_BM;
-+		break;
-+	case SPEED_100:
-+		mii_speed = MII_CTRL_SPEED_100;
-+		cfg2 |= MAC_CFG2_IF_10_100;
-+		ifctl |= MAC_IFCTL_SPEED;
-+		break;
-+	case SPEED_10:
-+		mii_speed = MII_CTRL_SPEED_10;
-+		cfg2 |= MAC_CFG2_IF_10_100;
-+		break;
-+	default:
-+		BUG();
-+		return;
-+	}
-+
-+	if (pdata->is_ar91xx)
-+		ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
-+	else if (pdata->is_ar724x)
-+		ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
-+	else
-+		ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
-+
-+	if (pdata->set_pll)
-+		pdata->set_pll(ag->speed);
-+
-+	ag71xx_mii_ctrl_set_speed(ag, mii_speed);
-+
-+	ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
-+	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
-+	ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
-+
-+	netif_carrier_on(ag->dev);
-+	if (netif_msg_link(ag))
-+		printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
-+			ag->dev->name,
-+			ag71xx_speed_str(ag),
-+			(DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
-+
-+	DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
-+		ag->dev->name,
-+		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
-+		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
-+		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
-+
-+	DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
-+		ag->dev->name,
-+		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
-+		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
-+		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
-+
-+	DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
-+		ag->dev->name,
-+		ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
-+		ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
-+		ag71xx_mii_ctrl_rr(ag));
-+}
-+
 +static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
 +{
 +	u32 t;
@@ -13468,9 +20031,15 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
 +	ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
 +
++	/*
++	 * give the hardware some time to really stop all rx/tx activity
++	 * clearing the descriptors too early causes random memory corruption
++	 */
++	mdelay(1);
++
 +	/* clear descriptor addresses */
-+	ag71xx_wr(ag, AG71XX_REG_TX_DESC, 0);
-+	ag71xx_wr(ag, AG71XX_REG_RX_DESC, 0);
++	ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma);
++	ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma);
 +
 +	/* clear pending RX/TX interrupts */
 +	for (i = 0; i < 256; i++) {
@@ -13518,24 +20087,20 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +			 FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \
 +			 FIFO_CFG5_17 | FIFO_CFG5_SF)
 +
-+static void ag71xx_hw_init(struct ag71xx *ag)
++static void ag71xx_hw_stop(struct ag71xx *ag)
 +{
-+	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
-+
-+	ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
-+	udelay(20);
++	/* disable all interrupts and stop the rx/tx engine */
++	ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0);
++	ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
++	ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
++}
 +
-+	ar71xx_device_stop(pdata->reset_bit);
-+	mdelay(100);
-+	ar71xx_device_start(pdata->reset_bit);
-+	mdelay(100);
++static void ag71xx_hw_setup(struct ag71xx *ag)
++{
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 +
 +	/* setup MAC configuration registers */
-+	if (pdata->is_ar724x)
-+		ag71xx_wr(ag, AG71XX_REG_MAC_CFG1,
-+			  MAC_CFG1_INIT | MAC_CFG1_TFC | MAC_CFG1_RFC);
-+	else
-+		ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
++	ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
 +
 +	ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
 +		  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
@@ -13557,8 +20122,67 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	}
 +	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT);
 +	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT);
++}
++
++static void ag71xx_hw_init(struct ag71xx *ag)
++{
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
++	u32 reset_mask = pdata->reset_bit;
++
++	ag71xx_hw_stop(ag);
++
++	if (pdata->is_ar724x) {
++		u32 reset_phy = reset_mask;
++
++		reset_phy &= RESET_MODULE_GE0_PHY | RESET_MODULE_GE1_PHY;
++		reset_mask &= ~(RESET_MODULE_GE0_PHY | RESET_MODULE_GE1_PHY);
++
++		ar71xx_device_stop(reset_phy);
++		mdelay(50);
++		ar71xx_device_start(reset_phy);
++		mdelay(200);
++	}
++
++	ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
++	udelay(20);
++
++	ar71xx_device_stop(reset_mask);
++	mdelay(100);
++	ar71xx_device_start(reset_mask);
++	mdelay(200);
++
++	ag71xx_hw_setup(ag);
++
++	ag71xx_dma_reset(ag);
++}
++
++static void ag71xx_fast_reset(struct ag71xx *ag)
++{
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
++	struct net_device *dev = ag->dev;
++	u32 reset_mask = pdata->reset_bit;
++	u32 rx_ds, tx_ds;
++	u32 mii_reg;
++
++	reset_mask &= RESET_MODULE_GE0_MAC | RESET_MODULE_GE1_MAC;
++
++	mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG);
++	rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC);
++	tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC);
++
++	ar71xx_device_stop(reset_mask);
++	udelay(10);
++	ar71xx_device_start(reset_mask);
++	udelay(10);
 +
 +	ag71xx_dma_reset(ag);
++	ag71xx_hw_setup(ag);
++
++	ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds);
++	ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds);
++	ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg);
++
++	ag71xx_hw_set_macaddr(ag, dev->dev_addr);
 +}
 +
 +static void ag71xx_hw_start(struct ag71xx *ag)
@@ -13570,12 +20194,96 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT);
 +}
 +
-+static void ag71xx_hw_stop(struct ag71xx *ag)
++void ag71xx_link_adjust(struct ag71xx *ag)
 +{
-+	/* disable all interrupts */
-+	ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0);
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
++	u32 cfg2;
++	u32 ifctl;
++	u32 fifo5;
++	u32 mii_speed;
 +
-+	ag71xx_dma_reset(ag);
++	if (!ag->link) {
++		ag71xx_hw_stop(ag);
++		netif_carrier_off(ag->dev);
++		if (netif_msg_link(ag))
++			printk(KERN_INFO "%s: link down\n", ag->dev->name);
++		return;
++	}
++
++	if (pdata->is_ar724x)
++		ag71xx_fast_reset(ag);
++
++	cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
++	cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
++	cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
++
++	ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
++	ifctl &= ~(MAC_IFCTL_SPEED);
++
++	fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
++	fifo5 &= ~FIFO_CFG5_BM;
++
++	switch (ag->speed) {
++	case SPEED_1000:
++		mii_speed =  MII_CTRL_SPEED_1000;
++		cfg2 |= MAC_CFG2_IF_1000;
++		fifo5 |= FIFO_CFG5_BM;
++		break;
++	case SPEED_100:
++		mii_speed = MII_CTRL_SPEED_100;
++		cfg2 |= MAC_CFG2_IF_10_100;
++		ifctl |= MAC_IFCTL_SPEED;
++		break;
++	case SPEED_10:
++		mii_speed = MII_CTRL_SPEED_10;
++		cfg2 |= MAC_CFG2_IF_10_100;
++		break;
++	default:
++		BUG();
++		return;
++	}
++
++	if (pdata->is_ar91xx)
++		ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
++	else if (pdata->is_ar724x)
++		ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
++	else
++		ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
++
++	if (pdata->set_pll)
++		pdata->set_pll(ag->speed);
++
++	ag71xx_mii_ctrl_set_speed(ag, mii_speed);
++
++	ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
++	ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
++	ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
++	ag71xx_hw_start(ag);
++
++	netif_carrier_on(ag->dev);
++	if (netif_msg_link(ag))
++		printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
++			ag->dev->name,
++			ag71xx_speed_str(ag),
++			(DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
++
++	DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
++		ag->dev->name,
++		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
++		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
++		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
++
++	DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
++		ag->dev->name,
++		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
++		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
++		ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
++
++	DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
++		ag->dev->name,
++		ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
++		ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
++		ag71xx_mii_ctrl_rr(ag));
 +}
 +
 +static int ag71xx_open(struct net_device *dev)
@@ -13597,13 +20305,11 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +	ag71xx_hw_set_macaddr(ag, dev->dev_addr);
 +
-+	ag71xx_hw_start(ag);
-+
 +	netif_start_queue(dev);
 +
 +	return 0;
 +
-+ err:
++err:
 +	ag71xx_rings_cleanup(ag);
 +	return ret;
 +}
@@ -13621,6 +20327,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	netif_stop_queue(dev);
 +
 +	ag71xx_hw_stop(ag);
++	ag71xx_dma_reset(ag);
 +
 +	napi_disable(&ag->napi);
 +	del_timer_sync(&ag->oom_timer);
@@ -13641,7 +20348,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	dma_addr_t dma_addr;
 +	int i;
 +
-+	i = ring->curr % AG71XX_TX_RING_SIZE;
++	i = ring->curr % ring->size;
 +	desc = ring->buf[i].desc;
 +
 +	if (!ag71xx_desc_empty(desc))
@@ -13659,6 +20366,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +				  DMA_TO_DEVICE);
 +
 +	ring->buf[i].skb = skb;
++	ring->buf[i].timestamp = jiffies;
 +
 +	/* setup descriptor fields */
 +	desc->data = (u32) dma_addr;
@@ -13668,7 +20376,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	wmb();
 +
 +	ring->curr++;
-+	if (ring->curr == (ring->dirty + AG71XX_TX_THRES_STOP)) {
++	if (ring->curr == (ring->dirty + ring->size)) {
 +		DBG("%s: tx queue full\n", ag->dev->name);
 +		netif_stop_queue(dev);
 +	}
@@ -13680,7 +20388,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +	return NETDEV_TX_OK;
 +
-+ err_drop:
++err_drop:
 +	dev->stats.tx_dropped++;
 +
 +	dev_kfree_skb(skb);
@@ -13689,7 +20397,6 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 +{
-+	struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
 +	struct ag71xx *ag = netdev_priv(dev);
 +	int ret;
 +
@@ -13721,7 +20428,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +		if (ag->phy_dev == NULL)
 +			break;
 +
-+		return phy_mii_ioctl(ag->phy_dev, data, cmd);
++		return phy_mii_ioctl(ag->phy_dev, ifr, cmd);
 +
 +	default:
 +		break;
@@ -13752,25 +20459,59 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +{
 +	struct ag71xx *ag = container_of(work, struct ag71xx, restart_work);
 +
++	if (ag71xx_get_pdata(ag)->is_ar724x) {
++		ag->link = 0;
++		ag71xx_link_adjust(ag);
++		return;
++	}
++
 +	ag71xx_stop(ag->dev);
 +	ag71xx_open(ag->dev);
 +}
 +
++static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp)
++{
++	u32 rx_sm, tx_sm, rx_fd;
++
++	if (likely(time_before(jiffies, timestamp + HZ/10)))
++		return false;
++
++	if (!netif_carrier_ok(ag->dev))
++		return false;
++
++	rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM);
++	if ((rx_sm & 0x7) == 0x3 && ((rx_sm >> 4) & 0x7) == 0x6)
++		return true;
++
++	tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM);
++	rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH);
++	if (((tx_sm >> 4) & 0x7) == 0 && ((rx_sm & 0x7) == 0) &&
++	    ((rx_sm >> 4) & 0x7) == 0 && rx_fd == 0)
++		return true;
++
++	return false;
++}
++
 +static int ag71xx_tx_packets(struct ag71xx *ag)
 +{
 +	struct ag71xx_ring *ring = &ag->tx_ring;
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 +	int sent;
 +
 +	DBG("%s: processing TX ring\n", ag->dev->name);
 +
 +	sent = 0;
 +	while (ring->dirty != ring->curr) {
-+		unsigned int i = ring->dirty % AG71XX_TX_RING_SIZE;
++		unsigned int i = ring->dirty % ring->size;
 +		struct ag71xx_desc *desc = ring->buf[i].desc;
 +		struct sk_buff *skb = ring->buf[i].skb;
 +
-+		if (!ag71xx_desc_empty(desc))
++		if (!ag71xx_desc_empty(desc)) {
++			if (pdata->is_ar7240 &&
++			    ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp))
++				schedule_work(&ag->restart_work);
 +			break;
++		}
 +
 +		ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
 +
@@ -13786,7 +20527,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +	DBG("%s: %d packets sent out\n", ag->dev->name, sent);
 +
-+	if ((ring->curr - ring->dirty) < AG71XX_TX_THRES_WAKEUP)
++	if ((ring->curr - ring->dirty) < (ring->size * 3) / 4)
 +		netif_wake_queue(ag->dev);
 +
 +	return sent;
@@ -13802,7 +20543,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +			dev->name, limit, ring->curr, ring->dirty);
 +
 +	while (done < limit) {
-+		unsigned int i = ring->curr % AG71XX_RX_RING_SIZE;
++		unsigned int i = ring->curr % ring->size;
 +		struct ag71xx_desc *desc = ring->buf[i].desc;
 +		struct sk_buff *skb;
 +		int pktlen;
@@ -13811,7 +20552,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +		if (ag71xx_desc_empty(desc))
 +			break;
 +
-+		if ((ring->dirty + AG71XX_RX_RING_SIZE) == ring->curr) {
++		if ((ring->dirty + ring->size) == ring->curr) {
 +			ag71xx_assert(0);
 +			break;
 +		}
@@ -13881,7 +20622,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done);
 +
 +	rx_ring = &ag->rx_ring;
-+	if (rx_ring->buf[rx_ring->dirty % AG71XX_RX_RING_SIZE].skb == NULL)
++	if (rx_ring->buf[rx_ring->dirty % rx_ring->size].skb == NULL)
 +		goto oom;
 +
 +	status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS);
@@ -13913,12 +20654,12 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +		return rx_done;
 +	}
 +
-+ more:
++more:
 +	DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n",
 +			dev->name, rx_done, tx_done, limit);
 +	return rx_done;
 +
-+ oom:
++oom:
 +	if (netif_msg_rx_err(ag))
 +		printk(KERN_DEBUG "%s: out of memory\n", dev->name);
 +
@@ -13995,7 +20736,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +#endif
 +};
 +
-+static int __init ag71xx_probe(struct platform_device *pdev)
++static int __devinit ag71xx_probe(struct platform_device *pdev)
 +{
 +	struct net_device *dev;
 +	struct resource *res;
@@ -14062,7 +20803,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +	dev->irq = platform_get_irq(pdev, 0);
 +	err = request_irq(dev->irq, ag71xx_interrupt,
-+			  IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
++			  IRQF_DISABLED,
 +			  dev->name, dev);
 +	if (err) {
 +		dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq);
@@ -14079,6 +20820,19 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	ag->oom_timer.data = (unsigned long) dev;
 +	ag->oom_timer.function = ag71xx_oom_timer_handler;
 +
++	ag->tx_ring.size = AG71XX_TX_RING_SIZE_DEFAULT;
++	ag->rx_ring.size = AG71XX_RX_RING_SIZE_DEFAULT;
++
++	ag->stop_desc = dma_alloc_coherent(NULL,
++		sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL);
++
++	if (!ag->stop_desc)
++		goto err_free_irq;
++
++	ag->stop_desc->data = 0;
++	ag->stop_desc->ctrl = 0;
++	ag->stop_desc->next = (u32) ag->stop_desc_dma;
++
 +	memcpy(dev->dev_addr, pdata->mac_addr, ETH_ALEN);
 +
 +	netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT);
@@ -14086,7 +20840,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +	err = register_netdev(dev);
 +	if (err) {
 +		dev_err(&pdev->dev, "unable to register net device\n");
-+		goto err_free_irq;
++		goto err_free_desc;
 +	}
 +
 +	printk(KERN_INFO "%s: Atheros AG71xx at 0x%08lx, irq %d\n",
@@ -14110,24 +20864,27 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +	return 0;
 +
-+ err_phy_disconnect:
++err_phy_disconnect:
 +	ag71xx_phy_disconnect(ag);
-+ err_unregister_netdev:
++err_unregister_netdev:
 +	unregister_netdev(dev);
-+ err_free_irq:
++err_free_desc:
++	dma_free_coherent(NULL, sizeof(struct ag71xx_desc), ag->stop_desc,
++			  ag->stop_desc_dma);
++err_free_irq:
 +	free_irq(dev->irq, dev);
-+ err_unmap_mii_ctrl:
++err_unmap_mii_ctrl:
 +	iounmap(ag->mii_ctrl);
-+ err_unmap_base:
++err_unmap_base:
 +	iounmap(ag->mac_base);
-+ err_free_dev:
++err_free_dev:
 +	kfree(dev);
-+ err_out:
++err_out:
 +	platform_set_drvdata(pdev, NULL);
 +	return err;
 +}
 +
-+static int __exit ag71xx_remove(struct platform_device *pdev)
++static int __devexit ag71xx_remove(struct platform_device *pdev)
 +{
 +	struct net_device *dev = platform_get_drvdata(pdev);
 +
@@ -14173,11 +20930,11 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +
 +	return 0;
 +
-+ err_mdio_exit:
++err_mdio_exit:
 +	ag71xx_mdio_driver_exit();
-+ err_debugfs_exit:
++err_debugfs_exit:
 +	ag71xx_debugfs_root_exit();
-+ err_out:
++err_out:
 +	return ret;
 +}
 +
@@ -14198,8 +20955,8 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_main.c linux-2.6.39/driver
 +MODULE_ALIAS("platform:" AG71XX_DRV_NAME);
 diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/drivers/net/ag71xx/ag71xx_mdio.c
 --- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx_mdio.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,243 @@
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_mdio.c	2011-04-27 12:19:22.257663952 +0200
+@@ -0,0 +1,248 @@
 +/*
 + *  Atheros AR71xx built-in ethernet mac driver
 + *
@@ -14249,7 +21006,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/driver
 +		ag71xx_mdio_rr(am, AG71XX_REG_MII_IND));
 +}
 +
-+static int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
++int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
 +{
 +	int ret;
 +	int i;
@@ -14275,12 +21032,11 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/driver
 +
 +	DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret);
 +
-+ out:
++out:
 +	return ret;
 +}
 +
-+static void ag71xx_mdio_mii_write(struct ag71xx_mdio *am,
-+				  int addr, int reg, u16 val)
++void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val)
 +{
 +	int i;
 +
@@ -14324,18 +21080,24 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/driver
 +{
 +	struct ag71xx_mdio *am = bus->priv;
 +
-+	return ag71xx_mdio_mii_read(am, addr, reg);
++	if (am->pdata->is_ar7240)
++		return ar7240sw_phy_read(bus, addr, reg);
++	else
++		return ag71xx_mdio_mii_read(am, addr, reg);
 +}
 +
 +static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
 +{
 +	struct ag71xx_mdio *am = bus->priv;
 +
-+	ag71xx_mdio_mii_write(am, addr, reg, val);
++	if (am->pdata->is_ar7240)
++		ar7240sw_phy_write(bus, addr, reg, val);
++	else
++		ag71xx_mdio_mii_write(am, addr, reg, val);
 +	return 0;
 +}
 +
-+static int __init ag71xx_mdio_probe(struct platform_device *pdev)
++static int __devinit ag71xx_mdio_probe(struct platform_device *pdev)
 +{
 +	struct ag71xx_mdio_platform_data *pdata;
 +	struct ag71xx_mdio *am;
@@ -14401,17 +21163,17 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/driver
 +	platform_set_drvdata(pdev, am);
 +	return 0;
 +
-+ err_free_bus:
++err_free_bus:
 +	mdiobus_free(am->mii_bus);
-+ err_iounmap:
++err_iounmap:
 +	iounmap(am->mdio_base);
-+ err_free_mdio:
++err_free_mdio:
 +	kfree(am);
-+ err_out:
++err_out:
 +	return err;
 +}
 +
-+static int __exit ag71xx_mdio_remove(struct platform_device *pdev)
++static int __devexit ag71xx_mdio_remove(struct platform_device *pdev)
 +{
 +	struct ag71xx_mdio *am = platform_get_drvdata(pdev);
 +
@@ -14434,7 +21196,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/driver
 +	}
 +};
 +
-+int ag71xx_mdio_driver_init(void)
++int __init ag71xx_mdio_driver_init(void)
 +{
 +	return platform_driver_register(&ag71xx_mdio_driver);
 +}
@@ -14445,8 +21207,8 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_mdio.c linux-2.6.39/driver
 +}
 diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c linux-2.6.39/drivers/net/ag71xx/ag71xx_phy.c
 --- linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/net/ag71xx/ag71xx_phy.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,213 @@
++++ linux-2.6.39/drivers/net/ag71xx/ag71xx_phy.c	2011-08-06 09:32:37.298018216 +0200
+@@ -0,0 +1,228 @@
 +/*
 + *  Atheros AR71xx built-in ethernet mac driver
 + *
@@ -14493,8 +21255,12 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c linux-2.6.39/drivers
 +
 +void ag71xx_phy_start(struct ag71xx *ag)
 +{
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
++
 +	if (ag->phy_dev) {
 +		phy_start(ag->phy_dev);
++	} else if (pdata->has_ar7240_switch) {
++		ag71xx_ar7240_start(ag);
 +	} else {
 +		ag->link = 1;
 +		ag71xx_link_adjust(ag);
@@ -14503,9 +21269,13 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c linux-2.6.39/drivers
 +
 +void ag71xx_phy_stop(struct ag71xx *ag)
 +{
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
++
 +	if (ag->phy_dev) {
 +		phy_stop(ag->phy_dev);
 +	} else {
++		if (pdata->has_ar7240_switch)
++			ag71xx_ar7240_stop(ag);
 +		ag->link = 0;
 +		ag71xx_link_adjust(ag);
 +	}
@@ -14631,7 +21401,7 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c linux-2.6.39/drivers
 +	return NULL;
 +}
 +
-+int ag71xx_phy_connect(struct ag71xx *ag)
++int __devinit ag71xx_phy_connect(struct ag71xx *ag)
 +{
 +	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 +
@@ -14649,6 +21419,9 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c linux-2.6.39/drivers
 +		mutex_unlock(&ag->mii_bus->mdio_lock);
 +	}
 +
++	if (pdata->has_ar7240_switch)
++		return ag71xx_ar7240_init(ag);
++
 +	if (pdata->phy_mask)
 +		return ag71xx_phy_connect_multi(ag);
 +
@@ -14657,26 +21430,427 @@ diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/ag71xx_phy.c linux-2.6.39/drivers
 +
 +void ag71xx_phy_disconnect(struct ag71xx *ag)
 +{
-+	if (ag->phy_dev)
++	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
++
++	if (pdata->has_ar7240_switch)
++		ag71xx_ar7240_cleanup(ag);
++	else if (ag->phy_dev)
 +		phy_disconnect(ag->phy_dev);
 +}
+diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/Kconfig linux-2.6.39/drivers/net/ag71xx/Kconfig
+--- linux-2.6.39.orig/drivers/net/ag71xx/Kconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/ag71xx/Kconfig	2011-04-27 12:19:22.247664026 +0200
+@@ -0,0 +1,33 @@
++config AG71XX
++	tristate "Atheros AR71xx built-in ethernet mac support"
++	depends on ATHEROS_AR71XX
++	select PHYLIB
++	help
++	  If you wish to compile a kernel for AR71xx/91xx and enable
++	  ethernet support, then you should always answer Y to this.
++
++if AG71XX
++
++config AG71XX_DEBUG
++	bool "Atheros AR71xx built-in ethernet driver debugging"
++	default n
++	help
++	  Atheros AR71xx built-in ethernet driver debugging messages.
++
++config AG71XX_DEBUG_FS
++	bool "Atheros AR71xx built-in ethernet driver debugfs support"
++	depends on DEBUG_FS
++	default n
++	help
++	  Say Y, if you need access to various statistics provided by
++	  the ag71xx driver.
++
++config AG71XX_AR8216_SUPPORT
++	bool "special support for the Atheros AR8216 switch"
++	default n
++	default y if AR71XX_MACH_WNR2000 || AR71XX_MACH_MZK_W04NU
++	help
++	  Say 'y' here if you want to enable special support for the
++	  Atheros AR8216 switch found on some boards.
++
++endif
+diff -Nur linux-2.6.39.orig/drivers/net/ag71xx/Makefile linux-2.6.39/drivers/net/ag71xx/Makefile
+--- linux-2.6.39.orig/drivers/net/ag71xx/Makefile	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/ag71xx/Makefile	2011-04-27 12:19:22.257663952 +0200
+@@ -0,0 +1,15 @@
++#
++# Makefile for the Atheros AR71xx built-in ethernet macs
++#
++
++ag71xx-y	+= ag71xx_main.o
++ag71xx-y	+= ag71xx_ethtool.o
++ag71xx-y	+= ag71xx_phy.o
++ag71xx-y	+= ag71xx_mdio.o
++ag71xx-y	+= ag71xx_ar7240.o
++
++ag71xx-$(CONFIG_AG71XX_DEBUG_FS)	+= ag71xx_debugfs.o
++ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT)	+= ag71xx_ar8216.o
++
++obj-$(CONFIG_AG71XX)	+= ag71xx.o
++
+diff -Nur linux-2.6.39.orig/drivers/net/Kconfig linux-2.6.39/drivers/net/Kconfig
+--- linux-2.6.39.orig/drivers/net/Kconfig	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/net/Kconfig	2011-08-22 16:21:54.787979739 +0200
+@@ -2071,6 +2071,8 @@
+ 
+ 	  The safe and default value for this is N.
+ 
++source drivers/net/ag71xx/Kconfig
++
+ config DL2K
+ 	tristate "DL2000/TC902x-based Gigabit Ethernet support"
+ 	depends on PCI
+diff -Nur linux-2.6.39.orig/drivers/net/Makefile linux-2.6.39/drivers/net/Makefile
+--- linux-2.6.39.orig/drivers/net/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/net/Makefile	2011-08-22 16:21:54.797980120 +0200
+@@ -112,6 +112,7 @@
+ # end link order section
+ #
+ 
++obj-$(CONFIG_AG71XX) += ag71xx/
+ obj-$(CONFIG_SUNDANCE) += sundance.o
+ obj-$(CONFIG_HAMACHI) += hamachi.o
+ obj-$(CONFIG_NET) += Space.o loopback.o
 diff -Nur linux-2.6.39.orig/drivers/net/phy/Kconfig linux-2.6.39/drivers/net/phy/Kconfig
 --- linux-2.6.39.orig/drivers/net/phy/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/phy/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -91,6 +91,10 @@
- 	---help---
- 	  Supports the KSZ9021, VSC8201, KS8001 PHYs.
++++ linux-2.6.39/drivers/net/phy/Kconfig	2011-08-22 22:19:34.339230055 +0200
+@@ -13,6 +13,12 @@
+ 
+ if PHYLIB
  
-+config IP175C_PHY
-+	tristate "Driver for IC+ IP175C/IP178C switches"
-+	select SWCONFIG
++config SWCONFIG
++	tristate "Switch configuration API"
++	---help---
++	  Switch configuration API using netlink. This allows
++	  you to configure the VLAN features of certain switches.
 +
- config FIXED_PHY
- 	bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
- 	depends on PHYLIB=y
+ comment "MII PHY device drivers"
+ 
+ config MARVELL_PHY
+diff -Nur linux-2.6.39.orig/drivers/net/phy/Makefile linux-2.6.39/drivers/net/phy/Makefile
+--- linux-2.6.39.orig/drivers/net/phy/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/net/phy/Makefile	2011-08-22 22:19:34.339230055 +0200
+@@ -3,6 +3,7 @@
+ libphy-objs			:= phy.o phy_device.o mdio_bus.o
+ 
+ obj-$(CONFIG_PHYLIB)		+= libphy.o
++obj-$(CONFIG_SWCONFIG)		+= swconfig.o
+ obj-$(CONFIG_MARVELL_PHY)	+= marvell.o
+ obj-$(CONFIG_DAVICOM_PHY)	+= davicom.o
+ obj-$(CONFIG_CICADA_PHY)	+= cicada.o
+diff -Nur linux-2.6.39.orig/drivers/net/phy/micrel.c linux-2.6.39/drivers/net/phy/micrel.c
+--- linux-2.6.39.orig/drivers/net/phy/micrel.c	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/net/phy/micrel.c	2011-04-27 12:19:22.257663952 +0200
+@@ -1,251 +1,82 @@
+ /*
+- * drivers/net/phy/micrel.c
++ *  Driver for Micrel/Kendin PHYs
+  *
+- * Driver for Micrel PHYs
++ *  Copyright (c) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
+  *
+- * Author: David J. Choi
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
+  *
+- * Copyright (c) 2010 Micrel, Inc.
+- *
+- * This program is free software; you can redistribute  it and/or modify it
+- * under  the terms of  the GNU General  Public License as published by the
+- * Free Software Foundation;  either version 2 of the  License, or (at your
+- * option) any later version.
+- *
+- * Support : ksz9021 1000/100/10 phy from Micrel
+- *		ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy
+  */
+ 
+-#include <linux/kernel.h>
+-#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/skbuff.h>
+ #include <linux/phy.h>
+-#include <linux/micrel_phy.h>
+ 
+-/* general Interrupt control/status reg in vendor specific block. */
+-#define MII_KSZPHY_INTCS			0x1B
+-#define	KSZPHY_INTCS_JABBER			(1 << 15)
+-#define	KSZPHY_INTCS_RECEIVE_ERR		(1 << 14)
+-#define	KSZPHY_INTCS_PAGE_RECEIVE		(1 << 13)
+-#define	KSZPHY_INTCS_PARELLEL			(1 << 12)
+-#define	KSZPHY_INTCS_LINK_PARTNER_ACK		(1 << 11)
+-#define	KSZPHY_INTCS_LINK_DOWN			(1 << 10)
+-#define	KSZPHY_INTCS_REMOTE_FAULT		(1 << 9)
+-#define	KSZPHY_INTCS_LINK_UP			(1 << 8)
+-#define	KSZPHY_INTCS_ALL			(KSZPHY_INTCS_LINK_UP |\
+-						KSZPHY_INTCS_LINK_DOWN)
+-
+-/* general PHY control reg in vendor specific block. */
+-#define	MII_KSZPHY_CTRL			0x1F
+-/* bitmap of PHY register to set interrupt mode */
+-#define KSZPHY_CTRL_INT_ACTIVE_HIGH		(1 << 9)
+-#define KSZ9021_CTRL_INT_ACTIVE_HIGH		(1 << 14)
+-#define KS8737_CTRL_INT_ACTIVE_HIGH		(1 << 14)
+-#define KSZ8051_RMII_50MHZ_CLK			(1 << 7)
++#define KSZ_REG_INT_CTRL	0x1b
+ 
+-static int kszphy_ack_interrupt(struct phy_device *phydev)
+-{
+-	/* bit[7..0] int status, which is a read and clear register. */
+-	int rc;
++#define KSZ_INT_LU_EN	(1 << 8)	/* enable Link Up interrupt */
++#define KSZ_INT_RF_EN	(1 << 9)	/* enable Remote Fault interrupt */
++#define KSZ_INT_LD_EN	(1 << 10)	/* enable Link Down interrupt */
+ 
+-	rc = phy_read(phydev, MII_KSZPHY_INTCS);
+-
+-	return (rc < 0) ? rc : 0;
+-}
++#define KSZ_INT_INIT	(KSZ_INT_LU_EN | KSZ_INT_LD_EN)
+ 
+-static int kszphy_set_interrupt(struct phy_device *phydev)
++static int ksz8041_ack_interrupt(struct phy_device *phydev)
+ {
+-	int temp;
+-	temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ?
+-		KSZPHY_INTCS_ALL : 0;
+-	return phy_write(phydev, MII_KSZPHY_INTCS, temp);
+-}
++	int err;
+ 
+-static int kszphy_config_intr(struct phy_device *phydev)
+-{
+-	int temp, rc;
++	err = phy_read(phydev, KSZ_REG_INT_CTRL);
+ 
+-	/* set the interrupt pin active low */
+-	temp = phy_read(phydev, MII_KSZPHY_CTRL);
+-	temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH;
+-	phy_write(phydev, MII_KSZPHY_CTRL, temp);
+-	rc = kszphy_set_interrupt(phydev);
+-	return rc < 0 ? rc : 0;
++	return (err < 0) ? err : 0;
+ }
+ 
+-static int ksz9021_config_intr(struct phy_device *phydev)
++static int ksz8041_config_intr(struct phy_device *phydev)
+ {
+-	int temp, rc;
++	int err;
+ 
+-	/* set the interrupt pin active low */
+-	temp = phy_read(phydev, MII_KSZPHY_CTRL);
+-	temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH;
+-	phy_write(phydev, MII_KSZPHY_CTRL, temp);
+-	rc = kszphy_set_interrupt(phydev);
+-	return rc < 0 ? rc : 0;
+-}
+-
+-static int ks8737_config_intr(struct phy_device *phydev)
+-{
+-	int temp, rc;
++	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
++		err = phy_write(phydev, KSZ_REG_INT_CTRL,
++				KSZ_INT_INIT);
++	else
++		err = phy_write(phydev, KSZ_REG_INT_CTRL, 0);
+ 
+-	/* set the interrupt pin active low */
+-	temp = phy_read(phydev, MII_KSZPHY_CTRL);
+-	temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH;
+-	phy_write(phydev, MII_KSZPHY_CTRL, temp);
+-	rc = kszphy_set_interrupt(phydev);
+-	return rc < 0 ? rc : 0;
++	return err;
+ }
+ 
+-static int kszphy_config_init(struct phy_device *phydev)
+-{
+-	return 0;
+-}
+-
+-static int ks8051_config_init(struct phy_device *phydev)
+-{
+-	int regval;
+-
+-	if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
+-		regval = phy_read(phydev, MII_KSZPHY_CTRL);
+-		regval |= KSZ8051_RMII_50MHZ_CLK;
+-		phy_write(phydev, MII_KSZPHY_CTRL, regval);
+-	}
+-
+-	return 0;
+-}
+-
+-static struct phy_driver ks8737_driver = {
+-	.phy_id		= PHY_ID_KS8737,
+-	.phy_id_mask	= 0x00fffff0,
+-	.name		= "Micrel KS8737",
+-	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
+-	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+-	.config_init	= kszphy_config_init,
++static struct phy_driver ksz8041_phy_driver = {
++	.phy_id		= 0x00221512,
++	.name		= "Micrel KSZ8041",
++	.phy_id_mask	= 0x001fffff,
++	.features	= PHY_BASIC_FEATURES,
++	.flags		= PHY_HAS_INTERRUPT,
+ 	.config_aneg	= genphy_config_aneg,
+ 	.read_status	= genphy_read_status,
+-	.ack_interrupt	= kszphy_ack_interrupt,
+-	.config_intr	= ks8737_config_intr,
+-	.driver		= { .owner = THIS_MODULE,},
++	.ack_interrupt	= ksz8041_ack_interrupt,
++	.config_intr	= ksz8041_config_intr,
++	.driver	= {
++		.owner	= THIS_MODULE,
++	},
+ };
+ 
+-static struct phy_driver ks8041_driver = {
+-	.phy_id		= PHY_ID_KS8041,
+-	.phy_id_mask	= 0x00fffff0,
+-	.name		= "Micrel KS8041",
+-	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
+-				| SUPPORTED_Asym_Pause),
+-	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+-	.config_init	= kszphy_config_init,
+-	.config_aneg	= genphy_config_aneg,
+-	.read_status	= genphy_read_status,
+-	.ack_interrupt	= kszphy_ack_interrupt,
+-	.config_intr	= kszphy_config_intr,
+-	.driver		= { .owner = THIS_MODULE,},
+-};
+-
+-static struct phy_driver ks8051_driver = {
+-	.phy_id		= PHY_ID_KS8051,
+-	.phy_id_mask	= 0x00fffff0,
+-	.name		= "Micrel KS8051",
+-	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause
+-				| SUPPORTED_Asym_Pause),
+-	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+-	.config_init	= ks8051_config_init,
+-	.config_aneg	= genphy_config_aneg,
+-	.read_status	= genphy_read_status,
+-	.ack_interrupt	= kszphy_ack_interrupt,
+-	.config_intr	= kszphy_config_intr,
+-	.driver		= { .owner = THIS_MODULE,},
+-};
+-
+-static struct phy_driver ks8001_driver = {
+-	.phy_id		= PHY_ID_KS8001,
+-	.name		= "Micrel KS8001 or KS8721",
+-	.phy_id_mask	= 0x00fffff0,
+-	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
+-	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+-	.config_init	= kszphy_config_init,
+-	.config_aneg	= genphy_config_aneg,
+-	.read_status	= genphy_read_status,
+-	.ack_interrupt	= kszphy_ack_interrupt,
+-	.config_intr	= kszphy_config_intr,
+-	.driver		= { .owner = THIS_MODULE,},
+-};
+-
+-static struct phy_driver ksz9021_driver = {
+-	.phy_id		= PHY_ID_KSZ9021,
+-	.phy_id_mask	= 0x000fff10,
+-	.name		= "Micrel KSZ9021 Gigabit PHY",
+-	.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause
+-				| SUPPORTED_Asym_Pause),
+-	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
+-	.config_init	= kszphy_config_init,
+-	.config_aneg	= genphy_config_aneg,
+-	.read_status	= genphy_read_status,
+-	.ack_interrupt	= kszphy_ack_interrupt,
+-	.config_intr	= ksz9021_config_intr,
+-	.driver		= { .owner = THIS_MODULE, },
+-};
+-
+-static int __init ksphy_init(void)
++static int __init micrel_phy_init(void)
+ {
+-	int ret;
+-
+-	ret = phy_driver_register(&ks8001_driver);
+-	if (ret)
+-		goto err1;
+-
+-	ret = phy_driver_register(&ksz9021_driver);
+-	if (ret)
+-		goto err2;
+-
+-	ret = phy_driver_register(&ks8737_driver);
+-	if (ret)
+-		goto err3;
+-	ret = phy_driver_register(&ks8041_driver);
+-	if (ret)
+-		goto err4;
+-	ret = phy_driver_register(&ks8051_driver);
+-	if (ret)
+-		goto err5;
+-
+-	return 0;
+-
+-err5:
+-	phy_driver_unregister(&ks8041_driver);
+-err4:
+-	phy_driver_unregister(&ks8737_driver);
+-err3:
+-	phy_driver_unregister(&ksz9021_driver);
+-err2:
+-	phy_driver_unregister(&ks8001_driver);
+-err1:
+-	return ret;
++	return phy_driver_register(&ksz8041_phy_driver);
+ }
+ 
+-static void __exit ksphy_exit(void)
++static void __exit micrel_phy_exit(void)
+ {
+-	phy_driver_unregister(&ks8001_driver);
+-	phy_driver_unregister(&ks8737_driver);
+-	phy_driver_unregister(&ksz9021_driver);
+-	phy_driver_unregister(&ks8041_driver);
+-	phy_driver_unregister(&ks8051_driver);
++	phy_driver_unregister(&ksz8041_phy_driver);
+ }
+ 
+-module_init(ksphy_init);
+-module_exit(ksphy_exit);
+-
+-MODULE_DESCRIPTION("Micrel PHY driver");
+-MODULE_AUTHOR("David J. Choi");
+-MODULE_LICENSE("GPL");
+-
+-static struct mdio_device_id __maybe_unused micrel_tbl[] = {
+-	{ PHY_ID_KSZ9021, 0x000fff10 },
+-	{ PHY_ID_KS8001, 0x00fffff0 },
+-	{ PHY_ID_KS8737, 0x00fffff0 },
+-	{ PHY_ID_KS8041, 0x00fffff0 },
+-	{ PHY_ID_KS8051, 0x00fffff0 },
+-	{ }
+-};
++#ifdef MODULE
++module_init(micrel_phy_init);
++module_exit(micrel_phy_exit);
++#else
++subsys_initcall(micrel_phy_init);
++#endif
+ 
+-MODULE_DEVICE_TABLE(mdio, micrel_tbl);
++MODULE_DESCRIPTION("Micrel/Kendin PHY driver");
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
++MODULE_LICENSE("GPL v2");
 diff -Nur linux-2.6.39.orig/drivers/net/phy/phy.c linux-2.6.39/drivers/net/phy/phy.c
 --- linux-2.6.39.orig/drivers/net/phy/phy.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/phy/phy.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/net/phy/phy.c	2011-08-22 22:00:02.067980292 +0200
 @@ -297,6 +297,50 @@
  }
  EXPORT_SYMBOL(phy_ethtool_gset);
@@ -14739,8 +21913,8 @@ diff -Nur linux-2.6.39.orig/drivers/net/phy/phy.c linux-2.6.39/drivers/net/phy/p
  	idx = phy_find_valid(idx, phydev->supported);
 diff -Nur linux-2.6.39.orig/drivers/net/phy/phy_device.c linux-2.6.39/drivers/net/phy/phy_device.c
 --- linux-2.6.39.orig/drivers/net/phy/phy_device.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/phy/phy_device.c	2011-05-27 14:36:51.000000000 +0200
-@@ -149,6 +149,19 @@
++++ linux-2.6.39/drivers/net/phy/phy_device.c	2011-08-22 22:00:06.817981347 +0200
+@@ -149,6 +149,18 @@
  }
  EXPORT_SYMBOL(phy_scan_fixups);
  
@@ -14756,11 +21930,10 @@ diff -Nur linux-2.6.39.orig/drivers/net/phy/phy_device.c linux-2.6.39/drivers/ne
 +	return netif_rx(skb);
 +}
 +
-+
  static struct phy_device* phy_device_create(struct mii_bus *bus,
  					    int addr, int phy_id)
  {
-@@ -180,6 +193,8 @@
+@@ -180,6 +192,8 @@
  	dev_set_name(&dev->dev, PHY_ID_FMT, bus->id, addr);
  
  	dev->state = PHY_DOWN;
@@ -14769,38 +21942,968 @@ diff -Nur linux-2.6.39.orig/drivers/net/phy/phy_device.c linux-2.6.39/drivers/ne
  
  	mutex_init(&dev->lock);
  	INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine);
-diff -Nur linux-2.6.39.orig/drivers/spi/Kconfig linux-2.6.39/drivers/spi/Kconfig
---- linux-2.6.39.orig/drivers/spi/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/spi/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -67,6 +67,13 @@
- 	  This enables support for the SPI controller present on the
- 	  Atheros AR71XX/AR724X/AR913X SoCs.
- 
-+config SPI_AR71XX
-+	tristate "Atheros AR71xx SPI Controller"
-+	depends on SPI_MASTER && ATHEROS_AR71XX
-+	select SPI_BITBANG
-+	help
-+	  This is the SPI contoller driver for Atheros AR71xx.
+diff -Nur linux-2.6.39.orig/drivers/net/phy/swconfig.c linux-2.6.39/drivers/net/phy/swconfig.c
+--- linux-2.6.39.orig/drivers/net/phy/swconfig.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/net/phy/swconfig.c	2011-08-22 22:18:58.887990974 +0200
+@@ -0,0 +1,954 @@
++/*
++ * swconfig.c: Switch configuration API
++ *
++ * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#include <linux/types.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/list.h>
++#include <linux/if.h>
++#include <linux/if_ether.h>
++#include <linux/capability.h>
++#include <linux/skbuff.h>
++#include <linux/switch.h>
++
++//#define DEBUG 1
++#ifdef DEBUG
++#define DPRINTF(format, ...) printk("%s: " format, __func__, ##__VA_ARGS__)
++#else
++#define DPRINTF(...) do {} while(0)
++#endif
++
++#define SWCONFIG_DEVNAME	"switch%d"
++
++MODULE_AUTHOR("Felix Fietkau <nbd@openwrt.org>");
++MODULE_LICENSE("GPL");
++
++static int swdev_id = 0;
++static struct list_head swdevs;
++static DEFINE_SPINLOCK(swdevs_lock);
++struct swconfig_callback;
++
++struct swconfig_callback
++{
++	struct sk_buff *msg;
++	struct genlmsghdr *hdr;
++	struct genl_info *info;
++	int cmd;
++
++	/* callback for filling in the message data */
++	int (*fill)(struct swconfig_callback *cb, void *arg);
++
++	/* callback for closing the message before sending it */
++	int (*close)(struct swconfig_callback *cb, void *arg);
++
++	struct nlattr *nest[4];
++	int args[4];
++};
++
++/* defaults */
++
++static int
++swconfig_get_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	int ret;
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	if (!dev->ops->get_vlan_ports)
++		return -EOPNOTSUPP;
++
++	ret = dev->ops->get_vlan_ports(dev, val);
++	return ret;
++}
++
++static int
++swconfig_set_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	struct switch_port *ports = val->value.ports;
++	const struct switch_dev_ops *ops = dev->ops;
++	int i;
++
++	if (val->port_vlan >= dev->vlans)
++		return -EINVAL;
++
++	/* validate ports */
++	if (val->len > dev->ports)
++		return -EINVAL;
++
++	if (!ops->set_vlan_ports)
++		return -EOPNOTSUPP;
++
++	for (i = 0; i < val->len; i++) {
++		if (ports[i].id >= dev->ports)
++			return -EINVAL;
++
++		if (ops->set_port_pvid &&
++		    !(ports[i].flags & (1 << SWITCH_PORT_FLAG_TAGGED)))
++			ops->set_port_pvid(dev, ports[i].id, val->port_vlan);
++	}
++
++	return ops->set_vlan_ports(dev, val);
++}
++
++static int
++swconfig_set_pvid(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	if (val->port_vlan >= dev->ports)
++		return -EINVAL;
++
++	if (!dev->ops->set_port_pvid)
++		return -EOPNOTSUPP;
++
++	return dev->ops->set_port_pvid(dev, val->port_vlan, val->value.i);
++}
++
++static int
++swconfig_get_pvid(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	if (val->port_vlan >= dev->ports)
++		return -EINVAL;
++
++	if (!dev->ops->get_port_pvid)
++		return -EOPNOTSUPP;
++
++	return dev->ops->get_port_pvid(dev, val->port_vlan, &val->value.i);
++}
++
++static int
++swconfig_apply_config(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	/* don't complain if not supported by the switch driver */
++	if (!dev->ops->apply_config)
++		return 0;
++
++	return dev->ops->apply_config(dev);
++}
++
++static int
++swconfig_reset_switch(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val)
++{
++	/* don't complain if not supported by the switch driver */
++	if (!dev->ops->reset_switch)
++		return 0;
++
++	return dev->ops->reset_switch(dev);
++}
++
++enum global_defaults {
++	GLOBAL_APPLY,
++	GLOBAL_RESET,
++};
++
++enum vlan_defaults {
++	VLAN_PORTS,
++};
++
++enum port_defaults {
++	PORT_PVID,
++};
++
++static struct switch_attr default_global[] = {
++	[GLOBAL_APPLY] = {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "apply",
++		.description = "Activate changes in the hardware",
++		.set = swconfig_apply_config,
++	},
++	[GLOBAL_RESET] = {
++		.type = SWITCH_TYPE_NOVAL,
++		.name = "reset",
++		.description = "Reset the switch",
++		.set = swconfig_reset_switch,
++	}
++};
++
++static struct switch_attr default_port[] = {
++	[PORT_PVID] = {
++		.type = SWITCH_TYPE_INT,
++		.name = "pvid",
++		.description = "Primary VLAN ID",
++		.set = swconfig_set_pvid,
++		.get = swconfig_get_pvid,
++	}
++};
++
++static struct switch_attr default_vlan[] = {
++	[VLAN_PORTS] = {
++		.type = SWITCH_TYPE_PORTS,
++		.name = "ports",
++		.description = "VLAN port mapping",
++		.set = swconfig_set_vlan_ports,
++		.get = swconfig_get_vlan_ports,
++	},
++};
++
++
++static void swconfig_defaults_init(struct switch_dev *dev)
++{
++	const struct switch_dev_ops *ops = dev->ops;
++
++	dev->def_global = 0;
++	dev->def_vlan = 0;
++	dev->def_port = 0;
++
++	if (ops->get_vlan_ports || ops->set_vlan_ports)
++		set_bit(VLAN_PORTS, &dev->def_vlan);
++
++	if (ops->get_port_pvid || ops->set_port_pvid)
++		set_bit(PORT_PVID, &dev->def_port);
++
++	/* always present, can be no-op */
++	set_bit(GLOBAL_APPLY, &dev->def_global);
++	set_bit(GLOBAL_RESET, &dev->def_global);
++}
++
++
++static struct genl_family switch_fam = {
++	.id = GENL_ID_GENERATE,
++	.name = "switch",
++	.hdrsize = 0,
++	.version = 1,
++	.maxattr = SWITCH_ATTR_MAX,
++};
++
++static const struct nla_policy switch_policy[SWITCH_ATTR_MAX+1] = {
++	[SWITCH_ATTR_ID] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_ID] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_PORT] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_VLAN] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_VALUE_INT] = { .type = NLA_U32 },
++	[SWITCH_ATTR_OP_VALUE_STR] = { .type = NLA_NUL_STRING },
++	[SWITCH_ATTR_OP_VALUE_PORTS] = { .type = NLA_NESTED },
++	[SWITCH_ATTR_TYPE] = { .type = NLA_U32 },
++};
++
++static const struct nla_policy port_policy[SWITCH_PORT_ATTR_MAX+1] = {
++	[SWITCH_PORT_ID] = { .type = NLA_U32 },
++	[SWITCH_PORT_FLAG_TAGGED] = { .type = NLA_FLAG },
++};
++
++static inline void
++swconfig_lock(void)
++{
++	spin_lock(&swdevs_lock);
++}
++
++static inline void
++swconfig_unlock(void)
++{
++	spin_unlock(&swdevs_lock);
++}
++
++static struct switch_dev *
++swconfig_get_dev(struct genl_info *info)
++{
++	struct switch_dev *dev = NULL;
++	struct switch_dev *p;
++	int id;
++
++	if (!info->attrs[SWITCH_ATTR_ID])
++		goto done;
++
++	id = nla_get_u32(info->attrs[SWITCH_ATTR_ID]);
++	swconfig_lock();
++	list_for_each_entry(p, &swdevs, dev_list) {
++		if (id != p->id)
++			continue;
++
++		dev = p;
++		break;
++	}
++	if (dev)
++		spin_lock(&dev->lock);
++	else
++		DPRINTF("device %d not found\n", id);
++	swconfig_unlock();
++done:
++	return dev;
++}
++
++static inline void
++swconfig_put_dev(struct switch_dev *dev)
++{
++	spin_unlock(&dev->lock);
++}
++
++static int
++swconfig_dump_attr(struct swconfig_callback *cb, void *arg)
++{
++	struct switch_attr *op = arg;
++	struct genl_info *info = cb->info;
++	struct sk_buff *msg = cb->msg;
++	int id = cb->args[0];
++	void *hdr;
++
++	hdr = genlmsg_put(msg, info->snd_pid, info->snd_seq, &switch_fam,
++			NLM_F_MULTI, SWITCH_CMD_NEW_ATTR);
++	if (IS_ERR(hdr))
++		return -1;
++
++	NLA_PUT_U32(msg, SWITCH_ATTR_OP_ID, id);
++	NLA_PUT_U32(msg, SWITCH_ATTR_OP_TYPE, op->type);
++	NLA_PUT_STRING(msg, SWITCH_ATTR_OP_NAME, op->name);
++	if (op->description)
++		NLA_PUT_STRING(msg, SWITCH_ATTR_OP_DESCRIPTION,
++			op->description);
++
++	return genlmsg_end(msg, hdr);
++nla_put_failure:
++	genlmsg_cancel(msg, hdr);
++	return -EMSGSIZE;
++}
++
++/* spread multipart messages across multiple message buffers */
++static int
++swconfig_send_multipart(struct swconfig_callback *cb, void *arg)
++{
++	struct genl_info *info = cb->info;
++	int restart = 0;
++	int err;
++
++	do {
++		if (!cb->msg) {
++			cb->msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
++			if (cb->msg == NULL)
++				goto error;
++		}
++
++		if (!(cb->fill(cb, arg) < 0))
++			break;
++
++		/* fill failed, check if this was already the second attempt */
++		if (restart)
++			goto error;
++
++		/* try again in a new message, send the current one */
++		restart = 1;
++		if (cb->close) {
++			if (cb->close(cb, arg) < 0)
++				goto error;
++		}
++		err = genlmsg_reply(cb->msg, info);
++		cb->msg = NULL;
++		if (err < 0)
++			goto error;
++
++	} while (restart);
++
++	return 0;
++
++error:
++	if (cb->msg)
++		nlmsg_free(cb->msg);
++	return -1;
++}
++
++static int
++swconfig_list_attrs(struct sk_buff *skb, struct genl_info *info)
++{
++	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
++	const struct switch_attrlist *alist;
++	struct switch_dev *dev;
++	struct swconfig_callback cb;
++	int err = -EINVAL;
++	int i;
++
++	/* defaults */
++	struct switch_attr *def_list;
++	unsigned long *def_active;
++	int n_def;
++
++	dev = swconfig_get_dev(info);
++	if (!dev)
++		return -EINVAL;
++
++	switch(hdr->cmd) {
++	case SWITCH_CMD_LIST_GLOBAL:
++		alist = &dev->ops->attr_global;
++		def_list = default_global;
++		def_active = &dev->def_global;
++		n_def = ARRAY_SIZE(default_global);
++		break;
++	case SWITCH_CMD_LIST_VLAN:
++		alist = &dev->ops->attr_vlan;
++		def_list = default_vlan;
++		def_active = &dev->def_vlan;
++		n_def = ARRAY_SIZE(default_vlan);
++		break;
++	case SWITCH_CMD_LIST_PORT:
++		alist = &dev->ops->attr_port;
++		def_list = default_port;
++		def_active = &dev->def_port;
++		n_def = ARRAY_SIZE(default_port);
++		break;
++	default:
++		WARN_ON(1);
++		goto out;
++	}
++
++	memset(&cb, 0, sizeof(cb));
++	cb.info = info;
++	cb.fill = swconfig_dump_attr;
++	for (i = 0; i < alist->n_attr; i++) {
++		if (alist->attr[i].disabled)
++			continue;
++		cb.args[0] = i;
++		err = swconfig_send_multipart(&cb, (void *) &alist->attr[i]);
++		if (err < 0)
++			goto error;
++	}
++
++	/* defaults */
++	for (i = 0; i < n_def; i++) {
++		if (!test_bit(i, def_active))
++			continue;
++		cb.args[0] = SWITCH_ATTR_DEFAULTS_OFFSET + i;
++		err = swconfig_send_multipart(&cb, (void *) &def_list[i]);
++		if (err < 0)
++			goto error;
++	}
++	swconfig_put_dev(dev);
++
++	if (!cb.msg)
++		return 0;
++
++	return genlmsg_reply(cb.msg, info);
++
++error:
++	if (cb.msg)
++		nlmsg_free(cb.msg);
++out:
++	swconfig_put_dev(dev);
++	return err;
++}
++
++static const struct switch_attr *
++swconfig_lookup_attr(struct switch_dev *dev, struct genl_info *info,
++		struct switch_val *val)
++{
++	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
++	const struct switch_attrlist *alist;
++	const struct switch_attr *attr = NULL;
++	int attr_id;
++
++	/* defaults */
++	struct switch_attr *def_list;
++	unsigned long *def_active;
++	int n_def;
++
++	if (!info->attrs[SWITCH_ATTR_OP_ID])
++		goto done;
++
++	switch(hdr->cmd) {
++	case SWITCH_CMD_SET_GLOBAL:
++	case SWITCH_CMD_GET_GLOBAL:
++		alist = &dev->ops->attr_global;
++		def_list = default_global;
++		def_active = &dev->def_global;
++		n_def = ARRAY_SIZE(default_global);
++		break;
++	case SWITCH_CMD_SET_VLAN:
++	case SWITCH_CMD_GET_VLAN:
++		alist = &dev->ops->attr_vlan;
++		def_list = default_vlan;
++		def_active = &dev->def_vlan;
++		n_def = ARRAY_SIZE(default_vlan);
++		if (!info->attrs[SWITCH_ATTR_OP_VLAN])
++			goto done;
++		val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_VLAN]);
++		if (val->port_vlan >= dev->vlans)
++			goto done;
++		break;
++	case SWITCH_CMD_SET_PORT:
++	case SWITCH_CMD_GET_PORT:
++		alist = &dev->ops->attr_port;
++		def_list = default_port;
++		def_active = &dev->def_port;
++		n_def = ARRAY_SIZE(default_port);
++		if (!info->attrs[SWITCH_ATTR_OP_PORT])
++			goto done;
++		val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_PORT]);
++		if (val->port_vlan >= dev->ports)
++			goto done;
++		break;
++	default:
++		WARN_ON(1);
++		goto done;
++	}
++
++	if (!alist)
++		goto done;
++
++	attr_id = nla_get_u32(info->attrs[SWITCH_ATTR_OP_ID]);
++	if (attr_id >= SWITCH_ATTR_DEFAULTS_OFFSET) {
++		attr_id -= SWITCH_ATTR_DEFAULTS_OFFSET;
++		if (attr_id >= n_def)
++			goto done;
++		if (!test_bit(attr_id, def_active))
++			goto done;
++		attr = &def_list[attr_id];
++	} else {
++		if (attr_id >= alist->n_attr)
++			goto done;
++		attr = &alist->attr[attr_id];
++	}
++
++	if (attr->disabled)
++		attr = NULL;
++
++done:
++	if (!attr)
++		DPRINTF("attribute lookup failed\n");
++	val->attr = attr;
++	return attr;
++}
++
++static int
++swconfig_parse_ports(struct sk_buff *msg, struct nlattr *head,
++		struct switch_val *val, int max)
++{
++	struct nlattr *nla;
++	int rem;
++
++	val->len = 0;
++	nla_for_each_nested(nla, head, rem) {
++		struct nlattr *tb[SWITCH_PORT_ATTR_MAX+1];
++		struct switch_port *port = &val->value.ports[val->len];
++
++		if (val->len >= max)
++			return -EINVAL;
++
++		if (nla_parse_nested(tb, SWITCH_PORT_ATTR_MAX, nla,
++				port_policy))
++			return -EINVAL;
++
++		if (!tb[SWITCH_PORT_ID])
++			return -EINVAL;
++
++		port->id = nla_get_u32(tb[SWITCH_PORT_ID]);
++		if (tb[SWITCH_PORT_FLAG_TAGGED])
++			port->flags |= (1 << SWITCH_PORT_FLAG_TAGGED);
++		val->len++;
++	}
++
++	return 0;
++}
++
++static int
++swconfig_set_attr(struct sk_buff *skb, struct genl_info *info)
++{
++	const struct switch_attr *attr;
++	struct switch_dev *dev;
++	struct switch_val val;
++	int err = -EINVAL;
++
++	dev = swconfig_get_dev(info);
++	if (!dev)
++		return -EINVAL;
++
++	memset(&val, 0, sizeof(val));
++	attr = swconfig_lookup_attr(dev, info, &val);
++	if (!attr || !attr->set)
++		goto error;
++
++	val.attr = attr;
++	switch(attr->type) {
++	case SWITCH_TYPE_NOVAL:
++		break;
++	case SWITCH_TYPE_INT:
++		if (!info->attrs[SWITCH_ATTR_OP_VALUE_INT])
++			goto error;
++		val.value.i =
++			nla_get_u32(info->attrs[SWITCH_ATTR_OP_VALUE_INT]);
++		break;
++	case SWITCH_TYPE_STRING:
++		if (!info->attrs[SWITCH_ATTR_OP_VALUE_STR])
++			goto error;
++		val.value.s =
++			nla_data(info->attrs[SWITCH_ATTR_OP_VALUE_STR]);
++		break;
++	case SWITCH_TYPE_PORTS:
++		val.value.ports = dev->portbuf;
++		memset(dev->portbuf, 0,
++			sizeof(struct switch_port) * dev->ports);
++
++		/* TODO: implement multipart? */
++		if (info->attrs[SWITCH_ATTR_OP_VALUE_PORTS]) {
++			err = swconfig_parse_ports(skb,
++				info->attrs[SWITCH_ATTR_OP_VALUE_PORTS], &val, dev->ports);
++			if (err < 0)
++				goto error;
++		} else {
++			val.len = 0;
++			err = 0;
++		}
++		break;
++	default:
++		goto error;
++	}
++
++	err = attr->set(dev, attr, &val);
++error:
++	swconfig_put_dev(dev);
++	return err;
++}
++
++static int
++swconfig_close_portlist(struct swconfig_callback *cb, void *arg)
++{
++	if (cb->nest[0])
++		nla_nest_end(cb->msg, cb->nest[0]);
++	return 0;
++}
++
++static int
++swconfig_send_port(struct swconfig_callback *cb, void *arg)
++{
++	const struct switch_port *port = arg;
++	struct nlattr *p = NULL;
++
++	if (!cb->nest[0]) {
++		cb->nest[0] = nla_nest_start(cb->msg, cb->cmd);
++		if (!cb->nest[0])
++			return -1;
++	}
++
++	p = nla_nest_start(cb->msg, SWITCH_ATTR_PORT);
++	if (!p)
++		goto error;
++
++	NLA_PUT_U32(cb->msg, SWITCH_PORT_ID, port->id);
++	if (port->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
++		NLA_PUT_FLAG(cb->msg, SWITCH_PORT_FLAG_TAGGED);
++
++	nla_nest_end(cb->msg, p);
++	return 0;
++
++nla_put_failure:
++		nla_nest_cancel(cb->msg, p);
++error:
++	nla_nest_cancel(cb->msg, cb->nest[0]);
++	return -1;
++}
++
++static int
++swconfig_send_ports(struct sk_buff **msg, struct genl_info *info, int attr,
++		const struct switch_val *val)
++{
++	struct swconfig_callback cb;
++	int err = 0;
++	int i;
++
++	if (!val->value.ports)
++		return -EINVAL;
++
++	memset(&cb, 0, sizeof(cb));
++	cb.cmd = attr;
++	cb.msg = *msg;
++	cb.info = info;
++	cb.fill = swconfig_send_port;
++	cb.close = swconfig_close_portlist;
++
++	cb.nest[0] = nla_nest_start(cb.msg, cb.cmd);
++	for (i = 0; i < val->len; i++) {
++		err = swconfig_send_multipart(&cb, &val->value.ports[i]);
++		if (err)
++			goto done;
++	}
++	err = val->len;
++	swconfig_close_portlist(&cb, NULL);
++	*msg = cb.msg;
++
++done:
++	return err;
++}
++
++static int
++swconfig_get_attr(struct sk_buff *skb, struct genl_info *info)
++{
++	struct genlmsghdr *hdr = nlmsg_data(info->nlhdr);
++	const struct switch_attr *attr;
++	struct switch_dev *dev;
++	struct sk_buff *msg = NULL;
++	struct switch_val val;
++	int err = -EINVAL;
++	int cmd = hdr->cmd;
++
++	dev = swconfig_get_dev(info);
++	if (!dev)
++		return -EINVAL;
++
++	memset(&val, 0, sizeof(val));
++	attr = swconfig_lookup_attr(dev, info, &val);
++	if (!attr || !attr->get)
++		goto error;
++
++	if (attr->type == SWITCH_TYPE_PORTS) {
++		val.value.ports = dev->portbuf;
++		memset(dev->portbuf, 0,
++			sizeof(struct switch_port) * dev->ports);
++	}
++
++	err = attr->get(dev, attr, &val);
++	if (err)
++		goto error;
++
++	msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
++	if (!msg)
++		goto error;
++
++	hdr = genlmsg_put(msg, info->snd_pid, info->snd_seq, &switch_fam,
++			0, cmd);
++	if (IS_ERR(hdr))
++		goto nla_put_failure;
++
++	switch(attr->type) {
++	case SWITCH_TYPE_INT:
++		NLA_PUT_U32(msg, SWITCH_ATTR_OP_VALUE_INT, val.value.i);
++		break;
++	case SWITCH_TYPE_STRING:
++		NLA_PUT_STRING(msg, SWITCH_ATTR_OP_VALUE_STR, val.value.s);
++		break;
++	case SWITCH_TYPE_PORTS:
++		err = swconfig_send_ports(&msg, info,
++				SWITCH_ATTR_OP_VALUE_PORTS, &val);
++		if (err < 0)
++			goto nla_put_failure;
++		break;
++	default:
++		DPRINTF("invalid type in attribute\n");
++		err = -EINVAL;
++		goto error;
++	}
++	err = genlmsg_end(msg, hdr);
++	if (err < 0)
++		goto nla_put_failure;
++
++	swconfig_put_dev(dev);
++	return genlmsg_reply(msg, info);
++
++nla_put_failure:
++	if (msg)
++		nlmsg_free(msg);
++error:
++	swconfig_put_dev(dev);
++	if (!err)
++		err = -ENOMEM;
++	return err;
++}
++
++static int
++swconfig_send_switch(struct sk_buff *msg, u32 pid, u32 seq, int flags,
++		const struct switch_dev *dev)
++{
++	void *hdr;
++
++	hdr = genlmsg_put(msg, pid, seq, &switch_fam, flags,
++			SWITCH_CMD_NEW_ATTR);
++	if (IS_ERR(hdr))
++		return -1;
++
++	NLA_PUT_U32(msg, SWITCH_ATTR_ID, dev->id);
++	NLA_PUT_STRING(msg, SWITCH_ATTR_DEV_NAME, dev->devname);
++	NLA_PUT_STRING(msg, SWITCH_ATTR_ALIAS, dev->alias);
++	NLA_PUT_STRING(msg, SWITCH_ATTR_NAME, dev->name);
++	NLA_PUT_U32(msg, SWITCH_ATTR_VLANS, dev->vlans);
++	NLA_PUT_U32(msg, SWITCH_ATTR_PORTS, dev->ports);
++	NLA_PUT_U32(msg, SWITCH_ATTR_CPU_PORT, dev->cpu_port);
++
++	return genlmsg_end(msg, hdr);
++nla_put_failure:
++	genlmsg_cancel(msg, hdr);
++	return -EMSGSIZE;
++}
++
++static int swconfig_dump_switches(struct sk_buff *skb,
++		struct netlink_callback *cb)
++{
++	struct switch_dev *dev;
++	int start = cb->args[0];
++	int idx = 0;
++
++	swconfig_lock();
++	list_for_each_entry(dev, &swdevs, dev_list) {
++		if (++idx <= start)
++			continue;
++		if (swconfig_send_switch(skb, NETLINK_CB(cb->skb).pid,
++				cb->nlh->nlmsg_seq, NLM_F_MULTI,
++				dev) < 0)
++			break;
++	}
++	swconfig_unlock();
++	cb->args[0] = idx;
++
++	return skb->len;
++}
++
++static int
++swconfig_done(struct netlink_callback *cb)
++{
++	return 0;
++}
++
++static struct genl_ops swconfig_ops[] = {
++	{
++		.cmd = SWITCH_CMD_LIST_GLOBAL,
++		.doit = swconfig_list_attrs,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_LIST_VLAN,
++		.doit = swconfig_list_attrs,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_LIST_PORT,
++		.doit = swconfig_list_attrs,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_GLOBAL,
++		.doit = swconfig_get_attr,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_VLAN,
++		.doit = swconfig_get_attr,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_PORT,
++		.doit = swconfig_get_attr,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_SET_GLOBAL,
++		.doit = swconfig_set_attr,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_SET_VLAN,
++		.doit = swconfig_set_attr,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_SET_PORT,
++		.doit = swconfig_set_attr,
++		.policy = switch_policy,
++	},
++	{
++		.cmd = SWITCH_CMD_GET_SWITCH,
++		.dumpit = swconfig_dump_switches,
++		.policy = switch_policy,
++		.done = swconfig_done,
++	}
++};
++
++int
++register_switch(struct switch_dev *dev, struct net_device *netdev)
++{
++	struct switch_dev *sdev;
++	const int max_switches = 8 * sizeof(unsigned long);
++	unsigned long in_use = 0;
++	int i;
++
++	INIT_LIST_HEAD(&dev->dev_list);
++	if (netdev) {
++		dev->netdev = netdev;
++		if (!dev->alias)
++			dev->alias = netdev->name;
++	}
++	BUG_ON(!dev->alias);
++
++	if (dev->ports > 0) {
++		dev->portbuf = kzalloc(sizeof(struct switch_port) * dev->ports,
++				GFP_KERNEL);
++		if (!dev->portbuf)
++			return -ENOMEM;
++	}
++	swconfig_defaults_init(dev);
++	spin_lock_init(&dev->lock);
++	swconfig_lock();
++	dev->id = ++swdev_id;
++
++	list_for_each_entry(sdev, &swdevs, dev_list) {
++		if (!sscanf(sdev->devname, SWCONFIG_DEVNAME, &i))
++			continue;
++		if (i < 0 || i > max_switches)
++			continue;
++
++		set_bit(i, &in_use);
++	}
++	i = find_first_zero_bit(&in_use, max_switches);
++
++	if (i == max_switches)
++		return -ENFILE;
++
++	/* fill device name */
++	snprintf(dev->devname, IFNAMSIZ, SWCONFIG_DEVNAME, i);
++
++	list_add(&dev->dev_list, &swdevs);
++	swconfig_unlock();
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(register_switch);
++
++void
++unregister_switch(struct switch_dev *dev)
++{
++	kfree(dev->portbuf);
++	spin_lock(&dev->lock);
++	swconfig_lock();
++	list_del(&dev->dev_list);
++	swconfig_unlock();
++	spin_unlock(&dev->lock);
++}
++EXPORT_SYMBOL_GPL(unregister_switch);
++
++
++static int __init
++swconfig_init(void)
++{
++	int i, err;
++
++	INIT_LIST_HEAD(&swdevs);
++	err = genl_register_family(&switch_fam);
++	if (err)
++		return err;
++
++	for (i = 0; i < ARRAY_SIZE(swconfig_ops); i++) {
++		err = genl_register_ops(&switch_fam, &swconfig_ops[i]);
++		if (err)
++			goto unregister;
++	}
++
++	return 0;
++
++unregister:
++	genl_unregister_family(&switch_fam);
++	return err;
++}
++
++static void __exit
++swconfig_exit(void)
++{
++	genl_unregister_family(&switch_fam);
++}
++
++module_init(swconfig_init);
++module_exit(swconfig_exit);
 +
- config SPI_ATMEL
- 	tristate "Atmel SPI Controller"
- 	depends on (ARCH_AT91 || AVR32)
-diff -Nur linux-2.6.39.orig/drivers/spi/Makefile linux-2.6.39/drivers/spi/Makefile
---- linux-2.6.39.orig/drivers/spi/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/spi/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -11,6 +11,7 @@
- # SPI master controller drivers (bus)
- obj-$(CONFIG_SPI_ALTERA)		+= spi_altera.o
- obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
-+obj-$(CONFIG_SPI_AR71XX)		+= ar71xx_spi.o
- obj-$(CONFIG_SPI_ATH79)			+= ath79_spi.o
- obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
- obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o
 diff -Nur linux-2.6.39.orig/drivers/spi/ap83_spi.c linux-2.6.39/drivers/spi/ap83_spi.c
 --- linux-2.6.39.orig/drivers/spi/ap83_spi.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/spi/ap83_spi.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,282 @@
++++ linux-2.6.39/drivers/spi/ap83_spi.c	2011-04-27 12:19:22.317665385 +0200
+@@ -0,0 +1,283 @@
 +/*
 + * Atheros AP83 board specific SPI Controller driver
 + *
@@ -14840,8 +22943,8 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ap83_spi.c linux-2.6.39/drivers/spi/ap83
 +#define AP83_SPI_GPIO_MISO	3
 +
 +struct ap83_spi {
-+	struct	spi_bitbang 	bitbang;
-+	void __iomem 		*base;
++	struct	spi_bitbang	bitbang;
++	void __iomem		*base;
 +	u32			addr;
 +
 +	struct platform_device	*pdev;
@@ -14930,33 +23033,34 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ap83_spi.c linux-2.6.39/drivers/spi/ap83
 +
 +#define EXPAND_BITBANG_TXRX
 +#include <linux/spi/spi_bitbang.h>
++#include "spi_bitbang_txrx.h"
 +
 +static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
 +			       unsigned nsecs, u32 word, u8 bits)
 +{
 +	dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits);
-+	return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
++	return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
 +}
 +
 +static u32 ap83_spi_txrx_mode1(struct spi_device *spi,
 +			       unsigned nsecs, u32 word, u8 bits)
 +{
 +	dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits);
-+	return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
++	return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
 +}
 +
 +static u32 ap83_spi_txrx_mode2(struct spi_device *spi,
 +			       unsigned nsecs, u32 word, u8 bits)
 +{
 +	dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits);
-+	return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
++	return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
 +}
 +
 +static u32 ap83_spi_txrx_mode3(struct spi_device *spi,
 +			       unsigned nsecs, u32 word, u8 bits)
 +{
 +	dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits);
-+	return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
++	return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
 +}
 +
 +static int ap83_spi_probe(struct platform_device *pdev)
@@ -15032,15 +23136,15 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ap83_spi.c linux-2.6.39/drivers/spi/ap83
 +
 +	return 0;
 +
-+ err_unmap:
++err_unmap:
 +	iounmap(sp->base);
-+ err_spi_put:
++err_spi_put:
 +	platform_set_drvdata(pdev, NULL);
 +	spi_master_put(sp->bitbang.master);
 +
-+ err_free_cs:
++err_free_cs:
 +	gpio_free(AP83_SPI_GPIO_CS);
-+ err_free_miso:
++err_free_miso:
 +	gpio_free(AP83_SPI_GPIO_MISO);
 +	return ret;
 +}
@@ -15085,7 +23189,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ap83_spi.c linux-2.6.39/drivers/spi/ap83
 +MODULE_LICENSE("GPL v2");
 diff -Nur linux-2.6.39.orig/drivers/spi/ar71xx_spi.c linux-2.6.39/drivers/spi/ar71xx_spi.c
 --- linux-2.6.39.orig/drivers/spi/ar71xx_spi.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/spi/ar71xx_spi.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/spi/ar71xx_spi.c	2011-04-27 12:19:22.317665385 +0200
 @@ -0,0 +1,283 @@
 +/*
 + * Atheros AR71xx SPI Controller driver
@@ -15120,11 +23224,11 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ar71xx_spi.c linux-2.6.39/drivers/spi/ar
 +#undef PER_BIT_READ
 +
 +struct ar71xx_spi {
-+	struct	spi_bitbang 	bitbang;
++	struct	spi_bitbang	bitbang;
 +	u32			ioc_base;
 +	u32			reg_ctrl;
 +
-+	void __iomem 		*base;
++	void __iomem		*base;
 +
 +	struct platform_device	*pdev;
 +	u32			(*get_ioc_base)(u8 chip_select, int cs_high,
@@ -15323,7 +23427,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ar71xx_spi.c linux-2.6.39/drivers/spi/ar
 +		return 0;
 +
 +	iounmap(sp->base);
-+ err1:
++err1:
 +	platform_set_drvdata(pdev, NULL);
 +	spi_master_put(sp->bitbang.master);
 +
@@ -15370,9 +23474,645 @@ diff -Nur linux-2.6.39.orig/drivers/spi/ar71xx_spi.c linux-2.6.39/drivers/spi/ar
 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 +MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
 +MODULE_LICENSE("GPL v2");
+diff -Nur linux-2.6.39.orig/drivers/spi/Kconfig linux-2.6.39/drivers/spi/Kconfig
+--- linux-2.6.39.orig/drivers/spi/Kconfig	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/spi/Kconfig	2011-08-23 15:10:24.167989908 +0200
+@@ -67,6 +67,13 @@
+ 	  This enables support for the SPI controller present on the
+ 	  Atheros AR71XX/AR724X/AR913X SoCs.
+ 
++config SPI_AR71XX
++	tristate "Atheros AR71xx SPI Controller"
++	depends on SPI_MASTER && ATHEROS_AR71XX
++	select SPI_BITBANG
++	help
++	  This is the SPI contoller driver for Atheros AR71xx.
++
+ config SPI_ATMEL
+ 	tristate "Atmel SPI Controller"
+ 	depends on (ARCH_AT91 || AVR32)
+@@ -301,6 +308,12 @@
+ config SPI_PXA2XX_PCI
+ 	def_bool SPI_PXA2XX && X86_32 && PCI
+ 
++config SPI_RB4XX
++	tristate "Mikrotik RB4XX SPI master"
++	depends on SPI_MASTER && AR71XX_MACH_RB4XX
++	help
++	  SPI controller driver for the Mikrotik RB4xx series boards.
++
+ config SPI_S3C24XX
+ 	tristate "Samsung S3C24XX series SPI"
+ 	depends on ARCH_S3C2410 && EXPERIMENTAL
+@@ -457,6 +470,13 @@
+ 	  sysfs interface, with each line presented as a kind of GPIO
+ 	  exposing both switch control and diagnostic feedback.
+ 
++config SPI_RB4XX_CPLD
++	tristate "MikroTik RB4XX CPLD driver"
++	depends on AR71XX_MACH_RB4XX
++	help
++	  SPI driver for the Xilinx CPLD chip present on the
++	  MikroTik RB4xx boards.
++
+ #
+ # Add new SPI protocol masters in alphabetical order above this line
+ #
+diff -Nur linux-2.6.39.orig/drivers/spi/Kconfig.orig linux-2.6.39/drivers/spi/Kconfig.orig
+--- linux-2.6.39.orig/drivers/spi/Kconfig.orig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/spi/Kconfig.orig	2011-08-23 15:10:11.277991848 +0200
+@@ -0,0 +1,482 @@
++#
++# SPI driver configuration
++#
++# NOTE:  the reason this doesn't show SPI slave support is mostly that
++# nobody's needed a slave side API yet.  The master-role API is not
++# fully appropriate there, so it'd need some thought to do well.
++#
++menuconfig SPI
++	bool "SPI support"
++	depends on HAS_IOMEM
++	help
++	  The "Serial Peripheral Interface" is a low level synchronous
++	  protocol.  Chips that support SPI can have data transfer rates
++	  up to several tens of Mbit/sec.  Chips are addressed with a
++	  controller and a chipselect.  Most SPI slaves don't support
++	  dynamic device discovery; some are even write-only or read-only.
++
++	  SPI is widely used by microcontrollers to talk with sensors,
++	  eeprom and flash memory, codecs and various other controller
++	  chips, analog to digital (and d-to-a) converters, and more.
++	  MMC and SD cards can be accessed using SPI protocol; and for
++	  DataFlash cards used in MMC sockets, SPI must always be used.
++
++	  SPI is one of a family of similar protocols using a four wire
++	  interface (select, clock, data in, data out) including Microwire
++	  (half duplex), SSP, SSI, and PSP.  This driver framework should
++	  work with most such devices and controllers.
++
++if SPI
++
++config SPI_DEBUG
++	boolean "Debug support for SPI drivers"
++	depends on DEBUG_KERNEL
++	help
++	  Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
++	  sysfs, and debugfs support in SPI controller and protocol drivers.
++
++#
++# MASTER side ... talking to discrete SPI slave chips including microcontrollers
++#
++
++config SPI_MASTER
++#	boolean "SPI Master Support"
++	boolean
++	default SPI
++	help
++	  If your system has an master-capable SPI controller (which
++	  provides the clock and chipselect), you can enable that
++	  controller and the protocol drivers for the SPI slave chips
++	  that are connected.
++
++if SPI_MASTER
++
++comment "SPI Master Controller Drivers"
++
++config SPI_ALTERA
++	tristate "Altera SPI Controller"
++	select SPI_BITBANG
++	help
++	  This is the driver for the Altera SPI Controller.
++
++config SPI_ATH79
++	tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
++	depends on ATH79 && GENERIC_GPIO
++	select SPI_BITBANG
++	help
++	  This enables support for the SPI controller present on the
++	  Atheros AR71XX/AR724X/AR913X SoCs.
++
++config SPI_AR71XX
++	tristate "Atheros AR71xx SPI Controller"
++	depends on SPI_MASTER && ATHEROS_AR71XX
++	select SPI_BITBANG
++	help
++	  This is the SPI contoller driver for Atheros AR71xx.
++
++config SPI_ATMEL
++	tristate "Atmel SPI Controller"
++	depends on (ARCH_AT91 || AVR32)
++	help
++	  This selects a driver for the Atmel SPI Controller, present on
++	  many AT32 (AVR32) and AT91 (ARM) chips.
++
++config SPI_BFIN
++	tristate "SPI controller driver for ADI Blackfin5xx"
++	depends on BLACKFIN
++	help
++	  This is the SPI controller master driver for Blackfin 5xx processor.
++
++config SPI_AU1550
++	tristate "Au1550/Au12x0 SPI Controller"
++	depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL
++	select SPI_BITBANG
++	help
++	  If you say yes to this option, support will be included for the
++	  Au1550 SPI controller (may also work with Au1200,Au1210,Au1250).
++
++	  This driver can also be built as a module.  If so, the module
++	  will be called au1550_spi.
++
++config SPI_BITBANG
++	tristate "Utilities for Bitbanging SPI masters"
++	help
++	  With a few GPIO pins, your system can bitbang the SPI protocol.
++	  Select this to get SPI support through I/O pins (GPIO, parallel
++	  port, etc).  Or, some systems' SPI master controller drivers use
++	  this code to manage the per-word or per-transfer accesses to the
++	  hardware shift registers.
++
++	  This is library code, and is automatically selected by drivers that
++	  need it.  You only need to select this explicitly to support driver
++	  modules that aren't part of this kernel tree.
++
++config SPI_BUTTERFLY
++	tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
++	depends on PARPORT
++	select SPI_BITBANG
++	help
++	  This uses a custom parallel port cable to connect to an AVR
++	  Butterfly <http://www.atmel.com/products/avr/butterfly>, an
++	  inexpensive battery powered microcontroller evaluation board.
++	  This same cable can be used to flash new firmware.
++
++config SPI_COLDFIRE_QSPI
++	tristate "Freescale Coldfire QSPI controller"
++	depends on (M520x || M523x || M5249 || M527x || M528x || M532x)
++	help
++	  This enables support for the Coldfire QSPI controller in master
++	  mode.
++
++	  This driver can also be built as a module.  If so, the module
++	  will be called coldfire_qspi.
++
++config SPI_DAVINCI
++	tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
++	depends on SPI_MASTER && ARCH_DAVINCI
++	select SPI_BITBANG
++	help
++	  SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
++
++	  This driver can also be built as a module. The module will be called
++	  davinci_spi.
++
++config SPI_EP93XX
++	tristate "Cirrus Logic EP93xx SPI controller"
++	depends on ARCH_EP93XX
++	help
++	  This enables using the Cirrus EP93xx SPI controller in master
++	  mode.
++
++	  To compile this driver as a module, choose M here. The module will be
++	  called ep93xx_spi.
++
++config SPI_GPIO
++	tristate "GPIO-based bitbanging SPI Master"
++	depends on GENERIC_GPIO
++	select SPI_BITBANG
++	help
++	  This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
++	  interface to manage MOSI, MISO, SCK, and chipselect signals.  SPI
++	  slaves connected to a bus using this driver are configured as usual,
++	  except that the spi_board_info.controller_data holds the GPIO number
++	  for the chipselect used by this controller driver.
++
++	  Note that this driver often won't achieve even 1 Mbit/sec speeds,
++	  making it unusually slow for SPI.  If your platform can inline
++	  GPIO operations, you should be able to leverage that for better
++	  speed with a custom version of this driver; see the source code.
++
++config SPI_IMX_VER_IMX1
++	def_bool y if SOC_IMX1
++
++config SPI_IMX_VER_0_0
++	def_bool y if SOC_IMX21 || SOC_IMX27
++
++config SPI_IMX_VER_0_4
++	def_bool y if SOC_IMX31
++
++config SPI_IMX_VER_0_7
++	def_bool y if ARCH_MX25 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53
++
++config SPI_IMX_VER_2_3
++	def_bool y if SOC_IMX51 || SOC_IMX53
++
++config SPI_IMX
++	tristate "Freescale i.MX SPI controllers"
++	depends on ARCH_MXC
++	select SPI_BITBANG
++	default m if IMX_HAVE_PLATFORM_SPI_IMX
++	help
++	  This enables using the Freescale i.MX SPI controllers in master
++	  mode.
++
++config SPI_LM70_LLP
++	tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
++	depends on PARPORT && EXPERIMENTAL
++	select SPI_BITBANG
++	help
++	  This driver supports the NS LM70 LLP Evaluation Board,
++	  which interfaces to an LM70 temperature sensor using
++	  a parallel port.
++
++config SPI_MPC52xx
++	tristate "Freescale MPC52xx SPI (non-PSC) controller support"
++	depends on PPC_MPC52xx && SPI
++	select SPI_MASTER_OF
++	help
++	  This drivers supports the MPC52xx SPI controller in master SPI
++	  mode.
++
++config SPI_MPC52xx_PSC
++	tristate "Freescale MPC52xx PSC SPI controller"
++	depends on PPC_MPC52xx && EXPERIMENTAL
++	help
++	  This enables using the Freescale MPC52xx Programmable Serial
++	  Controller in master SPI mode.
++
++config SPI_MPC512x_PSC
++	tristate "Freescale MPC512x PSC SPI controller"
++	depends on SPI_MASTER && PPC_MPC512x
++	help
++	  This enables using the Freescale MPC5121 Programmable Serial
++	  Controller in SPI master mode.
++
++config SPI_FSL_LIB
++	tristate
++	depends on FSL_SOC
++
++config SPI_FSL_SPI
++	tristate "Freescale SPI controller"
++	depends on FSL_SOC
++	select SPI_FSL_LIB
++	help
++	  This enables using the Freescale SPI controllers in master mode.
++	  MPC83xx platform uses the controller in cpu mode or CPM/QE mode.
++	  MPC8569 uses the controller in QE mode, MPC8610 in cpu mode.
++
++config SPI_FSL_ESPI
++	tristate "Freescale eSPI controller"
++	depends on FSL_SOC
++	select SPI_FSL_LIB
++	help
++	  This enables using the Freescale eSPI controllers in master mode.
++	  From MPC8536, 85xx platform uses the controller, and all P10xx,
++	  P20xx, P30xx,P40xx, P50xx uses this controller.
++
++config SPI_OC_TINY
++	tristate "OpenCores tiny SPI"
++	depends on GENERIC_GPIO
++	select SPI_BITBANG
++	help
++	  This is the driver for OpenCores tiny SPI master controller.
++
++config SPI_OMAP_UWIRE
++	tristate "OMAP1 MicroWire"
++	depends on ARCH_OMAP1
++	select SPI_BITBANG
++	help
++	  This hooks up to the MicroWire controller on OMAP1 chips.
++
++config SPI_OMAP24XX
++	tristate "McSPI driver for OMAP"
++	depends on ARCH_OMAP2PLUS
++	help
++	  SPI master controller for OMAP24XX and later Multichannel SPI
++	  (McSPI) modules.
++
++config SPI_OMAP_100K
++	tristate "OMAP SPI 100K"
++	depends on SPI_MASTER && (ARCH_OMAP850 || ARCH_OMAP730)
++	help
++	  OMAP SPI 100K master controller for omap7xx boards.
++
++config SPI_ORION
++	tristate "Orion SPI master (EXPERIMENTAL)"
++	depends on PLAT_ORION && EXPERIMENTAL
++	help
++	  This enables using the SPI master controller on the Orion chips.
++
++config SPI_PL022
++	tristate "ARM AMBA PL022 SSP controller (EXPERIMENTAL)"
++	depends on ARM_AMBA && EXPERIMENTAL
++	default y if MACH_U300
++	default y if ARCH_REALVIEW
++	default y if INTEGRATOR_IMPD1
++	default y if ARCH_VERSATILE
++	help
++	  This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
++	  controller. If you have an embedded system with an AMBA(R)
++	  bus and a PL022 controller, say Y or M here.
++
++config SPI_PPC4xx
++	tristate "PPC4xx SPI Controller"
++	depends on PPC32 && 4xx && SPI_MASTER
++	select SPI_BITBANG
++	help
++	  This selects a driver for the PPC4xx SPI Controller.
++
++config SPI_PXA2XX
++	tristate "PXA2xx SSP SPI master"
++	depends on (ARCH_PXA || (X86_32 && PCI)) && EXPERIMENTAL
++	select PXA_SSP if ARCH_PXA
++	help
++	  This enables using a PXA2xx or Sodaville SSP port as a SPI master
++	  controller. The driver can be configured to use any SSP port and
++	  additional documentation can be found a Documentation/spi/pxa2xx.
++
++config SPI_PXA2XX_PCI
++	def_bool SPI_PXA2XX && X86_32 && PCI
++
++config SPI_S3C24XX
++	tristate "Samsung S3C24XX series SPI"
++	depends on ARCH_S3C2410 && EXPERIMENTAL
++	select SPI_BITBANG
++	help
++	  SPI driver for Samsung S3C24XX series ARM SoCs
++
++config SPI_S3C24XX_FIQ
++	bool "S3C24XX driver with FIQ pseudo-DMA"
++	depends on SPI_S3C24XX
++	select FIQ
++	help
++	  Enable FIQ support for the S3C24XX SPI driver to provide pseudo
++	  DMA by using the fast-interrupt request framework, This allows
++	  the driver to get DMA-like performance when there are either
++	  no free DMA channels, or when doing transfers that required both
++	  TX and RX data paths.
++
++config SPI_S3C24XX_GPIO
++	tristate "Samsung S3C24XX series SPI by GPIO"
++	depends on ARCH_S3C2410 && EXPERIMENTAL
++	select SPI_BITBANG
++	help
++	  SPI driver for Samsung S3C24XX series ARM SoCs using
++	  GPIO lines to provide the SPI bus. This can be used where
++	  the inbuilt hardware cannot provide the transfer mode, or
++	  where the board is using non hardware connected pins.
++
++config SPI_S3C64XX
++	tristate "Samsung S3C64XX series type SPI"
++	depends on (ARCH_S3C64XX || ARCH_S5P64X0)
++	select S3C64XX_DMA if ARCH_S3C64XX
++	help
++	  SPI driver for Samsung S3C64XX and newer SoCs.
++
++config SPI_SH_MSIOF
++	tristate "SuperH MSIOF SPI controller"
++	depends on SUPERH && HAVE_CLK
++	select SPI_BITBANG
++	help
++	  SPI driver for SuperH MSIOF blocks.
++
++config SPI_SH
++	tristate "SuperH SPI controller"
++	depends on SUPERH
++	help
++	  SPI driver for SuperH SPI blocks.
++
++config SPI_SH_SCI
++	tristate "SuperH SCI SPI controller"
++	depends on SUPERH
++	select SPI_BITBANG
++	help
++	  SPI driver for SuperH SCI blocks.
++
++config SPI_STMP3XXX
++	tristate "Freescale STMP37xx/378x SPI/SSP controller"
++	depends on ARCH_STMP3XXX && SPI_MASTER
++	help
++	  SPI driver for Freescale STMP37xx/378x SoC SSP interface
++
++config SPI_TEGRA
++	tristate "Nvidia Tegra SPI controller"
++	depends on ARCH_TEGRA
++	select TEGRA_SYSTEM_DMA
++	help
++	  SPI driver for NVidia Tegra SoCs
++
++config SPI_TI_SSP
++	tristate "TI Sequencer Serial Port - SPI Support"
++	depends on MFD_TI_SSP
++	help
++	  This selects an SPI master implementation using a TI sequencer
++	  serial port.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called ti-ssp-spi.
++
++config SPI_TOPCLIFF_PCH
++	tristate "Topcliff PCH SPI Controller"
++	depends on PCI
++	help
++	  SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
++	  used in some x86 embedded processors.
++
++config SPI_TXX9
++	tristate "Toshiba TXx9 SPI controller"
++	depends on GENERIC_GPIO && CPU_TX49XX
++	help
++	  SPI driver for Toshiba TXx9 MIPS SoCs
++
++config SPI_XILINX
++	tristate "Xilinx SPI controller common module"
++	depends on HAS_IOMEM && EXPERIMENTAL
++	select SPI_BITBANG
++	help
++	  This exposes the SPI controller IP from the Xilinx EDK.
++
++	  See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
++	  Product Specification document (DS464) for hardware details.
++
++	  Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
++
++config SPI_NUC900
++	tristate "Nuvoton NUC900 series SPI"
++	depends on ARCH_W90X900 && EXPERIMENTAL
++	select SPI_BITBANG
++	help
++	  SPI driver for Nuvoton NUC900 series ARM SoCs
++
++#
++# Add new SPI master controllers in alphabetical order above this line
++#
++
++config SPI_DESIGNWARE
++	tristate "DesignWare SPI controller core support"
++	depends on SPI_MASTER
++	help
++	  general driver for SPI controller core from DesignWare
++
++config SPI_DW_PCI
++	tristate "PCI interface driver for DW SPI core"
++	depends on SPI_DESIGNWARE && PCI
++
++config SPI_DW_MID_DMA
++	bool "DMA support for DW SPI controller on Intel Moorestown platform"
++	depends on SPI_DW_PCI && INTEL_MID_DMAC
++
++config SPI_DW_MMIO
++	tristate "Memory-mapped io interface driver for DW SPI core"
++	depends on SPI_DESIGNWARE && HAVE_CLK
++
++#
++# There are lots of SPI device types, with sensors and memory
++# being probably the most widely used ones.
++#
++comment "SPI Protocol Masters"
++
++config SPI_SPIDEV
++	tristate "User mode SPI device driver support"
++	depends on EXPERIMENTAL
++	help
++	  This supports user mode SPI protocol drivers.
++
++	  Note that this application programming interface is EXPERIMENTAL
++	  and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
++
++config SPI_TLE62X0
++	tristate "Infineon TLE62X0 (for power switching)"
++	depends on SYSFS
++	help
++	  SPI driver for Infineon TLE62X0 series line driver chips,
++	  such as the TLE6220, TLE6230 and TLE6240.  This provides a
++	  sysfs interface, with each line presented as a kind of GPIO
++	  exposing both switch control and diagnostic feedback.
++
++config SPI_RB4XX_CPLD
++	tristate "MikroTik RB4XX CPLD driver"
++	depends on AR71XX_MACH_RB4XX
++	help
++	  SPI driver for the Xilinx CPLD chip present on the
++	  MikroTik RB4xx boards.
++
++#
++# Add new SPI protocol masters in alphabetical order above this line
++#
++
++endif # SPI_MASTER
++
++# (slave support would go here)
++
++endif # SPI
+diff -Nur linux-2.6.39.orig/drivers/spi/Makefile linux-2.6.39/drivers/spi/Makefile
+--- linux-2.6.39.orig/drivers/spi/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/spi/Makefile	2011-08-23 15:10:24.199233941 +0200
+@@ -10,6 +10,7 @@
+ 
+ # SPI master controller drivers (bus)
+ obj-$(CONFIG_SPI_ALTERA)		+= spi_altera.o
++obj-$(CONFIG_SPI_AR71XX)		+= ar71xx_spi.o
+ obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
+ obj-$(CONFIG_SPI_ATH79)			+= ath79_spi.o
+ obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
+@@ -54,6 +55,7 @@
+ obj-$(CONFIG_SPI_SH_MSIOF)		+= spi_sh_msiof.o
+ obj-$(CONFIG_SPI_STMP3XXX)		+= spi_stmp.o
+ obj-$(CONFIG_SPI_NUC900)		+= spi_nuc900.o
++obj-$(CONFIG_SPI_RB4XX)			+= rb4xx_spi.o
+ 
+ # special build for s3c24xx spi driver with fiq support
+ spi_s3c24xx_hw-y			:= spi_s3c24xx.o
+@@ -62,6 +64,7 @@
+ # 	... add above this line ...
+ 
+ # SPI protocol drivers (device/link on bus)
++obj-$(CONFIG_SPI_RB4XX_CPLD)	+= spi_rb4xx_cpld.o
+ obj-$(CONFIG_SPI_SPIDEV)	+= spidev.o
+ obj-$(CONFIG_SPI_TLE62X0)	+= tle62x0.o
+ # 	... add above this line ...
+diff -Nur linux-2.6.39.orig/drivers/spi/Makefile.orig linux-2.6.39/drivers/spi/Makefile.orig
+--- linux-2.6.39.orig/drivers/spi/Makefile.orig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/spi/Makefile.orig	2011-08-23 15:10:11.300479072 +0200
+@@ -0,0 +1,75 @@
++#
++# Makefile for kernel SPI drivers.
++#
++
++ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG
++
++# small core, mostly translating board-specific
++# config declarations into driver model code
++obj-$(CONFIG_SPI_MASTER)		+= spi.o
++
++# SPI master controller drivers (bus)
++obj-$(CONFIG_SPI_ALTERA)		+= spi_altera.o
++obj-$(CONFIG_SPI_AR71XX)		+= ar71xx_spi.o
++obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
++obj-$(CONFIG_SPI_ATH79)			+= ath79_spi.o
++obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
++obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o
++obj-$(CONFIG_SPI_AU1550)		+= au1550_spi.o
++obj-$(CONFIG_SPI_BUTTERFLY)		+= spi_butterfly.o
++obj-$(CONFIG_SPI_COLDFIRE_QSPI)		+= coldfire_qspi.o
++obj-$(CONFIG_SPI_DAVINCI)		+= davinci_spi.o
++obj-$(CONFIG_SPI_DESIGNWARE)		+= dw_spi.o
++obj-$(CONFIG_SPI_DW_PCI)		+= dw_spi_midpci.o
++dw_spi_midpci-objs			:= dw_spi_pci.o dw_spi_mid.o
++obj-$(CONFIG_SPI_DW_MMIO)		+= dw_spi_mmio.o
++obj-$(CONFIG_SPI_EP93XX)		+= ep93xx_spi.o
++obj-$(CONFIG_SPI_GPIO)			+= spi_gpio.o
++obj-$(CONFIG_SPI_IMX)			+= spi_imx.o
++obj-$(CONFIG_SPI_LM70_LLP)		+= spi_lm70llp.o
++obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o
++obj-$(CONFIG_SPI_PXA2XX_PCI)		+= pxa2xx_spi_pci.o
++obj-$(CONFIG_SPI_OC_TINY)		+= spi_oc_tiny.o
++obj-$(CONFIG_SPI_OMAP_UWIRE)		+= omap_uwire.o
++obj-$(CONFIG_SPI_OMAP24XX)		+= omap2_mcspi.o
++obj-$(CONFIG_SPI_OMAP_100K)		+= omap_spi_100k.o
++obj-$(CONFIG_SPI_ORION)			+= orion_spi.o
++obj-$(CONFIG_SPI_PL022)			+= amba-pl022.o
++obj-$(CONFIG_SPI_MPC512x_PSC)		+= mpc512x_psc_spi.o
++obj-$(CONFIG_SPI_MPC52xx_PSC)		+= mpc52xx_psc_spi.o
++obj-$(CONFIG_SPI_MPC52xx)		+= mpc52xx_spi.o
++obj-$(CONFIG_SPI_FSL_LIB)		+= spi_fsl_lib.o
++obj-$(CONFIG_SPI_FSL_ESPI)		+= spi_fsl_espi.o
++obj-$(CONFIG_SPI_FSL_SPI)		+= spi_fsl_spi.o
++obj-$(CONFIG_SPI_PPC4xx)		+= spi_ppc4xx.o
++obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o
++obj-$(CONFIG_SPI_S3C24XX)		+= spi_s3c24xx_hw.o
++obj-$(CONFIG_SPI_S3C64XX)		+= spi_s3c64xx.o
++obj-$(CONFIG_SPI_TEGRA)			+= spi_tegra.o
++obj-$(CONFIG_SPI_TI_SSP)		+= ti-ssp-spi.o
++obj-$(CONFIG_SPI_TOPCLIFF_PCH)		+= spi_topcliff_pch.o
++obj-$(CONFIG_SPI_TXX9)			+= spi_txx9.o
++obj-$(CONFIG_SPI_XILINX)		+= xilinx_spi.o
++obj-$(CONFIG_SPI_SH)			+= spi_sh.o
++obj-$(CONFIG_SPI_SH_SCI)		+= spi_sh_sci.o
++obj-$(CONFIG_SPI_SH_MSIOF)		+= spi_sh_msiof.o
++obj-$(CONFIG_SPI_STMP3XXX)		+= spi_stmp.o
++obj-$(CONFIG_SPI_NUC900)		+= spi_nuc900.o
++
++# special build for s3c24xx spi driver with fiq support
++spi_s3c24xx_hw-y			:= spi_s3c24xx.o
++spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o
++
++# 	... add above this line ...
++
++# SPI protocol drivers (device/link on bus)
++obj-$(CONFIG_SPI_RB4XX_CPLD)	+= spi_rb4xx_cpld.o
++obj-$(CONFIG_SPI_SPIDEV)	+= spidev.o
++obj-$(CONFIG_SPI_TLE62X0)	+= tle62x0.o
++# 	... add above this line ...
++
++# SPI slave controller drivers (upstream link)
++# 	... add above this line ...
++
++# SPI slave drivers (protocol for that link)
++# 	... add above this line ...
 diff -Nur linux-2.6.39.orig/drivers/spi/pb44_spi.c linux-2.6.39/drivers/spi/pb44_spi.c
 --- linux-2.6.39.orig/drivers/spi/pb44_spi.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/spi/pb44_spi.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/spi/pb44_spi.c	2011-04-27 12:19:22.317665385 +0200
 @@ -0,0 +1,299 @@
 +/*
 + * Atheros PB44 board SPI controller driver
@@ -15407,11 +24147,11 @@ diff -Nur linux-2.6.39.orig/drivers/spi/pb44_spi.c linux-2.6.39/drivers/spi/pb44
 +#undef PER_BIT_READ
 +
 +struct ar71xx_spi {
-+	struct	spi_bitbang 	bitbang;
++	struct	spi_bitbang	bitbang;
 +	u32			ioc_base;
 +	u32			reg_ctrl;
 +
-+	void __iomem 		*base;
++	void __iomem		*base;
 +
 +	struct platform_device	*pdev;
 +};
@@ -15628,7 +24368,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/pb44_spi.c linux-2.6.39/drivers/spi/pb44
 +		return 0;
 +
 +	iounmap(sp->base);
-+ err1:
++err1:
 +	platform_set_drvdata(pdev, NULL);
 +	spi_master_put(sp->bitbang.master);
 +
@@ -15673,10 +24413,932 @@ diff -Nur linux-2.6.39.orig/drivers/spi/pb44_spi.c linux-2.6.39/drivers/spi/pb44
 +MODULE_VERSION(DRV_VERSION);
 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 +MODULE_LICENSE("GPL v2");
+diff -Nur linux-2.6.39.orig/drivers/spi/rb4xx_spi.c linux-2.6.39/drivers/spi/rb4xx_spi.c
+--- linux-2.6.39.orig/drivers/spi/rb4xx_spi.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/spi/rb4xx_spi.c	2011-04-27 12:19:22.307664943 +0200
+@@ -0,0 +1,474 @@
++/*
++ * SPI controller driver for the Mikrotik RB4xx boards
++ *
++ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This file was based on the patches for Linux 2.6.27.39 published by
++ * MikroTik for their RouterBoard 4xx series devices.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/spinlock.h>
++#include <linux/workqueue.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#define DRV_NAME	"rb4xx-spi"
++#define DRV_DESC	"Mikrotik RB4xx SPI controller driver"
++#define DRV_VERSION	"0.1.0"
++
++#define SPI_CTRL_FASTEST	0x40
++#define SPI_FLASH_HZ		33333334
++#define SPI_CPLD_HZ		33333334
++
++#define CPLD_CMD_READ_FAST	0x0b
++
++#undef RB4XX_SPI_DEBUG
++
++struct rb4xx_spi {
++	void __iomem		*base;
++	struct spi_master	*master;
++
++	unsigned		spi_ctrl_flash;
++	unsigned		spi_ctrl_fread;
++
++	spinlock_t		lock;
++	struct list_head	queue;
++	int			busy:1;
++	int			cs_wait;
++};
++
++static unsigned spi_clk_low = SPI_IOC_CS1;
++
++#ifdef RB4XX_SPI_DEBUG
++static inline void do_spi_delay(void)
++{
++	ndelay(20000);
++}
++#else
++static inline void do_spi_delay(void) { }
++#endif
++
++static inline void do_spi_init(struct spi_device *spi)
++{
++	unsigned cs = SPI_IOC_CS0 | SPI_IOC_CS1;
++
++	if (!(spi->mode & SPI_CS_HIGH))
++		cs ^= (spi->chip_select == 2) ? SPI_IOC_CS1 : SPI_IOC_CS0;
++
++	spi_clk_low = cs;
++}
++
++static inline void do_spi_finish(void __iomem *base)
++{
++	do_spi_delay();
++	__raw_writel(SPI_IOC_CS0 | SPI_IOC_CS1, base + SPI_REG_IOC);
++}
++
++static inline void do_spi_clk(void __iomem *base, int bit)
++{
++	unsigned bval = spi_clk_low | ((bit & 1) ? SPI_IOC_DO : 0);
++
++	do_spi_delay();
++	__raw_writel(bval, base + SPI_REG_IOC);
++	do_spi_delay();
++	__raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
++}
++
++static void do_spi_byte(void __iomem *base, unsigned char byte)
++{
++	do_spi_clk(base, byte >> 7);
++	do_spi_clk(base, byte >> 6);
++	do_spi_clk(base, byte >> 5);
++	do_spi_clk(base, byte >> 4);
++	do_spi_clk(base, byte >> 3);
++	do_spi_clk(base, byte >> 2);
++	do_spi_clk(base, byte >> 1);
++	do_spi_clk(base, byte);
++
++	pr_debug("spi_byte sent 0x%02x got 0x%02x\n",
++	       (unsigned)byte,
++	       (unsigned char)__raw_readl(base + SPI_REG_RDS));
++}
++
++static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1,
++				   unsigned bit2)
++{
++	unsigned bval = (spi_clk_low |
++			 ((bit1 & 1) ? SPI_IOC_DO : 0) |
++			 ((bit2 & 1) ? SPI_IOC_CS2 : 0));
++	do_spi_delay();
++	__raw_writel(bval, base + SPI_REG_IOC);
++	do_spi_delay();
++	__raw_writel(bval | SPI_IOC_CLK, base + SPI_REG_IOC);
++}
++
++static void do_spi_byte_fast(void __iomem *base, unsigned char byte)
++{
++	do_spi_clk_fast(base, byte >> 7, byte >> 6);
++	do_spi_clk_fast(base, byte >> 5, byte >> 4);
++	do_spi_clk_fast(base, byte >> 3, byte >> 2);
++	do_spi_clk_fast(base, byte >> 1, byte >> 0);
++
++	pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n",
++	       (unsigned)byte,
++	       (unsigned char) __raw_readl(base + SPI_REG_RDS));
++}
++
++static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t)
++{
++	const unsigned char *rxv_ptr = NULL;
++	const unsigned char *tx_ptr = t->tx_buf;
++	unsigned char *rx_ptr = t->rx_buf;
++	unsigned i;
++
++	pr_debug("spi_txrx len %u tx %u rx %u\n",
++	       t->len,
++	       (t->tx_buf ? 1 : 0),
++	       (t->rx_buf ? 1 : 0));
++
++	if (t->verify) {
++		rxv_ptr = tx_ptr;
++		tx_ptr = NULL;
++	}
++
++	for (i = 0; i < t->len; ++i) {
++		unsigned char sdata = tx_ptr ? tx_ptr[i] : 0;
++
++		if (t->fast_write)
++			do_spi_byte_fast(base, sdata);
++		else
++			do_spi_byte(base, sdata);
++
++		if (rx_ptr) {
++			rx_ptr[i] = __raw_readl(base + SPI_REG_RDS) & 0xff;
++		} else if (rxv_ptr) {
++			unsigned char c = __raw_readl(base + SPI_REG_RDS);
++			if (rxv_ptr[i] != c)
++				return i;
++		}
++	}
++
++	return i;
++}
++
++static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi,
++			       struct spi_message *m)
++{
++	struct spi_transfer *t;
++	const unsigned char *tx_ptr;
++	unsigned addr;
++	void __iomem *base = rbspi->base;
++
++	/* check for exactly two transfers */
++	if (list_empty(&m->transfers) ||
++	    list_is_last(m->transfers.next, &m->transfers) ||
++	    !list_is_last(m->transfers.next->next, &m->transfers)) {
++		return -1;
++	}
++
++	/* first transfer contains command and address  */
++	t = list_entry(m->transfers.next,
++		       struct spi_transfer, transfer_list);
++
++	if (t->len != 5 || t->tx_buf == NULL)
++		return -1;
++
++	tx_ptr = t->tx_buf;
++	if (tx_ptr[0] != CPLD_CMD_READ_FAST)
++		return -1;
++
++	addr = tx_ptr[1];
++	addr = tx_ptr[2] | (addr << 8);
++	addr = tx_ptr[3] | (addr << 8);
++	addr += (unsigned) base;
++
++	m->actual_length += t->len;
++
++	/* second transfer contains data itself */
++	t = list_entry(m->transfers.next->next,
++		       struct spi_transfer, transfer_list);
++
++	if (t->tx_buf && !t->verify)
++		return -1;
++
++	__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
++	__raw_writel(rbspi->spi_ctrl_fread, base + SPI_REG_CTRL);
++	__raw_writel(0, base + SPI_REG_FS);
++
++	if (t->rx_buf) {
++		memcpy(t->rx_buf, (const void *)addr, t->len);
++	} else if (t->tx_buf) {
++		unsigned char buf[t->len];
++		memcpy(buf, (const void *)addr, t->len);
++		if (memcmp(t->tx_buf, buf, t->len) != 0)
++			m->status = -EMSGSIZE;
++	}
++	m->actual_length += t->len;
++
++	if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) {
++		__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
++		__raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
++		__raw_writel(0, base + SPI_REG_FS);
++	}
++
++	return 0;
++}
++
++static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m)
++{
++	struct spi_transfer *t = NULL;
++	void __iomem *base = rbspi->base;
++
++	m->status = 0;
++	if (list_empty(&m->transfers))
++		return -1;
++
++	if (m->fast_read)
++		if (rb4xx_spi_read_fast(rbspi, m) == 0)
++			return -1;
++
++	__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS);
++	__raw_writel(SPI_CTRL_FASTEST, base + SPI_REG_CTRL);
++	do_spi_init(m->spi);
++
++	list_for_each_entry(t, &m->transfers, transfer_list) {
++		int len;
++
++		len = rb4xx_spi_txrx(base, t);
++		if (len != t->len) {
++			m->status = -EMSGSIZE;
++			break;
++		}
++		m->actual_length += len;
++
++		if (t->cs_change) {
++			if (list_is_last(&t->transfer_list, &m->transfers)) {
++				/* wait for continuation */
++				return m->spi->chip_select;
++			}
++			do_spi_finish(base);
++			ndelay(100);
++		}
++	}
++
++	do_spi_finish(base);
++	__raw_writel(rbspi->spi_ctrl_flash, base + SPI_REG_CTRL);
++	__raw_writel(0, base + SPI_REG_FS);
++	return -1;
++}
++
++static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi,
++					   unsigned long *flags)
++{
++	int cs = rbspi->cs_wait;
++
++	rbspi->busy = 1;
++	while (!list_empty(&rbspi->queue)) {
++		struct spi_message *m;
++
++		list_for_each_entry(m, &rbspi->queue, queue)
++			if (cs < 0 || cs == m->spi->chip_select)
++				break;
++
++		if (&m->queue == &rbspi->queue)
++			break;
++
++		list_del_init(&m->queue);
++		spin_unlock_irqrestore(&rbspi->lock, *flags);
++
++		cs = rb4xx_spi_msg(rbspi, m);
++		m->complete(m->context);
++
++		spin_lock_irqsave(&rbspi->lock, *flags);
++	}
++
++	rbspi->cs_wait = cs;
++	rbspi->busy = 0;
++
++	if (cs >= 0) {
++		/* TODO: add timer to unlock cs after 1s inactivity */
++	}
++}
++
++static int rb4xx_spi_transfer(struct spi_device *spi,
++			      struct spi_message *m)
++{
++	struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);
++	unsigned long flags;
++
++	m->actual_length = 0;
++	m->status = -EINPROGRESS;
++
++	spin_lock_irqsave(&rbspi->lock, flags);
++	list_add_tail(&m->queue, &rbspi->queue);
++	if (rbspi->busy ||
++	    (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) {
++		/* job will be done later */
++		spin_unlock_irqrestore(&rbspi->lock, flags);
++		return 0;
++	}
++
++	/* process job in current context */
++	rb4xx_spi_process_queue_locked(rbspi, &flags);
++	spin_unlock_irqrestore(&rbspi->lock, flags);
++
++	return 0;
++}
++
++static int rb4xx_spi_setup(struct spi_device *spi)
++{
++	struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master);
++	unsigned long flags;
++
++	if (spi->mode & ~(SPI_CS_HIGH)) {
++		dev_err(&spi->dev, "mode %x not supported\n",
++			(unsigned) spi->mode);
++		return -EINVAL;
++	}
++
++	if (spi->bits_per_word != 8 && spi->bits_per_word != 0) {
++		dev_err(&spi->dev, "bits_per_word %u not supported\n",
++			(unsigned) spi->bits_per_word);
++		return -EINVAL;
++	}
++
++	spin_lock_irqsave(&rbspi->lock, flags);
++	if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) {
++		rbspi->cs_wait = -1;
++		rb4xx_spi_process_queue_locked(rbspi, &flags);
++	}
++	spin_unlock_irqrestore(&rbspi->lock, flags);
++
++	return 0;
++}
++
++static unsigned get_spi_ctrl(unsigned hz_max, const char *name)
++{
++	unsigned div;
++
++	div = (ar71xx_ahb_freq - 1) / (2 * hz_max);
++
++	/*
++	 * CPU has a bug at (div == 0) - first bit read is random
++	 */
++	if (div == 0)
++		++div;
++
++	if (name) {
++		unsigned ahb_khz = (ar71xx_ahb_freq + 500) / 1000;
++		unsigned div_real = 2 * (div + 1);
++		pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n",
++		       name,
++		       ahb_khz / div_real,
++		       ahb_khz, div_real);
++	}
++
++	return SPI_CTRL_FASTEST + div;
++}
++
++static int rb4xx_spi_probe(struct platform_device *pdev)
++{
++	struct spi_master *master;
++	struct rb4xx_spi *rbspi;
++	struct resource *r;
++	int err = 0;
++
++	master = spi_alloc_master(&pdev->dev, sizeof(*rbspi));
++	if (master == NULL) {
++		dev_err(&pdev->dev, "no memory for spi_master\n");
++		err = -ENOMEM;
++		goto err_out;
++	}
++
++	master->bus_num = 0;
++	master->num_chipselect = 3;
++	master->setup = rb4xx_spi_setup;
++	master->transfer = rb4xx_spi_transfer;
++
++	rbspi = spi_master_get_devdata(master);
++	platform_set_drvdata(pdev, rbspi);
++
++	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (r == NULL) {
++		err = -ENOENT;
++		goto err_put_master;
++	}
++
++	rbspi->base = ioremap(r->start, r->end - r->start + 1);
++	if (!rbspi->base) {
++		err = -ENXIO;
++		goto err_put_master;
++	}
++
++	rbspi->master = master;
++	rbspi->spi_ctrl_flash = get_spi_ctrl(SPI_FLASH_HZ, "FLASH");
++	rbspi->spi_ctrl_fread = get_spi_ctrl(SPI_CPLD_HZ, "CPLD");
++	rbspi->cs_wait = -1;
++
++	spin_lock_init(&rbspi->lock);
++	INIT_LIST_HEAD(&rbspi->queue);
++
++	err = spi_register_master(master);
++	if (err) {
++		dev_err(&pdev->dev, "failed to register SPI master\n");
++		goto err_iounmap;
++	}
++
++	return 0;
++
++err_iounmap:
++	iounmap(rbspi->base);
++err_put_master:
++	platform_set_drvdata(pdev, NULL);
++	spi_master_put(master);
++err_out:
++	return err;
++}
++
++static int rb4xx_spi_remove(struct platform_device *pdev)
++{
++	struct rb4xx_spi *rbspi = platform_get_drvdata(pdev);
++
++	iounmap(rbspi->base);
++	platform_set_drvdata(pdev, NULL);
++	spi_master_put(rbspi->master);
++
++	return 0;
++}
++
++static struct platform_driver rb4xx_spi_drv = {
++	.probe		= rb4xx_spi_probe,
++	.remove		= rb4xx_spi_remove,
++	.driver		= {
++		.name	= DRV_NAME,
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init rb4xx_spi_init(void)
++{
++	return platform_driver_register(&rb4xx_spi_drv);
++}
++subsys_initcall(rb4xx_spi_init);
++
++static void __exit rb4xx_spi_exit(void)
++{
++	platform_driver_unregister(&rb4xx_spi_drv);
++}
++
++module_exit(rb4xx_spi_exit);
++
++MODULE_DESCRIPTION(DRV_DESC);
++MODULE_VERSION(DRV_VERSION);
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
+diff -Nur linux-2.6.39.orig/drivers/spi/spi_rb4xx_cpld.c linux-2.6.39/drivers/spi/spi_rb4xx_cpld.c
+--- linux-2.6.39.orig/drivers/spi/spi_rb4xx_cpld.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/spi/spi_rb4xx_cpld.c	2011-04-27 12:19:22.317665385 +0200
+@@ -0,0 +1,440 @@
++/*
++ * SPI driver for the CPLD chip on the Mikrotik RB4xx boards
++ *
++ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This file was based on the patches for Linux 2.6.27.39 published by
++ * MikroTik for their RouterBoard 4xx series devices.
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/types.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/bitops.h>
++#include <linux/spi/spi.h>
++#include <linux/gpio.h>
++#include <linux/slab.h>
++
++#include <asm/mach-ar71xx/rb4xx_cpld.h>
++
++#define DRV_NAME	"spi-rb4xx-cpld"
++#define DRV_DESC	"RB4xx CPLD driver"
++#define DRV_VERSION	"0.1.0"
++
++#define CPLD_CMD_WRITE_NAND	0x08 /* send cmd, n x send data, send indle */
++#define CPLD_CMD_WRITE_CFG	0x09 /* send cmd, n x send cfg */
++#define CPLD_CMD_READ_NAND	0x0a /* send cmd, send idle, n x read data */
++#define CPLD_CMD_READ_FAST	0x0b /* send cmd, 4 x idle, n x read data */
++#define CPLD_CMD_LED5_ON	0x0c /* send cmd */
++#define CPLD_CMD_LED5_OFF	0x0d /* send cmd */
++
++struct rb4xx_cpld {
++	struct spi_device	*spi;
++	struct mutex		lock;
++	struct gpio_chip	chip;
++	unsigned int		config;
++};
++
++static struct rb4xx_cpld *rb4xx_cpld;
++
++static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip)
++{
++	return container_of(chip, struct rb4xx_cpld, chip);
++}
++
++static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd)
++{
++	struct spi_transfer t[1];
++	struct spi_message m;
++	unsigned char tx_buf[1];
++	int err;
++
++	spi_message_init(&m);
++	memset(&t, 0, sizeof(t));
++
++	t[0].tx_buf = tx_buf;
++	t[0].len = sizeof(tx_buf);
++	spi_message_add_tail(&t[0], &m);
++
++	tx_buf[0] = cmd;
++
++	err = spi_sync(cpld->spi, &m);
++	return err;
++}
++
++static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config)
++{
++	struct spi_transfer t[1];
++	struct spi_message m;
++	unsigned char cmd[2];
++	int err;
++
++	spi_message_init(&m);
++	memset(&t, 0, sizeof(t));
++
++	t[0].tx_buf = cmd;
++	t[0].len = sizeof(cmd);
++	spi_message_add_tail(&t[0], &m);
++
++	cmd[0] = CPLD_CMD_WRITE_CFG;
++	cmd[1] = config;
++
++	err = spi_sync(cpld->spi, &m);
++	return err;
++}
++
++static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask,
++				   unsigned value)
++{
++	unsigned int config;
++	int err;
++
++	config = cpld->config & ~mask;
++	config |= value;
++
++	if ((cpld->config ^ config) & 0xff) {
++		err = rb4xx_cpld_write_cfg(cpld, config);
++		if (err)
++			return err;
++	}
++
++	if ((cpld->config ^ config) & CPLD_CFG_nLED5) {
++		err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON :
++							   CPLD_CMD_LED5_OFF);
++		if (err)
++			return err;
++	}
++
++	cpld->config = config;
++	return 0;
++}
++
++int rb4xx_cpld_change_cfg(unsigned mask, unsigned value)
++{
++	int ret;
++
++	if (rb4xx_cpld == NULL)
++		return -ENODEV;
++
++	mutex_lock(&rb4xx_cpld->lock);
++	ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value);
++	mutex_unlock(&rb4xx_cpld->lock);
++
++	return ret;
++}
++EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg);
++
++int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf,
++			 const unsigned char *verify_buf, unsigned count)
++{
++	const unsigned char cmd[5] = {
++		CPLD_CMD_READ_FAST,
++		(addr >> 16) & 0xff,
++		(addr >> 8) & 0xff,
++		 addr & 0xff,
++		 0
++	};
++	struct spi_transfer t[2] = {
++		{
++			.tx_buf = &cmd,
++			.len = 5,
++		},
++		{
++			.tx_buf = verify_buf,
++			.rx_buf = rx_buf,
++			.len = count,
++			.verify = (verify_buf != NULL),
++		},
++	};
++	struct spi_message m;
++
++	if (rb4xx_cpld == NULL)
++		return -ENODEV;
++
++	spi_message_init(&m);
++	m.fast_read = 1;
++	spi_message_add_tail(&t[0], &m);
++	spi_message_add_tail(&t[1], &m);
++	return spi_sync(rb4xx_cpld->spi, &m);
++}
++EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from);
++
++#if 0
++int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf,
++		    unsigned count)
++{
++	struct spi_transfer t[2];
++	struct spi_message m;
++	unsigned char cmd[2];
++
++	if (rb4xx_cpld == NULL)
++		return -ENODEV;
++
++	spi_message_init(&m);
++	memset(&t, 0, sizeof(t));
++
++	/* send command */
++	t[0].tx_buf = cmd;
++	t[0].len = sizeof(cmd);
++	spi_message_add_tail(&t[0], &m);
++
++	cmd[0] = CPLD_CMD_READ_NAND;
++	cmd[1] = 0;
++
++	/* read data */
++	t[1].rx_buf = buf;
++	t[1].len = count;
++	spi_message_add_tail(&t[1], &m);
++
++	return spi_sync(rb4xx_cpld->spi, &m);
++}
++#else
++int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf,
++		    unsigned count)
++{
++	static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 };
++	struct spi_transfer t[2] = {
++		{
++			.tx_buf = &cmd,
++			.len = 2,
++		}, {
++			.tx_buf = verify_buf,
++			.rx_buf = rx_buf,
++			.len = count,
++			.verify = (verify_buf != NULL),
++		},
++	};
++	struct spi_message m;
++
++	if (rb4xx_cpld == NULL)
++		return -ENODEV;
++
++	spi_message_init(&m);
++	spi_message_add_tail(&t[0], &m);
++	spi_message_add_tail(&t[1], &m);
++	return spi_sync(rb4xx_cpld->spi, &m);
++}
++#endif
++EXPORT_SYMBOL_GPL(rb4xx_cpld_read);
++
++int rb4xx_cpld_write(const unsigned char *buf, unsigned count)
++{
++#if 0
++	struct spi_transfer t[3];
++	struct spi_message m;
++	unsigned char cmd[1];
++
++	if (rb4xx_cpld == NULL)
++		return -ENODEV;
++
++	memset(&t, 0, sizeof(t));
++	spi_message_init(&m);
++
++	/* send command */
++	t[0].tx_buf = cmd;
++	t[0].len = sizeof(cmd);
++	spi_message_add_tail(&t[0], &m);
++
++	cmd[0] = CPLD_CMD_WRITE_NAND;
++
++	/* write data */
++	t[1].tx_buf = buf;
++	t[1].len = count;
++	spi_message_add_tail(&t[1], &m);
++
++	/* send idle */
++	t[2].len = 1;
++	spi_message_add_tail(&t[2], &m);
++
++	return spi_sync(rb4xx_cpld->spi, &m);
++#else
++	static const unsigned char cmd = CPLD_CMD_WRITE_NAND;
++	struct spi_transfer t[3] = {
++		{
++			.tx_buf = &cmd,
++			.len = 1,
++		}, {
++			.tx_buf = buf,
++			.len = count,
++			.fast_write = 1,
++		}, {
++			.len = 1,
++			.fast_write = 1,
++		},
++	};
++	struct spi_message m;
++
++	if (rb4xx_cpld == NULL)
++		return -ENODEV;
++
++	spi_message_init(&m);
++	spi_message_add_tail(&t[0], &m);
++	spi_message_add_tail(&t[1], &m);
++	spi_message_add_tail(&t[2], &m);
++	return spi_sync(rb4xx_cpld->spi, &m);
++#endif
++}
++EXPORT_SYMBOL_GPL(rb4xx_cpld_write);
++
++static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset)
++{
++	struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
++	int ret;
++
++	mutex_lock(&cpld->lock);
++	ret = (cpld->config >> offset) & 1;
++	mutex_unlock(&cpld->lock);
++
++	return ret;
++}
++
++static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset,
++				int value)
++{
++	struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
++
++	mutex_lock(&cpld->lock);
++	__rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
++	mutex_unlock(&cpld->lock);
++}
++
++static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip,
++					   unsigned offset)
++{
++	return -EOPNOTSUPP;
++}
++
++static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip,
++					    unsigned offset,
++					    int value)
++{
++	struct rb4xx_cpld *cpld = gpio_to_cpld(chip);
++	int ret;
++
++	mutex_lock(&cpld->lock);
++	ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset);
++	mutex_unlock(&cpld->lock);
++
++	return ret;
++}
++
++static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base)
++{
++	int err;
++
++	/* init config */
++	cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 |
++		       CPLD_CFG_nLED4 | CPLD_CFG_nCE;
++	rb4xx_cpld_write_cfg(cpld, cpld->config);
++
++	/* setup GPIO chip */
++	cpld->chip.label = DRV_NAME;
++
++	cpld->chip.get = rb4xx_cpld_gpio_get;
++	cpld->chip.set = rb4xx_cpld_gpio_set;
++	cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input;
++	cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output;
++
++	cpld->chip.base = base;
++	cpld->chip.ngpio = CPLD_NUM_GPIOS;
++	cpld->chip.can_sleep = 1;
++	cpld->chip.dev = &cpld->spi->dev;
++	cpld->chip.owner = THIS_MODULE;
++
++	err = gpiochip_add(&cpld->chip);
++	if (err)
++		dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n",
++			err);
++
++	return err;
++}
++
++static int __devinit rb4xx_cpld_probe(struct spi_device *spi)
++{
++	struct rb4xx_cpld *cpld;
++	struct rb4xx_cpld_platform_data *pdata;
++	int err;
++
++	pdata = spi->dev.platform_data;
++	if (!pdata) {
++		dev_dbg(&spi->dev, "no platform data\n");
++		return -EINVAL;
++	}
++
++	cpld = kzalloc(sizeof(*cpld), GFP_KERNEL);
++	if (!cpld) {
++		dev_err(&spi->dev, "no memory for private data\n");
++		return -ENOMEM;
++	}
++
++	mutex_init(&cpld->lock);
++	cpld->spi = spi_dev_get(spi);
++	dev_set_drvdata(&spi->dev, cpld);
++
++	spi->mode = SPI_MODE_0;
++	spi->bits_per_word = 8;
++	err = spi_setup(spi);
++	if (err) {
++		dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
++		goto err_drvdata;
++	}
++
++	err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base);
++	if (err)
++		goto err_drvdata;
++
++	rb4xx_cpld = cpld;
++
++	return 0;
++
++err_drvdata:
++	dev_set_drvdata(&spi->dev, NULL);
++	kfree(cpld);
++
++	return err;
++}
++
++static int __devexit rb4xx_cpld_remove(struct spi_device *spi)
++{
++	struct rb4xx_cpld *cpld;
++
++	rb4xx_cpld = NULL;
++	cpld = dev_get_drvdata(&spi->dev);
++	dev_set_drvdata(&spi->dev, NULL);
++	kfree(cpld);
++
++	return 0;
++}
++
++static struct spi_driver rb4xx_cpld_driver = {
++	.driver = {
++		.name		= DRV_NAME,
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++	.probe		= rb4xx_cpld_probe,
++	.remove		= __devexit_p(rb4xx_cpld_remove),
++};
++
++static int __init rb4xx_cpld_init(void)
++{
++	return spi_register_driver(&rb4xx_cpld_driver);
++}
++module_init(rb4xx_cpld_init);
++
++static void __exit rb4xx_cpld_exit(void)
++{
++	spi_unregister_driver(&rb4xx_cpld_driver);
++}
++module_exit(rb4xx_cpld_exit);
++
++MODULE_DESCRIPTION(DRV_DESC);
++MODULE_VERSION(DRV_VERSION);
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
 diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/spi_vsc7385.c
 --- linux-2.6.39.orig/drivers/spi/spi_vsc7385.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/spi/spi_vsc7385.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,620 @@
++++ linux-2.6.39/drivers/spi/spi_vsc7385.c	2011-04-27 12:19:22.317665385 +0200
+@@ -0,0 +1,621 @@
 +/*
 + * SPI driver for the Vitesse VSC7385 ethernet switch
 + *
@@ -15735,8 +25397,8 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +#define VSC73XX_MAC_CFG_WEXC_DIS	(1 << 31)
 +#define VSC73XX_MAC_CFG_PORT_RST	(1 << 29)
 +#define VSC73XX_MAC_CFG_TX_EN		(1 << 28)
-+#define VSC73XX_MAC_CFG_SEED_LOAD      	(1 << 27)
-+#define VSC73XX_MAC_CFG_FDX	        (1 << 18)
++#define VSC73XX_MAC_CFG_SEED_LOAD	(1 << 27)
++#define VSC73XX_MAC_CFG_FDX		(1 << 18)
 +#define VSC73XX_MAC_CFG_GIGE		(1 << 17)
 +#define VSC73XX_MAC_CFG_RX_EN		(1 << 16)
 +#define VSC73XX_MAC_CFG_VLAN_DBLAWR	(1 << 15)
@@ -16077,7 +25739,8 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +		rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,
 +				  VSC73XX_ICPU_SRAM, &curVal);
 +		if (rc) {
-+			dev_err(&spi->dev, "could not read microcode %d\n",rc);
++			dev_err(&spi->dev, "could not read microcode %d\n",
++				rc);
 +			goto out;
 +		}
 +
@@ -16109,7 +25772,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +
 +	rc = vsc7385_icpu_start(vsc);
 +
-+ out:
++out:
 +	release_firmware(firmware);
 +	return rc;
 +}
@@ -16154,7 +25817,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +
 +	return 0;
 +
-+ err:
++err:
 +	return err;
 +}
 +
@@ -16199,7 +25862,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +
 +	rev = (t >> VSC73XX_ICPU_CHIPID_REV_SHIFT) &
 +	      VSC73XX_ICPU_CHIPID_REV_MASK;
-+	dev_info(&spi->dev, "VSC%04X (rev. %d) switch found \n", id, rev);
++	dev_info(&spi->dev, "VSC%04X (rev. %d) switch found\n", id, rev);
 +
 +	return 0;
 +}
@@ -16215,13 +25878,13 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +	pdata = spi->dev.platform_data;
 +	if (!pdata) {
 +		dev_err(&spi->dev, "no platform data specified\n");
-+		return-ENODEV;
++		return -ENODEV;
 +	}
 +
 +	vsc = kzalloc(sizeof(*vsc), GFP_KERNEL);
 +	if (!vsc) {
 +		dev_err(&spi->dev, "no memory for private data\n");
-+		return-ENOMEM;
++		return -ENOMEM;
 +	}
 +
 +	mutex_init(&vsc->lock);
@@ -16233,13 +25896,13 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +	spi->bits_per_word = 8;
 +	err = spi_setup(spi);
 +	if (err) {
-+		dev_err(&spi->dev, "spi_setup failed, err=%d \n", err);
++		dev_err(&spi->dev, "spi_setup failed, err=%d\n", err);
 +		goto err_drvdata;
 +	}
 +
 +	err = vsc7385_detect(vsc);
 +	if (err) {
-+		dev_err(&spi->dev, "no chip found, err=%d \n", err);
++		dev_err(&spi->dev, "no chip found, err=%d\n", err);
 +		goto err_drvdata;
 +	}
 +
@@ -16253,7 +25916,7 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +
 +	return 0;
 +
-+ err_drvdata:
++err_drvdata:
 +	dev_set_drvdata(&spi->dev, NULL);
 +	kfree(vsc);
 +	return err;
@@ -16297,40 +25960,701 @@ diff -Nur linux-2.6.39.orig/drivers/spi/spi_vsc7385.c linux-2.6.39/drivers/spi/s
 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 +MODULE_LICENSE("GPL v2");
 +
-diff -Nur linux-2.6.39.orig/drivers/usb/host/Kconfig linux-2.6.39/drivers/usb/host/Kconfig
---- linux-2.6.39.orig/drivers/usb/host/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/usb/host/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -129,6 +129,13 @@
- config USB_FSL_MPH_DR_OF
- 	tristate
- 
-+config USB_EHCI_AR71XX
-+	bool "USB EHCI support for AR71xx"
-+	depends on USB_EHCI_HCD && ATHEROS_AR71XX
-+	default y
-+	help
-+	  Support for Atheros AR71xx built-in EHCI controller
+diff -Nur linux-2.6.39.orig/drivers/tty/serial/ar933x_uart.c linux-2.6.39/drivers/tty/serial/ar933x_uart.c
+--- linux-2.6.39.orig/drivers/tty/serial/ar933x_uart.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/drivers/tty/serial/ar933x_uart.c	2011-08-06 09:32:37.098016752 +0200
+@@ -0,0 +1,688 @@
++/*
++ *  Atheros AR933X SoC built-in UART driver
++ *
++ *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
 +
- config USB_EHCI_FSL
- 	bool "Support for Freescale on-chip EHCI USB controller"
- 	depends on USB_EHCI_HCD && FSL_SOC
-@@ -287,6 +294,13 @@
- 	  Enables support for the on-chip OHCI controller on
- 	  OMAP3 and later chips.
- 
-+config USB_OHCI_AR71XX
-+	bool "USB OHCI support for Atheros AR71xx"
-+	depends on USB_OHCI_HCD && ATHEROS_AR71XX
-+	default y
-+	help
-+	  Support for Atheros AR71xx built-in OHCI controller
++#include <linux/module.h>
++#include <linux/ioport.h>
++#include <linux/init.h>
++#include <linux/console.h>
++#include <linux/sysrq.h>
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <linux/tty.h>
++#include <linux/tty_flip.h>
++#include <linux/serial_core.h>
++#include <linux/serial.h>
++#include <linux/slab.h>
++#include <linux/io.h>
++#include <linux/irq.h>
 +
- config USB_OHCI_HCD_PPC_SOC
- 	bool "OHCI support for on-chip PPC USB controller"
- 	depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
++#include <asm/mach-ar71xx/ar933x_uart.h>
++#include <asm/mach-ar71xx/ar933x_uart_platform.h>
++
++#define DRIVER_NAME "ar933x-uart"
++
++#define AR933X_DUMMY_STATUS_RD	0x01
++
++static struct uart_driver ar933x_uart_driver;
++
++struct ar933x_uart_port {
++	struct uart_port	port;
++	unsigned int		ier;	/* shadow Interrupt Enable Register */
++};
++
++static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
++					    int offset)
++{
++	return readl(up->port.membase + offset);
++}
++
++static inline void ar933x_uart_write(struct ar933x_uart_port *up,
++				     int offset, unsigned int value)
++{
++	writel(value, up->port.membase + offset);
++}
++
++static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
++				  unsigned int offset,
++				  unsigned int mask,
++				  unsigned int val)
++{
++	unsigned int t;
++
++	t = ar933x_uart_read(up, offset);
++	t &= ~mask;
++	t |= val;
++	ar933x_uart_write(up, offset, t);
++}
++
++static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
++				       unsigned int offset,
++				       unsigned int val)
++{
++	ar933x_uart_rmw(up, offset, 0, val);
++}
++
++static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
++					 unsigned int offset,
++					 unsigned int val)
++{
++	ar933x_uart_rmw(up, offset, val, 0);
++}
++
++static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
++{
++	up->ier |= AR933X_UART_INT_TX_EMPTY;
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
++}
++
++static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
++{
++	up->ier &= ~AR933X_UART_INT_TX_EMPTY;
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
++}
++
++static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
++{
++	unsigned int rdata;
++
++	rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
++	rdata |= AR933X_UART_DATA_TX_CSR;
++	ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
++}
++
++static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++	unsigned long flags;
++	unsigned int rdata;
++
++	spin_lock_irqsave(&up->port.lock, flags);
++	rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
++	spin_unlock_irqrestore(&up->port.lock, flags);
++
++	return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
++}
++
++static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
++{
++	return TIOCM_CAR;
++}
++
++static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
++{
++}
++
++static void ar933x_uart_start_tx(struct uart_port *port)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++
++	ar933x_uart_start_tx_interrupt(up);
++}
++
++static void ar933x_uart_stop_tx(struct uart_port *port)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++
++	ar933x_uart_stop_tx_interrupt(up);
++}
++
++static void ar933x_uart_stop_rx(struct uart_port *port)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++
++	up->ier &= ~AR933X_UART_INT_RX_VALID;
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
++}
++
++static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++	unsigned long flags;
++
++	spin_lock_irqsave(&up->port.lock, flags);
++	if (break_state == -1)
++		ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
++				    AR933X_UART_CS_TX_BREAK);
++	else
++		ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
++				      AR933X_UART_CS_TX_BREAK);
++	spin_unlock_irqrestore(&up->port.lock, flags);
++}
++
++static void ar933x_uart_enable_ms(struct uart_port *port)
++{
++}
++
++static void ar933x_uart_set_termios(struct uart_port *port,
++				    struct ktermios *new,
++				    struct ktermios *old)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++	unsigned int cs;
++	unsigned long flags;
++	unsigned int baud, scale;
++
++	/* Only CS8 is supported */
++	new->c_cflag &= ~CSIZE;
++	new->c_cflag |= CS8;
++
++	/* Only one stop bit is supported */
++	new->c_cflag &= ~CSTOPB;
++
++	cs = 0;
++	if (new->c_cflag & PARENB) {
++		if (!(new->c_cflag & PARODD))
++			cs |= AR933X_UART_CS_PARITY_EVEN;
++		else
++			cs |= AR933X_UART_CS_PARITY_ODD;
++	} else {
++		cs |= AR933X_UART_CS_PARITY_NONE;
++	}
++
++	/* Mark/space parity is not supported */
++	new->c_cflag &= ~CMSPAR;
++
++	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
++	scale = (port->uartclk / (16 * baud)) - 1;
++
++	/*
++	 * Ok, we're now changing the port state. Do it with
++	 * interrupts disabled.
++	 */
++	spin_lock_irqsave(&up->port.lock, flags);
++
++	/* Update the per-port timeout. */
++	uart_update_timeout(port, new->c_cflag, baud);
++
++	up->port.ignore_status_mask = 0;
++
++	/* ignore all characters if CREAD is not set */
++	if ((new->c_cflag & CREAD) == 0)
++		up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
++
++	ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
++			  scale << AR933X_UART_CLOCK_SCALE_S | 8192);
++
++	/* setup configuration register */
++	ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
++
++	/* enable host interrupt */
++	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
++			    AR933X_UART_CS_HOST_INT_EN);
++
++	spin_unlock_irqrestore(&up->port.lock, flags);
++
++	if (tty_termios_baud_rate(new))
++		tty_termios_encode_baud_rate(new, baud, baud);
++}
++
++static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
++{
++	struct tty_struct *tty;
++	int max_count = 256;
++
++	tty = tty_port_tty_get(&up->port.state->port);
++	do {
++		unsigned int rdata;
++		unsigned char ch;
++
++		rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
++		if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
++			break;
++
++		/* remove the character from the FIFO */
++		ar933x_uart_write(up, AR933X_UART_DATA_REG,
++				  AR933X_UART_DATA_RX_CSR);
++
++		if (!tty) {
++			/* discard the data if no tty available */
++			continue;
++		}
++
++		up->port.icount.rx++;
++		ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
++
++		if (uart_handle_sysrq_char(&up->port, ch))
++			continue;
++
++		if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
++			tty_insert_flip_char(tty, ch, TTY_NORMAL);
++	} while (max_count-- > 0);
++
++	if (tty) {
++		tty_flip_buffer_push(tty);
++		tty_kref_put(tty);
++	}
++}
++
++static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
++{
++	struct circ_buf *xmit = &up->port.state->xmit;
++	int count;
++
++	if (uart_tx_stopped(&up->port))
++		return;
++
++	count = up->port.fifosize;
++	do {
++		unsigned int rdata;
++
++		rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
++		if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
++			break;
++
++		if (up->port.x_char) {
++			ar933x_uart_putc(up, up->port.x_char);
++			up->port.icount.tx++;
++			up->port.x_char = 0;
++			continue;
++		}
++
++		if (uart_circ_empty(xmit))
++			break;
++
++		ar933x_uart_putc(up, xmit->buf[xmit->tail]);
++
++		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
++		up->port.icount.tx++;
++	} while (--count > 0);
++
++	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
++		uart_write_wakeup(&up->port);
++
++	if (!uart_circ_empty(xmit))
++		ar933x_uart_start_tx_interrupt(up);
++}
++
++static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
++{
++	struct ar933x_uart_port *up = dev_id;
++	unsigned int status;
++
++	status = ar933x_uart_read(up, AR933X_UART_CS_REG);
++	if ((status & AR933X_UART_CS_HOST_INT) == 0)
++		return IRQ_NONE;
++
++	spin_lock(&up->port.lock);
++
++	status = ar933x_uart_read(up, AR933X_UART_INT_REG);
++	status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
++
++	if (status & AR933X_UART_INT_RX_VALID) {
++		ar933x_uart_write(up, AR933X_UART_INT_REG,
++				  AR933X_UART_INT_RX_VALID);
++		ar933x_uart_rx_chars(up);
++	}
++
++	if (status & AR933X_UART_INT_TX_EMPTY) {
++		ar933x_uart_write(up, AR933X_UART_INT_REG,
++				  AR933X_UART_INT_TX_EMPTY);
++		ar933x_uart_stop_tx_interrupt(up);
++		ar933x_uart_tx_chars(up);
++	}
++
++	spin_unlock(&up->port.lock);
++
++	return IRQ_HANDLED;
++}
++
++static int ar933x_uart_startup(struct uart_port *port)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++	unsigned long flags;
++	int ret;
++
++	ret = request_irq(up->port.irq, ar933x_uart_interrupt,
++			  up->port.irqflags, dev_name(up->port.dev), up);
++	if (ret)
++		return ret;
++
++	spin_lock_irqsave(&up->port.lock, flags);
++
++	/* Enable HOST interrupts */
++	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
++			    AR933X_UART_CS_HOST_INT_EN);
++
++	/* Enable RX interrupts */
++	up->ier = AR933X_UART_INT_RX_VALID;
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
++
++	spin_unlock_irqrestore(&up->port.lock, flags);
++
++	return 0;
++}
++
++static void ar933x_uart_shutdown(struct uart_port *port)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++
++	/* Disable all interrupts */
++	up->ier = 0;
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
++
++	/* Disable break condition */
++	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
++			      AR933X_UART_CS_TX_BREAK);
++
++	free_irq(up->port.irq, up);
++}
++
++static const char *ar933x_uart_type(struct uart_port *port)
++{
++	return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
++}
++
++static void ar933x_uart_release_port(struct uart_port *port)
++{
++	/* Nothing to release ... */
++}
++
++static int ar933x_uart_request_port(struct uart_port *port)
++{
++	/* UARTs always present */
++	return 0;
++}
++
++static void ar933x_uart_config_port(struct uart_port *port, int flags)
++{
++	if (flags & UART_CONFIG_TYPE)
++		port->type = PORT_AR933X;
++}
++
++static int ar933x_uart_verify_port(struct uart_port *port,
++				   struct serial_struct *ser)
++{
++	if (ser->type != PORT_UNKNOWN &&
++	    ser->type != PORT_AR933X)
++		return -EINVAL;
++
++	if (ser->irq < 0 || ser->irq >= NR_IRQS)
++		return -EINVAL;
++
++	if (ser->baud_base < 28800)
++		return -EINVAL;
++
++	return 0;
++}
++
++static struct uart_ops ar933x_uart_ops = {
++	.tx_empty	= ar933x_uart_tx_empty,
++	.set_mctrl	= ar933x_uart_set_mctrl,
++	.get_mctrl	= ar933x_uart_get_mctrl,
++	.stop_tx	= ar933x_uart_stop_tx,
++	.start_tx	= ar933x_uart_start_tx,
++	.stop_rx	= ar933x_uart_stop_rx,
++	.enable_ms	= ar933x_uart_enable_ms,
++	.break_ctl	= ar933x_uart_break_ctl,
++	.startup	= ar933x_uart_startup,
++	.shutdown	= ar933x_uart_shutdown,
++	.set_termios	= ar933x_uart_set_termios,
++	.type		= ar933x_uart_type,
++	.release_port	= ar933x_uart_release_port,
++	.request_port	= ar933x_uart_request_port,
++	.config_port	= ar933x_uart_config_port,
++	.verify_port	= ar933x_uart_verify_port,
++};
++
++#ifdef CONFIG_SERIAL_AR933X_CONSOLE
++
++static struct ar933x_uart_port *
++ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
++
++static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
++{
++	unsigned int status;
++	unsigned int timeout = 60000;
++
++	/* Wait up to 60ms for the character(s) to be sent. */
++	do {
++		status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
++		if (--timeout == 0)
++			break;
++		udelay(1);
++	} while ((status & AR933X_UART_DATA_TX_CSR) == 0);
++}
++
++static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
++{
++	struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
++
++	ar933x_uart_wait_xmitr(up);
++	ar933x_uart_putc(up, ch);
++}
++
++static void ar933x_uart_console_write(struct console *co, const char *s,
++				      unsigned int count)
++{
++	struct ar933x_uart_port *up = ar933x_console_ports[co->index];
++	unsigned long flags;
++	unsigned int int_en;
++	int locked = 1;
++
++	local_irq_save(flags);
++
++	if (up->port.sysrq)
++		locked = 0;
++	else if (oops_in_progress)
++		locked = spin_trylock(&up->port.lock);
++	else
++		spin_lock(&up->port.lock);
++
++	/*
++	 * First save the IER then disable the interrupts
++	 */
++	int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
++
++	uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
++
++	/*
++	 * Finally, wait for transmitter to become empty
++	 * and restore the IER
++	 */
++	ar933x_uart_wait_xmitr(up);
++	ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
++
++	ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
++
++	if (locked)
++		spin_unlock(&up->port.lock);
++
++	local_irq_restore(flags);
++}
++
++static int ar933x_uart_console_setup(struct console *co, char *options)
++{
++	struct ar933x_uart_port *up;
++	int baud = 115200;
++	int bits = 8;
++	int parity = 'n';
++	int flow = 'n';
++
++	if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
++		return -EINVAL;
++
++	up = ar933x_console_ports[co->index];
++	if (!up)
++		return -ENODEV;
++
++	if (options)
++		uart_parse_options(options, &baud, &parity, &bits, &flow);
++
++	return uart_set_options(&up->port, co, baud, parity, bits, flow);
++}
++
++static struct console ar933x_uart_console = {
++	.name		= "ttyATH",
++	.write		= ar933x_uart_console_write,
++	.device		= uart_console_device,
++	.setup		= ar933x_uart_console_setup,
++	.flags		= CON_PRINTBUFFER,
++	.index		= -1,
++	.data		= &ar933x_uart_driver,
++};
++
++static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
++{
++	ar933x_console_ports[up->port.line] = up;
++}
++
++#define AR933X_SERIAL_CONSOLE	(&ar933x_uart_console)
++
++#else
++
++static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {}
++
++#define AR933X_SERIAL_CONSOLE	NULL
++
++#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
++
++static struct uart_driver ar933x_uart_driver = {
++	.owner		= THIS_MODULE,
++	.driver_name	= DRIVER_NAME,
++	.dev_name	= "ttyATH",
++	.nr		= CONFIG_SERIAL_AR933X_NR_UARTS,
++	.cons		= AR933X_SERIAL_CONSOLE,
++};
++
++static int __devinit ar933x_uart_probe(struct platform_device *pdev)
++{
++	struct ar933x_uart_platform_data *pdata;
++	struct ar933x_uart_port *up;
++	struct uart_port *port;
++	struct resource *mem_res;
++	struct resource *irq_res;
++	int id;
++	int ret;
++
++	pdata = pdev->dev.platform_data;
++	if (!pdata)
++		return -EINVAL;
++
++	id = pdev->id;
++	if (id == -1)
++		id = 0;
++
++	if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
++		return -EINVAL;
++
++	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!mem_res) {
++		dev_err(&pdev->dev, "no MEM resource\n");
++		return -EINVAL;
++	}
++
++	irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
++	if (!irq_res) {
++		dev_err(&pdev->dev, "no IRQ resource\n");
++		return -EINVAL;
++	}
++
++	up = kzalloc(sizeof(struct ar933x_uart_port), GFP_KERNEL);
++	if (!up)
++		return -ENOMEM;
++
++	port = &up->port;
++	port->mapbase = mem_res->start;
++
++	port->membase = ioremap(mem_res->start, AR933X_UART_REGS_SIZE);
++	if (!port->membase) {
++		ret = -ENOMEM;
++		goto err_free_up;
++	}
++
++	port->line = id;
++	port->irq = irq_res->start;
++	port->dev = &pdev->dev;
++	port->type = PORT_AR933X;
++	port->iotype = UPIO_MEM32;
++	port->uartclk = pdata->uartclk;
++
++	port->regshift = 2;
++	port->fifosize = AR933X_UART_FIFO_SIZE;
++	port->ops = &ar933x_uart_ops;
++
++	ar933x_uart_add_console_port(up);
++
++	ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
++	if (ret)
++		goto err_unmap;
++
++	platform_set_drvdata(pdev, up);
++	return 0;
++
++err_unmap:
++	iounmap(up->port.membase);
++err_free_up:
++	kfree(up);
++	return ret;
++}
++
++static int __devexit ar933x_uart_remove(struct platform_device *pdev)
++{
++	struct ar933x_uart_port *up;
++
++	up = platform_get_drvdata(pdev);
++	platform_set_drvdata(pdev, NULL);
++
++	if (up) {
++		uart_remove_one_port(&ar933x_uart_driver, &up->port);
++		iounmap(up->port.membase);
++		kfree(up);
++	}
++
++	return 0;
++}
++
++static struct platform_driver ar933x_uart_platform_driver = {
++	.probe		= ar933x_uart_probe,
++	.remove		= __devexit_p(ar933x_uart_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++		.owner		= THIS_MODULE,
++	},
++};
++
++static int __init ar933x_uart_init(void)
++{
++	int ret;
++
++	ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS;
++	ret = uart_register_driver(&ar933x_uart_driver);
++	if (ret)
++		goto err_out;
++
++	ret = platform_driver_register(&ar933x_uart_platform_driver);
++	if (ret)
++		goto err_unregister_uart_driver;
++
++	return 0;
++
++err_unregister_uart_driver:
++	uart_unregister_driver(&ar933x_uart_driver);
++err_out:
++	return ret;
++}
++
++static void __exit ar933x_uart_exit(void)
++{
++	platform_driver_unregister(&ar933x_uart_platform_driver);
++	uart_unregister_driver(&ar933x_uart_driver);
++}
++
++module_init(ar933x_uart_init);
++module_exit(ar933x_uart_exit);
++
++MODULE_DESCRIPTION("Atheros AR933X UART driver");
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" DRIVER_NAME);
 diff -Nur linux-2.6.39.orig/drivers/usb/host/ehci-ar71xx.c linux-2.6.39/drivers/usb/host/ehci-ar71xx.c
 --- linux-2.6.39.orig/drivers/usb/host/ehci-ar71xx.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/usb/host/ehci-ar71xx.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/usb/host/ehci-ar71xx.c	2011-04-27 12:19:22.267661616 +0200
 @@ -0,0 +1,242 @@
 +/*
 + *  Bus Glue for Atheros AR71xx built-in EHCI controller.
@@ -16451,12 +26775,12 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ehci-ar71xx.c linux-2.6.39/drivers/
 +
 +	return 0;
 +
-+ err_iounmap:
++err_iounmap:
 +	iounmap(hcd->regs);
 +
-+ err_release_region:
++err_release_region:
 +	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-+ err_put_hcd:
++err_put_hcd:
 +	usb_put_hcd(hcd);
 +	return ret;
 +}
@@ -16576,7 +26900,7 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ehci-ar71xx.c linux-2.6.39/drivers/
 +};
 diff -Nur linux-2.6.39.orig/drivers/usb/host/ehci-hcd.c linux-2.6.39/drivers/usb/host/ehci-hcd.c
 --- linux-2.6.39.orig/drivers/usb/host/ehci-hcd.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/usb/host/ehci-hcd.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/usb/host/ehci-hcd.c	2011-08-22 16:21:42.807985568 +0200
 @@ -1265,6 +1265,11 @@
  #define PLATFORM_DRIVER		tegra_ehci_driver
  #endif
@@ -16589,9 +26913,40 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ehci-hcd.c linux-2.6.39/drivers/usb
  #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
      !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
      !defined(XILINX_OF_PLATFORM_DRIVER)
+diff -Nur linux-2.6.39.orig/drivers/usb/host/Kconfig linux-2.6.39/drivers/usb/host/Kconfig
+--- linux-2.6.39.orig/drivers/usb/host/Kconfig	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/usb/host/Kconfig	2011-08-22 16:21:42.767983341 +0200
+@@ -129,6 +129,13 @@
+ config USB_FSL_MPH_DR_OF
+ 	tristate
+ 
++config USB_EHCI_AR71XX
++	bool "USB EHCI support for AR71xx"
++	depends on USB_EHCI_HCD && ATHEROS_AR71XX
++	default y
++	help
++	  Support for Atheros AR71xx built-in EHCI controller
++
+ config USB_EHCI_FSL
+ 	bool "Support for Freescale on-chip EHCI USB controller"
+ 	depends on USB_EHCI_HCD && FSL_SOC
+@@ -287,6 +294,13 @@
+ 	  Enables support for the on-chip OHCI controller on
+ 	  OMAP3 and later chips.
+ 
++config USB_OHCI_AR71XX
++	bool "USB OHCI support for Atheros AR71xx"
++	depends on USB_OHCI_HCD && ATHEROS_AR71XX
++	default y
++	help
++	  Support for Atheros AR71xx built-in OHCI controller
++
+ config USB_OHCI_HCD_PPC_SOC
+ 	bool "OHCI support for on-chip PPC USB controller"
+ 	depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
 diff -Nur linux-2.6.39.orig/drivers/usb/host/ohci-ar71xx.c linux-2.6.39/drivers/usb/host/ohci-ar71xx.c
 --- linux-2.6.39.orig/drivers/usb/host/ohci-ar71xx.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/usb/host/ohci-ar71xx.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/usb/host/ohci-ar71xx.c	2011-04-27 12:19:22.267661616 +0200
 @@ -0,0 +1,165 @@
 +/*
 + *  OHCI HCD (Host Controller Driver) for USB.
@@ -16665,11 +27020,11 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ohci-ar71xx.c linux-2.6.39/drivers/
 +
 +	return 0;
 +
-+ err_stop_hcd:
++err_stop_hcd:
 +	iounmap(hcd->regs);
-+ err_release_region:
++err_release_region:
 +	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
-+ err_put_hcd:
++err_put_hcd:
 +	usb_put_hcd(hcd);
 +	return ret;
 +}
@@ -16697,7 +27052,7 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ohci-ar71xx.c linux-2.6.39/drivers/
 +
 +	return 0;
 +
-+ err:
++err:
 +	ohci_stop(hcd);
 +	return ret;
 +}
@@ -16760,7 +27115,7 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ohci-ar71xx.c linux-2.6.39/drivers/
 +};
 diff -Nur linux-2.6.39.orig/drivers/usb/host/ohci-hcd.c linux-2.6.39/drivers/usb/host/ohci-hcd.c
 --- linux-2.6.39.orig/drivers/usb/host/ohci-hcd.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/usb/host/ohci-hcd.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/drivers/usb/host/ohci-hcd.c	2011-08-22 16:21:42.847983209 +0200
 @@ -1105,6 +1105,11 @@
  #define PLATFORM_DRIVER		ohci_hcd_cns3xxx_driver
  #endif
@@ -16773,44 +27128,19 @@ diff -Nur linux-2.6.39.orig/drivers/usb/host/ohci-hcd.c linux-2.6.39/drivers/usb
  #if	!defined(PCI_DRIVER) &&		\
  	!defined(PLATFORM_DRIVER) &&	\
  	!defined(OMAP1_PLATFORM_DRIVER) &&	\
-diff -Nur linux-2.6.39.orig/drivers/watchdog/Kconfig linux-2.6.39/drivers/watchdog/Kconfig
---- linux-2.6.39.orig/drivers/watchdog/Kconfig	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/watchdog/Kconfig	2011-05-27 14:36:51.000000000 +0200
-@@ -990,6 +990,13 @@
- 	  To compile this driver as a loadable module, choose M here.
- 	  The module will be called bcm63xx_wdt.
- 
-+config AR71XX_WDT
-+	tristate "Atheros AR71xx Watchdog Timer"
-+	depends on ATHEROS_AR71XX
-+	help
-+	  Hardware driver for the built-in watchdog timer on the Atheros
-+	  AR71xx SoCs.
-+
- # PARISC Architecture
- 
- # POWERPC Architecture
-diff -Nur linux-2.6.39.orig/drivers/watchdog/Makefile linux-2.6.39/drivers/watchdog/Makefile
---- linux-2.6.39.orig/drivers/watchdog/Makefile	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/watchdog/Makefile	2011-05-27 14:36:51.000000000 +0200
-@@ -121,6 +121,7 @@
- obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
- obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
- obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
-+obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
- obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
- octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
- 
 diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/watchdog/ar71xx_wdt.c
 --- linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/drivers/watchdog/ar71xx_wdt.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,270 @@
++++ linux-2.6.39/drivers/watchdog/ar71xx_wdt.c	2011-08-06 09:32:37.118022037 +0200
+@@ -0,0 +1,299 @@
 +/*
 + * Driver for the Atheros AR71xx SoC's built-in hardware watchdog timer.
 + *
++ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
 + * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
 + *
++ * Parts of this file are based on Atheros 2.6.31 BSP
++ *
 + * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
 + *	Author: Deepak Saxena <dsaxena@plexity.net>
 + *	Copyright 2004 (c) MontaVista, Software, Inc.
@@ -16835,6 +27165,7 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +#include <linux/platform_device.h>
 +#include <linux/types.h>
 +#include <linux/watchdog.h>
++#include <linux/delay.h>
 +
 +#include <asm/mach-ar71xx/ar71xx.h>
 +
@@ -16860,20 +27191,22 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +static int wdt_timeout = WDT_TIMEOUT;
 +static int boot_status;
 +static int max_timeout;
++static u32 wdt_clk_freq;
 +
-+static void inline ar71xx_wdt_keepalive(void)
++static inline void ar71xx_wdt_keepalive(void)
 +{
-+	ar71xx_reset_wr(AR71XX_RESET_REG_WDOG, ar71xx_ahb_freq * wdt_timeout);
++	ar71xx_reset_wr(AR71XX_RESET_REG_WDOG, wdt_clk_freq * wdt_timeout);
 +}
 +
-+static void inline ar71xx_wdt_enable(void)
++static inline void ar71xx_wdt_enable(void)
 +{
 +	printk(KERN_DEBUG DRV_NAME ": enabling watchdog timer\n");
 +	ar71xx_wdt_keepalive();
++	udelay(2);
 +	ar71xx_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
 +}
 +
-+static void inline ar71xx_wdt_disable(void)
++static inline void ar71xx_wdt_disable(void)
 +{
 +	printk(KERN_DEBUG DRV_NAME ": disabling watchdog timer\n");
 +	ar71xx_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
@@ -16922,7 +27255,7 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +static ssize_t ar71xx_wdt_write(struct file *file, const char *data,
 +				size_t len, loff_t *ppos)
 +{
-+        if (len) {
++	if (len) {
 +		if (!nowayout) {
 +			size_t i;
 +
@@ -16949,11 +27282,11 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +static struct watchdog_info ar71xx_wdt_info = {
 +	.options		= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
 +				  WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
-+	.firmware_version 	= 0,
++	.firmware_version	= 0,
 +	.identity		= "AR71XX watchdog",
 +};
 +
-+static int ar71xx_wdt_ioctl(struct inode *inode, struct file *file,
++static long ar71xx_wdt_ioctl(struct file *file,
 +			    unsigned int cmd, unsigned long arg)
 +{
 +	int t;
@@ -16963,7 +27296,7 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +	case WDIOC_GETSUPPORT:
 +		ret = copy_to_user((struct watchdog_info *)arg,
 +				   &ar71xx_wdt_info,
-+				   sizeof(&ar71xx_wdt_info)) ? -EFAULT : 0;
++				   sizeof(ar71xx_wdt_info)) ? -EFAULT : 0;
 +		break;
 +
 +	case WDIOC_GETSTATUS:
@@ -17004,7 +27337,7 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +static const struct file_operations ar71xx_wdt_fops = {
 +	.owner		= THIS_MODULE,
 +	.write		= ar71xx_wdt_write,
-+	.ioctl		= ar71xx_wdt_ioctl,
++	.unlocked_ioctl	= ar71xx_wdt_ioctl,
 +	.open		= ar71xx_wdt_open,
 +	.release	= ar71xx_wdt_release,
 +};
@@ -17019,12 +27352,35 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +{
 +	int ret;
 +
-+	max_timeout = (0xfffffffful / ar71xx_ahb_freq);
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++	case AR71XX_SOC_AR7240:
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++		wdt_clk_freq = ar71xx_ahb_freq;
++		break;
++
++	case AR71XX_SOC_AR9330:
++	case AR71XX_SOC_AR9331:
++	case AR71XX_SOC_AR9341:
++	case AR71XX_SOC_AR9342:
++	case AR71XX_SOC_AR9344:
++		wdt_clk_freq = ar71xx_ref_freq;
++		break;
++
++	default:
++		BUG();
++	}
++
++	max_timeout = (0xfffffffful / wdt_clk_freq);
 +	wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
 +
-+	boot_status =
-+		(ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET) ?
-+		WDIOF_CARDRESET : 0;
++	if (ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET)
++		boot_status = WDIOF_CARDRESET;
 +
 +	ret = misc_register(&ar71xx_wdt_miscdev);
 +	if (ret)
@@ -17033,7 +27389,7 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +	printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
 +
 +	printk(KERN_DEBUG DRV_NAME ": timeout=%d secs (max=%d)\n",
-+				 	wdt_timeout, max_timeout);
++					wdt_timeout, max_timeout);
 +
 +	return 0;
 +
@@ -17075,99 +27431,204 @@ diff -Nur linux-2.6.39.orig/drivers/watchdog/ar71xx_wdt.c linux-2.6.39/drivers/w
 +MODULE_LICENSE("GPL v2");
 +MODULE_ALIAS("platform:" DRV_NAME);
 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+diff -Nur linux-2.6.39.orig/drivers/watchdog/Kconfig linux-2.6.39/drivers/watchdog/Kconfig
+--- linux-2.6.39.orig/drivers/watchdog/Kconfig	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/watchdog/Kconfig	2011-08-22 16:22:00.627980889 +0200
+@@ -990,6 +990,13 @@
+ 	  To compile this driver as a loadable module, choose M here.
+ 	  The module will be called bcm63xx_wdt.
+ 
++config AR71XX_WDT
++	tristate "Atheros AR71xx Watchdog Timer"
++	depends on ATHEROS_AR71XX
++	help
++	  Hardware driver for the built-in watchdog timer on the Atheros
++	  AR71xx SoCs.
++
+ # PARISC Architecture
+ 
+ # POWERPC Architecture
+diff -Nur linux-2.6.39.orig/drivers/watchdog/Makefile linux-2.6.39/drivers/watchdog/Makefile
+--- linux-2.6.39.orig/drivers/watchdog/Makefile	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/drivers/watchdog/Makefile	2011-08-22 16:22:00.647986892 +0200
+@@ -119,6 +119,7 @@
+ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
+ obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
+ obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
++obj-$(CONFIG_AR71XX_WDT) += ar71xx_wdt.o
+ obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
 diff -Nur linux-2.6.39.orig/include/linux/ath9k_platform.h linux-2.6.39/include/linux/ath9k_platform.h
 --- linux-2.6.39.orig/include/linux/ath9k_platform.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/include/linux/ath9k_platform.h	2011-05-27 14:36:51.000000000 +0200
-@@ -1,19 +1,11 @@
- /*
-- * Copyright (c) 2008 Atheros Communications Inc.
-- * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
-- * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
-+ * ath9k platform data defines
-  *
-- * Permission to use, copy, modify, and/or distribute this software for any
-- * purpose with or without fee is hereby granted, provided that the above
-- * copyright notice and this permission notice appear in all copies.
-+ * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
-  *
-- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-  */
- 
- #ifndef _LINUX_ATH9K_PLATFORM_H
-@@ -23,6 +15,9 @@
++++ linux-2.6.39/include/linux/ath9k_platform.h	2011-08-06 09:32:36.638021723 +0200
+@@ -23,6 +23,15 @@
  
  struct ath9k_platform_data {
  	u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
 +	u8 *macaddr;
 +
-+	unsigned long quirk_wndr3700:1;
++	int led_pin;
++	u32 gpio_mask;
++	u32 gpio_val;
++
++	bool is_clk_25mhz;
++	int (*get_mac_revision)(void);
++	int (*external_reset)(void);
  };
  
  #endif /* _LINUX_ATH9K_PLATFORM_H */
-diff -Nur linux-2.6.39.orig/include/linux/gpio_buttons.h linux-2.6.39/include/linux/gpio_buttons.h
---- linux-2.6.39.orig/include/linux/gpio_buttons.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/include/linux/gpio_buttons.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,33 @@
+diff -Nur linux-2.6.39.orig/include/linux/ip.h linux-2.6.39/include/linux/ip.h
+--- linux-2.6.39.orig/include/linux/ip.h	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/include/linux/ip.h	2011-08-24 05:53:21.239229027 +0200
+@@ -102,7 +102,7 @@
+ 	__be32	saddr;
+ 	__be32	daddr;
+ 	/*The options start here. */
+-};
++} __packed;
+ 
+ #ifdef __KERNEL__
+ #include <linux/skbuff.h>
+diff -Nur linux-2.6.39.orig/include/linux/ipv6.h linux-2.6.39/include/linux/ipv6.h
+--- linux-2.6.39.orig/include/linux/ipv6.h	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/include/linux/ipv6.h	2011-08-24 05:53:21.289229059 +0200
+@@ -126,7 +126,7 @@
+ 
+ 	struct	in6_addr	saddr;
+ 	struct	in6_addr	daddr;
+-};
++} __packed;
+ 
+ #ifdef __KERNEL__
+ /*
+diff -Nur linux-2.6.39.orig/include/linux/myloader.h linux-2.6.39/include/linux/myloader.h
+--- linux-2.6.39.orig/include/linux/myloader.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/include/linux/myloader.h	2011-08-24 03:12:08.307985040 +0200
+@@ -0,0 +1,120 @@
 +/*
-+ *  Definitions for the GPIO buttons interface driver
++ *  Compex's MyLoader specific definitions
 + *
-+ *  Copyright (C) 2007-2010 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
 + *
-+ *  This file was based on: /include/linux/gpio_keys.h
-+ *	The original gpio_keys.h seems not to have a license.
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License version 2 as
-+ *  published by the Free Software Foundation.
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
 + *
 + */
 +
-+#ifndef _GPIO_BUTTONS_H_
-+#define _GPIO_BUTTONS_H_
-+
-+struct gpio_button {
-+	int	gpio;		/* GPIO line number */
-+	int	active_low;
-+	char	*desc;		/* button description */
-+	int	type;		/* input event type (EV_KEY, EV_SW) */
-+	int	code;		/* input event code (KEY_*, SW_*) */
-+	int	threshold;	/* count threshold */
-+};
-+
-+struct gpio_buttons_platform_data {
-+	struct gpio_button *buttons;
-+	int	nbuttons;		/* number of buttons */
-+	int	poll_interval;		/* polling interval */
-+};
-+
-+#endif /* _GPIO_BUTTONS_H_ */
-diff -Nur linux-2.6.39.orig/include/linux/gpio_dev.h linux-2.6.39/include/linux/gpio_dev.h
---- linux-2.6.39.orig/include/linux/gpio_dev.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/include/linux/gpio_dev.h	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,11 @@
-+#ifndef _GPIODEV_H__
-+#define _GPIODEV_H__
-+
-+#define IOC_GPIODEV_MAGIC  'B'
-+#define GPIO_GET        _IO(IOC_GPIODEV_MAGIC, 10)
-+#define GPIO_SET        _IO(IOC_GPIODEV_MAGIC, 11)
-+#define GPIO_CLEAR      _IO(IOC_GPIODEV_MAGIC, 12)
-+#define GPIO_DIR_IN     _IO(IOC_GPIODEV_MAGIC, 13)
-+#define GPIO_DIR_OUT    _IO(IOC_GPIODEV_MAGIC, 14)
-+
-+#endif
++#ifndef _MYLOADER_H_
++#define _MYLOADER_H_
++
++/* Myloader specific magic numbers */
++#define MYLO_MAGIC_SYS_PARAMS	0x20021107
++#define MYLO_MAGIC_PARTITIONS	0x20021103
++#define MYLO_MAGIC_BOARD_PARAMS	0x20021103
++
++/* Vendor ID's (seems to be same as the PCI vendor ID's) */
++#define VENID_COMPEX		0x11F6
++
++/* Devices based on the ADM5120 */
++#define DEVID_COMPEX_NP27G	0x0078
++#define DEVID_COMPEX_NP28G	0x044C
++#define DEVID_COMPEX_NP28GHS	0x044E
++#define DEVID_COMPEX_WP54Gv1C	0x0514
++#define DEVID_COMPEX_WP54G	0x0515
++#define DEVID_COMPEX_WP54AG	0x0546
++#define DEVID_COMPEX_WPP54AG	0x0550
++#define DEVID_COMPEX_WPP54G	0x0555
++
++/* Devices based on the Atheros AR2317 */
++#define DEVID_COMPEX_NP25G	0x05E6
++#define DEVID_COMPEX_WPE53G	0x05DC
++
++/* Devices based on the Atheros AR71xx */
++#define DEVID_COMPEX_WP543	0x0640
++
++/* Devices based on the IXP422 */
++#define DEVID_COMPEX_WP18	0x047E
++#define DEVID_COMPEX_NP18A	0x0489
++
++/* Other devices */
++#define DEVID_COMPEX_NP26G8M	0x03E8
++#define DEVID_COMPEX_NP26G16M	0x03E9
++
++struct mylo_partition {
++	uint16_t	flags;	/* partition flags */
++	uint16_t	type;	/* type of the partition */
++	uint32_t	addr;	/* relative address of the partition from the
++				   flash start */
++	uint32_t	size;	/* size of the partition in bytes */
++	uint32_t	param;	/* if this is the active partition, the
++				   MyLoader load code to this address */
++};
++
++#define PARTITION_FLAG_ACTIVE	0x8000 /* this is the active partition,
++					* MyLoader loads firmware from here */
++#define PARTITION_FLAG_ISRAM	0x2000 /* FIXME: this is a RAM partition? */
++#define PARTIIION_FLAG_RAMLOAD	0x1000 /* FIXME: load this partition into the RAM? */
++#define PARTITION_FLAG_PRELOAD	0x0800 /* the partition data preloaded to RAM
++					* before decompression */
++#define PARTITION_FLAG_LZMA	0x0100 /* partition data compressed by LZMA */
++#define PARTITION_FLAG_HAVEHDR  0x0002 /* the partition data have a header */
++
++#define PARTITION_TYPE_FREE	0
++#define PARTITION_TYPE_USED	1
++
++#define MYLO_MAX_PARTITIONS	8	/* maximum number of partitions in the
++					   partition table */
++
++struct mylo_partition_table {
++	uint32_t	magic;		/* must be MYLO_MAGIC_PARTITIONS */
++	uint32_t	res0;		/* unknown/unused */
++	uint32_t	res1;		/* unknown/unused */
++	uint32_t 	res2;		/* unknown/unused */
++	struct mylo_partition partitions[MYLO_MAX_PARTITIONS];
++};
++
++struct mylo_partition_header {
++	uint32_t	len;		/* length of the partition data */
++	uint32_t	crc;		/* CRC value of the partition data */
++};
++
++struct mylo_system_params {
++	uint32_t	magic;		/* must be MYLO_MAGIC_SYS_PARAMS */
++	uint32_t	res0;
++	uint32_t	res1;
++	uint32_t	mylo_ver;
++	uint16_t	vid;		/* Vendor ID */
++	uint16_t	did;		/* Device ID */
++	uint16_t	svid;		/* Sub Vendor ID */
++	uint16_t	sdid;		/* Sub Device ID */
++	uint32_t	rev;		/* device revision */
++	uint32_t	fwhi;
++	uint32_t	fwlo;
++	uint32_t	tftp_addr;
++	uint32_t	prog_start;
++	uint32_t	flash_size;	/* size of boot FLASH in bytes */
++	uint32_t	dram_size;	/* size of onboard RAM in bytes */
++};
++
++struct mylo_eth_addr {
++	uint8_t	mac[6];
++	uint8_t	csum[2];
++};
++
++#define MYLO_ETHADDR_COUNT	8	/* maximum number of ethernet address
++					   in the board parameters */
++
++struct mylo_board_params {
++	uint32_t	magic;	/* must be MYLO_MAGIC_BOARD_PARAMS */
++	uint32_t	res0;
++	uint32_t	res1;
++	uint32_t	res2;
++	struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT];
++};
++
++#endif /* _MYLOADER_H_*/
 diff -Nur linux-2.6.39.orig/include/linux/netdevice.h linux-2.6.39/include/linux/netdevice.h
 --- linux-2.6.39.orig/include/linux/netdevice.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/include/linux/netdevice.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/include/linux/netdevice.h	2011-08-22 22:00:06.937981400 +0200
 @@ -1182,6 +1182,7 @@
  	void			*ax25_ptr;	/* AX.25 specific data */
  	struct wireless_dev	*ieee80211_ptr;	/* IEEE 802.11 specific data,
@@ -17178,7 +27639,7 @@ diff -Nur linux-2.6.39.orig/include/linux/netdevice.h linux-2.6.39/include/linux
   * Cache lines mostly used on receive path (including eth_type_trans())
 diff -Nur linux-2.6.39.orig/include/linux/nxp_74hc153.h linux-2.6.39/include/linux/nxp_74hc153.h
 --- linux-2.6.39.orig/include/linux/nxp_74hc153.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/include/linux/nxp_74hc153.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/include/linux/nxp_74hc153.h	2011-04-27 12:19:21.817661653 +0200
 @@ -0,0 +1,24 @@
 +/*
 + *  NXP 74HC153 - Dual 4-input multiplexer defines
@@ -17206,7 +27667,7 @@ diff -Nur linux-2.6.39.orig/include/linux/nxp_74hc153.h linux-2.6.39/include/lin
 +#endif /* _NXP_74HC153_H */
 diff -Nur linux-2.6.39.orig/include/linux/phy.h linux-2.6.39/include/linux/phy.h
 --- linux-2.6.39.orig/include/linux/phy.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/include/linux/phy.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/include/linux/phy.h	2011-08-22 22:00:06.867980866 +0200
 @@ -332,6 +332,20 @@
  	void (*adjust_link)(struct net_device *dev);
  
@@ -17236,9 +27697,29 @@ diff -Nur linux-2.6.39.orig/include/linux/phy.h linux-2.6.39/include/linux/phy.h
  int phy_mii_ioctl(struct phy_device *phydev,
  		struct ifreq *ifr, int cmd);
  int phy_start_interrupts(struct phy_device *phydev);
+diff -Nur linux-2.6.39.orig/include/linux/spi/spi.h linux-2.6.39/include/linux/spi/spi.h
+--- linux-2.6.39.orig/include/linux/spi/spi.h	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/include/linux/spi/spi.h	2011-08-23 15:10:37.559229523 +0200
+@@ -441,6 +441,8 @@
+ 	dma_addr_t	rx_dma;
+ 
+ 	unsigned	cs_change:1;
++	unsigned	verify:1;
++	unsigned	fast_write:1;
+ 	u8		bits_per_word;
+ 	u16		delay_usecs;
+ 	u32		speed_hz;
+@@ -482,6 +484,7 @@
+ 	struct spi_device	*spi;
+ 
+ 	unsigned		is_dma_mapped:1;
++	unsigned		fast_read:1;
+ 
+ 	/* REVISIT:  we might want a flag affecting the behavior of the
+ 	 * last transfer ... allowing things like "read 16 bit length L"
 diff -Nur linux-2.6.39.orig/include/linux/spi/vsc7385.h linux-2.6.39/include/linux/spi/vsc7385.h
 --- linux-2.6.39.orig/include/linux/spi/vsc7385.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/include/linux/spi/vsc7385.h	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/include/linux/spi/vsc7385.h	2011-04-27 12:19:21.817661653 +0200
 @@ -0,0 +1,19 @@
 +/*
 + * Platform data definition for the Vitesse VSC7385 ethernet switch driver
@@ -17251,7 +27732,7 @@ diff -Nur linux-2.6.39.orig/include/linux/spi/vsc7385.h linux-2.6.39/include/lin
 + */
 +
 +struct vsc7385_platform_data {
-+	void		(* reset)(void);
++	void		(*reset)(void);
 +	char		*ucode_name;
 +	struct {
 +		u32	tx_ipg:5;
@@ -17259,749 +27740,241 @@ diff -Nur linux-2.6.39.orig/include/linux/spi/vsc7385.h linux-2.6.39/include/lin
 +		u32	clk_sel:3;
 +	} mac_cfg;
 +};
-diff -Nur linux-2.6.39.orig/net/dsa/ar7240.c linux-2.6.39/net/dsa/ar7240.c
---- linux-2.6.39.orig/net/dsa/ar7240.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/net/dsa/ar7240.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,736 @@
+diff -Nur linux-2.6.39.orig/include/linux/switch.h linux-2.6.39/include/linux/switch.h
+--- linux-2.6.39.orig/include/linux/switch.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.39/include/linux/switch.h	2011-08-22 22:09:59.799231408 +0200
+@@ -0,0 +1,204 @@
 +/*
-+ *  DSA driver for the built-in ethernet switch of the Atheros AR7240 SoC
-+ *  Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
++ * switch.h: Switch configuration API
 + *
-+ *  This file was based on:
-+ *    net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
-+ *    Copyright (c) 2008 Marvell Semiconductor
++ * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
 + *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
 + *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
 + */
 +
-+#include <linux/etherdevice.h>
-+#include <linux/list.h>
-+#include <linux/netdevice.h>
-+#include <linux/phy.h>
-+#include <linux/mii.h>
-+#include <linux/bitops.h>
-+
-+#include "dsa_priv.h"
-+
-+#define BITM(_count)	(BIT(_count) - 1)
-+
-+#define AR7240_REG_MASK_CTRL		0x00
-+#define AR7240_MASK_CTRL_REVISION_M	BITM(8)
-+#define AR7240_MASK_CTRL_VERSION_M	BITM(8)
-+#define AR7240_MASK_CTRL_VERSION_S	8
-+#define AR7240_MASK_CTRL_SOFT_RESET	BIT(31)
-+
-+#define AR7240_REG_MAC_ADDR0		0x20
-+#define AR7240_REG_MAC_ADDR1		0x24
-+
-+#define AR7240_REG_FLOOD_MASK		0x2c
-+#define AR7240_FLOOD_MASK_BROAD_TO_CPU	BIT(26)
-+
-+#define AR7240_REG_GLOBAL_CTRL		0x30
-+#define AR7240_GLOBAL_CTRL_MTU_M	BITM(12)
-+
-+#define AR7240_REG_AT_CTRL		0x5c
-+#define AR7240_AT_CTRL_ARP_EN		BIT(20)
++#ifndef __LINUX_SWITCH_H
++#define __LINUX_SWITCH_H
 +
-+#define AR7240_REG_TAG_PRIORITY		0x70
-+
-+#define AR7240_REG_SERVICE_TAG		0x74
-+#define AR7240_SERVICE_TAG_M		BITM(16)
++#include <linux/types.h>
++#include <linux/netdevice.h>
++#include <linux/netlink.h>
++#include <linux/genetlink.h>
++#ifndef __KERNEL__
++#include <netlink/netlink.h>
++#include <netlink/genl/genl.h>
++#include <netlink/genl/ctrl.h>
++#else
++#include <net/genetlink.h>
++#endif
 +
-+#define AR7240_REG_CPU_PORT		0x78
-+#define AR7240_MIRROR_PORT_S		4
-+#define AR7240_CPU_PORT_EN		BIT(8)
++/* main attributes */
++enum {
++	SWITCH_ATTR_UNSPEC,
++	/* global */
++	SWITCH_ATTR_TYPE,
++	/* device */
++	SWITCH_ATTR_ID,
++	SWITCH_ATTR_DEV_NAME,
++	SWITCH_ATTR_ALIAS,
++	SWITCH_ATTR_NAME,
++	SWITCH_ATTR_VLANS,
++	SWITCH_ATTR_PORTS,
++	SWITCH_ATTR_CPU_PORT,
++	/* attributes */
++	SWITCH_ATTR_OP_ID,
++	SWITCH_ATTR_OP_TYPE,
++	SWITCH_ATTR_OP_NAME,
++	SWITCH_ATTR_OP_PORT,
++	SWITCH_ATTR_OP_VLAN,
++	SWITCH_ATTR_OP_VALUE_INT,
++	SWITCH_ATTR_OP_VALUE_STR,
++	SWITCH_ATTR_OP_VALUE_PORTS,
++	SWITCH_ATTR_OP_DESCRIPTION,
++	/* port lists */
++	SWITCH_ATTR_PORT,
++	SWITCH_ATTR_MAX
++};
++
++/* commands */
++enum {
++	SWITCH_CMD_UNSPEC,
++	SWITCH_CMD_GET_SWITCH,
++	SWITCH_CMD_NEW_ATTR,
++	SWITCH_CMD_LIST_GLOBAL,
++	SWITCH_CMD_GET_GLOBAL,
++	SWITCH_CMD_SET_GLOBAL,
++	SWITCH_CMD_LIST_PORT,
++	SWITCH_CMD_GET_PORT,
++	SWITCH_CMD_SET_PORT,
++	SWITCH_CMD_LIST_VLAN,
++	SWITCH_CMD_GET_VLAN,
++	SWITCH_CMD_SET_VLAN
++};
++
++/* data types */
++enum switch_val_type {
++	SWITCH_TYPE_UNSPEC,
++	SWITCH_TYPE_INT,
++	SWITCH_TYPE_STRING,
++	SWITCH_TYPE_PORTS,
++	SWITCH_TYPE_NOVAL,
++};
++
++/* port nested attributes */
++enum {
++	SWITCH_PORT_UNSPEC,
++	SWITCH_PORT_ID,
++	SWITCH_PORT_FLAG_TAGGED,
++	SWITCH_PORT_ATTR_MAX
++};
++
++#define SWITCH_ATTR_DEFAULTS_OFFSET	0x1000
++
++#ifdef __KERNEL__
++
++struct switch_dev;
++struct switch_op;
++struct switch_val;
++struct switch_attr;
++struct switch_attrlist;
++
++int register_switch(struct switch_dev *dev, struct net_device *netdev);
++void unregister_switch(struct switch_dev *dev);
++
++/**
++ * struct switch_attrlist - attribute list
++ *
++ * @n_attr: number of attributes
++ * @attr: pointer to the attributes array
++ */
++struct switch_attrlist {
++	int n_attr;
++	const struct switch_attr *attr;
++};
 +
-+#define AR7240_REG_MIB_FUNCTION0	0x80
-+#define AR7240_MIB_TIMER_M		BITM(16)
-+#define AR7240_MIB_AT_HALF_EN		BIT(16)
-+#define AR7240_MIB_BUSY			BIT(17)
-+#define AR7240_MIB_FUNC_S		24
-+#define AR7240_MIB_FUNC_NO_OP		0x0
-+#define AR7240_MIB_FUNC_FLUSH		0x1
-+#define AR7240_MIB_FUNC_CAPTURE		0x3
++/**
++ * struct switch_dev_ops - switch driver operations
++ *
++ * @attr_global: global switch attribute list
++ * @attr_port: port attribute list
++ * @attr_vlan: vlan attribute list
++ *
++ * Callbacks:
++ *
++ * @get_vlan_ports: read the port list of a VLAN
++ * @set_vlan_ports: set the port list of a VLAN
++ *
++ * @get_port_pvid: get the primary VLAN ID of a port
++ * @set_port_pvid: set the primary VLAN ID of a port
++ *
++ * @apply_config: apply all changed settings to the switch
++ * @reset_switch: resetting the switch
++ */
++struct switch_dev_ops {
++	struct switch_attrlist attr_global, attr_port, attr_vlan;
 +
-+#define AR7240_REG_MDIO_CTRL		0x98
-+#define AR7240_MDIO_CTRL_DATA_M		BITM(16)
-+#define AR7240_MDIO_CTRL_REG_ADDR_S	16
-+#define AR7240_MDIO_CTRL_PHY_ADDR_S	21
-+#define AR7240_MDIO_CTRL_CMD_WRITE	0
-+#define AR7240_MDIO_CTRL_CMD_READ	BIT(27)
-+#define AR7240_MDIO_CTRL_MASTER_EN	BIT(30)
-+#define AR7240_MDIO_CTRL_BUSY		BIT(31)
++	int (*get_vlan_ports)(struct switch_dev *dev, struct switch_val *val);
++	int (*set_vlan_ports)(struct switch_dev *dev, struct switch_val *val);
 +
-+#define AR7240_REG_PORT_BASE(_port)	(0x100 + (_port) * 0x100)
++	int (*get_port_pvid)(struct switch_dev *dev, int port, int *val);
++	int (*set_port_pvid)(struct switch_dev *dev, int port, int val);
 +
-+#define AR7240_REG_PORT_STATUS(_port)	(AR7240_REG_PORT_BASE((_port)) + 0x00)
-+#define AR7240_PORT_STATUS_SPEED_M	BITM(2)
-+#define AR7240_PORT_STATUS_SPEED_10	0
-+#define AR7240_PORT_STATUS_SPEED_100	1
-+#define AR7240_PORT_STATUS_SPEED_1000	2
-+#define AR7240_PORT_STATUS_TXMAC	BIT(2)
-+#define AR7240_PORT_STATUS_RXMAC	BIT(3)
-+#define AR7240_PORT_STATUS_TXFLOW	BIT(4)
-+#define AR7240_PORT_STATUS_RXFLOW	BIT(5)
-+#define AR7240_PORT_STATUS_DUPLEX	BIT(6)
-+#define AR7240_PORT_STATUS_LINK_UP	BIT(8)
-+#define AR7240_PORT_STATUS_LINK_AUTO	BIT(9)
-+#define AR7240_PORT_STATUS_LINK_PAUSE	BIT(10)
++	int (*apply_config)(struct switch_dev *dev);
++	int (*reset_switch)(struct switch_dev *dev);
++};
 +
-+#define AR7240_REG_PORT_CTRL(_port)	(AR7240_REG_PORT_BASE((_port)) + 0x04)
-+#define AR7240_PORT_CTRL_STATE_M	BITM(3)
-+#define	AR7240_PORT_CTRL_STATE_DISABLED	0
-+#define AR7240_PORT_CTRL_STATE_BLOCK	1
-+#define AR7240_PORT_CTRL_STATE_LISTEN	2
-+#define AR7240_PORT_CTRL_STATE_LEARN	3
-+#define AR7240_PORT_CTRL_STATE_FORWARD	4
-+#define AR7240_PORT_CTRL_LEARN_LOCK	BIT(7)
-+#define AR7240_PORT_CTRL_VLAN_MODE_S	8
-+#define AR7240_PORT_CTRL_VLAN_MODE_KEEP	0
-+#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1
-+#define AR7240_PORT_CTRL_VLAN_MODE_ADD	2
-+#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3
-+#define AR7240_PORT_CTRL_IGMP_SNOOP	BIT(10)
-+#define AR7240_PORT_CTRL_HEADER		BIT(11)
-+#define AR7240_PORT_CTRL_MAC_LOOP	BIT(12)
-+#define AR7240_PORT_CTRL_SINGLE_VLAN	BIT(13)
-+#define AR7240_PORT_CTRL_LEARN		BIT(14)
-+#define AR7240_PORT_CTRL_DOUBLE_TAG	BIT(15)
-+#define AR7240_PORT_CTRL_MIRROR_TX	BIT(16)
-+#define AR7240_PORT_CTRL_MIRROR_RX	BIT(17)
++struct switch_dev {
++	const struct switch_dev_ops *ops;
++	/* will be automatically filled */
++	char devname[IFNAMSIZ];
 +
-+#define AR7240_REG_PORT_VLAN(_port)	(AR7240_REG_PORT_BASE((_port)) + 0x08)
++	const char *name;
++	/* NB: either alias or netdev must be set */
++	const char *alias;
++	struct net_device *netdev;
 +
-+#define AR7240_PORT_VLAN_DEFAULT_ID_S	0
-+#define AR7240_PORT_VLAN_DEST_PORTS_S	16
++	int ports;
++	int vlans;
++	int cpu_port;
 +
-+#define AR7240_REG_STATS_BASE(_port)	(0x20000 + (_port) * 0x100)
++	/* the following fields are internal for swconfig */
++	int id;
++	struct list_head dev_list;
++	unsigned long def_global, def_port, def_vlan;
 +
-+#define AR7240_STATS_RXBROAD		0x00
-+#define AR7240_STATS_RXPAUSE		0x04
-+#define AR7240_STATS_RXMULTI		0x08
-+#define AR7240_STATS_RXFCSERR		0x0c
-+#define AR7240_STATS_RXALIGNERR		0x10
-+#define AR7240_STATS_RXRUNT		0x14
-+#define AR7240_STATS_RXFRAGMENT		0x18
-+#define AR7240_STATS_RX64BYTE		0x1c
-+#define AR7240_STATS_RX128BYTE		0x20
-+#define AR7240_STATS_RX256BYTE		0x24
-+#define AR7240_STATS_RX512BYTE		0x28
-+#define AR7240_STATS_RX1024BYTE		0x2c
-+#define AR7240_STATS_RX1518BYTE		0x30
-+#define AR7240_STATS_RXMAXBYTE		0x34
-+#define AR7240_STATS_RXTOOLONG		0x38
-+#define AR7240_STATS_RXGOODBYTE		0x3c
-+#define AR7240_STATS_RXBADBYTE		0x44
-+#define AR7240_STATS_RXOVERFLOW		0x4c
-+#define AR7240_STATS_FILTERED		0x50
-+#define AR7240_STATS_TXBROAD		0x54
-+#define AR7240_STATS_TXPAUSE		0x58
-+#define AR7240_STATS_TXMULTI		0x5c
-+#define AR7240_STATS_TXUNDERRUN		0x60
-+#define AR7240_STATS_TX64BYTE		0x64
-+#define AR7240_STATS_TX128BYTE		0x68
-+#define AR7240_STATS_TX256BYTE		0x6c
-+#define AR7240_STATS_TX512BYTE		0x70
-+#define AR7240_STATS_TX1024BYTE		0x74
-+#define AR7240_STATS_TX1518BYTE		0x78
-+#define AR7240_STATS_TXMAXBYTE		0x7c
-+#define AR7240_STATS_TXOVERSIZE		0x80
-+#define AR7240_STATS_TXBYTE		0x84
-+#define AR7240_STATS_TXCOLLISION	0x8c
-+#define AR7240_STATS_TXABORTCOL		0x90
-+#define AR7240_STATS_TXMULTICOL		0x94
-+#define AR7240_STATS_TXSINGLECOL	0x98
-+#define AR7240_STATS_TXEXCDEFER		0x9c
-+#define AR7240_STATS_TXDEFER		0xa0
-+#define AR7240_STATS_TXLATECOL		0xa4
-+
-+#define AR7240_PORT_CPU		0
-+#define AR7240_NUM_PORTS	6
-+#define AR7240_NUM_PHYS		5
-+
-+#define AR7240_PHY_ID1		0x004d
-+#define AR7240_PHY_ID2		0xd041
-+
-+#define AR7240_PORT_MASK(_port)		BIT((_port))
-+#define AR7240_PORT_MASK_ALL		BITM(AR7240_NUM_PORTS)
-+#define AR7240_PORT_MASK_BUT(_port)	(AR7240_PORT_MASK_ALL & ~BIT((_port)))
-+
-+struct ar7240sw {
-+	struct mii_bus	*mii_bus;
-+	struct mutex	reg_mutex;
-+	struct mutex	stats_mutex;
++	spinlock_t lock;
++	struct switch_port *portbuf;
 +};
 +
-+struct ar7240sw_hw_stat {
-+	char string[ETH_GSTRING_LEN];
-+	int sizeof_stat;
-+	int reg;
++struct switch_port {
++	u32 id;
++	u32 flags;
 +};
 +
-+static inline struct ar7240sw *dsa_to_ar7240sw(struct dsa_switch *ds)
-+{
-+	return (struct ar7240sw *)(ds + 1);
-+}
-+
-+static inline void ar7240sw_init(struct ar7240sw *as, struct mii_bus *mii)
-+{
-+	as->mii_bus = mii;
-+	mutex_init(&as->reg_mutex);
-+	mutex_init(&as->stats_mutex);
-+}
-+
-+static inline u16 mk_phy_addr(u32 reg)
-+{
-+	return (0x17 & ((reg >> 4) | 0x10));
-+}
-+
-+static inline u16 mk_phy_reg(u32 reg)
-+{
-+	return ((reg << 1) & 0x1e);
-+}
-+
-+static inline u16 mk_high_addr(u32 reg)
-+{
-+	return ((reg >> 7) & 0x1ff);
-+}
-+
-+static u32 __ar7240sw_reg_read(struct ar7240sw *as, u32 reg)
-+{
-+	struct mii_bus *mii = as->mii_bus;
-+	u16 phy_addr;
-+	u16 phy_reg;
-+	u32 hi, lo;
-+
-+	reg = (reg & 0xfffffffc) >> 2;
-+
-+	mdiobus_write(mii, 0x1f, 0x10, mk_high_addr(reg));
-+
-+	phy_addr = mk_phy_addr(reg);
-+	phy_reg = mk_phy_reg(reg);
-+
-+	lo = (u32) mdiobus_read(mii, phy_addr, phy_reg);
-+	hi = (u32) mdiobus_read(mii, phy_addr, phy_reg + 1);
-+
-+	return ((hi << 16) | lo);
-+}
-+
-+static void __ar7240sw_reg_write(struct ar7240sw *as, u32 reg, u32 val)
-+{
-+	struct mii_bus *mii = as->mii_bus;
-+	u16 phy_addr;
-+	u16 phy_reg;
-+
-+	reg = (reg & 0xfffffffc) >> 2;
-+
-+	mdiobus_write(mii, 0x1f, 0x10, mk_high_addr(reg));
-+
-+	phy_addr = mk_phy_addr(reg);
-+	phy_reg = mk_phy_reg(reg);
-+
-+	mdiobus_write(mii, phy_addr, phy_reg + 1, (val >> 16));
-+	mdiobus_write(mii, phy_addr, phy_reg, (val & 0xffff));
-+}
-+
-+static u32 ar7240sw_reg_read(struct ar7240sw *as, u32 reg_addr)
-+{
-+	u32 ret;
-+
-+	mutex_lock(&as->reg_mutex);
-+	ret = __ar7240sw_reg_read(as, reg_addr);
-+	mutex_unlock(&as->reg_mutex);
-+
-+	return ret;
-+}
-+
-+static void ar7240sw_reg_write(struct ar7240sw *as, u32 reg_addr, u32 reg_val)
-+{
-+	mutex_lock(&as->reg_mutex);
-+	__ar7240sw_reg_write(as, reg_addr, reg_val);
-+	mutex_unlock(&as->reg_mutex);
-+}
-+
-+static u32 ar7240sw_reg_rmw(struct ar7240sw *as, u32 reg, u32 mask, u32 val)
-+{
-+	u32 t;
-+
-+	mutex_lock(&as->reg_mutex);
-+	t = __ar7240sw_reg_read(as, reg);
-+	t &= ~mask;
-+	t |= val;
-+	__ar7240sw_reg_write(as, reg, t);
-+	mutex_unlock(&as->reg_mutex);
-+
-+	return t;
-+}
-+
-+static void ar7240sw_reg_set(struct ar7240sw *as, u32 reg, u32 val)
-+{
-+	u32 t;
-+
-+	mutex_lock(&as->reg_mutex);
-+	t = __ar7240sw_reg_read(as, reg);
-+	t |= val;
-+	__ar7240sw_reg_write(as, reg, t);
-+	mutex_unlock(&as->reg_mutex);
-+}
-+
-+static int ar7240sw_reg_wait(struct ar7240sw *as, u32 reg, u32 mask, u32 val,
-+			     unsigned timeout)
-+{
-+	int i;
-+
-+	for (i = 0; i < timeout; i++) {
-+		u32 t;
-+
-+		t = ar7240sw_reg_read(as, reg);
-+		if ((t & mask) == val)
-+			return 0;
-+
-+		msleep(1);
-+	}
-+
-+	return -ETIMEDOUT;
-+}
-+
-+static u16 ar7240sw_phy_read(struct ar7240sw *as, unsigned phy_addr,
-+			     unsigned reg_addr)
-+{
-+	u32 t;
-+	int err;
-+
-+	if (phy_addr >= AR7240_NUM_PHYS)
-+		return 0xffff;
-+
-+	t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
-+	    (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
-+	    AR7240_MDIO_CTRL_MASTER_EN |
-+	    AR7240_MDIO_CTRL_BUSY |
-+	    AR7240_MDIO_CTRL_CMD_READ;
-+
-+	ar7240sw_reg_write(as, AR7240_REG_MDIO_CTRL, t);
-+	err = ar7240sw_reg_wait(as, AR7240_REG_MDIO_CTRL,
-+				AR7240_MDIO_CTRL_BUSY, 0, 5);
-+	if (err)
-+		return 0xffff;
-+
-+	t = ar7240sw_reg_read(as, AR7240_REG_MDIO_CTRL);
-+	return (t & AR7240_MDIO_CTRL_DATA_M);
-+}
-+
-+static int ar7240sw_phy_write(struct ar7240sw *as, unsigned phy_addr,
-+			      unsigned reg_addr, u16 reg_val)
-+{
-+	u32 t;
-+	int ret;
-+
-+	if (phy_addr >= AR7240_NUM_PHYS)
-+		return -EINVAL;
-+
-+	t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
-+	    (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
-+	    AR7240_MDIO_CTRL_MASTER_EN |
-+	    AR7240_MDIO_CTRL_BUSY |
-+	    AR7240_MDIO_CTRL_CMD_WRITE |
-+	    reg_val;
-+
-+	ar7240sw_reg_write(as, AR7240_REG_MDIO_CTRL, t);
-+	ret = ar7240sw_reg_wait(as, AR7240_REG_MDIO_CTRL,
-+				AR7240_MDIO_CTRL_BUSY, 0, 5);
-+	return ret;
-+}
-+
-+static int ar7240sw_capture_stats(struct ar7240sw *as)
-+{
-+	int ret;
-+
-+	/* Capture the hardware statistics for all ports */
-+	ar7240sw_reg_write(as, AR7240_REG_MIB_FUNCTION0,
-+			   (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S));
-+
-+	/* Wait for the capturing to complete. */
-+	ret = ar7240sw_reg_wait(as, AR7240_REG_MIB_FUNCTION0,
-+				AR7240_MIB_BUSY, 0, 10);
-+	return ret;
-+}
-+
-+static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port)
-+{
-+	ar7240sw_reg_write(as, AR7240_REG_PORT_CTRL(port),
-+			   AR7240_PORT_CTRL_STATE_DISABLED);
-+}
-+
-+static int ar7240sw_reset(struct ar7240sw *as)
-+{
-+	int ret;
-+	int i;
-+
-+	/* Set all ports to disabled state. */
-+	for (i = 0; i < AR7240_NUM_PORTS; i++)
-+		ar7240sw_disable_port(as, i);
-+
-+	/* Wait for transmit queues to drain. */
-+	msleep(2);
-+
-+	/* Reset the switch. */
-+	ar7240sw_reg_write(as, AR7240_REG_MASK_CTRL,
-+			   AR7240_MASK_CTRL_SOFT_RESET);
-+
-+	ret = ar7240sw_reg_wait(as, AR7240_REG_MASK_CTRL,
-+			        AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
-+	return ret;
-+}
-+
-+static void ar7240sw_setup(struct ar7240sw *as)
-+{
-+	/* Enable CPU port, and disable mirror port */
-+	ar7240sw_reg_write(as, AR7240_REG_CPU_PORT,
-+			   AR7240_CPU_PORT_EN |
-+			   (15 << AR7240_MIRROR_PORT_S));
-+
-+	/* Setup TAG priority mapping */
-+	ar7240sw_reg_write(as, AR7240_REG_TAG_PRIORITY, 0xfa50);
-+
-+	/* Enable ARP frame acknowledge */
-+	ar7240sw_reg_set(as, AR7240_REG_AT_CTRL, AR7240_AT_CTRL_ARP_EN);
-+
-+	/* Enable Broadcast frames transmitted to the CPU */
-+	ar7240sw_reg_set(as, AR7240_REG_FLOOD_MASK,
-+			 AR7240_FLOOD_MASK_BROAD_TO_CPU);
-+
-+	/* setup MTU */
-+	ar7240sw_reg_rmw(as, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M,
-+			 1536);
-+
-+	/* setup Service TAG */
-+	ar7240sw_reg_rmw(as, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M,
-+			 ETH_P_QINQ);
-+}
-+
-+static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port)
-+{
-+	u32 ctrl;
-+	u32 dest_ports;
-+	u32 vlan;
-+
-+	ctrl = AR7240_PORT_CTRL_STATE_FORWARD;
-+
-+	if (port == AR7240_PORT_CPU) {
-+		ar7240sw_reg_write(as, AR7240_REG_PORT_STATUS(port),
-+				   AR7240_PORT_STATUS_SPEED_1000 |
-+				   AR7240_PORT_STATUS_TXFLOW |
-+				   AR7240_PORT_STATUS_RXFLOW |
-+				   AR7240_PORT_STATUS_TXMAC |
-+				   AR7240_PORT_STATUS_RXMAC |
-+				   AR7240_PORT_STATUS_DUPLEX);
-+
-+		/* allow the CPU port to talk to each of the 'real' ports */
-+		dest_ports = AR7240_PORT_MASK_BUT(port);
-+
-+		/* remove service tag from ingress frames */
-+		ctrl |= AR7240_PORT_CTRL_DOUBLE_TAG;
-+	} else {
-+		ar7240sw_reg_write(as, AR7240_REG_PORT_STATUS(port),
-+				   AR7240_PORT_STATUS_LINK_AUTO);
-+
-+		/*
-+		 * allow each of the 'real' ports to only talk to the CPU
-+		 * port.
-+		 */
-+		dest_ports = AR7240_PORT_MASK(port) |
-+			     AR7240_PORT_MASK(AR7240_PORT_CPU);
-+
-+		/* add service tag to egress frames */
-+		ctrl |= (AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG <<
-+			 AR7240_PORT_CTRL_VLAN_MODE_S);
-+	}
-+
-+	/* set default VID and and destination ports for this VLAN */
-+	vlan = port;
-+	vlan |= (dest_ports << AR7240_PORT_VLAN_DEST_PORTS_S);
-+
-+	ar7240sw_reg_write(as, AR7240_REG_PORT_CTRL(port), ctrl);
-+	ar7240sw_reg_write(as, AR7240_REG_PORT_VLAN(port), vlan);
-+}
-+
-+static char *ar7240_dsa_probe(struct mii_bus *mii, int sw_addr)
-+{
-+	struct ar7240sw as;
-+	u32 ctrl;
-+	u16 phy_id1;
-+	u16 phy_id2;
-+	u8 ver;
-+
-+	ar7240sw_init(&as, mii);
-+
-+	ctrl = ar7240sw_reg_read(&as, AR7240_REG_MASK_CTRL);
-+
-+	ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
-+	if (ver != 1) {
-+		pr_err("ar7240_dsa: unsupported chip, ctrl=%08x\n", ctrl);
-+		return NULL;
-+	}
-+
-+	phy_id1 = ar7240sw_phy_read(&as, 0, MII_PHYSID1);
-+	phy_id2 = ar7240sw_phy_read(&as, 0, MII_PHYSID2);
-+	if (phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) {
-+		pr_err("ar7240_dsa: unknown phy id '%04x:%04x'\n",
-+		       phy_id1, phy_id2);
-+		return NULL;
-+	}
-+
-+	return "Atheros AR7240 built-in";
-+}
-+
-+static int ar7240_dsa_setup(struct dsa_switch *ds)
-+{
-+	struct ar7240sw *as = dsa_to_ar7240sw(ds);
-+	int i;
-+	int ret;
-+
-+	ar7240sw_init(as, ds->master_mii_bus);
-+
-+	ret = ar7240sw_reset(as);
-+	if (ret)
-+		return ret;
-+
-+	ar7240sw_setup(as);
-+
-+	for (i = 0; i < AR7240_NUM_PORTS; i++) {
-+		if (dsa_is_cpu_port(ds, i) || (ds->phys_port_mask & (1 << i)))
-+			ar7240sw_setup_port(as, i);
-+		else
-+			ar7240sw_disable_port(as, i);
-+	}
-+
-+	return 0;
-+}
-+
-+static int ar7240_dsa_set_addr(struct dsa_switch *ds, u8 *addr)
-+{
-+	struct ar7240sw *as = dsa_to_ar7240sw(ds);
-+	u32 t;
-+
-+	t = (addr[4] << 8) | addr[5];
-+	ar7240sw_reg_write(as, AR7240_REG_MAC_ADDR0, t);
-+
-+	t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
-+	ar7240sw_reg_write(as, AR7240_REG_MAC_ADDR1, t);
-+
-+	return 0;
-+}
-+
-+static int ar7240_iort_to_phy_addr(int port)
-+{
-+	if (port > 0 && port < AR7240_NUM_PORTS)
-+		return port - 1;
-+
-+	return -EINVAL;
-+}
-+
-+static int ar7240_dsa_phy_read(struct dsa_switch *ds, int port, int regnum)
-+{
-+	struct ar7240sw *as = dsa_to_ar7240sw(ds);
-+	int phy_addr;
-+
-+	phy_addr = ar7240_iort_to_phy_addr(port);
-+	if (phy_addr < 0)
-+		return 0xffff;
-+
-+	return ar7240sw_phy_read(as, phy_addr, regnum);
-+}
-+
-+static int ar7240_dsa_phy_write(struct dsa_switch *ds, int port, int regnum,
-+				u16 val)
-+{
-+	struct ar7240sw *as = dsa_to_ar7240sw(ds);
-+	int phy_addr;
-+
-+	phy_addr = ar7240_iort_to_phy_addr(port);
-+	if (phy_addr < 0)
-+		return 0xffff;
-+
-+	return ar7240sw_phy_write(as, phy_addr, regnum, val);
-+}
-+
-+static const char *ar7240sw_speed_str(unsigned speed)
-+{
-+	switch (speed) {
-+	case AR7240_PORT_STATUS_SPEED_10:
-+		return "10";
-+	case AR7240_PORT_STATUS_SPEED_100:
-+		return "100";
-+	case AR7240_PORT_STATUS_SPEED_1000:
-+		return "1000";
-+	}
-+
-+	return "????";
-+}
-+
-+static void ar7240_dsa_poll_link(struct dsa_switch *ds)
-+{
-+	struct ar7240sw *as = dsa_to_ar7240sw(ds);
-+	int i;
-+
-+	for (i = 0; i < DSA_MAX_PORTS; i++) {
-+		struct net_device *dev;
-+		u32 status;
-+		int link;
-+		unsigned speed;
-+		int duplex;
-+
-+		dev = ds->ports[i];
-+		if (dev == NULL)
-+			continue;
-+
-+		link = 0;
-+		if (dev->flags & IFF_UP) {
-+			status = ar7240sw_reg_read(as,
-+						   AR7240_REG_PORT_STATUS(i));
-+			link = !!(status & AR7240_PORT_STATUS_LINK_UP);
-+		}
-+
-+		if (!link) {
-+			if (netif_carrier_ok(dev)) {
-+				pr_info("%s: link down\n", dev->name);
-+				netif_carrier_off(dev);
-+			}
-+			continue;
-+		}
-+
-+		speed = (status & AR7240_PORT_STATUS_SPEED_M);
-+		duplex = (status & AR7240_PORT_STATUS_DUPLEX) ? 1 : 0;
-+		if (!netif_carrier_ok(dev)) {
-+			pr_info("%s: link up, %sMb/s, %s duplex",
-+				dev->name,
-+				ar7240sw_speed_str(speed),
-+				duplex ? "full" : "half");
-+			netif_carrier_on(dev);
-+		}
-+	}
-+}
-+
-+static const struct ar7240sw_hw_stat ar7240_hw_stats[] = {
-+	{ "rx_broadcast"	, 4, AR7240_STATS_RXBROAD, },
-+	{ "rx_pause"		, 4, AR7240_STATS_RXPAUSE, },
-+	{ "rx_multicast"	, 4, AR7240_STATS_RXMULTI, },
-+	{ "rx_fcs_error"	, 4, AR7240_STATS_RXFCSERR, },
-+	{ "rx_align_error"	, 4, AR7240_STATS_RXALIGNERR, },
-+	{ "rx_undersize"	, 4, AR7240_STATS_RXRUNT, },
-+	{ "rx_fragments"	, 4, AR7240_STATS_RXFRAGMENT, },
-+	{ "rx_64bytes"		, 4, AR7240_STATS_RX64BYTE, },
-+	{ "rx_65_127bytes"	, 4, AR7240_STATS_RX128BYTE, },
-+	{ "rx_128_255bytes"	, 4, AR7240_STATS_RX256BYTE, },
-+	{ "rx_256_511bytes"	, 4, AR7240_STATS_RX512BYTE, },
-+	{ "rx_512_1023bytes"	, 4, AR7240_STATS_RX1024BYTE, },
-+	{ "rx_1024_1518bytes"	, 4, AR7240_STATS_RX1518BYTE, },
-+	{ "rx_1519_max_bytes"	, 4, AR7240_STATS_RXMAXBYTE, },
-+	{ "rx_oversize"		, 4, AR7240_STATS_RXTOOLONG, },
-+	{ "rx_good_bytes"	, 8, AR7240_STATS_RXGOODBYTE, },
-+	{ "rx_bad_bytes"	, 8, AR7240_STATS_RXBADBYTE, },
-+	{ "rx_overflow"		, 4, AR7240_STATS_RXOVERFLOW, },
-+	{ "filtered"		, 4, AR7240_STATS_FILTERED, },
-+	{ "tx_broadcast"	, 4, AR7240_STATS_TXBROAD, },
-+	{ "tx_pause"		, 4, AR7240_STATS_TXPAUSE, },
-+	{ "tx_multicast"	, 4, AR7240_STATS_TXMULTI, },
-+	{ "tx_underrun"		, 4, AR7240_STATS_TXUNDERRUN, },
-+	{ "tx_64bytes"		, 4, AR7240_STATS_TX64BYTE, },
-+	{ "tx_65_127bytes"	, 4, AR7240_STATS_TX128BYTE, },
-+	{ "tx_128_255bytes"	, 4, AR7240_STATS_TX256BYTE, },
-+	{ "tx_256_511bytes"	, 4, AR7240_STATS_TX512BYTE, },
-+	{ "tx_512_1023bytes"	, 4, AR7240_STATS_TX1024BYTE, },
-+	{ "tx_1024_1518bytes"	, 4, AR7240_STATS_TX1518BYTE, },
-+	{ "tx_1519_max_bytes"	, 4, AR7240_STATS_TXMAXBYTE, },
-+	{ "tx_oversize"		, 4, AR7240_STATS_TXOVERSIZE, },
-+	{ "tx_bytes"		, 8, AR7240_STATS_TXBYTE, },
-+	{ "tx_collisions"	, 4, AR7240_STATS_TXCOLLISION, },
-+	{ "tx_abort_collisions"	, 4, AR7240_STATS_TXABORTCOL, },
-+	{ "tx_multi_collisions"	, 4, AR7240_STATS_TXMULTICOL, },
-+	{ "tx_single_collisions", 4, AR7240_STATS_TXSINGLECOL, },
-+	{ "tx_excessive_deferred", 4, AR7240_STATS_TXEXCDEFER, },
-+	{ "tx_deferred"		, 4, AR7240_STATS_TXDEFER, },
-+	{ "tx_late_collisions"	, 4, AR7240_STATS_TXLATECOL, },
-+};
-+
-+static void ar7240_dsa_get_strings(struct dsa_switch *ds, int port,
-+				   uint8_t *data)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(ar7240_hw_stats); i++) {
-+		memcpy(data + i * ETH_GSTRING_LEN,
-+		       ar7240_hw_stats[i].string, ETH_GSTRING_LEN);
-+	}
-+}
-+
-+static void ar7240_dsa_get_ethtool_stats(struct dsa_switch *ds, int port,
-+					 uint64_t *data)
-+{
-+	struct ar7240sw *as = dsa_to_ar7240sw(ds);
-+	int err;
-+	int i;
-+
-+	mutex_lock(&as->stats_mutex);
-+
-+	err = ar7240sw_capture_stats(as);
-+	if (err)
-+		goto unlock;
-+
-+	for (i = 0; i < ARRAY_SIZE(ar7240_hw_stats); i++) {
-+		const struct ar7240sw_hw_stat *s = &ar7240_hw_stats[i];
-+		u32 reg = AR7240_REG_STATS_BASE(port);
-+		u32 low;
-+		u32 high;
-+
-+		low = ar7240sw_reg_read(as, reg + s->reg);
-+		if (s->sizeof_stat == 8)
-+			high = ar7240sw_reg_read(as, reg + s->reg);
-+		else
-+			high = 0;
-+
-+		data[i] = (((u64) high) << 32) | low;
-+	}
++struct switch_val {
++	const struct switch_attr *attr;
++	int port_vlan;
++	int len;
++	union {
++		const char *s;
++		u32 i;
++		struct switch_port *ports;
++	} value;
++};
 +
-+ unlock:
-+	mutex_unlock(&as->stats_mutex);
-+}
++struct switch_attr {
++	int disabled;
++	int type;
++	const char *name;
++	const char *description;
 +
-+static int ar7240_dsa_get_sset_count(struct dsa_switch *ds)
-+{
-+	return ARRAY_SIZE(ar7240_hw_stats);
-+}
++	int (*set)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val);
++	int (*get)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val);
 +
-+static struct dsa_switch_driver ar7240_dsa_driver = {
-+	.tag_protocol		= htons(ETH_P_QINQ),
-+	.priv_size		= sizeof(struct ar7240sw),
-+	.probe			= ar7240_dsa_probe,
-+	.setup			= ar7240_dsa_setup,
-+	.set_addr		= ar7240_dsa_set_addr,
-+	.phy_read		= ar7240_dsa_phy_read,
-+	.phy_write		= ar7240_dsa_phy_write,
-+	.poll_link		= ar7240_dsa_poll_link,
-+	.get_strings		= ar7240_dsa_get_strings,
-+	.get_ethtool_stats	= ar7240_dsa_get_ethtool_stats,
-+	.get_sset_count		= ar7240_dsa_get_sset_count,
++	/* for driver internal use */
++	int id;
++	int ofs;
++	int max;
 +};
 +
-+int __init dsa_ar7240_init(void)
-+{
-+	register_switch_driver(&ar7240_dsa_driver);
-+	return 0;
-+}
-+module_init(dsa_ar7240_init);
++#endif
 +
-+void __exit dsa_ar7240_cleanup(void)
-+{
-+	unregister_switch_driver(&ar7240_dsa_driver);
-+}
-+module_exit(dsa_ar7240_cleanup);
++#endif
+diff -Nur linux-2.6.39.orig/include/linux/tcp.h linux-2.6.39/include/linux/tcp.h
+--- linux-2.6.39.orig/include/linux/tcp.h	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/include/linux/tcp.h	2011-08-24 05:53:21.379228748 +0200
+@@ -54,7 +54,7 @@
+ 	__be16	window;
+ 	__sum16	check;
+ 	__be16	urg_ptr;
+-};
++} __packed;
+ 
+ /*
+  *	The union cast uses a gcc extension to avoid aliasing problems
+diff -Nur linux-2.6.39.orig/include/linux/udp.h linux-2.6.39/include/linux/udp.h
+--- linux-2.6.39.orig/include/linux/udp.h	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/include/linux/udp.h	2011-08-24 05:53:21.428824967 +0200
+@@ -24,7 +24,7 @@
+ 	__be16	dest;
+ 	__be16	len;
+ 	__sum16	check;
+-};
++} __packed;
+ 
+ /* UDP socket options */
+ #define UDP_CORK	1	/* Never send partially complete segments */
 diff -Nur linux-2.6.39.orig/net/dsa/mv88e6063.c linux-2.6.39/net/dsa/mv88e6063.c
 --- linux-2.6.39.orig/net/dsa/mv88e6063.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/net/dsa/mv88e6063.c	2011-05-27 14:36:51.000000000 +0200
++++ linux-2.6.39/net/dsa/mv88e6063.c	2011-04-27 12:19:21.827661792 +0200
 @@ -0,0 +1,294 @@
 +/*
 + * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips
@@ -18297,134 +28270,25 @@ diff -Nur linux-2.6.39.orig/net/dsa/mv88e6063.c linux-2.6.39/net/dsa/mv88e6063.c
 +	unregister_switch_driver(&mv88e6063_switch_driver);
 +}
 +module_exit(mv88e6063_cleanup);
-diff -Nur linux-2.6.39.orig/net/dsa/tag_qinq.c linux-2.6.39/net/dsa/tag_qinq.c
---- linux-2.6.39.orig/net/dsa/tag_qinq.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39/net/dsa/tag_qinq.c	2011-05-27 14:36:51.000000000 +0200
-@@ -0,0 +1,127 @@
-+/*
-+ * net/dsa/tag_qinq.c - QinQ tag format handling
-+ * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This file was based on:
-+ *    net/dsa/tag_edsa.c - Ethertype DSA tagging
-+ *    Copyright (c) 2008-2009 Marvell Semiconductor
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/etherdevice.h>
-+#include <linux/list.h>
-+#include <linux/netdevice.h>
-+#include <linux/if_vlan.h>
-+
-+#include "dsa_priv.h"
-+
-+netdev_tx_t qinq_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+	struct dsa_slave_priv *p = netdev_priv(dev);
-+	struct vlan_ethhdr *veth;
-+	unsigned int len;
-+	int ret;
-+
-+	if (skb_cow_head(skb, VLAN_HLEN) < 0)
-+		goto out_free_skb;
-+
-+	veth = (struct vlan_ethhdr *)skb_push(skb, VLAN_HLEN);
-+
-+	/* Move the mac addresses to the beginning of the new header. */
-+	memmove(skb->data, skb->data + VLAN_HLEN, 2 * VLAN_ETH_ALEN);
-+	skb->mac_header -= VLAN_HLEN;
-+
-+	/* setup VLAN header fields */
-+	veth->h_vlan_proto = htons(ETH_P_QINQ);
-+	veth->h_vlan_TCI = htons(p->port);
-+
-+	len = skb->len;
-+	skb->protocol = htons(ETH_P_QINQ);
-+	skb->dev = p->parent->dst->master_netdev;
-+
-+	ret = dev_queue_xmit(skb);
-+	if (unlikely(ret != NET_XMIT_SUCCESS))
-+		goto out_dropped;
-+
-+	dev->stats.tx_packets++;
-+	dev->stats.tx_bytes += len;
-+
-+	return NETDEV_TX_OK;
-+
-+ out_free_skb:
-+	kfree_skb(skb);
-+ out_dropped:
-+	dev->stats.tx_dropped++;
-+	return NETDEV_TX_OK;
-+}
-+
-+static int qinq_rcv(struct sk_buff *skb, struct net_device *dev,
-+		    struct packet_type *pt, struct net_device *orig_dev)
-+{
-+	struct dsa_switch_tree *dst;
-+	struct dsa_switch *ds;
-+	struct vlan_hdr *vhdr;
-+	int source_port;
-+
-+	dst = dev->dsa_ptr;
-+	if (unlikely(dst == NULL))
-+		goto out_drop;
-+	ds = dst->ds[0];
-+
-+	skb = skb_unshare(skb, GFP_ATOMIC);
-+	if (skb == NULL)
-+		goto out;
-+
-+	if (unlikely(!pskb_may_pull(skb, VLAN_HLEN)))
-+		goto out_drop;
-+
-+	vhdr = (struct vlan_hdr *)skb->data;
-+	source_port = ntohs(vhdr->h_vlan_TCI) & VLAN_VID_MASK;
-+	if (source_port >= DSA_MAX_PORTS || ds->ports[source_port] == NULL)
-+		goto out_drop;
-+
-+	/* Remove the outermost VLAN tag and update checksum. */
-+	skb_pull_rcsum(skb, VLAN_HLEN);
-+	memmove(skb->data - ETH_HLEN,
-+		skb->data - ETH_HLEN - VLAN_HLEN,
-+		2 * ETH_ALEN);
-+
-+	skb->dev = ds->ports[source_port];
-+	skb_push(skb, ETH_HLEN);
-+	skb->pkt_type = PACKET_HOST;
-+	skb->protocol = eth_type_trans(skb, skb->dev);
-+
-+	skb->dev->stats.rx_packets++;
-+	skb->dev->stats.rx_bytes += skb->len;
-+
-+	netif_receive_skb(skb);
-+
-+	return 0;
-+
-+ out_drop:
-+	kfree_skb(skb);
-+ out:
-+	return 0;
-+}
-+
-+static struct packet_type qinq_packet_type __read_mostly = {
-+	.type	= cpu_to_be16(ETH_P_QINQ),
-+	.func	= qinq_rcv,
-+};
-+
-+static int __init qinq_init_module(void)
-+{
-+	dev_add_pack(&qinq_packet_type);
-+	return 0;
-+}
-+module_init(qinq_init_module);
-+
-+static void __exit qinq_cleanup_module(void)
-+{
-+	dev_remove_pack(&qinq_packet_type);
-+}
-+module_exit(qinq_cleanup_module);
+diff -Nur linux-2.6.39.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c linux-2.6.39/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
+--- linux-2.6.39.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c	2011-05-19 06:06:34.000000000 +0200
++++ linux-2.6.39/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c	2011-08-24 05:53:21.549229118 +0200
+@@ -14,6 +14,7 @@
+ #include <linux/skbuff.h>
+ #include <linux/icmp.h>
+ #include <linux/sysctl.h>
++#include <linux/unaligned/packed_struct.h>
+ #include <net/route.h>
+ #include <net/ip.h>
+ 
+@@ -44,8 +45,8 @@
+ 	if (ap == NULL)
+ 		return false;
+ 
+-	tuple->src.u3.ip = ap[0];
+-	tuple->dst.u3.ip = ap[1];
++	tuple->src.u3.ip = __get_unaligned_cpu32(ap++);
++	tuple->dst.u3.ip = __get_unaligned_cpu32(ap);
+ 
+ 	return true;
+ }
diff --git a/target/mips/Makefile b/target/mips/Makefile
index 5d606046f..00a3e8bdc 100644
--- a/target/mips/Makefile
+++ b/target/mips/Makefile
@@ -51,11 +51,7 @@ ifeq ($(ADK_TARGET_SYSTEM_MIKROTIK_RB532),y)
 kernel-install:
 	$(TARGET_CROSS)objcopy $(OSTRIP) -S $(KERNEL) $(BUILD_DIR)/$(TARGET_KERNEL)
 endif
-ifeq ($(ADK_TARGET_SYSTEM_MIKROTIK_RB411),y)
-kernel-install:
-	$(TARGET_CROSS)objcopy $(OSTRIP) -S $(KERNEL) $(BUILD_DIR)/$(TARGET_KERNEL)
-endif
-ifeq ($(ADK_TARGET_SYSTEM_MIKROTIK_RB433),y)
+ifeq ($(ADK_TARGET_SYSTEM_MIKROTIK_RB4XX),y)
 kernel-install:
 	$(TARGET_CROSS)objcopy $(OSTRIP) -S $(KERNEL) $(BUILD_DIR)/$(TARGET_KERNEL)
 endif
diff --git a/target/mips/kernel.config b/target/mips/kernel.config
index bdf5beb9f..4bc717861 100644
--- a/target/mips/kernel.config
+++ b/target/mips/kernel.config
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux/mips 2.6.37 Kernel Configuration
-# Sat Apr 23 20:38:50 2011
+# Linux/mips 2.6.39 Kernel Configuration
+# Mon Aug 22 22:28:08 2011
 #
 CONFIG_MIPS=y
 
@@ -10,6 +10,7 @@ CONFIG_MIPS=y
 #
 # CONFIG_MIPS_ALCHEMY is not set
 # CONFIG_AR7 is not set
+# CONFIG_ATH79 is not set
 # CONFIG_ATHEROS_AR71XX is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_BCM63XX is not set
@@ -52,11 +53,11 @@ CONFIG_MACH_LOONGSON=y
 # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
 # CONFIG_ALCHEMY_GPIO_INDIRECT is not set
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
-CONFIG_CAVIUM_OCTEON_HELPER=y
 # CONFIG_LEMOTE_FULOONG2E is not set
 CONFIG_LEMOTE_MACH2F=y
 CONFIG_CS5536=y
 # CONFIG_CS5536_MFGPT is not set
+CONFIG_LOONGSON_SUSPEND=y
 CONFIG_LOONGSON_UART_BASE=y
 CONFIG_LOONGSON_MC146818=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -64,16 +65,17 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_SUPPORTS_OPROFILE=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_FIND_BIT_LE=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_CMOS_UPDATE=y
 CONFIG_SCHED_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_CEVT_R4K_LIB=y
 CONFIG_CEVT_R4K=y
 CONFIG_CSRC_R4K_LIB=y
 CONFIG_CSRC_R4K=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_SYS_HAS_EARLY_PRINTK=y
@@ -98,7 +100,6 @@ CONFIG_CPU_NOP_WORKAROUNDS=y
 CONFIG_CPU_JUMP_WORKAROUNDS=y
 CONFIG_CPU_LOONGSON2F_WORKAROUNDS=y
 CONFIG_SYS_SUPPORTS_ZBOOT=y
-CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
 CONFIG_CPU_LOONGSON2=y
 CONFIG_SYS_HAS_CPU_LOONGSON2F=y
 CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
@@ -132,6 +133,7 @@ CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
 CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
@@ -141,7 +143,6 @@ CONFIG_NEED_PER_CPU_KM=y
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_CPU_SUPPORTS_HR_SCHED_CLOCK=y
 # CONFIG_HZ_48 is not set
 CONFIG_HZ_100=y
 # CONFIG_HZ_128 is not set
@@ -161,6 +162,7 @@ CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
+CONFIG_HAVE_IRQ_WORK=y
 
 #
 # General setup
@@ -184,6 +186,7 @@ CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_POSIX_MQUEUE_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
 CONFIG_HAVE_GENERIC_HARDIRQS=y
@@ -192,31 +195,28 @@ CONFIG_HAVE_GENERIC_HARDIRQS=y
 # IRQ subsystem
 #
 CONFIG_GENERIC_HARDIRQS=y
-# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set
-# CONFIG_HAVE_SPARSE_IRQ is not set
 CONFIG_GENERIC_IRQ_PROBE=y
-# CONFIG_GENERIC_PENDING_IRQ is not set
-# CONFIG_AUTO_IRQ_AFFINITY is not set
-# CONFIG_IRQ_PER_CPU is not set
-# CONFIG_HARDIRQS_SW_RESEND is not set
+CONFIG_GENERIC_IRQ_SHOW=y
 
 #
 # RCU Subsystem
 #
 CONFIG_TINY_RCU=y
 # CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
 # CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
 # CONFIG_SYSFS_DEPRECATED is not set
 # CONFIG_RELAY is not set
 # CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -233,6 +233,7 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_EMBEDDED=y
 CONFIG_HAVE_PERF_EVENTS=y
 CONFIG_PERF_USE_VMALLOC=y
 
@@ -250,11 +251,13 @@ CONFIG_SLAB=y
 # CONFIG_PROFILING is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
+# CONFIG_JUMP_LABEL is not set
 CONFIG_HAVE_SYSCALL_WRAPPERS=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_DMA_ATTRS=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
 
 #
 # GCOV-based kernel profiling
@@ -299,7 +302,7 @@ CONFIG_INLINE_WRITE_UNLOCK=y
 CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
 # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
 # CONFIG_MUTEX_SPIN_ON_OWNER is not set
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -314,6 +317,7 @@ CONFIG_ISA=y
 CONFIG_MMU=y
 # CONFIG_PCCARD is not set
 # CONFIG_HOTPLUG_PCI is not set
+# CONFIG_RAPIDIO is not set
 
 #
 # Executable file formats
@@ -333,7 +337,12 @@ CONFIG_BINFMT_ELF32=y
 #
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
-# CONFIG_PM is not set
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_SLEEP=y
+# CONFIG_PM_RUNTIME is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
 CONFIG_NET=y
 
 #
@@ -345,7 +354,6 @@ CONFIG_UNIX=y
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
 # CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
 # CONFIG_IP_PNP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE_DEMUX is not set
@@ -376,6 +384,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_ATM is not set
 # CONFIG_L2TP is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -389,6 +398,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
+# CONFIG_BATMAN_ADV is not set
 
 #
 # Network testing
@@ -399,7 +409,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_WIRELESS is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -441,7 +457,110 @@ CONFIG_SCSI_MOD=y
 # CONFIG_FIREWIRE is not set
 # CONFIG_FIREWIRE_NOSY is not set
 # CONFIG_I2O is not set
-# CONFIG_NETDEVICES is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_MII is not set
+CONFIG_PHYLIB=y
+CONFIG_SWCONFIG=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM63XX_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_STMMAC_ETH is not set
+# CONFIG_PCH_GBE is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_CHELSIO_T4 is not set
+# CONFIG_CHELSIO_T4VF is not set
+# CONFIG_ENIC is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_QLGE is not set
+# CONFIG_BNA is not set
+# CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
+# CONFIG_TR is not set
+CONFIG_WLAN=y
+# CONFIG_AIRO is not set
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
 # CONFIG_ISDN is not set
 # CONFIG_PHONE is not set
 
@@ -460,10 +579,13 @@ CONFIG_SCSI_MOD=y
 # Character devices
 #
 # CONFIG_VT is not set
-# CONFIG_DEVKMEM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_N_GSM is not set
 # CONFIG_NOZOMI is not set
+# CONFIG_N_GSM is not set
+# CONFIG_DEVKMEM is not set
 
 #
 # Serial drivers
@@ -485,9 +607,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_TIMBERDALE is not set
 # CONFIG_SERIAL_ALTERA_JTAGUART is not set
 # CONFIG_SERIAL_ALTERA_UART is not set
-CONFIG_UNIX98_PTYS=y
-# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
-# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_PCH_UART is not set
 # CONFIG_TTY_PRINTK is not set
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
@@ -495,7 +615,6 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
-# CONFIG_GPIO_DEVICE is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_DEVPORT=y
 # CONFIG_RAMOOPS is not set
@@ -506,6 +625,10 @@ CONFIG_DEVPORT=y
 # PPS support
 #
 # CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_GPIO_SYSFS is not set
@@ -515,8 +638,6 @@ CONFIG_GPIOLIB=y
 #
 # CONFIG_GPIO_BASIC_MMIO is not set
 # CONFIG_GPIO_IT8761E is not set
-# CONFIG_GPIO_SCH is not set
-# CONFIG_GPIO_VX855 is not set
 
 #
 # I2C GPIO expanders:
@@ -525,10 +646,8 @@ CONFIG_GPIOLIB=y
 #
 # PCI GPIO expanders:
 #
-# CONFIG_GPIO_CS5535 is not set
 # CONFIG_GPIO_BT8XX is not set
-# CONFIG_GPIO_LANGWELL is not set
-# CONFIG_GPIO_PCH is not set
+# CONFIG_GPIO_ML_IOH is not set
 # CONFIG_GPIO_RDC321X is not set
 
 #
@@ -578,6 +697,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 # CONFIG_RTC_CLASS is not set
@@ -586,33 +706,37 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_UIO is not set
 CONFIG_STAGING=y
 # CONFIG_STAGING_EXCLUDE_BUILD is not set
+# CONFIG_ET131X is not set
 # CONFIG_ECHO is not set
+# CONFIG_BRCM80211 is not set
 # CONFIG_COMEDI is not set
+# CONFIG_R8187SE is not set
+# CONFIG_RTL8192E is not set
 # CONFIG_POHMELFS is not set
-# CONFIG_AUTOFS_FS is not set
+# CONFIG_VT6655 is not set
 # CONFIG_VME_BUS is not set
+# CONFIG_DX_SEP is not set
 # CONFIG_IIO is not set
-# CONFIG_BATMAN_ADV is not set
+# CONFIG_XVMALLOC is not set
 # CONFIG_CRYSTALHD is not set
-
-#
-# Texas Instruments shared transport line discipline
-#
-# CONFIG_SMB_FS is not set
 CONFIG_MACH_NO_WESTBRIDGE=y
 # CONFIG_FT1000 is not set
 
 #
 # Speakup console speech
 #
-CONFIG_MIPS_PLATFORM_DEVICES=y
-# CONFIG_LEMOTE_LYNLOONG2F is not set
+
+#
+# Altera FPGA firmware download module
+#
 
 #
 # File systems
 #
+CONFIG_FS_POSIX_ACL=y
+CONFIG_EXPORTFS=y
 CONFIG_FILE_LOCKING=y
-# CONFIG_FSNOTIFY is not set
+CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
 # CONFIG_INOTIFY_USER is not set
 # CONFIG_FANOTIFY is not set
@@ -641,13 +765,13 @@ CONFIG_TMPFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 # CONFIG_NETWORK_FILESYSTEMS is not set
 # CONFIG_NLS is not set
-# CONFIG_DLM is not set
 
 #
 # Kernel hacking
 #
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_PRINTK_TIME=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
@@ -656,9 +780,9 @@ CONFIG_MAGIC_SYSRQ=y
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
 # CONFIG_DEBUG_KERNEL is not set
 # CONFIG_HARDLOCKUP_DETECTOR is not set
-CONFIG_BKL=y
 # CONFIG_SPARSE_RCU_POINTER is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -674,6 +798,7 @@ CONFIG_TRACING_SUPPORT=y
 # CONFIG_ATOMIC64_SELFTEST is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
 CONFIG_EARLY_PRINTK=y
 CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE="init=/init"
@@ -694,6 +819,7 @@ CONFIG_DEFAULT_SECURITY=""
 # OCF Configuration
 #
 # CONFIG_OCF_OCF is not set
+# CONFIG_VIRTUALIZATION is not set
 # CONFIG_BINARY_PRINTF is not set
 
 #
@@ -708,8 +834,10 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
-CONFIG_DECOMPRESS_LZMA=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
 CONFIG_NLATTR=y
+# CONFIG_AVERAGE is not set
diff --git a/target/mips/sys-available/mikrotik-rb411 b/target/mips/sys-available/mikrotik-rb411
deleted file mode 100644
index 6e1f597b1..000000000
--- a/target/mips/sys-available/mikrotik-rb411
+++ /dev/null
@@ -1,13 +0,0 @@
-config ADK_TARGET_SYSTEM_MIKROTIK_RB411
-	bool "Mikrotik Routerboard 411"
-	select ADK_mips
-	select ADK_big
-	select ADK_mikrotik_rb411
-	select ADK_KERNEL_ATHEROS_AR71XX
-	select ADK_KERNEL_ATHEROS_MACH_RB4XX
-	select ADK_TARGET_WITH_MINIPCI
-	select ADK_TARGET_WITH_WATCHDOG
-	select ADK_TARGET_WITH_NAND
-	help
-	  Support for Mikrotik RB411.
-
diff --git a/target/mips/sys-available/mikrotik-rb433 b/target/mips/sys-available/mikrotik-rb433
deleted file mode 100644
index 107f317a6..000000000
--- a/target/mips/sys-available/mikrotik-rb433
+++ /dev/null
@@ -1,13 +0,0 @@
-config ADK_TARGET_SYSTEM_MIKROTIK_RB433
-	bool "Mikrotik Routerboard 433"
-	select ADK_mips
-	select ADK_big
-	select ADK_mikrotik_rb433
-	select ADK_KERNEL_ATHEROS_AR71XX
-	select ADK_KERNEL_ATHEROS_MACH_RB4XX
-	select ADK_TARGET_WITH_MINIPCI
-	select ADK_TARGET_WITH_WATCHDOG
-	select ADK_TARGET_WITH_NAND
-	help
-	  Support for Mikrotik RB433.
-
diff --git a/target/mips/sys-available/mikrotik-rb4xx b/target/mips/sys-available/mikrotik-rb4xx
new file mode 100644
index 000000000..421f4abb7
--- /dev/null
+++ b/target/mips/sys-available/mikrotik-rb4xx
@@ -0,0 +1,15 @@
+config ADK_TARGET_SYSTEM_MIKROTIK_RB4XX
+	bool "Mikrotik Routerboard 4xx"
+	select ADK_mips
+	select ADK_big
+	select ADK_mikrotik_rb4xx
+	select ADK_KERNEL_ATHEROS_AR71XX
+	select ADK_KERNEL_AR71XX_MACH_RB4XX
+	select ADK_KERNEL_SPI_RB4XX
+	select ADK_KERNEL_SPI_RB4XX_CPLD
+	select ADK_TARGET_WITH_MINIPCI
+	select ADK_TARGET_WITH_WATCHDOG
+	select ADK_TARGET_WITH_NAND
+	help
+	  Support for Mikrotik RB411/RB433.
+