Merge branch 'master' of git+ssh://openadk.org/git/openadk

1 files changed, 18749 insertions, 0 deletions

diff --git a/target/rb4xx/patches/ar71xx.patch b/target/rb4xx/patches/ar71xx.patch
new file mode 100644
index 000000000..b0a342dfa
--- /dev/null
+++ b/target/rb4xx/patches/ar71xx.patch
@@ -0,0 +1,18749 @@
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.33.3/arch/mips/ar71xx/ar71xx.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/ar71xx.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/ar71xx.c	2010-04-02 11:07:51.850954806 +0200
+@@ -0,0 +1,177 @@
++/*
++ *  AR71xx SoC routines
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/mutex.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++static DEFINE_MUTEX(ar71xx_flash_mutex);
++
++void __iomem *ar71xx_ddr_base;
++EXPORT_SYMBOL_GPL(ar71xx_ddr_base);
++
++void __iomem *ar71xx_pll_base;
++EXPORT_SYMBOL_GPL(ar71xx_pll_base);
++
++void __iomem *ar71xx_reset_base;
++EXPORT_SYMBOL_GPL(ar71xx_reset_base);
++
++void __iomem *ar71xx_gpio_base;
++EXPORT_SYMBOL_GPL(ar71xx_gpio_base);
++
++void __iomem *ar71xx_usb_ctrl_base;
++EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base);
++
++void ar71xx_device_stop(u32 mask)
++{
++	unsigned long flags;
++	u32 mask_inv;
++	u32 t;
++
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask);
++		local_irq_restore(flags);
++		break;
++
++	case AR71XX_SOC_AR7240:
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++		mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
++		t |= mask;
++		t &= ~mask_inv;
++		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
++		local_irq_restore(flags);
++		break;
++
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask);
++		local_irq_restore(flags);
++		break;
++
++	default:
++		BUG();
++	}
++}
++EXPORT_SYMBOL_GPL(ar71xx_device_stop);
++
++void ar71xx_device_start(u32 mask)
++{
++	unsigned long flags;
++	u32 mask_inv;
++	u32 t;
++
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask);
++		local_irq_restore(flags);
++		break;
++
++	case AR71XX_SOC_AR7240:
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++		mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
++		t &= ~mask;
++		t |= mask_inv;
++		ar71xx_reset_wr(AR724X_RESET_REG_RESET_MODULE, t);
++		local_irq_restore(flags);
++		break;
++
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
++		ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask);
++		local_irq_restore(flags);
++		break;
++
++	default:
++		BUG();
++	}
++}
++EXPORT_SYMBOL_GPL(ar71xx_device_start);
++
++int ar71xx_device_stopped(u32 mask)
++{
++	unsigned long flags;
++	u32 t;
++
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7130:
++	case AR71XX_SOC_AR7141:
++	case AR71XX_SOC_AR7161:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE);
++		local_irq_restore(flags);
++		break;
++
++	case AR71XX_SOC_AR7240:
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
++		local_irq_restore(flags);
++		break;
++
++	case AR71XX_SOC_AR9130:
++	case AR71XX_SOC_AR9132:
++		local_irq_save(flags);
++		t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
++		local_irq_restore(flags);
++		break;
++
++	default:
++		BUG();
++	}
++
++	return ((t & mask) == mask);
++}
++EXPORT_SYMBOL_GPL(ar71xx_device_stopped);
++
++void ar71xx_ddr_flush(u32 reg)
++{
++	ar71xx_ddr_wr(reg, 1);
++	while ((ar71xx_ddr_rr(reg) & 0x1));
++
++	ar71xx_ddr_wr(reg, 1);
++	while ((ar71xx_ddr_rr(reg) & 0x1));
++}
++EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
++
++void ar71xx_flash_acquire(void)
++{
++	mutex_lock(&ar71xx_flash_mutex);
++}
++EXPORT_SYMBOL_GPL(ar71xx_flash_acquire);
++
++void ar71xx_flash_release(void)
++{
++	mutex_unlock(&ar71xx_flash_mutex);
++}
++EXPORT_SYMBOL_GPL(ar71xx_flash_release);
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-eth.c linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-eth.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-eth.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-eth.c	2010-03-23 20:31:04.580708993 +0100
+@@ -0,0 +1,70 @@
++/*
++ *  Atheros AP91 reference board ethernet initialization
++ *
++ *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include "devices.h"
++#include "dev-dsa.h"
++#include "dev-ap91-eth.h"
++
++static struct dsa_chip_data ap91_dsa_chip = {
++	.port_names[0]  = "cpu",
++	.port_names[1]  = "lan1",
++	.port_names[2]  = "lan2",
++	.port_names[3]  = "lan3",
++	.port_names[4]  = "lan4",
++};
++
++static struct dsa_platform_data ap91_dsa_data = {
++	.nr_chips	= 1,
++	.chip		= &ap91_dsa_chip,
++};
++
++static void ap91_eth_set_port_name(unsigned port, const char *name)
++{
++	if (port < 1 || port > 5)
++		return;
++
++	if (name)
++		ap91_dsa_chip.port_names[port] = (char *) name;
++}
++
++void __init ap91_eth_init(u8 *mac_addr, const char *port_names[])
++{
++	if (mac_addr)
++		ar71xx_set_mac_base(mac_addr);
++
++	if (port_names) {
++		int i;
++
++		for (i = 0; i < AP91_ETH_NUM_PORT_NAMES; i++)
++			ap91_eth_set_port_name(i + 1, port_names[i]);
++	}
++
++	/* WAN port */
++	ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth0_data.speed = SPEED_100;
++	ar71xx_eth0_data.duplex = DUPLEX_FULL;
++	ar71xx_eth0_data.fifo_cfg1 = 0x0fff0000;
++	ar71xx_eth0_data.fifo_cfg2 = 0x00001fff;
++	ar71xx_eth0_data.fifo_cfg3 = 0x008001ff;
++
++	/* LAN ports */
++	ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
++	ar71xx_eth1_data.speed = SPEED_1000;
++	ar71xx_eth1_data.duplex = DUPLEX_FULL;
++	ar71xx_eth1_data.fifo_cfg1 = 0x0fff0000;
++	ar71xx_eth1_data.fifo_cfg2 = 0x00001fff;
++	ar71xx_eth1_data.fifo_cfg3 = 0x008001ff;
++
++	ar71xx_add_device_mdio(0x0);
++	ar71xx_add_device_eth(1);
++	ar71xx_add_device_eth(0);
++
++	ar71xx_add_device_dsa(1, &ap91_dsa_data);
++}
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-eth.h linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-eth.h
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-eth.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-eth.h	2010-03-12 19:31:46.886045750 +0100
+@@ -0,0 +1,23 @@
++/*
++ *  Atheros AP91 reference board ethernet initialization
++ *
++ *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_AP91_ETH_H
++#define _AR71XX_DEV_AP91_ETH_H
++
++#define AP91_ETH_NUM_PORT_NAMES	4
++
++#if defined(CONFIG_AR71XX_DEV_AP91_ETH)
++void ap91_eth_init(u8 *mac_addr, const char *port_names[]) __init;
++#else
++static inline void ap91_eth_init(u8 *mac_addr) { }
++#endif
++
++#endif /* _AR71XX_DEV_AP91_ETH_H */
++
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-pci.c linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-pci.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-pci.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-pci.c	2009-12-25 12:10:59.596028998 +0100
+@@ -0,0 +1,114 @@
++/*
++ *  Atheros AP91 reference board PCI initialization
++ *
++ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <linux/ath9k_platform.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++#include "dev-ap91-pci.h"
++
++static struct ath9k_platform_data ap91_wmac_data;
++static char ap91_wmac_mac[6];
++static int ap91_pci_fixup_enabled;
++
++static struct ar71xx_pci_irq ap91_pci_irqs[] __initdata = {
++	{
++		.slot	= 0,
++		.pin	= 1,
++		.irq	= AR71XX_PCI_IRQ_DEV0,
++	}
++};
++
++static int ap91_pci_plat_dev_init(struct pci_dev *dev)
++{
++	switch(PCI_SLOT(dev->devfn)) {
++	case 0:
++		dev->dev.platform_data = &ap91_wmac_data;
++		break;
++	}
++
++	return 0;
++}
++
++static void ap91_pci_fixup(struct pci_dev *dev)
++{
++	void __iomem *mem;
++	u16 *cal_data;
++	u16 cmd;
++	u32 val;
++
++	if (!ap91_pci_fixup_enabled)
++		return;
++
++	printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
++
++	cal_data = ap91_wmac_data.eeprom_data;
++	if (*cal_data != 0xa55a) {
++		printk(KERN_ERR "PCI: no calibration data found for %s\n",
++		       pci_name(dev));
++		return;
++	}
++
++	mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
++	if (!mem) {
++		printk(KERN_ERR "PCI: ioremap error for device %s\n",
++		       pci_name(dev));
++		return;
++	}
++
++	/* Setup the PCI device to allow access to the internal registers */
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++        /* set pointer to first reg address */
++	cal_data += 3;
++	while (*cal_data != 0xffff) {
++		u32 reg;
++		reg = *cal_data++;
++		val = *cal_data++;
++		val |= (*cal_data++) << 16;
++
++		__raw_writel(val, mem + reg);
++		udelay(100);
++	}
++
++	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++	dev->vendor = val & 0xffff;
++	dev->device = (val >> 16) & 0xffff;
++
++	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++	dev->revision = val & 0xff;
++	dev->class = val >> 8; /* upper 3 bytes */
++
++	iounmap(mem);
++}
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap91_pci_fixup);
++
++void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr)
++{
++	if (cal_data)
++		memcpy(ap91_wmac_data.eeprom_data, cal_data,
++		       sizeof(ap91_wmac_data.eeprom_data));
++
++	if (mac_addr) {
++		memcpy(ap91_wmac_mac, mac_addr, sizeof(ap91_wmac_mac));
++		ap91_wmac_data.macaddr = ap91_wmac_mac;
++	}
++
++	ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init;
++	ar71xx_pci_init(ARRAY_SIZE(ap91_pci_irqs), ap91_pci_irqs);
++
++	ap91_pci_fixup_enabled = 1;
++}
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-pci.h linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-pci.h
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap91-pci.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ap91-pci.h	2010-01-05 20:38:52.249392561 +0100
+@@ -0,0 +1,21 @@
++/*
++ *  Atheros AP91 reference board PCI initialization
++ *
++ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_AP91_PCI_H
++#define _AR71XX_DEV_AP91_PCI_H
++
++#if defined(CONFIG_AR71XX_DEV_AP91_PCI)
++void ap91_pci_init(u8 *cal_data, u8 *mac_addr) __init;
++#else
++static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) { }
++#endif
++
++#endif /* _AR71XX_DEV_AP91_PCI_H */
++
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap94-pci.c linux-2.6.33.3/arch/mips/ar71xx/dev-ap94-pci.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap94-pci.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ap94-pci.c	2010-02-13 16:30:07.244691791 +0100
+@@ -0,0 +1,159 @@
++/*
++ *  Atheros AP94 reference board PCI initialization
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/pci.h>
++#include <linux/ath9k_platform.h>
++#include <linux/delay.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++#include <asm/mach-ar71xx/pci.h>
++
++#include "dev-ap94-pci.h"
++
++static struct ath9k_platform_data ap94_wmac0_data;
++static struct ath9k_platform_data ap94_wmac1_data;
++static char ap94_wmac0_mac[6];
++static char ap94_wmac1_mac[6];
++static int ap94_pci_fixup_enabled;
++
++static struct ar71xx_pci_irq ap94_pci_irqs[] __initdata = {
++        {
++                .slot   = 0,
++                .pin    = 1,
++                .irq    = AR71XX_PCI_IRQ_DEV0,
++        }, {
++                .slot   = 1,
++                .pin    = 1,
++                .irq    = AR71XX_PCI_IRQ_DEV1,
++        }
++};
++
++static int ap94_pci_plat_dev_init(struct pci_dev *dev)
++{
++	switch(PCI_SLOT(dev->devfn)) {
++	case 17:
++		dev->dev.platform_data = &ap94_wmac0_data;
++		break;
++
++	case 18:
++		dev->dev.platform_data = &ap94_wmac1_data;
++		break;
++	}
++
++	return 0;
++}
++
++static void ap94_pci_fixup(struct pci_dev *dev)
++{
++	void __iomem *mem;
++	u16 *cal_data;
++	u16 cmd;
++	u32 bar0;
++	u32 val;
++
++	if (!ap94_pci_fixup_enabled)
++		return;
++
++	switch (PCI_SLOT(dev->devfn)) {
++	case 17:
++		cal_data = ap94_wmac0_data.eeprom_data;
++		break;
++	case 18:
++		cal_data = ap94_wmac1_data.eeprom_data;
++		break;
++	default:
++		return;
++	}
++
++	if (*cal_data != 0xa55a) {
++		printk(KERN_ERR "PCI: no calibration data found for %s\n",
++		       pci_name(dev));
++		return;
++	}
++
++	mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
++	if (!mem) {
++		printk(KERN_ERR "PCI: ioremap error for device %s\n",
++		       pci_name(dev));
++		return;
++	}
++
++	printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
++
++	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++
++	/* Setup the PCI device to allow access to the internal registers */
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	/* set pointer to first reg address */
++	cal_data += 3;
++	while (*cal_data != 0xffff) {
++		u32 reg;
++		reg = *cal_data++;
++		val = *cal_data++;
++		val |= (*cal_data++) << 16;
++
++		__raw_writel(val, mem + reg);
++		udelay(100);
++	}
++
++	pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++	dev->vendor = val & 0xffff;
++	dev->device = (val >> 16) & 0xffff;
++
++	pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++	dev->revision = val & 0xff;
++	dev->class = val >> 8; /* upper 3 bytes */
++
++	pci_read_config_word(dev, PCI_COMMAND, &cmd);
++	cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
++	pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
++
++	iounmap(mem);
++}
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap94_pci_fixup);
++
++void __init ap94_pci_enable_quirk_wndr3700(void)
++{
++	ap94_wmac0_data.quirk_wndr3700 = 1;
++	ap94_wmac1_data.quirk_wndr3700 = 1;
++}
++
++void __init ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
++			  u8 *cal_data1, u8 *mac_addr1)
++{
++	if (cal_data0)
++		memcpy(ap94_wmac0_data.eeprom_data, cal_data0,
++		       sizeof(ap94_wmac0_data.eeprom_data));
++
++	if (cal_data1)
++		memcpy(ap94_wmac1_data.eeprom_data, cal_data1,
++		       sizeof(ap94_wmac1_data.eeprom_data));
++
++	if (mac_addr0) {
++		memcpy(ap94_wmac0_mac, mac_addr0, sizeof(ap94_wmac0_mac));
++		ap94_wmac0_data.macaddr = ap94_wmac0_mac;
++	}
++
++	if (mac_addr1) {
++		memcpy(ap94_wmac1_mac, mac_addr1, sizeof(ap94_wmac1_mac));
++		ap94_wmac1_data.macaddr = ap94_wmac1_mac;
++	}
++
++	ar71xx_pci_plat_dev_init = ap94_pci_plat_dev_init;
++	ar71xx_pci_init(ARRAY_SIZE(ap94_pci_irqs), ap94_pci_irqs);
++
++	ap94_pci_fixup_enabled = 1;
++}
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap94-pci.h linux-2.6.33.3/arch/mips/ar71xx/dev-ap94-pci.h
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ap94-pci.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ap94-pci.h	2010-02-13 16:30:07.244691791 +0100
+@@ -0,0 +1,28 @@
++/*
++ *  Atheros AP94 reference board PCI initialization
++ *
++ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_AP94_PCI_H
++#define _AR71XX_DEV_AP94_PCI_H
++
++#if defined(CONFIG_AR71XX_DEV_AP94_PCI)
++void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
++		   u8 *cal_data1, u8 *mac_addr1) __init;
++
++void ap94_pci_enable_quirk_wndr3700(void) __init;
++
++#else
++static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
++				 u8 *cal_data1, u8 *mac_addr1) {}
++
++static inline void ap94_pci_enable_quirk_wndr3700(void) {}
++#endif
++
++#endif /* _AR71XX_DEV_AP94_PCI_H */
++
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ar913x-wmac.c linux-2.6.33.3/arch/mips/ar71xx/dev-ar913x-wmac.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ar913x-wmac.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ar913x-wmac.c	2010-03-23 20:31:04.941023040 +0100
+@@ -0,0 +1,68 @@
++/*
++ *  Atheros AR913x SoC built-in WMAC device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/etherdevice.h>
++#include <linux/platform_device.h>
++#include <linux/ath9k_platform.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "dev-ar913x-wmac.h"
++
++static struct ath9k_platform_data ar913x_wmac_data;
++static char ar913x_wmac_mac[6];
++
++static struct resource ar913x_wmac_resources[] = {
++	{
++		.start	= AR91XX_WMAC_BASE,
++		.end	= AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	}, {
++		.start	= AR71XX_CPU_IRQ_IP2,
++		.end	= AR71XX_CPU_IRQ_IP2,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device ar913x_wmac_device = {
++	.name		= "ath9k",
++	.id		= -1,
++	.resource	= ar913x_wmac_resources,
++	.num_resources	= ARRAY_SIZE(ar913x_wmac_resources),
++	.dev = {
++		.platform_data = &ar913x_wmac_data,
++	},
++};
++
++void __init ar913x_add_device_wmac(u8 *cal_data, u8 *mac_addr)
++{
++	if (cal_data)
++		memcpy(ar913x_wmac_data.eeprom_data, cal_data,
++		       sizeof(ar913x_wmac_data.eeprom_data));
++
++	if (mac_addr) {
++		memcpy(ar913x_wmac_mac, mac_addr, sizeof(ar913x_wmac_mac));
++		ar913x_wmac_data.macaddr = ar913x_wmac_mac;
++	}
++
++	ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
++	mdelay(10);
++
++	ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
++	mdelay(10);
++
++	platform_device_register(&ar913x_wmac_device);
++}
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ar913x-wmac.h linux-2.6.33.3/arch/mips/ar71xx/dev-ar913x-wmac.h
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-ar913x-wmac.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-ar913x-wmac.h	2010-01-05 20:38:52.185278525 +0100
+@@ -0,0 +1,19 @@
++/*
++ *  Atheros AR913x SoC built-in WMAC device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_AR913X_WMAC_H
++#define _AR71XX_DEV_AR913X_WMAC_H
++
++void ar913x_add_device_wmac(u8 *cal_data, u8 *mac_addr) __init;
++
++#endif /* _AR71XX_DEV_AR913X_WMAC_H */
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-dsa.c linux-2.6.33.3/arch/mips/ar71xx/dev-dsa.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-dsa.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-dsa.c	2010-01-05 20:38:52.058900684 +0100
+@@ -0,0 +1,50 @@
++/*
++ *  Atheros AR71xx DSA switch device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/init.h>
++#include <linux/platform_device.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "devices.h"
++#include "dev-dsa.h"
++
++static struct platform_device ar71xx_dsa_switch_device = {
++	.name		= "dsa",
++	.id		= 0,
++};
++
++void __init ar71xx_add_device_dsa(unsigned int id,
++				  struct dsa_platform_data *d)
++{
++	int i;
++
++	switch (id) {
++	case 0:
++		d->netdev = &ar71xx_eth0_device.dev;
++		break;
++	case 1:
++		d->netdev = &ar71xx_eth1_device.dev;
++		break;
++	default:
++		printk(KERN_ERR
++			"ar71xx: invalid ethernet id %d for DSA switch\n",
++			id);
++		return;
++	}
++
++	for (i = 0; i < d->nr_chips; i++)
++		d->chip[i].mii_bus = &ar71xx_mdio_device.dev;
++
++	ar71xx_dsa_switch_device.dev.platform_data = d;
++
++	platform_device_register(&ar71xx_dsa_switch_device);
++}
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-dsa.h linux-2.6.33.3/arch/mips/ar71xx/dev-dsa.h
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-dsa.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-dsa.h	2010-01-05 20:38:52.137278273 +0100
+@@ -0,0 +1,20 @@
++/*
++ *  Atheros AR71xx DSA switch device support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_DSA_H
++#define _AR71XX_DEV_DSA_H
++
++#include <net/dsa.h>
++
++void ar71xx_add_device_dsa(unsigned int id,
++			   struct dsa_platform_data *d) __init;
++
++#endif /* _AR71XX_DEV_DSA_H */
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-gpio-buttons.c linux-2.6.33.3/arch/mips/ar71xx/dev-gpio-buttons.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-gpio-buttons.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-gpio-buttons.c	2010-01-05 20:38:52.310262885 +0100
+@@ -0,0 +1,58 @@
++/*
++ *  Atheros AR71xx GPIO button support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include "linux/init.h"
++#include <linux/platform_device.h>
++
++#include "dev-gpio-buttons.h"
++
++void __init ar71xx_add_device_gpio_buttons(int id,
++					   unsigned poll_interval,
++					   unsigned nbuttons,
++					   struct gpio_button *buttons)
++{
++	struct platform_device *pdev;
++	struct gpio_buttons_platform_data pdata;
++	struct gpio_button *p;
++	int err;
++
++	p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
++	if (!p)
++		return;
++
++	memcpy(p, buttons, nbuttons * sizeof(*p));
++
++	pdev = platform_device_alloc("gpio-buttons", id);
++	if (!pdev)
++		goto err_free_buttons;
++
++	memset(&pdata, 0, sizeof(pdata));
++	pdata.poll_interval = poll_interval;
++	pdata.nbuttons = nbuttons;
++	pdata.buttons = p;
++
++	err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
++	if (err)
++		goto err_put_pdev;
++
++
++	err = platform_device_add(pdev);
++	if (err)
++		goto err_put_pdev;
++
++	return;
++
++err_put_pdev:
++	platform_device_put(pdev);
++
++err_free_buttons:
++	kfree(p);
++}
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/dev-gpio-buttons.h linux-2.6.33.3/arch/mips/ar71xx/dev-gpio-buttons.h
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/dev-gpio-buttons.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/dev-gpio-buttons.h	2010-01-05 20:38:52.385278021 +0100
+@@ -0,0 +1,25 @@
++/*
++ *  Atheros AR71xx GPIO button support
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#ifndef _AR71XX_DEV_GPIO_BUTTONS_H
++#define _AR71XX_DEV_GPIO_BUTTONS_H
++
++#include <linux/input.h>
++#include <linux/gpio_buttons.h>
++
++#include <asm/mach-ar71xx/platform.h>
++
++void ar71xx_add_device_gpio_buttons(int id,
++				    unsigned poll_interval,
++				    unsigned nbuttons,
++				    struct gpio_button *buttons) __init;
++
++#endif /* _AR71XX_DEV_GPIO_BUTTONS_H */
+diff -Nur linux-2.6.33.3.orig/arch/mips/ar71xx/devices.c linux-2.6.33.3/arch/mips/ar71xx/devices.c
+--- linux-2.6.33.3.orig/arch/mips/ar71xx/devices.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.33.3/arch/mips/ar71xx/devices.c	2010-04-02 11:07:51.658955496 +0200
+@@ -0,0 +1,575 @@
++/*
++ *  Atheros AR71xx SoC platform devices
++ *
++ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
++ *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
++ *
++ *  Parts of this file are based on Atheros' 2.6.15 BSP
++ *
++ *  This program is free software; you can redistribute it and/or modify it
++ *  under the terms of the GNU General Public License version 2 as published
++ *  by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/etherdevice.h>
++#include <linux/platform_device.h>
++#include <linux/serial_8250.h>
++
++#include <asm/mach-ar71xx/ar71xx.h>
++
++#include "devices.h"
++
++static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
++
++static struct resource ar71xx_uart_resources[] = {
++	{
++		.start	= AR71XX_UART_BASE,
++		.end	= AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
++static struct plat_serial8250_port ar71xx_uart_data[] = {
++	{
++		.mapbase	= AR71XX_UART_BASE,
++		.irq		= AR71XX_MISC_IRQ_UART,
++		.flags		= AR71XX_UART_FLAGS,
++		.iotype		= UPIO_MEM32,
++		.regshift	= 2,
++	}, {
++		/* terminating entry */
++	}
++};
++
++static struct platform_device ar71xx_uart_device = {
++	.name		= "serial8250",
++	.id		= PLAT8250_DEV_PLATFORM,
++	.resource	= ar71xx_uart_resources,
++	.num_resources	= ARRAY_SIZE(ar71xx_uart_resources),
++	.dev = {
++		.platform_data	= ar71xx_uart_data
++	},
++};
++
++void __init ar71xx_add_device_uart(void)
++{
++	ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
++	platform_device_register(&ar71xx_uart_device);
++}
++
++static struct resource ar71xx_mdio_resources[] = {
++	{
++		.name	= "mdio_base",
++		.flags	= IORESOURCE_MEM,
++		.start	= AR71XX_GE0_BASE,
++		.end	= AR71XX_GE0_BASE + 0x200 - 1,
++	}
++};
++
++static struct ag71xx_mdio_platform_data ar71xx_mdio_data;
++
++struct platform_device ar71xx_mdio_device = {
++	.name		= "ag71xx-mdio",
++	.id		= -1,
++	.resource	= ar71xx_mdio_resources,
++	.num_resources	= ARRAY_SIZE(ar71xx_mdio_resources),
++	.dev = {
++		.platform_data = &ar71xx_mdio_data,
++	},
++};
++
++void __init ar71xx_add_device_mdio(u32 phy_mask)
++{
++	switch (ar71xx_soc) {
++	case AR71XX_SOC_AR7240:
++	case AR71XX_SOC_AR7241:
++	case AR71XX_SOC_AR7242:
++		ar71xx_mdio_data.is_ar7240 = 1;
++		break;
++	default:
++		break;
++	}
++
++	ar71xx_mdio_data.phy_mask = phy_mask;
++
++	platform_device_register(&ar71xx_mdio_device);
++}
++
++static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
++{
++	void __iomem *base;
++	u32 t;
++
++	base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
++
++	t = __raw_readl(base + cfg_reg);
++	t &= ~(3 << shift);
++	t |=  (2 << shift);
++	__raw_writel(t, base + cfg_reg);
++	udelay(100);
++
++	__raw_writel(pll_val, base + pll_reg);
++
++	t |= (3 << shift);
++	__raw_writel(t, base + cfg_reg);
++	udelay(100);
++
++	t &= ~(3 << shift);
++	__raw_writel(t, base + cfg_reg);
++	udelay(100);
++
++	printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
++		(unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
++
++	iounmap(base);
++}
++
++struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
++struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
++
++static u32 ar71xx_get_eth_pll(unsigned int mac, int speed)
++{
++	struct ar71xx_eth_pll_data *pll_data;
++	u32 pll_val;
++
++	switch (mac) {
++	case 0:
++		pll_data = &ar71xx_eth0_pll_data;
++		break;
++	case 1:
++		pll_data = &ar71xx_eth1_pll_data;
++		break;
++	default:
++		BUG();
++	}
++
++	switch (speed) {
++	case SPEED_10:
++		pll_val = pll_data->pll_10;
++		break;
++	case SPEED_100:
++		pll_val = pll_data->pll_100;
++		break;
++	case SPEED_1000:
++		pll_val = pll_data->pll_1000;
++		break;
++	default:
++		BUG();
++	}
++
++	return pll_val;
++}
++
++static void ar71xx_set_pll_ge0(int speed)
++{
++	u32 val = ar71xx_get_eth_pll(0, speed);
++
++	ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
++			val, AR71XX_ETH0_PLL_SHIFT);
++}
++
++static void ar71xx_set_pll_ge1(int speed)
++{
++	u32 val = ar71xx_get_eth_pll(1, speed);
++
++	ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
++			 val, AR71XX_ETH1_PLL_SHIFT);
++}
++
++static void ar724x_set_pll_ge0(int speed)
++{
++	/* TODO */
++}
++
++static void ar724x_set_pll_ge1(int speed)
++{
++	/* TODO */
++}
++
++static void ar91xx_set_pll_ge0(int speed)
++{
++	u32 val = ar71xx_get_eth_pll(0, speed);
++
++	ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
++			 val, AR91XX_ETH0_PLL_SHIFT);
++}
++
++static void ar91xx_set_pll_ge1(int speed)
++{
++	u32 val = ar71xx_get_eth_pll(1, speed);
++
++	ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
++			 val, AR91XX_ETH1_PLL_SHIFT);
++}
++
++static void ar71xx_ddr_flush_ge0(void)
++{
++	ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
++}
++
++static void ar71xx_ddr_flush_ge1(void)
++{
++	ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
++}
++
++static void ar724x_ddr_flush_ge0(void)
++{
++	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
++}
++
++static void ar724x_ddr_flush_ge1(void)
++{
++	ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
++}
++
++static void ar91xx_ddr_flush_ge0(void)
++{
++	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
++}
++
++static void ar91xx_ddr_flush_ge1(void)
++{
++	ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
++}
++
++static struct resource ar71xx_eth0_resources[] = {
++	{
++		.name	= "mac_base",
++		.flags	= IORESOURCE_MEM,
++		.start	= AR71XX_GE0_BASE,
++		.end	= AR71XX_GE0_BASE + 0x200 - 1,
++	}, {
++		.name	= "mii_ctrl",
++		.flags	= IORESOURCE_MEM,
++		.start	= AR71XX_MII_BASE + MII_REG_MII0_CTRL,
++		.end	= AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
++	}, {
++		.name	= "mac_irq",
++		.flags	= IORESOURCE_IRQ,
++		.start	= AR71XX_CPU_IRQ_GE0,
++		.end	= AR71XX_CPU_IRQ_GE0,
++	},
++};
++
++struct ag71xx_platform_data ar71xx_eth0_data = {
++	.reset_bit	= RESET_MODULE_GE0_MAC,
++};