summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorWaldemar Brodkorb <wbx@openadk.org>2015-10-12 08:08:13 +0200
committerWaldemar Brodkorb <wbx@openadk.org>2015-10-12 08:08:28 +0200
commit8d2818603e51c29e2cc2f95706270d9967e6a7ed (patch)
treee5ed86cd7ef1cefd4dce42d9045327df225f1311
parenta83ec3eae9b5de021a31c0de456b51784ff1dd7c (diff)
update to latest xbian kernel patch
Diffstat
-rw-r--r--target/arm/solidrun-imx6/patches/4.1.10/0001-xbian.patch30579
-rw-r--r--target/linux/config/Config.in.graphics1
2 files changed, 25843 insertions, 4737 deletions
diff --git a/target/arm/solidrun-imx6/patches/4.1.10/0001-xbian.patch b/target/arm/solidrun-imx6/patches/4.1.10/0001-xbian.patch
index d2ea38153..68b82758b 100644
--- a/target/arm/solidrun-imx6/patches/4.1.10/0001-xbian.patch
+++ b/target/arm/solidrun-imx6/patches/4.1.10/0001-xbian.patch
@@ -1,6 +1,31 @@
-diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6dl.dtsi linux-4.1.10/arch/arm/boot/dts/imx6dl.dtsi
---- linux-4.1.10.orig/arch/arm/boot/dts/imx6dl.dtsi 2015-10-03 13:49:38.000000000 +0200
-+++ linux-4.1.10/arch/arm/boot/dts/imx6dl.dtsi 2015-10-10 16:41:04.845313887 +0200
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6dl-cm-fx6.dts xbian-sources-kernel/arch/arm/boot/dts/imx6dl-cm-fx6.dts
+--- linux-4.1.10/arch/arm/boot/dts/imx6dl-cm-fx6.dts 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6dl-cm-fx6.dts 2015-10-11 19:49:25.503432136 +0200
+@@ -0,0 +1,21 @@
++/*
++ * Copyright 2015 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-cm-fx6.dtsi"
++
++/ {
++ model = "CompuLab CM-FX6";
++ compatible = "compulab,cm-fx6", "fsl,imx6dl";
++};
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6dl.dtsi xbian-sources-kernel/arch/arm/boot/dts/imx6dl.dtsi
+--- linux-4.1.10/arch/arm/boot/dts/imx6dl.dtsi 2015-10-03 13:49:38.000000000 +0200
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6dl.dtsi 2015-10-11 19:49:25.503432136 +0200
@@ -30,7 +30,7 @@
/* kHz uV */
996000 1250000
@@ -157,9 +182,9 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6dl.dtsi linux-4.1.10/arch/arm/
-&vpu {
- compatible = "fsl,imx6dl-vpu", "cnm,coda960";
-};
-diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6dl-hummingboard2.dts linux-4.1.10/arch/arm/boot/dts/imx6dl-hummingboard2.dts
---- linux-4.1.10.orig/arch/arm/boot/dts/imx6dl-hummingboard2.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-4.1.10/arch/arm/boot/dts/imx6dl-hummingboard2.dts 2015-10-10 16:41:04.965313892 +0200
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6dl-hummingboard2.dts xbian-sources-kernel/arch/arm/boot/dts/imx6dl-hummingboard2.dts
+--- linux-4.1.10/arch/arm/boot/dts/imx6dl-hummingboard2.dts 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6dl-hummingboard2.dts 2015-10-11 19:49:25.503432136 +0200
@@ -0,0 +1,52 @@
+/*
+ * Device Tree file for SolidRun HummingBoard2
@@ -213,9 +238,971 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6dl-hummingboard2.dts linux-4.1
+ model = "SolidRun HummingBoard2 Solo/DualLite";
+ compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
+};
-diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi linux-4.1.10/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
---- linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-03 13:49:38.000000000 +0200
-+++ linux-4.1.10/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-10 16:41:04.965313892 +0200
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6dl-sbc-fx6.dts xbian-sources-kernel/arch/arm/boot/dts/imx6dl-sbc-fx6.dts
+--- linux-4.1.10/arch/arm/boot/dts/imx6dl-sbc-fx6.dts 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6dl-sbc-fx6.dts 2015-10-11 19:49:25.503432136 +0200
+@@ -0,0 +1,23 @@
++/*
++* Copyright 2015 CompuLab Ltd.
++*
++* Author: Valentin Raevsky <valentin@compulab.co.il>
++*
++* The code contained herein is licensed under the GNU General Public
++* License. You may obtain a copy of the GNU General Public License
++* Version 2 or later at the following locations:
++*
++* http://www.opensource.org/licenses/gpl-license.html
++* http://www.gnu.org/copyleft/gpl.html
++*/
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-cm-fx6.dtsi"
++#include "imx6qdl-sb-fx6x.dtsi"
++#include "imx6qdl-sb-fx6.dtsi"
++
++/ {
++ model = "CompuLab CM-FX6 on SBC-FX6";
++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6dl";
++};
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts xbian-sources-kernel/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts
+--- linux-4.1.10/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6dl-sbc-fx6m.dts 2015-10-11 19:49:25.503432136 +0200
+@@ -0,0 +1,23 @@
++/*
++* Copyright 2015 CompuLab Ltd.
++*
++* Author: Valentin Raevsky <valentin@compulab.co.il>
++*
++* The code contained herein is licensed under the GNU General Public
++* License. You may obtain a copy of the GNU General Public License
++* Version 2 or later at the following locations:
++*
++* http://www.opensource.org/licenses/gpl-license.html
++* http://www.gnu.org/copyleft/gpl.html
++*/
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-cm-fx6.dtsi"
++#include "imx6qdl-sb-fx6x.dtsi"
++#include "imx6qdl-sb-fx6m.dtsi"
++
++/ {
++ model = "CompuLab CM-FX6 on SBC-FX6m";
++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6dl";
++};
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6dl-vero.dts xbian-sources-kernel/arch/arm/boot/dts/imx6dl-vero.dts
+--- linux-4.1.10/arch/arm/boot/dts/imx6dl-vero.dts 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6dl-vero.dts 2015-10-11 19:49:25.503432136 +0200
+@@ -0,0 +1,51 @@
++/*
++ * Copyright (C) 2014 Russell King
++ * Copyright (C) 2015 Sam Nazarko
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This file is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License.
++ *
++ * This file is distributed in the hope that it will be useful
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++/dts-v1/;
++
++#include "imx6dl.dtsi"
++#include "imx6qdl-vero.dtsi"
++
++/ {
++ model = "OSMC Vero Rev 1.0";
++ compatible = "osmc,vero1", "fsl,imx6dl";
++};
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6q-cm-fx6.dts xbian-sources-kernel/arch/arm/boot/dts/imx6q-cm-fx6.dts
+--- linux-4.1.10/arch/arm/boot/dts/imx6q-cm-fx6.dts 2015-10-03 13:49:38.000000000 +0200
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6q-cm-fx6.dts 2015-10-11 19:49:25.507431871 +0200
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2013 CompuLab Ltd.
++ * Copyright 2014 CompuLab Ltd.
+ *
+ * Author: Valentin Raevsky <valentin@compulab.co.il>
+ *
+@@ -13,95 +13,9 @@
+
+ /dts-v1/;
+ #include "imx6q.dtsi"
++#include "imx6q-cm-fx6.dtsi"
+
+ / {
+ model = "CompuLab CM-FX6";
+ compatible = "compulab,cm-fx6", "fsl,imx6q";
+-
+- memory {
+- reg = <0x10000000 0x80000000>;
+- };
+-
+- leds {
+- compatible = "gpio-leds";
+-
+- heartbeat-led {
+- label = "Heartbeat";
+- gpios = <&gpio2 31 0>;
+- linux,default-trigger = "heartbeat";
+- };
+- };
+-};
+-
+-&fec {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_enet>;
+- phy-mode = "rgmii";
+- status = "okay";
+-};
+-
+-&gpmi {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_gpmi_nand>;
+- status = "okay";
+-};
+-
+-&iomuxc {
+- imx6q-cm-fx6 {
+- pinctrl_enet: enetgrp {
+- fsl,pins = <
+- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+- >;
+- };
+-
+- pinctrl_gpmi_nand: gpminandgrp {
+- fsl,pins = <
+- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
+- >;
+- };
+-
+- pinctrl_uart4: uart4grp {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+- >;
+- };
+- };
+-};
+-
+-&uart4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart4>;
+- status = "okay";
+ };
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6q-cm-fx6.dtsi xbian-sources-kernel/arch/arm/boot/dts/imx6q-cm-fx6.dtsi
+--- linux-4.1.10/arch/arm/boot/dts/imx6q-cm-fx6.dtsi 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6q-cm-fx6.dtsi 2015-10-11 19:49:25.507431871 +0200
+@@ -0,0 +1,95 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6qdl-cm-fx6.dtsi"
++
++/ {
++ regulators {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ reg_sata_ldo_en: sata_ldo_en {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_ldo_en";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio2 16 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ };
++
++ reg_sata_phy_slp: sata_phy_slp {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_phy_slp";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio3 23 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_ldo_en>;
++ };
++
++ reg_sata_nrstdly: sata_nrstdly {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_nrstdly";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio6 6 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_phy_slp>;
++ };
++
++ reg_sata_pwren: sata_pwren {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_pwren";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio1 28 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_nrstdly>;
++ };
++
++ reg_sata_nstandby1: sata_nstandby1 {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_nstandby1";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio3 20 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ vin-supply = <&reg_sata_pwren>;
++ };
++
++ reg_sata_nstandby2: sata_nstandby2 {
++ compatible = "regulator-fixed";
++ regulator-name = "cm_fx6_sata_nstandby2";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio5 2 0>;
++ startup-delay-us = <100>;
++ enable-active-high;
++ regulator-boot-on;
++ vin-supply = <&reg_sata_nstandby1>;
++ };
++
++ };
++
++};
++
++/* sata */
++&sata {
++ status = "okay";
++};
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi xbian-sources-kernel/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi
+--- linux-4.1.10/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi 1970-01-01 01:00:00.000000000 +0100
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6qdl-cm-fx6.dtsi 2015-10-11 19:49:25.507431871 +0200
+@@ -0,0 +1,643 @@
++/*
++ * Copyright 2014 CompuLab Ltd.
++ *
++ * Author: Valentin Raevsky <valentin@compulab.co.il>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#define MX6QDL_GPR1 0x04 0x04 0x000 0x0 0x0
++#define MX6QDL_GPR6 0x18 0x18 0x000 0x0 0x0
++#define MX6QDL_GPR7 0x1c 0x1c 0x000 0x0 0x0
++
++/ {
++ memory {
++ reg = <0x10000000 0x20000000>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ heartbeat-led {
++ label = "Heartbeat";
++ gpios = <&gpio2 31 0>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ regulators {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ reg_3p3v: 3p3v {
++ compatible = "regulator-fixed";
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ /* regulator for usb otg */
++ reg_usb_otg_vbus: usb_otg_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_otg_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio3 22 0>;
++ enable-active-high;
++ };
++
++ /* regulator1 for pcie power-on-gpio */
++ pcie_power_on_gpio: regulator-pcie-power-on-gpio {
++ compatible = "regulator-fixed";
++ regulator-name = "regulator-pcie-power-on-gpio";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio2 24 0>;
++ enable-active-high;
++ };
++
++ /* regulator for usb hub1 */
++ reg_usb_h1_vbus: usb_h1_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_h1_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio7 8 0>;
++ enable-active-high;
++ };
++
++ /* regulator1 for wifi/bt */
++ awnh387_npoweron: regulator-awnh387-npoweron {
++ compatible = "regulator-fixed";
++ regulator-name = "regulator-awnh387-npoweron";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio7 12 0>;
++ enable-active-high;
++ };
++
++ /* regulator2 for wifi/bt */
++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset {
++ compatible = "regulator-fixed";
++ regulator-name = "regulator-awnh387-wifi-nreset";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio6 16 0>;
++ startup-delay-us = <10000>;
++ };
++
++ tsc2046reg: tsc2046-reg {
++ compatible = "regulator-fixed";
++ regulator-name = "tsc2046-reg";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ };
++
++ aliases {
++ mxcfb0 = &mxcfb1;
++ mxcfb1 = &mxcfb2;
++ mxcfb2 = &mxcfb3;
++ mxcfb3 = &mxcfb4;
++ };
++
++ sound {
++ compatible = "fsl,imx-audio-wm8731";
++ model = "wm8731-audio";
++ ssi-controller = <&ssi2>;
++ src-port = <2>;
++ ext-port = <4>;
++ audio-codec = <&codec>;
++ audio-routing = "LOUT", "ROUT", "LLINEIN", "RLINEIN";
++ };
++
++ sound-hdmi {
++ compatible = "fsl,imx-audio-hdmi";
++ model = "imx-audio-hdmi";
++ hdmi-controller = <&hdmi_audio>;
++ };
++
++ sound-spdif {
++ compatible = "fsl,imx-audio-spdif";
++ model = "imx-spdif";
++ spdif-controller = <&spdif>;
++ spdif-out;
++ spdif-in;
++ };
++
++ mxcfb1: fb@0 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "hdmi";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M@60";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "disabled";
++ };
++
++ mxcfb2: fb@1 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "lcd";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M@60";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "disabled";
++ };
++
++ mxcfb3: fb@2 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "ldb";
++ interface_pix_fmt = "RGB666";
++ mode_str ="1366x768M-18@60";
++ default_bpp = <16>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "disabled";
++ };
++
++ mxcfb4: fb@3 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "ldb";
++ interface_pix_fmt = "RGB666";
++ mode_str ="1280x800M-18@60";
++ default_bpp = <16>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "disabled";
++ };
++
++ lcd@0 {
++ compatible = "fsl,lcd";
++ ipu_id = <0>;
++ disp_id = <0>;
++ default_ifmt = "RGB24";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ipu1_lcd>;
++ status = "okay";
++ };
++
++ v4l2_out {
++ compatible = "fsl,mxc_v4l2_output";
++ status = "okay";
++ };
++
++ restart_poweroff {
++ compatible = "fsl,snvs-poweroff";
++ };
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ hog {
++ pinctrl_hog: hoggrp {
++ fsl,pins = <
++ MX6QDL_GPR1 0x48400005
++ /* ipu3 QoS */
++ MX6QDL_GPR6 0x007f007f
++ MX6QDL_GPR7 0x007f007f
++ /* SATA PWR */
++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
++ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000
++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
++ /* SATA CTRL */
++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000
++ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
++ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000
++ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
++ /* POWER_BUTTON */
++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
++ >;
++ };
++ };
++
++ imx6q-cm-fx6 {
++ /* pins for eth0 */
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
++ >;
++ };
++
++ pinctrl_ipu1_lcd: ipu1grp-lcd {
++ fsl,pins = <
++ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
++ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
++ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
++ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
++ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000028
++ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
++ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
++ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
++ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
++ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
++ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
++ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
++ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
++ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
++ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
++ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
++ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
++ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
++ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
++ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
++ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
++ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
++ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
++ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
++ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
++ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
++ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
++ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
++ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
++ >;
++ };
++
++ /* pins for spi */
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
++ >;
++ };
++
++ /* pins for nand */
++ pinctrl_gpmi_nand: gpminandgrp {
++ fsl,pins = <
++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
++ >;
++ };
++
++ /* pins for i2c2 */
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++ >;
++ };
++
++ /* pins for i2c3 */
++ pinctrl_i2c3: i2c3grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++ >;
++ };
++
++ /* pins for console */
++ pinctrl_uart4: uart4grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
++ >;
++ };
++
++ /* pins for usb hub1 */
++ pinctrl_usbh1: usbh1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
++ >;
++ };
++
++ /* pins for usb otg */
++ pinctrl_usbotg: usbotggrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
++ >;
++ };
++
++ /* pins for wifi/bt */
++ pinctrl_usdhc1: usdhc1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
++ >;
++ };
++
++ /* pins for wifi/bt */
++ pinctrl_mrvl1: mrvl1grp {
++ fsl,pins = <
++ /* WIFI_PWR_RST */
++ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
++ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
++ >;
++ };
++
++ /* pins for tsc2046 pendown */
++ pinctrl_tsc2046: tsc2046grp {
++ fsl,pins = <
++ /* tsc2046 PENDOWN */
++ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000
++ >;
++ };
++
++ /* pins for pcie */
++ pinctrl_pcie: pciegrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
++ >;
++ };
++
++ /* pins for spdif */
++ pinctrl_spdif: spdifgrp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
++ >;
++ };
++
++ /* pins for audmux */
++ pinctrl_audmux: audmuxgrp {
++ fsl,pins = <
++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
++ /* master mode pin */
++ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x17059
++ >;
++ };
++
++ pinctrl_hdmi_hdcp: hdmihdcpgrp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
++ >;
++ };
++
++ pinctrl_pwm3_1: pwm3grp-1 {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_flexcan1_1: flexcan1grp-1 {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
++ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
++ >;
++ };
++ };
++};
++
++&cpu0 {
++ operating-points = <
++ /* kHz uV */
++ 1248000 1300000
++ 1200000 1275000
++ 1128000 1275000
++ 996000 1250000
++ 852000 1250000
++ 792000 1150000
++ 396000 975000
++ >;
++ fsl,soc-operating-points = <
++ /* ARM kHz SOC-PU uV */
++ 1248000 1300000
++ 1200000 1275000
++ 1128000 1275000
++ 996000 1250000
++ 852000 1250000
++ 792000 1175000
++ 396000 1175000
++ >;
++};
++
++/* spi */
++&ecspi1 {
++ fsl,spi-num-chipselects = <2>;
++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
++ status = "okay";
++
++ flash: m25p80@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "st,m25px16", "st,m25p";
++ spi-max-frequency = <20000000>;
++ reg = <0>;
++
++ partition@0 {
++ label = "uboot";
++ reg = <0x0 0xc0000>;
++ };
++
++ partition@c0000 {
++ label = "uboot environment";
++ reg = <0xc0000 0x40000>;
++ };
++
++ partition@100000 {
++ label = "reserved";
++ reg = <0x100000 0x100000>;
++ };
++ };
++
++ /* touch controller */
++ touch: tsc2046@1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_tsc2046>;
++
++ compatible = "ti,tsc2046";
++ vcc-supply = <&tsc2046reg>;
++
++ reg = <1>; /* CS1 */
++ spi-max-frequency = <1500000>;
++
++ interrupt-parent = <&gpio2>;
++ interrupts = <15 0>;
++ pendown-gpio = <&gpio2 15 0>;
++
++ ti,x-min = /bits/ 16 <0x0>;
++ ti,x-max = /bits/ 16 <0x0fff>;
++ ti,y-min = /bits/ 16 <0x0>;
++ ti,y-max = /bits/ 16 <0x0fff>;
++
++ ti,x-plate-ohms = /bits/ 16 <180>;
++ ti,pressure-max = /bits/ 16 <255>;
++
++ ti,debounce-max = /bits/ 16 <30>;
++ ti,debounce-tol = /bits/ 16 <10>;
++ ti,debounce-rep = /bits/ 16 <1>;
++
++ linux,wakeup;
++ };
++};
++
++/* eth0 */
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
++ status = "okay";
++};
++
++/* nand */
++&gpmi {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_gpmi_nand>;
++ status = "okay";
++
++ partition@0 {
++ label = "linux";
++ reg = <0x0 0x800000>;
++ };
++
++ partition@800000 {
++ label = "rootfs";
++ reg = < 0x800000 0x0>;
++ };
++};
++
++/* i2c3 */
++&i2c3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c3>;
++ status = "okay";
++
++ eeprom@50 {
++ compatible = "at24,24c02";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++
++ codec: wm8731@1a {
++ compatible = "wlf,wm8731";
++ reg = <0x1a>;
++ clocks = <&clks 173>, <&clks 158>, <&clks 201>, <&clks 200>;
++ clock-names = "pll4", "imx-ssi.1", "cko", "cko2";
++ AVDD-supply = <&reg_3p3v>;
++ HPVDD-supply = <&reg_3p3v>;
++ DCVDD-supply = <&reg_3p3v>;
++ DBVDD-supply = <&reg_3p3v>;
++ };
++};
++
++&pcie {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pcie>;
++ reset-gpio = <&gpio1 26 0>;
++ vdd-supply = <&pcie_power_on_gpio>;
++ status = "okay";
++};
++
++/* console */
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4>;
++ status = "okay";
++};
++
++/* usb otg */
++&usbotg {
++ vbus-supply = <&reg_usb_otg_vbus>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg>;
++ dr_mode = "otg";
++ status = "okay";
++};
++
++/* usb hub1 */
++&usbh1 {
++ vbus-supply = <&reg_usb_h1_vbus>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbh1>;
++ status = "okay";
++};
++
++/* wifi/bt */
++&usdhc1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_mrvl1>;
++ non-removable;
++ vmmc-supply = <&awnh387_npoweron>;
++ vmmc_aux-supply = <&awnh387_wifi_nreset>;
++ status = "okay";
++};
++
++&ssi2 {
++ fsl,mode = "i2s-master";
++ status = "okay";
++};
++
++&hdmi_core {
++ ipu_id = <0>;
++ disp_id = <1>;
++ status = "okay";
++};
++
++&hdmi_video {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hdmi_hdcp>;
++ fsl,hdcp;
++ status = "okay";
++};
++
++&hdmi_audio {
++ status = "okay";
++};
++
++&spdif {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_spdif>;
++ status = "okay";
++};
++
++&audmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_audmux>;
++ status = "okay";
++};
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi xbian-sources-kernel/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+--- linux-4.1.10/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-03 13:49:38.000000000 +0200
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-11 19:49:25.507431871 +0200
@@ -45,11 +45,22 @@
#include <dt-bindings/gpio/gpio.h>
@@ -329,6 +1316,15 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi linux-4.1.10/
};
&i2c3 {
+@@ -207,7 +260,7 @@
+
+ pinctrl_cubox_i_usdhc2_aux: cubox-i-usdhc2-aux {
+ fsl,pins = <
+- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x13071
+ MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
+ >;
+ };
@@ -228,6 +281,28 @@
MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x17059
>;
@@ -384,9 +1380,9 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi linux-4.1.10/
+ dcic_mux = "dcic-lvds1";
+ status = "okay";
};
-diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl.dtsi linux-4.1.10/arch/arm/boot/dts/imx6qdl.dtsi
---- linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-03 13:49:38.000000000 +0200
-+++ linux-4.1.10/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-10 16:41:04.965313892 +0200
+diff -Nur linux-4.1.10/arch/arm/boot/dts/imx6qdl.dtsi xbian-sources-kernel/arch/arm/boot/dts/imx6qdl.dtsi
+--- linux-4.1.10/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-03 13:49:38.000000000 +0200
++++ xbian-sources-kernel/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-11 19:49:25.511431606 +0200
@@ -14,6 +14,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -583,7 +1579,25 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl.dtsi linux-4.1.10/arch/arm
};
reg_arm: regulator-vddcore@140 {
-@@ -647,6 +730,7 @@
+@@ -597,6 +680,8 @@
+ anatop-min-bit-val = <1>;
+ anatop-min-voltage = <725000>;
+ anatop-max-voltage = <1450000>;
++ regulator-allow-bypass;
++ linux,phandle = <&reg_arm>;
+ };
+
+ reg_pu: regulator-vddpu@140 {
+@@ -631,6 +716,8 @@
+ anatop-min-bit-val = <1>;
+ anatop-min-voltage = <725000>;
+ anatop-max-voltage = <1450000>;
++ regulator-allow-bypass;
++ linux,phandle = <&reg_soc>;
+ };
+ };
+
+@@ -647,6 +734,7 @@
reg = <0x020c9000 0x1000>;
interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBPHY1>;
@@ -591,7 +1605,7 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl.dtsi linux-4.1.10/arch/arm
fsl,anatop = <&anatop>;
};
-@@ -655,9 +739,15 @@
+@@ -655,9 +743,15 @@
reg = <0x020ca000 0x1000>;
interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBPHY2>;
@@ -607,7 +1621,7 @@ diff -Nur linux-4.1.10.orig/arch/arm/boot/dts/imx6qdl.dtsi linux-4.1.10/arch/arm
snvs@020cc000 {
compatible = "fsl,sec-v4.0-mon", "simple-bus";
#address-cells = <1>;
-@@ -704,14 +794,12 @@
+@@ -704,14 +798,12 @@