strace: add patch for riscv32 support from T2

2 files changed, 284 insertions, 1 deletions

diff --git a/package/strace/Makefile b/package/strace/Makefile
index e80f80cbe..f1ab89f15 100644
--- a/package/strace/Makefile
+++ b/package/strace/Makefile
@@ -5,7 +5,7 @@ include ${ADK_TOPDIR}/rules.mk
 
 PKG_NAME:=		strace
 PKG_VERSION:=		6.7
-PKG_RELEASE:=		1
+PKG_RELEASE:=		2
 PKG_HASH:=		2090201e1a3ff32846f4fe421c1163b15f440bb38e31355d09f82d3949922af7
 PKG_DESCR:=		system call trace program
 PKG_SECTION:=		app/debug
@@ -33,6 +33,7 @@ ifeq ($(ADK_TARGET_USE_STATIC_LIBS_ONLY),y)
 TARGET_LDFLAGS+=	-pthread
 endif
 
+AUTOTOOL_STYLE:=	autoreconf
 CONFIGURE_ARGS+=	--enable-mpers=check
 INSTALL_STYLE:=		manual
 
diff --git a/package/strace/patches/riscv32.patch b/package/strace/patches/riscv32.patch
new file mode 100644
index 000000000..b3492845b
--- /dev/null
+++ b/package/strace/patches/riscv32.patch
@@ -0,0 +1,282 @@
+# --- T2-COPYRIGHT-NOTE-BEGIN ---
+# T2 SDE: package/*/strace/riscv32.patch
+# Copyright (C) 2021 - 2022 The T2 SDE Project
+# 
+# This Copyright note is generated by scripts/Create-CopyPatch,
+# more information can be found in the files COPYING and README.
+# 
+# This patch file is dual-licensed. It is available under the license the
+# patched project is licensed under, as long as it is an OpenSource license
+# as defined at http://www.opensource.org/ (e.g. BSD, X11) or under the terms
+# of the GNU General Public License version 2 as used by the T2 SDE.
+# --- T2-COPYRIGHT-NOTE-END ---
+
+Signed-off-by: Alistair Francis <alistair.francis at wdc.com>
+---
+ Makefile.am                                 | 20 ++++++++--------
+ configure.ac                                |  6 ++++-
+ dist/INSTALL                                |  2 +-
+ src/linux/{riscv64 => riscv}/arch_defs_.h       | 16 +++++++++++++
+ src/linux/{riscv64 => riscv}/arch_regs.c        |  0
+ src/linux/riscv/asm_stat.h                      | 26 +++++++++++++++++++++
+ src/linux/{riscv64 => riscv}/get_error.c        |  0
+ src/linux/{riscv64 => riscv}/get_scno.c         |  0
+ src/linux/{riscv64 => riscv}/get_syscall_args.c |  0
+ src/linux/{riscv64 => riscv}/ioctls_arch0.h     |  0
+ src/linux/riscv/ioctls_inc0.h                   |  7 ++++++
+ src/linux/{riscv64 => riscv}/raw_syscall.h      |  0
+ src/linux/{riscv64 => riscv}/set_error.c        |  0
+ src/linux/{riscv64 => riscv}/set_scno.c         |  0
+ src/linux/{riscv64 => riscv}/syscallent.h       |  8 ++++++-
+ src/linux/riscv64/ioctls_inc0.h                 |  1 -
+ src/riscv.c                                     |  4 ++--
+ 17 files changed, 74 insertions(+), 16 deletions(-)
+ create mode 100644 src/linux/riscv/arch_defs_.h
+ rename src/linux/{riscv64 => src/riscv}/arch_regs.c (100%)
+ create mode 100644 src/linux/riscv/asm_stat.h
+ rename src/linux/{riscv64 => src/riscv}/get_error.c (100%)
+ rename src/linux/{riscv64 => src/riscv}/get_scno.c (100%)
+ rename src/linux/{riscv64 => src/riscv}/get_syscall_args.c (100%)
+ rename src/linux/{riscv64 => src/riscv}/ioctls_arch0.h (100%)
+ create mode 100644 src/linux/riscv/ioctls_inc0.h
+ rename src/linux/{riscv64 => src/riscv}/raw_syscall.h (100%)
+ rename src/linux/{riscv64 => src/riscv}/set_error.c (100%)
+ rename src/linux/{riscv64 => src/riscv}/set_scno.c (100%)
+ rename src/linux/{riscv64 => src/riscv}/syscallent.h (64%)
+ delete mode 100644 src/linux/riscv64/ioctls_inc0.h
+
+diff --git a/Makefile.am b/Makefile.am
+index 9c62218f..4955654b 100644
+--- a/src/Makefile.am
++++ b/src/Makefile.am
+@@ -802,19 +802,19 @@ extrA_DIST =
+ 	linux/powerpc64le/set_scno.c	\
+ 	linux/powerpc64le/syscallent.h	\
+ 	linux/powerpc64le/userent.h	\
+-	linux/riscv64/arch_defs_.h		\
+-	linux/riscv64/arch_prstatus_regset.c \
+-	linux/riscv64/arch_prstatus_regset.h \
+-	linux/riscv64/arch_regs.c		\
+-	linux/riscv64/get_error.c		\
+-	linux/riscv64/get_scno.c		\
+-	linux/riscv64/get_syscall_args.c	\
+-	linux/riscv64/ioctls_arch0.h	\
+-	linux/riscv64/ioctls_inc0.h	\
+-	linux/riscv64/raw_syscall.h	\
+-	linux/riscv64/set_error.c		\
+-	linux/riscv64/set_scno.c		\
+-	linux/riscv64/syscallent.h	\
++	linux/riscv/arch_defs_.h		\
++	linux/riscv/arch_prstatus_regset.c \
++	linux/riscv/arch_prstatus_regset.h \
++	linux/riscv/arch_regs.c		\
++	linux/riscv/get_error.c		\
++	linux/riscv/get_scno.c		\
++	linux/riscv/get_syscall_args.c	\
++	linux/riscv/ioctls_arch0.h	\
++	linux/riscv/ioctls_inc0.h	\
++	linux/riscv/raw_syscall.h	\
++	linux/riscv/set_error.c		\
++	linux/riscv/set_scno.c		\
++	linux/riscv/syscallent.h	\
+ 	linux/s390/arch_defs_.h		\
+ 	linux/s390/arch_prstatus_regset.c \
+ 	linux/s390/arch_prstatus_regset.h \
+diff --git a/configure.ac b/configure.ac
+index dd4f13f4..4a53681c 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -157,9 +157,12 @@
+ 		esac
+ 	fi
+ 	;;
++riscv32*)
++	arch=riscv
++	AC_DEFINE([RISCV32], 1, [Define for the RISC-V 32-bit architecture])
++	;;
+ riscv64*)
+-	arch=riscv64
+-	karch=riscv
++	arch=riscv
+ 	AC_DEFINE([RISCV64], 1, [Define for the RISC-V 64-bit architecture])
+ 	;;
+ s390)
+diff --git a/dist/INSTALL b/dist/INSTALL
+index 0d22512b..19e059cf 100644
+--- a/INSTALL
++++ b/INSTALL
+@@ -63,7 +63,7 @@ Taking the aforementioned into account, there are the following requirements:
+ 
+  - gawk (at least version 3)
+  - Ability to compile for m32 personality (on architectures where it is supported)
+-  - On x86_64, x32, powerpc64, sparc64, riscv64, tile64: gcc -m32
++  - On x86_64, x32, powerpc64, sparc64, riscv32, riscv64, tile64: gcc -m32
+   - s390x: gcc -m31
+   - AArch64: a separate compiler for armv7 EABI
+    - See information about configuration in "1.3.2. AArch64: AArch32 support"
+diff --git a/src/linux/riscv64/arch_defs_.h b/src/linux/riscv/arch_defs_.h
+similarity index 20%
+rename from src/linux/riscv64/arch_defs_.h
+rename to src/linux/riscv/arch_defs_.h
+index 0d22512b..19e059cf 100644
+--- a/src/linux/riscv64/arch_defs_.h
++++ b/src/linux/riscv/arch_defs_.h
+@@ -1 +1,8 @@
+-#define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_RISCV64, 0 }
++#if defined(RISCV32)
++# define ARCH_TIMESIZE 64
++# define HAVE_ARCH_TIME32_SYSCALLS 0
++# define HAVE_ARCH_OLD_TIME64_SYSCALLS 0
++# define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_RISCV32, 0 }
++#else
++# define PERSONALITY0_AUDIT_ARCH { AUDIT_ARCH_RISCV64, 0 }
++#endif
+diff --git a/src/linux/riscv64/arch_regs.c b/src/linux/riscv/arch_regs.c
+similarity index 100%
+rename from src/linux/riscv64/arch_regs.c
+rename to src/linux/riscv/arch_regs.c
+diff --git a/src/linux/riscv/asm_stat.h b/src/linux/riscv/asm_stat.h
+new file mode 100644
+index 00000000..73341454
+--- /dev/null
++++ b/src/linux/riscv/asm_stat.h
+@@ -0,0 +1,26 @@
++/*
++ * Copyright (c) 2020 The strace developers.
++ * All rights reserved.
++ *
++ * SPDX-License-Identifier: LGPL-2.1-or-later
++ */
++
++#ifndef STRACE_RISCV_ASM_STAT_H
++# define STRACE_RISCV_ASM_STAT_H
++
++# include "linux/generic/asm_stat.h"
++
++# if defined(RISCV32)
++#  undef dev_t
++#  undef ino_t
++#  undef off64_t
++#  undef off_t
++#  undef time_t
++
++#  define dev_t		__kernel_loff_t
++#  define ino_t		__kernel_loff_t
++#  define off64_t	__kernel_off64_t
++#  define off_t		__kernel_off64_t
++#  define time_t	__kernel_time64_t
++# endif /* defined(RISCV32) */
++#endif /* !STRACE_RISCV_ASM_STAT_H */
+diff --git a/src/linux/riscv64/arch_prstatus_regset.h b/src/linux/riscv/arch_prstatus_regset.h
+similarity index 100%
+rename from src/linux/riscv64/arch_prstatus_regset.h
+rename to src/linux/riscv/arch_prstatus_regset.h
+diff --git a/src/linux/riscv64/arch_prstatus_regset.c b/src/linux/riscv/arch_prstatus_regset.c
+similarity index 100%
+rename from src/linux/riscv64/arch_prstatus_regset.c
+rename to src/linux/riscv/arch_prstatus_regset.c
+diff --git a/src/linux/riscv64/get_error.c b/src/linux/riscv/get_error.c
+similarity index 100%
+rename from src/linux/riscv64/get_error.c
+rename to src/linux/riscv/get_error.c
+diff --git a/src/linux/riscv64/get_scno.c b/src/linux/riscv/get_scno.c
+similarity index 100%
+rename from src/linux/riscv64/get_scno.c
+rename to src/linux/riscv/get_scno.c
+diff --git a/src/linux/riscv64/get_syscall_args.c b/src/linux/riscv/get_syscall_args.c
+similarity index 100%
+rename from src/linux/riscv64/get_syscall_args.c
+rename to src/linux/riscv/get_syscall_args.c
+diff --git a/src/linux/riscv64/ioctls_arch0.h b/src/linux/riscv/ioctls_arch0.h
+similarity index 100%
+rename from src/linux/riscv64/ioctls_arch0.h
+rename to src/linux/riscv/ioctls_arch0.h
+diff --git a/src/linux/riscv/ioctls_inc0.h b/src/linux/riscv/ioctls_inc0.h
+new file mode 100644
+index 00000000..cc39332f
+--- /dev/null
++++ b/src/linux/riscv/ioctls_inc0.h
+@@ -0,0 +1,7 @@
++#if defined(RISCV64)
++# include "../64/ioctls_inc.h"
++#elif defined(RISCV32)
++# include "../32/ioctls_inc.h"
++#else
++# error "Unsupported RISC-V xlen"
++#endif
+diff --git a/src/linux/riscv64/raw_syscall.h b/src/linux/riscv/raw_syscall.h
+similarity index 100%
+rename from src/linux/riscv64/raw_syscall.h
+rename to src/linux/riscv/raw_syscall.h
+diff --git a/src/linux/riscv64/set_error.c b/src/linux/riscv/set_error.c
+similarity index 100%
+rename from src/linux/riscv64/set_error.c
+rename to src/linux/riscv/set_error.c
+diff --git a/src/linux/riscv64/set_scno.c b/src/linux/riscv/set_scno.c
+similarity index 100%
+rename from src/linux/riscv64/set_scno.c
+rename to src/linux/riscv/set_scno.c
+diff --git a/src/linux/riscv64/syscallent.h b/src/linux/riscv/syscallent.h
+similarity index 64%
+rename from src/linux/riscv64/syscallent.h
+rename to src/linux/riscv/syscallent.h
+index 60c6ce58..c8fb3b8f 100644
+--- a/src/linux/riscv64/syscallent.h
++++ b/src/linux/riscv/syscallent.h
+@@ -5,7 +5,13 @@
+  * SPDX-License-Identifier: LGPL-2.1-or-later
+  */
+ 
+-#include "../64/syscallent.h"
++#if defined(RISCV64)
++# include "../64/syscallent.h"
++#elif defined(RISCV32)
++# include "../32/syscallent.h"
++#else
++# error "Unsupported RISC-V xlen"
++#endif
+ 
+ /* #define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15) */
+ [259] = { 3,	TM,		SEN(riscv_flush_icache),	"riscv_flush_icache"	},
+diff --git a/src/linux/riscv64/ioctls_inc0.h b/src/linux/riscv64/ioctls_inc0.h
+deleted file mode 100644
+index f9939faa..00000000
+--- a/src/linux/riscv64/ioctls_inc0.h
++++ /dev/null
+@@ -1 +0,0 @@
+-#include "../64/ioctls_inc.h"
+diff --git a/riscv.c b/riscv.c
+index 825eb293..20094ba5 100644
+--- a/src/riscv.c
++++ b/src/riscv.c
+@@ -9,7 +9,7 @@
+ 
+ #include "defs.h"
+ 
+-#ifdef RISCV64
++#if defined(RISCV64) || defined(RISCV32)
+ 
+ # include "xlat/riscv_flush_icache_flags.h"
+ 
+@@ -30,4 +30,4 @@ SYS_FUNC(riscv_flush_icache)
+ 	return RVAL_DECODED;
+ }
+ 
+-#endif /* RISCV64 */
++#endif /* defined(RISCV64) || defined(RISCV32) */
+-- 
+2.25.0
+
+--- strace-5.10/src/config.h.in.vanilla	2021-02-13 16:11:28.950662094 +0100
++++ strace-5.10/src/config.h.in	2021-02-13 16:12:01.681663752 +0100
+@@ -3776,6 +3779,9 @@
+ /* Define for the little endian PowerPC64 architecture. */
+ #undef POWERPC64LE
+ 
++/* Define for the RISC-V 32-bit architecture */
++#undef RISCV32
++
+ /* Define for the RISC-V 64-bit architecture */
+ #undef RISCV64
+ 
+