sh: add support for numato mimas v2

6 files changed, 2081 insertions, 0 deletions

diff --git a/target/config/Config.in.endian b/target/config/Config.in.endian
index e69d018a8..599f878f9 100644
--- a/target/config/Config.in.endian
+++ b/target/config/Config.in.endian
@@ -16,6 +16,7 @@ depends on ADK_TARGET_ARCH_ARC \
 
 config ADK_TARGET_LITTLE_ENDIAN
 	bool "Little endian"
+	depends on !ADK_TARGET_SYSTEM_NUMATO_MIMASV2
 	depends on !ADK_TARGET_SYSTEM_DRAGINO_MS14S
 	depends on !ADK_TARGET_SYSTEM_LINKSYS_NSLU2
 	depends on !ADK_TARGET_SYSTEM_MIKROTIK_RB4XX
diff --git a/target/config/Config.in.target b/target/config/Config.in.target
index 3c9512b3a..3c396f37e 100644
--- a/target/config/Config.in.target
+++ b/target/config/Config.in.target
@@ -23,6 +23,7 @@ config ADK_TARGET_ROOTFS_INITRAMFS
 		ADK_TARGET_ARCH_MICROBLAZE || \
 		ADK_TARGET_ARCH_MIPS || \
 		ADK_TARGET_ARCH_PPC || \
+		ADK_TARGET_ARCH_SH || \
 		ADK_TARGET_ARCH_SPARC || \
 		ADK_TARGET_ARCH_X86 || \
 		ADK_TARGET_ARCH_X86_64
@@ -46,6 +47,7 @@ config ADK_TARGET_ROOTFS_INITRAMFSPIGGYBACK
 		ADK_TARGET_ARCH_MICROBLAZE || \
 		ADK_TARGET_ARCH_MIPS || \
 		ADK_TARGET_ARCH_PPC || \
+		ADK_TARGET_ARCH_SH || \
 		ADK_TARGET_ARCH_SPARC || \
 		ADK_TARGET_ARCH_X86 || \
 		ADK_TARGET_ARCH_X86_64
diff --git a/target/linux/patches/4.1.13/j2-core.patch b/target/linux/patches/4.1.13/j2-core.patch
new file mode 100644
index 000000000..38136df2c
--- /dev/null
+++ b/target/linux/patches/4.1.13/j2-core.patch
@@ -0,0 +1,2060 @@
+diff -Nur linux-4.1.13.orig/arch/sh/Kconfig linux-4.1.13/arch/sh/Kconfig
+--- linux-4.1.13.orig/arch/sh/Kconfig	2015-11-09 23:34:10.000000000 +0100
++++ linux-4.1.13/arch/sh/Kconfig	2015-12-05 00:16:48.000000000 +0100
+@@ -66,7 +66,7 @@
+ 	select HAVE_MIXED_BREAKPOINTS_REGS
+ 	select PERF_EVENTS
+ 	select ARCH_HIBERNATION_POSSIBLE if MMU
+-	select SPARSE_IRQ
++	select SPARSE_IRQ if !CPU_SUBTYPE_0PF
+ 	select HAVE_CC_STACKPROTECTOR
+ 
+ config SUPERH64
+@@ -108,6 +108,9 @@
+ config ARCH_HIBERNATION_POSSIBLE
+ 	def_bool n
+ 
++config ARCH_USES_GETTIMEOFFSET
++	def_bool n
++
+ config SYS_SUPPORTS_APM_EMULATION
+ 	bool
+ 	select ARCH_SUSPEND_POSSIBLE
+@@ -184,6 +187,11 @@
+ 	select CPU_SH2
+ 	select UNCACHED_MAPPING
+ 
++config CPU_SH2J
++	bool
++	select CPU_SH2
++	select ARCH_USES_GETTIMEOFFSET
++
+ config CPU_SH3
+ 	bool
+ 	select CPU_HAS_INTEVT
+@@ -303,6 +311,12 @@
+ 	help
+ 	  Select MX-G if running on an R8A03022BG part.
+ 
++# SH-2J Processor Support
++
++config CPU_SUBTYPE_0PF
++	bool "Support 0PF J2 SoftCore"
++	select CPU_SH2J
++
+ # SH-3 Processor Support
+ 
+ config CPU_SUBTYPE_SH7705
+@@ -753,6 +767,7 @@
+ 				SH_7751_SOLUTION_ENGINE
+ 	default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
+ 	default "0x00002000" if PAGE_SIZE_8KB
++	default "0x0003F000" if CPU_SUBTYPE_0PF
+ 	default "0x00001000"
+ 	help
+ 	  This sets the default offset of zero page.
+diff -Nur linux-4.1.13.orig/arch/sh/Makefile linux-4.1.13/arch/sh/Makefile
+--- linux-4.1.13.orig/arch/sh/Makefile	2015-11-09 23:34:10.000000000 +0100
++++ linux-4.1.13/arch/sh/Makefile	2015-12-05 00:16:48.000000000 +0100
+@@ -4,6 +4,7 @@
+ # Copyright (C) 1999  Kaz Kojima
+ # Copyright (C) 2002 - 2008  Paul Mundt
+ # Copyright (C) 2002  M. R. Brown
++# Copyright (C) 2012  SEI, Inc. (sh2j)
+ #
+ # This file is subject to the terms and conditions of the GNU General Public
+ # License.  See the file "COPYING" in the main directory of this archive
+@@ -19,6 +20,7 @@
+ isa-$(CONFIG_SH_DSP)			:= sh
+ isa-$(CONFIG_CPU_SH2)			:= sh2
+ isa-$(CONFIG_CPU_SH2A)			:= sh2a
++isa-$(CONFIG_CPU_SH2J)			:= sh2j
+ isa-$(CONFIG_CPU_SH3)			:= sh3
+ isa-$(CONFIG_CPU_SH4)			:= sh4
+ isa-$(CONFIG_CPU_SH4A)			:= sh4a
+@@ -31,6 +33,8 @@
+ endif
+ 
+ cflags-$(CONFIG_CPU_SH2)		:= $(call cc-option,-m2,)
++cflags-$(CONFIG_CPU_SH2J)		:= $(call cc-option,-m2,) \
++					   $(call cc-option,-melf,)
+ cflags-$(CONFIG_CPU_SH2A)		+= $(call cc-option,-m2a,) \
+ 					   $(call cc-option,-m2a-nofpu,) \
+ 					   $(call cc-option,-m4-nofpu,)
+@@ -91,6 +95,7 @@
+ defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE)	:= uImage
+ defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE)	:= vmlinux
+ defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE)	:= vmlinux
++defaultimage-$(CONFIG_SH_0PF)			:= vmlinux
+ 
+ # Set some sensible Kbuild defaults
+ KBUILD_IMAGE		:= $(defaultimage-y)
+@@ -173,6 +178,7 @@
+ # As an example, in order of preference, SH-2A > SH-2 > common definitions.
+ #
+ cpuincdir-$(CONFIG_CPU_SH2A)	+= cpu-sh2a
++cpuincdir-$(CONFIG_CPU_SH2J)	+= cpu-sh2j
+ cpuincdir-$(CONFIG_CPU_SH2)	+= cpu-sh2
+ cpuincdir-$(CONFIG_CPU_SH3)	+= cpu-sh3
+ cpuincdir-$(CONFIG_CPU_SH4A)	+= cpu-sh4a
+diff -Nur linux-4.1.13.orig/arch/sh/boards/Kconfig linux-4.1.13/arch/sh/boards/Kconfig
+--- linux-4.1.13.orig/arch/sh/boards/Kconfig	2015-11-09 23:34:10.000000000 +0100
++++ linux-4.1.13/arch/sh/boards/Kconfig	2015-12-05 00:16:48.000000000 +0100
+@@ -90,6 +90,13 @@
+ 	  Select 7343 SolutionEngine if configuring for a Hitachi
+ 	  SH7343 (SH-Mobile 3AS) evaluation board.
+ 
++config 0PF_FPGA
++	bool "0PF FPGA"
++	depends on CPU_SUBTYPE_0PF
++	help
++	  Select 0PF_FPGA if you are configuring for an FPGA with
++	  the SH2j-workalike SoftCore from http://0pf.org
++
+ config SH_HP6XX
+ 	bool "HP6XX"
+ 	select SYS_SUPPORTS_APM_EMULATION
+diff -Nur linux-4.1.13.orig/arch/sh/boards/Makefile linux-4.1.13/arch/sh/boards/Makefile
+--- linux-4.1.13.orig/arch/sh/boards/Makefile	2015-11-09 23:34:10.000000000 +0100
++++ linux-4.1.13/arch/sh/boards/Makefile	2015-12-05 00:16:48.000000000 +0100
+@@ -15,3 +15,4 @@
+ obj-$(CONFIG_SH_SH7757LCR)	+= board-sh7757lcr.o
+ obj-$(CONFIG_SH_APSH4A3A)	+= board-apsh4a3a.o
+ obj-$(CONFIG_SH_APSH4AD0A)	+= board-apsh4ad0a.o
++obj-$(CONFIG_0PF_FPGA)		+= board-0pf.o
+diff -Nur linux-4.1.13.orig/arch/sh/boards/board-0pf.c linux-4.1.13/arch/sh/boards/board-0pf.c
+--- linux-4.1.13.orig/arch/sh/boards/board-0pf.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-4.1.13/arch/sh/boards/board-0pf.c	2015-12-05 00:16:48.000000000 +0100
+@@ -0,0 +1,270 @@
++/*
++ * board-0pf.c
++ *
++ * Copyright (C) 2006 Yoshinori Sato
++ * Copyright (C) 2009 D. Jeff Dionne
++ *
++ * 0PF j-series CPU on FPGA
++ */
++#include <linux/platform_device.h>
++#include <linux/sched.h>
++#include <linux/kernel.h>
++#include <linux/param.h>
++#include <linux/interrupt.h>
++#include <linux/profile.h>
++#include <linux/init.h>
++#include <linux/irq.h>
++#include <linux/device.h>
++#include <linux/module.h>
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/rtc.h>
++#include <asm/machvec.h>
++#include <asm/board-0pf.h>
++
++int shj_irq_demux(int irq)
++{
++	return irq;		/* punt.. */
++}
++
++static void shj_ack_noop(struct irq_data *data)
++{
++	asm("nop;nop");
++	/* Dummy function.  */
++}
++
++static inline void shj_enable_irq(struct irq_data *data)
++{
++	unsigned int irq = data->irq;
++	volatile unsigned int vui;
++
++//	printk("%s: IRQ %d (0x%x)\n", __func__, irq, irq);
++
++	switch (irq) {
++	case PIT_IRQ:
++		//AQ_PIO = 0x0BB;
++		/* enable, lvl 2, vector 64 */
++		AQ_SYS = (1 << 26) |	/* enable PIT */
++		    (0x02 << 20) |	/* interrupt level 2 */
++		    (PIT_IRQ << 12) |	/* vector 64 */
++		    1;		/* turn off interval timer */
++		break;
++
++	case Irq_UART0:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_UART0, 0xf);	/* clear old setting */
++		vui |= ID2Pri(EIrqID_UART0, 0x7);	/* set interrupt level */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_UART1:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_UART1, 0xf);	/* clear old setting */
++		vui |= ID2Pri(EIrqID_UART1, 0x7);	/* set interrupt level */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_GPS:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_GPS, 0xf);	/* clear old setting */
++		vui |= ID2Pri(EIrqID_GPS, 0x7);	/* set interrupt level */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_I2C:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_I2C, 0xf);	/* clear old setting */
++		vui |= ID2Pri(EIrqID_I2C, 0x7);	/* set interrupt level */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_EMAC:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_EMAC, 0xf);	/* clear old setting */
++		vui |= ID2Pri(EIrqID_EMAC, 0x8);	/* set interrupt level */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		printk("EMAC prio is: %x\n", vui);
++		break;
++
++        case Irq_GPIO:
++                vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++                vui &= ~ID2Pri(EIrqID_GPIO, 0xf);       /* clear old setting */
++                vui |= ID2Pri(EIrqID_GPIO, 0x7);        /* set interrupt level */
++                *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++                break;
++
++        case Irq_1PPS: // prio is higher for 1PPS porposes
++                vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++                vui &= ~ID2Pri(EIrqID_1PPS, 0xf);       /* clear old setting */
++                vui |= ID2Pri(EIrqID_1PPS, 0x9);        /* set interrupt level */
++                *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++                printk("1PPS prio is: %x\n", vui);
++                break;
++
++	default:
++		break;
++
++	}
++}
++
++static inline void shj_disable_irq(struct irq_data *data)
++{
++	volatile unsigned int vui;
++	unsigned int irq = data->irq;
++
++	printk("%s: IRQ %d\n", __func__, irq);
++
++	switch (irq) {
++	case PIT_IRQ:
++		/* enable, lvl 2, vector 64 */
++		AQ_SYS = (0 << 26) |	/* disable PIT */
++		    (0x02 << 20) |	/* interrupt level 2 */
++		    (PIT_IRQ << 12) |	/* vector 64 */
++		    1;		/* turn off interval timer */
++		break;
++
++	case Irq_UART0:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_UART0, 0xf);	/* clear setting */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_UART1:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_UART1, 0xf);	/* clear setting */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_GPS:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_GPS, 0xf);	/* clear setting */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_I2C:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_I2C, 0xf);	/* clear setting */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++	case Irq_EMAC:
++		vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++		vui &= ~ID2Pri(EIrqID_EMAC, 0xf);	/* clear setting */
++		*(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++		break;
++
++        case Irq_GPIO:
++                vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++                vui &= ~ID2Pri(EIrqID_GPIO, 0xf);       /* clear setting */
++                *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++                break;
++
++        case Irq_1PPS:
++                vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri);
++                vui &= ~ID2Pri(EIrqID_1PPS, 0xf);       /* clear setting */
++                *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui;
++                break;
++
++	default:
++		break;
++	}
++}
++
++static struct irq_chip shj_irq_chip = {
++	.name = "0PF_INTC",
++	.irq_enable = shj_enable_irq,
++	.irq_disable = shj_disable_irq,
++	.irq_ack = shj_ack_noop,
++};
++
++static void __init shj_irq_init(void)
++{
++	int c;
++
++	printk(KERN_INFO "0PF FPGA interrupt controller...\n");
++
++	for (c = 0; c < NR_IRQS; c++) {
++		//irq_desc[c].action = NULL;
++		//irq_desc[c].depth = 1;
++		irq_set_chip_and_handler_name(c, &shj_irq_chip,
++					      handle_simple_irq, "simple");
++	}
++}
++
++#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
++// Commit 7b1f62076 switched this to a pointer
++/*
++ * Should return nanoseconds since last timer tick
++ */
++u32 shj_gettimeoffset(void)
++{
++	u32 clocks_counter = readl(SHJ_PIT_PCNTR);
++
++	return clocks_counter * readl(SHJ_NSEC_PER_CLOCK);
++}
++
++static void __init shj_board_setup(char **cmdline)
++{
++	arch_gettimeoffset = shj_gettimeoffset;
++}
++#else
++#define shj_gettimeoffset 0
++#endif
++
++static struct sh_machine_vector mv_se __initmv = {
++	.mv_name = "0PF_FPGA",
++	//.mv_nr_irqs = 256,
++	.mv_irq_demux = shj_irq_demux,
++	.mv_init_irq = shj_irq_init,
++	.mv_setup = shj_board_setup,
++};
++
++static irqreturn_t timer_interrupt(int irq, void *dev_id)
++{
++	// AQ_PIO = 0x011; // GREEN
++
++	if (current->pid)
++		profile_tick(CPU_PROFILING);
++
++	xtime_update(1);
++	update_process_times(user_mode(get_irq_regs()));
++
++	return IRQ_HANDLED;
++}
++
++static void __init start_pit(void)
++{
++	if (request_irq
++	    (PIT_IRQ, timer_interrupt, IRQF_TIMER, "pit", NULL))
++		printk("irq_desc[%p] : fail to register\n", &irq_desc[PIT_IRQ]);
++
++	irq_set_chip_and_handler_name(PIT_IRQ, &shj_irq_chip, handle_edge_irq,
++				      "pit");
++}
++
++static int __init shj_initialise(void)
++{
++	struct irq_data *data;
++
++	pr_info("0PF Machine setup...\n");
++
++	start_pit();
++
++	data = irq_get_irq_data(Irq_UART0);
++	shj_enable_irq(data);
++
++	data = irq_get_irq_data(Irq_UART1);
++	shj_enable_irq(data);
++
++	data = irq_get_irq_data(Irq_EMAC);
++	shj_enable_irq(data);
++
++	data = irq_get_irq_data(PIT_IRQ);
++	shj_enable_irq(data);
++
++	pr_info("0PF Machine setup done.\n");
++
++	return 0;
++}
++
++arch_initcall(shj_initialise);
+diff -Nur linux-4.1.13.orig/arch/sh/configs/0pf_defconfig linux-4.1.13/arch/sh/configs/0pf_defconfig
+--- linux-4.1.13.orig/arch/sh/configs/0pf_defconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-4.1.13/arch/sh/configs/0pf_defconfig	2015-12-05 00:16:48.000000000 +0100
+@@ -0,0 +1,945 @@
++#
++# Automatically generated file; DO NOT EDIT.
++# Linux/sh 4.1.0-rc6 Kernel Configuration
++#
++CONFIG_SUPERH=y
++CONFIG_SUPERH32=y
++# CONFIG_SUPERH64 is not set
++CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_BUG=y
++CONFIG_GENERIC_HWEIGHT=y
++# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
++# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
++CONFIG_ARCH_USES_GETTIMEOFFSET=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_NO_IOPORT_MAP=y
++CONFIG_DMA_NONCOHERENT=y
++CONFIG_NEED_DMA_MAP_STATE=y
++CONFIG_NEED_SG_DMA_LENGTH=y
++CONFIG_PGTABLE_LEVELS=2
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_IRQ_WORK=y
++
++#
++# General setup
++#
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_CROSS_COMPILE=""
++# CONFIG_COMPILE_TEST is not set
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_HAVE_KERNEL_GZIP=y
++CONFIG_HAVE_KERNEL_BZIP2=y
++CONFIG_HAVE_KERNEL_LZMA=y
++CONFIG_HAVE_KERNEL_XZ=y
++CONFIG_HAVE_KERNEL_LZO=y
++CONFIG_KERNEL_GZIP=y
++# CONFIG_KERNEL_BZIP2 is not set
++# CONFIG_KERNEL_LZMA is not set
++# CONFIG_KERNEL_XZ is not set
++# CONFIG_KERNEL_LZO is not set
++CONFIG_DEFAULT_HOSTNAME="(none)"
++# CONFIG_SYSVIPC is not set
++# CONFIG_FHANDLE is not set
++# CONFIG_USELIB is not set
++CONFIG_HAVE_ARCH_AUDITSYSCALL=y
++
++#
++# IRQ subsystem
++#
++CONFIG_MAY_HAVE_SPARSE_IRQ=y
++CONFIG_GENERIC_IRQ_SHOW=y
++CONFIG_IRQ_DOMAIN=y
++CONFIG_IRQ_FORCED_THREADING=y
++# CONFIG_SPARSE_IRQ is not set
++CONFIG_GENERIC_CLOCKEVENTS=y
++
++#
++# Timers subsystem
++#
++CONFIG_HZ_PERIODIC=y
++
++#
++# CPU/Task time and stats accounting
++#
++CONFIG_TICK_CPU_ACCOUNTING=y
++# CONFIG_BSD_PROCESS_ACCT is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_TINY_RCU=y
++CONFIG_SRCU=y
++# CONFIG_TASKS_RCU is not set
++# CONFIG_RCU_STALL_COMMON is not set
++# CONFIG_TREE_RCU_TRACE is not set
++CONFIG_RCU_KTHREAD_PRIO=0
++# CONFIG_RCU_EXPEDITE_BOOT is not set
++# CONFIG_BUILD_BIN2C is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=17
++# CONFIG_CGROUPS is not set
++# CONFIG_CHECKPOINT_RESTORE is not set
++CONFIG_NAMESPACES=y
++# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_SCHED_AUTOGROUP is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE="initrd/root-dev initrd/root-files"
++CONFIG_INITRAMFS_ROOT_UID=0
++CONFIG_INITRAMFS_ROOT_GID=0
++# CONFIG_RD_GZIP is not set
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_XZ is not set
++# CONFIG_RD_LZO is not set
++# CONFIG_RD_LZ4 is not set
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++CONFIG_HAVE_UID16=y
++# CONFIG_EXPERT is not set
++CONFIG_UID16=y
++CONFIG_MULTIUSER=y
++CONFIG_SGETMASK_SYSCALL=y
++CONFIG_SYSFS_SYSCALL=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++# CONFIG_BPF_SYSCALL is not set
++CONFIG_AIO=y
++CONFIG_ADVISE_SYSCALLS=y
++# CONFIG_EMBEDDED is not set
++CONFIG_HAVE_PERF_EVENTS=y
++CONFIG_PERF_USE_VMALLOC=y
++
++#
++# Kernel Performance Events And Counters
++#
++CONFIG_PERF_EVENTS=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLUB_DEBUG=y
++# CONFIG_COMPAT_BRK is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_PROFILING is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_UPROBES is not set
++# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_ARCH_TRACEHOOK=y
++CONFIG_HAVE_DMA_ATTRS=y
++CONFIG_GENERIC_SMP_IDLE_THREAD=y
++CONFIG_GENERIC_IDLE_POLL_SETUP=y
++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
++CONFIG_HAVE_CLK=y
++CONFIG_HAVE_DMA_API_DEBUG=y
++CONFIG_HAVE_HW_BREAKPOINT=y
++CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
++CONFIG_HAVE_CC_STACKPROTECTOR=y
++# CONFIG_CC_STACKPROTECTOR is not set
++CONFIG_CC_STACKPROTECTOR_NONE=y
++# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
++# CONFIG_CC_STACKPROTECTOR_STRONG is not set
++CONFIG_MODULES_USE_ELF_RELA=y
++CONFIG_OLD_SIGSUSPEND=y
++CONFIG_OLD_SIGACTION=y
++
++#
++# GCOV-based kernel profiling
++#
++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++# CONFIG_MODULES is not set
++CONFIG_BLOCK=y
++# CONFIG_LBDAF is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_BSGLIB is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++# CONFIG_BLK_CMDLINE_PARSER is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_EFI_PARTITION=y
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_DEFAULT_NOOP=y
++CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
++CONFIG_INLINE_READ_UNLOCK=y
++CONFIG_INLINE_READ_UNLOCK_IRQ=y
++CONFIG_INLINE_WRITE_UNLOCK=y
++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
++# CONFIG_FREEZER is not set
++
++#
++# System type
++#
++CONFIG_CPU_SH2=y
++CONFIG_CPU_SH2J=y
++# CONFIG_CPU_SUBTYPE_SH7619 is not set
++# CONFIG_CPU_SUBTYPE_SH7201 is not set
++# CONFIG_CPU_SUBTYPE_SH7203 is not set
++# CONFIG_CPU_SUBTYPE_SH7206 is not set
++# CONFIG_CPU_SUBTYPE_SH7263 is not set
++# CONFIG_CPU_SUBTYPE_SH7264 is not set
++# CONFIG_CPU_SUBTYPE_SH7269 is not set
++# CONFIG_CPU_SUBTYPE_MXG is not set
++CONFIG_CPU_SUBTYPE_0PF=y
++# CONFIG_CPU_SUBTYPE_SH7705 is not set
++# CONFIG_CPU_SUBTYPE_SH7706 is not set
++# CONFIG_CPU_SUBTYPE_SH7707 is not set
++# CONFIG_CPU_SUBTYPE_SH7708 is not set
++# CONFIG_CPU_SUBTYPE_SH7709 is not set
++# CONFIG_CPU_SUBTYPE_SH7710 is not set
++# CONFIG_CPU_SUBTYPE_SH7712 is not set
++# CONFIG_CPU_SUBTYPE_SH7720 is not set
++# CONFIG_CPU_SUBTYPE_SH7721 is not set
++# CONFIG_CPU_SUBTYPE_SH7750 is not set
++# CONFIG_CPU_SUBTYPE_SH7091 is not set
++# CONFIG_CPU_SUBTYPE_SH7750R is not set
++# CONFIG_CPU_SUBTYPE_SH7750S is not set
++# CONFIG_CPU_SUBTYPE_SH7751 is not set
++# CONFIG_CPU_SUBTYPE_SH7751R is not set
++# CONFIG_CPU_SUBTYPE_SH7760 is not set
++# CONFIG_CPU_SUBTYPE_SH4_202 is not set
++# CONFIG_CPU_SUBTYPE_SH7723 is not set
++# CONFIG_CPU_SUBTYPE_SH7724 is not set
++# CONFIG_CPU_SUBTYPE_SH7734 is not set
++# CONFIG_CPU_SUBTYPE_SH7757 is not set
++# CONFIG_CPU_SUBTYPE_SH7763 is not set
++# CONFIG_CPU_SUBTYPE_SH7770 is not set
++# CONFIG_CPU_SUBTYPE_SH7780 is not set
++# CONFIG_CPU_SUBTYPE_SH7785 is not set
++# CONFIG_CPU_SUBTYPE_SH7786 is not set
++# CONFIG_CPU_SUBTYPE_SHX3 is not set
++# CONFIG_CPU_SUBTYPE_SH7343 is not set
++# CONFIG_CPU_SUBTYPE_SH7722 is not set
++# CONFIG_CPU_SUBTYPE_SH7366 is not set
++
++#
++# Memory management options
++#
++CONFIG_QUICKLIST=y
++CONFIG_PAGE_OFFSET=0x00000000
++CONFIG_FORCE_MAX_ZONEORDER=14
++CONFIG_MEMORY_START=0x10000000
++CONFIG_MEMORY_SIZE=0x8000000
++# CONFIG_29BIT is not set
++CONFIG_32BIT=y
++CONFIG_ARCH_FLATMEM_ENABLE=y
++CONFIG_ARCH_SPARSEMEM_ENABLE=y
++CONFIG_ARCH_SPARSEMEM_DEFAULT=y
++CONFIG_ARCH_SELECT_MEMORY_MODEL=y
++CONFIG_PAGE_SIZE_4KB=y
++# CONFIG_PAGE_SIZE_8KB is not set
++# CONFIG_PAGE_SIZE_16KB is not set
++# CONFIG_PAGE_SIZE_64KB is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_SPARSEMEM_STATIC=y
++CONFIG_HAVE_MEMBLOCK=y
++CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
++CONFIG_ARCH_DISCARD_MEMBLOCK=y
++# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=999999
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_NR_QUICK=1
++CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1
++CONFIG_NEED_PER_CPU_KM=y
++# CONFIG_CLEANCACHE is not set
++# CONFIG_ZPOOL is not set
++# CONFIG_ZBUD is not set
++
++#
++# Cache configuration
++#
++# CONFIG_CACHE_WRITEBACK is not set
++# CONFIG_CACHE_WRITETHROUGH is not set
++CONFIG_CACHE_OFF=y
++
++#
++# Processor features
++#
++# CONFIG_CPU_LITTLE_ENDIAN is not set
++CONFIG_CPU_BIG_ENDIAN=y
++# CONFIG_SH_FPU_EMU is not set
++
++#
++# Board support
++#
++CONFIG_0PF_FPGA=y
++
++#
++# Timer and clock configuration
++#
++CONFIG_SH_PCLK_FREQ=32000000
++CONFIG_SH_CLK_CPG=y
++CONFIG_SH_CLK_CPG_LEGACY=y
++
++#
++# CPU Frequency scaling
++#
++
++#
++# CPU Frequency scaling
++#
++# CONFIG_CPU_FREQ is not set
++
++#
++# DMA support
++#
++
++#
++# Companion Chips
++#
++
++#
++# Additional SuperH Device Drivers
++#
++# CONFIG_HEARTBEAT is not set
++# CONFIG_PUSH_SWITCH is not set
++
++#
++# Kernel features
++#
++CONFIG_HZ_100=y
++# CONFIG_HZ_250 is not set
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=100
++# CONFIG_SCHED_HRTICK is not set
++# CONFIG_CRASH_DUMP is not set
++CONFIG_PHYSICAL_START=0x10000000
++# CONFIG_SECCOMP is not set
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++CONFIG_GUSA=y
++
++#
++# SuperH / SH-Mobile Driver Options
++#
++CONFIG_SH_INTC=y
++
++#
++# Interrupt controller options
++#
++
++#
++# Boot options
++#
++CONFIG_ZERO_PAGE_OFFSET=0x0003F000
++CONFIG_BOOT_LINK_OFFSET=0x00800000
++CONFIG_ENTRY_OFFSET=0x00001000
++# CONFIG_CMDLINE_OVERWRITE is not set
++CONFIG_CMDLINE_EXTEND=y
++CONFIG_CMDLINE="console=ttyUL0"
++
++#
++# Bus options
++#
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF_FDPIC=y
++CONFIG_BINFMT_SCRIPT=y
++CONFIG_BINFMT_FLAT=y
++# CONFIG_BINFMT_ZFLAT is not set
++# CONFIG_BINFMT_SHARED_FLAT is not set
++# CONFIG_HAVE_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++CONFIG_COREDUMP=y
++
++#
++# Power management options (EXPERIMENTAL)
++#
++# CONFIG_PM is not set
++
++#
++# CPU Idle
++#
++# CONFIG_CPU_IDLE is not set
++# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
++# CONFIG_NET is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++# CONFIG_UEVENT_HELPER is not set
++CONFIG_DEVTMPFS=y
++CONFIG_DEVTMPFS_MOUNT=y
++# CONFIG_STANDALONE is not set
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++CONFIG_FW_LOADER=y
++# CONFIG_FIRMWARE_IN_KERNEL is not set
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
++CONFIG_ALLOW_DEV_COREDUMP=y
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_GENERIC_CPU_DEVICES is not set
++# CONFIG_DMA_SHARED_BUFFER is not set
++
++#
++# Bus devices
++#
++# CONFIG_MTD is not set
++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
++# CONFIG_PARPORT is not set
++# CONFIG_BLK_DEV is not set
++
++#
++# Misc devices
++#
++# CONFIG_SENSORS_LIS3LV02D is not set
++# CONFIG_DUMMY_IRQ is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_SRAM is not set
++# CONFIG_C2PORT is not set
++
++#
++# EEPROM support
++#
++# CONFIG_EEPROM_93CX6 is not set
++
++#
++# Texas Instruments shared transport line discipline
++#
++
++#
++# Altera FPGA firmware download module
++#
++
++#
++# Intel MIC Bus Driver
++#
++
++#
++# Intel MIC Host Driver
++#
++
++#
++# Intel MIC Card Driver
++#
++# CONFIG_ECHO is not set
++# CONFIG_CXL_BASE is not set
++
++#
++# SCSI device support
++#
++CONFIG_SCSI_MOD=y
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
++CONFIG_HAVE_PATA_PLATFORM=y
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++# CONFIG_INPUT_SPARSEKMAP is not set
++# CONFIG_INPUT_MATRIXKMAP is not set
++
++#
++# Userland interfaces
++#
++# CONFIG_INPUT_MOUSEDEV is not set
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_TTY=y
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_TRACE_SINK is not set
++CONFIG_DEVMEM=y
++# CONFIG_DEVKMEM is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_UARTLITE=y
++CONFIG_SERIAL_UARTLITE_CONSOLE=y
++CONFIG_SERIAL_UARTLITE_0PF=y
++# CONFIG_SERIAL_SH_SCI is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_SCCNXP is not set
++# CONFIG_SERIAL_ALTERA_JTAGUART is not set
++# CONFIG_SERIAL_ALTERA_UART is not set
++# CONFIG_SERIAL_ARC is not set
++# CONFIG_SERIAL_FSL_LPUART is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++
++#
++# I2C support
++#
++# CONFIG_I2C is not set
++# CONFIG_SPI is not set
++# CONFIG_SPMI is not set
++# CONFIG_HSI is not set
++
++#
++# PPS support
++#
++# CONFIG_PPS is not set
++
++#
++# PPS generators support
++#
++
++#
++# PTP clock support
++#
++
++#
++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
++#
++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_POWER_AVS is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_WATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++CONFIG_BCMA_POSSIBLE=y
++
++#
++# Broadcom specific AMBA
++#
++# CONFIG_BCMA is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_CROS_EC is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_MFD_KEMPLD is not set
++# CONFIG_MFD_MT6397 is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_ABX500_CORE is not set
++# CONFIG_MFD_SYSCON is not set
++# CONFIG_MFD_TI_AM335X_TSCADC is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_MEDIA_SUPPORT is not set
++
++#
++# Graphics support
++#
++
++#
++# Direct Rendering Manager
++#
++
++#
++# Frame buffer Devices
++#
++# CONFIG_FB is not set
++# CONFIG_FB_SH_MOBILE_MERAM is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++# CONFIG_VGASTATE is not set
++
++#
++# Console display driver support
++#
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_DUMMY_CONSOLE_COLUMNS=80
++CONFIG_DUMMY_CONSOLE_ROWS=25
++# CONFIG_SOUND is not set
++
++#
++# HID support
++#
++# CONFIG_HID is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SUPPORT is not set
++# CONFIG_UWB is not set
++# CONFIG_MMC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_ACCESSIBILITY is not set
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_CLASS is not set
++# CONFIG_DMADEVICES is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_VIRT_DRIVERS is not set
++
++#
++# Virtio drivers
++#
++# CONFIG_VIRTIO_MMIO is not set
++
++#
++# Microsoft Hyper-V guest support
++#
++# CONFIG_STAGING is not set
++CONFIG_CLKDEV_LOOKUP=y
++
++#
++# Hardware Spinlock drivers
++#
++
++#
++# Clock Source drivers
++#
++# CONFIG_ATMEL_PIT is not set
++# CONFIG_SH_TIMER_CMT is not set
++# CONFIG_SH_TIMER_MTU2 is not set
++# CONFIG_SH_TIMER_TMU is not set
++# CONFIG_EM_TIMER_STI is not set
++# CONFIG_MAILBOX is not set
++
++#
++# Remoteproc drivers
++#
++# CONFIG_STE_MODEM_RPROC is not set
++
++#
++# Rpmsg drivers
++#
++
++#
++# SOC (System On Chip) specific Drivers
++#
++# CONFIG_SOC_TI is not set
++# CONFIG_PM_DEVFREQ is not set
++# CONFIG_EXTCON is not set
++# CONFIG_MEMORY is not set
++# CONFIG_IIO is not set
++# CONFIG_PWM is not set
++# CONFIG_IPACK_BUS is not set
++# CONFIG_RESET_CONTROLLER is not set
++# CONFIG_FMC is not set
++
++#
++# PHY Subsystem
++#
++# CONFIG_GENERIC_PHY is not set
++# CONFIG_BCM_KONA_USB2_PHY is not set
++# CONFIG_POWERCAP is not set
++# CONFIG_MCB is not set
++
++#
++# Android
++#
++# CONFIG_ANDROID is not set
++
++#
++# File systems
++#
++# CONFIG_EXT2_FS is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_NILFS2_FS is not set
++# CONFIG_F2FS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++CONFIG_FILE_LOCKING=y
++# CONFIG_FSNOTIFY is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_INOTIFY_USER is not set
++# CONFIG_FANOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_QUOTACTL is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++# CONFIG_OVERLAY_FS is not set