From fc48f4fb0506b2ea6ef3bb33037be3a4da2874bc Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sat, 8 Aug 2020 23:28:17 -0700 Subject: xtensa: add exclusive access support Add XCHAL definitions for S32C1I and EXCLUSIVE options to xtensa-config.h, include it in places that implement atomic operations and add implementations with exclusive access option opcodes. Signed-off-by: Max Filippov --- libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S') diff --git a/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S b/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S index 72b2dda92..0669682ec 100644 --- a/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S +++ b/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S @@ -17,15 +17,32 @@ #define _ERRNO_H 1 #include +#include #include .text ENTRY (pthread_spin_trylock) +#if XCHAL_HAVE_EXCLUSIVE + memw + l32ex a3, a2 + bnez a3, 1f + movi a3, 1 + s32ex a3, a2 + getex a3 + addi a3, a3, -1 + memw +1: +#elif XCHAL_HAVE_S32C1I movi a3, 0 wsr a3, scompare1 movi a3, 1 s32c1i a3, a2, 0 +#else + +#error No hardware atomic operations + +#endif movi a2, EBUSY moveqz a2, a3, a3 -- cgit v1.2.3