From edce88cfef2f2a62647c2ab9536ca29694fab292 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Sun, 3 Dec 2017 21:12:34 +0100 Subject: x86_64: add fenv support from glibc --- libm/x86_64/fesetround.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 libm/x86_64/fesetround.c (limited to 'libm/x86_64/fesetround.c') diff --git a/libm/x86_64/fesetround.c b/libm/x86_64/fesetround.c new file mode 100644 index 000000000..312bddf85 --- /dev/null +++ b/libm/x86_64/fesetround.c @@ -0,0 +1,44 @@ +/* Set current rounding direction. + Copyright (C) 2001-2017 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +int +fesetround (int round) +{ + unsigned short int cw; + int mxcsr; + + if ((round & ~0xc00) != 0) + /* ROUND is no valid rounding mode. */ + return 1; + + /* First set the x87 FPU. */ + __asm__ ("fnstcw %0" : "=m" (*&cw)); + cw &= ~0xc00; + cw |= round; + __asm__ ("fldcw %0" : : "m" (*&cw)); + + /* And now the MSCSR register for SSE, the precision is at different bit + positions in the different units, we need to shift it 3 bits. */ + __asm__ ("stmxcsr %0" : "=m" (*&mxcsr)); + mxcsr &= ~ 0x6000; + mxcsr |= round << 3; + __asm__ ("ldmxcsr %0" : : "m" (*&mxcsr)); + + return 0; +} -- cgit v1.2.3