From ee92c0fe5c1b9d59508273916e2c9a75b68dbc13 Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbx@openadk.org>
Date: Thu, 21 Apr 2016 01:25:29 +0200
Subject: nds32: add support for new architecture

Add support for Andes Technology NDS32 architecture.
See here http://www.andestech.com/en/index/index.htm for more
informaton. Verification of the port from an older uClibc
port was done on a sponsored AG101p board.

The testsuite only has 5 errors, three are related to
an existing bug in dlclose() with LT.old, also happening
on cris32 and m68k.

Failures to fallocate/posix_fallocate are unresolved.

Thanks to Andes Technology sponsoring the hardware and
being very helpful while doing the uClibc-ng porting.

Signed-off-by: Waldemar Brodkorb <wbx@uclibc-ng.org>
---
 libc/sysdeps/linux/nds32/setjmp.S | 109 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)
 create mode 100644 libc/sysdeps/linux/nds32/setjmp.S

(limited to 'libc/sysdeps/linux/nds32/setjmp.S')

diff --git a/libc/sysdeps/linux/nds32/setjmp.S b/libc/sysdeps/linux/nds32/setjmp.S
new file mode 100644
index 000000000..8cb9adbeb
--- /dev/null
+++ b/libc/sysdeps/linux/nds32/setjmp.S
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2016 Andes Technology, Inc.
+ * Licensed under the LGPL v2.1, see the file COPYING.LIB in this tarball.
+ */
+
+/*
+  setjmp/longjmp for nds32.
+  r0 - r5 are for paramter passing - no need to save
+  r6 - r14 are callee saved - needs to save
+  r15 is temp register for assembler - no need to save
+  r16 - r25 are caller saved - no need to save
+  r26 - r27 are temp registers for OS - no need to save
+  r28 is fp - need to save
+  r29 is gp - need to save
+  r30 is ra - need to save
+  r31 is sp - need to save
+  so we need to save r6 - r14 and r28 - r31
+  The jmpbuf looks like this:
+  r6
+  r7
+  r8
+  r9
+  r10
+  r11
+  r12
+  r13
+  r14
+  fp
+  gp
+  ra
+  sp
+#ifdef NDS32_ABI_2FP_PLUS
+  ($fpcfg.freg)
+  (callee-saved FPU regs)
+#endif
+  reserved(for 8-byte align if needed)
+*/
+
+#include <sysdep.h>
+#define _SETJMP_H
+#define _ASM
+#include <bits/setjmp.h>
+	.section .text
+
+ENTRY(__sigsetjmp)
+	move	$r2, $r0
+.off_16bit
+	! save registers into buffer
+	smw.bim	$r6, [$r2], $r14, #0xf
+.restore_16bit
+
+#ifdef NDS32_ABI_2FP_PLUS
+/* Process for FPU registers.  */
+	fmfcfg	$r20	/* Keep $fpcfg in $r20.  */
+	slli	$r20, $r20, #28
+	srli	$r20, $r20, #30	/* Set $r20 as $fpcfg.freg.  */
+	swi.bi	$r20, [$r2], #4
+
+	/* Case switch for $r20 as $fpcfg.freg.  */
+	beqz	$r20, .LCFG0		/* Branch if $fpcfg.freg = 0b00.  */
+	xori	$r15, $r20, #0b10
+	beqz	$r15, .LCFG2		/* Branch if $fpcfg.freg = 0b10.  */
+	srli	$r20, $r20, #0b01
+	beqz	$r20, .LCFG1		/* Branch if $fpcfg.freg = 0b01.  */
+	/* Fall-through if $fpcfg.freg = 0b11.  */
+.LCFG3:
+	fsdi.bi	$fd31, [$r2], #8
+	fsdi.bi	$fd30, [$r2], #8
+	fsdi.bi	$fd29, [$r2], #8
+	fsdi.bi	$fd28, [$r2], #8
+	fsdi.bi	$fd27, [$r2], #8
+	fsdi.bi	$fd26, [$r2], #8
+	fsdi.bi	$fd25, [$r2], #8
+	fsdi.bi	$fd24, [$r2], #8
+.LCFG2:
+	fsdi.bi	$fd10, [$r2], #8
+	fsdi.bi	$fd9, [$r2], #8
+	fsdi.bi	$fd8, [$r2], #8
+.LCFG1:
+	fsdi.bi	$fd7, [$r2], #8
+	fsdi.bi	$fd6, [$r2], #8
+	fsdi.bi	$fd5, [$r2], #8
+	fsdi.bi	$fd4, [$r2], #8
+.LCFG0:
+	fsdi.bi	$fd3, [$r2], #8
+#endif /* NDS32_ABI_2FP_PLUS */
+
+
+/* Make a tail call to __sigjmp_save.  */
+#ifdef PIC
+	/* Initialize $r2 as $gp value.  */
+	sethi   $r2, hi20(_GLOBAL_OFFSET_TABLE_-8)
+	ori     $r2, $r2, lo12(_GLOBAL_OFFSET_TABLE_-4)
+	mfusr   $r15, $pc
+	add     $r2, $r15, $r2
+
+	! la    $r3, __sigjmp_save@PLT
+	sethi   $r3, hi20(__sigjmp_save@PLT)
+	ori     $r3, $r3, lo12(__sigjmp_save@PLT)
+	add     $r3, $r3, $r2
+
+	jr      $r3
+#else /* NOT PIC */
+	la	$r15, C_SYMBOL_NAME(__sigjmp_save)
+	jr	$r15
+#endif
+
+END(__sigsetjmp)
+hidden_def(__sigsetjmp)
-- 
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