From c049c4d872af18d668bb98094ce4334e44508fbe Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Sat, 14 Feb 2015 15:25:38 +0530 Subject: ARC: add configuration option for MMU page size ARC CPU may have MMU page size of 4/8(default)/16k. uClibc needs to have page size configured accodring to HW it will be run on. Signed-off-by: Alexey Brodkin Signed-off-by: Vineet Gupta Signed-off-by: Bernhard Reutner-Fischer --- libc/sysdeps/linux/arc/bits/uClibc_page.h | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'libc/sysdeps/linux/arc/bits') diff --git a/libc/sysdeps/linux/arc/bits/uClibc_page.h b/libc/sysdeps/linux/arc/bits/uClibc_page.h index 26cec54c9..b05c57501 100755 --- a/libc/sysdeps/linux/arc/bits/uClibc_page.h +++ b/libc/sysdeps/linux/arc/bits/uClibc_page.h @@ -9,16 +9,25 @@ /* * ARC700/linux supports 4k, 8k, 16k pages (build time). - * We rely on the kernel exported header (aka uapi headers since 3.8) - * for PAGE_SIZE and friends. This avoids hand-editing here when building - * toolchain. * * Although uClibc determines page size dynamically, from kernel's auxv which * ARC Linux does pass, still the generic code needs a fall back * _dl_pagesize = auxvt[AT_PAGESZ].a_un.a_val ? : PAGE_SIZE * */ -#include + +#include + +#if defined(__CONFIG_ARC_PAGE_SIZE_16K__) +#define PAGE_SHIFT 14 +#elif defined(__CONFIG_ARC_PAGE_SIZE_4K__) +#define PAGE_SHIFT 12 +#else +#define PAGE_SHIFT 13 +#endif + +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) /* TBD: fix this with runtime value for a PAGE_SIZE agnostic uClibc */ #define MMAP2_PAGE_SHIFT PAGE_SHIFT -- cgit v1.2.3 From 7bb51423cccff0b524ba4ddd0679e8c7c1e4a7b1 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Sat, 14 Feb 2015 15:25:40 +0530 Subject: ARC: remove stale TRUNCATE64_HAS_4_ARGS Not relevant anymore since commit e8cc14e59ed3f66b84e, "libc: rename TRUNCATE64_HAS_4_ARGS to SYSCALL_ALIGN_64BIT" Signed-off-by: Vineet Gupta Signed-off-by: Bernhard Reutner-Fischer --- libc/sysdeps/linux/arc/bits/uClibc_arch_features.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'libc/sysdeps/linux/arc/bits') diff --git a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h index 9313ee8f2..8af6eca4c 100755 --- a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h +++ b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h @@ -17,9 +17,6 @@ /* can your target use syscall6() for mmap ? */ #undef __UCLIBC_MMAP_HAS_6_ARGS__ -/* does your target use syscall4() for truncate64 ? (32bit arches only) */ -#undef __UCLIBC_TRUNCATE64_HAS_4_ARGS__ - /* does your target have a broken create_module() ? */ #undef __UCLIBC_BROKEN_CREATE_MODULE__ -- cgit v1.2.3 From afab56958f1cbb47b831ee3ebff231dfbae74af2 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Thu, 19 Feb 2015 19:13:59 +0530 Subject: ARCv2 ISA support This is next gen Instruction Set Architecture from Synopsys and basis for the ARC HS family of processors. http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802 http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx Signed-off-by: Vineet Gupta Signed-off-by: Bernhard Reutner-Fischer --- libc/sysdeps/linux/arc/bits/syscalls.h | 10 +++++++++- libc/sysdeps/linux/arc/bits/uClibc_arch_features.h | 7 +++++++ 2 files changed, 16 insertions(+), 1 deletion(-) (limited to 'libc/sysdeps/linux/arc/bits') diff --git a/libc/sysdeps/linux/arc/bits/syscalls.h b/libc/sysdeps/linux/arc/bits/syscalls.h index 5da6aadb3..248ef7844 100644 --- a/libc/sysdeps/linux/arc/bits/syscalls.h +++ b/libc/sysdeps/linux/arc/bits/syscalls.h @@ -98,7 +98,11 @@ extern int __syscall_error (int); * for syscall itself. *-------------------------------------------------------------------------*/ -#define ARC_TRAP_INSN "trap0 \n\t" +#ifdef __A7__ +#define ARC_TRAP_INSN "trap0 \n\t" +#elif defined(__HS__) +#define ARC_TRAP_INSN "trap_s 0 \n\t" +#endif #define INTERNAL_SYSCALL_NCS(nm, err, nr_args, args...) \ ({ \ @@ -176,7 +180,11 @@ extern int __syscall_error (int); #else +#ifdef __A7__ #define ARC_TRAP_INSN trap0 +#elif defined(__HS__) +#define ARC_TRAP_INSN trap_s 0 +#endif #endif /* __ASSEMBLER__ */ diff --git a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h index 8af6eca4c..451575586 100755 --- a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h +++ b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h @@ -47,4 +47,11 @@ /* The default ';' is a comment on ARC. */ #define __UCLIBC_ASM_LINE_SEP__ ` +/* does your target align 64bit values in register pairs ? (32bit arches only) */ +#if defined(__A7__) +#undef __UCLIBC_SYSCALL_ALIGN_64BIT__ +#else +#define __UCLIBC_SYSCALL_ALIGN_64BIT__ +#endif + #endif /* _BITS_UCLIBC_ARCH_FEATURES_H */ -- cgit v1.2.3