From afab56958f1cbb47b831ee3ebff231dfbae74af2 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Thu, 19 Feb 2015 19:13:59 +0530 Subject: ARCv2 ISA support This is next gen Instruction Set Architecture from Synopsys and basis for the ARC HS family of processors. http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802 http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx Signed-off-by: Vineet Gupta Signed-off-by: Bernhard Reutner-Fischer --- include/elf.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/elf.h b/include/elf.h index 1979209cd..facf09cd5 100644 --- a/include/elf.h +++ b/include/elf.h @@ -378,6 +378,7 @@ typedef struct /* Xilinx Microblaze (official) */ #define EM_MICROBLAZE 189 +#define EM_ARCV2 195 /* ARCv2 Cores */ /* Legal values for e_version (version). */ -- cgit v1.2.3