From a1aaae7b8731a25b7dd8b6a58713dcfc339c3c44 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Sat, 4 Dec 2010 10:29:42 +0100 Subject: getconf: only use specs that are available On older glibc (like 2.7), the _SC_V7_* symbols are not defined, making the build of current uClibc fail on Debian Lenny systems and other systems using a fairly old glibc. So we make sure to only use the specs names that are defined by the host C library. Signed-off-by: Thomas Petazzoni Signed-off-by: Bernhard Reutner-Fischer --- utils/getconf.c | 72 ++++++++++++++++++++++++++++++++++++++------------------- 1 file changed, 48 insertions(+), 24 deletions(-) diff --git a/utils/getconf.c b/utils/getconf.c index 81566df7b..812783ecf 100644 --- a/utils/getconf.c +++ b/utils/getconf.c @@ -1014,18 +1014,42 @@ static const struct conf vars[] = static const struct { const char *name; int num; } specs[] = { +#ifdef _SC_XBS5_ILP32_OFF32 { "XBS5_ILP32_OFF32", _SC_XBS5_ILP32_OFF32 }, +#endif +#ifdef _SC_XBS5_ILP32_OFFBIG { "XBS5_ILP32_OFFBIG", _SC_XBS5_ILP32_OFFBIG }, +#endif +#ifdef _SC_XBS5_LP64_OFF64 { "XBS5_LP64_OFF64", _SC_XBS5_LP64_OFF64 }, +#endif +#ifdef _SC_XBS5_LPBIG_OFFBIG { "XBS5_LPBIG_OFFBIG", _SC_XBS5_LPBIG_OFFBIG }, +#endif +#ifdef _SC_V6_ILP32_OFF32 { "POSIX_V6_ILP32_OFF32", _SC_V6_ILP32_OFF32 }, +#endif +#ifdef _SC_V6_ILP32_OFFBIG { "POSIX_V6_ILP32_OFFBIG", _SC_V6_ILP32_OFFBIG }, +#endif +#ifdef _SC_V6_LP64_OFF64 { "POSIX_V6_LP64_OFF64", _SC_V6_LP64_OFF64 }, +#endif +#ifdef _SC_V6_LPBIG_OFFBIG { "POSIX_V6_LPBIG_OFFBIG", _SC_V6_LPBIG_OFFBIG }, +#endif +#ifdef _SC_V7_ILP32_OFF32 { "POSIX_V7_ILP32_OFF32", _SC_V7_ILP32_OFF32 }, +#endif +#ifdef _SC_V7_ILP32_OFFBIG { "POSIX_V7_ILP32_OFFBIG", _SC_V7_ILP32_OFFBIG }, +#endif +#ifdef _SC_V7_LP64_OFF64 { "POSIX_V7_LP64_OFF64", _SC_V7_LP64_OFF64 }, +#endif +#ifdef _SC_V7_LPBIG_OFFBIG { "POSIX_V7_LPBIG_OFFBIG", _SC_V7_LPBIG_OFFBIG }, +#endif }; static const int nspecs = sizeof (specs) / sizeof (specs[0]); @@ -1177,41 +1201,41 @@ environment SPEC.\n\n"); switch (specs[i].num) { -#ifndef _XBS5_ILP32_OFF32 - case _SC_XBS5_ILP32_OFF32: +#if !defined(_XBS5_ILP32_OFF32) && defined(_SC_XBS5_ILP32_OFF32) + case _SC_XBS5_ILP32_OFF32: #endif -#ifndef _XBS5_ILP32_OFFBIG - case _SC_XBS5_ILP32_OFFBIG: +#if !defined(_XBS5_ILP32_OFFBIG) && defined(_SC_XBS5_ILP32_OFFBIG) + case _SC_XBS5_ILP32_OFFBIG: #endif -#ifndef _XBS5_LP64_OFF64 - case _SC_XBS5_LP64_OFF64: +#if !defined(_XBS5_LP64_OFF64) && defined(_SC_XBS5_LP64_OFF64) + case _SC_XBS5_LP64_OFF64: #endif -#ifndef _XBS5_LPBIG_OFFBIG - case _SC_XBS5_LPBIG_OFFBIG: +#if !defined(_XBS5_LPBIG_OFFBIG) && defined(_SC_XBS5_LPBIG_OFFBIG) + case _SC_XBS5_LPBIG_OFFBIG: #endif -#ifndef _POSIX_V6_ILP32_OFF32 - case _SC_V6_ILP32_OFF32: +#if !defined(_POSIX_V6_ILP32_OFF32) && defined(_SC_V6_ILP32_OFF32) + case _SC_V6_ILP32_OFF32: #endif -#ifndef _POSIX_V6_ILP32_OFFBIG - case _SC_V6_ILP32_OFFBIG: +#if !defined(_POSIX_V6_ILP32_OFFBIG) && defined(_SC_V6_ILP32_OFFBIG) + case _SC_V6_ILP32_OFFBIG: #endif -#ifndef _POSIX_V6_LP64_OFF64 - case _SC_V6_LP64_OFF64: +#if !defined(_POSIX_V6_LP64_OFF64) && defined(_SC_V6_LP64_OFF64) + case _SC_V6_LP64_OFF64: #endif -#ifndef _POSIX_V6_LPBIG_OFFBIG - case _SC_V6_LPBIG_OFFBIG: +#if !defined(_POSIX_V6_LPBIG_OFFBIG) && defined(_SC_V6_LPBIG_OFFBIG) + case _SC_V6_LPBIG_OFFBIG: #endif -#ifndef _POSIX_V7_ILP32_OFF32 - case _SC_V7_ILP32_OFF32: +#if !defined(_POSIX_V7_ILP32_OFF32) && defined(_SC_V7_ILP32_OFF32) + case _SC_V7_ILP32_OFF32: #endif -#ifndef _POSIX_V7_ILP32_OFFBIG - case _SC_V7_ILP32_OFFBIG: +#if !defined(_POSIX_V7_ILP32_OFFBIG) && defined(_SC_V7_ILP32_OFFBIG) + case _SC_V7_ILP32_OFFBIG: #endif -#ifndef _POSIX_V7_LP64_OFF64 - case _SC_V7_LP64_OFF64: +#if !defined(_POSIX_V7_LP64_OFF64) && defined(_SC_V7_LP64_OFF64) + case _SC_V7_LP64_OFF64: #endif -#ifndef _POSIX_V7_LPBIG_OFFBIG - case _SC_V7_LPBIG_OFFBIG: +#if !defined(_POSIX_V7_LPBIG_OFFBIG) && defined(_SC_V7_LPBIG_OFFBIG) + case _SC_V7_LPBIG_OFFBIG: #endif { const char *args[argc + 3]; -- cgit v1.2.3 From 1f674977c0f3ea1e67deea93fa8f4e795cc869ad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timo=20Ter=C3=A4s?= Date: Tue, 7 Dec 2010 11:27:29 +0200 Subject: nptl: fix Unwind_Resume PLT calls MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit My change a49b3a18e463cbe8c94c41501e386e7f4c61609e fixed two Unwind_Resume calls to go via PLT to avoid text relocations for PIC builds. However, it looks the reason for upstream not using PLT calls is that ebx gets clobbered. So we need to reload it. Signed-off-by: Timo Teräs Signed-off-by: Austin Foxley --- .../unix/sysv/linux/i386/i486/pthread_cond_timedwait.S | 4 ++++ .../unix/sysv/linux/i386/i486/pthread_cond_wait.S | 18 +++++++++++------- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S index ac7983c49..3b61367e1 100644 --- a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S +++ b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S @@ -648,6 +648,10 @@ __condvar_tw_cleanup: movl %esi, (%esp) .LcallUR: +#ifdef __PIC__ + call __i686.get_pc_thunk.bx + addl $_GLOBAL_OFFSET_TABLE_, %ebx +#endif call _Unwind_Resume@PLT hlt .LENDCODE: diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S index abc963f07..a1294c509 100644 --- a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S +++ b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S @@ -535,6 +535,10 @@ __condvar_w_cleanup: movl %esi, (%esp) .LcallUR: +#ifdef __PIC__ + call __i686.get_pc_thunk.bx + addl $_GLOBAL_OFFSET_TABLE_, %ebx +#endif call _Unwind_Resume@PLT hlt .LENDCODE: @@ -569,14 +573,14 @@ __condvar_w_cleanup: .Lcstend: #ifdef __PIC__ - .section .gnu.linkonce.t.__i686.get_pc_thunk.cx,"ax",@progbits - .globl __i686.get_pc_thunk.cx - .hidden __i686.get_pc_thunk.cx - .type __i686.get_pc_thunk.cx,@function -__i686.get_pc_thunk.cx: - movl (%esp), %ecx; + .section .gnu.linkonce.t.__i686.get_pc_thunk.bx,"ax",@progbits + .globl __i686.get_pc_thunk.bx + .hidden __i686.get_pc_thunk.bx + .type __i686.get_pc_thunk.bx,@function +__i686.get_pc_thunk.bx: + movl (%esp), %ebx; ret - .size __i686.get_pc_thunk.cx,.-__i686.get_pc_thunk.cx + .size __i686.get_pc_thunk.bx,.-__i686.get_pc_thunk.bx #endif #ifdef SHARED -- cgit v1.2.3 From 640220faf25659eb4c15b78cf8869251dbadbd16 Mon Sep 17 00:00:00 2001 From: Giuseppe Cavallaro Date: Mon, 13 Dec 2010 11:39:36 +0100 Subject: sh: fix memcpy saving/restoring FR12-FR15 registers This patch fixes a bug in the memcpy that doesn't save/restore the FR12-FR15 registers (callee save registers in ST40 ABI) while copying many cache lines with FPU in single paired precision mode and by using all FPU registers (DR and XD). Signed-off-by: Giuseppe Cavallaro Reviewed-by: Carmelo Amoroso Signed-off-by: Carmelo Amoroso --- libc/string/sh/sh4/memcpy.S | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/libc/string/sh/sh4/memcpy.S b/libc/string/sh/sh4/memcpy.S index 5be770a59..6a229a06c 100644 --- a/libc/string/sh/sh4/memcpy.S +++ b/libc/string/sh/sh4/memcpy.S @@ -497,6 +497,12 @@ ENTRY(memcpy) mov r5, r6 add #-0x80, r6 ! prefetch head + ! store FPU (in single precision mode, do not check R15 align). + fmov fr12, @-r15 + fmov fr13, @-r15 + fmov fr14, @-r15 + fmov fr15, @-r15 + FPU_SET_PAIRED_PREC mov #4, r0 @@ -553,16 +559,22 @@ ENTRY(memcpy) bt/s 67b pref @r6 + RESTORE_FPSCR + + ! Restore FPU callee save registers + fmov @r15+, fr15 + fmov @r15+, fr14 + fmov @r15+, fr13 + fmov @r15+, fr12 + ! Other cache lines could be copied: so use the FPU in single paired ! precision without prefetching. No check for alignment is necessary. mov #1, r0 cmp/ge r0, r3 - bt/s 4f + bt/s 3f add #0x60, r5 - RESTORE_FPSCR - bra 5f nop -- cgit v1.2.3