From ac6163148698545dd56471edabf97ffc23a519da Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 2 Jan 2024 03:38:32 -0800 Subject: [PATCH] ARC: Add support for ARCv3 processors Signed-off-by: Vineet Gupta Signed-off-by: Pavel Kozlov Signed-off-by: Alexey Brodkin --- config.h.in | 6 + elf/dl-runtime.c | 4 +- elf/elf.h | 5 +- nptl/Makefile | 5 +- scripts/build-many-glibcs.py | 6 + scripts/config.sub | 8 + sysdeps/arc/Implies | 1 - sysdeps/arc/__longjmp.S | 62 +- sysdeps/arc/arc32/Implies | 1 + sysdeps/arc/arc64/Implies | 1 + sysdeps/arc/arc64/fpu/libm-test-ulps | 1141 +++++++++++++++++ sysdeps/arc/arc64/fpu/libm-test-ulps-name | 1 + sysdeps/arc/{ => arc64}/nofpu/libm-test-ulps | 1 + sysdeps/arc/arc64/nofpu/libm-test-ulps-name | 1 + sysdeps/arc/atomic-machine.h | 41 +- sysdeps/arc/bits/setjmp.h | 6 +- sysdeps/arc/configure | 80 +- sysdeps/arc/configure.ac | 36 + sysdeps/arc/dl-machine.h | 75 +- sysdeps/arc/dl-trampoline.S | 89 +- sysdeps/arc/fpu/math-use-builtins-fma.h | 18 +- sysdeps/arc/fpu/math-use-builtins-sqrt.h | 18 +- sysdeps/arc/isa-asm-macro-32.h | 61 + sysdeps/arc/isa-asm-macro-64.h | 86 ++ sysdeps/arc/isa-asm-macros.h | 35 + sysdeps/arc/nofpu/libm-test-ulps | 1 + sysdeps/arc/nptl/pthreaddef.h | 2 +- sysdeps/arc/preconfigure | 18 +- sysdeps/arc/setjmp.S | 55 +- sysdeps/arc/sfp-machine.h | 55 +- sysdeps/arc/start.S | 14 +- sysdeps/arc/sysdep.h | 5 +- sysdeps/unix/sysv/linux/arc/Makefile | 8 +- sysdeps/unix/sysv/linux/arc/arc32/Implies | 1 + .../sysv/linux/arc/{ => arc32}/arch-syscall.h | 0 .../sysv/linux/arc/{ => arc32}/c++-types.data | 0 .../linux/arc/{ => arc32}/fixup-asm-unistd.h | 0 .../sysv/linux/arc/{ => arc32}/ld.abilist | 0 .../arc/{ => arc32}/libBrokenLocale.abilist | 0 .../sysv/linux/arc/{ => arc32}/libanl.abilist | 0 .../sysv/linux/arc/{ => arc32}/libc.abilist | 0 .../arc/{ => arc32}/libc_malloc_debug.abilist | 0 .../linux/arc/{ => arc32}/libcrypt.abilist | 0 .../sysv/linux/arc/{ => arc32}/libdl.abilist | 0 .../sysv/linux/arc/{ => arc32}/libm.abilist | 0 .../linux/arc/{ => arc32}/libpthread.abilist | 0 .../linux/arc/{ => arc32}/libresolv.abilist | 0 .../sysv/linux/arc/{ => arc32}/librt.abilist | 0 .../arc/{ => arc32}/libthread_db.abilist | 0 .../linux/arc/{ => arc32}/libutil.abilist | 0 sysdeps/unix/sysv/linux/arc/arc64/Implies | 2 + .../sysv/linux/arc/{ => arc64}/arch-syscall.h | 59 +- .../sysv/linux/arc/{ => arc64}/c++-types.data | 48 +- .../sysv/linux/arc/{ => arc64}/ld.abilist | 8 +- .../arc/{ => arc64}/libBrokenLocale.abilist | 0 .../sysv/linux/arc/{ => arc64}/libanl.abilist | 0 .../sysv/linux/arc/{ => arc64}/libc.abilist | 82 +- .../arc/{ => arc64}/libc_malloc_debug.abilist | 8 +- .../linux/arc/{ => arc64}/libcrypt.abilist | 0 .../sysv/linux/arc/{ => arc64}/libdl.abilist | 0 .../sysv/linux/arc/{ => arc64}/libm.abilist | 0 .../linux/arc/{ => arc64}/libpthread.abilist | 0 .../linux/arc/{ => arc64}/libresolv.abilist | 4 +- .../sysv/linux/arc/{ => arc64}/librt.abilist | 0 .../arc/{ => arc64}/libthread_db.abilist | 0 .../linux/arc/{ => arc64}/libutil.abilist | 0 sysdeps/unix/sysv/linux/arc/bits/fcntl.h | 62 + .../sysv/linux/arc/bits/types/__sigset_t.h | 2 +- sysdeps/unix/sysv/linux/arc/clone.S | 30 +- sysdeps/unix/sysv/linux/arc/clone3.S | 14 +- sysdeps/unix/sysv/linux/arc/getcontext.S | 71 +- sysdeps/unix/sysv/linux/arc/setcontext.S | 88 +- sysdeps/unix/sysv/linux/arc/shlib-versions | 8 + sysdeps/unix/sysv/linux/arc/swapcontext.S | 129 +- sysdeps/unix/sysv/linux/arc/sys/ucontext.h | 1 + sysdeps/unix/sysv/linux/arc/syscall.S | 16 +- sysdeps/unix/sysv/linux/arc/sysdep.h | 16 +- sysdeps/unix/sysv/linux/arc/vfork.S | 4 +- timezone/zic.c | 2 +- 79 files changed, 2211 insertions(+), 390 deletions(-) mode change 100755 => 100644 scripts/config.sub create mode 100644 sysdeps/arc/arc32/Implies create mode 100644 sysdeps/arc/arc64/Implies create mode 100644 sysdeps/arc/arc64/fpu/libm-test-ulps create mode 100644 sysdeps/arc/arc64/fpu/libm-test-ulps-name copy sysdeps/arc/{ => arc64}/nofpu/libm-test-ulps (99%) create mode 100644 sysdeps/arc/arc64/nofpu/libm-test-ulps-name create mode 100644 sysdeps/arc/isa-asm-macro-32.h create mode 100644 sysdeps/arc/isa-asm-macro-64.h create mode 100644 sysdeps/arc/isa-asm-macros.h create mode 100644 sysdeps/unix/sysv/linux/arc/arc32/Implies copy sysdeps/unix/sysv/linux/arc/{ => arc32}/arch-syscall.h (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/c++-types.data (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc32}/fixup-asm-unistd.h (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/ld.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libBrokenLocale.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libanl.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libc.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libc_malloc_debug.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libcrypt.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libdl.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libm.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libpthread.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libresolv.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/librt.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libthread_db.abilist (100%) copy sysdeps/unix/sysv/linux/arc/{ => arc32}/libutil.abilist (100%) create mode 100644 sysdeps/unix/sysv/linux/arc/arc64/Implies rename sysdeps/unix/sysv/linux/arc/{ => arc64}/arch-syscall.h (89%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/c++-types.data (73%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/ld.abilist (54%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libBrokenLocale.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libanl.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libc.abilist (97%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libc_malloc_debug.abilist (80%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libcrypt.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libdl.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libm.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libpthread.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libresolv.abilist (95%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/librt.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libthread_db.abilist (100%) rename sysdeps/unix/sysv/linux/arc/{ => arc64}/libutil.abilist (100%) create mode 100644 sysdeps/unix/sysv/linux/arc/bits/fcntl.h diff --git a/config.h.in b/config.h.in index 0dedc124f7..d69b4166c0 100644 --- a/config.h.in +++ b/config.h.in @@ -120,6 +120,12 @@ /* ARC big endian ABI */ #undef HAVE_ARC_BE +/* ARC64:32 ABI */ +#undef HAVE_ARC32 + +/* ARC64:64 ABI */ +#undef HAVE_ARC64 + /* C-SKY ABI version. */ #undef CSKYABI diff --git a/elf/dl-runtime.c b/elf/dl-runtime.c index 32a8bfcf74..68ffdb1c24 100644 --- a/elf/dl-runtime.c +++ b/elf/dl-runtime.c @@ -42,7 +42,7 @@ _dl_fixup ( # ifdef ELF_MACHINE_RUNTIME_FIXUP_ARGS ELF_MACHINE_RUNTIME_FIXUP_ARGS, # endif - struct link_map *l, ElfW(Word) reloc_arg) + struct link_map *l, uintptr_t reloc_arg) { const ElfW(Sym) *const symtab = (const void *) D_PTR (l, l_info[DT_SYMTAB]); @@ -170,7 +170,7 @@ _dl_profile_fixup ( #ifdef ELF_MACHINE_RUNTIME_FIXUP_ARGS ELF_MACHINE_RUNTIME_FIXUP_ARGS, #endif - struct link_map *l, ElfW(Word) reloc_arg, + struct link_map *l, uintptr_t reloc_arg, ElfW(Addr) retaddr, void *regs, long int *framesizep) { void (*mcount_fct) (ElfW(Addr), ElfW(Addr)) = _dl_mcount; diff --git a/elf/elf.h b/elf/elf.h index 89fc8021e9..05cc75c631 100644 --- a/elf/elf.h +++ b/elf/elf.h @@ -358,6 +358,8 @@ typedef struct #define EM_BPF 247 /* Linux BPF -- in-kernel virtual machine */ #define EM_CSKY 252 /* C-SKY */ +#define EM_ARCV3 253 /* Synopsys ARCv3 64-bit ISA */ +#define EM_ARCV3_32 255 /* Synopsys ARCv3 32-bit ISA */ #define EM_LOONGARCH 258 /* LoongArch */ #define EM_NUM 259 @@ -4216,12 +4218,13 @@ enum /* Processor specific values for the Shdr sh_type field. */ #define SHT_ARC_ATTRIBUTES (SHT_LOPROC + 1) /* ARC attributes section. */ -/* ARCompact/ARCv2 specific relocs. */ +/* ARCompact/ARCv2/ARCv3 specific relocs. */ #define R_ARC_NONE 0x0 #define R_ARC_8 0x1 #define R_ARC_16 0x2 #define R_ARC_24 0x3 #define R_ARC_32 0x4 +#define R_ARC_64 0x5 #define R_ARC_B22_PCREL 0x6 #define R_ARC_H30 0x7 diff --git a/nptl/Makefile b/nptl/Makefile index ffa5722e48..c8b7674c27 100644 --- a/nptl/Makefile +++ b/nptl/Makefile @@ -353,6 +353,7 @@ tests = \ tst-thread-exit-clobber \ tst-thread-setspecific \ tst-thread_local1 \ + tst-eintr1 \ tst-tsd3 \ tst-tsd4 \ # tests @@ -397,10 +398,6 @@ tests-time64 := \ tst-cancel4_2-time64 # tests-time64 -# This test can run into task limits because of a linux kernel bug -# and then cause the make process to fail too, see bug 24537. -xtests += tst-eintr1 - test-srcs = tst-oddstacklimit gen-as-const-headers = unwindbuf.sym diff --git a/scripts/build-many-glibcs.py b/scripts/build-many-glibcs.py index 73ffc57c86..6f53c195cd 100755 --- a/scripts/build-many-glibcs.py +++ b/scripts/build-many-glibcs.py @@ -172,6 +172,12 @@ class Context(object): self.add_config(arch='arceb', os_name='linux-gnu', gcc_cfg=['--disable-multilib', '--with-cpu=hs38']) + self.add_config(arch='arc64', + os_name='linux-gnu', + gcc_cfg=['--disable-multilib']) + self.add_config(arch='arc64', + os_name='linux-gnuhf', + gcc_cfg=['--disable-multilib', '--with-fpu=fpud']) self.add_config(arch='alpha', os_name='linux-gnu') self.add_config(arch='arm', diff --git a/scripts/config.sub b/scripts/config.sub old mode 100755 new mode 100644 index dba16e84c7..4d9a117c9c --- a/scripts/config.sub +++ b/scripts/config.sub @@ -1170,6 +1170,14 @@ case $cpu-$vendor in cpu=mipsallegrexel vendor=sony ;; + arc32*-*) + cpu=arc32 + vendor=linux + ;; + arc64*-*) + cpu=arc64 + vendor=linux + ;; tile*-*) basic_os=${basic_os:-linux-gnu} ;; diff --git a/sysdeps/arc/Implies b/sysdeps/arc/Implies index 780c4e2467..12ca48b4c9 100644 --- a/sysdeps/arc/Implies +++ b/sysdeps/arc/Implies @@ -1,3 +1,2 @@ -wordsize-32 ieee754/flt-32 ieee754/dbl-64 diff --git a/sysdeps/arc/__longjmp.S b/sysdeps/arc/__longjmp.S index a57054bce0..920e535ffd 100644 --- a/sysdeps/arc/__longjmp.S +++ b/sysdeps/arc/__longjmp.S @@ -24,25 +24,49 @@ ENTRY (__longjmp) - LDR (blink, r0, 0) - LDR (sp, r0, 1) - LDR (fp, r0, 2) - LDR (gp, r0, 3) - - LDR (r13, r0, 4) - LDR (r14, r0, 5) - LDR (r15, r0, 6) - LDR (r16, r0, 7) - LDR (r17, r0, 8) - LDR (r18, r0, 9) - LDR (r19, r0, 10) - LDR (r20, r0, 11) - LDR (r21, r0, 12) - LDR (r22, r0, 13) - LDR (r23, r0, 14) - LDR (r24, r0, 15) - - mov.f r0, r1 + LDR.as blink, r0, 0 + LDR.as sp, r0, 1 + LDR.as fp, r0, 2 + LDR.as gp, r0, 3 + + LDR.as r13, r0, 4 + LDR.as r14, r0, 5 + LDR.as r15, r0, 6 + LDR.as r16, r0, 7 + LDR.as r17, r0, 8 + LDR.as r18, r0, 9 + LDR.as r19, r0, 10 + LDR.as r20, r0, 11 + LDR.as r21, r0, 12 + LDR.as r22, r0, 13 + LDR.as r23, r0, 14 + LDR.as r24, r0, 15 + +#if defined(__ARCV3__) + LDR.as r25, r0, 16 + LDR.as r26, r0, 17 +#endif + +#if defined (__ARC_FLOAT_ABI_HARD__) + FLDR.as f16, r0, 18 + FLDR.as f17, r0, 19 + FLDR.as f18, r0, 20 + FLDR.as f19, r0, 21 + FLDR.as f20, r0, 22 + FLDR.as f21, r0, 23 + FLDR.as f22, r0, 24 + FLDR.as f23, r0, 25 + FLDR.as f24, r0, 26 + FLDR.as f25, r0, 27 + FLDR.as f26, r0, 28 + FLDR.as f27, r0, 29 + FLDR.as f28, r0, 30 + FLDR.as f29, r0, 31 + FLDR.as f30, r0, 32 + FLDR.as f31, r0, 33 +#endif + + MOVR.f r0, r1 j.d [blink] mov.z r0, 1 /* don't return 0 to setjmp callsite from longjmp. */ diff --git a/sysdeps/arc/arc32/Implies b/sysdeps/arc/arc32/Implies new file mode 100644 index 0000000000..39a34c5f57 --- /dev/null +++ b/sysdeps/arc/arc32/Implies @@ -0,0 +1 @@ +wordsize-32 diff --git a/sysdeps/arc/arc64/Implies b/sysdeps/arc/arc64/Implies new file mode 100644 index 0000000000..a8cae95f9d --- /dev/null +++ b/sysdeps/arc/arc64/Implies @@ -0,0 +1 @@ +wordsize-64 diff --git a/sysdeps/arc/arc64/fpu/libm-test-ulps b/sysdeps/arc/arc64/fpu/libm-test-ulps new file mode 100644 index 0000000000..f3b8753c4d --- /dev/null +++ b/sysdeps/arc/arc64/fpu/libm-test-ulps @@ -0,0 +1,1141 @@ +# Begin of automatic generation + +# Maximal error of functions: +Function: "acos": +double: 1 +float: 1 + +Function: "acos_downward": +double: 1 +float: 1 + +Function: "acos_towardzero": +double: 1 +float: 1 + +Function: "acos_upward": +double: 1 +float: 1 + +Function: "acosh": +double: 2 +float: 2 + +Function: "acosh_downward": +double: 2 +float: 2 + +Function: "acosh_towardzero": +double: 2 +float: 2 + +Function: "acosh_upward": +double: 2 +float: 2 + +Function: "asin": +double: 1 +float: 1 + +Function: "asin_downward": +double: 1 +float: 1 + +Function: "asin_towardzero": +double: 1 +float: 1 + +Function: "asin_upward": +double: 2 +float: 1 + +Function: "asinh": +double: 2 +float: 2 + +Function: "asinh_downward": +double: 3 +float: 3 + +Function: "asinh_towardzero": +double: 2 +float: 2 + +Function: "asinh_upward": +double: 3 +float: 3 + +Function: "atan": +double: 1 +float: 1 + +Function: "atan2": +float: 1 + +Function: "atan2_downward": +double: 1 +float: 2 + +Function: "atan2_towardzero": +double: 1 +float: 2 + +Function: "atan2_upward": +double: 1 +float: 1 + +Function: "atan_downward": +double: 1 +float: 2 + +Function: "atan_towardzero": +double: 1 +float: 1 + +Function: "atan_upward": +double: 1 +float: 2 + +Function: "atanh": +double: 2 +float: 2 + +Function: "atanh_downward": +double: 3 +float: 3 + +Function: "atanh_towardzero": +double: 2 +float: 2 + +Function: "atanh_upward": +double: 3 +float: 3 + +Function: "cabs": +double: 1 + +Function: "cabs_downward": +double: 1 + +Function: "cabs_towardzero": +double: 1 + +Function: "cabs_upward": +double: 1 +float: 1 + +Function: Real part of "cacos": +double: 1 +float: 2 + +Function: Imaginary part of "cacos": +double: 2 +float: 2 + +Function: Real part of "cacos_downward": +double: 3 +float: 2 + +Function: Imaginary part of "cacos_downward": +double: 5 +float: 3 + +Function: Real part of "cacos_towardzero": +double: 3 +float: 2 + +Function: Imaginary part of "cacos_towardzero": +double: 4 +float: 2 + +Function: Real part of "cacos_upward": +double: 2 +float: 2 + +Function: Imaginary part of "cacos_upward": +double: 5 +float: 5 + +Function: Real part of "cacosh": +double: 2 +float: 2 + +Function: Imaginary part of "cacosh": +double: 1 +float: 2 + +Function: Real part of "cacosh_downward": +double: 4 +float: 2 + +Function: Imaginary part of "cacosh_downward": +double: 3 +float: 3 + +Function: Real part of "cacosh_towardzero": +double: 4 +float: 2 + +Function: Imaginary part of "cacosh_towardzero": +double: 3 +float: 2 + +Function: Real part of "cacosh_upward": +double: 4 +float: 3 + +Function: Imaginary part of "cacosh_upward": +double: 3 +float: 2 + +Function: "carg": +float: 1 + +Function: "carg_downward": +double: 1 +float: 2 + +Function: "carg_towardzero": +double: 1 +float: 2 + +Function: "carg_upward": +double: 1 +float: 1 + +Function: Real part of "casin": +double: 1 +float: 1 + +Function: Imaginary part of "casin": +double: 2 +float: 2 + +Function: Real part of "casin_downward": +double: 3 +float: 2 + +Function: Imaginary part of "casin_downward": +double: 5 +float: 3 + +Function: Real part of "casin_towardzero": +double: 3 +float: 1 + +Function: Imaginary part of "casin_towardzero": +double: 4 +float: 2 + +Function: Real part of "casin_upward": +double: 3 +float: 2 + +Function: Imaginary part of "casin_upward": +double: 5 +float: 5 + +Function: Real part of "casinh": +double: 2 +float: 2 + +Function: Imaginary part of "casinh": +double: 1 +float: 1 + +Function: Real part of "casinh_downward": +double: 5 +float: 3 + +Function: Imaginary part of "casinh_downward": +double: 3 +float: 2 + +Function: Real part of "casinh_towardzero": +double: 4 +float: 2 + +Function: Imaginary part of "casinh_towardzero": +double: 3 +float: 1 + +Function: Real part of "casinh_upward": +double: 5 +float: 5 + +Function: Imaginary part of "casinh_upward": +double: 3 +float: 2 + +Function: Real part of "catan": +double: 1 +float: 1 + +Function: Imaginary part of "catan": +double: 1 +float: 1 + +Function: Real part of "catan_downward": +double: 1 +float: 2 + +Function: Imaginary part of "catan_downward": +double: 2 +float: 2 + +Function: Real part of "catan_towardzero": +double: 1 +float: 2 + +Function: Imaginary part of "catan_towardzero": +double: 2 +float: 2 + +Function: Real part of "catan_upward": +double: 1 +float: 1 + +Function: Imaginary part of "catan_upward": +double: 2 +float: 2 + +Function: Real part of "catanh": +double: 1 +float: 1 + +Function: Imaginary part of "catanh": +double: 1 +float: 1 + +Function: Real part of "catanh_downward": +double: 2 +float: 2 + +Function: Imaginary part of "catanh_downward": +double: 1 +float: 2 + +Function: Real part of "catanh_towardzero": +double: 2 +float: 2 + +Function: Imaginary part of "catanh_towardzero": +double: 1 +float: 2 + +Function: Real part of "catanh_upward": +double: 4 +float: 4 + +Function: Imaginary part of "catanh_upward": +double: 1 +float: 1 + +Function: "cbrt": +double: 4 +float: 1 + +Function: "cbrt_downward": +double: 4 +float: 1 + +Function: "cbrt_towardzero": +double: 3 +float: 1 + +Function: "cbrt_upward": +double: 5 +float: 1 + +Function: Real part of "ccos": +double: 1 +float: 1 + +Function: Imaginary part of "ccos": +double: 1 +float: 1 + +Function: Real part of "ccos_downward": +double: 1 +float: 1 + +Function: Imaginary part of "ccos_downward": +double: 3 +float: 3 + +Function: Real part of "ccos_towardzero": +double: 1 +float: 2 + +Function: Imaginary part of "ccos_towardzero": +double: 3 +float: 3 + +Function: Real part of "ccos_upward": +double: 1 +float: 2 + +Function: Imaginary part of "ccos_upward": +double: 2 +float: 2 + +Function: Real part of "ccosh": +double: 1 +float: 1 + +Function: Imaginary part of "ccosh": +double: 1 +float: 1 + +Function: Real part of "ccosh_downward": +double: 2 +float: 2 + +Function: Imaginary part of "ccosh_downward": +double: 3 +float: 3 + +Function: Real part of "ccosh_towardzero": +double: 2 +float: 3 + +Function: Imaginary part of "ccosh_towardzero": +double: 3 +float: 3 + +Function: Real part of "ccosh_upward": +double: 1 +float: 2 + +Function: Imaginary part of "ccosh_upward": +double: 2 +float: 2 + +Function: Real part of "cexp": +double: 2 +float: 1 + +Function: Imaginary part of "cexp": +double: 1 +float: 2 + +Function: Real part of "cexp_downward": +double: 2 +float: 2 + +Function: Imaginary part of "cexp_downward": +double: 3 +float: 3 + +Function: Real part of "cexp_towardzero": +double: 2 +float: 2 + +Function: Imaginary part of "cexp_towardzero": +double: 3 +float: 3 + +Function: Real part of "cexp_upward": +double: 2 +float: 2 + +Function: Imaginary part of "cexp_upward": +double: 3 +float: 2 + +Function: Real part of "clog": +double: 3 +float: 3 + +Function: Imaginary part of "clog": +double: 1 +float: 1 + +Function: Real part of "clog10": +double: 3 +float: 4 + +Function: Imaginary part of "clog10": +double: 2 +float: 2 + +Function: Real part of "clog10_downward": +double: 5 +float: 5 + +Function: Imaginary part of "clog10_downward": +double: 2 +float: 4 + +Function: Real part of "clog10_towardzero": +double: 5 +float: 6 + +Function: Imaginary part of "clog10_towardzero": +double: 2 +float: 4 + +Function: Real part of "clog10_upward": +double: 6 +float: 5 + +Function: Imaginary part of "clog10_upward": +double: 2 +float: 4 + +Function: Real part of "clog_downward": +double: 4 +float: 3 + +Function: Imaginary part of "clog_downward": +double: 1 +float: 2 + +Function: Real part of "clog_towardzero": +double: 4 +float: 4 + +Function: Imaginary part of "clog_towardzero": +double: 1 +float: 3 + +Function: Real part of "clog_upward": +double: 4 +float: 3 + +Function: Imaginary part of "clog_upward": +double: 1 +float: 2 + +Function: "cos": +double: 1 +float: 1 + +Function: "cos_downward": +double: 1 +float: 1 + +Function: "cos_towardzero": +double: 1 +float: 1 + +Function: "cos_upward": +double: 1 +float: 1 + +Function: "cosh": +double: 2 +float: 2 + +Function: "cosh_downward": +double: 3 +float: 2 + +Function: "cosh_towardzero": +double: 3 +float: 2 + +Function: "cosh_upward": +double: 2 +float: 2 + +Function: Real part of "cpow": +double: 2 +float: 5 + +Function: Imaginary part of "cpow": +float: 2 + +Function: Real part of "cpow_downward": +double: 5 +float: 8 + +Function: Imaginary part of "cpow_downward": +double: 1 +float: 2 + +Function: Real part of "cpow_towardzero": +double: 5 +float: 8 + +Function: Imaginary part of "cpow_towardzero": +double: 1 +float: 2 + +Function: Real part of "cpow_upward": +double: 4 +float: 1 + +Function: Imaginary part of "cpow_upward": +double: 1 +float: 2 + +Function: Real part of "csin": +double: 1 +float: 1 + +Function: Real part of "csin_downward": +double: 3 +float: 3 + +Function: Imaginary part of "csin_downward": +double: 1 +float: 1 + +Function: Real part of "csin_towardzero": +double: 3 +float: 3 + +Function: Imaginary part of "csin_towardzero": +double: 1 +float: 1 + +Function: Real part of "csin_upward": +double: 2 +float: 2 + +Function: Imaginary part of "csin_upward": +double: 1 +float: 2 + +Function: Real part of "csinh": +float: 1 + +Function: Imaginary part of "csinh": +double: 1 +float: 1 + +Function: Real part of "csinh_downward": +double: 2 +float: 1 + +Function: Imaginary part of "csinh_downward": +double: 3 +float: 3 + +Function: Real part of "csinh_towardzero": +double: 2 +float: 2 + +Function: Imaginary part of "csinh_towardzero": +double: 3 +float: 3 + +Function: Real part of "csinh_upward": +double: 1 +float: 2 + +Function: Imaginary part of "csinh_upward": +double: 2 +float: 2 + +Function: Real part of "csqrt": +double: 2 +float: 2 + +Function: Imaginary part of "csqrt": +double: 2 +float: 2 + +Function: Real part of "csqrt_downward": +double: 5 +float: 4 + +Function: Imaginary part of "csqrt_downward": +double: 4 +float: 3 + +Function: Real part of "csqrt_towardzero": +double: 4 +float: 3 + +Function: Imaginary part of "csqrt_towardzero": +double: 4 +float: 3 + +Function: Real part of "csqrt_upward": +double: 5 +float: 4 + +Function: Imaginary part of "csqrt_upward": +double: 3 +float: 3 + +Function: Real part of "ctan": +double: 1 +float: 1 + +Function: Imaginary part of "ctan": +double: 2 +float: 2 + +Function: Real part of "ctan_downward": +double: 6 +float: 5 + +Function: Imaginary part of "ctan_downward": +double: 2 +float: 2 + +Function: Real part of "ctan_towardzero": +double: 5 +float: 2 + +Function: Imaginary part of "ctan_towardzero": +double: 2 +float: 2 + +Function: Real part of "ctan_upward": +double: 2 +float: 4 + +Function: Imaginary part of "ctan_upward": +double: 1 +float: 2 + +Function: Real part of "ctanh": +double: 2 +float: 2 + +Function: Imaginary part of "ctanh": +double: 2 +float: 2 + +Function: Real part of "ctanh_downward": +double: 2 +float: 2 + +Function: Imaginary part of "ctanh_downward": +double: 6 +float: 5 + +Function: Real part of "ctanh_towardzero": +double: 2 +float: 2 + +Function: Imaginary part of "ctanh_towardzero": +double: 5 +float: 2 + +Function: Real part of "ctanh_upward": +double: 1 +float: 2 + +Function: Imaginary part of "ctanh_upward": +double: 3 +float: 3 + +Function: "erf": +double: 1 +float: 1 + +Function: "erf_downward": +double: 1 +float: 1 + +Function: "erf_towardzero": +double: 1 +float: 1 + +Function: "erf_upward": +double: 1 +float: 1 + +Function: "erfc": +double: 3 +float: 3 + +Function: "erfc_downward": +double: 4 +float: 4 + +Function: "erfc_towardzero": +double: 3 +float: 3 + +Function: "erfc_upward": +double: 4 +float: 4 + +Function: "exp": +double: 1 +float: 1 + +Function: "exp10": +double: 2 +float: 1 + +Function: "exp10_downward": +double: 3 +float: 1 + +Function: "exp10_towardzero": +double: 3 +float: 1 + +Function: "exp10_upward": +double: 2 +float: 1 + +Function: "exp2": +double: 1 + +Function: "exp2_downward": +double: 1 +float: 1 + +Function: "exp2_towardzero": +double: 1 +float: 1 + +Function: "exp2_upward": +double: 1 +float: 1 + +Function: "exp_downward": +double: 1 +float: 1 + +Function: "exp_towardzero": +double: 1 +float: 1 + +Function: "exp_upward": +double: 1 +float: 1 + +Function: "expm1": +double: 1 +float: 1 + +Function: "expm1_downward": +double: 1 +float: 1 + +Function: "expm1_towardzero": +double: 1 +float: 2 + +Function: "expm1_upward": +double: 1 +float: 1 + +Function: "gamma": +double: 4 +float: 7 + +Function: "gamma_downward": +double: 4 +float: 4 + +Function: "gamma_towardzero": +double: 4 +float: 3 + +Function: "gamma_upward": +double: 4 +float: 5 + +Function: "hypot": +double: 1 +float: 1 + +Function: "hypot_downward": +double: 1 +float: 1 + +Function: "hypot_towardzero": +double: 1 +float: 1 + +Function: "hypot_upward": +double: 1 +float: 1 + +Function: "j0": +double: 4 +float: 9 + +Function: "j0_downward": +double: 6 +float: 8 + +Function: "j0_towardzero": +double: 4 +float: 9 + +Function: "j0_upward": +double: 4 +float: 9 + +Function: "j1": +double: 3 +float: 9 + +Function: "j1_downward": +double: 9 +float: 9 + +Function: "j1_towardzero": +double: 5 +float: 9 + +Function: "j1_upward": +double: 5 +float: 8 + +Function: "jn": +double: 4 +float: 4 + +Function: "jn_downward": +double: 4 +float: 5 + +Function: "jn_towardzero": +double: 4 +float: 5 + +Function: "jn_upward": +double: 5 +float: 5 + +Function: "lgamma": +double: 4 +float: 7 + +Function: "lgamma_downward": +double: 4 +float: 4 + +Function: "lgamma_towardzero": +double: 4 +float: 3 + +Function: "lgamma_upward": +double: 4 +float: 5 + +Function: "log": +double: 1 + +Function: "log10": +double: 2 +float: 2 + +Function: "log10_downward": +double: 2 +float: 3 + +Function: "log10_towardzero": +double: 2 +float: 2 + +Function: "log10_upward": +double: 2 +float: 2 + +Function: "log1p": +double: 1 +float: 1 + +Function: "log1p_downward": +double: 1 +float: 2 + +Function: "log1p_towardzero": +double: 2 +float: 2 + +Function: "log1p_upward": +double: 2 +float: 2 + +Function: "log2": +double: 2 +float: 1 + +Function: "log2_downward": +double: 1 +float: 1 + +Function: "log2_towardzero": +double: 1 +float: 1 + +Function: "log2_upward": +double: 1 +float: 1 + +Function: "log_downward": +double: 1 +float: 1 + +Function: "log_towardzero": +double: 1 +float: 1 + +Function: "log_upward": +double: 1 +float: 1 + +Function: "pow": +double: 1 + +Function: "pow_downward": +double: 1 +float: 1 + +Function: "pow_towardzero": +double: 1 +float: 1 + +Function: "pow_upward": +double: 1 +float: 1 + +Function: "sin": +double: 1 +float: 1 + +Function: "sin_downward": +double: 1 +float: 1 + +Function: "sin_towardzero": +double: 1 +float: 1 + +Function: "sin_upward": +double: 1 +float: 1 + +Function: "sincos": +double: 1 +float: 1 + +Function: "sincos_downward": +double: 1 +float: 1 + +Function: "sincos_towardzero": +double: 1 +float: 1 + +Function: "sincos_upward": +double: 1 +float: 1 + +Function: "sinh": +double: 2 +float: 2 + +Function: "sinh_downward": +double: 3 +float: 3 + +Function: "sinh_towardzero": +double: 3 +float: 2 + +Function: "sinh_upward": +double: 3 +float: 3 + +Function: "tan": +float: 1 + +Function: "tan_downward": +double: 1 +float: 2 + +Function: "tan_towardzero": +double: 1 +float: 1 + +Function: "tan_upward": +double: 1 +float: 1 + +Function: "tanh": +double: 2 +float: 2 + +Function: "tanh_downward": +double: 3 +float: 3 + +Function: "tanh_towardzero": +double: 2 +float: 2 + +Function: "tanh_upward": +double: 3 +float: 3 + +Function: "tgamma": +double: 9 +float: 8 + +Function: "tgamma_downward": +double: 9 +float: 7 + +Function: "tgamma_towardzero": +double: 9 +float: 7 + +Function: "tgamma_upward": +double: 8 +float: 8 + +Function: "y0": +double: 3 +float: 8 + +Function: "y0_downward": +double: 3 +float: 8 + +Function: "y0_towardzero": +double: 3 +float: 8 + +Function: "y0_upward": +double: 2 +float: 8 + +Function: "y1": +double: 3 +float: 9 + +Function: "y1_downward": +double: 6 +float: 8 + +Function: "y1_towardzero": +double: 3 +float: 9 + +Function: "y1_upward": +double: 6 +float: 9 + +Function: "yn": +double: 3 +float: 3 + +Function: "yn_downward": +double: 3 +float: 4 + +Function: "yn_towardzero": +double: 3 +float: 3 + +Function: "yn_upward": +double: 4 +float: 5 + +# end of automatic generation diff --git a/sysdeps/arc/arc64/fpu/libm-test-ulps-name b/sysdeps/arc/arc64/fpu/libm-test-ulps-name new file mode 100644 index 0000000000..8c4fba4f9a --- /dev/null +++ b/sysdeps/arc/arc64/fpu/libm-test-ulps-name @@ -0,0 +1 @@ +ARC diff --git a/sysdeps/arc/nofpu/libm-test-ulps b/sysdeps/arc/arc64/nofpu/libm-test-ulps similarity index 99% copy from sysdeps/arc/nofpu/libm-test-ulps copy to sysdeps/arc/arc64/nofpu/libm-test-ulps index 6ac2830b25..26632ff8f2 100644 --- a/sysdeps/arc/nofpu/libm-test-ulps +++ b/sysdeps/arc/arc64/nofpu/libm-test-ulps @@ -205,6 +205,7 @@ float: 7 Function: "hypot": double: 1 +float: 1 Function: "j0": double: 2 diff --git a/sysdeps/arc/arc64/nofpu/libm-test-ulps-name b/sysdeps/arc/arc64/nofpu/libm-test-ulps-name new file mode 100644 index 0000000000..8a9879ebd6 --- /dev/null +++ b/sysdeps/arc/arc64/nofpu/libm-test-ulps-name @@ -0,0 +1 @@ +ARC soft-float diff --git a/sysdeps/arc/atomic-machine.h b/sysdeps/arc/atomic-machine.h index 6ac3d87dd9..f1565b317b 100644 --- a/sysdeps/arc/atomic-machine.h +++ b/sysdeps/arc/atomic-machine.h @@ -19,7 +19,23 @@ #ifndef _ARC_BITS_ATOMIC_H #define _ARC_BITS_ATOMIC_H 1 -#define __HAVE_64B_ATOMICS 0 +#include + +typedef int32_t atomic32_t; +typedef uint32_t uatomic32_t; +typedef int64_t atomic64_t; +typedef uint64_t uatomic64_t; + +typedef intptr_t atomicptr_t; +typedef uintptr_t uatomicptr_t; +typedef intmax_t atomic_max_t; +typedef uintmax_t uatomic_max_t; + +# if defined(__ARC64_ARCH64__) +# define __HAVE_64B_ATOMICS 1 +# else +# define __HAVE_64B_ATOMICS 0 +# endif #define USE_ATOMIC_COMPILER_BUILTINS 1 /* ARC does have legacy atomic EX reg, [mem] instruction but the micro-arch @@ -30,15 +46,16 @@ (abort (), 0) #define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \ (abort (), 0) -#define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \ - (abort (), 0) + +# if !defined(__ARC64__) +# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \ + (abort (), 0) +#endif #define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \ (abort (), (__typeof (*mem)) 0) #define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \ (abort (), (__typeof (*mem)) 0) -#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ - (abort (), (__typeof (*mem)) 0) #define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \ ({ \ @@ -48,6 +65,20 @@ __oldval; \ }) +# if defined(__ARC64__) +# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ + ({ \ + typeof (*mem) __oldval = (oldval); \ + __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \ + model, __ATOMIC_RELAXED); \ + __oldval; \ + }) +# else +/* ARCv2 has LOCKD/SCOND but not sure if gcc atomic builtins exist. */ +# define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \ + (abort (), (__typeof (*mem)) 0) +#endif + #define atomic_compare_and_exchange_val_acq(mem, new, old) \ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ mem, new, old, __ATOMIC_ACQUIRE) diff --git a/sysdeps/arc/bits/setjmp.h b/sysdeps/arc/bits/setjmp.h index d1604cde1f..2ca85a679d 100644 --- a/sysdeps/arc/bits/setjmp.h +++ b/sysdeps/arc/bits/setjmp.h @@ -20,7 +20,11 @@ #define _ARC_BITS_SETJMP_H 1 /* Saves r13-r25 (callee-saved), fp (frame pointer), sp (stack pointer), - blink (branch-n-link). */ + blink (branch-n-link), FP regs. */ +#if defined (__ARC_FLOAT_ABI_HARD__) +typedef long int __jmp_buf[64]; +#else typedef long int __jmp_buf[32]; +#endif #endif diff --git a/sysdeps/arc/configure b/sysdeps/arc/configure index 7b27e26490..d7b19db793 100644 --- a/sysdeps/arc/configure +++ b/sysdeps/arc/configure @@ -10,7 +10,7 @@ libc_cv_asm_line_sep='`' printf "%s\n" "#define ASM_LINE_SEP $libc_cv_asm_line_sep" >>confdefs.h -# For big endian ABI, generate a symbol for selecting right dynamic linker +# For arc64:64 generate a symbol for selecting right dynamic linker { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5 @@ -155,6 +155,77 @@ printf "%s\n" "$ac_cv_path_EGREP" >&6; } EGREP="$ac_cv_path_EGREP" +{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for arc64" >&5 +printf %s "checking for arc64... " >&6; } +if test ${libc_cv_arc64+y} +then : + printf %s "(cached) " >&6 +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#ifdef __ARC64_ARCH64__ + yes + #endif + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1 +then : + libc_cv_arc64=yes +else $as_nop + libc_cv_arc64=no +fi +rm -rf conftest* + +fi +{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_arc64" >&5 +printf "%s\n" "$libc_cv_arc64" >&6; } +if test $libc_cv_arc64 = yes; then + # For shlib-versions. + printf "%s\n" "#define HAVE_ARC64 1" >>confdefs.h + + config_vars="$config_vars +default-abi = arc64le" + +else + +# For arc64:32 generate a symbol for selecting right dynamic linker +{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for arc32" >&5 +printf %s "checking for arc32... " >&6; } +if test ${libc_cv_arc32+y} +then : + printf %s "(cached) " >&6 +else $as_nop + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#ifdef __ARC64_ARCH32__ + yes + #endif + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "yes" >/dev/null 2>&1 +then : + libc_cv_arc32=yes +else $as_nop + libc_cv_arc32=no +fi +rm -rf conftest* + +fi +{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $libc_cv_arc32" >&5 +printf "%s\n" "$libc_cv_arc32" >&6; } + +if test $libc_cv_arc32 = yes; then + # For shlib-versions. + printf "%s\n" "#define HAVE_ARC32 1" >>confdefs.h + + config_vars="$config_vars +default-abi = arc32le" + +else + +# For big endian ABI, generate a symbol for selecting right dynamic linker { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for big endian" >&5 printf %s "checking for big endian... " >&6; } if test ${libc_cv_arc_be+y} @@ -189,5 +260,12 @@ default-abi = arcbe" else config_vars="$config_vars default-abi = arcle" +# big endian +fi + +# arc64:32 +fi + +# arc64:64 fi diff --git a/sysdeps/arc/configure.ac b/sysdeps/arc/configure.ac index 619da4e088..4e84f17105 100644 --- a/sysdeps/arc/configure.ac +++ b/sysdeps/arc/configure.ac @@ -9,6 +9,35 @@ libc_cv_have_sdata_section=no libc_cv_asm_line_sep='`' AC_DEFINE_UNQUOTED(ASM_LINE_SEP, $libc_cv_asm_line_sep) +# For arc64:64 generate a symbol for selecting right dynamic linker +AC_CACHE_CHECK([for arc64], + [libc_cv_arc64], + [AC_EGREP_CPP(yes,[#ifdef __ARC64_ARCH64__ + yes + #endif + ], libc_cv_arc64=yes, libc_cv_arc64=no)]) +if test $libc_cv_arc64 = yes; then + # For shlib-versions. + AC_DEFINE(HAVE_ARC64) + LIBC_CONFIG_VAR([default-abi], [arc64le]) + +else + +# For arc64:32 generate a symbol for selecting right dynamic linker +AC_CACHE_CHECK([for arc32], + [libc_cv_arc32], + [AC_EGREP_CPP(yes,[#ifdef __ARC64_ARCH32__ + yes + #endif + ], libc_cv_arc32=yes, libc_cv_arc32=no)]) + +if test $libc_cv_arc32 = yes; then + # For shlib-versions. + AC_DEFINE(HAVE_ARC32) + LIBC_CONFIG_VAR([default-abi], [arc32le]) + +else + # For big endian ABI, generate a symbol for selecting right dynamic linker AC_CACHE_CHECK([for big endian], [libc_cv_arc_be], @@ -22,4 +51,11 @@ if test $libc_cv_arc_be = yes; then LIBC_CONFIG_VAR([default-abi], [arcbe]) else LIBC_CONFIG_VAR([default-abi], [arcle]) +# big endian +fi + +# arc64:32 +fi + +# arc64:64 fi diff --git a/sysdeps/arc/dl-machine.h b/sysdeps/arc/dl-machine.h index 4dc652a449..dbb7394c27 100644 --- a/sysdeps/arc/dl-machine.h +++ b/sysdeps/arc/dl-machine.h @@ -32,18 +32,19 @@ #include #include #include +#include /* Dynamic Linking ABI for ARCv2 ISA. - PLT + .plt -------------------------------- <---- DT_PLTGOT | ld r11, [pcl, off-to-GOT[1] | 0 | | 4 - plt0 | ld r10, [pcl, off-to-GOT[2] | 8 + PLT0 | ld r10, [pcl, off-to-GOT[2] | 8 | | 12 | j [r10] | 16 -------------------------------- - | Base address of GOT | 20 + | Base address of .got.plt | 20 -------------------------------- | ld r12, [pcl, off-to-GOT[3] | 24 plt1 | | @@ -69,11 +70,11 @@ -------------- | [1] | Module info - setup by ld.so -------------- - | [2] | resolver entry point + | [2] | resolver entry point: _dl_runtime_resolve -------------- | [3] | | ... | Runtime address for function symbols - | [f] | + | [f] | Initially point to PLT0 -------------- For ARCompact, the PLT is 12 bytes due to short instructions @@ -91,6 +92,8 @@ static inline int elf_machine_matches_host (const ElfW(Ehdr) *ehdr) { return (ehdr->e_machine == EM_ARCV2 /* ARC HS. */ + || ehdr->e_machine == EM_ARCV3 /* ARCv3: ARC64. */ + || ehdr->e_machine == EM_ARCV3_32 /* ARCv3: ARC32. */ || ehdr->e_machine == EM_ARC_COMPACT); /* ARC 700. */ } @@ -114,7 +117,7 @@ elf_machine_load_address (void) /* For build address, below generates ld r0, [pcl, _GLOBAL_OFFSET_TABLE_@pcl]. */ build_addr = elf_machine_dynamic (); - __asm__ ("add %0, pcl, _DYNAMIC@pcl \n" : "=r" (run_addr)); + __asm__ ("ADDR %0, pcl, _DYNAMIC@pcl \n" : "=r" (run_addr)); return run_addr - build_addr; } @@ -131,10 +134,13 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[], if (l->l_info[DT_JMPREL] && lazy) { - /* On ARC DT_PLTGOT point to .plt whose 5th word (after the PLT header) - contains the address of .got. */ + /* update .got.plt[1] and .got.plt[2]. + DT_PLTGOT point to base of .plt and PLT0 is 3 instructions + for total of 20 bytes, see illustration at top. + The word right after contains base address of .got.plt. */ ElfW(Addr) *plt_base = (ElfW(Addr) *) D_PTR (l, l_info[DT_PLTGOT]); - ElfW(Addr) *got = (ElfW(Addr) *) (plt_base[5] + l->l_addr); + ElfW(Addr) *got_build = (ElfW(Addr) *) ((uintptr_t)plt_base + 20); + ElfW(Addr) *got = (ElfW(Addr) *) (*got_build + l->l_addr); got[1] = (ElfW(Addr)) l; /* Identify this shared object. */ @@ -152,6 +158,8 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[], -optionally adjusts argc for executable if exec passed as cmd -calls into app main with address of finaliser. */ +#ifdef __ARC64_ARCH64__ + #define RTLD_START asm ("\ .text \n\ .globl __start \n\ @@ -159,25 +167,55 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[], __start: \n\ /* (1). bootstrap ld.so. */ \n\ bl.d _dl_start \n\ - mov_s r0, sp /* pass ptr to aux vector tbl. */ \n\ - mov r13, r0 /* safekeep app elf entry point. */ \n\ - ld_s r1, [sp] /* orig argc. */ \n\ + MOVR r0, sp /* pass ptr to aux vector tbl. */ \n\ + MOVR r14, r0 /* safekeep app elf entry point. */ \n\ + LDR r1, sp /* orig argc. */ \n\ \n\ /* (2). call preinit stuff. */ \n\ - ld r0, [pcl, _rtld_local@pcl] \n\ - add r2, sp, 4 ; argv \n\ - add2 r3, r2, r1 \n\ - add r3, r3, 4 ; env \n\ + LDR r0, pcl, _rtld_local@pcl \n\ + ADDR r2, sp, 8 ; argv \n\ + ADD3R r3, r2, r1 \n\ + ADDR r3, r3, 8 ; env \n\ bl _dl_init@plt \n\ \n\ /* (3) call app elf entry point. */ \n\ - add r0, pcl, _dl_fini@pcl \n\ - j [r13] \n\ + ADDR r0, pcl, _dl_fini@pcl \n\ + j [r14] \n\ \n\ .size __start,.-__start \n\ .previous \n\ "); +#else + +#define RTLD_START asm ("\ +.text \n\ +.globl __start \n\ +.type __start, @function \n\ +__start: \n\ + /* (1). bootstrap ld.so. */ \n\ + bl.d _dl_start \n\ + MOVR r0, sp /* pass ptr to aux vector tbl. */ \n\ + MOVR r14, r0 /* safekeep app elf entry point. */ \n\ + LDR r1, sp /* orig argc. */ \n\ + \n\ + /* (2). call preinit stuff. */ \n\ + LDR r0, pcl, _rtld_local@pcl \n\ + ADDR r2, sp, 4 ; argv \n\ + ADD2R r3, r2, r1 \n\ + ADDR r3, r3, 4 ; env \n\ + bl _dl_init@plt \n\ + \n\ + /* (3) call app elf entry point. */ \n\ + ADDR r0, pcl, _dl_fini@pcl \n\ + j [r14] \n\ + \n\ + .size __start,.-__start \n\ + .previous \n\ +"); + +#endif + /* ELF_RTYPE_CLASS_PLT iff TYPE describes relocation of a PLT entry, so PLT entries should not be allowed to define the value. ELF_RTYPE_CLASS_NOCOPY iff TYPE should not be allowed to resolve to one @@ -289,6 +327,7 @@ elf_machine_rela (struct link_map *map, struct r_scope_elem *scope[], break; case R_ARC_32: + case R_ARC_64: *reloc_addr += value + reloc->r_addend; break; diff --git a/sysdeps/arc/dl-trampoline.S b/sysdeps/arc/dl-trampoline.S index 1b307a616f..386009d41e 100644 --- a/sysdeps/arc/dl-trampoline.S +++ b/sysdeps/arc/dl-trampoline.S @@ -31,42 +31,71 @@ ENTRY (_dl_runtime_resolve) /* save args to func being resolved before entering resolver. */ - push_s r0 - push_s r1 - push_s r2 - push_s r3 - st.a r4, [sp, -4] - st.a r5, [sp, -4] - st.a r6, [sp, -4] - st.a r7, [sp, -4] - st.a r8, [sp, -4] - st.a r9, [sp, -4] - cfi_adjust_cfa_offset (40) - push_s blink - cfi_adjust_cfa_offset (4) + PUSHR r0 + PUSHR r1 + PUSHR r2 + PUSHR r3 + PUSHR r4 + PUSHR r5 + PUSHR r6 + PUSHR r7 + PUSHR r8 + PUSHR r9 + +#if defined (__ARC_FLOAT_ABI_HARD__) + FPUSHR f0 + FPUSHR f1 + FPUSHR f2 + FPUSHR f3 + FPUSHR f4 + FPUSHR f5 + FPUSHR f6 + FPUSHR f7 + cfi_adjust_cfa_offset (18*REGSZ) +#else + cfi_adjust_cfa_offset (10*REGSZ) +#endif + + PUSHR blink + cfi_adjust_cfa_offset (REGSZ) cfi_rel_offset (blink, 0) - mov_s r1, r12 + MOVR r1, r12 bl.d _dl_fixup - mov r0, r11 + MOVR r0, r11 /* restore regs back. */ - ld.ab blink,[sp, 4] - cfi_adjust_cfa_offset (-4) + POPR blink + cfi_adjust_cfa_offset (-REGSZ) cfi_restore (blink) - ld.ab r9, [sp, 4] - ld.ab r8, [sp, 4] - ld.ab r7, [sp, 4] - ld.ab r6, [sp, 4] - ld.ab r5, [sp, 4] - ld.ab r4, [sp, 4] - pop_s r3 - pop_s r2 - pop_s r1 - cfi_adjust_cfa_offset (-36) - j_s.d [r0] /* r0 has resolved function addr. */ - pop_s r0 /* restore first arg to resolved call. */ - cfi_adjust_cfa_offset (-4) +#if defined (__ARC_FLOAT_ABI_HARD__) + FPOPR f7 + FPOPR f6 + FPOPR f5 + FPOPR f4 + FPOPR f3 + FPOPR f2 + FPOPR f1 + FPOPR f0 +#endif + POPR r9 + POPR r8 + POPR r7 + POPR r6 + POPR r5 + POPR r4 + POPR r3 + POPR r2 + POPR r1 +#if defined (__ARC_FLOAT_ABI_HARD__) + cfi_adjust_cfa_offset (-17*REGSZ) +#else + cfi_adjust_cfa_offset (-9*REGSZ) +#endif + + j.d [r0] /* r0 has resolved function addr. */ + POPR r0 /* restore first arg to resolved call. */ + cfi_adjust_cfa_offset (-REGSZ) cfi_restore (r0) END (_dl_runtime_resolve) diff --git a/sysdeps/arc/fpu/math-use-builtins-fma.h b/sysdeps/arc/fpu/math-use-builtins-fma.h index 2acd8113ce..59c7ed0343 100644 --- a/sysdeps/arc/fpu/math-use-builtins-fma.h +++ b/sysdeps/arc/fpu/math-use-builtins-fma.h @@ -1,13 +1,17 @@ -#if defined __ARC_FPU_DP_FMA__ +#if defined __ARCV3__ # define USE_FMA_BUILTIN 1 -#else -# define USE_FMA_BUILTIN 0 -#endif - -#if defined __ARC_FPU_SP_FMA__ # define USE_FMAF_BUILTIN 1 #else -# define USE_FMAF_BUILTIN 0 +# if defined __ARC_FPU_DP_FMA__ +# define USE_FMA_BUILTIN 1 +# else +# define USE_FMA_BUILTIN 0 +# endif +# if defined __ARC_FPU_SP_FMA__ +# define USE_FMAF_BUILTIN 1 +# else +# define USE_FMAF_BUILTIN 0 +# endif #endif #define USE_FMAL_BUILTIN 0 diff --git a/sysdeps/arc/fpu/math-use-builtins-sqrt.h b/sysdeps/arc/fpu/math-use-builtins-sqrt.h index a449bc6092..40a07730ea 100644 --- a/sysdeps/arc/fpu/math-use-builtins-sqrt.h +++ b/sysdeps/arc/fpu/math-use-builtins-sqrt.h @@ -1,13 +1,17 @@ -#if defined __ARC_FPU_DP_DIV__ +#if defined __ARCV3__ # define USE_SQRT_BUILTIN 1 -#else -# define USE_SQRT_BUILTIN 0 -#endif - -#if defined __ARC_FPU_SP_DIV__ # define USE_SQRTF_BUILTIN 1 #else -# define USE_SQRTF_BUILTIN 0 +# if defined __ARC_FPU_DP_DIV__ +# define USE_SQRT_BUILTIN 1 +# else +# define USE_SQRT_BUILTIN 0 +# endif +# if defined __ARC_FPU_SP_DIV__ +# define USE_SQRTF_BUILTIN 1 +# else +# define USE_SQRTF_BUILTIN 0 +# endif #endif #define USE_SQRTL_BUILTIN 0 diff --git a/sysdeps/arc/isa-asm-macro-32.h b/sysdeps/arc/isa-asm-macro-32.h new file mode 100644 index 0000000000..98cd249059 --- /dev/null +++ b/sysdeps/arc/isa-asm-macro-32.h @@ -0,0 +1,61 @@ +# define REGSZ 4 + +.irp aa,,.as +.macro LDR\aa d, s, off=0 + ld\aa \d, [\s, \off] +.endm +.endr + +.irp aa,,.as +.macro STR\aa d, s, off=0 + st\aa \d, [\s, \off] +.endm +.endr + +.macro PUSHR r + push \r +.endm + +.macro POPR r + pop \r +.endm + +.irp cc,,.f +.macro MOVR\cc d, s + mov\cc \d, \s +.endm +.endr + +.irp cc,,.nz +.macro ADDR\cc d, s, v + add\cc \d, \s, \v +.endm +.endr + +.macro ADD2R d, s, v + add2 \d, \s, \v +.endm + +.macro ADD3R d, s, v + add3 \d, \s, \v +.endm + +.macro SUBR d, s, v + sub \d, \s, \v +.endm + +.macro ANDR d, s, v + and \d, \s, \v +.endm + +.irp cc,,eq,hi +.macro BRR\cc d, s, v + br\cc \d, \s, \v +.endm +.endr + +.irp cc,,.ne +.macro CMPR\cc d, s + cmp\cc \d, \s +.endm +.endr diff --git a/sysdeps/arc/isa-asm-macro-64.h b/sysdeps/arc/isa-asm-macro-64.h new file mode 100644 index 0000000000..02b1dc2c37 --- /dev/null +++ b/sysdeps/arc/isa-asm-macro-64.h @@ -0,0 +1,86 @@ +# define REGSZ 8 + +.irp aa,,.as +.macro LDR\aa d, s, off=0 + ldl\aa \d, [\s, \off] +.endm +.endr + +.irp aa,,.as +.macro STR\aa d, s, off=0 + stl\aa \d, [\s, \off] +.endm +.endr + +.macro PUSHR r + pushl \r +.endm + +.macro POPR r + popl \r +.endm + +.irp cc,,.f +.macro MOVR\cc d, s + movl\cc \d, \s +.endm +.endr + +.irp cc,,.nz +.macro ADDR\cc d, s, v + addl\cc \d, \s, \v +.endm +.endr + +.macro ADD2R d, s, v + add2l \d, \s, \v +.endm + +.macro ADD3R d, s, v + add3l \d, \s, \v +.endm + +.macro SUBR d, s, v + subl \d, \s, \v +.endm + +.macro ANDR d, s, v + andl \d, \s, \v +.endm + +.irp cc,eq,hi +.macro BRR\cc d, s, v +; arc64 gas doesn't support BRHIL pseudo-instruction +.ifeqs "\cc","hi" + brlo\()l \s, \d, \v +.else + br\cc\()l \d, \s, \v +.endif +.endm +.endr + +.irp cc,,.ne +.macro CMPR\cc d, s + cmpl\cc \d, \s +.endm +.endr + +.irp aa,,.as,.aw,.ab +.macro FLDR\aa d, s, off=0 + fld64\aa \d, [\s, \off] +.endm +.endr + +.irp aa,,.as,.aw,.ab +.macro FSTR\aa d, s, off=0 + fst64\aa \d, [\s, \off] +.endm +.endr + +.macro FPUSHR r + FSTR.aw \r, sp, -REGSZ +.endm + +.macro FPOPR r + FLDR.ab \r, sp, REGSZ +.endm diff --git a/sysdeps/arc/isa-asm-macros.h b/sysdeps/arc/isa-asm-macros.h new file mode 100644 index 0000000000..f9f5e4f630 --- /dev/null +++ b/sysdeps/arc/isa-asm-macros.h @@ -0,0 +1,35 @@ +/* ISA Specific Assembler macros for ARC. + Copyright (C) 2020 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifdef __ASSEMBLER__ + +# ifdef __ARC64_ARCH64__ +# include +# else +# include +# endif + +#else + +# ifdef __ARC64_ARCH64__ +asm(".include \"sysdeps/arc/isa-asm-macro-64.h\"\n"); +# else +asm(".include \"sysdeps/arc/isa-asm-macro-32.h\"\n"); +# endif + +#endif diff --git a/sysdeps/arc/nofpu/libm-test-ulps b/sysdeps/arc/nofpu/libm-test-ulps index 6ac2830b25..26632ff8f2 100644 --- a/sysdeps/arc/nofpu/libm-test-ulps +++ b/sysdeps/arc/nofpu/libm-test-ulps @@ -205,6 +205,7 @@ float: 7 Function: "hypot": double: 1 +float: 1 Function: "j0": double: 2 diff --git a/sysdeps/arc/nptl/pthreaddef.h b/sysdeps/arc/nptl/pthreaddef.h index 336eded15c..3b51e59a35 100644 --- a/sysdeps/arc/nptl/pthreaddef.h +++ b/sysdeps/arc/nptl/pthreaddef.h @@ -23,7 +23,7 @@ #define ARCH_MIN_GUARD_SIZE 0 /* Required stack pointer alignment at beginning. */ -#define STACK_ALIGN 4 +#define STACK_ALIGN 8 /* Minimal stack size after allocating thread descriptor and guard size. */ #define MINIMAL_REST_STACK 2048 diff --git a/sysdeps/arc/preconfigure b/sysdeps/arc/preconfigure index a79db0239a..eab4af0eab 100644 --- a/sysdeps/arc/preconfigure +++ b/sysdeps/arc/preconfigure @@ -1,14 +1,22 @@ case "$machine" in arc*) - base_machine=arc - machine=arc + with_fp_cond=0 + isarc64=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep __LP64__| wc -l` + + case "$isarc64" in + 0) + base_machine=arc + machine=arc/arc32 + ;; + 1) + base_machine=arc + machine=arc/arc64 + ;; + esac gccfloat=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep __ARC_FPU_| wc -l` if test "$gccfloat" != "0"; then with_fp_cond=1 - else - with_fp_cond=0 fi ;; - esac diff --git a/sysdeps/arc/setjmp.S b/sysdeps/arc/setjmp.S index 9ecdb9daae..e39b526837 100644 --- a/sysdeps/arc/setjmp.S +++ b/sysdeps/arc/setjmp.S @@ -41,24 +41,47 @@ ENTRY (__sigsetjmp) that will be right next to this setjmp call-site in BLINK since "C" caller of this routine will do a branch-n-link. */ - STR (blink, r0, 0) - STR (sp, r0, 1) - STR (fp, r0, 2) - STR (gp, r0, 3) + STR.as blink, r0, 0 + STR.as sp, r0, 1 + STR.as fp, r0, 2 + STR.as gp, r0, 3 - STR (r13, r0, 4) - STR (r14, r0, 5) - STR (r15, r0, 6) - STR (r16, r0, 7) - STR (r17, r0, 8) - STR (r18, r0, 9) - STR (r19, r0, 10) - STR (r20, r0, 11) - STR (r21, r0, 12) - STR (r22, r0, 13) - STR (r23, r0, 14) - STR (r24, r0, 15) + STR.as r13, r0, 4 + STR.as r14, r0, 5 + STR.as r15, r0, 6 + STR.as r16, r0, 7 + STR.as r17, r0, 8 + STR.as r18, r0, 9 + STR.as r19, r0, 10 + STR.as r20, r0, 11 + STR.as r21, r0, 12 + STR.as r22, r0, 13 + STR.as r23, r0, 14 + STR.as r24, r0, 15 +#if defined(__ARCV3__) + STR.as r25, r0, 16 + STR.as r26, r0, 17 +#endif + +#if defined (__ARC_FLOAT_ABI_HARD__) + FSTR.as f16, r0, 18 + FSTR.as f17, r0, 19 + FSTR.as f18, r0, 20 + FSTR.as f19, r0, 21 + FSTR.as f20, r0, 22 + FSTR.as f21, r0, 23 + FSTR.as f22, r0, 24 + FSTR.as f23, r0, 25 + FSTR.as f24, r0, 26 + FSTR.as f25, r0, 27 + FSTR.as f26, r0, 28 + FSTR.as f27, r0, 29 + FSTR.as f28, r0, 30 + FSTR.as f29, r0, 31 + FSTR.as f30, r0, 32 + FSTR.as f31, r0, 33 +#endif b __sigjmp_save END (__sigsetjmp) diff --git a/sysdeps/arc/sfp-machine.h b/sysdeps/arc/sfp-machine.h index 0917a7ae17..4743b694a2 100644 --- a/sysdeps/arc/sfp-machine.h +++ b/sysdeps/arc/sfp-machine.h @@ -17,10 +17,12 @@ . */ -#define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long +#ifndef __ARC64__ + +# define _FP_W_TYPE_SIZE 32 +# define _FP_W_TYPE unsigned long +# define _FP_WS_TYPE signed long +# define _FP_I_TYPE long #define _FP_MUL_MEAT_S(R,X,Y) \ _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) @@ -67,4 +69,49 @@ R##_c = FP_CLS_NAN; \ } while (0) +#else + +# define _FP_W_TYPE_SIZE 64 +# define _FP_W_TYPE unsigned long long +# define _FP_WS_TYPE signed long long +# define _FP_I_TYPE long long + +# define _FP_MUL_MEAT_S(R, X, Y) \ + _FP_MUL_MEAT_1_imm (_FP_WFRACBITS_S, R, X, Y) +# define _FP_MUL_MEAT_D(R, X, Y) \ + _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_Q(R, X, Y) \ + _FP_MUL_MEAT_2_wide_3mul (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_MUL_MEAT_DW_S(R, X, Y) \ + _FP_MUL_MEAT_DW_1_imm (_FP_WFRACBITS_S, R, X, Y) +# define _FP_MUL_MEAT_DW_D(R, X, Y) \ + _FP_MUL_MEAT_DW_1_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +# define _FP_MUL_MEAT_DW_Q(R, X, Y) \ + _FP_MUL_MEAT_DW_2_wide_3mul (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +# define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_imm (S, R, X, Y, _FP_DIV_HELP_imm) +# define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_1_udiv_norm (D, R, X, Y) +# define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_2_udiv (Q, R, X, Y) + +# define _FP_NANFRAC_S _FP_QNANBIT_S +# define _FP_NANFRAC_D _FP_QNANBIT_D +# define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0 + +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 0 +#define _FP_QNANNEGATEDP 0 + +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + R##_s = _FP_NANSIGN_##fs; \ + _FP_FRAC_SET_##wc (R, _FP_NANFRAC_##fs); \ + R##_c = FP_CLS_NAN; \ + } while (0) + +#endif + #define _FP_TININESS_AFTER_ROUNDING 1 diff --git a/sysdeps/arc/start.S b/sysdeps/arc/start.S index db3bab6395..42ead9d302 100644 --- a/sysdeps/arc/start.S +++ b/sysdeps/arc/start.S @@ -57,12 +57,12 @@ ENTRY (ENTRY_POINT) cfi_undefined (blink) mov fp, 0 - ld_s r1, [sp] /* argc. */ + LDR r1, sp /* argc. */ - mov_s r5, r0 /* rltd_fini. */ - add_s r2, sp, 4 /* argv. */ - and sp, sp, -8 - mov r6, sp + MOVR r5, r0 /* rltd_fini. */ + ADDR r2, sp, REGSZ /* argv. */ + ANDR sp, sp, -2*REGSZ + MOVR r6, sp /* __libc_start_main (main, argc, argv, init, fini, rtld_fini, stack_end). */ @@ -70,10 +70,10 @@ ENTRY (ENTRY_POINT) mov r4, 0 /* Used to be fini. */ #ifdef SHARED - ld r0, [pcl, @main@gotpc] + LDR r0, pcl, @main@gotpc bl __libc_start_main@plt #else - mov_s r0, main + MOVR r0, main bl __libc_start_main #endif diff --git a/sysdeps/arc/sysdep.h b/sysdeps/arc/sysdep.h index 4f024f6b73..ba6ecddbac 100644 --- a/sysdeps/arc/sysdep.h +++ b/sysdeps/arc/sysdep.h @@ -47,7 +47,6 @@ # define CALL_MCOUNT /* Do nothing for now. */ -# define STR(reg, rbase, off) st reg, [rbase, off * 4] -# define LDR(reg, rbase, off) ld reg, [rbase, off * 4] - #endif /* __ASSEMBLER__ */ + +#include diff --git a/sysdeps/unix/sysv/linux/arc/Makefile b/sysdeps/unix/sysv/linux/arc/Makefile index eca9a9fd3a..00d655bcd3 100644 --- a/sysdeps/unix/sysv/linux/arc/Makefile +++ b/sysdeps/unix/sysv/linux/arc/Makefile @@ -12,11 +12,13 @@ sysdep_headers += sys/cachectl.h sysdep_routines += cacheflush endif -abi-variants := arcle arcbe +abi-variants := arcle arcbe arc32le arc64le ifeq (,$(filter $(default-abi),$(abi-variants))) $(error Unknown ABI $(default-abi), must be one of $(abi-variants)) endif -abi-arcle-condition := !defined __BIG_ENDIAN__ -abi-arcbe-condition := defined __BIG_ENDIAN__ +abi-arcle-condition := !defined __ARC64__ && !defined __BIG_ENDIAN__ +abi-arcbe-condition := !defined __ARC64__ && defined __BIG_ENDIAN__ +abi-arc32le-condition := defined __ARC64_ARCH32__ && !defined __BIG_ENDIAN__ +abi-arc64le-condition := defined __ARC64_ARCH64__ && !defined __BIG_ENDIAN__ diff --git a/sysdeps/unix/sysv/linux/arc/arc32/Implies b/sysdeps/unix/sysv/linux/arc/arc32/Implies new file mode 100644 index 0000000000..9670973cfa --- /dev/null +++ b/sysdeps/unix/sysv/linux/arc/arc32/Implies @@ -0,0 +1 @@ +unix/sysv/linux/arc diff --git a/sysdeps/unix/sysv/linux/arc/arch-syscall.h b/sysdeps/unix/sysv/linux/arc/arc32/arch-syscall.h similarity index 100% copy from sysdeps/unix/sysv/linux/arc/arch-syscall.h copy to sysdeps/unix/sysv/linux/arc/arc32/arch-syscall.h diff --git a/sysdeps/unix/sysv/linux/arc/c++-types.data b/sysdeps/unix/sysv/linux/arc/arc32/c++-types.data similarity index 100% copy from sysdeps/unix/sysv/linux/arc/c++-types.data copy to sysdeps/unix/sysv/linux/arc/arc32/c++-types.data diff --git a/sysdeps/unix/sysv/linux/arc/fixup-asm-unistd.h b/sysdeps/unix/sysv/linux/arc/arc32/fixup-asm-unistd.h similarity index 100% rename from sysdeps/unix/sysv/linux/arc/fixup-asm-unistd.h rename to sysdeps/unix/sysv/linux/arc/arc32/fixup-asm-unistd.h diff --git a/sysdeps/unix/sysv/linux/arc/ld.abilist b/sysdeps/unix/sysv/linux/arc/arc32/ld.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/ld.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/ld.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libBrokenLocale.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libBrokenLocale.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libBrokenLocale.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libBrokenLocale.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libanl.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libanl.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libanl.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libanl.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libc.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libc.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libc.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libc.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libc_malloc_debug.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libc_malloc_debug.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libc_malloc_debug.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libc_malloc_debug.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libcrypt.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libcrypt.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libcrypt.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libcrypt.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libdl.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libdl.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libdl.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libdl.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libm.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libm.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libm.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libm.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libpthread.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libpthread.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libpthread.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libpthread.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libresolv.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libresolv.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libresolv.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libresolv.abilist diff --git a/sysdeps/unix/sysv/linux/arc/librt.abilist b/sysdeps/unix/sysv/linux/arc/arc32/librt.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/librt.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/librt.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libthread_db.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libthread_db.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libthread_db.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libthread_db.abilist diff --git a/sysdeps/unix/sysv/linux/arc/libutil.abilist b/sysdeps/unix/sysv/linux/arc/arc32/libutil.abilist similarity index 100% copy from sysdeps/unix/sysv/linux/arc/libutil.abilist copy to sysdeps/unix/sysv/linux/arc/arc32/libutil.abilist diff --git a/sysdeps/unix/sysv/linux/arc/arc64/Implies b/sysdeps/unix/sysv/linux/arc/arc64/Implies new file mode 100644 index 0000000000..05abf4461a --- /dev/null +++ b/sysdeps/unix/sysv/linux/arc/arc64/Implies @@ -0,0 +1,2 @@ +unix/sysv/linux/arc +unix/sysv/linux/wordsize-64 diff --git a/sysdeps/unix/sysv/linux/arc/arch-syscall.h b/sysdeps/unix/sysv/linux/arc/arc64/arch-syscall.h similarity index 89% rename from sysdeps/unix/sysv/linux/arc/arch-syscall.h rename to sysdeps/unix/sysv/linux/arc/arc64/arch-syscall.h index c1207aaa12..c73f38e567 100644 --- a/sysdeps/unix/sysv/linux/arc/arch-syscall.h +++ b/sysdeps/unix/sysv/linux/arc/arc64/arch-syscall.h @@ -15,11 +15,11 @@ #define __NR_capset 91 #define __NR_chdir 49 #define __NR_chroot 51 -#define __NR_clock_adjtime64 405 -#define __NR_clock_getres_time64 406 -#define __NR_clock_gettime64 403 -#define __NR_clock_nanosleep_time64 407 -#define __NR_clock_settime64 404 +#define __NR_clock_adjtime 266 +#define __NR_clock_getres 114 +#define __NR_clock_gettime 113 +#define __NR_clock_nanosleep 115 +#define __NR_clock_settime 112 #define __NR_clone 220 #define __NR_clone3 435 #define __NR_close 57 @@ -40,7 +40,7 @@ #define __NR_exit_group 94 #define __NR_faccessat 48 #define __NR_faccessat2 439 -#define __NR_fadvise64_64 223 +#define __NR_fadvise64 223 #define __NR_fallocate 47 #define __NR_fanotify_init 262 #define __NR_fanotify_mark 263 @@ -49,7 +49,7 @@ #define __NR_fchmodat 53 #define __NR_fchown 55 #define __NR_fchownat 54 -#define __NR_fcntl64 25 +#define __NR_fcntl 25 #define __NR_fdatasync 83 #define __NR_fgetxattr 10 #define __NR_finit_module 273 @@ -61,10 +61,11 @@ #define __NR_fsmount 432 #define __NR_fsopen 430 #define __NR_fspick 433 -#define __NR_fstatfs64 44 +#define __NR_fstat 80 +#define __NR_fstatfs 44 #define __NR_fsync 82 -#define __NR_ftruncate64 46 -#define __NR_futex_time64 422 +#define __NR_ftruncate 46 +#define __NR_futex 98 #define __NR_futex_waitv 449 #define __NR_get_mempolicy 236 #define __NR_get_robust_list 100 @@ -101,7 +102,6 @@ #define __NR_io_destroy 1 #define __NR_io_getevents 4 #define __NR_io_pgetevents 292 -#define __NR_io_pgetevents_time64 416 #define __NR_io_setup 0 #define __NR_io_submit 2 #define __NR_io_uring_enter 426