MIPS: Implement __multi3 for GCC7 MIPS64r6 builds

Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>             
Signed-off-by: James Hogan <jhogan@kernel.org>

diff -Nur linux-4.14.8.orig/arch/mips/lib/libgcc.h linux-4.14.8/arch/mips/lib/libgcc.h
--- linux-4.14.8.orig/arch/mips/lib/libgcc.h	2017-12-20 10:10:38.000000000 +0100
+++ linux-4.14.8/arch/mips/lib/libgcc.h	2017-12-25 16:58:38.258470502 +0100
@@ -10,10 +10,18 @@
 struct DWstruct {
 	int high, low;
 };
+
+struct TWstruct {
+	long long high, low;
+};
 #elif defined(__LITTLE_ENDIAN)
 struct DWstruct {
 	int low, high;
 };
+
+struct TWstruct {
+	long long low, high;
+};
 #else
 #error I feel sick.
 #endif
@@ -23,4 +31,13 @@
 	long long ll;
 } DWunion;
 
+#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPSR6)
+typedef int ti_type __attribute__((mode(TI)));
+
+typedef union {
+	struct TWstruct s;
+	ti_type ti;
+} TWunion;
+#endif
+
 #endif /* __ASM_LIBGCC_H */
diff -Nur linux-4.14.8.orig/arch/mips/lib/Makefile linux-4.14.8/arch/mips/lib/Makefile
--- linux-4.14.8.orig/arch/mips/lib/Makefile	2017-12-20 10:10:38.000000000 +0100
+++ linux-4.14.8/arch/mips/lib/Makefile	2017-12-25 16:58:38.258470502 +0100
@@ -16,4 +16,5 @@
 obj-$(CONFIG_CPU_TX39XX)	+= r3k_dump_tlb.o
 
 # libgcc-style stuff needed in the kernel
-obj-y += ashldi3.o ashrdi3.o bswapsi.o bswapdi.o cmpdi2.o lshrdi3.o ucmpdi2.o
+obj-y += ashldi3.o ashrdi3.o bswapsi.o bswapdi.o cmpdi2.o lshrdi3.o multi3.o \
+	 ucmpdi2.o
diff -Nur linux-4.14.8.orig/arch/mips/lib/multi3.c linux-4.14.8/arch/mips/lib/multi3.c
--- linux-4.14.8.orig/arch/mips/lib/multi3.c	1970-01-01 01:00:00.000000000 +0100
+++ linux-4.14.8/arch/mips/lib/multi3.c	2017-12-25 16:58:38.258470502 +0100
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <linux/export.h>
+
+#include "libgcc.h"
+
+/*
+ * GCC 7 suboptimally generates __multi3 calls for mips64r6, so for that
+ * specific case only we'll implement it here.
+ *
+ * See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82981
+ */
+#if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPSR6) && (__GNUC__ == 7)
+
+/* multiply 64-bit values, low 64-bits returned */
+static inline long long notrace dmulu(long long a, long long b)
+{
+	long long res;
+	asm ("dmulu %0,%1,%2" : "=r" (res) : "r" (a), "r" (b));
+	return res;
+}
+
+/* multiply 64-bit unsigned values, high 64-bits of 128-bit result returned */
+static inline long long notrace dmuhu(long long a, long long b)
+{
+	long long res;
+	asm ("dmuhu %0,%1,%2" : "=r" (res) : "r" (a), "r" (b));
+	return res;
+}
+
+/* multiply 128-bit values, low 128-bits returned */
+ti_type notrace __multi3(ti_type a, ti_type b)
+{
+	TWunion res, aa, bb;
+
+	aa.ti = a;
+	bb.ti = b;
+
+	/*
+	 * a * b =           (a.lo * b.lo)
+	 *         + 2^64  * (a.hi * b.lo + a.lo * b.hi)
+	 *        [+ 2^128 * (a.hi * b.hi)]
+	 */
+	res.s.low = dmulu(aa.s.low, bb.s.low);
+	res.s.high = dmuhu(aa.s.low, bb.s.low);
+	res.s.high += dmulu(aa.s.high, bb.s.low);
+	res.s.high += dmulu(aa.s.low, bb.s.high);
+
+	return res.ti;
+}
+EXPORT_SYMBOL(__multi3);
+
+#endif /* 64BIT && CPU_MIPSR6 && GCC7 */