From 377be14b1a78b7f0fc91fdede93c04b6aa4f9ca9 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Thu, 8 Feb 2024 10:16:03 +0100 Subject: elf2flt: update to 2024.02 --- .../0001-elf2flt-add-RISC-V-32-bit-support.patch | 66 ---------------------- 1 file changed, 66 deletions(-) delete mode 100644 toolchain/elf2flt/patches/v2023.09/0001-elf2flt-add-RISC-V-32-bit-support.patch (limited to 'toolchain/elf2flt/patches/v2023.09/0001-elf2flt-add-RISC-V-32-bit-support.patch') diff --git a/toolchain/elf2flt/patches/v2023.09/0001-elf2flt-add-RISC-V-32-bit-support.patch b/toolchain/elf2flt/patches/v2023.09/0001-elf2flt-add-RISC-V-32-bit-support.patch deleted file mode 100644 index ed6fcaaee..000000000 --- a/toolchain/elf2flt/patches/v2023.09/0001-elf2flt-add-RISC-V-32-bit-support.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 44e34cb50f2d25848a85a59adbc561eee66278e8 Mon Sep 17 00:00:00 2001 -From: Yimin Gu -Date: Wed, 14 Dec 2022 06:49:46 -0500 -Subject: [PATCH] elf2flt: add RISC-V 32-bit support - -Allow elf2flt to work with RISC-V 32-bit targets. With these changes, the -uclibc toolchain and busybox can work fine for rv32 no MMU systems with -no noticable problem. - -Signed-off-by: Charles Lohr -[Rebased onto latest tree for upstreaming] -Signed-off-by: Jesse Taube -[Add more ELF relco types and edit commit message] -Signed-off-by: Yimin Gu ---- - elf2flt.c | 6 ++++-- - ld-elf2flt.c | 2 +- - 2 files changed, 5 insertions(+), 3 deletions(-) - -diff --git a/elf2flt.c b/elf2flt.c -index f37cfa2..04b6b43 100644 ---- a/elf2flt.c -+++ b/elf2flt.c -@@ -81,7 +81,7 @@ const char *elf2flt_progname; - #include - #elif defined(TARGET_xtensa) - #include --#elif defined(TARGET_riscv64) -+#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) - #include - #endif - -@@ -127,6 +127,8 @@ const char *elf2flt_progname; - #define ARCH "xtensa" - #elif defined(TARGET_riscv64) - #define ARCH "riscv64" -+#elif defined(TARGET_riscv32) -+#define ARCH "riscv32" - #else - #error "Don't know how to support your CPU architecture??" - #endif -@@ -822,7 +824,7 @@ output_relocs ( - goto good_32bit_resolved_reloc_update_text; - default: - goto bad_resolved_reloc; --#elif defined(TARGET_riscv64) -+#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) - case R_RISCV_NONE: - case R_RISCV_32_PCREL: - case R_RISCV_ADD8: -diff --git a/ld-elf2flt.c b/ld-elf2flt.c -index 75ee1bb..68b2a4a 100644 ---- a/ld-elf2flt.c -+++ b/ld-elf2flt.c -@@ -327,7 +327,7 @@ static int do_final_link(void) - /* riscv adds a global pointer symbol to the linker file with the - "RISCV_GP:" prefix. Remove the prefix for riscv64 architecture and - the entire line for other architectures. */ -- if (streq(TARGET_CPU, "riscv64")) -+ if (streq(TARGET_CPU, "riscv64") || streq(TARGET_CPU, "riscv32")) - append_sed(&sed, "^RISCV_GP:", ""); - else - append_sed(&sed, "^RISCV_GP:", NULL); --- -2.30.2 - -- cgit v1.2.3