From b6a5c9e0b1ed79e56e7dc8b3a0b2a61856fda576 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Sat, 13 Nov 2010 00:30:49 +0100 Subject: unify alix support add hardware profiles for 3 alix boards, but use the same toolchain for all of them. This is just better for maintenance purpose. delete old targets. --- target/wag54g/Makefile | 47 - target/wag54g/files/etc/inittab | 3 - target/wag54g/files/etc/mdev.conf | 10 - target/wag54g/kernel.config | 899 ------ target/wag54g/patches/ar7.patch | 4501 --------------------------- target/wag54g/target.mk | 7 - target/wag54g/tools/addpattern/Makefile | 4 - target/wag54g/tools/addpattern/addpattern.c | 255 -- target/wag54g/tools/rules.mk | 9 - target/wag54g/tools/squashfs/Makefile | 27 - target/wag54g/tools/srec2bin/Makefile | 4 - target/wag54g/tools/srec2bin/srec2bin.c | 524 ---- target/wag54g/uclibc.config | 233 -- 13 files changed, 6523 deletions(-) delete mode 100644 target/wag54g/Makefile delete mode 100644 target/wag54g/files/etc/inittab delete mode 100644 target/wag54g/files/etc/mdev.conf delete mode 100644 target/wag54g/kernel.config delete mode 100644 target/wag54g/patches/ar7.patch delete mode 100644 target/wag54g/target.mk delete mode 100644 target/wag54g/tools/addpattern/Makefile delete mode 100644 target/wag54g/tools/addpattern/addpattern.c delete mode 100644 target/wag54g/tools/rules.mk delete mode 100644 target/wag54g/tools/squashfs/Makefile delete mode 100644 target/wag54g/tools/srec2bin/Makefile delete mode 100644 target/wag54g/tools/srec2bin/srec2bin.c delete mode 100644 target/wag54g/uclibc.config (limited to 'target/wag54g') diff --git a/target/wag54g/Makefile b/target/wag54g/Makefile deleted file mode 100644 index 0a864ad4c..000000000 --- a/target/wag54g/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -# This file is part of the OpenADK project. OpenADK is copyrighted -# material, please see the LICENCE file in the top-level directory. - -include $(TOPDIR)/rules.mk -include $(TOPDIR)/mk/kernel.mk -include $(TOPDIR)/mk/modules.mk -include $(TOPDIR)/mk/kernel-build.mk -include $(TOPDIR)/mk/image.mk - -$(TOOLS_BUILD_DIR): - mkdir -p $(TOOLS_BUILD_DIR) - -tools-compile: $(TOOLS_BUILD_DIR) - $(MAKE) -C tools/addpattern - $(MAKE) -C tools/srec2bin - $(MAKE) -C ../tools/squashfs prepare compile install - -kernel-install: tools-compile - PATH='${TARGET_PATH}' \ - $(TARGET_CROSS)objcopy -S -O srec $(LINUX_DIR)/vmlinux \ - $(LINUX_DIR)/vmlinux.srec - PATH='${TARGET_PATH}' \ - srec2bin $(LINUX_DIR)/vmlinux.srec $(LINUX_DIR)/vmlinux.bin - (dd if=/dev/zero bs=16 count=1; cat $(LINUX_DIR)/vmlinux.bin) > \ - $(LINUX_DIR)/vmlinux.tmp - PATH='${TARGET_PATH}' \ - addpattern -p WA21 -i $(LINUX_DIR)/vmlinux.tmp \ - -o $(BIN_DIR)/${ADK_TARGET}-${FS}-kernel - -ifeq ($(FS),squashfs) -imageinstall: kernel-install $(BIN_DIR)/$(ROOTFSSQUASHFS) - ${CP} ${BUILD_DIR}/${ROOTFSSQUASHFS} $(BIN_DIR)/$(ROOTFSSQUASHFS) - @echo The image file is $(ROOTFSSQUASHFS) - @echo 'You can flash the image via tftp:' - @echo 'tftp 192.168.1.1' - @echo 'tftp> binary' - @echo "tftp> put $(ROOTFSSQUASHFS) upgrade_code.bin" -endif -ifeq ($(FS),nfsroot) -imageinstall: kernel-install $(BIN_DIR)/$(ROOTFSTARBALL) - @echo 'The kernel file is: ${BIN_DIR}/${ADK_TARGET}-${FS}-kernel' - @echo 'The nfs root tarball is: ${BIN_DIR}/${ROOTFSTARBALL}' - @echo 'You can flash the kernel via tftp:' - @echo 'tftp 192.168.1.1' - @echo 'tftp> binary' - @echo 'tftp> put ${ADK_TARGET}-${FS}-kernel upgrade_code.bin' -endif diff --git a/target/wag54g/files/etc/inittab b/target/wag54g/files/etc/inittab deleted file mode 100644 index 4566ae3e8..000000000 --- a/target/wag54g/files/etc/inittab +++ /dev/null @@ -1,3 +0,0 @@ -::sysinit:/etc/init.d/rcS -::shutdown:/etc/init.d/rcK -ttyS0::respawn:/sbin/getty -i -L ttyS0 38400 vt100 diff --git a/target/wag54g/files/etc/mdev.conf b/target/wag54g/files/etc/mdev.conf deleted file mode 100644 index 582a7b43f..000000000 --- a/target/wag54g/files/etc/mdev.conf +++ /dev/null @@ -1,10 +0,0 @@ -tun 0:0 660 >net/tun -device-mapper 0:0 660 @mkdir /dev/mapper -null 0:0 777 -zero 0:0 666 -u?random 0:0 644 -console 0:0 0600 -ptmx 0:0 666 -tty 0:0 666 -ttyS* 0:0 640 -.* 0:0 644 @/lib/mdev/init diff --git a/target/wag54g/kernel.config b/target/wag54g/kernel.config deleted file mode 100644 index 53e5cb313..000000000 --- a/target/wag54g/kernel.config +++ /dev/null @@ -1,899 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.30.5 -# Thu Aug 27 22:00:41 2009 -# -CONFIG_MIPS=y - -# -# Machine selection -# -CONFIG_AR7=y -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_BCM47XX is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_NEC_MARKEINS is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SNI_RM is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_WR_PPMC is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_SCHED_OMIT_FRAME_POINTER=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_EARLY_PRINTK=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -# CONFIG_HOTPLUG_CPU is not set -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_GPIO=y -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_BOOT_ELF32=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPSR1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_HARDWARE_WATCHPOINTS=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_32KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -# CONFIG_UNEVICTABLE_LRU is not set -CONFIG_HAVE_MLOCK=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -CONFIG_TICK_ONESHOT=y -# CONFIG_NO_HZ is not set -CONFIG_HIGH_RES_TIMERS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -# CONFIG_HZ_48 is not set -CONFIG_HZ_100=y -# CONFIG_HZ_128 is not set -# CONFIG_HZ_250 is not set -# CONFIG_HZ_256 is not set -# CONFIG_HZ_1000 is not set -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=100 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -# CONFIG_KEXEC is not set -# CONFIG_SECCOMP is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_GROUP_SCHED is not set -# CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -# CONFIG_STRIP_ASM_SYMS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_ELF_CORE is not set -# CONFIG_PCSPKR_PLATFORM is not set -CONFIG_BASE_FULL=y -# CONFIG_FUTEX is not set -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -# CONFIG_AIO is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_SLOW_WORK is not set -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_SLABINFO=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -# CONFIG_FREEZER is not set - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_MMU=y -# CONFIG_PCCARD is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_HAVE_AOUT is not set -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_PM is not set -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_ASK_IP_FIB_HASH=y -# CONFIG_IP_FIB_TRIE is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_MULTIPLE_TABLES is not set -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_PHONET is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -# CONFIG_WIRELESS_EXT is not set -# CONFIG_LIB80211 is not set -# CONFIG_MAC80211 is not set -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_FW_LOADER is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set -CONFIG_MTD_ROOTFS_ROOT_DEV=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -CONFIG_MTD_AR7_PARTS=y - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_PHYSMAP_COMPAT is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_BLK_DEV_HD is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_DMA is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -CONFIG_COMPAT_NET_DEV_OPS=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -CONFIG_PHYLIB=y -# CONFIG_SWCONFIG is not set - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -CONFIG_FIXED_PHY=y -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_DM9000 is not set -# CONFIG_ETHOC is not set -# CONFIG_DNET is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -CONFIG_CPMAC=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_DEVKMEM is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_R3964 is not set -CONFIG_AR7_GPIO=y -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_I2C is not set -# CONFIG_SPI is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_AR7_WDT=y -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_REGULATOR is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_SOUND is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_MMC is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set - -# -# TI VLYNQ -# -CONFIG_VLYNQ=y -# CONFIG_STAGING is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -CONFIG_FILE_LOCKING=y -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_PROC_KCORE is not set -CONFIG_PROC_SYSCTL=y -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_YAFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_AUFS_FS is not set -# CONFIG_NILFS2_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -# CONFIG_NFS_FS is not set -# CONFIG_NFSD is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_NLS is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_TRACING_SUPPORT=y - -# -# Tracers -# -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_EVENT_TRACER is not set -# CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_KMEMTRACE is not set -# CONFIG_WORKQUEUE_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_CMDLINE="console=ttyS0,38400" - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_FIPS is not set -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set - -# -# OCF Configuration -# -# CONFIG_OCF_OCF is not set -# CONFIG_BINARY_PRINTF is not set - -# -# Library routines -# -CONFIG_GENERIC_FIND_LAST_BIT=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -# CONFIG_CRC32 is not set -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y -CONFIG_NLATTR=y diff --git a/target/wag54g/patches/ar7.patch b/target/wag54g/patches/ar7.patch deleted file mode 100644 index 71139fdb8..000000000 --- a/target/wag54g/patches/ar7.patch +++ /dev/null @@ -1,4501 +0,0 @@ -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/clock.c linux-2.6.30.5/arch/mips/ar7/clock.c ---- linux-2.6.30.5.orig/arch/mips/ar7/clock.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/clock.c 2009-08-26 20:05:03.000000000 +0200 -@@ -0,0 +1,483 @@ -+/* -+ * Copyright (C) 2007 Felix Fietkau -+ * Copyright (C) 2007 Eugene Konev -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define BOOT_PLL_SOURCE_MASK 0x3 -+#define CPU_PLL_SOURCE_SHIFT 16 -+#define BUS_PLL_SOURCE_SHIFT 14 -+#define USB_PLL_SOURCE_SHIFT 18 -+#define DSP_PLL_SOURCE_SHIFT 22 -+#define BOOT_PLL_SOURCE_AFE 0 -+#define BOOT_PLL_SOURCE_BUS 0 -+#define BOOT_PLL_SOURCE_REF 1 -+#define BOOT_PLL_SOURCE_XTAL 2 -+#define BOOT_PLL_SOURCE_CPU 3 -+#define BOOT_PLL_BYPASS 0x00000020 -+#define BOOT_PLL_ASYNC_MODE 0x02000000 -+#define BOOT_PLL_2TO1_MODE 0x00008000 -+ -+#define TNETD7200_CLOCK_ID_CPU 0 -+#define TNETD7200_CLOCK_ID_DSP 1 -+#define TNETD7200_CLOCK_ID_USB 2 -+ -+#define TNETD7200_DEF_CPU_CLK 211000000 -+#define TNETD7200_DEF_DSP_CLK 125000000 -+#define TNETD7200_DEF_USB_CLK 48000000 -+ -+struct tnetd7300_clock { -+ u32 ctrl; -+#define PREDIV_MASK 0x001f0000 -+#define PREDIV_SHIFT 16 -+#define POSTDIV_MASK 0x0000001f -+ u32 unused1[3]; -+ u32 pll; -+#define MUL_MASK 0x0000f000 -+#define MUL_SHIFT 12 -+#define PLL_MODE_MASK 0x00000001 -+#define PLL_NDIV 0x00000800 -+#define PLL_DIV 0x00000002 -+#define PLL_STATUS 0x00000001 -+ u32 unused2[3]; -+}; -+ -+struct tnetd7300_clocks { -+ struct tnetd7300_clock bus; -+ struct tnetd7300_clock cpu; -+ struct tnetd7300_clock usb; -+ struct tnetd7300_clock dsp; -+}; -+ -+struct tnetd7200_clock { -+ u32 ctrl; -+ u32 unused1[3]; -+#define DIVISOR_ENABLE_MASK 0x00008000 -+ u32 mul; -+ u32 prediv; -+ u32 postdiv; -+ u32 postdiv2; -+ u32 unused2[6]; -+ u32 cmd; -+ u32 status; -+ u32 cmden; -+ u32 padding[15]; -+}; -+ -+struct tnetd7200_clocks { -+ struct tnetd7200_clock cpu; -+ struct tnetd7200_clock dsp; -+ struct tnetd7200_clock usb; -+}; -+ -+int ar7_cpu_clock = 150000000; -+EXPORT_SYMBOL(ar7_cpu_clock); -+int ar7_bus_clock = 125000000; -+EXPORT_SYMBOL(ar7_bus_clock); -+int ar7_dsp_clock; -+EXPORT_SYMBOL(ar7_dsp_clock); -+ -+static int gcd(int a, int b) -+{ -+ int c; -+ -+ if (a < b) { -+ c = a; -+ a = b; -+ b = c; -+ } -+ while ((c = (a % b))) { -+ a = b; -+ b = c; -+ } -+ return b; -+} -+ -+static void approximate(int base, int target, int *prediv, -+ int *postdiv, int *mul) -+{ -+ int i, j, k, freq, res = target; -+ for (i = 1; i <= 16; i++) -+ for (j = 1; j <= 32; j++) -+ for (k = 1; k <= 32; k++) { -+ freq = abs(base / j * i / k - target); -+ if (freq < res) { -+ res = freq; -+ *mul = i; -+ *prediv = j; -+ *postdiv = k; -+ } -+ } -+} -+ -+static void calculate(int base, int target, int *prediv, int *postdiv, -+ int *mul) -+{ -+ int tmp_gcd, tmp_base, tmp_freq; -+ -+ for (*prediv = 1; *prediv <= 32; (*prediv)++) { -+ tmp_base = base / *prediv; -+ tmp_gcd = gcd(target, tmp_base); -+ *mul = target / tmp_gcd; -+ *postdiv = tmp_base / tmp_gcd; -+ if ((*mul < 1) || (*mul >= 16)) -+ continue; -+ if ((*postdiv > 0) & (*postdiv <= 32)) -+ break; -+ } -+ -+ if (base / (*prediv) * (*mul) / (*postdiv) != target) { -+ approximate(base, target, prediv, postdiv, mul); -+ tmp_freq = base / (*prediv) * (*mul) / (*postdiv); -+ printk(KERN_WARNING -+ "Adjusted requested frequency %d to %d\n", -+ target, tmp_freq); -+ } -+ -+ printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n", -+ *prediv, *postdiv, *mul); -+} -+ -+static int tnetd7300_dsp_clock(void) -+{ -+ u32 didr1, didr2; -+ u8 rev = ar7_chip_rev(); -+ didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18)); -+ didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c)); -+ if (didr2 & (1 << 23)) -+ return 0; -+ if ((rev >= 0x23) && (rev != 0x57)) -+ return 250000000; -+ if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22)) -+ > 4208000) -+ return 250000000; -+ return 0; -+} -+ -+static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, -+ u32 *bootcr, u32 bus_clock) -+{ -+ int product; -+ int base_clock = AR7_REF_CLOCK; -+ u32 ctrl = readl(&clock->ctrl); -+ u32 pll = readl(&clock->pll); -+ int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1; -+ int postdiv = (ctrl & POSTDIV_MASK) + 1; -+ int divisor = prediv * postdiv; -+ int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; -+ -+ switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { -+ case BOOT_PLL_SOURCE_BUS: -+ base_clock = bus_clock; -+ break; -+ case BOOT_PLL_SOURCE_REF: -+ base_clock = AR7_REF_CLOCK; -+ break; -+ case BOOT_PLL_SOURCE_XTAL: -+ base_clock = AR7_XTAL_CLOCK; -+ break; -+ case BOOT_PLL_SOURCE_CPU: -+ base_clock = ar7_cpu_clock; -+ break; -+ } -+ -+ if (*bootcr & BOOT_PLL_BYPASS) -+ return base_clock / divisor; -+ -+ if ((pll & PLL_MODE_MASK) == 0) -+ return (base_clock >> (mul / 16 + 1)) / divisor; -+ -+ if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) { -+ product = (mul & 1) ? -+ (base_clock * mul) >> 1 : -+ (base_clock * (mul - 1)) >> 2; -+ return product / divisor; -+ } -+ -+ if (mul == 16) -+ return base_clock / divisor; -+ -+ return base_clock * mul / divisor; -+} -+ -+static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, -+ u32 *bootcr, u32 frequency) -+{ -+ int prediv, postdiv, mul; -+ int base_clock = ar7_bus_clock; -+ -+ switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { -+ case BOOT_PLL_SOURCE_BUS: -+ base_clock = ar7_bus_clock; -+ break; -+ case BOOT_PLL_SOURCE_REF: -+ base_clock = AR7_REF_CLOCK; -+ break; -+ case BOOT_PLL_SOURCE_XTAL: -+ base_clock = AR7_XTAL_CLOCK; -+ break; -+ case BOOT_PLL_SOURCE_CPU: -+ base_clock = ar7_cpu_clock; -+ break; -+ } -+ -+ calculate(base_clock, frequency, &prediv, &postdiv, &mul); -+ -+ writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); -+ mdelay(1); -+ writel(4, &clock->pll); -+ while (readl(&clock->pll) & PLL_STATUS); -+ writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); -+ mdelay(75); -+} -+ -+static void __init tnetd7300_init_clocks(void) -+{ -+ u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); -+ struct tnetd7300_clocks *clocks = -+ (struct tnetd7300_clocks *) -+ ioremap_nocache(AR7_REGS_POWER + 0x20, -+ sizeof(struct tnetd7300_clocks)); -+ -+ ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, -+ &clocks->bus, bootcr, AR7_AFE_CLOCK); -+ -+ if (*bootcr & BOOT_PLL_ASYNC_MODE) -+ ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, -+ &clocks->cpu, bootcr, AR7_AFE_CLOCK); -+ else -+ ar7_cpu_clock = ar7_bus_clock; -+/* -+ tnetd7300_set_clock(USB_PLL_SOURCE_SHIFT, &clocks->usb, -+ bootcr, 48000000); -+*/ -+ if (ar7_dsp_clock == 250000000) -+ tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, -+ bootcr, ar7_dsp_clock); -+ -+ iounmap(clocks); -+ iounmap(bootcr); -+} -+ -+static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock, -+ u32 *bootcr, u32 bus_clock) -+{ -+ int divisor = ((readl(&clock->prediv) & 0x1f) + 1) * -+ ((readl(&clock->postdiv) & 0x1f) + 1); -+ -+ if (*bootcr & BOOT_PLL_BYPASS) -+ return base / divisor; -+ -+ return base * ((readl(&clock->mul) & 0xf) + 1) / divisor; -+} -+ -+ -+static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, -+ int prediv, int postdiv, int postdiv2, int mul, u32 frequency) -+{ -+ printk(KERN_INFO -+ "Clocks: base = %d, frequency = %u, prediv = %d, " -+ "postdiv = %d, postdiv2 = %d, mul = %d\n", -+ base, frequency, prediv, postdiv, postdiv2, mul); -+ -+ writel(0, &clock->ctrl); -+ writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv); -+ writel((mul - 1) & 0xF, &clock->mul); -+ -+ for (mul = 0; mul < 2000; mul++) /* nop */; -+ -+ while (readl(&clock->status) & 0x1) /* nop */; -+ -+ writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv); -+ -+ writel(readl(&clock->cmden) | 1, &clock->cmden); -+ writel(readl(&clock->cmd) | 1, &clock->cmd); -+ -+ while (readl(&clock->status) & 0x1) /* nop */; -+ -+ writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2); -+ -+ writel(readl(&clock->cmden) | 1, &clock->cmden); -+ writel(readl(&clock->cmd) | 1, &clock->cmd); -+ -+ while (readl(&clock->status) & 0x1) /* nop */; -+ -+ writel(readl(&clock->ctrl) | 1, &clock->ctrl); -+} -+ -+static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) -+{ -+ if (*bootcr & BOOT_PLL_ASYNC_MODE) -+ /* Async */ -+ switch (clock_id) { -+ case TNETD7200_CLOCK_ID_DSP: -+ return AR7_REF_CLOCK; -+ default: -+ return AR7_AFE_CLOCK; -+ } -+ else -+ /* Sync */ -+ if (*bootcr & BOOT_PLL_2TO1_MODE) -+ /* 2:1 */ -+ switch (clock_id) { -+ case TNETD7200_CLOCK_ID_DSP: -+ return AR7_REF_CLOCK; -+ default: -+ return AR7_AFE_CLOCK; -+ } -+ else -+ /* 1:1 */ -+ return AR7_REF_CLOCK; -+} -+ -+ -+static void __init tnetd7200_init_clocks(void) -+{ -+ u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); -+ struct tnetd7200_clocks *clocks = -+ (struct tnetd7200_clocks *) -+ ioremap_nocache(AR7_REGS_POWER + 0x80, -+ sizeof(struct tnetd7200_clocks)); -+ int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv; -+ int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv; -+ int usb_base, usb_mul, usb_prediv, usb_postdiv; -+ -+/* -+ Log from Fritz!Box 7170 Annex B: -+ -+ CPU revision is: 00018448 -+ Clocks: Async mode -+ Clocks: Setting DSP clock -+ Clocks: prediv: 1, postdiv: 1, mul: 5 -+ Clocks: base = 25000000, frequency = 125000000, prediv = 1, -+ postdiv = 2, postdiv2 = 1, mul = 10 -+ Clocks: Setting CPU clock -+ Adjusted requested frequency 211000000 to 211968000 -+ Clocks: prediv: 1, postdiv: 1, mul: 6 -+ Clocks: base = 35328000, frequency = 211968000, prediv = 1, -+ postdiv = 1, postdiv2 = -1, mul = 6 -+ Clocks: Setting USB clock -+ Adjusted requested frequency 48000000 to 48076920 -+ Clocks: prediv: 13, postdiv: 1, mul: 5 -+ Clocks: base = 125000000, frequency = 48000000, prediv = 13, -+ postdiv = 1, postdiv2 = -1, mul = 5 -+ -+ DSL didn't work if you didn't set the postdiv 2:1 postdiv2 combination, -+ driver hung on startup. -+ Haven't tested this on a synchronous board, -+ neither do i know what to do with ar7_dsp_clock -+*/ -+ -+ cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr); -+ dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr); -+ -+ if (*bootcr & BOOT_PLL_ASYNC_MODE) { -+ printk(KERN_INFO "Clocks: Async mode\n"); -+ -+ printk(KERN_INFO "Clocks: Setting DSP clock\n"); -+ calculate(dsp_base, TNETD7200_DEF_DSP_CLK, -+ &dsp_prediv, &dsp_postdiv, &dsp_mul); -+ ar7_bus_clock = -+ ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; -+ tnetd7200_set_clock(dsp_base, &clocks->dsp, -+ dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2, -+ ar7_bus_clock); -+ -+ printk(KERN_INFO "Clocks: Setting CPU clock\n"); -+ calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, -+ &cpu_postdiv, &cpu_mul); -+ ar7_cpu_clock = -+ ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; -+ tnetd7200_set_clock(cpu_base, &clocks->cpu, -+ cpu_prediv, cpu_postdiv, -1, cpu_mul, -+ ar7_cpu_clock); -+ -+ } else -+ if (*bootcr & BOOT_PLL_2TO1_MODE) { -+ printk(KERN_INFO "Clocks: Sync 2:1 mode\n"); -+ -+ printk(KERN_INFO "Clocks: Setting CPU clock\n"); -+ calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, -+ &cpu_postdiv, &cpu_mul); -+ ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) -+ / cpu_postdiv; -+ tnetd7200_set_clock(cpu_base, &clocks->cpu, -+ cpu_prediv, cpu_postdiv, -1, cpu_mul, -+ ar7_cpu_clock); -+ -+ printk(KERN_INFO "Clocks: Setting DSP clock\n"); -+ calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, -+ &dsp_postdiv, &dsp_mul); -+ ar7_bus_clock = ar7_cpu_clock / 2; -+ tnetd7200_set_clock(dsp_base, &clocks->dsp, -+ dsp_prediv, dsp_postdiv * 2, dsp_postdiv, -+ dsp_mul * 2, ar7_bus_clock); -+ } else { -+ printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); -+ -+ printk(KERN_INFO "Clocks: Setting DSP clock\n"); -+ calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, -+ &dsp_postdiv, &dsp_mul); -+ ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) -+ / dsp_postdiv; -+ tnetd7200_set_clock(dsp_base, &clocks->dsp, -+ dsp_prediv, dsp_postdiv * 2, dsp_postdiv, -+ dsp_mul * 2, ar7_bus_clock); -+ -+ ar7_cpu_clock = ar7_bus_clock; -+ } -+ -+ printk(KERN_INFO "Clocks: Setting USB clock\n"); -+ usb_base = ar7_bus_clock; -+ calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, -+ &usb_postdiv, &usb_mul); -+ tnetd7200_set_clock(usb_base, &clocks->usb, -+ usb_prediv, usb_postdiv, -1, usb_mul, -+ TNETD7200_DEF_USB_CLK); -+ -+ #warning FIXME -+ ar7_dsp_clock = ar7_cpu_clock; -+ -+ iounmap(clocks); -+ iounmap(bootcr); -+} -+ -+void __init ar7_init_clocks(void) -+{ -+ switch (ar7_chip_id()) { -+ case AR7_CHIP_7100: -+#warning FIXME: Check if the new 7200 clock init works for 7100 -+ tnetd7200_init_clocks(); -+ break; -+ case AR7_CHIP_7200: -+ tnetd7200_init_clocks(); -+ break; -+ case AR7_CHIP_7300: -+ ar7_dsp_clock = tnetd7300_dsp_clock(); -+ tnetd7300_init_clocks(); -+ break; -+ default: -+ break; -+ } -+} -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/gpio.c linux-2.6.30.5/arch/mips/ar7/gpio.c ---- linux-2.6.30.5.orig/arch/mips/ar7/gpio.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/gpio.c 2009-08-26 20:05:03.000000000 +0200 -@@ -0,0 +1,49 @@ -+/* -+ * Copyright (C) 2007 Felix Fietkau -+ * Copyright (C) 2007 Eugene Konev -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+ -+#include -+ -+#include -+ -+static const char *ar7_gpio_list[AR7_GPIO_MAX]; -+ -+int gpio_request(unsigned gpio, const char *label) -+{ -+ if (gpio >= AR7_GPIO_MAX) -+ return -EINVAL; -+ -+ if (ar7_gpio_list[gpio]) -+ return -EBUSY; -+ -+ if (label) { -+ ar7_gpio_list[gpio] = label; -+ } else { -+ ar7_gpio_list[gpio] = "busy"; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(gpio_request); -+ -+void gpio_free(unsigned gpio) -+{ -+ BUG_ON(!ar7_gpio_list[gpio]); -+ ar7_gpio_list[gpio] = NULL; -+} -+EXPORT_SYMBOL(gpio_free); -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/irq.c linux-2.6.30.5/arch/mips/ar7/irq.c ---- linux-2.6.30.5.orig/arch/mips/ar7/irq.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/irq.c 2009-08-26 20:05:03.000000000 +0200 -@@ -0,0 +1,183 @@ -+/* -+ * Copyright (C) 2006,2007 Felix Fietkau -+ * Copyright (C) 2006,2007 Eugene Konev -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define EXCEPT_OFFSET 0x80 -+#define PACE_OFFSET 0xA0 -+#define CHNLS_OFFSET 0x200 -+ -+#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) -+#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8) -+#define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */ -+#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */ -+#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */ -+#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */ -+#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */ -+#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */ -+#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */ -+#define PIR_OFFSET (0x40) -+#define MSR_OFFSET (0x44) -+#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */ -+#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */ -+ -+#define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr)) -+ -+#define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4)) -+ -+static void ar7_unmask_irq(unsigned int irq_nr); -+static void ar7_mask_irq(unsigned int irq_nr); -+static void ar7_ack_irq(unsigned int irq_nr); -+static void ar7_unmask_sec_irq(unsigned int irq_nr); -+static void ar7_mask_sec_irq(unsigned int irq_nr); -+static void ar7_ack_sec_irq(unsigned int irq_nr); -+static void ar7_cascade(void); -+static void ar7_irq_init(int base); -+static int ar7_irq_base; -+ -+static struct irq_chip ar7_irq_type = { -+ .name = "AR7", -+ .unmask = ar7_unmask_irq, -+ .mask = ar7_mask_irq, -+ .ack = ar7_ack_irq -+}; -+ -+static struct irq_chip ar7_sec_irq_type = { -+ .name = "AR7", -+ .unmask = ar7_unmask_sec_irq, -+ .mask = ar7_mask_sec_irq, -+ .ack = ar7_ack_sec_irq, -+}; -+ -+static struct irqaction ar7_cascade_action = { -+ .handler = no_action, -+ .name = "AR7 cascade interrupt" -+}; -+ -+static void ar7_unmask_irq(unsigned int irq) -+{ -+ writel(1 << ((irq - ar7_irq_base) % 32), -+ REG(ESR_OFFSET(irq - ar7_irq_base))); -+} -+ -+static void ar7_mask_irq(unsigned int irq) -+{ -+ writel(1 << ((irq - ar7_irq_base) % 32), -+ REG(ECR_OFFSET(irq - ar7_irq_base))); -+} -+ -+static void ar7_ack_irq(unsigned int irq) -+{ -+ writel(1 << ((irq - ar7_irq_base) % 32), -+ REG(CR_OFFSET(irq - ar7_irq_base))); -+} -+ -+static void ar7_unmask_sec_irq(unsigned int irq) -+{ -+ writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); -+} -+ -+static void ar7_mask_sec_irq(unsigned int irq) -+{ -+ writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); -+} -+ -+static void ar7_ack_sec_irq(unsigned int irq) -+{ -+ writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); -+} -+ -+void __init arch_init_irq(void) { -+ mips_cpu_irq_init(); -+ ar7_irq_init(8); -+} -+ -+static void __init ar7_irq_init(int base) -+{ -+ int i; -+ /* -+ * Disable interrupts and clear pending -+ */ -+ writel(0xffffffff, REG(ECR_OFFSET(0))); -+ writel(0xff, REG(ECR_OFFSET(32))); -+ writel(0xffffffff, REG(SEC_ECR_OFFSET)); -+ writel(0xffffffff, REG(CR_OFFSET(0))); -+ writel(0xff, REG(CR_OFFSET(32))); -+ writel(0xffffffff, REG(SEC_CR_OFFSET)); -+ -+ ar7_irq_base = base; -+ -+ for (i = 0; i < 40; i++) { -+ writel(i, REG(CHNL_OFFSET(i))); -+ /* Primary IRQ's */ -+ set_irq_chip_and_handler(base + i, &ar7_irq_type, -+ handle_level_irq); -+ /* Secondary IRQ's */ -+ if (i < 32) -+ set_irq_chip_and_handler(base + i + 40, -+ &ar7_sec_irq_type, -+ handle_level_irq); -+ } -+ -+ setup_irq(2, &ar7_cascade_action); -+ setup_irq(ar7_irq_base, &ar7_cascade_action); -+ set_c0_status(IE_IRQ0); -+} -+ -+static void ar7_cascade(void) -+{ -+ u32 status; -+ int i, irq; -+ -+ /* Primary IRQ's */ -+ irq = readl(REG(PIR_OFFSET)) & 0x3f; -+ if (irq) { -+ do_IRQ(ar7_irq_base + irq); -+ return; -+ } -+ -+ /* Secondary IRQ's are cascaded through primary '0' */ -+ writel(1, REG(CR_OFFSET(irq))); -+ status = readl(REG(SEC_SR_OFFSET)); -+ for (i = 0; i < 32; i++) { -+ if (status & 1) { -+ do_IRQ(ar7_irq_base + i + 40); -+ return; -+ } -+ status >>= 1; -+ } -+ -+ spurious_interrupt(); -+} -+ -+asmlinkage void plat_irq_dispatch(void) -+{ -+ unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; -+ if (pending & STATUSF_IP7) /* cpu timer */ -+ do_IRQ(7); -+ else if (pending & STATUSF_IP2) /* int0 hardware line */ -+ ar7_cascade(); -+ else -+ spurious_interrupt(); -+} -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/Makefile linux-2.6.30.5/arch/mips/ar7/Makefile ---- linux-2.6.30.5.orig/arch/mips/ar7/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/Makefile 2009-08-26 20:05:03.000000000 +0200 -@@ -0,0 +1,10 @@ -+ -+obj-y := \ -+ prom.o \ -+ setup.o \ -+ memory.o \ -+ irq.o \ -+ time.o \ -+ platform.o \ -+ gpio.o \ -+ clock.o -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/memory.c linux-2.6.30.5/arch/mips/ar7/memory.c ---- linux-2.6.30.5.orig/arch/mips/ar7/memory.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/memory.c 2009-08-26 20:05:03.000000000 +0200 -@@ -0,0 +1,74 @@ -+/* -+ * Based on arch/mips/mm/init.c -+ * Copyright (C) 1994 - 2000 Ralf Baechle -+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc. -+ * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com -+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+static int __init memsize(void) -+{ -+ u32 size = (64 << 20); -+ u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4); -+ u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); -+ u32 *tmpaddr = addr; -+ -+ while (tmpaddr > kernel_end) { -+ *tmpaddr = (u32)tmpaddr; -+ size >>= 1; -+ tmpaddr -= size >> 2; -+ } -+ -+ do { -+ tmpaddr += size >> 2; -+ if (*tmpaddr != (u32)tmpaddr) -+ break; -+ size <<= 1; -+ } while (size < (64 << 20)); -+ -+ writel(tmpaddr, &addr); -+ -+ return size; -+} -+ -+void __init prom_meminit(void) -+{ -+ unsigned long pages; -+ -+ pages = memsize() >> PAGE_SHIFT; -+ add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT, -+ BOOT_MEM_RAM); -+} -+ -+void __init prom_free_prom_memory(void) -+{ -+ return; -+} -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/platform.c linux-2.6.30.5/arch/mips/ar7/platform.c ---- linux-2.6.30.5.orig/arch/mips/ar7/platform.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/platform.c 2009-08-26 20:06:50.000000000 +0200 -@@ -0,0 +1,550 @@ -+/* -+ * Copyright (C) 2006,2007 Felix Fietkau -+ * Copyright (C) 2006,2007 Eugene Konev -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+struct plat_vlynq_data { -+ struct plat_vlynq_ops ops; -+ int gpio_bit; -+ int reset_bit; -+}; -+ -+ -+static int vlynq_on(struct vlynq_device *dev) -+{ -+ int result; -+ struct plat_vlynq_data *pdata = dev->dev.platform_data; -+ -+ if ((result = gpio_request(pdata->gpio_bit, "vlynq"))) -+ goto out; -+ -+ ar7_device_reset(pdata->reset_bit); -+ -+ if ((result = ar7_gpio_disable(pdata->gpio_bit))) -+ goto out_enabled; -+ -+ if ((result = ar7_gpio_enable(pdata->gpio_bit))) -+ goto out_enabled; -+ -+ if ((result = gpio_direction_output(pdata->gpio_bit, 0))) -+ goto out_gpio_enabled; -+ -+ mdelay(50); -+ -+ gpio_set_value(pdata->gpio_bit, 1); -+ mdelay(50); -+ -+ return 0; -+ -+out_gpio_enabled: -+ ar7_gpio_disable(pdata->gpio_bit); -+out_enabled: -+ ar7_device_disable(pdata->reset_bit); -+ gpio_free(pdata->gpio_bit); -+out: -+ return result; -+} -+ -+static void vlynq_off(struct vlynq_device *dev) -+{ -+ struct plat_vlynq_data *pdata = dev->dev.platform_data; -+ ar7_gpio_disable(pdata->gpio_bit); -+ gpio_free(pdata->gpio_bit); -+ ar7_device_disable(pdata->reset_bit); -+} -+ -+static struct resource physmap_flash_resource = { -+ .name = "mem", -+ .flags = IORESOURCE_MEM, -+ .start = 0x10000000, -+ .end = 0x107fffff, -+}; -+ -+static struct resource cpmac_low_res[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = AR7_REGS_MAC0, -+ .end = AR7_REGS_MAC0 + 0x7ff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 27, -+ .end = 27, -+ }, -+}; -+ -+static struct resource cpmac_high_res[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = AR7_REGS_MAC1, -+ .end = AR7_REGS_MAC1 + 0x7ff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 41, -+ .end = 41, -+ }, -+}; -+ -+static struct resource vlynq_low_res[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = AR7_REGS_VLYNQ0, -+ .end = AR7_REGS_VLYNQ0 + 0xff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 29, -+ .end = 29, -+ }, -+ { -+ .name = "mem", -+ .flags = IORESOURCE_MEM, -+ .start = 0x04000000, -+ .end = 0x04ffffff, -+ }, -+ { -+ .name = "devirq", -+ .flags = IORESOURCE_IRQ, -+ .start = 80, -+ .end = 111, -+ }, -+}; -+ -+static struct resource vlynq_high_res[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = AR7_REGS_VLYNQ1, -+ .end = AR7_REGS_VLYNQ1 + 0xff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 33, -+ .end = 33, -+ }, -+ { -+ .name = "mem", -+ .flags = IORESOURCE_MEM, -+ .start = 0x0c000000, -+ .end = 0x0cffffff, -+ }, -+ { -+ .name = "devirq", -+ .flags = IORESOURCE_IRQ, -+ .start = 112, -+ .end = 143, -+ }, -+}; -+ -+static struct resource usb_res[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = AR7_REGS_USB, -+ .end = AR7_REGS_USB + 0xff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 32, -+ .end = 32, -+ }, -+ { -+ .name = "mem", -+ .flags = IORESOURCE_MEM, -+ .start = 0x03400000, -+ .end = 0x034001fff, -+ }, -+}; -+ -+static struct physmap_flash_data physmap_flash_data = { -+ .width = 2, -+}; -+ -+/* lets assume this is suitable for both high and low cpmacs links */ -+static struct fixed_phy_status fixed_phy_status __initdata = { -+ .link = 1, -+ .speed = 100, -+ .duplex = 1, -+}; -+ -+static struct plat_cpmac_data cpmac_low_data = { -+ .reset_bit = 17, -+ .power_bit = 20, -+ .phy_mask = 0x80000000, -+}; -+ -+static struct plat_cpmac_data cpmac_high_data = { -+ .reset_bit = 21, -+ .power_bit = 22, -+ .phy_mask = 0x7fffffff, -+}; -+ -+static struct plat_vlynq_data vlynq_low_data = { -+ .ops.on = vlynq_on, -+ .ops.off = vlynq_off, -+ .reset_bit = 20, -+ .gpio_bit = 18, -+}; -+ -+static struct plat_vlynq_data vlynq_high_data = { -+ .ops.on = vlynq_on, -+ .ops.off = vlynq_off, -+ .reset_bit = 16, -+ .gpio_bit = 19, -+}; -+ -+static struct platform_device physmap_flash = { -+ .id = 0, -+ .name = "physmap-flash", -+ .dev.platform_data = &physmap_flash_data, -+ .resource = &physmap_flash_resource, -+ .num_resources = 1, -+}; -+ -+static u64 cpmac_dma_mask = DMA_32BIT_MASK; -+static struct platform_device cpmac_low = { -+ .id = 0, -+ .name = "cpmac", -+ .dev = { -+ .dma_mask = &cpmac_dma_mask, -+ .coherent_dma_mask = DMA_32BIT_MASK, -+ .platform_data = &cpmac_low_data, -+ }, -+ .resource = cpmac_low_res, -+ .num_resources = ARRAY_SIZE(cpmac_low_res), -+}; -+ -+static struct platform_device cpmac_high = { -+ .id = 1, -+ .name = "cpmac", -+ .dev = { -+ .dma_mask = &cpmac_dma_mask, -+ .coherent_dma_mask = DMA_32BIT_MASK, -+ .platform_data = &cpmac_high_data, -+ }, -+ .resource = cpmac_high_res, -+ .num_resources = ARRAY_SIZE(cpmac_high_res), -+}; -+ -+static struct platform_device vlynq_low = { -+ .id = 0, -+ .name = "vlynq", -+ .dev.platform_data = &vlynq_low_data, -+ .resource = vlynq_low_res, -+ .num_resources = ARRAY_SIZE(vlynq_low_res), -+}; -+ -+static struct platform_device vlynq_high = { -+ .id = 1, -+ .name = "vlynq", -+ .dev.platform_data = &vlynq_high_data, -+ .resource = vlynq_high_res, -+ .num_resources = ARRAY_SIZE(vlynq_high_res), -+}; -+ -+ -+/* This is proper way to define uart ports, but they are then detected -+ * as xscale and, obviously, don't work... -+ */ -+#if !defined(CONFIG_SERIAL_8250) -+ -+static struct plat_serial8250_port uart0_data = { -+ .mapbase = AR7_REGS_UART0, -+ .irq = AR7_IRQ_UART0, -+ .regshift = 2, -+ .iotype = UPIO_MEM, -+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, -+}; -+ -+static struct plat_serial8250_port uart1_data = { -+ .mapbase = UR8_REGS_UART1, -+ .irq = AR7_IRQ_UART1, -+ .regshift = 2, -+ .iotype = UPIO_MEM, -+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, -+}; -+ -+static struct plat_serial8250_port uart_data[] = { -+ uart0_data, -+ uart1_data, -+ { .flags = 0 } -+}; -+ -+static struct plat_serial8250_port uart_data_single[] = { -+ uart0_data, -+ { .flags = 0 } -+}; -+ -+static struct platform_device uart = { -+ .id = 0, -+ .name = "serial8250", -+ .dev.platform_data = uart_data_single -+}; -+#endif -+ -+static struct gpio_led default_leds[] = { -+ { .name = "status", .gpio = 8, .active_low = 1, }, -+}; -+ -+static struct gpio_led dsl502t_leds[] = { -+ { .name = "status", .gpio = 9, .active_low = 1, }, -+ { .name = "ethernet", .gpio = 7, .active_low = 1, }, -+ { .name = "usb", .gpio = 12, .active_low = 1, }, -+}; -+ -+static struct gpio_led dg834g_leds[] = { -+ { .name = "ppp", .gpio = 6, .active_low = 1, }, -+ { .name = "status", .gpio = 7, .active_low = 1, }, -+ { .name = "adsl", .gpio = 8, .active_low = 1, }, -+ { .name = "wifi", .gpio = 12, .active_low = 1, }, -+ { .name = "power", .gpio = 14, .active_low = 1, .default_trigger = "default-on", }, -+}; -+ -+static struct gpio_led fb_sl_leds[] = { -+ { .name = "1", .gpio = 7, }, -+ { .name = "2", .gpio = 13, .active_low = 1, }, -+ { .name = "3", .gpio = 10, .active_low = 1, }, -+ { .name = "4", .gpio = 12, .active_low = 1, }, -+ { .name = "5", .gpio = 9, .active_low = 1, }, -+}; -+ -+static struct gpio_led fb_fon_leds[] = { -+ { .name = "1", .gpio = 8, }, -+ { .name = "2", .gpio = 3, .active_low = 1, }, -+ { .name = "3", .gpio = 5, }, -+ { .name = "4", .gpio = 4, .active_low = 1, }, -+ { .name = "5", .gpio = 11, .active_low = 1, }, -+}; -+ -+static struct gpio_led_platform_data ar7_led_data; -+ -+static struct platform_device ar7_gpio_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &ar7_led_data, -+ } -+}; -+ -+static struct platform_device ar7_udc = { -+ .id = -1, -+ .name = "ar7_udc", -+ .resource = usb_res, -+ .num_resources = ARRAY_SIZE(usb_res), -+}; -+ -+static inline unsigned char char2hex(char h) -+{ -+ switch (h) { -+ case '0': case '1': case '2': case '3': case '4': -+ case '5': case '6': case '7': case '8': case '9': -+ return h - '0'; -+ case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': -+ return h - 'A' + 10; -+ case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': -+ return h - 'a' + 10; -+ default: -+ return 0; -+ } -+} -+ -+static void cpmac_get_mac(int instance, unsigned char *dev_addr) -+{ -+ int i; -+ char name[5], default_mac[] = "00:00:00:12:34:56", *mac; -+ -+ mac = NULL; -+ sprintf(name, "mac%c", 'a' + instance); -+ mac = prom_getenv(name); -+ if (!mac) { -+ sprintf(name, "mac%c", 'a'); -+ mac = prom_getenv(name); -+ } -+ if (!mac) -+ mac = default_mac; -+ for (i = 0; i < 6; i++) -+ dev_addr[i] = (char2hex(mac[i * 3]) << 4) + -+ char2hex(mac[i * 3 + 1]); -+} -+ -+static void __init detect_leds(void) -+{ -+ char *prId, *usb_prod; -+ -+ /* Default LEDs */ -+ ar7_led_data.num_leds = ARRAY_SIZE(default_leds); -+ ar7_led_data.leds = default_leds; -+ -+ /* FIXME: the whole thing is unreliable */ -+ prId = prom_getenv("ProductID"); -+ usb_prod = prom_getenv("usb_prod"); -+ -+ /* If we can't get the product id from PROM, use the default LEDs */ -+ if (!prId) -+ return; -+ -+ if (strstr(prId, "Fritz_Box_FON")) { -+ ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds); -+ ar7_led_data.leds = fb_fon_leds; -+ } else if (strstr(prId, "Fritz_Box_")) { -+ ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds); -+ ar7_led_data.leds = fb_sl_leds; -+ } else if ((!strcmp(prId, "AR7RD") || !strcmp(prId, "AR7DB")) && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) { -+ ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds); -+ ar7_led_data.leds = dsl502t_leds; -+ } else if (strstr(prId, "DG834")) { -+ ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds); -+ ar7_led_data.leds = dg834g_leds; -+ } -+} -+ -+static int __init ar7_register_devices(void) -+{ -+ int res; -+ -+#ifdef CONFIG_SERIAL_8250 -+ -+ static struct uart_port uart_port[2]; -+ -+ memset(uart_port, 0, sizeof(struct uart_port) * 2); -+ -+ uart_port[0].type = PORT_AR7; -+ uart_port[0].line = 0; -+ uart_port[0].irq = AR7_IRQ_UART0; -+ uart_port[0].uartclk = ar7_bus_freq() / 2; -+ uart_port[0].iotype = UPIO_MEM; -+ uart_port[0].mapbase = AR7_REGS_UART0; -+ uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); -+ uart_port[0].regshift = 2; -+ res = early_serial_setup(&uart_port[0]); -+ if (res) -+ return res; -+ -+ -+ /* Only TNETD73xx have a second serial port */ -+ if (ar7_has_second_uart()) { -+ uart_port[1].type = PORT_AR7; -+ uart_port[1].line = 1; -+ uart_port[1].irq = AR7_IRQ_UART1; -+ uart_port[1].uartclk = ar7_bus_freq() / 2; -+ uart_port[1].iotype = UPIO_MEM; -+ uart_port[1].mapbase = UR8_REGS_UART1; -+ uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); -+ uart_port[1].regshift = 2; -+ res = early_serial_setup(&uart_port[1]); -+ if (res) -+ return res; -+ } -+ -+#else /* !CONFIG_SERIAL_8250 */ -+ -+ uart_data[0].uartclk = ar7_bus_freq() / 2; -+ uart_data[1].uartclk = uart_data[0].uartclk; -+ -+ /* Only TNETD73xx have a second serial port */ -+ if (ar7_has_second_uart()) -+ uart.dev.platform_data = uart_data; -+ -+ res = platform_device_register(&uart); -+ if (res) -+ return res; -+ -+#endif /* CONFIG_SERIAL_8250 */ -+ -+ res = platform_device_register(&physmap_flash); -+ if (res) -+ return res; -+ -+ ar7_device_disable(vlynq_low_data.reset_bit); -+ res = platform_device_register(&vlynq_low); -+ if (res) -+ return res; -+ -+ if (ar7_has_high_vlynq()) { -+ ar7_device_disable(vlynq_high_data.reset_bit); -+ res = platform_device_register(&vlynq_high); -+ if (res) -+ return res; -+ } -+ -+ if (ar7_has_high_cpmac()) { -+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status); -+ if (res && res != -ENODEV) -+ return res; -+ -+ cpmac_get_mac(1, cpmac_high_data.dev_addr); -+ res = platform_device_register(&cpmac_high); -+ if (res) -+ return res; -+ } else { -+ cpmac_low_data.phy_mask = 0xffffffff; -+ } -+ -+ res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status); -+ if (res && res != -ENODEV) -+ return res; -+ -+ cpmac_get_mac(0, cpmac_low_data.dev_addr); -+ res = platform_device_register(&cpmac_low); -+ if (res) -+ return res; -+ -+ detect_leds(); -+ res = platform_device_register(&ar7_gpio_leds); -+ if (res) -+ return res; -+ -+ res = platform_device_register(&ar7_udc); -+ -+ return res; -+} -+ -+ -+arch_initcall(ar7_register_devices); -diff -Nur linux-2.6.30.5.orig/arch/mips/ar7/prom.c linux-2.6.30.5/arch/mips/ar7/prom.c ---- linux-2.6.30.5.orig/arch/mips/ar7/prom.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.30.5/arch/mips/ar7/prom.c 2009-08-26 20:05:03.000000000 +0200 -@@ -0,0 +1,321 @@ -+/* -+ * Carsten Langgaard, carstenl@mips.com -+ * Copyright