From dfadb4d959da4c63d0c634f0d50713f3fa679e50 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Sun, 2 Jan 2011 13:22:45 +0100 Subject: make bulk fixes. fix toolchain building for sparc64/ppc --- target/mips64el/Makefile | 10 +- target/mips64el/files/etc/inittab | 4 - target/mips64el/patches/io_map_base.patch | 52 - target/mips64el/patches/lemote.patch | 4267 ---------------------- target/mips64el/sys-available/toolchain | 8 - target/mips64el/sys-available/toolchain-mips64el | 8 + target/mips64el/uclibc.config | 11 +- 7 files changed, 21 insertions(+), 4339 deletions(-) delete mode 100644 target/mips64el/files/etc/inittab delete mode 100644 target/mips64el/patches/io_map_base.patch delete mode 100644 target/mips64el/patches/lemote.patch delete mode 100644 target/mips64el/sys-available/toolchain create mode 100644 target/mips64el/sys-available/toolchain-mips64el (limited to 'target/mips64el') diff --git a/target/mips64el/Makefile b/target/mips64el/Makefile index fbfdfc63e..d9ff26f57 100644 --- a/target/mips64el/Makefile +++ b/target/mips64el/Makefile @@ -9,7 +9,13 @@ include $(TOPDIR)/mk/image.mk KERNEL:=$(LINUX_DIR)/vmlinux -ifeq ($(FS),archive) +ifeq ($(ADK_TARGET_FS),nfsroot) +imageinstall: $(BIN_DIR)/$(ROOTFSUSERTARBALL) + @cp $(KERNEL) $(BIN_DIR)/$(TARGET_KERNEL) + @echo 'The linux kernel is here: $(BIN_DIR)/$(TARGET_KERNEL)' + @echo 'The nfs root tarball is: ${BIN_DIR}/${ROOTFSUSERTARBALL}' +endif +ifeq ($(ADK_TARGET_FS),archive) imageinstall: $(BIN_DIR)/$(ROOTFSTARBALL) @cp $(KERNEL) $(BIN_DIR)/${TARGET_KERNEL} @echo "The RootFS tarball is: $(BIN_DIR)/$(ROOTFSTARBALL)," @@ -18,7 +24,7 @@ imageinstall: $(BIN_DIR)/$(ROOTFSTARBALL) @echo "Start qemu with following options:" @echo 'qemu-system-mips64el -nographic -M malta -kernel $(BIN_DIR)/${TARGET_KERNEL} -hda qemu-${CPU_ARCH}.img -append "root=/dev/hda1"' endif -ifeq ($(FS),initramfs) +ifeq ($(ADK_TARGET_FS),initramfs) imageinstall: $(BIN_DIR)/$(INITRAMFS) @cp $(KERNEL) $(BIN_DIR)/${TARGET_KERNEL} @echo 'The kernel file is: ${BIN_DIR}/${TARGET_KERNEL}' diff --git a/target/mips64el/files/etc/inittab b/target/mips64el/files/etc/inittab deleted file mode 100644 index 6f21e703b..000000000 --- a/target/mips64el/files/etc/inittab +++ /dev/null @@ -1,4 +0,0 @@ -::sysinit:/etc/init.d/rcS -::shutdown:/etc/init.d/rcK -ttyS0::respawn:/sbin/getty -i -L ttyS0 115200 vt100 -tty1::respawn:/sbin/getty -i -L tty1 115200 vt100 diff --git a/target/mips64el/patches/io_map_base.patch b/target/mips64el/patches/io_map_base.patch deleted file mode 100644 index be39ffe09..000000000 --- a/target/mips64el/patches/io_map_base.patch +++ /dev/null @@ -1,52 +0,0 @@ -diff -Nur linux-2.6.28.orig/arch/mips/include/asm/mips-boards/generic.h linux-2.6.28/arch/mips/include/asm/mips-boards/generic.h ---- linux-2.6.28.orig/arch/mips/include/asm/mips-boards/generic.h 2008-12-25 00:26:37.000000000 +0100 -+++ linux-2.6.28/arch/mips/include/asm/mips-boards/generic.h 2009-01-09 23:03:02.000000000 +0100 -@@ -92,7 +92,7 @@ - extern void mips_reboot_setup(void); - - #ifdef CONFIG_PCI --extern void mips_pcibios_init(void); -+extern int mips_pcibios_init(void); - #else - #define mips_pcibios_init() do { } while (0) - #endif -diff -Nur linux-2.6.28.orig/arch/mips/mti-malta/malta-pci.c linux-2.6.28/arch/mips/mti-malta/malta-pci.c ---- linux-2.6.28.orig/arch/mips/mti-malta/malta-pci.c 2008-12-25 00:26:37.000000000 +0100 -+++ linux-2.6.28/arch/mips/mti-malta/malta-pci.c 2009-01-09 23:02:02.000000000 +0100 -@@ -87,10 +87,11 @@ - .mem_resource = &msc_mem_resource, - }; - --void __init mips_pcibios_init(void) -+int __init mips_pcibios_init(void) - { - struct pci_controller *controller; - resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; -+ void __iomem *io_map_base; - - switch (mips_revision_sconid) { - case MIPS_REVISION_SCON_GT64120: -@@ -230,7 +231,7 @@ - controller = &msc_controller; - break; - default: -- return; -+ return 0; - } - - if (controller->io_resource->start < 0x00001000UL) /* FIXME */ -@@ -239,5 +240,14 @@ - iomem_resource.end &= 0xfffffffffULL; /* 64 GB */ - ioport_resource.end = controller->io_resource->end; - -+ io_map_base = ioremap(MIPS_MSC01_PCI_REG_BASE, -+ controller->io_resource->end - controller->io_resource->start + 1); -+ if (!io_map_base) -+ return -EBUSY; -+ -+ controller->io_map_base = (unsigned long)io_map_base; -+ - register_pci_controller(controller); -+ -+ return 0; - } diff --git a/target/mips64el/patches/lemote.patch b/target/mips64el/patches/lemote.patch deleted file mode 100644 index dce900900..000000000 --- a/target/mips64el/patches/lemote.patch +++ /dev/null @@ -1,4267 +0,0 @@ -diff -Nur linux-2.6.36.orig/arch/mips/Kconfig linux-2.6.36/arch/mips/Kconfig ---- linux-2.6.36.orig/arch/mips/Kconfig 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/Kconfig 2010-11-18 11:47:59.000000000 +0100 -@@ -205,7 +205,7 @@ - - config MACH_LOONGSON - bool "Loongson family of machines" -- select SYS_SUPPORTS_ZBOOT -+ select SYS_SUPPORTS_ZBOOT_UART16550 - help - This enables the support of Loongson family of machines. - -@@ -1093,6 +1093,8 @@ - bool "Loongson 2E" - depends on SYS_HAS_CPU_LOONGSON2E - select CPU_LOONGSON2 -+ select GENERIC_GPIO -+ select ARCH_REQUIRE_GPIOLIB - help - The Loongson 2E processor implements the MIPS III instruction set - with many extensions. -@@ -2012,6 +2014,18 @@ - source "kernel/time/Kconfig" - - # -+# High Resolution sched_clock() Configuration -+# -+ -+config CPU_HAS_FIXED_C0_COUNT -+ bool -+ -+config CPU_SUPPORTS_HR_SCHED_CLOCK -+ bool -+ depends on CPU_HAS_FIXED_C0_COUNT || !CPU_FREQ -+ default y -+ -+# - # Timer Interrupt Frequency Configuration - # - -diff -Nur linux-2.6.36.orig/arch/mips/include/asm/dma-mapping.h linux-2.6.36/arch/mips/include/asm/dma-mapping.h ---- linux-2.6.36.orig/arch/mips/include/asm/dma-mapping.h 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/include/asm/dma-mapping.h 2010-11-18 11:47:59.000000000 +0100 -@@ -65,4 +65,8 @@ - extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction); - -+#define ARCH_HAS_DMA_MMAP_COHERENT -+extern int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, -+ void *cpu_addr, dma_addr_t handle, size_t size); -+ - #endif /* _ASM_DMA_MAPPING_H */ -diff -Nur linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h linux-2.6.36/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h ---- linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h 2010-11-18 11:47:59.000000000 +0100 -@@ -255,21 +255,12 @@ - * IDE STANDARD - */ - #define IDE_CAP 0x00 --#define IDE_CONFIG 0x01 --#define IDE_SMI 0x02 --#define IDE_ERROR 0x03 --#define IDE_PM 0x04 --#define IDE_DIAG 0x05 -- --/* -- * IDE SPEC. -- */ - #define IDE_IO_BAR 0x08 - #define IDE_CFG 0x10 - #define IDE_DTC 0x12 - #define IDE_CAST 0x13 - #define IDE_ETC 0x14 --#define IDE_INTERNAL_PM 0x15 -+#define IDE_PM 0x15 - - /* - * ACC STANDARD -@@ -301,5 +292,40 @@ - /* GPIO : I/O SPACE; REG : 32BITS */ - #define GPIOL_OUT_VAL 0x00 - #define GPIOL_OUT_EN 0x04 -+#define GPIOL_OUT_AUX1_SEL 0x10 -+/* SMB : I/O SPACE, REG : 8BITS WIDTH */ -+#define SMB_SDA 0x00 -+#define SMB_STS 0x01 -+#define SMB_STS_SLVSTP (1 << 7) -+#define SMB_STS_SDAST (1 << 6) -+#define SMB_STS_BER (1 << 5) -+#define SMB_STS_NEGACK (1 << 4) -+#define SMB_STS_STASTR (1 << 3) -+#define SMB_STS_NMATCH (1 << 2) -+#define SMB_STS_MASTER (1 << 1) -+#define SMB_STS_XMIT (1 << 0) -+#define SMB_CTRL_STS 0x02 -+#define SMB_CSTS_TGSTL (1 << 5) -+#define SMB_CSTS_TSDA (1 << 4) -+#define SMB_CSTS_GCMTCH (1 << 3) -+#define SMB_CSTS_MATCH (1 << 2) -+#define SMB_CSTS_BB (1 << 1) -+#define SMB_CSTS_BUSY (1 << 0) -+#define SMB_CTRL1 0x03 -+#define SMB_CTRL1_STASTRE (1 << 7) -+#define SMB_CTRL1_NMINTE (1 << 6) -+#define SMB_CTRL1_GCMEN (1 << 5) -+#define SMB_CTRL1_ACK (1 << 4) -+#define SMB_CTRL1_RSVD (1 << 3) -+#define SMB_CTRL1_INTEN (1 << 2) -+#define SMB_CTRL1_STOP (1 << 1) -+#define SMB_CTRL1_START (1 << 0) -+#define SMB_ADDR 0x04 -+#define SMB_ADDR_SAEN (1 << 7) -+#define SMB_CONTROLLER_ADDR (0xef << 0) -+#define SMB_CTRL2 0x05 -+#define SMB_FREQ (0x20 << 1) -+#define SMB_ENABLE (0x01 << 0) -+#define SMB_CTRL3 0x06 - - #endif /* _CS5536_H */ -diff -Nur linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h linux-2.6.36/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h ---- linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h 2010-11-18 11:47:59.000000000 +0100 -@@ -32,4 +32,9 @@ - #define MFGPT0_CNT (MFGPT_BASE + 4) - #define MFGPT0_SETUP (MFGPT_BASE + 6) - -+#define MFGPT2_CMP1 (MFGPT_BASE + 0x10) -+#define MFGPT2_CMP2 (MFGPT_BASE + 0x12) -+#define MFGPT2_CNT (MFGPT_BASE + 0x14) -+#define MFGPT2_SETUP (MFGPT_BASE + 0x16) -+ - #endif /*!_CS5536_MFGPT_H */ -diff -Nur linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/ec_kb3310b.h linux-2.6.36/arch/mips/include/asm/mach-loongson/ec_kb3310b.h ---- linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/ec_kb3310b.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.36/arch/mips/include/asm/mach-loongson/ec_kb3310b.h 2010-11-18 11:47:59.000000000 +0100 -@@ -0,0 +1,191 @@ -+/* -+ * KB3310B Embedded Controller -+ * -+ * Copyright (C) 2008 Lemote Inc. -+ * Author: liujl , 2008-03-14 -+ * Copyright (C) 2009 Lemote Inc. -+ * Author: Wu Zhangjin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef _EC_KB3310B_H -+#define _EC_KB3310B_H -+ -+extern unsigned char ec_read(unsigned short addr); -+extern void ec_write(unsigned short addr, unsigned char val); -+extern int ec_query_seq(unsigned char cmd); -+extern int ec_query_event_num(void); -+extern int ec_get_event_num(void); -+ -+typedef int (*sci_handler) (int status); -+extern sci_handler yeeloong_report_lid_status; -+ -+#define SCI_IRQ_NUM 0x0A -+ -+/* -+ * The following registers are determined by the EC index configuration. -+ * 1, fill the PORT_HIGH as EC register high part. -+ * 2, fill the PORT_LOW as EC register low part. -+ * 3, fill the PORT_DATA as EC register write data or get the data from it. -+ */ -+#define EC_IO_PORT_HIGH 0x0381 -+#define EC_IO_PORT_LOW 0x0382 -+#define EC_IO_PORT_DATA 0x0383 -+ -+/* -+ * EC delay time is 500us for register and status access -+ */ -+#define EC_REG_DELAY 500 /* unit : us */ -+#define EC_CMD_TIMEOUT 0x1000 -+ -+/* -+ * EC access port for SCI communication -+ */ -+#define EC_CMD_PORT 0x66 -+#define EC_STS_PORT 0x66 -+#define EC_DAT_PORT 0x62 -+#define CMD_INIT_IDLE_MODE 0xdd -+#define CMD_EXIT_IDLE_MODE 0xdf -+#define CMD_INIT_RESET_MODE 0xd8 -+#define CMD_REBOOT_SYSTEM 0x8c -+#define CMD_GET_EVENT_NUM 0x84 -+#define CMD_PROGRAM_PIECE 0xda -+ -+/* Temperature & Fan registers */ -+#define REG_TEMPERATURE_VALUE 0xF458 -+#define REG_FAN_AUTO_MAN_SWITCH 0xF459 -+#define BIT_FAN_AUTO 0 -+#define BIT_FAN_MANUAL 1 -+#define REG_FAN_CONTROL 0xF4D2 -+#define BIT_FAN_CONTROL_ON (1 << 0) -+#define BIT_FAN_CONTROL_OFF (0 << 0) -+#define REG_FAN_STATUS 0xF4DA -+#define BIT_FAN_STATUS_ON (1 << 0) -+#define BIT_FAN_STATUS_OFF (0 << 0) -+#define REG_FAN_SPEED_HIGH 0xFE22 -+#define REG_FAN_SPEED_LOW 0xFE23 -+#define REG_FAN_SPEED_LEVEL 0xF4CC -+/* Fan speed divider */ -+#define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/ -+ -+/* Battery registers */ -+#define REG_BAT_DESIGN_CAP_HIGH 0xF77D -+#define REG_BAT_DESIGN_CAP_LOW 0xF77E -+#define REG_BAT_FULLCHG_CAP_HIGH 0xF780 -+#define REG_BAT_FULLCHG_CAP_LOW 0xF781 -+#define REG_BAT_DESIGN_VOL_HIGH 0xF782 -+#define REG_BAT_DESIGN_VOL_LOW 0xF783 -+#define REG_BAT_CURRENT_HIGH 0xF784 -+#define REG_BAT_CURRENT_LOW 0xF785 -+#define REG_BAT_VOLTAGE_HIGH 0xF786 -+#define REG_BAT_VOLTAGE_LOW 0xF787 -+#define REG_BAT_TEMPERATURE_HIGH 0xF788 -+#define REG_BAT_TEMPERATURE_LOW 0xF789 -+#define REG_BAT_RELATIVE_CAP_HIGH 0xF492 -+#define REG_BAT_RELATIVE_CAP_LOW 0xF493 -+#define REG_BAT_VENDOR 0xF4C4 -+#define FLAG_BAT_VENDOR_SANYO 0x01 -+#define FLAG_BAT_VENDOR_SIMPLO 0x02 -+#define REG_BAT_CELL_COUNT 0xF4C6 -+#define FLAG_BAT_CELL_3S1P 0x03 -+#define FLAG_BAT_CELL_3S2P 0x06 -+#define REG_BAT_CHARGE 0xF4A2 -+#define FLAG_BAT_CHARGE_DISCHARGE 0x01 -+#define FLAG_BAT_CHARGE_CHARGE 0x02 -+#define FLAG_BAT_CHARGE_ACPOWER 0x00 -+#define REG_BAT_STATUS 0xF4B0 -+#define BIT_BAT_STATUS_LOW (1 << 5) -+#define BIT_BAT_STATUS_DESTROY (1 << 2) -+#define BIT_BAT_STATUS_FULL (1 << 1) -+#define BIT_BAT_STATUS_IN (1 << 0) -+#define REG_BAT_CHARGE_STATUS 0xF4B1 -+#define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) -+#define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) -+#define REG_BAT_STATE 0xF482 -+#define BIT_BAT_STATE_CHARGING (1 << 1) -+#define BIT_BAT_STATE_DISCHARGING (1 << 0) -+#define REG_BAT_POWER 0xF440 -+#define BIT_BAT_POWER_S3 (1 << 2) -+#define BIT_BAT_POWER_ON (1 << 1) -+#define BIT_BAT_POWER_ACIN (1 << 0) -+ -+/* Audio: rd/wr */ -+#define REG_AUDIO_VOLUME 0xF46C -+#define REG_AUDIO_MUTE 0xF4E7 -+#define REG_AUDIO_BEEP 0xF4D0 -+/* USB port power or not: rd/wr */ -+#define REG_USB0_FLAG 0xF461 -+#define REG_USB1_FLAG 0xF462 -+#define REG_USB2_FLAG 0xF463 -+#define BIT_USB_FLAG_ON 1 -+#define BIT_USB_FLAG_OFF 0 -+/* LID */ -+#define REG_LID_DETECT 0xF4BD -+#define BIT_LID_DETECT_ON 1 -+#define BIT_LID_DETECT_OFF 0 -+/* CRT */ -+#define REG_CRT_DETECT 0xF4AD -+#define BIT_CRT_DETECT_PLUG 1 -+#define BIT_CRT_DETECT_UNPLUG 0 -+/* LCD backlight brightness adjust: 9 levels */ -+#define REG_DISPLAY_BRIGHTNESS 0xF4F5 -+/* Black screen Status */ -+#define BIT_DISPLAY_LCD_ON 1 -+#define BIT_DISPLAY_LCD_OFF 0 -+/* LCD backlight control: off/restore */ -+#define REG_BACKLIGHT_CTRL 0xF7BD -+#define BIT_BACKLIGHT_ON 1 -+#define BIT_BACKLIGHT_OFF 0 -+/* Reset the machine auto-clear: rd/wr */ -+#define REG_RESET 0xF4EC -+#define BIT_RESET_ON 1 -+/* Light the led: rd/wr */ -+#define REG_LED 0xF4C8 -+#define BIT_LED_RED_POWER (1 << 0) -+#define BIT_LED_ORANGE_POWER (1 << 1) -+#define BIT_LED_GREEN_CHARGE (1 << 2) -+#define BIT_LED_RED_CHARGE (1 << 3) -+#define BIT_LED_NUMLOCK (1 << 4) -+/* Test led mode, all led on/off */ -+#define REG_LED_TEST 0xF4C2 -+#define BIT_LED_TEST_IN 1 -+#define BIT_LED_TEST_OUT 0 -+/* Camera on/off */ -+#define REG_CAMERA_STATUS 0xF46A -+#define BIT_CAMERA_STATUS_ON 1 -+#define BIT_CAMERA_STATUS_OFF 0 -+#define REG_CAMERA_CONTROL 0xF7B7 -+#define BIT_CAMERA_CONTROL_OFF 0 -+#define BIT_CAMERA_CONTROL_ON 1 -+/* Wlan Status */ -+#define REG_WLAN 0xF4FA -+#define BIT_WLAN_ON 1 -+#define BIT_WLAN_OFF 0 -+#define REG_DISPLAY_LCD 0xF79F -+ -+/* SCI Event Number from EC */ -+enum { -+ EVENT_LID = 0x23, /* Turn on/off LID */ -+ EVENT_SWITCHVIDEOMODE, /* Fn+F3 for display switch */ -+ EVENT_SLEEP, /* Fn+F1 for entering sleep mode */ -+ EVENT_OVERTEMP, /* Over-temperature happened */ -+ EVENT_CRT_DETECT, /* CRT is connected */ -+ EVENT_CAMERA, /* Camera on/off */ -+ EVENT_USB_OC2, /* USB2 Over Current occurred */ -+ EVENT_USB_OC0, /* USB0 Over Current occurred */ -+ EVENT_DISPLAYTOGGLE, /* Fn+F2, Turn on/off backlight */ -+ EVENT_AUDIO_MUTE, /* Fn+F4, Mute on/off */ -+ EVENT_DISPLAY_BRIGHTNESS,/* Fn+^/V, LCD backlight brightness adjust */ -+ EVENT_AC_BAT, /* AC & Battery relative issue */ -+ EVENT_AUDIO_VOLUME, /* Fn+<|>, Volume adjust */ -+ EVENT_WLAN, /* Wlan on/off */ -+}; -+ -+#define EVENT_START EVENT_LID -+#define EVENT_END EVENT_WLAN -+ -+#endif /* !_EC_KB3310B_H */ -diff -Nur linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/loongson.h linux-2.6.36/arch/mips/include/asm/mach-loongson/loongson.h ---- linux-2.6.36.orig/arch/mips/include/asm/mach-loongson/loongson.h 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/include/asm/mach-loongson/loongson.h 2010-11-18 11:47:59.000000000 +0100 -@@ -42,6 +42,12 @@ - #endif - } - -+/* -+ * Copy kernel command line from arcs_cmdline -+ */ -+#include -+extern char loongson_cmdline[COMMAND_LINE_SIZE]; -+ - /* irq operation functions */ - extern void bonito_irqdispatch(void); - extern void __init bonito_irq_init(void); -diff -Nur linux-2.6.36.orig/arch/mips/kernel/csrc-r4k.c linux-2.6.36/arch/mips/kernel/csrc-r4k.c ---- linux-2.6.36.orig/arch/mips/kernel/csrc-r4k.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/kernel/csrc-r4k.c 2010-11-18 11:47:59.000000000 +0100 -@@ -6,10 +6,66 @@ - * Copyright (C) 2007 by Ralf Baechle - */ - #include -+#include - #include -+#include - - #include - -+#ifdef CONFIG_CPU_SUPPORTS_HR_SCHED_CLOCK -+/* -+ * MIPS sched_clock implementation. -+ * -+ * Because the hardware timer period is quite short and because cnt32_to_63() -+ * needs to be called at least once per half period to work properly, a kernel -+ * timer is set up to ensure this requirement is always met. -+ * -+ * Please refer to include/linux/cnt32_to_63.h and arch/arm/plat-orion/time.c -+ */ -+#define CLOCK2NS_SCALE_FACTOR 8 -+ -+static unsigned long clock2ns_scale __read_mostly; -+ -+unsigned long long notrace sched_clock(void) -+{ -+ unsigned long long v = cnt32_to_63(read_c0_count()); -+ return (v * clock2ns_scale) >> CLOCK2NS_SCALE_FACTOR; -+} -+ -+static struct timer_list cnt32_to_63_keepwarm_timer; -+ -+static void cnt32_to_63_keepwarm(unsigned long data) -+{ -+ mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data)); -+ sched_clock(); -+} -+#endif -+ -+static inline void setup_hres_sched_clock(unsigned long clock) -+{ -+#ifdef CONFIG_CPU_SUPPORTS_HR_SCHED_CLOCK -+ unsigned long long v; -+ unsigned long data; -+ -+ v = NSEC_PER_SEC; -+ v <<= CLOCK2NS_SCALE_FACTOR; -+ v += clock/2; -+ do_div(v, clock); -+ /* -+ * We want an even value to automatically clear the top bit -+ * returned by cnt32_to_63() without an additional run time -+ * instruction. So if the LSB is 1 then round it up. -+ */ -+ if (v & 1) -+ v++; -+ clock2ns_scale = v; -+ -+ data = 0x80000000UL / clock * HZ; -+ setup_timer(&cnt32_to_63_keepwarm_timer, cnt32_to_63_keepwarm, data); -+ mod_timer(&cnt32_to_63_keepwarm_timer, round_jiffies(jiffies + data)); -+#endif -+} -+ - static cycle_t c0_hpt_read(struct clocksource *cs) - { - return read_c0_count(); -@@ -27,6 +83,8 @@ - if (!cpu_has_counter || !mips_hpt_frequency) - return -ENXIO; - -+ setup_hres_sched_clock(mips_hpt_frequency); -+ - /* Calculate a somewhat reasonable rating value */ - clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; - -diff -Nur linux-2.6.36.orig/arch/mips/kernel/time.c linux-2.6.36/arch/mips/kernel/time.c ---- linux-2.6.36.orig/arch/mips/kernel/time.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/kernel/time.c 2010-11-18 11:47:59.000000000 +0100 -@@ -119,6 +119,11 @@ - - void __init time_init(void) - { -+#ifdef CONFIG_HR_SCHED_CLOCK -+ if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug()) -+ write_c0_count(0); -+#endif -+ - plat_time_init(); - - if (!mips_clockevent_init() || !cpu_has_mfc0_count_bug()) -diff -Nur linux-2.6.36.orig/arch/mips/loongson/common/cmdline.c linux-2.6.36/arch/mips/loongson/common/cmdline.c ---- linux-2.6.36.orig/arch/mips/loongson/common/cmdline.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/common/cmdline.c 2010-11-18 11:47:59.000000000 +0100 -@@ -17,10 +17,15 @@ - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -+#include - #include - - #include - -+/* the kernel command line copied from arcs_cmdline */ -+char loongson_cmdline[COMMAND_LINE_SIZE]; -+EXPORT_SYMBOL(loongson_cmdline); -+ - void __init prom_init_cmdline(void) - { - int prom_argc; -@@ -50,4 +55,26 @@ - strcat(arcs_cmdline, " root=/dev/hda1"); - - prom_init_machtype(); -+ -+ /* append machine specific command line */ -+ switch (mips_machtype) { -+ case MACH_LEMOTE_LL2F: -+ if ((strstr(arcs_cmdline, "video=")) == NULL) -+ strcat(arcs_cmdline, " video=sisfb:1360x768-16@60"); -+ break; -+ case MACH_LEMOTE_FL2F: -+ if ((strstr(arcs_cmdline, "ide_core.ignore_cable=")) == NULL) -+ strcat(arcs_cmdline, " ide_core.ignore_cable=0"); -+ break; -+ case MACH_LEMOTE_ML2F7: -+ /* Mengloong-2F has a 800x480 screen */ -+ if ((strstr(arcs_cmdline, "vga=")) == NULL) -+ strcat(arcs_cmdline, " vga=0x313"); -+ break; -+ default: -+ break; -+ } -+ -+ /* copy arcs_cmdline into loongson_cmdline */ -+ strncpy(loongson_cmdline, arcs_cmdline, COMMAND_LINE_SIZE); - } -diff -Nur linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_acc.c linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_acc.c ---- linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_acc.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_acc.c 2010-11-18 11:47:59.000000000 +0100 -@@ -18,7 +18,7 @@ - - void pci_acc_write_reg(int reg, u32 value) - { -- u32 hi = 0, lo = value; -+ u32 hi, lo; - - switch (reg) { - case PCI_COMMAND: -@@ -66,75 +66,73 @@ - u32 pci_acc_read_reg(int reg) - { - u32 hi, lo; -- u32 conf_data = 0; -+ u32 cfg = 0; - - switch (reg) { - case PCI_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_ACC_DEVICE_ID, CS5536_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_ACC_DEVICE_ID, -+ CS5536_VENDOR_ID); - break; - case PCI_COMMAND: - _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); - if (((lo & 0xfff00000) || (hi & 0x000000ff)) - && ((hi & 0xf0000000) == 0xa0000000)) -- conf_data |= PCI_COMMAND_IO; -+ cfg |= PCI_COMMAND_IO; - _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); - if ((lo & 0x300) == 0x300) -- conf_data |= PCI_COMMAND_MASTER; -+ cfg |= PCI_COMMAND_MASTER; - break; - case PCI_STATUS: -- conf_data |= PCI_STATUS_66MHZ; -- conf_data |= PCI_STATUS_FAST_BACK; -+ cfg |= PCI_STATUS_66MHZ; -+ cfg |= PCI_STATUS_FAST_BACK; - _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); - if (lo & SB_PARE_ERR_FLAG) -- conf_data |= PCI_STATUS_PARITY; -- conf_data |= PCI_STATUS_DEVSEL_MEDIUM; -+ cfg |= PCI_STATUS_PARITY; -+ cfg |= PCI_STATUS_DEVSEL_MEDIUM; - break; - case PCI_CLASS_REVISION: - _rdmsr(ACC_MSR_REG(ACC_CAP), &hi, &lo); -- conf_data = lo & 0x000000ff; -- conf_data |= (CS5536_ACC_CLASS_CODE << 8); -+ cfg = lo & 0x000000ff; -+ cfg |= (CS5536_ACC_CLASS_CODE << 8); - break; - case PCI_CACHE_LINE_SIZE: -- conf_data = -- CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, -- PCI_NORMAL_LATENCY_TIMER); -+ cfg = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, -+ PCI_NORMAL_LATENCY_TIMER); - break; - case PCI_BAR0_REG: - _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); - if (lo & SOFT_BAR_ACC_FLAG) { -- conf_data = CS5536_ACC_RANGE | -+ cfg = CS5536_ACC_RANGE | - PCI_BASE_ADDRESS_SPACE_IO; - lo &= ~SOFT_BAR_ACC_FLAG; - _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); - } else { - _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); -- conf_data = (hi & 0x000000ff) << 12; -- conf_data |= (lo & 0xfff00000) >> 20; -- conf_data |= 0x01; -- conf_data &= ~0x02; -+ cfg = (hi & 0x000000ff) << 12; -+ cfg |= (lo & 0xfff00000) >> 20; -+ cfg |= 0x01; -+ cfg &= ~0x02; - } - break; - case PCI_CARDBUS_CIS: -- conf_data = PCI_CARDBUS_CIS_POINTER; -+ cfg = PCI_CARDBUS_CIS_POINTER; - break; - case PCI_SUBSYSTEM_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_ACC_SUB_ID, CS5536_SUB_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_ACC_SUB_ID, -+ CS5536_SUB_VENDOR_ID); - break; - case PCI_ROM_ADDRESS: -- conf_data = PCI_EXPANSION_ROM_BAR; -+ cfg = PCI_EXPANSION_ROM_BAR; - break; - case PCI_CAPABILITY_LIST: -- conf_data = PCI_CAPLIST_USB_POINTER; -+ cfg = PCI_CAPLIST_USB_POINTER; - break; - case PCI_INTERRUPT_LINE: -- conf_data = -- CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_ACC_INTR); -+ cfg = CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_ACC_INTR); - break; - default: - break; - } - -- return conf_data; -+ return cfg; - } -diff -Nur linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_ehci.c linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_ehci.c ---- linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_ehci.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_ehci.c 2010-11-18 11:47:59.000000000 +0100 -@@ -18,7 +18,7 @@ - - void pci_ehci_write_reg(int reg, u32 value) - { -- u32 hi = 0, lo = value; -+ u32 hi, lo; - - switch (reg) { - case PCI_COMMAND: -@@ -78,83 +78,81 @@ - - u32 pci_ehci_read_reg(int reg) - { -- u32 conf_data = 0; -+ u32 cfg = 0; - u32 hi, lo; - - switch (reg) { - case PCI_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_EHCI_DEVICE_ID, CS5536_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_EHCI_DEVICE_ID, -+ CS5536_VENDOR_ID); - break; - case PCI_COMMAND: - _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); - if (hi & PCI_COMMAND_MASTER) -- conf_data |= PCI_COMMAND_MASTER; -+ cfg |= PCI_COMMAND_MASTER; - if (hi & PCI_COMMAND_MEMORY) -- conf_data |= PCI_COMMAND_MEMORY; -+ cfg |= PCI_COMMAND_MEMORY; - break; - case PCI_STATUS: -- conf_data |= PCI_STATUS_66MHZ; -- conf_data |= PCI_STATUS_FAST_BACK; -+ cfg |= PCI_STATUS_66MHZ; -+ cfg |= PCI_STATUS_FAST_BACK; - _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); - if (lo & SB_PARE_ERR_FLAG) -- conf_data |= PCI_STATUS_PARITY; -- conf_data |= PCI_STATUS_DEVSEL_MEDIUM; -+ cfg |= PCI_STATUS_PARITY; -+ cfg |= PCI_STATUS_DEVSEL_MEDIUM; - break; - case PCI_CLASS_REVISION: - _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo); -- conf_data = lo & 0x000000ff; -- conf_data |= (CS5536_EHCI_CLASS_CODE << 8); -+ cfg = lo & 0x000000ff; -+ cfg |= (CS5536_EHCI_CLASS_CODE << 8); - break; - case PCI_CACHE_LINE_SIZE: -- conf_data = -- CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, -- PCI_NORMAL_LATENCY_TIMER); -+ cfg = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, -+ PCI_NORMAL_LATENCY_TIMER); - break; - case PCI_BAR0_REG: - _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); - if (lo & SOFT_BAR_EHCI_FLAG) { -- conf_data = CS5536_EHCI_RANGE | -+ cfg = CS5536_EHCI_RANGE | - PCI_BASE_ADDRESS_SPACE_MEMORY; - lo &= ~SOFT_BAR_EHCI_FLAG; - _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); - } else { - _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); -- conf_data = lo & 0xfffff000; -+ cfg = lo & 0xfffff000; - } - break; - case PCI_CARDBUS_CIS: -- conf_data = PCI_CARDBUS_CIS_POINTER; -+ cfg = PCI_CARDBUS_CIS_POINTER; - break; - case PCI_SUBSYSTEM_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_EHCI_SUB_ID, CS5536_SUB_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_EHCI_SUB_ID, -+ CS5536_SUB_VENDOR_ID); - break; - case PCI_ROM_ADDRESS: -- conf_data = PCI_EXPANSION_ROM_BAR; -+ cfg = PCI_EXPANSION_ROM_BAR; - break; - case PCI_CAPABILITY_LIST: -- conf_data = PCI_CAPLIST_USB_POINTER; -+ cfg = PCI_CAPLIST_USB_POINTER; - break; - case PCI_INTERRUPT_LINE: -- conf_data = -- CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR); -+ cfg = CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR); - break; - case PCI_EHCI_LEGSMIEN_REG: - _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); -- conf_data = (hi & 0x003f0000) >> 16; -+ cfg = (hi & 0x003f0000) >> 16; - break; - case PCI_EHCI_LEGSMISTS_REG: - _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); -- conf_data = (hi & 0x3f000000) >> 24; -+ cfg = (hi & 0x3f000000) >> 24; - break; - case PCI_EHCI_FLADJ_REG: - _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); -- conf_data = hi & 0x00003f00; -+ cfg = hi & 0x00003f00; - break; - default: - break; - } - -- return conf_data; -+ return cfg; - } -diff -Nur linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_ide.c linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_ide.c ---- linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_ide.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_ide.c 2010-11-18 11:47:59.000000000 +0100 -@@ -18,7 +18,7 @@ - - void pci_ide_write_reg(int reg, u32 value) - { -- u32 hi = 0, lo = value; -+ u32 hi, lo; - - switch (reg) { - case PCI_COMMAND: -@@ -72,26 +72,16 @@ - _wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo); - } - break; -- case PCI_IDE_DTC_REG: -- _rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo); -- lo = value; -- _wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo); -- break; -- case PCI_IDE_CAST_REG: -- _rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo); -- lo = value; -- _wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo); -- break; -- case PCI_IDE_ETC_REG: -- _rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo); -- lo = value; -- _wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo); -- break; -- case PCI_IDE_PM_REG: -- _rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo); -- lo = value; -- _wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo); -- break; -+#define SET_PCI_IDE_REG(r) \ -+ case PCI_IDE_##r##_REG: \ -+ _rdmsr(IDE_MSR_REG(IDE_##r), &hi, &lo); \ -+ lo = value; \ -+ _wrmsr(IDE_MSR_REG(IDE_##r), hi, lo); \ -+ break; -+ SET_PCI_IDE_REG(DTC) -+ SET_PCI_IDE_REG(CAST) -+ SET_PCI_IDE_REG(ETC) -+ SET_PCI_IDE_REG(PM) - default: - break; - } -@@ -99,94 +89,82 @@ - - u32 pci_ide_read_reg(int reg) - { -- u32 conf_data = 0; -+ u32 cfg = 0; - u32 hi, lo; - - switch (reg) { - case PCI_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_IDE_DEVICE_ID, CS5536_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_IDE_DEVICE_ID, -+ CS5536_VENDOR_ID); - break; - case PCI_COMMAND: - _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo); - if (lo & 0xfffffff0) -- conf_data |= PCI_COMMAND_IO; -+ cfg |= PCI_COMMAND_IO; - _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); - if ((lo & 0x30) == 0x30) -- conf_data |= PCI_COMMAND_MASTER; -+ cfg |= PCI_COMMAND_MASTER; - break; - case PCI_STATUS: -- conf_data |= PCI_STATUS_66MHZ; -- conf_data |= PCI_STATUS_FAST_BACK; -+ cfg |= PCI_STATUS_66MHZ; -+ cfg |= PCI_STATUS_FAST_BACK; - _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); - if (lo & SB_PARE_ERR_FLAG) -- conf_data |= PCI_STATUS_PARITY; -- conf_data |= PCI_STATUS_DEVSEL_MEDIUM; -+ cfg |= PCI_STATUS_PARITY; -+ cfg |= PCI_STATUS_DEVSEL_MEDIUM; - break; - case PCI_CLASS_REVISION: - _rdmsr(IDE_MSR_REG(IDE_CAP), &hi, &lo); -- conf_data = lo & 0x000000ff; -- conf_data |= (CS5536_IDE_CLASS_CODE << 8); -+ cfg = lo & 0x000000ff; -+ cfg |= (CS5536_IDE_CLASS_CODE << 8); - break; - case PCI_CACHE_LINE_SIZE: - _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); - hi &= 0x000000f8; -- conf_data = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, hi); -+ cfg = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, hi); - break; - case PCI_BAR4_REG: - _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); - if (lo & SOFT_BAR_IDE_FLAG) { -- conf_data = CS5536_IDE_RANGE | -+ cfg = CS5536_IDE_RANGE | - PCI_BASE_ADDRESS_SPACE_IO; - lo &= ~SOFT_BAR_IDE_FLAG; - _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); - } else { - _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo); -- conf_data = lo & 0xfffffff0; -- conf_data |= 0x01; -- conf_data &= ~0x02; -+ cfg = lo & 0xfffffff0; -+ cfg |= 0x01; -+ cfg &= ~0x02; - } - break; - case PCI_CARDBUS_CIS: -- conf_data = PCI_CARDBUS_CIS_POINTER; -+ cfg = PCI_CARDBUS_CIS_POINTER; - break; - case PCI_SUBSYSTEM_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_IDE_SUB_ID, CS5536_SUB_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_IDE_SUB_ID, -+ CS5536_SUB_VENDOR_ID); - break; - case PCI_ROM_ADDRESS: -- conf_data = PCI_EXPANSION_ROM_BAR; -+ cfg = PCI_EXPANSION_ROM_BAR; - break; - case PCI_CAPABILITY_LIST: -- conf_data = PCI_CAPLIST_POINTER; -+ cfg = PCI_CAPLIST_POINTER; - break; - case PCI_INTERRUPT_LINE: -- conf_data = -- CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_IDE_INTR); -- break; -- case PCI_IDE_CFG_REG: -- _rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo); -- conf_data = lo; -- break; -- case PCI_IDE_DTC_REG: -- _rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo); -- conf_data = lo; -- break; -- case PCI_IDE_CAST_REG: -- _rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo); -- conf_data = lo; -- break; -- case PCI_IDE_ETC_REG: -- _rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo); -- conf_data = lo; -- break; -- case PCI_IDE_PM_REG: -- _rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo); -- conf_data = lo; -+ cfg = CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_IDE_INTR); - break; -+#define GET_PCI_IDE_REG(r) \ -+ case PCI_IDE_##r##_REG: \ -+ _rdmsr(IDE_MSR_REG(IDE_##r), &hi, &cfg); \ -+ break; -+ GET_PCI_IDE_REG(CFG) -+ GET_PCI_IDE_REG(DTC) -+ GET_PCI_IDE_REG(CAST) -+ GET_PCI_IDE_REG(ETC) -+ GET_PCI_IDE_REG(PM) - default: - break; - } - -- return conf_data; -+ return cfg; - } -diff -Nur linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_ohci.c linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_ohci.c ---- linux-2.6.36.orig/arch/mips/loongson/common/cs5536/cs5536_ohci.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/common/cs5536/cs5536_ohci.c 2010-11-18 11:47:59.000000000 +0100 -@@ -18,7 +18,7 @@ - - void pci_ohci_write_reg(int reg, u32 value) - { -- u32 hi = 0, lo = value; -+ u32 hi, lo; - - switch (reg) { - case PCI_COMMAND: -@@ -73,77 +73,75 @@ - - u32 pci_ohci_read_reg(int reg) - { -- u32 conf_data = 0; -+ u32 cfg = 0; - u32 hi, lo; - - switch (reg) { - case PCI_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_OHCI_DEVICE_ID, CS5536_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_OHCI_DEVICE_ID, -+ CS5536_VENDOR_ID); - break; - case PCI_COMMAND: - _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); - if (hi & PCI_COMMAND_MASTER) -- conf_data |= PCI_COMMAND_MASTER; -+ cfg |= PCI_COMMAND_MASTER; - if (hi & PCI_COMMAND_MEMORY) -- conf_data |= PCI_COMMAND_MEMORY; -+ cfg |= PCI_COMMAND_MEMORY; - break; - case PCI_STATUS: -- conf_data |= PCI_STATUS_66MHZ; -- conf_data |= PCI_STATUS_FAST_BACK; -+ cfg |= PCI_STATUS_66MHZ; -+ cfg |= PCI_STATUS_FAST_BACK; - _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); - if (lo & SB_PARE_ERR_FLAG) -- conf_data |= PCI_STATUS_PARITY; -- conf_data |= PCI_STATUS_DEVSEL_MEDIUM; -+ cfg |= PCI_STATUS_PARITY; -+ cfg |= PCI_STATUS_DEVSEL_MEDIUM; - break; - case PCI_CLASS_REVISION: - _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo); -- conf_data = lo & 0x000000ff; -- conf_data |= (CS5536_OHCI_CLASS_CODE << 8); -+ cfg = lo & 0x000000ff; -+ cfg |= (CS5536_OHCI_CLASS_CODE << 8); - break; - case PCI_CACHE_LINE_SIZE: -- conf_data = -- CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, -- PCI_NORMAL_LATENCY_TIMER); -+ cfg = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, -+ PCI_NORMAL_LATENCY_TIMER); - break; - case PCI_BAR0_REG: - _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); - if (lo & SOFT_BAR_OHCI_FLAG) { -- conf_data = CS5536_OHCI_RANGE | -+ cfg = CS5536_OHCI_RANGE | - PCI_BASE_ADDRESS_SPACE_MEMORY; - lo &= ~SOFT_BAR_OHCI_FLAG; - _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); - } else { - _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); -- conf_data = lo & 0xffffff00; -- conf_data &= ~0x0000000f; /* 32bit mem */ -+ cfg = lo & 0xffffff00; -+ cfg &= ~0x0000000f; /* 32bit mem */ - } - break; - case PCI_CARDBUS_CIS: -- conf_data = PCI_CARDBUS_CIS_POINTER; -+ cfg = PCI_CARDBUS_CIS_POINTER; - break; - case PCI_SUBSYSTEM_VENDOR_ID: -- conf_data = -- CFG_PCI_VENDOR_ID(CS5536_OHCI_SUB_ID, CS5536_SUB_VENDOR_ID); -+ cfg = CFG_PCI_VENDOR_ID(CS5536_OHCI_SUB_ID, -+ CS5536_SUB_VENDOR_ID); - break; - case PCI_ROM_ADDRESS: -- conf_data = PCI_EXPANSION_ROM_BAR; -+ cfg = PCI_EXPANSION_ROM_BAR; - break; - case PCI_CAPABILITY_LIST: -- conf_data = PCI_CAPLIST_USB_POINTER; -+ cfg = PCI_CAPLIST_USB_POINTER; - break; - case PCI_INTERRUPT_LINE: -- conf_data = -- CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR); -+ cfg = CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR); - break; - case PCI_OHCI_INT_REG: - _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo); - if ((lo & 0x00000f00) == CS5536_USB_INTR) -- conf_data = 1; -+ cfg = 1; - break; - default: - break; - } - -- return conf_data; -+ return cfg; - } -diff -Nur linux-2.6.36.orig/arch/mips/loongson/common/mtd.c linux-2.6.36/arch/mips/loongson/common/mtd.c ---- linux-2.6.36.orig/arch/mips/loongson/common/mtd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.36/arch/mips/loongson/common/mtd.c 2010-11-18 11:47:59.000000000 +0100 -@@ -0,0 +1,91 @@ -+/* -+ * Driver for flushing/dumping ROM of PMON on loongson family machines -+ * -+ * Copyright (C) 2008-2009 Lemote Inc. -+ * Author: Yan Hua -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include -+ -+#define FLASH_PHYS_ADDR LOONGSON_BOOT_BASE -+#define FLASH_SIZE 0x080000 -+ -+#define FLASH_PARTITION0_ADDR 0x00000000 -+#define FLASH_PARTITION0_SIZE 0x00080000 -+ -+struct map_info flash_map = { -+ .name = "flash device", -+ .size = FLASH_SIZE, -+ .bankwidth = 1, -+}; -+ -+struct mtd_partition flash_parts[] = { -+ { -+ .name = "Bootloader", -+ .offset = FLASH_PARTITION0_ADDR, -+ .size = FLASH_PARTITION0_SIZE}, -+}; -+ -+#define PARTITION_COUNT ARRAY_SIZE(flash_parts) -+ -+static struct mtd_info *mymtd; -+ -+int __init init_flash(void) -+{ -+ printk(KERN_NOTICE "flash device: %x at %x\n", -+ FLASH_SIZE, FLASH_PHYS_ADDR); -+ -+ flash_map.phys = FLASH_PHYS_ADDR; -+ flash_map.virt = ioremap(FLASH_PHYS_ADDR, FLASH_SIZE); -+ -+ if (!flash_map.virt) { -+ printk(KERN_NOTICE "Failed to ioremap\n"); -+ return -EIO; -+ } -+ -+ simple_map_init(&flash_map); -+ -+ mymtd = do_map_probe("cfi_probe", &flash_map); -+ if (mymtd) { -+ add_mtd_partitions(mymtd, flash_parts, PARTITION_COUNT); -+ printk(KERN_NOTICE "pmon flash device initialized\n"); -+ return 0; -+ } -+ -+ iounmap((void *)flash_map.virt); -+ return -ENXIO; -+} -+ -+static void __exit cleanup_flash(void) -+{ -+ if (mymtd) { -+ del_mtd_partitions(mymtd); -+ map_destroy(mymtd); -+ } -+ if (flash_map.virt) { -+ iounmap((void *)flash_map.virt); -+ flash_map.virt = 0; -+ } -+} -+ -+module_init(init_flash); -+module_exit(cleanup_flash); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Yanhua "); -+MODULE_DESCRIPTION("MTD driver for pmon flushing/dumping"); -diff -Nur linux-2.6.36.orig/arch/mips/loongson/lemote-2f/Makefile linux-2.6.36/arch/mips/loongson/lemote-2f/Makefile ---- linux-2.6.36.orig/arch/mips/loongson/lemote-2f/Makefile 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/lemote-2f/Makefile 2010-11-18 11:47:59.000000000 +0100 -@@ -2,7 +2,7 @@ - # Makefile for lemote loongson2f family machines - # - --obj-y += machtype.o irq.o reset.o ec_kb3310b.o -+obj-y += machtype.o irq.o reset.o ec_kb3310b.o platform.o - - # - # Suspend Support -diff -Nur linux-2.6.36.orig/arch/mips/loongson/lemote-2f/ec_kb3310b.c linux-2.6.36/arch/mips/loongson/lemote-2f/ec_kb3310b.c ---- linux-2.6.36.orig/arch/mips/loongson/lemote-2f/ec_kb3310b.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/lemote-2f/ec_kb3310b.c 2010-11-18 11:47:59.000000000 +0100 -@@ -14,7 +14,7 @@ - #include - #include - --#include "ec_kb3310b.h" -+#include - - static DEFINE_SPINLOCK(index_access_lock); - static DEFINE_SPINLOCK(port_access_lock); -@@ -78,12 +78,9 @@ - spin_unlock_irqrestore(&port_access_lock, flags); - - if (timeout <= 0) { -- printk(KERN_ERR "%s: deadable error : timeout...\n", __func__); -+ pr_err("%s: deadable error : timeout...\n", __func__); - ret = -EINVAL; -- } else -- printk(KERN_INFO -- "(%x/%d)ec issued command %d status : 0x%x\n", -- timeout, EC_CMD_TIMEOUT - timeout, cmd, status); -+ } - - return ret; - } -@@ -118,8 +115,7 @@ - udelay(EC_REG_DELAY); - } - if (timeout <= 0) { -- pr_info("%s: get event number timeout.\n", __func__); -- -+ pr_err("%s: get event number timeout.\n", __func__); - return -EINVAL; - } - value = inb(EC_DAT_PORT); -diff -Nur linux-2.6.36.orig/arch/mips/loongson/lemote-2f/ec_kb3310b.h linux-2.6.36/arch/mips/loongson/lemote-2f/ec_kb3310b.h ---- linux-2.6.36.orig/arch/mips/loongson/lemote-2f/ec_kb3310b.h 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/lemote-2f/ec_kb3310b.h 1970-01-01 01:00:00.000000000 +0100 -@@ -1,188 +0,0 @@ --/* -- * KB3310B Embedded Controller -- * -- * Copyright (C) 2008 Lemote Inc. -- * Author: liujl , 2008-03-14 -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License as published by -- * the Free Software Foundation; either version 2 of the License, or -- * (at your option) any later version. -- */ -- --#ifndef _EC_KB3310B_H --#define _EC_KB3310B_H -- --extern unsigned char ec_read(unsigned short addr); --extern void ec_write(unsigned short addr, unsigned char val); --extern int ec_query_seq(unsigned char cmd); --extern int ec_query_event_num(void); --extern int ec_get_event_num(void); -- --typedef int (*sci_handler) (int status); --extern sci_handler yeeloong_report_lid_status; -- --#define SCI_IRQ_NUM 0x0A -- --/* -- * The following registers are determined by the EC index configuration. -- * 1, fill the PORT_HIGH as EC register high part. -- * 2, fill the PORT_LOW as EC register low part. -- * 3, fill the PORT_DATA as EC register write data or get the data from it. -- */ --#define EC_IO_PORT_HIGH 0x0381 --#define EC_IO_PORT_LOW 0x0382 --#define EC_IO_PORT_DATA 0x0383 -- --/* -- * EC delay time is 500us for register and status access -- */ --#define EC_REG_DELAY 500 /* unit : us */ --#define EC_CMD_TIMEOUT 0x1000 -- --/* -- * EC access port for SCI communication -- */ --#define EC_CMD_PORT 0x66 --#define EC_STS_PORT 0x66 --#define EC_DAT_PORT 0x62 --#define CMD_INIT_IDLE_MODE 0xdd --#define CMD_EXIT_IDLE_MODE 0xdf --#define CMD_INIT_RESET_MODE 0xd8 --#define CMD_REBOOT_SYSTEM 0x8c --#define CMD_GET_EVENT_NUM 0x84 --#define CMD_PROGRAM_PIECE 0xda -- --/* temperature & fan registers */ --#define REG_TEMPERATURE_VALUE 0xF458 --#define REG_FAN_AUTO_MAN_SWITCH 0xF459 --#define BIT_FAN_AUTO 0 --#define BIT_FAN_MANUAL 1 --#define REG_FAN_CONTROL 0xF4D2 --#define BIT_FAN_CONTROL_ON (1 << 0) --#define BIT_FAN_CONTROL_OFF (0 << 0) --#define REG_FAN_STATUS 0xF4DA --#define BIT_FAN_STATUS_ON (1 << 0) --#define BIT_FAN_STATUS_OFF (0 << 0) --#define REG_FAN_SPEED_HIGH 0xFE22 --#define REG_FAN_SPEED_LOW 0xFE23 --#define REG_FAN_SPEED_LEVEL 0xF4CC --/* fan speed divider */ --#define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/ -- --/* battery registers */ --#define REG_BAT_DESIGN_CAP_HIGH 0xF77D --#define REG_BAT_DESIGN_CAP_LOW 0xF77E --#define REG_BAT_FULLCHG_CAP_HIGH 0xF780 --#define REG_BAT_FULLCHG_CAP_LOW 0xF781 --#define REG_BAT_DESIGN_VOL_HIGH 0xF782 --#define REG_BAT_DESIGN_VOL_LOW 0xF783 --#define REG_BAT_CURRENT_HIGH 0xF784 --#define REG_BAT_CURRENT_LOW 0xF785 --#define REG_BAT_VOLTAGE_HIGH 0xF786 --#define REG_BAT_VOLTAGE_LOW 0xF787 --#define REG_BAT_TEMPERATURE_HIGH 0xF788 --#define REG_BAT_TEMPERATURE_LOW 0xF789 --#define REG_BAT_RELATIVE_CAP_HIGH 0xF492 --#define REG_BAT_RELATIVE_CAP_LOW 0xF493 --#define REG_BAT_VENDOR 0xF4C4 --#define FLAG_BAT_VENDOR_SANYO 0x01 --#define FLAG_BAT_VENDOR_SIMPLO 0x02 --#define REG_BAT_CELL_COUNT 0xF4C6 --#define FLAG_BAT_CELL_3S1P 0x03 --#define FLAG_BAT_CELL_3S2P 0x06 --#define REG_BAT_CHARGE 0xF4A2 --#define FLAG_BAT_CHARGE_DISCHARGE 0x01 --#define FLAG_BAT_CHARGE_CHARGE 0x02 --#define FLAG_BAT_CHARGE_ACPOWER 0x00 --#define REG_BAT_STATUS 0xF4B0 --#define BIT_BAT_STATUS_LOW (1 << 5) --#define BIT_BAT_STATUS_DESTROY (1 << 2) --#define BIT_BAT_STATUS_FULL (1 << 1) --#define BIT_BAT_STATUS_IN (1 << 0) --#define REG_BAT_CHARGE_STATUS 0xF4B1 --#define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) --#define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) --#define REG_BAT_STATE 0xF482 --#define BIT_BAT_STATE_CHARGING (1 << 1) --#define BIT_BAT_STATE_DISCHARGING (1 << 0) --#define REG_BAT_POWER 0xF440 --#define BIT_BAT_POWER_S3 (1 << 2) --#define BIT_BAT_POWER_ON (1 << 1) --#define BIT_BAT_POWER_ACIN (1 << 0) -- --/* other registers */ --/* Audio: rd/wr */ --#define REG_AUDIO_VOLUME 0xF46C --#define REG_AUDIO_MUTE 0xF4E7 --#define REG_AUDIO_BEEP 0xF4D0 --/* USB port power or not: rd/wr */ --#define REG_USB0_FLAG 0xF461 --#define REG_USB1_FLAG 0xF462 --#define REG_USB2_FLAG 0xF463 --#define BIT_USB_FLAG_ON 1 --#define BIT_USB_FLAG_OFF 0 --/* LID */ --#define REG_LID_DETECT 0xF4BD --#define BIT_LID_DETECT_ON 1 --#define BIT_LID_DETECT_OFF 0 --/* CRT */ --#define REG_CRT_DETECT 0xF4AD --#define BIT_CRT_DETECT_PLUG 1 --#define BIT_CRT_DETECT_UNPLUG 0 --/* LCD backlight brightness adjust: 9 levels */ --#define REG_DISPLAY_BRIGHTNESS 0xF4F5 --/* Black screen Status */ --#define BIT_DISPLAY_LCD_ON 1 --#define BIT_DISPLAY_LCD_OFF 0 --/* LCD backlight control: off/restore */ --#define REG_BACKLIGHT_CTRL 0xF7BD --#define BIT_BACKLIGHT_ON 1 --#define BIT_BACKLIGHT_OFF 0 --/* Reset the machine auto-clear: rd/wr */ --#define REG_RESET 0xF4EC --#define BIT_RESET_ON 1 --/* Light the led: rd/wr */ --#define REG_LED 0xF4C8 --#define BIT_LED_RED_POWER (1 << 0) --#define BIT_LED_ORANGE_POWER (1 << 1) --#define BIT_LED_GREEN_CHARGE (1 << 2) --#define BIT_LED_RED_CHARGE (1 << 3) --#define BIT_LED_NUMLOCK (1 << 4) --/* Test led mode, all led on/off */ --#define REG_LED_TEST 0xF4C2 --#define BIT_LED_TEST_IN 1 --#define BIT_LED_TEST_OUT 0 --/* Camera on/off */ --#define REG_CAMERA_STATUS 0xF46A --#define BIT_CAMERA_STATUS_ON 1 --#define BIT_CAMERA_STATUS_OFF 0 --#define REG_CAMERA_CONTROL 0xF7B7 --#define BIT_CAMERA_CONTROL_OFF 0 --#define BIT_CAMERA_CONTROL_ON 1 --/* Wlan Status */ --#define REG_WLAN 0xF4FA --#define BIT_WLAN_ON 1 --#define BIT_WLAN_OFF 0 --#define REG_DISPLAY_LCD 0xF79F -- --/* SCI Event Number from EC */ --enum { -- EVENT_LID = 0x23, /* LID open/close */ -- EVENT_DISPLAY_TOGGLE, /* Fn+F3 for display switch */ -- EVENT_SLEEP, /* Fn+F1 for entering sleep mode */ -- EVENT_OVERTEMP, /* Over-temperature happened */ -- EVENT_CRT_DETECT, /* CRT is connected */ -- EVENT_CAMERA, /* Camera on/off */ -- EVENT_USB_OC2, /* USB2 Over Current occurred */ -- EVENT_USB_OC0, /* USB0 Over Current occurred */ -- EVENT_BLACK_SCREEN, /* Turn on/off backlight */ -- EVENT_AUDIO_MUTE, /* Mute on/off */ -- EVENT_DISPLAY_BRIGHTNESS,/* LCD backlight brightness adjust */ -- EVENT_AC_BAT, /* AC & Battery relative issue */ -- EVENT_AUDIO_VOLUME, /* Volume adjust */ -- EVENT_WLAN, /* Wlan on/off */ -- EVENT_END --}; -- --#endif /* !_EC_KB3310B_H */ -diff -Nur linux-2.6.36.orig/arch/mips/loongson/lemote-2f/platform.c linux-2.6.36/arch/mips/loongson/lemote-2f/platform.c ---- linux-2.6.36.orig/arch/mips/loongson/lemote-2f/platform.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.36/arch/mips/loongson/lemote-2f/platform.c 2010-11-18 11:47:59.000000000 +0100 -@@ -0,0 +1,48 @@ -+/* -+ * Copyright (C) 2009 Lemote Inc. -+ * Author: Wu Zhangjin, wuzhangjin@gmail.com -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ -+ -+#include -+#include -+ -+#include -+ -+static struct platform_device yeeloong_pdev = { -+ .name = "yeeloong_laptop", -+ .id = -1, -+}; -+ -+static struct platform_device lynloong_pdev = { -+ .name = "lynloong_pc", -+ .id = -1, -+}; -+ -+static int __init lemote2f_platform_init(void) -+{ -+ struct platform_device *pdev = NULL; -+ -+ switch (mips_machtype) { -+ case MACH_LEMOTE_YL2F89: -+ pdev = &yeeloong_pdev; -+ break; -+ case MACH_LEMOTE_LL2F: -+ pdev = &lynloong_pdev; -+ break; -+ default: -+ break; -+ -+ } -+ -+ if (pdev != NULL) -+ return platform_device_register(pdev); -+ -+ return -ENODEV; -+} -+ -+arch_initcall(lemote2f_platform_init); -diff -Nur linux-2.6.36.orig/arch/mips/loongson/lemote-2f/pm.c linux-2.6.36/arch/mips/loongson/lemote-2f/pm.c ---- linux-2.6.36.orig/arch/mips/loongson/lemote-2f/pm.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/lemote-2f/pm.c 2010-11-18 11:47:59.000000000 +0100 -@@ -23,7 +23,7 @@ - #include - - #include --#include "ec_kb3310b.h" -+#include - - #define I8042_KBD_IRQ 1 - #define I8042_CTR_KBDINT 0x01 -@@ -100,7 +100,7 @@ - if (irq < 0) - return 0; - -- printk(KERN_INFO "%s: irq = %d\n", __func__, irq); -+ pr_info("%s: irq = %d\n", __func__, irq); - - if (irq == I8042_KBD_IRQ) - return 1; -diff -Nur linux-2.6.36.orig/arch/mips/loongson/lemote-2f/reset.c linux-2.6.36/arch/mips/loongson/lemote-2f/reset.c ---- linux-2.6.36.orig/arch/mips/loongson/lemote-2f/reset.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/loongson/lemote-2f/reset.c 2010-11-18 11:47:59.000000000 +0100 -@@ -20,7 +20,7 @@ - #include - - #include --#include "ec_kb3310b.h" -+#include - - static void reset_cpu(void) - { -diff -Nur linux-2.6.36.orig/arch/mips/mm/dma-default.c linux-2.6.36/arch/mips/mm/dma-default.c ---- linux-2.6.36.orig/arch/mips/mm/dma-default.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/arch/mips/mm/dma-default.c 2010-11-18 11:47:59.000000000 +0100 -@@ -380,3 +380,16 @@ - } - - EXPORT_SYMBOL(dma_cache_sync); -+ -+int __weak dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, -+ void *cpu_addr, dma_addr_t handle, size_t size) -+{ -+ struct page *pg; -+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); -+ cpu_addr = (void *)dma_addr_to_virt(dev, handle); -+ pg = virt_to_page(cpu_addr); -+ return remap_pfn_range(vma, vma->vm_start, -+ page_to_pfn(pg) + vma->vm_pgoff, -+ size, vma->vm_page_prot); -+} -+EXPORT_SYMBOL(dma_mmap_coherent); -diff -Nur linux-2.6.36.orig/drivers/ide/ide-iops.c linux-2.6.36/drivers/ide/ide-iops.c ---- linux-2.6.36.orig/drivers/ide/ide-iops.c 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/drivers/ide/ide-iops.c 2010-11-18 11:47:59.000000000 +0100 -@@ -27,6 +27,8 @@ - #include - #include - -+#include -+ - void SELECT_MASK(ide_drive_t *drive, int mask) - { - const struct ide_port_ops *port_ops = drive->hwif->port_ops; -@@ -300,6 +302,9 @@ - { - const char **list, *m = (char *)&drive->id[ATA_ID_PROD]; - -+ if (mips_machtype != MACH_LEMOTE_YL2F89) -+ return; -+ - for (list = nien_quirk_list; *list != NULL; list++) - if (strstr(m, *list) != NULL) { - drive->dev_flags |= IDE_DFLAG_NIEN_QUIRK; -diff -Nur linux-2.6.36.orig/drivers/platform/Kconfig linux-2.6.36/drivers/platform/Kconfig ---- linux-2.6.36.orig/drivers/platform/Kconfig 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/drivers/platform/Kconfig 2010-11-18 11:47:59.000000000 +0100 -@@ -1,3 +1,7 @@ - if X86 - source "drivers/platform/x86/Kconfig" - endif -+ -+if MIPS -+source "drivers/platform/mips/Kconfig" -+endif -diff -Nur linux-2.6.36.orig/drivers/platform/Makefile linux-2.6.36/drivers/platform/Makefile ---- linux-2.6.36.orig/drivers/platform/Makefile 2010-10-20 22:30:22.000000000 +0200 -+++ linux-2.6.36/drivers/platform/Makefile 2010-11-18 11:47:59.000000000 +0100 -@@ -3,3 +3,4 @@ - # - - obj-$(CONFIG_X86) += x86/ -+obj-$(CONFIG_MIPS) += mips/ -diff -Nur linux-2.6.36.orig/drivers/platform/mips/Kconfig linux-2.6.36/drivers/platform/mips/Kconfig ---- linux-2.6.36.orig/drivers/platform/mips/Kconfig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.36/drivers/platform/mips/Kconfig 2010-11-18 11:47:59.000000000 +0100 -@@ -0,0 +1,43 @@ -+# -+# MIPS Platform Specific Drivers -+# -+ -+menuconfig MIPS_PLATFORM_DEVICES -+ bool "MIPS Platform Specific Device Drivers" -+ default y -+ help -+ Say Y here to get to see options for device drivers of various -+ MIPS platforms, including vendor-specific netbook/laptop/pc extension -+ drivers. This option alone does not add any kernel code. -+ -+ If you say N, all options in this submenu will be skipped and disabled. -+ -+if MIPS_PLATFORM_DEVICES -+ -+config LEMOTE_YEELOONG2F -+ tristate "Lemote YeeLoong Laptop" -+ depends on LEMOTE_MACH2F -+ select BACKLIGHT_CLASS_DEVICE -+ select POWER_SUPPLY -+ select HWMON -+ select VIDEO_OUTPUT_CONTROL -+ select INPUT_SPARSEKMAP -+ depends on INPUT -+ help -+ YeeLoong netbook is a mini laptop made by Lemote, which is basically -+ compatible to FuLoong2F mini PC, but it has an extra Embedded -+ Controller(kb3310b) for battery, hotkey, backlight, temperature and -+ fan management. -+ -+config LEMOTE_LYNLOONG2F -+ tristate "Lemote LynLoong PC" -+ depends on LEMOTE_MACH2F -+ select BACKLIGHT_CLASS_DEVICE -+ select VIDEO_OUTPUT_CONTROL -+ help -+ LynLoong PC is an AllINONE machine made by Lemote, which is basically -+ compatible to FuLoong2F Mini PC, the only difference is that it has a -+ size-fixed screen: 1360x768 with sisfb video driver. and also, it has -+ its own specific suspend support. -+ -+endif # MIPS_PLATFORM_DEVICES -diff -Nur linux-2.6.36.orig/drivers/platform/mips/Makefile linux-2.6.36/drivers/platform/mips/Makefile ---- linux-2.6.36.orig/drivers/platform/mips/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.36/drivers/platform/mips/Makefile 2010-11-18 11:47:59.000000000 +0100 -@@ -0,0 +1,7 @@ -+# -+# Makefile for MIPS Platform-Specific Drivers -+# -+ -+obj-$(CONFIG_LEMOTE_YEELOONG2F) += yeeloong_laptop.o -+ -+obj-$(CONFIG_LEMOTE_LYNLOONG2F) += lynloong_pc.o -diff -Nur linux-2.6.36.orig/drivers/platform/mips/lynloong_pc.c linux-2.6.36/drivers/platform/mips/lynloong_pc.c ---- linux-2.6.36.orig/drivers/platform/mips/lynloong_pc.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.36/drivers/platform/mips/lynloong_pc.c 2010-11-18 11:47:59.000000000 +0100 -@@ -0,0 +1,513 @@ -+/* -+ * Driver for LynLoong PC extras -+ * -+ * Copyright (C) 2009 Lemote Inc. -+ * Author: Wu Zhangjin , Xiang Yu -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include /* for backlight subdriver */ -+#include -+#include /* for video output subdriver */ -+#include /* for suspend support */ -+ -+#include -+#include -+ -+#include -+ -+static u32 gpio_base, mfgpt_base; -+ -+static void set_gpio_reg_high(int gpio, int reg) -+{ -+ u32 val; -+ -+ val = inl(gpio_base + reg); -+ val |= (1 << gpio); -+ val &= ~(1 << (16 + gpio)); -+ outl(val, gpio_base + reg); -+ mmiowb(); -+} -+ -+static void set_gpio_reg_low(int gpio, int reg) -+{ -+ u32 val; -+ -+ val = inl(gpio_base + reg); -+ val |= (1 << (16 + gpio)); -+ val &= ~(1 << gpio); -+ outl(val, gpio_base + reg); -+ mmiowb(); -+} -+ -+static void set_gpio_output_low(int gpio) -+{ -+ set_gpio_reg_high(gpio, GPIOL_OUT_EN); -+ set_gpio_reg_low(gpio, GPIOL_OUT_VAL); -+} -+ -+static void set_gpio_output_high(int gpio) -+{ -+ set_gpio_reg_high(gpio, GPIOL_OUT_EN); -+ set_gpio_reg_high(gpio, GPIOL_OUT_VAL); -+} -+ -+/* backlight subdriver */ -+ -+#define MAX_BRIGHTNESS 100 -+#define DEFAULT_BRIGHTNESS 50 -+#define MIN_BRIGHTNESS 0 -+static unsigned int level; -+ -+DEFINE_SPINLOCK(backlight_lock); -+/* Tune the brightness */ -+static void setup_mfgpt2(void) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&backlight_lock, flags); -+ -+ /* Set MFGPT2 comparator 1,2 */ -+ outw(MAX_BRIGHTNESS-level, MFGPT2_CMP1); -+ outw(MAX_BRIGHTNESS, MFGPT2_CMP2); -+ /* Clear MFGPT2 UP COUNTER */ -+ outw(0, MFGPT2_CNT); -+ /* Enable counter, compare mode, 32k */ -+ outw(0x8280, MFGPT2_SETUP); -+ -+ spin_unlock_irqrestore(&backlight_lock, flags); -+} -+ -+static int lynloong_set_brightness(struct backlight_device *bd) -+{ -+ level = (bd->props.fb_blank == FB_BLANK_UNBLANK && -+ bd->props.power == FB_BLANK_UNBLANK) ? -+ bd->props.brightness : 0; -+ -+ if (level > MAX_BRIGHTNESS) -+ level = MAX_BRIGHTNESS; -+ else if (level < MIN_BRIGHTNESS) -+ level = MIN_BRIGHTNESS; -+ -+ setup_mfgpt2(); -+ -+ return 0; -+} -+ -+static int lynloong_get_brightness(struct backlight_device *bd) -+{ -+ return level; -+} -+ -+static struct backlight_ops backlight_ops = { -+ .get_brightness = lynloong_get_brightness, -+ .update_status = lynloong_set_brightness, -+}; -+ -+static struct backlight_device *lynloong_backlight_dev; -+ -+static int lynloong_backlight_init(void) -+{ -+ int ret; -+ u32 hi; -+ struct backlight_properties props; -+ -+ /* Get gpio_base */ -+ _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &gpio_base); -+ /* Get mfgpt_base */ -+ _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), &hi, &mfgpt_base); -+ /* Get gpio_base */ -+ _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &gpio_base); -+ -+ /* Select for mfgpt */ -+ set_gpio_reg_high(7, GPIOL_OUT_AUX1_SEL); -+ /* Enable brightness controlling */ -+ set_gpio_output_high(7); -+ -+ memset(&props, 0, sizeof(struct backlight_properties)); -+ props.max_brightness = MAX_BRIGHTNESS; -+ lynloong_backlight_dev = backlight_device_register("backlight0", NULL, -+ NULL, &backlight_ops, &props); -+ -+ if (IS_ERR(lynloong_backlight_dev)) { -+ ret = PTR_ERR(lynloong_backlight_dev); -+ return ret; -+ } -+ -+ lynloong_backlight_dev->props.brightness = DEFAULT_BRIGHTNESS; -+ backlight_update_status(lynloong_backlight_dev); -+ -+ return 0; -+} -+ -+static void lynloong_backlight_exit(void) -+{ -+ if (lynloong_backlight_dev) { -+ backlight_device_unregister(lynloong_backlight_dev); -+ lynloong_backlight_dev = NULL; -+ } -+ /* Disable brightness controlling */ -+ set_gpio_output_low(7); -+} -+ -+/* video output driver */ -+static int vo_status = 1; -+ -+static int lcd_video_output_get(struct output_device *od) -+{ -+ return vo_status; -+} -+ -+static int lcd_video_output_set(struct output_device *od) -+{ -+ int i; -+ unsigned long status; -+ -+ status = !!od->request_state; -+ -+ if (status == 0) { -+ /* Set the current status as off */ -+ vo_status = 0; -+ /* Turn off the backlight */ -+ set_gpio_output_low(11); -+ for (i = 0; i < 0x500; i++) -+ delay(); -+ /* Turn off the LCD */ -+ set_gpio_output_high(8); -+ } else { -+ /* Turn on the LCD */ -+ set_gpio_output_low(8); -+ for (i = 0; i < 0x500; i++) -+ delay(); -+ /* Turn on the backlight */ -+ set_gpio_output_high(11); -+ /* Set the current status as on */ -+ vo_status = 1; -+ } -+ -+ return 0; -+} -+ -+static struct output_properties lcd_output_properties = { -+ .set_state = lcd_video_output_set, -+ .get_status = lcd_video_output_get, -+}; -+ -+static struct output_device *lcd_output_dev; -+ -+static void lynloong_lcd_vo_set(int status) -+{ -+ lcd_output_dev->request_state = status; -+ lcd_video_output_set(lcd_output_dev); -+} -+ -+static int lynloong_vo_init(void) -+{ -+ int ret; -+ -+ /* Register video output device: lcd */ -+ lcd_output_dev = video_output_register("LCD", NULL, NULL, -+ &lcd_output_properties); -+ -+ if (IS_ERR(lcd_output_dev)) { -+ ret = PTR_ERR(lcd_output_dev); -+ lcd_output_dev = NULL; -+ return ret; -+ } -+ /* Ensure LCD is on by default */ -+ lynloong_lcd_vo_set(1); -+ -+ return 0; -+} -+ -+static void lynloong_vo_exit(void) -+{ -+ if (lcd_output_dev) { -+ video_output_unregister(lcd_output_dev); -+ lcd_output_dev = NULL; -+ } -+} -+ -+/* suspend support */ -+ -+#ifdef CONFIG_PM -+ -+static u32 smb_base; -+ -+/* I2C operations */ -+ -+static int i2c_wait(void) -+{ -+ char c; -+ int i; -+ -+ udelay(1000); -+ for (i = 0; i < 20; i++) { -+ c = inb(smb_base | SMB_STS); -+ if (c & (SMB_STS_BER | SMB_STS_NEGACK)) -+ return -1; -+ if (c & SMB_STS_SDAST) -+ return 0; -+ udelay(100); -+ } -+ return -2; -+} -+ -+static void i2c_read_single(int addr, int regNo, char *value) -+{ -+ unsigned char c; -+ -+ /* Start condition */ -+ c = inb(smb_base | SMB_CTRL1); -+ outb(c | SMB_CTRL1_START, smb_base | SMB_CTRL1); -+ i2c_wait(); -+ -+ /* Send slave address */ -+ outb(addr & 0xfe, smb_base | SMB_SDA); -+ i2c_wait(); -+ -+ /* Acknowledge smbus */ -+ c = inb(smb_base | SMB_CTRL1); -+ outb(c | SMB_CTRL1_ACK, smb_base | SMB_CTRL1); -+ -+ /* Send register index */ -+ outb(regNo, smb_base | SMB_SDA); -+ i2c_wait(); -+ -+ /* Acknowledge smbus */ -+ c = inb(smb_base | SMB_CTRL1); -+ outb(c | SMB_CTRL1_ACK, smb_base | SMB_CTRL1); -+ -+ /* Start condition again */ -+ c = inb(smb_base | SMB_CTRL1); -+ outb(c | SMB_CTRL1_START, smb_base | SMB_CTRL1); -+ i2c_wait(); -+ -+ /* Send salve address again */ -+ outb(1 | addr, smb_base | SMB_SDA); -+ i2c_wait(); -+ -+ /* Acknowledge smbus */ -+ c = inb(smb_base | SMB_CTRL1); -+ outb(c | SMB_CTRL1_ACK, smb_base | SMB_CTRL1); -+ -+ /* Read data */ -+ *value = inb(smb_base | SMB_SDA); -+ -+ /* Stop condition */ -+ outb(SMB_CTRL1_STOP, smb_base | SMB_CTRL1); -+ i2c_wait(); -+} -+ -+static void i2c_write_single(int addr, int regNo, char value) -+{ -+ unsigned char c; -+ -+ /* Start condition */ -+ c = inb(smb_base | SMB_CTRL1); -+ outb(c | SMB_CTRL1_START, smb_base | SMB_CTRL1); -+ i2c_wait(); -+ /* Send slave address */ -+ outb(addr & 0xfe, smb_base | SMB_SDA); -+ i2c_wait();; -+ -+ /* Send register index */ -+ outb(regNo, smb_base | SMB_SDA); -+ i2c_wait(); -+ -+ /* Write data */ -+ outb(value, smb_base | SMB_SDA); -+ i2c_wait(); -+ /* Stop condition */ -+ outb(SMB_CTRL1_STOP, smb_base | SMB_CTRL1); -+ i2c_wait(); -+} -+ -+static void stop_clock(int clk_reg, int clk_sel) -+{ -+ u8 value; -+ -+ i2c_read_single(0xd3, clk_reg, &value); -+ value &= ~(1 << clk_sel); -+ i2c_write_single(0xd2, clk_reg, value); -+} -+ -+static void enable_clock(int clk_reg, int clk_sel) -+{ -+ u8 value; -+ -+ i2c_read_single(0xd3, clk_reg, &value); -+ value |= (1 << clk_sel); -+ i2c_write_single(0xd2, clk_reg, value); -+} -+ -+static char cached_clk_freq; -+static char cached_pci_fixed_freq; -+ -+static void decrease_clk_freq(void) -+{ -+ char value; -+ -+ i2c_read_single(0xd3, 1, &value); -+ cached_clk_freq = value; -+ -+ /* Select frequency by software */ -+ value |= (1 << 1); -+ /* CPU, 3V66, PCI : 100, 66, 33(1) */ -+ value |= (1 << 2); -+ i2c_write_single(0xd2, 1, value); -+ -+ /* Cache the pci frequency */ -+ i2c_read_single(0xd3, 14, &value); -+ cached_pci_fixed_freq = value; -+ -+ /* Enable PCI fix mode */ -+ value |= (1 << 5); -+ /* 3V66, PCI : 64MHz, 32MHz */ -+ value |= (1 << 3); -+ i2c_write_single(0xd2, 14, value); -+ -+} -+ -+static void resume_clk_freq(void) -+{ -+ i2c_write_single(0xd2, 1, cached_clk_freq); -+ i2c_write_single(0xd2, 14, cached_pci_fixed_freq); -+} -+ -+static void stop_clocks(void) -+{ -+ /* CPU Clock Register */ -+ stop_clock(2, 5); /* not used */ -+ stop_clock(2, 6); /* not used */ -+ stop_clock(2, 7); /* not used */ -+ -+ /* PCI Clock Register */ -+ stop_clock(3, 1); /* 8100 */ -+ stop_clock(3, 5); /* SIS */ -+ stop_clock(3, 0); /* not used */ -+ stop_clock(3, 6); /* not used */ -+ -+ /* PCI 48M Clock Register */ -+ stop_clock(4, 6); /* USB grounding */ -+ stop_clock(4, 5); /* REF(5536_14M) */ -+ -+ /* 3V66 Control Register */ -+ stop_clock(5, 0); /* VCH_CLK..., grounding */ -+} -+ -+static void enable_clocks(void) -+{ -+ enable_clock(3, 1); /* 8100 */ -+ enable_clock(3, 5); /* SIS */ -+ -+ enable_clock(4, 6); -+ enable_clock(4, 5); /* REF(5536_14M) */ -+ -+ enable_clock(5, 0); /* VCH_CLOCK, grounding */ -+} -+ -+static int lynloong_suspend(struct device *dev) -+{ -+ /* Disable AMP */ -+ set_gpio_output_high(6); -+ /* Turn off LCD */ -+ lynloong_lcd_vo_set(0); -+ -+ /* Stop the clocks of some devices */ -+ stop_clocks(); -+ -+ /* Decrease the external clock frequency */ -+ decrease_clk_freq(); -+ -+ return 0; -+} -+ -+static int lynloong_resume(struct device *dev