From 9c7797245138ee0e411f2bae618e05a375e1f06f Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Sat, 4 Mar 2017 03:03:02 +0100 Subject: riscv: add experimental linux/glibc support --- target/linux/patches/4.6.2/riscv-04032017.patch | 9424 +++++++++++++++++++++++ 1 file changed, 9424 insertions(+) create mode 100644 target/linux/patches/4.6.2/riscv-04032017.patch (limited to 'target/linux') diff --git a/target/linux/patches/4.6.2/riscv-04032017.patch b/target/linux/patches/4.6.2/riscv-04032017.patch new file mode 100644 index 000000000..019ee3173 --- /dev/null +++ b/target/linux/patches/4.6.2/riscv-04032017.patch @@ -0,0 +1,9424 @@ +diff -Nur linux-4.6.2/arch/.gitignore linux-4.6.2.riscv/arch/.gitignore +--- linux-4.6.2/arch/.gitignore 2016-06-08 03:23:53.000000000 +0200 ++++ linux-4.6.2.riscv/arch/.gitignore 2017-03-04 02:48:34.162887952 +0100 +@@ -1,2 +1,3 @@ +-i386 +-x86_64 ++# In ../, we ignored everything, so suppress that. ++!riscv/ ++ +diff -Nur linux-4.6.2/arch/riscv/configs/riscv64_qemu linux-4.6.2.riscv/arch/riscv/configs/riscv64_qemu +--- linux-4.6.2/arch/riscv/configs/riscv64_qemu 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/configs/riscv64_qemu 2017-03-04 02:48:34.162887952 +0100 +@@ -0,0 +1,64 @@ ++# CONFIG_COMPACTION is not set ++# CONFIG_CROSS_MEMORY_ATTACH is not set ++CONFIG_HZ_100=y ++CONFIG_CROSS_COMPILE="riscv64-unknown-linux-gnu-" ++CONFIG_DEFAULT_HOSTNAME="ucbvax" ++CONFIG_NAMESPACES=y ++CONFIG_EMBEDDED=y ++# CONFIG_BLK_DEV_BSG is not set ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_IOSCHED_DEADLINE is not set ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_WIRELESS is not set ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++# CONFIG_FIRMWARE_IN_KERNEL is not set ++# CONFIG_BLK_DEV is not set ++CONFIG_SCSI=y ++CONFIG_BLK_DEV_SD=y ++CONFIG_SCSI_VIRTIO=y ++CONFIG_NETDEVICES=y ++CONFIG_VIRTIO_NET=y ++# CONFIG_ETHERNET is not set ++# CONFIG_WLAN is not set ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++# CONFIG_VT is not set ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++CONFIG_SERIAL_8250_NR_UARTS=1 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=1 ++CONFIG_VIRTIO_CONSOLE=y ++# CONFIG_HW_RANDOM is not set ++# CONFIG_HWMON is not set ++CONFIG_FB=y ++# CONFIG_USB_SUPPORT is not set ++CONFIG_VIRTIO_MMIO=y ++CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_EXT4_FS=y ++# CONFIG_FILE_LOCKING is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_INOTIFY_USER is not set ++# CONFIG_PROC_PAGE_MONITOR is not set ++CONFIG_TMPFS=y ++# CONFIG_MISC_FILESYSTEMS is not set ++# CONFIG_NETWORK_FILESYSTEMS is not set ++CONFIG_CMDLINE_BOOL=y ++CONFIG_CMDLINE="virtio_mmio.device=0x200@0x400:1 virtio_mmio.device=0x200@0x600:2 virtio_mmio.device=0x200@0x800:3 lpj=100000" ++CONFIG_CMDLINE_OVERRIDE=y ++CONFIG_PRINTK_TIME=y ++CONFIG_DEBUG_SECTION_MISMATCH=y ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++# CONFIG_CRYPTO_HW is not set +diff -Nur linux-4.6.2/arch/riscv/configs/riscv64_spike linux-4.6.2.riscv/arch/riscv/configs/riscv64_spike +--- linux-4.6.2/arch/riscv/configs/riscv64_spike 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/configs/riscv64_spike 2017-03-04 02:48:34.162887952 +0100 +@@ -0,0 +1,929 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/riscv 3.14.29 Kernel Configuration ++# ++CONFIG_RISCV=y ++CONFIG_MMU=y ++CONFIG_PCI=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++CONFIG_GENERIC_BUG=y ++CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_CSUM=y ++CONFIG_GENERIC_HWEIGHT=y ++ ++# ++# Platform type ++# ++CONFIG_CPU_RV_ROCKET=y ++# CONFIG_CPU_RV_GENERIC is not set ++CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y ++CONFIG_RV_ATOMIC=y ++# CONFIG_RV_SYSRISCV_ATOMIC is not set ++CONFIG_SBI_CONSOLE=y ++ ++# ++# Kernel type ++# ++CONFIG_64BIT=y ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_HAVE_MEMBLOCK_NODE_MAP=y ++# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_COMPACTION is not set ++CONFIG_PHYS_ADDR_T_64BIT=y ++CONFIG_ZONE_DMA_FLAG=0 ++# CONFIG_KSM is not set ++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 ++# CONFIG_CROSS_MEMORY_ATTACH is not set ++CONFIG_NEED_PER_CPU_KM=y ++# CONFIG_CLEANCACHE is not set ++# CONFIG_FRONTSWAP is not set ++# CONFIG_CMA is not set ++# CONFIG_ZBUD is not set ++# CONFIG_ZSMALLOC is not set ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++CONFIG_HZ_100=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++# CONFIG_SCHED_HRTICK is not set ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++CONFIG_IRQ_WORK=y ++ ++# ++# General setup ++# ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_CROSS_COMPILE="riscv64-unknown-linux-gnu-" ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++CONFIG_LOCALVERSION_AUTO=y ++CONFIG_DEFAULT_HOSTNAME="ucbvax" ++CONFIG_SWAP=y ++# CONFIG_SYSVIPC is not set ++# CONFIG_POSIX_MQUEUE is not set ++# CONFIG_FHANDLE is not set ++# CONFIG_AUDIT is not set ++ ++# ++# IRQ subsystem ++# ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_GENERIC_CLOCKEVENTS=y ++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y ++ ++# ++# Timers subsystem ++# ++CONFIG_HZ_PERIODIC=y ++# CONFIG_NO_HZ_IDLE is not set ++# CONFIG_NO_HZ is not set ++# CONFIG_HIGH_RES_TIMERS is not set ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_TINY_RCU=y ++# CONFIG_PREEMPT_RCU is not set ++# CONFIG_RCU_STALL_COMMON is not set ++# CONFIG_TREE_RCU_TRACE is not set ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=17 ++# CONFIG_CGROUPS is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++CONFIG_NAMESPACES=y ++CONFIG_UTS_NS=y ++# CONFIG_USER_NS is not set ++CONFIG_PID_NS=y ++CONFIG_NET_NS=y ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_SYSCTL_EXCEPTION_TRACE=y ++CONFIG_EXPERT=y ++# CONFIG_SYSCTL_SYSCALL is not set ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_EMBEDDED=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_COMPAT_BRK=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y ++# CONFIG_CC_STACKPROTECTOR is not set ++CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y ++CONFIG_CLONE_BACKWARDS=y ++ ++# ++# GCOV-based kernel profiling ++# ++# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++# CONFIG_MODULES is not set ++CONFIG_BLOCK=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_CMDLINE_PARSER is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_AIX_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++# CONFIG_EFI_PARTITION is not set ++# CONFIG_SYSV68_PARTITION is not set ++# CONFIG_CMDLINE_PARTITION is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++CONFIG_IOSCHED_CFQ=y ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y ++CONFIG_INLINE_READ_UNLOCK=y ++CONFIG_INLINE_READ_UNLOCK_IRQ=y ++CONFIG_INLINE_WRITE_UNLOCK=y ++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y ++# CONFIG_FREEZER is not set ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y ++CONFIG_BINFMT_SCRIPT=y ++# CONFIG_HAVE_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Power management options ++# ++# CONFIG_PM_RUNTIME is not set ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++# CONFIG_PACKET is not set ++CONFIG_UNIX=y ++# CONFIG_UNIX_DIAG is not set ++# CONFIG_XFRM_USER is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE_DEMUX is not set ++# CONFIG_NET_IP_TUNNEL is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_RDS is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_L2TP is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_PHONET is not set ++# CONFIG_IEEE802154 is not set ++# CONFIG_NET_SCHED is not set ++# CONFIG_DCB is not set ++# CONFIG_BATMAN_ADV is not set ++# CONFIG_OPENVSWITCH is not set ++# CONFIG_VSOCKETS is not set ++# CONFIG_NETLINK_MMAP is not set ++# CONFIG_NETLINK_DIAG is not set ++# CONFIG_NET_MPLS_GSO is not set ++# CONFIG_HSR is not set ++CONFIG_NET_RX_BUSY_POLL=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_IRDA is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_WIRELESS is not set ++# CONFIG_WIMAX is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++# CONFIG_CAIF is not set ++# CONFIG_CEPH_LIB is not set ++# CONFIG_NFC is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++# CONFIG_FIRMWARE_IN_KERNEL is not set ++CONFIG_EXTRA_FIRMWARE="" ++CONFIG_FW_LOADER_USER_HELPER=y ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++CONFIG_GENERIC_CPU_DEVICES=y ++# CONFIG_DMA_SHARED_BUFFER is not set ++ ++# ++# Bus devices ++# ++# CONFIG_CONNECTOR is not set ++# CONFIG_MTD is not set ++# CONFIG_PARPORT is not set ++# CONFIG_BLK_DEV is not set ++ ++# ++# Misc devices ++# ++# CONFIG_SENSORS_LIS3LV02D is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ATMEL_SSC is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_93CX6 is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++ ++# ++# Altera FPGA firmware download module ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++# CONFIG_SCSI is not set ++# CONFIG_SCSI_DMA is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++# CONFIG_NETDEVICES is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++# CONFIG_INPUT_EVDEV is not set ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++CONFIG_SERIO_SERPORT=y ++# CONFIG_SERIO_LIBPS2 is not set ++# CONFIG_SERIO_RAW is not set ++# CONFIG_SERIO_ALTERA_PS2 is not set ++# CONFIG_SERIO_PS2MULT is not set ++# CONFIG_SERIO_ARC_PS2 is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++# CONFIG_VT is not set ++CONFIG_UNIX98_PTYS=y ++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=256 ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_N_GSM is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_DEVKMEM=y ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_TIMBERDALE is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_TTY_PRINTK is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RTC is not set ++# CONFIG_GEN_RTC is not set ++# CONFIG_R3964 is not set ++ ++# ++# PCMCIA character devices ++# ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_I2C is not set ++# CONFIG_SPI is not set ++# CONFIG_HSI is not set ++ ++# ++# PPS support ++# ++# CONFIG_PPS is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++# CONFIG_PTP_1588_CLOCK is not set ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_HWMON is not set ++# CONFIG_THERMAL is not set ++# CONFIG_WATCHDOG is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_CORE is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_SYSCON is not set ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_MEDIA_SUPPORT is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++# CONFIG_FB_BOOT_VESA_SUPPORT is not set ++# CONFIG_FB_CFB_FILLRECT is not set ++# CONFIG_FB_CFB_COPYAREA is not set ++# CONFIG_FB_CFB_IMAGEBLIT is not set ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_SYS_FOPS is not set ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_OPENCORES is not set ++# CONFIG_FB_S1D13XXX is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_BROADSHEET is not set ++# CONFIG_FB_AUO_K190X is not set ++# CONFIG_FB_SIMPLE is not set ++# CONFIG_EXYNOS_VIDEO is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++# CONFIG_LOGO is not set ++# CONFIG_SOUND is not set ++ ++# ++# HID support ++# ++CONFIG_HID=y ++# CONFIG_HIDRAW is not set ++# CONFIG_UHID is not set ++CONFIG_HID_GENERIC=y ++ ++# ++# Special HID drivers ++# ++# CONFIG_HID_A4TECH is not set ++# CONFIG_HID_ACRUX is not set ++# CONFIG_HID_APPLE is not set ++# CONFIG_HID_AUREAL is not set ++# CONFIG_HID_BELKIN is not set ++# CONFIG_HID_CHERRY is not set ++# CONFIG_HID_CHICONY is not set ++# CONFIG_HID_CYPRESS is not set ++# CONFIG_HID_DRAGONRISE is not set ++# CONFIG_HID_EMS_FF is not set ++# CONFIG_HID_ELECOM is not set ++# CONFIG_HID_EZKEY is not set ++# CONFIG_HID_KEYTOUCH is not set ++# CONFIG_HID_KYE is not set ++# CONFIG_HID_UCLOGIC is not set ++# CONFIG_HID_WALTOP is not set ++# CONFIG_HID_GYRATION is not set ++# CONFIG_HID_ICADE is not set ++# CONFIG_HID_TWINHAN is not set ++# CONFIG_HID_KENSINGTON is not set ++# CONFIG_HID_LCPOWER is not set ++# CONFIG_HID_LENOVO_TPKBD is not set ++# CONFIG_HID_LOGITECH is not set ++# CONFIG_HID_MAGICMOUSE is not set ++# CONFIG_HID_MICROSOFT is not set ++# CONFIG_HID_MONTEREY is not set ++# CONFIG_HID_MULTITOUCH is not set ++# CONFIG_HID_ORTEK is not set ++# CONFIG_HID_PANTHERLORD is not set ++# CONFIG_HID_PETALYNX is not set ++# CONFIG_HID_PICOLCD is not set ++# CONFIG_HID_PRIMAX is not set ++# CONFIG_HID_SAITEK is not set ++# CONFIG_HID_SAMSUNG is not set ++# CONFIG_HID_SPEEDLINK is not set ++# CONFIG_HID_STEELSERIES is not set ++# CONFIG_HID_SUNPLUS is not set ++# CONFIG_HID_GREENASIA is not set ++# CONFIG_HID_SMARTJOYPLUS is not set ++# CONFIG_HID_TIVO is not set ++# CONFIG_HID_TOPSEED is not set ++# CONFIG_HID_THRUSTMASTER is not set ++# CONFIG_HID_XINMO is not set ++# CONFIG_HID_ZEROPLUS is not set ++# CONFIG_HID_ZYDACRON is not set ++# CONFIG_HID_SENSOR_HUB is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++# CONFIG_USB_SUPPORT is not set ++# CONFIG_MMC is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_RTC_CLASS is not set ++# CONFIG_AUXDISPLAY is not set ++# CONFIG_UIO is not set ++# CONFIG_VIRT_DRIVERS is not set ++ ++# ++# Virtio drivers ++# ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++ ++# ++# Hardware Spinlock drivers ++# ++# CONFIG_MAILBOX is not set ++# CONFIG_IOMMU_SUPPORT is not set ++ ++# ++# Remoteproc drivers ++# ++ ++# ++# Rpmsg drivers ++# ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++# CONFIG_PWM is not set ++# CONFIG_IPACK_BUS is not set ++# CONFIG_RESET_CONTROLLER is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++# CONFIG_GENERIC_PHY is not set ++# CONFIG_PHY_EXYNOS_MIPI_VIDEO is not set ++# CONFIG_POWERCAP is not set ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++# CONFIG_EXT3_FS is not set ++# CONFIG_EXT4_FS is not set ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_FS_POSIX_ACL is not set ++# CONFIG_FILE_LOCKING is not set ++# CONFIG_FSNOTIFY is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_INOTIFY_USER is not set ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTACTL is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++# CONFIG_MSDOS_FS is not set ++# CONFIG_VFAT_FS is not set ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++# CONFIG_PROC_KCORE is not set ++CONFIG_PROC_SYSCTL=y ++# CONFIG_PROC_PAGE_MONITOR is not set ++# CONFIG_SYSFS is not set ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_TMPFS_XATTR is not set ++# CONFIG_HUGETLB_PAGE is not set ++# CONFIG_CONFIGFS_FS is not set ++# CONFIG_MISC_FILESYSTEMS is not set ++# CONFIG_NETWORK_FILESYSTEMS is not set ++# CONFIG_NLS is not set ++ ++# ++# Kernel hacking ++# ++# CONFIG_CMDLINE_BOOL is not set ++# CONFIG_EARLY_PRINTK is not set ++ ++# ++# printk and dmesg options ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 ++# CONFIG_BOOT_PRINTK_DELAY is not set ++ ++# ++# Compile-time checks and compiler options ++# ++# CONFIG_DEBUG_INFO is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=2048 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_READABLE_ASM is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_SECTION_MISMATCH=y ++CONFIG_ARCH_WANT_FRAME_POINTERS=y ++# CONFIG_FRAME_POINTER is not set ++# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set ++# CONFIG_MAGIC_SYSRQ is not set ++CONFIG_DEBUG_KERNEL=y ++ ++# ++# Memory Debugging ++# ++# CONFIG_DEBUG_PAGEALLOC is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_MEMORY_INIT is not set ++# CONFIG_DEBUG_SHIRQ is not set ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_LOCKUP_DETECTOR is not set ++# CONFIG_DETECT_HUNG_TASK is not set ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++CONFIG_PANIC_TIMEOUT=0 ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_TIMER_STATS is not set ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_ATOMIC_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_WRITECOUNT is not set ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set ++# CONFIG_DEBUG_NOTIFIERS is not set ++# CONFIG_DEBUG_CREDENTIALS is not set ++ ++# ++# RCU Debugging ++# ++# CONFIG_SPARSE_RCU_POINTER is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_RCU_TRACE is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_NOTIFIER_ERROR_INJECTION is not set ++# CONFIG_FAULT_INJECTION is not set ++ ++# ++# Runtime Testing ++# ++# CONFIG_TEST_LIST_SORT is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_RBTREE_TEST is not set ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_SAMPLES is not set ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_ALGAPI2=y ++# CONFIG_CRYPTO_MANAGER is not set ++# CONFIG_CRYPTO_MANAGER2 is not set ++# CONFIG_CRYPTO_USER is not set ++# CONFIG_CRYPTO_GF128MUL is not set ++# CONFIG_CRYPTO_NULL is not set ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_SEQIV is not set ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++# CONFIG_CRYPTO_ECB is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_CMAC is not set ++# CONFIG_CRYPTO_HMAC is not set ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_VMAC is not set ++ ++# ++# Digest ++# ++# CONFIG_CRYPTO_CRC32C is not set ++# CONFIG_CRYPTO_CRC32 is not set ++# CONFIG_CRYPTO_CRCT10DIF is not set ++# CONFIG_CRYPTO_GHASH is not set ++# CONFIG_CRYPTO_MD4 is not set ++# CONFIG_CRYPTO_MD5 is not set ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++# CONFIG_CRYPTO_SHA1 is not set ++# CONFIG_CRYPTO_SHA256 is not set ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++# CONFIG_CRYPTO_DEFLATE is not set ++# CONFIG_CRYPTO_ZLIB is not set ++# CONFIG_CRYPTO_LZO is not set ++# CONFIG_CRYPTO_LZ4 is not set ++# CONFIG_CRYPTO_LZ4HC is not set ++ ++# ++# Random Number Generation ++# ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++# CONFIG_CRYPTO_USER_API_HASH is not set ++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set ++# CONFIG_CRYPTO_HW is not set ++# CONFIG_BINARY_PRINTF is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_NET_UTILS=y ++CONFIG_GENERIC_IO=y ++# CONFIG_CRC_CCITT is not set ++# CONFIG_CRC16 is not set ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++# CONFIG_XZ_DEC is not set ++# CONFIG_XZ_DEC_BCJ is not set ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_NLATTR=y ++CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y ++# CONFIG_AVERAGE is not set ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set +diff -Nur linux-4.6.2/arch/riscv/.gitignore linux-4.6.2.riscv/arch/riscv/.gitignore +--- linux-4.6.2/arch/riscv/.gitignore 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/.gitignore 2017-03-04 02:48:34.162887952 +0100 +@@ -0,0 +1,35 @@ ++# Now un-ignore all files. ++!* ++ ++# But then re-ignore the files listed in the Linux .gitignore ++# Normal rules ++# ++.* ++*.o ++*.o.* ++*.a ++*.s ++*.ko ++*.so ++*.so.dbg ++*.mod.c ++*.i ++*.lst ++*.symtypes ++*.order ++modules.builtin ++*.elf ++*.bin ++*.gz ++*.bz2 ++*.lzma ++*.xz ++*.lzo ++*.patch ++*.gcno ++ ++include/generated ++kernel/vmlinux.lds ++ ++# Then reinclude .gitignore. ++!.gitignore +diff -Nur linux-4.6.2/arch/riscv/include/asm/asm.h linux-4.6.2.riscv/arch/riscv/include/asm/asm.h +--- linux-4.6.2/arch/riscv/include/asm/asm.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/asm.h 2017-03-04 02:48:34.162887952 +0100 +@@ -0,0 +1,51 @@ ++#ifndef _ASM_RISCV_ASM_H ++#define _ASM_RISCV_ASM_H ++ ++#ifdef __ASSEMBLY__ ++#define __ASM_STR(x) x ++#else ++#define __ASM_STR(x) #x ++#endif ++ ++#if __riscv_xlen == 64 ++#define __REG_SEL(a,b) __ASM_STR(a) ++#elif __riscv_xlen == 32 ++#define __REG_SEL(a,b) __ASM_STR(b) ++#else ++#error "Unexpected __riscv_xlen" ++#endif ++ ++#define REG_L __REG_SEL(ld, lw) ++#define REG_S __REG_SEL(sd, sw) ++#define SZREG __REG_SEL(8, 4) ++#define LGREG __REG_SEL(3, 2) ++ ++#if __SIZEOF_POINTER__ == 8 ++#define __PTR_SEL(a,b) __ASM_STR(a) ++#elif __SIZEOF_POINTER__ == 4 ++#define __PTR_SEL(a,b) __ASM_STR(b) ++#else ++#error "Unexpected __SIZEOF_POINTER__" ++#endif ++ ++#define PTR __PTR_SEL(.dword, .word) ++#define SZPTR __PTR_SEL(8, 4) ++#define LGPTR __PTR_SEL(3, 2) ++ ++#if (__SIZEOF_INT__ == 4) ++#define INT __ASM_STR(.word) ++#define SZINT __ASM_STR(4) ++#define LGINT __ASM_STR(2) ++#else ++#error "Unexpected __SIZEOF_INT__" ++#endif ++ ++#if (__SIZEOF_SHORT__ == 2) ++#define SHORT __ASM_STR(.half) ++#define SZSHORT __ASM_STR(2) ++#define LGSHORT __ASM_STR(1) ++#else ++#error "Unexpected __SIZEOF_SHORT__" ++#endif ++ ++#endif /* _ASM_RISCV_ASM_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/asm-offsets.h linux-4.6.2.riscv/arch/riscv/include/asm/asm-offsets.h +--- linux-4.6.2/arch/riscv/include/asm/asm-offsets.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/asm-offsets.h 2017-03-04 02:48:34.162887952 +0100 +@@ -0,0 +1 @@ ++#include +diff -Nur linux-4.6.2/arch/riscv/include/asm/atomic64.h linux-4.6.2.riscv/arch/riscv/include/asm/atomic64.h +--- linux-4.6.2/arch/riscv/include/asm/atomic64.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/atomic64.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,287 @@ ++#ifndef _ASM_RISCV_ATOMIC64_H ++#define _ASM_RISCV_ATOMIC64_H ++ ++#ifdef CONFIG_GENERIC_ATOMIC64 ++#include ++#else /* !CONFIG_GENERIC_ATOMIC64 */ ++ ++#include ++ ++#define ATOMIC64_INIT(i) { (i) } ++ ++/** ++ * atomic64_read - read atomic64 variable ++ * @v: pointer of type atomic64_t ++ * ++ * Atomically reads the value of @v. ++ */ ++static inline s64 atomic64_read(const atomic64_t *v) ++{ ++ return *((volatile long *)(&(v->counter))); ++} ++ ++/** ++ * atomic64_set - set atomic64 variable ++ * @v: pointer to type atomic64_t ++ * @i: required value ++ * ++ * Atomically sets the value of @v to @i. ++ */ ++static inline void atomic64_set(atomic64_t *v, s64 i) ++{ ++ v->counter = i; ++} ++ ++/** ++ * atomic64_add - add integer to atomic64 variable ++ * @i: integer value to add ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically adds @i to @v. ++ */ ++static inline void atomic64_add(s64 a, atomic64_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoadd.d zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (a)); ++} ++ ++/** ++ * atomic64_sub - subtract the atomic64 variable ++ * @i: integer value to subtract ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically subtracts @i from @v. ++ */ ++static inline void atomic64_sub(s64 a, atomic64_t *v) ++{ ++ atomic64_add(-a, v); ++} ++ ++/** ++ * atomic64_add_return - add and return ++ * @i: integer value to add ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically adds @i to @v and returns @i + @v ++ */ ++static inline s64 atomic64_add_return(s64 a, atomic64_t *v) ++{ ++ register s64 c; ++ __asm__ __volatile__ ( ++ "amoadd.d %0, %2, %1" ++ : "=r" (c), "+A" (v->counter) ++ : "r" (a)); ++ return (c + a); ++} ++ ++static inline s64 atomic64_sub_return(s64 a, atomic64_t *v) ++{ ++ return atomic64_add_return(-a, v); ++} ++ ++/** ++ * atomic64_inc - increment atomic64 variable ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically increments @v by 1. ++ */ ++static inline void atomic64_inc(atomic64_t *v) ++{ ++ atomic64_add(1L, v); ++} ++ ++/** ++ * atomic64_dec - decrement atomic64 variable ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically decrements @v by 1. ++ */ ++static inline void atomic64_dec(atomic64_t *v) ++{ ++ atomic64_add(-1L, v); ++} ++ ++static inline s64 atomic64_inc_return(atomic64_t *v) ++{ ++ return atomic64_add_return(1L, v); ++} ++ ++static inline s64 atomic64_dec_return(atomic64_t *v) ++{ ++ return atomic64_add_return(-1L, v); ++} ++ ++/** ++ * atomic64_inc_and_test - increment and test ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically increments @v by 1 ++ * and returns true if the result is zero, or false for all ++ * other cases. ++ */ ++static inline int atomic64_inc_and_test(atomic64_t *v) ++{ ++ return (atomic64_inc_return(v) == 0); ++} ++ ++/** ++ * atomic64_dec_and_test - decrement and test ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically decrements @v by 1 and ++ * returns true if the result is 0, or false for all other ++ * cases. ++ */ ++static inline int atomic64_dec_and_test(atomic64_t *v) ++{ ++ return (atomic64_dec_return(v) == 0); ++} ++ ++/** ++ * atomic64_sub_and_test - subtract value from variable and test result ++ * @a: integer value to subtract ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically subtracts @a from @v and returns ++ * true if the result is zero, or false for all ++ * other cases. ++ */ ++static inline int atomic64_sub_and_test(s64 a, atomic64_t *v) ++{ ++ return (atomic64_sub_return(a, v) == 0); ++} ++ ++/** ++ * atomic64_add_negative - add and test if negative ++ * @a: integer value to add ++ * @v: pointer to type atomic64_t ++ * ++ * Atomically adds @a to @v and returns true ++ * if the result is negative, or false when ++ * result is greater than or equal to zero. ++ */ ++static inline int atomic64_add_negative(s64 a, atomic64_t *v) ++{ ++ return (atomic64_add_return(a, v) < 0); ++} ++ ++ ++static inline s64 atomic64_xchg(atomic64_t *v, s64 n) ++{ ++ register s64 c; ++ __asm__ __volatile__ ( ++ "amoswap.d %0, %2, %1" ++ : "=r" (c), "+A" (v->counter) ++ : "r" (n)); ++ return c; ++} ++ ++static inline s64 atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n) ++{ ++ return cmpxchg(&(v->counter), o, n); ++} ++ ++/* ++ * atomic64_dec_if_positive - decrement by 1 if old value positive ++ * @v: pointer of type atomic_t ++ * ++ * The function returns the old value of *v minus 1, even if ++ * the atomic variable, v, was not decremented. ++ */ ++static inline s64 atomic64_dec_if_positive(atomic64_t *v) ++{ ++ register s64 prev, rc; ++ __asm__ __volatile__ ( ++ "0:" ++ "lr.d %0, %2\n" ++ "add %0, %0, -1\n" ++ "bltz %0, 1f\n" ++ "sc.w %1, %0, %2\n" ++ "bnez %1, 0b\n" ++ "1:" ++ : "=&r" (prev), "=r" (rc), "+A" (v->counter)); ++ return prev; ++} ++ ++/** ++ * atomic64_add_unless - add unless the number is a given value ++ * @v: pointer of type atomic64_t ++ * @a: the amount to add to v... ++ * @u: ...unless v is equal to u. ++ * ++ * Atomically adds @a to @v, so long as it was not @u. ++ * Returns true if the addition occurred and false otherwise. ++ */ ++static inline int atomic64_add_unless(atomic64_t *v, s64 a, s64 u) ++{ ++ register s64 tmp; ++ register int rc = 1; ++ ++ __asm__ __volatile__ ( ++ "0:" ++ "lr.d %0, %2\n" ++ "beq %0, %z4, 1f\n" ++ "add %0, %0, %3\n" ++ "sc.d %1, %0, %2\n" ++ "bnez %1, 0b\n" ++ "1:" ++ : "=&r" (tmp), "=&r" (rc), "+A" (v->counter) ++ : "rI" (a), "rJ" (u)); ++ return !rc; ++} ++ ++static inline int atomic64_inc_not_zero(atomic64_t *v) ++{ ++ return atomic64_add_unless(v, 1, 0); ++} ++ ++/** ++ * atomic64_and - Atomically clear bits in atomic variable ++ * @mask: Mask of the bits to be retained ++ * @v: pointer of type atomic_t ++ * ++ * Atomically retains the bits set in @mask from @v ++ */ ++static inline void atomic64_and(s64 mask, atomic64_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoand.d zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (mask)); ++} ++ ++/** ++ * atomic64_or - Atomically set bits in atomic variable ++ * @mask: Mask of the bits to be set ++ * @v: pointer of type atomic_t ++ * ++ * Atomically sets the bits set in @mask in @v ++ */ ++static inline void atomic64_or(s64 mask, atomic64_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoor.d zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (mask)); ++} ++ ++/** ++ * atomic64_xor - Atomically flips bits in atomic variable ++ * @mask: Mask of the bits to be flipped ++ * @v: pointer of type atomic_t ++ * ++ * Atomically flips the bits set in @mask in @v ++ */ ++static inline void atomic64_xor(s64 mask, atomic64_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoxor.d zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (mask)); ++} ++ ++#endif /* CONFIG_GENERIC_ATOMIC64 */ ++ ++#endif /* _ASM_RISCV_ATOMIC64_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/atomic.h linux-4.6.2.riscv/arch/riscv/include/asm/atomic.h +--- linux-4.6.2/arch/riscv/include/asm/atomic.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/atomic.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,276 @@ ++#ifndef _ASM_RISCV_ATOMIC_H ++#define _ASM_RISCV_ATOMIC_H ++ ++#ifdef CONFIG_RV_ATOMIC ++ ++#include ++#include ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++/** ++ * atomic_read - read atomic variable ++ * @v: pointer of type atomic_t ++ * ++ * Atomically reads the value of @v. ++ */ ++static inline int atomic_read(const atomic_t *v) ++{ ++ return *((volatile int *)(&(v->counter))); ++} ++ ++/** ++ * atomic_set - set atomic variable ++ * @v: pointer of type atomic_t ++ * @i: required value ++ * ++ * Atomically sets the value of @v to @i. ++ */ ++static inline void atomic_set(atomic_t *v, int i) ++{ ++ v->counter = i; ++} ++ ++/** ++ * atomic_add - add integer to atomic variable ++ * @i: integer value to add ++ * @v: pointer of type atomic_t ++ * ++ * Atomically adds @i to @v. ++ */ ++static inline void atomic_add(int i, atomic_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoadd.w zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (i)); ++} ++ ++/** ++ * atomic_sub - subtract integer from atomic variable ++ * @i: integer value to subtract ++ * @v: pointer of type atomic_t ++ * ++ * Atomically subtracts @i from @v. ++ */ ++static inline void atomic_sub(int i, atomic_t *v) ++{ ++ atomic_add(-i, v); ++} ++ ++/** ++ * atomic_add_return - add integer to atomic variable ++ * @i: integer value to add ++ * @v: pointer of type atomic_t ++ * ++ * Atomically adds @i to @v and returns the result ++ */ ++static inline int atomic_add_return(int i, atomic_t *v) ++{ ++ register int c; ++ __asm__ __volatile__ ( ++ "amoadd.w %0, %2, %1" ++ : "=r" (c), "+A" (v->counter) ++ : "r" (i)); ++ return (c + i); ++} ++ ++/** ++ * atomic_sub_return - subtract integer from atomic variable ++ * @i: integer value to subtract ++ * @v: pointer of type atomic_t ++ * ++ * Atomically subtracts @i from @v and returns the result ++ */ ++static inline int atomic_sub_return(int i, atomic_t *v) ++{ ++ return atomic_add_return(-i, v); ++} ++ ++/** ++ * atomic_inc - increment atomic variable ++ * @v: pointer of type atomic_t ++ * ++ * Atomically increments @v by 1. ++ */ ++static inline void atomic_inc(atomic_t *v) ++{ ++ atomic_add(1, v); ++} ++ ++/** ++ * atomic_dec - decrement atomic variable ++ * @v: pointer of type atomic_t ++ * ++ * Atomically decrements @v by 1. ++ */ ++static inline void atomic_dec(atomic_t *v) ++{ ++ atomic_add(-1, v); ++} ++ ++static inline int atomic_inc_return(atomic_t *v) ++{ ++ return atomic_add_return(1, v); ++} ++ ++static inline int atomic_dec_return(atomic_t *v) ++{ ++ return atomic_sub_return(1, v); ++} ++ ++/** ++ * atomic_sub_and_test - subtract value from variable and test result ++ * @i: integer value to subtract ++ * @v: pointer of type atomic_t ++ * ++ * Atomically subtracts @i from @v and returns ++ * true if the result is zero, or false for all ++ * other cases. ++ */ ++static inline int atomic_sub_and_test(int i, atomic_t *v) ++{ ++ return (atomic_sub_return(i, v) == 0); ++} ++ ++/** ++ * atomic_inc_and_test - increment and test ++ * @v: pointer of type atomic_t ++ * ++ * Atomically increments @v by 1 ++ * and returns true if the result is zero, or false for all ++ * other cases. ++ */ ++static inline int atomic_inc_and_test(atomic_t *v) ++{ ++ return (atomic_inc_return(v) == 0); ++} ++ ++/** ++ * atomic_dec_and_test - decrement and test ++ * @v: pointer of type atomic_t ++ * ++ * Atomically decrements @v by 1 and ++ * returns true if the result is 0, or false for all other ++ * cases. ++ */ ++static inline int atomic_dec_and_test(atomic_t *v) ++{ ++ return (atomic_dec_return(v) == 0); ++} ++ ++/** ++ * atomic_add_negative - add and test if negative ++ * @i: integer value to add ++ * @v: pointer of type atomic_t ++ * ++ * Atomically adds @i to @v and returns true ++ * if the result is negative, or false when ++ * result is greater than or equal to zero. ++ */ ++static inline int atomic_add_negative(int i, atomic_t *v) ++{ ++ return (atomic_add_return(i, v) < 0); ++} ++ ++ ++static inline int atomic_xchg(atomic_t *v, int n) ++{ ++ register int c; ++ __asm__ __volatile__ ( ++ "amoswap.w %0, %2, %1" ++ : "=r" (c), "+A" (v->counter) ++ : "r" (n)); ++ return c; ++} ++ ++static inline int atomic_cmpxchg(atomic_t *v, int o, int n) ++{ ++ return cmpxchg(&(v->counter), o, n); ++} ++ ++/** ++ * __atomic_add_unless - add unless the number is already a given value ++ * @v: pointer of type atomic_t ++ * @a: the amount to add to v... ++ * @u: ...unless v is equal to u. ++ * ++ * Atomically adds @a to @v, so long as @v was not already @u. ++ * Returns the old value of @v. ++ */ ++static inline int __atomic_add_unless(atomic_t *v, int a, int u) ++{ ++ register int prev, rc; ++ __asm__ __volatile__ ( ++ "0:" ++ "lr.w %0, %2\n" ++ "beq %0, %4, 1f\n" ++ "add %1, %0, %3\n" ++ "sc.w %1, %1, %2\n" ++ "bnez %1, 0b\n" ++ "1:" ++ : "=&r" (prev), "=&r" (rc), "+A" (v->counter) ++ : "r" (a), "r" (u)); ++ return prev; ++} ++ ++/** ++ * atomic_and - Atomically clear bits in atomic variable ++ * @mask: Mask of the bits to be retained ++ * @v: pointer of type atomic_t ++ * ++ * Atomically retains the bits set in @mask from @v ++ */ ++static inline void atomic_and(unsigned int mask, atomic_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoand.w zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (mask)); ++} ++ ++/** ++ * atomic_or - Atomically set bits in atomic variable ++ * @mask: Mask of the bits to be set ++ * @v: pointer of type atomic_t ++ * ++ * Atomically sets the bits set in @mask in @v ++ */ ++static inline void atomic_or(unsigned int mask, atomic_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoor.w zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (mask)); ++} ++ ++/** ++ * atomic_xor - Atomically flips bits in atomic variable ++ * @mask: Mask of the bits to be flipped ++ * @v: pointer of type atomic_t ++ * ++ * Atomically flips the bits set in @mask in @v ++ */ ++static inline void atomic_xor(unsigned int mask, atomic_t *v) ++{ ++ __asm__ __volatile__ ( ++ "amoxor.w zero, %1, %0" ++ : "+A" (v->counter) ++ : "r" (mask)); ++} ++ ++/* Assume that atomic operations are already serializing */ ++#define smp_mb__before_atomic_dec() barrier() ++#define smp_mb__after_atomic_dec() barrier() ++#define smp_mb__before_atomic_inc() barrier() ++#define smp_mb__after_atomic_inc() barrier() ++ ++#else /* !CONFIG_RV_ATOMIC */ ++ ++#include ++ ++#endif /* CONFIG_RV_ATOMIC */ ++ ++#include ++ ++#endif /* _ASM_RISCV_ATOMIC_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/barrier.h linux-4.6.2.riscv/arch/riscv/include/asm/barrier.h +--- linux-4.6.2/arch/riscv/include/asm/barrier.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/barrier.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,14 @@ ++#ifndef _ASM_RISCV_BARRIER_H ++#define _ASM_RISCV_BARRIER_H ++ ++#ifndef __ASSEMBLY__ ++ ++#define nop() __asm__ __volatile__ ("nop") ++ ++#define mb() __asm__ __volatile__ ("fence" : : : "memory") ++ ++#include ++ ++#endif /* __ASSEMBLY__ */ ++ ++#endif /* _ASM_RISCV_BARRIER_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/bitops.h linux-4.6.2.riscv/arch/riscv/include/asm/bitops.h +--- linux-4.6.2/arch/riscv/include/asm/bitops.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/bitops.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,271 @@ ++#ifndef _ASM_RISCV_BITOPS_H ++#define _ASM_RISCV_BITOPS_H ++ ++#ifndef _LINUX_BITOPS_H ++#error "Only can be included directly" ++#endif /* _LINUX_BITOPS_H */ ++ ++#ifdef __KERNEL__ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_RV_ATOMIC ++ ++#ifndef smp_mb__before_clear_bit ++#define smp_mb__before_clear_bit() smp_mb() ++#define smp_mb__after_clear_bit() smp_mb() ++#endif /* smp_mb__before_clear_bit */ ++ ++/** ++ * __ffs - find first bit in word. ++ * @word: The word to search ++ * ++ * Undefined if no bit exists, so code should check against 0 first. ++ */ ++/* ++static __always_inline unsigned long __ffs(unsigned long word) ++{ ++ return 0; ++} ++*/ ++#include ++ ++#include ++ ++/** ++ * fls - find last (most-significant) bit set ++ * @x: the word to search ++ * ++ * This is defined the same way as ffs. ++ * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. ++ */ ++/* ++static __always_inline int fls(int x) ++{ ++ return 0; ++} ++*/ ++#include ++ ++/** ++ * __fls - find last (most-significant) set bit in a long word ++ * @word: the word to search ++ * ++ * Undefined if no set bit exists, so code should check against 0 first. ++ */ ++/* ++static __always_inline unsigned long __fls(unsigned long word) ++{ ++ return 0; ++} ++*/ ++#include ++ ++#include ++#include ++#include ++ ++/** ++ * ffs - find first bit set ++ * @x: the word to search ++ * ++ * This is defined the same way as ++ * the libc and compiler builtin ffs routines, therefore ++ * differs in spirit from the above ffz (man ffs). ++ */ ++/* ++static __always_inline int ffs(int x) ++{ ++ return 0; ++} ++*/ ++#include ++ ++#include ++ ++#if (BITS_PER_LONG == 64) ++#define __AMO(op) "amo" #op ".d" ++#elif (BITS_PER_LONG == 32) ++#define __AMO(op) "amo" #op ".w" ++#else ++#error "Unexpected BITS_PER_LONG" ++#endif ++ ++#define __test_and_op_bit(op, mod, nr, addr) \ ++({ \ ++ unsigned long __res, __mask; \ ++ __mask = BIT_MASK(nr); \ ++ __asm__ __volatile__ ( \ ++ __AMO(op) " %0, %2, %1" \ ++ : "=r" (__res), "+A" (addr[BIT_WORD(nr)]) \ ++ : "r" (mod(__mask))); \ ++ ((__res & __mask) != 0); \ ++}) ++ ++#define __op_bit(op, mod, nr, addr) \ ++ __asm__ __volatile__ ( \ ++ __AMO(op) " zero, %1, %0" \ ++ : "+A" (addr[BIT_WORD(nr)]) \ ++ : "r" (mod(BIT_MASK(nr)))) ++ ++/* Bitmask modifiers */ ++#define __NOP(x) (x) ++#define __NOT(x) (~(x)) ++ ++/** ++ * test_and_set_bit - Set a bit and return its old value ++ * @nr: Bit to set ++ * @addr: Address to count from ++ * ++ * This operation is atomic and cannot be reordered. ++ * It may be reordered on other architectures than x86. ++ * It also implies a memory barrier. ++ */ ++static inline int test_and_set_bit(int nr, volatile unsigned long *addr) ++{ ++ return __test_and_op_bit(or, __NOP, nr, addr); ++} ++ ++/** ++ * test_and_clear_bit - Clear a bit and return its old value ++ * @nr: Bit to clear ++ * @addr: Address to count from ++ * ++ * This operation is atomic and cannot be reordered. ++ * It can be reordered on other architectures other than x86. ++ * It also implies a memory barrier. ++ */ ++static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) ++{ ++ return __test_and_op_bit(and, __NOT, nr, addr); ++} ++ ++/** ++ * test_and_change_bit - Change a bit and return its old value ++ * @nr: Bit to change ++ * @addr: Address to count from ++ * ++ * This operation is atomic and cannot be reordered. ++ * It also implies a memory barrier. ++ */ ++static inline int test_and_change_bit(int nr, volatile unsigned long *addr) ++{ ++ return __test_and_op_bit(xor, __NOP, nr, addr); ++} ++ ++/** ++ * set_bit - Atomically set a bit in memory ++ * @nr: the bit to set ++ * @addr: the address to start counting from ++ * ++ * This function is atomic and may not be reordered. See __set_bit() ++ * if you do not require the atomic guarantees. ++ * ++ * Note: there are no guarantees that this function will not be reordered ++ * on non x86 architectures, so if you are writing portable code, ++ * make sure not to rely on its reordering guarantees. ++ * ++ * Note that @nr may be almost arbitrarily large; this function is not ++ * restricted to acting on a single-word quantity. ++ */ ++static inline void set_bit(int nr, volatile unsigned long *addr) ++{ ++ __op_bit(or, __NOP, nr, addr); ++} ++ ++/** ++ * clear_bit - Clears a bit in memory ++ * @nr: Bit to clear ++ * @addr: Address to start counting from ++ * ++ * clear_bit() is atomic and may not be reordered. However, it does ++ * not contain a memory barrier, so if it is used for locking purposes, ++ * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() ++ * in order to ensure changes are visible on other processors. ++ */ ++static inline void clear_bit(int nr, volatile unsigned long *addr) ++{ ++ __op_bit(and, __NOT, nr, addr); ++} ++ ++/** ++ * change_bit - Toggle a bit in memory ++ * @nr: Bit to change ++ * @addr: Address to start counting from ++ * ++ * change_bit() is atomic and may not be reordered. It may be ++ * reordered on other architectures than x86. ++ * Note that @nr may be almost arbitrarily large; this function is not ++ * restricted to acting on a single-word quantity. ++ */ ++static inline void change_bit(int nr, volatile unsigned long *addr) ++{ ++ __op_bit(xor, __NOP, nr, addr); ++} ++ ++/** ++ * test_and_set_bit_lock - Set a bit and return its old value, for lock ++ * @nr: Bit to set ++ * @addr: Address to count from ++ * ++ * This operation is atomic and provides acquire barrier semantics. ++ * It can be used to implement bit locks. ++ */ ++static inline int test_and_set_bit_lock( ++ unsigned long nr, volatile unsigned long *addr) ++{ ++ return test_and_set_bit(nr, addr); ++} ++ ++/** ++ * clear_bit_unlock - Clear a bit in memory, for unlock ++ * @nr: the bit to set ++ * @addr: the address to start counting from ++ * ++ * This operation is atomic and provides release barrier semantics. ++ */ ++static inline void clear_bit_unlock( ++ unsigned long nr, volatile unsigned long *addr) ++{ ++ clear_bit(nr, addr); ++} ++ ++/** ++ * __clear_bit_unlock - Clear a bit in memory, for unlock ++ * @nr: the bit to set ++ * @addr: the address to start counting from ++ * ++ * This operation is like clear_bit_unlock, however it is not atomic. ++ * It does provide release barrier semantics so it can be used to unlock ++ * a bit lock, however it would only be used if no other CPU can modify ++ * any bits in the memory until the lock is released (a good example is ++ * if the bit lock itself protects access to the other bits in the word). ++ */ ++static inline void __clear_bit_unlock( ++ unsigned long nr, volatile unsigned long *addr) ++{ ++ clear_bit(nr, addr); ++} ++ ++#undef __test_and_op_bit ++#undef __op_bit ++#undef __NOP ++#undef __NOT ++#undef __AMO ++ ++#include ++#include ++#include ++ ++#else /* !CONFIG_RV_ATOMIC */ ++ ++#include ++ ++#endif /* CONFIG_RV_ATOMIC */ ++ ++#endif /* __KERNEL__ */ ++ ++#endif /* _ASM_RISCV_BITOPS_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/bug.h linux-4.6.2.riscv/arch/riscv/include/asm/bug.h +--- linux-4.6.2/arch/riscv/include/asm/bug.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/bug.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,67 @@ ++#ifndef _ASM_RISCV_BUG_H ++#define _ASM_RISCV_BUG_H ++ ++#include ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_GENERIC_BUG ++#define __BUG_INSN _AC(0x00100073,UL) /* sbreak */ ++ ++#ifndef __ASSEMBLY__ ++typedef u32 bug_insn_t; ++ ++#ifdef CONFIG_GENERIC_BUG_RELATIVE_POINTERS ++#define __BUG_ENTRY_ADDR INT " 1b - 2b" ++#define __BUG_ENTRY_FILE INT " %0 - 2b" ++#else ++#define __BUG_ENTRY_ADDR PTR " 1b" ++#define __BUG_ENTRY_FILE PTR " %0" ++#endif ++ ++#ifdef CONFIG_DEBUG_BUGVERBOSE ++#define __BUG_ENTRY \ ++ __BUG_ENTRY_ADDR "\n\t" \ ++ __BUG_ENTRY_FILE "\n\t" \ ++ SHORT " %1" ++#else ++#define __BUG_ENTRY \ ++ __BUG_ENTRY_ADDR ++#endif ++ ++#define BUG() \ ++do { \ ++ __asm__ __volatile__ ( \ ++ "1:\n\t" \ ++ "sbreak\n" \ ++ ".pushsection __bug_table,\"a\"\n\t" \ ++ "2:\n\t" \ ++ __BUG_ENTRY "\n\t" \ ++ ".org 2b + %2\n\t" \ ++ ".popsection" \ ++ : \ ++ : "i" (__FILE__), "i" (__LINE__), \ ++ "i" (sizeof(struct bug_entry))); \ ++ unreachable(); \ ++} while (0) ++ ++#define HAVE_ARCH_BUG ++#endif /* !__ASSEMBLY__ */ ++#endif /* CONFIG_GENERIC_BUG */ ++ ++#include ++ ++#ifndef __ASSEMBLY__ ++ ++struct pt_regs; ++struct task_struct; ++ ++extern void die(struct pt_regs *regs, const char *str); ++extern void do_trap(struct pt_regs *regs, int signo, int code, ++ unsigned long addr, struct task_struct *tsk); ++ ++#endif /* !__ASSEMBLY__ */ ++ ++#endif /* _ASM_RISCV_BUG_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/cacheflush.h linux-4.6.2.riscv/arch/riscv/include/asm/cacheflush.h +--- linux-4.6.2/arch/riscv/include/asm/cacheflush.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/cacheflush.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,26 @@ ++#ifndef _ASM_RISCV_CACHEFLUSH_H ++#define _ASM_RISCV_CACHEFLUSH_H ++ ++#include ++ ++#undef flush_icache_range ++#undef flush_icache_user_range ++ ++static inline void local_flush_icache_all(void) ++{ ++ asm volatile ("fence.i" ::: "memory"); ++} ++ ++#ifndef CONFIG_SMP ++ ++#define flush_icache_range(start, end) local_flush_icache_all() ++#define flush_icache_user_range(vma, pg, addr, len) local_flush_icache_all() ++ ++#else /* CONFIG_SMP */ ++ ++#define flush_icache_range(start, end) sbi_remote_fence_i(0) ++#define flush_icache_user_range(vma, pg, addr, len) sbi_remote_fence_i(0) ++ ++#endif /* CONFIG_SMP */ ++ ++#endif /* _ASM_RISCV_CACHEFLUSH_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/cache.h linux-4.6.2.riscv/arch/riscv/include/asm/cache.h +--- linux-4.6.2/arch/riscv/include/asm/cache.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/cache.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,12 @@ ++#ifndef _ASM_RISCV_CACHE_H ++#define _ASM_RISCV_CACHE_H ++ ++#if defined(CONFIG_CPU_RV_ROCKET) ++#define L1_CACHE_SHIFT 6 ++#else ++#define L1_CACHE_SHIFT 5 ++#endif ++ ++#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) ++ ++#endif /* _ASM_RISCV_CACHE_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/cmpxchg.h linux-4.6.2.riscv/arch/riscv/include/asm/cmpxchg.h +--- linux-4.6.2/arch/riscv/include/asm/cmpxchg.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/cmpxchg.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,111 @@ ++#ifndef _ASM_RISCV_CMPXCHG_H ++#define _ASM_RISCV_CMPXCHG_H ++ ++#include ++ ++#ifdef CONFIG_RV_ATOMIC ++ ++#include ++ ++#define __xchg(new, ptr, size) \ ++({ \ ++ __typeof__(ptr) __ptr = (ptr); \ ++ __typeof__(new) __new = (new); \ ++ __typeof__(*(ptr)) __ret; \ ++ switch (size) { \ ++ case 4: \ ++ __asm__ __volatile__ ( \ ++ "amoswap.w %0, %2, %1" \ ++ : "=r" (__ret), "+A" (*__ptr) \ ++ : "r" (__new)); \ ++ break; \ ++ case 8: \ ++ __asm__ __volatile__ ( \ ++ "amoswap.d %0, %2, %1" \ ++ : "=r" (__ret), "+A" (*__ptr) \ ++ : "r" (__new)); \ ++ break; \ ++ default: \ ++ BUILD_BUG(); \ ++ } \ ++ __ret; \ ++}) ++ ++#define xchg(ptr, x) (__xchg((x), (ptr), sizeof(*(ptr)))) ++ ++ ++/* ++ * Atomic compare and exchange. Compare OLD with MEM, if identical, ++ * store NEW in MEM. Return the initial value in MEM. Success is ++ * indicated by comparing RETURN with OLD. ++ */ ++#define __cmpxchg(ptr, old, new, size) \ ++({ \ ++ __typeof__(ptr) __ptr = (ptr); \ ++ __typeof__(old) __old = (old); \ ++ __typeof__(new) __new = (new); \ ++ __typeof__(*(ptr)) __ret; \ ++ register unsigned int __rc; \ ++ switch (size) { \ ++ case 4: \ ++ __asm__ __volatile__ ( \ ++ "0:" \ ++ "lr.w %0, %2\n" \ ++ "bne %0, %z3, 1f\n" \ ++ "sc.w %1, %z4, %2\n" \ ++ "bnez %1, 0b\n" \ ++ "1:" \ ++ : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \ ++ : "rJ" (__old), "rJ" (__new)); \ ++ break; \ ++ case 8: \ ++ __asm__ __volatile__ ( \ ++ "0:" \ ++ "lr.d %0, %2\n" \ ++ "bne %0, %z3, 1f\n" \ ++ "sc.d %1, %z4, %2\n" \ ++ "bnez %1, 0b\n" \ ++ "1:" \ ++ : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \ ++ : "rJ" (__old), "rJ" (__new)); \ ++ break; \ ++ default: \ ++ BUILD_BUG(); \ ++ } \ ++ __ret; \ ++}) ++ ++#define __cmpxchg_mb(ptr, old, new, size) \ ++({ \ ++ __typeof__(*(ptr)) __ret; \ ++ smp_mb(); \ ++ __ret = __cmpxchg((ptr), (old), (new), (size)); \ ++ smp_mb(); \ ++ __ret; \ ++}) ++ ++#define cmpxchg(ptr, o, n) \ ++ (__cmpxchg_mb((ptr), (o), (n), sizeof(*(ptr)))) ++ ++#define cmpxchg_local(ptr, o, n) \ ++ (__cmpxchg((ptr), (o), (n), sizeof(*(ptr)))) ++ ++#define cmpxchg64(ptr, o, n) \ ++({ \ ++ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ ++ cmpxchg((ptr), (o), (n)); \ ++}) ++ ++#define cmpxchg64_local(ptr, o, n) \ ++({ \ ++ BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ ++ cmpxchg_local((ptr), (o), (n)); \ ++}) ++ ++#else /* !CONFIG_RV_ATOMIC */ ++ ++#include ++ ++#endif /* CONFIG_RV_ATOMIC */ ++ ++#endif /* _ASM_RISCV_CMPXCHG_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/csr.h linux-4.6.2.riscv/arch/riscv/include/asm/csr.h +--- linux-4.6.2/arch/riscv/include/asm/csr.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/csr.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,137 @@ ++#ifndef _ASM_RISCV_CSR_H ++#define _ASM_RISCV_CSR_H ++ ++#include ++ ++/* Status register flags */ ++#define SR_IE _AC(0x00000002,UL) /* Interrupt Enable */ ++#define SR_PIE _AC(0x00000020,UL) /* Previous IE */ ++#define SR_PS _AC(0x00000100,UL) /* Previously Supervisor */ ++#define SR_PUM _AC(0x00040000,UL) /* Protect User Memory */ ++ ++#define SR_FS _AC(0x00006000,UL) /* Floating-point Status */ ++#define SR_FS_OFF _AC(0x00000000,UL) ++#define SR_FS_INITIAL _AC(0x00002000,UL) ++#define SR_FS_CLEAN _AC(0x00004000,UL) ++#define SR_FS_DIRTY _AC(0x00006000,UL) ++ ++#define SR_XS _AC(0x00018000,UL) /* Extension Status */ ++#define SR_XS_OFF _AC(0x00000000,UL) ++#define SR_XS_INITIAL _AC(0x00008000,UL) ++#define SR_XS_CLEAN _AC(0x00010000,UL) ++#define SR_XS_DIRTY _AC(0x00018000,UL) ++ ++#ifndef CONFIG_64BIT ++#define SR_SD _AC(0x80000000,UL) /* FS/XS dirty */ ++#else ++#define SR_SD _AC(0x8000000000000000,UL) /* FS/XS dirty */ ++#endif ++ ++/* Interrupt Enable and Interrupt Pending flags */ ++#define SIE_SSIE _AC(0x00000002,UL) /* Software Interrupt Enable */ ++#define SIE_STIE _AC(0x00000020,UL) /* Timer Interrupt Enable */ ++ ++#define EXC_INST_MISALIGNED 0 ++#define EXC_INST_ACCESS 1 ++#define EXC_BREAKPOINT 3 ++#define EXC_LOAD_ACCESS 5 ++#define EXC_STORE_ACCESS 7 ++#define EXC_SYSCALL 8 ++ ++#ifndef __ASSEMBLY__ ++ ++#define CSR_ZIMM(val) \ ++ (__builtin_constant_p(val) && ((unsigned long)(val) < 0x20)) ++ ++#define csr_swap(csr,val) \ ++({ \ ++ unsigned long __v = (unsigned long)(val); \ ++ if (CSR_ZIMM(__v)) { \ ++ __asm__ __volatile__ ( \ ++ "csrrw %0, " #csr ", %1" \ ++ : "=r" (__v) : "i" (__v)); \ ++ } else { \ ++ __asm__ __volatile__ ( \ ++ "csrrw %0, " #csr ", %1" \ ++ : "=r" (__v) : "r" (__v)); \ ++ } \ ++ __v; \ ++}) ++ ++#define csr_read(csr) \ ++({ \ ++ register unsigned long __v; \ ++ __asm__ __volatile__ ( \ ++ "csrr %0, " #csr : "=r" (__v)); \ ++ __v; \ ++}) ++ ++#define csr_write(csr,val) \ ++({ \ ++ unsigned long __v = (unsigned long)(val); \ ++ if (CSR_ZIMM(__v)) { \ ++ __asm__ __volatile__ ( \ ++ "csrw " #csr ", %0" : : "i" (__v)); \ ++ } else { \ ++ __asm__ __volatile__ ( \ ++ "csrw " #csr ", %0" : : "r" (__v)); \ ++ } \ ++}) ++ ++#define csr_read_set(csr,val) \ ++({ \ ++ unsigned long __v = (unsigned long)(val); \ ++ if (CSR_ZIMM(val)) { \ ++ __asm__ __volatile__ ( \ ++ "csrrs %0, " #csr ", %1" \ ++ : "=r" (__v) : "i" (__v)); \ ++ } else { \ ++ __asm__ __volatile__ ( \ ++ "csrrs %0, " #csr ", %1" \ ++ : "=r" (__v) : "r" (__v)); \ ++ } \ ++ __v; \ ++}) ++ ++#define csr_set(csr,val) \ ++({ \ ++ unsigned long __v = (unsigned long)(val); \ ++ if (CSR_ZIMM(__v)) { \ ++ __asm__ __volatile__ ( \ ++ "csrs " #csr ", %0" : : "i" (__v)); \ ++ } else { \ ++ __asm__ __volatile__ ( \ ++ "csrs " #csr ", %0" : : "r" (__v)); \ ++ } \ ++}) ++ ++#define csr_read_clear(csr,val) \ ++({ \ ++ unsigned long __v = (unsigned long)(val); \ ++ if (CSR_ZIMM(__v)) { \ ++ __asm__ __volatile__ ( \ ++ "csrrc %0, " #csr ", %1" \ ++ : "=r" (__v) : "i" (__v)); \ ++ } else { \ ++ __asm__ __volatile__ ( \ ++ "csrrc %0, " #csr ", %1" \ ++ : "=r" (__v) : "r" (__v)); \ ++ } \ ++ __v; \ ++}) ++ ++#define csr_clear(csr,val) \ ++({ \ ++ unsigned long __v = (unsigned long)(val); \ ++ if (CSR_ZIMM(__v)) { \ ++ __asm__ __volatile__ ( \ ++ "csrc " #csr ", %0" : : "i" (__v)); \ ++ } else { \ ++ __asm__ __volatile__ ( \ ++ "csrc " #csr ", %0" : : "r" (__v)); \ ++ } \ ++}) ++ ++#endif /* __ASSEMBLY__ */ ++ ++#endif /* _ASM_RISCV_CSR_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/current.h linux-4.6.2.riscv/arch/riscv/include/asm/current.h +--- linux-4.6.2/arch/riscv/include/asm/current.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/current.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,16 @@ ++#ifndef _ASM_RISCV_CURRENT_H ++#define _ASM_RISCV_CURRENT_H ++ ++#include ++ ++struct task_struct; ++ ++static inline struct task_struct *get_current(void) ++{ ++ register struct task_struct * tp asm("tp"); ++ return tp; ++} ++ ++#define current (get_current()) ++ ++#endif /* _ASM_RISCV_CURRENT_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/delay.h linux-4.6.2.riscv/arch/riscv/include/asm/delay.h +--- linux-4.6.2/arch/riscv/include/asm/delay.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/delay.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,14 @@ ++#ifndef _ASM_RISCV_DELAY_H ++#define _ASM_RISCV_DELAY_H ++ ++extern unsigned long timebase; ++ ++#define udelay udelay ++extern void udelay(unsigned long usecs); ++ ++#define ndelay ndelay ++extern void ndelay(unsigned long nsecs); ++ ++extern void __delay(unsigned long cycles); ++ ++#endif /* _ASM_RISCV_DELAY_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/device.h linux-4.6.2.riscv/arch/riscv/include/asm/device.h +--- linux-4.6.2/arch/riscv/include/asm/device.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/device.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,13 @@ ++#ifndef _ASM_RISCV_DEVICE_H ++#define _ASM_RISCV_DEVICE_H ++ ++#include ++ ++struct dev_archdata { ++ struct dma_map_ops *dma_ops; ++}; ++ ++struct pdev_archdata { ++}; ++ ++#endif /* _ASM_RISCV_DEVICE_H */ +diff -Nur linux-4.6.2/arch/riscv/include/asm/dma-mapping.h linux-4.6.2.riscv/arch/riscv/include/asm/dma-mapping.h +--- linux-4.6.2/arch/riscv/include/asm/dma-mapping.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.6.2.riscv/arch/riscv/include/asm/dma-mapping.h 2017-03-04 02:48:34.166888015 +0100 +@@ -0,0 +1,63 @@ ++/* ++ * Copyright (C) 2003-2004 Hewlett-Packard Co ++ * David Mosberger-Tang ++ * Copyright (C) 2012 ARM Ltd. ++ * Copyright (C) 2016 SiFive, Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++#ifndef __ASM_