From 8795a64e069215fbc1a90a059c30d2a81154d528 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Sun, 30 Oct 2016 13:49:44 +0100 Subject: linux: update to 4.1.35 --- mk/kernel-ver.mk | 4 +- ...1-net-macb-improve-big-endian-CPU-support.patch | 282 - ...1-net-macb-improve-big-endian-CPU-support.patch | 282 + target/config/Config.in.kernelversion | 2 +- .../patches/4.1.30/crisv32_ethernet_driver.patch | 4094 -- .../patches/4.1.35/crisv32_ethernet_driver.patch | 4094 ++ target/linux/patches/4.1.30/cleankernel.patch | 11 - target/linux/patches/4.1.30/cris-header.patch | 12 - .../patches/4.1.30/initramfs-nosizelimit.patch | 57 - target/linux/patches/4.1.30/j2-core.patch | 2060 - target/linux/patches/4.1.30/mtd-rootfs.patch | 26 - target/linux/patches/4.1.30/patch-realtime | 28362 ----------- .../linux/patches/4.1.30/regmap-default-on.patch | 17 - target/linux/patches/4.1.30/remove-warn.patch | 11 - target/linux/patches/4.1.30/startup.patch | 37 - target/linux/patches/4.1.30/use-gawk.patch | 24 - .../linux/patches/4.1.30/use-libgcc-for-sh.patch | 29 - target/linux/patches/4.1.35/cleankernel.patch | 11 + target/linux/patches/4.1.35/cris-header.patch | 12 + .../patches/4.1.35/initramfs-nosizelimit.patch | 57 + target/linux/patches/4.1.35/j2-core.patch | 2060 + target/linux/patches/4.1.35/mtd-rootfs.patch | 26 + target/linux/patches/4.1.35/patch-realtime | 28362 +++++++++++ .../linux/patches/4.1.35/regmap-default-on.patch | 17 + target/linux/patches/4.1.35/remove-warn.patch | 11 + target/linux/patches/4.1.35/startup.patch | 37 + target/linux/patches/4.1.35/use-gawk.patch | 24 + .../linux/patches/4.1.35/use-libgcc-for-sh.patch | 29 + .../patches/4.1.30/m68k-coldfire-fec.patch | 118 - .../patches/4.1.35/m68k-coldfire-fec.patch | 118 + .../ath79/patches/4.1.30/0001-openwrt-ath79.patch | 47200 ------------------- .../ath79/patches/4.1.35/0001-openwrt-ath79.patch | 47200 +++++++++++++++++++ target/or1k/patches/4.1.30/ld-or1k.patch | 12 - target/or1k/patches/4.1.35/ld-or1k.patch | 12 + 34 files changed, 82355 insertions(+), 82355 deletions(-) delete mode 100644 target/avr32/atmel-ngw100/patches/4.1.30/0001-net-macb-improve-big-endian-CPU-support.patch create mode 100644 target/avr32/atmel-ngw100/patches/4.1.35/0001-net-macb-improve-big-endian-CPU-support.patch delete mode 100644 target/cris/qemu-cris/patches/4.1.30/crisv32_ethernet_driver.patch create mode 100644 target/cris/qemu-cris/patches/4.1.35/crisv32_ethernet_driver.patch delete mode 100644 target/linux/patches/4.1.30/cleankernel.patch delete mode 100644 target/linux/patches/4.1.30/cris-header.patch delete mode 100644 target/linux/patches/4.1.30/initramfs-nosizelimit.patch delete mode 100644 target/linux/patches/4.1.30/j2-core.patch delete mode 100644 target/linux/patches/4.1.30/mtd-rootfs.patch delete mode 100644 target/linux/patches/4.1.30/patch-realtime delete mode 100644 target/linux/patches/4.1.30/regmap-default-on.patch delete mode 100644 target/linux/patches/4.1.30/remove-warn.patch delete mode 100644 target/linux/patches/4.1.30/startup.patch delete mode 100644 target/linux/patches/4.1.30/use-gawk.patch delete mode 100644 target/linux/patches/4.1.30/use-libgcc-for-sh.patch create mode 100644 target/linux/patches/4.1.35/cleankernel.patch create mode 100644 target/linux/patches/4.1.35/cris-header.patch create mode 100644 target/linux/patches/4.1.35/initramfs-nosizelimit.patch create mode 100644 target/linux/patches/4.1.35/j2-core.patch create mode 100644 target/linux/patches/4.1.35/mtd-rootfs.patch create mode 100644 target/linux/patches/4.1.35/patch-realtime create mode 100644 target/linux/patches/4.1.35/regmap-default-on.patch create mode 100644 target/linux/patches/4.1.35/remove-warn.patch create mode 100644 target/linux/patches/4.1.35/startup.patch create mode 100644 target/linux/patches/4.1.35/use-gawk.patch create mode 100644 target/linux/patches/4.1.35/use-libgcc-for-sh.patch delete mode 100644 target/m68k/qemu-m68k-mcf5208/patches/4.1.30/m68k-coldfire-fec.patch create mode 100644 target/m68k/qemu-m68k-mcf5208/patches/4.1.35/m68k-coldfire-fec.patch delete mode 100644 target/mips/ath79/patches/4.1.30/0001-openwrt-ath79.patch create mode 100644 target/mips/ath79/patches/4.1.35/0001-openwrt-ath79.patch delete mode 100644 target/or1k/patches/4.1.30/ld-or1k.patch create mode 100644 target/or1k/patches/4.1.35/ld-or1k.patch diff --git a/mk/kernel-ver.mk b/mk/kernel-ver.mk index 3c94e1597..0385213c6 100644 --- a/mk/kernel-ver.mk +++ b/mk/kernel-ver.mk @@ -32,10 +32,10 @@ KERNEL_VERSION:= $(KERNEL_FILE_VER)-$(KERNEL_RELEASE) KERNEL_HASH:= 841acb9109a893ab2f60b02355e1527e80fa09251e46339317f6984d69b1f4fc endif ifeq ($(ADK_TARGET_KERNEL_VERSION_4_1),y) -KERNEL_FILE_VER:= 4.1.30 +KERNEL_FILE_VER:= 4.1.35 KERNEL_RELEASE:= 1 KERNEL_VERSION:= $(KERNEL_FILE_VER)-$(KERNEL_RELEASE) -KERNEL_HASH:= 9d22eaaecce666c9e813653bd2a7654849f3f105bdcefe3fe4ee8035f2ad92c6 +KERNEL_HASH:= 544af0400818a4b5ee7bca192c52e801faf7eeb22eed128c89aeb490344cc04a endif ifeq ($(ADK_TARGET_KERNEL_VERSION_3_18),y) KERNEL_FILE_VER:= 3.18.33 diff --git a/target/avr32/atmel-ngw100/patches/4.1.30/0001-net-macb-improve-big-endian-CPU-support.patch b/target/avr32/atmel-ngw100/patches/4.1.30/0001-net-macb-improve-big-endian-CPU-support.patch deleted file mode 100644 index 96a0a96b6..000000000 --- a/target/avr32/atmel-ngw100/patches/4.1.30/0001-net-macb-improve-big-endian-CPU-support.patch +++ /dev/null @@ -1,282 +0,0 @@ -From f2ce8a9e48385f444389e75cfe293637c3eb5410 Mon Sep 17 00:00:00 2001 -From: Andy Shevchenko -Date: Fri, 24 Jul 2015 21:23:59 +0300 -Subject: [PATCH] net/macb: improve big endian CPU support - -The commit a50dad355a53 (net: macb: Add big endian CPU support) converted I/O -accessors to readl_relaxed() and writel_relaxed() and consequentially broke -MACB driver on AVR32 platforms such as ATNGW100. - -This patch improves I/O access by checking endiannes first and use the -corresponding methods. - -Fixes: a50dad355a53 (net: macb: Add big endian CPU support) -Signed-off-by: Andy Shevchenko -Signed-off-by: David S. Miller -Signed-off-by: Waldemar Brodkorb ---- - drivers/net/ethernet/cadence/macb.c | 103 ++++++++++++++++++++++++++--------- - drivers/net/ethernet/cadence/macb.h | 28 ++++------ - 2 files changed, 87 insertions(+), 44 deletions(-) - -diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c -index caeb395..9d06e3d 100644 ---- a/drivers/net/ethernet/cadence/macb.c -+++ b/drivers/net/ethernet/cadence/macb.c -@@ -104,6 +104,57 @@ static void *macb_rx_buffer(struct macb *bp, unsigned int index) - return bp->rx_buffers + bp->rx_buffer_size * macb_rx_ring_wrap(index); - } - -+/* I/O accessors */ -+static u32 hw_readl_native(struct macb *bp, int offset) -+{ -+ return __raw_readl(bp->regs + offset); -+} -+ -+static void hw_writel_native(struct macb *bp, int offset, u32 value) -+{ -+ __raw_writel(value, bp->regs + offset); -+} -+ -+static u32 hw_readl(struct macb *bp, int offset) -+{ -+ return readl_relaxed(bp->regs + offset); -+} -+ -+static void hw_writel(struct macb *bp, int offset, u32 value) -+{ -+ writel_relaxed(value, bp->regs + offset); -+} -+ -+/* -+ * Find the CPU endianness by using the loopback bit of NCR register. When the -+ * CPU is in big endian we need to program swaped mode for management -+ * descriptor access. -+ */ -+static bool hw_is_native_io(void __iomem *addr) -+{ -+ u32 value = MACB_BIT(LLB); -+ -+ __raw_writel(value, addr + MACB_NCR); -+ value = __raw_readl(addr + MACB_NCR); -+ -+ /* Write 0 back to disable everything */ -+ __raw_writel(0, addr + MACB_NCR); -+ -+ return value == MACB_BIT(LLB); -+} -+ -+static bool hw_is_gem(void __iomem *addr, bool native_io) -+{ -+ u32 id; -+ -+ if (native_io) -+ id = __raw_readl(addr + MACB_MID); -+ else -+ id = readl_relaxed(addr + MACB_MID); -+ -+ return MACB_BFEXT(IDNUM, id) >= 0x2; -+} -+ - static void macb_set_hwaddr(struct macb *bp) - { - u32 bottom; -@@ -449,14 +500,14 @@ err_out: - - static void macb_update_stats(struct macb *bp) - { -- u32 __iomem *reg = bp->regs + MACB_PFR; - u32 *p = &bp->hw_stats.macb.rx_pause_frames; - u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1; -+ int offset = MACB_PFR; - - WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); - -- for(; p < end; p++, reg++) -- *p += readl_relaxed(reg); -+ for(; p < end; p++, offset += 4) -+ *p += bp->readl(bp, offset); - } - - static int macb_halt_tx(struct macb *bp) -@@ -1603,7 +1654,6 @@ static u32 macb_dbw(struct macb *bp) - static void macb_configure_dma(struct macb *bp) - { - u32 dmacfg; -- u32 tmp, ncr; - - if (macb_is_gem(bp)) { - dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); -@@ -1613,22 +1663,11 @@ static void macb_configure_dma(struct macb *bp) - dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); - dmacfg &= ~GEM_BIT(ENDIA_PKT); - -- /* Find the CPU endianness by using the loopback bit of net_ctrl -- * register. save it first. When the CPU is in big endian we -- * need to program swaped mode for management descriptor access. -- */ -- ncr = macb_readl(bp, NCR); -- __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR); -- tmp = __raw_readl(bp->regs + MACB_NCR); -- -- if (tmp == MACB_BIT(LLB)) -+ if (bp->native_io) - dmacfg &= ~GEM_BIT(ENDIA_DESC); - else - dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */ - -- /* Restore net_ctrl */ -- macb_writel(bp, NCR, ncr); -- - if (bp->dev->features & NETIF_F_HW_CSUM) - dmacfg |= GEM_BIT(TXCOEN); - else -@@ -1902,14 +1941,14 @@ static void gem_update_stats(struct macb *bp) - - for (i = 0; i < GEM_STATS_LEN; ++i, ++p) { - u32 offset = gem_statistics[i].offset; -- u64 val = readl_relaxed(bp->regs + offset); -+ u64 val = bp->readl(bp, offset); - - bp->ethtool_stats[i] += val; - *p += val; - - if (offset == GEM_OCTTXL || offset == GEM_OCTRXL) { - /* Add GEM_OCTTXH, GEM_OCTRXH */ -- val = readl_relaxed(bp->regs + offset + 4); -+ val = bp->readl(bp, offset + 4); - bp->ethtool_stats[i] += ((u64)val) << 32; - *(++p) += val; - } -@@ -2190,7 +2229,7 @@ static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_co - if (dt_conf) - bp->caps = dt_conf->caps; - -- if (macb_is_gem_hw(bp->regs)) { -+ if (hw_is_gem(bp->regs, bp->native_io)) { - bp->caps |= MACB_CAPS_MACB_IS_GEM; - - dcfg = gem_readl(bp, DCFG1); -@@ -2205,6 +2244,7 @@ static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_co - } - - static void macb_probe_queues(void __iomem *mem, -+ bool native_io, - unsigned int *queue_mask, - unsigned int *num_queues) - { -@@ -2219,7 +2259,7 @@ static void macb_probe_queues(void __iomem *mem, - * we are early in the probe process and don't have the - * MACB_CAPS_MACB_IS_GEM flag positioned - */ -- if (!macb_is_gem_hw(mem)) -+ if (!hw_is_gem(mem, native_io)) - return; - - /* bit 0 is never set but queue 0 always exists */ -@@ -2786,6 +2826,7 @@ static int macb_probe(struct platform_device *pdev) - struct clk *pclk, *hclk, *tx_clk; - unsigned int queue_mask, num_queues; - struct macb_platform_data *pdata; -+ bool native_io; - struct phy_device *phydev; - struct net_device *dev; - struct resource *regs; -@@ -2794,6 +2835,11 @@ static int macb_probe(struct platform_device *pdev) - struct macb *bp; - int err; - -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ mem = devm_ioremap_resource(&pdev->dev, regs); -+ if (IS_ERR(mem)) -+ return PTR_ERR(mem); -+ - if (np) { - const struct of_device_id *match; - -@@ -2809,14 +2855,9 @@ static int macb_probe(struct platform_device *pdev) - if (err) - return err; - -- regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -- mem = devm_ioremap_resource(&pdev->dev, regs); -- if (IS_ERR(mem)) { -- err = PTR_ERR(mem); -- goto err_disable_clocks; -- } -+ native_io = hw_is_native_io(mem); - -- macb_probe_queues(mem, &queue_mask, &num_queues); -+ macb_probe_queues(mem, native_io, &queue_mask, &num_queues); - dev = alloc_etherdev_mq(sizeof(*bp), num_queues); - if (!dev) { - err = -ENOMEM; -@@ -2831,6 +2872,14 @@ static int macb_probe(struct platform_device *pdev) - bp->pdev = pdev; - bp->dev = dev; - bp->regs = mem; -+ bp->native_io = native_io; -+ if (native_io) { -+ bp->readl = hw_readl_native; -+ bp->writel = hw_writel_native; -+ } else { -+ bp->readl = hw_readl; -+ bp->writel = hw_writel; -+ } - bp->num_queues = num_queues; - bp->queue_mask = queue_mask; - if (macb_config) -diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h -index d746559..f245340 100644 ---- a/drivers/net/ethernet/cadence/macb.h -+++ b/drivers/net/ethernet/cadence/macb.h -@@ -429,18 +429,12 @@ - | GEM_BF(name, value)) - - /* Register access macros */ --#define macb_readl(port,reg) \ -- readl_relaxed((port)->regs + MACB_##reg) --#define macb_writel(port,reg,value) \ -- writel_relaxed((value), (port)->regs + MACB_##reg) --#define gem_readl(port, reg) \ -- readl_relaxed((port)->regs + GEM_##reg) --#define gem_writel(port, reg, value) \ -- writel_relaxed((value), (port)->regs + GEM_##reg) --#define queue_readl(queue, reg) \ -- readl_relaxed((queue)->bp->regs + (queue)->reg) --#define queue_writel(queue, reg, value) \ -- writel_relaxed((value), (queue)->bp->regs + (queue)->reg) -+#define macb_readl(port, reg) (port)->readl((port), MACB_##reg) -+#define macb_writel(port, reg, value) (port)->writel((port), MACB_##reg, (value)) -+#define gem_readl(port, reg) (port)->readl((port), GEM_##reg) -+#define gem_writel(port, reg, value) (port)->writel((port), GEM_##reg, (value)) -+#define queue_readl(queue, reg) (queue)->bp->readl((queue)->bp, (queue)->reg) -+#define queue_writel(queue, reg, value) (queue)->bp->writel((queue)->bp, (queue)->reg, (value)) - - /* Conditional GEM/MACB macros. These perform the operation to the correct - * register dependent on whether the device is a GEM or a MACB. For registers -@@ -785,6 +779,11 @@ struct macb_queue { - - struct macb { - void __iomem *regs; -+ bool native_io; -+ -+ /* hardware IO accessors */ -+ u32 (*readl)(struct macb *bp, int offset); -+ void (*writel)(struct macb *bp, int offset, u32 value); - - unsigned int rx_tail; - unsigned int rx_prepared_head; -@@ -843,9 +842,4 @@ static inline bool macb_is_gem(struct macb *bp) - return !!(bp->caps & MACB_CAPS_MACB_IS_GEM); - } - --static inline bool macb_is_gem_hw(void __iomem *addr) --{ -- return !!(MACB_BFEXT(IDNUM, readl_relaxed(addr + MACB_MID)) >= 0x2); --} -- - #endif /* _MACB_H */ --- -1.7.10.4 - diff --git a/target/avr32/atmel-ngw100/patches/4.1.35/0001-net-macb-improve-big-endian-CPU-support.patch b/target/avr32/atmel-ngw100/patches/4.1.35/0001-net-macb-improve-big-endian-CPU-support.patch new file mode 100644 index 000000000..96a0a96b6 --- /dev/null +++ b/target/avr32/atmel-ngw100/patches/4.1.35/0001-net-macb-improve-big-endian-CPU-support.patch @@ -0,0 +1,282 @@ +From f2ce8a9e48385f444389e75cfe293637c3eb5410 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Fri, 24 Jul 2015 21:23:59 +0300 +Subject: [PATCH] net/macb: improve big endian CPU support + +The commit a50dad355a53 (net: macb: Add big endian CPU support) converted I/O +accessors to readl_relaxed() and writel_relaxed() and consequentially broke +MACB driver on AVR32 platforms such as ATNGW100. + +This patch improves I/O access by checking endiannes first and use the +corresponding methods. + +Fixes: a50dad355a53 (net: macb: Add big endian CPU support) +Signed-off-by: Andy Shevchenko +Signed-off-by: David S. Miller +Signed-off-by: Waldemar Brodkorb +--- + drivers/net/ethernet/cadence/macb.c | 103 ++++++++++++++++++++++++++--------- + drivers/net/ethernet/cadence/macb.h | 28 ++++------ + 2 files changed, 87 insertions(+), 44 deletions(-) + +diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c +index caeb395..9d06e3d 100644 +--- a/drivers/net/ethernet/cadence/macb.c ++++ b/drivers/net/ethernet/cadence/macb.c +@@ -104,6 +104,57 @@ static void *macb_rx_buffer(struct macb *bp, unsigned int index) + return bp->rx_buffers + bp->rx_buffer_size * macb_rx_ring_wrap(index); + } + ++/* I/O accessors */ ++static u32 hw_readl_native(struct macb *bp, int offset) ++{ ++ return __raw_readl(bp->regs + offset); ++} ++ ++static void hw_writel_native(struct macb *bp, int offset, u32 value) ++{ ++ __raw_writel(value, bp->regs + offset); ++} ++ ++static u32 hw_readl(struct macb *bp, int offset) ++{ ++ return readl_relaxed(bp->regs + offset); ++} ++ ++static void hw_writel(struct macb *bp, int offset, u32 value) ++{ ++ writel_relaxed(value, bp->regs + offset); ++} ++ ++/* ++ * Find the CPU endianness by using the loopback bit of NCR register. When the ++ * CPU is in big endian we need to program swaped mode for management ++ * descriptor access. ++ */ ++static bool hw_is_native_io(void __iomem *addr) ++{ ++ u32 value = MACB_BIT(LLB); ++ ++ __raw_writel(value, addr + MACB_NCR); ++ value = __raw_readl(addr + MACB_NCR); ++ ++ /* Write 0 back to disable everything */ ++ __raw_writel(0, addr + MACB_NCR); ++ ++ return value == MACB_BIT(LLB); ++} ++ ++static bool hw_is_gem(void __iomem *addr, bool native_io) ++{ ++ u32 id; ++ ++ if (native_io) ++ id = __raw_readl(addr + MACB_MID); ++ else ++ id = readl_relaxed(addr + MACB_MID); ++ ++ return MACB_BFEXT(IDNUM, id) >= 0x2; ++} ++ + static void macb_set_hwaddr(struct macb *bp) + { + u32 bottom; +@@ -449,14 +500,14 @@ err_out: + + static void macb_update_stats(struct macb *bp) + { +- u32 __iomem *reg = bp->regs + MACB_PFR; + u32 *p = &bp->hw_stats.macb.rx_pause_frames; + u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1; ++ int offset = MACB_PFR; + + WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); + +- for(; p < end; p++, reg++) +- *p += readl_relaxed(reg); ++ for(; p < end; p++, offset += 4) ++ *p += bp->readl(bp, offset); + } + + static int macb_halt_tx(struct macb *bp) +@@ -1603,7 +1654,6 @@ static u32 macb_dbw(struct macb *bp) + static void macb_configure_dma(struct macb *bp) + { + u32 dmacfg; +- u32 tmp, ncr; + + if (macb_is_gem(bp)) { + dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); +@@ -1613,22 +1663,11 @@ static void macb_configure_dma(struct macb *bp) + dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); + dmacfg &= ~GEM_BIT(ENDIA_PKT); + +- /* Find the CPU endianness by using the loopback bit of net_ctrl +- * register. save it first. When the CPU is in big endian we +- * need to program swaped mode for management descriptor access. +- */ +- ncr = macb_readl(bp, NCR); +- __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR); +- tmp = __raw_readl(bp->regs + MACB_NCR); +- +- if (tmp == MACB_BIT(LLB)) ++ if (bp->native_io) + dmacfg &= ~GEM_BIT(ENDIA_DESC); + else + dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */ + +- /* Restore net_ctrl */ +- macb_writel(bp, NCR, ncr); +- + if (bp->dev->features & NETIF_F_HW_CSUM) + dmacfg |= GEM_BIT(TXCOEN); + else +@@ -1902,14 +1941,14 @@ static void gem_update_stats(struct macb *bp) + + for (i = 0; i < GEM_STATS_LEN; ++i, ++p) { + u32 offset = gem_statistics[i].offset; +- u64 val = readl_relaxed(bp->regs + offset); ++ u64 val = bp->readl(bp, offset); + + bp->ethtool_stats[i] += val; + *p += val; + + if (offset == GEM_OCTTXL || offset == GEM_OCTRXL) { + /* Add GEM_OCTTXH, GEM_OCTRXH */ +- val = readl_relaxed(bp->regs + offset + 4); ++ val = bp->readl(bp, offset + 4); + bp->ethtool_stats[i] += ((u64)val) << 32; + *(++p) += val; + } +@@ -2190,7 +2229,7 @@ static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_co + if (dt_conf) + bp->caps = dt_conf->caps; + +- if (macb_is_gem_hw(bp->regs)) { ++ if (hw_is_gem(bp->regs, bp->native_io)) { + bp->caps |= MACB_CAPS_MACB_IS_GEM; + + dcfg = gem_readl(bp, DCFG1); +@@ -2205,6 +2244,7 @@ static void macb_configure_caps(struct macb *bp, const struct macb_config *dt_co + } + + static void macb_probe_queues(void __iomem *mem, ++ bool native_io, + unsigned int *queue_mask, + unsigned int *num_queues) + { +@@ -2219,7 +2259,7 @@ static void macb_probe_queues(void __iomem *mem, + * we are early in the probe process and don't have the + * MACB_CAPS_MACB_IS_GEM flag positioned + */ +- if (!macb_is_gem_hw(mem)) ++ if (!hw_is_gem(mem, native_io)) + return; + + /* bit 0 is never set but queue 0 always exists */ +@@ -2786,6 +2826,7 @@ static int macb_probe(struct platform_device *pdev) + struct clk *pclk, *hclk, *tx_clk; + unsigned int queue_mask, num_queues; + struct macb_platform_data *pdata; ++ bool native_io; + struct phy_device *phydev; + struct net_device *dev; + struct resource *regs; +@@ -2794,6 +2835,11 @@ static int macb_probe(struct platform_device *pdev) + struct macb *bp; + int err; + ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ mem = devm_ioremap_resource(&pdev->dev, regs); ++ if (IS_ERR(mem)) ++ return PTR_ERR(mem); ++ + if (np) { + const struct of_device_id *match; + +@@ -2809,14 +2855,9 @@ static int macb_probe(struct platform_device *pdev) + if (err) + return err; + +- regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- mem = devm_ioremap_resource(&pdev->dev, regs); +- if (IS_ERR(mem)) { +- err = PTR_ERR(mem); +- goto err_disable_clocks; +- } ++ native_io = hw_is_native_io(mem); + +- macb_probe_queues(mem, &queue_mask, &num_queues); ++ macb_probe_queues(mem, native_io, &queue_mask, &num_queues); + dev = alloc_etherdev_mq(sizeof(*bp), num_queues); + if (!dev) { + err = -ENOMEM; +@@ -2831,6 +2872,14 @@ static int macb_probe(struct platform_device *pdev) + bp->pdev = pdev; + bp->dev = dev; + bp->regs = mem; ++ bp->native_io = native_io; ++ if (native_io) { ++ bp->readl = hw_readl_native; ++ bp->writel = hw_writel_native; ++ } else { ++ bp->readl = hw_readl; ++ bp->writel = hw_writel; ++ } + bp->num_queues = num_queues; + bp->queue_mask = queue_mask; + if (macb_config) +diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h +index d746559..f245340 100644 +--- a/drivers/net/ethernet/cadence/macb.h ++++ b/drivers/net/ethernet/cadence/macb.h +@@ -429,18 +429,12 @@ + | GEM_BF(name, value)) + + /* Register access macros */ +-#define macb_readl(port,reg) \ +- readl_relaxed((port)->regs + MACB_##reg) +-#define macb_writel(port,reg,value) \ +- writel_relaxed((value), (port)->regs + MACB_##reg) +-#define gem_readl(port, reg) \ +- readl_relaxed((port)->regs + GEM_##reg) +-#define gem_writel(port, reg, value) \ +- writel_relaxed((value), (port)->regs + GEM_##reg) +-#define queue_readl(queue, reg) \ +- readl_relaxed((queue)->bp->regs + (queue)->reg) +-#define queue_writel(queue, reg, value) \ +- writel_relaxed((value), (queue)->bp->regs + (queue)->reg) ++#define macb_readl(port, reg) (port)->readl((port), MACB_##reg) ++#define macb_writel(port, reg, value) (port)->writel((port), MACB_##reg, (value)) ++#define gem_readl(port, reg) (port)->readl((port), GEM_##reg) ++#define gem_writel(port, reg, value) (port)->writel((port), GEM_##reg, (value)) ++#define queue_readl(queue, reg) (queue)->bp->readl((queue)->bp, (queue)->reg) ++#define queue_writel(queue, reg, value) (queue)->bp->writel((queue)->bp, (queue)->reg, (value)) + + /* Conditional GEM/MACB macros. These perform the operation to the correct + * register dependent on whether the device is a GEM or a MACB. For registers +@@ -785,6 +779,11 @@ struct macb_queue { + + struct macb { + void __iomem *regs; ++ bool native_io; ++ ++ /* hardware IO accessors */ ++ u32 (*readl)(struct macb *bp, int offset); ++ void (*writel)(struct macb *bp, int offset, u32 value); + + unsigned int rx_tail; + unsigned int rx_prepared_head; +@@ -843,9 +842,4 @@ static inline bool macb_is_gem(struct macb *bp) + return !!(bp->caps & MACB_CAPS_MACB_IS_GEM); + } + +-static inline bool macb_is_gem_hw(void __iomem *addr) +-{ +- return !!(MACB_BFEXT(IDNUM, readl_relaxed(addr + MACB_MID)) >= 0x2); +-} +- + #endif /* _MACB_H */ +-- +1.7.10.4 + diff --git a/target/config/Config.in.kernelversion b/target/config/Config.in.kernelversion index 1161f1193..bc2d769f3 100644 --- a/target/config/Config.in.kernelversion +++ b/target/config/Config.in.kernelversion @@ -49,7 +49,7 @@ config ADK_TARGET_KERNEL_VERSION_4_4 depends on !ADK_TARGET_SYSTEM_QEMU_M68K_MCF5208 config ADK_TARGET_KERNEL_VERSION_4_1 - bool "4.1.30" + bool "4.1.35" depends on !ADK_TARGET_ARCH_ARC depends on !ADK_TARGET_ARCH_BFIN depends on !ADK_TARGET_ARCH_H8300 diff --git a/target/cris/qemu-cris/patches/4.1.30/crisv32_ethernet_driver.patch b/target/cris/qemu-cris/patches/4.1.30/crisv32_ethernet_driver.patch deleted file mode 100644 index cd098665e..000000000 --- a/target/cris/qemu-cris/patches/4.1.30/crisv32_ethernet_driver.patch +++ /dev/null @@ -1,4094 +0,0 @@ -diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig -index e6c523c..5737a5b 100644 ---- a/arch/cris/arch-v32/drivers/Kconfig -+++ b/arch/cris/arch-v32/drivers/Kconfig -@@ -8,9 +8,18 @@ config ETRAX_ETHERNET - This option enables the ETRAX FS built-in 10/100Mbit Ethernet - controller. - -+config ETRAX_HAVE_PHY -+ bool "PHY present" -+ default y -+ help -+ Search and use the first PHY available on the MDIO bus. Fail -+ if none is found. Say Y here if you are not in a switched -+ environment (single port device). -+ - config ETRAX_NO_PHY - bool "PHY not present" - depends on ETRAX_ETHERNET -+ default n - help - This option disables all MDIO communication with an ethernet - transceiver connected to the MII interface. This option shall -@@ -18,6 +27,70 @@ config ETRAX_NO_PHY - switch. This option should normally be disabled. If enabled, - speed and duplex will be locked to 100 Mbit and full duplex. - -+config ETRAX_PHY_FALLBACK -+ bool "Fixed PHY fallback" -+ depends on ETRAX_ETHERNET -+ default n -+ help -+ If no PHY is found on the MDIO bus, fall back on a fixed -+ 100/Full fixed PHY. Say Y here if you need dynamic PHY -+ presence detection (switch connection where some but not -+ all ports have integrated PHYs), otherwise say N. -+ -+config ETRAX_ETHERNET_IFACE0 -+ depends on ETRAX_ETHERNET -+ bool "Enable network interface 0" -+ -+config ETRAX_ETHERNET_IFACE1 -+ depends on (ETRAX_ETHERNET && ETRAXFS) -+ bool "Enable network interface 1 (uses DMA6 and DMA7)" -+ -+choice -+ prompt "Eth0 led group" -+ depends on ETRAX_ETHERNET_IFACE0 -+ default ETRAX_ETH0_USE_LEDGRP0 -+ -+config ETRAX_ETH0_USE_LEDGRP0 -+ bool "Use LED grp 0" -+ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO -+ help -+ Use LED grp 0 for eth0 -+ -+config ETRAX_ETH0_USE_LEDGRP1 -+ bool "Use LED grp 1" -+ depends on ETRAX_NBR_LED_GRP_TWO -+ help -+ Use LED grp 1 for eth0 -+ -+config ETRAX_ETH0_USE_LEDGRPNULL -+ bool "Use no LEDs for eth0" -+ help -+ Use no LEDs for eth0 -+endchoice -+ -+choice -+ prompt "Eth1 led group" -+ depends on ETRAX_ETHERNET_IFACE1 -+ default ETRAX_ETH1_USE_LEDGRP1 -+ -+config ETRAX_ETH1_USE_LEDGRP0 -+ bool "Use LED grp 0" -+ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO -+ help -+ Use LED grp 0 for eth1 -+ -+config ETRAX_ETH1_USE_LEDGRP1 -+ bool "Use LED grp 1" -+ depends on ETRAX_NBR_LED_GRP_TWO -+ help -+ Use LED grp 1 for eth1 -+ -+config ETRAX_ETH1_USE_LEDGRPNULL -+ bool "Use no LEDs for eth1" -+ help -+ Use no LEDs for eth1 -+endchoice -+ - config ETRAXFS_SERIAL - bool "Serial-port support" - depends on ETRAX_ARCH_V32 -diff --git a/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h b/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h -index 90fe8a2..37bec9a 100644 ---- a/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h -+++ b/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h -@@ -2,69 +2,64 @@ - #define __eth_defs_h - - /* -- * This file is autogenerated from -- * file: eth.r -- * id: eth_regs.r,v 1.16 2005/05/20 15:41:22 perz Exp -- * last modfied: Mon Jan 9 06:06:41 2006 -- * -- * by /n/asic/design/tools/rdesc/rdes2c eth.r -- * id: $Id: eth_defs.h,v 1.7 2006/01/26 13:45:30 karljope Exp $ -- * Any changes here will be lost. -- * -- * -*- buffer-read-only: t -*- -+ * Note: Previously this was autogenerated code from the hardware -+ * implementation. However, to enable the same file to be used -+ * for both ARTPEC-3 and ETRAX FS this file is now hand-edited. -+ * Be careful. - */ -+ - /* Main access macros */ - #ifndef REG_RD - #define REG_RD( scope, inst, reg ) \ -- REG_READ( reg_##scope##_##reg, \ -- (inst) + REG_RD_ADDR_##scope##_##reg ) -+ REG_READ( reg_##scope##_##reg, \ -+ (inst) + REG_RD_ADDR_##scope##_##reg ) - #endif - - #ifndef REG_WR - #define REG_WR( scope, inst, reg, val ) \ -- REG_WRITE( reg_##scope##_##reg, \ -- (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) -+ REG_WRITE( reg_##scope##_##reg, \ -+ (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) - #endif - - #ifndef REG_RD_VECT - #define REG_RD_VECT( scope, inst, reg, index ) \ -- REG_READ( reg_##scope##_##reg, \ -- (inst) + REG_RD_ADDR_##scope##_##reg + \ -- (index) * STRIDE_##scope##_##reg ) -+ REG_READ( reg_##scope##_##reg, \ -+ (inst) + REG_RD_ADDR_##scope##_##reg + \ -+ (index) * STRIDE_##scope##_##reg ) - #endif - - #ifndef REG_WR_VECT - #define REG_WR_VECT( scope, inst, reg, index, val ) \ -- REG_WRITE( reg_##scope##_##reg, \ -- (inst) + REG_WR_ADDR_##scope##_##reg + \ -- (index) * STRIDE_##scope##_##reg, (val) ) -+ REG_WRITE( reg_##scope##_##reg, \ -+ (inst) + REG_WR_ADDR_##scope##_##reg + \ -+ (index) * STRIDE_##scope##_##reg, (val) ) - #endif - - #ifndef REG_RD_INT - #define REG_RD_INT( scope, inst, reg ) \ -- REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) -+ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) - #endif - - #ifndef REG_WR_INT - #define REG_WR_INT( scope, inst, reg, val ) \ -- REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) -+ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) - #endif - - #ifndef REG_RD_INT_VECT - #define REG_RD_INT_VECT( scope, inst, reg, index ) \ -- REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ -- (index) * STRIDE_##scope##_##reg ) -+ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ -+ (index) * STRIDE_##scope##_##reg ) - #endif - - #ifndef REG_WR_INT_VECT - #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ -- REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ -- (index) * STRIDE_##scope##_##reg, (val) ) -+ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ -+ (index) * STRIDE_##scope##_##reg, (val) ) - #endif - - #ifndef REG_TYPE_CONV - #define REG_TYPE_CONV( type, orgtype, val ) \ -- ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) -+ ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) - #endif - - #ifndef reg_page_size -@@ -73,306 +68,332 @@ - - #ifndef REG_ADDR - #define REG_ADDR( scope, inst, reg ) \ -- ( (inst) + REG_RD_ADDR_##scope##_##reg ) -+ ( (inst) + REG_RD_ADDR_##scope##_##reg ) - #endif - - #ifndef REG_ADDR_VECT - #define REG_ADDR_VECT( scope, inst, reg, index ) \ -- ( (inst) + REG_RD_ADDR_##scope##_##reg + \ -- (index) * STRIDE_##scope##_##reg ) -+ ( (inst) + REG_RD_ADDR_##scope##_##reg + \ -+ (index) * STRIDE_##scope##_##reg ) - #endif - - /* C-code for register scope eth */ - - /* Register rw_ma0_lo, scope eth, type rw */ - typedef struct { -- unsigned int addr : 32; -+ unsigned int addr : 32; - } reg_eth_rw_ma0_lo; - #define REG_RD_ADDR_eth_rw_ma0_lo 0 - #define REG_WR_ADDR_eth_rw_ma0_lo 0 - - /* Register rw_ma0_hi, scope eth, type rw */ - typedef struct { -- unsigned int addr : 16; -- unsigned int dummy1 : 16; -+ unsigned int addr : 16; -+ unsigned int dummy1 : 16; - } reg_eth_rw_ma0_hi; - #define REG_RD_ADDR_eth_rw_ma0_hi 4 - #define REG_WR_ADDR_eth_rw_ma0_hi 4 - - /* Register rw_ma1_lo, scope eth, type rw */ - typedef struct { -- unsigned int addr : 32; -+ unsigned int addr : 32; - } reg_eth_rw_ma1_lo; - #define REG_RD_ADDR_eth_rw_ma1_lo 8 - #define REG_WR_ADDR_eth_rw_ma1_lo 8 - - /* Register rw_ma1_hi, scope eth, type rw */ - typedef struct { -- unsigned int addr : 16; -- unsigned int dummy1 : 16; -+ unsigned int addr : 16; -+ unsigned int dummy1 : 16; - } reg_eth_rw_ma1_hi; - #define REG_RD_ADDR_eth_rw_ma1_hi 12 - #define REG_WR_ADDR_eth_rw_ma1_hi 12 - - /* Register rw_ga_lo, scope eth, type rw */ - typedef struct { -- unsigned int tbl : 32; -+ unsigned int table : 32; - } reg_eth_rw_ga_lo; - #define REG_RD_ADDR_eth_rw_ga_lo 16 - #define REG_WR_ADDR_eth_rw_ga_lo 16 - - /* Register rw_ga_hi, scope eth, type rw */ - typedef struct { -- unsigned int tbl : 32; -+ unsigned int table : 32; - } reg_eth_rw_ga_hi; - #define REG_RD_ADDR_eth_rw_ga_hi 20 - #define REG_WR_ADDR_eth_rw_ga_hi 20 - - /* Register rw_gen_ctrl, scope eth, type rw */ - typedef struct { -- unsigned int en : 1; -- unsigned int phy : 2; -- unsigned int protocol : 1; -- unsigned int loopback : 1; -- unsigned int flow_ctrl : 1; -- unsigned int gtxclk_out : 1; -- unsigned int phyrst_n : 1; -- unsigned int dummy1 : 24; -+ unsigned int en : 1; -+ unsigned int phy : 2; -+ unsigned int protocol : 1; -+ unsigned int loopback : 1; -+ unsigned int flow_ctrl : 1; -+ unsigned int gtxclk_out : 1; -+ unsigned int phyrst_n : 1; -+ unsigned int dummy1 : 24; - } reg_eth_rw_gen_ctrl; - #define REG_RD_ADDR_eth_rw_gen_ctrl 24 - #define REG_WR_ADDR_eth_rw_gen_ctrl 24 - - /* Register rw_rec_ctrl, scope eth, type rw */ - typedef struct { -- unsigned int ma0 : 1; -- unsigned int ma1 : 1; -- unsigned int individual : 1; -- unsigned int broadcast : 1; -- unsigned int undersize : 1; -- unsigned int oversize : 1; -- unsigned int bad_crc : 1; -- unsigned int duplex : 1; -- unsigned int max_size : 16; -- unsigned int dummy1 : 8; -+ unsigned int ma0 : 1; -+ unsigned int ma1 : 1; -+ unsigned int individual : 1; -+ unsigned int broadcast : 1; -+ unsigned int undersize : 1; -+ unsigned int oversize : 1; -+ unsigned int bad_crc : 1; -+ unsigned int duplex : 1; -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ unsigned int max_size : 16; -+ unsigned int dummy1 : 8; -+#else -+ unsigned int max_size : 1; -+ unsigned int dummy1 : 23; -+#endif - } reg_eth_rw_rec_ctrl; - #define REG_RD_ADDR_eth_rw_rec_ctrl 28 - #define REG_WR_ADDR_eth_rw_rec_ctrl 28 - - /* Register rw_tr_ctrl, scope eth, type rw */ - typedef struct { -- unsigned int crc : 1; -- unsigned int pad : 1; -- unsigned int retry : 1; -- unsigned int ignore_col : 1; -- unsigned int cancel : 1; -- unsigned int hsh_delay : 1; -- unsigned int ignore_crs : 1; -- unsigned int carrier_ext : 1; -- unsigned int dummy1 : 24; -+ unsigned int crc : 1; -+ unsigned int pad : 1; -+ unsigned int retry : 1; -+ unsigned int ignore_col : 1; -+ unsigned int cancel : 1; -+ unsigned int hsh_delay : 1; -+ unsigned int ignore_crs : 1; -+ unsigned int carrier_ext : 1; -+ unsigned int dummy1 : 24; - } reg_eth_rw_tr_ctrl; - #define REG_RD_ADDR_eth_rw_tr_ctrl 32 - #define REG_WR_ADDR_eth_rw_tr_ctrl 32 - - /* Register rw_clr_err, scope eth, type rw */ - typedef struct { -- unsigned int clr : 1; -- unsigned int dummy1 : 31; -+ unsigned int clr : 1; -+ unsigned int dummy1 : 31; - } reg_eth_rw_clr_err; - #define REG_RD_ADDR_eth_rw_clr_err 36 - #define REG_WR_ADDR_eth_rw_clr_err 36 - - /* Register rw_mgm_ctrl, scope eth, type rw */ - typedef struct { -- unsigned int mdio : 1; -- unsigned int mdoe : 1; -- unsigned int mdc : 1; -- unsigned int dummy1 : 29; -+ unsigned int mdio : 1; -+ unsigned int mdoe : 1; -+ unsigned int mdc : 1; -+ unsigned int phyclk : 1; -+ unsigned int txdata : 4; -+ unsigned int txen : 1; -+ unsigned int dummy1 : 23; - } reg_eth_rw_mgm_ctrl; - #define REG_RD_ADDR_eth_rw_mgm_ctrl 40 - #define REG_WR_ADDR_eth_rw_mgm_ctrl 40 - - /* Register r_stat, scope eth, type r */ - typedef struct { -- unsigned int mdio : 1; -- unsigned int exc_col : 1; -- unsigned int urun : 1; -- unsigned int clk_125 : 1; -- unsigned int dummy1 : 28; -+ unsigned int mdio : 1; -+ unsigned int exc_col : 1; -+ unsigned int urun : 1; -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ unsigned int clk_125 : 1; -+#else -+ unsigned int phyclk : 1; -+#endif -+ unsigned int txdata : 4; -+ unsigned int txen : 1; -+ unsigned int col : 1; -+ unsigned int crs : 1; -+ unsigned int txclk : 1; -+ unsigned int rxdata : 4; -+ unsigned int rxer : 1; -+ unsigned int rxdv : 1; -+ unsigned int rxclk : 1; -+ unsigned int dummy1 : 13; - } reg_eth_r_stat; - #define REG_RD_ADDR_eth_r_stat 44 - - /* Register rs_rec_cnt, scope eth, type rs */ - typedef struct { -- unsigned int crc_err : 8; -- unsigned int align_err : 8; -- unsigned int oversize : 8; -- unsigned int congestion : 8; -+ unsigned int crc_err : 8; -+ unsigned int align_err : 8; -+ unsigned int oversize : 8; -+ unsigned int congestion : 8; - } reg_eth_rs_rec_cnt; - #define REG_RD_ADDR_eth_rs_rec_cnt 48 - - /* Register r_rec_cnt, scope eth, type r */ - typedef struct { -- unsigned int crc_err : 8; -- unsigned int align_err : 8; -- unsigned int oversize : 8; -- unsigned int congestion : 8; -+ unsigned int crc_err : 8; -+ unsigned int align_err : 8; -+ unsigned int oversize : 8; -+ unsigned int congestion : 8; - } reg_eth_r_rec_cnt; - #define REG_RD_ADDR_eth_r_rec_cnt 52 - - /* Register rs_tr_cnt, scope eth, type rs */ - typedef struct { -- unsigned int single_col : 8; -- unsigned int mult_col : 8; -- unsigned int late_col : 8; -- unsigned int deferred : 8; -+ unsigned int single_col : 8; -+ unsigned int mult_col : 8; -+ unsigned int late_col : 8; -+ unsigned int deferred : 8; - } reg_eth_rs_tr_cnt; - #define REG_RD_ADDR_eth_rs_tr_cnt 56 - - /* Register r_tr_cnt, scope eth, type r */ - typedef struct { -- unsigned int single_col : 8; -- unsigned int mult_col : 8; -- unsigned int late_col : 8; -- unsigned int deferred : 8; -+ unsigned int single_col : 8; -+ unsigned int mult_col : 8; -+ unsigned int late_col : 8; -+ unsigned int deferred : 8; - } reg_eth_r_tr_cnt; - #define REG_RD_ADDR_eth_r_tr_cnt 60 - - /* Register rs_phy_cnt, scope eth, type rs */ - typedef struct { -- unsigned int carrier_loss : 8; -- unsigned int sqe_err : 8; -- unsigned int dummy1 : 16; -+ unsigned int carrier_loss : 8; -+ unsigned int sqe_err : 8; -+ unsigned int dummy1 : 16; - } reg_eth_rs_phy_cnt; - #define REG_RD_ADDR_eth_rs_phy_cnt 64 - - /* Register r_phy_cnt, scope eth, type r */ - typedef struct { -- unsigned int carrier_loss : 8; -- unsigned int sqe_err : 8; -- unsigned int dummy1 : 16; -+ unsigned int carrier_loss : 8; -+ unsigned int sqe_err : 8; -+ unsigned int dummy1 : 16; - } reg_eth_r_phy_cnt; - #define REG_RD_ADDR_eth_r_phy_cnt 68 - - /* Register rw_test_ctrl, scope eth, type rw */ - typedef struct { -- unsigned int snmp_inc : 1; -- unsigned int snmp : 1; -- unsigned int backoff : 1; -- unsigned int dummy1 : 29; -+ unsigned int snmp_inc : 1; -+ unsigned int snmp : 1; -+ unsigned int backoff : 1; -+ unsigned int dummy1 : 29; - } reg_eth_rw_test_ctrl; - #define REG_RD_ADDR_eth_rw_test_ctrl 72 - #define REG_WR_ADDR_eth_rw_test_ctrl 72 - - /* Register rw_intr_mask, scope eth, type rw */ - typedef struct { -- unsigned int crc : 1; -- unsigned int align : 1; -- unsigned int oversize : 1; -- unsigned int congestion : 1; -- unsigned int single_col : 1; -- unsigned int mult_col : 1; -- unsigned int late_col : 1; -- unsigned int deferred : 1; -- unsigned int carrier_loss : 1; -- unsigned int sqe_test_err : 1; -- unsigned int orun : 1; -- unsigned int urun : 1; -- unsigned int exc_col : 1; -- unsigned int mdio : 1; -- unsigned int dummy1 : 18; -+ unsigned int crc : 1; -+ unsigned int align : 1; -+ unsigned int oversize : 1; -+ unsigned int congestion : 1; -+ unsigned int single_col : 1; -+ unsigned int mult_col : 1; -+ unsigned int late_col : 1; -+ unsigned int deferred : 1; -+ unsigned int carrier_loss : 1; -+ unsigned int sqe_test_err : 1; -+ unsigned int orun : 1; -+ unsigned int urun : 1; -+ unsigned int exc_col : 1; -+ unsigned int mdio : 1; -+ unsigned int dummy1 : 18; - } reg_eth_rw_intr_mask; - #define REG_RD_ADDR_eth_rw_intr_mask 76 - #define REG_WR_ADDR_eth_rw_intr_mask 76 - - /* Register rw_ack_intr, scope eth, type rw */ - typedef struct { -- unsigned int crc : 1; -- unsigned int align : 1; -- unsigned int oversize : 1; -- unsigned int congestion : 1; -- unsigned int single_col : 1; -- unsigned int mult_col : 1; -- unsigned int late_col : 1; -- unsigned int deferred : 1; -- unsigned int carrier_loss : 1; -- unsigned int sqe_test_err : 1; -- unsigned int orun : 1; -- unsigned int urun : 1; -- unsigned int exc_col : 1; -- unsigned int mdio : 1; -- unsigned int dummy1 : 18; -+ unsigned int crc : 1; -+ unsigned int align : 1; -+ unsigned int oversize : 1; -+ unsigned int congestion : 1; -+ unsigned int single_col : 1; -+ unsigned int mult_col : 1; -+ unsigned int late_col : 1; -+ unsigned int deferred : 1; -+ unsigned int carrier_loss : 1; -+ unsigned int sqe_test_err : 1; -+ unsigned int orun : 1; -+ unsigned int urun : 1; -+ unsigned int exc_col : 1; -+ unsigned int mdio : 1; -+ unsigned int dummy1 : 18; - } reg_eth_rw_ack_intr; - #define REG_RD_ADDR_eth_rw_ack_intr 80 - #define REG_WR_ADDR_eth_rw_ack_intr 80 - - /* Register r_intr, scope eth, type r */ - typedef struct { -- unsigned int crc : 1; -- unsigned int align : 1; -- unsigned int oversize : 1; -- unsigned int congestion : 1; -- unsigned int single_col : 1; -- unsigned int mult_col : 1; -- unsigned int late_col : 1; -- unsigned int deferred : 1; -- unsigned int carrier_loss : 1; -- unsigned int sqe_test_err : 1; -- unsigned int orun : 1; -- unsigned int urun : 1; -- unsigned int exc_col : 1; -- unsigned int mdio : 1; -- unsigned int dummy1 : 18; -+ unsigned int crc : 1; -+ unsigned int align : 1; -+ unsigned int oversize : 1; -+ unsigned int congestion : 1; -+ unsigned int single_col : 1; -+ unsigned int mult_col : 1; -+ unsigned int late_col : 1; -+ unsigned int deferred : 1; -+ unsigned int carrier_loss : 1; -+ unsigned int sqe_test_err : 1; -+ unsigned int orun : 1; -+ unsigned int urun : 1; -+ unsigned int exc_col : 1; -+ unsigned int mdio : 1; -+ unsigned int dummy1 : 18; - } reg_eth_r_intr; - #define REG_RD_ADDR_eth_r_intr 84 - - /* Register r_masked_intr, scope eth, type r */ - typedef struct { -- unsigned int crc : 1; -- unsigned int align : 1; -- unsigned int oversize : 1; -- unsigned int congestion : 1; -- unsigned int single_col : 1; -- unsigned int mult_col : 1; -- unsigned int late_col : 1; -- unsigned int deferred : 1; -- unsigned int carrier_loss : 1; -- unsigned int sqe_test_err : 1; -- unsigned int orun : 1; -- unsigned int urun : 1; -- unsigned int exc_col : 1; -- unsigned int mdio : 1; -- unsigned int dummy1 : 18; -+ unsigned int crc : 1; -+ unsigned int align : 1; -+ unsigned int oversize : 1; -+ unsigned int congestion : 1; -+ unsigned int single_col : 1; -+ unsigned int mult_col : 1; -+ unsigned int late_col : 1; -+ unsigned int deferred : 1; -+ unsigned int carrier_loss : 1; -+ unsigned int sqe_test_err : 1; -+ unsigned int orun : 1; -+ unsigned int urun : 1; -+ unsigned int exc_col : 1; -+ unsigned int mdio : 1; -+ unsigned int dummy1 : 18; - } reg_eth_r_masked_intr; - #define REG_RD_ADDR_eth_r_masked_intr 88 - -- - /* Constants */ - enum { -- regk_eth_discard = 0x00000000, -- regk_eth_ether = 0x00000000, -- regk_eth_full = 0x00000001, -- regk_eth_gmii = 0x00000003, -- regk_eth_gtxclk = 0x00000001, -- regk_eth_half = 0x00000000, -- regk_eth_hsh = 0x00000001, -- regk_eth_mii = 0x00000001, -- regk_eth_mii_arec = 0x00000002, -- regk_eth_mii_clk = 0x00000000, -- regk_eth_no = 0x00000000, -- regk_eth_phyrst = 0x00000000, -- regk_eth_rec = 0x00000001, -- regk_eth_rw_ga_hi_default = 0x00000000, -- regk_eth_rw_ga_lo_default = 0x00000000, -- regk_eth_rw_gen_ctrl_default = 0x00000000, -- regk_eth_rw_intr_mask_default = 0x00000000, -- regk_eth_rw_ma0_hi_default = 0x00000000, -- regk_eth_rw_ma0_lo_default = 0x00000000, -- regk_eth_rw_ma1_hi_default = 0x00000000, -- regk_eth_rw_ma1_lo_default = 0x00000000, -- regk_eth_rw_mgm_ctrl_default = 0x00000000, -- regk_eth_rw_test_ctrl_default = 0x00000000, -- regk_eth_size1518 = 0x000005ee, -- regk_eth_size1522 = 0x000005f2, -- regk_eth_yes = 0x00000001 -+ regk_eth_discard = 0x00000000, -+ regk_eth_ether = 0x00000000, -+ regk_eth_full = 0x00000001, -+ regk_eth_gmii = 0x00000003, -+ regk_eth_gtxclk = 0x00000001, -+ regk_eth_half = 0x00000000, -+ regk_eth_hsh = 0x00000001, -+ regk_eth_mii = 0x00000001, -+ regk_eth_mii_arec = 0x00000002, -+ regk_eth_mii_clk = 0x00000000, -+ regk_eth_no = 0x00000000, -+ regk_eth_phyrst = 0x00000000, -+ regk_eth_rec = 0x00000001, -+ regk_eth_rw_ga_hi_default = 0x00000000, -+ regk_eth_rw_ga_lo_default = 0x00000000, -+ regk_eth_rw_gen_ctrl_default = 0x00000000, -+ regk_eth_rw_intr_mask_default = 0x00000000, -+ regk_eth_rw_ma0_hi_default = 0x00000000, -+ regk_eth_rw_ma0_lo_default = 0x00000000, -+ regk_eth_rw_ma1_hi_default = 0x00000000, -+ regk_eth_rw_ma1_lo_default = 0x00000000, -+ regk_eth_rw_mgm_ctrl_default = 0x00000000, -+ regk_eth_rw_test_ctrl_default = 0x00000000, -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ regk_eth_size1518 = 0x000005ee, -+ regk_eth_size1522 = 0x000005f2, -+#else -+ regk_eth_size1518 = 0x00000000, -+ regk_eth_size1522 = 0x00000001, -+#endif -+ regk_eth_yes = 0x00000001 - }; -+ - #endif /* __eth_defs_h */ -diff --git a/drivers/net/cris/Makefile b/drivers/net/cris/Makefile -index b4e8932..39b4d4d 100644 ---- a/drivers/net/cris/Makefile -+++ b/drivers/net/cris/Makefile -@@ -1 +1,2 @@ - obj-$(CONFIG_ETRAX_ARCH_V10) += eth_v10.o -+obj-$(CONFIG_ETRAX_ARCH_V32) += eth_v32.o -diff --git a/drivers/net/cris/eth_v32.c b/drivers/net/cris/eth_v32.c -new file mode 100644 -index 0000000..92c4cae ---- /dev/null -+++ b/drivers/net/cris/eth_v32.c -@@ -0,0 +1,3093 @@ -+/* -+ * Driver for the ETRAX FS/Artpec-3 network controller. -+ * -+ * Copyright (c) 2003-2008 Axis Communications AB. -+ * -+ * TODO: -+ * * Decrease the amount of code running with interrupts disabled. -+ * * Rework the error handling so that we do not need to touch the tx -+ * ring from the error interrupts. When done, we should be able to -+ * do tx completition from the NAPI loop without disabling interrupts. -+ * * Remove the gigabit code. It's probably never going to be used. -+ */ -+ -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include /* CRIS_LED_* I/O functions */ -+#include -+#include -+#include -+#include -+#include -+#ifdef CONFIG_ETRAXFS -+#include -+#else -+#include -+#endif -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "eth_v32.h" -+ -+#ifndef CONFIG_ETRAXFS -+#define ETH0_INTR_VECT ETH_INTR_VECT -+#define ETH1_INTR_VECT ETH_INTR_VECT -+#define regi_eth0 regi_eth -+#define regi_eth1 regi_ -+#endif -+ -+#define DEBUG(x) -+#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01) -+ -+#if defined(CONFIG_ETRAX_HAVE_PHY) || defined(CONFIG_ETRAX_PHY_FALLBACK) -+#define RESET_PHY 1 -+#else -+#define RESET_PHY 0 -+#endif -+ -+enum { -+ HAVE_PHY, -+ NO_PHY, -+ FALLBACK_PHY, -+}; -+#if defined(CONFIG_ETRAX_PHY_FALLBACK) -+#define PHY_MODE (FALLBACK_PHY) -+#elif defined(CONFIG_ETRAX_NO_PHY) -+#define PHY_MODE (NO_PHY) -+#elif defined(CONFIG_ETRAX_HAVE_PHY) -+#define PHY_MODE (HAVE_PHY) -+#else -+#error Unknown PHY behaviour -+#endif -+ -+static struct { -+ const char str[ETH_GSTRING_LEN]; -+} const ethtool_stats_keys[] = { -+ { "tx_dma_restarts" }, -+ { "tx_mac_resets" }, -+ { "rx_dma_restarts" }, -+ { "rx_dma_timeouts" }, -+ { " dropped_rx" } -+}; -+ -+static void crisv32_eth_check_speed(unsigned long idev); -+static void crisv32_eth_check_duplex(unsigned long idev); -+static void update_rx_stats(struct crisv32_ethernet_local *np); -+static void update_tx_stats(struct crisv32_ethernet_local *np); -+static int crisv32_eth_poll(struct napi_struct *napi, int budget); -+static void crisv32_eth_setup_controller(struct net_device *dev); -+static int crisv32_eth_request_irqdma(struct net_device *dev); -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+static void -+crisv32_eth_restart_rx_dma(struct net_device* dev, -+ struct crisv32_ethernet_local *np); -+#endif -+#if 0 -+static void crisv32_ethernet_bug(struct net_device *dev); -+#endif -+ -+/* -+ * The name of the card. Is used for messages and in the requests for -+ * io regions, irqs and dma channels. -+ */ -+#ifdef CONFIG_ETRAXFS -+static const char cardname[] = "ETRAX FS built-in ethernet controller"; -+#else -+static const char cardname[] = "ARTPEC-3 built-in ethernet controller"; -+#endif -+ -+/* Some chipset needs special care. */ -+#ifndef CONFIG_ETRAX_NO_PHY -+struct transceiver_ops transceivers[] = { -+ {0x1018, broadcom_check_speed, broadcom_check_duplex}, -+ {0x50EF, broadcom_check_speed, broadcom_check_duplex}, -+ /* TDK 2120 and TDK 2120C */ -+ {0xC039, tdk_check_speed, tdk_check_duplex}, -+ {0x039C, tdk_check_speed, tdk_check_duplex}, -+ /* Intel LXT972A*/ -+ {0x04de, intel_check_speed, intel_check_duplex}, -+ /* National Semiconductor DP83865 */ -+ {0x0017, national_check_speed, national_check_duplex}, -+ /* Vitesse VCS8641 */ -+ {0x01c1, vitesse_check_speed, vitesse_check_duplex}, -+ /* Davicom DM9161 */ -+ {0x606E, davicom_check_speed, davicom_check_duplex}, -+ /* Generic, must be last. */ -+ {0x0000, generic_check_speed, generic_check_duplex} -+}; -+#endif -+ -+static struct net_device *crisv32_dev[2]; -+static struct crisv32_eth_leds *crisv32_leds[3]; -+ -+/* Default MAC address for interface 0. -+ * The real one will be set later. */ -+static struct sockaddr default_mac_iface0 = -+ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00}}; -+ -+#ifdef CONFIG_CPU_FREQ -+static int -+crisv32_ethernet_freq_notifier(struct notifier_block *nb, unsigned long val, -+ void *data); -+ -+static struct notifier_block crisv32_ethernet_freq_notifier_block = { -+ .notifier_call = crisv32_ethernet_freq_notifier -+}; -+#endif -+ -+static void receive_timeout(unsigned long arg); -+static void receive_timeout_work(struct work_struct* work); -+static void transmit_timeout(unsigned long arg); -+ -+/* -+ * mask in and out tx/rx interrupts. -+ */ -+static inline void crisv32_disable_tx_ints(struct crisv32_ethernet_local *np) -+{ -+ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_no }; -+ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx); -+} -+ -+static inline void crisv32_enable_tx_ints(struct crisv32_ethernet_local *np) -+{ -+ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_yes }; -+ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx); -+} -+ -+static inline void crisv32_disable_rx_ints(struct crisv32_ethernet_local *np) -+{ -+ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_no }; -+ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx); -+} -+ -+static inline void crisv32_enable_rx_ints(struct crisv32_ethernet_local *np) -+{ -+ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_yes }; -+ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx); -+} -+ -+static inline void crisv32_disable_eth_ints(struct crisv32_ethernet_local *np) -+{ -+ int intr_mask_nw = 0x0; -+ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw); -+} -+ -+static inline void crisv32_enable_eth_ints(struct crisv32_ethernet_local *np) -+{ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ /* For Artpec-3 we use overrun to workaround voodoo TR 87 */ -+ int intr_mask_nw = 0x1c00; -+#else -+ int intr_mask_nw = 0x1800; -+#endif -+ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw); -+} -+ -+static inline int crisv32_eth_gigabit(struct crisv32_ethernet_local *np) -+{ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ return np->gigabit_mode; -+#else -+ return 0; -+#endif -+} -+ -+static inline void crisv32_eth_set_gigabit(struct crisv32_ethernet_local *np, -+ int g) -+{ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ np->gigabit_mode = g; -+#endif -+} -+ -+/* start/stop receiver */ -+static inline void crisv32_start_receiver(struct crisv32_ethernet_local *np) -+{ -+ reg_eth_rw_rec_ctrl rec_ctrl; -+ -+ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ rec_ctrl.ma0 = regk_eth_yes; -+ rec_ctrl.broadcast = regk_eth_rec; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+} -+ -+static inline void crisv32_stop_receiver(struct crisv32_ethernet_local *np) -+{ -+ reg_eth_rw_rec_ctrl rec_ctrl; -+ -+ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ rec_ctrl.ma0 = regk_eth_no; -+ rec_ctrl.broadcast = regk_eth_discard; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+} -+ -+static inline void crisv32_eth_reset(struct crisv32_ethernet_local *np) -+{ -+ reg_eth_rw_gen_ctrl gen_ctrl = { 0 }; -+ -+ gen_ctrl = REG_RD(eth, np->eth_inst, rw_gen_ctrl); -+ gen_ctrl.en = regk_eth_no; -+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); -+ gen_ctrl.en = regk_eth_yes; -+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); -+} -+ -+static void crisv32_eth_tx_cancel_frame(struct crisv32_ethernet_local *np) -+{ -+ reg_eth_rw_tr_ctrl tr_ctrl; -+ -+ /* Cancel any pending transmits. This should bring us to the -+ excessive collisions state but it doesn't always do it. */ -+ tr_ctrl = REG_RD(eth, np->eth_inst, rw_tr_ctrl); -+ tr_ctrl.cancel = 1; -+ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl); -+ tr_ctrl.cancel = 0; -+ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl); -+} -+ -+/* -+ * Hack to disconnect/reconnect the dma from the ethernet block while we reset -+ * things. TODO: verify that we don't need to disconnect out channels and -+ * remove that code. -+ * -+ * ARTPEC-3 has only a single ethernet block so np->eth_inst is always eth0. -+ * The strmux values are named slightly different, redefine to avoid #ifdefs -+ * in the code blocks. For artpec3 only regk_strmux_eth0 and channel 0/1 -+ * should be used. -+ */ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+#define regk_strmux_eth0 regk_strmux_eth -+#define regk_strmux_eth1 regk_strmux_eth -+#endif -+static inline void -+crisv32_disconnect_eth_tx_dma(struct crisv32_ethernet_local *np) -+{ -+ reg_strmux_rw_cfg strmux_cfg; -+ -+ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); -+ if (np->eth_inst == regi_eth0) -+ strmux_cfg.dma0 = regk_strmux_off; -+ else -+ strmux_cfg.dma6 = regk_strmux_off; -+ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); -+} -+ -+static inline void crisv32_connect_eth_tx_dma(struct crisv32_ethernet_local *np) -+{ -+ reg_strmux_rw_cfg strmux_cfg; -+ -+ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); -+ if (np->eth_inst == regi_eth0) -+ strmux_cfg.dma0 = regk_strmux_eth0; -+ else -+ strmux_cfg.dma6 = regk_strmux_eth1; -+ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); -+} -+ -+static inline void -+crisv32_disconnect_eth_rx_dma(struct crisv32_ethernet_local *np) -+{ -+ reg_strmux_rw_cfg strmux_cfg; -+ -+ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); -+ if (np->eth_inst == regi_eth0) -+ strmux_cfg.dma1 = regk_strmux_off; -+ else -+ strmux_cfg.dma7 = regk_strmux_off; -+ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); -+} -+ -+static inline void crisv32_connect_eth_rx_dma(struct crisv32_ethernet_local *np) -+{ -+ reg_strmux_rw_cfg strmux_cfg; -+ -+ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); -+ if (np->eth_inst == regi_eth0) -+ strmux_cfg.dma1 = regk_strmux_eth0; -+ else -+ strmux_cfg.dma7 = regk_strmux_eth1; -+ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); -+} -+ -+static int dma_wait_busy(int inst, int timeout) -+{ -+ reg_dma_rw_stream_cmd dma_sc; -+ -+ do { -+ dma_sc = REG_RD(dma, inst, rw_stream_cmd); -+ } while (timeout-- > 0 && dma_sc.busy); -+ return dma_sc.busy; -+} -+ -+static int __init crisv32_eth_request_irqdma(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ /* Allocate IRQs and DMAs. */ -+ if (np->eth_inst == regi_eth0) { -+ if (request_irq(DMA0_INTR_VECT, crisv32tx_eth_interrupt, -+ 0, "Ethernet TX", dev)) { -+ return -EAGAIN; -+ } -+ -+ if (request_irq(DMA1_INTR_VECT, crisv32rx_eth_interrupt, -+ 0, "Ethernet RX", dev)) -+ goto err0_1; -+ -+ if (crisv32_request_dma(0, cardname, DMA_VERBOSE_ON_ERROR, -+ 12500000, dma_eth0)) -+ goto err0_2; -+ -+ if (crisv32_request_dma(1, cardname, DMA_VERBOSE_ON_ERROR, -+ 12500000, dma_eth0)) -+ goto err0_3; -+ -+ if (request_irq(ETH0_INTR_VECT, crisv32nw_eth_interrupt, 0, -+ cardname, dev)) { -+ crisv32_free_dma(1); -+err0_3: -+ crisv32_free_dma(0); -+err0_2: -+ free_irq(DMA1_INTR_VECT, dev); -+err0_1: -+ free_irq(DMA0_INTR_VECT, dev); -+ return -EAGAIN; -+ } -+ } else { -+ if (request_irq(DMA6_INTR_VECT, crisv32tx_eth_interrupt, -+ 0, cardname, dev)) -+ return -EAGAIN; -+ -+ if (request_irq(DMA7_INTR_VECT, crisv32rx_eth_interrupt, -+ 0, cardname, dev)) -+ goto err1_1; -+ -+ if (crisv32_request_dma(6, cardname, DMA_VERBOSE_ON_ERROR, -+ 0, dma_eth1)) -+ goto err1_2; -+ -+ if (crisv32_request_dma(7, cardname, DMA_VERBOSE_ON_ERROR, -+ 0, dma_eth1)) -+ goto err1_3; -+ -+ if (request_irq(ETH1_INTR_VECT, crisv32nw_eth_interrupt, 0, -+ cardname, dev)) { -+ crisv32_free_dma(7); -+err1_3: -+ crisv32_free_dma(6); -+err1_2: -+ free_irq(DMA7_INTR_VECT, dev); -+err1_1: -+ free_irq(DMA6_INTR_VECT, dev); -+ return -EAGAIN; -+ } -+ } -+ return 0; -+} -+ -+static int __init crisv32_eth_init_phy(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0); -+ -+ if (RESET_PHY) { -+#ifdef CONFIG_ETRAXFS -+ reg_config_rw_pad_ctrl pad_ctrl; -+ pad_ctrl = REG_RD(config, regi_config, rw_pad_ctrl); -+ pad_ctrl.phyrst_n = 0; -+ REG_WR(config, regi_config, rw_pad_ctrl, pad_ctrl); -+ -+ udelay(500); /* RESET_LEN */ -+ -+ pad_ctrl.phyrst_n = 1; -+ REG_WR(config, regi_config, rw_pad_ctrl, pad_ctrl); -+#else -+ reg_eth_rw_gen_ctrl gen_ctrl = REG_RD(eth, np->eth_inst, rw_gen_ctrl); -+ gen_ctrl.phyrst_n = 0; -+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); -+ -+ udelay(500); /* RESET_LEN */ -+ -+ gen_ctrl.phyrst_n = 1; -+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); -+#endif -+ -+ udelay(200); /* RESET_WAIT */ -+ } -+ -+ switch (PHY_MODE) { -+ case FALLBACK_PHY: -+ /* Fall back on using fixed iff there is no PHY on */ -+ /* the MDIO bus */ -+ np->fixed_phy = crisv32_eth_probe_transceiver(dev) != 0; -+ if (np->fixed_phy) -+ printk(KERN_WARNING -+ "eth: No transciever found, falling back " -+ "to fixed phy mode\n"); -+ break; -+ -+ case NO_PHY: -+ /* Don't even bother looking for a PHY, always rely */ -+ /* on fixed PHY */ -+ np->fixed_phy = 1; -+ break; -+ -+ default: /* HAVE_PHY */ -+ /* Look for a PHY and abort if there is none, */ -+ /* otherwise just carry on */ -+ if (crisv32_eth_probe_transceiver(dev)) { -+ printk(KERN_WARNING -+ "eth: No transceiver found, " -+ "removing interface\n"); -+ return -ENODEV; -+ } -+ np->fixed_phy = 0; -+ } -+ -+ if (np->fixed_phy) { -+ reg_eth_rw_rec_ctrl rec_ctrl; -+ -+ /* speed */ -+ np->current_speed = 100; -+ np->current_speed_selection = 100; /* Auto. */ -+ -+ /* duplex */ -+ np->full_duplex = 1; -+ np->current_duplex = full; -+ -+ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ rec_ctrl.duplex = regk_eth_full; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ } else { -+ np->mii_if.supports_gmii = mii_check_gmii_support(&np->mii_if); -+ -+ /* speed */ -+ np->current_speed = 10; -+ np->current_speed_selection = 0; /* Auto. */ -+ np->speed_timer = timer_init; -+ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; -+ np->speed_timer.data = (unsigned long) dev; -+ np->speed_timer.function = crisv32_eth_check_speed; -+ -+ /* duplex */ -+ np->full_duplex = 0; -+ np->current_duplex = autoneg; -+ np->duplex_timer = timer_init; -+ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; -+ np->duplex_timer.data = (unsigned long) dev; -+ np->duplex_timer.function = crisv32_eth_check_duplex; -+ } -+ -+ return 0; -+} -+ -+static void __init crisv32_eth_setup_controller(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ reg_eth_rw_gen_ctrl gen_ctrl; -+ -+ reg_eth_rw_tr_ctrl tr_ctrl = { -+ /* SW retransmits to avoid transmitter bugs. */ -+ .retry = regk_eth_no, -+ .pad = regk_eth_yes, -+ .crc = regk_eth_yes -+ }; -+ -+ reg_eth_rw_rec_ctrl rec_ctrl = { -+ .ma0 = regk_eth_no, /* enable at open() */ -+ .broadcast = regk_eth_no, -+ .max_size = regk_eth_size1522 -+ }; -+ -+ reg_eth_rw_ga_lo ga_lo = { 0 }; -+ reg_eth_rw_ga_hi ga_hi = { 0 }; -+ -+ /* -+ * Initialize group address registers to make sure that no -+ * unwanted addresses are matched. -+ */ -+ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo); -+ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi); -+ -+ /* Configure receiver and transmitter */ -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl); -+ -+ /* -+ * Read from rw_gen_ctrl so that we don't override any previous -+ * configuration. -+ */ -+ gen_ctrl = REG_RD(eth, np->eth_inst, rw_gen_ctrl); -+ gen_ctrl.phy = regk_eth_mii_clk; -+#ifdef CONFIG_ETRAXFS -+ /* On ETRAX FS, this bit has reversed meaning */ -+ gen_ctrl.flow_ctrl = regk_eth_no; -+#else -+ gen_ctrl.flow_ctrl = regk_eth_yes; -+#endif -+ -+ /* Enable ethernet controller with mii clk. */ -+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); -+ gen_ctrl.en = regk_eth_yes; -+ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); -+} -+ -+static void crisv32_eth_reset_rx_ring(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ int i; -+ -+ /* cleanup the rx-ring */ -+ for (i = 0; i < NBR_RX_DESC; i++) { -+ struct sk_buff *skb; -+ skb = np->dma_rx_descr_list[i].skb; -+ if (!skb -+ || (np->dma_rx_descr_list[i].descr.buf != -+ (void *)virt_to_phys(skb->data))) { -+ if (skb) -+ dev_kfree_skb(skb); -+ skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE); -+ np->dma_rx_descr_list[i].skb = skb; -+ np->dma_rx_descr_list[i].descr.buf = -+ (char*)virt_to_phys(skb->data); -+ } -+ if (np->dma_rx_descr_list[i].descr.in_eop) -+ np->rx_restarts_dropped++; -+ np->dma_rx_descr_list[i].descr.after = -+ (char*)virt_to_phys(skb->data -+ + MAX_MEDIA_DATA_SIZE); -+ np->dma_rx_descr_list[i].descr.eol = 0; -+ np->dma_rx_descr_list[i].descr.in_eop = 0; -+ /* Workaround cache bug */ -+ flush_dma_descr(&np->dma_rx_descr_list[i].descr, 1); -+ } -+ -+ /* reset rx-ring */ -+ np->active_rx_desc = &np->dma_rx_descr_list[0]; -+ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_RX_DESC - 1]; -+ np->last_rx_desc = np->prev_rx_desc; -+ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.eol = 1; -+ flush_dma_descr(&np->dma_rx_descr_list[NBR_RX_DESC - 1].descr, 0); -+ /* ready to accept new packets. */ -+ np->new_rx_package = 1; -+ -+ /* Fill context descriptors. */ -+ np->ctxt_in.next = 0; -+ np->ctxt_in.saved_data = -+ (void *)virt_to_phys(&np->active_rx_desc->descr); -+ np->ctxt_in.saved_data_buf = np->active_rx_desc->descr.buf; -+} -+ -+static inline int crisv32_eth_tx_ring_full(struct crisv32_ethernet_local *np) -+{ -+ crisv32_eth_descr *active = np->active_tx_desc; -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ active = phys_to_virt((unsigned long)active->descr.next); -+#endif -+ if (active == np->catch_tx_desc) -+ return 1; -+ return 0; -+} -+ -+static void crisv32_eth_reset_tx_ring(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ /* free un-handled tx packets */ -+ while (np->txpackets || np->catch_tx_desc != np->active_tx_desc) { -+ np->txpackets--; -+ if (np->catch_tx_desc->skb) -+ dev_kfree_skb(np->catch_tx_desc->skb); -+ -+ np->catch_tx_desc->skb = 0; -+ np->catch_tx_desc = -+ phys_to_virt((int)np->catch_tx_desc->descr.next); -+ } -+ -+ WARN_ON(np->txpackets != 0); -+ np->txpackets = 0; -+ -+ /* reset tx-ring */ -+ np->dma_tx_descr_list[0].descr.buf = -+ np->dma_tx_descr_list[0].descr.after = 0; -+ np->dma_tx_descr_list[0].descr.eol = 1; -+ -+ np->active_tx_desc = &np->dma_tx_descr_list[0]; -+ np->prev_tx_desc = &np->dma_tx_descr_list[NBR_TX_DESC - 1]; -+ np->catch_tx_desc = &np->dma_tx_descr_list[0]; -+ -+ np->ctxt_out.next = 0; -+ np->ctxt_out.saved_data = -+ (void *)virt_to_phys(&np->dma_tx_descr_list[0].descr); -+ -+} -+ -+static void crisv32_eth_reset_rings(struct net_device *dev) -+{ -+ crisv32_eth_reset_tx_ring(dev); -+ crisv32_eth_reset_rx_ring(dev); -+} -+ -+/* -+ * Really advance the receive ring. RX interrupts must be off. -+ */ -+static void __crisv32_eth_rx_ring_advance(struct crisv32_ethernet_local *np) -+{ -+ if (np->newbuf) -+ np->active_rx_desc->descr.buf = (void *) np->newbuf; -+ np->active_rx_desc->descr.after = -+ np->active_rx_desc->descr.buf + MAX_MEDIA_DATA_SIZE; -+ np->active_rx_desc->descr.eol = 1; -+ np->active_rx_desc->descr.in_eop = 0; -+ np->active_rx_desc = phys_to_virt((int)np->active_rx_desc->descr.next); -+ barrier(); -+ np->prev_rx_desc->descr.eol = 0; -+ -+ /* Workaround cache bug. */ -+ flush_dma_descr(&np->prev_rx_desc->descr, 0); -+ np->prev_rx_desc = phys_to_virt((int)np->prev_rx_desc->descr.next); -+ flush_dma_descr(&np->prev_rx_desc->descr, 1); -+} -+ -+/* -+ * Advance the receive ring. RX interrupts must be off. -+ */ -+static inline void -+crisv32_eth_rx_ring_advance(struct crisv32_ethernet_local *np) -+{ -+ /* -+ * When the input DMA reaches eol precaution must be taken, otherwise -+ * the DMA could stop. The problem occurs if the eol flag is re-placed -+ * on the descriptor that the DMA stands on before the DMA proceed to -+ * the next descriptor. This case could, for example, happen if there -+ * is a traffic burst and then the network goes silent. To prevent this -+ * we make sure that we do not set the eol flag on the descriptor that -+ * the DMA stands on. -+ */ -+ unsigned long dma_pos; -+ -+ /* Get the current input dma position. */ -+ dma_pos = REG_RD_INT(dma, np->dma_in_inst, rw_saved_data); -+ -+ if (virt_to_phys(&np->active_rx_desc->descr) != dma_pos) { -+ crisv32_eth_descr *cur, *nxt; -+ -+ /* Now really advance the ring one step. */ -+ __crisv32_eth_rx_ring_advance(np); -+ -+ cur = np->active_rx_desc; -+ nxt = (void *)phys_to_virt((unsigned long)cur->descr.next); -+ flush_dma_descr(&cur->descr, 0); -+ flush_dma_descr(&nxt->descr, 0); -+ if (!cur->descr.in_eop && nxt->descr.in_eop) { -+ /* TODO: Investigate this more. The DMA seems to have -+ skipped a descriptor, possibly due to incoherence -+ between the CPU L1 cache and the DMA updates to the -+ descriptor. */ -+ np->newbuf = (unsigned long) np->active_rx_desc->descr.buf; -+ __crisv32_eth_rx_ring_advance(np); -+ } -+ /* flush after peek. */ -+ flush_dma_descr(&cur->descr, 0); -+ flush_dma_descr(&nxt->descr, 0); -+ } else { -+ /* delay the advancing of the ring. */ -+ np->new_rx_package = 0; -+ } -+} -+ -+static void __init crisv32_eth_init_rings(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ int i; -+ -+ /* Initialise receive descriptors for interface. */ -+ for (i = 0; i < NBR_RX_DESC; i++) { -+ struct sk_buff *skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE); -+ -+ np->dma_rx_descr_list[i].skb = skb; -+ np->dma_rx_descr_list[i].descr.buf = -+ (char*)virt_to_phys(skb->data); -+ np->dma_rx_descr_list[i].descr.after = -+ (char*)virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE); -+ -+ np->dma_rx_descr_list[i].descr.eol = 0; -+ np->dma_rx_descr_list[i].descr.in_eop = 0; -+ np->dma_rx_descr_list[i].descr.next = -+ (void *) virt_to_phys(&np->dma_rx_descr_list[i + 1].descr); -+ } -+ /* bend the list into a ring */ -+ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.next = -+ (void *) virt_to_phys(&np->dma_rx_descr_list[0].descr); -+ -+ /* Initialize transmit descriptors. */ -+ for (i = 0; i < NBR_TX_DESC; i++) { -+ np->dma_tx_descr_list[i].descr.wait = 1; -+ np->dma_tx_descr_list[i].descr.eol = 0; -+ np->dma_tx_descr_list[i].descr.out_eop = 0; -+ np->dma_tx_descr_list[i].descr.next = -+ (void*)virt_to_phys(&np->dma_tx_descr_list[i+1].descr); -+ } -+ /* bend the list into a ring */ -+ np->dma_tx_descr_list[NBR_TX_DESC - 1].descr.next = -+ (void *) virt_to_phys(&np->dma_tx_descr_list[0].descr); -+ -+ crisv32_eth_reset_rings(dev); -+} -+ -+static void __init crisv32_init_leds(int ledgrp, struct net_device *dev) -+{ -+ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0); -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ /* Use already allocated led grp if initialized */ -+ if (crisv32_leds[ledgrp] != NULL) { -+ np->leds = crisv32_leds[ledgrp]; -+ return; -+ } -+ -+ crisv32_leds[ledgrp] = -+ kmalloc(sizeof(struct crisv32_eth_leds), GFP_KERNEL); -+ -+ crisv32_leds[ledgrp]->ledgrp = ledgrp; -+ crisv32_leds[ledgrp]->led_active = 0; -+ crisv32_leds[ledgrp]->ifisup[0] = 0; -+ crisv32_leds[ledgrp]->ifisup[1] = 0; -+ /* NOTE: Should this value be set to zero as the jiffies timer -+ can wrap? */ -+ crisv32_leds[ledgrp]->led_next_time = jiffies; -+ -+ crisv32_leds[ledgrp]->clear_led_timer = timer_init; -+ crisv32_leds[ledgrp]->clear_led_timer.function = -+ crisv32_clear_network_leds; -+ crisv32_leds[ledgrp]->clear_led_timer.data = (unsigned long) dev; -+ -+ spin_lock_init(&crisv32_leds[ledgrp]->led_lock); -+ -+ np->leds = crisv32_leds[ledgrp]; -+} -+ -+static int __init crisv32_ethernet_init(void) -+{ -+ struct crisv32_ethernet_local *np; -+ int ret = 0; -+ -+#ifdef CONFIG_ETRAXFS -+ printk("ETRAX FS 10/100MBit ethernet v0.01 (c)" -+ " 2003 Axis Communications AB\n"); -+#else -+ printk("ARTPEC-3 10/100 MBit ethernet (c)" -+ " 2003-2009 Axis Communications AB\n"); -+#endif -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ { -+ reg_clkgen_rw_clk_ctrl clk_ctrl = REG_RD(clkgen, regi_clkgen, -+ rw_clk_ctrl); -+ clk_ctrl.eth = clk_ctrl.dma0_1_eth = regk_clkgen_yes; -+ REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); -+ } -+#endif -+{ -+ int iface0 = 0; -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ if (crisv32_pinmux_alloc_fixed(pinmux_eth)) -+ panic("Eth pinmux\n"); -+#endif -+ -+ if (!(crisv32_dev[iface0] = alloc_etherdev(sizeof *np))) -+ return -ENOMEM; -+ -+ ret |= crisv32_ethernet_device_init(crisv32_dev[iface0]); -+ -+#if defined(CONFIG_ETRAX_ETH0_USE_LEDGRP0) -+ crisv32_init_leds(CRIS_LED_GRP_0,crisv32_dev[iface0]); -+#elif defined(CONFIG_ETRAX_ETH0_USE_LEDGRP1) -+ crisv32_init_leds(CRIS_LED_GRP_1,crisv32_dev[iface0]); -+#else -+ crisv32_init_leds(CRIS_LED_GRP_NONE,crisv32_dev[iface0]); -+#endif -+ -+ np = (struct crisv32_ethernet_local *) netdev_priv(crisv32_dev[iface0]); -+ np->eth_inst = regi_eth0; -+ np->dma_out_inst = regi_dma0; -+ np->dma_in_inst = regi_dma1; -+ -+ np->mii_if.dev = crisv32_dev[iface0]; -+ np->mii_if.mdio_read = crisv32_eth_get_mdio_reg; -+ np->mii_if.mdio_write = crisv32_eth_set_mdio_reg; -+ np->mii_if.phy_id_mask = 0x1f; -+ np->mii_if.reg_num_mask = 0x1f; -+ -+ np->use_leds = 1; -+ np->autoneg_normal = 1; -+ -+ -+ register_netdev(crisv32_dev[iface0]); -+ -+ /* Set up default MAC address */ -+ memcpy(crisv32_dev[iface0]->dev_addr, default_mac_iface0.sa_data, 6); -+ crisv32_eth_set_mac_address(crisv32_dev[iface0], &default_mac_iface0); -+ if (crisv32_eth_request_irqdma(crisv32_dev[iface0])) -+ printk("%s: eth0 unable to allocate IRQ and DMA resources\n", -+ __func__); -+ np->txpackets = 0; -+ crisv32_eth_init_rings(crisv32_dev[iface0]); -+ crisv32_eth_setup_controller(crisv32_dev[iface0]); -+ ret |= crisv32_eth_init_phy(crisv32_dev[iface0]); -+ if (ret) { -+ unregister_netdev(crisv32_dev[iface0]); -+ return ret; -+ } -+} -+ -+#ifdef CONFIG_ETRAX_ETHERNET_IFACE1 -+{ -+ int iface1 = 0; -+ /* Default MAC address for interface 1. -+ * The real one will be set later. */ -+ static struct sockaddr default_mac_iface1 = -+ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x01}}; -+ -+ if (crisv32_pinmux_alloc_fixed(pinmux_eth1)) -+ panic("Eth pinmux\n"); -+ -+ /* Increase index to device array if interface 0 is enabled as well.*/ -+#ifdef CONFIG_ETRAX_ETHERNET_IFACE0 -+ iface1++; -+#endif -+ if (!(crisv32_dev[iface1] = alloc_etherdev(sizeof *np))) -+ return -ENOMEM; -+ -+ ret |= crisv32_ethernet_device_init(crisv32_dev[iface1]); -+ -+#if defined(CONFIG_ETRAX_ETH1_USE_LEDGRP0) -+ crisv32_init_leds(CRIS_LED_GRP_0,crisv32_dev[iface1]); -+#elif defined(CONFIG_ETRAX_ETH1_USE_LEDGRP1) -+ crisv32_init_leds(CRIS_LED_GRP_1,crisv32_dev[iface1]); -+#else -+ crisv32_init_leds(CRIS_LED_GRP_NONE,crisv32_dev[iface1]); -+#endif -+ -+ np = (struct crisv32_ethernet_local *) netdev_priv(crisv32_dev[iface1]); -+ np->eth_inst = regi_eth1; -+ np->dma_out_inst = regi_dma6; -+ np->dma_in_inst = regi_dma7; -+ -+ np->mii_if.dev = crisv32_dev[iface1]; -+ np->mii_if.mdio_read = crisv32_eth_get_mdio_reg; -+ np->mii_if.mdio_write = crisv32_eth_set_mdio_reg; -+ np->mii_if.phy_id_mask = 0x1f; -+ np->mii_if.reg_num_mask = 0x1f; -+ -+ -+ register_netdev(crisv32_dev[iface1]); -+ -+ /* Set up default MAC address */ -+ memcpy(crisv32_dev[iface1]->dev_addr, default_mac_iface1.sa_data, 6); -+ crisv32_eth_set_mac_address(crisv32_dev[iface1], &default_mac_iface1); -+ -+ if (crisv32_eth_request_irqdma(crisv32_dev[iface1])) -+ printk("%s: eth1 unable to allocate IRQ and DMA resources\n", -+ __func__); -+ np->txpackets = 0; -+ crisv32_eth_init_rings(crisv32_dev[iface1]); -+ crisv32_eth_setup_controller(crisv32_dev[iface1]); -+ ret |= crisv32_eth_init_phy(crisv32_dev[iface1]); -+ if (ret) { -+ unregister_netdev(crisv32_dev[iface1]); -+ return ret; -+ } -+} -+#endif /* CONFIG_ETRAX_ETHERNET_IFACE1 */ -+ -+#ifdef CONFIG_CPU_FREQ -+ cpufreq_register_notifier(&crisv32_ethernet_freq_notifier_block, -+ CPUFREQ_TRANSITION_NOTIFIER); -+#endif -+ -+ return ret; -+} -+ -+static struct net_device_ops crisv32_netdev_ops = { -+ .ndo_open = crisv32_eth_open, -+ .ndo_stop = crisv32_eth_close, -+ .ndo_start_xmit = crisv32_eth_send_packet, -+ .ndo_set_rx_mode = crisv32_eth_set_rx_mode, -+ .ndo_validate_addr = eth_validate_addr, -+ .ndo_set_mac_address = crisv32_eth_set_mac_address, -+ .ndo_do_ioctl =crisv32_eth_ioctl, -+ .ndo_get_stats = crisv32_get_stats, -+ .ndo_tx_timeout = crisv32_eth_do_tx_recovery, -+ .ndo_set_config = crisv32_eth_set_config, -+}; -+ -+static int __init crisv32_ethernet_device_init(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np; -+ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0); -+ -+ dev->base_addr = 0; /* Just to have something to show. */ -+ -+ /* we do our own locking */ -+ dev->features |= NETIF_F_LLTX; -+ -+ /* We use several IRQs and DMAs so just report 0 here. */ -+ dev->irq = 0; -+ dev->dma = 0; -+ -+ /* -+ * Fill in our handlers so the network layer can talk to us in the -+ * future. -+ */ -+ dev->netdev_ops = &crisv32_netdev_ops; -+ dev->ethtool_ops = &crisv32_ethtool_ops; -+ dev->watchdog_timeo = HZ * 10; -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ dev->poll_controller = crisv32_netpoll; -+#endif -+ np = netdev_priv(dev); -+ np->dev = dev; -+ -+ /* -+ * 8 skbs keeps the system very reponsive even under high load. -+ * At 64 the system locks, pretty much the same way as without NAPI. -+ * -+ * TODO: meassure with 2 interfaces -+ */ -+ netif_napi_add(dev, &np->napi, crisv32_eth_poll, 8); -+ -+ spin_lock_init(&np->lock); -+ spin_lock_init(&np->transceiver_lock); -+ -+ np->receive_timer = timer_init; -+ np->receive_timer.data = (unsigned)dev; -+ np->receive_timer.function = receive_timeout; -+ -+ INIT_WORK(&np->receive_work, receive_timeout_work); -+ -+ np->transmit_timer = timer_init; -+ np->transmit_timer.data = (unsigned)dev; -+ np->transmit_timer.function = transmit_timeout; -+ -+ return 0; -+} -+ -+static int crisv32_eth_open(struct net_device *dev) -+{ -+ struct sockaddr mac_addr; -+ reg_dma_rw_ack_intr ack_intr = { .data = 1, .in_eop = 1 }; -+ reg_eth_rw_clr_err clr_err = {.clr = regk_eth_yes}; -+ /* -+ * dont interrupt us at any stat counter thresholds, only at urun -+ * and exc_col. -+ */ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ /* For Artpec-3 we use overrun to workaround voodoo TR 87 */ -+ int intr_mask_nw = 0x1c00; -+#else -+ int intr_mask_nw = 0x1800; -+#endif -+ int eth_ack_intr = 0xffff; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ spin_lock(&np->lock); -+ crisv32_eth_set_gigabit(np, 0); -+ -+ crisv32_disable_tx_ints(np); -+ crisv32_disable_rx_ints(np); -+ -+ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err); -+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, eth_ack_intr); -+ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw); -+ crisv32_eth_reset_rings(dev); -+ -+ /* Give the hardware an idea of what MAC address we want. */ -+ memcpy(mac_addr.sa_data, dev->dev_addr, dev->addr_len); -+ crisv32_eth_set_mac_address(dev, &mac_addr); -+ -+ /* Enable irq and make sure that the irqs are cleared. */ -+ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr); -+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); -+ -+ crisv32_disconnect_eth_rx_dma(np); -+ -+ /* Prepare input DMA. */ -+ DMA_RESET(np->dma_in_inst); -+ DMA_ENABLE(np->dma_in_inst); -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ DMA_WR_CMD(np->dma_in_inst, regk_dma_set_w_size2); -+#endif -+ DMA_START_CONTEXT(np->dma_in_inst, virt_to_phys(&np->ctxt_in)); -+ DMA_CONTINUE(np->dma_in_inst); -+ crisv32_enable_rx_ints(np); -+ crisv32_start_receiver(np); -+ -+ /* Prepare output DMA. */ -+ DMA_RESET(np->dma_out_inst); -+ DMA_ENABLE(np->dma_out_inst); -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_set_w_size4); -+#endif -+ crisv32_connect_eth_rx_dma(np); -+ -+ netif_start_queue(dev); -+ crisv32_enable_tx_ints(np); -+ -+ if (!np->fixed_phy) { -+ /* Start duplex/speed timers */ -+ if (!timer_pending(&np->speed_timer)) -+ add_timer(&np->speed_timer); -+ if (!timer_pending(&np->duplex_timer)) -+ add_timer(&np->duplex_timer); -+ } -+ -+ spin_unlock(&np->lock); -+ /* -+ * We are now ready to accept transmit requests from the queueing -+ * layer of the networking. -+ */ -+ np->link = 1; -+ netif_carrier_on(dev); -+ napi_enable(&np->napi); -+ -+ return 0; -+} -+ -+static int crisv32_eth_close(struct net_device *dev) -+{ -+ reg_dma_rw_ack_intr ack_intr = {0}; -+ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ unsigned long flags; -+ -+ del_timer(&np->transmit_timer); -+ spin_lock_irqsave(&np->lock, flags); -+ -+ /* stop the receiver before the DMA channels to avoid overruns. */ -+ crisv32_disable_rx_ints(np); -+ napi_disable(&np->napi); -+ crisv32_stop_receiver(np); -+ -+ netif_stop_queue(dev); -+ -+ /* Reset the TX DMA in case it has hung on something. */ -+ DMA_RESET(np->dma_in_inst); -+ -+ /* Stop DMA */ -+ DMA_STOP(np->dma_in_inst); -+ DMA_STOP(np->dma_out_inst); -+ -+ /* Disable irq and make sure that the irqs are cleared. */ -+ crisv32_disable_tx_ints(np); -+ ack_intr.data = 1; -+ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr); -+ -+ ack_intr.in_eop = 1; -+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); -+ -+ np->sender_started = 0; -+ spin_unlock_irqrestore(&np->lock, flags); -+ -+ /* Update the statistics. */ -+ update_rx_stats(np); -+ update_tx_stats(np); -+ -+ if (!np->fixed_phy) { -+ /* Stop speed/duplex timers */ -+ del_timer(&np->speed_timer); -+ del_timer(&np->duplex_timer); -+ } -+ -+ return 0; -+} -+ -+static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr) -+{ -+ int i; -+ static int first = 1; -+ -+ unsigned char *addr = ((struct sockaddr*)vpntr)->sa_data; -+ -+ reg_eth_rw_ma0_lo ma0_lo = -+ { addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24)}; -+ -+ reg_eth_rw_ma0_hi ma0_hi = { addr[4] | (addr[5] << 8) }; -+ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ /* Remember the address. */ -+ memcpy(dev->dev_addr, addr, dev->addr_len); -+ -+ /* -+ * Write the address to the hardware. -+ * Note the way the address is wrapped: -+ * ma0_l0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24); -+ * ma0_hi = a0_4 | (a0_5 << 8); -+ */ -+ REG_WR(eth, np->eth_inst, rw_ma0_lo, ma0_lo); -+ REG_WR(eth, np->eth_inst, rw_ma0_hi, ma0_hi); -+ -+ if (first) { -+ printk(KERN_INFO "%s: changed MAC to ", dev->name); -+ -+ for (i = 0; i < 5; i++) -+ printk("%02X:", dev->dev_addr[i]); -+ printk("%02X\n", dev->dev_addr[i]); -+ -+ first = 0; -+ } -+ -+ return 0; -+} -+ -+static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *) dev_id; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ reg_dma_r_masked_intr masked_in; -+ -+ masked_in = REG_RD(dma, np->dma_in_inst, r_masked_intr); -+ -+ if (masked_in.in_eop) { -+ reg_dma_rw_ack_intr ack_intr = {0}; -+ -+ /* -+ * Ack the rx irq even if we are not prepared to start -+ * polling. This is needed to handle incomming packets -+ * during the stop sequence. -+ */ -+ ack_intr.in_eop = 1; -+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); -+ -+ mod_timer(&np->receive_timer, jiffies + HZ); -+ np->do_rx_recovery = 0; -+ -+ if (napi_schedule_prep(&np->napi)) { -+ crisv32_disable_rx_ints(np); -+ crisv32_disable_tx_ints(np); -+ /* put us onto the poll list */ -+ __napi_schedule(&np->napi); -+ } -+ } else { -+ /* Unexpected, ACK it and hope for the best. */ -+ reg_dma_rw_ack_intr ack_intr = { -+ .group = 1, -+ .ctxt = 1, -+ .data = 1, -+ .in_eop = 0, -+ .stream_cmd = 1, -+ .dummy1 = ~0 -+ }; -+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static inline void crisv32_eth_roll_tx_timer(struct crisv32_ethernet_local *np) -+{ -+ /* If there are more packets in the ring, roll the tx timer. */ -+ if (np->txpackets) { -+ /* Eth pause frames may halt us for up to 320ms (100mbit). */ -+ unsigned long timeout = jiffies + (HZ / 3) + 1; -+ mod_timer(&np->transmit_timer, timeout); -+ } -+ else -+ del_timer(&np->transmit_timer); -+} -+ -+/* Call with np->lock held. */ -+static void _crisv32_tx_ring_advance(struct crisv32_ethernet_local *np, -+ int cleanup) -+{ -+ reg_dma_rw_stat stat; -+ dma_descr_data *dma_pos; -+ struct net_device *dev = np->dev; -+ int eol; -+ -+ /* Get the current output dma position. */ -+ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst, rw_data)); -+ stat = REG_RD(dma, np->dma_out_inst, rw_stat); -+ eol = stat.list_state == regk_dma_data_at_eol; -+ if (cleanup || eol) -+ dma_pos = &np->active_tx_desc->descr; -+ -+ /* Take care of transmited dma descriptors and report sent packet. */ -+ while (np->txpackets && (&np->catch_tx_desc->descr != dma_pos)) { -+ /* Update sent packet statistics. */ -+ np->stats.tx_bytes += np->catch_tx_desc->skb->len; -+ np->stats.tx_packets++; -+ -+ dev_kfree_skb_any(np->catch_tx_desc->skb); -+ np->catch_tx_desc->skb = 0; -+ np->txpackets--; -+ np->catch_tx_desc->descr.buf = 0; -+ np->catch_tx_desc = -+ phys_to_virt((int)np->catch_tx_desc->descr.next); -+ np->do_tx_recovery = 0; -+ np->retrans = 0; -+ -+ netif_wake_queue(dev); -+ } -+} -+ -+static inline void crisv32_tx_ring_advance(struct crisv32_ethernet_local *np) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&np->lock, flags); -+ _crisv32_tx_ring_advance(np, 0); -+ crisv32_eth_roll_tx_timer(np); -+ spin_unlock_irqrestore(&np->lock, flags); -+} -+ -+static inline int crisv32_tx_complete(struct crisv32_ethernet_local *np) -+{ -+ reg_dma_rw_ack_intr ack_intr = { .data = 1 }; -+ reg_dma_r_intr ints; -+ int r = 0; -+ -+ /* We are interested in the unmasked raw interrupt source here. When -+ polling with tx interrupts masked off we still want to do -+ tx completition when the DMA makes progress. */ -+ ints = REG_RD(dma, np->dma_out_inst, r_intr); -+ if (ints.data) -+ { -+ /* ack the interrupt, if it was active */ -+ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr); -+ crisv32_tx_ring_advance(np); -+ r = 1; -+ } -+ return r; -+} -+ -+static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev_id); -+ -+ crisv32_tx_complete(np); -+ return IRQ_HANDLED; -+} -+ -+ -+/* Update receive errors. */ -+static void -+update_rx_stats(struct crisv32_ethernet_local *np) -+{ -+ reg_eth_rs_rec_cnt r; -+ -+ r = REG_RD(eth, np->eth_inst, rs_rec_cnt); -+ -+ np->stats.rx_over_errors += r.congestion; -+ np->stats.rx_crc_errors += r.crc_err; -+ np->stats.rx_frame_errors += r.align_err; -+ np->stats.rx_length_errors += r.oversize; -+ np->stats.rx_errors += r.crc_err + r.align_err + -+ r.oversize + r.congestion; -+} -+ -+/* Update transmit errors. */ -+static void update_tx_stats(struct crisv32_ethernet_local *np) -+{ -+ reg_eth_rs_tr_cnt r; -+ reg_eth_rs_phy_cnt rp; -+ -+ r = REG_RD(eth, np->eth_inst, rs_tr_cnt); -+ rp = REG_RD(eth, np->eth_inst, rs_phy_cnt); -+ -+ /* r.deferred is not good for counting collisions because it also -+ includes frames that have to wait for the interframe gap. That -+ means we get deferred frames even when in full duplex. -+ Here we don't actually count the number of collisions that -+ occured (artpec3 seems to lack such a counter), instead we count -+ the number of frames that collide once or more. */ -+ np->stats.collisions += r.mult_col + r.single_col; -+ np->stats.tx_window_errors += r.late_col; -+ np->stats.tx_carrier_errors += rp.carrier_loss; -+ -+ /* Ordinary collisions are not errors, they are just part of -+ ethernet's bus arbitration and congestion control mechanisms. -+ Late collisions are serious errors though. */ -+ np->stats.tx_errors += r.late_col; -+} -+ -+/* Get current statistics. */ -+static struct net_device_stats *crisv32_get_stats(struct net_device *dev) -+{ -+ unsigned long flags; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ spin_lock_irqsave(&np->lock, flags); -+ -+ update_rx_stats(np); -+ update_tx_stats(np); -+ -+ spin_unlock_irqrestore(&np->lock, flags); -+ -+ return &np->stats; -+} -+ -+/* Check for network errors. This acknowledge the received interrupt. */ -+static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *) dev_id; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ reg_eth_r_masked_intr intr_mask; -+ int ack_intr = 0xffff; -+ reg_eth_rw_clr_err clr_err; -+ -+ intr_mask = REG_RD(eth, np->eth_inst, r_masked_intr); -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ /* Only apply the workaround if it is not already pending. -+ enable_eth_ints will re-enable the orun interrupt regardless -+ of pending_overrun. */ -+ if (intr_mask.orun && !np->pending_overrun) { -+ reg_eth_rw_rec_ctrl rec_ctrl = -+ REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ np->saved_rec_ctrl = rec_ctrl; -+ np->overrun_set = 1; -+ DMA_STOP(np->dma_in_inst); -+ rec_ctrl.ma0 = regk_eth_no; -+ rec_ctrl.broadcast = regk_eth_no; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ np->saved_ga_lo = REG_RD_INT(eth, np->eth_inst, rw_ga_lo); -+ np->saved_ga_hi = REG_RD_INT(eth, np->eth_inst, rw_ga_hi); -+ REG_WR_INT(eth, np->eth_inst, rw_ga_lo, 0); -+ REG_WR_INT(eth, np->eth_inst, rw_ga_hi, 0); -+ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, -+ REG_RD_INT(eth, np->eth_inst, rw_intr_mask) & 0xfbff); -+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, 0x400); -+ intr_mask.orun = 0; -+ np->pending_overrun = 1; -+ if (!np->napi_processing) -+ crisv32_eth_restart_rx_dma(np->dev, np); -+ -+ return IRQ_HANDLED; -+ } -+#endif -+ -+ /* -+ * Check for underrun and/or excessive collisions. Note that the -+ * rw_clr_err register clears both underrun and excessive collision -+ * errors, so there's no need to check them separately. -+ */ -+ if (np->sender_started -+ && (intr_mask.urun || intr_mask.exc_col)) { -+ unsigned long flags; -+ -+ /* Underrun are considered to be tx-errors. */ -+ np->stats.tx_errors += intr_mask.urun; -+ np->stats.tx_fifo_errors += intr_mask.urun; -+ -+ /* -+ * Protect against the tx-interrupt messing with -+ * the tx-ring. -+ */ -+ spin_lock_irqsave(&np->lock, flags); -+ -+ /* DMA should have stopped now, eat from the ring before -+ removing anything due to tx errors. */ -+ _crisv32_tx_ring_advance(np, 0); -+ -+ /* -+ * Drop packets after 15 retries. -+ * TODO: Add backoff. -+ */ -+ if (np->retrans > 15 && np->txpackets) { -+ dev_kfree_skb_irq(np->catch_tx_desc->skb); -+ np->catch_tx_desc->skb = 0; -+ np->catch_tx_desc->descr.buf = 0; -+ np->catch_tx_desc = -+ phys_to_virt((int) -+ np->catch_tx_desc->descr.next); -+ flush_dma_descr(&np->catch_tx_desc->descr, 0); -+ -+ np->txpackets--; -+ np->retrans = 0; -+ netif_wake_queue(dev); -+ np->stats.tx_dropped++; -+ } -+ np->ctxt_out.next = 0; -+ if (np->txpackets) { -+ np->retrans++; -+ np->ctxt_out.saved_data = (void *) -+ virt_to_phys(&np->catch_tx_desc->descr); -+ np->ctxt_out.saved_data_buf = -+ np->catch_tx_desc->descr.buf; -+ WARN_ON(!np->ctxt_out.saved_data_buf); -+ flush_dma_descr(&np->catch_tx_desc->descr, 0); -+ cris_flush_cache_range(&np->ctxt_out, -+ sizeof np->ctxt_out); -+ -+ /* restart the DMA */ -+ DMA_START_CONTEXT(np->dma_out_inst, -+ (int) virt_to_phys(&np->ctxt_out)); -+ np->sender_started = 1; -+ } -+ else { -+ /* Load dummy context but do not load the data -+ descriptor nor start the burst. This brings the -+ buggy eth transmitter back in sync with the DMA -+ avoiding malformed frames. */ -+ REG_WR(dma, np->dma_out_inst, rw_group_down, -+ (int) virt_to_phys(&np->ctxt_out)); -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c); -+ np->sender_started = 0; -+ } -+ crisv32_eth_roll_tx_timer(np); -+ spin_unlock_irqrestore(&np->lock, flags); -+ } -+ -+ ack_intr = *(u32 *)&intr_mask; -+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, ack_intr); -+ clr_err.clr = 1; -+ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err); -+ -+ update_rx_stats(np); -+ update_tx_stats(np); -+ -+ return IRQ_HANDLED; -+} -+ -+/* We have a good packet(s), get it/them out of the buffers. */ -+static int crisv32_eth_receive_packet(struct net_device *dev) -+{ -+ int length; -+ struct sk_buff *skb; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ struct sk_buff *tmp; -+ unsigned long flags; -+ -+ DEBUG(printk("crisv32_receive_packet\n")); -+ -+ /* Roll the rx bug timer. */ -+ mod_timer(&np->receive_timer, jiffies + HZ); -+ -+ /* Activate LED */ -+ spin_lock_irqsave(&np->leds->led_lock, flags); -+ if (!np->leds->led_active && time_after(jiffies, -+ np->leds->led_next_time)) { -+ /* light the network leds depending on the current speed. */ -+ crisv32_set_network_leds(CRIS_LED_ACTIVITY, dev); -+ -+ /* Set the earliest time we may clear the LED */ -+ np->leds->led_next_time = jiffies + NET_FLASH_TIME; -+ np->leds->led_active = 1; -+ np->leds->clear_led_timer.data = (unsigned long) dev; -+ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10); -+ } -+ spin_unlock_irqrestore(&np->leds->led_lock, flags); -+ -+ /* Discard CRC (4 bytes). */ -+ length = (np->active_rx_desc->descr.after) - -+ (np->active_rx_desc->descr.buf) - 4; -+ -+ tmp = dev_alloc_skb(MAX_MEDIA_DATA_SIZE); -+ if (!tmp) { -+ np->stats.rx_errors++; -+ printk(KERN_NOTICE "%s: memory squeeze," -+ " dropping packet.", -+ dev->name); -+ return 0; -+ } -+ skb = np->active_rx_desc->skb; -+ np->active_rx_desc->skb = tmp; -+ skb_put(skb, length); -+ -+ np->newbuf = virt_to_phys(np->active_rx_desc->skb->data); -+ -+ skb->dev = dev; -+ skb->protocol = eth_type_trans(skb, dev); -+ skb->ip_summed = CHECKSUM_NONE; -+ -+ np->stats.multicast += skb->pkt_type == PACKET_MULTICAST; -+ /* Send the packet to the upper layer. */ -+ netif_receive_skb(skb); -+ np->last_rx_desc = -+ phys_to_virt((int) -+ np->last_rx_desc->descr.next); -+ -+ /* Forward rotate the receive ring. */ -+ crisv32_eth_rx_ring_advance(np); -+ return length; -+} -+ -+/* Must be called with the np-lock held. */ -+static void -+__crisv32_eth_restart_rx_dma(struct net_device* dev, -+ struct crisv32_ethernet_local *np) -+{ -+ reg_dma_rw_ack_intr ack_intr = {0}; -+ reg_dma_rw_stream_cmd dma_sc = {0}; -+ reg_dma_rw_stat stat; -+ int resets = 0; -+ reg_eth_rw_intr_mask eth_intr_mask; -+ -+ np->rx_dma_restarts++; -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ if (np->pending_overrun) { -+ np->pending_overrun = 0; -+ REG_WR_INT(eth, np->eth_inst, rw_ga_lo, np->saved_ga_lo); -+ REG_WR_INT(eth, np->eth_inst, rw_ga_hi, np->saved_ga_hi); -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, np->saved_rec_ctrl); -+ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, -+ REG_RD_INT(eth, regi_eth, rw_intr_mask) | 0x400); -+ DMA_CONTINUE(np->dma_in_inst); -+ } -+#endif -+ /* Bring down the receiver. */ -+ crisv32_disable_rx_ints(np); -+ crisv32_disconnect_eth_rx_dma(np); -+ -+ /* Stop DMA and ack possible ints. */ -+ DMA_STOP(np->dma_in_inst); -+ ack_intr.in_eop = 1; -+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); -+ -+ crisv32_stop_receiver(np); -+ -+ /* Disable overrun interrupts while receive is shut off. */ -+ eth_intr_mask = REG_RD(eth, np->eth_inst, rw_intr_mask); -+ eth_intr_mask.orun = regk_eth_no; -+ REG_WR(eth, np->eth_inst, rw_intr_mask, eth_intr_mask); -+ /* ACK overrun. */ -+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, 0x400); -+ -+ crisv32_eth_reset_rx_ring(dev); -+ reset: -+ /* TODO: if nr resets grows to high we should reboot. */ -+ if (resets++ > 0) -+ printk("reset DMA %d.\n", resets); -+ -+ DMA_RESET(np->dma_in_inst); -+ /* Wait for the channel to reset. */ -+ do { -+ stat = REG_RD(dma, np->dma_in_inst, rw_stat); -+ } while (stat.mode != regk_dma_rst); -+ -+ /* Now bring the rx path back up. */ -+ DMA_ENABLE(np->dma_in_inst); -+ if (dma_wait_busy(np->dma_in_inst, 100)) -+ goto reset; -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+// DMA_WR_CMD(np->dma_in_inst, regk_dma_set_w_size2); -+ dma_sc.cmd = (regk_dma_set_w_size2); -+ REG_WR(dma, np->dma_in_inst, rw_stream_cmd, dma_sc); -+ if (dma_wait_busy(np->dma_in_inst, 100)) -+ goto reset; -+#endif -+ -+// DMA_START_CONTEXT(np->dma_in_inst, virt_to_phys(&np->ctxt_in)); -+ REG_WR_INT(dma, np->dma_in_inst, rw_group_down, (int)&np->ctxt_in); -+ -+// DMA_WR_CMD(np->dma_in_inst, regk_dma_load_c); -+ dma_sc.cmd = (regk_dma_load_c); -+ REG_WR(dma, np->dma_in_inst, rw_stream_cmd, dma_sc); -+ if (dma_wait_busy(np->dma_in_inst, 100)) -+ goto reset; -+ -+// DMA_WR_CMD(np->dma_in_inst, regk_dma_load_d | regk_dma_burst); -+ dma_sc.cmd = (regk_dma_load_d | regk_dma_burst); -+ REG_WR(dma, np->dma_in_inst, rw_stream_cmd, dma_sc); -+ -+ if (dma_wait_busy(np->dma_in_inst, 100)) -+ goto reset; -+ -+ /* Now things get critical again. Don't give us any interrupts until -+ the following sequence is complete. */ -+ DMA_CONTINUE(np->dma_in_inst); -+ np->overrun_set = 0; -+ crisv32_enable_rx_ints(np); -+ crisv32_start_receiver(np); -+ -+ /* Reenable overrun interrupts when receive is started again. */ -+ eth_intr_mask = REG_RD(eth, np->eth_inst, rw_intr_mask); -+ eth_intr_mask.orun = regk_eth_yes; -+ REG_WR(eth, np->eth_inst, rw_intr_mask, eth_intr_mask); -+ -+ crisv32_connect_eth_rx_dma(np); -+} -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+static void -+crisv32_eth_restart_rx_dma(struct net_device* dev, -+ struct crisv32_ethernet_local *np) -+{ -+ unsigned long flags; -+ -+ spin_lock_irqsave(&np->lock, flags); -+ __crisv32_eth_restart_rx_dma(dev, np); -+ spin_unlock_irqrestore(&np->lock, flags); -+} -+#endif -+ -+/* -+ * Is there work to do in the rx-path? -+ */ -+static inline int crisv32_has_rx_work(struct crisv32_ethernet_local *np, -+ dma_descr_data *active) -+{ -+ int mw; -+ mw = (active->in_eop && np->new_rx_package); -+ return mw; -+} -+ -+static void crisv32_eth_do_rx_recovery(struct net_device* dev, -+ struct crisv32_ethernet_local *np) -+{ -+ unsigned long flags; -+ static int r = 0; -+ -+ r++; -+ -+ /* Bring down the receiver. */ -+ spin_lock_irqsave(&np->lock, flags); -+ if (!np->do_rx_recovery) -+ goto done; -+ -+ napi_disable(&np->napi); -+ -+ np->rx_dma_timeouts++; -+ -+ __crisv32_eth_restart_rx_dma(dev, np); -+ -+ np->do_rx_recovery = 0; -+ -+ napi_enable(&np->napi); -+ done: -+ spin_unlock_irqrestore(&np->lock, flags); -+ -+ WARN_ON(r != 1); -+ r--; -+} -+ -+static void receive_timeout_work(struct work_struct* work) -+{ -+ struct dma_descr_data* descr; -+ struct dma_descr_data* descr2; -+ struct net_device* dev = crisv32_dev[0]; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ reg_eth_r_intr intr_mask; -+ -+ descr = &np->active_rx_desc->descr; -+ descr2 = phys_to_virt(REG_RD_INT(dma, np->dma_in_inst, rw_data)); -+ -+ intr_mask = REG_RD(eth, np->eth_inst, r_intr); -+ -+ if (!np->overrun_set -+ && !intr_mask.orun -+ && !descr->in_eop -+ && !descr2->in_eop) -+ return; -+ -+ crisv32_eth_do_rx_recovery(dev, np); -+} -+ -+static void receive_timeout(unsigned long arg) -+{ -+ struct net_device* dev = (struct net_device*)arg; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ np->do_rx_recovery++; -+ schedule_work(&np->receive_work); -+ mod_timer(&np->receive_timer, jiffies + 1*HZ); -+} -+ -+static void transmit_timeout(unsigned long arg) -+{ -+ struct net_device* dev = (struct net_device*)arg; -+ crisv32_eth_do_tx_recovery(dev); -+} -+ -+/* -+ * NAPI poll -+ * -+ * We are allowed to pull up to budget number of frames from the rx ring. -+ * If we are done, remove us from the poll list and re-enable rx interrupts. -+ * Always return number of pulled frames from the rx ring. -+ */ -+static int crisv32_eth_poll(struct napi_struct *napi, int budget) -+{ -+ struct crisv32_ethernet_local *np; -+ int work_done = 0; -+ int morework; -+ int rx_bytes = 0; -+ reg_dma_rw_ack_intr ack_intr = {0}; -+ -+ np = container_of(napi, struct crisv32_ethernet_local, napi); -+ crisv32_disable_eth_ints(np); -+ np->napi_processing = 1; -+ ack_intr.in_eop = 1; -+ -+ if (np->new_rx_package == 0) { -+ /* -+ * In the previous round we pulled a packet from the ring but -+ * we didn't advance the ring due to hw DMA bug. Try to do it -+ * now. -+ */ -+ np->new_rx_package = 1; -+ crisv32_eth_rx_ring_advance(np); -+ } -+ -+ morework = crisv32_has_rx_work(np, &np->active_rx_desc->descr); -+ -+ /* See if tx needs attention. */ -+ crisv32_tx_complete(np); -+ -+ while (morework) -+ { -+ rx_bytes += crisv32_eth_receive_packet(np->dev); -+ work_done++; -+ -+ /* Ack irq and restart rx dma */ -+ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); -+ DMA_CONTINUE_DATA(np->dma_in_inst); -+ -+ if (unlikely(work_done >= budget)) -+ break; -+ -+ /* See if tx needs attention. */ -+ crisv32_tx_complete(np); -+ -+ morework = crisv32_has_rx_work(np, &np->active_rx_desc->descr); -+ } -+ crisv32_enable_eth_ints(np); -+ -+ if (!morework) { -+ np->napi_processing = 0; -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ if (np->pending_overrun) { -+ crisv32_eth_restart_rx_dma(np->dev, np); -+ } -+#endif -+ if (irqs_disabled()) -+ printk("WARNING: %s irqs disabled!\n", __func__); -+ -+ if (work_done < budget) { -+ /* first mark as done, then enable irq's */ -+ napi_complete(napi); -+ crisv32_enable_rx_ints(np); -+ crisv32_enable_tx_ints(np); -+ } -+ } -+ np->napi_processing = 0; -+ -+ np->stats.rx_bytes += rx_bytes; -+ np->stats.rx_packets += work_done; -+ update_rx_stats(np); -+ return work_done; -+} -+ -+/* -+ * This function (i.e. hard_start_xmit) is protected from concurent calls by a -+ * spinlock (xmit_lock) in the net_device structure. -+ */ -+static int -+crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ unsigned char *buf = skb->data; -+ unsigned long flags; -+ -+ /* -+ * Need to disable irq to avoid updating pointer in interrupt while -+ * sending packets. -+ */ -+ spin_lock_irqsave(&np->lock, flags); -+ -+ np->active_tx_desc->skb = skb; -+ crisv32_eth_hw_send_packet(buf, skb->len, np); -+ -+ dev->trans_start = jiffies; -+ -+ /* Stop queue if full. */ -+ if (crisv32_eth_tx_ring_full(np)) -+ netif_stop_queue(dev); -+ -+ np->txpackets++; -+ crisv32_eth_roll_tx_timer(np); -+ spin_unlock_irqrestore(&np->lock, flags); -+ -+ spin_lock_irqsave(&np->leds->led_lock, flags); -+ if (!np->leds->led_active && time_after(jiffies, -+ np->leds->led_next_time)) { -+ /* light the network leds depending on the current speed. */ -+ crisv32_set_network_leds(CRIS_LED_ACTIVITY, dev); -+ -+ /* Set the earliest time we may clear the LED */ -+ np->leds->led_next_time = jiffies + NET_FLASH_TIME; -+ np->leds->led_active = 1; -+ np->leds->clear_led_timer.data = (unsigned long) dev; -+ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10); -+ } -+ spin_unlock_irqrestore(&np->leds->led_lock, flags); -+ -+ return 0; -+} -+ -+ -+static void -+crisv32_eth_hw_send_packet(unsigned char *buf, int length, void *priv) -+{ -+ struct crisv32_ethernet_local *np = -+ (struct crisv32_ethernet_local *) priv; -+ -+ /* Configure the tx dma descriptor. */ -+ np->active_tx_desc->descr.buf = (unsigned char *)virt_to_phys(buf); -+ -+ np->active_tx_desc->descr.after = np->active_tx_desc->descr.buf + -+ length; -+ np->active_tx_desc->descr.intr = 1; -+ np->active_tx_desc->descr.out_eop = 1; -+ -+ /* Move eol. */ -+ np->active_tx_desc->descr.eol = 1; -+ flush_dma_descr(&np->active_tx_desc->descr, 1); -+ -+ if (np->sender_started) -+ WARN_ON(!np->prev_tx_desc->descr.eol); -+ np->prev_tx_desc->descr.eol = 0; -+ flush_dma_descr(&np->prev_tx_desc->descr, 0); -+ -+ /* Update pointers. */ -+ np->prev_tx_desc = np->active_tx_desc; -+ np->active_tx_desc = phys_to_virt((int)np->active_tx_desc->descr.next); -+ -+ /* Start DMA. */ -+ crisv32_start_dma_out(np); -+} -+ -+static void crisv32_start_dma_out(struct crisv32_ethernet_local *np) -+{ -+ if (!np->sender_started) { -+ /* Start DMA for the first time. */ -+ np->ctxt_out.saved_data = -+ (void *)virt_to_phys(&np->prev_tx_desc->descr); -+ np->ctxt_out.saved_data_buf = np->prev_tx_desc->descr.buf; -+ WARN_ON(!np->ctxt_out.saved_data_buf); -+ -+ cris_flush_cache_range(&np->ctxt_out, sizeof np->ctxt_out); -+ REG_WR(dma, np->dma_out_inst, rw_group_down, -+ (int) virt_to_phys(&np->ctxt_out)); -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c); -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst); -+ np->sender_started = 1; -+ } else { -+ DMA_CONTINUE_DATA(np->dma_out_inst); -+ } -+} -+ -+/* -+ * Bring the transmitter back to life. -+ */ -+static void -+crisv32_eth_do_tx_recovery(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ reg_eth_rw_clr_err clr_err; -+ reg_dma_rw_stat stat = {0}; -+ unsigned long flags; -+ /* ACK urun and exc_col. */ -+ int ack_intr = 0x1800; -+ int do_full; -+ -+ /* Give the tx recovery some time without link state polling. */ -+ if (!np->fixed_phy) -+ mod_timer(&np->speed_timer, jiffies + 4 * HZ); -+ -+ np->tx_dma_restarts++; -+ -+ spin_lock_irqsave(&np->lock, flags); -+ -+ do_full = 1; -+ update_tx_stats(np); -+ -+ /* Cancel ongoing frame. */ -+ crisv32_eth_tx_cancel_frame(np); -+ -+ /* In case TR 125 just hit us. */ -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_ack_pkt); -+ dma_wait_busy(np->dma_out_inst, 100); -+ -+ /* At this point, the transmit block should be idle or waiting for us -+ to clear the excessive collision error. Let's reset the DMA. */ -+ DMA_STOP(np->dma_out_inst); -+ -+ crisv32_disconnect_eth_tx_dma(np); -+ -+ /* Eat from the tx ring. */ -+ _crisv32_tx_ring_advance(np, 1); -+ np->do_tx_recovery++; -+ -+ DMA_RESET(np->dma_out_inst); -+ do { -+ stat = REG_RD(dma, np->dma_out_inst, rw_stat); -+ } while (stat.mode != regk_dma_rst); -+ -+ /* Next packet will restart output DMA. */ -+ np->sender_started = 0; -+ -+ crisv32_enable_tx_ints(np); -+ -+ DMA_ENABLE(np->dma_out_inst); -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_set_w_size4); -+#endif -+ DMA_CONTINUE(np->dma_out_inst); -+ -+ /* Clear pending errors. */ -+ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, ack_intr); -+ clr_err.clr = 1; -+ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err); -+ -+ /* Do a full reset of the MAC block. */ -+ if (do_full) { -+ np->tx_mac_resets++; -+ crisv32_eth_reset(np); -+ } -+ -+ crisv32_connect_eth_tx_dma(np); -+ -+ if (np->txpackets) { -+ WARN_ON(!np->catch_tx_desc->skb); -+ np->catch_tx_desc->descr.intr = 1; -+ np->catch_tx_desc->descr.out_eop = 1; -+ -+ /* Start DMA for the first time. */ -+ np->ctxt_out.saved_data = -+ (void *)virt_to_phys(&np->catch_tx_desc->descr); -+ np->ctxt_out.saved_data_buf = np->catch_tx_desc->descr.buf; -+ WARN_ON(!np->ctxt_out.saved_data_buf); -+ flush_dma_descr(&np->catch_tx_desc->descr, 0); -+ cris_flush_cache_range(&np->ctxt_out, sizeof np->ctxt_out); -+ -+ REG_WR(dma, np->dma_out_inst, rw_group_down, -+ (int) virt_to_phys(&np->ctxt_out)); -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c); -+ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst); -+ crisv32_eth_roll_tx_timer(np); -+ np->sender_started = 1; -+ } -+ -+ if (np->txpackets && crisv32_eth_tx_ring_full(np)) -+ netif_stop_queue(dev); -+ else -+ netif_wake_queue(dev); -+ -+ spin_unlock_irqrestore(&np->lock, flags); -+} -+ -+/* -+ * Set or clear the multicast filter for this adaptor. -+ * num_addrs == -1 Promiscuous mode, receive all packets -+ * num_addrs == 0 Normal mode, clear multicast list -+ * num_addrs > 0 Multicast mode, receive normal and MC packets, -+ * and do best-effort filtering. -+ */ -+static void crisv32_eth_set_rx_mode(struct net_device *dev) -+{ -+ int num_addr = netdev_mc_count(dev); -+ unsigned long int lo_bits; -+ unsigned long int hi_bits; -+ reg_eth_rw_rec_ctrl rec_ctrl = {0}; -+ reg_eth_rw_ga_lo ga_lo = {0}; -+ reg_eth_rw_ga_hi ga_hi = {0}; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ if (dev->flags & IFF_PROMISC) { -+ /* Promiscuous mode. */ -+ lo_bits = 0xfffffffful; -+ hi_bits = 0xfffffffful; -+ -+ /* Enable individual receive. */ -+ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, -+ rw_rec_ctrl); -+ rec_ctrl.individual = regk_eth_yes; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ } else if (dev->flags & IFF_ALLMULTI) { -+ /* Enable all multicasts. */ -+ lo_bits = 0xfffffffful; -+ hi_bits = 0xfffffffful; -+ -+ /* Disable individual receive */ -+ rec_ctrl = -+ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ rec_ctrl.individual = regk_eth_no; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ } else if (num_addr == 0) { -+ /* Normal, clear the mc list. */ -+ lo_bits = 0x00000000ul; -+ hi_bits = 0x00000000ul; -+ -+ /* Disable individual receive */ -+ rec_ctrl = -+ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ rec_ctrl.individual = regk_eth_no; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ } else { -+ /* MC mode, receive normal and MC packets. */ -+ char hash_ix; -+ struct netdev_hw_addr *ha; -+ char *baddr; -+ lo_bits = 0x00000000ul; -+ hi_bits = 0x00000000ul; -+ -+ netdev_for_each_mc_addr(ha, dev) { -+ /* Calculate the hash index for the GA registers. */ -+ hash_ix = 0; -+ baddr = ha->addr; -+ hash_ix ^= (*baddr) & 0x3f; -+ hash_ix ^= ((*baddr) >> 6) & 0x03; -+ ++baddr; -+ hash_ix ^= ((*baddr) << 2) & 0x03c; -+ hash_ix ^= ((*baddr) >> 4) & 0xf; -+ ++baddr; -+ hash_ix ^= ((*baddr) << 4) & 0x30; -+ hash_ix ^= ((*baddr) >> 2) & 0x3f; -+ ++baddr; -+ hash_ix ^= (*baddr) & 0x3f; -+ hash_ix ^= ((*baddr) >> 6) & 0x03; -+ ++baddr; -+ hash_ix ^= ((*baddr) << 2) & 0x03c; -+ hash_ix ^= ((*baddr) >> 4) & 0xf; -+ ++baddr; -+ hash_ix ^= ((*baddr) << 4) & 0x30; -+ hash_ix ^= ((*baddr) >> 2) & 0x3f; -+ -+ hash_ix &= 0x3f; -+ -+ if (hash_ix > 32) -+ hi_bits |= (1 << (hash_ix - 32)); -+ else -+ lo_bits |= (1 << hash_ix); -+ } -+ -+ /* Disable individual receive. */ -+ rec_ctrl = -+ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl); -+ rec_ctrl.individual = regk_eth_no; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ } -+ -+ ga_lo.table = (unsigned int) lo_bits; -+ ga_hi.table = (unsigned int) hi_bits; -+ -+ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo); -+ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi); -+} -+ -+static int -+crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -+{ -+ struct mii_ioctl_data *data = if_mii(ifr); -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ int old_autoneg; -+ int rc = 0; -+ -+ spin_lock(&np->lock); /* Preempt protection */ -+ switch (cmd) { -+ case SET_ETH_ENABLE_LEDS: -+ np->use_leds = 1; -+ break; -+ case SET_ETH_DISABLE_LEDS: -+ np->use_leds = 0; -+ break; -+ case SET_ETH_AUTONEG: -+ old_autoneg = np->autoneg_normal; -+ np->autoneg_normal = *(int*)data; -+ if (np->autoneg_normal != old_autoneg) -+ crisv32_eth_negotiate(dev); -+ break; -+ default: -+ rc = generic_mii_ioctl(&np->mii_if, -+ if_mii(ifr), cmd, NULL); -+ break; -+ } -+ spin_unlock(&np->lock); -+ return rc; -+} -+ -+static int crisv32_eth_get_settings(struct net_device *dev, -+ struct ethtool_cmd *cmd) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ int err; -+ -+ spin_lock_irq(&np->lock); -+ err = mii_ethtool_gset(&np->mii_if, cmd); -+ spin_unlock_irq(&np->lock); -+ -+ /* The PHY may support 1000baseT, but the EtraxFS does not. */ -+ cmd->supported &= ~(SUPPORTED_1000baseT_Half -+ | SUPPORTED_1000baseT_Full); -+ return err; -+} -+ -+static int crisv32_eth_set_settings(struct net_device *dev, -+ struct ethtool_cmd *ecmd) -+{ -+ if (ecmd->autoneg == AUTONEG_ENABLE) { -+ crisv32_eth_set_duplex(dev, autoneg); -+ crisv32_eth_set_speed(dev, 0); -+ } else { -+ crisv32_eth_set_duplex(dev, ecmd->duplex); -+ crisv32_eth_set_speed(dev, ecmd->speed); -+ } -+ -+ return 0; -+} -+ -+static void crisv32_eth_get_drvinfo(struct net_device *dev, -+ struct ethtool_drvinfo *info) -+{ -+#ifdef CONFIG_ETRAXFS -+ strncpy(info->driver, "ETRAX FS", sizeof(info->driver) - 1); -+#else -+ strncpy(info->driver, "ARTPEC-3", sizeof(info->driver) - 1); -+#endif -+ strncpy(info->version, "$Revision: 1.197 $", sizeof(info->version) - 1); -+ strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1); -+ strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1); -+} -+ -+static int crisv32_eth_get_ethtool_sset_count(struct net_device *dev, -+ int stringset) -+{ -+ if (stringset != ETH_SS_STATS) -+ return -EINVAL; -+ -+ return ARRAY_SIZE(ethtool_stats_keys); -+} -+ -+static void crisv32_eth_get_ethtool_stats(struct net_device *dev, -+ struct ethtool_stats *stats, -+ u64 *data) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data[0] = np->tx_dma_restarts; -+ data[1] = np->tx_mac_resets; -+ data[2] = np->rx_dma_restarts; -+ data[3] = np->rx_dma_timeouts; -+ data[4] = np->rx_restarts_dropped; -+} -+ -+static void crisv32_eth_get_strings(struct net_device *dev, -+ u32 stringset, u8 *data) -+{ -+ switch (stringset) { -+ case ETH_SS_STATS: -+ memcpy(data, ðtool_stats_keys, -+ sizeof(ethtool_stats_keys)); -+ break; -+ default: -+ WARN_ON(1); -+ break; -+ } -+} -+ -+static int crisv32_eth_nway_reset(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ if (np->current_duplex == autoneg && np->current_speed_selection == 0) -+ crisv32_eth_negotiate(dev); -+ return 0; -+} -+/* The FS/A3 ethernet block has 23 32-bit config registers. */ -+/* plus 2 dma_descr_context */ -+/* plus 2 sets of ring pointers (active, prev, last) */ -+/* plus 2 sets of DMA registers 40*4 bytes = 0xA0 */ -+#define ETRAX_ETH_REGDUMP_LEN (23 * 4 + 2 * sizeof (dma_descr_context) + 2*3*4 + 2*0xA0) -+static int crisv32_eth_get_regs_len(struct net_device *dev) -+{ -+ return ETRAX_ETH_REGDUMP_LEN; -+} -+ -+static void crisv32_eth_get_regs(struct net_device *dev, -+ struct ethtool_regs *regs, void *_p) -+{ -+ u32 *p = _p; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ int i; -+ -+ /* Let's call this major version 0, minor version 1 with some -+ * undecided field separation in the version data. Previously -+ * only the eth regs were dumped (version=0: maj 0, min 0).*/ -+ regs->version = 1; -+ memset(p, 0, ETRAX_ETH_REGDUMP_LEN); -+ -+#define GET_REG32_LOOP(base, len) \ -+ do { \ -+ for (i = 0; i < len; i += 4) \ -+ *(p)++ = REG_READ(u32, (base) + i); \ -+ } while (0) -+ -+ GET_REG32_LOOP(np->eth_inst, 0x30); -+ /* Do not dump registers with read side effects. */ -+ GET_REG32_LOOP(np->eth_inst + 0x34, 1); -+ GET_REG32_LOOP(np->eth_inst + 0x3c, 1); -+ GET_REG32_LOOP(np->eth_inst + 0x44, 0x5c - 0x44); -+ -+ -+ memcpy(p, &np->ctxt_out, sizeof (dma_descr_context)); -+ p += sizeof (dma_descr_context)/4; -+ *(p++) = (u32) np->active_tx_desc; -+ *(p++) = (u32) np->prev_tx_desc; -+ *(p++) = (u32) np->catch_tx_desc; -+ -+ GET_REG32_LOOP(np->dma_out_inst, 0xa0); -+ -+ memcpy(p, &np->ctxt_in, sizeof (dma_descr_context)); -+ p += sizeof (dma_descr_context)/4; -+ *(p++) = (u32)np->active_rx_desc; -+ *(p++) = (u32)np->prev_rx_desc; -+ *(p++) = (u32)np->last_rx_desc; -+ -+ GET_REG32_LOOP(np->dma_in_inst, 0xa0); -+#undef GET_REG32_LOOP -+} -+ -+static struct ethtool_ops crisv32_ethtool_ops = { -+ .get_settings = crisv32_eth_get_settings, -+ .set_settings = crisv32_eth_set_settings, -+ .get_drvinfo = crisv32_eth_get_drvinfo, -+ .get_regs_len = crisv32_eth_get_regs_len, -+ .get_regs = crisv32_eth_get_regs, -+ .nway_reset = crisv32_eth_nway_reset, -+ .get_link = ethtool_op_get_link, -+ .get_strings = crisv32_eth_get_strings, -+ .get_ethtool_stats = crisv32_eth_get_ethtool_stats, -+ .get_sset_count = crisv32_eth_get_ethtool_sset_count -+}; -+ -+/* Is this function really needed? Use ethtool instead? */ -+static int crisv32_eth_set_config(struct net_device *dev, struct ifmap *map) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ spin_lock(&np->lock); /* Preempt protection */ -+ -+ switch (map->port) { -+ case IF_PORT_UNKNOWN: -+ /* Use autoneg */ -+ crisv32_eth_set_speed(dev, 0); -+ crisv32_eth_set_duplex(dev, autoneg); -+ break; -+ case IF_PORT_10BASET: -+ crisv32_eth_set_speed(dev, 10); -+ crisv32_eth_set_duplex(dev, autoneg); -+ break; -+ case IF_PORT_100BASET: -+ case IF_PORT_100BASETX: -+ crisv32_eth_set_speed(dev, 100); -+ crisv32_eth_set_duplex(dev, autoneg); -+ break; -+ case IF_PORT_100BASEFX: -+ case IF_PORT_10BASE2: -+ case IF_PORT_AUI: -+ spin_unlock(&np->lock); -+ return -EOPNOTSUPP; -+ break; -+ default: -+ printk(KERN_ERR "%s: Invalid media selected", -+ dev->name); -+ spin_unlock(&np->lock); -+ return -EINVAL; -+ } -+ spin_unlock(&np->lock); -+ return 0; -+} -+ -+static void crisv32_eth_negotiate(struct net_device *dev) -+{ -+ unsigned short data; -+ unsigned short ctrl1000; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); -+ ctrl1000 = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MII_CTRL1000); -+ -+ /* Make all capabilities available */ -+ data |= ADVERTISE_10HALF | ADVERTISE_10FULL | -+ ADVERTISE_100HALF | ADVERTISE_100FULL; -+ ctrl1000 |= ADVERTISE_1000HALF | ADVERTISE_1000FULL; -+ -+ /* Remove the speed capabilities that we that do not want */ -+ switch (np->current_speed_selection) { -+ case 10 : -+ data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL); -+ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); -+ break; -+ case 100 : -+ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL); -+ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); -+ break; -+ case 1000 : -+ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | -+ ADVERTISE_100HALF | ADVERTISE_100FULL); -+ break; -+ } -+ -+ /* Remove the duplex capabilites that we do not want */ -+ if (np->current_duplex == full) { -+ data &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF); -+ ctrl1000 &= ~(ADVERTISE_1000HALF); -+ } -+ else if (np->current_duplex == half) { -+ data &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL); -+ ctrl1000 &= ~(ADVERTISE_1000FULL); -+ } -+ -+ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data); -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, -+ MII_CTRL1000, ctrl1000); -+#endif -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); -+ if (np->autoneg_normal) { -+ /* Renegotiate with link partner */ -+ data |= BMCR_ANENABLE | BMCR_ANRESTART; -+ } else { -+ /* Don't negitiate speed or duplex */ -+ data &= ~(BMCR_ANENABLE | BMCR_ANRESTART); -+ -+ /* Set speed and duplex static */ -+ if (np->current_speed_selection == 10) { -+ data &= ~(BMCR_SPEED100 | BMCR_SPEED1000); -+ } -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ else if (np->current_speed_selection == 1000) { -+ data &= ~BMCR_SPEED100; -+ data |= BMCR_SPEED1000; -+ } -+#endif -+ else { -+ data |= BMCR_SPEED100; -+ data &= ~BMCR_SPEED1000; -+ } -+ -+ if (np->current_duplex != full) { -+ data &= ~BMCR_FULLDPLX; -+ } else { -+ data |= BMCR_FULLDPLX; -+ } -+ } -+ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data); -+} -+ -+static void crisv32_eth_check_speed(unsigned long idev) -+{ -+#ifndef CONFIG_ETRAX_NO_PHY -+ static int led_initiated = 0; -+ struct net_device *dev = (struct net_device *) idev; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ unsigned long data; -+ int old_speed; -+ unsigned long flags; -+ -+ BUG_ON(!np); -+ BUG_ON(!np->transceiver); -+ -+ spin_lock(&np->transceiver_lock); -+ -+ old_speed = np->current_speed; -+ -+ /* Do a fake read. This is needed for DM9161, otherwise the link will -+ * go up and down all the time. -+ */ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR); -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR); -+ -+ if (!(data & BMSR_LSTATUS)) -+ np->current_speed = 0; -+ else -+ np->transceiver->check_speed(dev); -+ -+ spin_lock_irqsave(&np->leds->led_lock, flags); -+ if ((old_speed != np->current_speed) || !led_initiated) { -+ led_initiated = 1; -+ np->leds->clear_led_timer.data = (unsigned long) dev; -+ if (np->current_speed) { -+ if (!np->link) -+ netif_carrier_on(dev); -+ crisv32_set_network_leds(CRIS_LED_LINK, dev); -+ np->link = 1; -+ } else { -+ if (np->link) -+ netif_carrier_off(dev); -+ crisv32_set_network_leds(CRIS_LED_NOLINK, dev); -+ np->link = 0; -+ } -+ } -+ spin_unlock_irqrestore(&np->leds->led_lock, flags); -+ -+ /* Reinitialize the timer. */ -+ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; -+ add_timer(&np->speed_timer); -+ -+ spin_unlock(&np->transceiver_lock); -+#endif -+} -+ -+static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ spin_lock(&np->transceiver_lock); -+ if (np->current_speed_selection != speed) { -+ np->current_speed_selection = speed; -+ crisv32_eth_negotiate(dev); -+ } -+ spin_unlock(&np->transceiver_lock); -+} -+ -+static void crisv32_eth_check_duplex(unsigned long idev) -+{ -+#ifndef CONFIG_ETRAX_NO_PHY -+ struct net_device *dev = (struct net_device *) idev; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ reg_eth_rw_rec_ctrl rec_ctrl; -+ int old_duplex = np->full_duplex; -+ -+ np->transceiver->check_duplex(dev); -+ -+ if (old_duplex != np->full_duplex) { -+ /* Duplex changed. */ -+ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, -+ rw_rec_ctrl); -+ rec_ctrl.duplex = np->full_duplex; -+ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); -+ } -+ -+ /* Reinitialize the timer. */ -+ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; -+ add_timer(&np->duplex_timer); -+#endif -+} -+ -+static void -+crisv32_eth_set_duplex(struct net_device *dev, enum duplex new_duplex) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ spin_lock(&np->transceiver_lock); -+ if (np->current_duplex != new_duplex) { -+ np->current_duplex = new_duplex; -+ crisv32_eth_negotiate(dev); -+ } -+ spin_unlock(&np->transceiver_lock); -+} -+ -+static int crisv32_eth_probe_transceiver(struct net_device *dev) -+{ -+#ifndef CONFIG_ETRAX_NO_PHY -+ unsigned int phyid_high; -+ unsigned int phyid_low; -+ unsigned int oui; -+ struct transceiver_ops *ops = NULL; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ /* Probe MDIO physical address. */ -+ for (np->mii_if.phy_id = 0; -+ np->mii_if.phy_id <= 31; np->mii_if.phy_id++) { -+ if (crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR) -+ != 0xffff) -+ break; -+ } -+ -+ if (np->mii_if.phy_id == 32) -+ return -ENODEV; -+ -+ /* Get manufacturer. */ -+ phyid_high = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MII_PHYSID1); -+ phyid_low = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MII_PHYSID2); -+ -+ oui = (phyid_high << 6) | (phyid_low >> 10); -+ -+ for (ops = &transceivers[0]; ops->oui; ops++) { -+ if (ops->oui == oui) -+ break; -+ } -+ -+ np->transceiver = ops; -+ -+ if (oui == DM9161_OUI) { -+ /* Do not bypass the scrambler/descrambler, this is needed -+ * to make 10Mbit work. -+ */ -+ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, -+ MII_DM9161_SCR,MII_DM9161_SCR_INIT); -+ /* Clear 10BTCSR to default */ -+ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, -+ MII_DM9161_10BTCSR, -+ MII_DM9161_10BTCSR_INIT); -+ } -+ return 0; -+#else -+ return -ENODEV; -+#endif -+} -+ -+#ifndef CONFIG_ETRAX_NO_PHY -+static void generic_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); -+ if ((data & ADVERTISE_100FULL) || -+ (data & ADVERTISE_100HALF)) -+ np->current_speed = 100; -+ else -+ np->current_speed = 10; -+} -+ -+static void generic_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); -+ if ((data & ADVERTISE_10FULL) || -+ (data & ADVERTISE_100FULL)) -+ np->full_duplex = 1; -+ else -+ np->full_duplex = 0; -+} -+ -+static void broadcom_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_AUX_CTRL_STATUS_REG); -+ np->current_speed = (data & MDIO_BC_SPEED ? 100 : 10); -+} -+ -+static void broadcom_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_AUX_CTRL_STATUS_REG); -+ np->full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0; -+} -+ -+static void tdk_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_TDK_DIAGNOSTIC_REG); -+ np->current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10); -+} -+ -+static void tdk_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_TDK_DIAGNOSTIC_REG); -+ np->full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0; -+ -+} -+ -+static void intel_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_INT_STATUS_REG_2); -+ np->current_speed = (data & MDIO_INT_SPEED ? 100 : 10); -+} -+ -+static void intel_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_INT_STATUS_REG_2); -+ np->full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0; -+} -+ -+static void national_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_NAT_LINK_AN_REG); -+ if (data & MDIO_NAT_1000) -+ np->current_speed = 1000; -+ else if (data & MDIO_NAT_100) -+ np->current_speed = 100; -+ else -+ np->current_speed = 10; -+} -+ -+static void national_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_NAT_LINK_AN_REG); -+ if (data & MDIO_NAT_FULL_DUPLEX_IND) -+ np->full_duplex = 1; -+ else -+ np->full_duplex = 0; -+} -+ -+static void vitesse_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_VIT_AUX_STAT); -+ if ((data & 0x18) == MDIO_VIT_1000) -+ np->current_speed = 1000; -+ else if ((data & 0x18) == MDIO_VIT_100) -+ np->current_speed = 100; -+ else -+ np->current_speed = 10; -+} -+ -+static void vitesse_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MDIO_VIT_AUX_STAT); -+ if (data & 0x20) -+ np->full_duplex = 1; -+ else -+ np->full_duplex = 0; -+} -+ -+static void davicom_check_speed(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); -+ np->current_speed = (data & BMCR_SPEED100) ? 100 : 10; -+} -+ -+static void davicom_check_duplex(struct net_device *dev) -+{ -+ unsigned long data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); -+ np->full_duplex = (data & BMCR_FULLDPLX) ? 1 : 0; -+} -+#endif -+ -+#if 0 -+static void crisv32_eth_reset_tranceiver(struct net_device *dev) -+{ -+ int i; -+ unsigned short cmd; -+ unsigned short data; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); -+ -+ cmd = (MDIO_START << 14) -+ | (MDIO_WRITE << 12) -+ | (np->mii_if.phy_id << 7) -+ | (MII_BMCR << 2); -+ -+ crisv32_eth_send_mdio_cmd(dev, cmd, 1); -+ -+ data |= 0x8000; -+ -+ /* Magic value is number of bits. */ -+ for (i = 15; i >= 0; i--) -+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data)); -+} -+#endif -+ -+static int -+crisv32_eth_get_mdio_reg(struct net_device *dev, int phyid, int reg_num) -+{ -+ int i; -+ unsigned short cmd; /* Data to be sent on MDIO port. */ -+ unsigned short data; /* Data read from MDIO. */ -+ -+#ifdef CONFIG_ETRAX_NO_PHY -+ return 0; -+#endif -+ -+ /* Start of frame, OP Code, Physical Address, Register Address. */ -+ cmd = (MDIO_START << 14) -+ | (MDIO_READ << 12) -+ | (phyid << 7) -+ | (reg_num << 2); -+ -+ crisv32_eth_send_mdio_cmd(dev, cmd, 0); -+ -+ data = 0; -+ -+ /* Receive data. Magic value is number of bits. */ -+ for (i = 15; i >= 0; i--) -+ data |= (crisv32_eth_receive_mdio_bit(dev) << i); -+ -+ return data; -+} -+ -+static void -+crisv32_eth_set_mdio_reg(struct net_device *dev, int phyid, int reg, int value) -+{ -+ int bitCounter; -+ unsigned short cmd; -+ -+#ifdef CONFIG_ETRAX_NO_PHY -+ return; -+#endif -+ cmd = (MDIO_START << 14) -+ | (MDIO_WRITE << 12) -+ | (phyid << 7) -+ | (reg << 2); -+ -+ crisv32_eth_send_mdio_cmd(dev, cmd, 1); -+ -+ /* Data... */ -+ for (bitCounter=15; bitCounter>=0 ; bitCounter--) { -+ crisv32_eth_send_mdio_bit(dev, GET_BIT(bitCounter, value)); -+ } -+} -+ -+static void -+crisv32_eth_send_mdio_cmd(struct net_device *dev, unsigned short cmd, -+ int write_cmd) -+{ -+ int i; -+ unsigned char data = 0x2; -+ -+ /* Preamble. Magic value is number of bits. */ -+ for (i = 31; i >= 0; i--) -+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, MDIO_PREAMBLE)); -+ -+ for (i = 15; i >= 2; i--) -+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, cmd)); -+ -+ /* Turnaround. */ -+ for (i = 1; i >= 0; i--) -+ if (write_cmd) -+ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data)); -+ else -+ crisv32_eth_receive_mdio_bit(dev); -+} -+ -+static void crisv32_eth_send_mdio_bit(struct net_device *dev, unsigned char bit) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ reg_eth_rw_mgm_ctrl mgm_ctrl = { -+ .mdoe = regk_eth_yes, -+ .mdio = bit & 1 -+ }; -+ -+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); -+ -+ udelay(1); -+ -+ mgm_ctrl.mdc = 1; -+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); -+ -+ udelay(1); -+} -+ -+static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev) -+{ -+ reg_eth_r_stat stat; -+ reg_eth_rw_mgm_ctrl mgm_ctrl = {0}; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ -+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); -+ stat = REG_RD(eth, np->eth_inst, r_stat); -+ -+ udelay(1); -+ -+ mgm_ctrl.mdc = 1; -+ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); -+ -+ udelay(1); -+ return stat.mdio; -+} -+ -+static void crisv32_clear_network_leds(unsigned long priv) -+{ -+ struct net_device *dev = (struct net_device *)priv; -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&np->leds->led_lock, flags); -+ if (np->leds->led_active && time_after(jiffies, -+ np->leds->led_next_time)) { -+ crisv32_set_network_leds(CRIS_LED_NOACTIVITY, dev); -+ -+ /* Set the earliest time we may set the LED */ -+ np->leds->led_next_time = jiffies + NET_FLASH_PAUSE; -+ np->leds->led_active = 0; -+ } -+ spin_unlock_irqrestore(&np->leds->led_lock, flags); -+} -+ -+static void crisv32_set_network_leds(int active, struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ int light_leds = 0; -+ -+ if (np->leds->ledgrp == CRIS_LED_GRP_NONE) -+ return; -+ -+ if (!np->use_leds) -+ return; -+ -+ if (active == CRIS_LED_NOLINK) { -+ if (dev == crisv32_dev[0]) -+ np->leds->ifisup[0] = 0; -+ else -+ np->leds->ifisup[1] = 0; -+ } -+ else if (active == CRIS_LED_LINK) { -+ if (dev == crisv32_dev[0]) -+ np->leds->ifisup[0] = 1; -+ else -+ np->leds->ifisup[1] = 1; -+#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK) -+ light_leds = 1; -+ } else { -+ light_leds = (active == CRIS_LED_NOACTIVITY); -+#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY) -+ light_leds = 0; -+ } else { -+ light_leds = (active == CRIS_LED_ACTIVITY); -+#else -+#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY" -+#endif -+ } -+ -+ if (!np->current_speed) { -+ /* Set link down if none of the interfaces that use this led -+ group is up */ -+ if ((np->leds->ifisup[0] + np->leds->ifisup[1]) == 0) { -+#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION) -+ /* Make LED red, link is down */ -+ NET_LED_SET(np->leds->ledgrp, CRIS_LED_RED); -+#else -+ NET_LED_SET(np->leds->ledgrp, CRIS_LED_OFF); -+#endif -+ } -+ } else if (light_leds) { -+ if (np->current_speed == 10) -+ NET_LED_SET(np->leds->ledgrp, CRIS_LED_ORANGE); -+ else -+ NET_LED_SET(np->leds->ledgrp, CRIS_LED_GREEN); -+ } else -+ NET_LED_SET(np->leds->ledgrp, CRIS_LED_OFF); -+} -+ -+#ifdef CONFIG_NET_POLL_CONTROLLER -+static void crisv32_netpoll(struct net_device *netdev) -+{ -+ crisv32rx_eth_interrupt(DMA0_INTR_VECT, netdev); -+} -+#endif -+ -+#ifdef CONFIG_CPU_FREQ -+static int crisv32_ethernet_freq_notifier(struct notifier_block *nb, -+ unsigned long val, void *data) -+{ -+ struct cpufreq_freqs *freqs = data; -+ int i; -+ if (val != CPUFREQ_POSTCHANGE) -+ return 0; -+ -+ for (i = 0; i < 2; i++) { -+ struct net_device *dev = crisv32_dev[i]; -+ unsigned short data; -+ if (dev == NULL) -+ continue; -+ -+ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, -+ MII_BMCR); -+ if (freqs->new == 200000) -+ data &= ~BMCR_PDOWN; -+ else -+ data |= BMCR_PDOWN; -+ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, -+ MII_BMCR, data); -+ } -+ return 0; -+} -+#endif -+ -+#if 0 -+/* -+ * Must be called with the np->lock held. -+ */ -+static void crisv32_ethernet_bug(struct net_device *dev) -+{ -+ struct crisv32_ethernet_local *np = netdev_priv(dev); -+ dma_descr_data *dma_pos; -+ dma_descr_data *in_dma_pos; -+ reg_dma_rw_stat stat = {0}; -+ reg_dma_rw_stat in_stat = {0}; -+ int i; -+ -+ /* Get the current output dma position. */ -+ stat = REG_RD(dma, np->dma_out_inst, rw_stat); -+ -+ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst, rw_data)); -+ in_dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_in_inst, rw_data)); -+ in_stat = REG_RD(dma, np->dma_in_inst, rw_stat); -+ -+ printk("%s:\n" -+ "stat.list_state=%x\n" -+ "stat.mode=%x\n" -+ "stat.stream_cmd_src=%x\n" -+ "dma_pos=%x\n" -+ "tx catch=%x active=%x\n" -+ "packets=%d queue=%d sender_started=%d\n" -+ "intr_vect.r_vect=%x\n" -+ "dma.r_masked_intr=%x dma.rw_ack_intr=%x " -+ "dma.r_intr=%x dma.rw_intr_masked=%x\n" -+ "eth.r_stat=%x\n", -+ __func__, -+ stat.list_state, stat.mode, stat.stream_cmd_src, -+ (unsigned int)dma_pos, -+ (unsigned int)&np->catch_tx_desc->descr, -+ (unsigned int)&np->active_tx_desc->descr, -+ np->txpackets, -+ netif_queue_stopped(dev), np->sender_started, -+ REG_RD_INT(intr_vect, regi_irq, r_vect), -+ REG_RD_INT(dma, np->dma_out_inst, r_masked_intr), -+ REG_RD_INT(dma, np->dma_out_inst, rw_ack_intr), -+ REG_RD_INT(dma, np->dma_out_inst, r_intr), -+ REG_RD_INT(dma, np->dma_out_inst, rw_intr_mask), -+ REG_RD_INT(eth, np->eth_inst, r_stat)); -+ -+ printk("in_stat.list_state=%x\n" -+ "in_stat.mode=%x\n" -+ "in_stat.stream_cmd_src=%x\n" -+ "in_dma_pos=%x\n" -+ "rx last=%x prev=%x active=%x\n", -+ in_stat.list_state, in_stat.mode, in_stat.stream_cmd_src, -+ (unsigned int)in_dma_pos, -+ (unsigned int)&np->last_rx_desc->descr, -+ (unsigned int)&np->prev_rx_desc->descr, -+ (unsigned int)&np->active_rx_desc->descr); -+ -+#if 0 -+ printk("rx-descriptors:\n"); -+ for (i = 0; i < NBR_RX_DESC; i++) { -+ printk("rxdesc[%d]=0x%x\n", i, (unsigned int) -+ virt_to_phys(&np->dma_rx_descr_list[i].descr)); -+ printk("rxdesc[%d].skb=0x%x\n", i, -+ (unsigned int)np->dma_rx_descr_list[i].skb); -+ printk("rxdesc[%d].buf=0x%x\n", i, -+ (unsigned int)np->dma_rx_descr_list[i].descr.buf); -+ printk("rxdesc[%d].after=0x%x\n", i, -+ (unsigned int)np->dma_rx_descr_list[i].descr.after); -+ printk("rxdesc[%d].intr=%x\n", i, -+ np->dma_rx_descr_list[i].descr.intr); -+ printk("rxdesc[%d].eol=%x\n", i, -+ np->dma_rx_descr_list[i].descr.eol); -+ printk("rxdesc[%d].out_eop=%x\n", i, -+ np->dma_rx_descr_list[i].descr.out_eop); -+ printk("rxdesc[%d].in_eop=%x\n", i, -+ np->dma_rx_descr_list[i].descr.in_eop); -+ printk("rxdesc[%d].wait=%x\n", i, -+ np->dma_rx_descr_list[i].descr.wait); -+ } -+#endif -+ -+#if 1 -+ printk("tx-descriptors:\n"); -+ for (i = 0; i < NBR_TX_DESC; i++) { -+ printk("txdesc[%d]=0x%x\n", i, (unsigned int) -+ virt_to_phys(&np->dma_tx_descr_list[i].descr)); -+ printk("txdesc[%d].skb=0x%x\n", i, -+ (unsigned int)np->dma_tx_descr_list[i].skb); -+ printk("txdesc[%d].buf=0x%x\n", i, -+ (unsigned int)np->dma_tx_descr_list[i].descr.buf); -+ printk("txdesc[%d].after=0x%x\n", i, -+ (unsigned int)np->dma_tx_descr_list[i].descr.after); -+ printk("txdesc[%d].intr=%x\n", i, -+ np->dma_tx_descr_list[i].descr.intr); -+ printk("txdesc[%d].eol=%x\n", i, -+ np->dma_tx_descr_list[i].descr.eol); -+ printk("txdesc[%d].out_eop=%x\n", i, -+ np->dma_tx_descr_list[i].descr.out_eop); -+ printk("txdesc[%d].in_eop=%x\n", i, -+ np->dma_tx_descr_list[i].descr.in_eop); -+ printk("txdesc[%d].wait=%x\n", i, -+ np->dma_tx_descr_list[i].descr.wait); -+ } -+#endif -+} -+#endif -+ -+static int __init crisv32_boot_setup(char *str) -+{ -+ struct sockaddr sa = {0}; -+ int i; -+ -+ /* Parse the colon separated Ethernet station address */ -+ for (i = 0; i < ETH_ALEN; i++) { -+ unsigned int tmp; -+ if (sscanf(str + 3*i, "%2x", &tmp) != 1) { -+ printk(KERN_WARNING "Malformed station address"); -+ return 0; -+ } -+ sa.sa_data[i] = (char)tmp; -+ } -+ -+ default_mac_iface0 = sa; -+ return 1; -+} -+ -+__setup("crisv32_eth=", crisv32_boot_setup); -+ -+module_init(crisv32_ethernet_init); -diff --git a/drivers/net/cris/eth_v32.h b/drivers/net/cris/eth_v32.h -new file mode 100644 -index 0000000..b6b0c7c ---- /dev/null -+++ b/drivers/net/cris/eth_v32.h -@@ -0,0 +1,297 @@ -+/* -+ * Definitions for ETRAX FS ethernet driver. -+ * -+ * Copyright (C) 2003, 2004, 2005 Axis Communications. -+ */ -+ -+#ifndef _ETRAX_ETHERNET_H_ -+#define _ETRAX_ETHERNET_H_ -+ -+#include -+ -+#define MAX_MEDIA_DATA_SIZE 1522 /* Max packet size. */ -+ -+#define NBR_RX_DESC 128 /* Number of RX descriptors. */ -+#define NBR_TX_DESC 16 /* Number of TX descriptors. */ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+#define NBR_INTMEM_RX_DESC 16 /* Number of RX descriptors in int. mem. -+ * when running in gigabit mode. -+ * Should be less then NBR_RX_DESC -+ */ -+#define NBR_INTMEM_TX_BUF 4 /* Number of TX buffers in int. mem -+ * when running in gigabit mode. -+ * Should be less than NBR_TX_DESC -+ */ -+#endif -+ -+/* Large packets are sent directly to upper layers while small packets -+ * are copied (to reduce memory waste). The following constant -+ * decides the breakpoint. -+ */ -+#define RX_COPYBREAK (256) -+ -+#define ETHER_HEAD_LEN (14) -+ -+/* -+ * MDIO constants. -+ */ -+#define MDIO_START 0x1 -+#define MDIO_READ 0x2 -+#define MDIO_WRITE 0x1 -+#define MDIO_PREAMBLE 0xfffffffful -+ -+/* Broadcom specific */ -+#define MDIO_AUX_CTRL_STATUS_REG 0x18 -+#define MDIO_BC_FULL_DUPLEX_IND 0x1 -+#define MDIO_BC_SPEED 0x2 -+ -+/* TDK specific */ -+#define MDIO_TDK_DIAGNOSTIC_REG 18 -+#define MDIO_TDK_DIAGNOSTIC_RATE 0x400 -+#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800 -+ -+/*Intel LXT972A specific*/ -+#define MDIO_INT_STATUS_REG_2 0x0011 -+#define MDIO_INT_FULL_DUPLEX_IND ( 0x0001 << 9 ) -+#define MDIO_INT_SPEED ( 0x0001 << 14 ) -+ -+/*National Semiconductor DP83865 specific*/ -+#define MDIO_NAT_LINK_AN_REG 0x11 -+#define MDIO_NAT_1000 (0x0001 << 4) -+#define MDIO_NAT_100 (0x0001 << 3) -+#define MDIO_NAT_FULL_DUPLEX_IND (0x0001 << 1) -+ -+/* Vitesse VCS8641 specific */ -+#define MDIO_VIT_AUX_STAT 0x1c -+#define MDIO_VIT_1000 (0x2 << 3) -+#define MDIO_VIT_100 (0x1 << 3) -+#define MDIO_VIT_10 0 -+#define MDIO_VIT_FD (0x1 << 5) -+ -+/* Davicom DM9161 specific */ -+#define DM9161_OUI 0x606E -+#define MII_DM9161_SCR 0x10 -+#define MII_DM9161_SCR_INIT 0x0610 -+#define MII_DM9161_SCR_RMII 0x0100 -+#define MII_DM9161_10BTCSR 0x12 -+#define MII_DM9161_10BTCSR_INIT 0x7800 -+ -+/* Network flash constants */ -+#define NET_FLASH_TIME (HZ/50) /* 20 ms */ -+#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */ -+#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 seconds. */ -+#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 seconds. */ -+ -+/* Duplex settings. */ -+enum duplex { -+ half, -+ full, -+ autoneg -+}; -+ -+/* Some transceivers requires special handling. */ -+struct transceiver_ops { -+ unsigned int oui; -+ void (*check_speed) (struct net_device * dev); -+ void (*check_duplex) (struct net_device * dev); -+}; -+ -+typedef struct crisv32_eth_descr { -+ dma_descr_data descr __attribute__ ((__aligned__(32))); -+ struct sk_buff *skb; -+ unsigned char *linearized_packet; -+} crisv32_eth_descr; -+ -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+struct tx_buffer_list { -+ struct tx_buffer_list *next; -+ unsigned char *buf; -+ char free; -+}; -+#endif -+ -+/* LED stuff */ -+#define CRIS_LED_GRP_0 0 -+#define CRIS_LED_GRP_1 1 -+#define CRIS_LED_GRP_NONE 2 -+ -+#define CRIS_LED_ACTIVITY 0 -+#define CRIS_LED_NOACTIVITY 1 -+#define CRIS_LED_LINK 2 -+#define CRIS_LED_NOLINK 3 -+ -+struct crisv32_eth_leds { -+ unsigned int ledgrp; -+ int led_active; -+ unsigned long led_next_time; -+ struct timer_list clear_led_timer; -+ spinlock_t led_lock; /* Protect LED state */ -+ int ifisup[2]; -+}; -+ -+#define NET_LED_SET(x,y) \ -+ do { \ -+ if (x == 0) CRIS_LED_NETWORK_GRP0_SET(y); \ -+ if (x == 1) CRIS_LED_NETWORK_GRP1_SET(y); \ -+ } while (0) -+ -+/* Information that need to be kept for each device. */ -+struct crisv32_ethernet_local { -+ /* FIXME: These align attributes don't really help. If they are really -+ * needed alignment has to be enforced at runtime, these objects -+ * are dynamically allocated. */ -+ dma_descr_context ctxt_in __attribute__ ((__aligned__(32))); -+ dma_descr_context ctxt_out __attribute__ ((__aligned__(32))); -+ -+ crisv32_eth_descr dma_rx_descr_list[NBR_RX_DESC]; -+ crisv32_eth_descr dma_tx_descr_list[NBR_TX_DESC]; -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+ struct tx_buffer_list tx_intmem_buf_list[NBR_INTMEM_TX_BUF]; -+ struct tx_buffer_list *intmem_tx_buf_active; -+ struct tx_buffer_list *intmem_tx_buf_catch; -+ int gigabit_mode; -+#endif -+ /* Transmit data path. */ -+ int dma_out_inst; -+ int sender_started; -+ -+ /* TX-ring state. */ -+ crisv32_eth_descr *active_tx_desc; -+ crisv32_eth_descr *prev_tx_desc; -+ crisv32_eth_descr *catch_tx_desc; -+ int txpackets; -+ int retrans; -+ int do_tx_recovery; -+ struct timer_list transmit_timer; -+ -+ /* Receive data path. */ -+ struct napi_struct napi; -+ int dma_in_inst; -+ -+ /* RX-ring state. */ -+ crisv32_eth_descr *active_rx_desc; -+ crisv32_eth_descr *prev_rx_desc; -+ crisv32_eth_descr *last_rx_desc; -+ -+ unsigned long newbuf; -+ u8 new_rx_package; -+ u8 pending_overrun; -+ u8 overrun_set; -+ u8 link; -+ int napi_processing; -+ struct timer_list receive_timer; -+ struct work_struct receive_work; -+ reg_eth_rw_rec_ctrl saved_rec_ctrl; -+ int saved_ga_lo; -+ int saved_ga_hi; -+ int do_rx_recovery; -+ -+ /* Control paths. */ -+ spinlock_t lock; -+ struct net_device *dev; -+ int eth_inst; -+ -+ /* Toggle network LEDs usage at runtime */ -+ int use_leds; -+ struct crisv32_eth_leds *leds; -+ -+ /* PHY control. */ -+ int fixed_phy; -+ spinlock_t transceiver_lock; /* Protect transceiver state. */ -+ struct transceiver_ops *transceiver; -+ struct mii_if_info mii_if; -+ -+ /* Specifies if we should do autonegotiation or not. -+ * TODO: This ad-hoc hack should be removed. Ethtool already supports -+ * this kind of control. -+ */ -+ int autoneg_normal; -+ -+ struct timer_list duplex_timer; -+ int full_duplex; -+ enum duplex current_duplex; -+ -+ struct timer_list speed_timer; -+ int current_speed; /* Speed read from tranceiver */ -+ int current_speed_selection; /* Speed selected by user */ -+ -+ /* Statistics. */ -+ u64 tx_dma_restarts; -+ u64 tx_mac_resets; -+ u64 rx_dma_restarts; -+ u64 rx_dma_timeouts; -+ u64 rx_restarts_dropped; -+ -+ struct net_device_stats stats; -+}; -+ -+/* Function prototypes. */ -+static int crisv32_ethernet_init(void); -+static int crisv32_ethernet_device_init(struct net_device *dev); -+static int crisv32_eth_open(struct net_device *dev); -+static int crisv32_eth_close(struct net_device *dev); -+static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr); -+static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id); -+static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id); -+static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id); -+static int crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev); -+static void crisv32_eth_hw_send_packet(unsigned char *buf, int length, -+ void *priv); -+static void crisv32_eth_do_tx_recovery(struct net_device *dev); -+static void crisv32_eth_set_rx_mode(struct net_device *dev); -+static int crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr, -+ int cmd); -+static int crisv32_eth_set_config(struct net_device *dev, struct ifmap *map); -+#ifdef CONFIG_CRIS_MACH_ARTPEC3 -+static void crisv32_eth_switch_intmem_usage(struct net_device *dev); -+#endif -+static void crisv32_eth_negotiate(struct net_device *dev); -+static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed); -+#ifndef CONFIG_ETRAX_NO_PHY -+static void crisv32_eth_check_duplex(unsigned long idev); -+static void crisv32_eth_check_speed(unsigned long idev); -+#endif -+ -+static void crisv32_eth_set_duplex(struct net_device *dev, enum duplex); -+static int crisv32_eth_probe_transceiver(struct net_device *dev); -+ -+static struct ethtool_ops crisv32_ethtool_ops; -+ -+#ifndef CONFIG_ETRAX_NO_PHY -+static void generic_check_speed(struct net_device *dev); -+static void generic_check_duplex(struct net_device *dev); -+static void broadcom_check_speed(struct net_device *dev); -+static void broadcom_check_duplex(struct net_device *dev); -+static void tdk_check_speed(struct net_device *dev); -+static void tdk_check_duplex(struct net_device *dev); -+static void intel_check_speed(struct net_device *dev); -+static void intel_check_duplex(struct net_device *dev); -+static void national_check_speed(struct net_device *dev); -+static void national_check_duplex(struct net_device *dev); -+static void vitesse_check_speed(struct net_device *dev); -+static void vitesse_check_duplex(struct net_device *dev); -+static void davicom_check_speed(struct net_device *dev); -+static void davicom_check_duplex(struct net_device *dev); -+#endif -+ -+#ifdef CONFIG_NET_POLL_CONTROLLER -+static void crisv32_netpoll(struct net_device *dev); -+#endif -+ -+static void crisv32_clear_network_leds(unsigned long dummy); -+static void crisv32_set_network_leds(int active, struct net_device *dev); -+ -+static int crisv32_eth_get_mdio_reg(struct net_device *dev, -+ int phyid, int reg_num); -+static void crisv32_eth_set_mdio_reg(struct net_device *dev, -+ int phyid, int reg_num, int val); -+static void crisv32_eth_send_mdio_cmd(struct net_device *dev, -+ unsigned short cmd, int write_cmd); -+static void crisv32_eth_send_mdio_bit(struct net_device *dev, -+ unsigned char bit); -+static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev); -+ -+static struct net_device_stats *crisv32_get_stats(struct net_device *dev); -+static void crisv32_start_dma_out(struct crisv32_ethernet_local *np); -+ -+#endif /* _ETRAX_ETHERNET_H_ */ diff --git a/target/cris/qemu-cris/patches/4.1.35/crisv32_ethernet_driver.patch b/target/cris/qemu-cris/patches/4.1.35/crisv32_ethernet_driver.patch new file mode 100644 index 000000000..cd098665e --- /dev/null +++ b/target/cris/qemu-cris/patches/4.1.35/crisv32_ethernet_driver.patch @@ -0,0 +1,4094 @@ +diff --git a/arch/cris/arch-v32/drivers/Kconfig b/arch/cris/arch-v32/drivers/Kconfig +index e6c523c..5737a5b 100644 +--- a/arch/cris/arch-v32/drivers/Kconfig ++++ b/arch/cris/arch-v32/drivers/Kconfig +@@ -8,9 +8,18 @@ config ETRAX_ETHERNET + This option enables the ETRAX FS built-in 10/100Mbit Ethernet + controller. + ++config ETRAX_HAVE_PHY ++ bool "PHY present" ++ default y ++ help ++ Search and use the first PHY available on the MDIO bus. Fail ++ if none is found. Say Y here if you are not in a switched ++ environment (single port device). ++ + config ETRAX_NO_PHY + bool "PHY not present" + depends on ETRAX_ETHERNET ++ default n + help + This option disables all MDIO communication with an ethernet + transceiver connected to the MII interface. This option shall +@@ -18,6 +27,70 @@ config ETRAX_NO_PHY + switch. This option should normally be disabled. If enabled, + speed and duplex will be locked to 100 Mbit and full duplex. + ++config ETRAX_PHY_FALLBACK ++ bool "Fixed PHY fallback" ++ depends on ETRAX_ETHERNET ++ default n ++ help ++ If no PHY is found on the MDIO bus, fall back on a fixed ++ 100/Full fixed PHY. Say Y here if you need dynamic PHY ++ presence detection (switch connection where some but not ++ all ports have integrated PHYs), otherwise say N. ++ ++config ETRAX_ETHERNET_IFACE0 ++ depends on ETRAX_ETHERNET ++ bool "Enable network interface 0" ++ ++config ETRAX_ETHERNET_IFACE1 ++ depends on (ETRAX_ETHERNET && ETRAXFS) ++ bool "Enable network interface 1 (uses DMA6 and DMA7)" ++ ++choice ++ prompt "Eth0 led group" ++ depends on ETRAX_ETHERNET_IFACE0 ++ default ETRAX_ETH0_USE_LEDGRP0 ++ ++config ETRAX_ETH0_USE_LEDGRP0 ++ bool "Use LED grp 0" ++ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO ++ help ++ Use LED grp 0 for eth0 ++ ++config ETRAX_ETH0_USE_LEDGRP1 ++ bool "Use LED grp 1" ++ depends on ETRAX_NBR_LED_GRP_TWO ++ help ++ Use LED grp 1 for eth0 ++ ++config ETRAX_ETH0_USE_LEDGRPNULL ++ bool "Use no LEDs for eth0" ++ help ++ Use no LEDs for eth0 ++endchoice ++ ++choice ++ prompt "Eth1 led group" ++ depends on ETRAX_ETHERNET_IFACE1 ++ default ETRAX_ETH1_USE_LEDGRP1 ++ ++config ETRAX_ETH1_USE_LEDGRP0 ++ bool "Use LED grp 0" ++ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO ++ help ++ Use LED grp 0 for eth1 ++ ++config ETRAX_ETH1_USE_LEDGRP1 ++ bool "Use LED grp 1" ++ depends on ETRAX_NBR_LED_GRP_TWO ++ help ++ Use LED grp 1 for eth1 ++ ++config ETRAX_ETH1_USE_LEDGRPNULL ++ bool "Use no LEDs for eth1" ++ help ++ Use no LEDs for eth1 ++endchoice ++ + config ETRAXFS_SERIAL + bool "Serial-port support" + depends on ETRAX_ARCH_V32 +diff --git a/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h b/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h +index 90fe8a2..37bec9a 100644 +--- a/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h ++++ b/arch/cris/include/arch-v32/arch/hwregs/eth_defs.h +@@ -2,69 +2,64 @@ + #define __eth_defs_h + + /* +- * This file is autogenerated from +- * file: eth.r +- * id: eth_regs.r,v 1.16 2005/05/20 15:41:22 perz Exp +- * last modfied: Mon Jan 9 06:06:41 2006 +- * +- * by /n/asic/design/tools/rdesc/rdes2c eth.r +- * id: $Id: eth_defs.h,v 1.7 2006/01/26 13:45:30 karljope Exp $ +- * Any changes here will be lost. +- * +- * -*- buffer-read-only: t -*- ++ * Note: Previously this was autogenerated code from the hardware ++ * implementation. However, to enable the same file to be used ++ * for both ARTPEC-3 and ETRAX FS this file is now hand-edited. ++ * Be careful. + */ ++ + /* Main access macros */ + #ifndef REG_RD + #define REG_RD( scope, inst, reg ) \ +- REG_READ( reg_##scope##_##reg, \ +- (inst) + REG_RD_ADDR_##scope##_##reg ) ++ REG_READ( reg_##scope##_##reg, \ ++ (inst) + REG_RD_ADDR_##scope##_##reg ) + #endif + + #ifndef REG_WR + #define REG_WR( scope, inst, reg, val ) \ +- REG_WRITE( reg_##scope##_##reg, \ +- (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) ++ REG_WRITE( reg_##scope##_##reg, \ ++ (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) + #endif + + #ifndef REG_RD_VECT + #define REG_RD_VECT( scope, inst, reg, index ) \ +- REG_READ( reg_##scope##_##reg, \ +- (inst) + REG_RD_ADDR_##scope##_##reg + \ +- (index) * STRIDE_##scope##_##reg ) ++ REG_READ( reg_##scope##_##reg, \ ++ (inst) + REG_RD_ADDR_##scope##_##reg + \ ++ (index) * STRIDE_##scope##_##reg ) + #endif + + #ifndef REG_WR_VECT + #define REG_WR_VECT( scope, inst, reg, index, val ) \ +- REG_WRITE( reg_##scope##_##reg, \ +- (inst) + REG_WR_ADDR_##scope##_##reg + \ +- (index) * STRIDE_##scope##_##reg, (val) ) ++ REG_WRITE( reg_##scope##_##reg, \ ++ (inst) + REG_WR_ADDR_##scope##_##reg + \ ++ (index) * STRIDE_##scope##_##reg, (val) ) + #endif + + #ifndef REG_RD_INT + #define REG_RD_INT( scope, inst, reg ) \ +- REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) ++ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) + #endif + + #ifndef REG_WR_INT + #define REG_WR_INT( scope, inst, reg, val ) \ +- REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) ++ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) + #endif + + #ifndef REG_RD_INT_VECT + #define REG_RD_INT_VECT( scope, inst, reg, index ) \ +- REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ +- (index) * STRIDE_##scope##_##reg ) ++ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ ++ (index) * STRIDE_##scope##_##reg ) + #endif + + #ifndef REG_WR_INT_VECT + #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ +- REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ +- (index) * STRIDE_##scope##_##reg, (val) ) ++ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ ++ (index) * STRIDE_##scope##_##reg, (val) ) + #endif + + #ifndef REG_TYPE_CONV + #define REG_TYPE_CONV( type, orgtype, val ) \ +- ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) ++ ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) + #endif + + #ifndef reg_page_size +@@ -73,306 +68,332 @@ + + #ifndef REG_ADDR + #define REG_ADDR( scope, inst, reg ) \ +- ( (inst) + REG_RD_ADDR_##scope##_##reg ) ++ ( (inst) + REG_RD_ADDR_##scope##_##reg ) + #endif + + #ifndef REG_ADDR_VECT + #define REG_ADDR_VECT( scope, inst, reg, index ) \ +- ( (inst) + REG_RD_ADDR_##scope##_##reg + \ +- (index) * STRIDE_##scope##_##reg ) ++ ( (inst) + REG_RD_ADDR_##scope##_##reg + \ ++ (index) * STRIDE_##scope##_##reg ) + #endif + + /* C-code for register scope eth */ + + /* Register rw_ma0_lo, scope eth, type rw */ + typedef struct { +- unsigned int addr : 32; ++ unsigned int addr : 32; + } reg_eth_rw_ma0_lo; + #define REG_RD_ADDR_eth_rw_ma0_lo 0 + #define REG_WR_ADDR_eth_rw_ma0_lo 0 + + /* Register rw_ma0_hi, scope eth, type rw */ + typedef struct { +- unsigned int addr : 16; +- unsigned int dummy1 : 16; ++ unsigned int addr : 16; ++ unsigned int dummy1 : 16; + } reg_eth_rw_ma0_hi; + #define REG_RD_ADDR_eth_rw_ma0_hi 4 + #define REG_WR_ADDR_eth_rw_ma0_hi 4 + + /* Register rw_ma1_lo, scope eth, type rw */ + typedef struct { +- unsigned int addr : 32; ++ unsigned int addr : 32; + } reg_eth_rw_ma1_lo; + #define REG_RD_ADDR_eth_rw_ma1_lo 8 + #define REG_WR_ADDR_eth_rw_ma1_lo 8 + + /* Register rw_ma1_hi, scope eth, type rw */ + typedef struct { +- unsigned int addr : 16; +- unsigned int dummy1 : 16; ++ unsigned int addr : 16; ++ unsigned int dummy1 : 16; + } reg_eth_rw_ma1_hi; + #define REG_RD_ADDR_eth_rw_ma1_hi 12 + #define REG_WR_ADDR_eth_rw_ma1_hi 12 + + /* Register rw_ga_lo, scope eth, type rw */ + typedef struct { +- unsigned int tbl : 32; ++ unsigned int table : 32; + } reg_eth_rw_ga_lo; + #define REG_RD_ADDR_eth_rw_ga_lo 16 + #define REG_WR_ADDR_eth_rw_ga_lo 16 + + /* Register rw_ga_hi, scope eth, type rw */ + typedef struct { +- unsigned int tbl : 32; ++ unsigned int table : 32; + } reg_eth_rw_ga_hi; + #define REG_RD_ADDR_eth_rw_ga_hi 20 + #define REG_WR_ADDR_eth_rw_ga_hi 20 + + /* Register rw_gen_ctrl, scope eth, type rw */ + typedef struct { +- unsigned int en : 1; +- unsigned int phy : 2; +- unsigned int protocol : 1; +- unsigned int loopback : 1; +- unsigned int flow_ctrl : 1; +- unsigned int gtxclk_out : 1; +- unsigned int phyrst_n : 1; +- unsigned int dummy1 : 24; ++ unsigned int en : 1; ++ unsigned int phy : 2; ++ unsigned int protocol : 1; ++ unsigned int loopback : 1; ++ unsigned int flow_ctrl : 1; ++ unsigned int gtxclk_out : 1; ++ unsigned int phyrst_n : 1; ++ unsigned int dummy1 : 24; + } reg_eth_rw_gen_ctrl; + #define REG_RD_ADDR_eth_rw_gen_ctrl 24 + #define REG_WR_ADDR_eth_rw_gen_ctrl 24 + + /* Register rw_rec_ctrl, scope eth, type rw */ + typedef struct { +- unsigned int ma0 : 1; +- unsigned int ma1 : 1; +- unsigned int individual : 1; +- unsigned int broadcast : 1; +- unsigned int undersize : 1; +- unsigned int oversize : 1; +- unsigned int bad_crc : 1; +- unsigned int duplex : 1; +- unsigned int max_size : 16; +- unsigned int dummy1 : 8; ++ unsigned int ma0 : 1; ++ unsigned int ma1 : 1; ++ unsigned int individual : 1; ++ unsigned int broadcast : 1; ++ unsigned int undersize : 1; ++ unsigned int oversize : 1; ++ unsigned int bad_crc : 1; ++ unsigned int duplex : 1; ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ unsigned int max_size : 16; ++ unsigned int dummy1 : 8; ++#else ++ unsigned int max_size : 1; ++ unsigned int dummy1 : 23; ++#endif + } reg_eth_rw_rec_ctrl; + #define REG_RD_ADDR_eth_rw_rec_ctrl 28 + #define REG_WR_ADDR_eth_rw_rec_ctrl 28 + + /* Register rw_tr_ctrl, scope eth, type rw */ + typedef struct { +- unsigned int crc : 1; +- unsigned int pad : 1; +- unsigned int retry : 1; +- unsigned int ignore_col : 1; +- unsigned int cancel : 1; +- unsigned int hsh_delay : 1; +- unsigned int ignore_crs : 1; +- unsigned int carrier_ext : 1; +- unsigned int dummy1 : 24; ++ unsigned int crc : 1; ++ unsigned int pad : 1; ++ unsigned int retry : 1; ++ unsigned int ignore_col : 1; ++ unsigned int cancel : 1; ++ unsigned int hsh_delay : 1; ++ unsigned int ignore_crs : 1; ++ unsigned int carrier_ext : 1; ++ unsigned int dummy1 : 24; + } reg_eth_rw_tr_ctrl; + #define REG_RD_ADDR_eth_rw_tr_ctrl 32 + #define REG_WR_ADDR_eth_rw_tr_ctrl 32 + + /* Register rw_clr_err, scope eth, type rw */ + typedef struct { +- unsigned int clr : 1; +- unsigned int dummy1 : 31; ++ unsigned int clr : 1; ++ unsigned int dummy1 : 31; + } reg_eth_rw_clr_err; + #define REG_RD_ADDR_eth_rw_clr_err 36 + #define REG_WR_ADDR_eth_rw_clr_err 36 + + /* Register rw_mgm_ctrl, scope eth, type rw */ + typedef struct { +- unsigned int mdio : 1; +- unsigned int mdoe : 1; +- unsigned int mdc : 1; +- unsigned int dummy1 : 29; ++ unsigned int mdio : 1; ++ unsigned int mdoe : 1; ++ unsigned int mdc : 1; ++ unsigned int phyclk : 1; ++ unsigned int txdata : 4; ++ unsigned int txen : 1; ++ unsigned int dummy1 : 23; + } reg_eth_rw_mgm_ctrl; + #define REG_RD_ADDR_eth_rw_mgm_ctrl 40 + #define REG_WR_ADDR_eth_rw_mgm_ctrl 40 + + /* Register r_stat, scope eth, type r */ + typedef struct { +- unsigned int mdio : 1; +- unsigned int exc_col : 1; +- unsigned int urun : 1; +- unsigned int clk_125 : 1; +- unsigned int dummy1 : 28; ++ unsigned int mdio : 1; ++ unsigned int exc_col : 1; ++ unsigned int urun : 1; ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ unsigned int clk_125 : 1; ++#else ++ unsigned int phyclk : 1; ++#endif ++ unsigned int txdata : 4; ++ unsigned int txen : 1; ++ unsigned int col : 1; ++ unsigned int crs : 1; ++ unsigned int txclk : 1; ++ unsigned int rxdata : 4; ++ unsigned int rxer : 1; ++ unsigned int rxdv : 1; ++ unsigned int rxclk : 1; ++ unsigned int dummy1 : 13; + } reg_eth_r_stat; + #define REG_RD_ADDR_eth_r_stat 44 + + /* Register rs_rec_cnt, scope eth, type rs */ + typedef struct { +- unsigned int crc_err : 8; +- unsigned int align_err : 8; +- unsigned int oversize : 8; +- unsigned int congestion : 8; ++ unsigned int crc_err : 8; ++ unsigned int align_err : 8; ++ unsigned int oversize : 8; ++ unsigned int congestion : 8; + } reg_eth_rs_rec_cnt; + #define REG_RD_ADDR_eth_rs_rec_cnt 48 + + /* Register r_rec_cnt, scope eth, type r */ + typedef struct { +- unsigned int crc_err : 8; +- unsigned int align_err : 8; +- unsigned int oversize : 8; +- unsigned int congestion : 8; ++ unsigned int crc_err : 8; ++ unsigned int align_err : 8; ++ unsigned int oversize : 8; ++ unsigned int congestion : 8; + } reg_eth_r_rec_cnt; + #define REG_RD_ADDR_eth_r_rec_cnt 52 + + /* Register rs_tr_cnt, scope eth, type rs */ + typedef struct { +- unsigned int single_col : 8; +- unsigned int mult_col : 8; +- unsigned int late_col : 8; +- unsigned int deferred : 8; ++ unsigned int single_col : 8; ++ unsigned int mult_col : 8; ++ unsigned int late_col : 8; ++ unsigned int deferred : 8; + } reg_eth_rs_tr_cnt; + #define REG_RD_ADDR_eth_rs_tr_cnt 56 + + /* Register r_tr_cnt, scope eth, type r */ + typedef struct { +- unsigned int single_col : 8; +- unsigned int mult_col : 8; +- unsigned int late_col : 8; +- unsigned int deferred : 8; ++ unsigned int single_col : 8; ++ unsigned int mult_col : 8; ++ unsigned int late_col : 8; ++ unsigned int deferred : 8; + } reg_eth_r_tr_cnt; + #define REG_RD_ADDR_eth_r_tr_cnt 60 + + /* Register rs_phy_cnt, scope eth, type rs */ + typedef struct { +- unsigned int carrier_loss : 8; +- unsigned int sqe_err : 8; +- unsigned int dummy1 : 16; ++ unsigned int carrier_loss : 8; ++ unsigned int sqe_err : 8; ++ unsigned int dummy1 : 16; + } reg_eth_rs_phy_cnt; + #define REG_RD_ADDR_eth_rs_phy_cnt 64 + + /* Register r_phy_cnt, scope eth, type r */ + typedef struct { +- unsigned int carrier_loss : 8; +- unsigned int sqe_err : 8; +- unsigned int dummy1 : 16; ++ unsigned int carrier_loss : 8; ++ unsigned int sqe_err : 8; ++ unsigned int dummy1 : 16; + } reg_eth_r_phy_cnt; + #define REG_RD_ADDR_eth_r_phy_cnt 68 + + /* Register rw_test_ctrl, scope eth, type rw */ + typedef struct { +- unsigned int snmp_inc : 1; +- unsigned int snmp : 1; +- unsigned int backoff : 1; +- unsigned int dummy1 : 29; ++ unsigned int snmp_inc : 1; ++ unsigned int snmp : 1; ++ unsigned int backoff : 1; ++ unsigned int dummy1 : 29; + } reg_eth_rw_test_ctrl; + #define REG_RD_ADDR_eth_rw_test_ctrl 72 + #define REG_WR_ADDR_eth_rw_test_ctrl 72 + + /* Register rw_intr_mask, scope eth, type rw */ + typedef struct { +- unsigned int crc : 1; +- unsigned int align : 1; +- unsigned int oversize : 1; +- unsigned int congestion : 1; +- unsigned int single_col : 1; +- unsigned int mult_col : 1; +- unsigned int late_col : 1; +- unsigned int deferred : 1; +- unsigned int carrier_loss : 1; +- unsigned int sqe_test_err : 1; +- unsigned int orun : 1; +- unsigned int urun : 1; +- unsigned int exc_col : 1; +- unsigned int mdio : 1; +- unsigned int dummy1 : 18; ++ unsigned int crc : 1; ++ unsigned int align : 1; ++ unsigned int oversize : 1; ++ unsigned int congestion : 1; ++ unsigned int single_col : 1; ++ unsigned int mult_col : 1; ++ unsigned int late_col : 1; ++ unsigned int deferred : 1; ++ unsigned int carrier_loss : 1; ++ unsigned int sqe_test_err : 1; ++ unsigned int orun : 1; ++ unsigned int urun : 1; ++ unsigned int exc_col : 1; ++ unsigned int mdio : 1; ++ unsigned int dummy1 : 18; + } reg_eth_rw_intr_mask; + #define REG_RD_ADDR_eth_rw_intr_mask 76 + #define REG_WR_ADDR_eth_rw_intr_mask 76 + + /* Register rw_ack_intr, scope eth, type rw */ + typedef struct { +- unsigned int crc : 1; +- unsigned int align : 1; +- unsigned int oversize : 1; +- unsigned int congestion : 1; +- unsigned int single_col : 1; +- unsigned int mult_col : 1; +- unsigned int late_col : 1; +- unsigned int deferred : 1; +- unsigned int carrier_loss : 1; +- unsigned int sqe_test_err : 1; +- unsigned int orun : 1; +- unsigned int urun : 1; +- unsigned int exc_col : 1; +- unsigned int mdio : 1; +- unsigned int dummy1 : 18; ++ unsigned int crc : 1; ++ unsigned int align : 1; ++ unsigned int oversize : 1; ++ unsigned int congestion : 1; ++ unsigned int single_col : 1; ++ unsigned int mult_col : 1; ++ unsigned int late_col : 1; ++ unsigned int deferred : 1; ++ unsigned int carrier_loss : 1; ++ unsigned int sqe_test_err : 1; ++ unsigned int orun : 1; ++ unsigned int urun : 1; ++ unsigned int exc_col : 1; ++ unsigned int mdio : 1; ++ unsigned int dummy1 : 18; + } reg_eth_rw_ack_intr; + #define REG_RD_ADDR_eth_rw_ack_intr 80 + #define REG_WR_ADDR_eth_rw_ack_intr 80 + + /* Register r_intr, scope eth, type r */ + typedef struct { +- unsigned int crc : 1; +- unsigned int align : 1; +- unsigned int oversize : 1; +- unsigned int congestion : 1; +- unsigned int single_col : 1; +- unsigned int mult_col : 1; +- unsigned int late_col : 1; +- unsigned int deferred : 1; +- unsigned int carrier_loss : 1; +- unsigned int sqe_test_err : 1; +- unsigned int orun : 1; +- unsigned int urun : 1; +- unsigned int exc_col : 1; +- unsigned int mdio : 1; +- unsigned int dummy1 : 18; ++ unsigned int crc : 1; ++ unsigned int align : 1; ++ unsigned int oversize : 1; ++ unsigned int congestion : 1; ++ unsigned int single_col : 1; ++ unsigned int mult_col : 1; ++ unsigned int late_col : 1; ++ unsigned int deferred : 1; ++ unsigned int carrier_loss : 1; ++ unsigned int sqe_test_err : 1; ++ unsigned int orun : 1; ++ unsigned int urun : 1; ++ unsigned int exc_col : 1; ++ unsigned int mdio : 1; ++ unsigned int dummy1 : 18; + } reg_eth_r_intr; + #define REG_RD_ADDR_eth_r_intr 84 + + /* Register r_masked_intr, scope eth, type r */ + typedef struct { +- unsigned int crc : 1; +- unsigned int align : 1; +- unsigned int oversize : 1; +- unsigned int congestion : 1; +- unsigned int single_col : 1; +- unsigned int mult_col : 1; +- unsigned int late_col : 1; +- unsigned int deferred : 1; +- unsigned int carrier_loss : 1; +- unsigned int sqe_test_err : 1; +- unsigned int orun : 1; +- unsigned int urun : 1; +- unsigned int exc_col : 1; +- unsigned int mdio : 1; +- unsigned int dummy1 : 18; ++ unsigned int crc : 1; ++ unsigned int align : 1; ++ unsigned int oversize : 1; ++ unsigned int congestion : 1; ++ unsigned int single_col : 1; ++ unsigned int mult_col : 1; ++ unsigned int late_col : 1; ++ unsigned int deferred : 1; ++ unsigned int carrier_loss : 1; ++ unsigned int sqe_test_err : 1; ++ unsigned int orun : 1; ++ unsigned int urun : 1; ++ unsigned int exc_col : 1; ++ unsigned int mdio : 1; ++ unsigned int dummy1 : 18; + } reg_eth_r_masked_intr; + #define REG_RD_ADDR_eth_r_masked_intr 88 + +- + /* Constants */ + enum { +- regk_eth_discard = 0x00000000, +- regk_eth_ether = 0x00000000, +- regk_eth_full = 0x00000001, +- regk_eth_gmii = 0x00000003, +- regk_eth_gtxclk = 0x00000001, +- regk_eth_half = 0x00000000, +- regk_eth_hsh = 0x00000001, +- regk_eth_mii = 0x00000001, +- regk_eth_mii_arec = 0x00000002, +- regk_eth_mii_clk = 0x00000000, +- regk_eth_no = 0x00000000, +- regk_eth_phyrst = 0x00000000, +- regk_eth_rec = 0x00000001, +- regk_eth_rw_ga_hi_default = 0x00000000, +- regk_eth_rw_ga_lo_default = 0x00000000, +- regk_eth_rw_gen_ctrl_default = 0x00000000, +- regk_eth_rw_intr_mask_default = 0x00000000, +- regk_eth_rw_ma0_hi_default = 0x00000000, +- regk_eth_rw_ma0_lo_default = 0x00000000, +- regk_eth_rw_ma1_hi_default = 0x00000000, +- regk_eth_rw_ma1_lo_default = 0x00000000, +- regk_eth_rw_mgm_ctrl_default = 0x00000000, +- regk_eth_rw_test_ctrl_default = 0x00000000, +- regk_eth_size1518 = 0x000005ee, +- regk_eth_size1522 = 0x000005f2, +- regk_eth_yes = 0x00000001 ++ regk_eth_discard = 0x00000000, ++ regk_eth_ether = 0x00000000, ++ regk_eth_full = 0x00000001, ++ regk_eth_gmii = 0x00000003, ++ regk_eth_gtxclk = 0x00000001, ++ regk_eth_half = 0x00000000, ++ regk_eth_hsh = 0x00000001, ++ regk_eth_mii = 0x00000001, ++ regk_eth_mii_arec = 0x00000002, ++ regk_eth_mii_clk = 0x00000000, ++ regk_eth_no = 0x00000000, ++ regk_eth_phyrst = 0x00000000, ++ regk_eth_rec = 0x00000001, ++ regk_eth_rw_ga_hi_default = 0x00000000, ++ regk_eth_rw_ga_lo_default = 0x00000000, ++ regk_eth_rw_gen_ctrl_default = 0x00000000, ++ regk_eth_rw_intr_mask_default = 0x00000000, ++ regk_eth_rw_ma0_hi_default = 0x00000000, ++ regk_eth_rw_ma0_lo_default = 0x00000000, ++ regk_eth_rw_ma1_hi_default = 0x00000000, ++ regk_eth_rw_ma1_lo_default = 0x00000000, ++ regk_eth_rw_mgm_ctrl_default = 0x00000000, ++ regk_eth_rw_test_ctrl_default = 0x00000000, ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ regk_eth_size1518 = 0x000005ee, ++ regk_eth_size1522 = 0x000005f2, ++#else ++ regk_eth_size1518 = 0x00000000, ++ regk_eth_size1522 = 0x00000001, ++#endif ++ regk_eth_yes = 0x00000001 + }; ++ + #endif /* __eth_defs_h */ +diff --git a/drivers/net/cris/Makefile b/drivers/net/cris/Makefile +index b4e8932..39b4d4d 100644 +--- a/drivers/net/cris/Makefile ++++ b/drivers/net/cris/Makefile +@@ -1 +1,2 @@ + obj-$(CONFIG_ETRAX_ARCH_V10) += eth_v10.o ++obj-$(CONFIG_ETRAX_ARCH_V32) += eth_v32.o +diff --git a/drivers/net/cris/eth_v32.c b/drivers/net/cris/eth_v32.c +new file mode 100644 +index 0000000..92c4cae +--- /dev/null ++++ b/drivers/net/cris/eth_v32.c +@@ -0,0 +1,3093 @@ ++/* ++ * Driver for the ETRAX FS/Artpec-3 network controller. ++ * ++ * Copyright (c) 2003-2008 Axis Communications AB. ++ * ++ * TODO: ++ * * Decrease the amount of code running with interrupts disabled. ++ * * Rework the error handling so that we do not need to touch the tx ++ * ring from the error interrupts. When done, we should be able to ++ * do tx completition from the NAPI loop without disabling interrupts. ++ * * Remove the gigabit code. It's probably never going to be used. ++ */ ++ ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include /* CRIS_LED_* I/O functions */ ++#include ++#include ++#include ++#include ++#include ++#ifdef CONFIG_ETRAXFS ++#include ++#else ++#include ++#endif ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "eth_v32.h" ++ ++#ifndef CONFIG_ETRAXFS ++#define ETH0_INTR_VECT ETH_INTR_VECT ++#define ETH1_INTR_VECT ETH_INTR_VECT ++#define regi_eth0 regi_eth ++#define regi_eth1 regi_ ++#endif ++ ++#define DEBUG(x) ++#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01) ++ ++#if defined(CONFIG_ETRAX_HAVE_PHY) || defined(CONFIG_ETRAX_PHY_FALLBACK) ++#define RESET_PHY 1 ++#else ++#define RESET_PHY 0 ++#endif ++ ++enum { ++ HAVE_PHY, ++ NO_PHY, ++ FALLBACK_PHY, ++}; ++#if defined(CONFIG_ETRAX_PHY_FALLBACK) ++#define PHY_MODE (FALLBACK_PHY) ++#elif defined(CONFIG_ETRAX_NO_PHY) ++#define PHY_MODE (NO_PHY) ++#elif defined(CONFIG_ETRAX_HAVE_PHY) ++#define PHY_MODE (HAVE_PHY) ++#else ++#error Unknown PHY behaviour ++#endif ++ ++static struct { ++ const char str[ETH_GSTRING_LEN]; ++} const ethtool_stats_keys[] = { ++ { "tx_dma_restarts" }, ++ { "tx_mac_resets" }, ++ { "rx_dma_restarts" }, ++ { "rx_dma_timeouts" }, ++ { " dropped_rx" } ++}; ++ ++static void crisv32_eth_check_speed(unsigned long idev); ++static void crisv32_eth_check_duplex(unsigned long idev); ++static void update_rx_stats(struct crisv32_ethernet_local *np); ++static void update_tx_stats(struct crisv32_ethernet_local *np); ++static int crisv32_eth_poll(struct napi_struct *napi, int budget); ++static void crisv32_eth_setup_controller(struct net_device *dev); ++static int crisv32_eth_request_irqdma(struct net_device *dev); ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++static void ++crisv32_eth_restart_rx_dma(struct net_device* dev, ++ struct crisv32_ethernet_local *np); ++#endif ++#if 0 ++static void crisv32_ethernet_bug(struct net_device *dev); ++#endif ++ ++/* ++ * The name of the card. Is used for messages and in the requests for ++ * io regions, irqs and dma channels. ++ */ ++#ifdef CONFIG_ETRAXFS ++static const char cardname[] = "ETRAX FS built-in ethernet controller"; ++#else ++static const char cardname[] = "ARTPEC-3 built-in ethernet controller"; ++#endif ++ ++/* Some chipset needs special care. */ ++#ifndef CONFIG_ETRAX_NO_PHY ++struct transceiver_ops transceivers[] = { ++ {0x1018, broadcom_check_speed, broadcom_check_duplex}, ++ {0x50EF, broadcom_check_speed, broadcom_check_duplex}, ++ /* TDK 2120 and TDK 2120C */ ++ {0xC039, tdk_check_speed, tdk_check_duplex}, ++ {0x039C, tdk_check_speed, tdk_check_duplex}, ++ /* Intel LXT972A*/ ++ {0x04de, intel_check_speed, intel_check_duplex}, ++ /* National Semiconductor DP83865 */ ++ {0x0017, national_check_speed, national_check_duplex}, ++ /* Vitesse VCS8641 */ ++ {0x01c1, vitesse_check_speed, vitesse_check_duplex}, ++ /* Davicom DM9161 */ ++ {0x606E, davicom_check_speed, davicom_check_duplex}, ++ /* Generic, must be last. */ ++ {0x0000, generic_check_speed, generic_check_duplex} ++}; ++#endif ++ ++static struct net_device *crisv32_dev[2]; ++static struct crisv32_eth_leds *crisv32_leds[3]; ++ ++/* Default MAC address for interface 0. ++ * The real one will be set later. */ ++static struct sockaddr default_mac_iface0 = ++ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00}}; ++ ++#ifdef CONFIG_CPU_FREQ ++static int ++crisv32_ethernet_freq_notifier(struct notifier_block *nb, unsigned long val, ++ void *data); ++ ++static struct notifier_block crisv32_ethernet_freq_notifier_block = { ++ .notifier_call = crisv32_ethernet_freq_notifier ++}; ++#endif ++ ++static void receive_timeout(unsigned long arg); ++static void receive_timeout_work(struct work_struct* work); ++static void transmit_timeout(unsigned long arg); ++ ++/* ++ * mask in and out tx/rx interrupts. ++ */ ++static inline void crisv32_disable_tx_ints(struct crisv32_ethernet_local *np) ++{ ++ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_no }; ++ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx); ++} ++ ++static inline void crisv32_enable_tx_ints(struct crisv32_ethernet_local *np) ++{ ++ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_yes }; ++ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx); ++} ++ ++static inline void crisv32_disable_rx_ints(struct crisv32_ethernet_local *np) ++{ ++ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_no }; ++ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx); ++} ++ ++static inline void crisv32_enable_rx_ints(struct crisv32_ethernet_local *np) ++{ ++ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_yes }; ++ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx); ++} ++ ++static inline void crisv32_disable_eth_ints(struct crisv32_ethernet_local *np) ++{ ++ int intr_mask_nw = 0x0; ++ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw); ++} ++ ++static inline void crisv32_enable_eth_ints(struct crisv32_ethernet_local *np) ++{ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ /* For Artpec-3 we use overrun to workaround voodoo TR 87 */ ++ int intr_mask_nw = 0x1c00; ++#else ++ int intr_mask_nw = 0x1800; ++#endif ++ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw); ++} ++ ++static inline int crisv32_eth_gigabit(struct crisv32_ethernet_local *np) ++{ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ return np->gigabit_mode; ++#else ++ return 0; ++#endif ++} ++ ++static inline void crisv32_eth_set_gigabit(struct crisv32_ethernet_local *np, ++ int g) ++{ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ np->gigabit_mode = g; ++#endif ++} ++ ++/* start/stop receiver */ ++static inline void crisv32_start_receiver(struct crisv32_ethernet_local *np) ++{ ++ reg_eth_rw_rec_ctrl rec_ctrl; ++ ++ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ rec_ctrl.ma0 = regk_eth_yes; ++ rec_ctrl.broadcast = regk_eth_rec; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++} ++ ++static inline void crisv32_stop_receiver(struct crisv32_ethernet_local *np) ++{ ++ reg_eth_rw_rec_ctrl rec_ctrl; ++ ++ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ rec_ctrl.ma0 = regk_eth_no; ++ rec_ctrl.broadcast = regk_eth_discard; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++} ++ ++static inline void crisv32_eth_reset(struct crisv32_ethernet_local *np) ++{ ++ reg_eth_rw_gen_ctrl gen_ctrl = { 0 }; ++ ++ gen_ctrl = REG_RD(eth, np->eth_inst, rw_gen_ctrl); ++ gen_ctrl.en = regk_eth_no; ++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); ++ gen_ctrl.en = regk_eth_yes; ++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); ++} ++ ++static void crisv32_eth_tx_cancel_frame(struct crisv32_ethernet_local *np) ++{ ++ reg_eth_rw_tr_ctrl tr_ctrl; ++ ++ /* Cancel any pending transmits. This should bring us to the ++ excessive collisions state but it doesn't always do it. */ ++ tr_ctrl = REG_RD(eth, np->eth_inst, rw_tr_ctrl); ++ tr_ctrl.cancel = 1; ++ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl); ++ tr_ctrl.cancel = 0; ++ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl); ++} ++ ++/* ++ * Hack to disconnect/reconnect the dma from the ethernet block while we reset ++ * things. TODO: verify that we don't need to disconnect out channels and ++ * remove that code. ++ * ++ * ARTPEC-3 has only a single ethernet block so np->eth_inst is always eth0. ++ * The strmux values are named slightly different, redefine to avoid #ifdefs ++ * in the code blocks. For artpec3 only regk_strmux_eth0 and channel 0/1 ++ * should be used. ++ */ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++#define regk_strmux_eth0 regk_strmux_eth ++#define regk_strmux_eth1 regk_strmux_eth ++#endif ++static inline void ++crisv32_disconnect_eth_tx_dma(struct crisv32_ethernet_local *np) ++{ ++ reg_strmux_rw_cfg strmux_cfg; ++ ++ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); ++ if (np->eth_inst == regi_eth0) ++ strmux_cfg.dma0 = regk_strmux_off; ++ else ++ strmux_cfg.dma6 = regk_strmux_off; ++ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); ++} ++ ++static inline void crisv32_connect_eth_tx_dma(struct crisv32_ethernet_local *np) ++{ ++ reg_strmux_rw_cfg strmux_cfg; ++ ++ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); ++ if (np->eth_inst == regi_eth0) ++ strmux_cfg.dma0 = regk_strmux_eth0; ++ else ++ strmux_cfg.dma6 = regk_strmux_eth1; ++ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); ++} ++ ++static inline void ++crisv32_disconnect_eth_rx_dma(struct crisv32_ethernet_local *np) ++{ ++ reg_strmux_rw_cfg strmux_cfg; ++ ++ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); ++ if (np->eth_inst == regi_eth0) ++ strmux_cfg.dma1 = regk_strmux_off; ++ else ++ strmux_cfg.dma7 = regk_strmux_off; ++ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); ++} ++ ++static inline void crisv32_connect_eth_rx_dma(struct crisv32_ethernet_local *np) ++{ ++ reg_strmux_rw_cfg strmux_cfg; ++ ++ strmux_cfg = REG_RD(strmux, regi_strmux, rw_cfg); ++ if (np->eth_inst == regi_eth0) ++ strmux_cfg.dma1 = regk_strmux_eth0; ++ else ++ strmux_cfg.dma7 = regk_strmux_eth1; ++ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg); ++} ++ ++static int dma_wait_busy(int inst, int timeout) ++{ ++ reg_dma_rw_stream_cmd dma_sc; ++ ++ do { ++ dma_sc = REG_RD(dma, inst, rw_stream_cmd); ++ } while (timeout-- > 0 && dma_sc.busy); ++ return dma_sc.busy; ++} ++ ++static int __init crisv32_eth_request_irqdma(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ /* Allocate IRQs and DMAs. */ ++ if (np->eth_inst == regi_eth0) { ++ if (request_irq(DMA0_INTR_VECT, crisv32tx_eth_interrupt, ++ 0, "Ethernet TX", dev)) { ++ return -EAGAIN; ++ } ++ ++ if (request_irq(DMA1_INTR_VECT, crisv32rx_eth_interrupt, ++ 0, "Ethernet RX", dev)) ++ goto err0_1; ++ ++ if (crisv32_request_dma(0, cardname, DMA_VERBOSE_ON_ERROR, ++ 12500000, dma_eth0)) ++ goto err0_2; ++ ++ if (crisv32_request_dma(1, cardname, DMA_VERBOSE_ON_ERROR, ++ 12500000, dma_eth0)) ++ goto err0_3; ++ ++ if (request_irq(ETH0_INTR_VECT, crisv32nw_eth_interrupt, 0, ++ cardname, dev)) { ++ crisv32_free_dma(1); ++err0_3: ++ crisv32_free_dma(0); ++err0_2: ++ free_irq(DMA1_INTR_VECT, dev); ++err0_1: ++ free_irq(DMA0_INTR_VECT, dev); ++ return -EAGAIN; ++ } ++ } else { ++ if (request_irq(DMA6_INTR_VECT, crisv32tx_eth_interrupt, ++ 0, cardname, dev)) ++ return -EAGAIN; ++ ++ if (request_irq(DMA7_INTR_VECT, crisv32rx_eth_interrupt, ++ 0, cardname, dev)) ++ goto err1_1; ++ ++ if (crisv32_request_dma(6, cardname, DMA_VERBOSE_ON_ERROR, ++ 0, dma_eth1)) ++ goto err1_2; ++ ++ if (crisv32_request_dma(7, cardname, DMA_VERBOSE_ON_ERROR, ++ 0, dma_eth1)) ++ goto err1_3; ++ ++ if (request_irq(ETH1_INTR_VECT, crisv32nw_eth_interrupt, 0, ++ cardname, dev)) { ++ crisv32_free_dma(7); ++err1_3: ++ crisv32_free_dma(6); ++err1_2: ++ free_irq(DMA7_INTR_VECT, dev); ++err1_1: ++ free_irq(DMA6_INTR_VECT, dev); ++ return -EAGAIN; ++ } ++ } ++ return 0; ++} ++ ++static int __init crisv32_eth_init_phy(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0); ++ ++ if (RESET_PHY) { ++#ifdef CONFIG_ETRAXFS ++ reg_config_rw_pad_ctrl pad_ctrl; ++ pad_ctrl = REG_RD(config, regi_config, rw_pad_ctrl); ++ pad_ctrl.phyrst_n = 0; ++ REG_WR(config, regi_config, rw_pad_ctrl, pad_ctrl); ++ ++ udelay(500); /* RESET_LEN */ ++ ++ pad_ctrl.phyrst_n = 1; ++ REG_WR(config, regi_config, rw_pad_ctrl, pad_ctrl); ++#else ++ reg_eth_rw_gen_ctrl gen_ctrl = REG_RD(eth, np->eth_inst, rw_gen_ctrl); ++ gen_ctrl.phyrst_n = 0; ++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); ++ ++ udelay(500); /* RESET_LEN */ ++ ++ gen_ctrl.phyrst_n = 1; ++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); ++#endif ++ ++ udelay(200); /* RESET_WAIT */ ++ } ++ ++ switch (PHY_MODE) { ++ case FALLBACK_PHY: ++ /* Fall back on using fixed iff there is no PHY on */ ++ /* the MDIO bus */ ++ np->fixed_phy = crisv32_eth_probe_transceiver(dev) != 0; ++ if (np->fixed_phy) ++ printk(KERN_WARNING ++ "eth: No transciever found, falling back " ++ "to fixed phy mode\n"); ++ break; ++ ++ case NO_PHY: ++ /* Don't even bother looking for a PHY, always rely */ ++ /* on fixed PHY */ ++ np->fixed_phy = 1; ++ break; ++ ++ default: /* HAVE_PHY */ ++ /* Look for a PHY and abort if there is none, */ ++ /* otherwise just carry on */ ++ if (crisv32_eth_probe_transceiver(dev)) { ++ printk(KERN_WARNING ++ "eth: No transceiver found, " ++ "removing interface\n"); ++ return -ENODEV; ++ } ++ np->fixed_phy = 0; ++ } ++ ++ if (np->fixed_phy) { ++ reg_eth_rw_rec_ctrl rec_ctrl; ++ ++ /* speed */ ++ np->current_speed = 100; ++ np->current_speed_selection = 100; /* Auto. */ ++ ++ /* duplex */ ++ np->full_duplex = 1; ++ np->current_duplex = full; ++ ++ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ rec_ctrl.duplex = regk_eth_full; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ } else { ++ np->mii_if.supports_gmii = mii_check_gmii_support(&np->mii_if); ++ ++ /* speed */ ++ np->current_speed = 10; ++ np->current_speed_selection = 0; /* Auto. */ ++ np->speed_timer = timer_init; ++ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; ++ np->speed_timer.data = (unsigned long) dev; ++ np->speed_timer.function = crisv32_eth_check_speed; ++ ++ /* duplex */ ++ np->full_duplex = 0; ++ np->current_duplex = autoneg; ++ np->duplex_timer = timer_init; ++ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; ++ np->duplex_timer.data = (unsigned long) dev; ++ np->duplex_timer.function = crisv32_eth_check_duplex; ++ } ++ ++ return 0; ++} ++ ++static void __init crisv32_eth_setup_controller(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ reg_eth_rw_gen_ctrl gen_ctrl; ++ ++ reg_eth_rw_tr_ctrl tr_ctrl = { ++ /* SW retransmits to avoid transmitter bugs. */ ++ .retry = regk_eth_no, ++ .pad = regk_eth_yes, ++ .crc = regk_eth_yes ++ }; ++ ++ reg_eth_rw_rec_ctrl rec_ctrl = { ++ .ma0 = regk_eth_no, /* enable at open() */ ++ .broadcast = regk_eth_no, ++ .max_size = regk_eth_size1522 ++ }; ++ ++ reg_eth_rw_ga_lo ga_lo = { 0 }; ++ reg_eth_rw_ga_hi ga_hi = { 0 }; ++ ++ /* ++ * Initialize group address registers to make sure that no ++ * unwanted addresses are matched. ++ */ ++ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo); ++ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi); ++ ++ /* Configure receiver and transmitter */ ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl); ++ ++ /* ++ * Read from rw_gen_ctrl so that we don't override any previous ++ * configuration. ++ */ ++ gen_ctrl = REG_RD(eth, np->eth_inst, rw_gen_ctrl); ++ gen_ctrl.phy = regk_eth_mii_clk; ++#ifdef CONFIG_ETRAXFS ++ /* On ETRAX FS, this bit has reversed meaning */ ++ gen_ctrl.flow_ctrl = regk_eth_no; ++#else ++ gen_ctrl.flow_ctrl = regk_eth_yes; ++#endif ++ ++ /* Enable ethernet controller with mii clk. */ ++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); ++ gen_ctrl.en = regk_eth_yes; ++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl); ++} ++ ++static void crisv32_eth_reset_rx_ring(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ int i; ++ ++ /* cleanup the rx-ring */ ++ for (i = 0; i < NBR_RX_DESC; i++) { ++ struct sk_buff *skb; ++ skb = np->dma_rx_descr_list[i].skb; ++ if (!skb ++ || (np->dma_rx_descr_list[i].descr.buf != ++ (void *)virt_to_phys(skb->data))) { ++ if (skb) ++ dev_kfree_skb(skb); ++ skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE); ++ np->dma_rx_descr_list[i].skb = skb; ++ np->dma_rx_descr_list[i].descr.buf = ++ (char*)virt_to_phys(skb->data); ++ } ++ if (np->dma_rx_descr_list[i].descr.in_eop) ++ np->rx_restarts_dropped++; ++ np->dma_rx_descr_list[i].descr.after = ++ (char*)virt_to_phys(skb->data ++ + MAX_MEDIA_DATA_SIZE); ++ np->dma_rx_descr_list[i].descr.eol = 0; ++ np->dma_rx_descr_list[i].descr.in_eop = 0; ++ /* Workaround cache bug */ ++ flush_dma_descr(&np->dma_rx_descr_list[i].descr, 1); ++ } ++ ++ /* reset rx-ring */ ++ np->active_rx_desc = &np->dma_rx_descr_list[0]; ++ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_RX_DESC - 1]; ++ np->last_rx_desc = np->prev_rx_desc; ++ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.eol = 1; ++ flush_dma_descr(&np->dma_rx_descr_list[NBR_RX_DESC - 1].descr, 0); ++ /* ready to accept new packets. */ ++ np->new_rx_package = 1; ++ ++ /* Fill context descriptors. */ ++ np->ctxt_in.next = 0; ++ np->ctxt_in.saved_data = ++ (void *)virt_to_phys(&np->active_rx_desc->descr); ++ np->ctxt_in.saved_data_buf = np->active_rx_desc->descr.buf; ++} ++ ++static inline int crisv32_eth_tx_ring_full(struct crisv32_ethernet_local *np) ++{ ++ crisv32_eth_descr *active = np->active_tx_desc; ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ active = phys_to_virt((unsigned long)active->descr.next); ++#endif ++ if (active == np->catch_tx_desc) ++ return 1; ++ return 0; ++} ++ ++static void crisv32_eth_reset_tx_ring(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ /* free un-handled tx packets */ ++ while (np->txpackets || np->catch_tx_desc != np->active_tx_desc) { ++ np->txpackets--; ++ if (np->catch_tx_desc->skb) ++ dev_kfree_skb(np->catch_tx_desc->skb); ++ ++ np->catch_tx_desc->skb = 0; ++ np->catch_tx_desc = ++ phys_to_virt((int)np->catch_tx_desc->descr.next); ++ } ++ ++ WARN_ON(np->txpackets != 0); ++ np->txpackets = 0; ++ ++ /* reset tx-ring */ ++ np->dma_tx_descr_list[0].descr.buf = ++ np->dma_tx_descr_list[0].descr.after = 0; ++ np->dma_tx_descr_list[0].descr.eol = 1; ++ ++ np->active_tx_desc = &np->dma_tx_descr_list[0]; ++ np->prev_tx_desc = &np->dma_tx_descr_list[NBR_TX_DESC - 1]; ++ np->catch_tx_desc = &np->dma_tx_descr_list[0]; ++ ++ np->ctxt_out.next = 0; ++ np->ctxt_out.saved_data = ++ (void *)virt_to_phys(&np->dma_tx_descr_list[0].descr); ++ ++} ++ ++static void crisv32_eth_reset_rings(struct net_device *dev) ++{ ++ crisv32_eth_reset_tx_ring(dev); ++ crisv32_eth_reset_rx_ring(dev); ++} ++ ++/* ++ * Really advance the receive ring. RX interrupts must be off. ++ */ ++static void __crisv32_eth_rx_ring_advance(struct crisv32_ethernet_local *np) ++{ ++ if (np->newbuf) ++ np->active_rx_desc->descr.buf = (void *) np->newbuf; ++ np->active_rx_desc->descr.after = ++ np->active_rx_desc->descr.buf + MAX_MEDIA_DATA_SIZE; ++ np->active_rx_desc->descr.eol = 1; ++ np->active_rx_desc->descr.in_eop = 0; ++ np->active_rx_desc = phys_to_virt((int)np->active_rx_desc->descr.next); ++ barrier(); ++ np->prev_rx_desc->descr.eol = 0; ++ ++ /* Workaround cache bug. */ ++ flush_dma_descr(&np->prev_rx_desc->descr, 0); ++ np->prev_rx_desc = phys_to_virt((int)np->prev_rx_desc->descr.next); ++ flush_dma_descr(&np->prev_rx_desc->descr, 1); ++} ++ ++/* ++ * Advance the receive ring. RX interrupts must be off. ++ */ ++static inline void ++crisv32_eth_rx_ring_advance(struct crisv32_ethernet_local *np) ++{ ++ /* ++ * When the input DMA reaches eol precaution must be taken, otherwise ++ * the DMA could stop. The problem occurs if the eol flag is re-placed ++ * on the descriptor that the DMA stands on before the DMA proceed to ++ * the next descriptor. This case could, for example, happen if there ++ * is a traffic burst and then the network goes silent. To prevent this ++ * we make sure that we do not set the eol flag on the descriptor that ++ * the DMA stands on. ++ */ ++ unsigned long dma_pos; ++ ++ /* Get the current input dma position. */ ++ dma_pos = REG_RD_INT(dma, np->dma_in_inst, rw_saved_data); ++ ++ if (virt_to_phys(&np->active_rx_desc->descr) != dma_pos) { ++ crisv32_eth_descr *cur, *nxt; ++ ++ /* Now really advance the ring one step. */ ++ __crisv32_eth_rx_ring_advance(np); ++ ++ cur = np->active_rx_desc; ++ nxt = (void *)phys_to_virt((unsigned long)cur->descr.next); ++ flush_dma_descr(&cur->descr, 0); ++ flush_dma_descr(&nxt->descr, 0); ++ if (!cur->descr.in_eop && nxt->descr.in_eop) { ++ /* TODO: Investigate this more. The DMA seems to have ++ skipped a descriptor, possibly due to incoherence ++ between the CPU L1 cache and the DMA updates to the ++ descriptor. */ ++ np->newbuf = (unsigned long) np->active_rx_desc->descr.buf; ++ __crisv32_eth_rx_ring_advance(np); ++ } ++ /* flush after peek. */ ++ flush_dma_descr(&cur->descr, 0); ++ flush_dma_descr(&nxt->descr, 0); ++ } else { ++ /* delay the advancing of the ring. */ ++ np->new_rx_package = 0; ++ } ++} ++ ++static void __init crisv32_eth_init_rings(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ int i; ++ ++ /* Initialise receive descriptors for interface. */ ++ for (i = 0; i < NBR_RX_DESC; i++) { ++ struct sk_buff *skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE); ++ ++ np->dma_rx_descr_list[i].skb = skb; ++ np->dma_rx_descr_list[i].descr.buf = ++ (char*)virt_to_phys(skb->data); ++ np->dma_rx_descr_list[i].descr.after = ++ (char*)virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE); ++ ++ np->dma_rx_descr_list[i].descr.eol = 0; ++ np->dma_rx_descr_list[i].descr.in_eop = 0; ++ np->dma_rx_descr_list[i].descr.next = ++ (void *) virt_to_phys(&np->dma_rx_descr_list[i + 1].descr); ++ } ++ /* bend the list into a ring */ ++ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.next = ++ (void *) virt_to_phys(&np->dma_rx_descr_list[0].descr); ++ ++ /* Initialize transmit descriptors. */ ++ for (i = 0; i < NBR_TX_DESC; i++) { ++ np->dma_tx_descr_list[i].descr.wait = 1; ++ np->dma_tx_descr_list[i].descr.eol = 0; ++ np->dma_tx_descr_list[i].descr.out_eop = 0; ++ np->dma_tx_descr_list[i].descr.next = ++ (void*)virt_to_phys(&np->dma_tx_descr_list[i+1].descr); ++ } ++ /* bend the list into a ring */ ++ np->dma_tx_descr_list[NBR_TX_DESC - 1].descr.next = ++ (void *) virt_to_phys(&np->dma_tx_descr_list[0].descr); ++ ++ crisv32_eth_reset_rings(dev); ++} ++ ++static void __init crisv32_init_leds(int ledgrp, struct net_device *dev) ++{ ++ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0); ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ /* Use already allocated led grp if initialized */ ++ if (crisv32_leds[ledgrp] != NULL) { ++ np->leds = crisv32_leds[ledgrp]; ++ return; ++ } ++ ++ crisv32_leds[ledgrp] = ++ kmalloc(sizeof(struct crisv32_eth_leds), GFP_KERNEL); ++ ++ crisv32_leds[ledgrp]->ledgrp = ledgrp; ++ crisv32_leds[ledgrp]->led_active = 0; ++ crisv32_leds[ledgrp]->ifisup[0] = 0; ++ crisv32_leds[ledgrp]->ifisup[1] = 0; ++ /* NOTE: Should this value be set to zero as the jiffies timer ++ can wrap? */ ++ crisv32_leds[ledgrp]->led_next_time = jiffies; ++ ++ crisv32_leds[ledgrp]->clear_led_timer = timer_init; ++ crisv32_leds[ledgrp]->clear_led_timer.function = ++ crisv32_clear_network_leds; ++ crisv32_leds[ledgrp]->clear_led_timer.data = (unsigned long) dev; ++ ++ spin_lock_init(&crisv32_leds[ledgrp]->led_lock); ++ ++ np->leds = crisv32_leds[ledgrp]; ++} ++ ++static int __init crisv32_ethernet_init(void) ++{ ++ struct crisv32_ethernet_local *np; ++ int ret = 0; ++ ++#ifdef CONFIG_ETRAXFS ++ printk("ETRAX FS 10/100MBit ethernet v0.01 (c)" ++ " 2003 Axis Communications AB\n"); ++#else ++ printk("ARTPEC-3 10/100 MBit ethernet (c)" ++ " 2003-2009 Axis Communications AB\n"); ++#endif ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ { ++ reg_clkgen_rw_clk_ctrl clk_ctrl = REG_RD(clkgen, regi_clkgen, ++ rw_clk_ctrl); ++ clk_ctrl.eth = clk_ctrl.dma0_1_eth = regk_clkgen_yes; ++ REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); ++ } ++#endif ++{ ++ int iface0 = 0; ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ if (crisv32_pinmux_alloc_fixed(pinmux_eth)) ++ panic("Eth pinmux\n"); ++#endif ++ ++ if (!(crisv32_dev[iface0] = alloc_etherdev(sizeof *np))) ++ return -ENOMEM; ++ ++ ret |= crisv32_ethernet_device_init(crisv32_dev[iface0]); ++ ++#if defined(CONFIG_ETRAX_ETH0_USE_LEDGRP0) ++ crisv32_init_leds(CRIS_LED_GRP_0,crisv32_dev[iface0]); ++#elif defined(CONFIG_ETRAX_ETH0_USE_LEDGRP1) ++ crisv32_init_leds(CRIS_LED_GRP_1,crisv32_dev[iface0]); ++#else ++ crisv32_init_leds(CRIS_LED_GRP_NONE,crisv32_dev[iface0]); ++#endif ++ ++ np = (struct crisv32_ethernet_local *) netdev_priv(crisv32_dev[iface0]); ++ np->eth_inst = regi_eth0; ++ np->dma_out_inst = regi_dma0; ++ np->dma_in_inst = regi_dma1; ++ ++ np->mii_if.dev = crisv32_dev[iface0]; ++ np->mii_if.mdio_read = crisv32_eth_get_mdio_reg; ++ np->mii_if.mdio_write = crisv32_eth_set_mdio_reg; ++ np->mii_if.phy_id_mask = 0x1f; ++ np->mii_if.reg_num_mask = 0x1f; ++ ++ np->use_leds = 1; ++ np->autoneg_normal = 1; ++ ++ ++ register_netdev(crisv32_dev[iface0]); ++ ++ /* Set up default MAC address */ ++ memcpy(crisv32_dev[iface0]->dev_addr, default_mac_iface0.sa_data, 6); ++ crisv32_eth_set_mac_address(crisv32_dev[iface0], &default_mac_iface0); ++ if (crisv32_eth_request_irqdma(crisv32_dev[iface0])) ++ printk("%s: eth0 unable to allocate IRQ and DMA resources\n", ++ __func__); ++ np->txpackets = 0; ++ crisv32_eth_init_rings(crisv32_dev[iface0]); ++ crisv32_eth_setup_controller(crisv32_dev[iface0]); ++ ret |= crisv32_eth_init_phy(crisv32_dev[iface0]); ++ if (ret) { ++ unregister_netdev(crisv32_dev[iface0]); ++ return ret; ++ } ++} ++ ++#ifdef CONFIG_ETRAX_ETHERNET_IFACE1 ++{ ++ int iface1 = 0; ++ /* Default MAC address for interface 1. ++ * The real one will be set later. */ ++ static struct sockaddr default_mac_iface1 = ++ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x01}}; ++ ++ if (crisv32_pinmux_alloc_fixed(pinmux_eth1)) ++ panic("Eth pinmux\n"); ++ ++ /* Increase index to device array if interface 0 is enabled as well.*/ ++#ifdef CONFIG_ETRAX_ETHERNET_IFACE0 ++ iface1++; ++#endif ++ if (!(crisv32_dev[iface1] = alloc_etherdev(sizeof *np))) ++ return -ENOMEM; ++ ++ ret |= crisv32_ethernet_device_init(crisv32_dev[iface1]); ++ ++#if defined(CONFIG_ETRAX_ETH1_USE_LEDGRP0) ++ crisv32_init_leds(CRIS_LED_GRP_0,crisv32_dev[iface1]); ++#elif defined(CONFIG_ETRAX_ETH1_USE_LEDGRP1) ++ crisv32_init_leds(CRIS_LED_GRP_1,crisv32_dev[iface1]); ++#else ++ crisv32_init_leds(CRIS_LED_GRP_NONE,crisv32_dev[iface1]); ++#endif ++ ++ np = (struct crisv32_ethernet_local *) netdev_priv(crisv32_dev[iface1]); ++ np->eth_inst = regi_eth1; ++ np->dma_out_inst = regi_dma6; ++ np->dma_in_inst = regi_dma7; ++ ++ np->mii_if.dev = crisv32_dev[iface1]; ++ np->mii_if.mdio_read = crisv32_eth_get_mdio_reg; ++ np->mii_if.mdio_write = crisv32_eth_set_mdio_reg; ++ np->mii_if.phy_id_mask = 0x1f; ++ np->mii_if.reg_num_mask = 0x1f; ++ ++ ++ register_netdev(crisv32_dev[iface1]); ++ ++ /* Set up default MAC address */ ++ memcpy(crisv32_dev[iface1]->dev_addr, default_mac_iface1.sa_data, 6); ++ crisv32_eth_set_mac_address(crisv32_dev[iface1], &default_mac_iface1); ++ ++ if (crisv32_eth_request_irqdma(crisv32_dev[iface1])) ++ printk("%s: eth1 unable to allocate IRQ and DMA resources\n", ++ __func__); ++ np->txpackets = 0; ++ crisv32_eth_init_rings(crisv32_dev[iface1]); ++ crisv32_eth_setup_controller(crisv32_dev[iface1]); ++ ret |= crisv32_eth_init_phy(crisv32_dev[iface1]); ++ if (ret) { ++ unregister_netdev(crisv32_dev[iface1]); ++ return ret; ++ } ++} ++#endif /* CONFIG_ETRAX_ETHERNET_IFACE1 */ ++ ++#ifdef CONFIG_CPU_FREQ ++ cpufreq_register_notifier(&crisv32_ethernet_freq_notifier_block, ++ CPUFREQ_TRANSITION_NOTIFIER); ++#endif ++ ++ return ret; ++} ++ ++static struct net_device_ops crisv32_netdev_ops = { ++ .ndo_open = crisv32_eth_open, ++ .ndo_stop = crisv32_eth_close, ++ .ndo_start_xmit = crisv32_eth_send_packet, ++ .ndo_set_rx_mode = crisv32_eth_set_rx_mode, ++ .ndo_validate_addr = eth_validate_addr, ++ .ndo_set_mac_address = crisv32_eth_set_mac_address, ++ .ndo_do_ioctl =crisv32_eth_ioctl, ++ .ndo_get_stats = crisv32_get_stats, ++ .ndo_tx_timeout = crisv32_eth_do_tx_recovery, ++ .ndo_set_config = crisv32_eth_set_config, ++}; ++ ++static int __init crisv32_ethernet_device_init(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np; ++ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0); ++ ++ dev->base_addr = 0; /* Just to have something to show. */ ++ ++ /* we do our own locking */ ++ dev->features |= NETIF_F_LLTX; ++ ++ /* We use several IRQs and DMAs so just report 0 here. */ ++ dev->irq = 0; ++ dev->dma = 0; ++ ++ /* ++ * Fill in our handlers so the network layer can talk to us in the ++ * future. ++ */ ++ dev->netdev_ops = &crisv32_netdev_ops; ++ dev->ethtool_ops = &crisv32_ethtool_ops; ++ dev->watchdog_timeo = HZ * 10; ++#ifdef CONFIG_NET_POLL_CONTROLLER ++ dev->poll_controller = crisv32_netpoll; ++#endif ++ np = netdev_priv(dev); ++ np->dev = dev; ++ ++ /* ++ * 8 skbs keeps the system very reponsive even under high load. ++ * At 64 the system locks, pretty much the same way as without NAPI. ++ * ++ * TODO: meassure with 2 interfaces ++ */ ++ netif_napi_add(dev, &np->napi, crisv32_eth_poll, 8); ++ ++ spin_lock_init(&np->lock); ++ spin_lock_init(&np->transceiver_lock); ++ ++ np->receive_timer = timer_init; ++ np->receive_timer.data = (unsigned)dev; ++ np->receive_timer.function = receive_timeout; ++ ++ INIT_WORK(&np->receive_work, receive_timeout_work); ++ ++ np->transmit_timer = timer_init; ++ np->transmit_timer.data = (unsigned)dev; ++ np->transmit_timer.function = transmit_timeout; ++ ++ return 0; ++} ++ ++static int crisv32_eth_open(struct net_device *dev) ++{ ++ struct sockaddr mac_addr; ++ reg_dma_rw_ack_intr ack_intr = { .data = 1, .in_eop = 1 }; ++ reg_eth_rw_clr_err clr_err = {.clr = regk_eth_yes}; ++ /* ++ * dont interrupt us at any stat counter thresholds, only at urun ++ * and exc_col. ++ */ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ /* For Artpec-3 we use overrun to workaround voodoo TR 87 */ ++ int intr_mask_nw = 0x1c00; ++#else ++ int intr_mask_nw = 0x1800; ++#endif ++ int eth_ack_intr = 0xffff; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ spin_lock(&np->lock); ++ crisv32_eth_set_gigabit(np, 0); ++ ++ crisv32_disable_tx_ints(np); ++ crisv32_disable_rx_ints(np); ++ ++ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err); ++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, eth_ack_intr); ++ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw); ++ crisv32_eth_reset_rings(dev); ++ ++ /* Give the hardware an idea of what MAC address we want. */ ++ memcpy(mac_addr.sa_data, dev->dev_addr, dev->addr_len); ++ crisv32_eth_set_mac_address(dev, &mac_addr); ++ ++ /* Enable irq and make sure that the irqs are cleared. */ ++ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr); ++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); ++ ++ crisv32_disconnect_eth_rx_dma(np); ++ ++ /* Prepare input DMA. */ ++ DMA_RESET(np->dma_in_inst); ++ DMA_ENABLE(np->dma_in_inst); ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ DMA_WR_CMD(np->dma_in_inst, regk_dma_set_w_size2); ++#endif ++ DMA_START_CONTEXT(np->dma_in_inst, virt_to_phys(&np->ctxt_in)); ++ DMA_CONTINUE(np->dma_in_inst); ++ crisv32_enable_rx_ints(np); ++ crisv32_start_receiver(np); ++ ++ /* Prepare output DMA. */ ++ DMA_RESET(np->dma_out_inst); ++ DMA_ENABLE(np->dma_out_inst); ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_set_w_size4); ++#endif ++ crisv32_connect_eth_rx_dma(np); ++ ++ netif_start_queue(dev); ++ crisv32_enable_tx_ints(np); ++ ++ if (!np->fixed_phy) { ++ /* Start duplex/speed timers */ ++ if (!timer_pending(&np->speed_timer)) ++ add_timer(&np->speed_timer); ++ if (!timer_pending(&np->duplex_timer)) ++ add_timer(&np->duplex_timer); ++ } ++ ++ spin_unlock(&np->lock); ++ /* ++ * We are now ready to accept transmit requests from the queueing ++ * layer of the networking. ++ */ ++ np->link = 1; ++ netif_carrier_on(dev); ++ napi_enable(&np->napi); ++ ++ return 0; ++} ++ ++static int crisv32_eth_close(struct net_device *dev) ++{ ++ reg_dma_rw_ack_intr ack_intr = {0}; ++ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ unsigned long flags; ++ ++ del_timer(&np->transmit_timer); ++ spin_lock_irqsave(&np->lock, flags); ++ ++ /* stop the receiver before the DMA channels to avoid overruns. */ ++ crisv32_disable_rx_ints(np); ++ napi_disable(&np->napi); ++ crisv32_stop_receiver(np); ++ ++ netif_stop_queue(dev); ++ ++ /* Reset the TX DMA in case it has hung on something. */ ++ DMA_RESET(np->dma_in_inst); ++ ++ /* Stop DMA */ ++ DMA_STOP(np->dma_in_inst); ++ DMA_STOP(np->dma_out_inst); ++ ++ /* Disable irq and make sure that the irqs are cleared. */ ++ crisv32_disable_tx_ints(np); ++ ack_intr.data = 1; ++ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr); ++ ++ ack_intr.in_eop = 1; ++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); ++ ++ np->sender_started = 0; ++ spin_unlock_irqrestore(&np->lock, flags); ++ ++ /* Update the statistics. */ ++ update_rx_stats(np); ++ update_tx_stats(np); ++ ++ if (!np->fixed_phy) { ++ /* Stop speed/duplex timers */ ++ del_timer(&np->speed_timer); ++ del_timer(&np->duplex_timer); ++ } ++ ++ return 0; ++} ++ ++static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr) ++{ ++ int i; ++ static int first = 1; ++ ++ unsigned char *addr = ((struct sockaddr*)vpntr)->sa_data; ++ ++ reg_eth_rw_ma0_lo ma0_lo = ++ { addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24)}; ++ ++ reg_eth_rw_ma0_hi ma0_hi = { addr[4] | (addr[5] << 8) }; ++ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ /* Remember the address. */ ++ memcpy(dev->dev_addr, addr, dev->addr_len); ++ ++ /* ++ * Write the address to the hardware. ++ * Note the way the address is wrapped: ++ * ma0_l0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24); ++ * ma0_hi = a0_4 | (a0_5 << 8); ++ */ ++ REG_WR(eth, np->eth_inst, rw_ma0_lo, ma0_lo); ++ REG_WR(eth, np->eth_inst, rw_ma0_hi, ma0_hi); ++ ++ if (first) { ++ printk(KERN_INFO "%s: changed MAC to ", dev->name); ++ ++ for (i = 0; i < 5; i++) ++ printk("%02X:", dev->dev_addr[i]); ++ printk("%02X\n", dev->dev_addr[i]); ++ ++ first = 0; ++ } ++ ++ return 0; ++} ++ ++static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id) ++{ ++ struct net_device *dev = (struct net_device *) dev_id; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ reg_dma_r_masked_intr masked_in; ++ ++ masked_in = REG_RD(dma, np->dma_in_inst, r_masked_intr); ++ ++ if (masked_in.in_eop) { ++ reg_dma_rw_ack_intr ack_intr = {0}; ++ ++ /* ++ * Ack the rx irq even if we are not prepared to start ++ * polling. This is needed to handle incomming packets ++ * during the stop sequence. ++ */ ++ ack_intr.in_eop = 1; ++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); ++ ++ mod_timer(&np->receive_timer, jiffies + HZ); ++ np->do_rx_recovery = 0; ++ ++ if (napi_schedule_prep(&np->napi)) { ++ crisv32_disable_rx_ints(np); ++ crisv32_disable_tx_ints(np); ++ /* put us onto the poll list */ ++ __napi_schedule(&np->napi); ++ } ++ } else { ++ /* Unexpected, ACK it and hope for the best. */ ++ reg_dma_rw_ack_intr ack_intr = { ++ .group = 1, ++ .ctxt = 1, ++ .data = 1, ++ .in_eop = 0, ++ .stream_cmd = 1, ++ .dummy1 = ~0 ++ }; ++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static inline void crisv32_eth_roll_tx_timer(struct crisv32_ethernet_local *np) ++{ ++ /* If there are more packets in the ring, roll the tx timer. */ ++ if (np->txpackets) { ++ /* Eth pause frames may halt us for up to 320ms (100mbit). */ ++ unsigned long timeout = jiffies + (HZ / 3) + 1; ++ mod_timer(&np->transmit_timer, timeout); ++ } ++ else ++ del_timer(&np->transmit_timer); ++} ++ ++/* Call with np->lock held. */ ++static void _crisv32_tx_ring_advance(struct crisv32_ethernet_local *np, ++ int cleanup) ++{ ++ reg_dma_rw_stat stat; ++ dma_descr_data *dma_pos; ++ struct net_device *dev = np->dev; ++ int eol; ++ ++ /* Get the current output dma position. */ ++ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst, rw_data)); ++ stat = REG_RD(dma, np->dma_out_inst, rw_stat); ++ eol = stat.list_state == regk_dma_data_at_eol; ++ if (cleanup || eol) ++ dma_pos = &np->active_tx_desc->descr; ++ ++ /* Take care of transmited dma descriptors and report sent packet. */ ++ while (np->txpackets && (&np->catch_tx_desc->descr != dma_pos)) { ++ /* Update sent packet statistics. */ ++ np->stats.tx_bytes += np->catch_tx_desc->skb->len; ++ np->stats.tx_packets++; ++ ++ dev_kfree_skb_any(np->catch_tx_desc->skb); ++ np->catch_tx_desc->skb = 0; ++ np->txpackets--; ++ np->catch_tx_desc->descr.buf = 0; ++ np->catch_tx_desc = ++ phys_to_virt((int)np->catch_tx_desc->descr.next); ++ np->do_tx_recovery = 0; ++ np->retrans = 0; ++ ++ netif_wake_queue(dev); ++ } ++} ++ ++static inline void crisv32_tx_ring_advance(struct crisv32_ethernet_local *np) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&np->lock, flags); ++ _crisv32_tx_ring_advance(np, 0); ++ crisv32_eth_roll_tx_timer(np); ++ spin_unlock_irqrestore(&np->lock, flags); ++} ++ ++static inline int crisv32_tx_complete(struct crisv32_ethernet_local *np) ++{ ++ reg_dma_rw_ack_intr ack_intr = { .data = 1 }; ++ reg_dma_r_intr ints; ++ int r = 0; ++ ++ /* We are interested in the unmasked raw interrupt source here. When ++ polling with tx interrupts masked off we still want to do ++ tx completition when the DMA makes progress. */ ++ ints = REG_RD(dma, np->dma_out_inst, r_intr); ++ if (ints.data) ++ { ++ /* ack the interrupt, if it was active */ ++ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr); ++ crisv32_tx_ring_advance(np); ++ r = 1; ++ } ++ return r; ++} ++ ++static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev_id); ++ ++ crisv32_tx_complete(np); ++ return IRQ_HANDLED; ++} ++ ++ ++/* Update receive errors. */ ++static void ++update_rx_stats(struct crisv32_ethernet_local *np) ++{ ++ reg_eth_rs_rec_cnt r; ++ ++ r = REG_RD(eth, np->eth_inst, rs_rec_cnt); ++ ++ np->stats.rx_over_errors += r.congestion; ++ np->stats.rx_crc_errors += r.crc_err; ++ np->stats.rx_frame_errors += r.align_err; ++ np->stats.rx_length_errors += r.oversize; ++ np->stats.rx_errors += r.crc_err + r.align_err + ++ r.oversize + r.congestion; ++} ++ ++/* Update transmit errors. */ ++static void update_tx_stats(struct crisv32_ethernet_local *np) ++{ ++ reg_eth_rs_tr_cnt r; ++ reg_eth_rs_phy_cnt rp; ++ ++ r = REG_RD(eth, np->eth_inst, rs_tr_cnt); ++ rp = REG_RD(eth, np->eth_inst, rs_phy_cnt); ++ ++ /* r.deferred is not good for counting collisions because it also ++ includes frames that have to wait for the interframe gap. That ++ means we get deferred frames even when in full duplex. ++ Here we don't actually count the number of collisions that ++ occured (artpec3 seems to lack such a counter), instead we count ++ the number of frames that collide once or more. */ ++ np->stats.collisions += r.mult_col + r.single_col; ++ np->stats.tx_window_errors += r.late_col; ++ np->stats.tx_carrier_errors += rp.carrier_loss; ++ ++ /* Ordinary collisions are not errors, they are just part of ++ ethernet's bus arbitration and congestion control mechanisms. ++ Late collisions are serious errors though. */ ++ np->stats.tx_errors += r.late_col; ++} ++ ++/* Get current statistics. */ ++static struct net_device_stats *crisv32_get_stats(struct net_device *dev) ++{ ++ unsigned long flags; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ spin_lock_irqsave(&np->lock, flags); ++ ++ update_rx_stats(np); ++ update_tx_stats(np); ++ ++ spin_unlock_irqrestore(&np->lock, flags); ++ ++ return &np->stats; ++} ++ ++/* Check for network errors. This acknowledge the received interrupt. */ ++static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id) ++{ ++ struct net_device *dev = (struct net_device *) dev_id; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ reg_eth_r_masked_intr intr_mask; ++ int ack_intr = 0xffff; ++ reg_eth_rw_clr_err clr_err; ++ ++ intr_mask = REG_RD(eth, np->eth_inst, r_masked_intr); ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ /* Only apply the workaround if it is not already pending. ++ enable_eth_ints will re-enable the orun interrupt regardless ++ of pending_overrun. */ ++ if (intr_mask.orun && !np->pending_overrun) { ++ reg_eth_rw_rec_ctrl rec_ctrl = ++ REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ np->saved_rec_ctrl = rec_ctrl; ++ np->overrun_set = 1; ++ DMA_STOP(np->dma_in_inst); ++ rec_ctrl.ma0 = regk_eth_no; ++ rec_ctrl.broadcast = regk_eth_no; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ np->saved_ga_lo = REG_RD_INT(eth, np->eth_inst, rw_ga_lo); ++ np->saved_ga_hi = REG_RD_INT(eth, np->eth_inst, rw_ga_hi); ++ REG_WR_INT(eth, np->eth_inst, rw_ga_lo, 0); ++ REG_WR_INT(eth, np->eth_inst, rw_ga_hi, 0); ++ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, ++ REG_RD_INT(eth, np->eth_inst, rw_intr_mask) & 0xfbff); ++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, 0x400); ++ intr_mask.orun = 0; ++ np->pending_overrun = 1; ++ if (!np->napi_processing) ++ crisv32_eth_restart_rx_dma(np->dev, np); ++ ++ return IRQ_HANDLED; ++ } ++#endif ++ ++ /* ++ * Check for underrun and/or excessive collisions. Note that the ++ * rw_clr_err register clears both underrun and excessive collision ++ * errors, so there's no need to check them separately. ++ */ ++ if (np->sender_started ++ && (intr_mask.urun || intr_mask.exc_col)) { ++ unsigned long flags; ++ ++ /* Underrun are considered to be tx-errors. */ ++ np->stats.tx_errors += intr_mask.urun; ++ np->stats.tx_fifo_errors += intr_mask.urun; ++ ++ /* ++ * Protect against the tx-interrupt messing with ++ * the tx-ring. ++ */ ++ spin_lock_irqsave(&np->lock, flags); ++ ++ /* DMA should have stopped now, eat from the ring before ++ removing anything due to tx errors. */ ++ _crisv32_tx_ring_advance(np, 0); ++ ++ /* ++ * Drop packets after 15 retries. ++ * TODO: Add backoff. ++ */ ++ if (np->retrans > 15 && np->txpackets) { ++ dev_kfree_skb_irq(np->catch_tx_desc->skb); ++ np->catch_tx_desc->skb = 0; ++ np->catch_tx_desc->descr.buf = 0; ++ np->catch_tx_desc = ++ phys_to_virt((int) ++ np->catch_tx_desc->descr.next); ++ flush_dma_descr(&np->catch_tx_desc->descr, 0); ++ ++ np->txpackets--; ++ np->retrans = 0; ++ netif_wake_queue(dev); ++ np->stats.tx_dropped++; ++ } ++ np->ctxt_out.next = 0; ++ if (np->txpackets) { ++ np->retrans++; ++ np->ctxt_out.saved_data = (void *) ++ virt_to_phys(&np->catch_tx_desc->descr); ++ np->ctxt_out.saved_data_buf = ++ np->catch_tx_desc->descr.buf; ++ WARN_ON(!np->ctxt_out.saved_data_buf); ++ flush_dma_descr(&np->catch_tx_desc->descr, 0); ++ cris_flush_cache_range(&np->ctxt_out, ++ sizeof np->ctxt_out); ++ ++ /* restart the DMA */ ++ DMA_START_CONTEXT(np->dma_out_inst, ++ (int) virt_to_phys(&np->ctxt_out)); ++ np->sender_started = 1; ++ } ++ else { ++ /* Load dummy context but do not load the data ++ descriptor nor start the burst. This brings the ++ buggy eth transmitter back in sync with the DMA ++ avoiding malformed frames. */ ++ REG_WR(dma, np->dma_out_inst, rw_group_down, ++ (int) virt_to_phys(&np->ctxt_out)); ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c); ++ np->sender_started = 0; ++ } ++ crisv32_eth_roll_tx_timer(np); ++ spin_unlock_irqrestore(&np->lock, flags); ++ } ++ ++ ack_intr = *(u32 *)&intr_mask; ++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, ack_intr); ++ clr_err.clr = 1; ++ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err); ++ ++ update_rx_stats(np); ++ update_tx_stats(np); ++ ++ return IRQ_HANDLED; ++} ++ ++/* We have a good packet(s), get it/them out of the buffers. */ ++static int crisv32_eth_receive_packet(struct net_device *dev) ++{ ++ int length; ++ struct sk_buff *skb; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ struct sk_buff *tmp; ++ unsigned long flags; ++ ++ DEBUG(printk("crisv32_receive_packet\n")); ++ ++ /* Roll the rx bug timer. */ ++ mod_timer(&np->receive_timer, jiffies + HZ); ++ ++ /* Activate LED */ ++ spin_lock_irqsave(&np->leds->led_lock, flags); ++ if (!np->leds->led_active && time_after(jiffies, ++ np->leds->led_next_time)) { ++ /* light the network leds depending on the current speed. */ ++ crisv32_set_network_leds(CRIS_LED_ACTIVITY, dev); ++ ++ /* Set the earliest time we may clear the LED */ ++ np->leds->led_next_time = jiffies + NET_FLASH_TIME; ++ np->leds->led_active = 1; ++ np->leds->clear_led_timer.data = (unsigned long) dev; ++ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10); ++ } ++ spin_unlock_irqrestore(&np->leds->led_lock, flags); ++ ++ /* Discard CRC (4 bytes). */ ++ length = (np->active_rx_desc->descr.after) - ++ (np->active_rx_desc->descr.buf) - 4; ++ ++ tmp = dev_alloc_skb(MAX_MEDIA_DATA_SIZE); ++ if (!tmp) { ++ np->stats.rx_errors++; ++ printk(KERN_NOTICE "%s: memory squeeze," ++ " dropping packet.", ++ dev->name); ++ return 0; ++ } ++ skb = np->active_rx_desc->skb; ++ np->active_rx_desc->skb = tmp; ++ skb_put(skb, length); ++ ++ np->newbuf = virt_to_phys(np->active_rx_desc->skb->data); ++ ++ skb->dev = dev; ++ skb->protocol = eth_type_trans(skb, dev); ++ skb->ip_summed = CHECKSUM_NONE; ++ ++ np->stats.multicast += skb->pkt_type == PACKET_MULTICAST; ++ /* Send the packet to the upper layer. */ ++ netif_receive_skb(skb); ++ np->last_rx_desc = ++ phys_to_virt((int) ++ np->last_rx_desc->descr.next); ++ ++ /* Forward rotate the receive ring. */ ++ crisv32_eth_rx_ring_advance(np); ++ return length; ++} ++ ++/* Must be called with the np-lock held. */ ++static void ++__crisv32_eth_restart_rx_dma(struct net_device* dev, ++ struct crisv32_ethernet_local *np) ++{ ++ reg_dma_rw_ack_intr ack_intr = {0}; ++ reg_dma_rw_stream_cmd dma_sc = {0}; ++ reg_dma_rw_stat stat; ++ int resets = 0; ++ reg_eth_rw_intr_mask eth_intr_mask; ++ ++ np->rx_dma_restarts++; ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ if (np->pending_overrun) { ++ np->pending_overrun = 0; ++ REG_WR_INT(eth, np->eth_inst, rw_ga_lo, np->saved_ga_lo); ++ REG_WR_INT(eth, np->eth_inst, rw_ga_hi, np->saved_ga_hi); ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, np->saved_rec_ctrl); ++ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, ++ REG_RD_INT(eth, regi_eth, rw_intr_mask) | 0x400); ++ DMA_CONTINUE(np->dma_in_inst); ++ } ++#endif ++ /* Bring down the receiver. */ ++ crisv32_disable_rx_ints(np); ++ crisv32_disconnect_eth_rx_dma(np); ++ ++ /* Stop DMA and ack possible ints. */ ++ DMA_STOP(np->dma_in_inst); ++ ack_intr.in_eop = 1; ++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); ++ ++ crisv32_stop_receiver(np); ++ ++ /* Disable overrun interrupts while receive is shut off. */ ++ eth_intr_mask = REG_RD(eth, np->eth_inst, rw_intr_mask); ++ eth_intr_mask.orun = regk_eth_no; ++ REG_WR(eth, np->eth_inst, rw_intr_mask, eth_intr_mask); ++ /* ACK overrun. */ ++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, 0x400); ++ ++ crisv32_eth_reset_rx_ring(dev); ++ reset: ++ /* TODO: if nr resets grows to high we should reboot. */ ++ if (resets++ > 0) ++ printk("reset DMA %d.\n", resets); ++ ++ DMA_RESET(np->dma_in_inst); ++ /* Wait for the channel to reset. */ ++ do { ++ stat = REG_RD(dma, np->dma_in_inst, rw_stat); ++ } while (stat.mode != regk_dma_rst); ++ ++ /* Now bring the rx path back up. */ ++ DMA_ENABLE(np->dma_in_inst); ++ if (dma_wait_busy(np->dma_in_inst, 100)) ++ goto reset; ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++// DMA_WR_CMD(np->dma_in_inst, regk_dma_set_w_size2); ++ dma_sc.cmd = (regk_dma_set_w_size2); ++ REG_WR(dma, np->dma_in_inst, rw_stream_cmd, dma_sc); ++ if (dma_wait_busy(np->dma_in_inst, 100)) ++ goto reset; ++#endif ++ ++// DMA_START_CONTEXT(np->dma_in_inst, virt_to_phys(&np->ctxt_in)); ++ REG_WR_INT(dma, np->dma_in_inst, rw_group_down, (int)&np->ctxt_in); ++ ++// DMA_WR_CMD(np->dma_in_inst, regk_dma_load_c); ++ dma_sc.cmd = (regk_dma_load_c); ++ REG_WR(dma, np->dma_in_inst, rw_stream_cmd, dma_sc); ++ if (dma_wait_busy(np->dma_in_inst, 100)) ++ goto reset; ++ ++// DMA_WR_CMD(np->dma_in_inst, regk_dma_load_d | regk_dma_burst); ++ dma_sc.cmd = (regk_dma_load_d | regk_dma_burst); ++ REG_WR(dma, np->dma_in_inst, rw_stream_cmd, dma_sc); ++ ++ if (dma_wait_busy(np->dma_in_inst, 100)) ++ goto reset; ++ ++ /* Now things get critical again. Don't give us any interrupts until ++ the following sequence is complete. */ ++ DMA_CONTINUE(np->dma_in_inst); ++ np->overrun_set = 0; ++ crisv32_enable_rx_ints(np); ++ crisv32_start_receiver(np); ++ ++ /* Reenable overrun interrupts when receive is started again. */ ++ eth_intr_mask = REG_RD(eth, np->eth_inst, rw_intr_mask); ++ eth_intr_mask.orun = regk_eth_yes; ++ REG_WR(eth, np->eth_inst, rw_intr_mask, eth_intr_mask); ++ ++ crisv32_connect_eth_rx_dma(np); ++} ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++static void ++crisv32_eth_restart_rx_dma(struct net_device* dev, ++ struct crisv32_ethernet_local *np) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&np->lock, flags); ++ __crisv32_eth_restart_rx_dma(dev, np); ++ spin_unlock_irqrestore(&np->lock, flags); ++} ++#endif ++ ++/* ++ * Is there work to do in the rx-path? ++ */ ++static inline int crisv32_has_rx_work(struct crisv32_ethernet_local *np, ++ dma_descr_data *active) ++{ ++ int mw; ++ mw = (active->in_eop && np->new_rx_package); ++ return mw; ++} ++ ++static void crisv32_eth_do_rx_recovery(struct net_device* dev, ++ struct crisv32_ethernet_local *np) ++{ ++ unsigned long flags; ++ static int r = 0; ++ ++ r++; ++ ++ /* Bring down the receiver. */ ++ spin_lock_irqsave(&np->lock, flags); ++ if (!np->do_rx_recovery) ++ goto done; ++ ++ napi_disable(&np->napi); ++ ++ np->rx_dma_timeouts++; ++ ++ __crisv32_eth_restart_rx_dma(dev, np); ++ ++ np->do_rx_recovery = 0; ++ ++ napi_enable(&np->napi); ++ done: ++ spin_unlock_irqrestore(&np->lock, flags); ++ ++ WARN_ON(r != 1); ++ r--; ++} ++ ++static void receive_timeout_work(struct work_struct* work) ++{ ++ struct dma_descr_data* descr; ++ struct dma_descr_data* descr2; ++ struct net_device* dev = crisv32_dev[0]; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ reg_eth_r_intr intr_mask; ++ ++ descr = &np->active_rx_desc->descr; ++ descr2 = phys_to_virt(REG_RD_INT(dma, np->dma_in_inst, rw_data)); ++ ++ intr_mask = REG_RD(eth, np->eth_inst, r_intr); ++ ++ if (!np->overrun_set ++ && !intr_mask.orun ++ && !descr->in_eop ++ && !descr2->in_eop) ++ return; ++ ++ crisv32_eth_do_rx_recovery(dev, np); ++} ++ ++static void receive_timeout(unsigned long arg) ++{ ++ struct net_device* dev = (struct net_device*)arg; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ np->do_rx_recovery++; ++ schedule_work(&np->receive_work); ++ mod_timer(&np->receive_timer, jiffies + 1*HZ); ++} ++ ++static void transmit_timeout(unsigned long arg) ++{ ++ struct net_device* dev = (struct net_device*)arg; ++ crisv32_eth_do_tx_recovery(dev); ++} ++ ++/* ++ * NAPI poll ++ * ++ * We are allowed to pull up to budget number of frames from the rx ring. ++ * If we are done, remove us from the poll list and re-enable rx interrupts. ++ * Always return number of pulled frames from the rx ring. ++ */ ++static int crisv32_eth_poll(struct napi_struct *napi, int budget) ++{ ++ struct crisv32_ethernet_local *np; ++ int work_done = 0; ++ int morework; ++ int rx_bytes = 0; ++ reg_dma_rw_ack_intr ack_intr = {0}; ++ ++ np = container_of(napi, struct crisv32_ethernet_local, napi); ++ crisv32_disable_eth_ints(np); ++ np->napi_processing = 1; ++ ack_intr.in_eop = 1; ++ ++ if (np->new_rx_package == 0) { ++ /* ++ * In the previous round we pulled a packet from the ring but ++ * we didn't advance the ring due to hw DMA bug. Try to do it ++ * now. ++ */ ++ np->new_rx_package = 1; ++ crisv32_eth_rx_ring_advance(np); ++ } ++ ++ morework = crisv32_has_rx_work(np, &np->active_rx_desc->descr); ++ ++ /* See if tx needs attention. */ ++ crisv32_tx_complete(np); ++ ++ while (morework) ++ { ++ rx_bytes += crisv32_eth_receive_packet(np->dev); ++ work_done++; ++ ++ /* Ack irq and restart rx dma */ ++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr); ++ DMA_CONTINUE_DATA(np->dma_in_inst); ++ ++ if (unlikely(work_done >= budget)) ++ break; ++ ++ /* See if tx needs attention. */ ++ crisv32_tx_complete(np); ++ ++ morework = crisv32_has_rx_work(np, &np->active_rx_desc->descr); ++ } ++ crisv32_enable_eth_ints(np); ++ ++ if (!morework) { ++ np->napi_processing = 0; ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ if (np->pending_overrun) { ++ crisv32_eth_restart_rx_dma(np->dev, np); ++ } ++#endif ++ if (irqs_disabled()) ++ printk("WARNING: %s irqs disabled!\n", __func__); ++ ++ if (work_done < budget) { ++ /* first mark as done, then enable irq's */ ++ napi_complete(napi); ++ crisv32_enable_rx_ints(np); ++ crisv32_enable_tx_ints(np); ++ } ++ } ++ np->napi_processing = 0; ++ ++ np->stats.rx_bytes += rx_bytes; ++ np->stats.rx_packets += work_done; ++ update_rx_stats(np); ++ return work_done; ++} ++ ++/* ++ * This function (i.e. hard_start_xmit) is protected from concurent calls by a ++ * spinlock (xmit_lock) in the net_device structure. ++ */ ++static int ++crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ unsigned char *buf = skb->data; ++ unsigned long flags; ++ ++ /* ++ * Need to disable irq to avoid updating pointer in interrupt while ++ * sending packets. ++ */ ++ spin_lock_irqsave(&np->lock, flags); ++ ++ np->active_tx_desc->skb = skb; ++ crisv32_eth_hw_send_packet(buf, skb->len, np); ++ ++ dev->trans_start = jiffies; ++ ++ /* Stop queue if full. */ ++ if (crisv32_eth_tx_ring_full(np)) ++ netif_stop_queue(dev); ++ ++ np->txpackets++; ++ crisv32_eth_roll_tx_timer(np); ++ spin_unlock_irqrestore(&np->lock, flags); ++ ++ spin_lock_irqsave(&np->leds->led_lock, flags); ++ if (!np->leds->led_active && time_after(jiffies, ++ np->leds->led_next_time)) { ++ /* light the network leds depending on the current speed. */ ++ crisv32_set_network_leds(CRIS_LED_ACTIVITY, dev); ++ ++ /* Set the earliest time we may clear the LED */ ++ np->leds->led_next_time = jiffies + NET_FLASH_TIME; ++ np->leds->led_active = 1; ++ np->leds->clear_led_timer.data = (unsigned long) dev; ++ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10); ++ } ++ spin_unlock_irqrestore(&np->leds->led_lock, flags); ++ ++ return 0; ++} ++ ++ ++static void ++crisv32_eth_hw_send_packet(unsigned char *buf, int length, void *priv) ++{ ++ struct crisv32_ethernet_local *np = ++ (struct crisv32_ethernet_local *) priv; ++ ++ /* Configure the tx dma descriptor. */ ++ np->active_tx_desc->descr.buf = (unsigned char *)virt_to_phys(buf); ++ ++ np->active_tx_desc->descr.after = np->active_tx_desc->descr.buf + ++ length; ++ np->active_tx_desc->descr.intr = 1; ++ np->active_tx_desc->descr.out_eop = 1; ++ ++ /* Move eol. */ ++ np->active_tx_desc->descr.eol = 1; ++ flush_dma_descr(&np->active_tx_desc->descr, 1); ++ ++ if (np->sender_started) ++ WARN_ON(!np->prev_tx_desc->descr.eol); ++ np->prev_tx_desc->descr.eol = 0; ++ flush_dma_descr(&np->prev_tx_desc->descr, 0); ++ ++ /* Update pointers. */ ++ np->prev_tx_desc = np->active_tx_desc; ++ np->active_tx_desc = phys_to_virt((int)np->active_tx_desc->descr.next); ++ ++ /* Start DMA. */ ++ crisv32_start_dma_out(np); ++} ++ ++static void crisv32_start_dma_out(struct crisv32_ethernet_local *np) ++{ ++ if (!np->sender_started) { ++ /* Start DMA for the first time. */ ++ np->ctxt_out.saved_data = ++ (void *)virt_to_phys(&np->prev_tx_desc->descr); ++ np->ctxt_out.saved_data_buf = np->prev_tx_desc->descr.buf; ++ WARN_ON(!np->ctxt_out.saved_data_buf); ++ ++ cris_flush_cache_range(&np->ctxt_out, sizeof np->ctxt_out); ++ REG_WR(dma, np->dma_out_inst, rw_group_down, ++ (int) virt_to_phys(&np->ctxt_out)); ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c); ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst); ++ np->sender_started = 1; ++ } else { ++ DMA_CONTINUE_DATA(np->dma_out_inst); ++ } ++} ++ ++/* ++ * Bring the transmitter back to life. ++ */ ++static void ++crisv32_eth_do_tx_recovery(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ reg_eth_rw_clr_err clr_err; ++ reg_dma_rw_stat stat = {0}; ++ unsigned long flags; ++ /* ACK urun and exc_col. */ ++ int ack_intr = 0x1800; ++ int do_full; ++ ++ /* Give the tx recovery some time without link state polling. */ ++ if (!np->fixed_phy) ++ mod_timer(&np->speed_timer, jiffies + 4 * HZ); ++ ++ np->tx_dma_restarts++; ++ ++ spin_lock_irqsave(&np->lock, flags); ++ ++ do_full = 1; ++ update_tx_stats(np); ++ ++ /* Cancel ongoing frame. */ ++ crisv32_eth_tx_cancel_frame(np); ++ ++ /* In case TR 125 just hit us. */ ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_ack_pkt); ++ dma_wait_busy(np->dma_out_inst, 100); ++ ++ /* At this point, the transmit block should be idle or waiting for us ++ to clear the excessive collision error. Let's reset the DMA. */ ++ DMA_STOP(np->dma_out_inst); ++ ++ crisv32_disconnect_eth_tx_dma(np); ++ ++ /* Eat from the tx ring. */ ++ _crisv32_tx_ring_advance(np, 1); ++ np->do_tx_recovery++; ++ ++ DMA_RESET(np->dma_out_inst); ++ do { ++ stat = REG_RD(dma, np->dma_out_inst, rw_stat); ++ } while (stat.mode != regk_dma_rst); ++ ++ /* Next packet will restart output DMA. */ ++ np->sender_started = 0; ++ ++ crisv32_enable_tx_ints(np); ++ ++ DMA_ENABLE(np->dma_out_inst); ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_set_w_size4); ++#endif ++ DMA_CONTINUE(np->dma_out_inst); ++ ++ /* Clear pending errors. */ ++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, ack_intr); ++ clr_err.clr = 1; ++ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err); ++ ++ /* Do a full reset of the MAC block. */ ++ if (do_full) { ++ np->tx_mac_resets++; ++ crisv32_eth_reset(np); ++ } ++ ++ crisv32_connect_eth_tx_dma(np); ++ ++ if (np->txpackets) { ++ WARN_ON(!np->catch_tx_desc->skb); ++ np->catch_tx_desc->descr.intr = 1; ++ np->catch_tx_desc->descr.out_eop = 1; ++ ++ /* Start DMA for the first time. */ ++ np->ctxt_out.saved_data = ++ (void *)virt_to_phys(&np->catch_tx_desc->descr); ++ np->ctxt_out.saved_data_buf = np->catch_tx_desc->descr.buf; ++ WARN_ON(!np->ctxt_out.saved_data_buf); ++ flush_dma_descr(&np->catch_tx_desc->descr, 0); ++ cris_flush_cache_range(&np->ctxt_out, sizeof np->ctxt_out); ++ ++ REG_WR(dma, np->dma_out_inst, rw_group_down, ++ (int) virt_to_phys(&np->ctxt_out)); ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c); ++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst); ++ crisv32_eth_roll_tx_timer(np); ++ np->sender_started = 1; ++ } ++ ++ if (np->txpackets && crisv32_eth_tx_ring_full(np)) ++ netif_stop_queue(dev); ++ else ++ netif_wake_queue(dev); ++ ++ spin_unlock_irqrestore(&np->lock, flags); ++} ++ ++/* ++ * Set or clear the multicast filter for this adaptor. ++ * num_addrs == -1 Promiscuous mode, receive all packets ++ * num_addrs == 0 Normal mode, clear multicast list ++ * num_addrs > 0 Multicast mode, receive normal and MC packets, ++ * and do best-effort filtering. ++ */ ++static void crisv32_eth_set_rx_mode(struct net_device *dev) ++{ ++ int num_addr = netdev_mc_count(dev); ++ unsigned long int lo_bits; ++ unsigned long int hi_bits; ++ reg_eth_rw_rec_ctrl rec_ctrl = {0}; ++ reg_eth_rw_ga_lo ga_lo = {0}; ++ reg_eth_rw_ga_hi ga_hi = {0}; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ if (dev->flags & IFF_PROMISC) { ++ /* Promiscuous mode. */ ++ lo_bits = 0xfffffffful; ++ hi_bits = 0xfffffffful; ++ ++ /* Enable individual receive. */ ++ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, ++ rw_rec_ctrl); ++ rec_ctrl.individual = regk_eth_yes; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ } else if (dev->flags & IFF_ALLMULTI) { ++ /* Enable all multicasts. */ ++ lo_bits = 0xfffffffful; ++ hi_bits = 0xfffffffful; ++ ++ /* Disable individual receive */ ++ rec_ctrl = ++ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ rec_ctrl.individual = regk_eth_no; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ } else if (num_addr == 0) { ++ /* Normal, clear the mc list. */ ++ lo_bits = 0x00000000ul; ++ hi_bits = 0x00000000ul; ++ ++ /* Disable individual receive */ ++ rec_ctrl = ++ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ rec_ctrl.individual = regk_eth_no; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ } else { ++ /* MC mode, receive normal and MC packets. */ ++ char hash_ix; ++ struct netdev_hw_addr *ha; ++ char *baddr; ++ lo_bits = 0x00000000ul; ++ hi_bits = 0x00000000ul; ++ ++ netdev_for_each_mc_addr(ha, dev) { ++ /* Calculate the hash index for the GA registers. */ ++ hash_ix = 0; ++ baddr = ha->addr; ++ hash_ix ^= (*baddr) & 0x3f; ++ hash_ix ^= ((*baddr) >> 6) & 0x03; ++ ++baddr; ++ hash_ix ^= ((*baddr) << 2) & 0x03c; ++ hash_ix ^= ((*baddr) >> 4) & 0xf; ++ ++baddr; ++ hash_ix ^= ((*baddr) << 4) & 0x30; ++ hash_ix ^= ((*baddr) >> 2) & 0x3f; ++ ++baddr; ++ hash_ix ^= (*baddr) & 0x3f; ++ hash_ix ^= ((*baddr) >> 6) & 0x03; ++ ++baddr; ++ hash_ix ^= ((*baddr) << 2) & 0x03c; ++ hash_ix ^= ((*baddr) >> 4) & 0xf; ++ ++baddr; ++ hash_ix ^= ((*baddr) << 4) & 0x30; ++ hash_ix ^= ((*baddr) >> 2) & 0x3f; ++ ++ hash_ix &= 0x3f; ++ ++ if (hash_ix > 32) ++ hi_bits |= (1 << (hash_ix - 32)); ++ else ++ lo_bits |= (1 << hash_ix); ++ } ++ ++ /* Disable individual receive. */ ++ rec_ctrl = ++ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl); ++ rec_ctrl.individual = regk_eth_no; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ } ++ ++ ga_lo.table = (unsigned int) lo_bits; ++ ga_hi.table = (unsigned int) hi_bits; ++ ++ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo); ++ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi); ++} ++ ++static int ++crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ++{ ++ struct mii_ioctl_data *data = if_mii(ifr); ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ int old_autoneg; ++ int rc = 0; ++ ++ spin_lock(&np->lock); /* Preempt protection */ ++ switch (cmd) { ++ case SET_ETH_ENABLE_LEDS: ++ np->use_leds = 1; ++ break; ++ case SET_ETH_DISABLE_LEDS: ++ np->use_leds = 0; ++ break; ++ case SET_ETH_AUTONEG: ++ old_autoneg = np->autoneg_normal; ++ np->autoneg_normal = *(int*)data; ++ if (np->autoneg_normal != old_autoneg) ++ crisv32_eth_negotiate(dev); ++ break; ++ default: ++ rc = generic_mii_ioctl(&np->mii_if, ++ if_mii(ifr), cmd, NULL); ++ break; ++ } ++ spin_unlock(&np->lock); ++ return rc; ++} ++ ++static int crisv32_eth_get_settings(struct net_device *dev, ++ struct ethtool_cmd *cmd) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ int err; ++ ++ spin_lock_irq(&np->lock); ++ err = mii_ethtool_gset(&np->mii_if, cmd); ++ spin_unlock_irq(&np->lock); ++ ++ /* The PHY may support 1000baseT, but the EtraxFS does not. */ ++ cmd->supported &= ~(SUPPORTED_1000baseT_Half ++ | SUPPORTED_1000baseT_Full); ++ return err; ++} ++ ++static int crisv32_eth_set_settings(struct net_device *dev, ++ struct ethtool_cmd *ecmd) ++{ ++ if (ecmd->autoneg == AUTONEG_ENABLE) { ++ crisv32_eth_set_duplex(dev, autoneg); ++ crisv32_eth_set_speed(dev, 0); ++ } else { ++ crisv32_eth_set_duplex(dev, ecmd->duplex); ++ crisv32_eth_set_speed(dev, ecmd->speed); ++ } ++ ++ return 0; ++} ++ ++static void crisv32_eth_get_drvinfo(struct net_device *dev, ++ struct ethtool_drvinfo *info) ++{ ++#ifdef CONFIG_ETRAXFS ++ strncpy(info->driver, "ETRAX FS", sizeof(info->driver) - 1); ++#else ++ strncpy(info->driver, "ARTPEC-3", sizeof(info->driver) - 1); ++#endif ++ strncpy(info->version, "$Revision: 1.197 $", sizeof(info->version) - 1); ++ strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1); ++ strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1); ++} ++ ++static int crisv32_eth_get_ethtool_sset_count(struct net_device *dev, ++ int stringset) ++{ ++ if (stringset != ETH_SS_STATS) ++ return -EINVAL; ++ ++ return ARRAY_SIZE(ethtool_stats_keys); ++} ++ ++static void crisv32_eth_get_ethtool_stats(struct net_device *dev, ++ struct ethtool_stats *stats, ++ u64 *data) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data[0] = np->tx_dma_restarts; ++ data[1] = np->tx_mac_resets; ++ data[2] = np->rx_dma_restarts; ++ data[3] = np->rx_dma_timeouts; ++ data[4] = np->rx_restarts_dropped; ++} ++ ++static void crisv32_eth_get_strings(struct net_device *dev, ++ u32 stringset, u8 *data) ++{ ++ switch (stringset) { ++ case ETH_SS_STATS: ++ memcpy(data, ðtool_stats_keys, ++ sizeof(ethtool_stats_keys)); ++ break; ++ default: ++ WARN_ON(1); ++ break; ++ } ++} ++ ++static int crisv32_eth_nway_reset(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ if (np->current_duplex == autoneg && np->current_speed_selection == 0) ++ crisv32_eth_negotiate(dev); ++ return 0; ++} ++/* The FS/A3 ethernet block has 23 32-bit config registers. */ ++/* plus 2 dma_descr_context */ ++/* plus 2 sets of ring pointers (active, prev, last) */ ++/* plus 2 sets of DMA registers 40*4 bytes = 0xA0 */ ++#define ETRAX_ETH_REGDUMP_LEN (23 * 4 + 2 * sizeof (dma_descr_context) + 2*3*4 + 2*0xA0) ++static int crisv32_eth_get_regs_len(struct net_device *dev) ++{ ++ return ETRAX_ETH_REGDUMP_LEN; ++} ++ ++static void crisv32_eth_get_regs(struct net_device *dev, ++ struct ethtool_regs *regs, void *_p) ++{ ++ u32 *p = _p; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ int i; ++ ++ /* Let's call this major version 0, minor version 1 with some ++ * undecided field separation in the version data. Previously ++ * only the eth regs were dumped (version=0: maj 0, min 0).*/ ++ regs->version = 1; ++ memset(p, 0, ETRAX_ETH_REGDUMP_LEN); ++ ++#define GET_REG32_LOOP(base, len) \ ++ do { \ ++ for (i = 0; i < len; i += 4) \ ++ *(p)++ = REG_READ(u32, (base) + i); \ ++ } while (0) ++ ++ GET_REG32_LOOP(np->eth_inst, 0x30); ++ /* Do not dump registers with read side effects. */ ++ GET_REG32_LOOP(np->eth_inst + 0x34, 1); ++ GET_REG32_LOOP(np->eth_inst + 0x3c, 1); ++ GET_REG32_LOOP(np->eth_inst + 0x44, 0x5c - 0x44); ++ ++ ++ memcpy(p, &np->ctxt_out, sizeof (dma_descr_context)); ++ p += sizeof (dma_descr_context)/4; ++ *(p++) = (u32) np->active_tx_desc; ++ *(p++) = (u32) np->prev_tx_desc; ++ *(p++) = (u32) np->catch_tx_desc; ++ ++ GET_REG32_LOOP(np->dma_out_inst, 0xa0); ++ ++ memcpy(p, &np->ctxt_in, sizeof (dma_descr_context)); ++ p += sizeof (dma_descr_context)/4; ++ *(p++) = (u32)np->active_rx_desc; ++ *(p++) = (u32)np->prev_rx_desc; ++ *(p++) = (u32)np->last_rx_desc; ++ ++ GET_REG32_LOOP(np->dma_in_inst, 0xa0); ++#undef GET_REG32_LOOP ++} ++ ++static struct ethtool_ops crisv32_ethtool_ops = { ++ .get_settings = crisv32_eth_get_settings, ++ .set_settings = crisv32_eth_set_settings, ++ .get_drvinfo = crisv32_eth_get_drvinfo, ++ .get_regs_len = crisv32_eth_get_regs_len, ++ .get_regs = crisv32_eth_get_regs, ++ .nway_reset = crisv32_eth_nway_reset, ++ .get_link = ethtool_op_get_link, ++ .get_strings = crisv32_eth_get_strings, ++ .get_ethtool_stats = crisv32_eth_get_ethtool_stats, ++ .get_sset_count = crisv32_eth_get_ethtool_sset_count ++}; ++ ++/* Is this function really needed? Use ethtool instead? */ ++static int crisv32_eth_set_config(struct net_device *dev, struct ifmap *map) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ spin_lock(&np->lock); /* Preempt protection */ ++ ++ switch (map->port) { ++ case IF_PORT_UNKNOWN: ++ /* Use autoneg */ ++ crisv32_eth_set_speed(dev, 0); ++ crisv32_eth_set_duplex(dev, autoneg); ++ break; ++ case IF_PORT_10BASET: ++ crisv32_eth_set_speed(dev, 10); ++ crisv32_eth_set_duplex(dev, autoneg); ++ break; ++ case IF_PORT_100BASET: ++ case IF_PORT_100BASETX: ++ crisv32_eth_set_speed(dev, 100); ++ crisv32_eth_set_duplex(dev, autoneg); ++ break; ++ case IF_PORT_100BASEFX: ++ case IF_PORT_10BASE2: ++ case IF_PORT_AUI: ++ spin_unlock(&np->lock); ++ return -EOPNOTSUPP; ++ break; ++ default: ++ printk(KERN_ERR "%s: Invalid media selected", ++ dev->name); ++ spin_unlock(&np->lock); ++ return -EINVAL; ++ } ++ spin_unlock(&np->lock); ++ return 0; ++} ++ ++static void crisv32_eth_negotiate(struct net_device *dev) ++{ ++ unsigned short data; ++ unsigned short ctrl1000; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); ++ ctrl1000 = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MII_CTRL1000); ++ ++ /* Make all capabilities available */ ++ data |= ADVERTISE_10HALF | ADVERTISE_10FULL | ++ ADVERTISE_100HALF | ADVERTISE_100FULL; ++ ctrl1000 |= ADVERTISE_1000HALF | ADVERTISE_1000FULL; ++ ++ /* Remove the speed capabilities that we that do not want */ ++ switch (np->current_speed_selection) { ++ case 10 : ++ data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL); ++ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); ++ break; ++ case 100 : ++ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL); ++ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); ++ break; ++ case 1000 : ++ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | ++ ADVERTISE_100HALF | ADVERTISE_100FULL); ++ break; ++ } ++ ++ /* Remove the duplex capabilites that we do not want */ ++ if (np->current_duplex == full) { ++ data &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF); ++ ctrl1000 &= ~(ADVERTISE_1000HALF); ++ } ++ else if (np->current_duplex == half) { ++ data &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL); ++ ctrl1000 &= ~(ADVERTISE_1000FULL); ++ } ++ ++ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data); ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, ++ MII_CTRL1000, ctrl1000); ++#endif ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); ++ if (np->autoneg_normal) { ++ /* Renegotiate with link partner */ ++ data |= BMCR_ANENABLE | BMCR_ANRESTART; ++ } else { ++ /* Don't negitiate speed or duplex */ ++ data &= ~(BMCR_ANENABLE | BMCR_ANRESTART); ++ ++ /* Set speed and duplex static */ ++ if (np->current_speed_selection == 10) { ++ data &= ~(BMCR_SPEED100 | BMCR_SPEED1000); ++ } ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ else if (np->current_speed_selection == 1000) { ++ data &= ~BMCR_SPEED100; ++ data |= BMCR_SPEED1000; ++ } ++#endif ++ else { ++ data |= BMCR_SPEED100; ++ data &= ~BMCR_SPEED1000; ++ } ++ ++ if (np->current_duplex != full) { ++ data &= ~BMCR_FULLDPLX; ++ } else { ++ data |= BMCR_FULLDPLX; ++ } ++ } ++ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data); ++} ++ ++static void crisv32_eth_check_speed(unsigned long idev) ++{ ++#ifndef CONFIG_ETRAX_NO_PHY ++ static int led_initiated = 0; ++ struct net_device *dev = (struct net_device *) idev; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ unsigned long data; ++ int old_speed; ++ unsigned long flags; ++ ++ BUG_ON(!np); ++ BUG_ON(!np->transceiver); ++ ++ spin_lock(&np->transceiver_lock); ++ ++ old_speed = np->current_speed; ++ ++ /* Do a fake read. This is needed for DM9161, otherwise the link will ++ * go up and down all the time. ++ */ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR); ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR); ++ ++ if (!(data & BMSR_LSTATUS)) ++ np->current_speed = 0; ++ else ++ np->transceiver->check_speed(dev); ++ ++ spin_lock_irqsave(&np->leds->led_lock, flags); ++ if ((old_speed != np->current_speed) || !led_initiated) { ++ led_initiated = 1; ++ np->leds->clear_led_timer.data = (unsigned long) dev; ++ if (np->current_speed) { ++ if (!np->link) ++ netif_carrier_on(dev); ++ crisv32_set_network_leds(CRIS_LED_LINK, dev); ++ np->link = 1; ++ } else { ++ if (np->link) ++ netif_carrier_off(dev); ++ crisv32_set_network_leds(CRIS_LED_NOLINK, dev); ++ np->link = 0; ++ } ++ } ++ spin_unlock_irqrestore(&np->leds->led_lock, flags); ++ ++ /* Reinitialize the timer. */ ++ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; ++ add_timer(&np->speed_timer); ++ ++ spin_unlock(&np->transceiver_lock); ++#endif ++} ++ ++static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ spin_lock(&np->transceiver_lock); ++ if (np->current_speed_selection != speed) { ++ np->current_speed_selection = speed; ++ crisv32_eth_negotiate(dev); ++ } ++ spin_unlock(&np->transceiver_lock); ++} ++ ++static void crisv32_eth_check_duplex(unsigned long idev) ++{ ++#ifndef CONFIG_ETRAX_NO_PHY ++ struct net_device *dev = (struct net_device *) idev; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ reg_eth_rw_rec_ctrl rec_ctrl; ++ int old_duplex = np->full_duplex; ++ ++ np->transceiver->check_duplex(dev); ++ ++ if (old_duplex != np->full_duplex) { ++ /* Duplex changed. */ ++ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, ++ rw_rec_ctrl); ++ rec_ctrl.duplex = np->full_duplex; ++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl); ++ } ++ ++ /* Reinitialize the timer. */ ++ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; ++ add_timer(&np->duplex_timer); ++#endif ++} ++ ++static void ++crisv32_eth_set_duplex(struct net_device *dev, enum duplex new_duplex) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ spin_lock(&np->transceiver_lock); ++ if (np->current_duplex != new_duplex) { ++ np->current_duplex = new_duplex; ++ crisv32_eth_negotiate(dev); ++ } ++ spin_unlock(&np->transceiver_lock); ++} ++ ++static int crisv32_eth_probe_transceiver(struct net_device *dev) ++{ ++#ifndef CONFIG_ETRAX_NO_PHY ++ unsigned int phyid_high; ++ unsigned int phyid_low; ++ unsigned int oui; ++ struct transceiver_ops *ops = NULL; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ /* Probe MDIO physical address. */ ++ for (np->mii_if.phy_id = 0; ++ np->mii_if.phy_id <= 31; np->mii_if.phy_id++) { ++ if (crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR) ++ != 0xffff) ++ break; ++ } ++ ++ if (np->mii_if.phy_id == 32) ++ return -ENODEV; ++ ++ /* Get manufacturer. */ ++ phyid_high = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MII_PHYSID1); ++ phyid_low = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MII_PHYSID2); ++ ++ oui = (phyid_high << 6) | (phyid_low >> 10); ++ ++ for (ops = &transceivers[0]; ops->oui; ops++) { ++ if (ops->oui == oui) ++ break; ++ } ++ ++ np->transceiver = ops; ++ ++ if (oui == DM9161_OUI) { ++ /* Do not bypass the scrambler/descrambler, this is needed ++ * to make 10Mbit work. ++ */ ++ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, ++ MII_DM9161_SCR,MII_DM9161_SCR_INIT); ++ /* Clear 10BTCSR to default */ ++ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, ++ MII_DM9161_10BTCSR, ++ MII_DM9161_10BTCSR_INIT); ++ } ++ return 0; ++#else ++ return -ENODEV; ++#endif ++} ++ ++#ifndef CONFIG_ETRAX_NO_PHY ++static void generic_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); ++ if ((data & ADVERTISE_100FULL) || ++ (data & ADVERTISE_100HALF)) ++ np->current_speed = 100; ++ else ++ np->current_speed = 10; ++} ++ ++static void generic_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); ++ if ((data & ADVERTISE_10FULL) || ++ (data & ADVERTISE_100FULL)) ++ np->full_duplex = 1; ++ else ++ np->full_duplex = 0; ++} ++ ++static void broadcom_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_AUX_CTRL_STATUS_REG); ++ np->current_speed = (data & MDIO_BC_SPEED ? 100 : 10); ++} ++ ++static void broadcom_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_AUX_CTRL_STATUS_REG); ++ np->full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0; ++} ++ ++static void tdk_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_TDK_DIAGNOSTIC_REG); ++ np->current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10); ++} ++ ++static void tdk_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_TDK_DIAGNOSTIC_REG); ++ np->full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0; ++ ++} ++ ++static void intel_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_INT_STATUS_REG_2); ++ np->current_speed = (data & MDIO_INT_SPEED ? 100 : 10); ++} ++ ++static void intel_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_INT_STATUS_REG_2); ++ np->full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0; ++} ++ ++static void national_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_NAT_LINK_AN_REG); ++ if (data & MDIO_NAT_1000) ++ np->current_speed = 1000; ++ else if (data & MDIO_NAT_100) ++ np->current_speed = 100; ++ else ++ np->current_speed = 10; ++} ++ ++static void national_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_NAT_LINK_AN_REG); ++ if (data & MDIO_NAT_FULL_DUPLEX_IND) ++ np->full_duplex = 1; ++ else ++ np->full_duplex = 0; ++} ++ ++static void vitesse_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_VIT_AUX_STAT); ++ if ((data & 0x18) == MDIO_VIT_1000) ++ np->current_speed = 1000; ++ else if ((data & 0x18) == MDIO_VIT_100) ++ np->current_speed = 100; ++ else ++ np->current_speed = 10; ++} ++ ++static void vitesse_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MDIO_VIT_AUX_STAT); ++ if (data & 0x20) ++ np->full_duplex = 1; ++ else ++ np->full_duplex = 0; ++} ++ ++static void davicom_check_speed(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); ++ np->current_speed = (data & BMCR_SPEED100) ? 100 : 10; ++} ++ ++static void davicom_check_duplex(struct net_device *dev) ++{ ++ unsigned long data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); ++ np->full_duplex = (data & BMCR_FULLDPLX) ? 1 : 0; ++} ++#endif ++ ++#if 0 ++static void crisv32_eth_reset_tranceiver(struct net_device *dev) ++{ ++ int i; ++ unsigned short cmd; ++ unsigned short data; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); ++ ++ cmd = (MDIO_START << 14) ++ | (MDIO_WRITE << 12) ++ | (np->mii_if.phy_id << 7) ++ | (MII_BMCR << 2); ++ ++ crisv32_eth_send_mdio_cmd(dev, cmd, 1); ++ ++ data |= 0x8000; ++ ++ /* Magic value is number of bits. */ ++ for (i = 15; i >= 0; i--) ++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data)); ++} ++#endif ++ ++static int ++crisv32_eth_get_mdio_reg(struct net_device *dev, int phyid, int reg_num) ++{ ++ int i; ++ unsigned short cmd; /* Data to be sent on MDIO port. */ ++ unsigned short data; /* Data read from MDIO. */ ++ ++#ifdef CONFIG_ETRAX_NO_PHY ++ return 0; ++#endif ++ ++ /* Start of frame, OP Code, Physical Address, Register Address. */ ++ cmd = (MDIO_START << 14) ++ | (MDIO_READ << 12) ++ | (phyid << 7) ++ | (reg_num << 2); ++ ++ crisv32_eth_send_mdio_cmd(dev, cmd, 0); ++ ++ data = 0; ++ ++ /* Receive data. Magic value is number of bits. */ ++ for (i = 15; i >= 0; i--) ++ data |= (crisv32_eth_receive_mdio_bit(dev) << i); ++ ++ return data; ++} ++ ++static void ++crisv32_eth_set_mdio_reg(struct net_device *dev, int phyid, int reg, int value) ++{ ++ int bitCounter; ++ unsigned short cmd; ++ ++#ifdef CONFIG_ETRAX_NO_PHY ++ return; ++#endif ++ cmd = (MDIO_START << 14) ++ | (MDIO_WRITE << 12) ++ | (phyid << 7) ++ | (reg << 2); ++ ++ crisv32_eth_send_mdio_cmd(dev, cmd, 1); ++ ++ /* Data... */ ++ for (bitCounter=15; bitCounter>=0 ; bitCounter--) { ++ crisv32_eth_send_mdio_bit(dev, GET_BIT(bitCounter, value)); ++ } ++} ++ ++static void ++crisv32_eth_send_mdio_cmd(struct net_device *dev, unsigned short cmd, ++ int write_cmd) ++{ ++ int i; ++ unsigned char data = 0x2; ++ ++ /* Preamble. Magic value is number of bits. */ ++ for (i = 31; i >= 0; i--) ++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, MDIO_PREAMBLE)); ++ ++ for (i = 15; i >= 2; i--) ++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, cmd)); ++ ++ /* Turnaround. */ ++ for (i = 1; i >= 0; i--) ++ if (write_cmd) ++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data)); ++ else ++ crisv32_eth_receive_mdio_bit(dev); ++} ++ ++static void crisv32_eth_send_mdio_bit(struct net_device *dev, unsigned char bit) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ reg_eth_rw_mgm_ctrl mgm_ctrl = { ++ .mdoe = regk_eth_yes, ++ .mdio = bit & 1 ++ }; ++ ++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); ++ ++ udelay(1); ++ ++ mgm_ctrl.mdc = 1; ++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); ++ ++ udelay(1); ++} ++ ++static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev) ++{ ++ reg_eth_r_stat stat; ++ reg_eth_rw_mgm_ctrl mgm_ctrl = {0}; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ ++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); ++ stat = REG_RD(eth, np->eth_inst, r_stat); ++ ++ udelay(1); ++ ++ mgm_ctrl.mdc = 1; ++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl); ++ ++ udelay(1); ++ return stat.mdio; ++} ++ ++static void crisv32_clear_network_leds(unsigned long priv) ++{ ++ struct net_device *dev = (struct net_device *)priv; ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&np->leds->led_lock, flags); ++ if (np->leds->led_active && time_after(jiffies, ++ np->leds->led_next_time)) { ++ crisv32_set_network_leds(CRIS_LED_NOACTIVITY, dev); ++ ++ /* Set the earliest time we may set the LED */ ++ np->leds->led_next_time = jiffies + NET_FLASH_PAUSE; ++ np->leds->led_active = 0; ++ } ++ spin_unlock_irqrestore(&np->leds->led_lock, flags); ++} ++ ++static void crisv32_set_network_leds(int active, struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ int light_leds = 0; ++ ++ if (np->leds->ledgrp == CRIS_LED_GRP_NONE) ++ return; ++ ++ if (!np->use_leds) ++ return; ++ ++ if (active == CRIS_LED_NOLINK) { ++ if (dev == crisv32_dev[0]) ++ np->leds->ifisup[0] = 0; ++ else ++ np->leds->ifisup[1] = 0; ++ } ++ else if (active == CRIS_LED_LINK) { ++ if (dev == crisv32_dev[0]) ++ np->leds->ifisup[0] = 1; ++ else ++ np->leds->ifisup[1] = 1; ++#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK) ++ light_leds = 1; ++ } else { ++ light_leds = (active == CRIS_LED_NOACTIVITY); ++#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY) ++ light_leds = 0; ++ } else { ++ light_leds = (active == CRIS_LED_ACTIVITY); ++#else ++#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY" ++#endif ++ } ++ ++ if (!np->current_speed) { ++ /* Set link down if none of the interfaces that use this led ++ group is up */ ++ if ((np->leds->ifisup[0] + np->leds->ifisup[1]) == 0) { ++#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION) ++ /* Make LED red, link is down */ ++ NET_LED_SET(np->leds->ledgrp, CRIS_LED_RED); ++#else ++ NET_LED_SET(np->leds->ledgrp, CRIS_LED_OFF); ++#endif ++ } ++ } else if (light_leds) { ++ if (np->current_speed == 10) ++ NET_LED_SET(np->leds->ledgrp, CRIS_LED_ORANGE); ++ else ++ NET_LED_SET(np->leds->ledgrp, CRIS_LED_GREEN); ++ } else ++ NET_LED_SET(np->leds->ledgrp, CRIS_LED_OFF); ++} ++ ++#ifdef CONFIG_NET_POLL_CONTROLLER ++static void crisv32_netpoll(struct net_device *netdev) ++{ ++ crisv32rx_eth_interrupt(DMA0_INTR_VECT, netdev); ++} ++#endif ++ ++#ifdef CONFIG_CPU_FREQ ++static int crisv32_ethernet_freq_notifier(struct notifier_block *nb, ++ unsigned long val, void *data) ++{ ++ struct cpufreq_freqs *freqs = data; ++ int i; ++ if (val != CPUFREQ_POSTCHANGE) ++ return 0; ++ ++ for (i = 0; i < 2; i++) { ++ struct net_device *dev = crisv32_dev[i]; ++ unsigned short data; ++ if (dev == NULL) ++ continue; ++ ++ data = crisv32_eth_get_mdio_reg(dev, np->mii_if.phy_id, ++ MII_BMCR); ++ if (freqs->new == 200000) ++ data &= ~BMCR_PDOWN; ++ else ++ data |= BMCR_PDOWN; ++ crisv32_eth_set_mdio_reg(dev, np->mii_if.phy_id, ++ MII_BMCR, data); ++ } ++ return 0; ++} ++#endif ++ ++#if 0 ++/* ++ * Must be called with the np->lock held. ++ */ ++static void crisv32_ethernet_bug(struct net_device *dev) ++{ ++ struct crisv32_ethernet_local *np = netdev_priv(dev); ++ dma_descr_data *dma_pos; ++ dma_descr_data *in_dma_pos; ++ reg_dma_rw_stat stat = {0}; ++ reg_dma_rw_stat in_stat = {0}; ++ int i; ++ ++ /* Get the current output dma position. */ ++ stat = REG_RD(dma, np->dma_out_inst, rw_stat); ++ ++ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst, rw_data)); ++ in_dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_in_inst, rw_data)); ++ in_stat = REG_RD(dma, np->dma_in_inst, rw_stat); ++ ++ printk("%s:\n" ++ "stat.list_state=%x\n" ++ "stat.mode=%x\n" ++ "stat.stream_cmd_src=%x\n" ++ "dma_pos=%x\n" ++ "tx catch=%x active=%x\n" ++ "packets=%d queue=%d sender_started=%d\n" ++ "intr_vect.r_vect=%x\n" ++ "dma.r_masked_intr=%x dma.rw_ack_intr=%x " ++ "dma.r_intr=%x dma.rw_intr_masked=%x\n" ++ "eth.r_stat=%x\n", ++ __func__, ++ stat.list_state, stat.mode, stat.stream_cmd_src, ++ (unsigned int)dma_pos, ++ (unsigned int)&np->catch_tx_desc->descr, ++ (unsigned int)&np->active_tx_desc->descr, ++ np->txpackets, ++ netif_queue_stopped(dev), np->sender_started, ++ REG_RD_INT(intr_vect, regi_irq, r_vect), ++ REG_RD_INT(dma, np->dma_out_inst, r_masked_intr), ++ REG_RD_INT(dma, np->dma_out_inst, rw_ack_intr), ++ REG_RD_INT(dma, np->dma_out_inst, r_intr), ++ REG_RD_INT(dma, np->dma_out_inst, rw_intr_mask), ++ REG_RD_INT(eth, np->eth_inst, r_stat)); ++ ++ printk("in_stat.list_state=%x\n" ++ "in_stat.mode=%x\n" ++ "in_stat.stream_cmd_src=%x\n" ++ "in_dma_pos=%x\n" ++ "rx last=%x prev=%x active=%x\n", ++ in_stat.list_state, in_stat.mode, in_stat.stream_cmd_src, ++ (unsigned int)in_dma_pos, ++ (unsigned int)&np->last_rx_desc->descr, ++ (unsigned int)&np->prev_rx_desc->descr, ++ (unsigned int)&np->active_rx_desc->descr); ++ ++#if 0 ++ printk("rx-descriptors:\n"); ++ for (i = 0; i < NBR_RX_DESC; i++) { ++ printk("rxdesc[%d]=0x%x\n", i, (unsigned int) ++ virt_to_phys(&np->dma_rx_descr_list[i].descr)); ++ printk("rxdesc[%d].skb=0x%x\n", i, ++ (unsigned int)np->dma_rx_descr_list[i].skb); ++ printk("rxdesc[%d].buf=0x%x\n", i, ++ (unsigned int)np->dma_rx_descr_list[i].descr.buf); ++ printk("rxdesc[%d].after=0x%x\n", i, ++ (unsigned int)np->dma_rx_descr_list[i].descr.after); ++ printk("rxdesc[%d].intr=%x\n", i, ++ np->dma_rx_descr_list[i].descr.intr); ++ printk("rxdesc[%d].eol=%x\n", i, ++ np->dma_rx_descr_list[i].descr.eol); ++ printk("rxdesc[%d].out_eop=%x\n", i, ++ np->dma_rx_descr_list[i].descr.out_eop); ++ printk("rxdesc[%d].in_eop=%x\n", i, ++ np->dma_rx_descr_list[i].descr.in_eop); ++ printk("rxdesc[%d].wait=%x\n", i, ++ np->dma_rx_descr_list[i].descr.wait); ++ } ++#endif ++ ++#if 1 ++ printk("tx-descriptors:\n"); ++ for (i = 0; i < NBR_TX_DESC; i++) { ++ printk("txdesc[%d]=0x%x\n", i, (unsigned int) ++ virt_to_phys(&np->dma_tx_descr_list[i].descr)); ++ printk("txdesc[%d].skb=0x%x\n", i, ++ (unsigned int)np->dma_tx_descr_list[i].skb); ++ printk("txdesc[%d].buf=0x%x\n", i, ++ (unsigned int)np->dma_tx_descr_list[i].descr.buf); ++ printk("txdesc[%d].after=0x%x\n", i, ++ (unsigned int)np->dma_tx_descr_list[i].descr.after); ++ printk("txdesc[%d].intr=%x\n", i, ++ np->dma_tx_descr_list[i].descr.intr); ++ printk("txdesc[%d].eol=%x\n", i, ++ np->dma_tx_descr_list[i].descr.eol); ++ printk("txdesc[%d].out_eop=%x\n", i, ++ np->dma_tx_descr_list[i].descr.out_eop); ++ printk("txdesc[%d].in_eop=%x\n", i, ++ np->dma_tx_descr_list[i].descr.in_eop); ++ printk("txdesc[%d].wait=%x\n", i, ++ np->dma_tx_descr_list[i].descr.wait); ++ } ++#endif ++} ++#endif ++ ++static int __init crisv32_boot_setup(char *str) ++{ ++ struct sockaddr sa = {0}; ++ int i; ++ ++ /* Parse the colon separated Ethernet station address */ ++ for (i = 0; i < ETH_ALEN; i++) { ++ unsigned int tmp; ++ if (sscanf(str + 3*i, "%2x", &tmp) != 1) { ++ printk(KERN_WARNING "Malformed station address"); ++ return 0; ++ } ++ sa.sa_data[i] = (char)tmp; ++ } ++ ++ default_mac_iface0 = sa; ++ return 1; ++} ++ ++__setup("crisv32_eth=", crisv32_boot_setup); ++ ++module_init(crisv32_ethernet_init); +diff --git a/drivers/net/cris/eth_v32.h b/drivers/net/cris/eth_v32.h +new file mode 100644 +index 0000000..b6b0c7c +--- /dev/null ++++ b/drivers/net/cris/eth_v32.h +@@ -0,0 +1,297 @@ ++/* ++ * Definitions for ETRAX FS ethernet driver. ++ * ++ * Copyright (C) 2003, 2004, 2005 Axis Communications. ++ */ ++ ++#ifndef _ETRAX_ETHERNET_H_ ++#define _ETRAX_ETHERNET_H_ ++ ++#include ++ ++#define MAX_MEDIA_DATA_SIZE 1522 /* Max packet size. */ ++ ++#define NBR_RX_DESC 128 /* Number of RX descriptors. */ ++#define NBR_TX_DESC 16 /* Number of TX descriptors. */ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++#define NBR_INTMEM_RX_DESC 16 /* Number of RX descriptors in int. mem. ++ * when running in gigabit mode. ++ * Should be less then NBR_RX_DESC ++ */ ++#define NBR_INTMEM_TX_BUF 4 /* Number of TX buffers in int. mem ++ * when running in gigabit mode. ++ * Should be less than NBR_TX_DESC ++ */ ++#endif ++ ++/* Large packets are sent directly to upper layers while small packets ++ * are copied (to reduce memory waste). The following constant ++ * decides the breakpoint. ++ */ ++#define RX_COPYBREAK (256) ++ ++#define ETHER_HEAD_LEN (14) ++ ++/* ++ * MDIO constants. ++ */ ++#define MDIO_START 0x1 ++#define MDIO_READ 0x2 ++#define MDIO_WRITE 0x1 ++#define MDIO_PREAMBLE 0xfffffffful ++ ++/* Broadcom specific */ ++#define MDIO_AUX_CTRL_STATUS_REG 0x18 ++#define MDIO_BC_FULL_DUPLEX_IND 0x1 ++#define MDIO_BC_SPEED 0x2 ++ ++/* TDK specific */ ++#define MDIO_TDK_DIAGNOSTIC_REG 18 ++#define MDIO_TDK_DIAGNOSTIC_RATE 0x400 ++#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800 ++ ++/*Intel LXT972A specific*/ ++#define MDIO_INT_STATUS_REG_2 0x0011 ++#define MDIO_INT_FULL_DUPLEX_IND ( 0x0001 << 9 ) ++#define MDIO_INT_SPEED ( 0x0001 << 14 ) ++ ++/*National Semiconductor DP83865 specific*/ ++#define MDIO_NAT_LINK_AN_REG 0x11 ++#define MDIO_NAT_1000 (0x0001 << 4) ++#define MDIO_NAT_100 (0x0001 << 3) ++#define MDIO_NAT_FULL_DUPLEX_IND (0x0001 << 1) ++ ++/* Vitesse VCS8641 specific */ ++#define MDIO_VIT_AUX_STAT 0x1c ++#define MDIO_VIT_1000 (0x2 << 3) ++#define MDIO_VIT_100 (0x1 << 3) ++#define MDIO_VIT_10 0 ++#define MDIO_VIT_FD (0x1 << 5) ++ ++/* Davicom DM9161 specific */ ++#define DM9161_OUI 0x606E ++#define MII_DM9161_SCR 0x10 ++#define MII_DM9161_SCR_INIT 0x0610 ++#define MII_DM9161_SCR_RMII 0x0100 ++#define MII_DM9161_10BTCSR 0x12 ++#define MII_DM9161_10BTCSR_INIT 0x7800 ++ ++/* Network flash constants */ ++#define NET_FLASH_TIME (HZ/50) /* 20 ms */ ++#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */ ++#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 seconds. */ ++#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 seconds. */ ++ ++/* Duplex settings. */ ++enum duplex { ++ half, ++ full, ++ autoneg ++}; ++ ++/* Some transceivers requires special handling. */ ++struct transceiver_ops { ++ unsigned int oui; ++ void (*check_speed) (struct net_device * dev); ++ void (*check_duplex) (struct net_device * dev); ++}; ++ ++typedef struct crisv32_eth_descr { ++ dma_descr_data descr __attribute__ ((__aligned__(32))); ++ struct sk_buff *skb; ++ unsigned char *linearized_packet; ++} crisv32_eth_descr; ++ ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++struct tx_buffer_list { ++ struct tx_buffer_list *next; ++ unsigned char *buf; ++ char free; ++}; ++#endif ++ ++/* LED stuff */ ++#define CRIS_LED_GRP_0 0 ++#define CRIS_LED_GRP_1 1 ++#define CRIS_LED_GRP_NONE 2 ++ ++#define CRIS_LED_ACTIVITY 0 ++#define CRIS_LED_NOACTIVITY 1 ++#define CRIS_LED_LINK 2 ++#define CRIS_LED_NOLINK 3 ++ ++struct crisv32_eth_leds { ++ unsigned int ledgrp; ++ int led_active; ++ unsigned long led_next_time; ++ struct timer_list clear_led_timer; ++ spinlock_t led_lock; /* Protect LED state */ ++ int ifisup[2]; ++}; ++ ++#define NET_LED_SET(x,y) \ ++ do { \ ++ if (x == 0) CRIS_LED_NETWORK_GRP0_SET(y); \ ++ if (x == 1) CRIS_LED_NETWORK_GRP1_SET(y); \ ++ } while (0) ++ ++/* Information that need to be kept for each device. */ ++struct crisv32_ethernet_local { ++ /* FIXME: These align attributes don't really help. If they are really ++ * needed alignment has to be enforced at runtime, these objects ++ * are dynamically allocated. */ ++ dma_descr_context ctxt_in __attribute__ ((__aligned__(32))); ++ dma_descr_context ctxt_out __attribute__ ((__aligned__(32))); ++ ++ crisv32_eth_descr dma_rx_descr_list[NBR_RX_DESC]; ++ crisv32_eth_descr dma_tx_descr_list[NBR_TX_DESC]; ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++ struct tx_buffer_list tx_intmem_buf_list[NBR_INTMEM_TX_BUF]; ++ struct tx_buffer_list *intmem_tx_buf_active; ++ struct tx_buffer_list *intmem_tx_buf_catch; ++ int gigabit_mode; ++#endif ++ /* Transmit data path. */ ++ int dma_out_inst; ++ int sender_started; ++ ++ /* TX-ring state. */ ++ crisv32_eth_descr *active_tx_desc; ++ crisv32_eth_descr *prev_tx_desc; ++ crisv32_eth_descr *catch_tx_desc; ++ int txpackets; ++ int retrans; ++ int do_tx_recovery; ++ struct timer_list transmit_timer; ++ ++ /* Receive data path. */ ++ struct napi_struct napi; ++ int dma_in_inst; ++ ++ /* RX-ring state. */ ++ crisv32_eth_descr *active_rx_desc; ++ crisv32_eth_descr *prev_rx_desc; ++ crisv32_eth_descr *last_rx_desc; ++ ++ unsigned long newbuf; ++ u8 new_rx_package; ++ u8 pending_overrun; ++ u8 overrun_set; ++ u8 link; ++ int napi_processing; ++ struct timer_list receive_timer; ++ struct work_struct receive_work; ++ reg_eth_rw_rec_ctrl saved_rec_ctrl; ++ int saved_ga_lo; ++ int saved_ga_hi; ++ int do_rx_recovery; ++ ++ /* Control paths. */ ++ spinlock_t lock; ++ struct net_device *dev; ++ int eth_inst; ++ ++ /* Toggle network LEDs usage at runtime */ ++ int use_leds; ++ struct crisv32_eth_leds *leds; ++ ++ /* PHY control. */ ++ int fixed_phy; ++ spinlock_t transceiver_lock; /* Protect transceiver state. */ ++ struct transceiver_ops *transceiver; ++ struct mii_if_info mii_if; ++ ++ /* Specifies if we should do autonegotiation or not. ++ * TODO: This ad-hoc hack should be removed. Ethtool already supports ++ * this kind of control. ++ */ ++ int autoneg_normal; ++ ++ struct timer_list duplex_timer; ++ int full_duplex; ++ enum duplex current_duplex; ++ ++ struct timer_list speed_timer; ++ int current_speed; /* Speed read from tranceiver */ ++ int current_speed_selection; /* Speed selected by user */ ++ ++ /* Statistics. */ ++ u64 tx_dma_restarts; ++ u64 tx_mac_resets; ++ u64 rx_dma_restarts; ++ u64 rx_dma_timeouts; ++ u64 rx_restarts_dropped; ++ ++ struct net_device_stats stats; ++}; ++ ++/* Function prototypes. */ ++static int crisv32_ethernet_init(void); ++static int crisv32_ethernet_device_init(struct net_device *dev); ++static int crisv32_eth_open(struct net_device *dev); ++static int crisv32_eth_close(struct net_device *dev); ++static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr); ++static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id); ++static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id); ++static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id); ++static int crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev); ++static void crisv32_eth_hw_send_packet(unsigned char *buf, int length, ++ void *priv); ++static void crisv32_eth_do_tx_recovery(struct net_device *dev); ++static void crisv32_eth_set_rx_mode(struct net_device *dev); ++static int crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr, ++ int cmd); ++static int crisv32_eth_set_config(struct net_device *dev, struct ifmap *map); ++#ifdef CONFIG_CRIS_MACH_ARTPEC3 ++static void crisv32_eth_switch_intmem_usage(struct net_device *dev); ++#endif ++static void crisv32_eth_negotiate(struct net_device *dev); ++static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed); ++#ifndef CONFIG_ETRAX_NO_PHY ++static void crisv32_eth_check_duplex(unsigned long idev); ++static void crisv32_eth_check_speed(unsigned long idev); ++#endif ++ ++static void crisv32_eth_set_duplex(struct net_device *dev, enum duplex); ++static int crisv32_eth_probe_transceiver(struct net_device *dev); ++ ++static struct ethtool_ops crisv32_ethtool_ops; ++ ++#ifndef CONFIG_ETRAX_NO_PHY ++static void generic_check_speed(struct net_device *dev); ++static void generic_check_duplex(struct net_device *dev); ++static void broadcom_check_speed(struct net_device *dev); ++static void broadcom_check_duplex(struct net_device *dev); ++static void tdk_check_speed(struct net_device *dev); ++static void tdk_check_duplex(struct net_device *dev); ++static void intel_check_speed(struct net_device *dev); ++static void intel_check_duplex(struct net_device *dev); ++static void national_check_speed(struct net_device *dev); ++static void national_check_duplex(struct net_device *dev); ++static void vitesse_check_speed(struct net_device *dev); ++static void vitesse_check_duplex(struct net_device *dev); ++static void davicom_check_speed(struct net_device *dev); ++static void davicom_check_duplex(struct net_device *dev); ++#endif ++ ++#ifdef CONFIG_NET_POLL_CONTROLLER ++static void crisv32_netpoll(struct net_device *dev); ++#endif ++ ++static void crisv32_clear_network_leds(unsigned long dummy); ++static void crisv32_set_network_leds(int active, struct net_device *dev); ++ ++static int crisv32_eth_get_mdio_reg(struct net_device *dev, ++ int phyid, int reg_num); ++static void crisv32_eth_set_mdio_reg(struct net_device *dev, ++ int phyid, int reg_num, int val); ++static void crisv32_eth_send_mdio_cmd(struct net_device *dev, ++ unsigned short cmd, int write_cmd); ++static void crisv32_eth_send_mdio_bit(struct net_device *dev, ++ unsigned char bit); ++static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev); ++ ++static struct net_device_stats *crisv32_get_stats(struct net_device *dev); ++static void crisv32_start_dma_out(struct crisv32_ethernet_local *np); ++ ++#endif /* _ETRAX_ETHERNET_H_ */ diff --git a/target/linux/patches/4.1.30/cleankernel.patch b/target/linux/patches/4.1.30/cleankernel.patch deleted file mode 100644 index 59693f426..000000000 --- a/target/linux/patches/4.1.30/cleankernel.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -Nur linux-4.1.10.orig/scripts/Makefile.headersinst linux-4.1.10/scripts/Makefile.headersinst ---- linux-4.1.10.orig/scripts/Makefile.headersinst 2015-10-03 13:49:38.000000000 +0200 -+++ linux-4.1.10/scripts/Makefile.headersinst 2015-10-15 11:23:35.000000000 +0200 -@@ -107,7 +107,6 @@ - - targets += $(install-file) - $(install-file): scripts/headers_install.sh $(input-files1) $(input-files2) $(input-files3) FORCE -- $(if $(unwanted),$(call cmd,remove),) - $(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@))) - $(call if_changed,install) - diff --git a/target/linux/patches/4.1.30/cris-header.patch b/target/linux/patches/4.1.30/cris-header.patch deleted file mode 100644 index 2b5a88461..000000000 --- a/target/linux/patches/4.1.30/cris-header.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -Nur linux-3.16.2.orig/arch/cris/include/arch-v10/arch/Kbuild linux-3.16.2/arch/cris/include/arch-v10/arch/Kbuild ---- linux-3.16.2.orig/arch/cris/include/arch-v10/arch/Kbuild 2014-09-06 01:37:11.000000000 +0200 -+++ linux-3.16.2/arch/cris/include/arch-v10/arch/Kbuild 2014-09-26 19:24:50.000000000 +0200 -@@ -1 +1,2 @@ - # CRISv10 arch -+header-y += ptrace.h -diff -Nur linux-3.16.2.orig/arch/cris/include/arch-v32/arch/Kbuild linux-3.16.2/arch/cris/include/arch-v32/arch/Kbuild ---- linux-3.16.2.orig/arch/cris/include/arch-v32/arch/Kbuild 2014-09-06 01:37:11.000000000 +0200 -+++ linux-3.16.2/arch/cris/include/arch-v32/arch/Kbuild 2014-09-26 19:24:31.000000000 +0200 -@@ -1 +1,2 @@ - # CRISv32 arch -+header-y += ptrace.h diff --git a/target/linux/patches/4.1.30/initramfs-nosizelimit.patch b/target/linux/patches/4.1.30/initramfs-nosizelimit.patch deleted file mode 100644 index 40d2f6bd8..000000000 --- a/target/linux/patches/4.1.30/initramfs-nosizelimit.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 9a18df7a71bfa620b1278777d64783a359d7eb4e Mon Sep 17 00:00:00 2001 -From: Thorsten Glaser -Date: Sun, 4 May 2014 01:37:54 +0200 -Subject: [PATCH] mount tmpfs-as-rootfs (initramfs) with -o - nr_blocks=0,nr_inodes=0 - -I would have preferred to write this patch to be able to pass -rootflags=nr_blocks=0,nr_inodes=0 on the kernel command line, -and then hand these rootflags over to the initramfs (tmpfs) -mount in the same way the kernel hands them over to the block -device rootfs mount. But at least the Debian/m68k initrd also -parses $rootflags from the environment and adds it to the call -to the user-space mount for the eventual root device, which -would make the kernel command line rootflags option be used in -both places (tmpfs and e.g. ext4) which is guaranteed to error -out in at least one of them. - -This change is intended to aid people in a setup where the -initrd is the final root filesystem, i.e. not mounted over. -This is especially useful in automated tests running on qemu -for boards with constrained memory (e.g. 64 MiB on sh4). - -Considering that the initramfs is normally emptied out then -overmounted, this change is probably safe for setups where -initramfs just hosts early userspace, too, since the tmpfs -backing it is not accessible any more later on, AFAICT. - -Signed-off-by: Thorsten Glaser ---- - init/do_mounts.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/init/do_mounts.c b/init/do_mounts.c -index 82f2288..55a4cfe 100644 ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -594,6 +594,7 @@ out: - } - - static bool is_tmpfs; -+static char tmpfs_rootflags[] = "nr_blocks=0,nr_inodes=0"; - static struct dentry *rootfs_mount(struct file_system_type *fs_type, - int flags, const char *dev_name, void *data) - { -@@ -606,6 +607,9 @@ static struct dentry *rootfs_mount(struct file_system_type *fs_type, - if (IS_ENABLED(CONFIG_TMPFS) && is_tmpfs) - fill = shmem_fill_super; - -+ if (is_tmpfs) -+ data = tmpfs_rootflags; -+ - return mount_nodev(fs_type, flags, data, fill); - } - --- -2.0.0.rc0 - diff --git a/target/linux/patches/4.1.30/j2-core.patch b/target/linux/patches/4.1.30/j2-core.patch deleted file mode 100644 index 38136df2c..000000000 --- a/target/linux/patches/4.1.30/j2-core.patch +++ /dev/null @@ -1,2060 +0,0 @@ -diff -Nur linux-4.1.13.orig/arch/sh/Kconfig linux-4.1.13/arch/sh/Kconfig ---- linux-4.1.13.orig/arch/sh/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/Kconfig 2015-12-05 00:16:48.000000000 +0100 -@@ -66,7 +66,7 @@ - select HAVE_MIXED_BREAKPOINTS_REGS - select PERF_EVENTS - select ARCH_HIBERNATION_POSSIBLE if MMU -- select SPARSE_IRQ -+ select SPARSE_IRQ if !CPU_SUBTYPE_0PF - select HAVE_CC_STACKPROTECTOR - - config SUPERH64 -@@ -108,6 +108,9 @@ - config ARCH_HIBERNATION_POSSIBLE - def_bool n - -+config ARCH_USES_GETTIMEOFFSET -+ def_bool n -+ - config SYS_SUPPORTS_APM_EMULATION - bool - select ARCH_SUSPEND_POSSIBLE -@@ -184,6 +187,11 @@ - select CPU_SH2 - select UNCACHED_MAPPING - -+config CPU_SH2J -+ bool -+ select CPU_SH2 -+ select ARCH_USES_GETTIMEOFFSET -+ - config CPU_SH3 - bool - select CPU_HAS_INTEVT -@@ -303,6 +311,12 @@ - help - Select MX-G if running on an R8A03022BG part. - -+# SH-2J Processor Support -+ -+config CPU_SUBTYPE_0PF -+ bool "Support 0PF J2 SoftCore" -+ select CPU_SH2J -+ - # SH-3 Processor Support - - config CPU_SUBTYPE_SH7705 -@@ -753,6 +767,7 @@ - SH_7751_SOLUTION_ENGINE - default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 - default "0x00002000" if PAGE_SIZE_8KB -+ default "0x0003F000" if CPU_SUBTYPE_0PF - default "0x00001000" - help - This sets the default offset of zero page. -diff -Nur linux-4.1.13.orig/arch/sh/Makefile linux-4.1.13/arch/sh/Makefile ---- linux-4.1.13.orig/arch/sh/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/Makefile 2015-12-05 00:16:48.000000000 +0100 -@@ -4,6 +4,7 @@ - # Copyright (C) 1999 Kaz Kojima - # Copyright (C) 2002 - 2008 Paul Mundt - # Copyright (C) 2002 M. R. Brown -+# Copyright (C) 2012 SEI, Inc. (sh2j) - # - # This file is subject to the terms and conditions of the GNU General Public - # License. See the file "COPYING" in the main directory of this archive -@@ -19,6 +20,7 @@ - isa-$(CONFIG_SH_DSP) := sh - isa-$(CONFIG_CPU_SH2) := sh2 - isa-$(CONFIG_CPU_SH2A) := sh2a -+isa-$(CONFIG_CPU_SH2J) := sh2j - isa-$(CONFIG_CPU_SH3) := sh3 - isa-$(CONFIG_CPU_SH4) := sh4 - isa-$(CONFIG_CPU_SH4A) := sh4a -@@ -31,6 +33,8 @@ - endif - - cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) -+cflags-$(CONFIG_CPU_SH2J) := $(call cc-option,-m2,) \ -+ $(call cc-option,-melf,) - cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ - $(call cc-option,-m2a-nofpu,) \ - $(call cc-option,-m4-nofpu,) -@@ -91,6 +95,7 @@ - defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage - defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux - defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux -+defaultimage-$(CONFIG_SH_0PF) := vmlinux - - # Set some sensible Kbuild defaults - KBUILD_IMAGE := $(defaultimage-y) -@@ -173,6 +178,7 @@ - # As an example, in order of preference, SH-2A > SH-2 > common definitions. - # - cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a -+cpuincdir-$(CONFIG_CPU_SH2J) += cpu-sh2j - cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 - cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 - cpuincdir-$(CONFIG_CPU_SH4A) += cpu-sh4a -diff -Nur linux-4.1.13.orig/arch/sh/boards/Kconfig linux-4.1.13/arch/sh/boards/Kconfig ---- linux-4.1.13.orig/arch/sh/boards/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/boards/Kconfig 2015-12-05 00:16:48.000000000 +0100 -@@ -90,6 +90,13 @@ - Select 7343 SolutionEngine if configuring for a Hitachi - SH7343 (SH-Mobile 3AS) evaluation board. - -+config 0PF_FPGA -+ bool "0PF FPGA" -+ depends on CPU_SUBTYPE_0PF -+ help -+ Select 0PF_FPGA if you are configuring for an FPGA with -+ the SH2j-workalike SoftCore from http://0pf.org -+ - config SH_HP6XX - bool "HP6XX" - select SYS_SUPPORTS_APM_EMULATION -diff -Nur linux-4.1.13.orig/arch/sh/boards/Makefile linux-4.1.13/arch/sh/boards/Makefile ---- linux-4.1.13.orig/arch/sh/boards/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/boards/Makefile 2015-12-05 00:16:48.000000000 +0100 -@@ -15,3 +15,4 @@ - obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o - obj-$(CONFIG_SH_APSH4A3A) += board-apsh4a3a.o - obj-$(CONFIG_SH_APSH4AD0A) += board-apsh4ad0a.o -+obj-$(CONFIG_0PF_FPGA) += board-0pf.o -diff -Nur linux-4.1.13.orig/arch/sh/boards/board-0pf.c linux-4.1.13/arch/sh/boards/board-0pf.c ---- linux-4.1.13.orig/arch/sh/boards/board-0pf.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/sh/boards/board-0pf.c 2015-12-05 00:16:48.000000000 +0100 -@@ -0,0 +1,270 @@ -+/* -+ * board-0pf.c -+ * -+ * Copyright (C) 2006 Yoshinori Sato -+ * Copyright (C) 2009 D. Jeff Dionne -+ * -+ * 0PF j-series CPU on FPGA -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+int shj_irq_demux(int irq) -+{ -+ return irq; /* punt.. */ -+} -+ -+static void shj_ack_noop(struct irq_data *data) -+{ -+ asm("nop;nop"); -+ /* Dummy function. */ -+} -+ -+static inline void shj_enable_irq(struct irq_data *data) -+{ -+ unsigned int irq = data->irq; -+ volatile unsigned int vui; -+ -+// printk("%s: IRQ %d (0x%x)\n", __func__, irq, irq); -+ -+ switch (irq) { -+ case PIT_IRQ: -+ //AQ_PIO = 0x0BB; -+ /* enable, lvl 2, vector 64 */ -+ AQ_SYS = (1 << 26) | /* enable PIT */ -+ (0x02 << 20) | /* interrupt level 2 */ -+ (PIT_IRQ << 12) | /* vector 64 */ -+ 1; /* turn off interval timer */ -+ break; -+ -+ case Irq_UART0: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_UART0, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_UART0, 0x7); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_UART1: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_UART1, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_UART1, 0x7); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_GPS: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_GPS, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_GPS, 0x7); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_I2C: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_I2C, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_I2C, 0x7); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_EMAC: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_EMAC, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_EMAC, 0x8); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ printk("EMAC prio is: %x\n", vui); -+ break; -+ -+ case Irq_GPIO: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_GPIO, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_GPIO, 0x7); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_1PPS: // prio is higher for 1PPS porposes -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_1PPS, 0xf); /* clear old setting */ -+ vui |= ID2Pri(EIrqID_1PPS, 0x9); /* set interrupt level */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ printk("1PPS prio is: %x\n", vui); -+ break; -+ -+ default: -+ break; -+ -+ } -+} -+ -+static inline void shj_disable_irq(struct irq_data *data) -+{ -+ volatile unsigned int vui; -+ unsigned int irq = data->irq; -+ -+ printk("%s: IRQ %d\n", __func__, irq); -+ -+ switch (irq) { -+ case PIT_IRQ: -+ /* enable, lvl 2, vector 64 */ -+ AQ_SYS = (0 << 26) | /* disable PIT */ -+ (0x02 << 20) | /* interrupt level 2 */ -+ (PIT_IRQ << 12) | /* vector 64 */ -+ 1; /* turn off interval timer */ -+ break; -+ -+ case Irq_UART0: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_UART0, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_UART1: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_UART1, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_GPS: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_GPS, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_I2C: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_I2C, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_EMAC: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_EMAC, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_GPIO: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_GPIO, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ case Irq_1PPS: -+ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); -+ vui &= ~ID2Pri(EIrqID_1PPS, 0xf); /* clear setting */ -+ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; -+ break; -+ -+ default: -+ break; -+ } -+} -+ -+static struct irq_chip shj_irq_chip = { -+ .name = "0PF_INTC", -+ .irq_enable = shj_enable_irq, -+ .irq_disable = shj_disable_irq, -+ .irq_ack = shj_ack_noop, -+}; -+ -+static void __init shj_irq_init(void) -+{ -+ int c; -+ -+ printk(KERN_INFO "0PF FPGA interrupt controller...\n"); -+ -+ for (c = 0; c < NR_IRQS; c++) { -+ //irq_desc[c].action = NULL; -+ //irq_desc[c].depth = 1; -+ irq_set_chip_and_handler_name(c, &shj_irq_chip, -+ handle_simple_irq, "simple"); -+ } -+} -+ -+#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET -+// Commit 7b1f62076 switched this to a pointer -+/* -+ * Should return nanoseconds since last timer tick -+ */ -+u32 shj_gettimeoffset(void) -+{ -+ u32 clocks_counter = readl(SHJ_PIT_PCNTR); -+ -+ return clocks_counter * readl(SHJ_NSEC_PER_CLOCK); -+} -+ -+static void __init shj_board_setup(char **cmdline) -+{ -+ arch_gettimeoffset = shj_gettimeoffset; -+} -+#else -+#define shj_gettimeoffset 0 -+#endif -+ -+static struct sh_machine_vector mv_se __initmv = { -+ .mv_name = "0PF_FPGA", -+ //.mv_nr_irqs = 256, -+ .mv_irq_demux = shj_irq_demux, -+ .mv_init_irq = shj_irq_init, -+ .mv_setup = shj_board_setup, -+}; -+ -+static irqreturn_t timer_interrupt(int irq, void *dev_id) -+{ -+ // AQ_PIO = 0x011; // GREEN -+ -+ if (current->pid) -+ profile_tick(CPU_PROFILING); -+ -+ xtime_update(1); -+ update_process_times(user_mode(get_irq_regs())); -+ -+ return IRQ_HANDLED; -+} -+ -+static void __init start_pit(void) -+{ -+ if (request_irq -+ (PIT_IRQ, timer_interrupt, IRQF_TIMER, "pit", NULL)) -+ printk("irq_desc[%p] : fail to register\n", &irq_desc[PIT_IRQ]); -+ -+ irq_set_chip_and_handler_name(PIT_IRQ, &shj_irq_chip, handle_edge_irq, -+ "pit"); -+} -+ -+static int __init shj_initialise(void) -+{ -+ struct irq_data *data; -+ -+ pr_info("0PF Machine setup...\n"); -+ -+ start_pit(); -+ -+ data = irq_get_irq_data(Irq_UART0); -+ shj_enable_irq(data); -+ -+ data = irq_get_irq_data(Irq_UART1); -+ shj_enable_irq(data); -+ -+ data = irq_get_irq_data(Irq_EMAC); -+ shj_enable_irq(data); -+ -+ data = irq_get_irq_data(PIT_IRQ); -+ shj_enable_irq(data); -+ -+ pr_info("0PF Machine setup done.\n"); -+ -+ return 0; -+} -+ -+arch_initcall(shj_initialise); -diff -Nur linux-4.1.13.orig/arch/sh/configs/0pf_defconfig linux-4.1.13/arch/sh/configs/0pf_defconfig ---- linux-4.1.13.orig/arch/sh/configs/0pf_defconfig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/sh/configs/0pf_defconfig 2015-12-05 00:16:48.000000000 +0100 -@@ -0,0 +1,945 @@ -+# -+# Automatically generated file; DO NOT EDIT. -+# Linux/sh 4.1.0-rc6 Kernel Configuration -+# -+CONFIG_SUPERH=y -+CONFIG_SUPERH32=y -+# CONFIG_SUPERH64 is not set -+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_BUG=y -+CONFIG_GENERIC_HWEIGHT=y -+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set -+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set -+CONFIG_ARCH_USES_GETTIMEOFFSET=y -+CONFIG_STACKTRACE_SUPPORT=y -+CONFIG_LOCKDEP_SUPPORT=y -+CONFIG_HAVE_LATENCYTOP_SUPPORT=y -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_NO_IOPORT_MAP=y -+CONFIG_DMA_NONCOHERENT=y -+CONFIG_NEED_DMA_MAP_STATE=y -+CONFIG_NEED_SG_DMA_LENGTH=y -+CONFIG_PGTABLE_LEVELS=2 -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+CONFIG_IRQ_WORK=y -+ -+# -+# General setup -+# -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_CROSS_COMPILE="" -+# CONFIG_COMPILE_TEST is not set -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_HAVE_KERNEL_GZIP=y -+CONFIG_HAVE_KERNEL_BZIP2=y -+CONFIG_HAVE_KERNEL_LZMA=y -+CONFIG_HAVE_KERNEL_XZ=y -+CONFIG_HAVE_KERNEL_LZO=y -+CONFIG_KERNEL_GZIP=y -+# CONFIG_KERNEL_BZIP2 is not set -+# CONFIG_KERNEL_LZMA is not set -+# CONFIG_KERNEL_XZ is not set -+# CONFIG_KERNEL_LZO is not set -+CONFIG_DEFAULT_HOSTNAME="(none)" -+# CONFIG_SYSVIPC is not set -+# CONFIG_FHANDLE is not set -+# CONFIG_USELIB is not set -+CONFIG_HAVE_ARCH_AUDITSYSCALL=y -+ -+# -+# IRQ subsystem -+# -+CONFIG_MAY_HAVE_SPARSE_IRQ=y -+CONFIG_GENERIC_IRQ_SHOW=y -+CONFIG_IRQ_DOMAIN=y -+CONFIG_IRQ_FORCED_THREADING=y -+# CONFIG_SPARSE_IRQ is not set -+CONFIG_GENERIC_CLOCKEVENTS=y -+ -+# -+# Timers subsystem -+# -+CONFIG_HZ_PERIODIC=y -+ -+# -+# CPU/Task time and stats accounting -+# -+CONFIG_TICK_CPU_ACCOUNTING=y -+# CONFIG_BSD_PROCESS_ACCT is not set -+ -+# -+# RCU Subsystem -+# -+CONFIG_TINY_RCU=y -+CONFIG_SRCU=y -+# CONFIG_TASKS_RCU is not set -+# CONFIG_RCU_STALL_COMMON is not set -+# CONFIG_TREE_RCU_TRACE is not set -+CONFIG_RCU_KTHREAD_PRIO=0 -+# CONFIG_RCU_EXPEDITE_BOOT is not set -+# CONFIG_BUILD_BIN2C is not set -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=17 -+# CONFIG_CGROUPS is not set -+# CONFIG_CHECKPOINT_RESTORE is not set -+CONFIG_NAMESPACES=y -+# CONFIG_UTS_NS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_PID_NS is not set -+# CONFIG_SCHED_AUTOGROUP is not set -+# CONFIG_SYSFS_DEPRECATED is not set -+# CONFIG_RELAY is not set -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="initrd/root-dev initrd/root-files" -+CONFIG_INITRAMFS_ROOT_UID=0 -+CONFIG_INITRAMFS_ROOT_GID=0 -+# CONFIG_RD_GZIP is not set -+# CONFIG_RD_BZIP2 is not set -+# CONFIG_RD_LZMA is not set -+# CONFIG_RD_XZ is not set -+# CONFIG_RD_LZO is not set -+# CONFIG_RD_LZ4 is not set -+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -+CONFIG_SYSCTL=y -+CONFIG_ANON_INODES=y -+CONFIG_HAVE_UID16=y -+# CONFIG_EXPERT is not set -+CONFIG_UID16=y -+CONFIG_MULTIUSER=y -+CONFIG_SGETMASK_SYSCALL=y -+CONFIG_SYSFS_SYSCALL=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+CONFIG_BASE_FULL=y -+CONFIG_FUTEX=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_TIMERFD=y -+CONFIG_EVENTFD=y -+# CONFIG_BPF_SYSCALL is not set -+CONFIG_AIO=y -+CONFIG_ADVISE_SYSCALLS=y -+# CONFIG_EMBEDDED is not set -+CONFIG_HAVE_PERF_EVENTS=y -+CONFIG_PERF_USE_VMALLOC=y -+ -+# -+# Kernel Performance Events And Counters -+# -+CONFIG_PERF_EVENTS=y -+CONFIG_VM_EVENT_COUNTERS=y -+CONFIG_SLUB_DEBUG=y -+# CONFIG_COMPAT_BRK is not set -+# CONFIG_SLAB is not set -+CONFIG_SLUB=y -+# CONFIG_PROFILING is not set -+CONFIG_HAVE_OPROFILE=y -+# CONFIG_UPROBES is not set -+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -+CONFIG_HAVE_KPROBES=y -+CONFIG_HAVE_KRETPROBES=y -+CONFIG_HAVE_ARCH_TRACEHOOK=y -+CONFIG_HAVE_DMA_ATTRS=y -+CONFIG_GENERIC_SMP_IDLE_THREAD=y -+CONFIG_GENERIC_IDLE_POLL_SETUP=y -+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -+CONFIG_HAVE_CLK=y -+CONFIG_HAVE_DMA_API_DEBUG=y -+CONFIG_HAVE_HW_BREAKPOINT=y -+CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y -+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -+CONFIG_HAVE_CC_STACKPROTECTOR=y -+# CONFIG_CC_STACKPROTECTOR is not set -+CONFIG_CC_STACKPROTECTOR_NONE=y -+# CONFIG_CC_STACKPROTECTOR_REGULAR is not set -+# CONFIG_CC_STACKPROTECTOR_STRONG is not set -+CONFIG_MODULES_USE_ELF_RELA=y -+CONFIG_OLD_SIGSUSPEND=y -+CONFIG_OLD_SIGACTION=y -+ -+# -+# GCOV-based kernel profiling -+# -+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -+CONFIG_HAVE_GENERIC_DMA_COHERENT=y -+CONFIG_SLABINFO=y -+CONFIG_RT_MUTEXES=y -+CONFIG_BASE_SMALL=0 -+# CONFIG_MODULES is not set -+CONFIG_BLOCK=y -+# CONFIG_LBDAF is not set -+# CONFIG_BLK_DEV_BSG is not set -+# CONFIG_BLK_DEV_BSGLIB is not set -+# CONFIG_BLK_DEV_INTEGRITY is not set -+# CONFIG_BLK_CMDLINE_PARSER is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+CONFIG_EFI_PARTITION=y -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+CONFIG_DEFAULT_NOOP=y -+CONFIG_DEFAULT_IOSCHED="noop" -+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y -+CONFIG_INLINE_READ_UNLOCK=y -+CONFIG_INLINE_READ_UNLOCK_IRQ=y -+CONFIG_INLINE_WRITE_UNLOCK=y -+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y -+# CONFIG_FREEZER is not set -+ -+# -+# System type -+# -+CONFIG_CPU_SH2=y -+CONFIG_CPU_SH2J=y -+# CONFIG_CPU_SUBTYPE_SH7619 is not set -+# CONFIG_CPU_SUBTYPE_SH7201 is not set -+# CONFIG_CPU_SUBTYPE_SH7203 is not set -+# CONFIG_CPU_SUBTYPE_SH7206 is not set -+# CONFIG_CPU_SUBTYPE_SH7263 is not set -+# CONFIG_CPU_SUBTYPE_SH7264 is not set -+# CONFIG_CPU_SUBTYPE_SH7269 is not set -+# CONFIG_CPU_SUBTYPE_MXG is not set -+CONFIG_CPU_SUBTYPE_0PF=y -+# CONFIG_CPU_SUBTYPE_SH7705 is not set -+# CONFIG_CPU_SUBTYPE_SH7706 is not set -+# CONFIG_CPU_SUBTYPE_SH7707 is not set -+# CONFIG_CPU_SUBTYPE_SH7708 is not set -+# CONFIG_CPU_SUBTYPE_SH7709 is not set -+# CONFIG_CPU_SUBTYPE_SH7710 is not set -+# CONFIG_CPU_SUBTYPE_SH7712 is not set -+# CONFIG_CPU_SUBTYPE_SH7720 is not set -+# CONFIG_CPU_SUBTYPE_SH7721 is not set -+# CONFIG_CPU_SUBTYPE_SH7750 is not set -+# CONFIG_CPU_SUBTYPE_SH7091 is not set -+# CONFIG_CPU_SUBTYPE_SH7750R is not set -+# CONFIG_CPU_SUBTYPE_SH7750S is not set -+# CONFIG_CPU_SUBTYPE_SH7751 is not set -+# CONFIG_CPU_SUBTYPE_SH7751R is not set -+# CONFIG_CPU_SUBTYPE_SH7760 is not set -+# CONFIG_CPU_SUBTYPE_SH4_202 is not set -+# CONFIG_CPU_SUBTYPE_SH7723 is not set -+# CONFIG_CPU_SUBTYPE_SH7724 is not set -+# CONFIG_CPU_SUBTYPE_SH7734 is not set -+# CONFIG_CPU_SUBTYPE_SH7757 is not set -+# CONFIG_CPU_SUBTYPE_SH7763 is not set -+# CONFIG_CPU_SUBTYPE_SH7770 is not set -+# CONFIG_CPU_SUBTYPE_SH7780 is not set -+# CONFIG_CPU_SUBTYPE_SH7785 is not set -+# CONFIG_CPU_SUBTYPE_SH7786 is not set -+# CONFIG_CPU_SUBTYPE_SHX3 is not set -+# CONFIG_CPU_SUBTYPE_SH7343 is not set -+# CONFIG_CPU_SUBTYPE_SH7722 is not set -+# CONFIG_CPU_SUBTYPE_SH7366 is not set -+ -+# -+# Memory management options -+# -+CONFIG_QUICKLIST=y -+CONFIG_PAGE_OFFSET=0x00000000 -+CONFIG_FORCE_MAX_ZONEORDER=14 -+CONFIG_MEMORY_START=0x10000000 -+CONFIG_MEMORY_SIZE=0x8000000 -+# CONFIG_29BIT is not set -+CONFIG_32BIT=y -+CONFIG_ARCH_FLATMEM_ENABLE=y -+CONFIG_ARCH_SPARSEMEM_ENABLE=y -+CONFIG_ARCH_SPARSEMEM_DEFAULT=y -+CONFIG_ARCH_SELECT_MEMORY_MODEL=y -+CONFIG_PAGE_SIZE_4KB=y -+# CONFIG_PAGE_SIZE_8KB is not set -+# CONFIG_PAGE_SIZE_16KB is not set -+# CONFIG_PAGE_SIZE_64KB is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+CONFIG_SPARSEMEM_STATIC=y -+CONFIG_HAVE_MEMBLOCK=y -+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -+CONFIG_ARCH_DISCARD_MEMBLOCK=y -+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -+CONFIG_PAGEFLAGS_EXTENDED=y -+CONFIG_SPLIT_PTLOCK_CPUS=999999 -+# CONFIG_PHYS_ADDR_T_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_NR_QUICK=1 -+CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 -+CONFIG_NEED_PER_CPU_KM=y -+# CONFIG_CLEANCACHE is not set -+# CONFIG_ZPOOL is not set -+# CONFIG_ZBUD is not set -+ -+# -+# Cache configuration -+# -+# CONFIG_CACHE_WRITEBACK is not set -+# CONFIG_CACHE_WRITETHROUGH is not set -+CONFIG_CACHE_OFF=y -+ -+# -+# Processor features -+# -+# CONFIG_CPU_LITTLE_ENDIAN is not set -+CONFIG_CPU_BIG_ENDIAN=y -+# CONFIG_SH_FPU_EMU is not set -+ -+# -+# Board support -+# -+CONFIG_0PF_FPGA=y -+ -+# -+# Timer and clock configuration -+# -+CONFIG_SH_PCLK_FREQ=32000000 -+CONFIG_SH_CLK_CPG=y -+CONFIG_SH_CLK_CPG_LEGACY=y -+ -+# -+# CPU Frequency scaling -+# -+ -+# -+# CPU Frequency scaling -+# -+# CONFIG_CPU_FREQ is not set -+ -+# -+# DMA support -+# -+ -+# -+# Companion Chips -+# -+ -+# -+# Additional SuperH Device Drivers -+# -+# CONFIG_HEARTBEAT is not set -+# CONFIG_PUSH_SWITCH is not set -+ -+# -+# Kernel features -+# -+CONFIG_HZ_100=y -+# CONFIG_HZ_250 is not set -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=100 -+# CONFIG_SCHED_HRTICK is not set -+# CONFIG_CRASH_DUMP is not set -+CONFIG_PHYSICAL_START=0x10000000 -+# CONFIG_SECCOMP is not set -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+CONFIG_GUSA=y -+ -+# -+# SuperH / SH-Mobile Driver Options -+# -+CONFIG_SH_INTC=y -+ -+# -+# Interrupt controller options -+# -+ -+# -+# Boot options -+# -+CONFIG_ZERO_PAGE_OFFSET=0x0003F000 -+CONFIG_BOOT_LINK_OFFSET=0x00800000 -+CONFIG_ENTRY_OFFSET=0x00001000 -+# CONFIG_CMDLINE_OVERWRITE is not set -+CONFIG_CMDLINE_EXTEND=y -+CONFIG_CMDLINE="console=ttyUL0" -+ -+# -+# Bus options -+# -+# CONFIG_PCCARD is not set -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF_FDPIC=y -+CONFIG_BINFMT_SCRIPT=y -+CONFIG_BINFMT_FLAT=y -+# CONFIG_BINFMT_ZFLAT is not set -+# CONFIG_BINFMT_SHARED_FLAT is not set -+# CONFIG_HAVE_AOUT is not set -+# CONFIG_BINFMT_MISC is not set -+CONFIG_COREDUMP=y -+ -+# -+# Power management options (EXPERIMENTAL) -+# -+# CONFIG_PM is not set -+ -+# -+# CPU Idle -+# -+# CONFIG_CPU_IDLE is not set -+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set -+# CONFIG_NET is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+# CONFIG_UEVENT_HELPER is not set -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+# CONFIG_STANDALONE is not set -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+CONFIG_FW_LOADER=y -+# CONFIG_FIRMWARE_IN_KERNEL is not set -+CONFIG_EXTRA_FIRMWARE="" -+# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set -+CONFIG_ALLOW_DEV_COREDUMP=y -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_GENERIC_CPU_DEVICES is not set -+# CONFIG_DMA_SHARED_BUFFER is not set -+ -+# -+# Bus devices -+# -+# CONFIG_MTD is not set -+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -+# CONFIG_PARPORT is not set -+# CONFIG_BLK_DEV is not set -+ -+# -+# Misc devices -+# -+# CONFIG_SENSORS_LIS3LV02D is not set -+# CONFIG_DUMMY_IRQ is not set -+# CONFIG_ENCLOSURE_SERVICES is not set -+# CONFIG_SRAM is not set -+# CONFIG_C2PORT is not set -+ -+# -+# EEPROM support -+# -+# CONFIG_EEPROM_93CX6 is not set -+ -+# -+# Texas Instruments shared transport line discipline -+# -+ -+# -+# Altera FPGA firmware download module -+# -+ -+# -+# Intel MIC Bus Driver -+# -+ -+# -+# Intel MIC Host Driver -+# -+ -+# -+# Intel MIC Card Driver -+# -+# CONFIG_ECHO is not set -+# CONFIG_CXL_BASE is not set -+ -+# -+# SCSI device support -+# -+CONFIG_SCSI_MOD=y -+# CONFIG_RAID_ATTRS is not set -+# CONFIG_SCSI is not set -+# CONFIG_SCSI_DMA is not set -+CONFIG_HAVE_PATA_PLATFORM=y -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=y -+# CONFIG_INPUT_FF_MEMLESS is not set -+# CONFIG_INPUT_POLLDEV is not set -+# CONFIG_INPUT_SPARSEKMAP is not set -+# CONFIG_INPUT_MATRIXKMAP is not set -+ -+# -+# Userland interfaces -+# -+# CONFIG_INPUT_MOUSEDEV is not set -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+# CONFIG_INPUT_KEYBOARD is not set -+# CONFIG_INPUT_MOUSE is not set -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+CONFIG_TTY=y -+CONFIG_VT=y -+CONFIG_CONSOLE_TRANSLATIONS=y -+CONFIG_VT_CONSOLE=y -+CONFIG_HW_CONSOLE=y -+# CONFIG_VT_HW_CONSOLE_BINDING is not set -+CONFIG_UNIX98_PTYS=y -+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+# CONFIG_TRACE_SINK is not set -+CONFIG_DEVMEM=y -+# CONFIG_DEVKMEM is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_UARTLITE=y -+CONFIG_SERIAL_UARTLITE_CONSOLE=y -+CONFIG_SERIAL_UARTLITE_0PF=y -+# CONFIG_SERIAL_SH_SCI is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+# CONFIG_SERIAL_SCCNXP is not set -+# CONFIG_SERIAL_ALTERA_JTAGUART is not set -+# CONFIG_SERIAL_ALTERA_UART is not set -+# CONFIG_SERIAL_ARC is not set -+# CONFIG_SERIAL_FSL_LPUART is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+ -+# -+# I2C support -+# -+# CONFIG_I2C is not set -+# CONFIG_SPI is not set -+# CONFIG_SPMI is not set -+# CONFIG_HSI is not set -+ -+# -+# PPS support -+# -+# CONFIG_PPS is not set -+ -+# -+# PPS generators support -+# -+ -+# -+# PTP clock support -+# -+ -+# -+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -+# -+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_POWER_AVS is not set -+# CONFIG_HWMON is not set -+# CONFIG_THERMAL is not set -+# CONFIG_WATCHDOG is not set -+CONFIG_SSB_POSSIBLE=y -+ -+# -+# Sonics Silicon Backplane -+# -+# CONFIG_SSB is not set -+CONFIG_BCMA_POSSIBLE=y -+ -+# -+# Broadcom specific AMBA -+# -+# CONFIG_BCMA is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_CORE is not set -+# CONFIG_MFD_CROS_EC is not set -+# CONFIG_HTC_PASIC3 is not set -+# CONFIG_MFD_KEMPLD is not set -+# CONFIG_MFD_MT6397 is not set -+# CONFIG_MFD_SM501 is not set -+# CONFIG_ABX500_CORE is not set -+# CONFIG_MFD_SYSCON is not set -+# CONFIG_MFD_TI_AM335X_TSCADC is not set -+# CONFIG_MFD_TMIO is not set -+# CONFIG_REGULATOR is not set -+# CONFIG_MEDIA_SUPPORT is not set -+ -+# -+# Graphics support -+# -+ -+# -+# Direct Rendering Manager -+# -+ -+# -+# Frame buffer Devices -+# -+# CONFIG_FB is not set -+# CONFIG_FB_SH_MOBILE_MERAM is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+# CONFIG_VGASTATE is not set -+ -+# -+# Console display driver support -+# -+CONFIG_DUMMY_CONSOLE=y -+CONFIG_DUMMY_CONSOLE_COLUMNS=80 -+CONFIG_DUMMY_CONSOLE_ROWS=25 -+# CONFIG_SOUND is not set -+ -+# -+# HID support -+# -+# CONFIG_HID is not set -+CONFIG_USB_OHCI_LITTLE_ENDIAN=y -+# CONFIG_USB_SUPPORT is not set -+# CONFIG_UWB is not set -+# CONFIG_MMC is not set -+# CONFIG_MEMSTICK is not set -+# CONFIG_NEW_LEDS is not set -+# CONFIG_ACCESSIBILITY is not set -+CONFIG_RTC_LIB=y -+# CONFIG_RTC_CLASS is not set -+# CONFIG_DMADEVICES is not set -+# CONFIG_AUXDISPLAY is not set -+# CONFIG_VIRT_DRIVERS is not set -+ -+# -+# Virtio drivers -+# -+# CONFIG_VIRTIO_MMIO is not set -+ -+# -+# Microsoft Hyper-V guest support -+# -+# CONFIG_STAGING is not set -+CONFIG_CLKDEV_LOOKUP=y -+ -+# -+# Hardware Spinlock drivers -+# -+ -+# -+# Clock Source drivers -+# -+# CONFIG_ATMEL_PIT is not set -+# CONFIG_SH_TIMER_CMT is not set -+# CONFIG_SH_TIMER_MTU2 is not set -+# CONFIG_SH_TIMER_TMU is not set -+# CONFIG_EM_TIMER_STI is not set -+# CONFIG_MAILBOX is not set -+ -+# -+# Remoteproc drivers -+# -+# CONFIG_STE_MODEM_RPROC is not set -+ -+# -+# Rpmsg drivers -+# -+ -+# -+# SOC (System On Chip) specific Drivers -+# -+# CONFIG_SOC_TI is not set -+# CONFIG_PM_DEVFREQ is not set -+# CONFIG_EXTCON is not set -+# CONFIG_MEMORY is not set -+# CONFIG_IIO is not set -+# CONFIG_PWM is not set -+# CONFIG_IPACK_BUS is not set -+# CONFIG_RESET_CONTROLLER is not set -+# CONFIG_FMC is not set -+ -+# -+# PHY Subsystem -+# -+# CONFIG_GENERIC_PHY is not set -+# CONFIG_BCM_KONA_USB2_PHY is not set -+# CONFIG_POWERCAP is not set -+# CONFIG_MCB is not set -+ -+# -+# Android -+# -+# CONFIG_ANDROID is not set -+ -+# -+# File systems -+# -+# CONFIG_EXT2_FS is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_BTRFS_FS is not set -+# CONFIG_NILFS2_FS is not set -+# CONFIG_F2FS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+CONFIG_FILE_LOCKING=y -+# CONFIG_FSNOTIFY is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_INOTIFY_USER is not set -+# CONFIG_FANOTIFY is not set -+# CONFIG_QUOTA is not set -+# CONFIG_QUOTACTL is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+# CONFIG_OVERLAY_FS is not set -+ -+# -+# Caches -+# -+# CONFIG_FSCACHE is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=y -+# CONFIG_MSDOS_FS is not set -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="utf8" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_KERNFS=y -+CONFIG_SYSFS=y -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+# CONFIG_MISC_FILESYSTEMS is not set -+CONFIG_NLS=y -+CONFIG_NLS_DEFAULT="utf8" -+# CONFIG_NLS_CODEPAGE_437 is not set -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+# CONFIG_NLS_ISO8859_1 is not set -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+# CONFIG_NLS_MAC_ROMAN is not set -+# CONFIG_NLS_MAC_CELTIC is not set -+# CONFIG_NLS_MAC_CENTEURO is not set -+# CONFIG_NLS_MAC_CROATIAN is not set -+# CONFIG_NLS_MAC_CYRILLIC is not set -+# CONFIG_NLS_MAC_GAELIC is not set -+# CONFIG_NLS_MAC_GREEK is not set -+# CONFIG_NLS_MAC_ICELAND is not set -+# CONFIG_NLS_MAC_INUIT is not set -+# CONFIG_NLS_MAC_ROMANIAN is not set -+# CONFIG_NLS_MAC_TURKISH is not set -+CONFIG_NLS_UTF8=y -+ -+# -+# Kernel hacking -+# -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+ -+# -+# printk and dmesg options -+# -+# CONFIG_PRINTK_TIME is not set -+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 -+ -+# -+# Compile-time checks and compiler options -+# -+# CONFIG_ENABLE_WARN_DEPRECATED is not set -+# CONFIG_ENABLE_MUST_CHECK is not set -+CONFIG_FRAME_WARN=1024 -+# CONFIG_STRIP_ASM_SYMS is not set -+# CONFIG_UNUSED_SYMBOLS is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_DEBUG_SECTION_MISMATCH is not set -+# CONFIG_MAGIC_SYSRQ is not set -+# CONFIG_DEBUG_KERNEL is not set -+ -+# -+# Memory Debugging -+# -+# CONFIG_PAGE_EXTENSION is not set -+# CONFIG_SLUB_DEBUG_ON is not set -+# CONFIG_SLUB_STATS is not set -+CONFIG_HAVE_DEBUG_KMEMLEAK=y -+CONFIG_DEBUG_MEMORY_INIT=y -+ -+# -+# Debug Lockups and Hangs -+# -+# CONFIG_PANIC_ON_OOPS is not set -+CONFIG_PANIC_ON_OOPS_VALUE=0 -+CONFIG_PANIC_TIMEOUT=0 -+# CONFIG_DEBUG_TIMEKEEPING is not set -+ -+# -+# Lock Debugging (spinlocks, mutexes, etc...) -+# -+# CONFIG_STACKTRACE is not set -+CONFIG_HAVE_DEBUG_BUGVERBOSE=y -+CONFIG_DEBUG_BUGVERBOSE=y -+ -+# -+# RCU Debugging -+# -+# CONFIG_PROVE_RCU is not set -+# CONFIG_SPARSE_RCU_POINTER is not set -+# CONFIG_TORTURE_TEST is not set -+CONFIG_HAVE_FUNCTION_TRACER=y -+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -+CONFIG_HAVE_DYNAMIC_FTRACE=y -+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -+CONFIG_TRACING_SUPPORT=y -+# CONFIG_FTRACE is not set -+ -+# -+# Runtime Testing -+# -+# CONFIG_ATOMIC64_SELFTEST is not set -+# CONFIG_TEST_HEXDUMP is not set -+# CONFIG_TEST_STRING_HELPERS is not set -+# CONFIG_TEST_KSTRTOX is not set -+# CONFIG_TEST_RHASHTABLE is not set -+# CONFIG_DMA_API_DEBUG is not set -+# CONFIG_TEST_FIRMWARE is not set -+# CONFIG_TEST_UDELAY is not set -+# CONFIG_MEMTEST is not set -+# CONFIG_SAMPLES is not set -+CONFIG_HAVE_ARCH_KGDB=y -+# CONFIG_SH_STANDARD_BIOS is not set -+# CONFIG_DWARF_UNWINDER is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY_DMESG_RESTRICT is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITYFS is not set -+CONFIG_DEFAULT_SECURITY_DAC=y -+CONFIG_DEFAULT_SECURITY="" -+# CONFIG_CRYPTO is not set -+# CONFIG_BINARY_PRINTF is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+# CONFIG_HAVE_ARCH_BITREVERSE is not set -+CONFIG_GENERIC_STRNCPY_FROM_USER=y -+CONFIG_GENERIC_STRNLEN_USER=y -+CONFIG_GENERIC_IO=y -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_T10DIF is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC32_SELFTEST is not set -+CONFIG_CRC32_SLICEBY8=y -+# CONFIG_CRC32_SLICEBY4 is not set -+# CONFIG_CRC32_SARWATE is not set -+# CONFIG_CRC32_BIT is not set -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+# CONFIG_CRC8 is not set -+# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set -+# CONFIG_RANDOM32_SELFTEST is not set -+# CONFIG_XZ_DEC is not set -+# CONFIG_XZ_DEC_BCJ is not set -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_DMA=y -+CONFIG_GENERIC_ATOMIC64=y -+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -+# CONFIG_AVERAGE is not set -+# CONFIG_CORDIC is not set -+# CONFIG_DDR is not set -+# CONFIG_ARCH_HAS_SG_CHAIN is not set -diff -Nur linux-4.1.13.orig/arch/sh/include/asm/board-0pf.h linux-4.1.13/arch/sh/include/asm/board-0pf.h ---- linux-4.1.13.orig/arch/sh/include/asm/board-0pf.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/sh/include/asm/board-0pf.h 2015-12-05 00:16:48.000000000 +0100 -@@ -0,0 +1,247 @@ -+#ifndef SGM_BOARD_H -+#define SGM_BOARD_H -+ -+#define sys_IntTable (*(unsigned*)0x0) -+#define sys_IntVectors 256 -+ -+/* Some of interrupt is fixed vector */ -+#define Irq_MRES 0x02 /* Manual reset */ -+#define Irq_CPUERR 0x09 -+#define Irq_DMAERR 0x0a -+#define Irq_NMI 0x0b -+#define Irq_PIT 0x10 /* 100 Hz PIT */ -+#define Irq_EMAC 0x11 /* irqs(0) */ -+#define Irq_UART0 0x12 /* irqs(1) */ -+#define Irq_GPS 0x13 /* irqs(2) */ -+#define Irq_Ext 0x14 /* irqs(3) use by CS42518*/ -+#define Irq_1PPS 0x16 /* irqs(5) */ -+#define Irq_UART1 0x17 /* irqs(6) */ -+#define Irq_I2C 0x18 /* irqs(7) */ -+#define Irq_TMR 0x19 /* a 12 bit countdown counter */ -+#define Irq_GPIO 0x15 -+ -+/* External interrupt IDs */ -+#define EIrqID_EMAC 0 -+#define EIrqID_UART0 1 -+#define EIrqID_GPS 2 -+#define EIrqID_Ext 3 -+#define EIrqID_GPIO 4 -+#define EIrqID_1PPS 5 -+#define EIrqID_UART1 6 -+#define EIrqID_I2C 7 -+ -+/* External Interrupt ID convert to interrupt vector */ -+#define ID2Vect(x) (0x11 + (x)) -+ -+/* Convert external interupt ID to priority value */ -+#define ID2Pri(id, pri) ((pri) << ((id) <<2)) -+ -+/* Convert vector to interrupt entry address */ -+#define Vect2Irq(x) ((x) << 2) -+ -+#define PIT_IRQ Vect2Irq(Irq_PIT) -+#define EMAC_IRQ Vect2Irq(Irq_EMAC) -+#define UART0_IRQ Vect2Irq(Irq_UART0) -+#define GPS_IRQ Vect2Irq(Irq_GPS) -+#define EXT_IRQ Vect2Irq(Irq_Ext) -+#define UART1_IRQ Vect2Irq(Irq_UART1) -+#define I2C_IRQ Vect2Irq(Irq_I2C) -+#define TMR_IRQ Vect2Irq(Irq_TMR) -+ -+ -+/* End of interrupt definations */ -+#define sys_RAM_BASE 0x10000000 -+#define sys_PIO_BASE 0xabcd0000 -+#define sys_SPI_BASE 0xabcd0040 -+#define sys_I2C_BASE 0xabcd0080 // 0xabcd0020 -+#define sys_UART0_BASE 0xabcd0100 -+#define sys_SYS_BASE 0xabcd0200 -+#define sys_UART1_BASE 0xabcd0300 -+#define sys_GPS_BASE 0xabcd0400 -+#define sys_D2A_BASE 0xabcd0500 -+#define sys_EMAC_BASE 0xabce0000 -+ -+#define AQ_PIO (*(volatile unsigned int *)sys_PIO_BASE) -+#define AQ_I2C (*(volatile unsigned int *)sys_I2C_BASE) -+#define AQ_SPI (*(volatile unsigned int *)sys_SPI_BASE) -+#define AQ_UART0 (*(volatile unsigned int *)sys_UART0_BASE) -+#define AQ_SYS (*(volatile unsigned int *)sys_SYS_BASE) -+#define AQ_UART1 (*(volatile unsigned int *)sys_UART1_BASE) -+#define AQ_GPS (*(volatile unsigned int *)sys_GPS_BASE) -+#define AQ_D2A (*(volatile unsigned int *)sys_D2A_BASE) -+#define AQ_EMAC (*(volatile unsigned int *)sys_EMAC_BASE) -+ -+ -+struct st_uart16550 -+{ -+ unsigned int RTX; -+ unsigned int IER; -+ unsigned int IIR; -+ unsigned int LCR; -+ unsigned int MCR; -+ unsigned int LSR; -+ unsigned int MSR; -+ unsigned int SCR; -+}; -+#define uLSRDR 0x01 -+#define uLSROE 0x02 -+#define uLSRPE 0x04 -+#define uLSRFE 0x08 -+#define uLSRBI 0x10 -+#define uLSRTHRE 0x20 -+#define uLSRTEMT 0x40 -+#define uLSRRFE 0x80 /* Error in Revr FIFO */ -+ -+#if 0 -+#define B115200 0x000a -+#define B38400 0x001e -+#define B19200 0x003c -+#define B9600 0x0078 -+#define B4800 0x00f0 -+#endif -+ -+/* the following is belong to sys_SYS_BASE */ -+#define Sys_IntCon 0x0 -+/* When SIC_BRKON is set, BreadAddress will compare with Bus address to generate NMI interrupt */ -+#define Sys_BRKADR 0x04 -+/* Interrupt priority is 4 bits width, irqs(0) is [3,0], irqs(1) is [7,4] ... */ -+#define Sys_IntPri 0x08 -+/* End of offset define of sys_SYS_BASE */ -+/* Refer to Aquarius datasheet Page 12, NMI is lvl16, and lvl0 will not be accept */ -+/* Refer to define.v, IBit in SR [7:4] */ -+#define SIC_ENMI ((unsigned int) 0x1<<31) /* Emulate NMI */ -+#define SIC EIRQ ((unsigned int) 0x1<<30) /* Emulate IRQ */ -+#define SIC_ECER ((unsigned int) 0x1<<29) /* Emulate CPU Address Error */ -+#define SIC_EDER ((unsigned int) 0x1<<28) /* Emulate DMA Address Error */ -+#define SIC_EMRS ((unsigned int) 0x1<<27) /* Emulate Manual Reset */ -+#define SIC_EPIT ((unsigned int) 0x1<<26) /* Enable Periodical interval timer(PIT) */ -+#define SIC_TMRON ((unsigned int) 0x1<<25) /* Enable timer */ -+#define SIC_BRKON ((unsigned int) 0x1<<24) /* Break ON */ -+#define SIC_ILVL ((unsigned int) 0xF<<20) /* interrupt level for PIT */ -+#define SIC_IVEC ((unsigned int) 0xFF<<12) /* Interrupt Vector for PIT */ -+#define SIC_TMR ((unsigned int)0xFFF) /* Interval Timer when 0x0, it request IRQ*/ -+ -+/* PIO registers offset */ -+#define Poffset_IO 0x00 -+#define Poffset_imask 0x04 -+#define Poffset_redge 0x08 -+#define Poffset_changes 0x0c -+ -+/* Keys are connected to Parallel Input, Active low */ -+#define Pio_KeyEnter 0x0001 -+#define Pio_KeyESC 0x0002 -+#define Pio_KeyNorth 0x0020 -+#define Pio_KeyEast 0x0040 -+#define Pio_KeySouth 0x0080 -+#define Pio_KeyWest 0x0100 -+ -+/* SD_CD is active high of this bit */ -+#define Pio_SD_CD 0x00200000 -+ -+#define Pio_1PPS 0x00800000 -+ -+/* IMPORTANT!!! Pio_LEDPwr is connected with with reset pins of USB, ETH-PHY -+ * and GPS. DON'T CHANGE IT or use it for now!!! -+ * TODO: VHDL needs to fix Power LED to other location with set and reset feature -+ */ -+#define Pio_LEDPwr 0x0010 -+#define Pio_LEDErr 0x0020 -+#define Pio_TP70 0x0040 -+ -+#if 0 -+ #define I2c_busy 0x8000 -+ #define I2c_next 0x4000 -+ #define I2c_ack 0x2000 -+ #define I2c_timeout 0x1000 -+ #define I2c_timer 0x0800 -+ #define I2c_mask 0xf800 -+#else -+ #define I2cO_ctrl 0x00 -+ #define I2cO_slen 0x04 -+ #define I2cO_word 0x0C -+ -+ /* for I2cO_ctrl */ -+ #define I2cC_busy 0x01 -+ #define I2cC_timeout 0x02 -+ #define I2cC_complete 0x04 -+ #define I2cC_reset 0x08 -+ #define I2cC_run 0x10 -+ #define I2cC_irqen 0x20 -+ #define I2cC_clk 0x40 -+ #define I2cC_dat 0x80 -+ #define I2cC_MaskDelay 0xff00 -+ #define I2c_delay(x) ((x)<< 8) -+ #define I2cC_MaskAckTimeout 0xf0000 -+ #define I2c_timeout(x) ((x) << 16) -+ /* for I2cO_slen */ -+ #define I2cS_MaskXlen 0x1f -+ #define I2cS_MaxLen 16 -+ #define I2cS_MaskSpeed 0x30000 -+ #define I2cS_100k 0x0 -+ #define I2cS_400k 0x10000 -+ #define I2cS_1m 0x20000 -+ #define I2cS_3m4 0x30000 -+ #define I2cS_Maskwordcount 0xf80000 -+#endif -+ -+/***********************************************************/ -+/************************************ EMAC **************/ -+/***********************************************************/ -+ -+#define AQ_EMAC_BASE 0xABCE0000 -+#define AQ_EMAC_CONTROL 0xABCE0000 -+#define AQ_EMAC_STATUS 0xABCE0000 -+ -+/* Control bits */ -+#define AQ_EMAC_ENABLE_RX 0x00000002 -+#define AQ_EMAC_ENABLE_TX 0x00000004 -+#define AQ_EMAC_READ 0x00000010 -+#define AQ_EMAC_ENABLE_INT_RX 0x00000020 -+#define AQ_EMAC_ENABLE_INT_TX 0x00000040 -+ -+/* Status bits */ -+#define AQ_EMAC_TX_BUSY 0x00000004 -+#define AQ_EMAC_COMPLETE 0x00000100 -+#define AQ_EMAC_CRC 0x00000200 -+ -+#define AQ_EMAC_TX_LEN 0xABCE0004 -+#define AQ_EMAC_MACL 0xABCE0008 -+#define AQ_EMAC_MACH 0xABCE000C -+#define AQ_EMAC_RX_BUF 0xABCE1000 -+#define AQ_EMAC_TX_BUF 0xABCE1800 -+ -+#define Emac_Rbuf 0x1000 -+#define Emac_Xbuf 0x1800 -+#define Emac_Ctrl 0x0000 -+#define Emac_xlen 0x0004 -+#define Emac_MACL 0x0008 -+#define Emac_MACH 0x000c -+#define ECtrl_RecvEnable 0x2 /* Receive enable */ -+#define ECtrl_Xmit 0x4 /* Read: Transmit busy(1); Write: Start transmit(1) */ -+#define ECtrl_MACReset 0x8 /* Reset MAC address */ -+#define ECtrl_Read 0x10 /* complete read from Receive FIFO */ -+#define ECtrl_RIntEnable 0x20 /* Receive interrupt enable(1) */ -+#define ECtrl_XIntEnable 0x40 /* Transmit interrupt enable(1) */ -+#define ECtrl_PROM 0x80 /* Promiscuous Mode enable(1)/disable(0) */ -+#define ECtrl_Complete 0x100 /* Receive packet waiting in FIFO */ -+#define ECtrl_CRC 0x200 /* Receive packet has CRC error */ -+#define ECtrl_getrxlen(x) ((x) >> 16) /* Length of received package, when ECtrl_Complete is set */ -+ -+#define Spi_Ctrl 0x0 -+#define Spi_Data 0x4 -+#define SpiCtrl_ACS 0x01 /* chipselect for applcation data */ -+#define SpiCtrl_CCS 0x04 /* chipselect for FPGA configure */ -+#define SpiCtrl_DCS 0x10 /* chipselect for D2A or extra SPI device */ -+#define SpiCtrl_setDiv(x) ((x) << 27) /* Div contrl SPI_CK = 12.5/(div + 1), Min: 400KHz for now*/ -+#define SpiCtrl_Xmit 0x02 -+#define SpiCtrl_Busy 0x02 -+#define SpiCtrl_Loop 0x08 /* When it assert, mosi will connect to miso */ -+/* by default SPI run at 12.5 MHz,maxium speed for Spartan 3E, for SPI Flash -+ * We need a DDS delay for different devices -+ */ -+ -+#define SHJ_PIT_PMR 0xABCD0210 -+#define SHJ_PIT_PCNTR 0xABCD0214 -+#define SHJ_NSEC_PER_CLOCK 0xABCD0218 -+ -+#endif -diff -Nur linux-4.1.13.orig/arch/sh/include/asm/processor.h linux-4.1.13/arch/sh/include/asm/processor.h ---- linux-4.1.13.orig/arch/sh/include/asm/processor.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/include/asm/processor.h 2015-12-05 00:16:49.000000000 +0100 -@@ -15,7 +15,7 @@ - */ - enum cpu_type { - /* SH-2 types */ -- CPU_SH7619, -+ CPU_SH7619, CPU_0PF, - - /* SH-2A types */ - CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269, -diff -Nur linux-4.1.13.orig/arch/sh/include/cpu-sh2/cpu/cache.h linux-4.1.13/arch/sh/include/cpu-sh2/cpu/cache.h ---- linux-4.1.13.orig/arch/sh/include/cpu-sh2/cpu/cache.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/include/cpu-sh2/cpu/cache.h 2015-12-05 00:16:49.000000000 +0100 -@@ -38,6 +38,10 @@ - #define CCR_CACHE_INVALIDATE CCR_CACHE_CF - #define CACHE_PHYSADDR_MASK 0x1ffffc00 - -+#elif defined(CONFIG_CPU_SUBTYPE_0PF) -+#define CCR 0xabcd00c0 -+#define CCR_CACHE_ENABLE 0x80000000 -+#define CCR_CACHE_RESET 0x101 - #endif - - #endif /* __ASM_CPU_SH2_CACHE_H */ -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/init.c linux-4.1.13/arch/sh/kernel/cpu/init.c ---- linux-4.1.13.orig/arch/sh/kernel/cpu/init.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/init.c 2015-12-05 00:16:49.000000000 +0100 -@@ -106,7 +106,7 @@ - /* - * Generic first-level cache init - */ --#ifdef CONFIG_SUPERH32 -+#if defined(CONFIG_SUPERH32) && !defined(CONFIG_CPU_SUBTYPE_0PF) - static void cache_init(void) - { - unsigned long ccr, flags; -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/proc.c linux-4.1.13/arch/sh/kernel/cpu/proc.c ---- linux-4.1.13.orig/arch/sh/kernel/cpu/proc.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/proc.c 2015-12-05 00:16:49.000000000 +0100 -@@ -26,6 +26,7 @@ - [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", - [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", - [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", -+ [CPU_0PF] = "SH2J-0PF", - [CPU_SH7372] = "SH7372", [CPU_SH7734] = "SH7734", - [CPU_SH_NONE] = "Unknown" - }; -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/Makefile linux-4.1.13/arch/sh/kernel/cpu/sh2/Makefile ---- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/sh2/Makefile 2015-12-05 00:16:49.000000000 +0100 -@@ -5,3 +5,4 @@ - obj-y := ex.o probe.o entry.o - - obj-$(CONFIG_CPU_SUBTYPE_SH7619) += setup-sh7619.o clock-sh7619.o -+obj-$(CONFIG_CPU_SUBTYPE_0PF) += setup-0pf.o clock-0pf.o -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/clock-0pf.c linux-4.1.13/arch/sh/kernel/cpu/sh2/clock-0pf.c ---- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/clock-0pf.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/sh2/clock-0pf.c 2015-12-05 00:16:48.000000000 +0100 -@@ -0,0 +1,80 @@ -+/* -+ * arch/sh/kernel/cpu/sh2/clock-0pf.c -+ * -+ * 0PF FPGA support for the clock framework -+ * -+ * Copyright (C) 2012 SEI, Inc. -+ * -+ * Based on clock-sh4.c -+ * Copyright (C) 2005 Paul Mundt -+ * Copyright (C) 2009 D. Jeff Dionne -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+static void master_clk_init(struct clk *clk) -+{ -+ clk->rate = CONFIG_SH_PCLK_FREQ; /* Fixed Rate */ -+} -+ -+static struct sh_clk_ops shj_master_clk_ops = { -+ .init = master_clk_init, -+}; -+ -+static unsigned long module_clk_recalc(struct clk *clk) -+{ -+ return clk->parent->rate; -+} -+ -+static struct sh_clk_ops shj_module_clk_ops = { -+ .recalc = module_clk_recalc, -+}; -+ -+static unsigned long bus_clk_recalc(struct clk *clk) -+{ -+ return clk->parent->rate; -+} -+ -+static struct sh_clk_ops shj_bus_clk_ops = { -+ .recalc = bus_clk_recalc, -+}; -+ -+static struct sh_clk_ops shj_cpu_clk_ops = { -+ .recalc = followparent_recalc, -+}; -+ -+static struct sh_clk_ops *shj_clk_ops[] = { -+ &shj_master_clk_ops, -+ &shj_module_clk_ops, -+ &shj_bus_clk_ops, -+ &shj_cpu_clk_ops, -+}; -+ -+void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) -+{ -+ if (idx < ARRAY_SIZE(shj_clk_ops)) -+ *ops = shj_clk_ops[idx]; -+} -+ -+int __init arch_clk_init() -+{ -+ int ret; -+ -+ printk("%s(): 0PF Clock init...\n", __func__); -+ -+ ret = cpg_clk_init(); /* appease Over-engineered "clock infrastructure" */ -+ -+ return ret; -+} -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/entry.S linux-4.1.13/arch/sh/kernel/cpu/sh2/entry.S ---- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/entry.S 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/sh2/entry.S 2015-12-05 00:16:49.000000000 +0100 -@@ -3,6 +3,7 @@ - * - * The SH-2 exception entry - * -+ * Copyright (C) 2012 SEI,Inc. - * Copyright (C) 2005-2008 Yoshinori Sato - * Copyright (C) 2005 AXE,Inc. - * -@@ -147,7 +148,11 @@ - mov #32,r8 - cmp/hs r8,r9 - bt trap_entry ! 64 > vec >= 32 is trap -- -+#if defined(CONFIG_CPU_SUBTYPE_0PF) -+ mov #16,r8 -+ cmp/hs r8,r9 -+ bt interrupt_entry ! 32 > vec >= 16 is interrupt -+#endif - mov.l 4f,r8 - mov r9,r4 - shll2 r9 -@@ -245,6 +250,19 @@ - .align 2 - 1: .long do_address_error - -+#if defined(CONFIG_CPU_SUBTYPE_0PF) -+ENTRY(pc_address_error_trap_handler) -+ mov r15,r4 ! regs -+ mov #OFF_PC,r0 -+ mov.l @(r0,r15),r6 ! pc -+ mov.l 1f,r0 -+ jmp @r0 -+ mov #0,r5 ! writeaccess is unknown -+ -+ .align 2 -+1: .long do_pc_address_error -+#endif // CONFIG_CPU_SUBTYPE_0PF -+ - restore_all: - stc sr,r0 - or #0xf0,r0 -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/probe.c linux-4.1.13/arch/sh/kernel/cpu/sh2/probe.c ---- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/probe.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/sh2/probe.c 2015-12-05 00:16:49.000000000 +0100 -@@ -24,6 +24,12 @@ - boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; - boot_cpu_data.dcache.flags = 0; - #endif -+ -+#if defined(CONFIG_CPU_SUBTYPE_0PF) -+ boot_cpu_data.type = CPU_0PF; -+ boot_cpu_data.dcache.flags = 0; -+#endif -+ - /* - * SH-2 doesn't have separate caches - */ -diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/setup-0pf.c linux-4.1.13/arch/sh/kernel/cpu/sh2/setup-0pf.c ---- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/setup-0pf.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/cpu/sh2/setup-0pf.c 2015-12-05 00:16:48.000000000 +0100 -@@ -0,0 +1,82 @@ -+/* -+ * 0PF-FPGA Setup -+ * -+ * Copyright (C) 2006 Yoshinori Sato -+ * Copyright (C) 2009 Paul Mundt -+ * Copyright (C) 2009 D. Jeff Dionne -+ * Copyright (C) 2012 SEI, Inc. -+ * by Oleksandr Zhadan -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#if defined(CONFIG_SERIAL_UARTLITE_0PF) -+static struct resource shj_uartlite_resources[] = { -+ [0] = DEFINE_RES_MEM(0xABCD0100, 16), -+ [1] = DEFINE_RES_IRQ(0x12), -+ -+ [2] = DEFINE_RES_MEM(0xABCD0300, 16), -+ [3] = DEFINE_RES_IRQ(0x17), -+ -+ [4] = DEFINE_RES_MEM(0xABCD0400, 16), -+ [5] = DEFINE_RES_IRQ(0x13), -+}; -+ -+static struct platform_device shj_uartlite_device[] = { -+ [0] = { .name = "uartlite", .id = 0 }, -+ [1] = { .name = "uartlite", .id = 1 }, -+ [2] = { .name = "uartlite", .id = 2 }, -+}; -+#endif -+ -+/***************************************************************************** -+ * 0PF FPGA platform devices -+ ****************************************************************************/ -+static struct platform_device *shj_devices[] __initdata = { -+#if defined(CONFIG_SERIAL_UARTLITE_0PF) -+ shj_uartlite_device, -+ shj_uartlite_device + 1, -+ shj_uartlite_device + 2, -+#endif -+}; -+ -+static int __init shj_devices_setup(void) -+{ -+ int i; -+ pr_info("%s(): registering device resources\n", __func__); -+ -+#if defined(CONFIG_SERIAL_UARTLITE_0PF) -+ for (i = 0; i < ARRAY_SIZE(shj_uartlite_device); i++) { -+ printk("Register UARTLITE resources %d\n", i); -+ if (platform_device_add_resources( -+ shj_uartlite_device + i, -+ shj_uartlite_resources + 2 * i, -+ 2)) -+ pr_err("Failed to set uartlite %d IRQ and MEM\n", i); -+ -+ } -+#endif -+ platform_add_devices(shj_devices, ARRAY_SIZE(shj_devices)); -+ -+ return 0; -+} -+ -+arch_initcall(shj_devices_setup); -+ -+void __init native_machine_early_platform_add_devices(void) -+{ -+} -+ -+void __init plat_irq_setup(void) -+{ -+} -diff -Nur linux-4.1.13.orig/arch/sh/kernel/irq.c linux-4.1.13/arch/sh/kernel/irq.c ---- linux-4.1.13.orig/arch/sh/kernel/irq.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/irq.c 2015-12-05 00:16:49.000000000 +0100 -@@ -20,6 +20,8 @@ - #include - #include - -+#include -+ - atomic_t irq_err_count; - - /* -@@ -175,11 +177,24 @@ - ); - } - #else -+#define noinline __attribute__((noinline)) -+static noinline void handle_irq_UART0(unsigned int irq) { generic_handle_irq(irq); } -+static noinline void handle_irq_UART1(unsigned int irq) { generic_handle_irq(irq); } -+static noinline void handle_irq_GPS(unsigned int irq) { generic_handle_irq(irq); } -+static noinline void handle_irq_EMAC(unsigned int irq) { generic_handle_irq(irq); } - static inline void handle_one_irq(unsigned int irq) - { -- generic_handle_irq(irq); -+ switch(irq) { -+ case Irq_UART0: handle_irq_UART0(irq); break; -+ case Irq_UART1: handle_irq_UART1(irq); break; -+ case Irq_GPS: handle_irq_GPS(irq); break; -+ case Irq_EMAC: handle_irq_EMAC(irq); break; -+ default: -+ generic_handle_irq(irq); -+ break; -+ } - } --#endif -+#endif // CONFIG_IRQSTACKS - - asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs) - { -diff -Nur linux-4.1.13.orig/arch/sh/kernel/traps_32.c linux-4.1.13/arch/sh/kernel/traps_32.c ---- linux-4.1.13.orig/arch/sh/kernel/traps_32.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/kernel/traps_32.c 2015-12-05 00:16:49.000000000 +0100 -@@ -34,6 +34,7 @@ - #ifdef CONFIG_CPU_SH2 - # define TRAP_RESERVED_INST 4 - # define TRAP_ILLEGAL_SLOT_INST 6 -+# define TRAP_PC_ADDRESS_ERROR 8 // Aug 20, 2012 ulianov - SEI extension - PC governor - # define TRAP_ADDRESS_ERROR 9 - # ifdef CONFIG_CPU_SH2A - # define TRAP_UBC 12 -@@ -458,6 +459,14 @@ - return ret; - } - -+#if defined(CONFIG_CPU_SUBTYPE_0PF) -+asmlinkage void do_pc_address_error(struct pt_regs *regs, -+ unsigned long writeaccess, -+ unsigned long address) -+{ -+} -+#endif // CONFIG_CPU_SUBTYPE_0PF -+ - /* - * Handle various address error exceptions: - * - instruction address error: -@@ -779,6 +788,9 @@ - #endif - - #ifdef CONFIG_CPU_SH2 -+ #if defined(CONFIG_CPU_SUBTYPE_0PF) -+ set_exception_table_vec(TRAP_PC_ADDRESS_ERROR, address_error_trap_handler); -+ #endif - set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler); - #endif - #ifdef CONFIG_CPU_SH2A -diff -Nur linux-4.1.13.orig/arch/sh/mm/cache-sh2.c linux-4.1.13/arch/sh/mm/cache-sh2.c ---- linux-4.1.13.orig/arch/sh/mm/cache-sh2.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/mm/cache-sh2.c 2015-12-05 00:16:49.000000000 +0100 -@@ -3,6 +3,7 @@ - * - * Copyright (C) 2002 Paul Mundt - * Copyright (C) 2008 Yoshinori Sato -+ * Copyright (C) 2012 SEI, Inc. - * - * Released under the terms of the GNU GPL v2.0. - */ -@@ -16,6 +17,30 @@ - #include - #include - -+#if defined(CONFIG_CPU_SUBTYPE_0PF) -+ -+// Just flush the whole thing each time -+static void j2_flush_icache_range(void *fwoosh) -+{ -+ __raw_writel(CCR_CACHE_RESET, CCR); -+} -+ -+// This should never happen, but... -+static void j2_flush_icache_page(void *fwoosh) -+{ -+ __raw_writel(CCR_CACHE_RESET, CCR); -+} -+ -+void __init sh2_cache_init(void) -+{ -+ local_flush_icache_range = j2_flush_icache_range; -+ local_flush_icache_page = j2_flush_icache_page; -+ boot_cpu_data.dcache.n_aliases = 0; -+ -+ __raw_writel(CCR_CACHE_RESET, CCR); -+} -+ -+#else - static void sh2__flush_wback_region(void *start, int size) - { - unsigned long v; -@@ -89,3 +114,4 @@ - __flush_purge_region = sh2__flush_purge_region; - __flush_invalidate_region = sh2__flush_invalidate_region; - } -+#endif -diff -Nur linux-4.1.13.orig/arch/sh/mm/cache.c linux-4.1.13/arch/sh/mm/cache.c ---- linux-4.1.13.orig/arch/sh/mm/cache.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/mm/cache.c 2015-12-05 00:16:49.000000000 +0100 -@@ -258,14 +258,16 @@ - boot_cpu_data.icache.entry_mask, - boot_cpu_data.icache.alias_mask, - boot_cpu_data.icache.n_aliases); -- printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n", -- boot_cpu_data.dcache.ways, -- boot_cpu_data.dcache.sets, -- boot_cpu_data.dcache.way_incr); -- printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", -- boot_cpu_data.dcache.entry_mask, -- boot_cpu_data.dcache.alias_mask, -- boot_cpu_data.dcache.n_aliases); -+ if (boot_cpu_data.dcache.n_aliases) { -+ printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n", -+ boot_cpu_data.dcache.ways, -+ boot_cpu_data.dcache.sets, -+ boot_cpu_data.dcache.way_incr); -+ printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", -+ boot_cpu_data.dcache.entry_mask, -+ boot_cpu_data.dcache.alias_mask, -+ boot_cpu_data.dcache.n_aliases); -+ } - - /* - * Emit Secondary Cache parameters if the CPU has a probed L2. -diff -Nur linux-4.1.13.orig/drivers/tty/serial/Kconfig linux-4.1.13/drivers/tty/serial/Kconfig ---- linux-4.1.13.orig/drivers/tty/serial/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/tty/serial/Kconfig 2015-12-05 00:16:49.000000000 +0100 -@@ -594,7 +594,7 @@ - - config SERIAL_UARTLITE - tristate "Xilinx uartlite serial port support" -- depends on PPC32 || MICROBLAZE || MFD_TIMBERDALE || ARCH_ZYNQ -+ depends on PPC32 || MICROBLAZE || MFD_TIMBERDALE || ARCH_ZYNQ || CPU_SUBTYPE_0PF - select SERIAL_CORE - help - Say Y here if you want to use the Xilinx uartlite serial controller. -@@ -611,6 +611,12 @@ - console (the system console is the device which receives all kernel - messages and warnings and which allows logins in single user mode). - -+config SERIAL_UARTLITE_0PF -+ tristate "Support 0PF UARTLITEs" -+ depends on SERIAL_UARTLITE = y && CPU_SUBTYPE_0PF -+ help -+ Say Y here to set up 0PF's UARTLITEs. -+ - config SERIAL_SUNCORE - bool - depends on SPARC diff --git a/target/linux/patches/4.1.30/mtd-rootfs.patch b/target/linux/patches/4.1.30/mtd-rootfs.patch deleted file mode 100644 index 5f6d82b5c..000000000 --- a/target/linux/patches/4.1.30/mtd-rootfs.patch +++ /dev/null @@ -1,26 +0,0 @@ -diff -Nur linux-4.1.15.orig/drivers/mtd/mtdpart.c linux-4.1.15/drivers/mtd/mtdpart.c ---- linux-4.1.15.orig/drivers/mtd/mtdpart.c 2015-12-15 06:24:51.000000000 +0100 -+++ linux-4.1.15/drivers/mtd/mtdpart.c 2015-12-26 21:02:02.766905805 +0100 -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - #include - - #include "mtdcore.h" -@@ -667,6 +668,14 @@ - if (IS_ERR(slave)) - return PTR_ERR(slave); - -+ if (strcmp(parts[i].name, "rootfs") == 0) { -+ if (ROOT_DEV == 0) { -+ printk(KERN_NOTICE "mtd: partition \"rootfs\" " -+ "set to be root filesystem\n"); -+ ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i); -+ } -+ } -+ - mutex_lock(&mtd_partitions_mutex); - list_add(&slave->list, &mtd_partitions); - mutex_unlock(&mtd_partitions_mutex); diff --git a/target/linux/patches/4.1.30/patch-realtime b/target/linux/patches/4.1.30/patch-realtime deleted file mode 100644 index 6ecf019b9..000000000 --- a/target/linux/patches/4.1.30/patch-realtime +++ /dev/null @@ -1,28362 +0,0 @@ -diff -Nur linux-4.1.26.orig/arch/alpha/mm/fault.c linux-4.1.26/arch/alpha/mm/fault.c ---- linux-4.1.26.orig/arch/alpha/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/alpha/mm/fault.c 2016-06-19 15:30:54.915151887 +0200 -@@ -23,8 +23,7 @@ - #include - #include - #include -- --#include -+#include - - extern void die_if_kernel(char *,struct pt_regs *,long, unsigned long *); - -@@ -107,7 +106,7 @@ - - /* If we're in an interrupt context, or have no user context, - we must not take the fault. */ -- if (!mm || in_atomic()) -+ if (!mm || faulthandler_disabled()) - goto no_context; - - #ifdef CONFIG_ALPHA_LARGE_VMALLOC -diff -Nur linux-4.1.26.orig/arch/arc/include/asm/futex.h linux-4.1.26/arch/arc/include/asm/futex.h ---- linux-4.1.26.orig/arch/arc/include/asm/futex.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arc/include/asm/futex.h 2016-06-19 15:30:54.915151887 +0200 -@@ -53,7 +53,7 @@ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - -- pagefault_disable(); /* implies preempt_disable() */ -+ pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: -@@ -75,7 +75,7 @@ - ret = -ENOSYS; - } - -- pagefault_enable(); /* subsumes preempt_enable() */ -+ pagefault_enable(); - - if (!ret) { - switch (cmp) { -@@ -104,7 +104,7 @@ - return ret; - } - --/* Compare-xchg with preemption disabled. -+/* Compare-xchg with pagefaults disabled. - * Notes: - * -Best-Effort: Exchg happens only if compare succeeds. - * If compare fails, returns; leaving retry/looping to upper layers -@@ -121,7 +121,7 @@ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - -- pagefault_disable(); /* implies preempt_disable() */ -+ pagefault_disable(); - - /* TBD : can use llock/scond */ - __asm__ __volatile__( -@@ -142,7 +142,7 @@ - : "r"(oldval), "r"(newval), "r"(uaddr), "ir"(-EFAULT) - : "cc", "memory"); - -- pagefault_enable(); /* subsumes preempt_enable() */ -+ pagefault_enable(); - - *uval = val; - return val; -diff -Nur linux-4.1.26.orig/arch/arc/mm/fault.c linux-4.1.26/arch/arc/mm/fault.c ---- linux-4.1.26.orig/arch/arc/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arc/mm/fault.c 2016-06-19 15:30:54.915151887 +0200 -@@ -86,7 +86,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/arm/include/asm/cmpxchg.h linux-4.1.26/arch/arm/include/asm/cmpxchg.h ---- linux-4.1.26.orig/arch/arm/include/asm/cmpxchg.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/include/asm/cmpxchg.h 2016-06-19 15:30:54.919152041 +0200 -@@ -129,6 +129,8 @@ - - #else /* min ARCH >= ARMv6 */ - -+#define __HAVE_ARCH_CMPXCHG 1 -+ - extern void __bad_cmpxchg(volatile void *ptr, int size); - - /* -diff -Nur linux-4.1.26.orig/arch/arm/include/asm/futex.h linux-4.1.26/arch/arm/include/asm/futex.h ---- linux-4.1.26.orig/arch/arm/include/asm/futex.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/include/asm/futex.h 2016-06-19 15:30:54.919152041 +0200 -@@ -93,6 +93,7 @@ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) - return -EFAULT; - -+ preempt_disable(); - __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" - "1: " TUSER(ldr) " %1, [%4]\n" - " teq %1, %2\n" -@@ -104,6 +105,8 @@ - : "cc", "memory"); - - *uval = val; -+ preempt_enable(); -+ - return ret; - } - -@@ -124,7 +127,10 @@ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) - return -EFAULT; - -- pagefault_disable(); /* implies preempt_disable() */ -+#ifndef CONFIG_SMP -+ preempt_disable(); -+#endif -+ pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: -@@ -146,7 +152,10 @@ - ret = -ENOSYS; - } - -- pagefault_enable(); /* subsumes preempt_enable() */ -+ pagefault_enable(); -+#ifndef CONFIG_SMP -+ preempt_enable(); -+#endif - - if (!ret) { - switch (cmp) { -diff -Nur linux-4.1.26.orig/arch/arm/include/asm/switch_to.h linux-4.1.26/arch/arm/include/asm/switch_to.h ---- linux-4.1.26.orig/arch/arm/include/asm/switch_to.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/include/asm/switch_to.h 2016-06-19 15:30:54.919152041 +0200 -@@ -3,6 +3,13 @@ - - #include - -+#if defined CONFIG_PREEMPT_RT_FULL && defined CONFIG_HIGHMEM -+void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p); -+#else -+static inline void -+switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) { } -+#endif -+ - /* - * For v7 SMP cores running a preemptible kernel we may be pre-empted - * during a TLB maintenance operation, so execute an inner-shareable dsb -@@ -22,6 +29,7 @@ - - #define switch_to(prev,next,last) \ - do { \ -+ switch_kmaps(prev, next); \ - last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ - } while (0) - -diff -Nur linux-4.1.26.orig/arch/arm/include/asm/thread_info.h linux-4.1.26/arch/arm/include/asm/thread_info.h ---- linux-4.1.26.orig/arch/arm/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/include/asm/thread_info.h 2016-06-19 15:30:54.919152041 +0200 -@@ -50,6 +50,7 @@ - struct thread_info { - unsigned long flags; /* low level flags */ - int preempt_count; /* 0 => preemptable, <0 => bug */ -+ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ - mm_segment_t addr_limit; /* address limit */ - struct task_struct *task; /* main task structure */ - __u32 cpu; /* cpu */ -@@ -147,6 +148,7 @@ - #define TIF_SIGPENDING 0 - #define TIF_NEED_RESCHED 1 - #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ -+#define TIF_NEED_RESCHED_LAZY 3 - #define TIF_UPROBE 7 - #define TIF_SYSCALL_TRACE 8 - #define TIF_SYSCALL_AUDIT 9 -@@ -160,6 +162,7 @@ - #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) - #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) - #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) -+#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) - #define _TIF_UPROBE (1 << TIF_UPROBE) - #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) - #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -diff -Nur linux-4.1.26.orig/arch/arm/Kconfig linux-4.1.26/arch/arm/Kconfig ---- linux-4.1.26.orig/arch/arm/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/Kconfig 2016-06-19 15:30:54.919152041 +0200 -@@ -31,7 +31,7 @@ - select HARDIRQS_SW_RESEND - select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT) - select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6 -- select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL -+ select HAVE_ARCH_JUMP_LABEL if (!XIP_KERNEL && !PREEMPT_RT_BASE) - select HAVE_ARCH_KGDB - select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) - select HAVE_ARCH_TRACEHOOK -@@ -66,6 +66,7 @@ - select HAVE_PERF_EVENTS - select HAVE_PERF_REGS - select HAVE_PERF_USER_STACK_DUMP -+ select HAVE_PREEMPT_LAZY - select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE) - select HAVE_REGS_AND_STACK_ACCESS_API - select HAVE_SYSCALL_TRACEPOINTS -diff -Nur linux-4.1.26.orig/arch/arm/kernel/asm-offsets.c linux-4.1.26/arch/arm/kernel/asm-offsets.c ---- linux-4.1.26.orig/arch/arm/kernel/asm-offsets.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kernel/asm-offsets.c 2016-06-19 15:30:54.919152041 +0200 -@@ -65,6 +65,7 @@ - BLANK(); - DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); - DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); -+ DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); - DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); - DEFINE(TI_TASK, offsetof(struct thread_info, task)); - DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); -diff -Nur linux-4.1.26.orig/arch/arm/kernel/entry-armv.S linux-4.1.26/arch/arm/kernel/entry-armv.S ---- linux-4.1.26.orig/arch/arm/kernel/entry-armv.S 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kernel/entry-armv.S 2016-06-19 15:30:54.919152041 +0200 -@@ -208,11 +208,18 @@ - #ifdef CONFIG_PREEMPT - get_thread_info tsk - ldr r8, [tsk, #TI_PREEMPT] @ get preempt count -- ldr r0, [tsk, #TI_FLAGS] @ get flags - teq r8, #0 @ if preempt count != 0 -+ bne 1f @ return from exeption -+ ldr r0, [tsk, #TI_FLAGS] @ get flags -+ tst r0, #_TIF_NEED_RESCHED @ if NEED_RESCHED is set -+ blne svc_preempt @ preempt! -+ -+ ldr r8, [tsk, #TI_PREEMPT_LAZY] @ get preempt lazy count -+ teq r8, #0 @ if preempt lazy count != 0 - movne r0, #0 @ force flags to 0 -- tst r0, #_TIF_NEED_RESCHED -+ tst r0, #_TIF_NEED_RESCHED_LAZY - blne svc_preempt -+1: - #endif - - svc_exit r5, irq = 1 @ return from exception -@@ -227,6 +234,8 @@ - 1: bl preempt_schedule_irq @ irq en/disable is done inside - ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS - tst r0, #_TIF_NEED_RESCHED -+ bne 1b -+ tst r0, #_TIF_NEED_RESCHED_LAZY - reteq r8 @ go again - b 1b - #endif -diff -Nur linux-4.1.26.orig/arch/arm/kernel/process.c linux-4.1.26/arch/arm/kernel/process.c ---- linux-4.1.26.orig/arch/arm/kernel/process.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kernel/process.c 2016-06-19 15:30:54.919152041 +0200 -@@ -290,6 +290,30 @@ - } - - #ifdef CONFIG_MMU -+/* -+ * CONFIG_SPLIT_PTLOCK_CPUS results in a page->ptl lock. If the lock is not -+ * initialized by pgtable_page_ctor() then a coredump of the vector page will -+ * fail. -+ */ -+static int __init vectors_user_mapping_init_page(void) -+{ -+ struct page *page; -+ unsigned long addr = 0xffff0000; -+ pgd_t *pgd; -+ pud_t *pud; -+ pmd_t *pmd; -+ -+ pgd = pgd_offset_k(addr); -+ pud = pud_offset(pgd, addr); -+ pmd = pmd_offset(pud, addr); -+ page = pmd_page(*(pmd)); -+ -+ pgtable_page_ctor(page); -+ -+ return 0; -+} -+late_initcall(vectors_user_mapping_init_page); -+ - #ifdef CONFIG_KUSER_HELPERS - /* - * The vectors page is always readable from user space for the -diff -Nur linux-4.1.26.orig/arch/arm/kernel/signal.c linux-4.1.26/arch/arm/kernel/signal.c ---- linux-4.1.26.orig/arch/arm/kernel/signal.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kernel/signal.c 2016-06-19 15:30:54.919152041 +0200 -@@ -568,7 +568,8 @@ - do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) - { - do { -- if (likely(thread_flags & _TIF_NEED_RESCHED)) { -+ if (likely(thread_flags & (_TIF_NEED_RESCHED | -+ _TIF_NEED_RESCHED_LAZY))) { - schedule(); - } else { - if (unlikely(!user_mode(regs))) -diff -Nur linux-4.1.26.orig/arch/arm/kernel/smp.c linux-4.1.26/arch/arm/kernel/smp.c ---- linux-4.1.26.orig/arch/arm/kernel/smp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kernel/smp.c 2016-06-19 15:30:54.919152041 +0200 -@@ -213,8 +213,6 @@ - flush_cache_louis(); - local_flush_tlb_all(); - -- clear_tasks_mm_cpumask(cpu); -- - return 0; - } - -@@ -230,6 +228,9 @@ - pr_err("CPU%u: cpu didn't die\n", cpu); - return; - } -+ -+ clear_tasks_mm_cpumask(cpu); -+ - pr_notice("CPU%u: shutdown\n", cpu); - - /* -diff -Nur linux-4.1.26.orig/arch/arm/kernel/unwind.c linux-4.1.26/arch/arm/kernel/unwind.c ---- linux-4.1.26.orig/arch/arm/kernel/unwind.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kernel/unwind.c 2016-06-19 15:30:54.919152041 +0200 -@@ -93,7 +93,7 @@ - static const struct unwind_idx *__origin_unwind_idx; - extern const struct unwind_idx __stop_unwind_idx[]; - --static DEFINE_SPINLOCK(unwind_lock); -+static DEFINE_RAW_SPINLOCK(unwind_lock); - static LIST_HEAD(unwind_tables); - - /* Convert a prel31 symbol to an absolute address */ -@@ -201,7 +201,7 @@ - /* module unwind tables */ - struct unwind_table *table; - -- spin_lock_irqsave(&unwind_lock, flags); -+ raw_spin_lock_irqsave(&unwind_lock, flags); - list_for_each_entry(table, &unwind_tables, list) { - if (addr >= table->begin_addr && - addr < table->end_addr) { -@@ -213,7 +213,7 @@ - break; - } - } -- spin_unlock_irqrestore(&unwind_lock, flags); -+ raw_spin_unlock_irqrestore(&unwind_lock, flags); - } - - pr_debug("%s: idx = %p\n", __func__, idx); -@@ -529,9 +529,9 @@ - tab->begin_addr = text_addr; - tab->end_addr = text_addr + text_size; - -- spin_lock_irqsave(&unwind_lock, flags); -+ raw_spin_lock_irqsave(&unwind_lock, flags); - list_add_tail(&tab->list, &unwind_tables); -- spin_unlock_irqrestore(&unwind_lock, flags); -+ raw_spin_unlock_irqrestore(&unwind_lock, flags); - - return tab; - } -@@ -543,9 +543,9 @@ - if (!tab) - return; - -- spin_lock_irqsave(&unwind_lock, flags); -+ raw_spin_lock_irqsave(&unwind_lock, flags); - list_del(&tab->list); -- spin_unlock_irqrestore(&unwind_lock, flags); -+ raw_spin_unlock_irqrestore(&unwind_lock, flags); - - kfree(tab); - } -diff -Nur linux-4.1.26.orig/arch/arm/kvm/arm.c linux-4.1.26/arch/arm/kvm/arm.c ---- linux-4.1.26.orig/arch/arm/kvm/arm.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kvm/arm.c 2016-06-19 15:30:54.919152041 +0200 -@@ -474,9 +474,9 @@ - - static void vcpu_pause(struct kvm_vcpu *vcpu) - { -- wait_queue_head_t *wq = kvm_arch_vcpu_wq(vcpu); -+ struct swait_head *wq = kvm_arch_vcpu_wq(vcpu); - -- wait_event_interruptible(*wq, !vcpu->arch.pause); -+ swait_event_interruptible(*wq, !vcpu->arch.pause); - } - - static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) -diff -Nur linux-4.1.26.orig/arch/arm/kvm/psci.c linux-4.1.26/arch/arm/kvm/psci.c ---- linux-4.1.26.orig/arch/arm/kvm/psci.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/kvm/psci.c 2016-06-19 15:30:54.919152041 +0200 -@@ -68,7 +68,7 @@ - { - struct kvm *kvm = source_vcpu->kvm; - struct kvm_vcpu *vcpu = NULL; -- wait_queue_head_t *wq; -+ struct swait_head *wq; - unsigned long cpu_id; - unsigned long context_id; - phys_addr_t target_pc; -@@ -117,7 +117,7 @@ - smp_mb(); /* Make sure the above is visible */ - - wq = kvm_arch_vcpu_wq(vcpu); -- wake_up_interruptible(wq); -+ swait_wake_interruptible(wq); - - return PSCI_RET_SUCCESS; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-exynos/platsmp.c linux-4.1.26/arch/arm/mach-exynos/platsmp.c ---- linux-4.1.26.orig/arch/arm/mach-exynos/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-exynos/platsmp.c 2016-06-19 15:30:54.919152041 +0200 -@@ -231,7 +231,7 @@ - return (void __iomem *)(S5P_VA_SCU); - } - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - static void exynos_secondary_init(unsigned int cpu) - { -@@ -244,8 +244,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) -@@ -259,7 +259,7 @@ - * Set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from -@@ -286,7 +286,7 @@ - - if (timeout == 0) { - printk(KERN_ERR "cpu1 power enable failed"); -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - return -ETIMEDOUT; - } - } -@@ -342,7 +342,7 @@ - * calibrations, then wait for it to finish - */ - fail: -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return pen_release != -1 ? ret : 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-hisi/platmcpm.c linux-4.1.26/arch/arm/mach-hisi/platmcpm.c ---- linux-4.1.26.orig/arch/arm/mach-hisi/platmcpm.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-hisi/platmcpm.c 2016-06-19 15:30:54.923152195 +0200 -@@ -57,7 +57,7 @@ - - static void __iomem *sysctrl, *fabric; - static int hip04_cpu_table[HIP04_MAX_CLUSTERS][HIP04_MAX_CPUS_PER_CLUSTER]; --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - static u32 fabric_phys_addr; - /* - * [0]: bootwrapper physical address -@@ -104,7 +104,7 @@ - if (cluster >= HIP04_MAX_CLUSTERS || cpu >= HIP04_MAX_CPUS_PER_CLUSTER) - return -EINVAL; - -- spin_lock_irq(&boot_lock); -+ raw_spin_lock_irq(&boot_lock); - - if (hip04_cpu_table[cluster][cpu]) - goto out; -@@ -133,7 +133,7 @@ - udelay(20); - out: - hip04_cpu_table[cluster][cpu]++; -- spin_unlock_irq(&boot_lock); -+ raw_spin_unlock_irq(&boot_lock); - - return 0; - } -@@ -149,7 +149,7 @@ - - __mcpm_cpu_going_down(cpu, cluster); - -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP); - hip04_cpu_table[cluster][cpu]--; - if (hip04_cpu_table[cluster][cpu] == 1) { -@@ -162,7 +162,7 @@ - - last_man = hip04_cluster_is_down(cluster); - if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - /* Since it's Cortex A15, disable L2 prefetching. */ - asm volatile( - "mcr p15, 1, %0, c15, c0, 3 \n\t" -@@ -173,7 +173,7 @@ - hip04_set_snoop_filter(cluster, 0); - __mcpm_outbound_leave_critical(cluster, CLUSTER_DOWN); - } else { -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - v7_exit_coherency_flush(louis); - } - -@@ -192,7 +192,7 @@ - cpu >= HIP04_MAX_CPUS_PER_CLUSTER); - - count = TIMEOUT_MSEC / POLL_MSEC; -- spin_lock_irq(&boot_lock); -+ raw_spin_lock_irq(&boot_lock); - for (tries = 0; tries < count; tries++) { - if (hip04_cpu_table[cluster][cpu]) { - ret = -EBUSY; -@@ -202,10 +202,10 @@ - data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster)); - if (data & CORE_WFI_STATUS(cpu)) - break; -- spin_unlock_irq(&boot_lock); -+ raw_spin_unlock_irq(&boot_lock); - /* Wait for clean L2 when the whole cluster is down. */ - msleep(POLL_MSEC); -- spin_lock_irq(&boot_lock); -+ raw_spin_lock_irq(&boot_lock); - } - if (tries >= count) - goto err; -@@ -220,10 +220,10 @@ - } - if (tries >= count) - goto err; -- spin_unlock_irq(&boot_lock); -+ raw_spin_unlock_irq(&boot_lock); - return 0; - err: -- spin_unlock_irq(&boot_lock); -+ raw_spin_unlock_irq(&boot_lock); - return ret; - } - -@@ -235,10 +235,10 @@ - cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); - cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); - -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - if (!hip04_cpu_table[cluster][cpu]) - hip04_cpu_table[cluster][cpu] = 1; -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static void __naked hip04_mcpm_power_up_setup(unsigned int affinity_level) -diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/gpio.c linux-4.1.26/arch/arm/mach-omap2/gpio.c ---- linux-4.1.26.orig/arch/arm/mach-omap2/gpio.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-omap2/gpio.c 2016-06-19 15:30:54.923152195 +0200 -@@ -130,7 +130,6 @@ - } - - pwrdm = omap_hwmod_get_pwrdm(oh); -- pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); - - pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata)); - kfree(pdata); -diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/omap-smp.c linux-4.1.26/arch/arm/mach-omap2/omap-smp.c ---- linux-4.1.26.orig/arch/arm/mach-omap2/omap-smp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-omap2/omap-smp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -43,7 +43,7 @@ - /* SCU base address */ - static void __iomem *scu_base; - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - void __iomem *omap4_get_scu_base(void) - { -@@ -74,8 +74,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) -@@ -89,7 +89,7 @@ - * Set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * Update the AuxCoreBoot0 with boot state for secondary core. -@@ -166,7 +166,7 @@ - * Now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.c linux-4.1.26/arch/arm/mach-omap2/powerdomain.c ---- linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-omap2/powerdomain.c 2016-06-19 15:30:54.923152195 +0200 -@@ -1166,43 +1166,3 @@ - return count; - } - --/** -- * pwrdm_can_ever_lose_context - can this powerdomain ever lose context? -- * @pwrdm: struct powerdomain * -- * -- * Given a struct powerdomain * @pwrdm, returns 1 if the powerdomain -- * can lose either memory or logic context or if @pwrdm is invalid, or -- * returns 0 otherwise. This function is not concerned with how the -- * powerdomain registers are programmed (i.e., to go off or not); it's -- * concerned with whether it's ever possible for this powerdomain to -- * go off while some other part of the chip is active. This function -- * assumes that every powerdomain can go to either ON or INACTIVE. -- */ --bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm) --{ -- int i; -- -- if (!pwrdm) { -- pr_debug("powerdomain: %s: invalid powerdomain pointer\n", -- __func__); -- return 1; -- } -- -- if (pwrdm->pwrsts & PWRSTS_OFF) -- return 1; -- -- if (pwrdm->pwrsts & PWRSTS_RET) { -- if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF) -- return 1; -- -- for (i = 0; i < pwrdm->banks; i++) -- if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF) -- return 1; -- } -- -- for (i = 0; i < pwrdm->banks; i++) -- if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF) -- return 1; -- -- return 0; --} -diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.h linux-4.1.26/arch/arm/mach-omap2/powerdomain.h ---- linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-omap2/powerdomain.h 2016-06-19 15:30:54.923152195 +0200 -@@ -244,7 +244,6 @@ - int pwrdm_pre_transition(struct powerdomain *pwrdm); - int pwrdm_post_transition(struct powerdomain *pwrdm); - int pwrdm_get_context_loss_count(struct powerdomain *pwrdm); --bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); - - extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state); - -diff -Nur linux-4.1.26.orig/arch/arm/mach-prima2/platsmp.c linux-4.1.26/arch/arm/mach-prima2/platsmp.c ---- linux-4.1.26.orig/arch/arm/mach-prima2/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-prima2/platsmp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -22,7 +22,7 @@ - - static void __iomem *clk_base; - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - static void sirfsoc_secondary_init(unsigned int cpu) - { -@@ -36,8 +36,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static const struct of_device_id clk_ids[] = { -@@ -75,7 +75,7 @@ - /* make sure write buffer is drained */ - mb(); - -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from -@@ -107,7 +107,7 @@ - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-qcom/platsmp.c linux-4.1.26/arch/arm/mach-qcom/platsmp.c ---- linux-4.1.26.orig/arch/arm/mach-qcom/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-qcom/platsmp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -46,7 +46,7 @@ - - extern void secondary_startup_arm(void); - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - #ifdef CONFIG_HOTPLUG_CPU - static void __ref qcom_cpu_die(unsigned int cpu) -@@ -60,8 +60,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static int scss_release_secondary(unsigned int cpu) -@@ -284,7 +284,7 @@ - * set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * Send the secondary CPU a soft interrupt, thereby causing -@@ -297,7 +297,7 @@ - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return ret; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-spear/platsmp.c linux-4.1.26/arch/arm/mach-spear/platsmp.c ---- linux-4.1.26.orig/arch/arm/mach-spear/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-spear/platsmp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -32,7 +32,7 @@ - sync_cache_w(&pen_release); - } - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - static void __iomem *scu_base = IOMEM(VA_SCU_BASE); - -@@ -47,8 +47,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) -@@ -59,7 +59,7 @@ - * set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from -@@ -84,7 +84,7 @@ - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-sti/platsmp.c linux-4.1.26/arch/arm/mach-sti/platsmp.c ---- linux-4.1.26.orig/arch/arm/mach-sti/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-sti/platsmp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -34,7 +34,7 @@ - sync_cache_w(&pen_release); - } - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - static void sti_secondary_init(unsigned int cpu) - { -@@ -49,8 +49,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle) -@@ -61,7 +61,7 @@ - * set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from -@@ -92,7 +92,7 @@ - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mach-ux500/platsmp.c linux-4.1.26/arch/arm/mach-ux500/platsmp.c ---- linux-4.1.26.orig/arch/arm/mach-ux500/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mach-ux500/platsmp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -51,7 +51,7 @@ - return NULL; - } - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - static void ux500_secondary_init(unsigned int cpu) - { -@@ -64,8 +64,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) -@@ -76,7 +76,7 @@ - * set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from -@@ -97,7 +97,7 @@ - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mm/fault.c linux-4.1.26/arch/arm/mm/fault.c ---- linux-4.1.26.orig/arch/arm/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mm/fault.c 2016-06-19 15:30:54.923152195 +0200 -@@ -276,7 +276,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -@@ -430,6 +430,9 @@ - if (addr < TASK_SIZE) - return do_page_fault(addr, fsr, regs); - -+ if (interrupts_enabled(regs)) -+ local_irq_enable(); -+ - if (user_mode(regs)) - goto bad_area; - -@@ -497,6 +500,9 @@ - static int - do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) - { -+ if (interrupts_enabled(regs)) -+ local_irq_enable(); -+ - do_bad_area(addr, fsr, regs); - return 0; - } -diff -Nur linux-4.1.26.orig/arch/arm/mm/highmem.c linux-4.1.26/arch/arm/mm/highmem.c ---- linux-4.1.26.orig/arch/arm/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/mm/highmem.c 2016-06-19 15:30:54.923152195 +0200 -@@ -54,11 +54,13 @@ - - void *kmap_atomic(struct page *page) - { -+ pte_t pte = mk_pte(page, kmap_prot); - unsigned int idx; - unsigned long vaddr; - void *kmap; - int type; - -+ preempt_disable_nort(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -92,7 +94,10 @@ - * in place, so the contained TLB flush ensures the TLB is updated - * with the new mapping. - */ -- set_fixmap_pte(idx, mk_pte(page, kmap_prot)); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = pte; -+#endif -+ set_fixmap_pte(idx, pte); - - return (void *)vaddr; - } -@@ -109,27 +114,33 @@ - - if (cache_is_vivt()) - __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = __pte(0); -+#endif - #ifdef CONFIG_DEBUG_HIGHMEM - BUG_ON(vaddr != __fix_to_virt(idx)); -- set_fixmap_pte(idx, __pte(0)); - #else - (void) idx; /* to kill a warning */ - #endif -+ set_fixmap_pte(idx, __pte(0)); - kmap_atomic_idx_pop(); - } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { - /* this address was obtained through kmap_high_get() */ - kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); - } - pagefault_enable(); -+ preempt_enable_nort(); - } - EXPORT_SYMBOL(__kunmap_atomic); - - void *kmap_atomic_pfn(unsigned long pfn) - { -+ pte_t pte = pfn_pte(pfn, kmap_prot); - unsigned long vaddr; - int idx, type; - struct page *page = pfn_to_page(pfn); - -+ preempt_disable_nort(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -140,7 +151,10 @@ - #ifdef CONFIG_DEBUG_HIGHMEM - BUG_ON(!pte_none(get_fixmap_pte(vaddr))); - #endif -- set_fixmap_pte(idx, pfn_pte(pfn, kmap_prot)); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = pte; -+#endif -+ set_fixmap_pte(idx, pte); - - return (void *)vaddr; - } -@@ -154,3 +168,28 @@ - - return pte_page(get_fixmap_pte(vaddr)); - } -+ -+#if defined CONFIG_PREEMPT_RT_FULL -+void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) -+{ -+ int i; -+ -+ /* -+ * Clear @prev's kmap_atomic mappings -+ */ -+ for (i = 0; i < prev_p->kmap_idx; i++) { -+ int idx = i + KM_TYPE_NR * smp_processor_id(); -+ -+ set_fixmap_pte(idx, __pte(0)); -+ } -+ /* -+ * Restore @next_p's kmap_atomic mappings -+ */ -+ for (i = 0; i < next_p->kmap_idx; i++) { -+ int idx = i + KM_TYPE_NR * smp_processor_id(); -+ -+ if (!pte_none(next_p->kmap_pte[i])) -+ set_fixmap_pte(idx, next_p->kmap_pte[i]); -+ } -+} -+#endif -diff -Nur linux-4.1.26.orig/arch/arm/plat-versatile/platsmp.c linux-4.1.26/arch/arm/plat-versatile/platsmp.c ---- linux-4.1.26.orig/arch/arm/plat-versatile/platsmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm/plat-versatile/platsmp.c 2016-06-19 15:30:54.923152195 +0200 -@@ -30,7 +30,7 @@ - sync_cache_w(&pen_release); - } - --static DEFINE_SPINLOCK(boot_lock); -+static DEFINE_RAW_SPINLOCK(boot_lock); - - void versatile_secondary_init(unsigned int cpu) - { -@@ -43,8 +43,8 @@ - /* - * Synchronise with the boot thread. - */ -- spin_lock(&boot_lock); -- spin_unlock(&boot_lock); -+ raw_spin_lock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - } - - int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) -@@ -55,7 +55,7 @@ - * Set synchronisation state between this boot processor - * and the secondary one - */ -- spin_lock(&boot_lock); -+ raw_spin_lock(&boot_lock); - - /* - * This is really belt and braces; we hold unintended secondary -@@ -85,7 +85,7 @@ - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ -- spin_unlock(&boot_lock); -+ raw_spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; - } -diff -Nur linux-4.1.26.orig/arch/arm64/include/asm/futex.h linux-4.1.26/arch/arm64/include/asm/futex.h ---- linux-4.1.26.orig/arch/arm64/include/asm/futex.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/include/asm/futex.h 2016-06-19 15:30:54.923152195 +0200 -@@ -58,7 +58,7 @@ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) - return -EFAULT; - -- pagefault_disable(); /* implies preempt_disable() */ -+ pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: -@@ -85,7 +85,7 @@ - ret = -ENOSYS; - } - -- pagefault_enable(); /* subsumes preempt_enable() */ -+ pagefault_enable(); - - if (!ret) { - switch (cmp) { -diff -Nur linux-4.1.26.orig/arch/arm64/include/asm/thread_info.h linux-4.1.26/arch/arm64/include/asm/thread_info.h ---- linux-4.1.26.orig/arch/arm64/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/include/asm/thread_info.h 2016-06-19 15:30:54.923152195 +0200 -@@ -47,6 +47,7 @@ - mm_segment_t addr_limit; /* address limit */ - struct task_struct *task; /* main task structure */ - int preempt_count; /* 0 => preemptable, <0 => bug */ -+ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ - int cpu; /* cpu */ - }; - -@@ -101,6 +102,7 @@ - #define TIF_NEED_RESCHED 1 - #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ - #define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */ -+#define TIF_NEED_RESCHED_LAZY 4 - #define TIF_NOHZ 7 - #define TIF_SYSCALL_TRACE 8 - #define TIF_SYSCALL_AUDIT 9 -@@ -117,6 +119,7 @@ - #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) - #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) - #define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE) -+#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) - #define _TIF_NOHZ (1 << TIF_NOHZ) - #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) - #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -diff -Nur linux-4.1.26.orig/arch/arm64/Kconfig linux-4.1.26/arch/arm64/Kconfig ---- linux-4.1.26.orig/arch/arm64/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/Kconfig 2016-06-19 15:30:54.923152195 +0200 -@@ -69,8 +69,10 @@ - select HAVE_PERF_REGS - select HAVE_PERF_USER_STACK_DUMP - select HAVE_RCU_TABLE_FREE -+ select HAVE_PREEMPT_LAZY - select HAVE_SYSCALL_TRACEPOINTS - select IRQ_DOMAIN -+ select IRQ_FORCED_THREADING - select MODULES_USE_ELF_RELA - select NO_BOOTMEM - select OF -@@ -599,7 +601,7 @@ - - config XEN - bool "Xen guest support on ARM64" -- depends on ARM64 && OF -+ depends on ARM64 && OF && !PREEMPT_RT_FULL - select SWIOTLB_XEN - help - Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64. -diff -Nur linux-4.1.26.orig/arch/arm64/kernel/asm-offsets.c linux-4.1.26/arch/arm64/kernel/asm-offsets.c ---- linux-4.1.26.orig/arch/arm64/kernel/asm-offsets.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/kernel/asm-offsets.c 2016-06-19 15:30:54.923152195 +0200 -@@ -35,6 +35,7 @@ - BLANK(); - DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); - DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); -+ DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); - DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); - DEFINE(TI_TASK, offsetof(struct thread_info, task)); - DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); -diff -Nur linux-4.1.26.orig/arch/arm64/kernel/entry.S linux-4.1.26/arch/arm64/kernel/entry.S ---- linux-4.1.26.orig/arch/arm64/kernel/entry.S 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/kernel/entry.S 2016-06-19 15:30:58.591293647 +0200 -@@ -367,11 +367,16 @@ - #ifdef CONFIG_PREEMPT - get_thread_info tsk - ldr w24, [tsk, #TI_PREEMPT] // get preempt count -- cbnz w24, 1f // preempt count != 0 -+ cbnz w24, 2f // preempt count != 0 - ldr x0, [tsk, #TI_FLAGS] // get flags -- tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling? -- bl el1_preempt -+ tbnz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling? -+ -+ ldr w24, [tsk, #TI_PREEMPT_LAZY] // get preempt lazy count -+ cbnz w24, 2f // preempt lazy count != 0 -+ tbz x0, #TIF_NEED_RESCHED_LAZY, 2f // needs rescheduling? - 1: -+ bl el1_preempt -+2: - #endif - #ifdef CONFIG_TRACE_IRQFLAGS - bl trace_hardirqs_on -@@ -385,6 +390,7 @@ - 1: bl preempt_schedule_irq // irq en/disable is done inside - ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS - tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling? -+ tbnz x0, #TIF_NEED_RESCHED_LAZY, 1b // needs rescheduling? - ret x24 - #endif - -@@ -622,6 +628,7 @@ - str x0, [sp, #S_X0] // returned x0 - work_pending: - tbnz x1, #TIF_NEED_RESCHED, work_resched -+ tbnz x1, #TIF_NEED_RESCHED_LAZY, work_resched - /* TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_FOREIGN_FPSTATE case */ - ldr x2, [sp, #S_PSTATE] - mov x0, sp // 'regs' -diff -Nur linux-4.1.26.orig/arch/arm64/kernel/insn.c linux-4.1.26/arch/arm64/kernel/insn.c ---- linux-4.1.26.orig/arch/arm64/kernel/insn.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/kernel/insn.c 2016-06-19 15:30:58.595293802 +0200 -@@ -77,7 +77,7 @@ - } - } - --static DEFINE_SPINLOCK(patch_lock); -+static DEFINE_RAW_SPINLOCK(patch_lock); - - static void __kprobes *patch_map(void *addr, int fixmap) - { -@@ -124,13 +124,13 @@ - unsigned long flags = 0; - int ret; - -- spin_lock_irqsave(&patch_lock, flags); -+ raw_spin_lock_irqsave(&patch_lock, flags); - waddr = patch_map(addr, FIX_TEXT_POKE0); - - ret = probe_kernel_write(waddr, &insn, AARCH64_INSN_SIZE); - - patch_unmap(FIX_TEXT_POKE0); -- spin_unlock_irqrestore(&patch_lock, flags); -+ raw_spin_unlock_irqrestore(&patch_lock, flags); - - return ret; - } -diff -Nur linux-4.1.26.orig/arch/arm64/kernel/perf_event.c linux-4.1.26/arch/arm64/kernel/perf_event.c ---- linux-4.1.26.orig/arch/arm64/kernel/perf_event.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/kernel/perf_event.c 2016-06-19 15:30:58.595293802 +0200 -@@ -488,7 +488,7 @@ - } - - err = request_irq(irq, armpmu->handle_irq, -- IRQF_NOBALANCING, -+ IRQF_NOBALANCING | IRQF_NO_THREAD, - "arm-pmu", armpmu); - if (err) { - pr_err("unable to request IRQ%d for ARM PMU counters\n", -diff -Nur linux-4.1.26.orig/arch/arm64/mm/fault.c linux-4.1.26/arch/arm64/mm/fault.c ---- linux-4.1.26.orig/arch/arm64/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/arm64/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -211,7 +211,7 @@ - * If we're in an interrupt or have no user context, we must not take - * the fault. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/avr32/include/asm/uaccess.h linux-4.1.26/arch/avr32/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/avr32/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/avr32/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 -@@ -97,7 +97,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -116,7 +117,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -136,7 +138,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -158,7 +161,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -diff -Nur linux-4.1.26.orig/arch/avr32/mm/fault.c linux-4.1.26/arch/avr32/mm/fault.c ---- linux-4.1.26.orig/arch/avr32/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/avr32/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -14,11 +14,11 @@ - #include - #include - #include -+#include - - #include - #include - #include --#include - - #ifdef CONFIG_KPROBES - static inline int notify_page_fault(struct pt_regs *regs, int trap) -@@ -81,7 +81,7 @@ - * If we're in an interrupt or have no user context, we must - * not take the fault... - */ -- if (in_atomic() || !mm || regs->sr & SYSREG_BIT(GM)) -+ if (faulthandler_disabled() || !mm || regs->sr & SYSREG_BIT(GM)) - goto no_context; - - local_irq_enable(); -diff -Nur linux-4.1.26.orig/arch/cris/mm/fault.c linux-4.1.26/arch/cris/mm/fault.c ---- linux-4.1.26.orig/arch/cris/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/cris/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -8,7 +8,7 @@ - #include - #include - #include --#include -+#include - #include - - extern int find_fixup_code(struct pt_regs *); -@@ -109,11 +109,11 @@ - info.si_code = SEGV_MAPERR; - - /* -- * If we're in an interrupt or "atomic" operation or have no -+ * If we're in an interrupt, have pagefaults disabled or have no - * user context, we must not take the fault. - */ - -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/frv/mm/fault.c linux-4.1.26/arch/frv/mm/fault.c ---- linux-4.1.26.orig/arch/frv/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/frv/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -19,9 +19,9 @@ - #include - #include - #include -+#include - - #include --#include - #include - - /*****************************************************************************/ -@@ -78,7 +78,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(__frame)) -diff -Nur linux-4.1.26.orig/arch/frv/mm/highmem.c linux-4.1.26/arch/frv/mm/highmem.c ---- linux-4.1.26.orig/arch/frv/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/frv/mm/highmem.c 2016-06-19 15:30:58.595293802 +0200 -@@ -42,6 +42,7 @@ - unsigned long paddr; - int type; - -+ preempt_disable(); - pagefault_disable(); - type = kmap_atomic_idx_push(); - paddr = page_to_phys(page); -@@ -85,5 +86,6 @@ - } - kmap_atomic_idx_pop(); - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); -diff -Nur linux-4.1.26.orig/arch/hexagon/include/asm/uaccess.h linux-4.1.26/arch/hexagon/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/hexagon/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/hexagon/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 -@@ -36,7 +36,8 @@ - * @addr: User space pointer to start of block to check - * @size: Size of block to check - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Checks if a pointer to a block of memory in user space is valid. - * -diff -Nur linux-4.1.26.orig/arch/ia64/mm/fault.c linux-4.1.26/arch/ia64/mm/fault.c ---- linux-4.1.26.orig/arch/ia64/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/ia64/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -11,10 +11,10 @@ - #include - #include - #include -+#include - - #include - #include --#include - - extern int die(char *, struct pt_regs *, long); - -@@ -96,7 +96,7 @@ - /* - * If we're in an interrupt or have no user context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - #ifdef CONFIG_VIRTUAL_MEM_MAP -diff -Nur linux-4.1.26.orig/arch/Kconfig linux-4.1.26/arch/Kconfig ---- linux-4.1.26.orig/arch/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/Kconfig 2016-06-19 15:30:54.915151887 +0200 -@@ -6,6 +6,7 @@ - tristate "OProfile system profiling" - depends on PROFILING - depends on HAVE_OPROFILE -+ depends on !PREEMPT_RT_FULL - select RING_BUFFER - select RING_BUFFER_ALLOW_SWAP - help -@@ -49,6 +50,7 @@ - config JUMP_LABEL - bool "Optimize very unlikely/likely branches" - depends on HAVE_ARCH_JUMP_LABEL -+ depends on (!INTERRUPT_OFF_HIST && !PREEMPT_OFF_HIST && !WAKEUP_LATENCY_HIST && !MISSED_TIMER_OFFSETS_HIST) - help - This option enables a transparent branch optimization that - makes certain almost-always-true or almost-always-false branch -diff -Nur linux-4.1.26.orig/arch/m32r/include/asm/uaccess.h linux-4.1.26/arch/m32r/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/m32r/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/m32r/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 -@@ -91,7 +91,8 @@ - * @addr: User space pointer to start of block to check - * @size: Size of block to check - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Checks if a pointer to a block of memory in user space is valid. - * -@@ -155,7 +156,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -175,7 +177,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -194,7 +197,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -274,7 +278,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -568,7 +573,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -588,7 +594,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. - * -@@ -606,7 +613,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -626,7 +634,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. - * -@@ -677,7 +686,8 @@ - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Get the size of a NUL-terminated string in user space. - * -diff -Nur linux-4.1.26.orig/arch/m32r/mm/fault.c linux-4.1.26/arch/m32r/mm/fault.c ---- linux-4.1.26.orig/arch/m32r/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/m32r/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -24,9 +24,9 @@ - #include /* For unblank_screen() */ - #include - #include -+#include - - #include --#include - #include - #include - #include -@@ -111,10 +111,10 @@ - mm = tsk->mm; - - /* -- * If we're in an interrupt or have no user context or are running in an -- * atomic region then we must not take the fault.. -+ * If we're in an interrupt or have no user context or have pagefaults -+ * disabled then we must not take the fault. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto bad_area_nosemaphore; - - if (error_code & ACE_USERMODE) -diff -Nur linux-4.1.26.orig/arch/m68k/mm/fault.c linux-4.1.26/arch/m68k/mm/fault.c ---- linux-4.1.26.orig/arch/m68k/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/m68k/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -10,10 +10,10 @@ - #include - #include - #include -+#include - - #include - #include --#include - #include - - extern void die_if_kernel(char *, struct pt_regs *, long); -@@ -81,7 +81,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/metag/mm/fault.c linux-4.1.26/arch/metag/mm/fault.c ---- linux-4.1.26.orig/arch/metag/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/metag/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -105,7 +105,7 @@ - - mm = tsk->mm; - -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/metag/mm/highmem.c linux-4.1.26/arch/metag/mm/highmem.c ---- linux-4.1.26.orig/arch/metag/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/metag/mm/highmem.c 2016-06-19 15:30:58.595293802 +0200 -@@ -43,7 +43,7 @@ - unsigned long vaddr; - int type; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -82,6 +82,7 @@ - } - - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); - -@@ -95,6 +96,7 @@ - unsigned long vaddr; - int type; - -+ preempt_disable(); - pagefault_disable(); - - type = kmap_atomic_idx_push(); -diff -Nur linux-4.1.26.orig/arch/microblaze/include/asm/uaccess.h linux-4.1.26/arch/microblaze/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/microblaze/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/microblaze/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 -@@ -178,7 +178,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -290,7 +291,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -diff -Nur linux-4.1.26.orig/arch/microblaze/mm/fault.c linux-4.1.26/arch/microblaze/mm/fault.c ---- linux-4.1.26.orig/arch/microblaze/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/microblaze/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 -@@ -107,14 +107,14 @@ - if ((error_code & 0x13) == 0x13 || (error_code & 0x11) == 0x11) - is_write = 0; - -- if (unlikely(in_atomic() || !mm)) { -+ if (unlikely(faulthandler_disabled() || !mm)) { - if (kernel_mode(regs)) - goto bad_area_nosemaphore; - -- /* in_atomic() in user mode is really bad, -+ /* faulthandler_disabled() in user mode is really bad, - as is current->mm == NULL. */ -- pr_emerg("Page fault in user mode with in_atomic(), mm = %p\n", -- mm); -+ pr_emerg("Page fault in user mode with faulthandler_disabled(), mm = %p\n", -+ mm); - pr_emerg("r15 = %lx MSR = %lx\n", - regs->r15, regs->msr); - die("Weird page fault", regs, SIGSEGV); -diff -Nur linux-4.1.26.orig/arch/microblaze/mm/highmem.c linux-4.1.26/arch/microblaze/mm/highmem.c ---- linux-4.1.26.orig/arch/microblaze/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/microblaze/mm/highmem.c 2016-06-19 15:30:58.599293956 +0200 -@@ -37,7 +37,7 @@ - unsigned long vaddr; - int idx, type; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -63,6 +63,7 @@ - - if (vaddr < __fix_to_virt(FIX_KMAP_END)) { - pagefault_enable(); -+ preempt_enable(); - return; - } - -@@ -84,5 +85,6 @@ - #endif - kmap_atomic_idx_pop(); - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); -diff -Nur linux-4.1.26.orig/arch/mips/include/asm/uaccess.h linux-4.1.26/arch/mips/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/mips/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mips/include/asm/uaccess.h 2016-06-19 15:30:58.599293956 +0200 -@@ -103,7 +103,8 @@ - * @addr: User space pointer to start of block to check - * @size: Size of block to check - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Checks if a pointer to a block of memory in user space is valid. - * -@@ -138,7 +139,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -157,7 +159,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -177,7 +180,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -199,7 +203,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -498,7 +503,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -517,7 +523,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -537,7 +544,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -559,7 +567,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -815,7 +824,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -888,7 +898,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. - * -@@ -1075,7 +1086,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -1107,7 +1119,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. - * -@@ -1329,7 +1342,8 @@ - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Get the size of a NUL-terminated string in user space. - * -@@ -1398,7 +1412,8 @@ - * strnlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Get the size of a NUL-terminated string in user space. - * -diff -Nur linux-4.1.26.orig/arch/mips/Kconfig linux-4.1.26/arch/mips/Kconfig ---- linux-4.1.26.orig/arch/mips/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mips/Kconfig 2016-06-19 15:30:58.599293956 +0200 -@@ -2367,7 +2367,7 @@ - # - config HIGHMEM - bool "High Memory Support" -- depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA -+ depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA && !PREEMPT_RT_FULL - - config CPU_SUPPORTS_HIGHMEM - bool -diff -Nur linux-4.1.26.orig/arch/mips/kernel/signal-common.h linux-4.1.26/arch/mips/kernel/signal-common.h ---- linux-4.1.26.orig/arch/mips/kernel/signal-common.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mips/kernel/signal-common.h 2016-06-19 15:30:58.599293956 +0200 -@@ -28,12 +28,7 @@ - extern int fpcsr_pending(unsigned int __user *fpcsr); - - /* Make sure we will not lose FPU ownership */ --#ifdef CONFIG_PREEMPT --#define lock_fpu_owner() preempt_disable() --#define unlock_fpu_owner() preempt_enable() --#else --#define lock_fpu_owner() pagefault_disable() --#define unlock_fpu_owner() pagefault_enable() --#endif -+#define lock_fpu_owner() ({ preempt_disable(); pagefault_disable(); }) -+#define unlock_fpu_owner() ({ pagefault_enable(); preempt_enable(); }) - - #endif /* __SIGNAL_COMMON_H */ -diff -Nur linux-4.1.26.orig/arch/mips/mm/fault.c linux-4.1.26/arch/mips/mm/fault.c ---- linux-4.1.26.orig/arch/mips/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mips/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 -@@ -21,10 +21,10 @@ - #include - #include - #include -+#include - - #include - #include --#include - #include - #include /* For VMALLOC_END */ - #include -@@ -94,7 +94,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto bad_area_nosemaphore; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/mips/mm/highmem.c linux-4.1.26/arch/mips/mm/highmem.c ---- linux-4.1.26.orig/arch/mips/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mips/mm/highmem.c 2016-06-19 15:30:58.599293956 +0200 -@@ -47,7 +47,7 @@ - unsigned long vaddr; - int idx, type; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -72,6 +72,7 @@ - - if (vaddr < FIXADDR_START) { // FIXME - pagefault_enable(); -+ preempt_enable(); - return; - } - -@@ -92,6 +93,7 @@ - #endif - kmap_atomic_idx_pop(); - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); - -@@ -104,6 +106,7 @@ - unsigned long vaddr; - int idx, type; - -+ preempt_disable(); - pagefault_disable(); - - type = kmap_atomic_idx_push(); -diff -Nur linux-4.1.26.orig/arch/mips/mm/init.c linux-4.1.26/arch/mips/mm/init.c ---- linux-4.1.26.orig/arch/mips/mm/init.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mips/mm/init.c 2016-06-19 15:30:58.599293956 +0200 -@@ -90,6 +90,7 @@ - - BUG_ON(Page_dcache_dirty(page)); - -+ preempt_disable(); - pagefault_disable(); - idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); - idx += in_interrupt() ? FIX_N_COLOURS : 0; -@@ -152,6 +153,7 @@ - write_c0_entryhi(old_ctx); - local_irq_restore(flags); - pagefault_enable(); -+ preempt_enable(); - } - - void copy_user_highpage(struct page *to, struct page *from, -diff -Nur linux-4.1.26.orig/arch/mn10300/include/asm/highmem.h linux-4.1.26/arch/mn10300/include/asm/highmem.h ---- linux-4.1.26.orig/arch/mn10300/include/asm/highmem.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mn10300/include/asm/highmem.h 2016-06-19 15:30:58.599293956 +0200 -@@ -75,6 +75,7 @@ - unsigned long vaddr; - int idx, type; - -+ preempt_disable(); - pagefault_disable(); - if (page < highmem_start_page) - return page_address(page); -@@ -98,6 +99,7 @@ - - if (vaddr < FIXADDR_START) { /* FIXME */ - pagefault_enable(); -+ preempt_enable(); - return; - } - -@@ -122,6 +124,7 @@ - - kmap_atomic_idx_pop(); - pagefault_enable(); -+ preempt_enable(); - } - #endif /* __KERNEL__ */ - -diff -Nur linux-4.1.26.orig/arch/mn10300/mm/fault.c linux-4.1.26/arch/mn10300/mm/fault.c ---- linux-4.1.26.orig/arch/mn10300/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/mn10300/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 -@@ -23,8 +23,8 @@ - #include - #include - #include /* For unblank_screen() */ -+#include - --#include - #include - #include - #include -@@ -168,7 +168,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) -diff -Nur linux-4.1.26.orig/arch/nios2/mm/fault.c linux-4.1.26/arch/nios2/mm/fault.c ---- linux-4.1.26.orig/arch/nios2/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/nios2/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 -@@ -77,7 +77,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto bad_area_nosemaphore; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/parisc/include/asm/cacheflush.h linux-4.1.26/arch/parisc/include/asm/cacheflush.h ---- linux-4.1.26.orig/arch/parisc/include/asm/cacheflush.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/parisc/include/asm/cacheflush.h 2016-06-19 15:30:58.599293956 +0200 -@@ -142,6 +142,7 @@ - - static inline void *kmap_atomic(struct page *page) - { -+ preempt_disable(); - pagefault_disable(); - return page_address(page); - } -@@ -150,6 +151,7 @@ - { - flush_kernel_dcache_page_addr(addr); - pagefault_enable(); -+ preempt_enable(); - } - - #define kmap_atomic_prot(page, prot) kmap_atomic(page) -diff -Nur linux-4.1.26.orig/arch/parisc/kernel/traps.c linux-4.1.26/arch/parisc/kernel/traps.c ---- linux-4.1.26.orig/arch/parisc/kernel/traps.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/parisc/kernel/traps.c 2016-06-19 15:30:58.599293956 +0200 -@@ -26,9 +26,9 @@ - #include - #include - #include -+#include - - #include --#include - #include - #include - #include -@@ -796,7 +796,7 @@ - * unless pagefault_disable() was called before. - */ - -- if (fault_space == 0 && !in_atomic()) -+ if (fault_space == 0 && !faulthandler_disabled()) - { - /* Clean up and return if in exception table. */ - if (fixup_exception(regs)) -diff -Nur linux-4.1.26.orig/arch/parisc/mm/fault.c linux-4.1.26/arch/parisc/mm/fault.c ---- linux-4.1.26.orig/arch/parisc/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/parisc/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 -@@ -15,8 +15,8 @@ - #include - #include - #include -+#include - --#include - #include - - /* Various important other fields */ -@@ -208,7 +208,7 @@ - int fault; - unsigned int flags; - -- if (in_atomic()) -+ if (pagefault_disabled()) - goto no_context; - - tsk = current; -diff -Nur linux-4.1.26.orig/arch/powerpc/include/asm/kvm_host.h linux-4.1.26/arch/powerpc/include/asm/kvm_host.h ---- linux-4.1.26.orig/arch/powerpc/include/asm/kvm_host.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/include/asm/kvm_host.h 2016-06-19 15:30:58.599293956 +0200 -@@ -280,7 +280,7 @@ - u8 in_guest; - struct list_head runnable_threads; - spinlock_t lock; -- wait_queue_head_t wq; -+ struct swait_head wq; - spinlock_t stoltb_lock; /* protects stolen_tb and preempt_tb */ - u64 stolen_tb; - u64 preempt_tb; -@@ -613,7 +613,7 @@ - u8 prodded; - u32 last_inst; - -- wait_queue_head_t *wqp; -+ struct swait_head *wqp; - struct kvmppc_vcore *vcore; - int ret; - int trap; -diff -Nur linux-4.1.26.orig/arch/powerpc/include/asm/thread_info.h linux-4.1.26/arch/powerpc/include/asm/thread_info.h ---- linux-4.1.26.orig/arch/powerpc/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/include/asm/thread_info.h 2016-06-19 15:30:58.603294110 +0200 -@@ -42,6 +42,8 @@ - int cpu; /* cpu we're on */ - int preempt_count; /* 0 => preemptable, - <0 => BUG */ -+ int preempt_lazy_count; /* 0 => preemptable, -+ <0 => BUG */ - unsigned long local_flags; /* private flags for thread */ - - /* low level flags - has atomic operations done on it */ -@@ -82,8 +84,7 @@ - #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ - #define TIF_SIGPENDING 1 /* signal pending */ - #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ --#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling -- TIF_NEED_RESCHED */ -+#define TIF_NEED_RESCHED_LAZY 3 /* lazy rescheduling necessary */ - #define TIF_32BIT 4 /* 32 bit binary */ - #define TIF_RESTORE_TM 5 /* need to restore TM FP/VEC/VSX */ - #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ -@@ -101,6 +102,8 @@ - #if defined(CONFIG_PPC64) - #define TIF_ELF2ABI 18 /* function descriptors must die! */ - #endif -+#define TIF_POLLING_NRFLAG 19 /* true if poll_idle() is polling -+ TIF_NEED_RESCHED */ - - /* as above, but as bit values */ - #define _TIF_SYSCALL_TRACE (1<flags) - set_bits(irqtp->flags, &curtp->flags); - } -+#endif - - irq_hw_number_t virq_to_hw(unsigned int virq) - { -diff -Nur linux-4.1.26.orig/arch/powerpc/kernel/misc_32.S linux-4.1.26/arch/powerpc/kernel/misc_32.S ---- linux-4.1.26.orig/arch/powerpc/kernel/misc_32.S 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/kernel/misc_32.S 2016-06-19 15:30:58.603294110 +0200 -@@ -40,6 +40,7 @@ - * We store the saved ksp_limit in the unused part - * of the STACK_FRAME_OVERHEAD - */ -+#ifndef CONFIG_PREEMPT_RT_FULL - _GLOBAL(call_do_softirq) - mflr r0 - stw r0,4(r1) -@@ -56,6 +57,7 @@ - stw r10,THREAD+KSP_LIMIT(r2) - mtlr r0 - blr -+#endif - - /* - * void call_do_irq(struct pt_regs *regs, struct thread_info *irqtp); -diff -Nur linux-4.1.26.orig/arch/powerpc/kernel/misc_64.S linux-4.1.26/arch/powerpc/kernel/misc_64.S ---- linux-4.1.26.orig/arch/powerpc/kernel/misc_64.S 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/kernel/misc_64.S 2016-06-19 15:30:58.603294110 +0200 -@@ -29,6 +29,7 @@ - - .text - -+#ifndef CONFIG_PREEMPT_RT_FULL - _GLOBAL(call_do_softirq) - mflr r0 - std r0,16(r1) -@@ -39,6 +40,7 @@ - ld r0,16(r1) - mtlr r0 - blr -+#endif - - _GLOBAL(call_do_irq) - mflr r0 -diff -Nur linux-4.1.26.orig/arch/powerpc/kvm/book3s_hv.c linux-4.1.26/arch/powerpc/kvm/book3s_hv.c ---- linux-4.1.26.orig/arch/powerpc/kvm/book3s_hv.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/kvm/book3s_hv.c 2016-06-19 15:30:58.603294110 +0200 -@@ -115,11 +115,11 @@ - static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) - { - int cpu = vcpu->cpu; -- wait_queue_head_t *wqp; -+ struct swait_head *wqp; - - wqp = kvm_arch_vcpu_wq(vcpu); -- if (waitqueue_active(wqp)) { -- wake_up_interruptible(wqp); -+ if (swaitqueue_active(wqp)) { -+ swait_wake_interruptible(wqp); - ++vcpu->stat.halt_wakeup; - } - -@@ -692,8 +692,8 @@ - tvcpu->arch.prodded = 1; - smp_mb(); - if (vcpu->arch.ceded) { -- if (waitqueue_active(&vcpu->wq)) { -- wake_up_interruptible(&vcpu->wq); -+ if (swaitqueue_active(&vcpu->wq)) { -+ swait_wake_interruptible(&vcpu->wq); - vcpu->stat.halt_wakeup++; - } - } -@@ -1432,7 +1432,7 @@ - INIT_LIST_HEAD(&vcore->runnable_threads); - spin_lock_init(&vcore->lock); - spin_lock_init(&vcore->stoltb_lock); -- init_waitqueue_head(&vcore->wq); -+ init_swait_head(&vcore->wq); - vcore->preempt_tb = TB_NIL; - vcore->lpcr = kvm->arch.lpcr; - vcore->first_vcpuid = core * threads_per_subcore; -@@ -2079,10 +2079,9 @@ - { - struct kvm_vcpu *vcpu; - int do_sleep = 1; -+ DEFINE_SWAITER(wait); - -- DEFINE_WAIT(wait); -- -- prepare_to_wait(&vc->wq, &wait, TASK_INTERRUPTIBLE); -+ swait_prepare(&vc->wq, &wait, TASK_INTERRUPTIBLE); - - /* - * Check one last time for pending exceptions and ceded state after -@@ -2096,7 +2095,7 @@ - } - - if (!do_sleep) { -- finish_wait(&vc->wq, &wait); -+ swait_finish(&vc->wq, &wait); - return; - } - -@@ -2104,7 +2103,7 @@ - trace_kvmppc_vcore_blocked(vc, 0); - spin_unlock(&vc->lock); - schedule(); -- finish_wait(&vc->wq, &wait); -+ swait_finish(&vc->wq, &wait); - spin_lock(&vc->lock); - vc->vcore_state = VCORE_INACTIVE; - trace_kvmppc_vcore_blocked(vc, 1); -@@ -2148,7 +2147,7 @@ - kvmppc_start_thread(vcpu); - trace_kvm_guest_enter(vcpu); - } else if (vc->vcore_state == VCORE_SLEEPING) { -- wake_up(&vc->wq); -+ swait_wake(&vc->wq); - } - - } -diff -Nur linux-4.1.26.orig/arch/powerpc/kvm/Kconfig linux-4.1.26/arch/powerpc/kvm/Kconfig ---- linux-4.1.26.orig/arch/powerpc/kvm/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/kvm/Kconfig 2016-06-19 15:30:58.603294110 +0200 -@@ -172,6 +172,7 @@ - config KVM_MPIC - bool "KVM in-kernel MPIC emulation" - depends on KVM && E500 -+ depends on !PREEMPT_RT_FULL - select HAVE_KVM_IRQCHIP - select HAVE_KVM_IRQFD - select HAVE_KVM_IRQ_ROUTING -diff -Nur linux-4.1.26.orig/arch/powerpc/mm/fault.c linux-4.1.26/arch/powerpc/mm/fault.c ---- linux-4.1.26.orig/arch/powerpc/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/mm/fault.c 2016-06-19 15:30:58.603294110 +0200 -@@ -33,13 +33,13 @@ - #include - #include - #include -+#include - - #include - #include - #include - #include - #include --#include - #include - #include - #include -@@ -272,15 +272,16 @@ - if (!arch_irq_disabled_regs(regs)) - local_irq_enable(); - -- if (in_atomic() || mm == NULL) { -+ if (faulthandler_disabled() || mm == NULL) { - if (!user_mode(regs)) { - rc = SIGSEGV; - goto bail; - } -- /* in_atomic() in user mode is really bad, -+ /* faulthandler_disabled() in user mode is really bad, - as is current->mm == NULL. */ - printk(KERN_EMERG "Page fault in user mode with " -- "in_atomic() = %d mm = %p\n", in_atomic(), mm); -+ "faulthandler_disabled() = %d mm = %p\n", -+ faulthandler_disabled(), mm); - printk(KERN_EMERG "NIP = %lx MSR = %lx\n", - regs->nip, regs->msr); - die("Weird page fault", regs, SIGSEGV); -diff -Nur linux-4.1.26.orig/arch/powerpc/mm/highmem.c linux-4.1.26/arch/powerpc/mm/highmem.c ---- linux-4.1.26.orig/arch/powerpc/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/mm/highmem.c 2016-06-19 15:30:58.603294110 +0200 -@@ -34,7 +34,7 @@ - unsigned long vaddr; - int idx, type; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -59,6 +59,7 @@ - - if (vaddr < __fix_to_virt(FIX_KMAP_END)) { - pagefault_enable(); -+ preempt_enable(); - return; - } - -@@ -82,5 +83,6 @@ - - kmap_atomic_idx_pop(); - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); -diff -Nur linux-4.1.26.orig/arch/powerpc/platforms/ps3/device-init.c linux-4.1.26/arch/powerpc/platforms/ps3/device-init.c ---- linux-4.1.26.orig/arch/powerpc/platforms/ps3/device-init.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/powerpc/platforms/ps3/device-init.c 2016-06-19 15:30:58.603294110 +0200 -@@ -752,7 +752,7 @@ - } - pr_debug("%s:%u: notification %s issued\n", __func__, __LINE__, op); - -- res = wait_event_interruptible(dev->done.wait, -+ res = swait_event_interruptible(dev->done.wait, - dev->done.done || kthread_should_stop()); - if (kthread_should_stop()) - res = -EINTR; -diff -Nur linux-4.1.26.orig/arch/s390/include/asm/kvm_host.h linux-4.1.26/arch/s390/include/asm/kvm_host.h ---- linux-4.1.26.orig/arch/s390/include/asm/kvm_host.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/s390/include/asm/kvm_host.h 2016-06-19 15:30:58.603294110 +0200 -@@ -419,7 +419,7 @@ - struct kvm_s390_local_interrupt { - spinlock_t lock; - struct kvm_s390_float_interrupt *float_int; -- wait_queue_head_t *wq; -+ struct swait_head *wq; - atomic_t *cpuflags; - DECLARE_BITMAP(sigp_emerg_pending, KVM_MAX_VCPUS); - struct kvm_s390_irq_payload irq; -diff -Nur linux-4.1.26.orig/arch/s390/include/asm/uaccess.h linux-4.1.26/arch/s390/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/s390/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/s390/include/asm/uaccess.h 2016-06-19 15:30:58.603294110 +0200 -@@ -98,7 +98,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -118,7 +119,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -264,7 +266,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. - * -@@ -290,7 +293,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. - * -@@ -348,7 +352,8 @@ - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Get the size of a NUL-terminated string in user space. - * -diff -Nur linux-4.1.26.orig/arch/s390/kvm/interrupt.c linux-4.1.26/arch/s390/kvm/interrupt.c ---- linux-4.1.26.orig/arch/s390/kvm/interrupt.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/s390/kvm/interrupt.c 2016-06-19 15:30:58.607294264 +0200 -@@ -875,13 +875,13 @@ - - void kvm_s390_vcpu_wakeup(struct kvm_vcpu *vcpu) - { -- if (waitqueue_active(&vcpu->wq)) { -+ if (swaitqueue_active(&vcpu->wq)) { - /* - * The vcpu gave up the cpu voluntarily, mark it as a good - * yield-candidate. - */ - vcpu->preempted = true; -- wake_up_interruptible(&vcpu->wq); -+ swait_wake_interruptible(&vcpu->wq); - vcpu->stat.halt_wakeup++; - } - } -@@ -987,7 +987,7 @@ - spin_lock(&li->lock); - irq.u.pgm.code = code; - __inject_prog(vcpu, &irq); -- BUG_ON(waitqueue_active(li->wq)); -+ BUG_ON(swaitqueue_active(li->wq)); - spin_unlock(&li->lock); - return 0; - } -@@ -1006,7 +1006,7 @@ - spin_lock(&li->lock); - irq.u.pgm = *pgm_info; - rc = __inject_prog(vcpu, &irq); -- BUG_ON(waitqueue_active(li->wq)); -+ BUG_ON(swaitqueue_active(li->wq)); - spin_unlock(&li->lock); - return rc; - } -diff -Nur linux-4.1.26.orig/arch/s390/mm/fault.c linux-4.1.26/arch/s390/mm/fault.c ---- linux-4.1.26.orig/arch/s390/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/s390/mm/fault.c 2016-06-19 15:30:58.607294264 +0200 -@@ -399,7 +399,7 @@ - * user context. - */ - fault = VM_FAULT_BADCONTEXT; -- if (unlikely(!user_space_fault(regs) || in_atomic() || !mm)) -+ if (unlikely(!user_space_fault(regs) || faulthandler_disabled() || !mm)) - goto out; - - address = trans_exc_code & __FAIL_ADDR_MASK; -diff -Nur linux-4.1.26.orig/arch/score/include/asm/uaccess.h linux-4.1.26/arch/score/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/score/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/score/include/asm/uaccess.h 2016-06-19 15:30:58.607294264 +0200 -@@ -36,7 +36,8 @@ - * @addr: User space pointer to start of block to check - * @size: Size of block to check - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Checks if a pointer to a block of memory in user space is valid. - * -@@ -61,7 +62,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -79,7 +81,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -98,7 +101,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -119,7 +123,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -diff -Nur linux-4.1.26.orig/arch/score/mm/fault.c linux-4.1.26/arch/score/mm/fault.c ---- linux-4.1.26.orig/arch/score/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/score/mm/fault.c 2016-06-19 15:30:58.607294264 +0200 -@@ -34,6 +34,7 @@ - #include - #include - #include -+#include - - /* - * This routine handles page faults. It determines the address, -@@ -73,7 +74,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (pagefault_disabled() || !mm) - goto bad_area_nosemaphore; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/sh/kernel/irq.c linux-4.1.26/arch/sh/kernel/irq.c ---- linux-4.1.26.orig/arch/sh/kernel/irq.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sh/kernel/irq.c 2016-06-19 15:30:58.607294264 +0200 -@@ -147,6 +147,7 @@ - hardirq_ctx[cpu] = NULL; - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - void do_softirq_own_stack(void) - { - struct thread_info *curctx; -@@ -174,6 +175,7 @@ - "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr" - ); - } -+#endif - #else - static inline void handle_one_irq(unsigned int irq) - { -diff -Nur linux-4.1.26.orig/arch/sh/mm/fault.c linux-4.1.26/arch/sh/mm/fault.c ---- linux-4.1.26.orig/arch/sh/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sh/mm/fault.c 2016-06-19 15:30:58.607294264 +0200 -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -438,9 +439,9 @@ - - /* - * If we're in an interrupt, have no user context or are running -- * in an atomic region then we must not take the fault: -+ * with pagefaults disabled then we must not take the fault: - */ -- if (unlikely(in_atomic() || !mm)) { -+ if (unlikely(faulthandler_disabled() || !mm)) { - bad_area_nosemaphore(regs, error_code, address); - return; - } -diff -Nur linux-4.1.26.orig/arch/sparc/Kconfig linux-4.1.26/arch/sparc/Kconfig ---- linux-4.1.26.orig/arch/sparc/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sparc/Kconfig 2016-06-19 15:30:58.607294264 +0200 -@@ -189,12 +189,10 @@ - source kernel/Kconfig.hz - - config RWSEM_GENERIC_SPINLOCK -- bool -- default y if SPARC32 -+ def_bool PREEMPT_RT_FULL - - config RWSEM_XCHGADD_ALGORITHM -- bool -- default y if SPARC64 -+ def_bool !RWSEM_GENERIC_SPINLOCK && !PREEMPT_RT_FULL - - config GENERIC_HWEIGHT - bool -diff -Nur linux-4.1.26.orig/arch/sparc/kernel/irq_64.c linux-4.1.26/arch/sparc/kernel/irq_64.c ---- linux-4.1.26.orig/arch/sparc/kernel/irq_64.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sparc/kernel/irq_64.c 2016-06-19 15:30:58.607294264 +0200 -@@ -849,6 +849,7 @@ - set_irq_regs(old_regs); - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - void do_softirq_own_stack(void) - { - void *orig_sp, *sp = softirq_stack[smp_processor_id()]; -@@ -863,6 +864,7 @@ - __asm__ __volatile__("mov %0, %%sp" - : : "r" (orig_sp)); - } -+#endif - - #ifdef CONFIG_HOTPLUG_CPU - void fixup_irqs(void) -diff -Nur linux-4.1.26.orig/arch/sparc/mm/fault_32.c linux-4.1.26/arch/sparc/mm/fault_32.c ---- linux-4.1.26.orig/arch/sparc/mm/fault_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sparc/mm/fault_32.c 2016-06-19 15:30:58.607294264 +0200 -@@ -21,6 +21,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -29,7 +30,6 @@ - #include - #include - #include --#include - - #include "mm_32.h" - -@@ -196,7 +196,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (pagefault_disabled() || !mm) - goto no_context; - - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); -diff -Nur linux-4.1.26.orig/arch/sparc/mm/fault_64.c linux-4.1.26/arch/sparc/mm/fault_64.c ---- linux-4.1.26.orig/arch/sparc/mm/fault_64.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sparc/mm/fault_64.c 2016-06-19 15:30:58.607294264 +0200 -@@ -22,12 +22,12 @@ - #include - #include - #include -+#include - - #include - #include - #include - #include --#include - #include - #include - #include -@@ -330,7 +330,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto intr_or_no_mm; - - perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); -diff -Nur linux-4.1.26.orig/arch/sparc/mm/highmem.c linux-4.1.26/arch/sparc/mm/highmem.c ---- linux-4.1.26.orig/arch/sparc/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sparc/mm/highmem.c 2016-06-19 15:30:58.607294264 +0200 -@@ -53,7 +53,7 @@ - unsigned long vaddr; - long idx, type; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -91,6 +91,7 @@ - - if (vaddr < FIXADDR_START) { // FIXME - pagefault_enable(); -+ preempt_enable(); - return; - } - -@@ -126,5 +127,6 @@ - - kmap_atomic_idx_pop(); - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); -diff -Nur linux-4.1.26.orig/arch/sparc/mm/init_64.c linux-4.1.26/arch/sparc/mm/init_64.c ---- linux-4.1.26.orig/arch/sparc/mm/init_64.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/sparc/mm/init_64.c 2016-06-19 15:30:58.607294264 +0200 -@@ -2738,7 +2738,7 @@ - struct mm_struct *mm = current->mm; - struct tsb_config *tp; - -- if (in_atomic() || !mm) { -+ if (faulthandler_disabled() || !mm) { - const struct exception_table_entry *entry; - - entry = search_exception_tables(regs->tpc); -diff -Nur linux-4.1.26.orig/arch/tile/include/asm/uaccess.h linux-4.1.26/arch/tile/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/tile/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/tile/include/asm/uaccess.h 2016-06-19 15:30:58.611294419 +0200 -@@ -78,7 +78,8 @@ - * @addr: User space pointer to start of block to check - * @size: Size of block to check - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Checks if a pointer to a block of memory in user space is valid. - * -@@ -192,7 +193,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -274,7 +276,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -330,7 +333,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -366,7 +370,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -437,7 +442,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to user space. Caller must check - * the specified blocks with access_ok() before calling this function. -diff -Nur linux-4.1.26.orig/arch/tile/mm/fault.c linux-4.1.26/arch/tile/mm/fault.c ---- linux-4.1.26.orig/arch/tile/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/tile/mm/fault.c 2016-06-19 15:30:58.611294419 +0200 -@@ -354,9 +354,9 @@ - - /* - * If we're in an interrupt, have no user context or are running in an -- * atomic region then we must not take the fault. -+ * region with pagefaults disabled then we must not take the fault. - */ -- if (in_atomic() || !mm) { -+ if (pagefault_disabled() || !mm) { - vma = NULL; /* happy compiler */ - goto bad_area_nosemaphore; - } -diff -Nur linux-4.1.26.orig/arch/tile/mm/highmem.c linux-4.1.26/arch/tile/mm/highmem.c ---- linux-4.1.26.orig/arch/tile/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/tile/mm/highmem.c 2016-06-19 15:30:58.611294419 +0200 -@@ -201,7 +201,7 @@ - int idx, type; - pte_t *pte; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable(); - pagefault_disable(); - - /* Avoid icache flushes by disallowing atomic executable mappings. */ -@@ -259,6 +259,7 @@ - } - - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); - -diff -Nur linux-4.1.26.orig/arch/um/kernel/trap.c linux-4.1.26/arch/um/kernel/trap.c ---- linux-4.1.26.orig/arch/um/kernel/trap.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/um/kernel/trap.c 2016-06-19 15:30:58.611294419 +0200 -@@ -35,10 +35,10 @@ - *code_out = SEGV_MAPERR; - - /* -- * If the fault was during atomic operation, don't take the fault, just -+ * If the fault was with pagefaults disabled, don't take the fault, just - * fail. - */ -- if (in_atomic()) -+ if (faulthandler_disabled()) - goto out_nosemaphore; - - if (is_user) -diff -Nur linux-4.1.26.orig/arch/unicore32/mm/fault.c linux-4.1.26/arch/unicore32/mm/fault.c ---- linux-4.1.26.orig/arch/unicore32/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/unicore32/mm/fault.c 2016-06-19 15:30:58.611294419 +0200 -@@ -218,7 +218,7 @@ - * If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) -+ if (faulthandler_disabled() || !mm) - goto no_context; - - if (user_mode(regs)) -diff -Nur linux-4.1.26.orig/arch/x86/crypto/aesni-intel_glue.c linux-4.1.26/arch/x86/crypto/aesni-intel_glue.c ---- linux-4.1.26.orig/arch/x86/crypto/aesni-intel_glue.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/crypto/aesni-intel_glue.c 2016-06-19 15:30:58.611294419 +0200 -@@ -382,14 +382,14 @@ - err = blkcipher_walk_virt(desc, &walk); - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - -- kernel_fpu_begin(); - while ((nbytes = walk.nbytes)) { -+ kernel_fpu_begin(); - aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, -- nbytes & AES_BLOCK_MASK); -+ nbytes & AES_BLOCK_MASK); -+ kernel_fpu_end(); - nbytes &= AES_BLOCK_SIZE - 1; - err = blkcipher_walk_done(desc, &walk, nbytes); - } -- kernel_fpu_end(); - - return err; - } -@@ -406,14 +406,14 @@ - err = blkcipher_walk_virt(desc, &walk); - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - -- kernel_fpu_begin(); - while ((nbytes = walk.nbytes)) { -+ kernel_fpu_begin(); - aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, - nbytes & AES_BLOCK_MASK); -+ kernel_fpu_end(); - nbytes &= AES_BLOCK_SIZE - 1; - err = blkcipher_walk_done(desc, &walk, nbytes); - } -- kernel_fpu_end(); - - return err; - } -@@ -430,14 +430,14 @@ - err = blkcipher_walk_virt(desc, &walk); - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - -- kernel_fpu_begin(); - while ((nbytes = walk.nbytes)) { -+ kernel_fpu_begin(); - aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, - nbytes & AES_BLOCK_MASK, walk.iv); -+ kernel_fpu_end(); - nbytes &= AES_BLOCK_SIZE - 1; - err = blkcipher_walk_done(desc, &walk, nbytes); - } -- kernel_fpu_end(); - - return err; - } -@@ -454,14 +454,14 @@ - err = blkcipher_walk_virt(desc, &walk); - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - -- kernel_fpu_begin(); - while ((nbytes = walk.nbytes)) { -+ kernel_fpu_begin(); - aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, - nbytes & AES_BLOCK_MASK, walk.iv); -+ kernel_fpu_end(); - nbytes &= AES_BLOCK_SIZE - 1; - err = blkcipher_walk_done(desc, &walk, nbytes); - } -- kernel_fpu_end(); - - return err; - } -@@ -513,18 +513,20 @@ - err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE); - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - -- kernel_fpu_begin(); - while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) { -+ kernel_fpu_begin(); - aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr, - nbytes & AES_BLOCK_MASK, walk.iv); -+ kernel_fpu_end(); - nbytes &= AES_BLOCK_SIZE - 1; - err = blkcipher_walk_done(desc, &walk, nbytes); - } - if (walk.nbytes) { -+ kernel_fpu_begin(); - ctr_crypt_final(ctx, &walk); -+ kernel_fpu_end(); - err = blkcipher_walk_done(desc, &walk, 0); - } -- kernel_fpu_end(); - - return err; - } -diff -Nur linux-4.1.26.orig/arch/x86/crypto/cast5_avx_glue.c linux-4.1.26/arch/x86/crypto/cast5_avx_glue.c ---- linux-4.1.26.orig/arch/x86/crypto/cast5_avx_glue.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/crypto/cast5_avx_glue.c 2016-06-19 15:30:58.611294419 +0200 -@@ -60,7 +60,7 @@ - static int ecb_crypt(struct blkcipher_desc *desc, struct blkcipher_walk *walk, - bool enc) - { -- bool fpu_enabled = false; -+ bool fpu_enabled; - struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); - const unsigned int bsize = CAST5_BLOCK_SIZE; - unsigned int nbytes; -@@ -76,7 +76,7 @@ - u8 *wsrc = walk->src.virt.addr; - u8 *wdst = walk->dst.virt.addr; - -- fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes); -+ fpu_enabled = cast5_fpu_begin(false, nbytes); - - /* Process multi-block batch */ - if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) { -@@ -104,10 +104,9 @@ - } while (nbytes >= bsize); - - done: -+ cast5_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, walk, nbytes); - } -- -- cast5_fpu_end(fpu_enabled); - return err; - } - -@@ -228,7 +227,7 @@ - static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes) - { -- bool fpu_enabled = false; -+ bool fpu_enabled; - struct blkcipher_walk walk; - int err; - -@@ -237,12 +236,11 @@ - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - - while ((nbytes = walk.nbytes)) { -- fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes); -+ fpu_enabled = cast5_fpu_begin(false, nbytes); - nbytes = __cbc_decrypt(desc, &walk); -+ cast5_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, &walk, nbytes); - } -- -- cast5_fpu_end(fpu_enabled); - return err; - } - -@@ -312,7 +310,7 @@ - static int ctr_crypt(struct blkcipher_desc *desc, struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes) - { -- bool fpu_enabled = false; -+ bool fpu_enabled; - struct blkcipher_walk walk; - int err; - -@@ -321,13 +319,12 @@ - desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; - - while ((nbytes = walk.nbytes) >= CAST5_BLOCK_SIZE) { -- fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes); -+ fpu_enabled = cast5_fpu_begin(false, nbytes); - nbytes = __ctr_crypt(desc, &walk); -+ cast5_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, &walk, nbytes); - } - -- cast5_fpu_end(fpu_enabled); -- - if (walk.nbytes) { - ctr_crypt_final(desc, &walk); - err = blkcipher_walk_done(desc, &walk, 0); -diff -Nur linux-4.1.26.orig/arch/x86/crypto/glue_helper.c linux-4.1.26/arch/x86/crypto/glue_helper.c ---- linux-4.1.26.orig/arch/x86/crypto/glue_helper.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/crypto/glue_helper.c 2016-06-19 15:30:58.611294419 +0200 -@@ -39,7 +39,7 @@ - void *ctx = crypto_blkcipher_ctx(desc->tfm); - const unsigned int bsize = 128 / 8; - unsigned int nbytes, i, func_bytes; -- bool fpu_enabled = false; -+ bool fpu_enabled; - int err; - - err = blkcipher_walk_virt(desc, walk); -@@ -49,7 +49,7 @@ - u8 *wdst = walk->dst.virt.addr; - - fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, -- desc, fpu_enabled, nbytes); -+ desc, false, nbytes); - - for (i = 0; i < gctx->num_funcs; i++) { - func_bytes = bsize * gctx->funcs[i].num_blocks; -@@ -71,10 +71,10 @@ - } - - done: -+ glue_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, walk, nbytes); - } - -- glue_fpu_end(fpu_enabled); - return err; - } - -@@ -194,7 +194,7 @@ - struct scatterlist *src, unsigned int nbytes) - { - const unsigned int bsize = 128 / 8; -- bool fpu_enabled = false; -+ bool fpu_enabled; - struct blkcipher_walk walk; - int err; - -@@ -203,12 +203,12 @@ - - while ((nbytes = walk.nbytes)) { - fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, -- desc, fpu_enabled, nbytes); -+ desc, false, nbytes); - nbytes = __glue_cbc_decrypt_128bit(gctx, desc, &walk); -+ glue_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, &walk, nbytes); - } - -- glue_fpu_end(fpu_enabled); - return err; - } - EXPORT_SYMBOL_GPL(glue_cbc_decrypt_128bit); -@@ -277,7 +277,7 @@ - struct scatterlist *src, unsigned int nbytes) - { - const unsigned int bsize = 128 / 8; -- bool fpu_enabled = false; -+ bool fpu_enabled; - struct blkcipher_walk walk; - int err; - -@@ -286,13 +286,12 @@ - - while ((nbytes = walk.nbytes) >= bsize) { - fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, -- desc, fpu_enabled, nbytes); -+ desc, false, nbytes); - nbytes = __glue_ctr_crypt_128bit(gctx, desc, &walk); -+ glue_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, &walk, nbytes); - } - -- glue_fpu_end(fpu_enabled); -- - if (walk.nbytes) { - glue_ctr_crypt_final_128bit( - gctx->funcs[gctx->num_funcs - 1].fn_u.ctr, desc, &walk); -@@ -347,7 +346,7 @@ - void *tweak_ctx, void *crypt_ctx) - { - const unsigned int bsize = 128 / 8; -- bool fpu_enabled = false; -+ bool fpu_enabled; - struct blkcipher_walk walk; - int err; - -@@ -360,21 +359,21 @@ - - /* set minimum length to bsize, for tweak_fn */ - fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, -- desc, fpu_enabled, -+ desc, false, - nbytes < bsize ? bsize : nbytes); -- - /* calculate first value of T */ - tweak_fn(tweak_ctx, walk.iv, walk.iv); -+ glue_fpu_end(fpu_enabled); - - while (nbytes) { -+ fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, -+ desc, false, nbytes); - nbytes = __glue_xts_crypt_128bit(gctx, crypt_ctx, desc, &walk); - -+ glue_fpu_end(fpu_enabled); - err = blkcipher_walk_done(desc, &walk, nbytes); - nbytes = walk.nbytes; - } -- -- glue_fpu_end(fpu_enabled); -- - return err; - } - EXPORT_SYMBOL_GPL(glue_xts_crypt_128bit); -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/preempt.h linux-4.1.26/arch/x86/include/asm/preempt.h ---- linux-4.1.26.orig/arch/x86/include/asm/preempt.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/preempt.h 2016-06-19 15:30:58.611294419 +0200 -@@ -82,17 +82,33 @@ - * a decrement which hits zero means we have no preempt_count and should - * reschedule. - */ --static __always_inline bool __preempt_count_dec_and_test(void) -+static __always_inline bool ____preempt_count_dec_and_test(void) - { - GEN_UNARY_RMWcc("decl", __preempt_count, __percpu_arg(0), "e"); - } - -+static __always_inline bool __preempt_count_dec_and_test(void) -+{ -+ if (____preempt_count_dec_and_test()) -+ return true; -+#ifdef CONFIG_PREEMPT_LAZY -+ return test_thread_flag(TIF_NEED_RESCHED_LAZY); -+#else -+ return false; -+#endif -+} -+ - /* - * Returns true when we need to resched and can (barring IRQ state). - */ - static __always_inline bool should_resched(int preempt_offset) - { -+#ifdef CONFIG_PREEMPT_LAZY -+ return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset || -+ test_thread_flag(TIF_NEED_RESCHED_LAZY)); -+#else - return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset); -+#endif - } - - #ifdef CONFIG_PREEMPT -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/signal.h linux-4.1.26/arch/x86/include/asm/signal.h ---- linux-4.1.26.orig/arch/x86/include/asm/signal.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/signal.h 2016-06-19 15:30:58.611294419 +0200 -@@ -23,6 +23,19 @@ - unsigned long sig[_NSIG_WORDS]; - } sigset_t; - -+/* -+ * Because some traps use the IST stack, we must keep preemption -+ * disabled while calling do_trap(), but do_trap() may call -+ * force_sig_info() which will grab the signal spin_locks for the -+ * task, which in PREEMPT_RT_FULL are mutexes. By defining -+ * ARCH_RT_DELAYS_SIGNAL_SEND the force_sig_info() will set -+ * TIF_NOTIFY_RESUME and set up the signal to be sent on exit of the -+ * trap. -+ */ -+#if defined(CONFIG_PREEMPT_RT_FULL) -+#define ARCH_RT_DELAYS_SIGNAL_SEND -+#endif -+ - #ifndef CONFIG_COMPAT - typedef sigset_t compat_sigset_t; - #endif -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/stackprotector.h linux-4.1.26/arch/x86/include/asm/stackprotector.h ---- linux-4.1.26.orig/arch/x86/include/asm/stackprotector.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/stackprotector.h 2016-06-19 15:30:58.611294419 +0200 -@@ -57,7 +57,7 @@ - */ - static __always_inline void boot_init_stack_canary(void) - { -- u64 canary; -+ u64 uninitialized_var(canary); - u64 tsc; - - #ifdef CONFIG_X86_64 -@@ -68,8 +68,16 @@ - * of randomness. The TSC only matters for very early init, - * there it already has some randomness on most systems. Later - * on during the bootup the random pool has true entropy too. -+ * -+ * For preempt-rt we need to weaken the randomness a bit, as -+ * we can't call into the random generator from atomic context -+ * due to locking constraints. We just leave canary -+ * uninitialized and use the TSC based randomness on top of -+ * it. - */ -+#ifndef CONFIG_PREEMPT_RT_FULL - get_random_bytes(&canary, sizeof(canary)); -+#endif - tsc = __native_read_tsc(); - canary += tsc + (tsc << 32UL); - -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/thread_info.h linux-4.1.26/arch/x86/include/asm/thread_info.h ---- linux-4.1.26.orig/arch/x86/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/thread_info.h 2016-06-19 15:30:58.611294419 +0200 -@@ -55,6 +55,8 @@ - __u32 status; /* thread synchronous flags */ - __u32 cpu; /* current CPU */ - int saved_preempt_count; -+ int preempt_lazy_count; /* 0 => lazy preemptable -+ <0 => BUG */ - mm_segment_t addr_limit; - void __user *sysenter_return; - unsigned int sig_on_uaccess_error:1; -@@ -95,6 +97,7 @@ - #define TIF_SYSCALL_EMU 6 /* syscall emulation active */ - #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ - #define TIF_SECCOMP 8 /* secure computing */ -+#define TIF_NEED_RESCHED_LAZY 9 /* lazy rescheduling necessary */ - #define TIF_USER_RETURN_NOTIFY 11 /* notify kernel of userspace return */ - #define TIF_UPROBE 12 /* breakpointed or singlestepping */ - #define TIF_NOTSC 16 /* TSC is not accessible in userland */ -@@ -119,6 +122,7 @@ - #define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) - #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) - #define _TIF_SECCOMP (1 << TIF_SECCOMP) -+#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) - #define _TIF_USER_RETURN_NOTIFY (1 << TIF_USER_RETURN_NOTIFY) - #define _TIF_UPROBE (1 << TIF_UPROBE) - #define _TIF_NOTSC (1 << TIF_NOTSC) -@@ -168,6 +172,8 @@ - #define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY) - #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW) - -+#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) -+ - #define STACK_WARN (THREAD_SIZE/8) - - /* -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uaccess_32.h linux-4.1.26/arch/x86/include/asm/uaccess_32.h ---- linux-4.1.26.orig/arch/x86/include/asm/uaccess_32.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/uaccess_32.h 2016-06-19 15:30:58.615294573 +0200 -@@ -70,7 +70,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. Caller must check - * the specified block with access_ok() before calling this function. -@@ -117,7 +118,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. Caller must check - * the specified block with access_ok() before calling this function. -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uaccess.h linux-4.1.26/arch/x86/include/asm/uaccess.h ---- linux-4.1.26.orig/arch/x86/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/uaccess.h 2016-06-19 15:30:58.611294419 +0200 -@@ -74,7 +74,8 @@ - * @addr: User space pointer to start of block to check - * @size: Size of block to check - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Checks if a pointer to a block of memory in user space is valid. - * -@@ -145,7 +146,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -240,7 +242,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -@@ -455,7 +458,8 @@ - * @x: Variable to store result. - * @ptr: Source address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger -@@ -479,7 +483,8 @@ - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uv/uv_bau.h linux-4.1.26/arch/x86/include/asm/uv/uv_bau.h ---- linux-4.1.26.orig/arch/x86/include/asm/uv/uv_bau.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/uv/uv_bau.h 2016-06-19 15:30:58.615294573 +0200 -@@ -615,9 +615,9 @@ - cycles_t send_message; - cycles_t period_end; - cycles_t period_time; -- spinlock_t uvhub_lock; -- spinlock_t queue_lock; -- spinlock_t disable_lock; -+ raw_spinlock_t uvhub_lock; -+ raw_spinlock_t queue_lock; -+ raw_spinlock_t disable_lock; - /* tunables */ - int max_concurr; - int max_concurr_const; -@@ -776,15 +776,15 @@ - * to be lowered below the current 'v'. atomic_add_unless can only stop - * on equal. - */ --static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u) -+static inline int atomic_inc_unless_ge(raw_spinlock_t *lock, atomic_t *v, int u) - { -- spin_lock(lock); -+ raw_spin_lock(lock); - if (atomic_read(v) >= u) { -- spin_unlock(lock); -+ raw_spin_unlock(lock); - return 0; - } - atomic_inc(v); -- spin_unlock(lock); -+ raw_spin_unlock(lock); - return 1; - } - -diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uv/uv_hub.h linux-4.1.26/arch/x86/include/asm/uv/uv_hub.h ---- linux-4.1.26.orig/arch/x86/include/asm/uv/uv_hub.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/include/asm/uv/uv_hub.h 2016-06-19 15:30:58.615294573 +0200 -@@ -492,7 +492,7 @@ - unsigned short nr_online_cpus; - unsigned short pnode; - short memory_nid; -- spinlock_t nmi_lock; /* obsolete, see uv_hub_nmi */ -+ raw_spinlock_t nmi_lock; /* obsolete, see uv_hub_nmi */ - unsigned long nmi_count; /* obsolete, see uv_hub_nmi */ - }; - extern struct uv_blade_info *uv_blade_info; -diff -Nur linux-4.1.26.orig/arch/x86/Kconfig linux-4.1.26/arch/x86/Kconfig ---- linux-4.1.26.orig/arch/x86/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/Kconfig 2016-06-19 15:30:58.611294419 +0200 -@@ -22,6 +22,7 @@ - ### Arch settings - config X86 - def_bool y -+ select HAVE_PREEMPT_LAZY - select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI - select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI - select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS -@@ -203,8 +204,11 @@ - def_bool y - depends on ISA_DMA_API - -+config RWSEM_GENERIC_SPINLOCK -+ def_bool PREEMPT_RT_FULL -+ - config RWSEM_XCHGADD_ALGORITHM -- def_bool y -+ def_bool !RWSEM_GENERIC_SPINLOCK && !PREEMPT_RT_FULL - - config GENERIC_CALIBRATE_DELAY - def_bool y -@@ -838,7 +842,7 @@ - config MAXSMP - bool "Enable Maximum number of SMP Processors and NUMA Nodes" - depends on X86_64 && SMP && DEBUG_KERNEL -- select CPUMASK_OFFSTACK -+ select CPUMASK_OFFSTACK if !PREEMPT_RT_FULL - ---help--- - Enable maximum number of CPUS and NUMA Nodes for this architecture. - If unsure, say N. -diff -Nur linux-4.1.26.orig/arch/x86/kernel/apic/io_apic.c linux-4.1.26/arch/x86/kernel/apic/io_apic.c ---- linux-4.1.26.orig/arch/x86/kernel/apic/io_apic.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/apic/io_apic.c 2016-06-19 15:30:58.615294573 +0200 -@@ -1891,7 +1891,8 @@ - static inline bool ioapic_irqd_mask(struct irq_data *data, struct irq_cfg *cfg) - { - /* If we are moving the irq we need to mask it */ -- if (unlikely(irqd_is_setaffinity_pending(data))) { -+ if (unlikely(irqd_is_setaffinity_pending(data) && -+ !irqd_irq_inprogress(data))) { - mask_ioapic(cfg); - return true; - } -diff -Nur linux-4.1.26.orig/arch/x86/kernel/apic/x2apic_uv_x.c linux-4.1.26/arch/x86/kernel/apic/x2apic_uv_x.c ---- linux-4.1.26.orig/arch/x86/kernel/apic/x2apic_uv_x.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/apic/x2apic_uv_x.c 2016-06-19 15:30:58.615294573 +0200 -@@ -949,7 +949,7 @@ - uv_blade_info[blade].pnode = pnode; - uv_blade_info[blade].nr_possible_cpus = 0; - uv_blade_info[blade].nr_online_cpus = 0; -- spin_lock_init(&uv_blade_info[blade].nmi_lock); -+ raw_spin_lock_init(&uv_blade_info[blade].nmi_lock); - min_pnode = min(pnode, min_pnode); - max_pnode = max(pnode, max_pnode); - blade++; -diff -Nur linux-4.1.26.orig/arch/x86/kernel/asm-offsets.c linux-4.1.26/arch/x86/kernel/asm-offsets.c ---- linux-4.1.26.orig/arch/x86/kernel/asm-offsets.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/asm-offsets.c 2016-06-19 15:30:58.615294573 +0200 -@@ -32,6 +32,7 @@ - OFFSET(TI_flags, thread_info, flags); - OFFSET(TI_status, thread_info, status); - OFFSET(TI_addr_limit, thread_info, addr_limit); -+ OFFSET(TI_preempt_lazy_count, thread_info, preempt_lazy_count); - - BLANK(); - OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); -@@ -71,4 +72,5 @@ - - BLANK(); - DEFINE(PTREGS_SIZE, sizeof(struct pt_regs)); -+ DEFINE(_PREEMPT_ENABLED, PREEMPT_ENABLED); - } -diff -Nur linux-4.1.26.orig/arch/x86/kernel/cpu/mcheck/mce.c linux-4.1.26/arch/x86/kernel/cpu/mcheck/mce.c ---- linux-4.1.26.orig/arch/x86/kernel/cpu/mcheck/mce.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/cpu/mcheck/mce.c 2016-06-19 15:30:58.615294573 +0200 -@@ -41,6 +41,8 @@ - #include - #include - #include -+#include -+#include - - #include - #include -@@ -1267,7 +1269,7 @@ - static unsigned long check_interval = INITIAL_CHECK_INTERVAL; - - static DEFINE_PER_CPU(unsigned long, mce_next_interval); /* in jiffies */ --static DEFINE_PER_CPU(struct timer_list, mce_timer); -+static DEFINE_PER_CPU(struct hrtimer, mce_timer); - - static unsigned long mce_adjust_timer_default(unsigned long interval) - { -@@ -1276,32 +1278,18 @@ - - static unsigned long (*mce_adjust_timer)(unsigned long interval) = mce_adjust_timer_default; - --static void __restart_timer(struct timer_list *t, unsigned long interval) -+static enum hrtimer_restart __restart_timer(struct hrtimer *timer, unsigned long interval) - { -- unsigned long when = jiffies + interval; -- unsigned long flags; -- -- local_irq_save(flags); -- -- if (timer_pending(t)) { -- if (time_before(when, t->expires)) -- mod_timer_pinned(t, when); -- } else { -- t->expires = round_jiffies(when); -- add_timer_on(t, smp_processor_id()); -- } -- -- local_irq_restore(flags); -+ if (!interval) -+ return HRTIMER_NORESTART; -+ hrtimer_forward_now(timer, ns_to_ktime(jiffies_to_nsecs(interval))); -+ return HRTIMER_RESTART; - } - --static void mce_timer_fn(unsigned long data) -+static enum hrtimer_restart mce_timer_fn(struct hrtimer *timer) - { -- struct timer_list *t = this_cpu_ptr(&mce_timer); -- int cpu = smp_processor_id(); - unsigned long iv; - -- WARN_ON(cpu != data); -- - iv = __this_cpu_read(mce_next_interval); - - if (mce_available(this_cpu_ptr(&cpu_info))) { -@@ -1324,7 +1312,7 @@ - - done: - __this_cpu_write(mce_next_interval, iv); -- __restart_timer(t, iv); -+ return __restart_timer(timer, iv); - } - - /* -@@ -1332,7 +1320,7 @@ - */ - void mce_timer_kick(unsigned long interval) - { -- struct timer_list *t = this_cpu_ptr(&mce_timer); -+ struct hrtimer *t = this_cpu_ptr(&mce_timer); - unsigned long iv = __this_cpu_read(mce_next_interval); - - __restart_timer(t, interval); -@@ -1347,7 +1335,7 @@ - int cpu; - - for_each_online_cpu(cpu) -- del_timer_sync(&per_cpu(mce_timer, cpu)); -+ hrtimer_cancel(&per_cpu(mce_timer, cpu)); - } - - static void mce_do_trigger(struct work_struct *work) -@@ -1357,6 +1345,56 @@ - - static DECLARE_WORK(mce_trigger_work, mce_do_trigger); - -+static void __mce_notify_work(struct swork_event *event) -+{ -+ /* Not more than two messages every minute */ -+ static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2); -+ -+ /* wake processes polling /dev/mcelog */ -+ wake_up_interruptible(&mce_chrdev_wait); -+ -+ /* -+ * There is no risk of missing notifications because -+ * work_pending is always cleared before the function is -+ * executed. -+ */ -+ if (mce_helper[0] && !work_pending(&mce_trigger_work)) -+ schedule_work(&mce_trigger_work); -+ -+ if (__ratelimit(&ratelimit)) -+ pr_info(HW_ERR "Machine check events logged\n"); -+} -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+static bool notify_work_ready __read_mostly; -+static struct swork_event notify_work; -+ -+static int mce_notify_work_init(void) -+{ -+ int err; -+ -+ err = swork_get(); -+ if (err) -+ return err; -+ -+ INIT_SWORK(¬ify_work, __mce_notify_work); -+ notify_work_ready = true; -+ return 0; -+} -+ -+static void mce_notify_work(void) -+{ -+ if (notify_work_ready) -+ swork_queue(¬ify_work); -+} -+#else -+static void mce_notify_work(void) -+{ -+ __mce_notify_work(NULL); -+} -+static inline int mce_notify_work_init(void) { return 0; } -+#endif -+ - /* - * Notify the user(s) about new machine check events. - * Can be called from interrupt context, but not from machine check/NMI -@@ -1364,19 +1402,8 @@ - */ - int mce_notify_irq(void) - { -- /* Not more than two messages every minute */ -- static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2); -- - if (test_and_clear_bit(0, &mce_need_notify)) { -- /* wake processes polling /dev/mcelog */ -- wake_up_interruptible(&mce_chrdev_wait); -- -- if (mce_helper[0]) -- schedule_work(&mce_trigger_work); -- -- if (__ratelimit(&ratelimit)) -- pr_info(HW_ERR "Machine check events logged\n"); -- -+ mce_notify_work(); - return 1; - } - return 0; -@@ -1649,7 +1676,7 @@ - } - } - --static void mce_start_timer(unsigned int cpu, struct timer_list *t) -+static void mce_start_timer(unsigned int cpu, struct hrtimer *t) - { - unsigned long iv = check_interval * HZ; - -@@ -1658,16 +1685,17 @@ - - per_cpu(mce_next_interval, cpu) = iv; - -- t->expires = round_jiffies(jiffies + iv); -- add_timer_on(t, cpu); -+ hrtimer_start_range_ns(t, ns_to_ktime(jiffies_to_usecs(iv) * 1000ULL), -+ 0, HRTIMER_MODE_REL_PINNED); - } - - static void __mcheck_cpu_init_timer(void) - { -- struct timer_list *t = this_cpu_ptr(&mce_timer); -+ struct hrtimer *t = this_cpu_ptr(&mce_timer); - unsigned int cpu = smp_processor_id(); - -- setup_timer(t, mce_timer_fn, cpu); -+ hrtimer_init(t, CLOCK_MONOTONIC, HRTIMER_MODE_REL); -+ t->function = mce_timer_fn; - mce_start_timer(cpu, t); - } - -@@ -2345,6 +2373,8 @@ - if (!mce_available(raw_cpu_ptr(&cpu_info))) - return; - -+ hrtimer_cancel(this_cpu_ptr(&mce_timer)); -+ - if (!(action & CPU_TASKS_FROZEN)) - cmci_clear(); - for (i = 0; i < mca_cfg.banks; i++) { -@@ -2371,6 +2401,7 @@ - if (b->init) - wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl); - } -+ __mcheck_cpu_init_timer(); - } - - /* Get notified when a cpu comes on/off. Be hotplug friendly. */ -@@ -2378,7 +2409,6 @@ - mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) - { - unsigned int cpu = (unsigned long)hcpu; -- struct timer_list *t = &per_cpu(mce_timer, cpu); - - switch (action & ~CPU_TASKS_FROZEN) { - case CPU_ONLINE: -@@ -2398,11 +2428,9 @@ - break; - case CPU_DOWN_PREPARE: - smp_call_function_single(cpu, mce_disable_cpu, &action, 1); -- del_timer_sync(t); - break; - case CPU_DOWN_FAILED: - smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); -- mce_start_timer(cpu, t); - break; - } - -@@ -2441,6 +2469,10 @@ - goto err_out; - } - -+ err = mce_notify_work_init(); -+ if (err) -+ goto err_out; -+ - if (!zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL)) { - err = -ENOMEM; - goto err_out; -diff -Nur linux-4.1.26.orig/arch/x86/kernel/dumpstack_32.c linux-4.1.26/arch/x86/kernel/dumpstack_32.c ---- linux-4.1.26.orig/arch/x86/kernel/dumpstack_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/dumpstack_32.c 2016-06-19 15:30:58.615294573 +0200 -@@ -42,7 +42,7 @@ - unsigned long *stack, unsigned long bp, - const struct stacktrace_ops *ops, void *data) - { -- const unsigned cpu = get_cpu(); -+ const unsigned cpu = get_cpu_light(); - int graph = 0; - u32 *prev_esp; - -@@ -86,7 +86,7 @@ - break; - touch_nmi_watchdog(); - } -- put_cpu(); -+ put_cpu_light(); - } - EXPORT_SYMBOL(dump_trace); - -diff -Nur linux-4.1.26.orig/arch/x86/kernel/dumpstack_64.c linux-4.1.26/arch/x86/kernel/dumpstack_64.c ---- linux-4.1.26.orig/arch/x86/kernel/dumpstack_64.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/dumpstack_64.c 2016-06-19 15:30:58.615294573 +0200 -@@ -152,7 +152,7 @@ - unsigned long *stack, unsigned long bp, - const struct stacktrace_ops *ops, void *data) - { -- const unsigned cpu = get_cpu(); -+ const unsigned cpu = get_cpu_light(); - struct thread_info *tinfo; - unsigned long *irq_stack = (unsigned long *)per_cpu(irq_stack_ptr, cpu); - unsigned long dummy; -@@ -241,7 +241,7 @@ - * This handles the process stack: - */ - bp = ops->walk_stack(tinfo, stack, bp, ops, data, NULL, &graph); -- put_cpu(); -+ put_cpu_light(); - } - EXPORT_SYMBOL(dump_trace); - -@@ -255,7 +255,7 @@ - int cpu; - int i; - -- preempt_disable(); -+ migrate_disable(); - cpu = smp_processor_id(); - - irq_stack_end = (unsigned long *)(per_cpu(irq_stack_ptr, cpu)); -@@ -291,7 +291,7 @@ - pr_cont(" %016lx", *stack++); - touch_nmi_watchdog(); - } -- preempt_enable(); -+ migrate_enable(); - - pr_cont("\n"); - show_trace_log_lvl(task, regs, sp, bp, log_lvl); -diff -Nur linux-4.1.26.orig/arch/x86/kernel/entry_32.S linux-4.1.26/arch/x86/kernel/entry_32.S ---- linux-4.1.26.orig/arch/x86/kernel/entry_32.S 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/entry_32.S 2016-06-19 15:30:58.615294573 +0200 -@@ -359,8 +359,24 @@ - ENTRY(resume_kernel) - DISABLE_INTERRUPTS(CLBR_ANY) - need_resched: -+ # preempt count == 0 + NEED_RS set? - cmpl $0,PER_CPU_VAR(__preempt_count) -+#ifndef CONFIG_PREEMPT_LAZY - jnz restore_all -+#else -+ jz test_int_off -+ -+ # atleast preempt count == 0 ? -+ cmpl $_PREEMPT_ENABLED,PER_CPU_VAR(__preempt_count) -+ jne restore_all -+ -+ cmpl $0,TI_preempt_lazy_count(%ebp) # non-zero preempt_lazy_count ? -+ jnz restore_all -+ -+ testl $_TIF_NEED_RESCHED_LAZY, TI_flags(%ebp) -+ jz restore_all -+test_int_off: -+#endif - testl $X86_EFLAGS_IF,PT_EFLAGS(%esp) # interrupts off (exception path) ? - jz restore_all - call preempt_schedule_irq -@@ -594,7 +610,7 @@ - ALIGN - RING0_PTREGS_FRAME # can't unwind into user space anyway - work_pending: -- testb $_TIF_NEED_RESCHED, %cl -+ testl $_TIF_NEED_RESCHED_MASK, %ecx - jz work_notifysig - work_resched: - call schedule -@@ -607,7 +623,7 @@ - andl $_TIF_WORK_MASK, %ecx # is there any work to be done other - # than syscall tracing? - jz restore_all -- testb $_TIF_NEED_RESCHED, %cl -+ testl $_TIF_NEED_RESCHED_MASK, %ecx - jnz work_resched - - work_notifysig: # deal with pending signals and -diff -Nur linux-4.1.26.orig/arch/x86/kernel/entry_64.S linux-4.1.26/arch/x86/kernel/entry_64.S ---- linux-4.1.26.orig/arch/x86/kernel/entry_64.S 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/entry_64.S 2016-06-19 15:30:58.615294573 +0200 -@@ -370,8 +370,8 @@ - /* First do a reschedule test. */ - /* edx: work, edi: workmask */ - int_careful: -- bt $TIF_NEED_RESCHED,%edx -- jnc int_very_careful -+ testl $_TIF_NEED_RESCHED_MASK,%edx -+ jz int_very_careful - TRACE_IRQS_ON - ENABLE_INTERRUPTS(CLBR_NONE) - pushq_cfi %rdi -@@ -776,7 +776,23 @@ - bt $9,EFLAGS(%rsp) /* interrupts were off? */ - jnc 1f - 0: cmpl $0,PER_CPU_VAR(__preempt_count) -+#ifndef CONFIG_PREEMPT_LAZY - jnz 1f -+#else -+ jz do_preempt_schedule_irq -+ -+ # atleast preempt count == 0 ? -+ cmpl $_PREEMPT_ENABLED,PER_CPU_VAR(__preempt_count) -+ jnz 1f -+ -+ GET_THREAD_INFO(%rcx) -+ cmpl $0, TI_preempt_lazy_count(%rcx) -+ jnz 1f -+ -+ bt $TIF_NEED_RESCHED_LAZY,TI_flags(%rcx) -+ jnc 1f -+do_preempt_schedule_irq: -+#endif - call preempt_schedule_irq - jmp 0b - 1: -@@ -844,8 +860,8 @@ - /* edi: workmask, edx: work */ - retint_careful: - CFI_RESTORE_STATE -- bt $TIF_NEED_RESCHED,%edx -- jnc retint_signal -+ testl $_TIF_NEED_RESCHED_MASK,%edx -+ jz retint_signal - TRACE_IRQS_ON - ENABLE_INTERRUPTS(CLBR_NONE) - pushq_cfi %rdi -@@ -1118,6 +1134,7 @@ - jmp 2b - .previous - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* Call softirq on interrupt stack. Interrupts are off. */ - ENTRY(do_softirq_own_stack) - CFI_STARTPROC -@@ -1137,6 +1154,7 @@ - ret - CFI_ENDPROC - END(do_softirq_own_stack) -+#endif - - #ifdef CONFIG_XEN - idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 -diff -Nur linux-4.1.26.orig/arch/x86/kernel/irq_32.c linux-4.1.26/arch/x86/kernel/irq_32.c ---- linux-4.1.26.orig/arch/x86/kernel/irq_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/irq_32.c 2016-06-19 15:30:58.619294727 +0200 -@@ -135,6 +135,7 @@ - cpu, per_cpu(hardirq_stack, cpu), per_cpu(softirq_stack, cpu)); - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - void do_softirq_own_stack(void) - { - struct thread_info *curstk; -@@ -153,6 +154,7 @@ - - call_on_stack(__do_softirq, isp); - } -+#endif - - bool handle_irq(unsigned irq, struct pt_regs *regs) - { -diff -Nur linux-4.1.26.orig/arch/x86/kernel/process_32.c linux-4.1.26/arch/x86/kernel/process_32.c ---- linux-4.1.26.orig/arch/x86/kernel/process_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/process_32.c 2016-06-19 15:30:58.619294727 +0200 -@@ -35,6 +35,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -210,6 +211,35 @@ - } - EXPORT_SYMBOL_GPL(start_thread); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) -+{ -+ int i; -+ -+ /* -+ * Clear @prev's kmap_atomic mappings -+ */ -+ for (i = 0; i < prev_p->kmap_idx; i++) { -+ int idx = i + KM_TYPE_NR * smp_processor_id(); -+ pte_t *ptep = kmap_pte - idx; -+ -+ kpte_clear_flush(ptep, __fix_to_virt(FIX_KMAP_BEGIN + idx)); -+ } -+ /* -+ * Restore @next_p's kmap_atomic mappings -+ */ -+ for (i = 0; i < next_p->kmap_idx; i++) { -+ int idx = i + KM_TYPE_NR * smp_processor_id(); -+ -+ if (!pte_none(next_p->kmap_pte[i])) -+ set_pte(kmap_pte - idx, next_p->kmap_pte[i]); -+ } -+} -+#else -+static inline void -+switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) { } -+#endif -+ - - /* - * switch_to(x,y) should switch tasks from x to y. -@@ -292,6 +322,8 @@ - task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT)) - __switch_to_xtra(prev_p, next_p, tss); - -+ switch_kmaps(prev_p, next_p); -+ - /* - * Leave lazy mode, flushing any hypercalls made here. - * This must be done before restoring TLS segments so -diff -Nur linux-4.1.26.orig/arch/x86/kernel/signal.c linux-4.1.26/arch/x86/kernel/signal.c ---- linux-4.1.26.orig/arch/x86/kernel/signal.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kernel/signal.c 2016-06-19 15:30:58.619294727 +0200 -@@ -726,6 +726,14 @@ - { - user_exit(); - -+#ifdef ARCH_RT_DELAYS_SIGNAL_SEND -+ if (unlikely(current->forced_info.si_signo)) { -+ struct task_struct *t = current; -+ force_sig_info(t->forced_info.si_signo, &t->forced_info, t); -+ t->forced_info.si_signo = 0; -+ } -+#endif -+ - if (thread_info_flags & _TIF_UPROBE) - uprobe_notify_resume(regs); - -diff -Nur linux-4.1.26.orig/arch/x86/kvm/lapic.c linux-4.1.26/arch/x86/kvm/lapic.c ---- linux-4.1.26.orig/arch/x86/kvm/lapic.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kvm/lapic.c 2016-06-19 15:30:58.619294727 +0200 -@@ -1106,7 +1106,7 @@ - static void apic_timer_expired(struct kvm_lapic *apic) - { - struct kvm_vcpu *vcpu = apic->vcpu; -- wait_queue_head_t *q = &vcpu->wq; -+ struct swait_head *q = &vcpu->wq; - struct kvm_timer *ktimer = &apic->lapic_timer; - - if (atomic_read(&apic->lapic_timer.pending)) -@@ -1115,8 +1115,8 @@ - atomic_inc(&apic->lapic_timer.pending); - kvm_set_pending_timer(vcpu); - -- if (waitqueue_active(q)) -- wake_up_interruptible(q); -+ if (swaitqueue_active(q)) -+ swait_wake_interruptible(q); - - if (apic_lvtt_tscdeadline(apic)) - ktimer->expired_tscdeadline = ktimer->tscdeadline; -@@ -1169,8 +1169,36 @@ - __delay(tsc_deadline - guest_tsc); - } - -+static enum hrtimer_restart apic_timer_fn(struct hrtimer *data); -+ -+static void __apic_timer_expired(struct hrtimer *data) -+{ -+ int ret, i = 0; -+ enum hrtimer_restart r; -+ struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer); -+ -+ r = apic_timer_fn(data); -+ -+ if (r == HRTIMER_RESTART) { -+ do { -+ ret = hrtimer_start_expires(data, HRTIMER_MODE_ABS); -+ if (ret == -ETIME) -+ hrtimer_add_expires_ns(&ktimer->timer, -+ ktimer->period); -+ i++; -+ } while (ret == -ETIME && i < 10); -+ -+ if (ret == -ETIME) { -+ printk_once(KERN_ERR "%s: failed to reprogram timer\n", -+ __func__); -+ WARN_ON_ONCE(1); -+ } -+ } -+} -+ - static void start_apic_timer(struct kvm_lapic *apic) - { -+ int ret; - ktime_t now; - - atomic_set(&apic->lapic_timer.pending, 0); -@@ -1201,9 +1229,11 @@ - } - } - -- hrtimer_start(&apic->lapic_timer.timer, -+ ret = hrtimer_start(&apic->lapic_timer.timer, - ktime_add_ns(now, apic->lapic_timer.period), - HRTIMER_MODE_ABS); -+ if (ret == -ETIME) -+ __apic_timer_expired(&apic->lapic_timer.timer); - - apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016" - PRIx64 ", " -@@ -1235,8 +1265,10 @@ - do_div(ns, this_tsc_khz); - expire = ktime_add_ns(now, ns); - expire = ktime_sub_ns(expire, lapic_timer_advance_ns); -- hrtimer_start(&apic->lapic_timer.timer, -+ ret = hrtimer_start(&apic->lapic_timer.timer, - expire, HRTIMER_MODE_ABS); -+ if (ret == -ETIME) -+ __apic_timer_expired(&apic->lapic_timer.timer); - } else - apic_timer_expired(apic); - -@@ -1709,6 +1741,7 @@ - hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC, - HRTIMER_MODE_ABS); - apic->lapic_timer.timer.function = apic_timer_fn; -+ apic->lapic_timer.timer.irqsafe = 1; - - /* - * APIC is created enabled. This will prevent kvm_lapic_set_base from -@@ -1836,7 +1869,8 @@ - - timer = &vcpu->arch.apic->lapic_timer.timer; - if (hrtimer_cancel(timer)) -- hrtimer_start_expires(timer, HRTIMER_MODE_ABS); -+ if (hrtimer_start_expires(timer, HRTIMER_MODE_ABS) == -ETIME) -+ __apic_timer_expired(timer); - } - - /* -diff -Nur linux-4.1.26.orig/arch/x86/kvm/x86.c linux-4.1.26/arch/x86/kvm/x86.c ---- linux-4.1.26.orig/arch/x86/kvm/x86.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/kvm/x86.c 2016-06-19 15:30:58.619294727 +0200 -@@ -5810,6 +5810,13 @@ - goto out; - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { -+ printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n"); -+ return -EOPNOTSUPP; -+ } -+#endif -+ - r = kvm_mmu_module_init(); - if (r) - goto out_free_percpu; -diff -Nur linux-4.1.26.orig/arch/x86/lib/usercopy_32.c linux-4.1.26/arch/x86/lib/usercopy_32.c ---- linux-4.1.26.orig/arch/x86/lib/usercopy_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/lib/usercopy_32.c 2016-06-19 15:30:58.619294727 +0200 -@@ -647,7 +647,8 @@ - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from kernel space to user space. - * -@@ -668,7 +669,8 @@ - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Copy data from user space to kernel space. - * -diff -Nur linux-4.1.26.orig/arch/x86/mm/fault.c linux-4.1.26/arch/x86/mm/fault.c ---- linux-4.1.26.orig/arch/x86/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/mm/fault.c 2016-06-19 15:30:58.619294727 +0200 -@@ -13,6 +13,7 @@ - #include /* hstate_index_to_shift */ - #include /* prefetchw */ - #include /* exception_enter(), ... */ -+#include /* faulthandler_disabled() */ - - #include /* dotraplinkage, ... */ - #include /* pgd_*(), ... */ -@@ -1133,9 +1134,9 @@ - - /* - * If we're in an interrupt, have no user context or are running -- * in an atomic region then we must not take the fault: -+ * in a region with pagefaults disabled then we must not take the fault - */ -- if (unlikely(in_atomic() || !mm)) { -+ if (unlikely(faulthandler_disabled() || !mm)) { - bad_area_nosemaphore(regs, error_code, address); - return; - } -diff -Nur linux-4.1.26.orig/arch/x86/mm/highmem_32.c linux-4.1.26/arch/x86/mm/highmem_32.c ---- linux-4.1.26.orig/arch/x86/mm/highmem_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/mm/highmem_32.c 2016-06-19 15:30:58.619294727 +0200 -@@ -32,10 +32,11 @@ - */ - void *kmap_atomic_prot(struct page *page, pgprot_t prot) - { -+ pte_t pte = mk_pte(page, prot); - unsigned long vaddr; - int idx, type; - -- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ -+ preempt_disable_nort(); - pagefault_disable(); - - if (!PageHighMem(page)) -@@ -45,7 +46,10 @@ - idx = type + KM_TYPE_NR*smp_processor_id(); - vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); - BUG_ON(!pte_none(*(kmap_pte-idx))); -- set_pte(kmap_pte-idx, mk_pte(page, prot)); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = pte; -+#endif -+ set_pte(kmap_pte-idx, pte); - arch_flush_lazy_mmu_mode(); - - return (void *)vaddr; -@@ -88,6 +92,9 @@ - * is a bad idea also, in case the page changes cacheability - * attributes or becomes a protected page in a hypervisor. - */ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = __pte(0); -+#endif - kpte_clear_flush(kmap_pte-idx, vaddr); - kmap_atomic_idx_pop(); - arch_flush_lazy_mmu_mode(); -@@ -100,6 +107,7 @@ - #endif - - pagefault_enable(); -+ preempt_enable_nort(); - } - EXPORT_SYMBOL(__kunmap_atomic); - -diff -Nur linux-4.1.26.orig/arch/x86/mm/iomap_32.c linux-4.1.26/arch/x86/mm/iomap_32.c ---- linux-4.1.26.orig/arch/x86/mm/iomap_32.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/mm/iomap_32.c 2016-06-19 15:30:58.619294727 +0200 -@@ -56,15 +56,22 @@ - - void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) - { -+ pte_t pte = pfn_pte(pfn, prot); - unsigned long vaddr; - int idx, type; - -+ preempt_disable(); - pagefault_disable(); - - type = kmap_atomic_idx_push(); - idx = type + KM_TYPE_NR * smp_processor_id(); - vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); -- set_pte(kmap_pte - idx, pfn_pte(pfn, prot)); -+ WARN_ON(!pte_none(*(kmap_pte - idx))); -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = pte; -+#endif -+ set_pte(kmap_pte - idx, pte); - arch_flush_lazy_mmu_mode(); - - return (void *)vaddr; -@@ -112,10 +119,14 @@ - * is a bad idea also, in case the page changes cacheability - * attributes or becomes a protected page in a hypervisor. - */ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ current->kmap_pte[type] = __pte(0); -+#endif - kpte_clear_flush(kmap_pte-idx, vaddr); - kmap_atomic_idx_pop(); - } - - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL_GPL(iounmap_atomic); -diff -Nur linux-4.1.26.orig/arch/x86/platform/uv/tlb_uv.c linux-4.1.26/arch/x86/platform/uv/tlb_uv.c ---- linux-4.1.26.orig/arch/x86/platform/uv/tlb_uv.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/platform/uv/tlb_uv.c 2016-06-19 15:30:58.619294727 +0200 -@@ -714,9 +714,9 @@ - - quiesce_local_uvhub(hmaster); - -- spin_lock(&hmaster->queue_lock); -+ raw_spin_lock(&hmaster->queue_lock); - reset_with_ipi(&bau_desc->distribution, bcp); -- spin_unlock(&hmaster->queue_lock); -+ raw_spin_unlock(&hmaster->queue_lock); - - end_uvhub_quiesce(hmaster); - -@@ -736,9 +736,9 @@ - - quiesce_local_uvhub(hmaster); - -- spin_lock(&hmaster->queue_lock); -+ raw_spin_lock(&hmaster->queue_lock); - reset_with_ipi(&bau_desc->distribution, bcp); -- spin_unlock(&hmaster->queue_lock); -+ raw_spin_unlock(&hmaster->queue_lock); - - end_uvhub_quiesce(hmaster); - -@@ -759,7 +759,7 @@ - cycles_t tm1; - - hmaster = bcp->uvhub_master; -- spin_lock(&hmaster->disable_lock); -+ raw_spin_lock(&hmaster->disable_lock); - if (!bcp->baudisabled) { - stat->s_bau_disabled++; - tm1 = get_cycles(); -@@ -772,7 +772,7 @@ - } - } - } -- spin_unlock(&hmaster->disable_lock); -+ raw_spin_unlock(&hmaster->disable_lock); - } - - static void count_max_concurr(int stat, struct bau_control *bcp, -@@ -835,7 +835,7 @@ - */ - static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat) - { -- spinlock_t *lock = &hmaster->uvhub_lock; -+ raw_spinlock_t *lock = &hmaster->uvhub_lock; - atomic_t *v; - - v = &hmaster->active_descriptor_count; -@@ -968,7 +968,7 @@ - struct bau_control *hmaster; - - hmaster = bcp->uvhub_master; -- spin_lock(&hmaster->disable_lock); -+ raw_spin_lock(&hmaster->disable_lock); - if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) { - stat->s_bau_reenabled++; - for_each_present_cpu(tcpu) { -@@ -980,10 +980,10 @@ - tbcp->period_giveups = 0; - } - } -- spin_unlock(&hmaster->disable_lock); -+ raw_spin_unlock(&hmaster->disable_lock); - return 0; - } -- spin_unlock(&hmaster->disable_lock); -+ raw_spin_unlock(&hmaster->disable_lock); - return -1; - } - -@@ -1901,9 +1901,9 @@ - bcp->cong_reps = congested_reps; - bcp->disabled_period = sec_2_cycles(disabled_period); - bcp->giveup_limit = giveup_limit; -- spin_lock_init(&bcp->queue_lock); -- spin_lock_init(&bcp->uvhub_lock); -- spin_lock_init(&bcp->disable_lock); -+ raw_spin_lock_init(&bcp->queue_lock); -+ raw_spin_lock_init(&bcp->uvhub_lock); -+ raw_spin_lock_init(&bcp->disable_lock); - } - } - -diff -Nur linux-4.1.26.orig/arch/x86/platform/uv/uv_time.c linux-4.1.26/arch/x86/platform/uv/uv_time.c ---- linux-4.1.26.orig/arch/x86/platform/uv/uv_time.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/x86/platform/uv/uv_time.c 2016-06-19 15:30:58.623294881 +0200 -@@ -58,7 +58,7 @@ - - /* There is one of these allocated per node */ - struct uv_rtc_timer_head { -- spinlock_t lock; -+ raw_spinlock_t lock; - /* next cpu waiting for timer, local node relative: */ - int next_cpu; - /* number of cpus on this node: */ -@@ -178,7 +178,7 @@ - uv_rtc_deallocate_timers(); - return -ENOMEM; - } -- spin_lock_init(&head->lock); -+ raw_spin_lock_init(&head->lock); - head->ncpus = uv_blade_nr_possible_cpus(bid); - head->next_cpu = -1; - blade_info[bid] = head; -@@ -232,7 +232,7 @@ - unsigned long flags; - int next_cpu; - -- spin_lock_irqsave(&head->lock, flags); -+ raw_spin_lock_irqsave(&head->lock, flags); - - next_cpu = head->next_cpu; - *t = expires; -@@ -244,12 +244,12 @@ - if (uv_setup_intr(cpu, expires)) { - *t = ULLONG_MAX; - uv_rtc_find_next_timer(head, pnode); -- spin_unlock_irqrestore(&head->lock, flags); -+ raw_spin_unlock_irqrestore(&head->lock, flags); - return -ETIME; - } - } - -- spin_unlock_irqrestore(&head->lock, flags); -+ raw_spin_unlock_irqrestore(&head->lock, flags); - return 0; - } - -@@ -268,7 +268,7 @@ - unsigned long flags; - int rc = 0; - -- spin_lock_irqsave(&head->lock, flags); -+ raw_spin_lock_irqsave(&head->lock, flags); - - if ((head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) || force) - rc = 1; -@@ -280,7 +280,7 @@ - uv_rtc_find_next_timer(head, pnode); - } - -- spin_unlock_irqrestore(&head->lock, flags); -+ raw_spin_unlock_irqrestore(&head->lock, flags); - - return rc; - } -@@ -300,13 +300,18 @@ - static cycle_t uv_read_rtc(struct clocksource *cs) - { - unsigned long offset; -+ cycle_t cycles; - -+ preempt_disable(); - if (uv_get_min_hub_revision_id() == 1) - offset = 0; - else - offset = (uv_blade_processor_id() * L1_CACHE_BYTES) % PAGE_SIZE; - -- return (cycle_t)uv_read_local_mmr(UVH_RTC | offset); -+ cycles = (cycle_t)uv_read_local_mmr(UVH_RTC | offset); -+ preempt_enable(); -+ -+ return cycles; - } - - /* -diff -Nur linux-4.1.26.orig/arch/xtensa/mm/fault.c linux-4.1.26/arch/xtensa/mm/fault.c ---- linux-4.1.26.orig/arch/xtensa/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/xtensa/mm/fault.c 2016-06-19 15:30:58.623294881 +0200 -@@ -15,10 +15,10 @@ - #include - #include - #include -+#include - #include - #include - #include --#include - #include - - DEFINE_PER_CPU(unsigned long, asid_cache) = ASID_USER_FIRST; -@@ -57,7 +57,7 @@ - /* If we're in an interrupt or have no user - * context, we must not take the fault.. - */ -- if (in_atomic() || !mm) { -+ if (faulthandler_disabled() || !mm) { - bad_page_fault(regs, address, SIGSEGV); - return; - } -diff -Nur linux-4.1.26.orig/arch/xtensa/mm/highmem.c linux-4.1.26/arch/xtensa/mm/highmem.c ---- linux-4.1.26.orig/arch/xtensa/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/arch/xtensa/mm/highmem.c 2016-06-19 15:30:58.623294881 +0200 -@@ -42,6 +42,7 @@ - enum fixed_addresses idx; - unsigned long vaddr; - -+ preempt_disable(); - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); -@@ -79,6 +80,7 @@ - } - - pagefault_enable(); -+ preempt_enable(); - } - EXPORT_SYMBOL(__kunmap_atomic); - -diff -Nur linux-4.1.26.orig/block/blk-core.c linux-4.1.26/block/blk-core.c ---- linux-4.1.26.orig/block/blk-core.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-core.c 2016-06-19 15:30:58.623294881 +0200 -@@ -100,6 +100,9 @@ - - INIT_LIST_HEAD(&rq->queuelist); - INIT_LIST_HEAD(&rq->timeout_list); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ INIT_WORK(&rq->work, __blk_mq_complete_request_remote_work); -+#endif - rq->cpu = -1; - rq->q = q; - rq->__sector = (sector_t) -1; -@@ -194,7 +197,7 @@ - **/ - void blk_start_queue(struct request_queue *q) - { -- WARN_ON(!irqs_disabled()); -+ WARN_ON_NONRT(!irqs_disabled()); - - queue_flag_clear(QUEUE_FLAG_STOPPED, q); - __blk_run_queue(q); -@@ -661,7 +664,7 @@ - q->bypass_depth = 1; - __set_bit(QUEUE_FLAG_BYPASS, &q->queue_flags); - -- init_waitqueue_head(&q->mq_freeze_wq); -+ init_swait_head(&q->mq_freeze_wq); - - if (blkcg_init_queue(q)) - goto fail_bdi; -@@ -3077,7 +3080,7 @@ - blk_run_queue_async(q); - else - __blk_run_queue(q); -- spin_unlock(q->queue_lock); -+ spin_unlock_irq(q->queue_lock); - } - - static void flush_plug_callbacks(struct blk_plug *plug, bool from_schedule) -@@ -3125,7 +3128,6 @@ - void blk_flush_plug_list(struct blk_plug *plug, bool from_schedule) - { - struct request_queue *q; -- unsigned long flags; - struct request *rq; - LIST_HEAD(list); - unsigned int depth; -@@ -3145,11 +3147,6 @@ - q = NULL; - depth = 0; - -- /* -- * Save and disable interrupts here, to avoid doing it for every -- * queue lock we have to take. -- */ -- local_irq_save(flags); - while (!list_empty(&list)) { - rq = list_entry_rq(list.next); - list_del_init(&rq->queuelist); -@@ -3162,7 +3159,7 @@ - queue_unplugged(q, depth, from_schedule); - q = rq->q; - depth = 0; -- spin_lock(q->queue_lock); -+ spin_lock_irq(q->queue_lock); - } - - /* -@@ -3189,8 +3186,6 @@ - */ - if (q) - queue_unplugged(q, depth, from_schedule); -- -- local_irq_restore(flags); - } - - void blk_finish_plug(struct blk_plug *plug) -diff -Nur linux-4.1.26.orig/block/blk-ioc.c linux-4.1.26/block/blk-ioc.c ---- linux-4.1.26.orig/block/blk-ioc.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-ioc.c 2016-06-19 15:30:58.623294881 +0200 -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - - #include "blk.h" - -@@ -109,7 +110,7 @@ - spin_unlock(q->queue_lock); - } else { - spin_unlock_irqrestore(&ioc->lock, flags); -- cpu_relax(); -+ cpu_chill(); - spin_lock_irqsave_nested(&ioc->lock, flags, 1); - } - } -@@ -187,7 +188,7 @@ - spin_unlock(icq->q->queue_lock); - } else { - spin_unlock_irqrestore(&ioc->lock, flags); -- cpu_relax(); -+ cpu_chill(); - goto retry; - } - } -diff -Nur linux-4.1.26.orig/block/blk-iopoll.c linux-4.1.26/block/blk-iopoll.c ---- linux-4.1.26.orig/block/blk-iopoll.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-iopoll.c 2016-06-19 15:30:58.623294881 +0200 -@@ -35,6 +35,7 @@ - list_add_tail(&iop->list, this_cpu_ptr(&blk_cpu_iopoll)); - __raise_softirq_irqoff(BLOCK_IOPOLL_SOFTIRQ); - local_irq_restore(flags); -+ preempt_check_resched_rt(); - } - EXPORT_SYMBOL(blk_iopoll_sched); - -@@ -132,6 +133,7 @@ - __raise_softirq_irqoff(BLOCK_IOPOLL_SOFTIRQ); - - local_irq_enable(); -+ preempt_check_resched_rt(); - } - - /** -@@ -201,6 +203,7 @@ - this_cpu_ptr(&blk_cpu_iopoll)); - __raise_softirq_irqoff(BLOCK_IOPOLL_SOFTIRQ); - local_irq_enable(); -+ preempt_check_resched_rt(); - } - - return NOTIFY_OK; -diff -Nur linux-4.1.26.orig/block/blk-mq.c linux-4.1.26/block/blk-mq.c ---- linux-4.1.26.orig/block/blk-mq.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-mq.c 2016-06-19 15:30:58.623294881 +0200 -@@ -88,7 +88,7 @@ - if (!(gfp & __GFP_WAIT)) - return -EBUSY; - -- ret = wait_event_interruptible(q->mq_freeze_wq, -+ ret = swait_event_interruptible(q->mq_freeze_wq, - !q->mq_freeze_depth || blk_queue_dying(q)); - if (blk_queue_dying(q)) - return -ENODEV; -@@ -107,7 +107,7 @@ - struct request_queue *q = - container_of(ref, struct request_queue, mq_usage_counter); - -- wake_up_all(&q->mq_freeze_wq); -+ swait_wake_all(&q->mq_freeze_wq); - } - - void blk_mq_freeze_queue_start(struct request_queue *q) -@@ -127,7 +127,7 @@ - - static void blk_mq_freeze_queue_wait(struct request_queue *q) - { -- wait_event(q->mq_freeze_wq, percpu_ref_is_zero(&q->mq_usage_counter)); -+ swait_event(q->mq_freeze_wq, percpu_ref_is_zero(&q->mq_usage_counter)); - } - - /* -@@ -151,7 +151,7 @@ - spin_unlock_irq(q->queue_lock); - if (wake) { - percpu_ref_reinit(&q->mq_usage_counter); -- wake_up_all(&q->mq_freeze_wq); -+ swait_wake_all(&q->mq_freeze_wq); - } - } - EXPORT_SYMBOL_GPL(blk_mq_unfreeze_queue); -@@ -170,7 +170,7 @@ - * dying, we need to ensure that processes currently waiting on - * the queue are notified as well. - */ -- wake_up_all(&q->mq_freeze_wq); -+ swait_wake_all(&q->mq_freeze_wq); - } - - bool blk_mq_can_queue(struct blk_mq_hw_ctx *hctx) -@@ -217,6 +217,9 @@ - rq->resid_len = 0; - rq->sense = NULL; - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ INIT_WORK(&rq->work, __blk_mq_complete_request_remote_work); -+#endif - INIT_LIST_HEAD(&rq->timeout_list); - rq->timeout = 0; - -@@ -346,6 +349,17 @@ - } - EXPORT_SYMBOL(blk_mq_end_request); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ -+void __blk_mq_complete_request_remote_work(struct work_struct *work) -+{ -+ struct request *rq = container_of(work, struct request, work); -+ -+ rq->q->softirq_done_fn(rq); -+} -+ -+#else -+ - static void __blk_mq_complete_request_remote(void *data) - { - struct request *rq = data; -@@ -353,6 +367,8 @@ - rq->q->softirq_done_fn(rq); - } - -+#endif -+ - static void blk_mq_ipi_complete_request(struct request *rq) - { - struct blk_mq_ctx *ctx = rq->mq_ctx; -@@ -364,19 +380,23 @@ - return; - } - -- cpu = get_cpu(); -+ cpu = get_cpu_light(); - if (!test_bit(QUEUE_FLAG_SAME_FORCE, &rq->q->queue_flags)) - shared = cpus_share_cache(cpu, ctx->cpu); - - if (cpu != ctx->cpu && !shared && cpu_online(ctx->cpu)) { -+#ifdef CONFIG_PREEMPT_RT_FULL -+ schedule_work_on(ctx->cpu, &rq->work); -+#else - rq->csd.func = __blk_mq_complete_request_remote; - rq->csd.info = rq; - rq->csd.flags = 0; - smp_call_function_single_async(ctx->cpu, &rq->csd); -+#endif - } else { - rq->q->softirq_done_fn(rq); - } -- put_cpu(); -+ put_cpu_light(); - } - - void __blk_mq_complete_request(struct request *rq) -@@ -905,14 +925,14 @@ - return; - - if (!async) { -- int cpu = get_cpu(); -+ int cpu = get_cpu_light(); - if (cpumask_test_cpu(cpu, hctx->cpumask)) { - __blk_mq_run_hw_queue(hctx); -- put_cpu(); -+ put_cpu_light(); - return; - } - -- put_cpu(); -+ put_cpu_light(); - } - - kblockd_schedule_delayed_work_on(blk_mq_hctx_next_cpu(hctx), -@@ -1589,7 +1609,7 @@ - { - struct blk_mq_hw_ctx *hctx = data; - -- if (action == CPU_DEAD || action == CPU_DEAD_FROZEN) -+ if (action == CPU_POST_DEAD) - return blk_mq_hctx_cpu_offline(hctx, cpu); - - /* -diff -Nur linux-4.1.26.orig/block/blk-mq-cpu.c linux-4.1.26/block/blk-mq-cpu.c ---- linux-4.1.26.orig/block/blk-mq-cpu.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-mq-cpu.c 2016-06-19 15:30:58.623294881 +0200 -@@ -16,7 +16,7 @@ - #include "blk-mq.h" - - static LIST_HEAD(blk_mq_cpu_notify_list); --static DEFINE_RAW_SPINLOCK(blk_mq_cpu_notify_lock); -+static DEFINE_SPINLOCK(blk_mq_cpu_notify_lock); - - static int blk_mq_main_cpu_notify(struct notifier_block *self, - unsigned long action, void *hcpu) -@@ -25,7 +25,10 @@ - struct blk_mq_cpu_notifier *notify; - int ret = NOTIFY_OK; - -- raw_spin_lock(&blk_mq_cpu_notify_lock); -+ if (action != CPU_POST_DEAD) -+ return NOTIFY_OK; -+ -+ spin_lock(&blk_mq_cpu_notify_lock); - - list_for_each_entry(notify, &blk_mq_cpu_notify_list, list) { - ret = notify->notify(notify->data, action, cpu); -@@ -33,7 +36,7 @@ - break; - } - -- raw_spin_unlock(&blk_mq_cpu_notify_lock); -+ spin_unlock(&blk_mq_cpu_notify_lock); - return ret; - } - -@@ -41,16 +44,16 @@ - { - BUG_ON(!notifier->notify); - -- raw_spin_lock(&blk_mq_cpu_notify_lock); -+ spin_lock(&blk_mq_cpu_notify_lock); - list_add_tail(¬ifier->list, &blk_mq_cpu_notify_list); -- raw_spin_unlock(&blk_mq_cpu_notify_lock); -+ spin_unlock(&blk_mq_cpu_notify_lock); - } - - void blk_mq_unregister_cpu_notifier(struct blk_mq_cpu_notifier *notifier) - { -- raw_spin_lock(&blk_mq_cpu_notify_lock); -+ spin_lock(&blk_mq_cpu_notify_lock); - list_del(¬ifier->list); -- raw_spin_unlock(&blk_mq_cpu_notify_lock); -+ spin_unlock(&blk_mq_cpu_notify_lock); - } - - void blk_mq_init_cpu_notifier(struct blk_mq_cpu_notifier *notifier, -diff -Nur linux-4.1.26.orig/block/blk-mq.h linux-4.1.26/block/blk-mq.h ---- linux-4.1.26.orig/block/blk-mq.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-mq.h 2016-06-19 15:30:58.623294881 +0200 -@@ -76,7 +76,10 @@ - static inline struct blk_mq_ctx *__blk_mq_get_ctx(struct request_queue *q, - unsigned int cpu) - { -- return per_cpu_ptr(q->queue_ctx, cpu); -+ struct blk_mq_ctx *ctx; -+ -+ ctx = per_cpu_ptr(q->queue_ctx, cpu); -+ return ctx; - } - - /* -@@ -87,12 +90,12 @@ - */ - static inline struct blk_mq_ctx *blk_mq_get_ctx(struct request_queue *q) - { -- return __blk_mq_get_ctx(q, get_cpu()); -+ return __blk_mq_get_ctx(q, get_cpu_light()); - } - - static inline void blk_mq_put_ctx(struct blk_mq_ctx *ctx) - { -- put_cpu(); -+ put_cpu_light(); - } - - struct blk_mq_alloc_data { -diff -Nur linux-4.1.26.orig/block/blk-softirq.c linux-4.1.26/block/blk-softirq.c ---- linux-4.1.26.orig/block/blk-softirq.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/blk-softirq.c 2016-06-19 15:30:58.623294881 +0200 -@@ -51,6 +51,7 @@ - raise_softirq_irqoff(BLOCK_SOFTIRQ); - - local_irq_restore(flags); -+ preempt_check_resched_rt(); - } - - /* -@@ -93,6 +94,7 @@ - this_cpu_ptr(&blk_cpu_done)); - raise_softirq_irqoff(BLOCK_SOFTIRQ); - local_irq_enable(); -+ preempt_check_resched_rt(); - } - - return NOTIFY_OK; -@@ -150,6 +152,7 @@ - goto do_local; - - local_irq_restore(flags); -+ preempt_check_resched_rt(); - } - - /** -diff -Nur linux-4.1.26.orig/block/bounce.c linux-4.1.26/block/bounce.c ---- linux-4.1.26.orig/block/bounce.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/block/bounce.c 2016-06-19 15:30:58.623294881 +0200 -@@ -54,11 +54,11 @@ - unsigned long flags; - unsigned char *vto; - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - vto = kmap_atomic(to->bv_page); - memcpy(vto + to->bv_offset, vfrom, to->bv_len); - kunmap_atomic(vto); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - - #else /* CONFIG_HIGHMEM */ -diff -Nur linux-4.1.26.orig/crypto/algapi.c linux-4.1.26/crypto/algapi.c ---- linux-4.1.26.orig/crypto/algapi.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/crypto/algapi.c 2016-06-19 15:30:58.623294881 +0200 -@@ -695,13 +695,13 @@ - - int crypto_register_notifier(struct notifier_block *nb) - { -- return blocking_notifier_chain_register(&crypto_chain, nb); -+ return srcu_notifier_chain_register(&crypto_chain, nb); - } - EXPORT_SYMBOL_GPL(crypto_register_notifier); - - int crypto_unregister_notifier(struct notifier_block *nb) - { -- return blocking_notifier_chain_unregister(&crypto_chain, nb); -+ return srcu_notifier_chain_unregister(&crypto_chain, nb); - } - EXPORT_SYMBOL_GPL(crypto_unregister_notifier); - -diff -Nur linux-4.1.26.orig/crypto/api.c linux-4.1.26/crypto/api.c ---- linux-4.1.26.orig/crypto/api.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/crypto/api.c 2016-06-19 15:30:58.623294881 +0200 -@@ -31,7 +31,7 @@ - DECLARE_RWSEM(crypto_alg_sem); - EXPORT_SYMBOL_GPL(crypto_alg_sem); - --BLOCKING_NOTIFIER_HEAD(crypto_chain); -+SRCU_NOTIFIER_HEAD(crypto_chain); - EXPORT_SYMBOL_GPL(crypto_chain); - - static struct crypto_alg *crypto_larval_wait(struct crypto_alg *alg); -@@ -236,10 +236,10 @@ - { - int ok; - -- ok = blocking_notifier_call_chain(&crypto_chain, val, v); -+ ok = srcu_notifier_call_chain(&crypto_chain, val, v); - if (ok == NOTIFY_DONE) { - request_module("cryptomgr"); -- ok = blocking_notifier_call_chain(&crypto_chain, val, v); -+ ok = srcu_notifier_call_chain(&crypto_chain, val, v); - } - - return ok; -diff -Nur linux-4.1.26.orig/crypto/internal.h linux-4.1.26/crypto/internal.h ---- linux-4.1.26.orig/crypto/internal.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/crypto/internal.h 2016-06-19 15:30:58.623294881 +0200 -@@ -48,7 +48,7 @@ - - extern struct list_head crypto_alg_list; - extern struct rw_semaphore crypto_alg_sem; --extern struct blocking_notifier_head crypto_chain; -+extern struct srcu_notifier_head crypto_chain; - - #ifdef CONFIG_PROC_FS - void __init crypto_init_proc(void); -@@ -142,7 +142,7 @@ - - static inline void crypto_notify(unsigned long val, void *v) - { -- blocking_notifier_call_chain(&crypto_chain, val, v); -+ srcu_notifier_call_chain(&crypto_chain, val, v); - } - - #endif /* _CRYPTO_INTERNAL_H */ -diff -Nur linux-4.1.26.orig/Documentation/hwlat_detector.txt linux-4.1.26/Documentation/hwlat_detector.txt ---- linux-4.1.26.orig/Documentation/hwlat_detector.txt 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/Documentation/hwlat_detector.txt 2016-06-19 15:30:54.915151887 +0200 -@@ -0,0 +1,64 @@ -+Introduction: -+------------- -+ -+The module hwlat_detector is a special purpose kernel module that is used to -+detect large system latencies induced by the behavior of certain underlying -+hardware or firmware, independent of Linux itself. The code was developed -+originally to detect SMIs (System Management Interrupts) on x86 systems, -+however there is nothing x86 specific about this patchset. It was -+originally written for use by the "RT" patch since the Real Time -+kernel is highly latency sensitive. -+ -+SMIs are usually not serviced by the Linux kernel, which typically does not -+even know that they are occuring. SMIs are instead are set up by BIOS code -+and are serviced by BIOS code, usually for "critical" events such as -+management of thermal sensors and fans. Sometimes though, SMIs are used for -+other tasks and those tasks can spend an inordinate amount of time in the -+handler (sometimes measured in milliseconds). Obviously this is a problem if -+you are trying to keep event service latencies down in the microsecond range. -+ -+The hardware latency detector works by hogging all of the cpus for configurable -+amounts of time (by calling stop_machine()), polling the CPU Time Stamp Counter -+for some period, then looking for gaps in the TSC data. Any gap indicates a -+time when the polling was interrupted and since the machine is stopped and -+interrupts turned off the only thing that could do that would be an SMI. -+ -+Note that the SMI detector should *NEVER* be used in a production environment. -+It is intended to be run manually to determine if the hardware platform has a -+problem with long system firmware service routines. -+ -+Usage: -+------ -+ -+Loading the module hwlat_detector passing the parameter "enabled=1" (or by -+setting the "enable" entry in "hwlat_detector" debugfs toggled on) is the only -+step required to start the hwlat_detector. It is possible to redefine the -+threshold in microseconds (us) above which latency spikes will be taken -+into account (parameter "threshold="). -+ -+Example: -+ -+ # modprobe hwlat_detector enabled=1 threshold=100 -+ -+After the module is loaded, it creates a directory named "hwlat_detector" under -+the debugfs mountpoint, "/debug/hwlat_detector" for this text. It is necessary -+to have debugfs mounted, which might be on /sys/debug on your system. -+ -+The /debug/hwlat_detector interface contains the following files: -+ -+count - number of latency spikes observed since last reset -+enable - a global enable/disable toggle (0/1), resets count -+max - maximum hardware latency actually observed (usecs) -+sample - a pipe from which to read current raw sample data -+ in the format -+ (can be opened O_NONBLOCK for a single sample) -+threshold - minimum latency value to be considered (usecs) -+width - time period to sample with CPUs held (usecs) -+ must be less than the total window size (enforced) -+window - total period of sampling, width being inside (usecs) -+ -+By default we will set width to 500,000 and window to 1,000,000, meaning that -+we will sample every 1,000,000 usecs (1s) for 500,000 usecs (0.5s). If we -+observe any latencies that exceed the threshold (initially 100 usecs), -+then we write to a global sample ring buffer of 8K samples, which is -+consumed by reading from the "sample" (pipe) debugfs file interface. -diff -Nur linux-4.1.26.orig/Documentation/sysrq.txt linux-4.1.26/Documentation/sysrq.txt ---- linux-4.1.26.orig/Documentation/sysrq.txt 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/Documentation/sysrq.txt 2016-06-19 15:30:54.915151887 +0200 -@@ -59,10 +59,17 @@ - On other - If you know of the key combos for other architectures, please - let me know so I can add them to this section. - --On all - write a character to /proc/sysrq-trigger. e.g.: -- -+On all - write a character to /proc/sysrq-trigger, e.g.: - echo t > /proc/sysrq-trigger - -+On all - Enable network SysRq by writing a cookie to icmp_echo_sysrq, e.g. -+ echo 0x01020304 >/proc/sys/net/ipv4/icmp_echo_sysrq -+ Send an ICMP echo request with this pattern plus the particular -+ SysRq command key. Example: -+ # ping -c1 -s57 -p0102030468 -+ will trigger the SysRq-H (help) command. -+ -+ - * What are the 'command' keys? - ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - 'b' - Will immediately reboot the system without syncing or unmounting -diff -Nur linux-4.1.26.orig/Documentation/trace/histograms.txt linux-4.1.26/Documentation/trace/histograms.txt ---- linux-4.1.26.orig/Documentation/trace/histograms.txt 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/Documentation/trace/histograms.txt 2016-06-19 15:30:54.915151887 +0200 -@@ -0,0 +1,186 @@ -+ Using the Linux Kernel Latency Histograms -+ -+ -+This document gives a short explanation how to enable, configure and use -+latency histograms. Latency histograms are primarily relevant in the -+context of real-time enabled kernels (CONFIG_PREEMPT/CONFIG_PREEMPT_RT) -+and are used in the quality management of the Linux real-time -+capabilities. -+ -+ -+* Purpose of latency histograms -+ -+A latency histogram continuously accumulates the frequencies of latency -+data. There are two types of histograms -+- potential sources of latencies -+- effective latencies -+ -+ -+* Potential sources of latencies -+ -+Potential sources of latencies are code segments where interrupts, -+preemption or both are disabled (aka critical sections). To create -+histograms of potential sources of latency, the kernel stores the time -+stamp at the start of a critical section, determines the time elapsed -+when the end of the section is reached, and increments the frequency -+counter of that latency value - irrespective of whether any concurrently -+running process is affected by latency or not. -+- Configuration items (in the Kernel hacking/Tracers submenu) -+ CONFIG_INTERRUPT_OFF_LATENCY -+ CONFIG_PREEMPT_OFF_LATENCY -+ -+ -+* Effective latencies -+ -+Effective latencies are actually occuring during wakeup of a process. To -+determine effective latencies, the kernel stores the time stamp when a -+process is scheduled to be woken up, and determines the duration of the -+wakeup time shortly before control is passed over to this process. Note -+that the apparent latency in user space may be somewhat longer, since the -+process may be interrupted after control is passed over to it but before -+the execution in user space takes place. Simply measuring the interval -+between enqueuing and wakeup may also not appropriate in cases when a -+process is scheduled as a result of a timer expiration. The timer may have -+missed its deadline, e.g. due to disabled interrupts, but this latency -+would not be registered. Therefore, the offsets of missed timers are -+recorded in a separate histogram. If both wakeup latency and missed timer -+offsets are configured and enabled, a third histogram may be enabled that -+records the overall latency as a sum of the timer latency, if any, and the -+wakeup latency. This histogram is called "timerandwakeup". -+- Configuration items (in the Kernel hacking/Tracers submenu) -+ CONFIG_WAKEUP_LATENCY -+ CONFIG_MISSED_TIMER_OFSETS -+ -+ -+* Usage -+ -+The interface to the administration of the latency histograms is located -+in the debugfs file system. To mount it, either enter -+ -+mount -t sysfs nodev /sys -+mount -t debugfs nodev /sys/kernel/debug -+ -+from shell command line level, or add -+ -+nodev /sys sysfs defaults 0 0 -+nodev /sys/kernel/debug debugfs defaults 0 0 -+ -+to the file /etc/fstab. All latency histogram related files are then -+available in the directory /sys/kernel/debug/tracing/latency_hist. A -+particular histogram type is enabled by writing non-zero to the related -+variable in the /sys/kernel/debug/tracing/latency_hist/enable directory. -+Select "preemptirqsoff" for the histograms of potential sources of -+latencies and "wakeup" for histograms of effective latencies etc. The -+histogram data - one per CPU - are available in the files -+ -+/sys/kernel/debug/tracing/latency_hist/preemptoff/CPUx -+/sys/kernel/debug/tracing/latency_hist/irqsoff/CPUx -+/sys/kernel/debug/tracing/latency_hist/preemptirqsoff/CPUx -+/sys/kernel/debug/tracing/latency_hist/wakeup/CPUx -+/sys/kernel/debug/tracing/latency_hist/wakeup/sharedprio/CPUx -+/sys/kernel/debug/tracing/latency_hist/missed_timer_offsets/CPUx -+/sys/kernel/debug/tracing/latency_hist/timerandwakeup/CPUx -+ -+The histograms are reset by writing non-zero to the file "reset" in a -+particular latency directory. To reset all latency data, use -+ -+#!/bin/sh -+ -+TRACINGDIR=/sys/kernel/debug/tracing -+HISTDIR=$TRACINGDIR/latency_hist -+ -+if test -d $HISTDIR -+then -+ cd $HISTDIR -+ for i in `find . | grep /reset$` -+ do -+ echo 1 >$i -+ done -+fi -+ -+ -+* Data format -+ -+Latency data are stored with a resolution of one microsecond. The -+maximum latency is 10,240 microseconds. The data are only valid, if the -+overflow register is empty. Every output line contains the latency in -+microseconds in the first row and the number of samples in the second -+row. To display only lines with a positive latency count, use, for -+example, -+ -+grep -v " 0$" /sys/kernel/debug/tracing/latency_hist/preemptoff/CPU0 -+ -+#Minimum latency: 0 microseconds. -+#Average latency: 0 microseconds. -+#Maximum latency: 25 microseconds. -+#Total samples: 3104770694 -+#There are 0 samples greater or equal than 10240 microseconds -+#usecs samples -+ 0 2984486876 -+ 1 49843506 -+ 2 58219047 -+ 3 5348126 -+ 4 2187960 -+ 5 3388262 -+ 6 959289 -+ 7 208294 -+ 8 40420 -+ 9 4485 -+ 10 14918 -+ 11 18340 -+ 12 25052 -+ 13 19455 -+ 14 5602 -+ 15 969 -+ 16 47 -+ 17 18 -+ 18 14 -+ 19 1 -+ 20 3 -+ 21 2 -+ 22 5 -+ 23 2 -+ 25 1 -+ -+ -+* Wakeup latency of a selected process -+ -+To only collect wakeup latency data of a particular process, write the -+PID of the requested process to -+ -+/sys/kernel/debug/tracing/latency_hist/wakeup/pid -+ -+PIDs are not considered, if this variable is set to 0. -+ -+ -+* Details of the process with the highest wakeup latency so far -+ -+Selected data of the process that suffered from the highest wakeup -+latency that occurred in a particular CPU are available in the file -+ -+/sys/kernel/debug/tracing/latency_hist/wakeup/max_latency-CPUx. -+ -+In addition, other relevant system data at the time when the -+latency occurred are given. -+ -+The format of the data is (all in one line): -+ () \ -+<- -+ -+The value of is only relevant in the combined timer -+and wakeup latency recording. In the wakeup recording, it is -+always 0, in the missed_timer_offsets recording, it is the same -+as . -+ -+When retrospectively searching for the origin of a latency and -+tracing was not enabled, it may be helpful to know the name and -+some basic data of the task that (finally) was switching to the -+late real-tlme task. In addition to the victim's data, also the -+data of the possible culprit are therefore displayed after the -+"<-" symbol. -+ -+Finally, the timestamp of the time when the latency occurred -+in . after the most recent system boot -+is provided. -+ -+These data are also reset when the wakeup histogram is reset. -diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/acglobal.h linux-4.1.26/drivers/acpi/acpica/acglobal.h ---- linux-4.1.26.orig/drivers/acpi/acpica/acglobal.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/acpi/acpica/acglobal.h 2016-06-19 15:30:58.627295036 +0200 -@@ -112,7 +112,7 @@ - * interrupt level - */ - ACPI_GLOBAL(acpi_spinlock, acpi_gbl_gpe_lock); /* For GPE data structs and registers */ --ACPI_GLOBAL(acpi_spinlock, acpi_gbl_hardware_lock); /* For ACPI H/W except GPE registers */ -+ACPI_GLOBAL(acpi_raw_spinlock, acpi_gbl_hardware_lock); /* For ACPI H/W except GPE registers */ - ACPI_GLOBAL(acpi_spinlock, acpi_gbl_reference_count_lock); - - /* Mutex for _OSI support */ -diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/hwregs.c linux-4.1.26/drivers/acpi/acpica/hwregs.c ---- linux-4.1.26.orig/drivers/acpi/acpica/hwregs.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/acpi/acpica/hwregs.c 2016-06-19 15:30:58.627295036 +0200 -@@ -269,14 +269,14 @@ - ACPI_BITMASK_ALL_FIXED_STATUS, - ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address))); - -- lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock); -+ raw_spin_lock_irqsave(acpi_gbl_hardware_lock, lock_flags); - - /* Clear the fixed events in PM1 A/B */ - - status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS, - ACPI_BITMASK_ALL_FIXED_STATUS); - -- acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags); -+ raw_spin_unlock_irqrestore(acpi_gbl_hardware_lock, lock_flags); - - if (ACPI_FAILURE(status)) { - goto exit; -diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/hwxface.c linux-4.1.26/drivers/acpi/acpica/hwxface.c ---- linux-4.1.26.orig/drivers/acpi/acpica/hwxface.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/acpi/acpica/hwxface.c 2016-06-19 15:30:58.627295036 +0200 -@@ -374,7 +374,7 @@ - return_ACPI_STATUS(AE_BAD_PARAMETER); - } - -- lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock); -+ raw_spin_lock_irqsave(acpi_gbl_hardware_lock, lock_flags); - - /* - * At this point, we know that the parent register is one of the -@@ -435,7 +435,7 @@ - - unlock_and_exit: - -- acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags); -+ raw_spin_unlock_irqrestore(acpi_gbl_hardware_lock, lock_flags); - return_ACPI_STATUS(status); - } - -diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/utmutex.c linux-4.1.26/drivers/acpi/acpica/utmutex.c ---- linux-4.1.26.orig/drivers/acpi/acpica/utmutex.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/acpi/acpica/utmutex.c 2016-06-19 15:30:58.627295036 +0200 -@@ -88,7 +88,7 @@ - return_ACPI_STATUS (status); - } - -- status = acpi_os_create_lock (&acpi_gbl_hardware_lock); -+ status = acpi_os_create_raw_lock (&acpi_gbl_hardware_lock); - if (ACPI_FAILURE (status)) { - return_ACPI_STATUS (status); - } -@@ -141,7 +141,7 @@ - /* Delete the spinlocks */ - - acpi_os_delete_lock(acpi_gbl_gpe_lock); -- acpi_os_delete_lock(acpi_gbl_hardware_lock); -+ acpi_os_delete_raw_lock(acpi_gbl_hardware_lock); - acpi_os_delete_lock(acpi_gbl_reference_count_lock); - - /* Delete the reader/writer lock */ -diff -Nur linux-4.1.26.orig/drivers/ata/libata-sff.c linux-4.1.26/drivers/ata/libata-sff.c ---- linux-4.1.26.orig/drivers/ata/libata-sff.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ata/libata-sff.c 2016-06-19 15:30:58.627295036 +0200 -@@ -678,9 +678,9 @@ - unsigned long flags; - unsigned int consumed; - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - consumed = ata_sff_data_xfer32(dev, buf, buflen, rw); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - return consumed; - } -@@ -719,7 +719,7 @@ - unsigned long flags; - - /* FIXME: use a bounce buffer */ -- local_irq_save(flags); -+ local_irq_save_nort(flags); - buf = kmap_atomic(page); - - /* do the actual data transfer */ -@@ -727,7 +727,7 @@ - do_write); - - kunmap_atomic(buf); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } else { - buf = page_address(page); - ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size, -@@ -864,7 +864,7 @@ - unsigned long flags; - - /* FIXME: use bounce buffer */ -- local_irq_save(flags); -+ local_irq_save_nort(flags); - buf = kmap_atomic(page); - - /* do the actual data transfer */ -@@ -872,7 +872,7 @@ - count, rw); - - kunmap_atomic(buf); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } else { - buf = page_address(page); - consumed = ap->ops->sff_data_xfer(dev, buf + offset, -diff -Nur linux-4.1.26.orig/drivers/char/random.c linux-4.1.26/drivers/char/random.c ---- linux-4.1.26.orig/drivers/char/random.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/char/random.c 2016-06-19 15:30:58.627295036 +0200 -@@ -776,8 +776,6 @@ - } sample; - long delta, delta2, delta3; - -- preempt_disable(); -- - sample.jiffies = jiffies; - sample.cycles = random_get_entropy(); - sample.num = num; -@@ -818,7 +816,6 @@ - */ - credit_entropy_bits(r, min_t(int, fls(delta>>1), 11)); - } -- preempt_enable(); - } - - void add_input_randomness(unsigned int type, unsigned int code, -@@ -871,28 +868,27 @@ - return *(ptr + f->reg_idx++); - } - --void add_interrupt_randomness(int irq, int irq_flags) -+void add_interrupt_randomness(int irq, int irq_flags, __u64 ip) - { - struct entropy_store *r; - struct fast_pool *fast_pool = this_cpu_ptr(&irq_randomness); -- struct pt_regs *regs = get_irq_regs(); - unsigned long now = jiffies; - cycles_t cycles = random_get_entropy(); - __u32 c_high, j_high; -- __u64 ip; - unsigned long seed; - int credit = 0; - - if (cycles == 0) -- cycles = get_reg(fast_pool, regs); -+ cycles = get_reg(fast_pool, NULL); - c_high = (sizeof(cycles) > 4) ? cycles >> 32 : 0; - j_high = (sizeof(now) > 4) ? now >> 32 : 0; - fast_pool->pool[0] ^= cycles ^ j_high ^ irq; - fast_pool->pool[1] ^= now ^ c_high; -- ip = regs ? instruction_pointer(regs) : _RET_IP_; -+ if (!ip) -+ ip = _RET_IP_; - fast_pool->pool[2] ^= ip; - fast_pool->pool[3] ^= (sizeof(ip) > 4) ? ip >> 32 : -- get_reg(fast_pool, regs); -+ get_reg(fast_pool, NULL); - - fast_mix(fast_pool); - add_interrupt_bench(cycles); -diff -Nur linux-4.1.26.orig/drivers/clocksource/tcb_clksrc.c linux-4.1.26/drivers/clocksource/tcb_clksrc.c ---- linux-4.1.26.orig/drivers/clocksource/tcb_clksrc.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/clocksource/tcb_clksrc.c 2016-06-19 15:30:58.627295036 +0200 -@@ -23,8 +23,7 @@ - * this 32 bit free-running counter. the second channel is not used. - * - * - The third channel may be used to provide a 16-bit clockevent -- * source, used in either periodic or oneshot mode. This runs -- * at 32 KiHZ, and can handle delays of up to two seconds. -+ * source, used in either periodic or oneshot mode. - * - * A boot clocksource and clockevent source are also currently needed, - * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so -@@ -74,6 +73,7 @@ - struct tc_clkevt_device { - struct clock_event_device clkevt; - struct clk *clk; -+ u32 freq; - void __iomem *regs; - }; - -@@ -82,13 +82,6 @@ - return container_of(clkevt, struct tc_clkevt_device, clkevt); - } - --/* For now, we always use the 32K clock ... this optimizes for NO_HZ, -- * because using one of the divided clocks would usually mean the -- * tick rate can never be less than several dozen Hz (vs 0.5 Hz). -- * -- * A divided clock could be good for high resolution timers, since -- * 30.5 usec resolution can seem "low". -- */ - static u32 timer_clock; - - static void tc_mode(enum clock_event_mode m, struct clock_event_device *d) -@@ -111,11 +104,12 @@ - case CLOCK_EVT_MODE_PERIODIC: - clk_enable(tcd->clk); - -- /* slow clock, count up to RC, then irq and restart */ -+ /* count up to RC, then irq and restart */ - __raw_writel(timer_clock - | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, - regs + ATMEL_TC_REG(2, CMR)); -- __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); -+ __raw_writel((tcd->freq + HZ / 2) / HZ, -+ tcaddr + ATMEL_TC_REG(2, RC)); - - /* Enable clock and interrupts on RC compare */ - __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); -@@ -128,7 +122,7 @@ - case CLOCK_EVT_MODE_ONESHOT: - clk_enable(tcd->clk); - -- /* slow clock, count up to RC, then irq and stop */ -+ /* count up to RC, then irq and stop */ - __raw_writel(timer_clock | ATMEL_TC_CPCSTOP - | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, - regs + ATMEL_TC_REG(2, CMR)); -@@ -157,8 +151,12 @@ - .name = "tc_clkevt", - .features = CLOCK_EVT_FEAT_PERIODIC - | CLOCK_EVT_FEAT_ONESHOT, -+#ifdef CONFIG_ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK - /* Should be lower than at91rm9200's system timer */ - .rating = 125, -+#else -+ .rating = 200, -+#endif - .set_next_event = tc_next_event, - .set_mode = tc_mode, - }, -@@ -178,8 +176,9 @@ - return IRQ_NONE; - } - --static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) -+static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx) - { -+ unsigned divisor = atmel_tc_divisors[divisor_idx]; - int ret; - struct clk *t2_clk = tc->clk[2]; - int irq = tc->irq[2]; -@@ -193,7 +192,11 @@ - clkevt.regs = tc->regs; - clkevt.clk = t2_clk; - -- timer_clock = clk32k_divisor_idx; -+ timer_clock = divisor_idx; -+ if (!divisor) -+ clkevt.freq = 32768; -+ else -+ clkevt.freq = clk_get_rate(t2_clk) / divisor; - - clkevt.clkevt.cpumask = cpumask_of(0); - -@@ -203,7 +206,7 @@ - return ret; - } - -- clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff); -+ clockevents_config_and_register(&clkevt.clkevt, clkevt.freq, 1, 0xffff); - - return ret; - } -@@ -340,7 +343,11 @@ - goto err_disable_t1; - - /* channel 2: periodic and oneshot timer support */ -+#ifdef CONFIG_ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK - ret = setup_clkevents(tc, clk32k_divisor_idx); -+#else -+ ret = setup_clkevents(tc, best_divisor_idx); -+#endif - if (ret) - goto err_unregister_clksrc; - -diff -Nur linux-4.1.26.orig/drivers/clocksource/timer-atmel-pit.c linux-4.1.26/drivers/clocksource/timer-atmel-pit.c ---- linux-4.1.26.orig/drivers/clocksource/timer-atmel-pit.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/clocksource/timer-atmel-pit.c 2016-06-19 15:30:58.627295036 +0200 -@@ -90,6 +90,7 @@ - return elapsed; - } - -+static struct irqaction at91sam926x_pit_irq; - /* - * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16) - */ -@@ -100,6 +101,8 @@ - - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: -+ /* Set up irq handler */ -+ setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq); - /* update clocksource counter */ - data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR)); - pit_write(data->base, AT91_PIT_MR, -@@ -113,6 +116,7 @@ - /* disable irq, leaving the clocksource active */ - pit_write(data->base, AT91_PIT_MR, - (data->cycle - 1) | AT91_PIT_PITEN); -+ remove_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq); - break; - case CLOCK_EVT_MODE_RESUME: - break; -diff -Nur linux-4.1.26.orig/drivers/clocksource/timer-atmel-st.c linux-4.1.26/drivers/clocksource/timer-atmel-st.c ---- linux-4.1.26.orig/drivers/clocksource/timer-atmel-st.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/clocksource/timer-atmel-st.c 2016-06-19 15:30:58.627295036 +0200 -@@ -131,6 +131,7 @@ - break; - case CLOCK_EVT_MODE_SHUTDOWN: - case CLOCK_EVT_MODE_UNUSED: -+ remove_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq); - case CLOCK_EVT_MODE_RESUME: - irqmask = 0; - break; -diff -Nur linux-4.1.26.orig/drivers/cpufreq/cpufreq.c linux-4.1.26/drivers/cpufreq/cpufreq.c ---- linux-4.1.26.orig/drivers/cpufreq/cpufreq.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/cpufreq/cpufreq.c 2016-06-19 15:30:58.627295036 +0200 -@@ -64,12 +64,6 @@ - return cpufreq_driver->target_index || cpufreq_driver->target; - } - --/* -- * rwsem to guarantee that cpufreq driver module doesn't unload during critical -- * sections -- */ --static DECLARE_RWSEM(cpufreq_rwsem); -- - /* internal prototypes */ - static int __cpufreq_governor(struct cpufreq_policy *policy, - unsigned int event); -@@ -215,9 +209,6 @@ - if (cpu >= nr_cpu_ids) - return NULL; - -- if (!down_read_trylock(&cpufreq_rwsem)) -- return NULL; -- - /* get the cpufreq driver */ - read_lock_irqsave(&cpufreq_driver_lock, flags); - -@@ -230,9 +221,6 @@ - - read_unlock_irqrestore(&cpufreq_driver_lock, flags); - -- if (!policy) -- up_read(&cpufreq_rwsem); -- - return policy; - } - EXPORT_SYMBOL_GPL(cpufreq_cpu_get); -@@ -240,7 +228,6 @@ - void cpufreq_cpu_put(struct cpufreq_policy *policy) - { - kobject_put(&policy->kobj); -- up_read(&cpufreq_rwsem); - } - EXPORT_SYMBOL_GPL(cpufreq_cpu_put); - -@@ -765,9 +752,6 @@ - struct freq_attr *fattr = to_attr(attr); - ssize_t ret; - -- if (!down_read_trylock(&cpufreq_rwsem)) -- return -EINVAL; -- - down_read(&policy->rwsem); - - if (fattr->show) -@@ -776,7 +760,6 @@ - ret = -EIO; - - up_read(&policy->rwsem); -- up_read(&cpufreq_rwsem); - - return ret; - } -@@ -793,9 +776,6 @@ - if (!cpu_online(policy->cpu)) - goto unlock; - -- if (!down_read_trylock(&cpufreq_rwsem)) -- goto unlock; -- - down_write(&policy->rwsem); - - if (fattr->store) -@@ -804,8 +784,6 @@ - ret = -EIO; - - up_write(&policy->rwsem); -- -- up_read(&cpufreq_rwsem); - unlock: - put_online_cpus(); - -@@ -1117,16 +1095,12 @@ - if (unlikely(policy)) - return 0; - -- if (!down_read_trylock(&cpufreq_rwsem)) -- return 0; -- - /* Check if this cpu was hot-unplugged earlier and has siblings */ - read_lock_irqsave(&cpufreq_driver_lock, flags); - for_each_policy(policy) { - if (cpumask_test_cpu(cpu, policy->related_cpus)) { - read_unlock_irqrestore(&cpufreq_driver_lock, flags); - ret = cpufreq_add_policy_cpu(policy, cpu, dev); -- up_read(&cpufreq_rwsem); - return ret; - } - } -@@ -1269,8 +1243,6 @@ - - kobject_uevent(&policy->kobj, KOBJ_ADD); - -- up_read(&cpufreq_rwsem); -- - /* Callback for handling stuff after policy is ready */ - if (cpufreq_driver->ready) - cpufreq_driver->ready(policy); -@@ -1304,8 +1276,6 @@ - cpufreq_policy_free(policy); - - nomem_out: -- up_read(&cpufreq_rwsem); -- - return ret; - } - -@@ -2499,19 +2469,20 @@ - - pr_debug("unregistering driver %s\n", driver->name); - -+ /* Protect against concurrent cpu hotplug */ -+ get_online_cpus(); - subsys_interface_unregister(&cpufreq_interface); - if (cpufreq_boost_supported()) - cpufreq_sysfs_remove_file(&boost.attr); - - unregister_hotcpu_notifier(&cpufreq_cpu_notifier); - -- down_write(&cpufreq_rwsem); - write_lock_irqsave(&cpufreq_driver_lock, flags); - - cpufreq_driver = NULL; - - write_unlock_irqrestore(&cpufreq_driver_lock, flags); -- up_write(&cpufreq_rwsem); -+ put_online_cpus(); - - return 0; - } -diff -Nur linux-4.1.26.orig/drivers/cpufreq/Kconfig.x86 linux-4.1.26/drivers/cpufreq/Kconfig.x86 ---- linux-4.1.26.orig/drivers/cpufreq/Kconfig.x86 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/cpufreq/Kconfig.x86 2016-06-19 15:30:58.627295036 +0200 -@@ -123,7 +123,7 @@ - - config X86_POWERNOW_K8 - tristate "AMD Opteron/Athlon64 PowerNow!" -- depends on ACPI && ACPI_PROCESSOR && X86_ACPI_CPUFREQ -+ depends on ACPI && ACPI_PROCESSOR && X86_ACPI_CPUFREQ && !PREEMPT_RT_BASE - help - This adds the CPUFreq driver for K8/early Opteron/Athlon64 processors. - Support for K10 and newer processors is now in acpi-cpufreq. -diff -Nur linux-4.1.26.orig/drivers/gpio/gpio-omap.c linux-4.1.26/drivers/gpio/gpio-omap.c ---- linux-4.1.26.orig/drivers/gpio/gpio-omap.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpio/gpio-omap.c 2016-06-19 15:30:58.631295190 +0200 -@@ -29,6 +29,7 @@ - #include - - #define OFF_MODE 1 -+#define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF - - static LIST_HEAD(omap_gpio_list); - -@@ -50,14 +51,15 @@ - struct gpio_bank { - struct list_head node; - void __iomem *base; -- u16 irq; -+ int irq; - u32 non_wakeup_gpios; - u32 enabled_non_wakeup_gpios; - struct gpio_regs context; - u32 saved_datain; - u32 level_mask; - u32 toggle_mask; -- spinlock_t lock; -+ raw_spinlock_t lock; -+ raw_spinlock_t wa_lock; - struct gpio_chip chip; - struct clk *dbck; - u32 mod_usage; -@@ -67,7 +69,7 @@ - struct device *dev; - bool is_mpuio; - bool dbck_flag; -- bool loses_context; -+ - bool context_valid; - int stride; - u32 width; -@@ -175,7 +177,7 @@ - static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) - { - if (bank->dbck_enable_mask && !bank->dbck_enabled) { -- clk_prepare_enable(bank->dbck); -+ clk_enable(bank->dbck); - bank->dbck_enabled = true; - - writel_relaxed(bank->dbck_enable_mask, -@@ -193,7 +195,7 @@ - */ - writel_relaxed(0, bank->base + bank->regs->debounce_en); - -- clk_disable_unprepare(bank->dbck); -+ clk_disable(bank->dbck); - bank->dbck_enabled = false; - } - } -@@ -204,8 +206,9 @@ - * @offset: the gpio number on this @bank - * @debounce: debounce time to use - * -- * OMAP's debounce time is in 31us steps so we need -- * to convert and round up to the closest unit. -+ * OMAP's debounce time is in 31us steps -+ * = (GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) x 31 -+ * so we need to convert and round up to the closest unit. - */ - static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, - unsigned debounce) -@@ -213,34 +216,33 @@ - void __iomem *reg; - u32 val; - u32 l; -+ bool enable = !!debounce; - - if (!bank->dbck_flag) - return; - -- if (debounce < 32) -- debounce = 0x01; -- else if (debounce > 7936) -- debounce = 0xff; -- else -- debounce = (debounce / 0x1f) - 1; -+ if (enable) { -+ debounce = DIV_ROUND_UP(debounce, 31) - 1; -+ debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK; -+ } - - l = BIT(offset); - -- clk_prepare_enable(bank->dbck); -+ clk_enable(bank->dbck); - reg = bank->base + bank->regs->debounce; - writel_relaxed(debounce, reg); - - reg = bank->base + bank->regs->debounce_en; - val = readl_relaxed(reg); - -- if (debounce) -+ if (enable) - val |= l; - else - val &= ~l; - bank->dbck_enable_mask = val; - - writel_relaxed(val, reg); -- clk_disable_unprepare(bank->dbck); -+ clk_disable(bank->dbck); - /* - * Enable debounce clock per module. - * This call is mandatory because in omap_gpio_request() when -@@ -285,7 +287,7 @@ - bank->context.debounce = 0; - writel_relaxed(bank->context.debounce, bank->base + - bank->regs->debounce); -- clk_disable_unprepare(bank->dbck); -+ clk_disable(bank->dbck); - bank->dbck_enabled = false; - } - } -@@ -488,9 +490,6 @@ - unsigned long flags; - unsigned offset = d->hwirq; - -- if (!BANK_USED(bank)) -- pm_runtime_get_sync(bank->dev); -- - if (type & ~IRQ_TYPE_SENSE_MASK) - return -EINVAL; - -@@ -498,20 +497,28 @@ - (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) - return -EINVAL; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - retval = omap_set_gpio_triggering(bank, offset, type); -+ if (retval) { -+ raw_spin_unlock_irqrestore(&bank->lock, flags); -+ goto error; -+ } - omap_gpio_init_irq(bank, offset); - if (!omap_gpio_is_input(bank, offset)) { -- spin_unlock_irqrestore(&bank->lock, flags); -- return -EINVAL; -+ raw_spin_unlock_irqrestore(&bank->lock, flags); -+ retval = -EINVAL; -+ goto error; - } -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - __irq_set_handler_locked(d->irq, handle_level_irq); - else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) - __irq_set_handler_locked(d->irq, handle_edge_irq); - -+ return 0; -+ -+error: - return retval; - } - -@@ -626,34 +633,30 @@ - return -EINVAL; - } - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - if (enable) - bank->context.wake_en |= gpio_bit; - else - bank->context.wake_en &= ~gpio_bit; - - writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } - --static void omap_reset_gpio(struct gpio_bank *bank, unsigned offset) --{ -- omap_set_gpio_direction(bank, offset, 1); -- omap_set_gpio_irqenable(bank, offset, 0); -- omap_clear_gpio_irqstatus(bank, offset); -- omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); -- omap_clear_gpio_debounce(bank, offset); --} -- - /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ - static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) - { - struct gpio_bank *bank = omap_irq_data_get_bank(d); - unsigned offset = d->hwirq; -+ int ret; -+ -+ ret = omap_set_gpio_wakeup(bank, offset, enable); -+ if (!ret) -+ ret = irq_set_irq_wake(bank->irq, enable); - -- return omap_set_gpio_wakeup(bank, offset, enable); -+ return ret; - } - - static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) -@@ -668,17 +671,10 @@ - if (!BANK_USED(bank)) - pm_runtime_get_sync(bank->dev); - -- spin_lock_irqsave(&bank->lock, flags); -- /* Set trigger to none. You need to enable the desired trigger with -- * request_irq() or set_irq_type(). Only do this if the IRQ line has -- * not already been requested. -- */ -- if (!LINE_USED(bank->irq_usage, offset)) { -- omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); -- omap_enable_gpio_module(bank, offset); -- } -+ raw_spin_lock_irqsave(&bank->lock, flags); -+ omap_enable_gpio_module(bank, offset); - bank->mod_usage |= BIT(offset); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } -@@ -688,11 +684,14 @@ - struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); - unsigned long flags; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - bank->mod_usage &= ~(BIT(offset)); -+ if (!LINE_USED(bank->irq_usage, offset)) { -+ omap_set_gpio_direction(bank, offset, 1); -+ omap_clear_gpio_debounce(bank, offset); -+ } - omap_disable_gpio_module(bank, offset); -- omap_reset_gpio(bank, offset); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - /* - * If this is the last gpio to be freed in the bank, -@@ -711,29 +710,27 @@ - * line's interrupt handler has been run, we may miss some nested - * interrupts. - */ --static void omap_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) -+static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) - { - void __iomem *isr_reg = NULL; - u32 isr; - unsigned int bit; -- struct gpio_bank *bank; -- int unmasked = 0; -- struct irq_chip *irqchip = irq_desc_get_chip(desc); -- struct gpio_chip *chip = irq_get_handler_data(irq); -+ struct gpio_bank *bank = gpiobank; -+ unsigned long wa_lock_flags; -+ unsigned long lock_flags; - -- chained_irq_enter(irqchip, desc); -- -- bank = container_of(chip, struct gpio_bank, chip); - isr_reg = bank->base + bank->regs->irqstatus; -- pm_runtime_get_sync(bank->dev); -- - if (WARN_ON(!isr_reg)) - goto exit; - -+ pm_runtime_get_sync(bank->dev); -+ - while (1) { - u32 isr_saved, level_mask = 0; - u32 enabled; - -+ raw_spin_lock_irqsave(&bank->lock, lock_flags); -+ - enabled = omap_get_gpio_irqbank_mask(bank); - isr_saved = isr = readl_relaxed(isr_reg) & enabled; - -@@ -747,12 +744,7 @@ - omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask); - omap_enable_gpio_irqbank(bank, isr_saved & ~level_mask); - -- /* if there is only edge sensitive GPIO pin interrupts -- configured, we could unmask GPIO bank interrupt immediately */ -- if (!level_mask && !unmasked) { -- unmasked = 1; -- chained_irq_exit(irqchip, desc); -- } -+ raw_spin_unlock_irqrestore(&bank->lock, lock_flags); - - if (!isr) - break; -@@ -761,6 +753,7 @@ - bit = __ffs(isr); - isr &= ~(BIT(bit)); - -+ raw_spin_lock_irqsave(&bank->lock, lock_flags); - /* - * Some chips can't respond to both rising and falling - * at the same time. If this irq was requested with -@@ -771,18 +764,20 @@ - if (bank->toggle_mask & (BIT(bit))) - omap_toggle_gpio_edge_triggering(bank, bit); - -+ raw_spin_unlock_irqrestore(&bank->lock, lock_flags); -+ -+ raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); -+ - generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, - bit)); -+ -+ raw_spin_unlock_irqrestore(&bank->wa_lock, -+ wa_lock_flags); - } - } -- /* if bank has any level sensitive GPIO pin interrupt -- configured, we must unmask the bank interrupt only after -- handler(s) are executed in order to avoid spurious bank -- interrupt */ - exit: -- if (!unmasked) -- chained_irq_exit(irqchip, desc); - pm_runtime_put(bank->dev); -+ return IRQ_HANDLED; - } - - static unsigned int omap_gpio_irq_startup(struct irq_data *d) -@@ -791,15 +786,22 @@ - unsigned long flags; - unsigned offset = d->hwirq; - -- if (!BANK_USED(bank)) -- pm_runtime_get_sync(bank->dev); -+ raw_spin_lock_irqsave(&bank->lock, flags); - -- spin_lock_irqsave(&bank->lock, flags); -- omap_gpio_init_irq(bank, offset); -- spin_unlock_irqrestore(&bank->lock, flags); -+ if (!LINE_USED(bank->mod_usage, offset)) -+ omap_set_gpio_direction(bank, offset, 1); -+ else if (!omap_gpio_is_input(bank, offset)) -+ goto err; -+ omap_enable_gpio_module(bank, offset); -+ bank->irq_usage |= BIT(offset); -+ -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - omap_gpio_unmask_irq(d); - - return 0; -+err: -+ raw_spin_unlock_irqrestore(&bank->lock, flags); -+ return -EINVAL; - } - - static void omap_gpio_irq_shutdown(struct irq_data *d) -@@ -808,11 +810,28 @@ - unsigned long flags; - unsigned offset = d->hwirq; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - bank->irq_usage &= ~(BIT(offset)); -+ omap_set_gpio_irqenable(bank, offset, 0); -+ omap_clear_gpio_irqstatus(bank, offset); -+ omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); -+ if (!LINE_USED(bank->mod_usage, offset)) -+ omap_clear_gpio_debounce(bank, offset); - omap_disable_gpio_module(bank, offset); -- omap_reset_gpio(bank, offset); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); -+} -+ -+static void omap_gpio_irq_bus_lock(struct irq_data *data) -+{ -+ struct gpio_bank *bank = omap_irq_data_get_bank(data); -+ -+ if (!BANK_USED(bank)) -+ pm_runtime_get_sync(bank->dev); -+} -+ -+static void gpio_irq_bus_sync_unlock(struct irq_data *data) -+{ -+ struct gpio_bank *bank = omap_irq_data_get_bank(data); - - /* - * If this is the last IRQ to be freed in the bank, -@@ -836,10 +855,10 @@ - unsigned offset = d->hwirq; - unsigned long flags; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - omap_set_gpio_irqenable(bank, offset, 0); - omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - } - - static void omap_gpio_unmask_irq(struct irq_data *d) -@@ -849,7 +868,7 @@ - u32 trigger = irqd_get_trigger_type(d); - unsigned long flags; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - if (trigger) - omap_set_gpio_triggering(bank, offset, trigger); - -@@ -861,7 +880,7 @@ - } - - omap_set_gpio_irqenable(bank, offset, 1); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - } - - /*---------------------------------------------------------------------*/ -@@ -874,9 +893,9 @@ - OMAP_MPUIO_GPIO_MASKIT / bank->stride; - unsigned long flags; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } -@@ -889,9 +908,9 @@ - OMAP_MPUIO_GPIO_MASKIT / bank->stride; - unsigned long flags; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - writel_relaxed(bank->context.wake_en, mask_reg); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } -@@ -937,9 +956,9 @@ - - bank = container_of(chip, struct gpio_bank, chip); - reg = bank->base + bank->regs->direction; -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - dir = !!(readl_relaxed(reg) & BIT(offset)); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - return dir; - } - -@@ -949,9 +968,9 @@ - unsigned long flags; - - bank = container_of(chip, struct gpio_bank, chip); -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - omap_set_gpio_direction(bank, offset, 1); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - return 0; - } - -@@ -973,10 +992,10 @@ - unsigned long flags; - - bank = container_of(chip, struct gpio_bank, chip); -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - bank->set_dataout(bank, offset, value); - omap_set_gpio_direction(bank, offset, 0); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - return 0; - } - -@@ -988,9 +1007,9 @@ - - bank = container_of(chip, struct gpio_bank, chip); - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - omap2_set_gpio_debounce(bank, offset, debounce); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } -@@ -1001,9 +1020,9 @@ - unsigned long flags; - - bank = container_of(chip, struct gpio_bank, chip); -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - bank->set_dataout(bank, offset, value); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - } - - /*---------------------------------------------------------------------*/ -@@ -1048,10 +1067,6 @@ - /* Initialize interface clk ungated, module enabled */ - if (bank->regs->ctrl) - writel_relaxed(0, base + bank->regs->ctrl); -- -- bank->dbck = clk_get(bank->dev, "dbclk"); -- if (IS_ERR(bank->dbck)) -- dev_err(bank->dev, "Could not get gpio dbck\n"); - } - - static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) -@@ -1080,7 +1095,6 @@ - } else { - bank->chip.label = "gpio"; - bank->chip.base = gpio; -- gpio += bank->width; - } - bank->chip.ngpio = bank->width; - -@@ -1090,6 +1104,9 @@ - return ret; - } - -+ if (!bank->is_mpuio) -+ gpio += bank->width; -+ - #ifdef CONFIG_ARCH_OMAP1 - /* - * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop -@@ -1112,7 +1129,7 @@ - } - - ret = gpiochip_irqchip_add(&bank->chip, irqc, -- irq_base, omap_gpio_irq_handler, -+ irq_base, handle_bad_irq, - IRQ_TYPE_NONE); - - if (ret) { -@@ -1121,10 +1138,14 @@ - return -ENODEV; - } - -- gpiochip_set_chained_irqchip(&bank->chip, irqc, -- bank->irq, omap_gpio_irq_handler); -+ gpiochip_set_chained_irqchip(&bank->chip, irqc, bank->irq, NULL); - -- return 0; -+ ret = devm_request_irq(bank->dev, bank->irq, omap_gpio_irq_handler, -+ 0, dev_name(bank->dev), bank); -+ if (ret) -+ gpiochip_remove(&bank->chip); -+ -+ return ret; - } - - static const struct of_device_id omap_gpio_match[]; -@@ -1163,17 +1184,23 @@ - irqc->irq_unmask = omap_gpio_unmask_irq, - irqc->irq_set_type = omap_gpio_irq_type, - irqc->irq_set_wake = omap_gpio_wake_enable, -+ irqc->irq_bus_lock = omap_gpio_irq_bus_lock, -+ irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, - irqc->name = dev_name(&pdev->dev); - -- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); -- if (unlikely(!res)) { -- dev_err(dev, "Invalid IRQ resource\n"); -- return -ENODEV; -+ bank->irq = platform_get_irq(pdev, 0); -+ if (bank->irq <= 0) { -+ if (!bank->irq) -+ bank->irq = -ENXIO; -+ if (bank->irq != -EPROBE_DEFER) -+ dev_err(dev, -+ "can't get irq resource ret=%d\n", bank->irq); -+ return bank->irq; - } - -- bank->irq = res->start; - bank->dev = dev; - bank->chip.dev = dev; -+ bank->chip.owner = THIS_MODULE; - bank->dbck_flag = pdata->dbck_flag; - bank->stride = pdata->bank_stride; - bank->width = pdata->bank_width; -@@ -1183,15 +1210,9 @@ - #ifdef CONFIG_OF_GPIO - bank->chip.of_node = of_node_get(node); - #endif -- if (node) { -- if (!of_property_read_bool(node, "ti,gpio-always-on")) -- bank->loses_context = true; -- } else { -- bank->loses_context = pdata->loses_context; -- -- if (bank->loses_context) -- bank->get_context_loss_count = -- pdata->get_context_loss_count; -+ if (!node) { -+ bank->get_context_loss_count = -+ pdata->get_context_loss_count; - } - - if (bank->regs->set_dataout && bank->regs->clr_dataout) -@@ -1199,16 +1220,27 @@ - else - bank->set_dataout = omap_set_gpio_dataout_mask; - -- spin_lock_init(&bank->lock); -+ raw_spin_lock_init(&bank->lock); -+ raw_spin_lock_init(&bank->wa_lock); - - /* Static mapping, never released */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - bank->base = devm_ioremap_resource(dev, res); - if (IS_ERR(bank->base)) { -- irq_domain_remove(bank->chip.irqdomain); - return PTR_ERR(bank->base); - } - -+ if (bank->dbck_flag) { -+ bank->dbck = devm_clk_get(bank->dev, "dbclk"); -+ if (IS_ERR(bank->dbck)) { -+ dev_err(bank->dev, -+ "Could not get gpio dbck. Disable debounce\n"); -+ bank->dbck_flag = false; -+ } else { -+ clk_prepare(bank->dbck); -+ } -+ } -+ - platform_set_drvdata(pdev, bank); - - pm_runtime_enable(bank->dev); -@@ -1221,8 +1253,11 @@ - omap_gpio_mod_init(bank); - - ret = omap_gpio_chip_init(bank, irqc); -- if (ret) -+ if (ret) { -+ pm_runtime_put_sync(bank->dev); -+ pm_runtime_disable(bank->dev); - return ret; -+ } - - omap_gpio_show_rev(bank); - -@@ -1233,6 +1268,19 @@ - return 0; - } - -+static int omap_gpio_remove(struct platform_device *pdev) -+{ -+ struct gpio_bank *bank = platform_get_drvdata(pdev); -+ -+ list_del(&bank->node); -+ gpiochip_remove(&bank->chip); -+ pm_runtime_disable(bank->dev); -+ if (bank->dbck_flag) -+ clk_unprepare(bank->dbck); -+ -+ return 0; -+} -+ - #ifdef CONFIG_ARCH_OMAP2PLUS - - #if defined(CONFIG_PM) -@@ -1246,7 +1294,7 @@ - unsigned long flags; - u32 wake_low, wake_hi; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - - /* - * Only edges can generate a wakeup event to the PRCM. -@@ -1299,7 +1347,7 @@ - bank->get_context_loss_count(bank->dev); - - omap_gpio_dbck_disable(bank); -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } -@@ -1314,14 +1362,14 @@ - unsigned long flags; - int c; - -- spin_lock_irqsave(&bank->lock, flags); -+ raw_spin_lock_irqsave(&bank->lock, flags); - - /* - * On the first resume during the probe, the context has not - * been initialised and so initialise it now. Also initialise - * the context loss count. - */ -- if (bank->loses_context && !bank->context_valid) { -+ if (!bank->context_valid) { - omap_gpio_init_context(bank); - - if (bank->get_context_loss_count) -@@ -1342,22 +1390,20 @@ - writel_relaxed(bank->context.risingdetect, - bank->base + bank->regs->risingdetect); - -- if (bank->loses_context) { -- if (!bank->get_context_loss_count) { -+ if (!bank->get_context_loss_count) { -+ omap_gpio_restore_context(bank); -+ } else { -+ c = bank->get_context_loss_count(bank->dev); -+ if (c != bank->context_loss_count) { - omap_gpio_restore_context(bank); - } else { -- c = bank->get_context_loss_count(bank->dev); -- if (c != bank->context_loss_count) { -- omap_gpio_restore_context(bank); -- } else { -- spin_unlock_irqrestore(&bank->lock, flags); -- return 0; -- } -+ raw_spin_unlock_irqrestore(&bank->lock, flags); -+ return 0; - } - } - - if (!bank->workaround_enabled) { -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - return 0; - } - -@@ -1412,18 +1458,19 @@ - } - - bank->workaround_enabled = false; -- spin_unlock_irqrestore(&bank->lock, flags); -+ raw_spin_unlock_irqrestore(&bank->lock, flags); - - return 0; - } - #endif /* CONFIG_PM */ - -+#if IS_BUILTIN(CONFIG_GPIO_OMAP) - void omap2_gpio_prepare_for_idle(int pwr_mode) - { - struct gpio_bank *bank; - - list_for_each_entry(bank, &omap_gpio_list, node) { -- if (!BANK_USED(bank) || !bank->loses_context) -+ if (!BANK_USED(bank)) - continue; - - bank->power_mode = pwr_mode; -@@ -1437,12 +1484,13 @@ - struct gpio_bank *bank; - - list_for_each_entry(bank, &omap_gpio_list, node) { -- if (!BANK_USED(bank) || !bank->loses_context) -+ if (!BANK_USED(bank)) - continue; - - pm_runtime_get_sync(bank->dev); - } - } -+#endif - - #if defined(CONFIG_PM) - static void omap_gpio_init_context(struct gpio_bank *p) -@@ -1598,6 +1646,7 @@ - - static struct platform_driver omap_gpio_driver = { - .probe = omap_gpio_probe, -+ .remove = omap_gpio_remove, - .driver = { - .name = "omap_gpio", - .pm = &gpio_pm_ops, -@@ -1615,3 +1664,13 @@ - return platform_driver_register(&omap_gpio_driver); - } - postcore_initcall(omap_gpio_drv_reg); -+ -+static void __exit omap_gpio_exit(void) -+{ -+ platform_driver_unregister(&omap_gpio_driver); -+} -+module_exit(omap_gpio_exit); -+ -+MODULE_DESCRIPTION("omap gpio driver"); -+MODULE_ALIAS("platform:gpio-omap"); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.26.orig/drivers/gpio/Kconfig linux-4.1.26/drivers/gpio/Kconfig ---- linux-4.1.26.orig/drivers/gpio/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpio/Kconfig 2016-06-19 15:30:58.631295190 +0200 -@@ -308,7 +308,7 @@ - family of SOCs. - - config GPIO_OMAP -- bool "TI OMAP GPIO support" if COMPILE_TEST && !ARCH_OMAP2PLUS -+ tristate "TI OMAP GPIO support" if ARCH_OMAP2PLUS || COMPILE_TEST - default y if ARCH_OMAP - depends on ARM - select GENERIC_IRQ_CHIP -diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_execbuffer.c linux-4.1.26/drivers/gpu/drm/i915/i915_gem_execbuffer.c ---- linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_execbuffer.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpu/drm/i915/i915_gem_execbuffer.c 2016-06-19 15:30:58.631295190 +0200 -@@ -32,6 +32,7 @@ - #include "i915_trace.h" - #include "intel_drv.h" - #include -+#include - - #define __EXEC_OBJECT_HAS_PIN (1<<31) - #define __EXEC_OBJECT_HAS_FENCE (1<<30) -@@ -465,7 +466,7 @@ - } - - /* We can't wait for rendering with pagefaults disabled */ -- if (obj->active && in_atomic()) -+ if (obj->active && pagefault_disabled()) - return -EFAULT; - - if (use_cpu_reloc(obj)) -@@ -1338,7 +1339,9 @@ - return ret; - } - -+#ifndef CONFIG_PREEMPT_RT_BASE - trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags); -+#endif - - i915_gem_execbuffer_move_to_active(vmas, ring); - i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj); -diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_shrinker.c linux-4.1.26/drivers/gpu/drm/i915/i915_gem_shrinker.c ---- linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_shrinker.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpu/drm/i915/i915_gem_shrinker.c 2016-06-19 15:30:58.631295190 +0200 -@@ -39,7 +39,7 @@ - if (!mutex_is_locked(mutex)) - return false; - --#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES) -+#if (defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES)) && !defined(CONFIG_PREEMPT_RT_BASE) - return mutex->owner == task; - #else - /* Since UP may be pre-empted, we cannot assume that we own the lock */ -diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/i915_irq.c linux-4.1.26/drivers/gpu/drm/i915/i915_irq.c ---- linux-4.1.26.orig/drivers/gpu/drm/i915/i915_irq.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpu/drm/i915/i915_irq.c 2016-06-19 15:30:58.631295190 +0200 -@@ -676,6 +676,7 @@ - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); - - /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ -+ preempt_disable_rt(); - - /* Get optional system timestamp before query. */ - if (stime) -@@ -727,6 +728,7 @@ - *etime = ktime_get(); - - /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ -+ preempt_enable_rt(); - - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); - -diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/intel_display.c linux-4.1.26/drivers/gpu/drm/i915/intel_display.c ---- linux-4.1.26.orig/drivers/gpu/drm/i915/intel_display.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpu/drm/i915/intel_display.c 2016-06-19 15:30:58.635295344 +0200 -@@ -10084,7 +10084,7 @@ - struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); - -- WARN_ON(!in_interrupt()); -+ WARN_ON_NONRT(!in_interrupt()); - - if (crtc == NULL) - return; -diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/intel_sprite.c linux-4.1.26/drivers/gpu/drm/i915/intel_sprite.c ---- linux-4.1.26.orig/drivers/gpu/drm/i915/intel_sprite.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpu/drm/i915/intel_sprite.c 2016-06-19 15:30:58.635295344 +0200 -@@ -37,6 +37,7 @@ - #include "intel_drv.h" - #include - #include "i915_drv.h" -+#include - - static bool - format_is_yuv(uint32_t format) -@@ -61,6 +62,8 @@ - return DIV_ROUND_UP(usecs * mode->crtc_clock, 1000 * mode->crtc_htotal); - } - -+static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock); -+ - /** - * intel_pipe_update_start() - start update of a set of display registers - * @crtc: the crtc of which the registers are going to be updated -@@ -101,7 +104,7 @@ - if (WARN_ON(drm_crtc_vblank_get(&crtc->base))) - return false; - -- local_irq_disable(); -+ local_lock_irq(pipe_update_lock); - - trace_i915_pipe_update_start(crtc, min, max); - -@@ -123,11 +126,11 @@ - break; - } - -- local_irq_enable(); -+ local_unlock_irq(pipe_update_lock); - - timeout = schedule_timeout(timeout); - -- local_irq_disable(); -+ local_lock_irq(pipe_update_lock); - } - - finish_wait(wq, &wait); -@@ -158,7 +161,7 @@ - - trace_i915_pipe_update_end(crtc, end_vbl_count); - -- local_irq_enable(); -+ local_unlock_irq(pipe_update_lock); - - if (start_vbl_count != end_vbl_count) - DRM_ERROR("Atomic update failure on pipe %c (start=%u end=%u)\n", -diff -Nur linux-4.1.26.orig/drivers/gpu/drm/radeon/radeon_display.c linux-4.1.26/drivers/gpu/drm/radeon/radeon_display.c ---- linux-4.1.26.orig/drivers/gpu/drm/radeon/radeon_display.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/gpu/drm/radeon/radeon_display.c 2016-06-19 15:30:58.635295344 +0200 -@@ -1798,6 +1798,7 @@ - struct radeon_device *rdev = dev->dev_private; - - /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ -+ preempt_disable_rt(); - - /* Get optional system timestamp before query. */ - if (stime) -@@ -1890,6 +1891,7 @@ - *etime = ktime_get(); - - /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ -+ preempt_enable_rt(); - - /* Decode into vertical and horizontal scanout position. */ - *vpos = position & 0x1fff; -diff -Nur linux-4.1.26.orig/drivers/i2c/busses/i2c-omap.c linux-4.1.26/drivers/i2c/busses/i2c-omap.c ---- linux-4.1.26.orig/drivers/i2c/busses/i2c-omap.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/i2c/busses/i2c-omap.c 2016-06-19 15:30:58.635295344 +0200 -@@ -996,15 +996,12 @@ - u16 mask; - u16 stat; - -- spin_lock(&dev->lock); -- mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); - stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); -+ mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); - - if (stat & mask) - ret = IRQ_WAKE_THREAD; - -- spin_unlock(&dev->lock); -- - return ret; - } - -diff -Nur linux-4.1.26.orig/drivers/ide/alim15x3.c linux-4.1.26/drivers/ide/alim15x3.c ---- linux-4.1.26.orig/drivers/ide/alim15x3.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/alim15x3.c 2016-06-19 15:30:58.635295344 +0200 -@@ -234,7 +234,7 @@ - - isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - - if (m5229_revision < 0xC2) { - /* -@@ -325,7 +325,7 @@ - } - pci_dev_put(north); - pci_dev_put(isa_dev); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - return 0; - } - -diff -Nur linux-4.1.26.orig/drivers/ide/hpt366.c linux-4.1.26/drivers/ide/hpt366.c ---- linux-4.1.26.orig/drivers/ide/hpt366.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/hpt366.c 2016-06-19 15:30:58.635295344 +0200 -@@ -1241,7 +1241,7 @@ - - dma_old = inb(base + 2); - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - - dma_new = dma_old; - pci_read_config_byte(dev, hwif->channel ? 0x4b : 0x43, &masterdma); -@@ -1252,7 +1252,7 @@ - if (dma_new != dma_old) - outb(dma_new, base + 2); - -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", - hwif->name, base, base + 7); -diff -Nur linux-4.1.26.orig/drivers/ide/ide-io.c linux-4.1.26/drivers/ide/ide-io.c ---- linux-4.1.26.orig/drivers/ide/ide-io.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/ide-io.c 2016-06-19 15:30:58.635295344 +0200 -@@ -659,7 +659,7 @@ - /* disable_irq_nosync ?? */ - disable_irq(hwif->irq); - /* local CPU only, as if we were handling an interrupt */ -- local_irq_disable(); -+ local_irq_disable_nort(); - if (hwif->polling) { - startstop = handler(drive); - } else if (drive_is_ready(drive)) { -diff -Nur linux-4.1.26.orig/drivers/ide/ide-iops.c linux-4.1.26/drivers/ide/ide-iops.c ---- linux-4.1.26.orig/drivers/ide/ide-iops.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/ide-iops.c 2016-06-19 15:30:58.635295344 +0200 -@@ -129,12 +129,12 @@ - if ((stat & ATA_BUSY) == 0) - break; - -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - *rstat = stat; - return -EBUSY; - } - } -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - /* - * Allow status to settle, then read it again. -diff -Nur linux-4.1.26.orig/drivers/ide/ide-io-std.c linux-4.1.26/drivers/ide/ide-io-std.c ---- linux-4.1.26.orig/drivers/ide/ide-io-std.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/ide-io-std.c 2016-06-19 15:30:58.635295344 +0200 -@@ -175,7 +175,7 @@ - unsigned long uninitialized_var(flags); - - if ((io_32bit & 2) && !mmio) { -- local_irq_save(flags); -+ local_irq_save_nort(flags); - ata_vlb_sync(io_ports->nsect_addr); - } - -@@ -186,7 +186,7 @@ - insl(data_addr, buf, words); - - if ((io_32bit & 2) && !mmio) -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - if (((len + 1) & 3) < 2) - return; -@@ -219,7 +219,7 @@ - unsigned long uninitialized_var(flags); - - if ((io_32bit & 2) && !mmio) { -- local_irq_save(flags); -+ local_irq_save_nort(flags); - ata_vlb_sync(io_ports->nsect_addr); - } - -@@ -230,7 +230,7 @@ - outsl(data_addr, buf, words); - - if ((io_32bit & 2) && !mmio) -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - if (((len + 1) & 3) < 2) - return; -diff -Nur linux-4.1.26.orig/drivers/ide/ide-probe.c linux-4.1.26/drivers/ide/ide-probe.c ---- linux-4.1.26.orig/drivers/ide/ide-probe.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/ide-probe.c 2016-06-19 15:30:58.635295344 +0200 -@@ -196,10 +196,10 @@ - int bswap = 1; - - /* local CPU only; some systems need this */ -- local_irq_save(flags); -+ local_irq_save_nort(flags); - /* read 512 bytes of id info */ - hwif->tp_ops->input_data(drive, NULL, id, SECTOR_SIZE); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - drive->dev_flags |= IDE_DFLAG_ID_READ; - #ifdef DEBUG -diff -Nur linux-4.1.26.orig/drivers/ide/ide-taskfile.c linux-4.1.26/drivers/ide/ide-taskfile.c ---- linux-4.1.26.orig/drivers/ide/ide-taskfile.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/ide/ide-taskfile.c 2016-06-19 15:30:58.635295344 +0200 -@@ -250,7 +250,7 @@ - - page_is_high = PageHighMem(page); - if (page_is_high) -- local_irq_save(flags); -+ local_irq_save_nort(flags); - - buf = kmap_atomic(page) + offset; - -@@ -271,7 +271,7 @@ - kunmap_atomic(buf); - - if (page_is_high) -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - len -= nr_bytes; - } -@@ -414,7 +414,7 @@ - } - - if ((drive->dev_flags & IDE_DFLAG_UNMASK) == 0) -- local_irq_disable(); -+ local_irq_disable_nort(); - - ide_set_handler(drive, &task_pio_intr, WAIT_WORSTCASE); - -diff -Nur linux-4.1.26.orig/drivers/infiniband/ulp/ipoib/ipoib_multicast.c linux-4.1.26/drivers/infiniband/ulp/ipoib/ipoib_multicast.c ---- linux-4.1.26.orig/drivers/infiniband/ulp/ipoib/ipoib_multicast.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/infiniband/ulp/ipoib/ipoib_multicast.c 2016-06-19 15:30:58.639295498 +0200 -@@ -821,7 +821,7 @@ - - ipoib_dbg_mcast(priv, "restarting multicast task\n"); - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - netif_addr_lock(dev); - spin_lock(&priv->lock); - -@@ -903,7 +903,7 @@ - - spin_unlock(&priv->lock); - netif_addr_unlock(dev); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - /* - * make sure the in-flight joins have finished before we attempt -diff -Nur linux-4.1.26.orig/drivers/input/gameport/gameport.c linux-4.1.26/drivers/input/gameport/gameport.c ---- linux-4.1.26.orig/drivers/input/gameport/gameport.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/input/gameport/gameport.c 2016-06-19 15:30:58.639295498 +0200 -@@ -124,12 +124,12 @@ - tx = 1 << 30; - - for(i = 0; i < 50; i++) { -- local_irq_save(flags); -+ local_irq_save_nort(flags); - GET_TIME(t1); - for (t = 0; t < 50; t++) gameport_read(gameport); - GET_TIME(t2); - GET_TIME(t3); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - udelay(i * 10); - if ((t = DELTA(t2,t1) - DELTA(t3,t2)) < tx) tx = t; - } -@@ -148,11 +148,11 @@ - tx = 1 << 30; - - for(i = 0; i < 50; i++) { -- local_irq_save(flags); -+ local_irq_save_nort(flags); - rdtscl(t1); - for (t = 0; t < 50; t++) gameport_read(gameport); - rdtscl(t2); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - udelay(i * 10); - if (t2 - t1 < tx) tx = t2 - t1; - } -diff -Nur linux-4.1.26.orig/drivers/leds/trigger/Kconfig linux-4.1.26/drivers/leds/trigger/Kconfig ---- linux-4.1.26.orig/drivers/leds/trigger/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/leds/trigger/Kconfig 2016-06-19 15:30:58.639295498 +0200 -@@ -61,7 +61,7 @@ - - config LEDS_TRIGGER_CPU - bool "LED CPU Trigger" -- depends on LEDS_TRIGGERS -+ depends on LEDS_TRIGGERS && !PREEMPT_RT_BASE - help - This allows LEDs to be controlled by active CPUs. This shows - the active CPUs across an array of LEDs so you can see which -diff -Nur linux-4.1.26.orig/drivers/md/bcache/Kconfig linux-4.1.26/drivers/md/bcache/Kconfig ---- linux-4.1.26.orig/drivers/md/bcache/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/md/bcache/Kconfig 2016-06-19 15:30:58.639295498 +0200 -@@ -1,6 +1,7 @@ - - config BCACHE - tristate "Block device as cache" -+ depends on !PREEMPT_RT_FULL - ---help--- - Allows a block device to be used as cache for other devices; uses - a btree for indexing and the layout is optimized for SSDs. -diff -Nur linux-4.1.26.orig/drivers/md/dm.c linux-4.1.26/drivers/md/dm.c ---- linux-4.1.26.orig/drivers/md/dm.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/md/dm.c 2016-06-19 15:30:58.639295498 +0200 -@@ -2133,7 +2133,7 @@ - /* Establish tio->ti before queuing work (map_tio_request) */ - tio->ti = ti; - queue_kthread_work(&md->kworker, &tio->work); -- BUG_ON(!irqs_disabled()); -+ BUG_ON_NONRT(!irqs_disabled()); - } - - goto out; -diff -Nur linux-4.1.26.orig/drivers/md/raid5.c linux-4.1.26/drivers/md/raid5.c ---- linux-4.1.26.orig/drivers/md/raid5.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/md/raid5.c 2016-06-19 15:30:58.639295498 +0200 -@@ -1918,8 +1918,9 @@ - struct raid5_percpu *percpu; - unsigned long cpu; - -- cpu = get_cpu(); -+ cpu = get_cpu_light(); - percpu = per_cpu_ptr(conf->percpu, cpu); -+ spin_lock(&percpu->lock); - if (test_bit(STRIPE_OP_BIOFILL, &ops_request)) { - ops_run_biofill(sh); - overlap_clear++; -@@ -1975,7 +1976,8 @@ - if (test_and_clear_bit(R5_Overlap, &dev->flags)) - wake_up(&sh->raid_conf->wait_for_overlap); - } -- put_cpu(); -+ spin_unlock(&percpu->lock); -+ put_cpu_light(); - } - - static struct stripe_head *alloc_stripe(struct kmem_cache *sc, gfp_t gfp) -@@ -6375,6 +6377,7 @@ - __func__, cpu); - break; - } -+ spin_lock_init(&per_cpu_ptr(conf->percpu, cpu)->lock); - } - put_online_cpus(); - -diff -Nur linux-4.1.26.orig/drivers/md/raid5.h linux-4.1.26/drivers/md/raid5.h ---- linux-4.1.26.orig/drivers/md/raid5.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/md/raid5.h 2016-06-19 15:30:58.639295498 +0200 -@@ -495,6 +495,7 @@ - int recovery_disabled; - /* per cpu variables */ - struct raid5_percpu { -+ spinlock_t lock; /* Protection for -RT */ - struct page *spare_page; /* Used when checking P/Q in raid6 */ - struct flex_array *scribble; /* space for constructing buffer - * lists and performing address -diff -Nur linux-4.1.26.orig/drivers/misc/hwlat_detector.c linux-4.1.26/drivers/misc/hwlat_detector.c ---- linux-4.1.26.orig/drivers/misc/hwlat_detector.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/drivers/misc/hwlat_detector.c 2016-06-19 15:30:58.643295653 +0200 -@@ -0,0 +1,1240 @@ -+/* -+ * hwlat_detector.c - A simple Hardware Latency detector. -+ * -+ * Use this module to detect large system latencies induced by the behavior of -+ * certain underlying system hardware or firmware, independent of Linux itself. -+ * The code was developed originally to detect the presence of SMIs on Intel -+ * and AMD systems, although there is no dependency upon x86 herein. -+ * -+ * The classical example usage of this module is in detecting the presence of -+ * SMIs or System Management Interrupts on Intel and AMD systems. An SMI is a -+ * somewhat special form of hardware interrupt spawned from earlier CPU debug -+ * modes in which the (BIOS/EFI/etc.) firmware arranges for the South Bridge -+ * LPC (or other device) to generate a special interrupt under certain -+ * circumstances, for example, upon expiration of a special SMI timer device, -+ * due to certain external thermal readings, on certain I/O address accesses, -+ * and other situations. An SMI hits a special CPU pin, triggers a special -+ * SMI mode (complete with special memory map), and the OS is unaware. -+ * -+ * Although certain hardware-inducing latencies are necessary (for example, -+ * a modern system often requires an SMI handler for correct thermal control -+ * and remote management) they can wreak havoc upon any OS-level performance -+ * guarantees toward low-latency, especially when the OS is not even made -+ * aware of the presence of these interrupts. For this reason, we need a -+ * somewhat brute force mechanism to detect these interrupts. In this case, -+ * we do it by hogging all of the CPU(s) for configurable timer intervals, -+ * sampling the built-in CPU timer, looking for discontiguous readings. -+ * -+ * WARNING: This implementation necessarily introduces latencies. Therefore, -+ * you should NEVER use this module in a production environment -+ * requiring any kind of low-latency performance guarantee(s). -+ * -+ * Copyright (C) 2008-2009 Jon Masters, Red Hat, Inc. -+ * -+ * Includes useful feedback from Clark Williams -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define BUF_SIZE_DEFAULT 262144UL /* 8K*(sizeof(entry)) */ -+#define BUF_FLAGS (RB_FL_OVERWRITE) /* no block on full */ -+#define U64STR_SIZE 22 /* 20 digits max */ -+ -+#define VERSION "1.0.0" -+#define BANNER "hwlat_detector: " -+#define DRVNAME "hwlat_detector" -+#define DEFAULT_SAMPLE_WINDOW 1000000 /* 1s */ -+#define DEFAULT_SAMPLE_WIDTH 500000 /* 0.5s */ -+#define DEFAULT_LAT_THRESHOLD 10 /* 10us */ -+ -+/* Module metadata */ -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Jon Masters "); -+MODULE_DESCRIPTION("A simple hardware latency detector"); -+MODULE_VERSION(VERSION); -+ -+/* Module parameters */ -+ -+static int debug; -+static int enabled; -+static int threshold; -+ -+module_param(debug, int, 0); /* enable debug */ -+module_param(enabled, int, 0); /* enable detector */ -+module_param(threshold, int, 0); /* latency threshold */ -+ -+/* Buffering and sampling */ -+ -+static struct ring_buffer *ring_buffer; /* sample buffer */ -+static DEFINE_MUTEX(ring_buffer_mutex); /* lock changes */ -+static unsigned long buf_size = BUF_SIZE_DEFAULT; -+static struct task_struct *kthread; /* sampling thread */ -+ -+/* DebugFS filesystem entries */ -+ -+static struct dentry *debug_dir; /* debugfs directory */ -+static struct dentry *debug_max; /* maximum TSC delta */ -+static struct dentry *debug_count; /* total detect count */ -+static struct dentry *debug_sample_width; /* sample width us */ -+static struct dentry *debug_sample_window; /* sample window us */ -+static struct dentry *debug_sample; /* raw samples us */ -+static struct dentry *debug_threshold; /* threshold us */ -+static struct dentry *debug_enable; /* enable/disable */ -+ -+/* Individual samples and global state */ -+ -+struct sample; /* latency sample */ -+struct data; /* Global state */ -+ -+/* Sampling functions */ -+static int __buffer_add_sample(struct sample *sample); -+static struct sample *buffer_get_sample(struct sample *sample); -+ -+/* Threading and state */ -+static int kthread_fn(void *unused); -+static int start_kthread(void); -+static int stop_kthread(void); -+static void __reset_stats(void); -+static int init_stats(void); -+ -+/* Debugfs interface */ -+static ssize_t simple_data_read(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos, const u64 *entry); -+static ssize_t simple_data_write(struct file *filp, const char __user *ubuf, -+ size_t cnt, loff_t *ppos, u64 *entry); -+static int debug_sample_fopen(struct inode *inode, struct file *filp); -+static ssize_t debug_sample_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos); -+static int debug_sample_release(struct inode *inode, struct file *filp); -+static int debug_enable_fopen(struct inode *inode, struct file *filp); -+static ssize_t debug_enable_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos); -+static ssize_t debug_enable_fwrite(struct file *file, -+ const char __user *user_buffer, -+ size_t user_size, loff_t *offset); -+ -+/* Initialization functions */ -+static int init_debugfs(void); -+static void free_debugfs(void); -+static int detector_init(void); -+static void detector_exit(void); -+ -+/* Individual latency samples are stored here when detected and packed into -+ * the ring_buffer circular buffer, where they are overwritten when -+ * more than buf_size/sizeof(sample) samples are received. */ -+struct sample { -+ u64 seqnum; /* unique sequence */ -+ u64 duration; /* ktime delta */ -+ u64 outer_duration; /* ktime delta (outer loop) */ -+ struct timespec timestamp; /* wall time */ -+ unsigned long lost; -+}; -+ -+/* keep the global state somewhere. */ -+static struct data { -+ -+ struct mutex lock; /* protect changes */ -+ -+ u64 count; /* total since reset */ -+ u64 max_sample; /* max hardware latency */ -+ u64 threshold; /* sample threshold level */ -+ -+ u64 sample_window; /* total sampling window (on+off) */ -+ u64 sample_width; /* active sampling portion of window */ -+ -+ atomic_t sample_open; /* whether the sample file is open */ -+ -+ wait_queue_head_t wq; /* waitqeue for new sample values */ -+ -+} data; -+ -+/** -+ * __buffer_add_sample - add a new latency sample recording to the ring buffer -+ * @sample: The new latency sample value -+ * -+ * This receives a new latency sample and records it in a global ring buffer. -+ * No additional locking is used in this case. -+ */ -+static int __buffer_add_sample(struct sample *sample) -+{ -+ return ring_buffer_write(ring_buffer, -+ sizeof(struct sample), sample); -+} -+ -+/** -+ * buffer_get_sample - remove a hardware latency sample from the ring buffer -+ * @sample: Pre-allocated storage for the sample -+ * -+ * This retrieves a hardware latency sample from the global circular buffer -+ */ -+static struct sample *buffer_get_sample(struct sample *sample) -+{ -+ struct ring_buffer_event *e = NULL; -+ struct sample *s = NULL; -+ unsigned int cpu = 0; -+ -+ if (!sample) -+ return NULL; -+ -+ mutex_lock(&ring_buffer_mutex); -+ for_each_online_cpu(cpu) { -+ e = ring_buffer_consume(ring_buffer, cpu, NULL, &sample->lost); -+ if (e) -+ break; -+ } -+ -+ if (e) { -+ s = ring_buffer_event_data(e); -+ memcpy(sample, s, sizeof(struct sample)); -+ } else -+ sample = NULL; -+ mutex_unlock(&ring_buffer_mutex); -+ -+ return sample; -+} -+ -+#ifndef CONFIG_TRACING -+#define time_type ktime_t -+#define time_get() ktime_get() -+#define time_to_us(x) ktime_to_us(x) -+#define time_sub(a, b) ktime_sub(a, b) -+#define init_time(a, b) (a).tv64 = b -+#define time_u64(a) ((a).tv64) -+#else -+#define time_type u64 -+#define time_get() trace_clock_local() -+#define time_to_us(x) div_u64(x, 1000) -+#define time_sub(a, b) ((a) - (b)) -+#define init_time(a, b) (a = b) -+#define time_u64(a) a -+#endif -+/** -+ * get_sample - sample the CPU TSC and look for likely hardware latencies -+ * -+ * Used to repeatedly capture the CPU TSC (or similar), looking for potential -+ * hardware-induced latency. Called with interrupts disabled and with -+ * data.lock held. -+ */ -+static int get_sample(void) -+{ -+ time_type start, t1, t2, last_t2; -+ s64 diff, total = 0; -+ u64 sample = 0; -+ u64 outer_sample = 0; -+ int ret = -1; -+ -+ init_time(last_t2, 0); -+ start = time_get(); /* start timestamp */ -+ -+ do { -+ -+ t1 = time_get(); /* we'll look for a discontinuity */ -+ t2 = time_get(); -+ -+ if (time_u64(last_t2)) { -+ /* Check the delta from outer loop (t2 to next t1) */ -+ diff = time_to_us(time_sub(t1, last_t2)); -+ /* This shouldn't happen */ -+ if (diff < 0) { -+ pr_err(BANNER "time running backwards\n"); -+ goto out; -+ } -+ if (diff > outer_sample) -+ outer_sample = diff; -+ } -+ last_t2 = t2; -+ -+ total = time_to_us(time_sub(t2, start)); /* sample width */ -+ -+ /* This checks the inner loop (t1 to t2) */ -+ diff = time_to_us(time_sub(t2, t1)); /* current diff */ -+ -+ /* This shouldn't happen */ -+ if (diff < 0) { -+ pr_err(BANNER "time running backwards\n"); -+ goto out; -+ } -+ -+ if (diff > sample) -+ sample = diff; /* only want highest value */ -+ -+ } while (total <= data.sample_width); -+ -+ ret = 0; -+ -+ /* If we exceed the threshold value, we have found a hardware latency */ -+ if (sample > data.threshold || outer_sample > data.threshold) { -+ struct sample s; -+ -+ ret = 1; -+ -+ data.count++; -+ s.seqnum = data.count; -+ s.duration = sample; -+ s.outer_duration = outer_sample; -+ s.timestamp = CURRENT_TIME; -+ __buffer_add_sample(&s); -+ -+ /* Keep a running maximum ever recorded hardware latency */ -+ if (sample > data.max_sample) -+ data.max_sample = sample; -+ } -+ -+out: -+ return ret; -+} -+ -+/* -+ * kthread_fn - The CPU time sampling/hardware latency detection kernel thread -+ * @unused: A required part of the kthread API. -+ * -+ * Used to periodically sample the CPU TSC via a call to get_sample. We -+ * disable interrupts, which does (intentionally) introduce latency since we -+ * need to ensure nothing else might be running (and thus pre-empting). -+ * Obviously this should never be used in production environments. -+ * -+ * Currently this runs on which ever CPU it was scheduled on, but most -+ * real-worald hardware latency situations occur across several CPUs, -+ * but we might later generalize this if we find there are any actualy -+ * systems with alternate SMI delivery or other hardware latencies. -+ */ -+static int kthread_fn(void *unused) -+{ -+ int ret; -+ u64 interval; -+ -+ while (!kthread_should_stop()) { -+ -+ mutex_lock(&data.lock); -+ -+ local_irq_disable(); -+ ret = get_sample(); -+ local_irq_enable(); -+ -+ if (ret > 0) -+ wake_up(&data.wq); /* wake up reader(s) */ -+ -+ interval = data.sample_window - data.sample_width; -+ do_div(interval, USEC_PER_MSEC); /* modifies interval value */ -+ -+ mutex_unlock(&data.lock); -+ -+ if (msleep_interruptible(interval)) -+ break; -+ } -+ -+ return 0; -+} -+ -+/** -+ * start_kthread - Kick off the hardware latency sampling/detector kthread -+ * -+ * This starts a kernel thread that will sit and sample the CPU timestamp -+ * counter (TSC or similar) and look for potential hardware latencies. -+ */ -+static int start_kthread(void) -+{ -+ kthread = kthread_run(kthread_fn, NULL, -+ DRVNAME); -+ if (IS_ERR(kthread)) { -+ pr_err(BANNER "could not start sampling thread\n"); -+ enabled = 0; -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+/** -+ * stop_kthread - Inform the hardware latency samping/detector kthread to stop -+ * -+ * This kicks the running hardware latency sampling/detector kernel thread and -+ * tells it to stop sampling now. Use this on unload and at system shutdown. -+ */ -+static int stop_kthread(void) -+{ -+ int ret; -+ -+ ret = kthread_stop(kthread); -+ -+ return ret; -+} -+ -+/** -+ * __reset_stats - Reset statistics for the hardware latency detector -+ * -+ * We use data to store various statistics and global state. We call this -+ * function in order to reset those when "enable" is toggled on or off, and -+ * also at initialization. Should be called with data.lock held. -+ */ -+static void __reset_stats(void) -+{ -+ data.count = 0; -+ data.max_sample = 0; -+ ring_buffer_reset(ring_buffer); /* flush out old sample entries */ -+} -+ -+/** -+ * init_stats - Setup global state statistics for the hardware latency detector -+ * -+ * We use data to store various statistics and global state. We also use -+ * a global ring buffer (ring_buffer) to keep raw samples of detected hardware -+ * induced system latencies. This function initializes these structures and -+ * allocates the global ring buffer also. -+ */ -+static int init_stats(void) -+{ -+ int ret = -ENOMEM; -+ -+ mutex_init(&data.lock); -+ init_waitqueue_head(&data.wq); -+ atomic_set(&data.sample_open, 0); -+ -+ ring_buffer = ring_buffer_alloc(buf_size, BUF_FLAGS); -+ -+ if (WARN(!ring_buffer, KERN_ERR BANNER -+ "failed to allocate ring buffer!\n")) -+ goto out; -+ -+ __reset_stats(); -+ data.threshold = threshold ?: DEFAULT_LAT_THRESHOLD; /* threshold us */ -+ data.sample_window = DEFAULT_SAMPLE_WINDOW; /* window us */ -+ data.sample_width = DEFAULT_SAMPLE_WIDTH; /* width us */ -+ -+ ret = 0; -+ -+out: -+ return ret; -+ -+} -+ -+/* -+ * simple_data_read - Wrapper read function for global state debugfs entries -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * @entry: The entry to read from -+ * -+ * This function provides a generic read implementation for the global state -+ * "data" structure debugfs filesystem entries. It would be nice to use -+ * simple_attr_read directly, but we need to make sure that the data.lock -+ * is held during the actual read. -+ */ -+static ssize_t simple_data_read(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos, const u64 *entry) -+{ -+ char buf[U64STR_SIZE]; -+ u64 val = 0; -+ int len = 0; -+ -+ memset(buf, 0, sizeof(buf)); -+ -+ if (!entry) -+ return -EFAULT; -+ -+ mutex_lock(&data.lock); -+ val = *entry; -+ mutex_unlock(&data.lock); -+ -+ len = snprintf(buf, sizeof(buf), "%llu\n", (unsigned long long)val); -+ -+ return simple_read_from_buffer(ubuf, cnt, ppos, buf, len); -+ -+} -+ -+/* -+ * simple_data_write - Wrapper write function for global state debugfs entries -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to write value from -+ * @cnt: The maximum number of bytes to write -+ * @ppos: The current "file" position -+ * @entry: The entry to write to -+ * -+ * This function provides a generic write implementation for the global state -+ * "data" structure debugfs filesystem entries. It would be nice to use -+ * simple_attr_write directly, but we need to make sure that the data.lock -+ * is held during the actual write. -+ */ -+static ssize_t simple_data_write(struct file *filp, const char __user *ubuf, -+ size_t cnt, loff_t *ppos, u64 *entry) -+{ -+ char buf[U64STR_SIZE]; -+ int csize = min(cnt, sizeof(buf)); -+ u64 val = 0; -+ int err = 0; -+ -+ memset(buf, '\0', sizeof(buf)); -+ if (copy_from_user(buf, ubuf, csize)) -+ return -EFAULT; -+ -+ buf[U64STR_SIZE-1] = '\0'; /* just in case */ -+ err = kstrtoull(buf, 10, &val); -+ if (err) -+ return -EINVAL; -+ -+ mutex_lock(&data.lock); -+ *entry = val; -+ mutex_unlock(&data.lock); -+ -+ return csize; -+} -+ -+/** -+ * debug_count_fopen - Open function for "count" debugfs entry -+ * @inode: The in-kernel inode representation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function provides an open implementation for the "count" debugfs -+ * interface to the hardware latency detector. -+ */ -+static int debug_count_fopen(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+/** -+ * debug_count_fread - Read function for "count" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * -+ * This function provides a read implementation for the "count" debugfs -+ * interface to the hardware latency detector. Can be used to read the -+ * number of latency readings exceeding the configured threshold since -+ * the detector was last reset (e.g. by writing a zero into "count"). -+ */ -+static ssize_t debug_count_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ return simple_data_read(filp, ubuf, cnt, ppos, &data.count); -+} -+ -+/** -+ * debug_count_fwrite - Write function for "count" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that contains the value to write -+ * @cnt: The maximum number of bytes to write to "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function provides a write implementation for the "count" debugfs -+ * interface to the hardware latency detector. Can be used to write a -+ * desired value, especially to zero the total count. -+ */ -+static ssize_t debug_count_fwrite(struct file *filp, -+ const char __user *ubuf, -+ size_t cnt, -+ loff_t *ppos) -+{ -+ return simple_data_write(filp, ubuf, cnt, ppos, &data.count); -+} -+ -+/** -+ * debug_enable_fopen - Dummy open function for "enable" debugfs interface -+ * @inode: The in-kernel inode representation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function provides an open implementation for the "enable" debugfs -+ * interface to the hardware latency detector. -+ */ -+static int debug_enable_fopen(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+/** -+ * debug_enable_fread - Read function for "enable" debugfs interface -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * -+ * This function provides a read implementation for the "enable" debugfs -+ * interface to the hardware latency detector. Can be used to determine -+ * whether the detector is currently enabled ("0\n" or "1\n" returned). -+ */ -+static ssize_t debug_enable_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ char buf[4]; -+ -+ if ((cnt < sizeof(buf)) || (*ppos)) -+ return 0; -+ -+ buf[0] = enabled ? '1' : '0'; -+ buf[1] = '\n'; -+ buf[2] = '\0'; -+ if (copy_to_user(ubuf, buf, strlen(buf))) -+ return -EFAULT; -+ return *ppos = strlen(buf); -+} -+ -+/** -+ * debug_enable_fwrite - Write function for "enable" debugfs interface -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that contains the value to write -+ * @cnt: The maximum number of bytes to write to "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function provides a write implementation for the "enable" debugfs -+ * interface to the hardware latency detector. Can be used to enable or -+ * disable the detector, which will have the side-effect of possibly -+ * also resetting the global stats and kicking off the measuring -+ * kthread (on an enable) or the converse (upon a disable). -+ */ -+static ssize_t debug_enable_fwrite(struct file *filp, -+ const char __user *ubuf, -+ size_t cnt, -+ loff_t *ppos) -+{ -+ char buf[4]; -+ int csize = min(cnt, sizeof(buf)); -+ long val = 0; -+ int err = 0; -+ -+ memset(buf, '\0', sizeof(buf)); -+ if (copy_from_user(buf, ubuf, csize)) -+ return -EFAULT; -+ -+ buf[sizeof(buf)-1] = '\0'; /* just in case */ -+ err = kstrtoul(buf, 10, &val); -+ if (0 != err) -+ return -EINVAL; -+ -+ if (val) { -+ if (enabled) -+ goto unlock; -+ enabled = 1; -+ __reset_stats(); -+ if (start_kthread()) -+ return -EFAULT; -+ } else { -+ if (!enabled) -+ goto unlock; -+ enabled = 0; -+ err = stop_kthread(); -+ if (err) { -+ pr_err(BANNER "cannot stop kthread\n"); -+ return -EFAULT; -+ } -+ wake_up(&data.wq); /* reader(s) should return */ -+ } -+unlock: -+ return csize; -+} -+ -+/** -+ * debug_max_fopen - Open function for "max" debugfs entry -+ * @inode: The in-kernel inode representation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function provides an open implementation for the "max" debugfs -+ * interface to the hardware latency detector. -+ */ -+static int debug_max_fopen(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+/** -+ * debug_max_fread - Read function for "max" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * -+ * This function provides a read implementation for the "max" debugfs -+ * interface to the hardware latency detector. Can be used to determine -+ * the maximum latency value observed since it was last reset. -+ */ -+static ssize_t debug_max_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ return simple_data_read(filp, ubuf, cnt, ppos, &data.max_sample); -+} -+ -+/** -+ * debug_max_fwrite - Write function for "max" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that contains the value to write -+ * @cnt: The maximum number of bytes to write to "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function provides a write implementation for the "max" debugfs -+ * interface to the hardware latency detector. Can be used to reset the -+ * maximum or set it to some other desired value - if, then, subsequent -+ * measurements exceed this value, the maximum will be updated. -+ */ -+static ssize_t debug_max_fwrite(struct file *filp, -+ const char __user *ubuf, -+ size_t cnt, -+ loff_t *ppos) -+{ -+ return simple_data_write(filp, ubuf, cnt, ppos, &data.max_sample); -+} -+ -+ -+/** -+ * debug_sample_fopen - An open function for "sample" debugfs interface -+ * @inode: The in-kernel inode representation of this debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function handles opening the "sample" file within the hardware -+ * latency detector debugfs directory interface. This file is used to read -+ * raw samples from the global ring_buffer and allows the user to see a -+ * running latency history. Can be opened blocking or non-blocking, -+ * affecting whether it behaves as a buffer read pipe, or does not. -+ * Implements simple locking to prevent multiple simultaneous use. -+ */ -+static int debug_sample_fopen(struct inode *inode, struct file *filp) -+{ -+ if (!atomic_add_unless(&data.sample_open, 1, 1)) -+ return -EBUSY; -+ else -+ return 0; -+} -+ -+/** -+ * debug_sample_fread - A read function for "sample" debugfs interface -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that will contain the samples read -+ * @cnt: The maximum bytes to read from the debugfs "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function handles reading from the "sample" file within the hardware -+ * latency detector debugfs directory interface. This file is used to read -+ * raw samples from the global ring_buffer and allows the user to see a -+ * running latency history. By default this will block pending a new -+ * value written into the sample buffer, unless there are already a -+ * number of value(s) waiting in the buffer, or the sample file was -+ * previously opened in a non-blocking mode of operation. -+ */ -+static ssize_t debug_sample_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ int len = 0; -+ char buf[64]; -+ struct sample *sample = NULL; -+ -+ if (!enabled) -+ return 0; -+ -+ sample = kzalloc(sizeof(struct sample), GFP_KERNEL); -+ if (!sample) -+ return -ENOMEM; -+ -+ while (!buffer_get_sample(sample)) { -+ -+ DEFINE_WAIT(wait); -+ -+ if (filp->f_flags & O_NONBLOCK) { -+ len = -EAGAIN; -+ goto out; -+ } -+ -+ prepare_to_wait(&data.wq, &wait, TASK_INTERRUPTIBLE); -+ schedule(); -+ finish_wait(&data.wq, &wait); -+ -+ if (signal_pending(current)) { -+ len = -EINTR; -+ goto out; -+ } -+ -+ if (!enabled) { /* enable was toggled */ -+ len = 0; -+ goto out; -+ } -+ } -+ -+ len = snprintf(buf, sizeof(buf), "%010lu.%010lu\t%llu\t%llu\n", -+ sample->timestamp.tv_sec, -+ sample->timestamp.tv_nsec, -+ sample->duration, -+ sample->outer_duration); -+ -+ -+ /* handling partial reads is more trouble than it's worth */ -+ if (len > cnt) -+ goto out; -+ -+ if (copy_to_user(ubuf, buf, len)) -+ len = -EFAULT; -+ -+out: -+ kfree(sample); -+ return len; -+} -+ -+/** -+ * debug_sample_release - Release function for "sample" debugfs interface -+ * @inode: The in-kernel inode represenation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function completes the close of the debugfs interface "sample" file. -+ * Frees the sample_open "lock" so that other users may open the interface. -+ */ -+static int debug_sample_release(struct inode *inode, struct file *filp) -+{ -+ atomic_dec(&data.sample_open); -+ -+ return 0; -+} -+ -+/** -+ * debug_threshold_fopen - Open function for "threshold" debugfs entry -+ * @inode: The in-kernel inode representation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function provides an open implementation for the "threshold" debugfs -+ * interface to the hardware latency detector. -+ */ -+static int debug_threshold_fopen(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+/** -+ * debug_threshold_fread - Read function for "threshold" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * -+ * This function provides a read implementation for the "threshold" debugfs -+ * interface to the hardware latency detector. It can be used to determine -+ * the current threshold level at which a latency will be recorded in the -+ * global ring buffer, typically on the order of 10us. -+ */ -+static ssize_t debug_threshold_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ return simple_data_read(filp, ubuf, cnt, ppos, &data.threshold); -+} -+ -+/** -+ * debug_threshold_fwrite - Write function for "threshold" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that contains the value to write -+ * @cnt: The maximum number of bytes to write to "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function provides a write implementation for the "threshold" debugfs -+ * interface to the hardware latency detector. It can be used to configure -+ * the threshold level at which any subsequently detected latencies will -+ * be recorded into the global ring buffer. -+ */ -+static ssize_t debug_threshold_fwrite(struct file *filp, -+ const char __user *ubuf, -+ size_t cnt, -+ loff_t *ppos) -+{ -+ int ret; -+ -+ ret = simple_data_write(filp, ubuf, cnt, ppos, &data.threshold); -+ -+ if (enabled) -+ wake_up_process(kthread); -+ -+ return ret; -+} -+ -+/** -+ * debug_width_fopen - Open function for "width" debugfs entry -+ * @inode: The in-kernel inode representation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function provides an open implementation for the "width" debugfs -+ * interface to the hardware latency detector. -+ */ -+static int debug_width_fopen(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+/** -+ * debug_width_fread - Read function for "width" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * -+ * This function provides a read implementation for the "width" debugfs -+ * interface to the hardware latency detector. It can be used to determine -+ * for how many us of the total window us we will actively sample for any -+ * hardware-induced latecy periods. Obviously, it is not possible to -+ * sample constantly and have the system respond to a sample reader, or, -+ * worse, without having the system appear to have gone out to lunch. -+ */ -+static ssize_t debug_width_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ return simple_data_read(filp, ubuf, cnt, ppos, &data.sample_width); -+} -+ -+/** -+ * debug_width_fwrite - Write function for "width" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that contains the value to write -+ * @cnt: The maximum number of bytes to write to "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function provides a write implementation for the "width" debugfs -+ * interface to the hardware latency detector. It can be used to configure -+ * for how many us of the total window us we will actively sample for any -+ * hardware-induced latency periods. Obviously, it is not possible to -+ * sample constantly and have the system respond to a sample reader, or, -+ * worse, without having the system appear to have gone out to lunch. It -+ * is enforced that width is less that the total window size. -+ */ -+static ssize_t debug_width_fwrite(struct file *filp, -+ const char __user *ubuf, -+ size_t cnt, -+ loff_t *ppos) -+{ -+ char buf[U64STR_SIZE]; -+ int csize = min(cnt, sizeof(buf)); -+ u64 val = 0; -+ int err = 0; -+ -+ memset(buf, '\0', sizeof(buf)); -+ if (copy_from_user(buf, ubuf, csize)) -+ return -EFAULT; -+ -+ buf[U64STR_SIZE-1] = '\0'; /* just in case */ -+ err = kstrtoull(buf, 10, &val); -+ if (0 != err) -+ return -EINVAL; -+ -+ mutex_lock(&data.lock); -+ if (val < data.sample_window) -+ data.sample_width = val; -+ else { -+ mutex_unlock(&data.lock); -+ return -EINVAL; -+ } -+ mutex_unlock(&data.lock); -+ -+ if (enabled) -+ wake_up_process(kthread); -+ -+ return csize; -+} -+ -+/** -+ * debug_window_fopen - Open function for "window" debugfs entry -+ * @inode: The in-kernel inode representation of the debugfs "file" -+ * @filp: The active open file structure for the debugfs "file" -+ * -+ * This function provides an open implementation for the "window" debugfs -+ * interface to the hardware latency detector. The window is the total time -+ * in us that will be considered one sample period. Conceptually, windows -+ * occur back-to-back and contain a sample width period during which -+ * actual sampling occurs. -+ */ -+static int debug_window_fopen(struct inode *inode, struct file *filp) -+{ -+ return 0; -+} -+ -+/** -+ * debug_window_fread - Read function for "window" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The userspace provided buffer to read value into -+ * @cnt: The maximum number of bytes to read -+ * @ppos: The current "file" position -+ * -+ * This function provides a read implementation for the "window" debugfs -+ * interface to the hardware latency detector. The window is the total time -+ * in us that will be considered one sample period. Conceptually, windows -+ * occur back-to-back and contain a sample width period during which -+ * actual sampling occurs. Can be used to read the total window size. -+ */ -+static ssize_t debug_window_fread(struct file *filp, char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ return simple_data_read(filp, ubuf, cnt, ppos, &data.sample_window); -+} -+ -+/** -+ * debug_window_fwrite - Write function for "window" debugfs entry -+ * @filp: The active open file structure for the debugfs "file" -+ * @ubuf: The user buffer that contains the value to write -+ * @cnt: The maximum number of bytes to write to "file" -+ * @ppos: The current position in the debugfs "file" -+ * -+ * This function provides a write implementation for the "window" debufds -+ * interface to the hardware latency detetector. The window is the total time -+ * in us that will be considered one sample period. Conceptually, windows -+ * occur back-to-back and contain a sample width period during which -+ * actual sampling occurs. Can be used to write a new total window size. It -+ * is enfoced that any value written must be greater than the sample width -+ * size, or an error results. -+ */ -+static ssize_t debug_window_fwrite(struct file *filp, -+ const char __user *ubuf, -+ size_t cnt, -+ loff_t *ppos) -+{ -+ char buf[U64STR_SIZE]; -+ int csize = min(cnt, sizeof(buf)); -+ u64 val = 0; -+ int err = 0; -+ -+ memset(buf, '\0', sizeof(buf)); -+ if (copy_from_user(buf, ubuf, csize)) -+ return -EFAULT; -+ -+ buf[U64STR_SIZE-1] = '\0'; /* just in case */ -+ err = kstrtoull(buf, 10, &val); -+ if (0 != err) -+ return -EINVAL; -+ -+ mutex_lock(&data.lock); -+ if (data.sample_width < val) -+ data.sample_window = val; -+ else { -+ mutex_unlock(&data.lock); -+ return -EINVAL; -+ } -+ mutex_unlock(&data.lock); -+ -+ return csize; -+} -+ -+/* -+ * Function pointers for the "count" debugfs file operations -+ */ -+static const struct file_operations count_fops = { -+ .open = debug_count_fopen, -+ .read = debug_count_fread, -+ .write = debug_count_fwrite, -+ .owner = THIS_MODULE, -+}; -+ -+/* -+ * Function pointers for the "enable" debugfs file operations -+ */ -+static const struct file_operations enable_fops = { -+ .open = debug_enable_fopen, -+ .read = debug_enable_fread, -+ .write = debug_enable_fwrite, -+ .owner = THIS_MODULE, -+}; -+ -+/* -+ * Function pointers for the "max" debugfs file operations -+ */ -+static const struct file_operations max_fops = { -+ .open = debug_max_fopen, -+ .read = debug_max_fread, -+ .write = debug_max_fwrite, -+ .owner = THIS_MODULE, -+}; -+ -+/* -+ * Function pointers for the "sample" debugfs file operations -+ */ -+static const struct file_operations sample_fops = { -+ .open = debug_sample_fopen, -+ .read = debug_sample_fread, -+ .release = debug_sample_release, -+ .owner = THIS_MODULE, -+}; -+ -+/* -+ * Function pointers for the "threshold" debugfs file operations -+ */ -+static const struct file_operations threshold_fops = { -+ .open = debug_threshold_fopen, -+ .read = debug_threshold_fread, -+ .write = debug_threshold_fwrite, -+ .owner = THIS_MODULE, -+}; -+ -+/* -+ * Function pointers for the "width" debugfs file operations -+ */ -+static const struct file_operations width_fops = { -+ .open = debug_width_fopen, -+ .read = debug_width_fread, -+ .write = debug_width_fwrite, -+ .owner = THIS_MODULE, -+}; -+ -+/* -+ * Function pointers for the "window" debugfs file operations -+ */ -+static const struct file_operations window_fops = { -+ .open = debug_window_fopen, -+ .read = debug_window_fread, -+ .write = debug_window_fwrite, -+ .owner = THIS_MODULE, -+}; -+ -+/** -+ * init_debugfs - A function to initialize the debugfs interface files -+ * -+ * This function creates entries in debugfs for "hwlat_detector", including -+ * files to read values from the detector, current samples, and the -+ * maximum sample that has been captured since the hardware latency -+ * dectector was started. -+ */ -+static int init_debugfs(void) -+{ -+ int ret = -ENOMEM; -+ -+ debug_dir = debugfs_create_dir(DRVNAME, NULL); -+ if (!debug_dir) -+ goto err_debug_dir; -+ -+ debug_sample = debugfs_create_file("sample", 0444, -+ debug_dir, NULL, -+ &sample_fops); -+ if (!debug_sample) -+ goto err_sample; -+ -+ debug_count = debugfs_create_file("count", 0444, -+ debug_dir, NULL, -+ &count_fops); -+ if (!debug_count) -+ goto err_count; -+ -+ debug_max = debugfs_create_file("max", 0444, -+ debug_dir, NULL, -+ &max_fops); -+ if (!debug_max) -+ goto err_max; -+ -+ debug_sample_window = debugfs_create_file("window", 0644, -+ debug_dir, NULL, -+ &window_fops); -+ if (!debug_sample_window) -+ goto err_window; -+ -+ debug_sample_width = debugfs_create_file("width", 0644, -+ debug_dir, NULL, -+ &width_fops); -+ if (!debug_sample_width) -+ goto err_width; -+ -+ debug_threshold = debugfs_create_file("threshold", 0644, -+ debug_dir, NULL, -+ &threshold_fops); -+ if (!debug_threshold) -+ goto err_threshold; -+ -+ debug_enable = debugfs_create_file("enable", 0644, -+ debug_dir, &enabled, -+ &enable_fops); -+ if (!debug_enable) -+ goto err_enable; -+ -+ else { -+ ret = 0; -+ goto out; -+ } -+ -+err_enable: -+ debugfs_remove(debug_threshold); -+err_threshold: -+ debugfs_remove(debug_sample_width); -+err_width: -+ debugfs_remove(debug_sample_window); -+err_window: -+ debugfs_remove(debug_max); -+err_max: -+ debugfs_remove(debug_count); -+err_count: -+ debugfs_remove(debug_sample); -+err_sample: -+ debugfs_remove(debug_dir); -+err_debug_dir: -+out: -+ return ret; -+} -+ -+/** -+ * free_debugfs - A function to cleanup the debugfs file interface -+ */ -+static void free_debugfs(void) -+{ -+ /* could also use a debugfs_remove_recursive */ -+ debugfs_remove(debug_enable); -+ debugfs_remove(debug_threshold); -+ debugfs_remove(debug_sample_width); -+ debugfs_remove(debug_sample_window); -+ debugfs_remove(debug_max); -+ debugfs_remove(debug_count); -+ debugfs_remove(debug_sample); -+ debugfs_remove(debug_dir); -+} -+ -+/** -+ * detector_init - Standard module initialization code -+ */ -+static int detector_init(void) -+{ -+ int ret = -ENOMEM; -+ -+ pr_info(BANNER "version %s\n", VERSION); -+ -+ ret = init_stats(); -+ if (0 != ret) -+ goto out; -+ -+ ret = init_debugfs(); -+ if (0 != ret) -+ goto err_stats; -+ -+ if (enabled) -+ ret = start_kthread(); -+ -+ goto out; -+ -+err_stats: -+ ring_buffer_free(ring_buffer); -+out: -+ return ret; -+ -+} -+ -+/** -+ * detector_exit - Standard module cleanup code -+ */ -+static void detector_exit(void) -+{ -+ int err; -+ -+ if (enabled) { -+ enabled = 0; -+ err = stop_kthread(); -+ if (err) -+ pr_err(BANNER "cannot stop kthread\n"); -+ } -+ -+ free_debugfs(); -+ ring_buffer_free(ring_buffer); /* free up the ring buffer */ -+ -+} -+ -+module_init(detector_init); -+module_exit(detector_exit); -diff -Nur linux-4.1.26.orig/drivers/misc/Kconfig linux-4.1.26/drivers/misc/Kconfig ---- linux-4.1.26.orig/drivers/misc/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/misc/Kconfig 2016-06-19 15:30:58.639295498 +0200 -@@ -54,6 +54,7 @@ - config ATMEL_TCLIB - bool "Atmel AT32/AT91 Timer/Counter Library" - depends on (AVR32 || ARCH_AT91) -+ default y if PREEMPT_RT_FULL - help - Select this if you want a library to allocate the Timer/Counter - blocks found on many Atmel processors. This facilitates using -@@ -69,8 +70,7 @@ - are combined to make a single 32-bit timer. - - When GENERIC_CLOCKEVENTS is defined, the third timer channel -- may be used as a clock event device supporting oneshot mode -- (delays of up to two seconds) based on the 32 KiHz clock. -+ may be used as a clock event device supporting oneshot mode. - - config ATMEL_TCB_CLKSRC_BLOCK - int -@@ -84,6 +84,15 @@ - TC can be used for other purposes, such as PWM generation and - interval timing. - -+config ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK -+ bool "TC Block use 32 KiHz clock" -+ depends on ATMEL_TCB_CLKSRC -+ default y if !PREEMPT_RT_FULL -+ help -+ Select this to use 32 KiHz base clock rate as TC block clock -+ source for clock events. -+ -+ - config DUMMY_IRQ - tristate "Dummy IRQ handler" - default n -@@ -113,6 +122,35 @@ - for information on the specific driver level and support statement - for your IBM server. - -+config HWLAT_DETECTOR -+ tristate "Testing module to detect hardware-induced latencies" -+ depends on DEBUG_FS -+ depends on RING_BUFFER -+ default m -+ ---help--- -+ A simple hardware latency detector. Use this module to detect -+ large latencies introduced by the behavior of the underlying -+ system firmware external to Linux. We do this using periodic -+ use of stop_machine to grab all available CPUs and measure -+ for unexplainable gaps in the CPU timestamp counter(s). By -+ default, the module is not enabled until the "enable" file -+ within the "hwlat_detector" debugfs directory is toggled. -+ -+ This module is often used to detect SMI (System Management -+ Interrupts) on x86 systems, though is not x86 specific. To -+ this end, we default to using a sample window of 1 second, -+ during which we will sample for 0.5 seconds. If an SMI or -+ similar event occurs during that time, it is recorded -+ into an 8K samples global ring buffer until retreived. -+ -+ WARNING: This software should never be enabled (it can be built -+ but should not be turned on after it is loaded) in a production -+ environment where high latencies are a concern since the -+ sampling mechanism actually introduces latencies for -+ regular tasks while the CPU(s) are being held. -+ -+ If unsure, say N -+ - config PHANTOM - tristate "Sensable PHANToM (PCI)" - depends on PCI -diff -Nur linux-4.1.26.orig/drivers/misc/Makefile linux-4.1.26/drivers/misc/Makefile ---- linux-4.1.26.orig/drivers/misc/Makefile 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/misc/Makefile 2016-06-19 15:30:58.639295498 +0200 -@@ -38,6 +38,7 @@ - obj-$(CONFIG_HMC6352) += hmc6352.o - obj-y += eeprom/ - obj-y += cb710/ -+obj-$(CONFIG_HWLAT_DETECTOR) += hwlat_detector.o - obj-$(CONFIG_SPEAR13XX_PCIE_GADGET) += spear13xx_pcie_gadget.o - obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o - obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o -diff -Nur linux-4.1.26.orig/drivers/mmc/host/mmci.c linux-4.1.26/drivers/mmc/host/mmci.c ---- linux-4.1.26.orig/drivers/mmc/host/mmci.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/mmc/host/mmci.c 2016-06-19 15:30:58.643295653 +0200 -@@ -1155,15 +1155,12 @@ - struct sg_mapping_iter *sg_miter = &host->sg_miter; - struct variant_data *variant = host->variant; - void __iomem *base = host->base; -- unsigned long flags; - u32 status; - - status = readl(base + MMCISTATUS); - - dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); - -- local_irq_save(flags); -- - do { - unsigned int remain, len; - char *buffer; -@@ -1203,8 +1200,6 @@ - - sg_miter_stop(sg_miter); - -- local_irq_restore(flags); -- - /* - * If we have less than the fifo 'half-full' threshold to transfer, - * trigger a PIO interrupt as soon as any data is available. -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/3com/3c59x.c linux-4.1.26/drivers/net/ethernet/3com/3c59x.c ---- linux-4.1.26.orig/drivers/net/ethernet/3com/3c59x.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/3com/3c59x.c 2016-06-19 15:30:58.643295653 +0200 -@@ -842,9 +842,9 @@ - { - struct vortex_private *vp = netdev_priv(dev); - unsigned long flags; -- local_irq_save(flags); -+ local_irq_save_nort(flags); - (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - #endif - -@@ -1916,12 +1916,12 @@ - * Block interrupts because vortex_interrupt does a bare spin_lock() - */ - unsigned long flags; -- local_irq_save(flags); -+ local_irq_save_nort(flags); - if (vp->full_bus_master_tx) - boomerang_interrupt(dev->irq, dev); - else - vortex_interrupt(dev->irq, dev); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - } - -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1c/atl1c_main.c linux-4.1.26/drivers/net/ethernet/atheros/atl1c/atl1c_main.c ---- linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1c/atl1c_main.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/atheros/atl1c/atl1c_main.c 2016-06-19 15:30:58.643295653 +0200 -@@ -2212,11 +2212,7 @@ - } - - tpd_req = atl1c_cal_tpd_req(skb); -- if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { -- if (netif_msg_pktdata(adapter)) -- dev_info(&adapter->pdev->dev, "tx locked\n"); -- return NETDEV_TX_LOCKED; -- } -+ spin_lock_irqsave(&adapter->tx_lock, flags); - - if (atl1c_tpd_avail(adapter, type) < tpd_req) { - /* no enough descriptor, just stop queue */ -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1e/atl1e_main.c linux-4.1.26/drivers/net/ethernet/atheros/atl1e/atl1e_main.c ---- linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1e/atl1e_main.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/atheros/atl1e/atl1e_main.c 2016-06-19 15:30:58.643295653 +0200 -@@ -1880,8 +1880,7 @@ - return NETDEV_TX_OK; - } - tpd_req = atl1e_cal_tdp_req(skb); -- if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) -- return NETDEV_TX_LOCKED; -+ spin_lock_irqsave(&adapter->tx_lock, flags); - - if (atl1e_tpd_avail(adapter) < tpd_req) { - /* no enough descriptor, just stop queue */ -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/chelsio/cxgb/sge.c linux-4.1.26/drivers/net/ethernet/chelsio/cxgb/sge.c ---- linux-4.1.26.orig/drivers/net/ethernet/chelsio/cxgb/sge.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/chelsio/cxgb/sge.c 2016-06-19 15:30:58.643295653 +0200 -@@ -1664,8 +1664,7 @@ - struct cmdQ *q = &sge->cmdQ[qid]; - unsigned int credits, pidx, genbit, count, use_sched_skb = 0; - -- if (!spin_trylock(&q->lock)) -- return NETDEV_TX_LOCKED; -+ spin_lock(&q->lock); - - reclaim_completed_tx(sge, q); - -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/freescale/gianfar.c linux-4.1.26/drivers/net/ethernet/freescale/gianfar.c ---- linux-4.1.26.orig/drivers/net/ethernet/freescale/gianfar.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/freescale/gianfar.c 2016-06-19 15:30:58.643295653 +0200 -@@ -1540,7 +1540,7 @@ - - if (netif_running(ndev)) { - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - lock_tx_qs(priv); - - gfar_halt_nodisable(priv); -@@ -1556,7 +1556,7 @@ - gfar_write(®s->maccfg1, tempval); - - unlock_tx_qs(priv); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - disable_napi(priv); - -@@ -1598,7 +1598,7 @@ - /* Disable Magic Packet mode, in case something - * else woke us up. - */ -- local_irq_save(flags); -+ local_irq_save_nort(flags); - lock_tx_qs(priv); - - tempval = gfar_read(®s->maccfg2); -@@ -1608,7 +1608,7 @@ - gfar_start(priv); - - unlock_tx_qs(priv); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - netif_device_attach(ndev); - -@@ -3418,14 +3418,14 @@ - dev->stats.tx_dropped++; - atomic64_inc(&priv->extra_stats.tx_underrun); - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - lock_tx_qs(priv); - - /* Reactivate the Tx Queues */ - gfar_write(®s->tstat, gfargrp->tstat); - - unlock_tx_qs(priv); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - netif_dbg(priv, tx_err, dev, "Transmit Error\n"); - } -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/neterion/s2io.c linux-4.1.26/drivers/net/ethernet/neterion/s2io.c ---- linux-4.1.26.orig/drivers/net/ethernet/neterion/s2io.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/neterion/s2io.c 2016-06-19 15:30:58.647295807 +0200 -@@ -4084,12 +4084,7 @@ - [skb->priority & (MAX_TX_FIFOS - 1)]; - fifo = &mac_control->fifos[queue]; - -- if (do_spin_lock) -- spin_lock_irqsave(&fifo->tx_lock, flags); -- else { -- if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags))) -- return NETDEV_TX_LOCKED; -- } -+ spin_lock_irqsave(&fifo->tx_lock, flags); - - if (sp->config.multiq) { - if (__netif_subqueue_stopped(dev, fifo->fifo_no)) { -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c linux-4.1.26/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c ---- linux-4.1.26.orig/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c 2016-06-19 15:30:58.647295807 +0200 -@@ -2137,10 +2137,8 @@ - struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; - unsigned long flags; - -- if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags)) { -- /* Collision - tell upper layer to requeue */ -- return NETDEV_TX_LOCKED; -- } -+ spin_lock_irqsave(&tx_ring->tx_lock, flags); -+ - if (unlikely(!PCH_GBE_DESC_UNUSED(tx_ring))) { - netif_stop_queue(netdev); - spin_unlock_irqrestore(&tx_ring->tx_lock, flags); -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/realtek/8139too.c linux-4.1.26/drivers/net/ethernet/realtek/8139too.c ---- linux-4.1.26.orig/drivers/net/ethernet/realtek/8139too.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/realtek/8139too.c 2016-06-19 15:30:58.647295807 +0200 -@@ -2229,7 +2229,7 @@ - struct rtl8139_private *tp = netdev_priv(dev); - const int irq = tp->pci_dev->irq; - -- disable_irq(irq); -+ disable_irq_nosync(irq); - rtl8139_interrupt(irq, dev); - enable_irq(irq); - } -diff -Nur linux-4.1.26.orig/drivers/net/ethernet/tehuti/tehuti.c linux-4.1.26/drivers/net/ethernet/tehuti/tehuti.c ---- linux-4.1.26.orig/drivers/net/ethernet/tehuti/tehuti.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/ethernet/tehuti/tehuti.c 2016-06-19 15:30:58.647295807 +0200 -@@ -1629,13 +1629,8 @@ - unsigned long flags; - - ENTER; -- local_irq_save(flags); -- if (!spin_trylock(&priv->tx_lock)) { -- local_irq_restore(flags); -- DBG("%s[%s]: TX locked, returning NETDEV_TX_LOCKED\n", -- BDX_DRV_NAME, ndev->name); -- return NETDEV_TX_LOCKED; -- } -+ -+ spin_lock_irqsave(&priv->tx_lock, flags); - - /* build tx descriptor */ - BDX_ASSERT(f->m.wptr >= f->m.memsz); /* started with valid wptr */ -diff -Nur linux-4.1.26.orig/drivers/net/rionet.c linux-4.1.26/drivers/net/rionet.c ---- linux-4.1.26.orig/drivers/net/rionet.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/rionet.c 2016-06-19 15:30:58.647295807 +0200 -@@ -174,11 +174,7 @@ - unsigned long flags; - int add_num = 1; - -- local_irq_save(flags); -- if (!spin_trylock(&rnet->tx_lock)) { -- local_irq_restore(flags); -- return NETDEV_TX_LOCKED; -- } -+ spin_lock_irqsave(&rnet->tx_lock, flags); - - if (is_multicast_ether_addr(eth->h_dest)) - add_num = nets[rnet->mport->id].nact; -diff -Nur linux-4.1.26.orig/drivers/net/wireless/orinoco/orinoco_usb.c linux-4.1.26/drivers/net/wireless/orinoco/orinoco_usb.c ---- linux-4.1.26.orig/drivers/net/wireless/orinoco/orinoco_usb.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/net/wireless/orinoco/orinoco_usb.c 2016-06-19 15:30:58.647295807 +0200 -@@ -697,7 +697,7 @@ - while (!ctx->done.done && msecs--) - udelay(1000); - } else { -- wait_event_interruptible(ctx->done.wait, -+ swait_event_interruptible(ctx->done.wait, - ctx->done.done); - } - break; -diff -Nur linux-4.1.26.orig/drivers/pci/access.c linux-4.1.26/drivers/pci/access.c ---- linux-4.1.26.orig/drivers/pci/access.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/pci/access.c 2016-06-19 15:30:58.647295807 +0200 -@@ -561,7 +561,7 @@ - WARN_ON(!dev->block_cfg_access); - - dev->block_cfg_access = 0; -- wake_up_all(&pci_cfg_wait); -+ wake_up_all_locked(&pci_cfg_wait); - raw_spin_unlock_irqrestore(&pci_lock, flags); - } - EXPORT_SYMBOL_GPL(pci_cfg_access_unlock); -diff -Nur linux-4.1.26.orig/drivers/scsi/fcoe/fcoe.c linux-4.1.26/drivers/scsi/fcoe/fcoe.c ---- linux-4.1.26.orig/drivers/scsi/fcoe/fcoe.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/scsi/fcoe/fcoe.c 2016-06-19 15:30:58.647295807 +0200 -@@ -1287,7 +1287,7 @@ - struct sk_buff *skb; - #ifdef CONFIG_SMP - struct fcoe_percpu_s *p0; -- unsigned targ_cpu = get_cpu(); -+ unsigned targ_cpu = get_cpu_light(); - #endif /* CONFIG_SMP */ - - FCOE_DBG("Destroying receive thread for CPU %d\n", cpu); -@@ -1343,7 +1343,7 @@ - kfree_skb(skb); - spin_unlock_bh(&p->fcoe_rx_list.lock); - } -- put_cpu(); -+ put_cpu_light(); - #else - /* - * This a non-SMP scenario where the singular Rx thread is -@@ -1567,11 +1567,11 @@ - static int fcoe_alloc_paged_crc_eof(struct sk_buff *skb, int tlen) - { - struct fcoe_percpu_s *fps; -- int rc; -+ int rc, cpu = get_cpu_light(); - -- fps = &get_cpu_var(fcoe_percpu); -+ fps = &per_cpu(fcoe_percpu, cpu); - rc = fcoe_get_paged_crc_eof(skb, tlen, fps); -- put_cpu_var(fcoe_percpu); -+ put_cpu_light(); - - return rc; - } -@@ -1767,11 +1767,11 @@ - return 0; - } - -- stats = per_cpu_ptr(lport->stats, get_cpu()); -+ stats = per_cpu_ptr(lport->stats, get_cpu_light()); - stats->InvalidCRCCount++; - if (stats->InvalidCRCCount < 5) - printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); -- put_cpu(); -+ put_cpu_light(); - return -EINVAL; - } - -@@ -1847,13 +1847,13 @@ - goto drop; - - if (!fcoe_filter_frames(lport, fp)) { -- put_cpu(); -+ put_cpu_light(); - fc_exch_recv(lport, fp); - return; - } - drop: - stats->ErrorFrames++; -- put_cpu(); -+ put_cpu_light(); - kfree_skb(skb); - } - -diff -Nur linux-4.1.26.orig/drivers/scsi/fcoe/fcoe_ctlr.c linux-4.1.26/drivers/scsi/fcoe/fcoe_ctlr.c ---- linux-4.1.26.orig/drivers/scsi/fcoe/fcoe_ctlr.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/scsi/fcoe/fcoe_ctlr.c 2016-06-19 15:30:58.651295961 +0200 -@@ -831,7 +831,7 @@ - - INIT_LIST_HEAD(&del_list); - -- stats = per_cpu_ptr(fip->lp->stats, get_cpu()); -+ stats = per_cpu_ptr(fip->lp->stats, get_cpu_light()); - - list_for_each_entry_safe(fcf, next, &fip->fcfs, list) { - deadline = fcf->time + fcf->fka_period + fcf->fka_period / 2; -@@ -867,7 +867,7 @@ - sel_time = fcf->time; - } - } -- put_cpu(); -+ put_cpu_light(); - - list_for_each_entry_safe(fcf, next, &del_list, list) { - /* Removes fcf from current list */ -diff -Nur linux-4.1.26.orig/drivers/scsi/libfc/fc_exch.c linux-4.1.26/drivers/scsi/libfc/fc_exch.c ---- linux-4.1.26.orig/drivers/scsi/libfc/fc_exch.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/scsi/libfc/fc_exch.c 2016-06-19 15:30:58.651295961 +0200 -@@ -814,10 +814,10 @@ - } - memset(ep, 0, sizeof(*ep)); - -- cpu = get_cpu(); -+ cpu = get_cpu_light(); - pool = per_cpu_ptr(mp->pool, cpu); - spin_lock_bh(&pool->lock); -- put_cpu(); -+ put_cpu_light(); - - /* peek cache of free slot */ - if (pool->left != FC_XID_UNKNOWN) { -diff -Nur linux-4.1.26.orig/drivers/scsi/libsas/sas_ata.c linux-4.1.26/drivers/scsi/libsas/sas_ata.c ---- linux-4.1.26.orig/drivers/scsi/libsas/sas_ata.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/scsi/libsas/sas_ata.c 2016-06-19 15:30:58.651295961 +0200 -@@ -190,7 +190,7 @@ - /* TODO: audit callers to ensure they are ready for qc_issue to - * unconditionally re-enable interrupts - */ -- local_irq_save(flags); -+ local_irq_save_nort(flags); - spin_unlock(ap->lock); - - /* If the device fell off, no sense in issuing commands */ -@@ -255,7 +255,7 @@ - - out: - spin_lock(ap->lock); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - return ret; - } - -diff -Nur linux-4.1.26.orig/drivers/scsi/qla2xxx/qla_inline.h linux-4.1.26/drivers/scsi/qla2xxx/qla_inline.h ---- linux-4.1.26.orig/drivers/scsi/qla2xxx/qla_inline.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/scsi/qla2xxx/qla_inline.h 2016-06-19 15:30:58.651295961 +0200 -@@ -59,12 +59,12 @@ - { - unsigned long flags; - struct qla_hw_data *ha = rsp->hw; -- local_irq_save(flags); -+ local_irq_save_nort(flags); - if (IS_P3P_TYPE(ha)) - qla82xx_poll(0, rsp); - else - ha->isp_ops->intr_handler(0, rsp); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - - static inline uint8_t * -diff -Nur linux-4.1.26.orig/drivers/thermal/x86_pkg_temp_thermal.c linux-4.1.26/drivers/thermal/x86_pkg_temp_thermal.c ---- linux-4.1.26.orig/drivers/thermal/x86_pkg_temp_thermal.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/thermal/x86_pkg_temp_thermal.c 2016-06-19 15:30:58.651295961 +0200 -@@ -29,6 +29,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -352,7 +353,7 @@ - } - } - --static int pkg_temp_thermal_platform_thermal_notify(__u64 msr_val) -+static void platform_thermal_notify_work(struct swork_event *event) - { - unsigned long flags; - int cpu = smp_processor_id(); -@@ -369,7 +370,7 @@ - pkg_work_scheduled[phy_id]) { - disable_pkg_thres_interrupt(); - spin_unlock_irqrestore(&pkg_work_lock, flags); -- return -EINVAL; -+ return; - } - pkg_work_scheduled[phy_id] = 1; - spin_unlock_irqrestore(&pkg_work_lock, flags); -@@ -378,9 +379,48 @@ - schedule_delayed_work_on(cpu, - &per_cpu(pkg_temp_thermal_threshold_work, cpu), - msecs_to_jiffies(notify_delay_ms)); -+} -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+static struct swork_event notify_work; -+ -+static int thermal_notify_work_init(void) -+{ -+ int err; -+ -+ err = swork_get(); -+ if (err) -+ return err; -+ -+ INIT_SWORK(¬ify_work, platform_thermal_notify_work); - return 0; - } - -+static void thermal_notify_work_cleanup(void) -+{ -+ swork_put(); -+} -+ -+static int pkg_temp_thermal_platform_thermal_notify(__u64 msr_val) -+{ -+ swork_queue(¬ify_work); -+ return 0; -+} -+ -+#else /* !CONFIG_PREEMPT_RT_FULL */ -+ -+static int thermal_notify_work_init(void) { return 0; } -+ -+static void thermal_notify_work_cleanup(void) { } -+ -+static int pkg_temp_thermal_platform_thermal_notify(__u64 msr_val) -+{ -+ platform_thermal_notify_work(NULL); -+ -+ return 0; -+} -+#endif /* CONFIG_PREEMPT_RT_FULL */ -+ - static int find_siblings_cpu(int cpu) - { - int i; -@@ -584,6 +624,9 @@ - if (!x86_match_cpu(pkg_temp_thermal_ids)) - return -ENODEV; - -+ if (!thermal_notify_work_init()) -+ return -ENODEV; -+ - spin_lock_init(&pkg_work_lock); - platform_thermal_package_notify = - pkg_temp_thermal_platform_thermal_notify; -@@ -608,7 +651,7 @@ - kfree(pkg_work_scheduled); - platform_thermal_package_notify = NULL; - platform_thermal_package_rate_control = NULL; -- -+ thermal_notify_work_cleanup(); - return -ENODEV; - } - -@@ -633,6 +676,7 @@ - mutex_unlock(&phy_dev_list_mutex); - platform_thermal_package_notify = NULL; - platform_thermal_package_rate_control = NULL; -+ thermal_notify_work_cleanup(); - for_each_online_cpu(i) - cancel_delayed_work_sync( - &per_cpu(pkg_temp_thermal_threshold_work, i)); -diff -Nur linux-4.1.26.orig/drivers/tty/serial/8250/8250_core.c linux-4.1.26/drivers/tty/serial/8250/8250_core.c ---- linux-4.1.26.orig/drivers/tty/serial/8250/8250_core.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/tty/serial/8250/8250_core.c 2016-06-19 15:30:58.651295961 +0200 -@@ -36,6 +36,7 @@ - #include - #include - #include -+#include - #include - #include - #ifdef CONFIG_SPARC -@@ -80,7 +81,16 @@ - #define DEBUG_INTR(fmt...) do { } while (0) - #endif - --#define PASS_LIMIT 512 -+/* -+ * On -rt we can have a more delays, and legitimately -+ * so - so don't drop work spuriously and spam the -+ * syslog: -+ */ -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define PASS_LIMIT 1000000 -+#else -+# define PASS_LIMIT 512 -+#endif - - #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) - -@@ -3372,7 +3382,7 @@ - - if (port->sysrq) - locked = 0; -- else if (oops_in_progress) -+ else if (oops_in_progress || in_kdb_printk()) - locked = spin_trylock_irqsave(&port->lock, flags); - else - spin_lock_irqsave(&port->lock, flags); -diff -Nur linux-4.1.26.orig/drivers/tty/serial/amba-pl011.c linux-4.1.26/drivers/tty/serial/amba-pl011.c ---- linux-4.1.26.orig/drivers/tty/serial/amba-pl011.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/tty/serial/amba-pl011.c 2016-06-19 15:30:58.651295961 +0200 -@@ -2000,13 +2000,19 @@ - - clk_enable(uap->clk); - -- local_irq_save(flags); -+ /* -+ * local_irq_save(flags); -+ * -+ * This local_irq_save() is nonsense. If we come in via sysrq -+ * handling then interrupts are already disabled. Aside of -+ * that the port.sysrq check is racy on SMP regardless. -+ */ - if (uap->port.sysrq) - locked = 0; - else if (oops_in_progress) -- locked = spin_trylock(&uap->port.lock); -+ locked = spin_trylock_irqsave(&uap->port.lock, flags); - else -- spin_lock(&uap->port.lock); -+ spin_lock_irqsave(&uap->port.lock, flags); - - /* - * First save the CR then disable the interrupts -@@ -2028,8 +2034,7 @@ - writew(old_cr, uap->port.membase + UART011_CR); - - if (locked) -- spin_unlock(&uap->port.lock); -- local_irq_restore(flags); -+ spin_unlock_irqrestore(&uap->port.lock, flags); - - clk_disable(uap->clk); - } -diff -Nur linux-4.1.26.orig/drivers/tty/serial/omap-serial.c linux-4.1.26/drivers/tty/serial/omap-serial.c ---- linux-4.1.26.orig/drivers/tty/serial/omap-serial.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/tty/serial/omap-serial.c 2016-06-19 15:30:58.651295961 +0200 -@@ -1282,13 +1282,10 @@ - - pm_runtime_get_sync(up->dev); - -- local_irq_save(flags); -- if (up->port.sysrq) -- locked = 0; -- else if (oops_in_progress) -- locked = spin_trylock(&up->port.lock); -+ if (up->port.sysrq || oops_in_progress) -+ locked = spin_trylock_irqsave(&up->port.lock, flags); - else -- spin_lock(&up->port.lock); -+ spin_lock_irqsave(&up->port.lock, flags); - - /* - * First save the IER then disable the interrupts -@@ -1317,8 +1314,7 @@ - pm_runtime_mark_last_busy(up->dev); - pm_runtime_put_autosuspend(up->dev); - if (locked) -- spin_unlock(&up->port.lock); -- local_irq_restore(flags); -+ spin_unlock_irqrestore(&up->port.lock, flags); - } - - static int __init -diff -Nur linux-4.1.26.orig/drivers/usb/core/hcd.c linux-4.1.26/drivers/usb/core/hcd.c ---- linux-4.1.26.orig/drivers/usb/core/hcd.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/usb/core/hcd.c 2016-06-19 15:30:58.655296115 +0200 -@@ -1684,9 +1684,9 @@ - * and no one may trigger the above deadlock situation when - * running complete() in tasklet. - */ -- local_irq_save(flags); -+ local_irq_save_nort(flags); - urb->complete(urb); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - - usb_anchor_resume_wakeups(anchor); - atomic_dec(&urb->use_count); -diff -Nur linux-4.1.26.orig/drivers/usb/gadget/function/f_fs.c linux-4.1.26/drivers/usb/gadget/function/f_fs.c ---- linux-4.1.26.orig/drivers/usb/gadget/function/f_fs.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/usb/gadget/function/f_fs.c 2016-06-19 15:30:58.655296115 +0200 -@@ -1404,7 +1404,7 @@ - pr_info("%s(): freeing\n", __func__); - ffs_data_clear(ffs); - BUG_ON(waitqueue_active(&ffs->ev.waitq) || -- waitqueue_active(&ffs->ep0req_completion.wait)); -+ swaitqueue_active(&ffs->ep0req_completion.wait)); - kfree(ffs->dev_name); - kfree(ffs); - } -diff -Nur linux-4.1.26.orig/drivers/usb/gadget/legacy/inode.c linux-4.1.26/drivers/usb/gadget/legacy/inode.c ---- linux-4.1.26.orig/drivers/usb/gadget/legacy/inode.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/drivers/usb/gadget/legacy/inode.c 2016-06-19 15:30:58.655296115 +0200 -@@ -345,7 +345,7 @@ - spin_unlock_irq (&epdata->dev->lock); - - if (likely (value == 0)) { -- value = wait_event_interruptible (done.wait, done.done); -+ value = swait_event_interruptible (done.wait, done.done); - if (value != 0) { - spin_lock_irq (&epdata->dev->lock); - if (likely (epdata->ep != NULL)) { -@@ -354,7 +354,7 @@ - usb_ep_dequeue (epdata->ep, epdata->req); - spin_unlock_irq (&epdata->dev->lock); - -- wait_event (done.wait, done.done); -+ swait_event (done.wait, done.done); - if (epdata->status == -ECONNRESET) - epdata->status = -EINTR; - } else { -diff -Nur linux-4.1.26.orig/fs/aio.c linux-4.1.26/fs/aio.c ---- linux-4.1.26.orig/fs/aio.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/aio.c 2016-06-19 15:30:58.655296115 +0200 -@@ -40,6 +40,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -115,7 +116,7 @@ - struct page **ring_pages; - long nr_pages; - -- struct work_struct free_work; -+ struct swork_event free_work; - - /* - * signals when all in-flight requests are done -@@ -253,6 +254,7 @@ - .mount = aio_mount, - .kill_sb = kill_anon_super, - }; -+ BUG_ON(swork_get()); - aio_mnt = kern_mount(&aio_fs); - if (IS_ERR(aio_mnt)) - panic("Failed to create aio fs mount."); -@@ -559,9 +561,9 @@ - return cancel(&kiocb->common); - } - --static void free_ioctx(struct work_struct *work) -+static void free_ioctx(struct swork_event *sev) - { -- struct kioctx *ctx = container_of(work, struct kioctx, free_work); -+ struct kioctx *ctx = container_of(sev, struct kioctx, free_work); - - pr_debug("freeing %p\n", ctx); - -@@ -580,8 +582,8 @@ - if (ctx->rq_wait && atomic_dec_and_test(&ctx->rq_wait->count)) - complete(&ctx->rq_wait->comp); - -- INIT_WORK(&ctx->free_work, free_ioctx); -- schedule_work(&ctx->free_work); -+ INIT_SWORK(&ctx->free_work, free_ioctx); -+ swork_queue(&ctx->free_work); - } - - /* -@@ -589,9 +591,9 @@ - * and ctx->users has dropped to 0, so we know no more kiocbs can be submitted - - * now it's safe to cancel any that need to be. - */ --static void free_ioctx_users(struct percpu_ref *ref) -+static void free_ioctx_users_work(struct swork_event *sev) - { -- struct kioctx *ctx = container_of(ref, struct kioctx, users); -+ struct kioctx *ctx = container_of(sev, struct kioctx, free_work); - struct aio_kiocb *req; - - spin_lock_irq(&ctx->ctx_lock); -@@ -610,6 +612,14 @@ - percpu_ref_put(&ctx->reqs); - } - -+static void free_ioctx_users(struct percpu_ref *ref) -+{ -+ struct kioctx *ctx = container_of(ref, struct kioctx, users); -+ -+ INIT_SWORK(&ctx->free_work, free_ioctx_users_work); -+ swork_queue(&ctx->free_work); -+} -+ - static int ioctx_add_table(struct kioctx *ctx, struct mm_struct *mm) - { - unsigned i, new_nr; -diff -Nur linux-4.1.26.orig/fs/autofs4/autofs_i.h linux-4.1.26/fs/autofs4/autofs_i.h ---- linux-4.1.26.orig/fs/autofs4/autofs_i.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/autofs4/autofs_i.h 2016-06-19 15:30:58.655296115 +0200 -@@ -34,6 +34,7 @@ - #include - #include - #include -+#include - #include - #include - -diff -Nur linux-4.1.26.orig/fs/autofs4/expire.c linux-4.1.26/fs/autofs4/expire.c ---- linux-4.1.26.orig/fs/autofs4/expire.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/autofs4/expire.c 2016-06-19 15:30:58.655296115 +0200 -@@ -150,7 +150,7 @@ - parent = p->d_parent; - if (!spin_trylock(&parent->d_lock)) { - spin_unlock(&p->d_lock); -- cpu_relax(); -+ cpu_chill(); - goto relock; - } - spin_unlock(&p->d_lock); -diff -Nur linux-4.1.26.orig/fs/buffer.c linux-4.1.26/fs/buffer.c ---- linux-4.1.26.orig/fs/buffer.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/buffer.c 2016-06-19 15:30:58.655296115 +0200 -@@ -301,8 +301,7 @@ - * decide that the page is now completely done. - */ - first = page_buffers(page); -- local_irq_save(flags); -- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); -+ flags = bh_uptodate_lock_irqsave(first); - clear_buffer_async_read(bh); - unlock_buffer(bh); - tmp = bh; -@@ -315,8 +314,7 @@ - } - tmp = tmp->b_this_page; - } while (tmp != bh); -- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); -- local_irq_restore(flags); -+ bh_uptodate_unlock_irqrestore(first, flags); - - /* - * If none of the buffers had errors and they are all -@@ -328,9 +326,7 @@ - return; - - still_busy: -- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); -- local_irq_restore(flags); -- return; -+ bh_uptodate_unlock_irqrestore(first, flags); - } - - /* -@@ -358,8 +354,7 @@ - } - - first = page_buffers(page); -- local_irq_save(flags); -- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); -+ flags = bh_uptodate_lock_irqsave(first); - - clear_buffer_async_write(bh); - unlock_buffer(bh); -@@ -371,15 +366,12 @@ - } - tmp = tmp->b_this_page; - } -- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); -- local_irq_restore(flags); -+ bh_uptodate_unlock_irqrestore(first, flags); - end_page_writeback(page); - return; - - still_busy: -- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); -- local_irq_restore(flags); -- return; -+ bh_uptodate_unlock_irqrestore(first, flags); - } - EXPORT_SYMBOL(end_buffer_async_write); - -@@ -3325,6 +3317,7 @@ - struct buffer_head *ret = kmem_cache_zalloc(bh_cachep, gfp_flags); - if (ret) { - INIT_LIST_HEAD(&ret->b_assoc_buffers); -+ buffer_head_init_locks(ret); - preempt_disable(); - __this_cpu_inc(bh_accounting.nr); - recalc_bh_state(); -diff -Nur linux-4.1.26.orig/fs/dcache.c linux-4.1.26/fs/dcache.c ---- linux-4.1.26.orig/fs/dcache.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/dcache.c 2016-06-19 15:30:58.655296115 +0200 -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -578,7 +579,7 @@ - - failed: - spin_unlock(&dentry->d_lock); -- cpu_relax(); -+ cpu_chill(); - return dentry; /* try again with same dentry */ - } - -@@ -2388,7 +2389,7 @@ - if (dentry->d_lockref.count == 1) { - if (!spin_trylock(&inode->i_lock)) { - spin_unlock(&dentry->d_lock); -- cpu_relax(); -+ cpu_chill(); - goto again; - } - dentry->d_flags &= ~DCACHE_CANT_MOUNT; -diff -Nur linux-4.1.26.orig/fs/eventpoll.c linux-4.1.26/fs/eventpoll.c ---- linux-4.1.26.orig/fs/eventpoll.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/eventpoll.c 2016-06-19 15:30:58.655296115 +0200 -@@ -505,12 +505,12 @@ - */ - static void ep_poll_safewake(wait_queue_head_t *wq) - { -- int this_cpu = get_cpu(); -+ int this_cpu = get_cpu_light(); - - ep_call_nested(&poll_safewake_ncalls, EP_MAX_NESTS, - ep_poll_wakeup_proc, NULL, wq, (void *) (long) this_cpu); - -- put_cpu(); -+ put_cpu_light(); - } - - static void ep_remove_wait_queue(struct eppoll_entry *pwq) -diff -Nur linux-4.1.26.orig/fs/exec.c linux-4.1.26/fs/exec.c ---- linux-4.1.26.orig/fs/exec.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/exec.c 2016-06-19 15:30:58.659296270 +0200 -@@ -859,12 +859,14 @@ - } - } - task_lock(tsk); -+ preempt_disable_rt(); - active_mm = tsk->active_mm; - tsk->mm = mm; - tsk->active_mm = mm; - activate_mm(active_mm, mm); - tsk->mm->vmacache_seqnum = 0; - vmacache_flush(tsk); -+ preempt_enable_rt(); - task_unlock(tsk); - if (old_mm) { - up_read(&old_mm->mmap_sem); -diff -Nur linux-4.1.26.orig/fs/f2fs/f2fs.h linux-4.1.26/fs/f2fs/f2fs.h ---- linux-4.1.26.orig/fs/f2fs/f2fs.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/f2fs/f2fs.h 2016-06-19 15:30:58.659296270 +0200 -@@ -22,7 +22,6 @@ - - #ifdef CONFIG_F2FS_CHECK_FS - #define f2fs_bug_on(sbi, condition) BUG_ON(condition) --#define f2fs_down_write(x, y) down_write_nest_lock(x, y) - #else - #define f2fs_bug_on(sbi, condition) \ - do { \ -@@ -31,7 +30,6 @@ - set_sbi_flag(sbi, SBI_NEED_FSCK); \ - } \ - } while (0) --#define f2fs_down_write(x, y) down_write(x) - #endif - - /* -@@ -838,7 +836,7 @@ - - static inline void f2fs_lock_all(struct f2fs_sb_info *sbi) - { -- f2fs_down_write(&sbi->cp_rwsem, &sbi->cp_mutex); -+ down_write(&sbi->cp_rwsem); - } - - static inline void f2fs_unlock_all(struct f2fs_sb_info *sbi) -diff -Nur linux-4.1.26.orig/fs/jbd/checkpoint.c linux-4.1.26/fs/jbd/checkpoint.c ---- linux-4.1.26.orig/fs/jbd/checkpoint.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/jbd/checkpoint.c 2016-06-19 15:30:58.659296270 +0200 -@@ -129,6 +129,8 @@ - if (journal->j_flags & JFS_ABORT) - return; - spin_unlock(&journal->j_state_lock); -+ if (current->plug) -+ io_schedule(); - mutex_lock(&journal->j_checkpoint_mutex); - - /* -diff -Nur linux-4.1.26.orig/fs/jbd2/checkpoint.c linux-4.1.26/fs/jbd2/checkpoint.c ---- linux-4.1.26.orig/fs/jbd2/checkpoint.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/jbd2/checkpoint.c 2016-06-19 15:30:58.659296270 +0200 -@@ -116,6 +116,8 @@ - nblocks = jbd2_space_needed(journal); - while (jbd2_log_space_left(journal) < nblocks) { - write_unlock(&journal->j_state_lock); -+ if (current->plug) -+ io_schedule(); - mutex_lock(&journal->j_checkpoint_mutex); - - /* -diff -Nur linux-4.1.26.orig/fs/namespace.c linux-4.1.26/fs/namespace.c ---- linux-4.1.26.orig/fs/namespace.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/namespace.c 2016-06-19 15:30:58.659296270 +0200 -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include /* init_rootfs */ -@@ -353,8 +354,11 @@ - * incremented count after it has set MNT_WRITE_HOLD. - */ - smp_mb(); -- while (ACCESS_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) -- cpu_relax(); -+ while (ACCESS_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) { -+ preempt_enable(); -+ cpu_chill(); -+ preempt_disable(); -+ } - /* - * After the slowpath clears MNT_WRITE_HOLD, mnt_is_readonly will - * be set to match its requirements. So we must not load that until -diff -Nur linux-4.1.26.orig/fs/ntfs/aops.c linux-4.1.26/fs/ntfs/aops.c ---- linux-4.1.26.orig/fs/ntfs/aops.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/ntfs/aops.c 2016-06-19 15:30:58.659296270 +0200 -@@ -107,8 +107,7 @@ - "0x%llx.", (unsigned long long)bh->b_blocknr); - } - first = page_buffers(page); -- local_irq_save(flags); -- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); -+ flags = bh_uptodate_lock_irqsave(first); - clear_buffer_async_read(bh); - unlock_buffer(bh); - tmp = bh; -@@ -123,8 +122,7 @@ - } - tmp = tmp->b_this_page; - } while (tmp != bh); -- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); -- local_irq_restore(flags); -+ bh_uptodate_unlock_irqrestore(first, flags); - /* - * If none of the buffers had errors then we can set the page uptodate, - * but we first have to perform the post read mst fixups, if the -@@ -145,13 +143,13 @@ - recs = PAGE_CACHE_SIZE / rec_size; - /* Should have been verified before we got here... */ - BUG_ON(!recs); -- local_irq_save(flags); -+ local_irq_save_nort(flags); - kaddr = kmap_atomic(page); - for (i = 0; i < recs; i++) - post_read_mst_fixup((NTFS_RECORD*)(kaddr + - i * rec_size), rec_size); - kunmap_atomic(kaddr); -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - flush_dcache_page(page); - if (likely(page_uptodate && !PageError(page))) - SetPageUptodate(page); -@@ -159,9 +157,7 @@ - unlock_page(page); - return; - still_busy: -- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); -- local_irq_restore(flags); -- return; -+ bh_uptodate_unlock_irqrestore(first, flags); - } - - /** -diff -Nur linux-4.1.26.orig/fs/timerfd.c linux-4.1.26/fs/timerfd.c ---- linux-4.1.26.orig/fs/timerfd.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/timerfd.c 2016-06-19 15:30:58.659296270 +0200 -@@ -450,7 +450,10 @@ - break; - } - spin_unlock_irq(&ctx->wqh.lock); -- cpu_relax(); -+ if (isalarm(ctx)) -+ hrtimer_wait_for_timer(&ctx->t.alarm.timer); -+ else -+ hrtimer_wait_for_timer(&ctx->t.tmr); - } - - /* -diff -Nur linux-4.1.26.orig/fs/xfs/xfs_inode.c linux-4.1.26/fs/xfs/xfs_inode.c ---- linux-4.1.26.orig/fs/xfs/xfs_inode.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/xfs/xfs_inode.c 2016-06-19 15:30:58.659296270 +0200 -@@ -164,7 +164,7 @@ - (XFS_MMAPLOCK_SHARED | XFS_MMAPLOCK_EXCL)); - ASSERT((lock_flags & (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)) != - (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)); -- ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_DEP_MASK)) == 0); -+ ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_SUBCLASS_MASK)) == 0); - - if (lock_flags & XFS_IOLOCK_EXCL) - mrupdate_nested(&ip->i_iolock, XFS_IOLOCK_DEP(lock_flags)); -@@ -212,7 +212,7 @@ - (XFS_MMAPLOCK_SHARED | XFS_MMAPLOCK_EXCL)); - ASSERT((lock_flags & (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)) != - (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)); -- ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_DEP_MASK)) == 0); -+ ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_SUBCLASS_MASK)) == 0); - - if (lock_flags & XFS_IOLOCK_EXCL) { - if (!mrtryupdate(&ip->i_iolock)) -@@ -281,7 +281,7 @@ - (XFS_MMAPLOCK_SHARED | XFS_MMAPLOCK_EXCL)); - ASSERT((lock_flags & (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)) != - (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)); -- ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_DEP_MASK)) == 0); -+ ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_SUBCLASS_MASK)) == 0); - ASSERT(lock_flags != 0); - - if (lock_flags & XFS_IOLOCK_EXCL) -@@ -364,30 +364,38 @@ - - /* - * Bump the subclass so xfs_lock_inodes() acquires each lock with a different -- * value. This shouldn't be called for page fault locking, but we also need to -- * ensure we don't overrun the number of lockdep subclasses for the iolock or -- * mmaplock as that is limited to 12 by the mmap lock lockdep annotations. -+ * value. This can be called for any type of inode lock combination, including -+ * parent locking. Care must be taken to ensure we don't overrun the subclass -+ * storage fields in the class mask we build. - */ - static inline int - xfs_lock_inumorder(int lock_mode, int subclass) - { -+ int class = 0; -+ -+ ASSERT(!(lock_mode & (XFS_ILOCK_PARENT | XFS_ILOCK_RTBITMAP | -+ XFS_ILOCK_RTSUM))); -+ - if (lock_mode & (XFS_IOLOCK_SHARED|XFS_IOLOCK_EXCL)) { -- ASSERT(subclass + XFS_LOCK_INUMORDER < -- (1 << (XFS_MMAPLOCK_SHIFT - XFS_IOLOCK_SHIFT))); -- lock_mode |= (subclass + XFS_LOCK_INUMORDER) << XFS_IOLOCK_SHIFT; -+ ASSERT(subclass <= XFS_IOLOCK_MAX_SUBCLASS); -+ ASSERT(subclass + XFS_IOLOCK_PARENT_VAL < -+ MAX_LOCKDEP_SUBCLASSES); -+ class += subclass << XFS_IOLOCK_SHIFT; -+ if (lock_mode & XFS_IOLOCK_PARENT) -+ class += XFS_IOLOCK_PARENT_VAL << XFS_IOLOCK_SHIFT; - } - - if (lock_mode & (XFS_MMAPLOCK_SHARED|XFS_MMAPLOCK_EXCL)) { -- ASSERT(subclass + XFS_LOCK_INUMORDER < -- (1 << (XFS_ILOCK_SHIFT - XFS_MMAPLOCK_SHIFT))); -- lock_mode |= (subclass + XFS_LOCK_INUMORDER) << -- XFS_MMAPLOCK_SHIFT; -+ ASSERT(subclass <= XFS_MMAPLOCK_MAX_SUBCLASS); -+ class += subclass << XFS_MMAPLOCK_SHIFT; - } - -- if (lock_mode & (XFS_ILOCK_SHARED|XFS_ILOCK_EXCL)) -- lock_mode |= (subclass + XFS_LOCK_INUMORDER) << XFS_ILOCK_SHIFT; -+ if (lock_mode & (XFS_ILOCK_SHARED|XFS_ILOCK_EXCL)) { -+ ASSERT(subclass <= XFS_ILOCK_MAX_SUBCLASS); -+ class += subclass << XFS_ILOCK_SHIFT; -+ } - -- return lock_mode; -+ return (lock_mode & ~XFS_LOCK_SUBCLASS_MASK) | class; - } - - /* -@@ -399,6 +407,11 @@ - * transaction (such as truncate). This can result in deadlock since the long - * running trans might need to wait for the inode we just locked in order to - * push the tail and free space in the log. -+ * -+ * xfs_lock_inodes() can only be used to lock one type of lock at a time - -+ * the iolock, the mmaplock or the ilock, but not more than one at a time. If we -+ * lock more than one at a time, lockdep will report false positives saying we -+ * have violated locking orders. - */ - void - xfs_lock_inodes( -@@ -409,8 +422,29 @@ - int attempts = 0, i, j, try_lock; - xfs_log_item_t *lp; - -- /* currently supports between 2 and 5 inodes */ -+ /* -+ * Currently supports between 2 and 5 inodes with exclusive locking. We -+ * support an arbitrary depth of locking here, but absolute limits on -+ * inodes depend on the the type of locking and the limits placed by -+ * lockdep annotations in xfs_lock_inumorder. These are all checked by -+ * the asserts. -+ */ - ASSERT(ips && inodes >= 2 && inodes <= 5); -+ ASSERT(lock_mode & (XFS_IOLOCK_EXCL | XFS_MMAPLOCK_EXCL | -+ XFS_ILOCK_EXCL)); -+ ASSERT(!(lock_mode & (XFS_IOLOCK_SHARED | XFS_MMAPLOCK_SHARED | -+ XFS_ILOCK_SHARED))); -+ ASSERT(!(lock_mode & XFS_IOLOCK_EXCL) || -+ inodes <= XFS_IOLOCK_MAX_SUBCLASS + 1); -+ ASSERT(!(lock_mode & XFS_MMAPLOCK_EXCL) || -+ inodes <= XFS_MMAPLOCK_MAX_SUBCLASS + 1); -+ ASSERT(!(lock_mode & XFS_ILOCK_EXCL) || -+ inodes <= XFS_ILOCK_MAX_SUBCLASS + 1); -+ -+ if (lock_mode & XFS_IOLOCK_EXCL) { -+ ASSERT(!(lock_mode & (XFS_MMAPLOCK_EXCL | XFS_ILOCK_EXCL))); -+ } else if (lock_mode & XFS_MMAPLOCK_EXCL) -+ ASSERT(!(lock_mode & XFS_ILOCK_EXCL)); - - try_lock = 0; - i = 0; -diff -Nur linux-4.1.26.orig/fs/xfs/xfs_inode.h linux-4.1.26/fs/xfs/xfs_inode.h ---- linux-4.1.26.orig/fs/xfs/xfs_inode.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/fs/xfs/xfs_inode.h 2016-06-19 15:30:58.659296270 +0200 -@@ -284,9 +284,9 @@ - * Flags for lockdep annotations. - * - * XFS_LOCK_PARENT - for directory operations that require locking a -- * parent directory inode and a child entry inode. The parent gets locked -- * with this flag so it gets a lockdep subclass of 1 and the child entry -- * lock will have a lockdep subclass of 0. -+ * parent directory inode and a child entry inode. IOLOCK requires nesting, -+ * MMAPLOCK does not support this class, ILOCK requires a single subclass -+ * to differentiate parent from child. - * - * XFS_LOCK_RTBITMAP/XFS_LOCK_RTSUM - the realtime device bitmap and summary - * inodes do not participate in the normal lock order, and thus have their -@@ -295,30 +295,63 @@ - * XFS_LOCK_INUMORDER - for locking several inodes at the some time - * with xfs_lock_inodes(). This flag is used as the starting subclass - * and each subsequent lock acquired will increment the subclass by one. -- * So the first lock acquired will have a lockdep subclass of 4, the -- * second lock will have a lockdep subclass of 5, and so on. It is -- * the responsibility of the class builder to shift this to the correct -- * portion of the lock_mode lockdep mask. -+ * However, MAX_LOCKDEP_SUBCLASSES == 8, which means we are greatly -+ * limited to the subclasses we can represent via nesting. We need at least -+ * 5 inodes nest depth for the ILOCK through rename, and we also have to support -+ * XFS_ILOCK_PARENT, which gives 6 subclasses. Then we have XFS_ILOCK_RTBITMAP -+ * and XFS_ILOCK_RTSUM, which are another 2 unique subclasses, so that's all -+ * 8 subclasses supported by lockdep. -+ * -+ * This also means we have to number the sub-classes in the lowest bits of -+ * the mask we keep, and we have to ensure we never exceed 3 bits of lockdep -+ * mask and we can't use bit-masking to build the subclasses. What a mess. -+ * -+ * Bit layout: -+ * -+ * Bit Lock Region -+ * 16-19 XFS_IOLOCK_SHIFT dependencies -+ * 20-23 XFS_MMAPLOCK_SHIFT dependencies -+ * 24-31 XFS_ILOCK_SHIFT dependencies -+ * -+ * IOLOCK values -+ * -+ * 0-3 subclass value -+ * 4-7 PARENT subclass values -+ * -+ * MMAPLOCK values -+ * -+ * 0-3 subclass value -+ * 4-7 unused -+ * -+ * ILOCK values -+ * 0-4 subclass values -+ * 5 PARENT subclass (not nestable) -+ * 6 RTBITMAP subclass (not nestable) -+ * 7 RTSUM subclass (not nestable) -+ * - */ --#define XFS_LOCK_PARENT 1 --#define XFS_LOCK_RTBITMAP 2 --#define XFS_LOCK_RTSUM 3 --#define XFS_LOCK_INUMORDER 4 -- --#define XFS_IOLOCK_SHIFT 16 --#define XFS_IOLOCK_PARENT (XFS_LOCK_PARENT << XFS_IOLOCK_SHIFT) -+#define XFS_IOLOCK_SHIFT 16 -+#define XFS_IOLOCK_PARENT_VAL 4 -+#define XFS_IOLOCK_MAX_SUBCLASS (XFS_IOLOCK_PARENT_VAL - 1) -+#define XFS_IOLOCK_DEP_MASK 0x000f0000 -+#define XFS_IOLOCK_PARENT (XFS_IOLOCK_PARENT_VAL << XFS_IOLOCK_SHIFT) - --#define XFS_MMAPLOCK_SHIFT 20 -+#define XFS_MMAPLOCK_SHIFT 20 -+#define XFS_MMAPLOCK_NUMORDER 0 -+#define XFS_MMAPLOCK_MAX_SUBCLASS 3 -+#define XFS_MMAPLOCK_DEP_MASK 0x00f00000 - --#define XFS_ILOCK_SHIFT 24 --#define XFS_ILOCK_PARENT (XFS_LOCK_PARENT << XFS_ILOCK_SHIFT) --#define XFS_ILOCK_RTBITMAP (XFS_LOCK_RTBITMAP << XFS_ILOCK_SHIFT) --#define XFS_ILOCK_RTSUM (XFS_LOCK_RTSUM << XFS_ILOCK_SHIFT) -+#define XFS_ILOCK_SHIFT 24 -+#define XFS_ILOCK_PARENT_VAL 5 -+#define XFS_ILOCK_MAX_SUBCLASS (XFS_ILOCK_PARENT_VAL - 1) -+#define XFS_ILOCK_RTBITMAP_VAL 6 -+#define XFS_ILOCK_RTSUM_VAL 7 -+#define XFS_ILOCK_DEP_MASK 0xff000000 -+#define XFS_ILOCK_PARENT (XFS_ILOCK_PARENT_VAL << XFS_ILOCK_SHIFT) -+#define XFS_ILOCK_RTBITMAP (XFS_ILOCK_RTBITMAP_VAL << XFS_ILOCK_SHIFT) -+#define XFS_ILOCK_RTSUM (XFS_ILOCK_RTSUM_VAL << XFS_ILOCK_SHIFT) - --#define XFS_IOLOCK_DEP_MASK 0x000f0000 --#define XFS_MMAPLOCK_DEP_MASK 0x00f00000 --#define XFS_ILOCK_DEP_MASK 0xff000000 --#define XFS_LOCK_DEP_MASK (XFS_IOLOCK_DEP_MASK | \ -+#define XFS_LOCK_SUBCLASS_MASK (XFS_IOLOCK_DEP_MASK | \ - XFS_MMAPLOCK_DEP_MASK | \ - XFS_ILOCK_DEP_MASK) - -diff -Nur linux-4.1.26.orig/include/acpi/platform/aclinux.h linux-4.1.26/include/acpi/platform/aclinux.h ---- linux-4.1.26.orig/include/acpi/platform/aclinux.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/acpi/platform/aclinux.h 2016-06-19 15:30:58.659296270 +0200 -@@ -123,6 +123,7 @@ - - #define acpi_cache_t struct kmem_cache - #define acpi_spinlock spinlock_t * -+#define acpi_raw_spinlock raw_spinlock_t * - #define acpi_cpu_flags unsigned long - - /* Use native linux version of acpi_os_allocate_zeroed */ -@@ -141,6 +142,20 @@ - #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_get_thread_id - #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_create_lock - -+#define acpi_os_create_raw_lock(__handle) \ -+({ \ -+ raw_spinlock_t *lock = ACPI_ALLOCATE(sizeof(*lock)); \ -+ \ -+ if (lock) { \ -+ *(__handle) = lock; \ -+ raw_spin_lock_init(*(__handle)); \ -+ } \ -+ lock ? AE_OK : AE_NO_MEMORY; \ -+ }) -+ -+#define acpi_os_delete_raw_lock(__handle) kfree(__handle) -+ -+ - /* - * OSL interfaces used by debugger/disassembler - */ -diff -Nur linux-4.1.26.orig/include/asm-generic/bug.h linux-4.1.26/include/asm-generic/bug.h ---- linux-4.1.26.orig/include/asm-generic/bug.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/asm-generic/bug.h 2016-06-19 15:30:58.663296424 +0200 -@@ -206,6 +206,20 @@ - # define WARN_ON_SMP(x) ({0;}) - #endif - -+#ifdef CONFIG_PREEMPT_RT_BASE -+# define BUG_ON_RT(c) BUG_ON(c) -+# define BUG_ON_NONRT(c) do { } while (0) -+# define WARN_ON_RT(condition) WARN_ON(condition) -+# define WARN_ON_NONRT(condition) do { } while (0) -+# define WARN_ON_ONCE_NONRT(condition) do { } while (0) -+#else -+# define BUG_ON_RT(c) do { } while (0) -+# define BUG_ON_NONRT(c) BUG_ON(c) -+# define WARN_ON_RT(condition) do { } while (0) -+# define WARN_ON_NONRT(condition) WARN_ON(condition) -+# define WARN_ON_ONCE_NONRT(condition) WARN_ON_ONCE(condition) -+#endif -+ - #endif /* __ASSEMBLY__ */ - - #endif -diff -Nur linux-4.1.26.orig/include/asm-generic/futex.h linux-4.1.26/include/asm-generic/futex.h ---- linux-4.1.26.orig/include/asm-generic/futex.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/asm-generic/futex.h 2016-06-19 15:30:58.663296424 +0200 -@@ -8,8 +8,7 @@ - #ifndef CONFIG_SMP - /* - * The following implementation only for uniprocessor machines. -- * For UP, it's relies on the fact that pagefault_disable() also disables -- * preemption to ensure mutual exclusion. -+ * It relies on preempt_disable() ensuring mutual exclusion. - * - */ - -@@ -38,6 +37,7 @@ - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - -+ preempt_disable(); - pagefault_disable(); - - ret = -EFAULT; -@@ -72,6 +72,7 @@ - - out_pagefault_enable: - pagefault_enable(); -+ preempt_enable(); - - if (ret == 0) { - switch (cmp) { -@@ -106,6 +107,7 @@ - { - u32 val; - -+ preempt_disable(); - if (unlikely(get_user(val, uaddr) != 0)) - return -EFAULT; - -@@ -113,6 +115,7 @@ - return -EFAULT; - - *uval = val; -+ preempt_enable(); - - return 0; - } -diff -Nur linux-4.1.26.orig/include/linux/blkdev.h linux-4.1.26/include/linux/blkdev.h ---- linux-4.1.26.orig/include/linux/blkdev.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/blkdev.h 2016-06-19 15:30:58.663296424 +0200 -@@ -101,6 +101,7 @@ - struct list_head queuelist; - union { - struct call_single_data csd; -+ struct work_struct work; - unsigned long fifo_time; - }; - -@@ -482,7 +483,7 @@ - struct throtl_data *td; - #endif - struct rcu_head rcu_head; -- wait_queue_head_t mq_freeze_wq; -+ struct swait_head mq_freeze_wq; - struct percpu_ref mq_usage_counter; - struct list_head all_q_node; - -diff -Nur linux-4.1.26.orig/include/linux/blk-mq.h linux-4.1.26/include/linux/blk-mq.h ---- linux-4.1.26.orig/include/linux/blk-mq.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/blk-mq.h 2016-06-19 15:30:58.663296424 +0200 -@@ -202,6 +202,7 @@ - - struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index); - struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int); -+void __blk_mq_complete_request_remote_work(struct work_struct *work); - - int blk_mq_request_started(struct request *rq); - void blk_mq_start_request(struct request *rq); -diff -Nur linux-4.1.26.orig/include/linux/bottom_half.h linux-4.1.26/include/linux/bottom_half.h ---- linux-4.1.26.orig/include/linux/bottom_half.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/bottom_half.h 2016-06-19 15:30:58.663296424 +0200 -@@ -4,6 +4,39 @@ - #include - #include - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ -+extern void __local_bh_disable(void); -+extern void _local_bh_enable(void); -+extern void __local_bh_enable(void); -+ -+static inline void local_bh_disable(void) -+{ -+ __local_bh_disable(); -+} -+ -+static inline void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) -+{ -+ __local_bh_disable(); -+} -+ -+static inline void local_bh_enable(void) -+{ -+ __local_bh_enable(); -+} -+ -+static inline void __local_bh_enable_ip(unsigned long ip, unsigned int cnt) -+{ -+ __local_bh_enable(); -+} -+ -+static inline void local_bh_enable_ip(unsigned long ip) -+{ -+ __local_bh_enable(); -+} -+ -+#else -+ - #ifdef CONFIG_TRACE_IRQFLAGS - extern void __local_bh_disable_ip(unsigned long ip, unsigned int cnt); - #else -@@ -31,5 +64,6 @@ - { - __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); - } -+#endif - - #endif /* _LINUX_BH_H */ -diff -Nur linux-4.1.26.orig/include/linux/buffer_head.h linux-4.1.26/include/linux/buffer_head.h ---- linux-4.1.26.orig/include/linux/buffer_head.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/buffer_head.h 2016-06-19 15:30:58.663296424 +0200 -@@ -75,8 +75,52 @@ - struct address_space *b_assoc_map; /* mapping this buffer is - associated with */ - atomic_t b_count; /* users using this buffer_head */ -+#ifdef CONFIG_PREEMPT_RT_BASE -+ spinlock_t b_uptodate_lock; -+#if defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE) || \ -+ defined(CONFIG_JBD2) || defined(CONFIG_JBD2_MODULE) -+ spinlock_t b_state_lock; -+ spinlock_t b_journal_head_lock; -+#endif -+#endif - }; - -+static inline unsigned long bh_uptodate_lock_irqsave(struct buffer_head *bh) -+{ -+ unsigned long flags; -+ -+#ifndef CONFIG_PREEMPT_RT_BASE -+ local_irq_save(flags); -+ bit_spin_lock(BH_Uptodate_Lock, &bh->b_state); -+#else -+ spin_lock_irqsave(&bh->b_uptodate_lock, flags); -+#endif -+ return flags; -+} -+ -+static inline void -+bh_uptodate_unlock_irqrestore(struct buffer_head *bh, unsigned long flags) -+{ -+#ifndef CONFIG_PREEMPT_RT_BASE -+ bit_spin_unlock(BH_Uptodate_Lock, &bh->b_state); -+ local_irq_restore(flags); -+#else -+ spin_unlock_irqrestore(&bh->b_uptodate_lock, flags); -+#endif -+} -+ -+static inline void buffer_head_init_locks(struct buffer_head *bh) -+{ -+#ifdef CONFIG_PREEMPT_RT_BASE -+ spin_lock_init(&bh->b_uptodate_lock); -+#if defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE) || \ -+ defined(CONFIG_JBD2) || defined(CONFIG_JBD2_MODULE) -+ spin_lock_init(&bh->b_state_lock); -+ spin_lock_init(&bh->b_journal_head_lock); -+#endif -+#endif -+} -+ - /* - * macro tricks to expand the set_buffer_foo(), clear_buffer_foo() - * and buffer_foo() functions. -diff -Nur linux-4.1.26.orig/include/linux/cgroup-defs.h linux-4.1.26/include/linux/cgroup-defs.h ---- linux-4.1.26.orig/include/linux/cgroup-defs.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/cgroup-defs.h 2016-06-19 15:30:58.663296424 +0200 -@@ -124,6 +124,7 @@ - /* percpu_ref killing and RCU release */ - struct rcu_head rcu_head; - struct work_struct destroy_work; -+ struct swork_event destroy_swork; - }; - - /* -diff -Nur linux-4.1.26.orig/include/linux/cgroup.h linux-4.1.26/include/linux/cgroup.h ---- linux-4.1.26.orig/include/linux/cgroup.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/cgroup.h 2016-06-19 15:30:58.663296424 +0200 -@@ -17,6 +17,8 @@ - #include - #include - #include -+#include -+#include - - #include - -diff -Nur linux-4.1.26.orig/include/linux/completion.h linux-4.1.26/include/linux/completion.h ---- linux-4.1.26.orig/include/linux/completion.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/completion.h 2016-06-19 15:30:58.663296424 +0200 -@@ -7,8 +7,7 @@ - * Atomic wait-for-completion handler data structures. - * See kernel/sched/completion.c for details. - */ -- --#include -+#include - - /* - * struct completion - structure used to maintain state for a "completion" -@@ -24,11 +23,11 @@ - */ - struct completion { - unsigned int done; -- wait_queue_head_t wait; -+ struct swait_head wait; - }; - - #define COMPLETION_INITIALIZER(work) \ -- { 0, __WAIT_QUEUE_HEAD_INITIALIZER((work).wait) } -+ { 0, SWAIT_HEAD_INITIALIZER((work).wait) } - - #define COMPLETION_INITIALIZER_ONSTACK(work) \ - ({ init_completion(&work); work; }) -@@ -73,7 +72,7 @@ - static inline void init_completion(struct completion *x) - { - x->done = 0; -- init_waitqueue_head(&x->wait); -+ init_swait_head(&x->wait); - } - - /** -diff -Nur linux-4.1.26.orig/include/linux/cpu.h linux-4.1.26/include/linux/cpu.h ---- linux-4.1.26.orig/include/linux/cpu.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/cpu.h 2016-06-19 15:30:58.663296424 +0200 -@@ -231,6 +231,8 @@ - extern void put_online_cpus(void); - extern void cpu_hotplug_disable(void); - extern void cpu_hotplug_enable(void); -+extern void pin_current_cpu(void); -+extern void unpin_current_cpu(void); - #define hotcpu_notifier(fn, pri) cpu_notifier(fn, pri) - #define __hotcpu_notifier(fn, pri) __cpu_notifier(fn, pri) - #define register_hotcpu_notifier(nb) register_cpu_notifier(nb) -@@ -249,6 +251,8 @@ - #define put_online_cpus() do { } while (0) - #define cpu_hotplug_disable() do { } while (0) - #define cpu_hotplug_enable() do { } while (0) -+static inline void pin_current_cpu(void) { } -+static inline void unpin_current_cpu(void) { } - #define hotcpu_notifier(fn, pri) do { (void)(fn); } while (0) - #define __hotcpu_notifier(fn, pri) do { (void)(fn); } while (0) - /* These aren't inline functions due to a GCC bug. */ -diff -Nur linux-4.1.26.orig/include/linux/delay.h linux-4.1.26/include/linux/delay.h ---- linux-4.1.26.orig/include/linux/delay.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/delay.h 2016-06-19 15:30:58.663296424 +0200 -@@ -52,4 +52,10 @@ - msleep(seconds * 1000); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+extern void cpu_chill(void); -+#else -+# define cpu_chill() cpu_relax() -+#endif -+ - #endif /* defined(_LINUX_DELAY_H) */ -diff -Nur linux-4.1.26.orig/include/linux/ftrace_event.h linux-4.1.26/include/linux/ftrace_event.h ---- linux-4.1.26.orig/include/linux/ftrace_event.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/ftrace_event.h 2016-06-19 15:30:58.663296424 +0200 -@@ -66,6 +66,9 @@ - unsigned char flags; - unsigned char preempt_count; - int pid; -+ unsigned short migrate_disable; -+ unsigned short padding; -+ unsigned char preempt_lazy_count; - }; - - #define FTRACE_MAX_EVENT \ -diff -Nur linux-4.1.26.orig/include/linux/ftrace.h linux-4.1.26/include/linux/ftrace.h ---- linux-4.1.26.orig/include/linux/ftrace.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/ftrace.h 2016-06-19 15:30:58.663296424 +0200 -@@ -682,6 +682,18 @@ - #define CALLER_ADDR5 ((unsigned long)ftrace_return_address(5)) - #define CALLER_ADDR6 ((unsigned long)ftrace_return_address(6)) - -+static inline unsigned long get_lock_parent_ip(void) -+{ -+ unsigned long addr = CALLER_ADDR0; -+ -+ if (!in_lock_functions(addr)) -+ return addr; -+ addr = CALLER_ADDR1; -+ if (!in_lock_functions(addr)) -+ return addr; -+ return CALLER_ADDR2; -+} -+ - #ifdef CONFIG_IRQSOFF_TRACER - extern void time_hardirqs_on(unsigned long a0, unsigned long a1); - extern void time_hardirqs_off(unsigned long a0, unsigned long a1); -diff -Nur linux-4.1.26.orig/include/linux/highmem.h linux-4.1.26/include/linux/highmem.h ---- linux-4.1.26.orig/include/linux/highmem.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/highmem.h 2016-06-19 15:30:58.663296424 +0200 -@@ -7,6 +7,7 @@ - #include - #include - #include -+#include - - #include - -@@ -65,6 +66,7 @@ - - static inline void *kmap_atomic(struct page *page) - { -+ preempt_disable_nort(); - pagefault_disable(); - return page_address(page); - } -@@ -73,6 +75,7 @@ - static inline void __kunmap_atomic(void *addr) - { - pagefault_enable(); -+ preempt_enable_nort(); - } - - #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) -@@ -85,32 +88,51 @@ - - #if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) - -+#ifndef CONFIG_PREEMPT_RT_FULL - DECLARE_PER_CPU(int, __kmap_atomic_idx); -+#endif - - static inline int kmap_atomic_idx_push(void) - { -+#ifndef CONFIG_PREEMPT_RT_FULL - int idx = __this_cpu_inc_return(__kmap_atomic_idx) - 1; - --#ifdef CONFIG_DEBUG_HIGHMEM -+# ifdef CONFIG_DEBUG_HIGHMEM - WARN_ON_ONCE(in_irq() && !irqs_disabled()); - BUG_ON(idx >= KM_TYPE_NR); --#endif -+# endif - return idx; -+#else -+ current->kmap_idx++; -+ BUG_ON(current->kmap_idx > KM_TYPE_NR); -+ return current->kmap_idx - 1; -+#endif - } - - static inline int kmap_atomic_idx(void) - { -+#ifndef CONFIG_PREEMPT_RT_FULL - return __this_cpu_read(__kmap_atomic_idx) - 1; -+#else -+ return current->kmap_idx - 1; -+#endif - } - - static inline void kmap_atomic_idx_pop(void) - { --#ifdef CONFIG_DEBUG_HIGHMEM -+#ifndef CONFIG_PREEMPT_RT_FULL -+# ifdef CONFIG_DEBUG_HIGHMEM - int idx = __this_cpu_dec_return(__kmap_atomic_idx); - - BUG_ON(idx < 0); --#else -+# else - __this_cpu_dec(__kmap_atomic_idx); -+# endif -+#else -+ current->kmap_idx--; -+# ifdef CONFIG_DEBUG_HIGHMEM -+ BUG_ON(current->kmap_idx < 0); -+# endif - #endif - } - -diff -Nur linux-4.1.26.orig/include/linux/hrtimer.h linux-4.1.26/include/linux/hrtimer.h ---- linux-4.1.26.orig/include/linux/hrtimer.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/hrtimer.h 2016-06-19 15:30:58.663296424 +0200 -@@ -111,6 +111,11 @@ - enum hrtimer_restart (*function)(struct hrtimer *); - struct hrtimer_clock_base *base; - unsigned long state; -+ struct list_head cb_entry; -+ int irqsafe; -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ ktime_t praecox; -+#endif - #ifdef CONFIG_TIMER_STATS - int start_pid; - void *start_site; -@@ -147,6 +152,7 @@ - int index; - clockid_t clockid; - struct timerqueue_head active; -+ struct list_head expired; - ktime_t resolution; - ktime_t (*get_time)(void); - ktime_t softirq_time; -@@ -194,6 +200,9 @@ - unsigned long nr_hangs; - ktime_t max_hang_time; - #endif -+#ifdef CONFIG_PREEMPT_RT_BASE -+ wait_queue_head_t wait; -+#endif - struct hrtimer_clock_base clock_base[HRTIMER_MAX_CLOCK_BASES]; - }; - -@@ -381,6 +390,13 @@ - return hrtimer_start_expires(timer, HRTIMER_MODE_ABS); - } - -+/* Softirq preemption could deadlock timer removal */ -+#ifdef CONFIG_PREEMPT_RT_BASE -+ extern void hrtimer_wait_for_timer(const struct hrtimer *timer); -+#else -+# define hrtimer_wait_for_timer(timer) do { cpu_relax(); } while (0) -+#endif -+ - /* Query timers: */ - extern ktime_t hrtimer_get_remaining(const struct hrtimer *timer); - extern int hrtimer_get_res(const clockid_t which_clock, struct timespec *tp); -diff -Nur linux-4.1.26.orig/include/linux/idr.h linux-4.1.26/include/linux/idr.h ---- linux-4.1.26.orig/include/linux/idr.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/idr.h 2016-06-19 15:30:58.663296424 +0200 -@@ -95,10 +95,14 @@ - * Each idr_preload() should be matched with an invocation of this - * function. See idr_preload() for details. - */ -+#ifdef CONFIG_PREEMPT_RT_FULL -+void idr_preload_end(void); -+#else - static inline void idr_preload_end(void) - { - preempt_enable(); - } -+#endif - - /** - * idr_find - return pointer for given id -diff -Nur linux-4.1.26.orig/include/linux/init_task.h linux-4.1.26/include/linux/init_task.h ---- linux-4.1.26.orig/include/linux/init_task.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/init_task.h 2016-06-19 15:30:58.667296578 +0200 -@@ -147,9 +147,16 @@ - # define INIT_PERF_EVENTS(tsk) - #endif - -+#ifdef CONFIG_PREEMPT_RT_BASE -+# define INIT_TIMER_LIST .posix_timer_list = NULL, -+#else -+# define INIT_TIMER_LIST -+#endif -+ - #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN - # define INIT_VTIME(tsk) \ -- .vtime_seqlock = __SEQLOCK_UNLOCKED(tsk.vtime_seqlock), \ -+ .vtime_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.vtime_lock), \ -+ .vtime_seq = SEQCNT_ZERO(tsk.vtime_seq), \ - .vtime_snap = 0, \ - .vtime_snap_whence = VTIME_SYS, - #else -@@ -238,6 +245,7 @@ - .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ - .pi_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.pi_lock), \ - .timer_slack_ns = 50000, /* 50 usec default slack */ \ -+ INIT_TIMER_LIST \ - .pids = { \ - [PIDTYPE_PID] = INIT_PID_LINK(PIDTYPE_PID), \ - [PIDTYPE_PGID] = INIT_PID_LINK(PIDTYPE_PGID), \ -diff -Nur linux-4.1.26.orig/include/linux/interrupt.h linux-4.1.26/include/linux/interrupt.h ---- linux-4.1.26.orig/include/linux/interrupt.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/interrupt.h 2016-06-19 15:30:58.667296578 +0200 -@@ -61,6 +61,7 @@ - * interrupt handler after suspending interrupts. For system - * wakeup devices users need to implement wakeup detection in - * their interrupt handlers. -+ * IRQF_NO_SOFTIRQ_CALL - Do not process softirqs in the irq thread context (RT) - */ - #define IRQF_SHARED 0x00000080 - #define IRQF_PROBE_SHARED 0x00000100 -@@ -74,6 +75,7 @@ - #define IRQF_NO_THREAD 0x00010000 - #define IRQF_EARLY_RESUME 0x00020000 - #define IRQF_COND_SUSPEND 0x00040000 -+#define IRQF_NO_SOFTIRQ_CALL 0x00080000 - - #define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) - -@@ -102,6 +104,7 @@ - * @flags: flags (see IRQF_* above) - * @thread_fn: interrupt handler function for threaded interrupts - * @thread: thread pointer for threaded interrupts -+ * @secondary: pointer to secondary irqaction (force threading) - * @thread_flags: flags related to @thread - * @thread_mask: bitmask for keeping track of @thread activity - * @dir: pointer to the proc/irq/NN/name entry -@@ -113,6 +116,7 @@ - struct irqaction *next; - irq_handler_t thread_fn; - struct task_struct *thread; -+ struct irqaction *secondary; - unsigned int irq; - unsigned int flags; - unsigned long thread_flags; -@@ -184,7 +188,7 @@ - #ifdef CONFIG_LOCKDEP - # define local_irq_enable_in_hardirq() do { } while (0) - #else --# define local_irq_enable_in_hardirq() local_irq_enable() -+# define local_irq_enable_in_hardirq() local_irq_enable_nort() - #endif - - extern void disable_irq_nosync(unsigned int irq); -@@ -215,6 +219,7 @@ - unsigned int irq; - struct kref kref; - struct work_struct work; -+ struct list_head list; - void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); - void (*release)(struct kref *ref); - }; -@@ -377,9 +382,13 @@ - bool state); - - #ifdef CONFIG_IRQ_FORCED_THREADING -+# ifndef CONFIG_PREEMPT_RT_BASE - extern bool force_irqthreads; -+# else -+# define force_irqthreads (true) -+# endif - #else --#define force_irqthreads (0) -+#define force_irqthreads (false) - #endif - - #ifndef __ARCH_SET_SOFTIRQ_PENDING -@@ -435,9 +444,10 @@ - void (*action)(struct softirq_action *); - }; - -+#ifndef CONFIG_PREEMPT_RT_FULL - asmlinkage void do_softirq(void); - asmlinkage void __do_softirq(void); -- -+static inline void thread_do_softirq(void) { do_softirq(); } - #ifdef __ARCH_HAS_DO_SOFTIRQ - void do_softirq_own_stack(void); - #else -@@ -446,13 +456,25 @@ - __do_softirq(); - } - #endif -+#else -+extern void thread_do_softirq(void); -+#endif - - extern void open_softirq(int nr, void (*action)(struct softirq_action *)); - extern void softirq_init(void); - extern void __raise_softirq_irqoff(unsigned int nr); -+#ifdef CONFIG_PREEMPT_RT_FULL -+extern void __raise_softirq_irqoff_ksoft(unsigned int nr); -+#else -+static inline void __raise_softirq_irqoff_ksoft(unsigned int nr) -+{ -+ __raise_softirq_irqoff(nr); -+} -+#endif - - extern void raise_softirq_irqoff(unsigned int nr); - extern void raise_softirq(unsigned int nr); -+extern void softirq_check_pending_idle(void); - - DECLARE_PER_CPU(struct task_struct *, ksoftirqd); - -@@ -474,8 +496,9 @@ - to be executed on some cpu at least once after this. - * If the tasklet is already scheduled, but its execution is still not - started, it will be executed only once. -- * If this tasklet is already running on another CPU (or schedule is called -- from tasklet itself), it is rescheduled for later. -+ * If this tasklet is already running on another CPU, it is rescheduled -+ for later. -+ * Schedule must not be called from the tasklet itself (a lockup occurs) - * Tasklet is strictly serialized wrt itself, but not - wrt another tasklets. If client needs some intertask synchronization, - he makes it with spinlocks. -@@ -500,27 +523,36 @@ - enum - { - TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ -- TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ -+ TASKLET_STATE_RUN, /* Tasklet is running (SMP only) */ -+ TASKLET_STATE_PENDING /* Tasklet is pending */ - }; - --#ifdef CONFIG_SMP -+#define TASKLET_STATEF_SCHED (1 << TASKLET_STATE_SCHED) -+#define TASKLET_STATEF_RUN (1 << TASKLET_STATE_RUN) -+#define TASKLET_STATEF_PENDING (1 << TASKLET_STATE_PENDING) -+ -+#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) - static inline int tasklet_trylock(struct tasklet_struct *t) - { - return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); - } - -+static inline int tasklet_tryunlock(struct tasklet_struct *t) -+{ -+ return cmpxchg(&t->state, TASKLET_STATEF_RUN, 0) == TASKLET_STATEF_RUN; -+} -+ - static inline void tasklet_unlock(struct tasklet_struct *t) - { - smp_mb__before_atomic(); - clear_bit(TASKLET_STATE_RUN, &(t)->state); - } - --static inline void tasklet_unlock_wait(struct tasklet_struct *t) --{ -- while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } --} -+extern void tasklet_unlock_wait(struct tasklet_struct *t); -+ - #else - #define tasklet_trylock(t) 1 -+#define tasklet_tryunlock(t) 1 - #define tasklet_unlock_wait(t) do { } while (0) - #define tasklet_unlock(t) do { } while (0) - #endif -@@ -569,12 +601,7 @@ - smp_mb(); - } - --static inline void tasklet_enable(struct tasklet_struct *t) --{ -- smp_mb__before_atomic(); -- atomic_dec(&t->count); --} -- -+extern void tasklet_enable(struct tasklet_struct *t); - extern void tasklet_kill(struct tasklet_struct *t); - extern void tasklet_kill_immediate(struct tasklet_struct *t, unsigned int cpu); - extern void tasklet_init(struct tasklet_struct *t, -@@ -605,6 +632,12 @@ - tasklet_kill(&ttimer->tasklet); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+extern void softirq_early_init(void); -+#else -+static inline void softirq_early_init(void) { } -+#endif -+ - /* - * Autoprobing for irqs: - * -diff -Nur linux-4.1.26.orig/include/linux/io-mapping.h linux-4.1.26/include/linux/io-mapping.h ---- linux-4.1.26.orig/include/linux/io-mapping.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/io-mapping.h 2016-06-19 15:30:58.667296578 +0200 -@@ -141,6 +141,7 @@ - io_mapping_map_atomic_wc(struct io_mapping *mapping, - unsigned long offset) - { -+ preempt_disable(); - pagefault_disable(); - return ((char __force __iomem *) mapping) + offset; - } -@@ -149,6 +150,7 @@ - io_mapping_unmap_atomic(void __iomem *vaddr) - { - pagefault_enable(); -+ preempt_enable(); - } - - /* Non-atomic map/unmap */ -diff -Nur linux-4.1.26.orig/include/linux/irqdesc.h linux-4.1.26/include/linux/irqdesc.h ---- linux-4.1.26.orig/include/linux/irqdesc.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/irqdesc.h 2016-06-19 15:30:58.667296578 +0200 -@@ -63,6 +63,7 @@ - unsigned int irqs_unhandled; - atomic_t threads_handled; - int threads_handled_last; -+ u64 random_ip; - raw_spinlock_t lock; - struct cpumask *percpu_enabled; - #ifdef CONFIG_SMP -diff -Nur linux-4.1.26.orig/include/linux/irqflags.h linux-4.1.26/include/linux/irqflags.h ---- linux-4.1.26.orig/include/linux/irqflags.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/irqflags.h 2016-06-19 15:30:58.667296578 +0200 -@@ -25,8 +25,6 @@ - # define trace_softirqs_enabled(p) ((p)->softirqs_enabled) - # define trace_hardirq_enter() do { current->hardirq_context++; } while (0) - # define trace_hardirq_exit() do { current->hardirq_context--; } while (0) --# define lockdep_softirq_enter() do { current->softirq_context++; } while (0) --# define lockdep_softirq_exit() do { current->softirq_context--; } while (0) - # define INIT_TRACE_IRQFLAGS .softirqs_enabled = 1, - #else - # define trace_hardirqs_on() do { } while (0) -@@ -39,9 +37,15 @@ - # define trace_softirqs_enabled(p) 0 - # define trace_hardirq_enter() do { } while (0) - # define trace_hardirq_exit() do { } while (0) -+# define INIT_TRACE_IRQFLAGS -+#endif -+ -+#if defined(CONFIG_TRACE_IRQFLAGS) && !defined(CONFIG_PREEMPT_RT_FULL) -+# define lockdep_softirq_enter() do { current->softirq_context++; } while (0) -+# define lockdep_softirq_exit() do { current->softirq_context--; } while (0) -+#else - # define lockdep_softirq_enter() do { } while (0) - # define lockdep_softirq_exit() do { } while (0) --# define INIT_TRACE_IRQFLAGS - #endif - - #if defined(CONFIG_IRQSOFF_TRACER) || \ -@@ -148,4 +152,23 @@ - - #define irqs_disabled_flags(flags) raw_irqs_disabled_flags(flags) - -+/* -+ * local_irq* variants depending on RT/!RT -+ */ -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define local_irq_disable_nort() do { } while (0) -+# define local_irq_enable_nort() do { } while (0) -+# define local_irq_save_nort(flags) local_save_flags(flags) -+# define local_irq_restore_nort(flags) (void)(flags) -+# define local_irq_disable_rt() local_irq_disable() -+# define local_irq_enable_rt() local_irq_enable() -+#else -+# define local_irq_disable_nort() local_irq_disable() -+# define local_irq_enable_nort() local_irq_enable() -+# define local_irq_save_nort(flags) local_irq_save(flags) -+# define local_irq_restore_nort(flags) local_irq_restore(flags) -+# define local_irq_disable_rt() do { } while (0) -+# define local_irq_enable_rt() do { } while (0) -+#endif -+ - #endif -diff -Nur linux-4.1.26.orig/include/linux/irq.h linux-4.1.26/include/linux/irq.h ---- linux-4.1.26.orig/include/linux/irq.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/irq.h 2016-06-19 15:30:58.667296578 +0200 -@@ -72,6 +72,7 @@ - * IRQ_IS_POLLED - Always polled by another interrupt. Exclude - * it from the spurious interrupt detection - * mechanism and from core side polling. -+ * IRQ_NO_SOFTIRQ_CALL - No softirq processing in the irq thread context (RT) - */ - enum { - IRQ_TYPE_NONE = 0x00000000, -@@ -97,13 +98,14 @@ - IRQ_NOTHREAD = (1 << 16), - IRQ_PER_CPU_DEVID = (1 << 17), - IRQ_IS_POLLED = (1 << 18), -+ IRQ_NO_SOFTIRQ_CALL = (1 << 19), - }; - - #define IRQF_MODIFY_MASK \ - (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \ - IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \ - IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \ -- IRQ_IS_POLLED) -+ IRQ_IS_POLLED | IRQ_NO_SOFTIRQ_CALL) - - #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) - -diff -Nur linux-4.1.26.orig/include/linux/irq_work.h linux-4.1.26/include/linux/irq_work.h ---- linux-4.1.26.orig/include/linux/irq_work.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/irq_work.h 2016-06-19 15:30:58.667296578 +0200 -@@ -16,6 +16,7 @@ - #define IRQ_WORK_BUSY 2UL - #define IRQ_WORK_FLAGS 3UL - #define IRQ_WORK_LAZY 4UL /* Doesn't want IPI, wait for tick */ -+#define IRQ_WORK_HARD_IRQ 8UL /* Run hard IRQ context, even on RT */ - - struct irq_work { - unsigned long flags; -@@ -51,4 +52,10 @@ - static inline void irq_work_run(void) { } - #endif - -+#if defined(CONFIG_IRQ_WORK) && defined(CONFIG_PREEMPT_RT_FULL) -+void irq_work_tick_soft(void); -+#else -+static inline void irq_work_tick_soft(void) { } -+#endif -+ - #endif /* _LINUX_IRQ_WORK_H */ -diff -Nur linux-4.1.26.orig/include/linux/jbd_common.h linux-4.1.26/include/linux/jbd_common.h ---- linux-4.1.26.orig/include/linux/jbd_common.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/jbd_common.h 2016-06-19 15:30:58.667296578 +0200 -@@ -15,32 +15,56 @@ - - static inline void jbd_lock_bh_state(struct buffer_head *bh) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - bit_spin_lock(BH_State, &bh->b_state); -+#else -+ spin_lock(&bh->b_state_lock); -+#endif - } - - static inline int jbd_trylock_bh_state(struct buffer_head *bh) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - return bit_spin_trylock(BH_State, &bh->b_state); -+#else -+ return spin_trylock(&bh->b_state_lock); -+#endif - } - - static inline int jbd_is_locked_bh_state(struct buffer_head *bh) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - return bit_spin_is_locked(BH_State, &bh->b_state); -+#else -+ return spin_is_locked(&bh->b_state_lock); -+#endif - } - - static inline void jbd_unlock_bh_state(struct buffer_head *bh) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - bit_spin_unlock(BH_State, &bh->b_state); -+#else -+ spin_unlock(&bh->b_state_lock); -+#endif - } - - static inline void jbd_lock_bh_journal_head(struct buffer_head *bh) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - bit_spin_lock(BH_JournalHead, &bh->b_state); -+#else -+ spin_lock(&bh->b_journal_head_lock); -+#endif - } - - static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - bit_spin_unlock(BH_JournalHead, &bh->b_state); -+#else -+ spin_unlock(&bh->b_journal_head_lock); -+#endif - } - - #endif -diff -Nur linux-4.1.26.orig/include/linux/kdb.h linux-4.1.26/include/linux/kdb.h ---- linux-4.1.26.orig/include/linux/kdb.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/kdb.h 2016-06-19 15:30:58.667296578 +0200 -@@ -167,6 +167,7 @@ - extern __printf(1, 2) int kdb_printf(const char *, ...); - typedef __printf(1, 2) int (*kdb_printf_t)(const char *, ...); - -+#define in_kdb_printk() (kdb_trap_printk) - extern void kdb_init(int level); - - /* Access to kdb specific polling devices */ -@@ -201,6 +202,7 @@ - extern int kdb_unregister(char *); - #else /* ! CONFIG_KGDB_KDB */ - static inline __printf(1, 2) int kdb_printf(const char *fmt, ...) { return 0; } -+#define in_kdb_printk() (0) - static inline void kdb_init(int level) {} - static inline int kdb_register(char *cmd, kdb_func_t func, char *usage, - char *help, short minlen) { return 0; } -diff -Nur linux-4.1.26.orig/include/linux/kernel.h linux-4.1.26/include/linux/kernel.h ---- linux-4.1.26.orig/include/linux/kernel.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/kernel.h 2016-06-19 15:30:58.667296578 +0200 -@@ -188,6 +188,9 @@ - */ - # define might_sleep() \ - do { __might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) -+ -+# define might_sleep_no_state_check() \ -+ do { ___might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) - # define sched_annotate_sleep() (current->task_state_change = 0) - #else - static inline void ___might_sleep(const char *file, int line, -@@ -195,6 +198,7 @@ - static inline void __might_sleep(const char *file, int line, - int preempt_offset) { } - # define might_sleep() do { might_resched(); } while (0) -+# define might_sleep_no_state_check() do { might_resched(); } while (0) - # define sched_annotate_sleep() do { } while (0) - #endif - -@@ -244,7 +248,8 @@ - - #if defined(CONFIG_MMU) && \ - (defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP)) --void might_fault(void); -+#define might_fault() __might_fault(__FILE__, __LINE__) -+void __might_fault(const char *file, int line); - #else - static inline void might_fault(void) { } - #endif -@@ -466,6 +471,7 @@ - SYSTEM_HALT, - SYSTEM_POWER_OFF, - SYSTEM_RESTART, -+ SYSTEM_SUSPEND, - } system_state; - - #define TAINT_PROPRIETARY_MODULE 0 -diff -Nur linux-4.1.26.orig/include/linux/kvm_host.h linux-4.1.26/include/linux/kvm_host.h ---- linux-4.1.26.orig/include/linux/kvm_host.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/kvm_host.h 2016-06-19 15:30:58.667296578 +0200 -@@ -230,7 +230,7 @@ - - int fpu_active; - int guest_fpu_loaded, guest_xcr0_loaded; -- wait_queue_head_t wq; -+ struct swait_head wq; - struct pid *pid; - int sigset_active; - sigset_t sigset; -@@ -701,7 +701,7 @@ - } - #endif - --static inline wait_queue_head_t *kvm_arch_vcpu_wq(struct kvm_vcpu *vcpu) -+static inline struct swait_head *kvm_arch_vcpu_wq(struct kvm_vcpu *vcpu) - { - #ifdef __KVM_HAVE_ARCH_WQP - return vcpu->arch.wqp; -diff -Nur linux-4.1.26.orig/include/linux/lglock.h linux-4.1.26/include/linux/lglock.h ---- linux-4.1.26.orig/include/linux/lglock.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/lglock.h 2016-06-19 15:30:58.667296578 +0200 -@@ -34,22 +34,39 @@ - #endif - - struct lglock { -+#ifndef CONFIG_PREEMPT_RT_FULL - arch_spinlock_t __percpu *lock; -+#else -+ struct rt_mutex __percpu *lock; -+#endif - #ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lock_class_key lock_key; - struct lockdep_map lock_dep_map; - #endif - }; - --#define DEFINE_LGLOCK(name) \ -+#ifndef CONFIG_PREEMPT_RT_FULL -+# define DEFINE_LGLOCK(name) \ - static DEFINE_PER_CPU(arch_spinlock_t, name ## _lock) \ - = __ARCH_SPIN_LOCK_UNLOCKED; \ - struct lglock name = { .lock = &name ## _lock } - --#define DEFINE_STATIC_LGLOCK(name) \ -+# define DEFINE_STATIC_LGLOCK(name) \ - static DEFINE_PER_CPU(arch_spinlock_t, name ## _lock) \ - = __ARCH_SPIN_LOCK_UNLOCKED; \ - static struct lglock name = { .lock = &name ## _lock } -+#else -+ -+# define DEFINE_LGLOCK(name) \ -+ static DEFINE_PER_CPU(struct rt_mutex, name ## _lock) \ -+ = __RT_MUTEX_INITIALIZER( name ## _lock); \ -+ struct lglock name = { .lock = &name ## _lock } -+ -+# define DEFINE_STATIC_LGLOCK(name) \ -+ static DEFINE_PER_CPU(struct rt_mutex, name ## _lock) \ -+ = __RT_MUTEX_INITIALIZER( name ## _lock); \ -+ static struct lglock name = { .lock = &name ## _lock } -+#endif - - void lg_lock_init(struct lglock *lg, char *name); - void lg_local_lock(struct lglock *lg); -@@ -59,6 +76,12 @@ - void lg_global_lock(struct lglock *lg); - void lg_global_unlock(struct lglock *lg); - -+#ifndef CONFIG_PREEMPT_RT_FULL -+#define lg_global_trylock_relax(name) lg_global_lock(name) -+#else -+void lg_global_trylock_relax(struct lglock *lg); -+#endif -+ - #else - /* When !CONFIG_SMP, map lglock to spinlock */ - #define lglock spinlock -diff -Nur linux-4.1.26.orig/include/linux/list_bl.h linux-4.1.26/include/linux/list_bl.h ---- linux-4.1.26.orig/include/linux/list_bl.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/list_bl.h 2016-06-19 15:30:58.667296578 +0200 -@@ -2,6 +2,7 @@ - #define _LINUX_LIST_BL_H - - #include -+#include - #include - - /* -@@ -32,13 +33,22 @@ - - struct hlist_bl_head { - struct hlist_bl_node *first; -+#ifdef CONFIG_PREEMPT_RT_BASE -+ raw_spinlock_t lock; -+#endif - }; - - struct hlist_bl_node { - struct hlist_bl_node *next, **pprev; - }; --#define INIT_HLIST_BL_HEAD(ptr) \ -- ((ptr)->first = NULL) -+ -+static inline void INIT_HLIST_BL_HEAD(struct hlist_bl_head *h) -+{ -+ h->first = NULL; -+#ifdef CONFIG_PREEMPT_RT_BASE -+ raw_spin_lock_init(&h->lock); -+#endif -+} - - static inline void INIT_HLIST_BL_NODE(struct hlist_bl_node *h) - { -@@ -117,12 +127,26 @@ - - static inline void hlist_bl_lock(struct hlist_bl_head *b) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - bit_spin_lock(0, (unsigned long *)b); -+#else -+ raw_spin_lock(&b->lock); -+#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) -+ __set_bit(0, (unsigned long *)b); -+#endif -+#endif - } - - static inline void hlist_bl_unlock(struct hlist_bl_head *b) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - __bit_spin_unlock(0, (unsigned long *)b); -+#else -+#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) -+ __clear_bit(0, (unsigned long *)b); -+#endif -+ raw_spin_unlock(&b->lock); -+#endif - } - - static inline bool hlist_bl_is_locked(struct hlist_bl_head *b) -diff -Nur linux-4.1.26.orig/include/linux/locallock.h linux-4.1.26/include/linux/locallock.h ---- linux-4.1.26.orig/include/linux/locallock.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/locallock.h 2016-06-19 15:30:58.667296578 +0200 -@@ -0,0 +1,270 @@ -+#ifndef _LINUX_LOCALLOCK_H -+#define _LINUX_LOCALLOCK_H -+ -+#include -+#include -+ -+#ifdef CONFIG_PREEMPT_RT_BASE -+ -+#ifdef CONFIG_DEBUG_SPINLOCK -+# define LL_WARN(cond) WARN_ON(cond) -+#else -+# define LL_WARN(cond) do { } while (0) -+#endif -+ -+/* -+ * per cpu lock based substitute for local_irq_*() -+ */ -+struct local_irq_lock { -+ spinlock_t lock; -+ struct task_struct *owner; -+ int nestcnt; -+ unsigned long flags; -+}; -+ -+#define DEFINE_LOCAL_IRQ_LOCK(lvar) \ -+ DEFINE_PER_CPU(struct local_irq_lock, lvar) = { \ -+ .lock = __SPIN_LOCK_UNLOCKED((lvar).lock) } -+ -+#define DECLARE_LOCAL_IRQ_LOCK(lvar) \ -+ DECLARE_PER_CPU(struct local_irq_lock, lvar) -+ -+#define local_irq_lock_init(lvar) \ -+ do { \ -+ int __cpu; \ -+ for_each_possible_cpu(__cpu) \ -+ spin_lock_init(&per_cpu(lvar, __cpu).lock); \ -+ } while (0) -+ -+/* -+ * spin_lock|trylock|unlock_local flavour that does not migrate disable -+ * used for __local_lock|trylock|unlock where get_local_var/put_local_var -+ * already takes care of the migrate_disable/enable -+ * for CONFIG_PREEMPT_BASE map to the normal spin_* calls. -+ */ -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define spin_lock_local(lock) rt_spin_lock(lock) -+# define spin_trylock_local(lock) rt_spin_trylock(lock) -+# define spin_unlock_local(lock) rt_spin_unlock(lock) -+#else -+# define spin_lock_local(lock) spin_lock(lock) -+# define spin_trylock_local(lock) spin_trylock(lock) -+# define spin_unlock_local(lock) spin_unlock(lock) -+#endif -+ -+static inline void __local_lock(struct local_irq_lock *lv) -+{ -+ if (lv->owner != current) { -+ spin_lock_local(&lv->lock); -+ LL_WARN(lv->owner); -+ LL_WARN(lv->nestcnt); -+ lv->owner = current; -+ } -+ lv->nestcnt++; -+} -+ -+#define local_lock(lvar) \ -+ do { __local_lock(&get_local_var(lvar)); } while (0) -+ -+static inline int __local_trylock(struct local_irq_lock *lv) -+{ -+ if (lv->owner != current && spin_trylock_local(&lv->lock)) { -+ LL_WARN(lv->owner); -+ LL_WARN(lv->nestcnt); -+ lv->owner = current; -+ lv->nestcnt = 1; -+ return 1; -+ } -+ return 0; -+} -+ -+#define local_trylock(lvar) \ -+ ({ \ -+ int __locked; \ -+ __locked = __local_trylock(&get_local_var(lvar)); \ -+ if (!__locked) \ -+ put_local_var(lvar); \ -+ __locked; \ -+ }) -+ -+static inline void __local_unlock(struct local_irq_lock *lv) -+{ -+ LL_WARN(lv->nestcnt == 0); -+ LL_WARN(lv->owner != current); -+ if (--lv->nestcnt) -+ return; -+ -+ lv->owner = NULL; -+ spin_unlock_local(&lv->lock); -+} -+ -+#define local_unlock(lvar) \ -+ do { \ -+ __local_unlock(this_cpu_ptr(&lvar)); \ -+ put_local_var(lvar); \ -+ } while (0) -+ -+static inline void __local_lock_irq(struct local_irq_lock *lv) -+{ -+ spin_lock_irqsave(&lv->lock, lv->flags); -+ LL_WARN(lv->owner); -+ LL_WARN(lv->nestcnt); -+ lv->owner = current; -+ lv->nestcnt = 1; -+} -+ -+#define local_lock_irq(lvar) \ -+ do { __local_lock_irq(&get_local_var(lvar)); } while (0) -+ -+#define local_lock_irq_on(lvar, cpu) \ -+ do { __local_lock_irq(&per_cpu(lvar, cpu)); } while (0) -+ -+static inline void __local_unlock_irq(struct local_irq_lock *lv) -+{ -+ LL_WARN(!lv->nestcnt); -+ LL_WARN(lv->owner != current); -+ lv->owner = NULL; -+ lv->nestcnt = 0; -+ spin_unlock_irq(&lv->lock); -+} -+ -+#define local_unlock_irq(lvar) \ -+ do { \ -+ __local_unlock_irq(this_cpu_ptr(&lvar)); \ -+ put_local_var(lvar); \ -+ } while (0) -+ -+#define local_unlock_irq_on(lvar, cpu) \ -+ do { \ -+ __local_unlock_irq(&per_cpu(lvar, cpu)); \ -+ } while (0) -+ -+static inline int __local_lock_irqsave(struct local_irq_lock *lv) -+{ -+ if (lv->owner != current) { -+ __local_lock_irq(lv); -+ return 0; -+ } else { -+ lv->nestcnt++; -+ return 1; -+ } -+} -+ -+#define local_lock_irqsave(lvar, _flags) \ -+ do { \ -+ if (__local_lock_irqsave(&get_local_var(lvar))) \ -+ put_local_var(lvar); \ -+ _flags = __this_cpu_read(lvar.flags); \ -+ } while (0) -+ -+#define local_lock_irqsave_on(lvar, _flags, cpu) \ -+ do { \ -+ __local_lock_irqsave(&per_cpu(lvar, cpu)); \ -+ _flags = per_cpu(lvar, cpu).flags; \ -+ } while (0) -+ -+static inline int __local_unlock_irqrestore(struct local_irq_lock *lv, -+ unsigned long flags) -+{ -+ LL_WARN(!lv->nestcnt); -+ LL_WARN(lv->owner != current); -+ if (--lv->nestcnt) -+ return 0; -+ -+ lv->owner = NULL; -+ spin_unlock_irqrestore(&lv->lock, lv->flags); -+ return 1; -+} -+ -+#define local_unlock_irqrestore(lvar, flags) \ -+ do { \ -+ if (__local_unlock_irqrestore(this_cpu_ptr(&lvar), flags)) \ -+ put_local_var(lvar); \ -+ } while (0) -+ -+#define local_unlock_irqrestore_on(lvar, flags, cpu) \ -+ do { \ -+ __local_unlock_irqrestore(&per_cpu(lvar, cpu), flags); \ -+ } while (0) -+ -+#define local_spin_trylock_irq(lvar, lock) \ -+ ({ \ -+ int __locked; \ -+ local_lock_irq(lvar); \ -+ __locked = spin_trylock(lock); \ -+ if (!__locked) \ -+ local_unlock_irq(lvar); \ -+ __locked; \ -+ }) -+ -+#define local_spin_lock_irq(lvar, lock) \ -+ do { \ -+ local_lock_irq(lvar); \ -+ spin_lock(lock); \ -+ } while (0) -+ -+#define local_spin_unlock_irq(lvar, lock) \ -+ do { \ -+ spin_unlock(lock); \ -+ local_unlock_irq(lvar); \ -+ } while (0) -+ -+#define local_spin_lock_irqsave(lvar, lock, flags) \ -+ do { \ -+ local_lock_irqsave(lvar, flags); \ -+ spin_lock(lock); \ -+ } while (0) -+ -+#define local_spin_unlock_irqrestore(lvar, lock, flags) \ -+ do { \ -+ spin_unlock(lock); \ -+ local_unlock_irqrestore(lvar, flags); \ -+ } while (0) -+ -+#define get_locked_var(lvar, var) \ -+ (*({ \ -+ local_lock(lvar); \ -+ this_cpu_ptr(&var); \ -+ })) -+ -+#define put_locked_var(lvar, var) local_unlock(lvar); -+ -+#define local_lock_cpu(lvar) \ -+ ({ \ -+ local_lock(lvar); \ -+ smp_processor_id(); \ -+ }) -+ -+#define local_unlock_cpu(lvar) local_unlock(lvar) -+ -+#else /* PREEMPT_RT_BASE */ -+ -+#define DEFINE_LOCAL_IRQ_LOCK(lvar) __typeof__(const int) lvar -+#define DECLARE_LOCAL_IRQ_LOCK(lvar) extern __typeof__(const int) lvar -+ -+static inline void local_irq_lock_init(int lvar) { } -+ -+#define local_lock(lvar) preempt_disable() -+#define local_unlock(lvar) preempt_enable() -+#define local_lock_irq(lvar) local_irq_disable() -+#define local_unlock_irq(lvar) local_irq_enable() -+#define local_lock_irqsave(lvar, flags) local_irq_save(flags) -+#define local_unlock_irqrestore(lvar, flags) local_irq_restore(flags) -+ -+#define local_spin_trylock_irq(lvar, lock) spin_trylock_irq(lock) -+#define local_spin_lock_irq(lvar, lock) spin_lock_irq(lock) -+#define local_spin_unlock_irq(lvar, lock) spin_unlock_irq(lock) -+#define local_spin_lock_irqsave(lvar, lock, flags) \ -+ spin_lock_irqsave(lock, flags) -+#define local_spin_unlock_irqrestore(lvar, lock, flags) \ -+ spin_unlock_irqrestore(lock, flags) -+ -+#define get_locked_var(lvar, var) get_cpu_var(var) -+#define put_locked_var(lvar, var) put_cpu_var(var) -+ -+#define local_lock_cpu(lvar) get_cpu() -+#define local_unlock_cpu(lvar) put_cpu() -+ -+#endif -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/mm_types.h linux-4.1.26/include/linux/mm_types.h ---- linux-4.1.26.orig/include/linux/mm_types.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/mm_types.h 2016-06-19 15:30:58.667296578 +0200 -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -453,6 +454,9 @@ - bool tlb_flush_pending; - #endif - struct uprobes_state uprobes_state; -+#ifdef CONFIG_PREEMPT_RT_BASE -+ struct rcu_head delayed_drop; -+#endif - #ifdef CONFIG_X86_INTEL_MPX - /* address of the bounds directory */ - void __user *bd_addr; -diff -Nur linux-4.1.26.orig/include/linux/mutex.h linux-4.1.26/include/linux/mutex.h ---- linux-4.1.26.orig/include/linux/mutex.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/mutex.h 2016-06-19 15:30:58.671296732 +0200 -@@ -19,6 +19,17 @@ - #include - #include - -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ -+ , .dep_map = { .name = #lockname } -+#else -+# define __DEP_MAP_MUTEX_INITIALIZER(lockname) -+#endif -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+# include -+#else -+ - /* - * Simple, straightforward mutexes with strict semantics: - * -@@ -99,13 +110,6 @@ - static inline void mutex_destroy(struct mutex *lock) {} - #endif - --#ifdef CONFIG_DEBUG_LOCK_ALLOC --# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ -- , .dep_map = { .name = #lockname } --#else --# define __DEP_MAP_MUTEX_INITIALIZER(lockname) --#endif -- - #define __MUTEX_INITIALIZER(lockname) \ - { .count = ATOMIC_INIT(1) \ - , .wait_lock = __SPIN_LOCK_UNLOCKED(lockname.wait_lock) \ -@@ -173,6 +177,8 @@ - extern int mutex_trylock(struct mutex *lock); - extern void mutex_unlock(struct mutex *lock); - -+#endif /* !PREEMPT_RT_FULL */ -+ - extern int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock); - - #endif /* __LINUX_MUTEX_H */ -diff -Nur linux-4.1.26.orig/include/linux/mutex_rt.h linux-4.1.26/include/linux/mutex_rt.h ---- linux-4.1.26.orig/include/linux/mutex_rt.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/mutex_rt.h 2016-06-19 15:30:58.671296732 +0200 -@@ -0,0 +1,84 @@ -+#ifndef __LINUX_MUTEX_RT_H -+#define __LINUX_MUTEX_RT_H -+ -+#ifndef __LINUX_MUTEX_H -+#error "Please include mutex.h" -+#endif -+ -+#include -+ -+/* FIXME: Just for __lockfunc */ -+#include -+ -+struct mutex { -+ struct rt_mutex lock; -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ struct lockdep_map dep_map; -+#endif -+}; -+ -+#define __MUTEX_INITIALIZER(mutexname) \ -+ { \ -+ .lock = __RT_MUTEX_INITIALIZER(mutexname.lock) \ -+ __DEP_MAP_MUTEX_INITIALIZER(mutexname) \ -+ } -+ -+#define DEFINE_MUTEX(mutexname) \ -+ struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) -+ -+extern void __mutex_do_init(struct mutex *lock, const char *name, struct lock_class_key *key); -+extern void __lockfunc _mutex_lock(struct mutex *lock); -+extern int __lockfunc _mutex_lock_interruptible(struct mutex *lock); -+extern int __lockfunc _mutex_lock_killable(struct mutex *lock); -+extern void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass); -+extern void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest_lock); -+extern int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass); -+extern int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass); -+extern int __lockfunc _mutex_trylock(struct mutex *lock); -+extern void __lockfunc _mutex_unlock(struct mutex *lock); -+ -+#define mutex_is_locked(l) rt_mutex_is_locked(&(l)->lock) -+#define mutex_lock(l) _mutex_lock(l) -+#define mutex_lock_interruptible(l) _mutex_lock_interruptible(l) -+#define mutex_lock_killable(l) _mutex_lock_killable(l) -+#define mutex_trylock(l) _mutex_trylock(l) -+#define mutex_unlock(l) _mutex_unlock(l) -+#define mutex_destroy(l) rt_mutex_destroy(&(l)->lock) -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+# define mutex_lock_nested(l, s) _mutex_lock_nested(l, s) -+# define mutex_lock_interruptible_nested(l, s) \ -+ _mutex_lock_interruptible_nested(l, s) -+# define mutex_lock_killable_nested(l, s) \ -+ _mutex_lock_killable_nested(l, s) -+ -+# define mutex_lock_nest_lock(lock, nest_lock) \ -+do { \ -+ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ -+ _mutex_lock_nest_lock(lock, &(nest_lock)->dep_map); \ -+} while (0) -+ -+#else -+# define mutex_lock_nested(l, s) _mutex_lock(l) -+# define mutex_lock_interruptible_nested(l, s) \ -+ _mutex_lock_interruptible(l) -+# define mutex_lock_killable_nested(l, s) \ -+ _mutex_lock_killable(l) -+# define mutex_lock_nest_lock(lock, nest_lock) mutex_lock(lock) -+#endif -+ -+# define mutex_init(mutex) \ -+do { \ -+ static struct lock_class_key __key; \ -+ \ -+ rt_mutex_init(&(mutex)->lock); \ -+ __mutex_do_init((mutex), #mutex, &__key); \ -+} while (0) -+ -+# define __mutex_init(mutex, name, key) \ -+do { \ -+ rt_mutex_init(&(mutex)->lock); \ -+ __mutex_do_init((mutex), name, key); \ -+} while (0) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/netdevice.h linux-4.1.26/include/linux/netdevice.h ---- linux-4.1.26.orig/include/linux/netdevice.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/netdevice.h 2016-06-19 15:30:58.671296732 +0200 -@@ -2192,11 +2192,20 @@ - void synchronize_net(void); - int init_dummy_netdev(struct net_device *dev); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static inline int dev_recursion_level(void) -+{ -+ return current->xmit_recursion; -+} -+ -+#else -+ - DECLARE_PER_CPU(int, xmit_recursion); - static inline int dev_recursion_level(void) - { - return this_cpu_read(xmit_recursion); - } -+#endif - - struct net_device *dev_get_by_index(struct net *net, int ifindex); - struct net_device *__dev_get_by_index(struct net *net, int ifindex); -@@ -2469,6 +2478,7 @@ - unsigned int dropped; - struct sk_buff_head input_pkt_queue; - struct napi_struct backlog; -+ struct sk_buff_head tofree_queue; - - }; - -diff -Nur linux-4.1.26.orig/include/linux/netfilter/x_tables.h linux-4.1.26/include/linux/netfilter/x_tables.h ---- linux-4.1.26.orig/include/linux/netfilter/x_tables.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/netfilter/x_tables.h 2016-06-19 15:30:58.671296732 +0200 -@@ -3,6 +3,7 @@ - - - #include -+#include - #include - - /** -@@ -282,6 +283,8 @@ - */ - DECLARE_PER_CPU(seqcount_t, xt_recseq); - -+DECLARE_LOCAL_IRQ_LOCK(xt_write_lock); -+ - /** - * xt_write_recseq_begin - start of a write section - * -@@ -296,6 +299,9 @@ - { - unsigned int addend; - -+ /* RT protection */ -+ local_lock(xt_write_lock); -+ - /* - * Low order bit of sequence is set if we already - * called xt_write_recseq_begin(). -@@ -326,6 +332,7 @@ - /* this is kind of a write_seqcount_end(), but addend is 0 or 1 */ - smp_wmb(); - __this_cpu_add(xt_recseq.sequence, addend); -+ local_unlock(xt_write_lock); - } - - /* -diff -Nur linux-4.1.26.orig/include/linux/notifier.h linux-4.1.26/include/linux/notifier.h ---- linux-4.1.26.orig/include/linux/notifier.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/notifier.h 2016-06-19 15:30:58.671296732 +0200 -@@ -6,7 +6,7 @@ - * - * Alan Cox - */ -- -+ - #ifndef _LINUX_NOTIFIER_H - #define _LINUX_NOTIFIER_H - #include -@@ -42,9 +42,7 @@ - * in srcu_notifier_call_chain(): no cache bounces and no memory barriers. - * As compensation, srcu_notifier_chain_unregister() is rather expensive. - * SRCU notifier chains should be used when the chain will be called very -- * often but notifier_blocks will seldom be removed. Also, SRCU notifier -- * chains are slightly more difficult to use because they require special -- * runtime initialization. -+ * often but notifier_blocks will seldom be removed. - */ - - typedef int (*notifier_fn_t)(struct notifier_block *nb, -@@ -88,7 +86,7 @@ - (name)->head = NULL; \ - } while (0) - --/* srcu_notifier_heads must be initialized and cleaned up dynamically */ -+/* srcu_notifier_heads must be cleaned up dynamically */ - extern void srcu_init_notifier_head(struct srcu_notifier_head *nh); - #define srcu_cleanup_notifier_head(name) \ - cleanup_srcu_struct(&(name)->srcu); -@@ -101,7 +99,13 @@ - .head = NULL } - #define RAW_NOTIFIER_INIT(name) { \ - .head = NULL } --/* srcu_notifier_heads cannot be initialized statically */ -+ -+#define SRCU_NOTIFIER_INIT(name, pcpu) \ -+ { \ -+ .mutex = __MUTEX_INITIALIZER(name.mutex), \ -+ .head = NULL, \ -+ .srcu = __SRCU_STRUCT_INIT(name.srcu, pcpu), \ -+ } - - #define ATOMIC_NOTIFIER_HEAD(name) \ - struct atomic_notifier_head name = \ -@@ -113,6 +117,18 @@ - struct raw_notifier_head name = \ - RAW_NOTIFIER_INIT(name) - -+#define _SRCU_NOTIFIER_HEAD(name, mod) \ -+ static DEFINE_PER_CPU(struct srcu_struct_array, \ -+ name##_head_srcu_array); \ -+ mod struct srcu_notifier_head name = \ -+ SRCU_NOTIFIER_INIT(name, name##_head_srcu_array) -+ -+#define SRCU_NOTIFIER_HEAD(name) \ -+ _SRCU_NOTIFIER_HEAD(name, ) -+ -+#define SRCU_NOTIFIER_HEAD_STATIC(name) \ -+ _SRCU_NOTIFIER_HEAD(name, static) -+ - #ifdef __KERNEL__ - - extern int atomic_notifier_chain_register(struct atomic_notifier_head *nh, -@@ -182,12 +198,12 @@ - - /* - * Declared notifiers so far. I can imagine quite a few more chains -- * over time (eg laptop power reset chains, reboot chain (to clean -+ * over time (eg laptop power reset chains, reboot chain (to clean - * device units up), device [un]mount chain, module load/unload chain, -- * low memory chain, screenblank chain (for plug in modular screenblankers) -+ * low memory chain, screenblank chain (for plug in modular screenblankers) - * VC switch chains (for loadable kernel svgalib VC switch helpers) etc... - */ -- -+ - /* CPU notfiers are defined in include/linux/cpu.h. */ - - /* netdevice notifiers are defined in include/linux/netdevice.h */ -diff -Nur linux-4.1.26.orig/include/linux/percpu.h linux-4.1.26/include/linux/percpu.h ---- linux-4.1.26.orig/include/linux/percpu.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/percpu.h 2016-06-19 15:30:58.671296732 +0200 -@@ -24,6 +24,35 @@ - PERCPU_MODULE_RESERVE) - #endif - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ -+#define get_local_var(var) (*({ \ -+ migrate_disable(); \ -+ this_cpu_ptr(&var); })) -+ -+#define put_local_var(var) do { \ -+ (void)&(var); \ -+ migrate_enable(); \ -+} while (0) -+ -+# define get_local_ptr(var) ({ \ -+ migrate_disable(); \ -+ this_cpu_ptr(var); }) -+ -+# define put_local_ptr(var) do { \ -+ (void)(var); \ -+ migrate_enable(); \ -+} while (0) -+ -+#else -+ -+#define get_local_var(var) get_cpu_var(var) -+#define put_local_var(var) put_cpu_var(var) -+#define get_local_ptr(var) get_cpu_ptr(var) -+#define put_local_ptr(var) put_cpu_ptr(var) -+ -+#endif -+ - /* minimum unit size, also is the maximum supported allocation size */ - #define PCPU_MIN_UNIT_SIZE PFN_ALIGN(32 << 10) - -diff -Nur linux-4.1.26.orig/include/linux/pid.h linux-4.1.26/include/linux/pid.h ---- linux-4.1.26.orig/include/linux/pid.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/pid.h 2016-06-19 15:30:58.671296732 +0200 -@@ -2,6 +2,7 @@ - #define _LINUX_PID_H - - #include -+#include - - enum pid_type - { -diff -Nur linux-4.1.26.orig/include/linux/platform_data/gpio-omap.h linux-4.1.26/include/linux/platform_data/gpio-omap.h ---- linux-4.1.26.orig/include/linux/platform_data/gpio-omap.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/platform_data/gpio-omap.h 2016-06-19 15:30:58.671296732 +0200 -@@ -198,7 +198,6 @@ - int bank_width; /* GPIO bank width */ - int bank_stride; /* Only needed for omap1 MPUIO */ - bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ -- bool loses_context; /* whether the bank would ever lose context */ - bool is_mpuio; /* whether the bank is of type MPUIO */ - u32 non_wakeup_gpios; - -@@ -208,9 +207,17 @@ - int (*get_context_loss_count)(struct device *dev); - }; - -+#if IS_BUILTIN(CONFIG_GPIO_OMAP) - extern void omap2_gpio_prepare_for_idle(int off_mode); - extern void omap2_gpio_resume_after_idle(void); --extern void omap_set_gpio_debounce(int gpio, int enable); --extern void omap_set_gpio_debounce_time(int gpio, int enable); -+#else -+static inline void omap2_gpio_prepare_for_idle(int off_mode) -+{ -+} -+ -+static inline void omap2_gpio_resume_after_idle(void) -+{ -+} -+#endif - - #endif -diff -Nur linux-4.1.26.orig/include/linux/preempt.h linux-4.1.26/include/linux/preempt.h ---- linux-4.1.26.orig/include/linux/preempt.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/preempt.h 2016-06-19 15:30:58.671296732 +0200 -@@ -34,6 +34,20 @@ - #define preempt_count_inc() preempt_count_add(1) - #define preempt_count_dec() preempt_count_sub(1) - -+#ifdef CONFIG_PREEMPT_LAZY -+#define add_preempt_lazy_count(val) do { preempt_lazy_count() += (val); } while (0) -+#define sub_preempt_lazy_count(val) do { preempt_lazy_count() -= (val); } while (0) -+#define inc_preempt_lazy_count() add_preempt_lazy_count(1) -+#define dec_preempt_lazy_count() sub_preempt_lazy_count(1) -+#define preempt_lazy_count() (current_thread_info()->preempt_lazy_count) -+#else -+#define add_preempt_lazy_count(val) do { } while (0) -+#define sub_preempt_lazy_count(val) do { } while (0) -+#define inc_preempt_lazy_count() do { } while (0) -+#define dec_preempt_lazy_count() do { } while (0) -+#define preempt_lazy_count() (0) -+#endif -+ - #ifdef CONFIG_PREEMPT_COUNT - - #define preempt_disable() \ -@@ -42,13 +56,25 @@ - barrier(); \ - } while (0) - -+#define preempt_lazy_disable() \ -+do { \ -+ inc_preempt_lazy_count(); \ -+ barrier(); \ -+} while (0) -+ - #define sched_preempt_enable_no_resched() \ - do { \ - barrier(); \ - preempt_count_dec(); \ - } while (0) - --#define preempt_enable_no_resched() sched_preempt_enable_no_resched() -+#ifdef CONFIG_PREEMPT_RT_BASE -+# define preempt_enable_no_resched() sched_preempt_enable_no_resched() -+# define preempt_check_resched_rt() preempt_check_resched() -+#else -+# define preempt_enable_no_resched() preempt_enable() -+# define preempt_check_resched_rt() barrier(); -+#endif - - #ifdef CONFIG_PREEMPT - #define preempt_enable() \ -@@ -64,6 +90,13 @@ - __preempt_schedule(); \ - } while (0) - -+#define preempt_lazy_enable() \ -+do { \ -+ dec_preempt_lazy_count(); \ -+ barrier(); \ -+ preempt_check_resched(); \ -+} while (0) -+ - #else - #define preempt_enable() \ - do { \ -@@ -122,6 +155,7 @@ - #define preempt_disable_notrace() barrier() - #define preempt_enable_no_resched_notrace() barrier() - #define preempt_enable_notrace() barrier() -+#define preempt_check_resched_rt() barrier() - - #endif /* CONFIG_PREEMPT_COUNT */ - -@@ -141,10 +175,31 @@ - } while (0) - #define preempt_fold_need_resched() \ - do { \ -- if (tif_need_resched()) \ -+ if (tif_need_resched_now()) \ - set_preempt_need_resched(); \ - } while (0) - -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define preempt_disable_rt() preempt_disable() -+# define preempt_enable_rt() preempt_enable() -+# define preempt_disable_nort() barrier() -+# define preempt_enable_nort() barrier() -+# ifdef CONFIG_SMP -+ extern void migrate_disable(void); -+ extern void migrate_enable(void); -+# else /* CONFIG_SMP */ -+# define migrate_disable() barrier() -+# define migrate_enable() barrier() -+# endif /* CONFIG_SMP */ -+#else -+# define preempt_disable_rt() barrier() -+# define preempt_enable_rt() barrier() -+# define preempt_disable_nort() preempt_disable() -+# define preempt_enable_nort() preempt_enable() -+# define migrate_disable() preempt_disable() -+# define migrate_enable() preempt_enable() -+#endif -+ - #ifdef CONFIG_PREEMPT_NOTIFIERS - - struct preempt_notifier; -diff -Nur linux-4.1.26.orig/include/linux/preempt_mask.h linux-4.1.26/include/linux/preempt_mask.h ---- linux-4.1.26.orig/include/linux/preempt_mask.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/preempt_mask.h 2016-06-19 15:30:58.671296732 +0200 -@@ -44,16 +44,26 @@ - #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT) - #define NMI_OFFSET (1UL << NMI_SHIFT) - --#define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) -+#ifndef CONFIG_PREEMPT_RT_FULL -+# define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) -+#else -+# define SOFTIRQ_DISABLE_OFFSET (0) -+#endif - - #define PREEMPT_ACTIVE_BITS 1 - #define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS) - #define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT) - - #define hardirq_count() (preempt_count() & HARDIRQ_MASK) --#define softirq_count() (preempt_count() & SOFTIRQ_MASK) - #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \ - | NMI_MASK)) -+#ifndef CONFIG_PREEMPT_RT_FULL -+# define softirq_count() (preempt_count() & SOFTIRQ_MASK) -+# define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) -+#else -+# define softirq_count() (0UL) -+extern int in_serving_softirq(void); -+#endif - - /* - * Are we doing bottom half or hardware interrupt processing? -@@ -64,7 +74,6 @@ - #define in_irq() (hardirq_count()) - #define in_softirq() (softirq_count()) - #define in_interrupt() (irq_count()) --#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) - - /* - * Are we in NMI context? -@@ -83,7 +92,11 @@ - /* - * The preempt_count offset after spin_lock() - */ -+#if !defined(CONFIG_PREEMPT_RT_FULL) - #define PREEMPT_LOCK_OFFSET PREEMPT_DISABLE_OFFSET -+#else -+#define PREEMPT_LOCK_OFFSET 0 -+#endif - - /* - * The preempt_count offset needed for things like: -diff -Nur linux-4.1.26.orig/include/linux/printk.h linux-4.1.26/include/linux/printk.h ---- linux-4.1.26.orig/include/linux/printk.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/printk.h 2016-06-19 15:30:58.671296732 +0200 -@@ -115,9 +115,11 @@ - #ifdef CONFIG_EARLY_PRINTK - extern asmlinkage __printf(1, 2) - void early_printk(const char *fmt, ...); -+extern void printk_kill(void); - #else - static inline __printf(1, 2) __cold - void early_printk(const char *s, ...) { } -+static inline void printk_kill(void) { } - #endif - - typedef int(*printk_func_t)(const char *fmt, va_list args); -diff -Nur linux-4.1.26.orig/include/linux/radix-tree.h linux-4.1.26/include/linux/radix-tree.h ---- linux-4.1.26.orig/include/linux/radix-tree.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/radix-tree.h 2016-06-19 15:30:58.671296732 +0200 -@@ -277,8 +277,13 @@ - unsigned int radix_tree_gang_lookup_slot(struct radix_tree_root *root, - void ***results, unsigned long *indices, - unsigned long first_index, unsigned int max_items); -+#ifndef CONFIG_PREEMPT_RT_FULL - int radix_tree_preload(gfp_t gfp_mask); - int radix_tree_maybe_preload(gfp_t gfp_mask); -+#else -+static inline int radix_tree_preload(gfp_t gm) { return 0; } -+static inline int radix_tree_maybe_preload(gfp_t gfp_mask) { return 0; } -+#endif - void radix_tree_init(void); - void *radix_tree_tag_set(struct radix_tree_root *root, - unsigned long index, unsigned int tag); -@@ -303,7 +308,7 @@ - - static inline void radix_tree_preload_end(void) - { -- preempt_enable(); -+ preempt_enable_nort(); - } - - /** -diff -Nur linux-4.1.26.orig/include/linux/random.h linux-4.1.26/include/linux/random.h ---- linux-4.1.26.orig/include/linux/random.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/random.h 2016-06-19 15:30:58.671296732 +0200 -@@ -11,7 +11,7 @@ - extern void add_device_randomness(const void *, unsigned int); - extern void add_input_randomness(unsigned int type, unsigned int code, - unsigned int value); --extern void add_interrupt_randomness(int irq, int irq_flags); -+extern void add_interrupt_randomness(int irq, int irq_flags, __u64 ip); - - extern void get_random_bytes(void *buf, int nbytes); - extern void get_random_bytes_arch(void *buf, int nbytes); -diff -Nur linux-4.1.26.orig/include/linux/rcupdate.h linux-4.1.26/include/linux/rcupdate.h ---- linux-4.1.26.orig/include/linux/rcupdate.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/rcupdate.h 2016-06-19 15:30:58.671296732 +0200 -@@ -167,6 +167,9 @@ - - #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ - -+#ifdef CONFIG_PREEMPT_RT_FULL -+#define call_rcu_bh call_rcu -+#else - /** - * call_rcu_bh() - Queue an RCU for invocation after a quicker grace period. - * @head: structure to be used for queueing the RCU updates. -@@ -190,6 +193,7 @@ - */ - void call_rcu_bh(struct rcu_head *head, - void (*func)(struct rcu_head *head)); -+#endif - - /** - * call_rcu_sched() - Queue an RCU for invocation after sched grace period. -@@ -260,6 +264,11 @@ - * types of kernel builds, the rcu_read_lock() nesting depth is unknowable. - */ - #define rcu_preempt_depth() (current->rcu_read_lock_nesting) -+#ifndef CONFIG_PREEMPT_RT_FULL -+#define sched_rcu_preempt_depth() rcu_preempt_depth() -+#else -+static inline int sched_rcu_preempt_depth(void) { return 0; } -+#endif - - #else /* #ifdef CONFIG_PREEMPT_RCU */ - -@@ -283,6 +292,8 @@ - return 0; - } - -+#define sched_rcu_preempt_depth() rcu_preempt_depth() -+ - #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ - - /* Internal to kernel */ -@@ -463,7 +474,14 @@ - int debug_lockdep_rcu_enabled(void); - - int rcu_read_lock_held(void); -+#ifdef CONFIG_PREEMPT_RT_FULL -+static inline int rcu_read_lock_bh_held(void) -+{ -+ return rcu_read_lock_held(); -+} -+#else - int rcu_read_lock_bh_held(void); -+#endif - - /** - * rcu_read_lock_sched_held() - might we be in RCU-sched read-side critical section? -@@ -990,10 +1008,14 @@ - static inline void rcu_read_lock_bh(void) - { - local_bh_disable(); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ rcu_read_lock(); -+#else - __acquire(RCU_BH); - rcu_lock_acquire(&rcu_bh_lock_map); - rcu_lockdep_assert(rcu_is_watching(), - "rcu_read_lock_bh() used illegally while idle"); -+#endif - } - - /* -@@ -1003,10 +1025,14 @@ - */ - static inline void rcu_read_unlock_bh(void) - { -+#ifdef CONFIG_PREEMPT_RT_FULL -+ rcu_read_unlock(); -+#else - rcu_lockdep_assert(rcu_is_watching(), - "rcu_read_unlock_bh() used illegally while idle"); - rcu_lock_release(&rcu_bh_lock_map); - __release(RCU_BH); -+#endif - local_bh_enable(); - } - -diff -Nur linux-4.1.26.orig/include/linux/rcutree.h linux-4.1.26/include/linux/rcutree.h ---- linux-4.1.26.orig/include/linux/rcutree.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/rcutree.h 2016-06-19 15:30:58.671296732 +0200 -@@ -46,7 +46,11 @@ - rcu_note_context_switch(); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define synchronize_rcu_bh synchronize_rcu -+#else - void synchronize_rcu_bh(void); -+#endif - void synchronize_sched_expedited(void); - void synchronize_rcu_expedited(void); - -@@ -74,7 +78,11 @@ - } - - void rcu_barrier(void); -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define rcu_barrier_bh rcu_barrier -+#else - void rcu_barrier_bh(void); -+#endif - void rcu_barrier_sched(void); - unsigned long get_state_synchronize_rcu(void); - void cond_synchronize_rcu(unsigned long oldstate); -@@ -85,12 +93,10 @@ - unsigned long rcu_batches_started_bh(void); - unsigned long rcu_batches_started_sched(void); - unsigned long rcu_batches_completed(void); --unsigned long rcu_batches_completed_bh(void); - unsigned long rcu_batches_completed_sched(void); - void show_rcu_gp_kthreads(void); - - void rcu_force_quiescent_state(void); --void rcu_bh_force_quiescent_state(void); - void rcu_sched_force_quiescent_state(void); - - void exit_rcu(void); -@@ -100,6 +106,14 @@ - - bool rcu_is_watching(void); - -+#ifndef CONFIG_PREEMPT_RT_FULL -+void rcu_bh_force_quiescent_state(void); -+unsigned long rcu_batches_completed_bh(void); -+#else -+# define rcu_bh_force_quiescent_state rcu_force_quiescent_state -+# define rcu_batches_completed_bh rcu_batches_completed -+#endif -+ - void rcu_all_qs(void); - - #endif /* __LINUX_RCUTREE_H */ -diff -Nur linux-4.1.26.orig/include/linux/rtmutex.h linux-4.1.26/include/linux/rtmutex.h ---- linux-4.1.26.orig/include/linux/rtmutex.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/rtmutex.h 2016-06-19 15:30:58.675296887 +0200 -@@ -14,10 +14,14 @@ - - #include - #include --#include -+#include - - extern int max_lock_depth; /* for sysctl */ - -+#ifdef CONFIG_DEBUG_MUTEXES -+#include -+#endif -+ - /** - * The rt_mutex structure - * -@@ -31,8 +35,8 @@ - struct rb_root waiters; - struct rb_node *waiters_leftmost; - struct task_struct *owner; --#ifdef CONFIG_DEBUG_RT_MUTEXES - int save_state; -+#ifdef CONFIG_DEBUG_RT_MUTEXES - const char *name, *file; - int line; - void *magic; -@@ -55,22 +59,33 @@ - # define rt_mutex_debug_check_no_locks_held(task) do { } while (0) - #endif - -+# define rt_mutex_init(mutex) \ -+ do { \ -+ raw_spin_lock_init(&(mutex)->wait_lock); \ -+ __rt_mutex_init(mutex, #mutex); \ -+ } while (0) -+ - #ifdef CONFIG_DEBUG_RT_MUTEXES - # define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ - , .name = #mutexname, .file = __FILE__, .line = __LINE__ --# define rt_mutex_init(mutex) __rt_mutex_init(mutex, __func__) - extern void rt_mutex_debug_task_free(struct task_struct *tsk); - #else - # define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) --# define rt_mutex_init(mutex) __rt_mutex_init(mutex, NULL) - # define rt_mutex_debug_task_free(t) do { } while (0) - #endif - --#define __RT_MUTEX_INITIALIZER(mutexname) \ -- { .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ -+#define __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ -+ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ - , .waiters = RB_ROOT \ - , .owner = NULL \ -- __DEBUG_RT_MUTEX_INITIALIZER(mutexname)} -+ __DEBUG_RT_MUTEX_INITIALIZER(mutexname) -+ -+#define __RT_MUTEX_INITIALIZER(mutexname) \ -+ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) } -+ -+#define __RT_MUTEX_INITIALIZER_SAVE_STATE(mutexname) \ -+ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ -+ , .save_state = 1 } - - #define DEFINE_RT_MUTEX(mutexname) \ - struct rt_mutex mutexname = __RT_MUTEX_INITIALIZER(mutexname) -@@ -91,6 +106,7 @@ - - extern void rt_mutex_lock(struct rt_mutex *lock); - extern int rt_mutex_lock_interruptible(struct rt_mutex *lock); -+extern int rt_mutex_lock_killable(struct rt_mutex *lock); - extern int rt_mutex_timed_lock(struct rt_mutex *lock, - struct hrtimer_sleeper *timeout); - -diff -Nur linux-4.1.26.orig/include/linux/rwlock_rt.h linux-4.1.26/include/linux/rwlock_rt.h ---- linux-4.1.26.orig/include/linux/rwlock_rt.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/rwlock_rt.h 2016-06-19 15:30:58.675296887 +0200 -@@ -0,0 +1,99 @@ -+#ifndef __LINUX_RWLOCK_RT_H -+#define __LINUX_RWLOCK_RT_H -+ -+#ifndef __LINUX_SPINLOCK_H -+#error Do not include directly. Use spinlock.h -+#endif -+ -+#define rwlock_init(rwl) \ -+do { \ -+ static struct lock_class_key __key; \ -+ \ -+ rt_mutex_init(&(rwl)->lock); \ -+ __rt_rwlock_init(rwl, #rwl, &__key); \ -+} while (0) -+ -+extern void __lockfunc rt_write_lock(rwlock_t *rwlock); -+extern void __lockfunc rt_read_lock(rwlock_t *rwlock); -+extern int __lockfunc rt_write_trylock(rwlock_t *rwlock); -+extern int __lockfunc rt_write_trylock_irqsave(rwlock_t *trylock, unsigned long *flags); -+extern int __lockfunc rt_read_trylock(rwlock_t *rwlock); -+extern void __lockfunc rt_write_unlock(rwlock_t *rwlock); -+extern void __lockfunc rt_read_unlock(rwlock_t *rwlock); -+extern unsigned long __lockfunc rt_write_lock_irqsave(rwlock_t *rwlock); -+extern unsigned long __lockfunc rt_read_lock_irqsave(rwlock_t *rwlock); -+extern void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key); -+ -+#define read_trylock(lock) __cond_lock(lock, rt_read_trylock(lock)) -+#define write_trylock(lock) __cond_lock(lock, rt_write_trylock(lock)) -+ -+#define write_trylock_irqsave(lock, flags) \ -+ __cond_lock(lock, rt_write_trylock_irqsave(lock, &flags)) -+ -+#define read_lock_irqsave(lock, flags) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ flags = rt_read_lock_irqsave(lock); \ -+ } while (0) -+ -+#define write_lock_irqsave(lock, flags) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ flags = rt_write_lock_irqsave(lock); \ -+ } while (0) -+ -+#define read_lock(lock) rt_read_lock(lock) -+ -+#define read_lock_bh(lock) \ -+ do { \ -+ local_bh_disable(); \ -+ rt_read_lock(lock); \ -+ } while (0) -+ -+#define read_lock_irq(lock) read_lock(lock) -+ -+#define write_lock(lock) rt_write_lock(lock) -+ -+#define write_lock_bh(lock) \ -+ do { \ -+ local_bh_disable(); \ -+ rt_write_lock(lock); \ -+ } while (0) -+ -+#define write_lock_irq(lock) write_lock(lock) -+ -+#define read_unlock(lock) rt_read_unlock(lock) -+ -+#define read_unlock_bh(lock) \ -+ do { \ -+ rt_read_unlock(lock); \ -+ local_bh_enable(); \ -+ } while (0) -+ -+#define read_unlock_irq(lock) read_unlock(lock) -+ -+#define write_unlock(lock) rt_write_unlock(lock) -+ -+#define write_unlock_bh(lock) \ -+ do { \ -+ rt_write_unlock(lock); \ -+ local_bh_enable(); \ -+ } while (0) -+ -+#define write_unlock_irq(lock) write_unlock(lock) -+ -+#define read_unlock_irqrestore(lock, flags) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ (void) flags; \ -+ rt_read_unlock(lock); \ -+ } while (0) -+ -+#define write_unlock_irqrestore(lock, flags) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ (void) flags; \ -+ rt_write_unlock(lock); \ -+ } while (0) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/rwlock_types.h linux-4.1.26/include/linux/rwlock_types.h ---- linux-4.1.26.orig/include/linux/rwlock_types.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/rwlock_types.h 2016-06-19 15:30:58.675296887 +0200 -@@ -1,6 +1,10 @@ - #ifndef __LINUX_RWLOCK_TYPES_H - #define __LINUX_RWLOCK_TYPES_H - -+#if !defined(__LINUX_SPINLOCK_TYPES_H) -+# error "Do not include directly, include spinlock_types.h" -+#endif -+ - /* - * include/linux/rwlock_types.h - generic rwlock type definitions - * and initializers -@@ -43,6 +47,7 @@ - RW_DEP_MAP_INIT(lockname) } - #endif - --#define DEFINE_RWLOCK(x) rwlock_t x = __RW_LOCK_UNLOCKED(x) -+#define DEFINE_RWLOCK(name) \ -+ rwlock_t name __cacheline_aligned_in_smp = __RW_LOCK_UNLOCKED(name) - - #endif /* __LINUX_RWLOCK_TYPES_H */ -diff -Nur linux-4.1.26.orig/include/linux/rwlock_types_rt.h linux-4.1.26/include/linux/rwlock_types_rt.h ---- linux-4.1.26.orig/include/linux/rwlock_types_rt.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/rwlock_types_rt.h 2016-06-19 15:30:58.675296887 +0200 -@@ -0,0 +1,33 @@ -+#ifndef __LINUX_RWLOCK_TYPES_RT_H -+#define __LINUX_RWLOCK_TYPES_RT_H -+ -+#ifndef __LINUX_SPINLOCK_TYPES_H -+#error "Do not include directly. Include spinlock_types.h instead" -+#endif -+ -+/* -+ * rwlocks - rtmutex which allows single reader recursion -+ */ -+typedef struct { -+ struct rt_mutex lock; -+ int read_depth; -+ unsigned int break_lock; -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ struct lockdep_map dep_map; -+#endif -+} rwlock_t; -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+# define RW_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } -+#else -+# define RW_DEP_MAP_INIT(lockname) -+#endif -+ -+#define __RW_LOCK_UNLOCKED(name) \ -+ { .lock = __RT_MUTEX_INITIALIZER_SAVE_STATE(name.lock), \ -+ RW_DEP_MAP_INIT(name) } -+ -+#define DEFINE_RWLOCK(name) \ -+ rwlock_t name __cacheline_aligned_in_smp = __RW_LOCK_UNLOCKED(name) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/rwsem.h linux-4.1.26/include/linux/rwsem.h ---- linux-4.1.26.orig/include/linux/rwsem.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/rwsem.h 2016-06-19 15:30:58.675296887 +0200 -@@ -18,6 +18,10 @@ - #include - #endif - -+#ifdef CONFIG_PREEMPT_RT_FULL -+#include -+#else /* PREEMPT_RT_FULL */ -+ - struct rw_semaphore; - - #ifdef CONFIG_RWSEM_GENERIC_SPINLOCK -@@ -177,4 +181,6 @@ - # define up_read_non_owner(sem) up_read(sem) - #endif - -+#endif /* !PREEMPT_RT_FULL */ -+ - #endif /* _LINUX_RWSEM_H */ -diff -Nur linux-4.1.26.orig/include/linux/rwsem_rt.h linux-4.1.26/include/linux/rwsem_rt.h ---- linux-4.1.26.orig/include/linux/rwsem_rt.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/rwsem_rt.h 2016-06-19 15:30:58.675296887 +0200 -@@ -0,0 +1,140 @@ -+#ifndef _LINUX_RWSEM_RT_H -+#define _LINUX_RWSEM_RT_H -+ -+#ifndef _LINUX_RWSEM_H -+#error "Include rwsem.h" -+#endif -+ -+/* -+ * RW-semaphores are a spinlock plus a reader-depth count. -+ * -+ * Note that the semantics are different from the usual -+ * Linux rw-sems, in PREEMPT_RT mode we do not allow -+ * multiple readers to hold the lock at once, we only allow -+ * a read-lock owner to read-lock recursively. This is -+ * better for latency, makes the implementation inherently -+ * fair and makes it simpler as well. -+ */ -+ -+#include -+ -+struct rw_semaphore { -+ struct rt_mutex lock; -+ int read_depth; -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ struct lockdep_map dep_map; -+#endif -+}; -+ -+#define __RWSEM_INITIALIZER(name) \ -+ { .lock = __RT_MUTEX_INITIALIZER(name.lock), \ -+ RW_DEP_MAP_INIT(name) } -+ -+#define DECLARE_RWSEM(lockname) \ -+ struct rw_semaphore lockname = __RWSEM_INITIALIZER(lockname) -+ -+extern void __rt_rwsem_init(struct rw_semaphore *rwsem, const char *name, -+ struct lock_class_key *key); -+ -+#define __rt_init_rwsem(sem, name, key) \ -+ do { \ -+ rt_mutex_init(&(sem)->lock); \ -+ __rt_rwsem_init((sem), (name), (key));\ -+ } while (0) -+ -+#define __init_rwsem(sem, name, key) __rt_init_rwsem(sem, name, key) -+ -+# define rt_init_rwsem(sem) \ -+do { \ -+ static struct lock_class_key __key; \ -+ \ -+ __rt_init_rwsem((sem), #sem, &__key); \ -+} while (0) -+ -+extern void rt_down_write(struct rw_semaphore *rwsem); -+extern void rt_down_read_nested(struct rw_semaphore *rwsem, int subclass); -+extern void rt_down_write_nested(struct rw_semaphore *rwsem, int subclass); -+extern void rt_down_write_nested_lock(struct rw_semaphore *rwsem, -+ struct lockdep_map *nest); -+extern void rt_down_read(struct rw_semaphore *rwsem); -+extern int rt_down_write_trylock(struct rw_semaphore *rwsem); -+extern int rt_down_read_trylock(struct rw_semaphore *rwsem); -+extern void __rt_up_read(struct rw_semaphore *rwsem); -+extern void rt_up_read(struct rw_semaphore *rwsem); -+extern void rt_up_write(struct rw_semaphore *rwsem); -+extern void rt_downgrade_write(struct rw_semaphore *rwsem); -+ -+#define init_rwsem(sem) rt_init_rwsem(sem) -+#define rwsem_is_locked(s) rt_mutex_is_locked(&(s)->lock) -+ -+static inline int rwsem_is_contended(struct rw_semaphore *sem) -+{ -+ /* rt_mutex_has_waiters() */ -+ return !RB_EMPTY_ROOT(&sem->lock.waiters); -+} -+ -+static inline void down_read(struct rw_semaphore *sem) -+{ -+ rt_down_read(sem); -+} -+ -+static inline int down_read_trylock(struct rw_semaphore *sem) -+{ -+ return rt_down_read_trylock(sem); -+} -+ -+static inline void down_write(struct rw_semaphore *sem) -+{ -+ rt_down_write(sem); -+} -+ -+static inline int down_write_trylock(struct rw_semaphore *sem) -+{ -+ return rt_down_write_trylock(sem); -+} -+ -+static inline void __up_read(struct rw_semaphore *sem) -+{ -+ __rt_up_read(sem); -+} -+ -+static inline void up_read(struct rw_semaphore *sem) -+{ -+ rt_up_read(sem); -+} -+ -+static inline void up_write(struct rw_semaphore *sem) -+{ -+ rt_up_write(sem); -+} -+ -+static inline void downgrade_write(struct rw_semaphore *sem) -+{ -+ rt_downgrade_write(sem); -+} -+ -+static inline void down_read_nested(struct rw_semaphore *sem, int subclass) -+{ -+ return rt_down_read_nested(sem, subclass); -+} -+ -+static inline void down_write_nested(struct rw_semaphore *sem, int subclass) -+{ -+ rt_down_write_nested(sem, subclass); -+} -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+static inline void down_write_nest_lock(struct rw_semaphore *sem, -+ struct rw_semaphore *nest_lock) -+{ -+ rt_down_write_nested_lock(sem, &nest_lock->dep_map); -+} -+ -+#else -+ -+static inline void down_write_nest_lock(struct rw_semaphore *sem, -+ struct rw_semaphore *nest_lock) -+{ -+ rt_down_write_nested_lock(sem, NULL); -+} -+#endif -+#endif -diff -Nur linux-4.1.26.orig/include/linux/sched.h linux-4.1.26/include/linux/sched.h ---- linux-4.1.26.orig/include/linux/sched.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/sched.h 2016-06-19 15:30:58.675296887 +0200 -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -175,8 +176,6 @@ - extern void calc_global_load(unsigned long ticks); - extern void update_cpu_load_nohz(void); - --extern unsigned long get_parent_ip(unsigned long addr); -- - extern void dump_cpu_task(int cpu); - - struct seq_file; -@@ -234,10 +233,7 @@ - TASK_UNINTERRUPTIBLE | __TASK_STOPPED | \ - __TASK_TRACED | EXIT_ZOMBIE | EXIT_DEAD) - --#define task_is_traced(task) ((task->state & __TASK_TRACED) != 0) - #define task_is_stopped(task) ((task->state & __TASK_STOPPED) != 0) --#define task_is_stopped_or_traced(task) \ -- ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0) - #define task_contributes_to_load(task) \ - ((task->state & TASK_UNINTERRUPTIBLE) != 0 && \ - (task->flags & PF_FROZEN) == 0) -@@ -302,6 +298,11 @@ - - #endif - -+#define __set_current_state_no_track(state_value) \ -+ do { current->state = (state_value); } while (0) -+#define set_current_state_no_track(state_value) \ -+ set_mb(current->state, (state_value)) -+ - /* Task command name length */ - #define TASK_COMM_LEN 16 - -@@ -901,6 +902,50 @@ - #define SCHED_CAPACITY_SCALE (1L << SCHED_CAPACITY_SHIFT) - - /* -+ * Wake-queues are lists of tasks with a pending wakeup, whose -+ * callers have already marked the task as woken internally, -+ * and can thus carry on. A common use case is being able to -+ * do the wakeups once the corresponding user lock as been -+ * released. -+ * -+ * We hold reference to each task in the list across the wakeup, -+ * thus guaranteeing that the memory is still valid by the time -+ * the actual wakeups are performed in wake_up_q(). -+ * -+ * One per task suffices, because there's never a need for a task to be -+ * in two wake queues simultaneously; it is forbidden to abandon a task -+ * in a wake queue (a call to wake_up_q() _must_ follow), so if a task is -+ * already in a wake queue, the wakeup will happen soon and the second -+ * waker can just skip it. -+ * -+ * The WAKE_Q macro declares and initializes the list head. -+ * wake_up_q() does NOT reinitialize the list; it's expected to be -+ * called near the end of a function, where the fact that the queue is -+ * not used again will be easy to see by inspection. -+ * -+ * Note that this can cause spurious wakeups. schedule() callers -+ * must ensure the call is done inside a loop, confirming that the -+ * wakeup condition has in fact occurred. -+ */ -+struct wake_q_node { -+ struct wake_q_node *next; -+}; -+ -+struct wake_q_head { -+ struct wake_q_node *first; -+ struct wake_q_node **lastp; -+}; -+ -+#define WAKE_Q_TAIL ((struct wake_q_node *) 0x01) -+ -+#define WAKE_Q(name) \ -+ struct wake_q_head name = { WAKE_Q_TAIL, &name.first } -+ -+extern void wake_q_add(struct wake_q_head *head, -+ struct task_struct *task); -+extern void wake_up_q(struct wake_q_head *head); -+ -+/* - * sched-domains (multiprocessor balancing) declarations: - */ - #ifdef CONFIG_SMP -@@ -1292,6 +1337,7 @@ - - struct task_struct { - volatile long state; /* -1 unrunnable, 0 runnable, >0 stopped */ -+ volatile long saved_state; /* saved state for "spinlock sleepers" */ - void *stack; - atomic_t usage; - unsigned int flags; /* per process flags, defined below */ -@@ -1328,6 +1374,12 @@ - #endif - - unsigned int policy; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ int migrate_disable; -+# ifdef CONFIG_SCHED_DEBUG -+ int migrate_disable_atomic; -+# endif -+#endif - int nr_cpus_allowed; - cpumask_t cpus_allowed; - -@@ -1435,7 +1487,8 @@ - struct cputime prev_cputime; - #endif - #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN -- seqlock_t vtime_seqlock; -+ raw_spinlock_t vtime_lock; -+ seqcount_t vtime_seq; - unsigned long long vtime_snap; - enum { - VTIME_SLEEPING = 0, -@@ -1451,6 +1504,9 @@ - - struct task_cputime cputime_expires; - struct list_head cpu_timers[3]; -+#ifdef CONFIG_PREEMPT_RT_BASE -+ struct task_struct *posix_timer_list; -+#endif - - /* process credentials */ - const struct cred __rcu *real_cred; /* objective and real subjective task -@@ -1483,10 +1539,15 @@ - /* signal handlers */ - struct signal_struct *signal; - struct sighand_struct *sighand; -+ struct sigqueue *sigqueue_cache; - - sigset_t blocked, real_blocked; - sigset_t saved_sigmask; /* restored if set_restore_sigmask() was used */ - struct sigpending pending; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ /* TODO: move me into ->restart_block ? */ -+ struct siginfo forced_info; -+#endif - - unsigned long sas_ss_sp; - size_t sas_ss_size; -@@ -1512,6 +1573,8 @@ - /* Protection of the PI data structures: */ - raw_spinlock_t pi_lock; - -+ struct wake_q_node wake_q; -+ - #ifdef CONFIG_RT_MUTEXES - /* PI waiters blocked on a rt_mutex held by this task */ - struct rb_root pi_waiters; -@@ -1706,6 +1769,12 @@ - unsigned long trace; - /* bitmask and counter of trace recursion */ - unsigned long trace_recursion; -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ u64 preempt_timestamp_hist; -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ long timer_offset; -+#endif -+#endif - #endif /* CONFIG_TRACING */ - #ifdef CONFIG_MEMCG - struct memcg_oom_info { -@@ -1722,14 +1791,26 @@ - unsigned int sequential_io; - unsigned int sequential_io_avg; - #endif -+#ifdef CONFIG_PREEMPT_RT_BASE -+ struct rcu_head put_rcu; -+ int softirq_nestcnt; -+ unsigned int softirqs_raised; -+#endif -+#ifdef CONFIG_PREEMPT_RT_FULL -+# if defined CONFIG_HIGHMEM || defined CONFIG_X86_32 -+ int kmap_idx; -+ pte_t kmap_pte[KM_TYPE_NR]; -+# endif -+#endif - #ifdef CONFIG_DEBUG_ATOMIC_SLEEP - unsigned long task_state_change; - #endif -+#ifdef CONFIG_PREEMPT_RT_FULL -+ int xmit_recursion; -+#endif -+ int pagefault_disabled; - }; - --/* Future-safe accessor for struct task_struct's cpus_allowed. */ --#define tsk_cpus_allowed(tsk) (&(tsk)->cpus_allowed) -- - #define TNF_MIGRATED 0x01 - #define TNF_NO_GROUP 0x02 - #define TNF_SHARED 0x04 -@@ -1918,6 +1999,15 @@ - extern void free_task(struct task_struct *tsk); - #define get_task_struct(tsk) do { atomic_inc(&(tsk)->usage); } while(0) - -+#ifdef CONFIG_PREEMPT_RT_BASE -+extern void __put_task_struct_cb(struct rcu_head *rhp); -+ -+static inline void put_task_struct(struct task_struct *t) -+{ -+ if (atomic_dec_and_test(&t->usage)) -+ call_rcu(&t->put_rcu, __put_task_struct_cb); -+} -+#else - extern void __put_task_struct(struct task_struct *t); - - static inline void put_task_struct(struct task_struct *t) -@@ -1925,6 +2015,7 @@ - if (atomic_dec_and_test(&t->usage)) - __put_task_struct(t); - } -+#endif - - #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN - extern void task_cputime(struct task_struct *t, -@@ -1963,6 +2054,7 @@ - /* - * Per process flags - */ -+#define PF_IN_SOFTIRQ 0x00000001 /* Task is serving softirq */ - #define PF_EXITING 0x00000004 /* getting shut down */ - #define PF_EXITPIDONE 0x00000008 /* pi exit done on shut down */ - #define PF_VCPU 0x00000010 /* I'm a virtual CPU */ -@@ -2127,6 +2219,10 @@ - - extern int set_cpus_allowed_ptr(struct task_struct *p, - const struct cpumask *new_mask); -+int migrate_me(void); -+void tell_sched_cpu_down_begin(int cpu); -+void tell_sched_cpu_down_done(int cpu); -+ - #else - static inline void do_set_cpus_allowed(struct task_struct *p, - const struct cpumask *new_mask) -@@ -2139,6 +2235,9 @@ - return -EINVAL; - return 0; - } -+static inline int migrate_me(void) { return 0; } -+static inline void tell_sched_cpu_down_begin(int cpu) { } -+static inline void tell_sched_cpu_down_done(int cpu) { } - #endif - - #ifdef CONFIG_NO_HZ_COMMON -@@ -2355,6 +2454,7 @@ - - extern int wake_up_state(struct task_struct *tsk, unsigned int state); - extern int wake_up_process(struct task_struct *tsk); -+extern int wake_up_lock_sleeper(struct task_struct * tsk); - extern void wake_up_new_task(struct task_struct *tsk); - #ifdef CONFIG_SMP - extern void kick_process(struct task_struct *tsk); -@@ -2471,12 +2571,24 @@ - - /* mmdrop drops the mm and the page tables */ - extern void __mmdrop(struct mm_struct *); -+ - static inline void mmdrop(struct mm_struct * mm) - { - if (unlikely(atomic_dec_and_test(&mm->mm_count))) - __mmdrop(mm); - } - -+#ifdef CONFIG_PREEMPT_RT_BASE -+extern void __mmdrop_delayed(struct rcu_head *rhp); -+static inline void mmdrop_delayed(struct mm_struct *mm) -+{ -+ if (atomic_dec_and_test(&mm->mm_count)) -+ call_rcu(&mm->delayed_drop, __mmdrop_delayed); -+} -+#else -+# define mmdrop_delayed(mm) mmdrop(mm) -+#endif -+ - /* mmput gets rid of the mappings and all user-space */ - extern void mmput(struct mm_struct *); - /* Grab a reference to a task's mm, if it is not already going away */ -@@ -2788,6 +2900,43 @@ - return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED)); - } - -+#ifdef CONFIG_PREEMPT_LAZY -+static inline void set_tsk_need_resched_lazy(struct task_struct *tsk) -+{ -+ set_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); -+} -+ -+static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) -+{ -+ clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); -+} -+ -+static inline int test_tsk_need_resched_lazy(struct task_struct *tsk) -+{ -+ return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY)); -+} -+ -+static inline int need_resched_lazy(void) -+{ -+ return test_thread_flag(TIF_NEED_RESCHED_LAZY); -+} -+ -+static inline int need_resched_now(void) -+{ -+ return test_thread_flag(TIF_NEED_RESCHED); -+} -+ -+#else -+static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) { } -+static inline int need_resched_lazy(void) { return 0; } -+ -+static inline int need_resched_now(void) -+{ -+ return test_thread_flag(TIF_NEED_RESCHED); -+} -+ -+#endif -+ - static inline int restart_syscall(void) - { - set_tsk_thread_flag(current, TIF_SIGPENDING); -@@ -2819,6 +2968,51 @@ - return (state & TASK_INTERRUPTIBLE) || __fatal_signal_pending(p); - } - -+static inline bool __task_is_stopped_or_traced(struct task_struct *task) -+{ -+ if (task->state & (__TASK_STOPPED | __TASK_TRACED)) -+ return true; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ if (task->saved_state & (__TASK_STOPPED | __TASK_TRACED)) -+ return true; -+#endif -+ return false; -+} -+ -+static inline bool task_is_stopped_or_traced(struct task_struct *task) -+{ -+ bool traced_stopped; -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ unsigned long flags; -+ -+ raw_spin_lock_irqsave(&task->pi_lock, flags); -+ traced_stopped = __task_is_stopped_or_traced(task); -+ raw_spin_unlock_irqrestore(&task->pi_lock, flags); -+#else -+ traced_stopped = __task_is_stopped_or_traced(task); -+#endif -+ return traced_stopped; -+} -+ -+static inline bool task_is_traced(struct task_struct *task) -+{ -+ bool traced = false; -+ -+ if (task->state & __TASK_TRACED) -+ return true; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ /* in case the task is sleeping on tasklist_lock */ -+ raw_spin_lock_irq(&task->pi_lock); -+ if (task->state & __TASK_TRACED) -+ traced = true; -+ else if (task->saved_state & __TASK_TRACED) -+ traced = true; -+ raw_spin_unlock_irq(&task->pi_lock); -+#endif -+ return traced; -+} -+ - /* - * cond_resched() and cond_resched_lock(): latency reduction via - * explicit rescheduling in places that are safe. The return -@@ -2840,12 +3034,16 @@ - __cond_resched_lock(lock); \ - }) - -+#ifndef CONFIG_PREEMPT_RT_FULL - extern int __cond_resched_softirq(void); - - #define cond_resched_softirq() ({ \ - ___might_sleep(__FILE__, __LINE__, SOFTIRQ_DISABLE_OFFSET); \ - __cond_resched_softirq(); \ - }) -+#else -+# define cond_resched_softirq() cond_resched() -+#endif - - static inline void cond_resched_rcu(void) - { -@@ -3012,6 +3210,26 @@ - - #endif /* CONFIG_SMP */ - -+static inline int __migrate_disabled(struct task_struct *p) -+{ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ return p->migrate_disable; -+#else -+ return 0; -+#endif -+} -+ -+/* Future-safe accessor for struct task_struct's cpus_allowed. */ -+static inline const struct cpumask *tsk_cpus_allowed(struct task_struct *p) -+{ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ if (p->migrate_disable) -+ return cpumask_of(task_cpu(p)); -+#endif -+ -+ return &p->cpus_allowed; -+} -+ - extern long sched_setaffinity(pid_t pid, const struct cpumask *new_mask); - extern long sched_getaffinity(pid_t pid, struct cpumask *mask); - -diff -Nur linux-4.1.26.orig/include/linux/seqlock.h linux-4.1.26/include/linux/seqlock.h ---- linux-4.1.26.orig/include/linux/seqlock.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/seqlock.h 2016-06-19 15:30:58.675296887 +0200 -@@ -219,20 +219,30 @@ - return __read_seqcount_retry(s, start); - } - -- -- --static inline void raw_write_seqcount_begin(seqcount_t *s) -+static inline void __raw_write_seqcount_begin(seqcount_t *s) - { - s->sequence++; - smp_wmb(); - } - --static inline void raw_write_seqcount_end(seqcount_t *s) -+static inline void raw_write_seqcount_begin(seqcount_t *s) -+{ -+ preempt_disable_rt(); -+ __raw_write_seqcount_begin(s); -+} -+ -+static inline void __raw_write_seqcount_end(seqcount_t *s) - { - smp_wmb(); - s->sequence++; - } - -+static inline void raw_write_seqcount_end(seqcount_t *s) -+{ -+ __raw_write_seqcount_end(s); -+ preempt_enable_rt(); -+} -+ - /* - * raw_write_seqcount_latch - redirect readers to even/odd copy - * @s: pointer to seqcount_t -@@ -305,10 +315,32 @@ - /* - * Read side functions for starting and finalizing a read side section. - */ -+#ifndef CONFIG_PREEMPT_RT_FULL - static inline unsigned read_seqbegin(const seqlock_t *sl) - { - return read_seqcount_begin(&sl->seqcount); - } -+#else -+/* -+ * Starvation safe read side for RT -+ */ -+static inline unsigned read_seqbegin(seqlock_t *sl) -+{ -+ unsigned ret; -+ -+repeat: -+ ret = ACCESS_ONCE(sl->seqcount.sequence); -+ if (unlikely(ret & 1)) { -+ /* -+ * Take the lock and let the writer proceed (i.e. evtl -+ * boost it), otherwise we could loop here forever. -+ */ -+ spin_unlock_wait(&sl->lock); -+ goto repeat; -+ } -+ return ret; -+} -+#endif - - static inline unsigned read_seqretry(const seqlock_t *sl, unsigned start) - { -@@ -323,36 +355,36 @@ - static inline void write_seqlock(seqlock_t *sl) - { - spin_lock(&sl->lock); -- write_seqcount_begin(&sl->seqcount); -+ __raw_write_seqcount_begin(&sl->seqcount); - } - - static inline void write_sequnlock(seqlock_t *sl) - { -- write_seqcount_end(&sl->seqcount); -+ __raw_write_seqcount_end(&sl->seqcount); - spin_unlock(&sl->lock); - } - - static inline void write_seqlock_bh(seqlock_t *sl) - { - spin_lock_bh(&sl->lock); -- write_seqcount_begin(&sl->seqcount); -+ __raw_write_seqcount_begin(&sl->seqcount); - } - - static inline void write_sequnlock_bh(seqlock_t *sl) - { -- write_seqcount_end(&sl->seqcount); -+ __raw_write_seqcount_end(&sl->seqcount); - spin_unlock_bh(&sl->lock); - } - - static inline void write_seqlock_irq(seqlock_t *sl) - { - spin_lock_irq(&sl->lock); -- write_seqcount_begin(&sl->seqcount); -+ __raw_write_seqcount_begin(&sl->seqcount); - } - - static inline void write_sequnlock_irq(seqlock_t *sl) - { -- write_seqcount_end(&sl->seqcount); -+ __raw_write_seqcount_end(&sl->seqcount); - spin_unlock_irq(&sl->lock); - } - -@@ -361,7 +393,7 @@ - unsigned long flags; - - spin_lock_irqsave(&sl->lock, flags); -- write_seqcount_begin(&sl->seqcount); -+ __raw_write_seqcount_begin(&sl->seqcount); - return flags; - } - -@@ -371,7 +403,7 @@ - static inline void - write_sequnlock_irqrestore(seqlock_t *sl, unsigned long flags) - { -- write_seqcount_end(&sl->seqcount); -+ __raw_write_seqcount_end(&sl->seqcount); - spin_unlock_irqrestore(&sl->lock, flags); - } - -diff -Nur linux-4.1.26.orig/include/linux/signal.h linux-4.1.26/include/linux/signal.h ---- linux-4.1.26.orig/include/linux/signal.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/signal.h 2016-06-19 15:30:58.675296887 +0200 -@@ -233,6 +233,7 @@ - } - - extern void flush_sigqueue(struct sigpending *queue); -+extern void flush_task_sigqueue(struct task_struct *tsk); - - /* Test if 'sig' is valid signal. Use this instead of testing _NSIG directly */ - static inline int valid_signal(unsigned long sig) -diff -Nur linux-4.1.26.orig/include/linux/skbuff.h linux-4.1.26/include/linux/skbuff.h ---- linux-4.1.26.orig/include/linux/skbuff.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/skbuff.h 2016-06-19 15:30:58.675296887 +0200 -@@ -187,6 +187,7 @@ - - __u32 qlen; - spinlock_t lock; -+ raw_spinlock_t raw_lock; - }; - - struct sk_buff; -@@ -1337,6 +1338,12 @@ - __skb_queue_head_init(list); - } - -+static inline void skb_queue_head_init_raw(struct sk_buff_head *list) -+{ -+ raw_spin_lock_init(&list->raw_lock); -+ __skb_queue_head_init(list); -+} -+ - static inline void skb_queue_head_init_class(struct sk_buff_head *list, - struct lock_class_key *class) - { -diff -Nur linux-4.1.26.orig/include/linux/smp.h linux-4.1.26/include/linux/smp.h ---- linux-4.1.26.orig/include/linux/smp.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/smp.h 2016-06-19 15:30:58.675296887 +0200 -@@ -185,6 +185,9 @@ - #define get_cpu() ({ preempt_disable(); smp_processor_id(); }) - #define put_cpu() preempt_enable() - -+#define get_cpu_light() ({ migrate_disable(); smp_processor_id(); }) -+#define put_cpu_light() migrate_enable() -+ - /* - * Callback to arch code if there's nosmp or maxcpus=0 on the - * boot command line: -diff -Nur linux-4.1.26.orig/include/linux/spinlock_api_smp.h linux-4.1.26/include/linux/spinlock_api_smp.h ---- linux-4.1.26.orig/include/linux/spinlock_api_smp.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/spinlock_api_smp.h 2016-06-19 15:30:58.679297041 +0200 -@@ -189,6 +189,8 @@ - return 0; - } - --#include -+#ifndef CONFIG_PREEMPT_RT_FULL -+# include -+#endif - - #endif /* __LINUX_SPINLOCK_API_SMP_H */ -diff -Nur linux-4.1.26.orig/include/linux/spinlock.h linux-4.1.26/include/linux/spinlock.h ---- linux-4.1.26.orig/include/linux/spinlock.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/spinlock.h 2016-06-19 15:30:58.679297041 +0200 -@@ -281,7 +281,11 @@ - #define raw_spin_can_lock(lock) (!raw_spin_is_locked(lock)) - - /* Include rwlock functions */ --#include -+#ifdef CONFIG_PREEMPT_RT_FULL -+# include -+#else -+# include -+#endif - - /* - * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: -@@ -292,6 +296,10 @@ - # include - #endif - -+#ifdef CONFIG_PREEMPT_RT_FULL -+# include -+#else /* PREEMPT_RT_FULL */ -+ - /* - * Map the spin_lock functions to the raw variants for PREEMPT_RT=n - */ -@@ -426,4 +434,6 @@ - #define atomic_dec_and_lock(atomic, lock) \ - __cond_lock(lock, _atomic_dec_and_lock(atomic, lock)) - -+#endif /* !PREEMPT_RT_FULL */ -+ - #endif /* __LINUX_SPINLOCK_H */ -diff -Nur linux-4.1.26.orig/include/linux/spinlock_rt.h linux-4.1.26/include/linux/spinlock_rt.h ---- linux-4.1.26.orig/include/linux/spinlock_rt.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/spinlock_rt.h 2016-06-19 15:30:58.679297041 +0200 -@@ -0,0 +1,174 @@ -+#ifndef __LINUX_SPINLOCK_RT_H -+#define __LINUX_SPINLOCK_RT_H -+ -+#ifndef __LINUX_SPINLOCK_H -+#error Do not include directly. Use spinlock.h -+#endif -+ -+#include -+ -+extern void -+__rt_spin_lock_init(spinlock_t *lock, char *name, struct lock_class_key *key); -+ -+#define spin_lock_init(slock) \ -+do { \ -+ static struct lock_class_key __key; \ -+ \ -+ rt_mutex_init(&(slock)->lock); \ -+ __rt_spin_lock_init(slock, #slock, &__key); \ -+} while (0) -+ -+extern void __lockfunc rt_spin_lock(spinlock_t *lock); -+extern unsigned long __lockfunc rt_spin_lock_trace_flags(spinlock_t *lock); -+extern void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass); -+extern void __lockfunc rt_spin_unlock(spinlock_t *lock); -+extern void __lockfunc rt_spin_unlock_wait(spinlock_t *lock); -+extern int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags); -+extern int __lockfunc rt_spin_trylock_bh(spinlock_t *lock); -+extern int __lockfunc rt_spin_trylock(spinlock_t *lock); -+extern int atomic_dec_and_spin_lock(atomic_t *atomic, spinlock_t *lock); -+ -+/* -+ * lockdep-less calls, for derived types like rwlock: -+ * (for trylock they can use rt_mutex_trylock() directly. -+ */ -+extern void __lockfunc __rt_spin_lock(struct rt_mutex *lock); -+extern void __lockfunc __rt_spin_unlock(struct rt_mutex *lock); -+extern int __lockfunc __rt_spin_trylock(struct rt_mutex *lock); -+ -+#define spin_lock(lock) \ -+ do { \ -+ migrate_disable(); \ -+ rt_spin_lock(lock); \ -+ } while (0) -+ -+#define spin_lock_bh(lock) \ -+ do { \ -+ local_bh_disable(); \ -+ migrate_disable(); \ -+ rt_spin_lock(lock); \ -+ } while (0) -+ -+#define spin_lock_irq(lock) spin_lock(lock) -+ -+#define spin_do_trylock(lock) __cond_lock(lock, rt_spin_trylock(lock)) -+ -+#define spin_trylock(lock) \ -+({ \ -+ int __locked; \ -+ migrate_disable(); \ -+ __locked = spin_do_trylock(lock); \ -+ if (!__locked) \ -+ migrate_enable(); \ -+ __locked; \ -+}) -+ -+#ifdef CONFIG_LOCKDEP -+# define spin_lock_nested(lock, subclass) \ -+ do { \ -+ migrate_disable(); \ -+ rt_spin_lock_nested(lock, subclass); \ -+ } while (0) -+ -+#define spin_lock_bh_nested(lock, subclass) \ -+ do { \ -+ local_bh_disable(); \ -+ migrate_disable(); \ -+ rt_spin_lock_nested(lock, subclass); \ -+ } while (0) -+ -+# define spin_lock_irqsave_nested(lock, flags, subclass) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ flags = 0; \ -+ migrate_disable(); \ -+ rt_spin_lock_nested(lock, subclass); \ -+ } while (0) -+#else -+# define spin_lock_nested(lock, subclass) spin_lock(lock) -+# define spin_lock_bh_nested(lock, subclass) spin_lock_bh(lock) -+ -+# define spin_lock_irqsave_nested(lock, flags, subclass) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ flags = 0; \ -+ spin_lock(lock); \ -+ } while (0) -+#endif -+ -+#define spin_lock_irqsave(lock, flags) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ flags = 0; \ -+ spin_lock(lock); \ -+ } while (0) -+ -+static inline unsigned long spin_lock_trace_flags(spinlock_t *lock) -+{ -+ unsigned long flags = 0; -+#ifdef CONFIG_TRACE_IRQFLAGS -+ flags = rt_spin_lock_trace_flags(lock); -+#else -+ spin_lock(lock); /* lock_local */ -+#endif -+ return flags; -+} -+ -+/* FIXME: we need rt_spin_lock_nest_lock */ -+#define spin_lock_nest_lock(lock, nest_lock) spin_lock_nested(lock, 0) -+ -+#define spin_unlock(lock) \ -+ do { \ -+ rt_spin_unlock(lock); \ -+ migrate_enable(); \ -+ } while (0) -+ -+#define spin_unlock_bh(lock) \ -+ do { \ -+ rt_spin_unlock(lock); \ -+ migrate_enable(); \ -+ local_bh_enable(); \ -+ } while (0) -+ -+#define spin_unlock_irq(lock) spin_unlock(lock) -+ -+#define spin_unlock_irqrestore(lock, flags) \ -+ do { \ -+ typecheck(unsigned long, flags); \ -+ (void) flags; \ -+ spin_unlock(lock); \ -+ } while (0) -+ -+#define spin_trylock_bh(lock) __cond_lock(lock, rt_spin_trylock_bh(lock)) -+#define spin_trylock_irq(lock) spin_trylock(lock) -+ -+#define spin_trylock_irqsave(lock, flags) \ -+ rt_spin_trylock_irqsave(lock, &(flags)) -+ -+#define spin_unlock_wait(lock) rt_spin_unlock_wait(lock) -+ -+#ifdef CONFIG_GENERIC_LOCKBREAK -+# define spin_is_contended(lock) ((lock)->break_lock) -+#else -+# define spin_is_contended(lock) (((void)(lock), 0)) -+#endif -+ -+static inline int spin_can_lock(spinlock_t *lock) -+{ -+ return !rt_mutex_is_locked(&lock->lock); -+} -+ -+static inline int spin_is_locked(spinlock_t *lock) -+{ -+ return rt_mutex_is_locked(&lock->lock); -+} -+ -+static inline void assert_spin_locked(spinlock_t *lock) -+{ -+ BUG_ON(!spin_is_locked(lock)); -+} -+ -+#define atomic_dec_and_lock(atomic, lock) \ -+ atomic_dec_and_spin_lock(atomic, lock) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/spinlock_types.h linux-4.1.26/include/linux/spinlock_types.h ---- linux-4.1.26.orig/include/linux/spinlock_types.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/spinlock_types.h 2016-06-19 15:30:58.679297041 +0200 -@@ -9,80 +9,15 @@ - * Released under the General Public License (GPL). - */ - --#if defined(CONFIG_SMP) --# include --#else --# include --#endif -- --#include -- --typedef struct raw_spinlock { -- arch_spinlock_t raw_lock; --#ifdef CONFIG_GENERIC_LOCKBREAK -- unsigned int break_lock; --#endif --#ifdef CONFIG_DEBUG_SPINLOCK -- unsigned int magic, owner_cpu; -- void *owner; --#endif --#ifdef CONFIG_DEBUG_LOCK_ALLOC -- struct lockdep_map dep_map; --#endif --} raw_spinlock_t; -- --#define SPINLOCK_MAGIC 0xdead4ead -- --#define SPINLOCK_OWNER_INIT ((void *)-1L) -- --#ifdef CONFIG_DEBUG_LOCK_ALLOC --# define SPIN_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } --#else --# define SPIN_DEP_MAP_INIT(lockname) --#endif -+#include - --#ifdef CONFIG_DEBUG_SPINLOCK --# define SPIN_DEBUG_INIT(lockname) \ -- .magic = SPINLOCK_MAGIC, \ -- .owner_cpu = -1, \ -- .owner = SPINLOCK_OWNER_INIT, -+#ifndef CONFIG_PREEMPT_RT_FULL -+# include -+# include - #else --# define SPIN_DEBUG_INIT(lockname) -+# include -+# include -+# include - #endif - --#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ -- { \ -- .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ -- SPIN_DEBUG_INIT(lockname) \ -- SPIN_DEP_MAP_INIT(lockname) } -- --#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ -- (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) -- --#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) -- --typedef struct spinlock { -- union { -- struct raw_spinlock rlock; -- --#ifdef CONFIG_DEBUG_LOCK_ALLOC --# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) -- struct { -- u8 __padding[LOCK_PADSIZE]; -- struct lockdep_map dep_map; -- }; --#endif -- }; --} spinlock_t; -- --#define __SPIN_LOCK_INITIALIZER(lockname) \ -- { { .rlock = __RAW_SPIN_LOCK_INITIALIZER(lockname) } } -- --#define __SPIN_LOCK_UNLOCKED(lockname) \ -- (spinlock_t ) __SPIN_LOCK_INITIALIZER(lockname) -- --#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) -- --#include -- - #endif /* __LINUX_SPINLOCK_TYPES_H */ -diff -Nur linux-4.1.26.orig/include/linux/spinlock_types_nort.h linux-4.1.26/include/linux/spinlock_types_nort.h ---- linux-4.1.26.orig/include/linux/spinlock_types_nort.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/spinlock_types_nort.h 2016-06-19 15:30:58.679297041 +0200 -@@ -0,0 +1,33 @@ -+#ifndef __LINUX_SPINLOCK_TYPES_NORT_H -+#define __LINUX_SPINLOCK_TYPES_NORT_H -+ -+#ifndef __LINUX_SPINLOCK_TYPES_H -+#error "Do not include directly. Include spinlock_types.h instead" -+#endif -+ -+/* -+ * The non RT version maps spinlocks to raw_spinlocks -+ */ -+typedef struct spinlock { -+ union { -+ struct raw_spinlock rlock; -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) -+ struct { -+ u8 __padding[LOCK_PADSIZE]; -+ struct lockdep_map dep_map; -+ }; -+#endif -+ }; -+} spinlock_t; -+ -+#define __SPIN_LOCK_INITIALIZER(lockname) \ -+ { { .rlock = __RAW_SPIN_LOCK_INITIALIZER(lockname) } } -+ -+#define __SPIN_LOCK_UNLOCKED(lockname) \ -+ (spinlock_t ) __SPIN_LOCK_INITIALIZER(lockname) -+ -+#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/spinlock_types_raw.h linux-4.1.26/include/linux/spinlock_types_raw.h ---- linux-4.1.26.orig/include/linux/spinlock_types_raw.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/spinlock_types_raw.h 2016-06-19 15:30:58.679297041 +0200 -@@ -0,0 +1,56 @@ -+#ifndef __LINUX_SPINLOCK_TYPES_RAW_H -+#define __LINUX_SPINLOCK_TYPES_RAW_H -+ -+#if defined(CONFIG_SMP) -+# include -+#else -+# include -+#endif -+ -+#include -+ -+typedef struct raw_spinlock { -+ arch_spinlock_t raw_lock; -+#ifdef CONFIG_GENERIC_LOCKBREAK -+ unsigned int break_lock; -+#endif -+#ifdef CONFIG_DEBUG_SPINLOCK -+ unsigned int magic, owner_cpu; -+ void *owner; -+#endif -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ struct lockdep_map dep_map; -+#endif -+} raw_spinlock_t; -+ -+#define SPINLOCK_MAGIC 0xdead4ead -+ -+#define SPINLOCK_OWNER_INIT ((void *)-1L) -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+# define SPIN_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } -+#else -+# define SPIN_DEP_MAP_INIT(lockname) -+#endif -+ -+#ifdef CONFIG_DEBUG_SPINLOCK -+# define SPIN_DEBUG_INIT(lockname) \ -+ .magic = SPINLOCK_MAGIC, \ -+ .owner_cpu = -1, \ -+ .owner = SPINLOCK_OWNER_INIT, -+#else -+# define SPIN_DEBUG_INIT(lockname) -+#endif -+ -+#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ -+ { \ -+ .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ -+ SPIN_DEBUG_INIT(lockname) \ -+ SPIN_DEP_MAP_INIT(lockname) } -+ -+#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ -+ (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) -+ -+#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/spinlock_types_rt.h linux-4.1.26/include/linux/spinlock_types_rt.h ---- linux-4.1.26.orig/include/linux/spinlock_types_rt.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/spinlock_types_rt.h 2016-06-19 15:30:58.679297041 +0200 -@@ -0,0 +1,51 @@ -+#ifndef __LINUX_SPINLOCK_TYPES_RT_H -+#define __LINUX_SPINLOCK_TYPES_RT_H -+ -+#ifndef __LINUX_SPINLOCK_TYPES_H -+#error "Do not include directly. Include spinlock_types.h instead" -+#endif -+ -+#include -+ -+/* -+ * PREEMPT_RT: spinlocks - an RT mutex plus lock-break field: -+ */ -+typedef struct spinlock { -+ struct rt_mutex lock; -+ unsigned int break_lock; -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ struct lockdep_map dep_map; -+#endif -+} spinlock_t; -+ -+#ifdef CONFIG_DEBUG_RT_MUTEXES -+# define __RT_SPIN_INITIALIZER(name) \ -+ { \ -+ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ -+ .save_state = 1, \ -+ .file = __FILE__, \ -+ .line = __LINE__ , \ -+ } -+#else -+# define __RT_SPIN_INITIALIZER(name) \ -+ { \ -+ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ -+ .save_state = 1, \ -+ } -+#endif -+ -+/* -+.wait_list = PLIST_HEAD_INIT_RAW((name).lock.wait_list, (name).lock.wait_lock) -+*/ -+ -+#define __SPIN_LOCK_UNLOCKED(name) \ -+ { .lock = __RT_SPIN_INITIALIZER(name.lock), \ -+ SPIN_DEP_MAP_INIT(name) } -+ -+#define __DEFINE_SPINLOCK(name) \ -+ spinlock_t name = __SPIN_LOCK_UNLOCKED(name) -+ -+#define DEFINE_SPINLOCK(name) \ -+ spinlock_t name __cacheline_aligned_in_smp = __SPIN_LOCK_UNLOCKED(name) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/srcu.h linux-4.1.26/include/linux/srcu.h ---- linux-4.1.26.orig/include/linux/srcu.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/srcu.h 2016-06-19 15:30:58.679297041 +0200 -@@ -84,10 +84,10 @@ - - void process_srcu(struct work_struct *work); - --#define __SRCU_STRUCT_INIT(name) \ -+#define __SRCU_STRUCT_INIT(name, pcpu_name) \ - { \ - .completed = -300, \ -- .per_cpu_ref = &name##_srcu_array, \ -+ .per_cpu_ref = &pcpu_name, \ - .queue_lock = __SPIN_LOCK_UNLOCKED(name.queue_lock), \ - .running = false, \ - .batch_queue = RCU_BATCH_INIT(name.batch_queue), \ -@@ -104,7 +104,7 @@ - */ - #define __DEFINE_SRCU(name, is_static) \ - static DEFINE_PER_CPU(struct srcu_struct_array, name##_srcu_array);\ -- is_static struct srcu_struct name = __SRCU_STRUCT_INIT(name) -+ is_static struct srcu_struct name = __SRCU_STRUCT_INIT(name, name##_srcu_array) - #define DEFINE_SRCU(name) __DEFINE_SRCU(name, /* not static */) - #define DEFINE_STATIC_SRCU(name) __DEFINE_SRCU(name, static) - -diff -Nur linux-4.1.26.orig/include/linux/swap.h linux-4.1.26/include/linux/swap.h ---- linux-4.1.26.orig/include/linux/swap.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/swap.h 2016-06-19 15:30:58.679297041 +0200 -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - #include - - struct notifier_block; -@@ -252,7 +253,8 @@ - void *workingset_eviction(struct address_space *mapping, struct page *page); - bool workingset_refault(void *shadow); - void workingset_activation(struct page *page); --extern struct list_lru workingset_shadow_nodes; -+extern struct list_lru __workingset_shadow_nodes; -+DECLARE_LOCAL_IRQ_LOCK(workingset_shadow_lock); - - static inline unsigned int workingset_node_pages(struct radix_tree_node *node) - { -@@ -296,6 +298,7 @@ - - - /* linux/mm/swap.c */ -+DECLARE_LOCAL_IRQ_LOCK(swapvec_lock); - extern void lru_cache_add(struct page *); - extern void lru_cache_add_anon(struct page *page); - extern void lru_cache_add_file(struct page *page); -diff -Nur linux-4.1.26.orig/include/linux/thread_info.h linux-4.1.26/include/linux/thread_info.h ---- linux-4.1.26.orig/include/linux/thread_info.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/thread_info.h 2016-06-19 15:30:58.679297041 +0200 -@@ -102,7 +102,17 @@ - #define test_thread_flag(flag) \ - test_ti_thread_flag(current_thread_info(), flag) - --#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) -+#ifdef CONFIG_PREEMPT_LAZY -+#define tif_need_resched() (test_thread_flag(TIF_NEED_RESCHED) || \ -+ test_thread_flag(TIF_NEED_RESCHED_LAZY)) -+#define tif_need_resched_now() (test_thread_flag(TIF_NEED_RESCHED)) -+#define tif_need_resched_lazy() test_thread_flag(TIF_NEED_RESCHED_LAZY)) -+ -+#else -+#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) -+#define tif_need_resched_now() test_thread_flag(TIF_NEED_RESCHED) -+#define tif_need_resched_lazy() 0 -+#endif - - #if defined TIF_RESTORE_SIGMASK && !defined HAVE_SET_RESTORE_SIGMASK - /* -diff -Nur linux-4.1.26.orig/include/linux/timer.h linux-4.1.26/include/linux/timer.h ---- linux-4.1.26.orig/include/linux/timer.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/timer.h 2016-06-19 15:30:58.679297041 +0200 -@@ -241,7 +241,7 @@ - - extern int try_to_del_timer_sync(struct timer_list *timer); - --#ifdef CONFIG_SMP -+#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) - extern int del_timer_sync(struct timer_list *timer); - #else - # define del_timer_sync(t) del_timer(t) -diff -Nur linux-4.1.26.orig/include/linux/uaccess.h linux-4.1.26/include/linux/uaccess.h ---- linux-4.1.26.orig/include/linux/uaccess.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/uaccess.h 2016-06-19 15:30:58.679297041 +0200 -@@ -1,21 +1,31 @@ - #ifndef __LINUX_UACCESS_H__ - #define __LINUX_UACCESS_H__ - --#include -+#include - #include - -+static __always_inline void pagefault_disabled_inc(void) -+{ -+ current->pagefault_disabled++; -+} -+ -+static __always_inline void pagefault_disabled_dec(void) -+{ -+ current->pagefault_disabled--; -+ WARN_ON(current->pagefault_disabled < 0); -+} -+ - /* -- * These routines enable/disable the pagefault handler in that -- * it will not take any locks and go straight to the fixup table. -+ * These routines enable/disable the pagefault handler. If disabled, it will -+ * not take any locks and go straight to the fixup table. - * -- * They have great resemblance to the preempt_disable/enable calls -- * and in fact they are identical; this is because currently there is -- * no other way to make the pagefault handlers do this. So we do -- * disable preemption but we don't necessarily care about that. -+ * User access methods will not sleep when called from a pagefault_disabled() -+ * environment. - */ - static inline void pagefault_disable(void) - { -- preempt_count_inc(); -+ migrate_disable(); -+ pagefault_disabled_inc(); - /* - * make sure to have issued the store before a pagefault - * can hit. -@@ -25,18 +35,32 @@ - - static inline void pagefault_enable(void) - { --#ifndef CONFIG_PREEMPT - /* - * make sure to issue those last loads/stores before enabling - * the pagefault handler again. - */ - barrier(); -- preempt_count_dec(); --#else -- preempt_enable(); --#endif -+ pagefault_disabled_dec(); -+ migrate_enable(); - } - -+/* -+ * Is the pagefault handler disabled? If so, user access methods will not sleep. -+ */ -+#define pagefault_disabled() (current->pagefault_disabled != 0) -+ -+/* -+ * The pagefault handler is in general disabled by pagefault_disable() or -+ * when in irq context (via in_atomic()). -+ * -+ * This function should only be used by the fault handlers. Other users should -+ * stick to pagefault_disabled(). -+ * Please NEVER use preempt_disable() to disable the fault handler. With -+ * !CONFIG_PREEMPT_COUNT, this is like a NOP. So the handler won't be disabled. -+ * in_atomic() will report different values based on !CONFIG_PREEMPT_COUNT. -+ */ -+#define faulthandler_disabled() (pagefault_disabled() || in_atomic()) -+ - #ifndef ARCH_HAS_NOCACHE_UACCESS - - static inline unsigned long __copy_from_user_inatomic_nocache(void *to, -diff -Nur linux-4.1.26.orig/include/linux/uprobes.h linux-4.1.26/include/linux/uprobes.h ---- linux-4.1.26.orig/include/linux/uprobes.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/uprobes.h 2016-06-19 15:30:58.679297041 +0200 -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - - struct vm_area_struct; - struct mm_struct; -diff -Nur linux-4.1.26.orig/include/linux/vmstat.h linux-4.1.26/include/linux/vmstat.h ---- linux-4.1.26.orig/include/linux/vmstat.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/vmstat.h 2016-06-19 15:30:58.679297041 +0200 -@@ -33,7 +33,9 @@ - */ - static inline void __count_vm_event(enum vm_event_item item) - { -+ preempt_disable_rt(); - raw_cpu_inc(vm_event_states.event[item]); -+ preempt_enable_rt(); - } - - static inline void count_vm_event(enum vm_event_item item) -@@ -43,7 +45,9 @@ - - static inline void __count_vm_events(enum vm_event_item item, long delta) - { -+ preempt_disable_rt(); - raw_cpu_add(vm_event_states.event[item], delta); -+ preempt_enable_rt(); - } - - static inline void count_vm_events(enum vm_event_item item, long delta) -diff -Nur linux-4.1.26.orig/include/linux/wait.h linux-4.1.26/include/linux/wait.h ---- linux-4.1.26.orig/include/linux/wait.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/linux/wait.h 2016-06-19 15:30:58.679297041 +0200 -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - - typedef struct __wait_queue wait_queue_t; - typedef int (*wait_queue_func_t)(wait_queue_t *wait, unsigned mode, int flags, void *key); -diff -Nur linux-4.1.26.orig/include/linux/wait-simple.h linux-4.1.26/include/linux/wait-simple.h ---- linux-4.1.26.orig/include/linux/wait-simple.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/wait-simple.h 2016-06-19 15:30:58.679297041 +0200 -@@ -0,0 +1,207 @@ -+#ifndef _LINUX_WAIT_SIMPLE_H -+#define _LINUX_WAIT_SIMPLE_H -+ -+#include -+#include -+ -+#include -+ -+struct swaiter { -+ struct task_struct *task; -+ struct list_head node; -+}; -+ -+#define DEFINE_SWAITER(name) \ -+ struct swaiter name = { \ -+ .task = current, \ -+ .node = LIST_HEAD_INIT((name).node), \ -+ } -+ -+struct swait_head { -+ raw_spinlock_t lock; -+ struct list_head list; -+}; -+ -+#define SWAIT_HEAD_INITIALIZER(name) { \ -+ .lock = __RAW_SPIN_LOCK_UNLOCKED(name.lock), \ -+ .list = LIST_HEAD_INIT((name).list), \ -+ } -+ -+#define DEFINE_SWAIT_HEAD(name) \ -+ struct swait_head name = SWAIT_HEAD_INITIALIZER(name) -+ -+extern void __init_swait_head(struct swait_head *h, struct lock_class_key *key); -+ -+#define init_swait_head(swh) \ -+ do { \ -+ static struct lock_class_key __key; \ -+ \ -+ __init_swait_head((swh), &__key); \ -+ } while (0) -+ -+/* -+ * Waiter functions -+ */ -+extern void swait_prepare_locked(struct swait_head *head, struct swaiter *w); -+extern void swait_prepare(struct swait_head *head, struct swaiter *w, int state); -+extern void swait_finish_locked(struct swait_head *head, struct swaiter *w); -+extern void swait_finish(struct swait_head *head, struct swaiter *w); -+ -+/* Check whether a head has waiters enqueued */ -+static inline bool swaitqueue_active(struct swait_head *h) -+{ -+ /* Make sure the condition is visible before checking list_empty() */ -+ smp_mb(); -+ return !list_empty(&h->list); -+} -+ -+/* -+ * Wakeup functions -+ */ -+extern unsigned int __swait_wake(struct swait_head *head, unsigned int state, unsigned int num); -+extern unsigned int __swait_wake_locked(struct swait_head *head, unsigned int state, unsigned int num); -+ -+#define swait_wake(head) __swait_wake(head, TASK_NORMAL, 1) -+#define swait_wake_interruptible(head) __swait_wake(head, TASK_INTERRUPTIBLE, 1) -+#define swait_wake_all(head) __swait_wake(head, TASK_NORMAL, 0) -+#define swait_wake_all_interruptible(head) __swait_wake(head, TASK_INTERRUPTIBLE, 0) -+ -+/* -+ * Event API -+ */ -+#define __swait_event(wq, condition) \ -+do { \ -+ DEFINE_SWAITER(__wait); \ -+ \ -+ for (;;) { \ -+ swait_prepare(&wq, &__wait, TASK_UNINTERRUPTIBLE); \ -+ if (condition) \ -+ break; \ -+ schedule(); \ -+ } \ -+ swait_finish(&wq, &__wait); \ -+} while (0) -+ -+/** -+ * swait_event - sleep until a condition gets true -+ * @wq: the waitqueue to wait on -+ * @condition: a C expression for the event to wait for -+ * -+ * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the -+ * @condition evaluates to true. The @condition is checked each time -+ * the waitqueue @wq is woken up. -+ * -+ * wake_up() has to be called after changing any variable that could -+ * change the result of the wait condition. -+ */ -+#define swait_event(wq, condition) \ -+do { \ -+ if (condition) \ -+ break; \ -+ __swait_event(wq, condition); \ -+} while (0) -+ -+#define __swait_event_interruptible(wq, condition, ret) \ -+do { \ -+ DEFINE_SWAITER(__wait); \ -+ \ -+ for (;;) { \ -+ swait_prepare(&wq, &__wait, TASK_INTERRUPTIBLE); \ -+ if (condition) \ -+ break; \ -+ if (signal_pending(current)) { \ -+ ret = -ERESTARTSYS; \ -+ break; \ -+ } \ -+ schedule(); \ -+ } \ -+ swait_finish(&wq, &__wait); \ -+} while (0) -+ -+#define __swait_event_interruptible_timeout(wq, condition, ret) \ -+do { \ -+ DEFINE_SWAITER(__wait); \ -+ \ -+ for (;;) { \ -+ swait_prepare(&wq, &__wait, TASK_INTERRUPTIBLE); \ -+ if (condition) \ -+ break; \ -+ if (signal_pending(current)) { \ -+ ret = -ERESTARTSYS; \ -+ break; \ -+ } \ -+ ret = schedule_timeout(ret); \ -+ if (!ret) \ -+ break; \ -+ } \ -+ swait_finish(&wq, &__wait); \ -+} while (0) -+ -+/** -+ * swait_event_interruptible - sleep until a condition gets true -+ * @wq: the waitqueue to wait on -+ * @condition: a C expression for the event to wait for -+ * -+ * The process is put to sleep (TASK_INTERRUPTIBLE) until the -+ * @condition evaluates to true. The @condition is checked each time -+ * the waitqueue @wq is woken up. -+ * -+ * wake_up() has to be called after changing any variable that could -+ * change the result of the wait condition. -+ */ -+#define swait_event_interruptible(wq, condition) \ -+({ \ -+ int __ret = 0; \ -+ if (!(condition)) \ -+ __swait_event_interruptible(wq, condition, __ret); \ -+ __ret; \ -+}) -+ -+#define swait_event_interruptible_timeout(wq, condition, timeout) \ -+({ \ -+ int __ret = timeout; \ -+ if (!(condition)) \ -+ __swait_event_interruptible_timeout(wq, condition, __ret); \ -+ __ret; \ -+}) -+ -+#define __swait_event_timeout(wq, condition, ret) \ -+do { \ -+ DEFINE_SWAITER(__wait); \ -+ \ -+ for (;;) { \ -+ swait_prepare(&wq, &__wait, TASK_UNINTERRUPTIBLE); \ -+ if (condition) \ -+ break; \ -+ ret = schedule_timeout(ret); \ -+ if (!ret) \ -+ break; \ -+ } \ -+ swait_finish(&wq, &__wait); \ -+} while (0) -+ -+/** -+ * swait_event_timeout - sleep until a condition gets true or a timeout elapses -+ * @wq: the waitqueue to wait on -+ * @condition: a C expression for the event to wait for -+ * @timeout: timeout, in jiffies -+ * -+ * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the -+ * @condition evaluates to true. The @condition is checked each time -+ * the waitqueue @wq is woken up. -+ * -+ * wake_up() has to be called after changing any variable that could -+ * change the result of the wait condition. -+ * -+ * The function returns 0 if the @timeout elapsed, and the remaining -+ * jiffies if the condition evaluated to true before the timeout elapsed. -+ */ -+#define swait_event_timeout(wq, condition, timeout) \ -+({ \ -+ long __ret = timeout; \ -+ if (!(condition)) \ -+ __swait_event_timeout(wq, condition, __ret); \ -+ __ret; \ -+}) -+ -+#endif -diff -Nur linux-4.1.26.orig/include/linux/work-simple.h linux-4.1.26/include/linux/work-simple.h ---- linux-4.1.26.orig/include/linux/work-simple.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/linux/work-simple.h 2016-06-19 15:30:58.679297041 +0200 -@@ -0,0 +1,24 @@ -+#ifndef _LINUX_SWORK_H -+#define _LINUX_SWORK_H -+ -+#include -+ -+struct swork_event { -+ struct list_head item; -+ unsigned long flags; -+ void (*func)(struct swork_event *); -+}; -+ -+static inline void INIT_SWORK(struct swork_event *event, -+ void (*func)(struct swork_event *)) -+{ -+ event->flags = 0; -+ event->func = func; -+} -+ -+bool swork_queue(struct swork_event *sev); -+ -+int swork_get(void); -+void swork_put(void); -+ -+#endif /* _LINUX_SWORK_H */ -diff -Nur linux-4.1.26.orig/include/net/dst.h linux-4.1.26/include/net/dst.h ---- linux-4.1.26.orig/include/net/dst.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/net/dst.h 2016-06-19 15:30:58.679297041 +0200 -@@ -436,7 +436,7 @@ - static inline int dst_neigh_output(struct dst_entry *dst, struct neighbour *n, - struct sk_buff *skb) - { -- const struct hh_cache *hh; -+ struct hh_cache *hh; - - if (dst->pending_confirm) { - unsigned long now = jiffies; -diff -Nur linux-4.1.26.orig/include/net/neighbour.h linux-4.1.26/include/net/neighbour.h ---- linux-4.1.26.orig/include/net/neighbour.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/net/neighbour.h 2016-06-19 15:30:58.679297041 +0200 -@@ -445,7 +445,7 @@ - } - #endif - --static inline int neigh_hh_output(const struct hh_cache *hh, struct sk_buff *skb) -+static inline int neigh_hh_output(struct hh_cache *hh, struct sk_buff *skb) - { - unsigned int seq; - int hh_len; -@@ -500,7 +500,7 @@ - - #define NEIGH_CB(skb) ((struct neighbour_cb *)(skb)->cb) - --static inline void neigh_ha_snapshot(char *dst, const struct neighbour *n, -+static inline void neigh_ha_snapshot(char *dst, struct neighbour *n, - const struct net_device *dev) - { - unsigned int seq; -diff -Nur linux-4.1.26.orig/include/net/netns/ipv4.h linux-4.1.26/include/net/netns/ipv4.h ---- linux-4.1.26.orig/include/net/netns/ipv4.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/net/netns/ipv4.h 2016-06-19 15:30:58.683297195 +0200 -@@ -69,6 +69,7 @@ - - int sysctl_icmp_echo_ignore_all; - int sysctl_icmp_echo_ignore_broadcasts; -+ int sysctl_icmp_echo_sysrq; - int sysctl_icmp_ignore_bogus_error_responses; - int sysctl_icmp_ratelimit; - int sysctl_icmp_ratemask; -diff -Nur linux-4.1.26.orig/include/trace/events/hist.h linux-4.1.26/include/trace/events/hist.h ---- linux-4.1.26.orig/include/trace/events/hist.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/trace/events/hist.h 2016-06-19 15:30:58.683297195 +0200 -@@ -0,0 +1,74 @@ -+#undef TRACE_SYSTEM -+#define TRACE_SYSTEM hist -+ -+#if !defined(_TRACE_HIST_H) || defined(TRACE_HEADER_MULTI_READ) -+#define _TRACE_HIST_H -+ -+#include "latency_hist.h" -+#include -+ -+#if !defined(CONFIG_PREEMPT_OFF_HIST) && !defined(CONFIG_INTERRUPT_OFF_HIST) -+#define trace_preemptirqsoff_hist(a, b) -+#define trace_preemptirqsoff_hist_rcuidle(a, b) -+#else -+TRACE_EVENT(preemptirqsoff_hist, -+ -+ TP_PROTO(int reason, int starthist), -+ -+ TP_ARGS(reason, starthist), -+ -+ TP_STRUCT__entry( -+ __field(int, reason) -+ __field(int, starthist) -+ ), -+ -+ TP_fast_assign( -+ __entry->reason = reason; -+ __entry->starthist = starthist; -+ ), -+ -+ TP_printk("reason=%s starthist=%s", getaction(__entry->reason), -+ __entry->starthist ? "start" : "stop") -+); -+#endif -+ -+#ifndef CONFIG_MISSED_TIMER_OFFSETS_HIST -+#define trace_hrtimer_interrupt(a, b, c, d) -+#define trace_hrtimer_interrupt_rcuidle(a, b, c, d) -+#else -+TRACE_EVENT(hrtimer_interrupt, -+ -+ TP_PROTO(int cpu, long long offset, struct task_struct *curr, -+ struct task_struct *task), -+ -+ TP_ARGS(cpu, offset, curr, task), -+ -+ TP_STRUCT__entry( -+ __field(int, cpu) -+ __field(long long, offset) -+ __array(char, ccomm, TASK_COMM_LEN) -+ __field(int, cprio) -+ __array(char, tcomm, TASK_COMM_LEN) -+ __field(int, tprio) -+ ), -+ -+ TP_fast_assign( -+ __entry->cpu = cpu; -+ __entry->offset = offset; -+ memcpy(__entry->ccomm, curr->comm, TASK_COMM_LEN); -+ __entry->cprio = curr->prio; -+ memcpy(__entry->tcomm, task != NULL ? task->comm : "", -+ task != NULL ? TASK_COMM_LEN : 7); -+ __entry->tprio = task != NULL ? task->prio : -1; -+ ), -+ -+ TP_printk("cpu=%d offset=%lld curr=%s[%d] thread=%s[%d]", -+ __entry->cpu, __entry->offset, __entry->ccomm, -+ __entry->cprio, __entry->tcomm, __entry->tprio) -+); -+#endif -+ -+#endif /* _TRACE_HIST_H */ -+ -+/* This part must be outside protection */ -+#include -diff -Nur linux-4.1.26.orig/include/trace/events/latency_hist.h linux-4.1.26/include/trace/events/latency_hist.h ---- linux-4.1.26.orig/include/trace/events/latency_hist.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/include/trace/events/latency_hist.h 2016-06-19 15:30:58.683297195 +0200 -@@ -0,0 +1,29 @@ -+#ifndef _LATENCY_HIST_H -+#define _LATENCY_HIST_H -+ -+enum hist_action { -+ IRQS_ON, -+ PREEMPT_ON, -+ TRACE_STOP, -+ IRQS_OFF, -+ PREEMPT_OFF, -+ TRACE_START, -+}; -+ -+static char *actions[] = { -+ "IRQS_ON", -+ "PREEMPT_ON", -+ "TRACE_STOP", -+ "IRQS_OFF", -+ "PREEMPT_OFF", -+ "TRACE_START", -+}; -+ -+static inline char *getaction(int action) -+{ -+ if (action >= 0 && action <= sizeof(actions)/sizeof(actions[0])) -+ return actions[action]; -+ return "unknown"; -+} -+ -+#endif /* _LATENCY_HIST_H */ -diff -Nur linux-4.1.26.orig/include/trace/events/sched.h linux-4.1.26/include/trace/events/sched.h ---- linux-4.1.26.orig/include/trace/events/sched.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/include/trace/events/sched.h 2016-06-19 15:30:58.683297195 +0200 -@@ -55,9 +55,9 @@ - */ - DECLARE_EVENT_CLASS(sched_wakeup_template, - -- TP_PROTO(struct task_struct *p, int success), -+ TP_PROTO(struct task_struct *p), - -- TP_ARGS(__perf_task(p), success), -+ TP_ARGS(__perf_task(p)), - - TP_STRUCT__entry( - __array( char, comm, TASK_COMM_LEN ) -@@ -71,25 +71,37 @@ - memcpy(__entry->comm, p->comm, TASK_COMM_LEN); - __entry->pid = p->pid; - __entry->prio = p->prio; -- __entry->success = success; -+ __entry->success = 1; /* rudiment, kill when possible */ - __entry->target_cpu = task_cpu(p); - ), - -- TP_printk("comm=%s pid=%d prio=%d success=%d target_cpu=%03d", -+ TP_printk("comm=%s pid=%d prio=%d target_cpu=%03d", - __entry->comm, __entry->pid, __entry->prio, -- __entry->success, __entry->target_cpu) -+ __entry->target_cpu) - ); - -+/* -+ * Tracepoint called when waking a task; this tracepoint is guaranteed to be -+ * called from the waking context. -+ */ -+DEFINE_EVENT(sched_wakeup_template, sched_waking, -+ TP_PROTO(struct task_struct *p), -+ TP_ARGS(p)); -+ -+/* -+ * Tracepoint called when the task is actually woken; p->state == TASK_RUNNNG. -+ * It it not always called from the waking context. -+ */ - DEFINE_EVENT(sched_wakeup_template, sched_wakeup, -- TP_PROTO(struct task_struct *p, int success), -- TP_ARGS(p, success)); -+ TP_PROTO(struct task_struct *p), -+ TP_ARGS(p)); - - /* - * Tracepoint for waking up a new task: - */ - DEFINE_EVENT(sched_wakeup_template, sched_wakeup_new, -- TP_PROTO(struct task_struct *p, int success), -- TP_ARGS(p, success)); -+ TP_PROTO(struct task_struct *p), -+ TP_ARGS(p)); - - #ifdef CREATE_TRACE_POINTS - static inline long __trace_sched_switch_state(struct task_struct *p) -diff -Nur linux-4.1.26.orig/init/Kconfig linux-4.1.26/init/Kconfig ---- linux-4.1.26.orig/init/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/init/Kconfig 2016-06-19 15:30:58.683297195 +0200 -@@ -637,7 +637,7 @@ - - config RCU_FAST_NO_HZ - bool "Accelerate last non-dyntick-idle CPU's grace periods" -- depends on NO_HZ_COMMON && SMP -+ depends on NO_HZ_COMMON && SMP && !PREEMPT_RT_FULL - default n - help - This option permits CPUs to enter dynticks-idle state even if -@@ -664,7 +664,7 @@ - config RCU_BOOST - bool "Enable RCU priority boosting" - depends on RT_MUTEXES && PREEMPT_RCU -- default n -+ default y if PREEMPT_RT_FULL - help - This option boosts the priority of preempted RCU readers that - block the current preemptible RCU grace period for too long. -@@ -1101,6 +1101,7 @@ - config RT_GROUP_SCHED - bool "Group scheduling for SCHED_RR/FIFO" - depends on CGROUP_SCHED -+ depends on !PREEMPT_RT_FULL - default n - help - This feature lets you explicitly allocate real CPU bandwidth -@@ -1688,6 +1689,7 @@ - - config SLAB - bool "SLAB" -+ depends on !PREEMPT_RT_FULL - help - The regular slab allocator that is established and known to work - well in all environments. It organizes cache hot objects in -@@ -1706,6 +1708,7 @@ - config SLOB - depends on EXPERT - bool "SLOB (Simple Allocator)" -+ depends on !PREEMPT_RT_FULL - help - SLOB replaces the stock allocator with a drastically simpler - allocator. SLOB is generally more space efficient but -@@ -1715,7 +1718,7 @@ - - config SLUB_CPU_PARTIAL - default y -- depends on SLUB && SMP -+ depends on SLUB && SMP && !PREEMPT_RT_FULL - bool "SLUB per cpu partial cache" - help - Per cpu partial caches accellerate objects allocation and freeing -diff -Nur linux-4.1.26.orig/init/main.c linux-4.1.26/init/main.c ---- linux-4.1.26.orig/init/main.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/init/main.c 2016-06-19 15:30:58.683297195 +0200 -@@ -525,6 +525,7 @@ - setup_command_line(command_line); - setup_nr_cpu_ids(); - setup_per_cpu_areas(); -+ softirq_early_init(); - smp_prepare_boot_cpu(); /* arch-specific boot-cpu hooks */ - - build_all_zonelists(NULL, NULL); -diff -Nur linux-4.1.26.orig/init/Makefile linux-4.1.26/init/Makefile ---- linux-4.1.26.orig/init/Makefile 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/init/Makefile 2016-06-19 15:30:58.683297195 +0200 -@@ -33,4 +33,4 @@ - include/generated/compile.h: FORCE - @$($(quiet)chk_compile.h) - $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkcompile_h $@ \ -- "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CC) $(KBUILD_CFLAGS)" -+ "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CONFIG_PREEMPT_RT_FULL)" "$(CC) $(KBUILD_CFLAGS)" -diff -Nur linux-4.1.26.orig/ipc/mqueue.c linux-4.1.26/ipc/mqueue.c ---- linux-4.1.26.orig/ipc/mqueue.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/ipc/mqueue.c 2016-06-19 15:30:58.683297195 +0200 -@@ -47,8 +47,7 @@ - #define RECV 1 - - #define STATE_NONE 0 --#define STATE_PENDING 1 --#define STATE_READY 2 -+#define STATE_READY 1 - - struct posix_msg_tree_node { - struct rb_node rb_node; -@@ -568,15 +567,12 @@ - wq_add(info, sr, ewp); - - for (;;) { -- set_current_state(TASK_INTERRUPTIBLE); -+ __set_current_state(TASK_INTERRUPTIBLE); - - spin_unlock(&info->lock); - time = schedule_hrtimeout_range_clock(timeout, 0, - HRTIMER_MODE_ABS, CLOCK_REALTIME); - -- while (ewp->state == STATE_PENDING) -- cpu_relax(); -- - if (ewp->state == STATE_READY) { - retval = 0; - goto out; -@@ -904,11 +900,15 @@ - * list of waiting receivers. A sender checks that list before adding the new - * message into the message array. If there is a waiting receiver, then it - * bypasses the message array and directly hands the message over to the -- * receiver. -- * The receiver accepts the message and returns without grabbing the queue -- * spinlock. Therefore an intermediate STATE_PENDING state and memory barriers -- * are necessary. The same algorithm is used for sysv semaphores, see -- * ipc/sem.c for more details. -+ * receiver. The receiver accepts the message and returns without grabbing the -+ * queue spinlock: -+ * -+ * - Set pointer to message. -+ * - Queue the receiver task for later wakeup (without the info->lock). -+ * - Update its state to STATE_READY. Now the receiver can continue. -+ * - Wake up the process after the lock is dropped. Should the process wake up -+ * before this wakeup (due to a timeout or a signal) it will either see -+ * STATE_READY and continue or acquire the lock to check the state again. - * - * The same algorithm is used for senders. - */ -@@ -916,21 +916,29 @@ - /* pipelined_send() - send a message directly to the task waiting in - * sys_mq_timedreceive() (without inserting message into a queue). - */ --static inline void pipelined_send(struct mqueue_inode_info *info, -+static inline void pipelined_send(struct wake_q_head *wake_q, -+ struct mqueue_inode_info *info, - struct msg_msg *message, - struct ext_wait_queue *receiver) - { - receiver->msg = message; - list_del(&receiver->list); -- receiver->state = STATE_PENDING; -- wake_up_process(receiver->task); -- smp_wmb(); -+ wake_q_add(wake_q, receiver->task); -+ /* -+ * Rely on the implicit cmpxchg barrier from wake_q_add such -+ * that we can ensure that updating receiver->state is the last -+ * write operation: As once set, the receiver can continue, -+ * and if we don't have the reference count from the wake_q, -+ * yet, at that point we can later have a use-after-free -+ * condition and bogus wakeup. -+ */ - receiver->state = STATE_READY; - } - - /* pipelined_receive() - if there is task waiting in sys_mq_timedsend() - * gets its message and put to the queue (we have one free place for sure). */ --static inline void pipelined_receive(struct mqueue_inode_info *info) -+static inline void pipelined_receive(struct wake_q_head *wake_q, -+ struct mqueue_inode_info *info) - { - struct ext_wait_queue *sender = wq_get_first_waiter(info, SEND); - -@@ -941,10 +949,9 @@ - } - if (msg_insert(sender->msg, info)) - return; -+ - list_del(&sender->list); -- sender->state = STATE_PENDING; -- wake_up_process(sender->task); -- smp_wmb(); -+ wake_q_add(wake_q, sender->task); - sender->state = STATE_READY; - } - -@@ -962,6 +969,7 @@ - struct timespec ts; - struct posix_msg_tree_node *new_leaf = NULL; - int ret = 0; -+ WAKE_Q(wake_q); - - if (u_abs_timeout) { - int res = prepare_timeout(u_abs_timeout, &expires, &ts); -@@ -1045,7 +1053,7 @@ - } else { - receiver = wq_get_first_waiter(info, RECV); - if (receiver) { -- pipelined_send(info, msg_ptr, receiver); -+ pipelined_send(&wake_q, info, msg_ptr, receiver); - } else { - /* adds message to the queue */ - ret = msg_insert(msg_ptr, info); -@@ -1058,6 +1066,7 @@ - } - out_unlock: - spin_unlock(&info->lock); -+ wake_up_q(&wake_q); - out_free: - if (ret) - free_msg(msg_ptr); -@@ -1144,14 +1153,17 @@ - msg_ptr = wait.msg; - } - } else { -+ WAKE_Q(wake_q); -+ - msg_ptr = msg_get(info); - - inode->i_atime = inode->i_mtime = inode->i_ctime = - CURRENT_TIME; - - /* There is now free space in queue. */ -- pipelined_receive(info); -+ pipelined_receive(&wake_q, info); - spin_unlock(&info->lock); -+ wake_up_q(&wake_q); - ret = 0; - } - if (ret == 0) { -diff -Nur linux-4.1.26.orig/ipc/msg.c linux-4.1.26/ipc/msg.c ---- linux-4.1.26.orig/ipc/msg.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/ipc/msg.c 2016-06-19 15:30:58.683297195 +0200 -@@ -188,6 +188,12 @@ - struct msg_receiver *msr, *t; - - list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) { -+ /* -+ * Make sure that the wakeup doesnt preempt -+ * this CPU prematurely. (on PREEMPT_RT) -+ */ -+ preempt_disable_rt(); -+ - msr->r_msg = NULL; /* initialize expunge ordering */ - wake_up_process(msr->r_tsk); - /* -@@ -198,6 +204,8 @@ - */ - smp_mb(); - msr->r_msg = ERR_PTR(res); -+ -+ preempt_enable_rt(); - } - } - -@@ -574,6 +582,11 @@ - if (testmsg(msg, msr->r_msgtype, msr->r_mode) && - !security_msg_queue_msgrcv(msq, msg, msr->r_tsk, - msr->r_msgtype, msr->r_mode)) { -+ /* -+ * Make sure that the wakeup doesnt preempt -+ * this CPU prematurely. (on PREEMPT_RT) -+ */ -+ preempt_disable_rt(); - - list_del(&msr->r_list); - if (msr->r_maxsize < msg->m_ts) { -@@ -595,12 +608,13 @@ - */ - smp_mb(); - msr->r_msg = msg; -+ preempt_enable_rt(); - - return 1; - } -+ preempt_enable_rt(); - } - } -- - return 0; - } - -diff -Nur linux-4.1.26.orig/ipc/sem.c linux-4.1.26/ipc/sem.c ---- linux-4.1.26.orig/ipc/sem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/ipc/sem.c 2016-06-19 15:30:58.683297195 +0200 -@@ -690,6 +690,13 @@ - static void wake_up_sem_queue_prepare(struct list_head *pt, - struct sem_queue *q, int error) - { -+#ifdef CONFIG_PREEMPT_RT_BASE -+ struct task_struct *p = q->sleeper; -+ get_task_struct(p); -+ q->status = error; -+ wake_up_process(p); -+ put_task_struct(p); -+#else - if (list_empty(pt)) { - /* - * Hold preempt off so that we don't get preempted and have the -@@ -701,6 +708,7 @@ - q->pid = error; - - list_add_tail(&q->list, pt); -+#endif - } - - /** -@@ -714,6 +722,7 @@ - */ - static void wake_up_sem_queue_do(struct list_head *pt) - { -+#ifndef CONFIG_PREEMPT_RT_BASE - struct sem_queue *q, *t; - int did_something; - -@@ -726,6 +735,7 @@ - } - if (did_something) - preempt_enable(); -+#endif - } - - static void unlink_queue(struct sem_array *sma, struct sem_queue *q) -diff -Nur linux-4.1.26.orig/kernel/bpf/hashtab.c linux-4.1.26/kernel/bpf/hashtab.c ---- linux-4.1.26.orig/kernel/bpf/hashtab.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/bpf/hashtab.c 2016-06-19 15:30:58.683297195 +0200 -@@ -17,7 +17,7 @@ - struct bpf_htab { - struct bpf_map map; - struct hlist_head *buckets; -- spinlock_t lock; -+ raw_spinlock_t lock; - u32 count; /* number of elements in this hashtable */ - u32 n_buckets; /* number of hash buckets */ - u32 elem_size; /* size of each element in bytes */ -@@ -82,7 +82,7 @@ - for (i = 0; i < htab->n_buckets; i++) - INIT_HLIST_HEAD(&htab->buckets[i]); - -- spin_lock_init(&htab->lock); -+ raw_spin_lock_init(&htab->lock); - htab->count = 0; - - htab->elem_size = sizeof(struct htab_elem) + -@@ -230,7 +230,7 @@ - l_new->hash = htab_map_hash(l_new->key, key_size); - - /* bpf_map_update_elem() can be called in_irq() */ -- spin_lock_irqsave(&htab->lock, flags); -+ raw_spin_lock_irqsave(&htab->lock, flags); - - head = select_bucket(htab, l_new->hash); - -@@ -266,11 +266,11 @@ - } else { - htab->count++; - } -- spin_unlock_irqrestore(&htab->lock, flags); -+ raw_spin_unlock_irqrestore(&htab->lock, flags); - - return 0; - err: -- spin_unlock_irqrestore(&htab->lock, flags); -+ raw_spin_unlock_irqrestore(&htab->lock, flags); - kfree(l_new); - return ret; - } -@@ -291,7 +291,7 @@ - - hash = htab_map_hash(key, key_size); - -- spin_lock_irqsave(&htab->lock, flags); -+ raw_spin_lock_irqsave(&htab->lock, flags); - - head = select_bucket(htab, hash); - -@@ -304,7 +304,7 @@ - ret = 0; - } - -- spin_unlock_irqrestore(&htab->lock, flags); -+ raw_spin_unlock_irqrestore(&htab->lock, flags); - return ret; - } - -diff -Nur linux-4.1.26.orig/kernel/cgroup.c linux-4.1.26/kernel/cgroup.c ---- linux-4.1.26.orig/kernel/cgroup.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/cgroup.c 2016-06-19 15:30:58.687297349 +0200 -@@ -4422,10 +4422,10 @@ - queue_work(cgroup_destroy_wq, &css->destroy_work); - } - --static void css_release_work_fn(struct work_struct *work) -+static void css_release_work_fn(struct swork_event *sev) - { - struct cgroup_subsys_state *css = -- container_of(work, struct cgroup_subsys_state, destroy_work); -+ container_of(sev, struct cgroup_subsys_state, destroy_swork); - struct cgroup_subsys *ss = css->ss; - struct cgroup *cgrp = css->cgroup; - -@@ -4464,8 +4464,8 @@ - struct cgroup_subsys_state *css = - container_of(ref, struct cgroup_subsys_state, refcnt); - -- INIT_WORK(&css->destroy_work, css_release_work_fn); -- queue_work(cgroup_destroy_wq, &css->destroy_work); -+ INIT_SWORK(&css->destroy_swork, css_release_work_fn); -+ swork_queue(&css->destroy_swork); - } - - static void init_and_link_css(struct cgroup_subsys_state *css, -@@ -5081,6 +5081,7 @@ - */ - cgroup_destroy_wq = alloc_workqueue("cgroup_destroy", 0, 1); - BUG_ON(!cgroup_destroy_wq); -+ BUG_ON(swork_get()); - - /* - * Used to destroy pidlists and separate to serve as flush domain. -diff -Nur linux-4.1.26.orig/kernel/cpu.c linux-4.1.26/kernel/cpu.c ---- linux-4.1.26.orig/kernel/cpu.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/cpu.c 2016-06-19 15:30:58.687297349 +0200 -@@ -74,8 +74,8 @@ - #endif - } cpu_hotplug = { - .active_writer = NULL, -- .wq = __WAIT_QUEUE_HEAD_INITIALIZER(cpu_hotplug.wq), - .lock = __MUTEX_INITIALIZER(cpu_hotplug.lock), -+ .wq = __WAIT_QUEUE_HEAD_INITIALIZER(cpu_hotplug.wq), - #ifdef CONFIG_DEBUG_LOCK_ALLOC - .dep_map = {.name = "cpu_hotplug.lock" }, - #endif -@@ -88,6 +88,289 @@ - #define cpuhp_lock_acquire() lock_map_acquire(&cpu_hotplug.dep_map) - #define cpuhp_lock_release() lock_map_release(&cpu_hotplug.dep_map) - -+/** -+ * hotplug_pcp - per cpu hotplug descriptor -+ * @unplug: set when pin_current_cpu() needs to sync tasks -+ * @sync_tsk: the task that waits for tasks to finish pinned sections -+ * @refcount: counter of tasks in pinned sections -+ * @grab_lock: set when the tasks entering pinned sections should wait -+ * @synced: notifier for @sync_tsk to tell cpu_down it's finished -+ * @mutex: the mutex to make tasks wait (used when @grab_lock is true) -+ * @mutex_init: zero if the mutex hasn't been initialized yet. -+ * -+ * Although @unplug and @sync_tsk may point to the same task, the @unplug -+ * is used as a flag and still exists after @sync_tsk has exited and -+ * @sync_tsk set to NULL. -+ */ -+struct hotplug_pcp { -+ struct task_struct *unplug; -+ struct task_struct *sync_tsk; -+ int refcount; -+ int grab_lock; -+ struct completion synced; -+ struct completion unplug_wait; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ /* -+ * Note, on PREEMPT_RT, the hotplug lock must save the state of -+ * the task, otherwise the mutex will cause the task to fail -+ * to sleep when required. (Because it's called from migrate_disable()) -+ * -+ * The spinlock_t on PREEMPT_RT is a mutex that saves the task's -+ * state. -+ */ -+ spinlock_t lock; -+#else -+ struct mutex mutex; -+#endif -+ int mutex_init; -+}; -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+# define hotplug_lock(hp) rt_spin_lock(&(hp)->lock) -+# define hotplug_unlock(hp) rt_spin_unlock(&(hp)->lock) -+#else -+# define hotplug_lock(hp) mutex_lock(&(hp)->mutex) -+# define hotplug_unlock(hp) mutex_unlock(&(hp)->mutex) -+#endif -+ -+static DEFINE_PER_CPU(struct hotplug_pcp, hotplug_pcp); -+ -+/** -+ * pin_current_cpu - Prevent the current cpu from being unplugged -+ * -+ * Lightweight version of get_online_cpus() to prevent cpu from being -+ * unplugged when code runs in a migration disabled region. -+ * -+ * Must be called with preemption disabled (preempt_count = 1)! -+ */ -+void pin_current_cpu(void) -+{ -+ struct hotplug_pcp *hp; -+ int force = 0; -+ -+retry: -+ hp = this_cpu_ptr(&hotplug_pcp); -+ -+ if (!hp->unplug || hp->refcount || force || preempt_count() > 1 || -+ hp->unplug == current) { -+ hp->refcount++; -+ return; -+ } -+ if (hp->grab_lock) { -+ preempt_enable(); -+ hotplug_lock(hp); -+ hotplug_unlock(hp); -+ } else { -+ preempt_enable(); -+ /* -+ * Try to push this task off of this CPU. -+ */ -+ if (!migrate_me()) { -+ preempt_disable(); -+ hp = this_cpu_ptr(&hotplug_pcp); -+ if (!hp->grab_lock) { -+ /* -+ * Just let it continue it's already pinned -+ * or about to sleep. -+ */ -+ force = 1; -+ goto retry; -+ } -+ preempt_enable(); -+ } -+ } -+ preempt_disable(); -+ goto retry; -+} -+ -+/** -+ * unpin_current_cpu - Allow unplug of current cpu -+ * -+ * Must be called with preemption or interrupts disabled! -+ */ -+void unpin_current_cpu(void) -+{ -+ struct hotplug_pcp *hp = this_cpu_ptr(&hotplug_pcp); -+ -+ WARN_ON(hp->refcount <= 0); -+ -+ /* This is safe. sync_unplug_thread is pinned to this cpu */ -+ if (!--hp->refcount && hp->unplug && hp->unplug != current) -+ wake_up_process(hp->unplug); -+} -+ -+static void wait_for_pinned_cpus(struct hotplug_pcp *hp) -+{ -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ while (hp->refcount) { -+ schedule_preempt_disabled(); -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ } -+} -+ -+static int sync_unplug_thread(void *data) -+{ -+ struct hotplug_pcp *hp = data; -+ -+ wait_for_completion(&hp->unplug_wait); -+ preempt_disable(); -+ hp->unplug = current; -+ wait_for_pinned_cpus(hp); -+ -+ /* -+ * This thread will synchronize the cpu_down() with threads -+ * that have pinned the CPU. When the pinned CPU count reaches -+ * zero, we inform the cpu_down code to continue to the next step. -+ */ -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ preempt_enable(); -+ complete(&hp->synced); -+ -+ /* -+ * If all succeeds, the next step will need tasks to wait till -+ * the CPU is offline before continuing. To do this, the grab_lock -+ * is set and tasks going into pin_current_cpu() will block on the -+ * mutex. But we still need to wait for those that are already in -+ * pinned CPU sections. If the cpu_down() failed, the kthread_should_stop() -+ * will kick this thread out. -+ */ -+ while (!hp->grab_lock && !kthread_should_stop()) { -+ schedule(); -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ } -+ -+ /* Make sure grab_lock is seen before we see a stale completion */ -+ smp_mb(); -+ -+ /* -+ * Now just before cpu_down() enters stop machine, we need to make -+ * sure all tasks that are in pinned CPU sections are out, and new -+ * tasks will now grab the lock, keeping them from entering pinned -+ * CPU sections. -+ */ -+ if (!kthread_should_stop()) { -+ preempt_disable(); -+ wait_for_pinned_cpus(hp); -+ preempt_enable(); -+ complete(&hp->synced); -+ } -+ -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ while (!kthread_should_stop()) { -+ schedule(); -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ } -+ set_current_state(TASK_RUNNING); -+ -+ /* -+ * Force this thread off this CPU as it's going down and -+ * we don't want any more work on this CPU. -+ */ -+ current->flags &= ~PF_NO_SETAFFINITY; -+ set_cpus_allowed_ptr(current, cpu_present_mask); -+ migrate_me(); -+ return 0; -+} -+ -+static void __cpu_unplug_sync(struct hotplug_pcp *hp) -+{ -+ wake_up_process(hp->sync_tsk); -+ wait_for_completion(&hp->synced); -+} -+ -+static void __cpu_unplug_wait(unsigned int cpu) -+{ -+ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); -+ -+ complete(&hp->unplug_wait); -+ wait_for_completion(&hp->synced); -+} -+ -+/* -+ * Start the sync_unplug_thread on the target cpu and wait for it to -+ * complete. -+ */ -+static int cpu_unplug_begin(unsigned int cpu) -+{ -+ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); -+ int err; -+ -+ /* Protected by cpu_hotplug.lock */ -+ if (!hp->mutex_init) { -+#ifdef CONFIG_PREEMPT_RT_FULL -+ spin_lock_init(&hp->lock); -+#else -+ mutex_init(&hp->mutex); -+#endif -+ hp->mutex_init = 1; -+ } -+ -+ /* Inform the scheduler to migrate tasks off this CPU */ -+ tell_sched_cpu_down_begin(cpu); -+ -+ init_completion(&hp->synced); -+ init_completion(&hp->unplug_wait); -+ -+ hp->sync_tsk = kthread_create(sync_unplug_thread, hp, "sync_unplug/%d", cpu); -+ if (IS_ERR(hp->sync_tsk)) { -+ err = PTR_ERR(hp->sync_tsk); -+ hp->sync_tsk = NULL; -+ return err; -+ } -+ kthread_bind(hp->sync_tsk, cpu); -+ -+ /* -+ * Wait for tasks to get out of the pinned sections, -+ * it's still OK if new tasks enter. Some CPU notifiers will -+ * wait for tasks that are going to enter these sections and -+ * we must not have them block. -+ */ -+ wake_up_process(hp->sync_tsk); -+ return 0; -+} -+ -+static void cpu_unplug_sync(unsigned int cpu) -+{ -+ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); -+ -+ init_completion(&hp->synced); -+ /* The completion needs to be initialzied before setting grab_lock */ -+ smp_wmb(); -+ -+ /* Grab the mutex before setting grab_lock */ -+ hotplug_lock(hp); -+ hp->grab_lock = 1; -+ -+ /* -+ * The CPU notifiers have been completed. -+ * Wait for tasks to get out of pinned CPU sections and have new -+ * tasks block until the CPU is completely down. -+ */ -+ __cpu_unplug_sync(hp); -+ -+ /* All done with the sync thread */ -+ kthread_stop(hp->sync_tsk); -+ hp->sync_tsk = NULL; -+} -+ -+static void cpu_unplug_done(unsigned int cpu) -+{ -+ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); -+ -+ hp->unplug = NULL; -+ /* Let all tasks know cpu unplug is finished before cleaning up */ -+ smp_wmb(); -+ -+ if (hp->sync_tsk) -+ kthread_stop(hp->sync_tsk); -+ -+ if (hp->grab_lock) { -+ hotplug_unlock(hp); -+ /* protected by cpu_hotplug.lock */ -+ hp->grab_lock = 0; -+ } -+ tell_sched_cpu_down_done(cpu); -+} - - void get_online_cpus(void) - { -@@ -349,13 +632,15 @@ - /* Requires cpu_add_remove_lock to be held */ - static int __ref _cpu_down(unsigned int cpu, int tasks_frozen) - { -- int err, nr_calls = 0; -+ int mycpu, err, nr_calls = 0; - void *hcpu = (void *)(long)cpu; - unsigned long mod = tasks_frozen ? CPU_TASKS_FROZEN : 0; - struct take_cpu_down_param tcd_param = { - .mod = mod, - .hcpu = hcpu, - }; -+ cpumask_var_t cpumask; -+ cpumask_var_t cpumask_org; - - if (num_online_cpus() == 1) - return -EBUSY; -@@ -363,7 +648,34 @@ - if (!cpu_online(cpu)) - return -EINVAL; - -+ /* Move the downtaker off the unplug cpu */ -+ if (!alloc_cpumask_var(&cpumask, GFP_KERNEL)) -+ return -ENOMEM; -+ if (!alloc_cpumask_var(&cpumask_org, GFP_KERNEL)) { -+ free_cpumask_var(cpumask); -+ return -ENOMEM; -+ } -+ -+ cpumask_copy(cpumask_org, tsk_cpus_allowed(current)); -+ cpumask_andnot(cpumask, cpu_online_mask, cpumask_of(cpu)); -+ set_cpus_allowed_ptr(current, cpumask); -+ free_cpumask_var(cpumask); -+ migrate_disable(); -+ mycpu = smp_processor_id(); -+ if (mycpu == cpu) { -+ printk(KERN_ERR "Yuck! Still on unplug CPU\n!"); -+ migrate_enable(); -+ err = -EBUSY; -+ goto restore_cpus; -+ } -+ migrate_enable(); -+ - cpu_hotplug_begin(); -+ err = cpu_unplug_begin(cpu); -+ if (err) { -+ printk("cpu_unplug_begin(%d) failed\n", cpu); -+ goto out_cancel; -+ } - - err = __cpu_notify(CPU_DOWN_PREPARE | mod, hcpu, -1, &nr_calls); - if (err) { -@@ -389,8 +701,12 @@ - #endif - synchronize_rcu(); - -+ __cpu_unplug_wait(cpu); - smpboot_park_threads(cpu); - -+ /* Notifiers are done. Don't let any more tasks pin this CPU. */ -+ cpu_unplug_sync(cpu); -+ - /* - * So now all preempt/rcu users must observe !cpu_active(). - */ -@@ -427,9 +743,14 @@ - check_for_tasks(cpu); - - out_release: -+ cpu_unplug_done(cpu); -+out_cancel: - cpu_hotplug_done(); - if (!err) - cpu_notify_nofail(CPU_POST_DEAD | mod, hcpu); -+restore_cpus: -+ set_cpus_allowed_ptr(current, cpumask_org); -+ free_cpumask_var(cpumask_org); - return err; - } - -diff -Nur linux-4.1.26.orig/kernel/debug/kdb/kdb_io.c linux-4.1.26/kernel/debug/kdb/kdb_io.c ---- linux-4.1.26.orig/kernel/debug/kdb/kdb_io.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/debug/kdb/kdb_io.c 2016-06-19 15:30:58.687297349 +0200 -@@ -554,7 +554,6 @@ - int linecount; - int colcount; - int logging, saved_loglevel = 0; -- int saved_trap_printk; - int got_printf_lock = 0; - int retlen = 0; - int fnd, len; -@@ -565,8 +564,6 @@ - unsigned long uninitialized_var(flags); - - preempt_disable(); -- saved_trap_printk = kdb_trap_printk; -- kdb_trap_printk = 0; - - /* Serialize kdb_printf if multiple cpus try to write at once. - * But if any cpu goes recursive in kdb, just print the output, -@@ -855,7 +852,6 @@ - } else { - __release(kdb_printf_lock); - } -- kdb_trap_printk = saved_trap_printk; - preempt_enable(); - return retlen; - } -@@ -865,9 +861,11 @@ - va_list ap; - int r; - -+ kdb_trap_printk++; - va_start(ap, fmt); - r = vkdb_printf(KDB_MSGSRC_INTERNAL, fmt, ap); - va_end(ap); -+ kdb_trap_printk--; - - return r; - } -diff -Nur linux-4.1.26.orig/kernel/events/core.c linux-4.1.26/kernel/events/core.c ---- linux-4.1.26.orig/kernel/events/core.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/events/core.c 2016-06-19 15:30:58.687297349 +0200 -@@ -6925,6 +6925,7 @@ - - hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); - hwc->hrtimer.function = perf_swevent_hrtimer; -+ hwc->hrtimer.irqsafe = 1; - - /* - * Since hrtimers have a fixed rate, we can do a static freq->period -diff -Nur linux-4.1.26.orig/kernel/exit.c linux-4.1.26/kernel/exit.c ---- linux-4.1.26.orig/kernel/exit.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/exit.c 2016-06-19 15:30:58.687297349 +0200 -@@ -144,7 +144,7 @@ - * Do this under ->siglock, we can race with another thread - * doing sigqueue_free() if we have SIGQUEUE_PREALLOC signals. - */ -- flush_sigqueue(&tsk->pending); -+ flush_task_sigqueue(tsk); - tsk->sighand = NULL; - spin_unlock(&sighand->siglock); - -diff -Nur linux-4.1.26.orig/kernel/fork.c linux-4.1.26/kernel/fork.c ---- linux-4.1.26.orig/kernel/fork.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/fork.c 2016-06-19 15:30:58.687297349 +0200 -@@ -108,7 +108,7 @@ - - DEFINE_PER_CPU(unsigned long, process_counts) = 0; - --__cacheline_aligned DEFINE_RWLOCK(tasklist_lock); /* outer */ -+DEFINE_RWLOCK(tasklist_lock); /* outer */ - - #ifdef CONFIG_PROVE_RCU - int lockdep_tasklist_lock_is_held(void) -@@ -244,7 +244,9 @@ - if (atomic_dec_and_test(&sig->sigcnt)) - free_signal_struct(sig); - } -- -+#ifdef CONFIG_PREEMPT_RT_BASE -+static -+#endif - void __put_task_struct(struct task_struct *tsk) - { - WARN_ON(!tsk->exit_state); -@@ -260,7 +262,18 @@ - if (!profile_handoff_task(tsk)) - free_task(tsk); - } -+#ifndef CONFIG_PREEMPT_RT_BASE - EXPORT_SYMBOL_GPL(__put_task_struct); -+#else -+void __put_task_struct_cb(struct rcu_head *rhp) -+{ -+ struct task_struct *tsk = container_of(rhp, struct task_struct, put_rcu); -+ -+ __put_task_struct(tsk); -+ -+} -+EXPORT_SYMBOL_GPL(__put_task_struct_cb); -+#endif - - void __init __weak arch_task_cache_init(void) { } - -@@ -374,6 +387,7 @@ - #endif - tsk->splice_pipe = NULL; - tsk->task_frag.page = NULL; -+ tsk->wake_q.next = NULL; - - account_kernel_stack(ti, 1); - -@@ -680,6 +694,19 @@ - } - EXPORT_SYMBOL_GPL(__mmdrop); - -+#ifdef CONFIG_PREEMPT_RT_BASE -+/* -+ * RCU callback for delayed mm drop. Not strictly rcu, but we don't -+ * want another facility to make this work. -+ */ -+void __mmdrop_delayed(struct rcu_head *rhp) -+{ -+ struct mm_struct *mm = container_of(rhp, struct mm_struct, delayed_drop); -+ -+ __mmdrop(mm); -+} -+#endif -+ - /* - * Decrement the use count and release all resources for an mm. - */ -@@ -1214,6 +1241,9 @@ - */ - static void posix_cpu_timers_init(struct task_struct *tsk) - { -+#ifdef CONFIG_PREEMPT_RT_BASE -+ tsk->posix_timer_list = NULL; -+#endif - tsk->cputime_expires.prof_exp = 0; - tsk->cputime_expires.virt_exp = 0; - tsk->cputime_expires.sched_exp = 0; -@@ -1338,6 +1368,7 @@ - spin_lock_init(&p->alloc_lock); - - init_sigpending(&p->pending); -+ p->sigqueue_cache = NULL; - - p->utime = p->stime = p->gtime = 0; - p->utimescaled = p->stimescaled = 0; -@@ -1345,7 +1376,8 @@ - p->prev_cputime.utime = p->prev_cputime.stime = 0; - #endif - #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN -- seqlock_init(&p->vtime_seqlock); -+ raw_spin_lock_init(&p->vtime_lock); -+ seqcount_init(&p->vtime_seq); - p->vtime_snap = 0; - p->vtime_snap_whence = VTIME_SLEEPING; - #endif -@@ -1396,6 +1428,9 @@ - p->hardirq_context = 0; - p->softirq_context = 0; - #endif -+ -+ p->pagefault_disabled = 0; -+ - #ifdef CONFIG_LOCKDEP - p->lockdep_depth = 0; /* no locks held yet */ - p->curr_chain_key = 0; -diff -Nur linux-4.1.26.orig/kernel/futex.c linux-4.1.26/kernel/futex.c ---- linux-4.1.26.orig/kernel/futex.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/futex.c 2016-06-19 15:32:42.447298576 +0200 -@@ -738,7 +738,9 @@ - * task still owns the PI-state: - */ - if (head->next != next) { -+ raw_spin_unlock_irq(&curr->pi_lock); - spin_unlock(&hb->lock); -+ raw_spin_lock_irq(&curr->pi_lock); - continue; - } - -@@ -1090,9 +1092,11 @@ - - /* - * The hash bucket lock must be held when this is called. -- * Afterwards, the futex_q must not be accessed. -+ * Afterwards, the futex_q must not be accessed. Callers -+ * must ensure to later call wake_up_q() for the actual -+ * wakeups to occur. - */ --static void wake_futex(struct futex_q *q) -+static void mark_wake_futex(struct wake_q_head *wake_q, struct futex_q *q) - { - struct task_struct *p = q->task; - -@@ -1100,14 +1104,10 @@ - return; - - /* -- * We set q->lock_ptr = NULL _before_ we wake up the task. If -- * a non-futex wake up happens on another CPU then the task -- * might exit and p would dereference a non-existing task -- * struct. Prevent this by holding a reference on p across the -- * wake up. -+ * Queue the task for later wakeup for after we've released -+ * the hb->lock. wake_q_add() grabs reference to p. - */ -- get_task_struct(p); -- -+ wake_q_add(wake_q, p); - __unqueue_futex(q); - /* - * The waiting task can free the futex_q as soon as -@@ -1117,16 +1117,15 @@ - */ - smp_wmb(); - q->lock_ptr = NULL; -- -- wake_up_state(p, TASK_NORMAL); -- put_task_struct(p); - } - --static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_q *this) -+static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_q *this, -+ struct futex_hash_bucket *hb) - { - struct task_struct *new_owner; - struct futex_pi_state *pi_state = this->pi_state; - u32 uninitialized_var(curval), newval; -+ bool deboost; - int ret = 0; - - if (!pi_state) -@@ -1188,7 +1187,17 @@ - raw_spin_unlock_irq(&new_owner->pi_lock); - - raw_spin_unlock(&pi_state->pi_mutex.wait_lock); -- rt_mutex_unlock(&pi_state->pi_mutex); -+ -+ deboost = rt_mutex_futex_unlock(&pi_state->pi_mutex); -+ -+ /* -+ * We deboost after dropping hb->lock. That prevents a double -+ * wakeup on RT. -+ */ -+ spin_unlock(&hb->lock); -+ -+ if (deboost) -+ rt_mutex_adjust_prio(current); - - return 0; - } -@@ -1227,6 +1236,7 @@ - struct futex_q *this, *next; - union futex_key key = FUTEX_KEY_INIT; - int ret; -+ WAKE_Q(wake_q); - - if (!bitset) - return -EINVAL; -@@ -1254,13 +1264,14 @@ - if (!(this->bitset & bitset)) - continue; - -- wake_futex(this); -+ mark_wake_futex(&wake_q, this); - if (++ret >= nr_wake) - break; - } - } - - spin_unlock(&hb->lock); -+ wake_up_q(&wake_q); - out_put_key: - put_futex_key(&key); - out: -@@ -1279,6 +1290,7 @@ - struct futex_hash_bucket *hb1, *hb2; - struct futex_q *this, *next; - int ret, op_ret; -+ WAKE_Q(wake_q); - - retry: - ret = get_futex_key(uaddr1, flags & FLAGS_SHARED, &key1, VERIFY_READ); -@@ -1330,7 +1342,7 @@ - ret = -EINVAL; - goto out_unlock; - } -- wake_futex(this); -+ mark_wake_futex(&wake_q, this); - if (++ret >= nr_wake) - break; - } -@@ -1344,7 +1356,7 @@ - ret = -EINVAL; - goto out_unlock; - } -- wake_futex(this); -+ mark_wake_futex(&wake_q, this); - if (++op_ret >= nr_wake2) - break; - } -@@ -1354,6 +1366,7 @@ - - out_unlock: - double_unlock_hb(hb1, hb2); -+ wake_up_q(&wake_q); - out_put_keys: - put_futex_key(&key2); - out_put_key1: -@@ -1513,6 +1526,7 @@ - struct futex_pi_state *pi_state = NULL; - struct futex_hash_bucket *hb1, *hb2; - struct futex_q *this, *next; -+ WAKE_Q(wake_q); - - if (requeue_pi) { - /* -@@ -1689,7 +1703,7 @@ - * woken by futex_unlock_pi(). - */ - if (++task_count <= nr_wake && !requeue_pi) { -- wake_futex(this); -+ mark_wake_futex(&wake_q, this); - continue; - } - -@@ -1715,6 +1729,16 @@ - requeue_pi_wake_futex(this, &key2, hb2); - drop_count++; - continue; -+ } else if (ret == -EAGAIN) { -+ /* -+ * Waiter was woken by timeout or -+ * signal and has set pi_blocked_on to -+ * PI_WAKEUP_INPROGRESS before we -+ * tried to enqueue it on the rtmutex. -+ */ -+ this->pi_state = NULL; -+ free_pi_state(pi_state); -+ continue; - } else if (ret) { - /* -EDEADLK */ - this->pi_state = NULL; -@@ -1729,6 +1753,7 @@ - out_unlock: - free_pi_state(pi_state); - double_unlock_hb(hb1, hb2); -+ wake_up_q(&wake_q); - hb_waiters_dec(hb2); - - /* -@@ -2422,7 +2447,15 @@ - */ - match = futex_top_waiter(hb, &key); - if (match) { -- ret = wake_futex_pi(uaddr, uval, match); -+ ret = wake_futex_pi(uaddr, uval, match, hb); -+ -+ /* -+ * In case of success wake_futex_pi dropped the hash -+ * bucket lock. -+ */ -+ if (!ret) -+ goto out_putkey; -+ - /* - * The atomic access to the futex value generated a - * pagefault, so retry the user-access and the wakeup: -@@ -2458,6 +2491,7 @@ - - out_unlock: - spin_unlock(&hb->lock); -+out_putkey: - put_futex_key(&key); - return ret; - -@@ -2568,7 +2602,7 @@ - struct hrtimer_sleeper timeout, *to = NULL; - struct rt_mutex_waiter rt_waiter; - struct rt_mutex *pi_mutex = NULL; -- struct futex_hash_bucket *hb; -+ struct futex_hash_bucket *hb, *hb2; - union futex_key key2 = FUTEX_KEY_INIT; - struct futex_q q = futex_q_init; - int res, ret; -@@ -2593,10 +2627,7 @@ - * The waiter is allocated on our stack, manipulated by the requeue - * code while we sleep on uaddr. - */ -- debug_rt_mutex_init_waiter(&rt_waiter); -- RB_CLEAR_NODE(&rt_waiter.pi_tree_entry); -- RB_CLEAR_NODE(&rt_waiter.tree_entry); -- rt_waiter.task = NULL; -+ rt_mutex_init_waiter(&rt_waiter, false); - - ret = get_futex_key(uaddr2, flags & FLAGS_SHARED, &key2, VERIFY_WRITE); - if (unlikely(ret != 0)) -@@ -2627,20 +2658,55 @@ - /* Queue the futex_q, drop the hb lock, wait for wakeup. */ - futex_wait_queue_me(hb, &q, to); - -- spin_lock(&hb->lock); -- ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); -- spin_unlock(&hb->lock); -- if (ret) -- goto out_put_keys; -+ /* -+ * On RT we must avoid races with requeue and trying to block -+ * on two mutexes (hb->lock and uaddr2's rtmutex) by -+ * serializing access to pi_blocked_on with pi_lock. -+ */ -+ raw_spin_lock_irq(¤t->pi_lock); -+ if (current->pi_blocked_on) { -+ /* -+ * We have been requeued or are in the process of -+ * being requeued. -+ */ -+ raw_spin_unlock_irq(¤t->pi_lock); -+ } else { -+ /* -+ * Setting pi_blocked_on to PI_WAKEUP_INPROGRESS -+ * prevents a concurrent requeue from moving us to the -+ * uaddr2 rtmutex. After that we can safely acquire -+ * (and possibly block on) hb->lock. -+ */ -+ current->pi_blocked_on = PI_WAKEUP_INPROGRESS; -+ raw_spin_unlock_irq(¤t->pi_lock); -+ -+ spin_lock(&hb->lock); -+ -+ /* -+ * Clean up pi_blocked_on. We might leak it otherwise -+ * when we succeeded with the hb->lock in the fast -+ * path. -+ */ -+ raw_spin_lock_irq(¤t->pi_lock); -+ current->pi_blocked_on = NULL; -+ raw_spin_unlock_irq(¤t->pi_lock); -+ -+ ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); -+ spin_unlock(&hb->lock); -+ if (ret) -+ goto out_put_keys; -+ } - - /* -- * In order for us to be here, we know our q.key == key2, and since -- * we took the hb->lock above, we also know that futex_requeue() has -- * completed and we no longer have to concern ourselves with a wakeup -- * race with the atomic proxy lock acquisition by the requeue code. The -- * futex_requeue dropped our key1 reference and incremented our key2 -- * reference count. -+ * In order to be here, we have either been requeued, are in -+ * the process of being requeued, or requeue successfully -+ * acquired uaddr2 on our behalf. If pi_blocked_on was -+ * non-null above, we may be racing with a requeue. Do not -+ * rely on q->lock_ptr to be hb2->lock until after blocking on -+ * hb->lock or hb2->lock. The futex_requeue dropped our key1 -+ * reference and incremented our key2 reference count. - */ -+ hb2 = hash_futex(&key2); - - /* Check if the requeue code acquired the second futex for us. */ - if (!q.rt_waiter) { -@@ -2649,14 +2715,15 @@ - * did a lock-steal - fix up the PI-state in that case. - */ - if (q.pi_state && (q.pi_state->owner != current)) { -- spin_lock(q.lock_ptr); -+ spin_lock(&hb2->lock); -+ BUG_ON(&hb2->lock != q.lock_ptr); - ret = fixup_pi_state_owner(uaddr2, &q, current); - /* - * Drop the reference to the pi state which - * the requeue_pi() code acquired for us. - */ - free_pi_state(q.pi_state); -- spin_unlock(q.lock_ptr); -+ spin_unlock(&hb2->lock); - } - } else { - /* -@@ -2669,7 +2736,8 @@ - ret = rt_mutex_finish_proxy_lock(pi_mutex, to, &rt_waiter); - debug_rt_mutex_free_waiter(&rt_waiter); - -- spin_lock(q.lock_ptr); -+ spin_lock(&hb2->lock); -+ BUG_ON(&hb2->lock != q.lock_ptr); - /* - * Fixup the pi_state owner and possibly acquire the lock if we - * haven't already. -diff -Nur linux-4.1.26.orig/kernel/irq/handle.c linux-4.1.26/kernel/irq/handle.c ---- linux-4.1.26.orig/kernel/irq/handle.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/irq/handle.c 2016-06-19 15:30:58.691297504 +0200 -@@ -133,6 +133,8 @@ - irqreturn_t - handle_irq_event_percpu(struct irq_desc *desc, struct irqaction *action) - { -+ struct pt_regs *regs = get_irq_regs(); -+ u64 ip = regs ? instruction_pointer(regs) : 0; - irqreturn_t retval = IRQ_NONE; - unsigned int flags = 0, irq = desc->irq_data.irq; - -@@ -173,7 +175,11 @@ - action = action->next; - } while (action); - -- add_interrupt_randomness(irq, flags); -+#ifndef CONFIG_PREEMPT_RT_FULL -+ add_interrupt_randomness(irq, flags, ip); -+#else -+ desc->random_ip = ip; -+#endif - - if (!noirqdebug) - note_interrupt(irq, desc, retval); -diff -Nur linux-4.1.26.orig/kernel/irq/manage.c linux-4.1.26/kernel/irq/manage.c ---- linux-4.1.26.orig/kernel/irq/manage.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/irq/manage.c 2016-06-19 15:30:58.691297504 +0200 -@@ -22,6 +22,7 @@ - #include "internals.h" - - #ifdef CONFIG_IRQ_FORCED_THREADING -+# ifndef CONFIG_PREEMPT_RT_BASE - __read_mostly bool force_irqthreads; - - static int __init setup_forced_irqthreads(char *arg) -@@ -30,6 +31,7 @@ - return 0; - } - early_param("threadirqs", setup_forced_irqthreads); -+# endif - #endif - - static void __synchronize_hardirq(struct irq_desc *desc) -@@ -179,6 +181,62 @@ - irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } - #endif - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static void _irq_affinity_notify(struct irq_affinity_notify *notify); -+static struct task_struct *set_affinity_helper; -+static LIST_HEAD(affinity_list); -+static DEFINE_RAW_SPINLOCK(affinity_list_lock); -+ -+static int set_affinity_thread(void *unused) -+{ -+ while (1) { -+ struct irq_affinity_notify *notify; -+ int empty; -+ -+ set_current_state(TASK_INTERRUPTIBLE); -+ -+ raw_spin_lock_irq(&affinity_list_lock); -+ empty = list_empty(&affinity_list); -+ raw_spin_unlock_irq(&affinity_list_lock); -+ -+ if (empty) -+ schedule(); -+ if (kthread_should_stop()) -+ break; -+ set_current_state(TASK_RUNNING); -+try_next: -+ notify = NULL; -+ -+ raw_spin_lock_irq(&affinity_list_lock); -+ if (!list_empty(&affinity_list)) { -+ notify = list_first_entry(&affinity_list, -+ struct irq_affinity_notify, list); -+ list_del_init(¬ify->list); -+ } -+ raw_spin_unlock_irq(&affinity_list_lock); -+ -+ if (!notify) -+ continue; -+ _irq_affinity_notify(notify); -+ goto try_next; -+ } -+ return 0; -+} -+ -+static void init_helper_thread(void) -+{ -+ if (set_affinity_helper) -+ return; -+ set_affinity_helper = kthread_run(set_affinity_thread, NULL, -+ "affinity-cb"); -+ WARN_ON(IS_ERR(set_affinity_helper)); -+} -+#else -+ -+static inline void init_helper_thread(void) { } -+ -+#endif -+ - int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask, - bool force) - { -@@ -218,7 +276,17 @@ - - if (desc->affinity_notify) { - kref_get(&desc->affinity_notify->kref); -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ raw_spin_lock(&affinity_list_lock); -+ if (list_empty(&desc->affinity_notify->list)) -+ list_add_tail(&affinity_list, -+ &desc->affinity_notify->list); -+ raw_spin_unlock(&affinity_list_lock); -+ wake_up_process(set_affinity_helper); -+#else - schedule_work(&desc->affinity_notify->work); -+#endif - } - irqd_set(data, IRQD_AFFINITY_SET); - -@@ -256,10 +324,8 @@ - } - EXPORT_SYMBOL_GPL(irq_set_affinity_hint); - --static void irq_affinity_notify(struct work_struct *work) -+static void _irq_affinity_notify(struct irq_affinity_notify *notify) - { -- struct irq_affinity_notify *notify = -- container_of(work, struct irq_affinity_notify, work); - struct irq_desc *desc = irq_to_desc(notify->irq); - cpumask_var_t cpumask; - unsigned long flags; -@@ -281,6 +347,13 @@ - kref_put(¬ify->kref, notify->release); - } - -+static void irq_affinity_notify(struct work_struct *work) -+{ -+ struct irq_affinity_notify *notify = -+ container_of(work, struct irq_affinity_notify, work); -+ _irq_affinity_notify(notify); -+} -+ - /** - * irq_set_affinity_notifier - control notification of IRQ affinity changes - * @irq: Interrupt for which to enable/disable notification -@@ -310,6 +383,8 @@ - notify->irq = irq; - kref_init(¬ify->kref); - INIT_WORK(¬ify->work, irq_affinity_notify); -+ INIT_LIST_HEAD(¬ify->list); -+ init_helper_thread(); - } - - raw_spin_lock_irqsave(&desc->lock, flags); -@@ -697,6 +772,12 @@ - return IRQ_NONE; - } - -+static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id) -+{ -+ WARN(1, "Secondary action handler called for irq %d\n", irq); -+ return IRQ_NONE; -+} -+ - static int irq_wait_for_interrupt(struct irqaction *action) - { - set_current_state(TASK_INTERRUPTIBLE); -@@ -723,7 +804,8 @@ - static void irq_finalize_oneshot(struct irq_desc *desc, - struct irqaction *action) - { -- if (!(desc->istate & IRQS_ONESHOT)) -+ if (!(desc->istate & IRQS_ONESHOT) || -+ action->handler == irq_forced_secondary_handler) - return; - again: - chip_bus_lock(desc); -@@ -825,7 +907,15 @@ - local_bh_disable(); - ret = action->thread_fn(action->irq, action->dev_id); - irq_finalize_oneshot(desc, action); -- local_bh_enable(); -+ /* -+ * Interrupts which have real time requirements can be set up -+ * to avoid softirq processing in the thread handler. This is -+ * safe as these interrupts do not raise soft interrupts. -+ */ -+ if (irq_settings_no_softirq_call(desc)) -+ _local_bh_enable(); -+ else -+ local_bh_enable(); - return ret; - } - -@@ -877,6 +967,18 @@ - irq_finalize_oneshot(desc, action); - } - -+static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action) -+{ -+ struct irqaction *secondary = action->secondary; -+ -+ if (WARN_ON_ONCE(!secondary)) -+ return; -+ -+ raw_spin_lock_irq(&desc->lock); -+ __irq_wake_thread(desc, secondary); -+ raw_spin_unlock_irq(&desc->lock); -+} -+ - /* - * Interrupt handler thread - */ -@@ -907,7 +1009,15 @@ - action_ret = handler_fn(desc, action); - if (action_ret == IRQ_HANDLED) - atomic_inc(&desc->threads_handled); -+ if (action_ret == IRQ_WAKE_THREAD) -+ irq_wake_secondary(desc, action); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ migrate_disable(); -+ add_interrupt_randomness(action->irq, 0, -+ desc->random_ip ^ (unsigned long) action); -+ migrate_enable(); -+#endif - wake_threads_waitq(desc); - } - -@@ -951,20 +1061,36 @@ - } - EXPORT_SYMBOL_GPL(irq_wake_thread); - --static void irq_setup_forced_threading(struct irqaction *new) -+static int irq_setup_forced_threading(struct irqaction *new) - { - if (!force_irqthreads) -- return; -+ return 0; - if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) -- return; -+ return 0; - - new->flags |= IRQF_ONESHOT; - -- if (!new->thread_fn) { -- set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); -- new->thread_fn = new->handler; -- new->handler = irq_default_primary_handler; -- } -+ /* -+ * Handle the case where we have a real primary handler and a -+ * thread handler. We force thread them as well by creating a -+ * secondary action. -+ */ -+ if (new->handler != irq_default_primary_handler && new->thread_fn) { -+ /* Allocate the secondary action */ -+ new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL); -+ if (!new->secondary) -+ return -ENOMEM; -+ new->secondary->handler = irq_forced_secondary_handler; -+ new->secondary->thread_fn = new->thread_fn; -+ new->secondary->dev_id = new->dev_id; -+ new->secondary->irq = new->irq; -+ new->secondary->name = new->name; -+ } -+ /* Deal with the primary handler */ -+ set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); -+ new->thread_fn = new->handler; -+ new->handler = irq_default_primary_handler; -+ return 0; - } - - static int irq_request_resources(struct irq_desc *desc) -@@ -984,6 +1110,48 @@ - c->irq_release_resources(d); - } - -+static int -+setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary) -+{ -+ struct task_struct *t; -+ struct sched_param param = { -+ .sched_priority = MAX_USER_RT_PRIO/2, -+ }; -+ -+ if (!secondary) { -+ t = kthread_create(irq_thread, new, "irq/%d-%s", irq, -+ new->name); -+ } else { -+ t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq, -+ new->name); -+ param.sched_priority += 1; -+ } -+ -+ if (IS_ERR(t)) -+ return PTR_ERR(t); -+ -+ sched_setscheduler_nocheck(t, SCHED_FIFO, ¶m); -+ -+ /* -+ * We keep the reference to the task struct even if -+ * the thread dies to avoid that the interrupt code -+ * references an already freed task_struct. -+ */ -+ get_task_struct(t); -+ new->thread = t; -+ /* -+ * Tell the thread to set its affinity. This is -+ * important for shared interrupt handlers as we do -+ * not invoke setup_affinity() for the secondary -+ * handlers as everything is already set up. Even for -+ * interrupts marked with IRQF_NO_BALANCE this is -+ * correct as we want the thread to move to the cpu(s) -+ * on which the requesting code placed the interrupt. -+ */ -+ set_bit(IRQTF_AFFINITY, &new->thread_flags); -+ return 0; -+} -+ - /* - * Internal function to register an irqaction - typically used to - * allocate special interrupts that are part of the architecture. -@@ -1004,6 +1172,8 @@ - if (!try_module_get(desc->owner)) - return -ENODEV; - -+ new->irq = irq; -+ - /* - * Check whether the interrupt nests into another interrupt - * thread. -@@ -1021,8 +1191,11 @@ - */ - new->handler = irq_nested_primary_handler; - } else { -- if (irq_settings_can_thread(desc)) -- irq_setup_forced_threading(new); -+ if (irq_settings_can_thread(desc)) { -+ ret = irq_setup_forced_threading(new); -+ if (ret) -+ goto out_mput; -+ } - } - - /* -@@ -1031,37 +1204,14 @@ - * thread. - */ - if (new->thread_fn && !nested) { -- struct task_struct *t; -- static const struct sched_param param = { -- .sched_priority = MAX_USER_RT_PRIO/2, -- }; -- -- t = kthread_create(irq_thread, new, "irq/%d-%s", irq, -- new->name); -- if (IS_ERR(t)) { -- ret = PTR_ERR(t); -+ ret = setup_irq_thread(new, irq, false); -+ if (ret) - goto out_mput; -+ if (new->secondary) { -+ ret = setup_irq_thread(new->secondary, irq, true); -+ if (ret) -+ goto out_thread; - } -- -- sched_setscheduler_nocheck(t, SCHED_FIFO, ¶m); -- -- /* -- * We keep the reference to the task struct even if -- * the thread dies to avoid that the interrupt code -- * references an already freed task_struct. -- */ -- get_task_struct(t); -- new->thread = t; -- /* -- * Tell the thread to set its affinity. This is -- * important for shared interrupt handlers as we do -- * not invoke setup_affinity() for the secondary -- * handlers as everything is already set up. Even for -- * interrupts marked with IRQF_NO_BALANCE this is -- * correct as we want the thread to move to the cpu(s) -- * on which the requesting code placed the interrupt. -- */ -- set_bit(IRQTF_AFFINITY, &new->thread_flags); - } - - if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { -@@ -1221,6 +1371,9 @@ - irqd_set(&desc->irq_data, IRQD_NO_BALANCING); - } - -+ if (new->flags & IRQF_NO_SOFTIRQ_CALL) -+ irq_settings_set_no_softirq_call(desc); -+ - /* Set default affinity mask once everything is setup */ - setup_affinity(irq, desc, mask); - -@@ -1234,7 +1387,6 @@ - irq, nmsk, omsk); - } - -- new->irq = irq; - *old_ptr = new; - - irq_pm_install_action(desc, new); -@@ -1260,6 +1412,8 @@ - */ - if (new->thread) - wake_up_process(new->thread); -+ if (new->secondary) -+ wake_up_process(new->secondary->thread); - - register_irq_proc(irq, desc); - new->dir = NULL; -@@ -1290,6 +1444,13 @@ - kthread_stop(t); - put_task_struct(t); - } -+ if (new->secondary && new->secondary->thread) { -+ struct task_struct *t = new->secondary->thread; -+ -+ new->secondary->thread = NULL; -+ kthread_stop(t); -+ put_task_struct(t); -+ } - out_mput: - module_put(desc->owner); - return ret; -@@ -1397,9 +1558,14 @@ - if (action->thread) { - kthread_stop(action->thread); - put_task_struct(action->thread); -+ if (action->secondary && action->secondary->thread) { -+ kthread_stop(action->secondary->thread); -+ put_task_struct(action->secondary->thread); -+ } - } - - module_put(desc->owner); -+ kfree(action->secondary); - return action; - } - -@@ -1543,8 +1709,10 @@ - retval = __setup_irq(irq, desc, action); - chip_bus_sync_unlock(desc); - -- if (retval) -+ if (retval) { -+ kfree(action->secondary); - kfree(action); -+ } - - #ifdef CONFIG_DEBUG_SHIRQ_FIXME - if (!retval && (irqflags & IRQF_SHARED)) { -diff -Nur linux-4.1.26.orig/kernel/irq/settings.h linux-4.1.26/kernel/irq/settings.h ---- linux-4.1.26.orig/kernel/irq/settings.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/irq/settings.h 2016-06-19 15:30:58.691297504 +0200 -@@ -15,6 +15,7 @@ - _IRQ_NESTED_THREAD = IRQ_NESTED_THREAD, - _IRQ_PER_CPU_DEVID = IRQ_PER_CPU_DEVID, - _IRQ_IS_POLLED = IRQ_IS_POLLED, -+ _IRQ_NO_SOFTIRQ_CALL = IRQ_NO_SOFTIRQ_CALL, - _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK, - }; - -@@ -28,6 +29,7 @@ - #define IRQ_NESTED_THREAD GOT_YOU_MORON - #define IRQ_PER_CPU_DEVID GOT_YOU_MORON - #define IRQ_IS_POLLED GOT_YOU_MORON -+#define IRQ_NO_SOFTIRQ_CALL GOT_YOU_MORON - #undef IRQF_MODIFY_MASK - #define IRQF_MODIFY_MASK GOT_YOU_MORON - -@@ -38,6 +40,16 @@ - desc->status_use_accessors |= (set & _IRQF_MODIFY_MASK); - } - -+static inline bool irq_settings_no_softirq_call(struct irq_desc *desc) -+{ -+ return desc->status_use_accessors & _IRQ_NO_SOFTIRQ_CALL; -+} -+ -+static inline void irq_settings_set_no_softirq_call(struct irq_desc *desc) -+{ -+ desc->status_use_accessors |= _IRQ_NO_SOFTIRQ_CALL; -+} -+ - static inline bool irq_settings_is_per_cpu(struct irq_desc *desc) - { - return desc->status_use_accessors & _IRQ_PER_CPU; -diff -Nur linux-4.1.26.orig/kernel/irq/spurious.c linux-4.1.26/kernel/irq/spurious.c ---- linux-4.1.26.orig/kernel/irq/spurious.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/irq/spurious.c 2016-06-19 15:30:58.691297504 +0200 -@@ -444,6 +444,10 @@ - - static int __init irqfixup_setup(char *str) - { -+#ifdef CONFIG_PREEMPT_RT_BASE -+ pr_warn("irqfixup boot option not supported w/ CONFIG_PREEMPT_RT_BASE\n"); -+ return 1; -+#endif - irqfixup = 1; - printk(KERN_WARNING "Misrouted IRQ fixup support enabled.\n"); - printk(KERN_WARNING "This may impact system performance.\n"); -@@ -456,6 +460,10 @@ - - static int __init irqpoll_setup(char *str) - { -+#ifdef CONFIG_PREEMPT_RT_BASE -+ pr_warn("irqpoll boot option not supported w/ CONFIG_PREEMPT_RT_BASE\n"); -+ return 1; -+#endif - irqfixup = 2; - printk(KERN_WARNING "Misrouted IRQ fixup and polling support " - "enabled\n"); -diff -Nur linux-4.1.26.orig/kernel/irq_work.c linux-4.1.26/kernel/irq_work.c ---- linux-4.1.26.orig/kernel/irq_work.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/irq_work.c 2016-06-19 15:30:58.691297504 +0200 -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - - -@@ -65,6 +66,8 @@ - */ - bool irq_work_queue_on(struct irq_work *work, int cpu) - { -+ struct llist_head *list; -+ - /* All work should have been flushed before going offline */ - WARN_ON_ONCE(cpu_is_offline(cpu)); - -@@ -75,7 +78,12 @@ - if (!irq_work_claim(work)) - return false; - -- if (llist_add(&work->llnode, &per_cpu(raised_list, cpu))) -+ if (IS_ENABLED(CONFIG_PREEMPT_RT_FULL) && !(work->flags & IRQ_WORK_HARD_IRQ)) -+ list = &per_cpu(lazy_list, cpu); -+ else -+ list = &per_cpu(raised_list, cpu); -+ -+ if (llist_add(&work->llnode, list)) - arch_send_call_function_single_ipi(cpu); - - return true; -@@ -86,6 +94,9 @@ - /* Enqueue the irq work @work on the current CPU */ - bool irq_work_queue(struct irq_work *work) - { -+ struct llist_head *list; -+ bool lazy_work, realtime = IS_ENABLED(CONFIG_PREEMPT_RT_FULL); -+ - /* Only queue if not already pending */ - if (!irq_work_claim(work)) - return false; -@@ -93,13 +104,15 @@ - /* Queue the entry and raise the IPI if needed. */ - preempt_disable(); - -- /* If the work is "lazy", handle it from next tick if any */ -- if (work->flags & IRQ_WORK_LAZY) { -- if (llist_add(&work->llnode, this_cpu_ptr(&lazy_list)) && -- tick_nohz_tick_stopped()) -- arch_irq_work_raise(); -- } else { -- if (llist_add(&work->llnode, this_cpu_ptr(&raised_list))) -+ lazy_work = work->flags & IRQ_WORK_LAZY; -+ -+ if (lazy_work || (realtime && !(work->flags & IRQ_WORK_HARD_IRQ))) -+ list = this_cpu_ptr(&lazy_list); -+ else -+ list = this_cpu_ptr(&raised_list); -+ -+ if (llist_add(&work->llnode, list)) { -+ if (!lazy_work || tick_nohz_tick_stopped()) - arch_irq_work_raise(); - } - -@@ -116,9 +129,8 @@ - raised = this_cpu_ptr(&raised_list); - lazy = this_cpu_ptr(&lazy_list); - -- if (llist_empty(raised) || arch_irq_work_has_interrupt()) -- if (llist_empty(lazy)) -- return false; -+ if (llist_empty(raised) && llist_empty(lazy)) -+ return false; - - /* All work should have been flushed before going offline */ - WARN_ON_ONCE(cpu_is_offline(smp_processor_id())); -@@ -132,7 +144,7 @@ - struct irq_work *work; - struct llist_node *llnode; - -- BUG_ON(!irqs_disabled()); -+ BUG_ON_NONRT(!irqs_disabled()); - - if (llist_empty(list)) - return; -@@ -169,7 +181,16 @@ - void irq_work_run(void) - { - irq_work_run_list(this_cpu_ptr(&raised_list)); -- irq_work_run_list(this_cpu_ptr(&lazy_list)); -+ if (IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) { -+ /* -+ * NOTE: we raise softirq via IPI for safety, -+ * and execute in irq_work_tick() to move the -+ * overhead from hard to soft irq context. -+ */ -+ if (!llist_empty(this_cpu_ptr(&lazy_list))) -+ raise_softirq(TIMER_SOFTIRQ); -+ } else -+ irq_work_run_list(this_cpu_ptr(&lazy_list)); - } - EXPORT_SYMBOL_GPL(irq_work_run); - -@@ -179,8 +200,17 @@ - - if (!llist_empty(raised) && !arch_irq_work_has_interrupt()) - irq_work_run_list(raised); -+ -+ if (!IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) -+ irq_work_run_list(this_cpu_ptr(&lazy_list)); -+} -+ -+#if defined(CONFIG_IRQ_WORK) && defined(CONFIG_PREEMPT_RT_FULL) -+void irq_work_tick_soft(void) -+{ - irq_work_run_list(this_cpu_ptr(&lazy_list)); - } -+#endif - - /* - * Synchronize against the irq_work @entry, ensures the entry is not -diff -Nur linux-4.1.26.orig/kernel/Kconfig.locks linux-4.1.26/kernel/Kconfig.locks ---- linux-4.1.26.orig/kernel/Kconfig.locks 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/Kconfig.locks 2016-06-19 15:30:58.683297195 +0200 -@@ -225,11 +225,11 @@ - - config MUTEX_SPIN_ON_OWNER - def_bool y -- depends on SMP && !DEBUG_MUTEXES && ARCH_SUPPORTS_ATOMIC_RMW -+ depends on SMP && !DEBUG_MUTEXES && ARCH_SUPPORTS_ATOMIC_RMW && !PREEMPT_RT_FULL - - config RWSEM_SPIN_ON_OWNER - def_bool y -- depends on SMP && RWSEM_XCHGADD_ALGORITHM && ARCH_SUPPORTS_ATOMIC_RMW -+ depends on SMP && RWSEM_XCHGADD_ALGORITHM && ARCH_SUPPORTS_ATOMIC_RMW && !PREEMPT_RT_FULL - - config LOCK_SPIN_ON_OWNER - def_bool y -diff -Nur linux-4.1.26.orig/kernel/Kconfig.preempt linux-4.1.26/kernel/Kconfig.preempt ---- linux-4.1.26.orig/kernel/Kconfig.preempt 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/Kconfig.preempt 2016-06-19 15:30:58.683297195 +0200 -@@ -1,3 +1,16 @@ -+config PREEMPT -+ bool -+ select PREEMPT_COUNT -+ -+config PREEMPT_RT_BASE -+ bool -+ select PREEMPT -+ -+config HAVE_PREEMPT_LAZY -+ bool -+ -+config PREEMPT_LAZY -+ def_bool y if HAVE_PREEMPT_LAZY && PREEMPT_RT_FULL - - choice - prompt "Preemption Model" -@@ -33,9 +46,9 @@ - - Select this if you are building a kernel for a desktop system. - --config PREEMPT -+config PREEMPT__LL - bool "Preemptible Kernel (Low-Latency Desktop)" -- select PREEMPT_COUNT -+ select PREEMPT - select UNINLINE_SPIN_UNLOCK if !ARCH_INLINE_SPIN_UNLOCK - help - This option reduces the latency of the kernel by making -@@ -52,6 +65,22 @@ - embedded system with latency requirements in the milliseconds - range. - -+config PREEMPT_RTB -+ bool "Preemptible Kernel (Basic RT)" -+ select PREEMPT_RT_BASE -+ help -+ This option is basically the same as (Low-Latency Desktop) but -+ enables changes which are preliminary for the full preemptible -+ RT kernel. -+ -+config PREEMPT_RT_FULL -+ bool "Fully Preemptible Kernel (RT)" -+ depends on IRQ_FORCED_THREADING -+ select PREEMPT_RT_BASE -+ select PREEMPT_RCU -+ help -+ All and everything -+ - endchoice - - config PREEMPT_COUNT -diff -Nur linux-4.1.26.orig/kernel/ksysfs.c linux-4.1.26/kernel/ksysfs.c ---- linux-4.1.26.orig/kernel/ksysfs.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/ksysfs.c 2016-06-19 15:30:58.691297504 +0200 -@@ -136,6 +136,15 @@ - - #endif /* CONFIG_KEXEC */ - -+#if defined(CONFIG_PREEMPT_RT_FULL) -+static ssize_t realtime_show(struct kobject *kobj, -+ struct kobj_attribute *attr, char *buf) -+{ -+ return sprintf(buf, "%d\n", 1); -+} -+KERNEL_ATTR_RO(realtime); -+#endif -+ - /* whether file capabilities are enabled */ - static ssize_t fscaps_show(struct kobject *kobj, - struct kobj_attribute *attr, char *buf) -@@ -203,6 +212,9 @@ - &vmcoreinfo_attr.attr, - #endif - &rcu_expedited_attr.attr, -+#ifdef CONFIG_PREEMPT_RT_FULL -+ &realtime_attr.attr, -+#endif - NULL - }; - -diff -Nur linux-4.1.26.orig/kernel/locking/lglock.c linux-4.1.26/kernel/locking/lglock.c ---- linux-4.1.26.orig/kernel/locking/lglock.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/lglock.c 2016-06-19 15:30:58.691297504 +0200 -@@ -4,6 +4,15 @@ - #include - #include - -+#ifndef CONFIG_PREEMPT_RT_FULL -+# define lg_lock_ptr arch_spinlock_t -+# define lg_do_lock(l) arch_spin_lock(l) -+# define lg_do_unlock(l) arch_spin_unlock(l) -+#else -+# define lg_lock_ptr struct rt_mutex -+# define lg_do_lock(l) __rt_spin_lock(l) -+# define lg_do_unlock(l) __rt_spin_unlock(l) -+#endif - /* - * Note there is no uninit, so lglocks cannot be defined in - * modules (but it's fine to use them from there) -@@ -12,51 +21,60 @@ - - void lg_lock_init(struct lglock *lg, char *name) - { -+#ifdef CONFIG_PREEMPT_RT_FULL -+ int i; -+ -+ for_each_possible_cpu(i) { -+ struct rt_mutex *lock = per_cpu_ptr(lg->lock, i); -+ -+ rt_mutex_init(lock); -+ } -+#endif - LOCKDEP_INIT_MAP(&lg->lock_dep_map, name, &lg->lock_key, 0); - } - EXPORT_SYMBOL(lg_lock_init); - - void lg_local_lock(struct lglock *lg) - { -- arch_spinlock_t *lock; -+ lg_lock_ptr *lock; - -- preempt_disable(); -+ migrate_disable(); - lock_acquire_shared(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); - lock = this_cpu_ptr(lg->lock); -- arch_spin_lock(lock); -+ lg_do_lock(lock); - } - EXPORT_SYMBOL(lg_local_lock); - - void lg_local_unlock(struct lglock *lg) - { -- arch_spinlock_t *lock; -+ lg_lock_ptr *lock; - - lock_release(&lg->lock_dep_map, 1, _RET_IP_); - lock = this_cpu_ptr(lg->lock); -- arch_spin_unlock(lock); -- preempt_enable(); -+ lg_do_unlock(lock); -+ migrate_enable(); - } - EXPORT_SYMBOL(lg_local_unlock); - - void lg_local_lock_cpu(struct lglock *lg, int cpu) - { -- arch_spinlock_t *lock; -+ lg_lock_ptr *lock; - -- preempt_disable(); -+ preempt_disable_nort(); - lock_acquire_shared(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); - lock = per_cpu_ptr(lg->lock, cpu); -- arch_spin_lock(lock); -+ lg_do_lock(lock); - } - EXPORT_SYMBOL(lg_local_lock_cpu); - - void lg_local_unlock_cpu(struct lglock *lg, int cpu) - { -- arch_spinlock_t *lock; -+ lg_lock_ptr *lock; - - lock_release(&lg->lock_dep_map, 1, _RET_IP_); - lock = per_cpu_ptr(lg->lock, cpu); -- arch_spin_unlock(lock); -- preempt_enable(); -+ lg_do_unlock(lock); -+ preempt_enable_nort(); - } - EXPORT_SYMBOL(lg_local_unlock_cpu); - -@@ -64,12 +82,12 @@ - { - int i; - -- preempt_disable(); -+ preempt_disable_nort(); - lock_acquire_exclusive(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); - for_each_possible_cpu(i) { -- arch_spinlock_t *lock; -+ lg_lock_ptr *lock; - lock = per_cpu_ptr(lg->lock, i); -- arch_spin_lock(lock); -+ lg_do_lock(lock); - } - } - EXPORT_SYMBOL(lg_global_lock); -@@ -80,10 +98,35 @@ - - lock_release(&lg->lock_dep_map, 1, _RET_IP_); - for_each_possible_cpu(i) { -- arch_spinlock_t *lock; -+ lg_lock_ptr *lock; - lock = per_cpu_ptr(lg->lock, i); -- arch_spin_unlock(lock); -+ lg_do_unlock(lock); - } -- preempt_enable(); -+ preempt_enable_nort(); - } - EXPORT_SYMBOL(lg_global_unlock); -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * HACK: If you use this, you get to keep the pieces. -+ * Used in queue_stop_cpus_work() when stop machinery -+ * is called from inactive CPU, so we can't schedule. -+ */ -+# define lg_do_trylock_relax(l) \ -+ do { \ -+ while (!__rt_spin_trylock(l)) \ -+ cpu_relax(); \ -+ } while (0) -+ -+void lg_global_trylock_relax(struct lglock *lg) -+{ -+ int i; -+ -+ lock_acquire_exclusive(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); -+ for_each_possible_cpu(i) { -+ lg_lock_ptr *lock; -+ lock = per_cpu_ptr(lg->lock, i); -+ lg_do_trylock_relax(lock); -+ } -+} -+#endif -diff -Nur linux-4.1.26.orig/kernel/locking/lockdep.c linux-4.1.26/kernel/locking/lockdep.c ---- linux-4.1.26.orig/kernel/locking/lockdep.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/lockdep.c 2016-06-19 15:30:58.691297504 +0200 -@@ -3563,6 +3563,7 @@ - } - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * We dont accurately track softirq state in e.g. - * hardirq contexts (such as on 4KSTACKS), so only -@@ -3577,6 +3578,7 @@ - DEBUG_LOCKS_WARN_ON(!current->softirqs_enabled); - } - } -+#endif - - if (!debug_locks) - print_irqtrace_events(current); -diff -Nur linux-4.1.26.orig/kernel/locking/locktorture.c linux-4.1.26/kernel/locking/locktorture.c ---- linux-4.1.26.orig/kernel/locking/locktorture.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/locktorture.c 2016-06-19 15:30:58.695297658 +0200 -@@ -24,7 +24,6 @@ - #include - #include - #include --#include - #include - #include - #include -diff -Nur linux-4.1.26.orig/kernel/locking/Makefile linux-4.1.26/kernel/locking/Makefile ---- linux-4.1.26.orig/kernel/locking/Makefile 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/Makefile 2016-06-19 15:30:58.691297504 +0200 -@@ -1,5 +1,5 @@ - --obj-y += mutex.o semaphore.o rwsem.o -+obj-y += semaphore.o - - ifdef CONFIG_FUNCTION_TRACER - CFLAGS_REMOVE_lockdep.o = $(CC_FLAGS_FTRACE) -@@ -8,7 +8,11 @@ - CFLAGS_REMOVE_rtmutex-debug.o = $(CC_FLAGS_FTRACE) - endif - -+ifneq ($(CONFIG_PREEMPT_RT_FULL),y) -+obj-y += mutex.o - obj-$(CONFIG_DEBUG_MUTEXES) += mutex-debug.o -+obj-y += rwsem.o -+endif - obj-$(CONFIG_LOCKDEP) += lockdep.o - ifeq ($(CONFIG_PROC_FS),y) - obj-$(CONFIG_LOCKDEP) += lockdep_proc.o -@@ -22,8 +26,11 @@ - obj-$(CONFIG_RT_MUTEX_TESTER) += rtmutex-tester.o - obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o - obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock_debug.o -+ifneq ($(CONFIG_PREEMPT_RT_FULL),y) - obj-$(CONFIG_RWSEM_GENERIC_SPINLOCK) += rwsem-spinlock.o - obj-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem-xadd.o -+endif - obj-$(CONFIG_PERCPU_RWSEM) += percpu-rwsem.o -+obj-$(CONFIG_PREEMPT_RT_FULL) += rt.o - obj-$(CONFIG_QUEUE_RWLOCK) += qrwlock.o - obj-$(CONFIG_LOCK_TORTURE_TEST) += locktorture.o -diff -Nur linux-4.1.26.orig/kernel/locking/rt.c linux-4.1.26/kernel/locking/rt.c ---- linux-4.1.26.orig/kernel/locking/rt.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/kernel/locking/rt.c 2016-06-19 15:30:58.695297658 +0200 -@@ -0,0 +1,461 @@ -+/* -+ * kernel/rt.c -+ * -+ * Real-Time Preemption Support -+ * -+ * started by Ingo Molnar: -+ * -+ * Copyright (C) 2004-2006 Red Hat, Inc., Ingo Molnar -+ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner -+ * -+ * historic credit for proving that Linux spinlocks can be implemented via -+ * RT-aware mutexes goes to many people: The Pmutex project (Dirk Grambow -+ * and others) who prototyped it on 2.4 and did lots of comparative -+ * research and analysis; TimeSys, for proving that you can implement a -+ * fully preemptible kernel via the use of IRQ threading and mutexes; -+ * Bill Huey for persuasively arguing on lkml that the mutex model is the -+ * right one; and to MontaVista, who ported pmutexes to 2.6. -+ * -+ * This code is a from-scratch implementation and is not based on pmutexes, -+ * but the idea of converting spinlocks to mutexes is used here too. -+ * -+ * lock debugging, locking tree, deadlock detection: -+ * -+ * Copyright (C) 2004, LynuxWorks, Inc., Igor Manyilov, Bill Huey -+ * Released under the General Public License (GPL). -+ * -+ * Includes portions of the generic R/W semaphore implementation from: -+ * -+ * Copyright (c) 2001 David Howells (dhowells@redhat.com). -+ * - Derived partially from idea by Andrea Arcangeli -+ * - Derived also from comments by Linus -+ * -+ * Pending ownership of locks and ownership stealing: -+ * -+ * Copyright (C) 2005, Kihon Technologies Inc., Steven Rostedt -+ * -+ * (also by Steven Rostedt) -+ * - Converted single pi_lock to individual task locks. -+ * -+ * By Esben Nielsen: -+ * Doing priority inheritance with help of the scheduler. -+ * -+ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner -+ * - major rework based on Esben Nielsens initial patch -+ * - replaced thread_info references by task_struct refs -+ * - removed task->pending_owner dependency -+ * - BKL drop/reacquire for semaphore style locks to avoid deadlocks -+ * in the scheduler return path as discussed with Steven Rostedt -+ * -+ * Copyright (C) 2006, Kihon Technologies Inc. -+ * Steven Rostedt -+ * - debugged and patched Thomas Gleixner's rework. -+ * - added back the cmpxchg to the rework. -+ * - turned atomic require back on for SMP. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "rtmutex_common.h" -+ -+/* -+ * struct mutex functions -+ */ -+void __mutex_do_init(struct mutex *mutex, const char *name, -+ struct lock_class_key *key) -+{ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ /* -+ * Make sure we are not reinitializing a held lock: -+ */ -+ debug_check_no_locks_freed((void *)mutex, sizeof(*mutex)); -+ lockdep_init_map(&mutex->dep_map, name, key, 0); -+#endif -+ mutex->lock.save_state = 0; -+} -+EXPORT_SYMBOL(__mutex_do_init); -+ -+void __lockfunc _mutex_lock(struct mutex *lock) -+{ -+ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); -+ rt_mutex_lock(&lock->lock); -+} -+EXPORT_SYMBOL(_mutex_lock); -+ -+int __lockfunc _mutex_lock_interruptible(struct mutex *lock) -+{ -+ int ret; -+ -+ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); -+ ret = rt_mutex_lock_interruptible(&lock->lock); -+ if (ret) -+ mutex_release(&lock->dep_map, 1, _RET_IP_); -+ return ret; -+} -+EXPORT_SYMBOL(_mutex_lock_interruptible); -+ -+int __lockfunc _mutex_lock_killable(struct mutex *lock) -+{ -+ int ret; -+ -+ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); -+ ret = rt_mutex_lock_killable(&lock->lock); -+ if (ret) -+ mutex_release(&lock->dep_map, 1, _RET_IP_); -+ return ret; -+} -+EXPORT_SYMBOL(_mutex_lock_killable); -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass) -+{ -+ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); -+ rt_mutex_lock(&lock->lock); -+} -+EXPORT_SYMBOL(_mutex_lock_nested); -+ -+void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest) -+{ -+ mutex_acquire_nest(&lock->dep_map, 0, 0, nest, _RET_IP_); -+ rt_mutex_lock(&lock->lock); -+} -+EXPORT_SYMBOL(_mutex_lock_nest_lock); -+ -+int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass) -+{ -+ int ret; -+ -+ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); -+ ret = rt_mutex_lock_interruptible(&lock->lock); -+ if (ret) -+ mutex_release(&lock->dep_map, 1, _RET_IP_); -+ return ret; -+} -+EXPORT_SYMBOL(_mutex_lock_interruptible_nested); -+ -+int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass) -+{ -+ int ret; -+ -+ mutex_acquire(&lock->dep_map, subclass, 0, _RET_IP_); -+ ret = rt_mutex_lock_killable(&lock->lock); -+ if (ret) -+ mutex_release(&lock->dep_map, 1, _RET_IP_); -+ return ret; -+} -+EXPORT_SYMBOL(_mutex_lock_killable_nested); -+#endif -+ -+int __lockfunc _mutex_trylock(struct mutex *lock) -+{ -+ int ret = rt_mutex_trylock(&lock->lock); -+ -+ if (ret) -+ mutex_acquire(&lock->dep_map, 0, 1, _RET_IP_); -+ -+ return ret; -+} -+EXPORT_SYMBOL(_mutex_trylock); -+ -+void __lockfunc _mutex_unlock(struct mutex *lock) -+{ -+ mutex_release(&lock->dep_map, 1, _RET_IP_); -+ rt_mutex_unlock(&lock->lock); -+} -+EXPORT_SYMBOL(_mutex_unlock); -+ -+/* -+ * rwlock_t functions -+ */ -+int __lockfunc rt_write_trylock(rwlock_t *rwlock) -+{ -+ int ret; -+ -+ migrate_disable(); -+ ret = rt_mutex_trylock(&rwlock->lock); -+ if (ret) -+ rwlock_acquire(&rwlock->dep_map, 0, 1, _RET_IP_); -+ else -+ migrate_enable(); -+ -+ return ret; -+} -+EXPORT_SYMBOL(rt_write_trylock); -+ -+int __lockfunc rt_write_trylock_irqsave(rwlock_t *rwlock, unsigned long *flags) -+{ -+ int ret; -+ -+ *flags = 0; -+ ret = rt_write_trylock(rwlock); -+ return ret; -+} -+EXPORT_SYMBOL(rt_write_trylock_irqsave); -+ -+int __lockfunc rt_read_trylock(rwlock_t *rwlock) -+{ -+ struct rt_mutex *lock = &rwlock->lock; -+ int ret = 1; -+ -+ /* -+ * recursive read locks succeed when current owns the lock, -+ * but not when read_depth == 0 which means that the lock is -+ * write locked. -+ */ -+ if (rt_mutex_owner(lock) != current) { -+ migrate_disable(); -+ ret = rt_mutex_trylock(lock); -+ if (ret) -+ rwlock_acquire(&rwlock->dep_map, 0, 1, _RET_IP_); -+ else -+ migrate_enable(); -+ -+ } else if (!rwlock->read_depth) { -+ ret = 0; -+ } -+ -+ if (ret) -+ rwlock->read_depth++; -+ -+ return ret; -+} -+EXPORT_SYMBOL(rt_read_trylock); -+ -+void __lockfunc rt_write_lock(rwlock_t *rwlock) -+{ -+ rwlock_acquire(&rwlock->dep_map, 0, 0, _RET_IP_); -+ migrate_disable(); -+ __rt_spin_lock(&rwlock->lock); -+} -+EXPORT_SYMBOL(rt_write_lock); -+ -+void __lockfunc rt_read_lock(rwlock_t *rwlock) -+{ -+ struct rt_mutex *lock = &rwlock->lock; -+ -+ -+ /* -+ * recursive read locks succeed when current owns the lock -+ */ -+ if (rt_mutex_owner(lock) != current) { -+ migrate_disable(); -+ rwlock_acquire(&rwlock->dep_map, 0, 0, _RET_IP_); -+ __rt_spin_lock(lock); -+ } -+ rwlock->read_depth++; -+} -+ -+EXPORT_SYMBOL(rt_read_lock); -+ -+void __lockfunc rt_write_unlock(rwlock_t *rwlock) -+{ -+ /* NOTE: we always pass in '1' for nested, for simplicity */ -+ rwlock_release(&rwlock->dep_map, 1, _RET_IP_); -+ __rt_spin_unlock(&rwlock->lock); -+ migrate_enable(); -+} -+EXPORT_SYMBOL(rt_write_unlock); -+ -+void __lockfunc rt_read_unlock(rwlock_t *rwlock) -+{ -+ /* Release the lock only when read_depth is down to 0 */ -+ if (--rwlock->read_depth == 0) { -+ rwlock_release(&rwlock->dep_map, 1, _RET_IP_); -+ __rt_spin_unlock(&rwlock->lock); -+ migrate_enable(); -+ } -+} -+EXPORT_SYMBOL(rt_read_unlock); -+ -+unsigned long __lockfunc rt_write_lock_irqsave(rwlock_t *rwlock) -+{ -+ rt_write_lock(rwlock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rt_write_lock_irqsave); -+ -+unsigned long __lockfunc rt_read_lock_irqsave(rwlock_t *rwlock) -+{ -+ rt_read_lock(rwlock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(rt_read_lock_irqsave); -+ -+void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key) -+{ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ /* -+ * Make sure we are not reinitializing a held lock: -+ */ -+ debug_check_no_locks_freed((void *)rwlock, sizeof(*rwlock)); -+ lockdep_init_map(&rwlock->dep_map, name, key, 0); -+#endif -+ rwlock->lock.save_state = 1; -+ rwlock->read_depth = 0; -+} -+EXPORT_SYMBOL(__rt_rwlock_init); -+ -+/* -+ * rw_semaphores -+ */ -+ -+void rt_up_write(struct rw_semaphore *rwsem) -+{ -+ rwsem_release(&rwsem->dep_map, 1, _RET_IP_); -+ rt_mutex_unlock(&rwsem->lock); -+} -+EXPORT_SYMBOL(rt_up_write); -+ -+void __rt_up_read(struct rw_semaphore *rwsem) -+{ -+ if (--rwsem->read_depth == 0) -+ rt_mutex_unlock(&rwsem->lock); -+} -+ -+void rt_up_read(struct rw_semaphore *rwsem) -+{ -+ rwsem_release(&rwsem->dep_map, 1, _RET_IP_); -+ __rt_up_read(rwsem); -+} -+EXPORT_SYMBOL(rt_up_read); -+ -+/* -+ * downgrade a write lock into a read lock -+ * - just wake up any readers at the front of the queue -+ */ -+void rt_downgrade_write(struct rw_semaphore *rwsem) -+{ -+ BUG_ON(rt_mutex_owner(&rwsem->lock) != current); -+ rwsem->read_depth = 1; -+} -+EXPORT_SYMBOL(rt_downgrade_write); -+ -+int rt_down_write_trylock(struct rw_semaphore *rwsem) -+{ -+ int ret = rt_mutex_trylock(&rwsem->lock); -+ -+ if (ret) -+ rwsem_acquire(&rwsem->dep_map, 0, 1, _RET_IP_); -+ return ret; -+} -+EXPORT_SYMBOL(rt_down_write_trylock); -+ -+void rt_down_write(struct rw_semaphore *rwsem) -+{ -+ rwsem_acquire(&rwsem->dep_map, 0, 0, _RET_IP_); -+ rt_mutex_lock(&rwsem->lock); -+} -+EXPORT_SYMBOL(rt_down_write); -+ -+void rt_down_write_nested(struct rw_semaphore *rwsem, int subclass) -+{ -+ rwsem_acquire(&rwsem->dep_map, subclass, 0, _RET_IP_); -+ rt_mutex_lock(&rwsem->lock); -+} -+EXPORT_SYMBOL(rt_down_write_nested); -+ -+void rt_down_write_nested_lock(struct rw_semaphore *rwsem, -+ struct lockdep_map *nest) -+{ -+ rwsem_acquire_nest(&rwsem->dep_map, 0, 0, nest, _RET_IP_); -+ rt_mutex_lock(&rwsem->lock); -+} -+EXPORT_SYMBOL(rt_down_write_nested_lock); -+ -+int rt_down_read_trylock(struct rw_semaphore *rwsem) -+{ -+ struct rt_mutex *lock = &rwsem->lock; -+ int ret = 1; -+ -+ /* -+ * recursive read locks succeed when current owns the rwsem, -+ * but not when read_depth == 0 which means that the rwsem is -+ * write locked. -+ */ -+ if (rt_mutex_owner(lock) != current) -+ ret = rt_mutex_trylock(&rwsem->lock); -+ else if (!rwsem->read_depth) -+ ret = 0; -+ -+ if (ret) { -+ rwsem->read_depth++; -+ rwsem_acquire(&rwsem->dep_map, 0, 1, _RET_IP_); -+ } -+ return ret; -+} -+EXPORT_SYMBOL(rt_down_read_trylock); -+ -+static void __rt_down_read(struct rw_semaphore *rwsem, int subclass) -+{ -+ struct rt_mutex *lock = &rwsem->lock; -+ -+ rwsem_acquire_read(&rwsem->dep_map, subclass, 0, _RET_IP_); -+ -+ if (rt_mutex_owner(lock) != current) -+ rt_mutex_lock(&rwsem->lock); -+ rwsem->read_depth++; -+} -+ -+void rt_down_read(struct rw_semaphore *rwsem) -+{ -+ __rt_down_read(rwsem, 0); -+} -+EXPORT_SYMBOL(rt_down_read); -+ -+void rt_down_read_nested(struct rw_semaphore *rwsem, int subclass) -+{ -+ __rt_down_read(rwsem, subclass); -+} -+EXPORT_SYMBOL(rt_down_read_nested); -+ -+void __rt_rwsem_init(struct rw_semaphore *rwsem, const char *name, -+ struct lock_class_key *key) -+{ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ /* -+ * Make sure we are not reinitializing a held lock: -+ */ -+ debug_check_no_locks_freed((void *)rwsem, sizeof(*rwsem)); -+ lockdep_init_map(&rwsem->dep_map, name, key, 0); -+#endif -+ rwsem->read_depth = 0; -+ rwsem->lock.save_state = 0; -+} -+EXPORT_SYMBOL(__rt_rwsem_init); -+ -+/** -+ * atomic_dec_and_mutex_lock - return holding mutex if we dec to 0 -+ * @cnt: the atomic which we are to dec -+ * @lock: the mutex to return holding if we dec to 0 -+ * -+ * return true and hold lock if we dec to 0, return false otherwise -+ */ -+int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock) -+{ -+ /* dec if we can't possibly hit 0 */ -+ if (atomic_add_unless(cnt, -1, 1)) -+ return 0; -+ /* we might hit 0, so take the lock */ -+ mutex_lock(lock); -+ if (!atomic_dec_and_test(cnt)) { -+ /* when we actually did the dec, we didn't hit 0 */ -+ mutex_unlock(lock); -+ return 0; -+ } -+ /* we hit 0, and we hold the lock */ -+ return 1; -+} -+EXPORT_SYMBOL(atomic_dec_and_mutex_lock); -diff -Nur linux-4.1.26.orig/kernel/locking/rtmutex.c linux-4.1.26/kernel/locking/rtmutex.c ---- linux-4.1.26.orig/kernel/locking/rtmutex.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/rtmutex.c 2016-06-19 15:30:58.695297658 +0200 -@@ -7,6 +7,11 @@ - * Copyright (C) 2005-2006 Timesys Corp., Thomas Gleixner - * Copyright (C) 2005 Kihon Technologies Inc., Steven Rostedt - * Copyright (C) 2006 Esben Nielsen -+ * Adaptive Spinlocks: -+ * Copyright (C) 2008 Novell, Inc., Gregory Haskins, Sven Dietrich, -+ * and Peter Morreale, -+ * Adaptive Spinlocks simplification: -+ * Copyright (C) 2008 Red Hat, Inc., Steven Rostedt - * - * See Documentation/locking/rt-mutex-design.txt for details. - */ -@@ -16,6 +21,7 @@ - #include - #include - #include -+#include - - #include "rtmutex_common.h" - -@@ -69,6 +75,12 @@ - clear_rt_mutex_waiters(lock); - } - -+static int rt_mutex_real_waiter(struct rt_mutex_waiter *waiter) -+{ -+ return waiter && waiter != PI_WAKEUP_INPROGRESS && -+ waiter != PI_REQUEUE_INPROGRESS; -+} -+ - /* - * We can speed up the acquire/release, if the architecture - * supports cmpxchg and if there's no debugging state to be set up -@@ -300,7 +312,7 @@ - * of task. We do not use the spin_xx_mutex() variants here as we are - * outside of the debug path.) - */ --static void rt_mutex_adjust_prio(struct task_struct *task) -+void rt_mutex_adjust_prio(struct task_struct *task) - { - unsigned long flags; - -@@ -335,6 +347,14 @@ - return debug_rt_mutex_detect_deadlock(waiter, chwalk); - } - -+static void rt_mutex_wake_waiter(struct rt_mutex_waiter *waiter) -+{ -+ if (waiter->savestate) -+ wake_up_lock_sleeper(waiter->task); -+ else -+ wake_up_process(waiter->task); -+} -+ - /* - * Max number of times we'll walk the boosting chain: - */ -@@ -342,7 +362,8 @@ - - static inline struct rt_mutex *task_blocked_on_lock(struct task_struct *p) - { -- return p->pi_blocked_on ? p->pi_blocked_on->lock : NULL; -+ return rt_mutex_real_waiter(p->pi_blocked_on) ? -+ p->pi_blocked_on->lock : NULL; - } - - /* -@@ -479,7 +500,7 @@ - * reached or the state of the chain has changed while we - * dropped the locks. - */ -- if (!waiter) -+ if (!rt_mutex_real_waiter(waiter)) - goto out_unlock_pi; - - /* -@@ -641,13 +662,16 @@ - * follow here. This is the end of the chain we are walking. - */ - if (!rt_mutex_owner(lock)) { -+ struct rt_mutex_waiter *lock_top_waiter; -+ - /* - * If the requeue [7] above changed the top waiter, - * then we need to wake the new top waiter up to try - * to get the lock. - */ -- if (prerequeue_top_waiter != rt_mutex_top_waiter(lock)) -- wake_up_process(rt_mutex_top_waiter(lock)->task); -+ lock_top_waiter = rt_mutex_top_waiter(lock); -+ if (prerequeue_top_waiter != lock_top_waiter) -+ rt_mutex_wake_waiter(lock_top_waiter); - raw_spin_unlock(&lock->wait_lock); - return 0; - } -@@ -740,6 +764,25 @@ - return ret; - } - -+ -+#define STEAL_NORMAL 0 -+#define STEAL_LATERAL 1 -+ -+/* -+ * Note that RT tasks are excluded from lateral-steals to prevent the -+ * introduction of an unbounded latency -+ */ -+static inline int lock_is_stealable(struct task_struct *task, -+ struct task_struct *pendowner, int mode) -+{ -+ if (mode == STEAL_NORMAL || rt_task(task)) { -+ if (task->prio >= pendowner->prio) -+ return 0; -+ } else if (task->prio > pendowner->prio) -+ return 0; -+ return 1; -+} -+ - /* - * Try to take an rt-mutex - * -@@ -750,8 +793,9 @@ - * @waiter: The waiter that is queued to the lock's wait list if the - * callsite called task_blocked_on_lock(), otherwise NULL - */ --static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, -- struct rt_mutex_waiter *waiter) -+static int __try_to_take_rt_mutex(struct rt_mutex *lock, -+ struct task_struct *task, -+ struct rt_mutex_waiter *waiter, int mode) - { - unsigned long flags; - -@@ -790,8 +834,10 @@ - * If waiter is not the highest priority waiter of - * @lock, give up. - */ -- if (waiter != rt_mutex_top_waiter(lock)) -+ if (waiter != rt_mutex_top_waiter(lock)) { -+ /* XXX lock_is_stealable() ? */ - return 0; -+ } - - /* - * We can acquire the lock. Remove the waiter from the -@@ -809,14 +855,10 @@ - * not need to be dequeued. - */ - if (rt_mutex_has_waiters(lock)) { -- /* -- * If @task->prio is greater than or equal to -- * the top waiter priority (kernel view), -- * @task lost. -- */ -- if (task->prio >= rt_mutex_top_waiter(lock)->prio) -- return 0; -+ struct task_struct *pown = rt_mutex_top_waiter(lock)->task; - -+ if (task != pown && !lock_is_stealable(task, pown, mode)) -+ return 0; - /* - * The current top waiter stays enqueued. We - * don't have to change anything in the lock -@@ -865,6 +907,347 @@ - return 1; - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * preemptible spin_lock functions: -+ */ -+static inline void rt_spin_lock_fastlock(struct rt_mutex *lock, -+ void (*slowfn)(struct rt_mutex *lock)) -+{ -+ might_sleep_no_state_check(); -+ -+ if (likely(rt_mutex_cmpxchg(lock, NULL, current))) -+ rt_mutex_deadlock_account_lock(lock, current); -+ else -+ slowfn(lock); -+} -+ -+static inline void rt_spin_lock_fastunlock(struct rt_mutex *lock, -+ void (*slowfn)(struct rt_mutex *lock)) -+{ -+ if (likely(rt_mutex_cmpxchg(lock, current, NULL))) -+ rt_mutex_deadlock_account_unlock(current); -+ else -+ slowfn(lock); -+} -+#ifdef CONFIG_SMP -+/* -+ * Note that owner is a speculative pointer and dereferencing relies -+ * on rcu_read_lock() and the check against the lock owner. -+ */ -+static int adaptive_wait(struct rt_mutex *lock, -+ struct task_struct *owner) -+{ -+ int res = 0; -+ -+ rcu_read_lock(); -+ for (;;) { -+ if (owner != rt_mutex_owner(lock)) -+ break; -+ /* -+ * Ensure that owner->on_cpu is dereferenced _after_ -+ * checking the above to be valid. -+ */ -+ barrier(); -+ if (!owner->on_cpu) { -+ res = 1; -+ break; -+ } -+ cpu_relax(); -+ } -+ rcu_read_unlock(); -+ return res; -+} -+#else -+static int adaptive_wait(struct rt_mutex *lock, -+ struct task_struct *orig_owner) -+{ -+ return 1; -+} -+#endif -+ -+# define pi_lock(lock) raw_spin_lock_irq(lock) -+# define pi_unlock(lock) raw_spin_unlock_irq(lock) -+ -+static int task_blocks_on_rt_mutex(struct rt_mutex *lock, -+ struct rt_mutex_waiter *waiter, -+ struct task_struct *task, -+ enum rtmutex_chainwalk chwalk); -+/* -+ * Slow path lock function spin_lock style: this variant is very -+ * careful not to miss any non-lock wakeups. -+ * -+ * We store the current state under p->pi_lock in p->saved_state and -+ * the try_to_wake_up() code handles this accordingly. -+ */ -+static void noinline __sched rt_spin_lock_slowlock(struct rt_mutex *lock) -+{ -+ struct task_struct *lock_owner, *self = current; -+ struct rt_mutex_waiter waiter, *top_waiter; -+ int ret; -+ -+ rt_mutex_init_waiter(&waiter, true); -+ -+ raw_spin_lock(&lock->wait_lock); -+ -+ if (__try_to_take_rt_mutex(lock, self, NULL, STEAL_LATERAL)) { -+ raw_spin_unlock(&lock->wait_lock); -+ return; -+ } -+ -+ BUG_ON(rt_mutex_owner(lock) == self); -+ -+ /* -+ * We save whatever state the task is in and we'll restore it -+ * after acquiring the lock taking real wakeups into account -+ * as well. We are serialized via pi_lock against wakeups. See -+ * try_to_wake_up(). -+ */ -+ pi_lock(&self->pi_lock); -+ self->saved_state = self->state; -+ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); -+ pi_unlock(&self->pi_lock); -+ -+ ret = task_blocks_on_rt_mutex(lock, &waiter, self, RT_MUTEX_MIN_CHAINWALK); -+ BUG_ON(ret); -+ -+ for (;;) { -+ /* Try to acquire the lock again. */ -+ if (__try_to_take_rt_mutex(lock, self, &waiter, STEAL_LATERAL)) -+ break; -+ -+ top_waiter = rt_mutex_top_waiter(lock); -+ lock_owner = rt_mutex_owner(lock); -+ -+ raw_spin_unlock(&lock->wait_lock); -+ -+ debug_rt_mutex_print_deadlock(&waiter); -+ -+ if (top_waiter != &waiter || adaptive_wait(lock, lock_owner)) -+ schedule_rt_mutex(lock); -+ -+ raw_spin_lock(&lock->wait_lock); -+ -+ pi_lock(&self->pi_lock); -+ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); -+ pi_unlock(&self->pi_lock); -+ } -+ -+ /* -+ * Restore the task state to current->saved_state. We set it -+ * to the original state above and the try_to_wake_up() code -+ * has possibly updated it when a real (non-rtmutex) wakeup -+ * happened while we were blocked. Clear saved_state so -+ * try_to_wakeup() does not get confused. -+ */ -+ pi_lock(&self->pi_lock); -+ __set_current_state_no_track(self->saved_state); -+ self->saved_state = TASK_RUNNING; -+ pi_unlock(&self->pi_lock); -+ -+ /* -+ * try_to_take_rt_mutex() sets the waiter bit -+ * unconditionally. We might have to fix that up: -+ */ -+ fixup_rt_mutex_waiters(lock); -+ -+ BUG_ON(rt_mutex_has_waiters(lock) && &waiter == rt_mutex_top_waiter(lock)); -+ BUG_ON(!RB_EMPTY_NODE(&waiter.tree_entry)); -+ -+ raw_spin_unlock(&lock->wait_lock); -+ -+ debug_rt_mutex_free_waiter(&waiter); -+} -+ -+static void wakeup_next_waiter(struct rt_mutex *lock); -+/* -+ * Slow path to release a rt_mutex spin_lock style -+ */ -+static void noinline __sched rt_spin_lock_slowunlock(struct rt_mutex *lock) -+{ -+ raw_spin_lock(&lock->wait_lock); -+ -+ debug_rt_mutex_unlock(lock); -+ -+ rt_mutex_deadlock_account_unlock(current); -+ -+ if (!rt_mutex_has_waiters(lock)) { -+ lock->owner = NULL; -+ raw_spin_unlock(&lock->wait_lock); -+ return; -+ } -+ -+ wakeup_next_waiter(lock); -+ -+ raw_spin_unlock(&lock->wait_lock); -+ -+ /* Undo pi boosting.when necessary */ -+ rt_mutex_adjust_prio(current); -+} -+ -+void __lockfunc rt_spin_lock(spinlock_t *lock) -+{ -+ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); -+ spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); -+} -+EXPORT_SYMBOL(rt_spin_lock); -+ -+void __lockfunc __rt_spin_lock(struct rt_mutex *lock) -+{ -+ rt_spin_lock_fastlock(lock, rt_spin_lock_slowlock); -+} -+EXPORT_SYMBOL(__rt_spin_lock); -+ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass) -+{ -+ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); -+ spin_acquire(&lock->dep_map, subclass, 0, _RET_IP_); -+} -+EXPORT_SYMBOL(rt_spin_lock_nested); -+#endif -+ -+void __lockfunc rt_spin_unlock(spinlock_t *lock) -+{ -+ /* NOTE: we always pass in '1' for nested, for simplicity */ -+ spin_release(&lock->dep_map, 1, _RET_IP_); -+ rt_spin_lock_fastunlock(&lock->lock, rt_spin_lock_slowunlock); -+} -+EXPORT_SYMBOL(rt_spin_unlock); -+ -+void __lockfunc __rt_spin_unlock(struct rt_mutex *lock) -+{ -+ rt_spin_lock_fastunlock(lock, rt_spin_lock_slowunlock); -+} -+EXPORT_SYMBOL(__rt_spin_unlock); -+ -+/* -+ * Wait for the lock to get unlocked: instead of polling for an unlock -+ * (like raw spinlocks do), we lock and unlock, to force the kernel to -+ * schedule if there's contention: -+ */ -+void __lockfunc rt_spin_unlock_wait(spinlock_t *lock) -+{ -+ spin_lock(lock); -+ spin_unlock(lock); -+} -+EXPORT_SYMBOL(rt_spin_unlock_wait); -+ -+int __lockfunc __rt_spin_trylock(struct rt_mutex *lock) -+{ -+ return rt_mutex_trylock(lock); -+} -+ -+int __lockfunc rt_spin_trylock(spinlock_t *lock) -+{ -+ int ret = rt_mutex_trylock(&lock->lock); -+ -+ if (ret) -+ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); -+ return ret; -+} -+EXPORT_SYMBOL(rt_spin_trylock); -+ -+int __lockfunc rt_spin_trylock_bh(spinlock_t *lock) -+{ -+ int ret; -+ -+ local_bh_disable(); -+ ret = rt_mutex_trylock(&lock->lock); -+ if (ret) { -+ migrate_disable(); -+ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); -+ } else -+ local_bh_enable(); -+ return ret; -+} -+EXPORT_SYMBOL(rt_spin_trylock_bh); -+ -+int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags) -+{ -+ int ret; -+ -+ *flags = 0; -+ ret = rt_mutex_trylock(&lock->lock); -+ if (ret) { -+ migrate_disable(); -+ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); -+ } -+ return ret; -+} -+EXPORT_SYMBOL(rt_spin_trylock_irqsave); -+ -+int atomic_dec_and_spin_lock(atomic_t *atomic, spinlock_t *lock) -+{ -+ /* Subtract 1 from counter unless that drops it to 0 (ie. it was 1) */ -+ if (atomic_add_unless(atomic, -1, 1)) -+ return 0; -+ migrate_disable(); -+ rt_spin_lock(lock); -+ if (atomic_dec_and_test(atomic)) -+ return 1; -+ rt_spin_unlock(lock); -+ migrate_enable(); -+ return 0; -+} -+EXPORT_SYMBOL(atomic_dec_and_spin_lock); -+ -+ void -+__rt_spin_lock_init(spinlock_t *lock, char *name, struct lock_class_key *key) -+{ -+#ifdef CONFIG_DEBUG_LOCK_ALLOC -+ /* -+ * Make sure we are not reinitializing a held lock: -+ */ -+ debug_check_no_locks_freed((void *)lock, sizeof(*lock)); -+ lockdep_init_map(&lock->dep_map, name, key, 0); -+#endif -+} -+EXPORT_SYMBOL(__rt_spin_lock_init); -+ -+#endif /* PREEMPT_RT_FULL */ -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ static inline int __sched -+__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) -+{ -+ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); -+ struct ww_acquire_ctx *hold_ctx = ACCESS_ONCE(ww->ctx); -+ -+ if (!hold_ctx) -+ return 0; -+ -+ if (unlikely(ctx == hold_ctx)) -+ return -EALREADY; -+ -+ if (ctx->stamp - hold_ctx->stamp <= LONG_MAX && -+ (ctx->stamp != hold_ctx->stamp || ctx > hold_ctx)) { -+#ifdef CONFIG_DEBUG_MUTEXES -+ DEBUG_LOCKS_WARN_ON(ctx->contending_lock); -+ ctx->contending_lock = ww; -+#endif -+ return -EDEADLK; -+ } -+ -+ return 0; -+} -+#else -+ static inline int __sched -+__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) -+{ -+ BUG(); -+ return 0; -+} -+ -+#endif -+ -+static inline int -+try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, -+ struct rt_mutex_waiter *waiter) -+{ -+ return __try_to_take_rt_mutex(lock, task, waiter, STEAL_NORMAL); -+} -+ - /* - * Task blocks on lock. - * -@@ -896,6 +1279,23 @@ - return -EDEADLK; - - raw_spin_lock_irqsave(&task->pi_lock, flags); -+ -+ /* -+ * In the case of futex requeue PI, this will be a proxy -+ * lock. The task will wake unaware that it is enqueueed on -+ * this lock. Avoid blocking on two locks and corrupting -+ * pi_blocked_on via the PI_WAKEUP_INPROGRESS -+ * flag. futex_wait_requeue_pi() sets this when it wakes up -+ * before requeue (due to a signal or timeout). Do not enqueue -+ * the task if PI_WAKEUP_INPROGRESS is set. -+ */ -+ if (task != current && task->pi_blocked_on == PI_WAKEUP_INPROGRESS) { -+ raw_spin_unlock_irqrestore(&task->pi_lock, flags); -+ return -EAGAIN; -+ } -+ -+ BUG_ON(rt_mutex_real_waiter(task->pi_blocked_on)); -+ - __rt_mutex_adjust_prio(task); - waiter->task = task; - waiter->lock = lock; -@@ -919,7 +1319,7 @@ - rt_mutex_enqueue_pi(owner, waiter); - - __rt_mutex_adjust_prio(owner); -- if (owner->pi_blocked_on) -+ if (rt_mutex_real_waiter(owner->pi_blocked_on)) - chain_walk = 1; - } else if (rt_mutex_cond_detect_deadlock(waiter, chwalk)) { - chain_walk = 1; -@@ -957,8 +1357,9 @@ - /* - * Wake up the next waiter on the lock. - * -- * Remove the top waiter from the current tasks pi waiter list and -- * wake it up. -+ * Remove the top waiter from the current tasks pi waiter list, -+ * wake it up and return whether the current task needs to undo -+ * a potential priority boosting. - * - * Called with lock->wait_lock held. - */ -@@ -996,7 +1397,7 @@ - * long as we hold lock->wait_lock. The waiter task needs to - * acquire it in order to dequeue the waiter. - */ -- wake_up_process(waiter->task); -+ rt_mutex_wake_waiter(waiter); - } - - /* -@@ -1010,7 +1411,7 @@ - { - bool is_top_waiter = (waiter == rt_mutex_top_waiter(lock)); - struct task_struct *owner = rt_mutex_owner(lock); -- struct rt_mutex *next_lock; -+ struct rt_mutex *next_lock = NULL; - unsigned long flags; - - raw_spin_lock_irqsave(¤t->pi_lock, flags); -@@ -1035,7 +1436,8 @@ - __rt_mutex_adjust_prio(owner); - - /* Store the lock on which owner is blocked or NULL */ -- next_lock = task_blocked_on_lock(owner); -+ if (rt_mutex_real_waiter(owner->pi_blocked_on)) -+ next_lock = task_blocked_on_lock(owner); - - raw_spin_unlock_irqrestore(&owner->pi_lock, flags); - -@@ -1071,17 +1473,17 @@ - raw_spin_lock_irqsave(&task->pi_lock, flags); - - waiter = task->pi_blocked_on; -- if (!waiter || (waiter->prio == task->prio && -+ if (!rt_mutex_real_waiter(waiter) || (waiter->prio == task->prio && - !dl_prio(task->prio))) { - raw_spin_unlock_irqrestore(&task->pi_lock, flags); - return; - } - next_lock = waiter->lock; -- raw_spin_unlock_irqrestore(&task->pi_lock, flags); - - /* gets dropped in rt_mutex_adjust_prio_chain()! */ - get_task_struct(task); - -+ raw_spin_unlock_irqrestore(&task->pi_lock, flags); - rt_mutex_adjust_prio_chain(task, RT_MUTEX_MIN_CHAINWALK, NULL, - next_lock, NULL, task); - } -@@ -1099,7 +1501,8 @@ - static int __sched - __rt_mutex_slowlock(struct rt_mutex *lock, int state, - struct hrtimer_sleeper *timeout, -- struct rt_mutex_waiter *waiter) -+ struct rt_mutex_waiter *waiter, -+ struct ww_acquire_ctx *ww_ctx) - { - int ret = 0; - -@@ -1122,6 +1525,12 @@ - break; - } - -+ if (ww_ctx && ww_ctx->acquired > 0) { -+ ret = __mutex_lock_check_stamp(lock, ww_ctx); -+ if (ret) -+ break; -+ } -+ - raw_spin_unlock(&lock->wait_lock); - - debug_rt_mutex_print_deadlock(waiter); -@@ -1156,25 +1565,102 @@ - } - } - -+static __always_inline void ww_mutex_lock_acquired(struct ww_mutex *ww, -+ struct ww_acquire_ctx *ww_ctx) -+{ -+#ifdef CONFIG_DEBUG_MUTEXES -+ /* -+ * If this WARN_ON triggers, you used ww_mutex_lock to acquire, -+ * but released with a normal mutex_unlock in this call. -+ * -+ * This should never happen, always use ww_mutex_unlock. -+ */ -+ DEBUG_LOCKS_WARN_ON(ww->ctx); -+ -+ /* -+ * Not quite done after calling ww_acquire_done() ? -+ */ -+ DEBUG_LOCKS_WARN_ON(ww_ctx->done_acquire); -+ -+ if (ww_ctx->contending_lock) { -+ /* -+ * After -EDEADLK you tried to -+ * acquire a different ww_mutex? Bad! -+ */ -+ DEBUG_LOCKS_WARN_ON(ww_ctx->contending_lock != ww); -+ -+ /* -+ * You called ww_mutex_lock after receiving -EDEADLK, -+ * but 'forgot' to unlock everything else first? -+ */ -+ DEBUG_LOCKS_WARN_ON(ww_ctx->acquired > 0); -+ ww_ctx->contending_lock = NULL; -+ } -+ -+ /* -+ * Naughty, using a different class will lead to undefined behavior! -+ */ -+ DEBUG_LOCKS_WARN_ON(ww_ctx->ww_class != ww->ww_class); -+#endif -+ ww_ctx->acquired++; -+} -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+static void ww_mutex_account_lock(struct rt_mutex *lock, -+ struct ww_acquire_ctx *ww_ctx) -+{ -+ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); -+ struct rt_mutex_waiter *waiter, *n; -+ -+ /* -+ * This branch gets optimized out for the common case, -+ * and is only important for ww_mutex_lock. -+ */ -+ ww_mutex_lock_acquired(ww, ww_ctx); -+ ww->ctx = ww_ctx; -+ -+ /* -+ * Give any possible sleeping processes the chance to wake up, -+ * so they can recheck if they have to back off. -+ */ -+ rbtree_postorder_for_each_entry_safe(waiter, n, &lock->waiters, -+ tree_entry) { -+ /* XXX debug rt mutex waiter wakeup */ -+ -+ BUG_ON(waiter->lock != lock); -+ rt_mutex_wake_waiter(waiter); -+ } -+} -+ -+#else -+ -+static void ww_mutex_account_lock(struct rt_mutex *lock, -+ struct ww_acquire_ctx *ww_ctx) -+{ -+ BUG(); -+} -+#endif -+ - /* - * Slow path lock function: - */ - static int __sched - rt_mutex_slowlock(struct rt_mutex *lock, int state, - struct hrtimer_sleeper *timeout, -- enum rtmutex_chainwalk chwalk) -+ enum rtmutex_chainwalk chwalk, -+ struct ww_acquire_ctx *ww_ctx) - { - struct rt_mutex_waiter waiter; - int ret = 0; - -- debug_rt_mutex_init_waiter(&waiter); -- RB_CLEAR_NODE(&waiter.pi_tree_entry); -- RB_CLEAR_NODE(&waiter.tree_entry); -+ rt_mutex_init_waiter(&waiter, false); - - raw_spin_lock(&lock->wait_lock); - - /* Try to acquire the lock again: */ - if (try_to_take_rt_mutex(lock, current, NULL)) { -+ if (ww_ctx) -+ ww_mutex_account_lock(lock, ww_ctx); - raw_spin_unlock(&lock->wait_lock); - return 0; - } -@@ -1192,13 +1678,23 @@ - - if (likely(!ret)) - /* sleep on the mutex */ -- ret = __rt_mutex_slowlock(lock, state, timeout, &waiter); -+ ret = __rt_mutex_slowlock(lock, state, timeout, &waiter, -+ ww_ctx); -+ else if (ww_ctx) { -+ /* ww_mutex received EDEADLK, let it become EALREADY */ -+ ret = __mutex_lock_check_stamp(lock, ww_ctx); -+ BUG_ON(!ret); -+ } - - if (unlikely(ret)) { - __set_current_state(TASK_RUNNING); - if (rt_mutex_has_waiters(lock)) - remove_waiter(lock, &waiter); -- rt_mutex_handle_deadlock(ret, chwalk, &waiter); -+ /* ww_mutex want to report EDEADLK/EALREADY, let them */ -+ if (!ww_ctx) -+ rt_mutex_handle_deadlock(ret, chwalk, &waiter); -+ } else if (ww_ctx) { -+ ww_mutex_account_lock(lock, ww_ctx); - } - - /* -@@ -1255,7 +1751,7 @@ - /* - * Slow path to release a rt-mutex: - */ --static void __sched -+static bool __sched - rt_mutex_slowunlock(struct rt_mutex *lock) - { - raw_spin_lock(&lock->wait_lock); -@@ -1298,7 +1794,7 @@ - while (!rt_mutex_has_waiters(lock)) { - /* Drops lock->wait_lock ! */ - if (unlock_rt_mutex_safe(lock) == true) -- return; -+ return false; - /* Relock the rtmutex and try again */ - raw_spin_lock(&lock->wait_lock); - } -@@ -1311,8 +1807,7 @@ - - raw_spin_unlock(&lock->wait_lock); - -- /* Undo pi boosting if necessary: */ -- rt_mutex_adjust_prio(current); -+ return true; - } - - /* -@@ -1323,31 +1818,36 @@ - */ - static inline int - rt_mutex_fastlock(struct rt_mutex *lock, int state, -+ struct ww_acquire_ctx *ww_ctx, - int (*slowfn)(struct rt_mutex *lock, int state, - struct hrtimer_sleeper *timeout, -- enum rtmutex_chainwalk chwalk)) -+ enum rtmutex_chainwalk chwalk, -+ struct ww_acquire_ctx *ww_ctx)) - { - if (likely(rt_mutex_cmpxchg(lock, NULL, current))) { - rt_mutex_deadlock_account_lock(lock, current); - return 0; - } else -- return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK); -+ return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK, -+ ww_ctx); - } - - static inline int - rt_mutex_timed_fastlock(struct rt_mutex *lock, int state, - struct hrtimer_sleeper *timeout, - enum rtmutex_chainwalk chwalk, -+ struct ww_acquire_ctx *ww_ctx, - int (*slowfn)(struct rt_mutex *lock, int state, - struct hrtimer_sleeper *timeout, -- enum rtmutex_chainwalk chwalk)) -+ enum rtmutex_chainwalk chwalk, -+ struct ww_acquire_ctx *ww_ctx)) - { - if (chwalk == RT_MUTEX_MIN_CHAINWALK && - likely(rt_mutex_cmpxchg(lock, NULL, current))) { - rt_mutex_deadlock_account_lock(lock, current); - return 0; - } else -- return slowfn(lock, state, timeout, chwalk); -+ return slowfn(lock, state, timeout, chwalk, ww_ctx); - } - - static inline int -@@ -1363,12 +1863,14 @@ - - static inline void - rt_mutex_fastunlock(struct rt_mutex *lock, -- void (*slowfn)(struct rt_mutex *lock)) -+ bool (*slowfn)(struct rt_mutex *lock)) - { -- if (likely(rt_mutex_cmpxchg(lock, current, NULL))) -+ if (likely(rt_mutex_cmpxchg(lock, current, NULL))) { - rt_mutex_deadlock_account_unlock(current); -- else -- slowfn(lock); -+ } else if (slowfn(lock)) { -+ /* Undo pi boosting if necessary: */ -+ rt_mutex_adjust_prio(current); -+ } - } - - /** -@@ -1380,7 +1882,7 @@ - { - might_sleep(); - -- rt_mutex_fastlock(lock, TASK_UNINTERRUPTIBLE, rt_mutex_slowlock); -+ rt_mutex_fastlock(lock, TASK_UNINTERRUPTIBLE, NULL, rt_mutex_slowlock); - } - EXPORT_SYMBOL_GPL(rt_mutex_lock); - -@@ -1397,7 +1899,7 @@ - { - might_sleep(); - -- return rt_mutex_fastlock(lock, TASK_INTERRUPTIBLE, rt_mutex_slowlock); -+ return rt_mutex_fastlock(lock, TASK_INTERRUPTIBLE, NULL, rt_mutex_slowlock); - } - EXPORT_SYMBOL_GPL(rt_mutex_lock_interruptible); - -@@ -1410,11 +1912,30 @@ - might_sleep(); - - return rt_mutex_timed_fastlock(lock, TASK_INTERRUPTIBLE, timeout, -- RT_MUTEX_FULL_CHAINWALK, -+ RT_MUTEX_FULL_CHAINWALK, NULL, - rt_mutex_slowlock); - } - - /** -+ * rt_mutex_lock_killable - lock a rt_mutex killable -+ * -+ * @lock: the rt_mutex to be locked -+ * @detect_deadlock: deadlock detection on/off -+ * -+ * Returns: -+ * 0 on success -+ * -EINTR when interrupted by a signal -+ * -EDEADLK when the lock would deadlock (when deadlock detection is on) -+ */ -+int __sched rt_mutex_lock_killable(struct rt_mutex *lock) -+{ -+ might_sleep(); -+ -+ return rt_mutex_fastlock(lock, TASK_KILLABLE, NULL, rt_mutex_slowlock); -+} -+EXPORT_SYMBOL_GPL(rt_mutex_lock_killable); -+ -+/** - * rt_mutex_timed_lock - lock a rt_mutex interruptible - * the timeout structure is provided - * by the caller -@@ -1434,6 +1955,7 @@ - - return rt_mutex_timed_fastlock(lock, TASK_INTERRUPTIBLE, timeout, - RT_MUTEX_MIN_CHAINWALK, -+ NULL, - rt_mutex_slowlock); - } - EXPORT_SYMBOL_GPL(rt_mutex_timed_lock); -@@ -1463,6 +1985,22 @@ - EXPORT_SYMBOL_GPL(rt_mutex_unlock); - - /** -+ * rt_mutex_futex_unlock - Futex variant of rt_mutex_unlock -+ * @lock: the rt_mutex to be unlocked -+ * -+ * Returns: true/false indicating whether priority adjustment is -+ * required or not. -+ */ -+bool __sched rt_mutex_futex_unlock(struct rt_mutex *lock) -+{ -+ if (likely(rt_mutex_cmpxchg(lock, current, NULL))) { -+ rt_mutex_deadlock_account_unlock(current); -+ return false; -+ } -+ return rt_mutex_slowunlock(lock); -+} -+ -+/** - * rt_mutex_destroy - mark a mutex unusable - * @lock: the mutex to be destroyed - * -@@ -1492,13 +2030,12 @@ - void __rt_mutex_init(struct rt_mutex *lock, const char *name) - { - lock->owner = NULL; -- raw_spin_lock_init(&lock->wait_lock); - lock->waiters = RB_ROOT; - lock->waiters_leftmost = NULL; - - debug_rt_mutex_init(lock, name); - } --EXPORT_SYMBOL_GPL(__rt_mutex_init); -+EXPORT_SYMBOL(__rt_mutex_init); - - /** - * rt_mutex_init_proxy_locked - initialize and lock a rt_mutex on behalf of a -@@ -1513,7 +2050,7 @@ - void rt_mutex_init_proxy_locked(struct rt_mutex *lock, - struct task_struct *proxy_owner) - { -- __rt_mutex_init(lock, NULL); -+ rt_mutex_init(lock); - debug_rt_mutex_proxy_lock(lock, proxy_owner); - rt_mutex_set_owner(lock, proxy_owner); - rt_mutex_deadlock_account_lock(lock, proxy_owner); -@@ -1561,6 +2098,35 @@ - return 1; - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ /* -+ * In PREEMPT_RT there's an added race. -+ * If the task, that we are about to requeue, times out, -+ * it can set the PI_WAKEUP_INPROGRESS. This tells the requeue -+ * to skip this task. But right after the task sets -+ * its pi_blocked_on to PI_WAKEUP_INPROGRESS it can then -+ * block on the spin_lock(&hb->lock), which in RT is an rtmutex. -+ * This will replace the PI_WAKEUP_INPROGRESS with the actual -+ * lock that it blocks on. We *must not* place this task -+ * on this proxy lock in that case. -+ * -+ * To prevent this race, we first take the task's pi_lock -+ * and check if it has updated its pi_blocked_on. If it has, -+ * we assume that it woke up and we return -EAGAIN. -+ * Otherwise, we set the task's pi_blocked_on to -+ * PI_REQUEUE_INPROGRESS, so that if the task is waking up -+ * it will know that we are in the process of requeuing it. -+ */ -+ raw_spin_lock_irq(&task->pi_lock); -+ if (task->pi_blocked_on) { -+ raw_spin_unlock_irq(&task->pi_lock); -+ raw_spin_unlock(&lock->wait_lock); -+ return -EAGAIN; -+ } -+ task->pi_blocked_on = PI_REQUEUE_INPROGRESS; -+ raw_spin_unlock_irq(&task->pi_lock); -+#endif -+ - /* We enforce deadlock detection for futexes */ - ret = task_blocks_on_rt_mutex(lock, waiter, task, - RT_MUTEX_FULL_CHAINWALK); -@@ -1575,7 +2141,7 @@ - ret = 0; - } - -- if (unlikely(ret)) -+ if (ret && rt_mutex_has_waiters(lock)) - remove_waiter(lock, waiter); - - raw_spin_unlock(&lock->wait_lock); -@@ -1631,7 +2197,7 @@ - set_current_state(TASK_INTERRUPTIBLE); - - /* sleep on the mutex */ -- ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter); -+ ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter, NULL); - - if (unlikely(ret)) - remove_waiter(lock, waiter); -@@ -1646,3 +2212,89 @@ - - return ret; - } -+ -+static inline int -+ww_mutex_deadlock_injection(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) -+{ -+#ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH -+ unsigned tmp; -+ -+ if (ctx->deadlock_inject_countdown-- == 0) { -+ tmp = ctx->deadlock_inject_interval; -+ if (tmp > UINT_MAX/4) -+ tmp = UINT_MAX; -+ else -+ tmp = tmp*2 + tmp + tmp/2; -+ -+ ctx->deadlock_inject_interval = tmp; -+ ctx->deadlock_inject_countdown = tmp; -+ ctx->contending_lock = lock; -+ -+ ww_mutex_unlock(lock); -+ -+ return -EDEADLK; -+ } -+#endif -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PREEMPT_RT_FULL -+int __sched -+__ww_mutex_lock_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ww_ctx) -+{ -+ int ret; -+ -+ might_sleep(); -+ -+ mutex_acquire_nest(&lock->base.dep_map, 0, 0, &ww_ctx->dep_map, _RET_IP_); -+ ret = rt_mutex_slowlock(&lock->base.lock, TASK_INTERRUPTIBLE, NULL, 0, ww_ctx); -+ if (ret) -+ mutex_release(&lock->base.dep_map, 1, _RET_IP_); -+ else if (!ret && ww_ctx->acquired > 1) -+ return ww_mutex_deadlock_injection(lock, ww_ctx); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(__ww_mutex_lock_interruptible); -+ -+int __sched -+__ww_mutex_lock(struct ww_mutex *lock, struct ww_acquire_ctx *ww_ctx) -+{ -+ int ret; -+ -+ might_sleep(); -+ -+ mutex_acquire_nest(&lock->base.dep_map, 0, 0, &ww_ctx->dep_map, _RET_IP_); -+ ret = rt_mutex_slowlock(&lock->base.lock, TASK_UNINTERRUPTIBLE, NULL, 0, ww_ctx); -+ if (ret) -+ mutex_release(&lock->base.dep_map, 1, _RET_IP_); -+ else if (!ret && ww_ctx->acquired > 1) -+ return ww_mutex_deadlock_injection(lock, ww_ctx); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(__ww_mutex_lock); -+ -+void __sched ww_mutex_unlock(struct ww_mutex *lock) -+{ -+ int nest = !!lock->ctx; -+ -+ /* -+ * The unlocking fastpath is the 0->1 transition from 'locked' -+ * into 'unlocked' state: -+ */ -+ if (nest) { -+#ifdef CONFIG_DEBUG_MUTEXES -+ DEBUG_LOCKS_WARN_ON(!lock->ctx->acquired); -+#endif -+ if (lock->ctx->acquired > 0) -+ lock->ctx->acquired--; -+ lock->ctx = NULL; -+ } -+ -+ mutex_release(&lock->base.dep_map, nest, _RET_IP_); -+ rt_mutex_unlock(&lock->base.lock); -+} -+EXPORT_SYMBOL(ww_mutex_unlock); -+#endif -diff -Nur linux-4.1.26.orig/kernel/locking/rtmutex_common.h linux-4.1.26/kernel/locking/rtmutex_common.h ---- linux-4.1.26.orig/kernel/locking/rtmutex_common.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/rtmutex_common.h 2016-06-19 15:30:58.695297658 +0200 -@@ -49,6 +49,7 @@ - struct rb_node pi_tree_entry; - struct task_struct *task; - struct rt_mutex *lock; -+ bool savestate; - #ifdef CONFIG_DEBUG_RT_MUTEXES - unsigned long ip; - struct pid *deadlock_task_pid; -@@ -119,6 +120,9 @@ - /* - * PI-futex support (proxy locking functions, etc.): - */ -+#define PI_WAKEUP_INPROGRESS ((struct rt_mutex_waiter *) 1) -+#define PI_REQUEUE_INPROGRESS ((struct rt_mutex_waiter *) 2) -+ - extern struct task_struct *rt_mutex_next_owner(struct rt_mutex *lock); - extern void rt_mutex_init_proxy_locked(struct rt_mutex *lock, - struct task_struct *proxy_owner); -@@ -132,10 +136,24 @@ - struct rt_mutex_waiter *waiter); - extern int rt_mutex_timed_futex_lock(struct rt_mutex *l, struct hrtimer_sleeper *to); - -+extern bool rt_mutex_futex_unlock(struct rt_mutex *lock); -+ -+extern void rt_mutex_adjust_prio(struct task_struct *task); -+ - #ifdef CONFIG_DEBUG_RT_MUTEXES - # include "rtmutex-debug.h" - #else - # include "rtmutex.h" - #endif - -+static inline void -+rt_mutex_init_waiter(struct rt_mutex_waiter *waiter, bool savestate) -+{ -+ debug_rt_mutex_init_waiter(waiter); -+ waiter->task = NULL; -+ waiter->savestate = savestate; -+ RB_CLEAR_NODE(&waiter->pi_tree_entry); -+ RB_CLEAR_NODE(&waiter->tree_entry); -+} -+ - #endif -diff -Nur linux-4.1.26.orig/kernel/locking/spinlock.c linux-4.1.26/kernel/locking/spinlock.c ---- linux-4.1.26.orig/kernel/locking/spinlock.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/spinlock.c 2016-06-19 15:30:58.695297658 +0200 -@@ -124,8 +124,11 @@ - * __[spin|read|write]_lock_bh() - */ - BUILD_LOCK_OPS(spin, raw_spinlock); -+ -+#ifndef CONFIG_PREEMPT_RT_FULL - BUILD_LOCK_OPS(read, rwlock); - BUILD_LOCK_OPS(write, rwlock); -+#endif - - #endif - -@@ -209,6 +212,8 @@ - EXPORT_SYMBOL(_raw_spin_unlock_bh); - #endif - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - #ifndef CONFIG_INLINE_READ_TRYLOCK - int __lockfunc _raw_read_trylock(rwlock_t *lock) - { -@@ -353,6 +358,8 @@ - EXPORT_SYMBOL(_raw_write_unlock_bh); - #endif - -+#endif /* !PREEMPT_RT_FULL */ -+ - #ifdef CONFIG_DEBUG_LOCK_ALLOC - - void __lockfunc _raw_spin_lock_nested(raw_spinlock_t *lock, int subclass) -diff -Nur linux-4.1.26.orig/kernel/locking/spinlock_debug.c linux-4.1.26/kernel/locking/spinlock_debug.c ---- linux-4.1.26.orig/kernel/locking/spinlock_debug.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/locking/spinlock_debug.c 2016-06-19 15:30:58.695297658 +0200 -@@ -31,6 +31,7 @@ - - EXPORT_SYMBOL(__raw_spin_lock_init); - -+#ifndef CONFIG_PREEMPT_RT_FULL - void __rwlock_init(rwlock_t *lock, const char *name, - struct lock_class_key *key) - { -@@ -48,6 +49,7 @@ - } - - EXPORT_SYMBOL(__rwlock_init); -+#endif - - static void spin_dump(raw_spinlock_t *lock, const char *msg) - { -@@ -159,6 +161,7 @@ - arch_spin_unlock(&lock->raw_lock); - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - static void rwlock_bug(rwlock_t *lock, const char *msg) - { - if (!debug_locks_off()) -@@ -300,3 +303,5 @@ - debug_write_unlock(lock); - arch_write_unlock(&lock->raw_lock); - } -+ -+#endif -diff -Nur linux-4.1.26.orig/kernel/panic.c linux-4.1.26/kernel/panic.c ---- linux-4.1.26.orig/kernel/panic.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/panic.c 2016-06-19 15:30:58.695297658 +0200 -@@ -399,9 +399,11 @@ - - static int init_oops_id(void) - { -+#ifndef CONFIG_PREEMPT_RT_FULL - if (!oops_id) - get_random_bytes(&oops_id, sizeof(oops_id)); - else -+#endif - oops_id++; - - return 0; -diff -Nur linux-4.1.26.orig/kernel/power/hibernate.c linux-4.1.26/kernel/power/hibernate.c ---- linux-4.1.26.orig/kernel/power/hibernate.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/power/hibernate.c 2016-06-19 15:30:58.695297658 +0200 -@@ -285,6 +285,8 @@ - - local_irq_disable(); - -+ system_state = SYSTEM_SUSPEND; -+ - error = syscore_suspend(); - if (error) { - printk(KERN_ERR "PM: Some system devices failed to power down, " -@@ -314,6 +316,7 @@ - syscore_resume(); - - Enable_irqs: -+ system_state = SYSTEM_RUNNING; - local_irq_enable(); - - Enable_cpus: -@@ -437,6 +440,7 @@ - goto Enable_cpus; - - local_irq_disable(); -+ system_state = SYSTEM_SUSPEND; - - error = syscore_suspend(); - if (error) -@@ -470,6 +474,7 @@ - syscore_resume(); - - Enable_irqs: -+ system_state = SYSTEM_RUNNING; - local_irq_enable(); - - Enable_cpus: -@@ -555,6 +560,7 @@ - goto Platform_finish; - - local_irq_disable(); -+ system_state = SYSTEM_SUSPEND; - syscore_suspend(); - if (pm_wakeup_pending()) { - error = -EAGAIN; -@@ -567,6 +573,7 @@ - - Power_up: - syscore_resume(); -+ system_state = SYSTEM_RUNNING; - local_irq_enable(); - enable_nonboot_cpus(); - -diff -Nur linux-4.1.26.orig/kernel/power/suspend.c linux-4.1.26/kernel/power/suspend.c ---- linux-4.1.26.orig/kernel/power/suspend.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/power/suspend.c 2016-06-19 15:30:58.695297658 +0200 -@@ -356,6 +356,8 @@ - arch_suspend_disable_irqs(); - BUG_ON(!irqs_disabled()); - -+ system_state = SYSTEM_SUSPEND; -+ - error = syscore_suspend(); - if (!error) { - *wakeup = pm_wakeup_pending(); -@@ -370,6 +372,8 @@ - syscore_resume(); - } - -+ system_state = SYSTEM_RUNNING; -+ - arch_suspend_enable_irqs(); - BUG_ON(irqs_disabled()); - -diff -Nur linux-4.1.26.orig/kernel/printk/printk.c linux-4.1.26/kernel/printk/printk.c ---- linux-4.1.26.orig/kernel/printk/printk.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/printk/printk.c 2016-06-19 15:30:58.695297658 +0200 -@@ -1163,6 +1163,7 @@ - { - char *text; - int len = 0; -+ int attempts = 0; - - text = kmalloc(LOG_LINE_MAX + PREFIX_MAX, GFP_KERNEL); - if (!text) -@@ -1174,7 +1175,14 @@ - u64 seq; - u32 idx; - enum log_flags prev; -- -+ int num_msg; -+try_again: -+ attempts++; -+ if (attempts > 10) { -+ len = -EBUSY; -+ goto out; -+ } -+ num_msg = 0; - if (clear_seq < log_first_seq) { - /* messages are gone, move to first available one */ - clear_seq = log_first_seq; -@@ -1195,6 +1203,14 @@ - prev = msg->flags; - idx = log_next(idx); - seq++; -+ num_msg++; -+ if (num_msg > 5) { -+ num_msg = 0; -+ raw_spin_unlock_irq(&logbuf_lock); -+ raw_spin_lock_irq(&logbuf_lock); -+ if (clear_seq < log_first_seq) -+ goto try_again; -+ } - } - - /* move first record forward until length fits into the buffer */ -@@ -1208,6 +1224,14 @@ - prev = msg->flags; - idx = log_next(idx); - seq++; -+ num_msg++; -+ if (num_msg > 5) { -+ num_msg = 0; -+ raw_spin_unlock_irq(&logbuf_lock); -+ raw_spin_lock_irq(&logbuf_lock); -+ if (clear_seq < log_first_seq) -+ goto try_again; -+ } - } - - /* last message fitting into this dump */ -@@ -1248,6 +1272,7 @@ - clear_seq = log_next_seq; - clear_idx = log_next_idx; - } -+out: - raw_spin_unlock_irq(&logbuf_lock); - - kfree(text); -@@ -1401,6 +1426,7 @@ - if (!console_drivers) - return; - -+ migrate_disable(); - for_each_console(con) { - if (exclusive_console && con != exclusive_console) - continue; -@@ -1413,6 +1439,7 @@ - continue; - con->write(con, text, len); - } -+ migrate_enable(); - } - - /* -@@ -1473,6 +1500,15 @@ - static int console_trylock_for_printk(void) - { - unsigned int cpu = smp_processor_id(); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ int lock = !early_boot_irqs_disabled && (preempt_count() == 0) && -+ !irqs_disabled(); -+#else -+ int lock = 1; -+#endif -+ -+ if (!lock) -+ return 0; - - if (!console_trylock()) - return 0; -@@ -1607,6 +1643,62 @@ - return textlen; - } - -+#ifdef CONFIG_EARLY_PRINTK -+struct console *early_console; -+ -+static void early_vprintk(const char *fmt, va_list ap) -+{ -+ if (early_console) { -+ char buf[512]; -+ int n = vscnprintf(buf, sizeof(buf), fmt, ap); -+ -+ early_console->write(early_console, buf, n); -+ } -+} -+ -+asmlinkage void early_printk(const char *fmt, ...) -+{ -+ va_list ap; -+ -+ va_start(ap, fmt); -+ early_vprintk(fmt, ap); -+ va_end(ap); -+} -+ -+/* -+ * This is independent of any log levels - a global -+ * kill switch that turns off all of printk. -+ * -+ * Used by the NMI watchdog if early-printk is enabled. -+ */ -+static bool __read_mostly printk_killswitch; -+ -+static int __init force_early_printk_setup(char *str) -+{ -+ printk_killswitch = true; -+ return 0; -+} -+early_param("force_early_printk", force_early_printk_setup); -+ -+void printk_kill(void) -+{ -+ printk_killswitch = true; -+} -+ -+static int forced_early_printk(const char *fmt, va_list ap) -+{ -+ if (!printk_killswitch) -+ return 0; -+ early_vprintk(fmt, ap); -+ return 1; -+} -+#else -+static inline int forced_early_printk(const char *fmt, va_list ap) -+{ -+ return 0; -+} -+#endif -+ - asmlinkage int vprintk_emit(int facility, int level, - const char *dict, size_t dictlen, - const char *fmt, va_list args) -@@ -1623,6 +1715,13 @@ - /* cpu currently holding logbuf_lock in this function */ - static unsigned int logbuf_cpu = UINT_MAX; - -+ /* -+ * Fall back to early_printk if a debugging subsystem has -+ * killed printk output -+ */ -+ if (unlikely(forced_early_printk(fmt, args))) -+ return 1; -+ - if (level == LOGLEVEL_SCHED) { - level = LOGLEVEL_DEFAULT; - in_sched = true; -@@ -1764,8 +1863,7 @@ - * console_sem which would prevent anyone from printing to - * console - */ -- preempt_disable(); -- -+ migrate_disable(); - /* - * Try to acquire and then immediately release the console - * semaphore. The release will print out buffers and wake up -@@ -1773,7 +1871,7 @@ - */ - if (console_trylock_for_printk()) - console_unlock(); -- preempt_enable(); -+ migrate_enable(); - lockdep_on(); - } - -@@ -1902,26 +2000,6 @@ - - #endif /* CONFIG_PRINTK */ - --#ifdef CONFIG_EARLY_PRINTK --struct console *early_console; -- --asmlinkage __visible void early_printk(const char *fmt, ...) --{ -- va_list ap; -- char buf[512]; -- int n; -- -- if (!early_console) -- return; -- -- va_start(ap, fmt); -- n = vscnprintf(buf, sizeof(buf), fmt, ap); -- va_end(ap); -- -- early_console->write(early_console, buf, n); --} --#endif -- - static int __add_preferred_console(char *name, int idx, char *options, - char *brl_options) - { -@@ -2143,11 +2221,16 @@ - goto out; - - len = cont_print_text(text, size); -+#ifndef CONFIG_PREEMPT_RT_FULL - raw_spin_unlock(&logbuf_lock); - stop_critical_timings(); - call_console_drivers(cont.level, text, len); - start_critical_timings(); - local_irq_restore(flags); -+#else -+ raw_spin_unlock_irqrestore(&logbuf_lock, flags); -+ call_console_drivers(cont.level, text, len); -+#endif - return; - out: - raw_spin_unlock_irqrestore(&logbuf_lock, flags); -@@ -2246,12 +2329,17 @@ - console_idx = log_next(console_idx); - console_seq++; - console_prev = msg->flags; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ raw_spin_unlock_irqrestore(&logbuf_lock, flags); -+ call_console_drivers(level, text, len); -+#else - raw_spin_unlock(&logbuf_lock); - - stop_critical_timings(); /* don't trace print latency */ - call_console_drivers(level, text, len); - start_critical_timings(); - local_irq_restore(flags); -+#endif - - if (do_cond_resched) - cond_resched(); -diff -Nur linux-4.1.26.orig/kernel/ptrace.c linux-4.1.26/kernel/ptrace.c ---- linux-4.1.26.orig/kernel/ptrace.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/ptrace.c 2016-06-19 15:30:58.699297812 +0200 -@@ -129,7 +129,14 @@ - - spin_lock_irq(&task->sighand->siglock); - if (task_is_traced(task) && !__fatal_signal_pending(task)) { -- task->state = __TASK_TRACED; -+ unsigned long flags; -+ -+ raw_spin_lock_irqsave(&task->pi_lock, flags); -+ if (task->state & __TASK_TRACED) -+ task->state = __TASK_TRACED; -+ else -+ task->saved_state = __TASK_TRACED; -+ raw_spin_unlock_irqrestore(&task->pi_lock, flags); - ret = true; - } - spin_unlock_irq(&task->sighand->siglock); -diff -Nur linux-4.1.26.orig/kernel/rcu/rcutorture.c linux-4.1.26/kernel/rcu/rcutorture.c ---- linux-4.1.26.orig/kernel/rcu/rcutorture.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/rcu/rcutorture.c 2016-06-19 15:30:58.699297812 +0200 -@@ -389,6 +389,7 @@ - .name = "rcu" - }; - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * Definitions for rcu_bh torture testing. - */ -@@ -428,6 +429,12 @@ - .name = "rcu_bh" - }; - -+#else -+static struct rcu_torture_ops rcu_bh_ops = { -+ .ttype = INVALID_RCU_FLAVOR, -+}; -+#endif -+ - /* - * Don't even think about trying any of these in real life!!! - * The names includes "busted", and they really means it! -diff -Nur linux-4.1.26.orig/kernel/rcu/tree.c linux-4.1.26/kernel/rcu/tree.c ---- linux-4.1.26.orig/kernel/rcu/tree.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/rcu/tree.c 2016-06-19 15:30:58.699297812 +0200 -@@ -56,6 +56,11 @@ - #include - #include - #include -+#include -+#include -+#include -+#include -+#include "../time/tick-internal.h" - - #include "tree.h" - #include "rcu.h" -@@ -220,6 +225,19 @@ - } - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static void rcu_preempt_qs(void); -+ -+void rcu_bh_qs(void) -+{ -+ unsigned long flags; -+ -+ /* Callers to this function, rcu_preempt_qs(), must disable irqs. */ -+ local_irq_save(flags); -+ rcu_preempt_qs(); -+ local_irq_restore(flags); -+} -+#else - void rcu_bh_qs(void) - { - if (!__this_cpu_read(rcu_bh_data.passed_quiesce)) { -@@ -229,6 +247,7 @@ - __this_cpu_write(rcu_bh_data.passed_quiesce, 1); - } - } -+#endif - - static DEFINE_PER_CPU(int, rcu_sched_qs_mask); - -@@ -404,6 +423,7 @@ - } - EXPORT_SYMBOL_GPL(rcu_batches_completed_sched); - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * Return the number of RCU BH batches completed thus far for debug & stats. - */ -@@ -431,6 +451,13 @@ - } - EXPORT_SYMBOL_GPL(rcu_bh_force_quiescent_state); - -+#else -+void rcu_force_quiescent_state(void) -+{ -+} -+EXPORT_SYMBOL_GPL(rcu_force_quiescent_state); -+#endif -+ - /* - * Force a quiescent state for RCU-sched. - */ -@@ -1545,7 +1572,7 @@ - !ACCESS_ONCE(rsp->gp_flags) || - !rsp->gp_kthread) - return; -- wake_up(&rsp->gp_wq); -+ swait_wake(&rsp->gp_wq); - } - - /* -@@ -1986,7 +2013,7 @@ - ACCESS_ONCE(rsp->gpnum), - TPS("reqwait")); - rsp->gp_state = RCU_GP_WAIT_GPS; -- wait_event_interruptible(rsp->gp_wq, -+ swait_event_interruptible(rsp->gp_wq, - ACCESS_ONCE(rsp->gp_flags) & - RCU_GP_FLAG_INIT); - /* Locking provides needed memory barrier. */ -@@ -2015,7 +2042,7 @@ - ACCESS_ONCE(rsp->gpnum), - TPS("fqswait")); - rsp->gp_state = RCU_GP_WAIT_FQS; -- ret = wait_event_interruptible_timeout(rsp->gp_wq, -+ ret = swait_event_interruptible_timeout(rsp->gp_wq, - ((gf = ACCESS_ONCE(rsp->gp_flags)) & - RCU_GP_FLAG_FQS) || - (!ACCESS_ONCE(rnp->qsmask) && -@@ -2860,18 +2887,17 @@ - /* - * Do RCU core processing for the current CPU. - */ --static void rcu_process_callbacks(struct softirq_action *unused) -+static void rcu_process_callbacks(void) - { - struct rcu_state *rsp; - - if (cpu_is_offline(smp_processor_id())) - return; -- trace_rcu_utilization(TPS("Start RCU core")); - for_each_rcu_flavor(rsp) - __rcu_process_callbacks(rsp); -- trace_rcu_utilization(TPS("End RCU core")); - } - -+static DEFINE_PER_CPU(struct task_struct *, rcu_cpu_kthread_task); - /* - * Schedule RCU callback invocation. If the specified type of RCU - * does not support RCU priority boosting, just do a direct call, -@@ -2883,18 +2909,105 @@ - { - if (unlikely(!ACCESS_ONCE(rcu_scheduler_fully_active))) - return; -- if (likely(!rsp->boost)) { -- rcu_do_batch(rsp, rdp); -+ rcu_do_batch(rsp, rdp); -+} -+ -+static void rcu_wake_cond(struct task_struct *t, int status) -+{ -+ /* -+ * If the thread is yielding, only wake it when this -+ * is invoked from idle -+ */ -+ if (t && (status != RCU_KTHREAD_YIELDING || is_idle_task(current))) -+ wake_up_process(t); -+} -+ -+/* -+ * Wake up this CPU's rcuc kthread to do RCU core processing. -+ */ -+static void invoke_rcu_core(void) -+{ -+ unsigned long flags; -+ struct task_struct *t; -+ -+ if (!cpu_online(smp_processor_id())) - return; -+ local_irq_save(flags); -+ __this_cpu_write(rcu_cpu_has_work, 1); -+ t = __this_cpu_read(rcu_cpu_kthread_task); -+ if (t != NULL && current != t) -+ rcu_wake_cond(t, __this_cpu_read(rcu_cpu_kthread_status)); -+ local_irq_restore(flags); -+} -+ -+static void rcu_cpu_kthread_park(unsigned int cpu) -+{ -+ per_cpu(rcu_cpu_kthread_status, cpu) = RCU_KTHREAD_OFFCPU; -+} -+ -+static int rcu_cpu_kthread_should_run(unsigned int cpu) -+{ -+ return __this_cpu_read(rcu_cpu_has_work); -+} -+ -+/* -+ * Per-CPU kernel thread that invokes RCU callbacks. This replaces the -+ * RCU softirq used in flavors and configurations of RCU that do not -+ * support RCU priority boosting. -+ */ -+static void rcu_cpu_kthread(unsigned int cpu) -+{ -+ unsigned int *statusp = this_cpu_ptr(&rcu_cpu_kthread_status); -+ char work, *workp = this_cpu_ptr(&rcu_cpu_has_work); -+ int spincnt; -+ -+ for (spincnt = 0; spincnt < 10; spincnt++) { -+ trace_rcu_utilization(TPS("Start CPU kthread@rcu_wait")); -+ local_bh_disable(); -+ *statusp = RCU_KTHREAD_RUNNING; -+ this_cpu_inc(rcu_cpu_kthread_loops); -+ local_irq_disable(); -+ work = *workp; -+ *workp = 0; -+ local_irq_enable(); -+ if (work) -+ rcu_process_callbacks(); -+ local_bh_enable(); -+ if (*workp == 0) { -+ trace_rcu_utilization(TPS("End CPU kthread@rcu_wait")); -+ *statusp = RCU_KTHREAD_WAITING; -+ return; -+ } - } -- invoke_rcu_callbacks_kthread(); -+ *statusp = RCU_KTHREAD_YIELDING; -+ trace_rcu_utilization(TPS("Start CPU kthread@rcu_yield")); -+ schedule_timeout_interruptible(2); -+ trace_rcu_utilization(TPS("End CPU kthread@rcu_yield")); -+ *statusp = RCU_KTHREAD_WAITING; - } - --static void invoke_rcu_core(void) -+static struct smp_hotplug_thread rcu_cpu_thread_spec = { -+ .store = &rcu_cpu_kthread_task, -+ .thread_should_run = rcu_cpu_kthread_should_run, -+ .thread_fn = rcu_cpu_kthread, -+ .thread_comm = "rcuc/%u", -+ .setup = rcu_cpu_kthread_setup, -+ .park = rcu_cpu_kthread_park, -+}; -+ -+/* -+ * Spawn per-CPU RCU core processing kthreads. -+ */ -+static int __init rcu_spawn_core_kthreads(void) - { -- if (cpu_online(smp_processor_id())) -- raise_softirq(RCU_SOFTIRQ); -+ int cpu; -+ -+ for_each_possible_cpu(cpu) -+ per_cpu(rcu_cpu_has_work, cpu) = 0; -+ BUG_ON(smpboot_register_percpu_thread(&rcu_cpu_thread_spec)); -+ return 0; - } -+early_initcall(rcu_spawn_core_kthreads); - - /* - * Handle any core-RCU processing required by a call_rcu() invocation. -@@ -3040,6 +3153,7 @@ - } - EXPORT_SYMBOL_GPL(call_rcu_sched); - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * Queue an RCU callback for invocation after a quicker grace period. - */ -@@ -3048,6 +3162,7 @@ - __call_rcu(head, func, &rcu_bh_state, -1, 0); - } - EXPORT_SYMBOL_GPL(call_rcu_bh); -+#endif - - /* - * Queue an RCU callback for lazy invocation after a grace period. -@@ -3139,6 +3254,7 @@ - } - EXPORT_SYMBOL_GPL(synchronize_sched); - -+#ifndef CONFIG_PREEMPT_RT_FULL - /** - * synchronize_rcu_bh - wait until an rcu_bh grace period has elapsed. - * -@@ -3165,6 +3281,7 @@ - wait_rcu_gp(call_rcu_bh); - } - EXPORT_SYMBOL_GPL(synchronize_rcu_bh); -+#endif - - /** - * get_state_synchronize_rcu - Snapshot current RCU state -@@ -3677,6 +3794,7 @@ - mutex_unlock(&rsp->barrier_mutex); - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - /** - * rcu_barrier_bh - Wait until all in-flight call_rcu_bh() callbacks complete. - */ -@@ -3685,6 +3803,7 @@ - _rcu_barrier(&rcu_bh_state); - } - EXPORT_SYMBOL_GPL(rcu_barrier_bh); -+#endif - - /** - * rcu_barrier_sched - Wait for in-flight call_rcu_sched() callbacks. -@@ -4021,7 +4140,7 @@ - } - } - -- init_waitqueue_head(&rsp->gp_wq); -+ init_swait_head(&rsp->gp_wq); - rnp = rsp->level[rcu_num_lvls - 1]; - for_each_possible_cpu(i) { - while (i > rnp->grphi) -@@ -4120,7 +4239,6 @@ - rcu_init_one(&rcu_bh_state, &rcu_bh_data); - rcu_init_one(&rcu_sched_state, &rcu_sched_data); - __rcu_init_preempt(); -- open_softirq(RCU_SOFTIRQ, rcu_process_callbacks); - - /* - * We don't need protection against CPU-hotplug here because -diff -Nur linux-4.1.26.orig/kernel/rcu/tree.h linux-4.1.26/kernel/rcu/tree.h ---- linux-4.1.26.orig/kernel/rcu/tree.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/rcu/tree.h 2016-06-19 15:30:58.699297812 +0200 -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - - /* - * Define shape of hierarchy based on NR_CPUS, CONFIG_RCU_FANOUT, and -@@ -210,7 +211,7 @@ - /* This can happen due to race conditions. */ - #endif /* #ifdef CONFIG_RCU_BOOST */ - #ifdef CONFIG_RCU_NOCB_CPU -- wait_queue_head_t nocb_gp_wq[2]; -+ struct swait_head nocb_gp_wq[2]; - /* Place for rcu_nocb_kthread() to wait GP. */ - #endif /* #ifdef CONFIG_RCU_NOCB_CPU */ - int need_future_gp[2]; -@@ -349,7 +350,7 @@ - atomic_long_t nocb_q_count_lazy; /* invocation (all stages). */ - struct rcu_head *nocb_follower_head; /* CBs ready to invoke. */ - struct rcu_head **nocb_follower_tail; -- wait_queue_head_t nocb_wq; /* For nocb kthreads to sleep on. */ -+ struct swait_head nocb_wq; /* For nocb kthreads to sleep on. */ - struct task_struct *nocb_kthread; - int nocb_defer_wakeup; /* Defer wakeup of nocb_kthread. */ - -@@ -438,7 +439,7 @@ - unsigned long gpnum; /* Current gp number. */ - unsigned long completed; /* # of last completed gp. */ - struct task_struct *gp_kthread; /* Task for grace periods. */ -- wait_queue_head_t gp_wq; /* Where GP task waits. */ -+ struct swait_head gp_wq; /* Where GP task waits. */ - short gp_flags; /* Commands for GP task. */ - short gp_state; /* GP kthread sleep state. */ - -@@ -529,12 +530,10 @@ - DECLARE_PER_CPU(struct rcu_data, rcu_preempt_data); - #endif /* #ifdef CONFIG_PREEMPT_RCU */ - --#ifdef CONFIG_RCU_BOOST - DECLARE_PER_CPU(unsigned int, rcu_cpu_kthread_status); - DECLARE_PER_CPU(int, rcu_cpu_kthread_cpu); - DECLARE_PER_CPU(unsigned int, rcu_cpu_kthread_loops); - DECLARE_PER_CPU(char, rcu_cpu_has_work); --#endif /* #ifdef CONFIG_RCU_BOOST */ - - #ifndef RCU_TREE_NONCORE - -@@ -553,10 +552,9 @@ - static void __init __rcu_init_preempt(void); - static void rcu_initiate_boost(struct rcu_node *rnp, unsigned long flags); - static void rcu_preempt_boost_start_gp(struct rcu_node *rnp); --static void invoke_rcu_callbacks_kthread(void); - static bool rcu_is_callbacks_kthread(void); -+static void rcu_cpu_kthread_setup(unsigned int cpu); - #ifdef CONFIG_RCU_BOOST --static void rcu_preempt_do_callbacks(void); - static int rcu_spawn_one_boost_kthread(struct rcu_state *rsp, - struct rcu_node *rnp); - #endif /* #ifdef CONFIG_RCU_BOOST */ -diff -Nur linux-4.1.26.orig/kernel/rcu/tree_plugin.h linux-4.1.26/kernel/rcu/tree_plugin.h ---- linux-4.1.26.orig/kernel/rcu/tree_plugin.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/rcu/tree_plugin.h 2016-06-19 15:30:58.699297812 +0200 -@@ -24,27 +24,20 @@ - * Paul E. McKenney - */ - --#include --#include --#include --#include --#include "../time/tick-internal.h" -- - #ifdef CONFIG_RCU_BOOST - - #include "../locking/rtmutex_common.h" - -+#endif /* #ifdef CONFIG_RCU_BOOST */ -+ - /* - * Control variables for per-CPU and per-rcu_node kthreads. These - * handle all flavors of RCU. - */ --static DEFINE_PER_CPU(struct task_struct *, rcu_cpu_kthread_task); - DEFINE_PER_CPU(unsigned int, rcu_cpu_kthread_status); - DEFINE_PER_CPU(unsigned int, rcu_cpu_kthread_loops); - DEFINE_PER_CPU(char, rcu_cpu_has_work); - --#endif /* #ifdef CONFIG_RCU_BOOST */ -- - #ifdef CONFIG_RCU_NOCB_CPU - static cpumask_var_t rcu_nocb_mask; /* CPUs to have callbacks offloaded. */ - static bool have_rcu_nocb_mask; /* Was rcu_nocb_mask allocated? */ -@@ -291,7 +284,7 @@ - } - - /* Hardware IRQ handlers cannot block, complain if they get here. */ -- if (in_irq() || in_serving_softirq()) { -+ if (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_OFFSET)) { - lockdep_rcu_suspicious(__FILE__, __LINE__, - "rcu_read_unlock() from irq or softirq with blocking in critical section!!!\n"); - pr_alert("->rcu_read_unlock_special: %#x (b: %d, nq: %d)\n", -@@ -496,15 +489,6 @@ - t->rcu_read_unlock_special.b.need_qs = true; - } - --#ifdef CONFIG_RCU_BOOST -- --static void rcu_preempt_do_callbacks(void) --{ -- rcu_do_batch(&rcu_preempt_state, this_cpu_ptr(&rcu_preempt_data)); --} -- --#endif /* #ifdef CONFIG_RCU_BOOST */ -- - /* - * Queue a preemptible-RCU callback for invocation after a grace period. - */ -@@ -939,6 +923,19 @@ - - #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ - -+/* -+ * If boosting, set rcuc kthreads to realtime priority. -+ */ -+static void rcu_cpu_kthread_setup(unsigned int cpu) -+{ -+#ifdef CONFIG_RCU_BOOST -+ struct sched_param sp; -+ -+ sp.sched_priority = kthread_prio; -+ sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); -+#endif /* #ifdef CONFIG_RCU_BOOST */ -+} -+ - #ifdef CONFIG_RCU_BOOST - - #include "../locking/rtmutex_common.h" -@@ -970,16 +967,6 @@ - - #endif /* #else #ifdef CONFIG_RCU_TRACE */ - --static void rcu_wake_cond(struct task_struct *t, int status) --{ -- /* -- * If the thread is yielding, only wake it when this -- * is invoked from idle -- */ -- if (status != RCU_KTHREAD_YIELDING || is_idle_task(current)) -- wake_up_process(t); --} -- - /* - * Carry out RCU priority boosting on the task indicated by ->exp_tasks - * or ->boost_tasks, advancing the pointer to the next task in the -@@ -1125,23 +1112,6 @@ - } - - /* -- * Wake up the per-CPU kthread to invoke RCU callbacks. -- */ --static void invoke_rcu_callbacks_kthread(void) --{ -- unsigned long flags; -- -- local_irq_save(flags); -- __this_cpu_write(rcu_cpu_has_work, 1); -- if (__this_cpu_read(rcu_cpu_kthread_task) != NULL && -- current != __this_cpu_read(rcu_cpu_kthread_task)) { -- rcu_wake_cond(__this_cpu_read(rcu_cpu_kthread_task), -- __this_cpu_read(rcu_cpu_kthread_status)); -- } -- local_irq_restore(flags); --} -- --/* - * Is the current CPU running the RCU-callbacks kthread? - * Caller must have preemption disabled. - */ -@@ -1196,67 +1166,6 @@ - return 0; - } - --static void rcu_kthread_do_work(void) --{ -- rcu_do_batch(&rcu_sched_state, this_cpu_ptr(&rcu_sched_data)); -- rcu_do_batch(&rcu_bh_state, this_cpu_ptr(&rcu_bh_data)); -- rcu_preempt_do_callbacks(); --} -- --static void rcu_cpu_kthread_setup(unsigned int cpu) --{ -- struct sched_param sp; -- -- sp.sched_priority = kthread_prio; -- sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); --} -- --static void rcu_cpu_kthread_park(unsigned int cpu) --{ -- per_cpu(rcu_cpu_kthread_status, cpu) = RCU_KTHREAD_OFFCPU; --} -- --static int rcu_cpu_kthread_should_run(unsigned int cpu) --{ -- return __this_cpu_read(rcu_cpu_has_work); --} -- --/* -- * Per-CPU kernel thread that invokes RCU callbacks. This replaces the -- * RCU softirq used in flavors and configurations of RCU that do not -- * support RCU priority boosting. -- */ --static void rcu_cpu_kthread(unsigned int cpu) --{ -- unsigned int *statusp = this_cpu_ptr(&rcu_cpu_kthread_status); -- char work, *workp = this_cpu_ptr(&rcu_cpu_has_work); -- int spincnt; -- -- for (spincnt = 0; spincnt < 10; spincnt++) { -- trace_rcu_utilization(TPS("Start CPU kthread@rcu_wait")); -- local_bh_disable(); -- *statusp = RCU_KTHREAD_RUNNING; -- this_cpu_inc(rcu_cpu_kthread_loops); -- local_irq_disable(); -- work = *workp; -- *workp = 0; -- local_irq_enable(); -- if (work) -- rcu_kthread_do_work(); -- local_bh_enable(); -- if (*workp == 0) { -- trace_rcu_utilization(TPS("End CPU kthread@rcu_wait")); -- *statusp = RCU_KTHREAD_WAITING; -- return; -- } -- } -- *statusp = RCU_KTHREAD_YIELDING; -- trace_rcu_utilization(TPS("Start CPU kthread@rcu_yield")); -- schedule_timeout_interruptible(2); -- trace_rcu_utilization(TPS("End CPU kthread@rcu_yield")); -- *statusp = RCU_KTHREAD_WAITING; --} -- - /* - * Set the per-rcu_node kthread's affinity to cover all CPUs that are - * served by the rcu_node in question. The CPU hotplug lock is still -@@ -1286,26 +1195,12 @@ - free_cpumask_var(cm); - } - --static struct smp_hotplug_thread rcu_cpu_thread_spec = { -- .store = &rcu_cpu_kthread_task, -- .thread_should_run = rcu_cpu_kthread_should_run, -- .thread_fn = rcu_cpu_kthread, -- .thread_comm = "rcuc/%u", -- .setup = rcu_cpu_kthread_setup, -- .park = rcu_cpu_kthread_park, --}; -- - /* - * Spawn boost kthreads -- called as soon as the scheduler is running. - */ - static void __init rcu_spawn_boost_kthreads(void) - { - struct rcu_node *rnp; -- int cpu; -- -- for_each_possible_cpu(cpu) -- per_cpu(rcu_cpu_has_work, cpu) = 0; -- BUG_ON(smpboot_register_percpu_thread(&rcu_cpu_thread_spec)); - rcu_for_each_leaf_node(rcu_state_p, rnp) - (void)rcu_spawn_one_boost_kthread(rcu_state_p, rnp); - } -@@ -1328,11 +1223,6 @@ - raw_spin_unlock_irqrestore(&rnp->lock, flags); - } - --static void invoke_rcu_callbacks_kthread(void) --{ -- WARN_ON_ONCE(1); --} -- - static bool rcu_is_callbacks_kthread(void) - { - return false; -@@ -1356,7 +1246,7 @@ - - #endif /* #else #ifdef CONFIG_RCU_BOOST */ - --#if !defined(CONFIG_RCU_FAST_NO_HZ) -+#if !defined(CONFIG_RCU_FAST_NO_HZ) || defined(CONFIG_PREEMPT_RT_FULL) - - /* - * Check to see if any future RCU-related work will need to be done -@@ -1374,7 +1264,9 @@ - return rcu_cpu_has_callbacks(NULL); - } - #endif /* #ifndef CONFIG_RCU_NOCB_CPU_ALL */ -+#endif /* !defined(CONFIG_RCU_FAST_NO_HZ) || defined(CONFIG_PREEMPT_RT_FULL) */ - -+#if !defined(CONFIG_RCU_FAST_NO_HZ) - /* - * Because we do not have RCU_FAST_NO_HZ, don't bother cleaning up - * after it. -@@ -1472,6 +1364,8 @@ - return cbs_ready; - } - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - /* - * Allow the CPU to enter dyntick-idle mode unless it has callbacks ready - * to invoke. If the CPU has callbacks, try to advance them. Tell the -@@ -1512,7 +1406,7 @@ - return 0; - } - #endif /* #ifndef CONFIG_RCU_NOCB_CPU_ALL */ -- -+#endif /* #ifndef CONFIG_PREEMPT_RT_FULL */ - /* - * Prepare a CPU for idle from an RCU perspective. The first major task - * is to sense whether nohz mode has been enabled or disabled via sysfs. -@@ -1859,7 +1753,7 @@ - */ - static void rcu_nocb_gp_cleanup(struct rcu_state *rsp, struct rcu_node *rnp) - { -- wake_up_all(&rnp->nocb_gp_wq[rnp->completed & 0x1]); -+ swait_wake_all(&rnp->nocb_gp_wq[rnp->completed & 0x1]); - } - - /* -@@ -1877,8 +1771,8 @@ - - static void rcu_init_one_nocb(struct rcu_node *rnp) - { -- init_waitqueue_head(&rnp->nocb_gp_wq[0]); -- init_waitqueue_head(&rnp->nocb_gp_wq[1]); -+ init_swait_head(&rnp->nocb_gp_wq[0]); -+ init_swait_head(&rnp->nocb_gp_wq[1]); - } - - #ifndef CONFIG_RCU_NOCB_CPU_ALL -@@ -1903,7 +1797,7 @@ - if (ACCESS_ONCE(rdp_leader->nocb_leader_sleep) || force) { - /* Prior smp_mb__after_atomic() orders against prior enqueue. */ - ACCESS_ONCE(rdp_leader->nocb_leader_sleep) = false; -- wake_up(&rdp_leader->nocb_wq); -+ swait_wake(&rdp_leader->nocb_wq); - } - } - -@@ -2116,7 +2010,7 @@ - */ - trace_rcu_future_gp(rnp, rdp, c, TPS("StartWait")); - for (;;) { -- wait_event_interruptible( -+ swait_event_interruptible( - rnp->nocb_gp_wq[c & 0x1], - (d = ULONG_CMP_GE(ACCESS_ONCE(rnp->completed), c))); - if (likely(d)) -@@ -2144,7 +2038,7 @@ - /* Wait for callbacks to appear. */ - if (!rcu_nocb_poll) { - trace_rcu_nocb_wake(my_rdp->rsp->name, my_rdp->cpu, "Sleep"); -- wait_event_interruptible(my_rdp->nocb_wq, -+ swait_event_interruptible(my_rdp->nocb_wq, - !ACCESS_ONCE(my_rdp->nocb_leader_sleep)); - /* Memory barrier handled by smp_mb() calls below and repoll. */ - } else if (firsttime) { -@@ -2219,7 +2113,7 @@ - * List was empty, wake up the follower. - * Memory barriers supplied by atomic_long_add(). - */ -- wake_up(&rdp->nocb_wq); -+ swait_wake(&rdp->nocb_wq); - } - } - -@@ -2240,7 +2134,7 @@ - if (!rcu_nocb_poll) { - trace_rcu_nocb_wake(rdp->rsp->name, rdp->cpu, - "FollowerSleep"); -- wait_event_interruptible(rdp->nocb_wq, -+ swait_event_interruptible(rdp->nocb_wq, - ACCESS_ONCE(rdp->nocb_follower_head)); - } else if (firsttime) { - /* Don't drown trace log with "Poll"! */ -@@ -2399,7 +2293,7 @@ - static void __init rcu_boot_init_nocb_percpu_data(struct rcu_data *rdp) - { - rdp->nocb_tail = &rdp->nocb_head; -- init_waitqueue_head(&rdp->nocb_wq); -+ init_swait_head(&rdp->nocb_wq); - rdp->nocb_follower_tail = &rdp->nocb_follower_head; - } - -diff -Nur linux-4.1.26.orig/kernel/rcu/update.c linux-4.1.26/kernel/rcu/update.c ---- linux-4.1.26.orig/kernel/rcu/update.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/rcu/update.c 2016-06-19 15:30:58.699297812 +0200 -@@ -227,6 +227,7 @@ - } - EXPORT_SYMBOL_GPL(rcu_read_lock_held); - -+#ifndef CONFIG_PREEMPT_RT_FULL - /** - * rcu_read_lock_bh_held() - might we be in RCU-bh read-side critical section? - * -@@ -253,6 +254,7 @@ - return in_softirq() || irqs_disabled(); - } - EXPORT_SYMBOL_GPL(rcu_read_lock_bh_held); -+#endif - - #endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ - -diff -Nur linux-4.1.26.orig/kernel/relay.c linux-4.1.26/kernel/relay.c ---- linux-4.1.26.orig/kernel/relay.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/relay.c 2016-06-19 15:30:58.699297812 +0200 -@@ -339,6 +339,10 @@ - { - struct rchan_buf *buf = (struct rchan_buf *)data; - wake_up_interruptible(&buf->read_wait); -+ /* -+ * Stupid polling for now: -+ */ -+ mod_timer(&buf->timer, jiffies + 1); - } - - /** -@@ -356,6 +360,7 @@ - init_waitqueue_head(&buf->read_wait); - kref_init(&buf->kref); - setup_timer(&buf->timer, wakeup_readers, (unsigned long)buf); -+ mod_timer(&buf->timer, jiffies + 1); - } else - del_timer_sync(&buf->timer); - -@@ -739,15 +744,6 @@ - else - buf->early_bytes += buf->chan->subbuf_size - - buf->padding[old_subbuf]; -- smp_mb(); -- if (waitqueue_active(&buf->read_wait)) -- /* -- * Calling wake_up_interruptible() from here -- * will deadlock if we happen to be logging -- * from the scheduler (trying to re-grab -- * rq->lock), so defer it. -- */ -- mod_timer(&buf->timer, jiffies + 1); - } - - old = buf->data; -diff -Nur linux-4.1.26.orig/kernel/sched/completion.c linux-4.1.26/kernel/sched/completion.c ---- linux-4.1.26.orig/kernel/sched/completion.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/completion.c 2016-06-19 15:30:58.699297812 +0200 -@@ -30,10 +30,10 @@ - { - unsigned long flags; - -- spin_lock_irqsave(&x->wait.lock, flags); -+ raw_spin_lock_irqsave(&x->wait.lock, flags); - x->done++; -- __wake_up_locked(&x->wait, TASK_NORMAL, 1); -- spin_unlock_irqrestore(&x->wait.lock, flags); -+ __swait_wake_locked(&x->wait, TASK_NORMAL, 1); -+ raw_spin_unlock_irqrestore(&x->wait.lock, flags); - } - EXPORT_SYMBOL(complete); - -@@ -50,10 +50,10 @@ - { - unsigned long flags; - -- spin_lock_irqsave(&x->wait.lock, flags); -+ raw_spin_lock_irqsave(&x->wait.lock, flags); - x->done += UINT_MAX/2; -- __wake_up_locked(&x->wait, TASK_NORMAL, 0); -- spin_unlock_irqrestore(&x->wait.lock, flags); -+ __swait_wake_locked(&x->wait, TASK_NORMAL, 0); -+ raw_spin_unlock_irqrestore(&x->wait.lock, flags); - } - EXPORT_SYMBOL(complete_all); - -@@ -62,20 +62,20 @@ - long (*action)(long), long timeout, int state) - { - if (!x->done) { -- DECLARE_WAITQUEUE(wait, current); -+ DEFINE_SWAITER(wait); - -- __add_wait_queue_tail_exclusive(&x->wait, &wait); -+ swait_prepare_locked(&x->wait, &wait); - do { - if (signal_pending_state(state, current)) { - timeout = -ERESTARTSYS; - break; - } - __set_current_state(state); -- spin_unlock_irq(&x->wait.lock); -+ raw_spin_unlock_irq(&x->wait.lock); - timeout = action(timeout); -- spin_lock_irq(&x->wait.lock); -+ raw_spin_lock_irq(&x->wait.lock); - } while (!x->done && timeout); -- __remove_wait_queue(&x->wait, &wait); -+ swait_finish_locked(&x->wait, &wait); - if (!x->done) - return timeout; - } -@@ -89,9 +89,9 @@ - { - might_sleep(); - -- spin_lock_irq(&x->wait.lock); -+ raw_spin_lock_irq(&x->wait.lock); - timeout = do_wait_for_common(x, action, timeout, state); -- spin_unlock_irq(&x->wait.lock); -+ raw_spin_unlock_irq(&x->wait.lock); - return timeout; - } - -@@ -277,12 +277,12 @@ - if (!READ_ONCE(x->done)) - return 0; - -- spin_lock_irqsave(&x->wait.lock, flags); -+ raw_spin_lock_irqsave(&x->wait.lock, flags); - if (!x->done) - ret = 0; - else - x->done--; -- spin_unlock_irqrestore(&x->wait.lock, flags); -+ raw_spin_unlock_irqrestore(&x->wait.lock, flags); - return ret; - } - EXPORT_SYMBOL(try_wait_for_completion); -@@ -311,7 +311,7 @@ - * after it's acquired the lock. - */ - smp_rmb(); -- spin_unlock_wait(&x->wait.lock); -+ raw_spin_unlock_wait(&x->wait.lock); - return true; - } - EXPORT_SYMBOL(completion_done); -diff -Nur linux-4.1.26.orig/kernel/sched/core.c linux-4.1.26/kernel/sched/core.c ---- linux-4.1.26.orig/kernel/sched/core.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/core.c 2016-06-19 15:30:58.703297966 +0200 -@@ -282,7 +282,11 @@ - * Number of tasks to iterate in a single balance run. - * Limited because this is done with IRQs disabled. - */ -+#ifndef CONFIG_PREEMPT_RT_FULL - const_debug unsigned int sysctl_sched_nr_migrate = 32; -+#else -+const_debug unsigned int sysctl_sched_nr_migrate = 8; -+#endif - - /* - * period over which we average the RT time consumption, measured -@@ -461,6 +465,7 @@ - - hrtimer_init(&rq->hrtick_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); - rq->hrtick_timer.function = hrtick; -+ rq->hrtick_timer.irqsafe = 1; - } - #else /* CONFIG_SCHED_HRTICK */ - static inline void hrtick_clear(struct rq *rq) -@@ -541,6 +546,52 @@ - #endif - #endif - -+void wake_q_add(struct wake_q_head *head, struct task_struct *task) -+{ -+ struct wake_q_node *node = &task->wake_q; -+ -+ /* -+ * Atomically grab the task, if ->wake_q is !nil already it means -+ * its already queued (either by us or someone else) and will get the -+ * wakeup due to that. -+ * -+ * This cmpxchg() implies a full barrier, which pairs with the write -+ * barrier implied by the wakeup in wake_up_list(). -+ */ -+ if (cmpxchg(&node->next, NULL, WAKE_Q_TAIL)) -+ return; -+ -+ get_task_struct(task); -+ -+ /* -+ * The head is context local, there can be no concurrency. -+ */ -+ *head->lastp = node; -+ head->lastp = &node->next; -+} -+ -+void wake_up_q(struct wake_q_head *head) -+{ -+ struct wake_q_node *node = head->first; -+ -+ while (node != WAKE_Q_TAIL) { -+ struct task_struct *task; -+ -+ task = container_of(node, struct task_struct, wake_q); -+ BUG_ON(!task); -+ /* task can safely be re-inserted now */ -+ node = node->next; -+ task->wake_q.next = NULL; -+ -+ /* -+ * wake_up_process() implies a wmb() to pair with the queueing -+ * in wake_q_add() so as not to miss wakeups. -+ */ -+ wake_up_process(task); -+ put_task_struct(task); -+ } -+} -+ - /* - * resched_curr - mark rq's current task 'to be rescheduled now'. - * -@@ -572,6 +623,38 @@ - trace_sched_wake_idle_without_ipi(cpu); - } - -+#ifdef CONFIG_PREEMPT_LAZY -+void resched_curr_lazy(struct rq *rq) -+{ -+ struct task_struct *curr = rq->curr; -+ int cpu; -+ -+ if (!sched_feat(PREEMPT_LAZY)) { -+ resched_curr(rq); -+ return; -+ } -+ -+ lockdep_assert_held(&rq->lock); -+ -+ if (test_tsk_need_resched(curr)) -+ return; -+ -+ if (test_tsk_need_resched_lazy(curr)) -+ return; -+ -+ set_tsk_need_resched_lazy(curr); -+ -+ cpu = cpu_of(rq); -+ if (cpu == smp_processor_id()) -+ return; -+ -+ /* NEED_RESCHED_LAZY must be visible before we test polling */ -+ smp_mb(); -+ if (!tsk_is_polling(curr)) -+ smp_send_reschedule(cpu); -+} -+#endif -+ - void resched_cpu(int cpu) - { - struct rq *rq = cpu_rq(cpu); -@@ -595,12 +678,14 @@ - */ - int get_nohz_timer_target(int pinned) - { -- int cpu = smp_processor_id(); -+ int cpu; - int i; - struct sched_domain *sd; - -+ preempt_disable_rt(); -+ cpu = smp_processor_id(); - if (pinned || !get_sysctl_timer_migration() || !idle_cpu(cpu)) -- return cpu; -+ goto preempt_en_rt; - - rcu_read_lock(); - for_each_domain(cpu, sd) { -@@ -613,6 +698,8 @@ - } - unlock: - rcu_read_unlock(); -+preempt_en_rt: -+ preempt_enable_rt(); - return cpu; - } - /* -@@ -1164,6 +1251,18 @@ - - static int migration_cpu_stop(void *data); - -+static bool check_task_state(struct task_struct *p, long match_state) -+{ -+ bool match = false; -+ -+ raw_spin_lock_irq(&p->pi_lock); -+ if (p->state == match_state || p->saved_state == match_state) -+ match = true; -+ raw_spin_unlock_irq(&p->pi_lock); -+ -+ return match; -+} -+ - /* - * wait_task_inactive - wait for a thread to unschedule. - * -@@ -1208,7 +1307,7 @@ - * is actually now running somewhere else! - */ - while (task_running(rq, p)) { -- if (match_state && unlikely(p->state != match_state)) -+ if (match_state && !check_task_state(p, match_state)) - return 0; - cpu_relax(); - } -@@ -1223,7 +1322,8 @@ - running = task_running(rq, p); - queued = task_on_rq_queued(p); - ncsw = 0; -- if (!match_state || p->state == match_state) -+ if (!match_state || p->state == match_state || -+ p->saved_state == match_state) - ncsw = p->nvcsw | LONG_MIN; /* sets MSB */ - task_rq_unlock(rq, p, &flags); - -@@ -1449,10 +1549,6 @@ - { - activate_task(rq, p, en_flags); - p->on_rq = TASK_ON_RQ_QUEUED; -- -- /* if a worker is waking up, notify workqueue */ -- if (p->flags & PF_WQ_WORKER) -- wq_worker_waking_up(p, cpu_of(rq)); - } - - /* -@@ -1462,9 +1558,9 @@ - ttwu_do_wakeup(struct rq *rq, struct task_struct *p, int wake_flags) - { - check_preempt_curr(rq, p, wake_flags); -- trace_sched_wakeup(p, true); -- - p->state = TASK_RUNNING; -+ trace_sched_wakeup(p); -+ - #ifdef CONFIG_SMP - if (p->sched_class->task_woken) - p->sched_class->task_woken(rq, p); -@@ -1666,8 +1762,29 @@ - */ - smp_mb__before_spinlock(); - raw_spin_lock_irqsave(&p->pi_lock, flags); -- if (!(p->state & state)) -+ if (!(p->state & state)) { -+ /* -+ * The task might be running due to a spinlock sleeper -+ * wakeup. Check the saved state and set it to running -+ * if the wakeup condition is true. -+ */ -+ if (!(wake_flags & WF_LOCK_SLEEPER)) { -+ if (p->saved_state & state) { -+ p->saved_state = TASK_RUNNING; -+ success = 1; -+ } -+ } - goto out; -+ } -+ -+ /* -+ * If this is a regular wakeup, then we can unconditionally -+ * clear the saved state of a "lock sleeper". -+ */ -+ if (!(wake_flags & WF_LOCK_SLEEPER)) -+ p->saved_state = TASK_RUNNING; -+ -+ trace_sched_waking(p); - - success = 1; /* we're going to change ->state */ - cpu = task_cpu(p); -@@ -1710,42 +1827,6 @@ - } - - /** -- * try_to_wake_up_local - try to wake up a local task with rq lock held -- * @p: the thread to be awakened -- * -- * Put @p on the run-queue if it's not already there. The caller must -- * ensure that this_rq() is locked, @p is bound to this_rq() and not -- * the current task. -- */ --static void try_to_wake_up_local(struct task_struct *p) --{ -- struct rq *rq = task_rq(p); -- -- if (WARN_ON_ONCE(rq != this_rq()) || -- WARN_ON_ONCE(p == current)) -- return; -- -- lockdep_assert_held(&rq->lock); -- -- if (!raw_spin_trylock(&p->pi_lock)) { -- raw_spin_unlock(&rq->lock); -- raw_spin_lock(&p->pi_lock); -- raw_spin_lock(&rq->lock); -- } -- -- if (!(p->state & TASK_NORMAL)) -- goto out; -- -- if (!task_on_rq_queued(p)) -- ttwu_activate(rq, p, ENQUEUE_WAKEUP); -- -- ttwu_do_wakeup(rq, p, 0); -- ttwu_stat(p, smp_processor_id(), 0); --out: -- raw_spin_unlock(&p->pi_lock); --} -- --/** - * wake_up_process - Wake up a specific process - * @p: The process to be woken up. - * -@@ -1759,11 +1840,23 @@ - */ - int wake_up_process(struct task_struct *p) - { -- WARN_ON(task_is_stopped_or_traced(p)); -+ WARN_ON(__task_is_stopped_or_traced(p)); - return try_to_wake_up(p, TASK_NORMAL, 0); - } - EXPORT_SYMBOL(wake_up_process); - -+/** -+ * wake_up_lock_sleeper - Wake up a specific process blocked on a "sleeping lock" -+ * @p: The process to be woken up. -+ * -+ * Same as wake_up_process() above, but wake_flags=WF_LOCK_SLEEPER to indicate -+ * the nature of the wakeup. -+ */ -+int wake_up_lock_sleeper(struct task_struct *p) -+{ -+ return try_to_wake_up(p, TASK_ALL, WF_LOCK_SLEEPER); -+} -+ - int wake_up_state(struct task_struct *p, unsigned int state) - { - return try_to_wake_up(p, state, 0); -@@ -1959,6 +2052,9 @@ - p->on_cpu = 0; - #endif - init_task_preempt_count(p); -+#ifdef CONFIG_HAVE_PREEMPT_LAZY -+ task_thread_info(p)->preempt_lazy_count = 0; -+#endif - #ifdef CONFIG_SMP - plist_node_init(&p->pushable_tasks, MAX_PRIO); - RB_CLEAR_NODE(&p->pushable_dl_tasks); -@@ -2094,7 +2190,7 @@ - rq = __task_rq_lock(p); - activate_task(rq, p, 0); - p->on_rq = TASK_ON_RQ_QUEUED; -- trace_sched_wakeup_new(p, true); -+ trace_sched_wakeup_new(p); - check_preempt_curr(rq, p, WF_FORK); - #ifdef CONFIG_SMP - if (p->sched_class->task_woken) -@@ -2231,8 +2327,12 @@ - finish_arch_post_lock_switch(); - - fire_sched_in_preempt_notifiers(current); -+ /* -+ * We use mmdrop_delayed() here so we don't have to do the -+ * full __mmdrop() when we are the last user. -+ */ - if (mm) -- mmdrop(mm); -+ mmdrop_delayed(mm); - if (unlikely(prev_state == TASK_DEAD)) { - if (prev->sched_class->task_dead) - prev->sched_class->task_dead(prev); -@@ -2543,16 +2643,6 @@ - } - #endif - --notrace unsigned long get_parent_ip(unsigned long addr) --{ -- if (in_lock_functions(addr)) { -- addr = CALLER_ADDR2; -- if (in_lock_functions(addr)) -- addr = CALLER_ADDR3; -- } -- return addr; --} -- - #if defined(CONFIG_PREEMPT) && (defined(CONFIG_DEBUG_PREEMPT) || \ - defined(CONFIG_PREEMPT_TRACER)) - -@@ -2574,7 +2664,7 @@ - PREEMPT_MASK - 10); - #endif - if (preempt_count() == val) { -- unsigned long ip = get_parent_ip(CALLER_ADDR1); -+ unsigned long ip = get_lock_parent_ip(); - #ifdef CONFIG_DEBUG_PREEMPT - current->preempt_disable_ip = ip; - #endif -@@ -2601,7 +2691,7 @@ - #endif - - if (preempt_count() == val) -- trace_preempt_on(CALLER_ADDR0, get_parent_ip(CALLER_ADDR1)); -+ trace_preempt_on(CALLER_ADDR0, get_lock_parent_ip()); - __preempt_count_sub(val); - } - EXPORT_SYMBOL(preempt_count_sub); -@@ -2657,6 +2747,133 @@ - schedstat_inc(this_rq(), sched_count); - } - -+#if defined(CONFIG_PREEMPT_RT_FULL) && defined(CONFIG_SMP) -+#define MIGRATE_DISABLE_SET_AFFIN (1<<30) /* Can't make a negative */ -+#define migrate_disabled_updated(p) ((p)->migrate_disable & MIGRATE_DISABLE_SET_AFFIN) -+#define migrate_disable_count(p) ((p)->migrate_disable & ~MIGRATE_DISABLE_SET_AFFIN) -+ -+static inline void update_migrate_disable(struct task_struct *p) -+{ -+ const struct cpumask *mask; -+ -+ if (likely(!p->migrate_disable)) -+ return; -+ -+ /* Did we already update affinity? */ -+ if (unlikely(migrate_disabled_updated(p))) -+ return; -+ -+ /* -+ * Since this is always current we can get away with only locking -+ * rq->lock, the ->cpus_allowed value can normally only be changed -+ * while holding both p->pi_lock and rq->lock, but seeing that this -+ * is current, we cannot actually be waking up, so all code that -+ * relies on serialization against p->pi_lock is out of scope. -+ * -+ * Having rq->lock serializes us against things like -+ * set_cpus_allowed_ptr() that can still happen concurrently. -+ */ -+ mask = tsk_cpus_allowed(p); -+ -+ if (p->sched_class->set_cpus_allowed) -+ p->sched_class->set_cpus_allowed(p, mask); -+ /* mask==cpumask_of(task_cpu(p)) which has a cpumask_weight==1 */ -+ p->nr_cpus_allowed = 1; -+ -+ /* Let migrate_enable know to fix things back up */ -+ p->migrate_disable |= MIGRATE_DISABLE_SET_AFFIN; -+} -+ -+void migrate_disable(void) -+{ -+ struct task_struct *p = current; -+ -+ if (in_atomic() || irqs_disabled()) { -+#ifdef CONFIG_SCHED_DEBUG -+ p->migrate_disable_atomic++; -+#endif -+ return; -+ } -+ -+#ifdef CONFIG_SCHED_DEBUG -+ if (unlikely(p->migrate_disable_atomic)) { -+ tracing_off(); -+ WARN_ON_ONCE(1); -+ } -+#endif -+ -+ if (p->migrate_disable) { -+ p->migrate_disable++; -+ return; -+ } -+ -+ preempt_disable(); -+ preempt_lazy_disable(); -+ pin_current_cpu(); -+ p->migrate_disable = 1; -+ preempt_enable(); -+} -+EXPORT_SYMBOL(migrate_disable); -+ -+void migrate_enable(void) -+{ -+ struct task_struct *p = current; -+ const struct cpumask *mask; -+ unsigned long flags; -+ struct rq *rq; -+ -+ if (in_atomic() || irqs_disabled()) { -+#ifdef CONFIG_SCHED_DEBUG -+ p->migrate_disable_atomic--; -+#endif -+ return; -+ } -+ -+#ifdef CONFIG_SCHED_DEBUG -+ if (unlikely(p->migrate_disable_atomic)) { -+ tracing_off(); -+ WARN_ON_ONCE(1); -+ } -+#endif -+ WARN_ON_ONCE(p->migrate_disable <= 0); -+ -+ if (migrate_disable_count(p) > 1) { -+ p->migrate_disable--; -+ return; -+ } -+ -+ preempt_disable(); -+ if (unlikely(migrate_disabled_updated(p))) { -+ /* -+ * Undo whatever update_migrate_disable() did, also see there -+ * about locking. -+ */ -+ rq = this_rq(); -+ raw_spin_lock_irqsave(&rq->lock, flags); -+ -+ /* -+ * Clearing migrate_disable causes tsk_cpus_allowed to -+ * show the tasks original cpu affinity. -+ */ -+ p->migrate_disable = 0; -+ mask = tsk_cpus_allowed(p); -+ if (p->sched_class->set_cpus_allowed) -+ p->sched_class->set_cpus_allowed(p, mask); -+ p->nr_cpus_allowed = cpumask_weight(mask); -+ raw_spin_unlock_irqrestore(&rq->lock, flags); -+ } else -+ p->migrate_disable = 0; -+ -+ unpin_current_cpu(); -+ preempt_enable(); -+ preempt_lazy_enable(); -+} -+EXPORT_SYMBOL(migrate_enable); -+#else -+static inline void update_migrate_disable(struct task_struct *p) { } -+#define migrate_disabled_updated(p) 0 -+#endif -+ - /* - * Pick up the highest-prio task: - */ -@@ -2763,6 +2980,8 @@ - smp_mb__before_spinlock(); - raw_spin_lock_irq(&rq->lock); - -+ update_migrate_disable(prev); -+ - rq->clock_skip_update <<= 1; /* promote REQ to ACT */ - - switch_count = &prev->nivcsw; -@@ -2772,19 +2991,6 @@ - } else { - deactivate_task(rq, prev, DEQUEUE_SLEEP); - prev->on_rq = 0; -- -- /* -- * If a worker went to sleep, notify and ask workqueue -- * whether it wants to wake up a task to maintain -- * concurrency. -- */ -- if (prev->flags & PF_WQ_WORKER) { -- struct task_struct *to_wakeup; -- -- to_wakeup = wq_worker_sleeping(prev, cpu); -- if (to_wakeup) -- try_to_wake_up_local(to_wakeup); -- } - } - switch_count = &prev->nvcsw; - } -@@ -2794,6 +3000,7 @@ - - next = pick_next_task(rq, prev); - clear_tsk_need_resched(prev); -+ clear_tsk_need_resched_lazy(prev); - clear_preempt_need_resched(); - rq->clock_skip_update = 0; - -@@ -2814,8 +3021,19 @@ - - static inline void sched_submit_work(struct task_struct *tsk) - { -- if (!tsk->state || tsk_is_pi_blocked(tsk)) -+ if (!tsk->state) -+ return; -+ /* -+ * If a worker went to sleep, notify and ask workqueue whether -+ * it wants to wake up a task to maintain concurrency. -+ */ -+ if (tsk->flags & PF_WQ_WORKER) -+ wq_worker_sleeping(tsk); -+ -+ -+ if (tsk_is_pi_blocked(tsk)) - return; -+ - /* - * If we are going to sleep and we have plugged IO queued, - * make sure to submit it to avoid deadlocks. -@@ -2824,6 +3042,12 @@ - blk_schedule_flush_plug(tsk); - } - -+static void sched_update_worker(struct task_struct *tsk) -+{ -+ if (tsk->flags & PF_WQ_WORKER) -+ wq_worker_running(tsk); -+} -+ - asmlinkage __visible void __sched schedule(void) - { - struct task_struct *tsk = current; -@@ -2832,6 +3056,7 @@ - do { - __schedule(); - } while (need_resched()); -+ sched_update_worker(tsk); - } - EXPORT_SYMBOL(schedule); - -@@ -2881,6 +3106,30 @@ - } while (need_resched()); - } - -+#ifdef CONFIG_PREEMPT_LAZY -+/* -+ * If TIF_NEED_RESCHED is then we allow to be scheduled away since this is -+ * set by a RT task. Oterwise we try to avoid beeing scheduled out as long as -+ * preempt_lazy_count counter >0. -+ */ -+static __always_inline int preemptible_lazy(void) -+{ -+ if (test_thread_flag(TIF_NEED_RESCHED)) -+ return 1; -+ if (current_thread_info()->preempt_lazy_count) -+ return 0; -+ return 1; -+} -+ -+#else -+ -+static int preemptible_lazy(void) -+{ -+ return 1; -+} -+ -+#endif -+ - #ifdef CONFIG_PREEMPT - /* - * this is the entry point to schedule() from in-kernel preemption -@@ -2895,6 +3144,8 @@ - */ - if (likely(!preemptible())) - return; -+ if (!preemptible_lazy()) -+ return; - - preempt_schedule_common(); - } -@@ -2922,6 +3173,8 @@ - - if (likely(!preemptible())) - return; -+ if (!preemptible_lazy()) -+ return; - - do { - __preempt_count_add(PREEMPT_ACTIVE); -@@ -2931,7 +3184,16 @@ - * an infinite recursion. - */ - prev_ctx = exception_enter(); -+ /* -+ * The add/subtract must not be traced by the function -+ * tracer. But we still want to account for the -+ * preempt off latency tracer. Since the _notrace versions -+ * of add/subtract skip the accounting for latency tracer -+ * we must force it manually. -+ */ -+ start_critical_timings(); - __schedule(); -+ stop_critical_timings(); - exception_exit(prev_ctx); - - __preempt_count_sub(PREEMPT_ACTIVE); -@@ -4268,6 +4530,7 @@ - } - EXPORT_SYMBOL(__cond_resched_lock); - -+#ifndef CONFIG_PREEMPT_RT_FULL - int __sched __cond_resched_softirq(void) - { - BUG_ON(!in_softirq()); -@@ -4281,6 +4544,7 @@ - return 0; - } - EXPORT_SYMBOL(__cond_resched_softirq); -+#endif - - /** - * yield - yield the current processor to other threads. -@@ -4635,7 +4899,9 @@ - - /* Set the preempt count _outside_ the spinlocks! */ - init_idle_preempt_count(idle, cpu); -- -+#ifdef CONFIG_HAVE_PREEMPT_LAZY -+ task_thread_info(idle)->preempt_lazy_count = 0; -+#endif - /* - * The idle tasks have their own, simple scheduling class: - */ -@@ -4755,11 +5021,91 @@ - - void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) - { -- if (p->sched_class->set_cpus_allowed) -- p->sched_class->set_cpus_allowed(p, new_mask); -+ if (!migrate_disabled_updated(p)) { -+ if (p->sched_class->set_cpus_allowed) -+ p->sched_class->set_cpus_allowed(p, new_mask); -+ p->nr_cpus_allowed = cpumask_weight(new_mask); -+ } - - cpumask_copy(&p->cpus_allowed, new_mask); -- p->nr_cpus_allowed = cpumask_weight(new_mask); -+} -+ -+static DEFINE_PER_CPU(struct cpumask, sched_cpumasks); -+static DEFINE_MUTEX(sched_down_mutex); -+static cpumask_t sched_down_cpumask; -+ -+void tell_sched_cpu_down_begin(int cpu) -+{ -+ mutex_lock(&sched_down_mutex); -+ cpumask_set_cpu(cpu, &sched_down_cpumask); -+ mutex_unlock(&sched_down_mutex); -+} -+ -+void tell_sched_cpu_down_done(int cpu) -+{ -+ mutex_lock(&sched_down_mutex); -+ cpumask_clear_cpu(cpu, &sched_down_cpumask); -+ mutex_unlock(&sched_down_mutex); -+} -+ -+/** -+ * migrate_me - try to move the current task off this cpu -+ * -+ * Used by the pin_current_cpu() code to try to get tasks -+ * to move off the current CPU as it is going down. -+ * It will only move the task if the task isn't pinned to -+ * the CPU (with migrate_disable, affinity or NO_SETAFFINITY) -+ * and the task has to be in a RUNNING state. Otherwise the -+ * movement of the task will wake it up (change its state -+ * to running) when the task did not expect it. -+ * -+ * Returns 1 if it succeeded in moving the current task -+ * 0 otherwise. -+ */ -+int migrate_me(void) -+{ -+ struct task_struct *p = current; -+ struct migration_arg arg; -+ struct cpumask *cpumask; -+ struct cpumask *mask; -+ unsigned long flags; -+ unsigned int dest_cpu; -+ struct rq *rq; -+ -+ /* -+ * We can not migrate tasks bounded to a CPU or tasks not -+ * running. The movement of the task will wake it up. -+ */ -+ if (p->flags & PF_NO_SETAFFINITY || p->state) -+ return 0; -+ -+ mutex_lock(&sched_down_mutex); -+ rq = task_rq_lock(p, &flags); -+ -+ cpumask = this_cpu_ptr(&sched_cpumasks); -+ mask = &p->cpus_allowed; -+ -+ cpumask_andnot(cpumask, mask, &sched_down_cpumask); -+ -+ if (!cpumask_weight(cpumask)) { -+ /* It's only on this CPU? */ -+ task_rq_unlock(rq, p, &flags); -+ mutex_unlock(&sched_down_mutex); -+ return 0; -+ } -+ -+ dest_cpu = cpumask_any_and(cpu_active_mask, cpumask); -+ -+ arg.task = p; -+ arg.dest_cpu = dest_cpu; -+ -+ task_rq_unlock(rq, p, &flags); -+ -+ stop_one_cpu(cpu_of(rq), migration_cpu_stop, &arg); -+ tlb_migrate_finish(p->mm); -+ mutex_unlock(&sched_down_mutex); -+ -+ return 1; - } - - /* -@@ -4805,7 +5151,7 @@ - do_set_cpus_allowed(p, new_mask); - - /* Can the task run on the task's current CPU? If so, we're done */ -- if (cpumask_test_cpu(task_cpu(p), new_mask)) -+ if (cpumask_test_cpu(task_cpu(p), new_mask) || __migrate_disabled(p)) - goto out; - - dest_cpu = cpumask_any_and(cpu_active_mask, new_mask); -@@ -4945,6 +5291,8 @@ - - #ifdef CONFIG_HOTPLUG_CPU - -+static DEFINE_PER_CPU(struct mm_struct *, idle_last_mm); -+ - /* - * Ensures that the idle task is using init_mm right before its cpu goes - * offline. -@@ -4959,7 +5307,11 @@ - switch_mm(mm, &init_mm, current); - finish_arch_post_lock_switch(); - } -- mmdrop(mm); -+ /* -+ * Defer the cleanup to an alive cpu. On RT we can neither -+ * call mmdrop() nor mmdrop_delayed() from here. -+ */ -+ per_cpu(idle_last_mm, smp_processor_id()) = mm; - } - - /* -@@ -5302,6 +5654,10 @@ - - case CPU_DEAD: - calc_load_migrate(rq); -+ if (per_cpu(idle_last_mm, cpu)) { -+ mmdrop(per_cpu(idle_last_mm, cpu)); -+ per_cpu(idle_last_mm, cpu) = NULL; -+ } - break; - #endif - } -@@ -7281,7 +7637,8 @@ - #ifdef CONFIG_DEBUG_ATOMIC_SLEEP - static inline int preempt_count_equals(int preempt_offset) - { -- int nested = (preempt_count() & ~PREEMPT_ACTIVE) + rcu_preempt_depth(); -+ int nested = (preempt_count() & ~PREEMPT_ACTIVE) + -+ sched_rcu_preempt_depth(); - - return (nested == preempt_offset); - } -diff -Nur linux-4.1.26.orig/kernel/sched/cputime.c linux-4.1.26/kernel/sched/cputime.c ---- linux-4.1.26.orig/kernel/sched/cputime.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/cputime.c 2016-06-19 15:30:58.703297966 +0200 -@@ -675,37 +675,45 @@ - - void vtime_account_system(struct task_struct *tsk) - { -- write_seqlock(&tsk->vtime_seqlock); -+ raw_spin_lock(&tsk->vtime_lock); -+ write_seqcount_begin(&tsk->vtime_seq); - __vtime_account_system(tsk); -- write_sequnlock(&tsk->vtime_seqlock); -+ write_seqcount_end(&tsk->vtime_seq); -+ raw_spin_unlock(&tsk->vtime_lock); - } - - void vtime_gen_account_irq_exit(struct task_struct *tsk) - { -- write_seqlock(&tsk->vtime_seqlock); -+ raw_spin_lock(&tsk->vtime_lock); -+ write_seqcount_begin(&tsk->vtime_seq); - __vtime_account_system(tsk); - if (context_tracking_in_user()) - tsk->vtime_snap_whence = VTIME_USER; -- write_sequnlock(&tsk->vtime_seqlock); -+ write_seqcount_end(&tsk->vtime_seq); -+ raw_spin_unlock(&tsk->vtime_lock); - } - - void vtime_account_user(struct task_struct *tsk) - { - cputime_t delta_cpu; - -- write_seqlock(&tsk->vtime_seqlock); -+ raw_spin_lock(&tsk->vtime_lock); -+ write_seqcount_begin(&tsk->vtime_seq); - delta_cpu = get_vtime_delta(tsk); - tsk->vtime_snap_whence = VTIME_SYS; - account_user_time(tsk, delta_cpu, cputime_to_scaled(delta_cpu)); -- write_sequnlock(&tsk->vtime_seqlock); -+ write_seqcount_end(&tsk->vtime_seq); -+ raw_spin_unlock(&tsk->vtime_lock); - } - - void vtime_user_enter(struct task_struct *tsk) - { -- write_seqlock(&tsk->vtime_seqlock); -+ raw_spin_lock(&tsk->vtime_lock); -+ write_seqcount_begin(&tsk->vtime_seq); - __vtime_account_system(tsk); - tsk->vtime_snap_whence = VTIME_USER; -- write_sequnlock(&tsk->vtime_seqlock); -+ write_seqcount_end(&tsk->vtime_seq); -+ raw_spin_unlock(&tsk->vtime_lock); - } - - void vtime_guest_enter(struct task_struct *tsk) -@@ -717,19 +725,23 @@ - * synchronization against the reader (task_gtime()) - * that can thus safely catch up with a tickless delta. - */ -- write_seqlock(&tsk->vtime_seqlock); -+ raw_spin_lock(&tsk->vtime_lock); -+ write_seqcount_begin(&tsk->vtime_seq); - __vtime_account_system(tsk); - current->flags |= PF_VCPU; -- write_sequnlock(&tsk->vtime_seqlock); -+ write_seqcount_end(&tsk->vtime_seq); -+ raw_spin_unlock(&tsk->vtime_lock); - } - EXPORT_SYMBOL_GPL(vtime_guest_enter); - - void vtime_guest_exit(struct task_struct *tsk) - { -- write_seqlock(&tsk->vtime_seqlock); -+ raw_spin_lock(&tsk->vtime_lock); -+ write_seqcount_begin(&tsk->vtime_seq); - __vtime_account_system(tsk); - current->flags &= ~PF_VCPU; -- write_sequnlock(&tsk->vtime_seqlock); -+ write_seqcount_end(&tsk->vtime_seq); -+ raw_spin_unlock(&tsk->vtime_lock); - } - EXPORT_SYMBOL_GPL(vtime_guest_exit); - -@@ -742,24 +754,30 @@ - - void arch_vtime_task_switch(struct task_struct *prev) - { -- write_seqlock(&prev->vtime_seqlock); -+ raw_spin_lock(&prev->vtime_lock); -+ write_seqcount_begin(&prev->vtime_seq); - prev->vtime_snap_whence = VTIME_SLEEPING; -- write_sequnlock(&prev->vtime_seqlock); -+ write_seqcount_end(&prev->vtime_seq); -+ raw_spin_unlock(&prev->vtime_lock); - -- write_seqlock(¤t->vtime_seqlock); -+ raw_spin_lock(¤t->vtime_lock); -+ write_seqcount_begin(¤t->vtime_seq); - current->vtime_snap_whence = VTIME_SYS; - current->vtime_snap = sched_clock_cpu(smp_processor_id()); -- write_sequnlock(¤t->vtime_seqlock); -+ write_seqcount_end(¤t->vtime_seq); -+ raw_spin_unlock(¤t->vtime_lock); - } - - void vtime_init_idle(struct task_struct *t, int cpu) - { - unsigned long flags; - -- write_seqlock_irqsave(&t->vtime_seqlock, flags); -+ raw_spin_lock_irqsave(&t->vtime_lock, flags); -+ write_seqcount_begin(&t->vtime_seq); - t->vtime_snap_whence = VTIME_SYS; - t->vtime_snap = sched_clock_cpu(cpu); -- write_sequnlock_irqrestore(&t->vtime_seqlock, flags); -+ write_seqcount_end(&t->vtime_seq); -+ raw_spin_unlock_irqrestore(&t->vtime_lock, flags); - } - - cputime_t task_gtime(struct task_struct *t) -@@ -768,13 +786,13 @@ - cputime_t gtime; - - do { -- seq = read_seqbegin(&t->vtime_seqlock); -+ seq = read_seqcount_begin(&t->vtime_seq); - - gtime = t->gtime; - if (t->flags & PF_VCPU) - gtime += vtime_delta(t); - -- } while (read_seqretry(&t->vtime_seqlock, seq)); -+ } while (read_seqcount_retry(&t->vtime_seq, seq)); - - return gtime; - } -@@ -797,7 +815,7 @@ - *udelta = 0; - *sdelta = 0; - -- seq = read_seqbegin(&t->vtime_seqlock); -+ seq = read_seqcount_begin(&t->vtime_seq); - - if (u_dst) - *u_dst = *u_src; -@@ -821,7 +839,7 @@ - if (t->vtime_snap_whence == VTIME_SYS) - *sdelta = delta; - } -- } while (read_seqretry(&t->vtime_seqlock, seq)); -+ } while (read_seqcount_retry(&t->vtime_seq, seq)); - } - - -diff -Nur linux-4.1.26.orig/kernel/sched/deadline.c linux-4.1.26/kernel/sched/deadline.c ---- linux-4.1.26.orig/kernel/sched/deadline.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/deadline.c 2016-06-19 15:30:58.703297966 +0200 -@@ -637,6 +637,7 @@ - - hrtimer_init(timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); - timer->function = dl_task_timer; -+ timer->irqsafe = 1; - } - - static -diff -Nur linux-4.1.26.orig/kernel/sched/debug.c linux-4.1.26/kernel/sched/debug.c ---- linux-4.1.26.orig/kernel/sched/debug.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/debug.c 2016-06-19 15:30:58.703297966 +0200 -@@ -260,6 +260,9 @@ - P(rt_throttled); - PN(rt_time); - PN(rt_runtime); -+#ifdef CONFIG_SMP -+ P(rt_nr_migratory); -+#endif - - #undef PN - #undef P -@@ -648,6 +651,10 @@ - #endif - P(policy); - P(prio); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ P(migrate_disable); -+#endif -+ P(nr_cpus_allowed); - #undef PN - #undef __PN - #undef P -diff -Nur linux-4.1.26.orig/kernel/sched/fair.c linux-4.1.26/kernel/sched/fair.c ---- linux-4.1.26.orig/kernel/sched/fair.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/fair.c 2016-06-19 15:30:58.703297966 +0200 -@@ -3201,7 +3201,7 @@ - ideal_runtime = sched_slice(cfs_rq, curr); - delta_exec = curr->sum_exec_runtime - curr->prev_sum_exec_runtime; - if (delta_exec > ideal_runtime) { -- resched_curr(rq_of(cfs_rq)); -+ resched_curr_lazy(rq_of(cfs_rq)); - /* - * The current task ran long enough, ensure it doesn't get - * re-elected due to buddy favours. -@@ -3225,7 +3225,7 @@ - return; - - if (delta > ideal_runtime) -- resched_curr(rq_of(cfs_rq)); -+ resched_curr_lazy(rq_of(cfs_rq)); - } - - static void -@@ -3366,7 +3366,7 @@ - * validating it and just reschedule. - */ - if (queued) { -- resched_curr(rq_of(cfs_rq)); -+ resched_curr_lazy(rq_of(cfs_rq)); - return; - } - /* -@@ -3557,7 +3557,7 @@ - * hierarchy can be throttled - */ - if (!assign_cfs_rq_runtime(cfs_rq) && likely(cfs_rq->curr)) -- resched_curr(rq_of(cfs_rq)); -+ resched_curr_lazy(rq_of(cfs_rq)); - } - - static __always_inline -@@ -4180,7 +4180,7 @@ - - if (delta < 0) { - if (rq->curr == p) -- resched_curr(rq); -+ resched_curr_lazy(rq); - return; - } - hrtick_start(rq, delta); -@@ -5076,7 +5076,7 @@ - return; - - preempt: -- resched_curr(rq); -+ resched_curr_lazy(rq); - /* - * Only set the backward buddy when the current task is still - * on the rq. This can happen when a wakeup gets interleaved -@@ -7869,7 +7869,7 @@ - * 'current' within the tree based on its new key value. - */ - swap(curr->vruntime, se->vruntime); -- resched_curr(rq); -+ resched_curr_lazy(rq); - } - - se->vruntime -= cfs_rq->min_vruntime; -@@ -7894,7 +7894,7 @@ - */ - if (rq->curr == p) { - if (p->prio > oldprio) -- resched_curr(rq); -+ resched_curr_lazy(rq); - } else - check_preempt_curr(rq, p, 0); - } -diff -Nur linux-4.1.26.orig/kernel/sched/features.h linux-4.1.26/kernel/sched/features.h ---- linux-4.1.26.orig/kernel/sched/features.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/features.h 2016-06-19 15:30:58.707298121 +0200 -@@ -50,11 +50,19 @@ - */ - SCHED_FEAT(NONTASK_CAPACITY, true) - -+#ifdef CONFIG_PREEMPT_RT_FULL -+SCHED_FEAT(TTWU_QUEUE, false) -+# ifdef CONFIG_PREEMPT_LAZY -+SCHED_FEAT(PREEMPT_LAZY, true) -+# endif -+#else -+ - /* - * Queue remote wakeups on the target CPU and process them - * using the scheduler IPI. Reduces rq->lock contention/bounces. - */ - SCHED_FEAT(TTWU_QUEUE, true) -+#endif - - #ifdef HAVE_RT_PUSH_IPI - /* -diff -Nur linux-4.1.26.orig/kernel/sched/Makefile linux-4.1.26/kernel/sched/Makefile ---- linux-4.1.26.orig/kernel/sched/Makefile 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/Makefile 2016-06-19 15:30:58.699297812 +0200 -@@ -13,7 +13,7 @@ - - obj-y += core.o proc.o clock.o cputime.o - obj-y += idle_task.o fair.o rt.o deadline.o stop_task.o --obj-y += wait.o completion.o idle.o -+obj-y += wait.o wait-simple.o work-simple.o completion.o idle.o - obj-$(CONFIG_SMP) += cpupri.o cpudeadline.o - obj-$(CONFIG_SCHED_AUTOGROUP) += auto_group.o - obj-$(CONFIG_SCHEDSTATS) += stats.o -diff -Nur linux-4.1.26.orig/kernel/sched/rt.c linux-4.1.26/kernel/sched/rt.c ---- linux-4.1.26.orig/kernel/sched/rt.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/rt.c 2016-06-19 15:30:58.707298121 +0200 -@@ -44,6 +44,7 @@ - - hrtimer_init(&rt_b->rt_period_timer, - CLOCK_MONOTONIC, HRTIMER_MODE_REL); -+ rt_b->rt_period_timer.irqsafe = 1; - rt_b->rt_period_timer.function = sched_rt_period_timer; - } - -@@ -89,6 +90,7 @@ - rt_rq->push_cpu = nr_cpu_ids; - raw_spin_lock_init(&rt_rq->push_lock); - init_irq_work(&rt_rq->push_work, push_irq_work_func); -+ rt_rq->push_work.flags |= IRQ_WORK_HARD_IRQ; - #endif - #endif /* CONFIG_SMP */ - /* We start is dequeued state, because no RT tasks are queued */ -diff -Nur linux-4.1.26.orig/kernel/sched/sched.h linux-4.1.26/kernel/sched/sched.h ---- linux-4.1.26.orig/kernel/sched/sched.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/sched/sched.h 2016-06-19 15:30:58.707298121 +0200 -@@ -1093,6 +1093,7 @@ - #define WF_SYNC 0x01 /* waker goes to sleep after wakeup */ - #define WF_FORK 0x02 /* child wakeup after fork */ - #define WF_MIGRATED 0x4 /* internal use, task got migrated */ -+#define WF_LOCK_SLEEPER 0x08 /* wakeup spinlock "sleeper" */ - - /* - * To aid in avoiding the subversion of "niceness" due to uneven distribution -@@ -1290,6 +1291,15 @@ - extern void resched_curr(struct rq *rq); - extern void resched_cpu(int cpu); - -+#ifdef CONFIG_PREEMPT_LAZY -+extern void resched_curr_lazy(struct rq *rq); -+#else -+static inline void resched_curr_lazy(struct rq *rq) -+{ -+ resched_curr(rq); -+} -+#endif -+ - extern struct rt_bandwidth def_rt_bandwidth; - extern void init_rt_bandwidth(struct rt_bandwidth *rt_b, u64 period, u64 runtime); - -diff -Nur linux-4.1.26.orig/kernel/sched/wait-simple.c linux-4.1.26/kernel/sched/wait-simple.c ---- linux-4.1.26.orig/kernel/sched/wait-simple.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/kernel/sched/wait-simple.c 2016-06-19 15:30:58.707298121 +0200 -@@ -0,0 +1,115 @@ -+/* -+ * Simple waitqueues without fancy flags and callbacks -+ * -+ * (C) 2011 Thomas Gleixner -+ * -+ * Based on kernel/wait.c -+ * -+ * For licencing details see kernel-base/COPYING -+ */ -+#include -+#include -+#include -+#include -+ -+/* Adds w to head->list. Must be called with head->lock locked. */ -+static inline void __swait_enqueue(struct swait_head *head, struct swaiter *w) -+{ -+ list_add(&w->node, &head->list); -+ /* We can't let the condition leak before the setting of head */ -+ smp_mb(); -+} -+ -+/* Removes w from head->list. Must be called with head->lock locked. */ -+static inline void __swait_dequeue(struct swaiter *w) -+{ -+ list_del_init(&w->node); -+} -+ -+void __init_swait_head(struct swait_head *head, struct lock_class_key *key) -+{ -+ raw_spin_lock_init(&head->lock); -+ lockdep_set_class(&head->lock, key); -+ INIT_LIST_HEAD(&head->list); -+} -+EXPORT_SYMBOL(__init_swait_head); -+ -+void swait_prepare_locked(struct swait_head *head, struct swaiter *w) -+{ -+ w->task = current; -+ if (list_empty(&w->node)) -+ __swait_enqueue(head, w); -+} -+ -+void swait_prepare(struct swait_head *head, struct swaiter *w, int state) -+{ -+ unsigned long flags; -+ -+ raw_spin_lock_irqsave(&head->lock, flags); -+ swait_prepare_locked(head, w); -+ __set_current_state(state); -+ raw_spin_unlock_irqrestore(&head->lock, flags); -+} -+EXPORT_SYMBOL(swait_prepare); -+ -+void swait_finish_locked(struct swait_head *head, struct swaiter *w) -+{ -+ __set_current_state(TASK_RUNNING); -+ if (w->task) -+ __swait_dequeue(w); -+} -+ -+void swait_finish(struct swait_head *head, struct swaiter *w) -+{ -+ unsigned long flags; -+ -+ __set_current_state(TASK_RUNNING); -+ if (w->task) { -+ raw_spin_lock_irqsave(&head->lock, flags); -+ __swait_dequeue(w); -+ raw_spin_unlock_irqrestore(&head->lock, flags); -+ } -+} -+EXPORT_SYMBOL(swait_finish); -+ -+unsigned int -+__swait_wake_locked(struct swait_head *head, unsigned int state, unsigned int num) -+{ -+ struct swaiter *curr, *next; -+ int woken = 0; -+ -+ list_for_each_entry_safe(curr, next, &head->list, node) { -+ if (wake_up_state(curr->task, state)) { -+ __swait_dequeue(curr); -+ /* -+ * The waiting task can free the waiter as -+ * soon as curr->task = NULL is written, -+ * without taking any locks. A memory barrier -+ * is required here to prevent the following -+ * store to curr->task from getting ahead of -+ * the dequeue operation. -+ */ -+ smp_wmb(); -+ curr->task = NULL; -+ if (++woken == num) -+ break; -+ } -+ } -+ return woken; -+} -+ -+unsigned int -+__swait_wake(struct swait_head *head, unsigned int state, unsigned int num) -+{ -+ unsigned long flags; -+ int woken; -+ -+ if (!swaitqueue_active(head)) -+ return 0; -+ -+ raw_spin_lock_irqsave(&head->lock, flags); -+ woken = __swait_wake_locked(head, state, num); -+ raw_spin_unlock_irqrestore(&head->lock, flags); -+ return woken; -+} -+EXPORT_SYMBOL(__swait_wake); -diff -Nur linux-4.1.26.orig/kernel/sched/work-simple.c linux-4.1.26/kernel/sched/work-simple.c ---- linux-4.1.26.orig/kernel/sched/work-simple.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/kernel/sched/work-simple.c 2016-06-19 15:30:58.707298121 +0200 -@@ -0,0 +1,173 @@ -+/* -+ * Copyright (C) 2014 BMW Car IT GmbH, Daniel Wagner daniel.wagner@bmw-carit.de -+ * -+ * Provides a framework for enqueuing callbacks from irq context -+ * PREEMPT_RT_FULL safe. The callbacks are executed in kthread context. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define SWORK_EVENT_PENDING (1 << 0) -+ -+static DEFINE_MUTEX(worker_mutex); -+static struct sworker *glob_worker; -+ -+struct sworker { -+ struct list_head events; -+ struct swait_head wq; -+ -+ raw_spinlock_t lock; -+ -+ struct task_struct *task; -+ int refs; -+}; -+ -+static bool swork_readable(struct sworker *worker) -+{ -+ bool r; -+ -+ if (kthread_should_stop()) -+ return true; -+ -+ raw_spin_lock_irq(&worker->lock); -+ r = !list_empty(&worker->events); -+ raw_spin_unlock_irq(&worker->lock); -+ -+ return r; -+} -+ -+static int swork_kthread(void *arg) -+{ -+ struct sworker *worker = arg; -+ -+ for (;;) { -+ swait_event_interruptible(worker->wq, -+ swork_readable(worker)); -+ if (kthread_should_stop()) -+ break; -+ -+ raw_spin_lock_irq(&worker->lock); -+ while (!list_empty(&worker->events)) { -+ struct swork_event *sev; -+ -+ sev = list_first_entry(&worker->events, -+ struct swork_event, item); -+ list_del(&sev->item); -+ raw_spin_unlock_irq(&worker->lock); -+ -+ WARN_ON_ONCE(!test_and_clear_bit(SWORK_EVENT_PENDING, -+ &sev->flags)); -+ sev->func(sev); -+ raw_spin_lock_irq(&worker->lock); -+ } -+ raw_spin_unlock_irq(&worker->lock); -+ } -+ return 0; -+} -+ -+static struct sworker *swork_create(void) -+{ -+ struct sworker *worker; -+ -+ worker = kzalloc(sizeof(*worker), GFP_KERNEL); -+ if (!worker) -+ return ERR_PTR(-ENOMEM); -+ -+ INIT_LIST_HEAD(&worker->events); -+ raw_spin_lock_init(&worker->lock); -+ init_swait_head(&worker->wq); -+ -+ worker->task = kthread_run(swork_kthread, worker, "kswork"); -+ if (IS_ERR(worker->task)) { -+ kfree(worker); -+ return ERR_PTR(-ENOMEM); -+ } -+ -+ return worker; -+} -+ -+static void swork_destroy(struct sworker *worker) -+{ -+ kthread_stop(worker->task); -+ -+ WARN_ON(!list_empty(&worker->events)); -+ kfree(worker); -+} -+ -+/** -+ * swork_queue - queue swork -+ * -+ * Returns %false if @work was already on a queue, %true otherwise. -+ * -+ * The work is queued and processed on a random CPU -+ */ -+bool swork_queue(struct swork_event *sev) -+{ -+ unsigned long flags; -+ -+ if (test_and_set_bit(SWORK_EVENT_PENDING, &sev->flags)) -+ return false; -+ -+ raw_spin_lock_irqsave(&glob_worker->lock, flags); -+ list_add_tail(&sev->item, &glob_worker->events); -+ raw_spin_unlock_irqrestore(&glob_worker->lock, flags); -+ -+ swait_wake(&glob_worker->wq); -+ return true; -+} -+EXPORT_SYMBOL_GPL(swork_queue); -+ -+/** -+ * swork_get - get an instance of the sworker -+ * -+ * Returns an negative error code if the initialization if the worker did not -+ * work, %0 otherwise. -+ * -+ */ -+int swork_get(void) -+{ -+ struct sworker *worker; -+ -+ mutex_lock(&worker_mutex); -+ if (!glob_worker) { -+ worker = swork_create(); -+ if (IS_ERR(worker)) { -+ mutex_unlock(&worker_mutex); -+ return -ENOMEM; -+ } -+ -+ glob_worker = worker; -+ } -+ -+ glob_worker->refs++; -+ mutex_unlock(&worker_mutex); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(swork_get); -+ -+/** -+ * swork_put - puts an instance of the sworker -+ * -+ * Will destroy the sworker thread. This function must not be called until all -+ * queued events have been completed. -+ */ -+void swork_put(void) -+{ -+ mutex_lock(&worker_mutex); -+ -+ glob_worker->refs--; -+ if (glob_worker->refs > 0) -+ goto out; -+ -+ swork_destroy(glob_worker); -+ glob_worker = NULL; -+out: -+ mutex_unlock(&worker_mutex); -+} -+EXPORT_SYMBOL_GPL(swork_put); -diff -Nur linux-4.1.26.orig/kernel/signal.c linux-4.1.26/kernel/signal.c ---- linux-4.1.26.orig/kernel/signal.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/signal.c 2016-06-19 15:30:58.707298121 +0200 -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -352,13 +353,45 @@ - return false; - } - -+#ifdef __HAVE_ARCH_CMPXCHG -+static inline struct sigqueue *get_task_cache(struct task_struct *t) -+{ -+ struct sigqueue *q = t->sigqueue_cache; -+ -+ if (cmpxchg(&t->sigqueue_cache, q, NULL) != q) -+ return NULL; -+ return q; -+} -+ -+static inline int put_task_cache(struct task_struct *t, struct sigqueue *q) -+{ -+ if (cmpxchg(&t->sigqueue_cache, NULL, q) == NULL) -+ return 0; -+ return 1; -+} -+ -+#else -+ -+static inline struct sigqueue *get_task_cache(struct task_struct *t) -+{ -+ return NULL; -+} -+ -+static inline int put_task_cache(struct task_struct *t, struct sigqueue *q) -+{ -+ return 1; -+} -+ -+#endif -+ - /* - * allocate a new signal queue record - * - this may be called without locks if and only if t == current, otherwise an - * appropriate lock must be held to stop the target task from exiting - */ - static struct sigqueue * --__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimit) -+__sigqueue_do_alloc(int sig, struct task_struct *t, gfp_t flags, -+ int override_rlimit, int fromslab) - { - struct sigqueue *q = NULL; - struct user_struct *user; -@@ -375,7 +408,10 @@ - if (override_rlimit || - atomic_read(&user->sigpending) <= - task_rlimit(t, RLIMIT_SIGPENDING)) { -- q = kmem_cache_alloc(sigqueue_cachep, flags); -+ if (!fromslab) -+ q = get_task_cache(t); -+ if (!q) -+ q = kmem_cache_alloc(sigqueue_cachep, flags); - } else { - print_dropped_signal(sig); - } -@@ -392,6 +428,13 @@ - return q; - } - -+static struct sigqueue * -+__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, -+ int override_rlimit) -+{ -+ return __sigqueue_do_alloc(sig, t, flags, override_rlimit, 0); -+} -+ - static void __sigqueue_free(struct sigqueue *q) - { - if (q->flags & SIGQUEUE_PREALLOC) -@@ -401,6 +444,21 @@ - kmem_cache_free(sigqueue_cachep, q); - } - -+static void sigqueue_free_current(struct sigqueue *q) -+{ -+ struct user_struct *up; -+ -+ if (q->flags & SIGQUEUE_PREALLOC) -+ return; -+ -+ up = q->user; -+ if (rt_prio(current->normal_prio) && !put_task_cache(current, q)) { -+ atomic_dec(&up->sigpending); -+ free_uid(up); -+ } else -+ __sigqueue_free(q); -+} -+ - void flush_sigqueue(struct sigpending *queue) - { - struct sigqueue *q; -@@ -414,6 +472,21 @@ - } - - /* -+ * Called from __exit_signal. Flush tsk->pending and -+ * tsk->sigqueue_cache -+ */ -+void flush_task_sigqueue(struct task_struct *tsk) -+{ -+ struct sigqueue *q; -+ -+ flush_sigqueue(&tsk->pending); -+ -+ q = get_task_cache(tsk); -+ if (q) -+ kmem_cache_free(sigqueue_cachep, q); -+} -+ -+/* - * Flush all pending signals for a task. - */ - void __flush_signals(struct task_struct *t) -@@ -565,7 +638,7 @@ - still_pending: - list_del_init(&first->list); - copy_siginfo(info, &first->info); -- __sigqueue_free(first); -+ sigqueue_free_current(first); - } else { - /* - * Ok, it wasn't in the queue. This must be -@@ -611,6 +684,8 @@ - { - int signr; - -+ WARN_ON_ONCE(tsk != current); -+ - /* We only dequeue private signals from ourselves, we don't let - * signalfd steal them - */ -@@ -1207,8 +1282,8 @@ - * We don't want to have recursive SIGSEGV's etc, for example, - * that is why we also clear SIGNAL_UNKILLABLE. - */ --int --force_sig_info(int sig, struct siginfo *info, struct task_struct *t) -+static int -+do_force_sig_info(int sig, struct siginfo *info, struct task_struct *t) - { - unsigned long int flags; - int ret, blocked, ignored; -@@ -1233,6 +1308,39 @@ - return ret; - } - -+int force_sig_info(int sig, struct siginfo *info, struct task_struct *t) -+{ -+/* -+ * On some archs, PREEMPT_RT has to delay sending a signal from a trap -+ * since it can not enable preemption, and the signal code's spin_locks -+ * turn into mutexes. Instead, it must set TIF_NOTIFY_RESUME which will -+ * send the signal on exit of the trap. -+ */ -+#ifdef ARCH_RT_DELAYS_SIGNAL_SEND -+ if (in_atomic()) { -+ if (WARN_ON_ONCE(t != current)) -+ return 0; -+ if (WARN_ON_ONCE(t->forced_info.si_signo)) -+ return 0; -+ -+ if (is_si_special(info)) { -+ WARN_ON_ONCE(info != SEND_SIG_PRIV); -+ t->forced_info.si_signo = sig; -+ t->forced_info.si_errno = 0; -+ t->forced_info.si_code = SI_KERNEL; -+ t->forced_info.si_pid = 0; -+ t->forced_info.si_uid = 0; -+ } else { -+ t->forced_info = *info; -+ } -+ -+ set_tsk_thread_flag(t, TIF_NOTIFY_RESUME); -+ return 0; -+ } -+#endif -+ return do_force_sig_info(sig, info, t); -+} -+ - /* - * Nuke all other threads in the group. - */ -@@ -1267,12 +1375,12 @@ - * Disable interrupts early to avoid deadlocks. - * See rcu_read_unlock() comment header for details. - */ -- local_irq_save(*flags); -+ local_irq_save_nort(*flags); - rcu_read_lock(); - sighand = rcu_dereference(tsk->sighand); - if (unlikely(sighand == NULL)) { - rcu_read_unlock(); -- local_irq_restore(*flags); -+ local_irq_restore_nort(*flags); - break; - } - /* -@@ -1293,7 +1401,7 @@ - } - spin_unlock(&sighand->siglock); - rcu_read_unlock(); -- local_irq_restore(*flags); -+ local_irq_restore_nort(*flags); - } - - return sighand; -@@ -1536,7 +1644,8 @@ - */ - struct sigqueue *sigqueue_alloc(void) - { -- struct sigqueue *q = __sigqueue_alloc(-1, current, GFP_KERNEL, 0); -+ /* Preallocated sigqueue objects always from the slabcache ! */ -+ struct sigqueue *q = __sigqueue_do_alloc(-1, current, GFP_KERNEL, 0, 1); - - if (q) - q->flags |= SIGQUEUE_PREALLOC; -@@ -1897,15 +2006,7 @@ - if (gstop_done && ptrace_reparented(current)) - do_notify_parent_cldstop(current, false, why); - -- /* -- * Don't want to allow preemption here, because -- * sys_ptrace() needs this task to be inactive. -- * -- * XXX: implement read_unlock_no_resched(). -- */ -- preempt_disable(); - read_unlock(&tasklist_lock); -- preempt_enable_no_resched(); - freezable_schedule(); - } else { - /* -diff -Nur linux-4.1.26.orig/kernel/softirq.c linux-4.1.26/kernel/softirq.c ---- linux-4.1.26.orig/kernel/softirq.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/softirq.c 2016-06-19 15:30:58.707298121 +0200 -@@ -21,10 +21,12 @@ - #include - #include - #include -+#include - #include - #include - #include - #include -+#include - #include - - #define CREATE_TRACE_POINTS -@@ -56,12 +58,108 @@ - static struct softirq_action softirq_vec[NR_SOFTIRQS] __cacheline_aligned_in_smp; - - DEFINE_PER_CPU(struct task_struct *, ksoftirqd); -+#ifdef CONFIG_PREEMPT_RT_FULL -+#define TIMER_SOFTIRQS ((1 << TIMER_SOFTIRQ) | (1 << HRTIMER_SOFTIRQ)) -+DEFINE_PER_CPU(struct task_struct *, ktimer_softirqd); -+#endif - - const char * const softirq_to_name[NR_SOFTIRQS] = { - "HI", "TIMER", "NET_TX", "NET_RX", "BLOCK", "BLOCK_IOPOLL", - "TASKLET", "SCHED", "HRTIMER", "RCU" - }; - -+#ifdef CONFIG_NO_HZ_COMMON -+# ifdef CONFIG_PREEMPT_RT_FULL -+ -+struct softirq_runner { -+ struct task_struct *runner[NR_SOFTIRQS]; -+}; -+ -+static DEFINE_PER_CPU(struct softirq_runner, softirq_runners); -+ -+static inline void softirq_set_runner(unsigned int sirq) -+{ -+ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); -+ -+ sr->runner[sirq] = current; -+} -+ -+static inline void softirq_clr_runner(unsigned int sirq) -+{ -+ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); -+ -+ sr->runner[sirq] = NULL; -+} -+ -+/* -+ * On preempt-rt a softirq running context might be blocked on a -+ * lock. There might be no other runnable task on this CPU because the -+ * lock owner runs on some other CPU. So we have to go into idle with -+ * the pending bit set. Therefor we need to check this otherwise we -+ * warn about false positives which confuses users and defeats the -+ * whole purpose of this test. -+ * -+ * This code is called with interrupts disabled. -+ */ -+void softirq_check_pending_idle(void) -+{ -+ static int rate_limit; -+ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); -+ u32 warnpending; -+ int i; -+ -+ if (rate_limit >= 10) -+ return; -+ -+ warnpending = local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK; -+ for (i = 0; i < NR_SOFTIRQS; i++) { -+ struct task_struct *tsk = sr->runner[i]; -+ -+ /* -+ * The wakeup code in rtmutex.c wakes up the task -+ * _before_ it sets pi_blocked_on to NULL under -+ * tsk->pi_lock. So we need to check for both: state -+ * and pi_blocked_on. -+ */ -+ if (tsk) { -+ raw_spin_lock(&tsk->pi_lock); -+ if (tsk->pi_blocked_on || tsk->state == TASK_RUNNING) { -+ /* Clear all bits pending in that task */ -+ warnpending &= ~(tsk->softirqs_raised); -+ warnpending &= ~(1 << i); -+ } -+ raw_spin_unlock(&tsk->pi_lock); -+ } -+ } -+ -+ if (warnpending) { -+ printk(KERN_ERR "NOHZ: local_softirq_pending %02x\n", -+ warnpending); -+ rate_limit++; -+ } -+} -+# else -+/* -+ * On !PREEMPT_RT we just printk rate limited: -+ */ -+void softirq_check_pending_idle(void) -+{ -+ static int rate_limit; -+ -+ if (rate_limit < 10 && -+ (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { -+ printk(KERN_ERR "NOHZ: local_softirq_pending %02x\n", -+ local_softirq_pending()); -+ rate_limit++; -+ } -+} -+# endif -+ -+#else /* !CONFIG_NO_HZ_COMMON */ -+static inline void softirq_set_runner(unsigned int sirq) { } -+static inline void softirq_clr_runner(unsigned int sirq) { } -+#endif -+ - /* - * we cannot loop indefinitely here to avoid userspace starvation, - * but we also don't want to introduce a worst case 1/HZ latency -@@ -77,6 +175,79 @@ - wake_up_process(tsk); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static void wakeup_timer_softirqd(void) -+{ -+ /* Interrupts are disabled: no need to stop preemption */ -+ struct task_struct *tsk = __this_cpu_read(ktimer_softirqd); -+ -+ if (tsk && tsk->state != TASK_RUNNING) -+ wake_up_process(tsk); -+} -+#endif -+ -+static void handle_softirq(unsigned int vec_nr) -+{ -+ struct softirq_action *h = softirq_vec + vec_nr; -+ int prev_count; -+ -+ prev_count = preempt_count(); -+ -+ kstat_incr_softirqs_this_cpu(vec_nr); -+ -+ trace_softirq_entry(vec_nr); -+ h->action(h); -+ trace_softirq_exit(vec_nr); -+ if (unlikely(prev_count != preempt_count())) { -+ pr_err("huh, entered softirq %u %s %p with preempt_count %08x, exited with %08x?\n", -+ vec_nr, softirq_to_name[vec_nr], h->action, -+ prev_count, preempt_count()); -+ preempt_count_set(prev_count); -+ } -+} -+ -+#ifndef CONFIG_PREEMPT_RT_FULL -+static inline int ksoftirqd_softirq_pending(void) -+{ -+ return local_softirq_pending(); -+} -+ -+static void handle_pending_softirqs(u32 pending) -+{ -+ struct softirq_action *h = softirq_vec; -+ int softirq_bit; -+ -+ local_irq_enable(); -+ -+ h = softirq_vec; -+ -+ while ((softirq_bit = ffs(pending))) { -+ unsigned int vec_nr; -+ -+ h += softirq_bit - 1; -+ vec_nr = h - softirq_vec; -+ handle_softirq(vec_nr); -+ -+ h++; -+ pending >>= softirq_bit; -+ } -+ -+ rcu_bh_qs(); -+ local_irq_disable(); -+} -+ -+static void run_ksoftirqd(unsigned int cpu) -+{ -+ local_irq_disable(); -+ if (ksoftirqd_softirq_pending()) { -+ __do_softirq(); -+ local_irq_enable(); -+ cond_resched_rcu_qs(); -+ return; -+ } -+ local_irq_enable(); -+} -+ - /* - * preempt_count and SOFTIRQ_OFFSET usage: - * - preempt_count is changed by SOFTIRQ_OFFSET on entering or leaving -@@ -116,9 +287,9 @@ - - if (preempt_count() == cnt) { - #ifdef CONFIG_DEBUG_PREEMPT -- current->preempt_disable_ip = get_parent_ip(CALLER_ADDR1); -+ current->preempt_disable_ip = get_lock_parent_ip(); - #endif -- trace_preempt_off(CALLER_ADDR0, get_parent_ip(CALLER_ADDR1)); -+ trace_preempt_off(CALLER_ADDR0, get_lock_parent_ip()); - } - } - EXPORT_SYMBOL(__local_bh_disable_ip); -@@ -232,10 +403,8 @@ - unsigned long end = jiffies + MAX_SOFTIRQ_TIME; - unsigned long old_flags = current->flags; - int max_restart = MAX_SOFTIRQ_RESTART; -- struct softirq_action *h; - bool in_hardirq; - __u32 pending; -- int softirq_bit; - - /* - * Mask out PF_MEMALLOC s current task context is borrowed for the -@@ -254,36 +423,7 @@ - /* Reset the pending bitmask before enabling irqs */ - set_softirq_pending(0); - -- local_irq_enable(); -- -- h = softirq_vec; -- -- while ((softirq_bit = ffs(pending))) { -- unsigned int vec_nr; -- int prev_count; -- -- h += softirq_bit - 1; -- -- vec_nr = h - softirq_vec; -- prev_count = preempt_count(); -- -- kstat_incr_softirqs_this_cpu(vec_nr); -- -- trace_softirq_entry(vec_nr); -- h->action(h); -- trace_softirq_exit(vec_nr); -- if (unlikely(prev_count != preempt_count())) { -- pr_err("huh, entered softirq %u %s %p with preempt_count %08x, exited with %08x?\n", -- vec_nr, softirq_to_name[vec_nr], h->action, -- prev_count, preempt_count()); -- preempt_count_set(prev_count); -- } -- h++; -- pending >>= softirq_bit; -- } -- -- rcu_bh_qs(); -- local_irq_disable(); -+ handle_pending_softirqs(pending); - - pending = local_softirq_pending(); - if (pending) { -@@ -320,6 +460,310 @@ - } - - /* -+ * This function must run with irqs disabled! -+ */ -+void raise_softirq_irqoff(unsigned int nr) -+{ -+ __raise_softirq_irqoff(nr); -+ -+ /* -+ * If we're in an interrupt or softirq, we're done -+ * (this also catches softirq-disabled code). We will -+ * actually run the softirq once we return from -+ * the irq or softirq. -+ * -+ * Otherwise we wake up ksoftirqd to make sure we -+ * schedule the softirq soon. -+ */ -+ if (!in_interrupt()) -+ wakeup_softirqd(); -+} -+ -+void __raise_softirq_irqoff(unsigned int nr) -+{ -+ trace_softirq_raise(nr); -+ or_softirq_pending(1UL << nr); -+} -+ -+static inline void local_bh_disable_nort(void) { local_bh_disable(); } -+static inline void _local_bh_enable_nort(void) { _local_bh_enable(); } -+static void ksoftirqd_set_sched_params(unsigned int cpu) { } -+ -+#else /* !PREEMPT_RT_FULL */ -+ -+/* -+ * On RT we serialize softirq execution with a cpu local lock per softirq -+ */ -+static DEFINE_PER_CPU(struct local_irq_lock [NR_SOFTIRQS], local_softirq_locks); -+ -+void __init softirq_early_init(void) -+{ -+ int i; -+ -+ for (i = 0; i < NR_SOFTIRQS; i++) -+ local_irq_lock_init(local_softirq_locks[i]); -+} -+ -+static void lock_softirq(int which) -+{ -+ local_lock(local_softirq_locks[which]); -+} -+ -+static void unlock_softirq(int which) -+{ -+ local_unlock(local_softirq_locks[which]); -+} -+ -+static void do_single_softirq(int which) -+{ -+ unsigned long old_flags = current->flags; -+ -+ current->flags &= ~PF_MEMALLOC; -+ vtime_account_irq_enter(current); -+ current->flags |= PF_IN_SOFTIRQ; -+ lockdep_softirq_enter(); -+ local_irq_enable(); -+ handle_softirq(which); -+ local_irq_disable(); -+ lockdep_softirq_exit(); -+ current->flags &= ~PF_IN_SOFTIRQ; -+ vtime_account_irq_enter(current); -+ tsk_restore_flags(current, old_flags, PF_MEMALLOC); -+} -+ -+/* -+ * Called with interrupts disabled. Process softirqs which were raised -+ * in current context (or on behalf of ksoftirqd). -+ */ -+static void do_current_softirqs(void) -+{ -+ while (current->softirqs_raised) { -+ int i = __ffs(current->softirqs_raised); -+ unsigned int pending, mask = (1U << i); -+ -+ current->softirqs_raised &= ~mask; -+ local_irq_enable(); -+ -+ /* -+ * If the lock is contended, we boost the owner to -+ * process the softirq or leave the critical section -+ * now. -+ */ -+ lock_softirq(i); -+ local_irq_disable(); -+ softirq_set_runner(i); -+ /* -+ * Check with the local_softirq_pending() bits, -+ * whether we need to process this still or if someone -+ * else took care of it. -+ */ -+ pending = local_softirq_pending(); -+ if (pending & mask) { -+ set_softirq_pending(pending & ~mask); -+ do_single_softirq(i); -+ } -+ softirq_clr_runner(i); -+ WARN_ON(current->softirq_nestcnt != 1); -+ local_irq_enable(); -+ unlock_softirq(i); -+ local_irq_disable(); -+ } -+} -+ -+void __local_bh_disable(void) -+{ -+ if (++current->softirq_nestcnt == 1) -+ migrate_disable(); -+} -+EXPORT_SYMBOL(__local_bh_disable); -+ -+void __local_bh_enable(void) -+{ -+ if (WARN_ON(current->softirq_nestcnt == 0)) -+ return; -+ -+ local_irq_disable(); -+ if (current->softirq_nestcnt == 1 && current->softirqs_raised) -+ do_current_softirqs(); -+ local_irq_enable(); -+ -+ if (--current->softirq_nestcnt == 0) -+ migrate_enable(); -+} -+EXPORT_SYMBOL(__local_bh_enable); -+ -+void _local_bh_enable(void) -+{ -+ if (WARN_ON(current->softirq_nestcnt == 0)) -+ return; -+ if (--current->softirq_nestcnt == 0) -+ migrate_enable(); -+} -+EXPORT_SYMBOL(_local_bh_enable); -+ -+int in_serving_softirq(void) -+{ -+ return current->flags & PF_IN_SOFTIRQ; -+} -+EXPORT_SYMBOL(in_serving_softirq); -+ -+/* Called with preemption disabled */ -+static void run_ksoftirqd(unsigned int cpu) -+{ -+ local_irq_disable(); -+ current->softirq_nestcnt++; -+ -+ do_current_softirqs(); -+ current->softirq_nestcnt--; -+ local_irq_enable(); -+ cond_resched_rcu_qs(); -+} -+ -+/* -+ * Called from netif_rx_ni(). Preemption enabled, but migration -+ * disabled. So the cpu can't go away under us. -+ */ -+void thread_do_softirq(void) -+{ -+ if (!in_serving_softirq() && current->softirqs_raised) { -+ current->softirq_nestcnt++; -+ do_current_softirqs(); -+ current->softirq_nestcnt--; -+ } -+} -+ -+static void do_raise_softirq_irqoff(unsigned int nr) -+{ -+ unsigned int mask; -+ -+ mask = 1UL << nr; -+ -+ trace_softirq_raise(nr); -+ or_softirq_pending(mask); -+ -+ /* -+ * If we are not in a hard interrupt and inside a bh disabled -+ * region, we simply raise the flag on current. local_bh_enable() -+ * will make sure that the softirq is executed. Otherwise we -+ * delegate it to ksoftirqd. -+ */ -+ if (!in_irq() && current->softirq_nestcnt) -+ current->softirqs_raised |= mask; -+ else if (!__this_cpu_read(ksoftirqd) || !__this_cpu_read(ktimer_softirqd)) -+ return; -+ -+ if (mask & TIMER_SOFTIRQS) -+ __this_cpu_read(ktimer_softirqd)->softirqs_raised |= mask; -+ else -+ __this_cpu_read(ksoftirqd)->softirqs_raised |= mask; -+} -+ -+static void wakeup_proper_softirq(unsigned int nr) -+{ -+ if ((1UL << nr) & TIMER_SOFTIRQS) -+ wakeup_timer_softirqd(); -+ else -+ wakeup_softirqd(); -+} -+ -+ -+void __raise_softirq_irqoff(unsigned int nr) -+{ -+ do_raise_softirq_irqoff(nr); -+ if (!in_irq() && !current->softirq_nestcnt) -+ wakeup_proper_softirq(nr); -+} -+ -+/* -+ * Same as __raise_softirq_irqoff() but will process them in ksoftirqd -+ */ -+void __raise_softirq_irqoff_ksoft(unsigned int nr) -+{ -+ unsigned int mask; -+ -+ if (WARN_ON_ONCE(!__this_cpu_read(ksoftirqd) || -+ !__this_cpu_read(ktimer_softirqd))) -+ return; -+ mask = 1UL << nr; -+ -+ trace_softirq_raise(nr); -+ or_softirq_pending(mask); -+ if (mask & TIMER_SOFTIRQS) -+ __this_cpu_read(ktimer_softirqd)->softirqs_raised |= mask; -+ else -+ __this_cpu_read(ksoftirqd)->softirqs_raised |= mask; -+ wakeup_proper_softirq(nr); -+} -+ -+/* -+ * This function must run with irqs disabled! -+ */ -+void raise_softirq_irqoff(unsigned int nr) -+{ -+ do_raise_softirq_irqoff(nr); -+ -+ /* -+ * If we're in an hard interrupt we let irq return code deal -+ * with the wakeup of ksoftirqd. -+ */ -+ if (in_irq()) -+ return; -+ /* -+ * If we are in thread context but outside of a bh disabled -+ * region, we need to wake ksoftirqd as well. -+ * -+ * CHECKME: Some of the places which do that could be wrapped -+ * into local_bh_disable/enable pairs. Though it's unclear -+ * whether this is worth the effort. To find those places just -+ * raise a WARN() if the condition is met. -+ */ -+ if (!current->softirq_nestcnt) -+ wakeup_proper_softirq(nr); -+} -+ -+static inline int ksoftirqd_softirq_pending(void) -+{ -+ return current->softirqs_raised; -+} -+ -+static inline void local_bh_disable_nort(void) { } -+static inline void _local_bh_enable_nort(void) { } -+ -+static inline void ksoftirqd_set_sched_params(unsigned int cpu) -+{ -+ /* Take over all but timer pending softirqs when starting */ -+ local_irq_disable(); -+ current->softirqs_raised = local_softirq_pending() & ~TIMER_SOFTIRQS; -+ local_irq_enable(); -+} -+ -+static inline void ktimer_softirqd_set_sched_params(unsigned int cpu) -+{ -+ struct sched_param param = { .sched_priority = 1 }; -+ -+ sched_setscheduler(current, SCHED_FIFO, ¶m); -+ -+ /* Take over timer pending softirqs when starting */ -+ local_irq_disable(); -+ current->softirqs_raised = local_softirq_pending() & TIMER_SOFTIRQS; -+ local_irq_enable(); -+} -+ -+static inline void ktimer_softirqd_clr_sched_params(unsigned int cpu, -+ bool online) -+{ -+ struct sched_param param = { .sched_priority = 0 }; -+ -+ sched_setscheduler(current, SCHED_NORMAL, ¶m); -+} -+ -+static int ktimer_softirqd_should_run(unsigned int cpu) -+{ -+ return current->softirqs_raised; -+} -+ -+#endif /* PREEMPT_RT_FULL */ -+/* - * Enter an interrupt context. - */ - void irq_enter(void) -@@ -330,9 +774,9 @@ - * Prevent raise_softirq from needlessly waking up ksoftirqd - * here, as softirq will be serviced on return from interrupt. - */ -- local_bh_disable(); -+ local_bh_disable_nort(); - tick_irq_enter(); -- _local_bh_enable(); -+ _local_bh_enable_nort(); - } - - __irq_enter(); -@@ -340,6 +784,7 @@ - - static inline void invoke_softirq(void) - { -+#ifndef CONFIG_PREEMPT_RT_FULL - if (!force_irqthreads) { - #ifdef CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK - /* -@@ -359,6 +804,18 @@ - } else { - wakeup_softirqd(); - } -+#else /* PREEMPT_RT_FULL */ -+ unsigned long flags; -+ -+ local_irq_save(flags); -+ if (__this_cpu_read(ksoftirqd) && -+ __this_cpu_read(ksoftirqd)->softirqs_raised) -+ wakeup_softirqd(); -+ if (__this_cpu_read(ktimer_softirqd) && -+ __this_cpu_read(ktimer_softirqd)->softirqs_raised) -+ wakeup_timer_softirqd(); -+ local_irq_restore(flags); -+#endif - } - - static inline void tick_irq_exit(void) -@@ -395,26 +852,6 @@ - trace_hardirq_exit(); /* must be last! */ - } - --/* -- * This function must run with irqs disabled! -- */ --inline void raise_softirq_irqoff(unsigned int nr) --{ -- __raise_softirq_irqoff(nr); -- -- /* -- * If we're in an interrupt or softirq, we're done -- * (this also catches softirq-disabled code). We will -- * actually run the softirq once we return from -- * the irq or softirq. -- * -- * Otherwise we wake up ksoftirqd to make sure we -- * schedule the softirq soon. -- */ -- if (!in_interrupt()) -- wakeup_softirqd(); --} -- - void raise_softirq(unsigned int nr) - { - unsigned long flags; -@@ -424,12 +861,6 @@ - local_irq_restore(flags); - } - --void __raise_softirq_irqoff(unsigned int nr) --{ -- trace_softirq_raise(nr); -- or_softirq_pending(1UL << nr); --} -- - void open_softirq(int nr, void (*action)(struct softirq_action *)) - { - softirq_vec[nr].action = action; -@@ -446,15 +877,45 @@ - static DEFINE_PER_CPU(struct tasklet_head, tasklet_vec); - static DEFINE_PER_CPU(struct tasklet_head, tasklet_hi_vec); - -+static void inline -+__tasklet_common_schedule(struct tasklet_struct *t, struct tasklet_head *head, unsigned int nr) -+{ -+ if (tasklet_trylock(t)) { -+again: -+ /* We may have been preempted before tasklet_trylock -+ * and __tasklet_action may have already run. -+ * So double check the sched bit while the takslet -+ * is locked before adding it to the list. -+ */ -+ if (test_bit(TASKLET_STATE_SCHED, &t->state)) { -+ t->next = NULL; -+ *head->tail = t; -+ head->tail = &(t->next); -+ raise_softirq_irqoff(nr); -+ tasklet_unlock(t); -+ } else { -+ /* This is subtle. If we hit the corner case above -+ * It is possible that we get preempted right here, -+ * and another task has successfully called -+ * tasklet_schedule(), then this function, and -+ * failed on the trylock. Thus we must be sure -+ * before releasing the tasklet lock, that the -+ * SCHED_BIT is clear. Otherwise the tasklet -+ * may get its SCHED_BIT set, but not added to the -+ * list -+ */ -+ if (!tasklet_tryunlock(t)) -+ goto again; -+ } -+ } -+} -+ - void __tasklet_schedule(struct tasklet_struct *t) - { - unsigned long flags; - - local_irq_save(flags); -- t->next = NULL; -- *__this_cpu_read(tasklet_vec.tail) = t; -- __this_cpu_write(tasklet_vec.tail, &(t->next)); -- raise_softirq_irqoff(TASKLET_SOFTIRQ); -+ __tasklet_common_schedule(t, this_cpu_ptr(&tasklet_vec), TASKLET_SOFTIRQ); - local_irq_restore(flags); - } - EXPORT_SYMBOL(__tasklet_schedule); -@@ -464,10 +925,7 @@ - unsigned long flags; - - local_irq_save(flags); -- t->next = NULL; -- *__this_cpu_read(tasklet_hi_vec.tail) = t; -- __this_cpu_write(tasklet_hi_vec.tail, &(t->next)); -- raise_softirq_irqoff(HI_SOFTIRQ); -+ __tasklet_common_schedule(t, this_cpu_ptr(&tasklet_hi_vec), HI_SOFTIRQ); - local_irq_restore(flags); - } - EXPORT_SYMBOL(__tasklet_hi_schedule); -@@ -476,82 +934,122 @@ - { - BUG_ON(!irqs_disabled()); - -- t->next = __this_cpu_read(tasklet_hi_vec.head); -- __this_cpu_write(tasklet_hi_vec.head, t); -- __raise_softirq_irqoff(HI_SOFTIRQ); -+ __tasklet_hi_schedule(t); - } - EXPORT_SYMBOL(__tasklet_hi_schedule_first); - --static void tasklet_action(struct softirq_action *a) -+void tasklet_enable(struct tasklet_struct *t) - { -- struct tasklet_struct *list; -+ if (!atomic_dec_and_test(&t->count)) -+ return; -+ if (test_and_clear_bit(TASKLET_STATE_PENDING, &t->state)) -+ tasklet_schedule(t); -+} -+EXPORT_SYMBOL(tasklet_enable); - -- local_irq_disable(); -- list = __this_cpu_read(tasklet_vec.head); -- __this_cpu_write(tasklet_vec.head, NULL); -- __this_cpu_write(tasklet_vec.tail, this_cpu_ptr(&tasklet_vec.head)); -- local_irq_enable(); -+static void __tasklet_action(struct softirq_action *a, -+ struct tasklet_struct *list) -+{ -+ int loops = 1000000; - - while (list) { - struct tasklet_struct *t = list; - - list = list->next; - -- if (tasklet_trylock(t)) { -- if (!atomic_read(&t->count)) { -- if (!test_and_clear_bit(TASKLET_STATE_SCHED, -- &t->state)) -- BUG(); -- t->func(t->data); -- tasklet_unlock(t); -- continue; -- } -- tasklet_unlock(t); -+ /* -+ * Should always succeed - after a tasklist got on the -+ * list (after getting the SCHED bit set from 0 to 1), -+ * nothing but the tasklet softirq it got queued to can -+ * lock it: -+ */ -+ if (!tasklet_trylock(t)) { -+ WARN_ON(1); -+ continue; - } - -- local_irq_disable(); - t->next = NULL; -- *__this_cpu_read(tasklet_vec.tail) = t; -- __this_cpu_write(tasklet_vec.tail, &(t->next)); -- __raise_softirq_irqoff(TASKLET_SOFTIRQ); -- local_irq_enable(); -+ -+ /* -+ * If we cannot handle the tasklet because it's disabled, -+ * mark it as pending. tasklet_enable() will later -+ * re-schedule the tasklet. -+ */ -+ if (unlikely(atomic_read(&t->count))) { -+out_disabled: -+ /* implicit unlock: */ -+ wmb(); -+ t->state = TASKLET_STATEF_PENDING; -+ continue; -+ } -+ -+ /* -+ * After this point on the tasklet might be rescheduled -+ * on another CPU, but it can only be added to another -+ * CPU's tasklet list if we unlock the tasklet (which we -+ * dont do yet). -+ */ -+ if (!test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) -+ WARN_ON(1); -+ -+again: -+ t->func(t->data); -+ -+ /* -+ * Try to unlock the tasklet. We must use cmpxchg, because -+ * another CPU might have scheduled or disabled the tasklet. -+ * We only allow the STATE_RUN -> 0 transition here. -+ */ -+ while (!tasklet_tryunlock(t)) { -+ /* -+ * If it got disabled meanwhile, bail out: -+ */ -+ if (atomic_read(&t->count)) -+ goto out_disabled; -+ /* -+ * If it got scheduled meanwhile, re-execute -+ * the tasklet function: -+ */ -+ if (test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) -+ goto again; -+ if (!--loops) { -+ printk("hm, tasklet state: %08lx\n", t->state); -+ WARN_ON(1); -+ tasklet_unlock(t); -+ break; -+ } -+ } - } - } - -+static void tasklet_action(struct softirq_action *a) -+{ -+ struct tasklet_struct *list; -+ -+ local_irq_disable(); -+ -+ list = __this_cpu_read(tasklet_vec.head); -+ __this_cpu_write(tasklet_vec.head, NULL); -+ __this_cpu_write(tasklet_vec.tail, this_cpu_ptr(&tasklet_vec.head)); -+ -+ local_irq_enable(); -+ -+ __tasklet_action(a, list); -+} -+ - static void tasklet_hi_action(struct softirq_action *a) - { - struct tasklet_struct *list; - - local_irq_disable(); -+ - list = __this_cpu_read(tasklet_hi_vec.head); - __this_cpu_write(tasklet_hi_vec.head, NULL); - __this_cpu_write(tasklet_hi_vec.tail, this_cpu_ptr(&tasklet_hi_vec.head)); -- local_irq_enable(); - -- while (list) { -- struct tasklet_struct *t = list; -- -- list = list->next; -- -- if (tasklet_trylock(t)) { -- if (!atomic_read(&t->count)) { -- if (!test_and_clear_bit(TASKLET_STATE_SCHED, -- &t->state)) -- BUG(); -- t->func(t->data); -- tasklet_unlock(t); -- continue; -- } -- tasklet_unlock(t); -- } -+ local_irq_enable(); - -- local_irq_disable(); -- t->next = NULL; -- *__this_cpu_read(tasklet_hi_vec.tail) = t; -- __this_cpu_write(tasklet_hi_vec.tail, &(t->next)); -- __raise_softirq_irqoff(HI_SOFTIRQ); -- local_irq_enable(); -- } -+ __tasklet_action(a, list); - } - - void tasklet_init(struct tasklet_struct *t, -@@ -572,7 +1070,7 @@ - - while (test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) { - do { -- yield(); -+ msleep(1); - } while (test_bit(TASKLET_STATE_SCHED, &t->state)); - } - tasklet_unlock_wait(t); -@@ -646,25 +1144,26 @@ - open_softirq(HI_SOFTIRQ, tasklet_hi_action); - } - --static int ksoftirqd_should_run(unsigned int cpu) --{ -- return local_softirq_pending(); --} -- --static void run_ksoftirqd(unsigned int cpu) -+#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) -+void tasklet_unlock_wait(struct tasklet_struct *t) - { -- local_irq_disable(); -- if (local_softirq_pending()) { -+ while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { - /* -- * We can safely run softirq on inline stack, as we are not deep -- * in the task stack here. -+ * Hack for now to avoid this busy-loop: - */ -- __do_softirq(); -- local_irq_enable(); -- cond_resched_rcu_qs(); -- return; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ msleep(1); -+#else -+ barrier(); -+#endif - } -- local_irq_enable(); -+} -+EXPORT_SYMBOL(tasklet_unlock_wait); -+#endif -+ -+static int ksoftirqd_should_run(unsigned int cpu) -+{ -+ return ksoftirqd_softirq_pending(); - } - - #ifdef CONFIG_HOTPLUG_CPU -@@ -746,16 +1245,31 @@ - - static struct smp_hotplug_thread softirq_threads = { - .store = &ksoftirqd, -+ .setup = ksoftirqd_set_sched_params, - .thread_should_run = ksoftirqd_should_run, - .thread_fn = run_ksoftirqd, - .thread_comm = "ksoftirqd/%u", - }; - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static struct smp_hotplug_thread softirq_timer_threads = { -+ .store = &ktimer_softirqd, -+ .setup = ktimer_softirqd_set_sched_params, -+ .cleanup = ktimer_softirqd_clr_sched_params, -+ .thread_should_run = ktimer_softirqd_should_run, -+ .thread_fn = run_ksoftirqd, -+ .thread_comm = "ktimersoftd/%u", -+}; -+#endif -+ - static __init int spawn_ksoftirqd(void) - { - register_cpu_notifier(&cpu_nfb); - - BUG_ON(smpboot_register_percpu_thread(&softirq_threads)); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ BUG_ON(smpboot_register_percpu_thread(&softirq_timer_threads)); -+#endif - - return 0; - } -diff -Nur linux-4.1.26.orig/kernel/stop_machine.c linux-4.1.26/kernel/stop_machine.c ---- linux-4.1.26.orig/kernel/stop_machine.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/stop_machine.c 2016-06-19 15:30:58.707298121 +0200 -@@ -35,7 +35,7 @@ - - /* the actual stopper, one per every possible cpu, enabled on online cpus */ - struct cpu_stopper { -- spinlock_t lock; -+ raw_spinlock_t lock; - bool enabled; /* is this stopper enabled? */ - struct list_head works; /* list of pending works */ - }; -@@ -78,7 +78,7 @@ - - unsigned long flags; - -- spin_lock_irqsave(&stopper->lock, flags); -+ raw_spin_lock_irqsave(&stopper->lock, flags); - - if (stopper->enabled) { - list_add_tail(&work->list, &stopper->works); -@@ -86,7 +86,7 @@ - } else - cpu_stop_signal_done(work->done, false); - -- spin_unlock_irqrestore(&stopper->lock, flags); -+ raw_spin_unlock_irqrestore(&stopper->lock, flags); - } - - /** -@@ -248,7 +248,7 @@ - struct irq_cpu_stop_queue_work_info call_args; - struct multi_stop_data msdata; - -- preempt_disable(); -+ preempt_disable_nort(); - msdata = (struct multi_stop_data){ - .fn = fn, - .data = arg, -@@ -281,7 +281,7 @@ - * This relies on the stopper workqueues to be FIFO. - */ - if (!cpu_active(cpu1) || !cpu_active(cpu2)) { -- preempt_enable(); -+ preempt_enable_nort(); - return -ENOENT; - } - -@@ -295,7 +295,7 @@ - &irq_cpu_stop_queue_work, - &call_args, 1); - lg_local_unlock(&stop_cpus_lock); -- preempt_enable(); -+ preempt_enable_nort(); - - wait_for_completion(&done.completion); - -@@ -329,7 +329,7 @@ - - static void queue_stop_cpus_work(const struct cpumask *cpumask, - cpu_stop_fn_t fn, void *arg, -- struct cpu_stop_done *done) -+ struct cpu_stop_done *done, bool inactive) - { - struct cpu_stop_work *work; - unsigned int cpu; -@@ -343,11 +343,13 @@ - } - - /* -- * Disable preemption while queueing to avoid getting -- * preempted by a stopper which might wait for other stoppers -- * to enter @fn which can lead to deadlock. -+ * Make sure that all work is queued on all cpus before -+ * any of the cpus can execute it. - */ -- lg_global_lock(&stop_cpus_lock); -+ if (!inactive) -+ lg_global_lock(&stop_cpus_lock); -+ else -+ lg_global_trylock_relax(&stop_cpus_lock); - for_each_cpu(cpu, cpumask) - cpu_stop_queue_work(cpu, &per_cpu(stop_cpus_work, cpu)); - lg_global_unlock(&stop_cpus_lock); -@@ -359,7 +361,7 @@ - struct cpu_stop_done done; - - cpu_stop_init_done(&done, cpumask_weight(cpumask)); -- queue_stop_cpus_work(cpumask, fn, arg, &done); -+ queue_stop_cpus_work(cpumask, fn, arg, &done, false); - wait_for_completion(&done.completion); - return done.executed ? done.ret : -ENOENT; - } -@@ -439,9 +441,9 @@ - unsigned long flags; - int run; - -- spin_lock_irqsave(&stopper->lock, flags); -+ raw_spin_lock_irqsave(&stopper->lock, flags); - run = !list_empty(&stopper->works); -- spin_unlock_irqrestore(&stopper->lock, flags); -+ raw_spin_unlock_irqrestore(&stopper->lock, flags); - return run; - } - -@@ -453,13 +455,13 @@ - - repeat: - work = NULL; -- spin_lock_irq(&stopper->lock); -+ raw_spin_lock_irq(&stopper->lock); - if (!list_empty(&stopper->works)) { - work = list_first_entry(&stopper->works, - struct cpu_stop_work, list); - list_del_init(&work->list); - } -- spin_unlock_irq(&stopper->lock); -+ raw_spin_unlock_irq(&stopper->lock); - - if (work) { - cpu_stop_fn_t fn = work->fn; -@@ -467,6 +469,16 @@ - struct cpu_stop_done *done = work->done; - char ksym_buf[KSYM_NAME_LEN] __maybe_unused; - -+ /* -+ * Wait until the stopper finished scheduling on all -+ * cpus -+ */ -+ lg_global_lock(&stop_cpus_lock); -+ /* -+ * Let other cpu threads continue as well -+ */ -+ lg_global_unlock(&stop_cpus_lock); -+ - /* cpu stop callbacks are not allowed to sleep */ - preempt_disable(); - -@@ -500,20 +512,20 @@ - unsigned long flags; - - /* drain remaining works */ -- spin_lock_irqsave(&stopper->lock, flags); -+ raw_spin_lock_irqsave(&stopper->lock, flags); - list_for_each_entry(work, &stopper->works, list) - cpu_stop_signal_done(work->done, false); - stopper->enabled = false; -- spin_unlock_irqrestore(&stopper->lock, flags); -+ raw_spin_unlock_irqrestore(&stopper->lock, flags); - } - - static void cpu_stop_unpark(unsigned int cpu) - { - struct cpu_stopper *stopper = &per_cpu(cpu_stopper, cpu); - -- spin_lock_irq(&stopper->lock); -+ raw_spin_lock_irq(&stopper->lock); - stopper->enabled = true; -- spin_unlock_irq(&stopper->lock); -+ raw_spin_unlock_irq(&stopper->lock); - } - - static struct smp_hotplug_thread cpu_stop_threads = { -@@ -535,10 +547,12 @@ - for_each_possible_cpu(cpu) { - struct cpu_stopper *stopper = &per_cpu(cpu_stopper, cpu); - -- spin_lock_init(&stopper->lock); -+ raw_spin_lock_init(&stopper->lock); - INIT_LIST_HEAD(&stopper->works); - } - -+ lg_lock_init(&stop_cpus_lock, "stop_cpus_lock"); -+ - BUG_ON(smpboot_register_percpu_thread(&cpu_stop_threads)); - stop_machine_initialized = true; - return 0; -@@ -634,7 +648,7 @@ - set_state(&msdata, MULTI_STOP_PREPARE); - cpu_stop_init_done(&done, num_active_cpus()); - queue_stop_cpus_work(cpu_active_mask, multi_cpu_stop, &msdata, -- &done); -+ &done, true); - ret = multi_cpu_stop(&msdata); - - /* Busy wait for completion. */ -diff -Nur linux-4.1.26.orig/kernel/time/hrtimer.c linux-4.1.26/kernel/time/hrtimer.c ---- linux-4.1.26.orig/kernel/time/hrtimer.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/hrtimer.c 2016-06-19 15:30:58.707298121 +0200 -@@ -48,11 +48,13 @@ - #include - #include - #include -+#include - #include - - #include - - #include -+#include - - #include "tick-internal.h" - -@@ -576,8 +578,7 @@ - * When the callback is running, we do not reprogram the clock event - * device. The timer callback is either running on a different CPU or - * the callback is executed in the hrtimer_interrupt context. The -- * reprogramming is handled either by the softirq, which called the -- * callback or at the end of the hrtimer_interrupt. -+ * reprogramming is handled at the end of the hrtimer_interrupt. - */ - if (hrtimer_callback_running(timer)) - return 0; -@@ -621,6 +622,9 @@ - return res; - } - -+static void __run_hrtimer(struct hrtimer *timer, ktime_t *now); -+static int hrtimer_rt_defer(struct hrtimer *timer); -+ - /* - * Initialize the high resolution related parts of cpu_base - */ -@@ -630,6 +634,21 @@ - base->hres_active = 0; - } - -+static inline int hrtimer_enqueue_reprogram(struct hrtimer *timer, -+ struct hrtimer_clock_base *base, -+ int wakeup) -+{ -+ if (!hrtimer_reprogram(timer, base)) -+ return 0; -+ if (!wakeup) -+ return -ETIME; -+#ifdef CONFIG_PREEMPT_RT_BASE -+ if (!hrtimer_rt_defer(timer)) -+ return -ETIME; -+#endif -+ return 1; -+} -+ - static inline ktime_t hrtimer_update_base(struct hrtimer_cpu_base *base) - { - ktime_t *offs_real = &base->clock_base[HRTIMER_BASE_REALTIME].offset; -@@ -695,6 +714,44 @@ - - static DECLARE_WORK(hrtimer_work, clock_was_set_work); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * RT can not call schedule_work from real interrupt context. -+ * Need to make a thread to do the real work. -+ */ -+static struct task_struct *clock_set_delay_thread; -+static bool do_clock_set_delay; -+ -+static int run_clock_set_delay(void *ignore) -+{ -+ while (!kthread_should_stop()) { -+ set_current_state(TASK_INTERRUPTIBLE); -+ if (do_clock_set_delay) { -+ do_clock_set_delay = false; -+ schedule_work(&hrtimer_work); -+ } -+ schedule(); -+ } -+ __set_current_state(TASK_RUNNING); -+ return 0; -+} -+ -+void clock_was_set_delayed(void) -+{ -+ do_clock_set_delay = true; -+ /* Make visible before waking up process */ -+ smp_wmb(); -+ wake_up_process(clock_set_delay_thread); -+} -+ -+static __init int create_clock_set_delay_thread(void) -+{ -+ clock_set_delay_thread = kthread_run(run_clock_set_delay, NULL, "kclksetdelayd"); -+ BUG_ON(!clock_set_delay_thread); -+ return 0; -+} -+early_initcall(create_clock_set_delay_thread); -+#else /* PREEMPT_RT_FULL */ - /* - * Called from timekeeping and resume code to reprogramm the hrtimer - * interrupt device on all cpus. -@@ -703,6 +760,7 @@ - { - schedule_work(&hrtimer_work); - } -+#endif - - #else - -@@ -711,6 +769,13 @@ - static inline int hrtimer_switch_to_hres(void) { return 0; } - static inline void - hrtimer_force_reprogram(struct hrtimer_cpu_base *base, int skip_equal) { } -+static inline int hrtimer_enqueue_reprogram(struct hrtimer *timer, -+ struct hrtimer_clock_base *base, -+ int wakeup) -+{ -+ return 0; -+} -+ - static inline int hrtimer_reprogram(struct hrtimer *timer, - struct hrtimer_clock_base *base) - { -@@ -718,7 +783,6 @@ - } - static inline void hrtimer_init_hres(struct hrtimer_cpu_base *base) { } - static inline void retrigger_next_event(void *arg) { } -- - #endif /* CONFIG_HIGH_RES_TIMERS */ - - /* -@@ -836,6 +900,32 @@ - } - EXPORT_SYMBOL_GPL(hrtimer_forward); - -+#ifdef CONFIG_PREEMPT_RT_BASE -+# define wake_up_timer_waiters(b) wake_up(&(b)->wait) -+ -+/** -+ * hrtimer_wait_for_timer - Wait for a running timer -+ * -+ * @timer: timer to wait for -+ * -+ * The function waits in case the timers callback function is -+ * currently executed on the waitqueue of the timer base. The -+ * waitqueue is woken up after the timer callback function has -+ * finished execution. -+ */ -+void hrtimer_wait_for_timer(const struct hrtimer *timer) -+{ -+ struct hrtimer_clock_base *base = timer->base; -+ -+ if (base && base->cpu_base && !timer->irqsafe) -+ wait_event(base->cpu_base->wait, -+ !(timer->state & HRTIMER_STATE_CALLBACK)); -+} -+ -+#else -+# define wake_up_timer_waiters(b) do { } while (0) -+#endif -+ - /* - * enqueue_hrtimer - internal function to (re)start a timer - * -@@ -879,6 +969,11 @@ - if (!(timer->state & HRTIMER_STATE_ENQUEUED)) - goto out; - -+ if (unlikely(!list_empty(&timer->cb_entry))) { -+ list_del_init(&timer->cb_entry); -+ goto out; -+ } -+ - next_timer = timerqueue_getnext(&base->active); - timerqueue_del(&base->active, &timer->node); - if (&timer->node == next_timer) { -@@ -966,7 +1061,16 @@ - new_base = switch_hrtimer_base(timer, base, mode & HRTIMER_MODE_PINNED); - - timer_stats_hrtimer_set_start_info(timer); -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ { -+ ktime_t now = new_base->get_time(); - -+ if (ktime_to_ns(tim) < ktime_to_ns(now)) -+ timer->praecox = now; -+ else -+ timer->praecox = ktime_set(0, 0); -+ } -+#endif - leftmost = enqueue_hrtimer(timer, new_base); - - if (!leftmost) { -@@ -980,15 +1084,26 @@ - * on dynticks target. - */ - wake_up_nohz_cpu(new_base->cpu_base->cpu); -- } else if (new_base->cpu_base == this_cpu_ptr(&hrtimer_bases) && -- hrtimer_reprogram(timer, new_base)) { -+ } else if (new_base->cpu_base == this_cpu_ptr(&hrtimer_bases)) { -+ -+ ret = hrtimer_enqueue_reprogram(timer, new_base, wakeup); -+ if (ret < 0) { -+ /* -+ * In case we failed to reprogram the timer (mostly -+ * because out current timer is already elapsed), -+ * remove it again and report a failure. This avoids -+ * stale base->first entries. -+ */ -+ debug_deactivate(timer); -+ __remove_hrtimer(timer, new_base, -+ timer->state & HRTIMER_STATE_CALLBACK, 0); -+ } else if (ret > 0) { - /* - * Only allow reprogramming if the new base is on this CPU. - * (it might still be on another CPU if the timer was pending) - * - * XXX send_remote_softirq() ? - */ -- if (wakeup) { - /* - * We need to drop cpu_base->lock to avoid a - * lock ordering issue vs. rq->lock. -@@ -996,9 +1111,7 @@ - raw_spin_unlock(&new_base->cpu_base->lock); - raise_softirq_irqoff(HRTIMER_SOFTIRQ); - local_irq_restore(flags); -- return ret; -- } else { -- __raise_softirq_irqoff(HRTIMER_SOFTIRQ); -+ return 0; - } - } - -@@ -1089,7 +1202,7 @@ - - if (ret >= 0) - return ret; -- cpu_relax(); -+ hrtimer_wait_for_timer(timer); - } - } - EXPORT_SYMBOL_GPL(hrtimer_cancel); -@@ -1153,6 +1266,7 @@ - - base = hrtimer_clockid_to_base(clock_id); - timer->base = &cpu_base->clock_base[base]; -+ INIT_LIST_HEAD(&timer->cb_entry); - timerqueue_init(&timer->node); - - #ifdef CONFIG_TIMER_STATS -@@ -1236,6 +1350,126 @@ - timer->state &= ~HRTIMER_STATE_CALLBACK; - } - -+static enum hrtimer_restart hrtimer_wakeup(struct hrtimer *timer); -+ -+#ifdef CONFIG_PREEMPT_RT_BASE -+static void hrtimer_rt_reprogram(int restart, struct hrtimer *timer, -+ struct hrtimer_clock_base *base) -+{ -+ /* -+ * Note, we clear the callback flag before we requeue the -+ * timer otherwise we trigger the callback_running() check -+ * in hrtimer_reprogram(). -+ */ -+ timer->state &= ~HRTIMER_STATE_CALLBACK; -+ -+ if (restart != HRTIMER_NORESTART) { -+ BUG_ON(hrtimer_active(timer)); -+ /* -+ * Enqueue the timer, if it's the leftmost timer then -+ * we need to reprogram it. -+ */ -+ if (!enqueue_hrtimer(timer, base)) -+ return; -+ -+#ifndef CONFIG_HIGH_RES_TIMERS -+ } -+#else -+ if (base->cpu_base->hres_active && -+ hrtimer_reprogram(timer, base)) -+ goto requeue; -+ -+ } else if (hrtimer_active(timer)) { -+ /* -+ * If the timer was rearmed on another CPU, reprogram -+ * the event device. -+ */ -+ if (&timer->node == base->active.next && -+ base->cpu_base->hres_active && -+ hrtimer_reprogram(timer, base)) -+ goto requeue; -+ } -+ return; -+ -+requeue: -+ /* -+ * Timer is expired. Thus move it from tree to pending list -+ * again. -+ */ -+ __remove_hrtimer(timer, base, timer->state, 0); -+ list_add_tail(&timer->cb_entry, &base->expired); -+#endif -+} -+ -+/* -+ * The changes in mainline which removed the callback modes from -+ * hrtimer are not yet working with -rt. The non wakeup_process() -+ * based callbacks which involve sleeping locks need to be treated -+ * seperately. -+ */ -+static void hrtimer_rt_run_pending(void) -+{ -+ enum hrtimer_restart (*fn)(struct hrtimer *); -+ struct hrtimer_cpu_base *cpu_base; -+ struct hrtimer_clock_base *base; -+ struct hrtimer *timer; -+ int index, restart; -+ -+ local_irq_disable(); -+ cpu_base = &per_cpu(hrtimer_bases, smp_processor_id()); -+ -+ raw_spin_lock(&cpu_base->lock); -+ -+ for (index = 0; index < HRTIMER_MAX_CLOCK_BASES; index++) { -+ base = &cpu_base->clock_base[index]; -+ -+ while (!list_empty(&base->expired)) { -+ timer = list_first_entry(&base->expired, -+ struct hrtimer, cb_entry); -+ -+ /* -+ * Same as the above __run_hrtimer function -+ * just we run with interrupts enabled. -+ */ -+ debug_hrtimer_deactivate(timer); -+ __remove_hrtimer(timer, base, HRTIMER_STATE_CALLBACK, 0); -+ timer_stats_account_hrtimer(timer); -+ fn = timer->function; -+ -+ raw_spin_unlock_irq(&cpu_base->lock); -+ restart = fn(timer); -+ raw_spin_lock_irq(&cpu_base->lock); -+ -+ hrtimer_rt_reprogram(restart, timer, base); -+ } -+ } -+ -+ raw_spin_unlock_irq(&cpu_base->lock); -+ -+ wake_up_timer_waiters(cpu_base); -+} -+ -+static int hrtimer_rt_defer(struct hrtimer *timer) -+{ -+ if (timer->irqsafe) -+ return 0; -+ -+ __remove_hrtimer(timer, timer->base, timer->state, 0); -+ list_add_tail(&timer->cb_entry, &timer->base->expired); -+ return 1; -+} -+ -+#else -+ -+static inline void hrtimer_rt_run_pending(void) -+{ -+ hrtimer_peek_ahead_timers(); -+} -+ -+static inline int hrtimer_rt_defer(struct hrtimer *timer) { return 0; } -+ -+#endif -+ - #ifdef CONFIG_HIGH_RES_TIMERS - - /* -@@ -1246,7 +1480,7 @@ - { - struct hrtimer_cpu_base *cpu_base = this_cpu_ptr(&hrtimer_bases); - ktime_t expires_next, now, entry_time, delta; -- int i, retries = 0; -+ int i, retries = 0, raise = 0; - - BUG_ON(!cpu_base->hres_active); - cpu_base->nr_events++; -@@ -1281,6 +1515,15 @@ - - timer = container_of(node, struct hrtimer, node); - -+ trace_hrtimer_interrupt(raw_smp_processor_id(), -+ ktime_to_ns(ktime_sub(ktime_to_ns(timer->praecox) ? -+ timer->praecox : hrtimer_get_expires(timer), -+ basenow)), -+ current, -+ timer->function == hrtimer_wakeup ? -+ container_of(timer, struct hrtimer_sleeper, -+ timer)->task : NULL); -+ - /* - * The immediate goal for using the softexpires is - * minimizing wakeups, not running timers at the -@@ -1296,7 +1539,10 @@ - if (basenow.tv64 < hrtimer_get_softexpires_tv64(timer)) - break; - -- __run_hrtimer(timer, &basenow); -+ if (!hrtimer_rt_defer(timer)) -+ __run_hrtimer(timer, &basenow); -+ else -+ raise = 1; - } - } - /* Reevaluate the clock bases for the next expiry */ -@@ -1313,7 +1559,7 @@ - if (expires_next.tv64 == KTIME_MAX || - !tick_program_event(expires_next, 0)) { - cpu_base->hang_detected = 0; -- return; -+ goto out; - } - - /* -@@ -1357,6 +1603,9 @@ - tick_program_event(expires_next, 1); - printk_once(KERN_WARNING "hrtimer: interrupt took %llu ns\n", - ktime_to_ns(delta)); -+out: -+ if (raise) -+ raise_softirq_irqoff(HRTIMER_SOFTIRQ); - } - - /* -@@ -1392,18 +1641,18 @@ - __hrtimer_peek_ahead_timers(); - local_irq_restore(flags); - } -- --static void run_hrtimer_softirq(struct softirq_action *h) --{ -- hrtimer_peek_ahead_timers(); --} -- - #else /* CONFIG_HIGH_RES_TIMERS */ - - static inline void __hrtimer_peek_ahead_timers(void) { } - - #endif /* !CONFIG_HIGH_RES_TIMERS */ - -+ -+static void run_hrtimer_softirq(struct softirq_action *h) -+{ -+ hrtimer_rt_run_pending(); -+} -+ - /* - * Called from timer softirq every jiffy, expire hrtimers: - * -@@ -1436,7 +1685,7 @@ - struct timerqueue_node *node; - struct hrtimer_cpu_base *cpu_base = this_cpu_ptr(&hrtimer_bases); - struct hrtimer_clock_base *base; -- int index, gettime = 1; -+ int index, gettime = 1, raise = 0; - - if (hrtimer_hres_active()) - return; -@@ -1461,10 +1710,16 @@ - hrtimer_get_expires_tv64(timer)) - break; - -- __run_hrtimer(timer, &base->softirq_time); -+ if (!hrtimer_rt_defer(timer)) -+ __run_hrtimer(timer, &base->softirq_time); -+ else -+ raise = 1; - } - raw_spin_unlock(&cpu_base->lock); - } -+ -+ if (raise) -+ raise_softirq_irqoff(HRTIMER_SOFTIRQ); - } - - /* -@@ -1486,16 +1741,18 @@ - void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, struct task_struct *task) - { - sl->timer.function = hrtimer_wakeup; -+ sl->timer.irqsafe = 1; - sl->task = task; - } - EXPORT_SYMBOL_GPL(hrtimer_init_sleeper); - --static int __sched do_nanosleep(struct hrtimer_sleeper *t, enum hrtimer_mode mode) -+static int __sched do_nanosleep(struct hrtimer_sleeper *t, enum hrtimer_mode mode, -+ unsigned long state) - { - hrtimer_init_sleeper(t, current); - - do { -- set_current_state(TASK_INTERRUPTIBLE); -+ set_current_state(state); - hrtimer_start_expires(&t->timer, mode); - if (!hrtimer_active(&t->timer)) - t->task = NULL; -@@ -1539,7 +1796,8 @@ - HRTIMER_MODE_ABS); - hrtimer_set_expires_tv64(&t.timer, restart->nanosleep.expires); - -- if (do_nanosleep(&t, HRTIMER_MODE_ABS)) -+ /* cpu_chill() does not care about restart state. */ -+ if (do_nanosleep(&t, HRTIMER_MODE_ABS, TASK_INTERRUPTIBLE)) - goto out; - - rmtp = restart->nanosleep.rmtp; -@@ -1556,8 +1814,10 @@ - return ret; - } - --long hrtimer_nanosleep(struct timespec *rqtp, struct timespec __user *rmtp, -- const enum hrtimer_mode mode, const clockid_t clockid) -+static long -+__hrtimer_nanosleep(struct timespec *rqtp, struct timespec __user *rmtp, -+ const enum hrtimer_mode mode, const clockid_t clockid, -+ unsigned long state) - { - struct restart_block *restart; - struct hrtimer_sleeper t; -@@ -1570,7 +1830,7 @@ - - hrtimer_init_on_stack(&t.timer, clockid, mode); - hrtimer_set_expires_range_ns(&t.timer, timespec_to_ktime(*rqtp), slack); -- if (do_nanosleep(&t, mode)) -+ if (do_nanosleep(&t, mode, state)) - goto out; - - /* Absolute timers do not update the rmtp value and restart: */ -@@ -1597,6 +1857,12 @@ - return ret; - } - -+long hrtimer_nanosleep(struct timespec *rqtp, struct timespec __user *rmtp, -+ const enum hrtimer_mode mode, const clockid_t clockid) -+{ -+ return __hrtimer_nanosleep(rqtp, rmtp, mode, clockid, TASK_INTERRUPTIBLE); -+} -+ - SYSCALL_DEFINE2(nanosleep, struct timespec __user *, rqtp, - struct timespec __user *, rmtp) - { -@@ -1611,6 +1877,26 @@ - return hrtimer_nanosleep(&tu, rmtp, HRTIMER_MODE_REL, CLOCK_MONOTONIC); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * Sleep for 1 ms in hope whoever holds what we want will let it go. -+ */ -+void cpu_chill(void) -+{ -+ struct timespec tu = { -+ .tv_nsec = NSEC_PER_MSEC, -+ }; -+ unsigned int freeze_flag = current->flags & PF_NOFREEZE; -+ -+ current->flags |= PF_NOFREEZE; -+ __hrtimer_nanosleep(&tu, NULL, HRTIMER_MODE_REL, CLOCK_MONOTONIC, -+ TASK_UNINTERRUPTIBLE); -+ if (!freeze_flag) -+ current->flags &= ~PF_NOFREEZE; -+} -+EXPORT_SYMBOL(cpu_chill); -+#endif -+ - /* - * Functions related to boot-time initialization: - */ -@@ -1622,10 +1908,14 @@ - for (i = 0; i < HRTIMER_MAX_CLOCK_BASES; i++) { - cpu_base->clock_base[i].cpu_base = cpu_base; - timerqueue_init_head(&cpu_base->clock_base[i].active); -+ INIT_LIST_HEAD(&cpu_base->clock_base[i].expired); - } - - cpu_base->cpu = cpu; - hrtimer_init_hres(cpu_base); -+#ifdef CONFIG_PREEMPT_RT_BASE -+ init_waitqueue_head(&cpu_base->wait); -+#endif - } - - #ifdef CONFIG_HOTPLUG_CPU -@@ -1731,9 +2021,7 @@ - hrtimer_cpu_notify(&hrtimers_nb, (unsigned long)CPU_UP_PREPARE, - (void *)(long)smp_processor_id()); - register_cpu_notifier(&hrtimers_nb); --#ifdef CONFIG_HIGH_RES_TIMERS - open_softirq(HRTIMER_SOFTIRQ, run_hrtimer_softirq); --#endif - } - - /** -diff -Nur linux-4.1.26.orig/kernel/time/itimer.c linux-4.1.26/kernel/time/itimer.c ---- linux-4.1.26.orig/kernel/time/itimer.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/itimer.c 2016-06-19 15:30:58.711298275 +0200 -@@ -213,6 +213,7 @@ - /* We are sharing ->siglock with it_real_fn() */ - if (hrtimer_try_to_cancel(timer) < 0) { - spin_unlock_irq(&tsk->sighand->siglock); -+ hrtimer_wait_for_timer(&tsk->signal->real_timer); - goto again; - } - expires = timeval_to_ktime(value->it_value); -diff -Nur linux-4.1.26.orig/kernel/time/jiffies.c linux-4.1.26/kernel/time/jiffies.c ---- linux-4.1.26.orig/kernel/time/jiffies.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/jiffies.c 2016-06-19 15:30:58.711298275 +0200 -@@ -74,7 +74,8 @@ - .max_cycles = 10, - }; - --__cacheline_aligned_in_smp DEFINE_SEQLOCK(jiffies_lock); -+__cacheline_aligned_in_smp DEFINE_RAW_SPINLOCK(jiffies_lock); -+__cacheline_aligned_in_smp seqcount_t jiffies_seq; - - #if (BITS_PER_LONG < 64) - u64 get_jiffies_64(void) -@@ -83,9 +84,9 @@ - u64 ret; - - do { -- seq = read_seqbegin(&jiffies_lock); -+ seq = read_seqcount_begin(&jiffies_seq); - ret = jiffies_64; -- } while (read_seqretry(&jiffies_lock, seq)); -+ } while (read_seqcount_retry(&jiffies_seq, seq)); - return ret; - } - EXPORT_SYMBOL(get_jiffies_64); -diff -Nur linux-4.1.26.orig/kernel/time/ntp.c linux-4.1.26/kernel/time/ntp.c ---- linux-4.1.26.orig/kernel/time/ntp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/ntp.c 2016-06-19 15:30:58.711298275 +0200 -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -529,10 +530,52 @@ - &sync_cmos_work, timespec_to_jiffies(&next)); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * RT can not call schedule_delayed_work from real interrupt context. -+ * Need to make a thread to do the real work. -+ */ -+static struct task_struct *cmos_delay_thread; -+static bool do_cmos_delay; -+ -+static int run_cmos_delay(void *ignore) -+{ -+ while (!kthread_should_stop()) { -+ set_current_state(TASK_INTERRUPTIBLE); -+ if (do_cmos_delay) { -+ do_cmos_delay = false; -+ queue_delayed_work(system_power_efficient_wq, -+ &sync_cmos_work, 0); -+ } -+ schedule(); -+ } -+ __set_current_state(TASK_RUNNING); -+ return 0; -+} -+ -+void ntp_notify_cmos_timer(void) -+{ -+ do_cmos_delay = true; -+ /* Make visible before waking up process */ -+ smp_wmb(); -+ wake_up_process(cmos_delay_thread); -+} -+ -+static __init int create_cmos_delay_thread(void) -+{ -+ cmos_delay_thread = kthread_run(run_cmos_delay, NULL, "kcmosdelayd"); -+ BUG_ON(!cmos_delay_thread); -+ return 0; -+} -+early_initcall(create_cmos_delay_thread); -+ -+#else -+ - void ntp_notify_cmos_timer(void) - { - queue_delayed_work(system_power_efficient_wq, &sync_cmos_work, 0); - } -+#endif /* CONFIG_PREEMPT_RT_FULL */ - - #else - void ntp_notify_cmos_timer(void) { } -diff -Nur linux-4.1.26.orig/kernel/time/posix-cpu-timers.c linux-4.1.26/kernel/time/posix-cpu-timers.c ---- linux-4.1.26.orig/kernel/time/posix-cpu-timers.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/posix-cpu-timers.c 2016-06-19 15:30:58.711298275 +0200 -@@ -3,6 +3,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -626,7 +627,7 @@ - /* - * Disarm any old timer after extracting its expiry time. - */ -- WARN_ON_ONCE(!irqs_disabled()); -+ WARN_ON_ONCE_NONRT(!irqs_disabled()); - - ret = 0; - old_incr = timer->it.cpu.incr; -@@ -1047,7 +1048,7 @@ - /* - * Now re-arm for the new expiry time. - */ -- WARN_ON_ONCE(!irqs_disabled()); -+ WARN_ON_ONCE_NONRT(!irqs_disabled()); - arm_timer(timer); - unlock_task_sighand(p, &flags); - -@@ -1113,10 +1114,11 @@ - sig = tsk->signal; - if (sig->cputimer.running) { - struct task_cputime group_sample; -+ unsigned long flags; - -- raw_spin_lock(&sig->cputimer.lock); -+ raw_spin_lock_irqsave(&sig->cputimer.lock, flags); - group_sample = sig->cputimer.cputime; -- raw_spin_unlock(&sig->cputimer.lock); -+ raw_spin_unlock_irqrestore(&sig->cputimer.lock, flags); - - if (task_cputime_expired(&group_sample, &sig->cputime_expires)) - return 1; -@@ -1130,13 +1132,13 @@ - * already updated our counts. We need to check if any timers fire now. - * Interrupts are disabled. - */ --void run_posix_cpu_timers(struct task_struct *tsk) -+static void __run_posix_cpu_timers(struct task_struct *tsk) - { - LIST_HEAD(firing); - struct k_itimer *timer, *next; - unsigned long flags; - -- WARN_ON_ONCE(!irqs_disabled()); -+ WARN_ON_ONCE_NONRT(!irqs_disabled()); - - /* - * The fast path checks that there are no expired thread or thread -@@ -1194,6 +1196,190 @@ - } - } - -+#ifdef CONFIG_PREEMPT_RT_BASE -+#include -+#include -+DEFINE_PER_CPU(struct task_struct *, posix_timer_task); -+DEFINE_PER_CPU(struct task_struct *, posix_timer_tasklist); -+ -+static int posix_cpu_timers_thread(void *data) -+{ -+ int cpu = (long)data; -+ -+ BUG_ON(per_cpu(posix_timer_task,cpu) != current); -+ -+ while (!kthread_should_stop()) { -+ struct task_struct *tsk = NULL; -+ struct task_struct *next = NULL; -+ -+ if (cpu_is_offline(cpu)) -+ goto wait_to_die; -+ -+ /* grab task list */ -+ raw_local_irq_disable(); -+ tsk = per_cpu(posix_timer_tasklist, cpu); -+ per_cpu(posix_timer_tasklist, cpu) = NULL; -+ raw_local_irq_enable(); -+ -+ /* its possible the list is empty, just return */ -+ if (!tsk) { -+ set_current_state(TASK_INTERRUPTIBLE); -+ schedule(); -+ __set_current_state(TASK_RUNNING); -+ continue; -+ } -+ -+ /* Process task list */ -+ while (1) { -+ /* save next */ -+ next = tsk->posix_timer_list; -+ -+ /* run the task timers, clear its ptr and -+ * unreference it -+ */ -+ __run_posix_cpu_timers(tsk); -+ tsk->posix_timer_list = NULL; -+ put_task_struct(tsk); -+ -+ /* check if this is the last on the list */ -+ if (next == tsk) -+ break; -+ tsk = next; -+ } -+ } -+ return 0; -+ -+wait_to_die: -+ /* Wait for kthread_stop */ -+ set_current_state(TASK_INTERRUPTIBLE); -+ while (!kthread_should_stop()) { -+ schedule(); -+ set_current_state(TASK_INTERRUPTIBLE); -+ } -+ __set_current_state(TASK_RUNNING); -+ return 0; -+} -+ -+static inline int __fastpath_timer_check(struct task_struct *tsk) -+{ -+ /* tsk == current, ensure it is safe to use ->signal/sighand */ -+ if (unlikely(tsk->exit_state)) -+ return 0; -+ -+ if (!task_cputime_zero(&tsk->cputime_expires)) -+ return 1; -+ -+ if (!task_cputime_zero(&tsk->signal->cputime_expires)) -+ return 1; -+ -+ return 0; -+} -+ -+void run_posix_cpu_timers(struct task_struct *tsk) -+{ -+ unsigned long cpu = smp_processor_id(); -+ struct task_struct *tasklist; -+ -+ BUG_ON(!irqs_disabled()); -+ if(!per_cpu(posix_timer_task, cpu)) -+ return; -+ /* get per-cpu references */ -+ tasklist = per_cpu(posix_timer_tasklist, cpu); -+ -+ /* check to see if we're already queued */ -+ if (!tsk->posix_timer_list && __fastpath_timer_check(tsk)) { -+ get_task_struct(tsk); -+ if (tasklist) { -+ tsk->posix_timer_list = tasklist; -+ } else { -+ /* -+ * The list is terminated by a self-pointing -+ * task_struct -+ */ -+ tsk->posix_timer_list = tsk; -+ } -+ per_cpu(posix_timer_tasklist, cpu) = tsk; -+ -+ wake_up_process(per_cpu(posix_timer_task, cpu)); -+ } -+} -+ -+/* -+ * posix_cpu_thread_call - callback that gets triggered when a CPU is added. -+ * Here we can start up the necessary migration thread for the new CPU. -+ */ -+static int posix_cpu_thread_call(struct notifier_block *nfb, -+ unsigned long action, void *hcpu) -+{ -+ int cpu = (long)hcpu; -+ struct task_struct *p; -+ struct sched_param param; -+ -+ switch (action) { -+ case CPU_UP_PREPARE: -+ p = kthread_create(posix_cpu_timers_thread, hcpu, -+ "posixcputmr/%d",cpu); -+ if (IS_ERR(p)) -+ return NOTIFY_BAD; -+ p->flags |= PF_NOFREEZE; -+ kthread_bind(p, cpu); -+ /* Must be high prio to avoid getting starved */ -+ param.sched_priority = MAX_RT_PRIO-1; -+ sched_setscheduler(p, SCHED_FIFO, ¶m); -+ per_cpu(posix_timer_task,cpu) = p; -+ break; -+ case CPU_ONLINE: -+ /* Strictly unneccessary, as first user will wake it. */ -+ wake_up_process(per_cpu(posix_timer_task,cpu)); -+ break; -+#ifdef CONFIG_HOTPLUG_CPU -+ case CPU_UP_CANCELED: -+ /* Unbind it from offline cpu so it can run. Fall thru. */ -+ kthread_bind(per_cpu(posix_timer_task, cpu), -+ cpumask_any(cpu_online_mask)); -+ kthread_stop(per_cpu(posix_timer_task,cpu)); -+ per_cpu(posix_timer_task,cpu) = NULL; -+ break; -+ case CPU_DEAD: -+ kthread_stop(per_cpu(posix_timer_task,cpu)); -+ per_cpu(posix_timer_task,cpu) = NULL; -+ break; -+#endif -+ } -+ return NOTIFY_OK; -+} -+ -+/* Register at highest priority so that task migration (migrate_all_tasks) -+ * happens before everything else. -+ */ -+static struct notifier_block posix_cpu_thread_notifier = { -+ .notifier_call = posix_cpu_thread_call, -+ .priority = 10 -+}; -+ -+static int __init posix_cpu_thread_init(void) -+{ -+ void *hcpu = (void *)(long)smp_processor_id(); -+ /* Start one for boot CPU. */ -+ unsigned long cpu; -+ -+ /* init the per-cpu posix_timer_tasklets */ -+ for_each_possible_cpu(cpu) -+ per_cpu(posix_timer_tasklist, cpu) = NULL; -+ -+ posix_cpu_thread_call(&posix_cpu_thread_notifier, CPU_UP_PREPARE, hcpu); -+ posix_cpu_thread_call(&posix_cpu_thread_notifier, CPU_ONLINE, hcpu); -+ register_cpu_notifier(&posix_cpu_thread_notifier); -+ return 0; -+} -+early_initcall(posix_cpu_thread_init); -+#else /* CONFIG_PREEMPT_RT_BASE */ -+void run_posix_cpu_timers(struct task_struct *tsk) -+{ -+ __run_posix_cpu_timers(tsk); -+} -+#endif /* CONFIG_PREEMPT_RT_BASE */ -+ - /* - * Set one of the process-wide special case CPU timers or RLIMIT_CPU. - * The tsk->sighand->siglock must be held by the caller. -diff -Nur linux-4.1.26.orig/kernel/time/posix-timers.c linux-4.1.26/kernel/time/posix-timers.c ---- linux-4.1.26.orig/kernel/time/posix-timers.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/posix-timers.c 2016-06-19 15:30:58.711298275 +0200 -@@ -499,6 +499,7 @@ - static struct pid *good_sigevent(sigevent_t * event) - { - struct task_struct *rtn = current->group_leader; -+ int sig = event->sigev_signo; - - if ((event->sigev_notify & SIGEV_THREAD_ID ) && - (!(rtn = find_task_by_vpid(event->sigev_notify_thread_id)) || -@@ -507,7 +508,8 @@ - return NULL; - - if (((event->sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_NONE) && -- ((event->sigev_signo <= 0) || (event->sigev_signo > SIGRTMAX))) -+ (sig <= 0 || sig > SIGRTMAX || sig_kernel_only(sig) || -+ sig_kernel_coredump(sig))) - return NULL; - - return task_pid(rtn); -@@ -819,6 +821,20 @@ - return overrun; - } - -+/* -+ * Protected by RCU! -+ */ -+static void timer_wait_for_callback(struct k_clock *kc, struct k_itimer *timr) -+{ -+#ifdef CONFIG_PREEMPT_RT_FULL -+ if (kc->timer_set == common_timer_set) -+ hrtimer_wait_for_timer(&timr->it.real.timer); -+ else -+ /* FIXME: Whacky hack for posix-cpu-timers */ -+ schedule_timeout(1); -+#endif -+} -+ - /* Set a POSIX.1b interval timer. */ - /* timr->it_lock is taken. */ - static int -@@ -896,6 +912,7 @@ - if (!timr) - return -EINVAL; - -+ rcu_read_lock(); - kc = clockid_to_kclock(timr->it_clock); - if (WARN_ON_ONCE(!kc || !kc->timer_set)) - error = -EINVAL; -@@ -904,9 +921,12 @@ - - unlock_timer(timr, flag); - if (error == TIMER_RETRY) { -+ timer_wait_for_callback(kc, timr); - rtn = NULL; // We already got the old time... -+ rcu_read_unlock(); - goto retry; - } -+ rcu_read_unlock(); - - if (old_setting && !error && - copy_to_user(old_setting, &old_spec, sizeof (old_spec))) -@@ -944,10 +964,15 @@ - if (!timer) - return -EINVAL; - -+ rcu_read_lock(); - if (timer_delete_hook(timer) == TIMER_RETRY) { - unlock_timer(timer, flags); -+ timer_wait_for_callback(clockid_to_kclock(timer->it_clock), -+ timer); -+ rcu_read_unlock(); - goto retry_delete; - } -+ rcu_read_unlock(); - - spin_lock(¤t->sighand->siglock); - list_del(&timer->list); -@@ -973,8 +998,18 @@ - retry_delete: - spin_lock_irqsave(&timer->it_lock, flags); - -+ /* On RT we can race with a deletion */ -+ if (!timer->it_signal) { -+ unlock_timer(timer, flags); -+ return; -+ } -+ - if (timer_delete_hook(timer) == TIMER_RETRY) { -+ rcu_read_lock(); - unlock_timer(timer, flags); -+ timer_wait_for_callback(clockid_to_kclock(timer->it_clock), -+ timer); -+ rcu_read_unlock(); - goto retry_delete; - } - list_del(&timer->list); -diff -Nur linux-4.1.26.orig/kernel/time/tick-broadcast-hrtimer.c linux-4.1.26/kernel/time/tick-broadcast-hrtimer.c ---- linux-4.1.26.orig/kernel/time/tick-broadcast-hrtimer.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/tick-broadcast-hrtimer.c 2016-06-19 15:30:58.711298275 +0200 -@@ -109,5 +109,6 @@ - { - hrtimer_init(&bctimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); - bctimer.function = bc_handler; -+ bctimer.irqsafe = true; - clockevents_register_device(&ce_broadcast_hrtimer); - } -diff -Nur linux-4.1.26.orig/kernel/time/tick-common.c linux-4.1.26/kernel/time/tick-common.c ---- linux-4.1.26.orig/kernel/time/tick-common.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/tick-common.c 2016-06-19 15:30:58.711298275 +0200 -@@ -78,13 +78,15 @@ - static void tick_periodic(int cpu) - { - if (tick_do_timer_cpu == cpu) { -- write_seqlock(&jiffies_lock); -+ raw_spin_lock(&jiffies_lock); -+ write_seqcount_begin(&jiffies_seq); - - /* Keep track of the next tick event */ - tick_next_period = ktime_add(tick_next_period, tick_period); - - do_timer(1); -- write_sequnlock(&jiffies_lock); -+ write_seqcount_end(&jiffies_seq); -+ raw_spin_unlock(&jiffies_lock); - update_wall_time(); - } - -@@ -146,9 +148,9 @@ - ktime_t next; - - do { -- seq = read_seqbegin(&jiffies_lock); -+ seq = read_seqcount_begin(&jiffies_seq); - next = tick_next_period; -- } while (read_seqretry(&jiffies_lock, seq)); -+ } while (read_seqcount_retry(&jiffies_seq, seq)); - - clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT); - -diff -Nur linux-4.1.26.orig/kernel/time/tick-sched.c linux-4.1.26/kernel/time/tick-sched.c ---- linux-4.1.26.orig/kernel/time/tick-sched.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/tick-sched.c 2016-06-19 15:30:58.711298275 +0200 -@@ -62,7 +62,8 @@ - return; - - /* Reevalute with jiffies_lock held */ -- write_seqlock(&jiffies_lock); -+ raw_spin_lock(&jiffies_lock); -+ write_seqcount_begin(&jiffies_seq); - - delta = ktime_sub(now, last_jiffies_update); - if (delta.tv64 >= tick_period.tv64) { -@@ -85,10 +86,12 @@ - /* Keep the tick_next_period variable up to date */ - tick_next_period = ktime_add(last_jiffies_update, tick_period); - } else { -- write_sequnlock(&jiffies_lock); -+ write_seqcount_end(&jiffies_seq); -+ raw_spin_unlock(&jiffies_lock); - return; - } -- write_sequnlock(&jiffies_lock); -+ write_seqcount_end(&jiffies_seq); -+ raw_spin_unlock(&jiffies_lock); - update_wall_time(); - } - -@@ -99,12 +102,14 @@ - { - ktime_t period; - -- write_seqlock(&jiffies_lock); -+ raw_spin_lock(&jiffies_lock); -+ write_seqcount_begin(&jiffies_seq); - /* Did we start the jiffies update yet ? */ - if (last_jiffies_update.tv64 == 0) - last_jiffies_update = tick_next_period; - period = last_jiffies_update; -- write_sequnlock(&jiffies_lock); -+ write_seqcount_end(&jiffies_seq); -+ raw_spin_unlock(&jiffies_lock); - return period; - } - -@@ -176,6 +181,11 @@ - return false; - } - -+ if (!arch_irq_work_has_interrupt()) { -+ trace_tick_stop(0, "missing irq work interrupt\n"); -+ return false; -+ } -+ - /* sched_clock_tick() needs us? */ - #ifdef CONFIG_HAVE_UNSTABLE_SCHED_CLOCK - /* -@@ -222,6 +232,7 @@ - - static DEFINE_PER_CPU(struct irq_work, nohz_full_kick_work) = { - .func = nohz_full_kick_work_func, -+ .flags = IRQ_WORK_HARD_IRQ, - }; - - /* -@@ -578,10 +589,10 @@ - - /* Read jiffies and the time when jiffies were updated last */ - do { -- seq = read_seqbegin(&jiffies_lock); -+ seq = read_seqcount_begin(&jiffies_seq); - last_update = last_jiffies_update; - last_jiffies = jiffies; -- } while (read_seqretry(&jiffies_lock, seq)); -+ } while (read_seqcount_retry(&jiffies_seq, seq)); - - if (rcu_needs_cpu(&rcu_delta_jiffies) || - arch_needs_cpu() || irq_work_needs_cpu()) { -@@ -759,14 +770,7 @@ - return false; - - if (unlikely(local_softirq_pending() && cpu_online(cpu))) { -- static int ratelimit; -- -- if (ratelimit < 10 && -- (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { -- pr_warn("NOHZ: local_softirq_pending %02x\n", -- (unsigned int) local_softirq_pending()); -- ratelimit++; -- } -+ softirq_check_pending_idle(); - return false; - } - -@@ -1154,6 +1158,7 @@ - * Emulate tick processing via per-CPU hrtimers: - */ - hrtimer_init(&ts->sched_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); -+ ts->sched_timer.irqsafe = 1; - ts->sched_timer.function = tick_sched_timer; - - /* Get the next period (per cpu) */ -diff -Nur linux-4.1.26.orig/kernel/time/timekeeping.c linux-4.1.26/kernel/time/timekeeping.c ---- linux-4.1.26.orig/kernel/time/timekeeping.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/timekeeping.c 2016-06-19 15:30:58.711298275 +0200 -@@ -2064,8 +2064,10 @@ - */ - void xtime_update(unsigned long ticks) - { -- write_seqlock(&jiffies_lock); -+ raw_spin_lock(&jiffies_lock); -+ write_seqcount_begin(&jiffies_seq); - do_timer(ticks); -- write_sequnlock(&jiffies_lock); -+ write_seqcount_end(&jiffies_seq); -+ raw_spin_unlock(&jiffies_lock); - update_wall_time(); - } -diff -Nur linux-4.1.26.orig/kernel/time/timekeeping.h linux-4.1.26/kernel/time/timekeeping.h ---- linux-4.1.26.orig/kernel/time/timekeeping.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/timekeeping.h 2016-06-19 15:30:58.711298275 +0200 -@@ -22,7 +22,8 @@ - extern void do_timer(unsigned long ticks); - extern void update_wall_time(void); - --extern seqlock_t jiffies_lock; -+extern raw_spinlock_t jiffies_lock; -+extern seqcount_t jiffies_seq; - - #define CS_NAME_LEN 32 - -diff -Nur linux-4.1.26.orig/kernel/time/timer.c linux-4.1.26/kernel/time/timer.c ---- linux-4.1.26.orig/kernel/time/timer.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/time/timer.c 2016-06-19 15:30:58.711298275 +0200 -@@ -78,6 +78,9 @@ - struct tvec_base { - spinlock_t lock; - struct timer_list *running_timer; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ wait_queue_head_t wait_for_running_timer; -+#endif - unsigned long timer_jiffies; - unsigned long next_timer; - unsigned long active_timers; -@@ -768,6 +771,36 @@ - } - } - -+#ifndef CONFIG_PREEMPT_RT_FULL -+static inline struct tvec_base *switch_timer_base(struct timer_list *timer, -+ struct tvec_base *old, -+ struct tvec_base *new) -+{ -+ /* See the comment in lock_timer_base() */ -+ timer_set_base(timer, NULL); -+ spin_unlock(&old->lock); -+ spin_lock(&new->lock); -+ timer_set_base(timer, new); -+ return new; -+} -+#else -+static inline struct tvec_base *switch_timer_base(struct timer_list *timer, -+ struct tvec_base *old, -+ struct tvec_base *new) -+{ -+ /* -+ * We cannot do the above because we might be preempted and -+ * then the preempter would see NULL and loop forever. -+ */ -+ if (spin_trylock(&new->lock)) { -+ timer_set_base(timer, new); -+ spin_unlock(&old->lock); -+ return new; -+ } -+ return old; -+} -+#endif -+ - static inline int - __mod_timer(struct timer_list *timer, unsigned long expires, - bool pending_only, int pinned) -@@ -798,14 +831,8 @@ - * handler yet has not finished. This also guarantees that - * the timer is serialized wrt itself. - */ -- if (likely(base->running_timer != timer)) { -- /* See the comment in lock_timer_base() */ -- timer_set_base(timer, NULL); -- spin_unlock(&base->lock); -- base = new_base; -- spin_lock(&base->lock); -- timer_set_base(timer, base); -- } -+ if (likely(base->running_timer != timer)) -+ base = switch_timer_base(timer, base, new_base); - } - - timer->expires = expires; -@@ -979,6 +1006,29 @@ - } - EXPORT_SYMBOL_GPL(add_timer_on); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * Wait for a running timer -+ */ -+static void wait_for_running_timer(struct timer_list *timer) -+{ -+ struct tvec_base *base = timer->base; -+ -+ if (base->running_timer == timer) -+ wait_event(base->wait_for_running_timer, -+ base->running_timer != timer); -+} -+ -+# define wakeup_timer_waiters(b) wake_up(&(b)->wait_for_running_timer) -+#else -+static inline void wait_for_running_timer(struct timer_list *timer) -+{ -+ cpu_relax(); -+} -+ -+# define wakeup_timer_waiters(b) do { } while (0) -+#endif -+ - /** - * del_timer - deactive a timer. - * @timer: the timer to be deactivated -@@ -1036,7 +1086,7 @@ - } - EXPORT_SYMBOL(try_to_del_timer_sync); - --#ifdef CONFIG_SMP -+#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) - static DEFINE_PER_CPU(struct tvec_base, __tvec_bases); - - /** -@@ -1098,7 +1148,7 @@ - int ret = try_to_del_timer_sync(timer); - if (ret >= 0) - return ret; -- cpu_relax(); -+ wait_for_running_timer(timer); - } - } - EXPORT_SYMBOL(del_timer_sync); -@@ -1219,15 +1269,17 @@ - if (irqsafe) { - spin_unlock(&base->lock); - call_timer_fn(timer, fn, data); -+ base->running_timer = NULL; - spin_lock(&base->lock); - } else { - spin_unlock_irq(&base->lock); - call_timer_fn(timer, fn, data); -+ base->running_timer = NULL; - spin_lock_irq(&base->lock); - } - } - } -- base->running_timer = NULL; -+ wakeup_timer_waiters(base); - spin_unlock_irq(&base->lock); - } - -@@ -1367,6 +1419,14 @@ - if (cpu_is_offline(smp_processor_id())) - return expires; - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ /* -+ * On PREEMPT_RT we cannot sleep here. As a result we can't take -+ * the base lock to check when the next timer is pending and so -+ * we assume the next jiffy. -+ */ -+ return now + 1; -+#endif - spin_lock(&base->lock); - if (base->active_timers) { - if (time_before_eq(base->next_timer, base->timer_jiffies)) -@@ -1392,13 +1452,13 @@ - - /* Note: this timer irq context must be accounted for as well. */ - account_process_tick(p, user_tick); -+ scheduler_tick(); - run_local_timers(); - rcu_check_callbacks(user_tick); --#ifdef CONFIG_IRQ_WORK -+#if defined(CONFIG_IRQ_WORK) - if (in_irq()) - irq_work_tick(); - #endif -- scheduler_tick(); - run_posix_cpu_timers(p); - } - -@@ -1411,6 +1471,8 @@ - - hrtimer_run_pending(); - -+ irq_work_tick_soft(); -+ - if (time_after_eq(jiffies, base->timer_jiffies)) - __run_timers(base); - } -@@ -1566,7 +1628,7 @@ - - BUG_ON(cpu_online(cpu)); - old_base = per_cpu(tvec_bases, cpu); -- new_base = get_cpu_var(tvec_bases); -+ new_base = get_local_var(tvec_bases); - /* - * The caller is globally serialized and nobody else - * takes two locks at once, deadlock is not possible. -@@ -1590,7 +1652,7 @@ - - spin_unlock(&old_base->lock); - spin_unlock_irq(&new_base->lock); -- put_cpu_var(tvec_bases); -+ put_local_var(tvec_bases); - } - - static int timer_cpu_notify(struct notifier_block *self, -@@ -1625,6 +1687,9 @@ - base->cpu = cpu; - per_cpu(tvec_bases, cpu) = base; - spin_lock_init(&base->lock); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ init_waitqueue_head(&base->wait_for_running_timer); -+#endif - - for (j = 0; j < TVN_SIZE; j++) { - INIT_LIST_HEAD(base->tv5.vec + j); -diff -Nur linux-4.1.26.orig/kernel/trace/Kconfig linux-4.1.26/kernel/trace/Kconfig ---- linux-4.1.26.orig/kernel/trace/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/Kconfig 2016-06-19 15:30:58.711298275 +0200 -@@ -187,6 +187,24 @@ - enabled. This option and the preempt-off timing option can be - used together or separately.) - -+config INTERRUPT_OFF_HIST -+ bool "Interrupts-off Latency Histogram" -+ depends on IRQSOFF_TRACER -+ help -+ This option generates continuously updated histograms (one per cpu) -+ of the duration of time periods with interrupts disabled. The -+ histograms are disabled by default. To enable them, write a non-zero -+ number to -+ -+ /sys/kernel/debug/tracing/latency_hist/enable/preemptirqsoff -+ -+ If PREEMPT_OFF_HIST is also selected, additional histograms (one -+ per cpu) are generated that accumulate the duration of time periods -+ when both interrupts and preemption are disabled. The histogram data -+ will be located in the debug file system at -+ -+ /sys/kernel/debug/tracing/latency_hist/irqsoff -+ - config PREEMPT_TRACER - bool "Preemption-off Latency Tracer" - default n -@@ -211,6 +229,24 @@ - enabled. This option and the irqs-off timing option can be - used together or separately.) - -+config PREEMPT_OFF_HIST -+ bool "Preemption-off Latency Histogram" -+ depends on PREEMPT_TRACER -+ help -+ This option generates continuously updated histograms (one per cpu) -+ of the duration of time periods with preemption disabled. The -+ histograms are disabled by default. To enable them, write a non-zero -+ number to -+ -+ /sys/kernel/debug/tracing/latency_hist/enable/preemptirqsoff -+ -+ If INTERRUPT_OFF_HIST is also selected, additional histograms (one -+ per cpu) are generated that accumulate the duration of time periods -+ when both interrupts and preemption are disabled. The histogram data -+ will be located in the debug file system at -+ -+ /sys/kernel/debug/tracing/latency_hist/preemptoff -+ - config SCHED_TRACER - bool "Scheduling Latency Tracer" - select GENERIC_TRACER -@@ -221,6 +257,74 @@ - This tracer tracks the latency of the highest priority task - to be scheduled in, starting from the point it has woken up. - -+config WAKEUP_LATENCY_HIST -+ bool "Scheduling Latency Histogram" -+ depends on SCHED_TRACER -+ help -+ This option generates continuously updated histograms (one per cpu) -+ of the scheduling latency of the highest priority task. -+ The histograms are disabled by default. To enable them, write a -+ non-zero number to -+ -+ /sys/kernel/debug/tracing/latency_hist/enable/wakeup -+ -+ Two different algorithms are used, one to determine the latency of -+ processes that exclusively use the highest priority of the system and -+ another one to determine the latency of processes that share the -+ highest system priority with other processes. The former is used to -+ improve hardware and system software, the latter to optimize the -+ priority design of a given system. The histogram data will be -+ located in the debug file system at -+ -+ /sys/kernel/debug/tracing/latency_hist/wakeup -+ -+ and -+ -+ /sys/kernel/debug/tracing/latency_hist/wakeup/sharedprio -+ -+ If both Scheduling Latency Histogram and Missed Timer Offsets -+ Histogram are selected, additional histogram data will be collected -+ that contain, in addition to the wakeup latency, the timer latency, in -+ case the wakeup was triggered by an expired timer. These histograms -+ are available in the -+ -+ /sys/kernel/debug/tracing/latency_hist/timerandwakeup -+ -+ directory. They reflect the apparent interrupt and scheduling latency -+ and are best suitable to determine the worst-case latency of a given -+ system. To enable these histograms, write a non-zero number to -+ -+ /sys/kernel/debug/tracing/latency_hist/enable/timerandwakeup -+ -+config MISSED_TIMER_OFFSETS_HIST -+ depends on HIGH_RES_TIMERS -+ select GENERIC_TRACER -+ bool "Missed Timer Offsets Histogram" -+ help -+ Generate a histogram of missed timer offsets in microseconds. The -+ histograms are disabled by default. To enable them, write a non-zero -+ number to -+ -+ /sys/kernel/debug/tracing/latency_hist/enable/missed_timer_offsets -+ -+ The histogram data will be located in the debug file system at -+ -+ /sys/kernel/debug/tracing/latency_hist/missed_timer_offsets -+ -+ If both Scheduling Latency Histogram and Missed Timer Offsets -+ Histogram are selected, additional histogram data will be collected -+ that contain, in addition to the wakeup latency, the timer latency, in -+ case the wakeup was triggered by an expired timer. These histograms -+ are available in the -+ -+ /sys/kernel/debug/tracing/latency_hist/timerandwakeup -+ -+ directory. They reflect the apparent interrupt and scheduling latency -+ and are best suitable to determine the worst-case latency of a given -+ system. To enable these histograms, write a non-zero number to -+ -+ /sys/kernel/debug/tracing/latency_hist/enable/timerandwakeup -+ - config ENABLE_DEFAULT_TRACERS - bool "Trace process context switches and events" - depends on !GENERIC_TRACER -diff -Nur linux-4.1.26.orig/kernel/trace/latency_hist.c linux-4.1.26/kernel/trace/latency_hist.c ---- linux-4.1.26.orig/kernel/trace/latency_hist.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.26/kernel/trace/latency_hist.c 2016-06-19 15:30:58.715298429 +0200 -@@ -0,0 +1,1178 @@ -+/* -+ * kernel/trace/latency_hist.c -+ * -+ * Add support for histograms of preemption-off latency and -+ * interrupt-off latency and wakeup latency, it depends on -+ * Real-Time Preemption Support. -+ * -+ * Copyright (C) 2005 MontaVista Software, Inc. -+ * Yi Yang -+ * -+ * Converted to work with the new latency tracer. -+ * Copyright (C) 2008 Red Hat, Inc. -+ * Steven Rostedt -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "trace.h" -+#include -+ -+#define NSECS_PER_USECS 1000L -+ -+#define CREATE_TRACE_POINTS -+#include -+ -+enum { -+ IRQSOFF_LATENCY = 0, -+ PREEMPTOFF_LATENCY, -+ PREEMPTIRQSOFF_LATENCY, -+ WAKEUP_LATENCY, -+ WAKEUP_LATENCY_SHAREDPRIO, -+ MISSED_TIMER_OFFSETS, -+ TIMERANDWAKEUP_LATENCY, -+ MAX_LATENCY_TYPE, -+}; -+ -+#define MAX_ENTRY_NUM 10240 -+ -+struct hist_data { -+ atomic_t hist_mode; /* 0 log, 1 don't log */ -+ long offset; /* set it to MAX_ENTRY_NUM/2 for a bipolar scale */ -+ long min_lat; -+ long max_lat; -+ unsigned long long below_hist_bound_samples; -+ unsigned long long above_hist_bound_samples; -+ long long accumulate_lat; -+ unsigned long long total_samples; -+ unsigned long long hist_array[MAX_ENTRY_NUM]; -+}; -+ -+struct enable_data { -+ int latency_type; -+ int enabled; -+}; -+ -+static char *latency_hist_dir_root = "latency_hist"; -+ -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+static DEFINE_PER_CPU(struct hist_data, irqsoff_hist); -+static char *irqsoff_hist_dir = "irqsoff"; -+static DEFINE_PER_CPU(cycles_t, hist_irqsoff_start); -+static DEFINE_PER_CPU(int, hist_irqsoff_counting); -+#endif -+ -+#ifdef CONFIG_PREEMPT_OFF_HIST -+static DEFINE_PER_CPU(struct hist_data, preemptoff_hist); -+static char *preemptoff_hist_dir = "preemptoff"; -+static DEFINE_PER_CPU(cycles_t, hist_preemptoff_start); -+static DEFINE_PER_CPU(int, hist_preemptoff_counting); -+#endif -+ -+#if defined(CONFIG_PREEMPT_OFF_HIST) && defined(CONFIG_INTERRUPT_OFF_HIST) -+static DEFINE_PER_CPU(struct hist_data, preemptirqsoff_hist); -+static char *preemptirqsoff_hist_dir = "preemptirqsoff"; -+static DEFINE_PER_CPU(cycles_t, hist_preemptirqsoff_start); -+static DEFINE_PER_CPU(int, hist_preemptirqsoff_counting); -+#endif -+ -+#if defined(CONFIG_PREEMPT_OFF_HIST) || defined(CONFIG_INTERRUPT_OFF_HIST) -+static notrace void probe_preemptirqsoff_hist(void *v, int reason, int start); -+static struct enable_data preemptirqsoff_enabled_data = { -+ .latency_type = PREEMPTIRQSOFF_LATENCY, -+ .enabled = 0, -+}; -+#endif -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+struct maxlatproc_data { -+ char comm[FIELD_SIZEOF(struct task_struct, comm)]; -+ char current_comm[FIELD_SIZEOF(struct task_struct, comm)]; -+ int pid; -+ int current_pid; -+ int prio; -+ int current_prio; -+ long latency; -+ long timeroffset; -+ cycle_t timestamp; -+}; -+#endif -+ -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+static DEFINE_PER_CPU(struct hist_data, wakeup_latency_hist); -+static DEFINE_PER_CPU(struct hist_data, wakeup_latency_hist_sharedprio); -+static char *wakeup_latency_hist_dir = "wakeup"; -+static char *wakeup_latency_hist_dir_sharedprio = "sharedprio"; -+static notrace void probe_wakeup_latency_hist_start(void *v, -+ struct task_struct *p); -+static notrace void probe_wakeup_latency_hist_stop(void *v, -+ struct task_struct *prev, struct task_struct *next); -+static notrace void probe_sched_migrate_task(void *, -+ struct task_struct *task, int cpu); -+static struct enable_data wakeup_latency_enabled_data = { -+ .latency_type = WAKEUP_LATENCY, -+ .enabled = 0, -+}; -+static DEFINE_PER_CPU(struct maxlatproc_data, wakeup_maxlatproc); -+static DEFINE_PER_CPU(struct maxlatproc_data, wakeup_maxlatproc_sharedprio); -+static DEFINE_PER_CPU(struct task_struct *, wakeup_task); -+static DEFINE_PER_CPU(int, wakeup_sharedprio); -+static unsigned long wakeup_pid; -+#endif -+ -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+static DEFINE_PER_CPU(struct hist_data, missed_timer_offsets); -+static char *missed_timer_offsets_dir = "missed_timer_offsets"; -+static notrace void probe_hrtimer_interrupt(void *v, int cpu, -+ long long offset, struct task_struct *curr, struct task_struct *task); -+static struct enable_data missed_timer_offsets_enabled_data = { -+ .latency_type = MISSED_TIMER_OFFSETS, -+ .enabled = 0, -+}; -+static DEFINE_PER_CPU(struct maxlatproc_data, missed_timer_offsets_maxlatproc); -+static unsigned long missed_timer_offsets_pid; -+#endif -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+static DEFINE_PER_CPU(struct hist_data, timerandwakeup_latency_hist); -+static char *timerandwakeup_latency_hist_dir = "timerandwakeup"; -+static struct enable_data timerandwakeup_enabled_data = { -+ .latency_type = TIMERANDWAKEUP_LATENCY, -+ .enabled = 0, -+}; -+static DEFINE_PER_CPU(struct maxlatproc_data, timerandwakeup_maxlatproc); -+#endif -+ -+void notrace latency_hist(int latency_type, int cpu, long latency, -+ long timeroffset, cycle_t stop, -+ struct task_struct *p) -+{ -+ struct hist_data *my_hist; -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ struct maxlatproc_data *mp = NULL; -+#endif -+ -+ if (!cpu_possible(cpu) || latency_type < 0 || -+ latency_type >= MAX_LATENCY_TYPE) -+ return; -+ -+ switch (latency_type) { -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+ case IRQSOFF_LATENCY: -+ my_hist = &per_cpu(irqsoff_hist, cpu); -+ break; -+#endif -+#ifdef CONFIG_PREEMPT_OFF_HIST -+ case PREEMPTOFF_LATENCY: -+ my_hist = &per_cpu(preemptoff_hist, cpu); -+ break; -+#endif -+#if defined(CONFIG_PREEMPT_OFF_HIST) && defined(CONFIG_INTERRUPT_OFF_HIST) -+ case PREEMPTIRQSOFF_LATENCY: -+ my_hist = &per_cpu(preemptirqsoff_hist, cpu); -+ break; -+#endif -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ case WAKEUP_LATENCY: -+ my_hist = &per_cpu(wakeup_latency_hist, cpu); -+ mp = &per_cpu(wakeup_maxlatproc, cpu); -+ break; -+ case WAKEUP_LATENCY_SHAREDPRIO: -+ my_hist = &per_cpu(wakeup_latency_hist_sharedprio, cpu); -+ mp = &per_cpu(wakeup_maxlatproc_sharedprio, cpu); -+ break; -+#endif -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ case MISSED_TIMER_OFFSETS: -+ my_hist = &per_cpu(missed_timer_offsets, cpu); -+ mp = &per_cpu(missed_timer_offsets_maxlatproc, cpu); -+ break; -+#endif -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ case TIMERANDWAKEUP_LATENCY: -+ my_hist = &per_cpu(timerandwakeup_latency_hist, cpu); -+ mp = &per_cpu(timerandwakeup_maxlatproc, cpu); -+ break; -+#endif -+ -+ default: -+ return; -+ } -+ -+ latency += my_hist->offset; -+ -+ if (atomic_read(&my_hist->hist_mode) == 0) -+ return; -+ -+ if (latency < 0 || latency >= MAX_ENTRY_NUM) { -+ if (latency < 0) -+ my_hist->below_hist_bound_samples++; -+ else -+ my_hist->above_hist_bound_samples++; -+ } else -+ my_hist->hist_array[latency]++; -+ -+ if (unlikely(latency > my_hist->max_lat || -+ my_hist->min_lat == LONG_MAX)) { -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ if (latency_type == WAKEUP_LATENCY || -+ latency_type == WAKEUP_LATENCY_SHAREDPRIO || -+ latency_type == MISSED_TIMER_OFFSETS || -+ latency_type == TIMERANDWAKEUP_LATENCY) { -+ strncpy(mp->comm, p->comm, sizeof(mp->comm)); -+ strncpy(mp->current_comm, current->comm, -+ sizeof(mp->current_comm)); -+ mp->pid = task_pid_nr(p); -+ mp->current_pid = task_pid_nr(current); -+ mp->prio = p->prio; -+ mp->current_prio = current->prio; -+ mp->latency = latency; -+ mp->timeroffset = timeroffset; -+ mp->timestamp = stop; -+ } -+#endif -+ my_hist->max_lat = latency; -+ } -+ if (unlikely(latency < my_hist->min_lat)) -+ my_hist->min_lat = latency; -+ my_hist->total_samples++; -+ my_hist->accumulate_lat += latency; -+} -+ -+static void *l_start(struct seq_file *m, loff_t *pos) -+{ -+ loff_t *index_ptr = NULL; -+ loff_t index = *pos; -+ struct hist_data *my_hist = m->private; -+ -+ if (index == 0) { -+ char minstr[32], avgstr[32], maxstr[32]; -+ -+ atomic_dec(&my_hist->hist_mode); -+ -+ if (likely(my_hist->total_samples)) { -+ long avg = (long) div64_s64(my_hist->accumulate_lat, -+ my_hist->total_samples); -+ snprintf(minstr, sizeof(minstr), "%ld", -+ my_hist->min_lat - my_hist->offset); -+ snprintf(avgstr, sizeof(avgstr), "%ld", -+ avg - my_hist->offset); -+ snprintf(maxstr, sizeof(maxstr), "%ld", -+ my_hist->max_lat - my_hist->offset); -+ } else { -+ strcpy(minstr, ""); -+ strcpy(avgstr, minstr); -+ strcpy(maxstr, minstr); -+ } -+ -+ seq_printf(m, "#Minimum latency: %s microseconds\n" -+ "#Average latency: %s microseconds\n" -+ "#Maximum latency: %s microseconds\n" -+ "#Total samples: %llu\n" -+ "#There are %llu samples lower than %ld" -+ " microseconds.\n" -+ "#There are %llu samples greater or equal" -+ " than %ld microseconds.\n" -+ "#usecs\t%16s\n", -+ minstr, avgstr, maxstr, -+ my_hist->total_samples, -+ my_hist->below_hist_bound_samples, -+ -my_hist->offset, -+ my_hist->above_hist_bound_samples, -+ MAX_ENTRY_NUM - my_hist->offset, -+ "samples"); -+ } -+ if (index < MAX_ENTRY_NUM) { -+ index_ptr = kmalloc(sizeof(loff_t), GFP_KERNEL); -+ if (index_ptr) -+ *index_ptr = index; -+ } -+ -+ return index_ptr; -+} -+ -+static void *l_next(struct seq_file *m, void *p, loff_t *pos) -+{ -+ loff_t *index_ptr = p; -+ struct hist_data *my_hist = m->private; -+ -+ if (++*pos >= MAX_ENTRY_NUM) { -+ atomic_inc(&my_hist->hist_mode); -+ return NULL; -+ } -+ *index_ptr = *pos; -+ return index_ptr; -+} -+ -+static void l_stop(struct seq_file *m, void *p) -+{ -+ kfree(p); -+} -+ -+static int l_show(struct seq_file *m, void *p) -+{ -+ int index = *(loff_t *) p; -+ struct hist_data *my_hist = m->private; -+ -+ seq_printf(m, "%6ld\t%16llu\n", index - my_hist->offset, -+ my_hist->hist_array[index]); -+ return 0; -+} -+ -+static const struct seq_operations latency_hist_seq_op = { -+ .start = l_start, -+ .next = l_next, -+ .stop = l_stop, -+ .show = l_show -+}; -+ -+static int latency_hist_open(struct inode *inode, struct file *file) -+{ -+ int ret; -+ -+ ret = seq_open(file, &latency_hist_seq_op); -+ if (!ret) { -+ struct seq_file *seq = file->private_data; -+ seq->private = inode->i_private; -+ } -+ return ret; -+} -+ -+static const struct file_operations latency_hist_fops = { -+ .open = latency_hist_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = seq_release, -+}; -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+static void clear_maxlatprocdata(struct maxlatproc_data *mp) -+{ -+ mp->comm[0] = mp->current_comm[0] = '\0'; -+ mp->prio = mp->current_prio = mp->pid = mp->current_pid = -+ mp->latency = mp->timeroffset = -1; -+ mp->timestamp = 0; -+} -+#endif -+ -+static void hist_reset(struct hist_data *hist) -+{ -+ atomic_dec(&hist->hist_mode); -+ -+ memset(hist->hist_array, 0, sizeof(hist->hist_array)); -+ hist->below_hist_bound_samples = 0ULL; -+ hist->above_hist_bound_samples = 0ULL; -+ hist->min_lat = LONG_MAX; -+ hist->max_lat = LONG_MIN; -+ hist->total_samples = 0ULL; -+ hist->accumulate_lat = 0LL; -+ -+ atomic_inc(&hist->hist_mode); -+} -+ -+static ssize_t -+latency_hist_reset(struct file *file, const char __user *a, -+ size_t size, loff_t *off) -+{ -+ int cpu; -+ struct hist_data *hist = NULL; -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ struct maxlatproc_data *mp = NULL; -+#endif -+ off_t latency_type = (off_t) file->private_data; -+ -+ for_each_online_cpu(cpu) { -+ -+ switch (latency_type) { -+#ifdef CONFIG_PREEMPT_OFF_HIST -+ case PREEMPTOFF_LATENCY: -+ hist = &per_cpu(preemptoff_hist, cpu); -+ break; -+#endif -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+ case IRQSOFF_LATENCY: -+ hist = &per_cpu(irqsoff_hist, cpu); -+ break; -+#endif -+#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) -+ case PREEMPTIRQSOFF_LATENCY: -+ hist = &per_cpu(preemptirqsoff_hist, cpu); -+ break; -+#endif -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ case WAKEUP_LATENCY: -+ hist = &per_cpu(wakeup_latency_hist, cpu); -+ mp = &per_cpu(wakeup_maxlatproc, cpu); -+ break; -+ case WAKEUP_LATENCY_SHAREDPRIO: -+ hist = &per_cpu(wakeup_latency_hist_sharedprio, cpu); -+ mp = &per_cpu(wakeup_maxlatproc_sharedprio, cpu); -+ break; -+#endif -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ case MISSED_TIMER_OFFSETS: -+ hist = &per_cpu(missed_timer_offsets, cpu); -+ mp = &per_cpu(missed_timer_offsets_maxlatproc, cpu); -+ break; -+#endif -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ case TIMERANDWAKEUP_LATENCY: -+ hist = &per_cpu(timerandwakeup_latency_hist, cpu); -+ mp = &per_cpu(timerandwakeup_maxlatproc, cpu); -+ break; -+#endif -+ } -+ -+ hist_reset(hist); -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ if (latency_type == WAKEUP_LATENCY || -+ latency_type == WAKEUP_LATENCY_SHAREDPRIO || -+ latency_type == MISSED_TIMER_OFFSETS || -+ latency_type == TIMERANDWAKEUP_LATENCY) -+ clear_maxlatprocdata(mp); -+#endif -+ } -+ -+ return size; -+} -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+static ssize_t -+show_pid(struct file *file, char __user *ubuf, size_t cnt, loff_t *ppos) -+{ -+ char buf[64]; -+ int r; -+ unsigned long *this_pid = file->private_data; -+ -+ r = snprintf(buf, sizeof(buf), "%lu\n", *this_pid); -+ return simple_read_from_buffer(ubuf, cnt, ppos, buf, r); -+} -+ -+static ssize_t do_pid(struct file *file, const char __user *ubuf, -+ size_t cnt, loff_t *ppos) -+{ -+ char buf[64]; -+ unsigned long pid; -+ unsigned long *this_pid = file->private_data; -+ -+ if (cnt >= sizeof(buf)) -+ return -EINVAL; -+ -+ if (copy_from_user(&buf, ubuf, cnt)) -+ return -EFAULT; -+ -+ buf[cnt] = '\0'; -+ -+ if (kstrtoul(buf, 10, &pid)) -+ return -EINVAL; -+ -+ *this_pid = pid; -+ -+ return cnt; -+} -+#endif -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+static ssize_t -+show_maxlatproc(struct file *file, char __user *ubuf, size_t cnt, loff_t *ppos) -+{ -+ int r; -+ struct maxlatproc_data *mp = file->private_data; -+ int strmaxlen = (TASK_COMM_LEN * 2) + (8 * 8); -+ unsigned long long t; -+ unsigned long usecs, secs; -+ char *buf; -+ -+ if (mp->pid == -1 || mp->current_pid == -1) { -+ buf = "(none)\n"; -+ return simple_read_from_buffer(ubuf, cnt, ppos, buf, -+ strlen(buf)); -+ } -+ -+ buf = kmalloc(strmaxlen, GFP_KERNEL); -+ if (buf == NULL) -+ return -ENOMEM; -+ -+ t = ns2usecs(mp->timestamp); -+ usecs = do_div(t, USEC_PER_SEC); -+ secs = (unsigned long) t; -+ r = snprintf(buf, strmaxlen, -+ "%d %d %ld (%ld) %s <- %d %d %s %lu.%06lu\n", mp->pid, -+ MAX_RT_PRIO-1 - mp->prio, mp->latency, mp->timeroffset, mp->comm, -+ mp->current_pid, MAX_RT_PRIO-1 - mp->current_prio, mp->current_comm, -+ secs, usecs); -+ r = simple_read_from_buffer(ubuf, cnt, ppos, buf, r); -+ kfree(buf); -+ return r; -+} -+#endif -+ -+static ssize_t -+show_enable(struct file *file, char __user *ubuf, size_t cnt, loff_t *ppos) -+{ -+ char buf[64]; -+ struct enable_data *ed = file->private_data; -+ int r; -+ -+ r = snprintf(buf, sizeof(buf), "%d\n", ed->enabled); -+ return simple_read_from_buffer(ubuf, cnt, ppos, buf, r); -+} -+ -+static ssize_t -+do_enable(struct file *file, const char __user *ubuf, size_t cnt, loff_t *ppos) -+{ -+ char buf[64]; -+ long enable; -+ struct enable_data *ed = file->private_data; -+ -+ if (cnt >= sizeof(buf)) -+ return -EINVAL; -+ -+ if (copy_from_user(&buf, ubuf, cnt)) -+ return -EFAULT; -+ -+ buf[cnt] = 0; -+ -+ if (kstrtoul(buf, 10, &enable)) -+ return -EINVAL; -+ -+ if ((enable && ed->enabled) || (!enable && !ed->enabled)) -+ return cnt; -+ -+ if (enable) { -+ int ret; -+ -+ switch (ed->latency_type) { -+#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) -+ case PREEMPTIRQSOFF_LATENCY: -+ ret = register_trace_preemptirqsoff_hist( -+ probe_preemptirqsoff_hist, NULL); -+ if (ret) { -+ pr_info("wakeup trace: Couldn't assign " -+ "probe_preemptirqsoff_hist " -+ "to trace_preemptirqsoff_hist\n"); -+ return ret; -+ } -+ break; -+#endif -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ case WAKEUP_LATENCY: -+ ret = register_trace_sched_wakeup( -+ probe_wakeup_latency_hist_start, NULL); -+ if (ret) { -+ pr_info("wakeup trace: Couldn't assign " -+ "probe_wakeup_latency_hist_start " -+ "to trace_sched_wakeup\n"); -+ return ret; -+ } -+ ret = register_trace_sched_wakeup_new( -+ probe_wakeup_latency_hist_start, NULL); -+ if (ret) { -+ pr_info("wakeup trace: Couldn't assign " -+ "probe_wakeup_latency_hist_start " -+ "to trace_sched_wakeup_new\n"); -+ unregister_trace_sched_wakeup( -+ probe_wakeup_latency_hist_start, NULL); -+ return ret; -+ } -+ ret = register_trace_sched_switch( -+ probe_wakeup_latency_hist_stop, NULL); -+ if (ret) { -+ pr_info("wakeup trace: Couldn't assign " -+ "probe_wakeup_latency_hist_stop " -+ "to trace_sched_switch\n"); -+ unregister_trace_sched_wakeup( -+ probe_wakeup_latency_hist_start, NULL); -+ unregister_trace_sched_wakeup_new( -+ probe_wakeup_latency_hist_start, NULL); -+ return ret; -+ } -+ ret = register_trace_sched_migrate_task( -+ probe_sched_migrate_task, NULL); -+ if (ret) { -+ pr_info("wakeup trace: Couldn't assign " -+ "probe_sched_migrate_task " -+ "to trace_sched_migrate_task\n"); -+ unregister_trace_sched_wakeup( -+ probe_wakeup_latency_hist_start, NULL); -+ unregister_trace_sched_wakeup_new( -+ probe_wakeup_latency_hist_start, NULL); -+ unregister_trace_sched_switch( -+ probe_wakeup_latency_hist_stop, NULL); -+ return ret; -+ } -+ break; -+#endif -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ case MISSED_TIMER_OFFSETS: -+ ret = register_trace_hrtimer_interrupt( -+ probe_hrtimer_interrupt, NULL); -+ if (ret) { -+ pr_info("wakeup trace: Couldn't assign " -+ "probe_hrtimer_interrupt " -+ "to trace_hrtimer_interrupt\n"); -+ return ret; -+ } -+ break; -+#endif -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ case TIMERANDWAKEUP_LATENCY: -+ if (!wakeup_latency_enabled_data.enabled || -+ !missed_timer_offsets_enabled_data.enabled) -+ return -EINVAL; -+ break; -+#endif -+ default: -+ break; -+ } -+ } else { -+ switch (ed->latency_type) { -+#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) -+ case PREEMPTIRQSOFF_LATENCY: -+ { -+ int cpu; -+ -+ unregister_trace_preemptirqsoff_hist( -+ probe_preemptirqsoff_hist, NULL); -+ for_each_online_cpu(cpu) { -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+ per_cpu(hist_irqsoff_counting, -+ cpu) = 0; -+#endif -+#ifdef CONFIG_PREEMPT_OFF_HIST -+ per_cpu(hist_preemptoff_counting, -+ cpu) = 0; -+#endif -+#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) -+ per_cpu(hist_preemptirqsoff_counting, -+ cpu) = 0; -+#endif -+ } -+ } -+ break; -+#endif -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ case WAKEUP_LATENCY: -+ { -+ int cpu; -+ -+ unregister_trace_sched_wakeup( -+ probe_wakeup_latency_hist_start, NULL); -+ unregister_trace_sched_wakeup_new( -+ probe_wakeup_latency_hist_start, NULL); -+ unregister_trace_sched_switch( -+ probe_wakeup_latency_hist_stop, NULL); -+ unregister_trace_sched_migrate_task( -+ probe_sched_migrate_task, NULL); -+ -+ for_each_online_cpu(cpu) { -+ per_cpu(wakeup_task, cpu) = NULL; -+ per_cpu(wakeup_sharedprio, cpu) = 0; -+ } -+ } -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ timerandwakeup_enabled_data.enabled = 0; -+#endif -+ break; -+#endif -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ case MISSED_TIMER_OFFSETS: -+ unregister_trace_hrtimer_interrupt( -+ probe_hrtimer_interrupt, NULL); -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ timerandwakeup_enabled_data.enabled = 0; -+#endif -+ break; -+#endif -+ default: -+ break; -+ } -+ } -+ ed->enabled = enable; -+ return cnt; -+} -+ -+static const struct file_operations latency_hist_reset_fops = { -+ .open = tracing_open_generic, -+ .write = latency_hist_reset, -+}; -+ -+static const struct file_operations enable_fops = { -+ .open = tracing_open_generic, -+ .read = show_enable, -+ .write = do_enable, -+}; -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+static const struct file_operations pid_fops = { -+ .open = tracing_open_generic, -+ .read = show_pid, -+ .write = do_pid, -+}; -+ -+static const struct file_operations maxlatproc_fops = { -+ .open = tracing_open_generic, -+ .read = show_maxlatproc, -+}; -+#endif -+ -+#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) -+static notrace void probe_preemptirqsoff_hist(void *v, int reason, -+ int starthist) -+{ -+ int cpu = raw_smp_processor_id(); -+ int time_set = 0; -+ -+ if (starthist) { -+ cycle_t uninitialized_var(start); -+ -+ if (!preempt_count() && !irqs_disabled()) -+ return; -+ -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+ if ((reason == IRQS_OFF || reason == TRACE_START) && -+ !per_cpu(hist_irqsoff_counting, cpu)) { -+ per_cpu(hist_irqsoff_counting, cpu) = 1; -+ start = ftrace_now(cpu); -+ time_set++; -+ per_cpu(hist_irqsoff_start, cpu) = start; -+ } -+#endif -+ -+#ifdef CONFIG_PREEMPT_OFF_HIST -+ if ((reason == PREEMPT_OFF || reason == TRACE_START) && -+ !per_cpu(hist_preemptoff_counting, cpu)) { -+ per_cpu(hist_preemptoff_counting, cpu) = 1; -+ if (!(time_set++)) -+ start = ftrace_now(cpu); -+ per_cpu(hist_preemptoff_start, cpu) = start; -+ } -+#endif -+ -+#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) -+ if (per_cpu(hist_irqsoff_counting, cpu) && -+ per_cpu(hist_preemptoff_counting, cpu) && -+ !per_cpu(hist_preemptirqsoff_counting, cpu)) { -+ per_cpu(hist_preemptirqsoff_counting, cpu) = 1; -+ if (!time_set) -+ start = ftrace_now(cpu); -+ per_cpu(hist_preemptirqsoff_start, cpu) = start; -+ } -+#endif -+ } else { -+ cycle_t uninitialized_var(stop); -+ -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+ if ((reason == IRQS_ON || reason == TRACE_STOP) && -+ per_cpu(hist_irqsoff_counting, cpu)) { -+ cycle_t start = per_cpu(hist_irqsoff_start, cpu); -+ -+ stop = ftrace_now(cpu); -+ time_set++; -+ if (start) { -+ long latency = ((long) (stop - start)) / -+ NSECS_PER_USECS; -+ -+ latency_hist(IRQSOFF_LATENCY, cpu, latency, 0, -+ stop, NULL); -+ } -+ per_cpu(hist_irqsoff_counting, cpu) = 0; -+ } -+#endif -+ -+#ifdef CONFIG_PREEMPT_OFF_HIST -+ if ((reason == PREEMPT_ON || reason == TRACE_STOP) && -+ per_cpu(hist_preemptoff_counting, cpu)) { -+ cycle_t start = per_cpu(hist_preemptoff_start, cpu); -+ -+ if (!(time_set++)) -+ stop = ftrace_now(cpu); -+ if (start) { -+ long latency = ((long) (stop - start)) / -+ NSECS_PER_USECS; -+ -+ latency_hist(PREEMPTOFF_LATENCY, cpu, latency, -+ 0, stop, NULL); -+ } -+ per_cpu(hist_preemptoff_counting, cpu) = 0; -+ } -+#endif -+ -+#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) -+ if ((!per_cpu(hist_irqsoff_counting, cpu) || -+ !per_cpu(hist_preemptoff_counting, cpu)) && -+ per_cpu(hist_preemptirqsoff_counting, cpu)) { -+ cycle_t start = per_cpu(hist_preemptirqsoff_start, cpu); -+ -+ if (!time_set) -+ stop = ftrace_now(cpu); -+ if (start) { -+ long latency = ((long) (stop - start)) / -+ NSECS_PER_USECS; -+ -+ latency_hist(PREEMPTIRQSOFF_LATENCY, cpu, -+ latency, 0, stop, NULL); -+ } -+ per_cpu(hist_preemptirqsoff_counting, cpu) = 0; -+ } -+#endif -+ } -+} -+#endif -+ -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+static DEFINE_RAW_SPINLOCK(wakeup_lock); -+static notrace void probe_sched_migrate_task(void *v, struct task_struct *task, -+ int cpu) -+{ -+ int old_cpu = task_cpu(task); -+ -+ if (cpu != old_cpu) { -+ unsigned long flags; -+ struct task_struct *cpu_wakeup_task; -+ -+ raw_spin_lock_irqsave(&wakeup_lock, flags); -+ -+ cpu_wakeup_task = per_cpu(wakeup_task, old_cpu); -+ if (task == cpu_wakeup_task) { -+ put_task_struct(cpu_wakeup_task); -+ per_cpu(wakeup_task, old_cpu) = NULL; -+ cpu_wakeup_task = per_cpu(wakeup_task, cpu) = task; -+ get_task_struct(cpu_wakeup_task); -+ } -+ -+ raw_spin_unlock_irqrestore(&wakeup_lock, flags); -+ } -+} -+ -+static notrace void probe_wakeup_latency_hist_start(void *v, -+ struct task_struct *p) -+{ -+ unsigned long flags; -+ struct task_struct *curr = current; -+ int cpu = task_cpu(p); -+ struct task_struct *cpu_wakeup_task; -+ -+ raw_spin_lock_irqsave(&wakeup_lock, flags); -+ -+ cpu_wakeup_task = per_cpu(wakeup_task, cpu); -+ -+ if (wakeup_pid) { -+ if ((cpu_wakeup_task && p->prio == cpu_wakeup_task->prio) || -+ p->prio == curr->prio) -+ per_cpu(wakeup_sharedprio, cpu) = 1; -+ if (likely(wakeup_pid != task_pid_nr(p))) -+ goto out; -+ } else { -+ if (likely(!rt_task(p)) || -+ (cpu_wakeup_task && p->prio > cpu_wakeup_task->prio) || -+ p->prio > curr->prio) -+ goto out; -+ if ((cpu_wakeup_task && p->prio == cpu_wakeup_task->prio) || -+ p->prio == curr->prio) -+ per_cpu(wakeup_sharedprio, cpu) = 1; -+ } -+ -+ if (cpu_wakeup_task) -+ put_task_struct(cpu_wakeup_task); -+ cpu_wakeup_task = per_cpu(wakeup_task, cpu) = p; -+ get_task_struct(cpu_wakeup_task); -+ cpu_wakeup_task->preempt_timestamp_hist = -+ ftrace_now(raw_smp_processor_id()); -+out: -+ raw_spin_unlock_irqrestore(&wakeup_lock, flags); -+} -+ -+static notrace void probe_wakeup_latency_hist_stop(void *v, -+ struct task_struct *prev, struct task_struct *next) -+{ -+ unsigned long flags; -+ int cpu = task_cpu(next); -+ long latency; -+ cycle_t stop; -+ struct task_struct *cpu_wakeup_task; -+ -+ raw_spin_lock_irqsave(&wakeup_lock, flags); -+ -+ cpu_wakeup_task = per_cpu(wakeup_task, cpu); -+ -+ if (cpu_wakeup_task == NULL) -+ goto out; -+ -+ /* Already running? */ -+ if (unlikely(current == cpu_wakeup_task)) -+ goto out_reset; -+ -+ if (next != cpu_wakeup_task) { -+ if (next->prio < cpu_wakeup_task->prio) -+ goto out_reset; -+ -+ if (next->prio == cpu_wakeup_task->prio) -+ per_cpu(wakeup_sharedprio, cpu) = 1; -+ -+ goto out; -+ } -+ -+ if (current->prio == cpu_wakeup_task->prio) -+ per_cpu(wakeup_sharedprio, cpu) = 1; -+ -+ /* -+ * The task we are waiting for is about to be switched to. -+ * Calculate latency and store it in histogram. -+ */ -+ stop = ftrace_now(raw_smp_processor_id()); -+ -+ latency = ((long) (stop - next->preempt_timestamp_hist)) / -+ NSECS_PER_USECS; -+ -+ if (per_cpu(wakeup_sharedprio, cpu)) { -+ latency_hist(WAKEUP_LATENCY_SHAREDPRIO, cpu, latency, 0, stop, -+ next); -+ per_cpu(wakeup_sharedprio, cpu) = 0; -+ } else { -+ latency_hist(WAKEUP_LATENCY, cpu, latency, 0, stop, next); -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ if (timerandwakeup_enabled_data.enabled) { -+ latency_hist(TIMERANDWAKEUP_LATENCY, cpu, -+ next->timer_offset + latency, next->timer_offset, -+ stop, next); -+ } -+#endif -+ } -+ -+out_reset: -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ next->timer_offset = 0; -+#endif -+ put_task_struct(cpu_wakeup_task); -+ per_cpu(wakeup_task, cpu) = NULL; -+out: -+ raw_spin_unlock_irqrestore(&wakeup_lock, flags); -+} -+#endif -+ -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+static notrace void probe_hrtimer_interrupt(void *v, int cpu, -+ long long latency_ns, struct task_struct *curr, -+ struct task_struct *task) -+{ -+ if (latency_ns <= 0 && task != NULL && rt_task(task) && -+ (task->prio < curr->prio || -+ (task->prio == curr->prio && -+ !cpumask_test_cpu(cpu, &task->cpus_allowed)))) { -+ long latency; -+ cycle_t now; -+ -+ if (missed_timer_offsets_pid) { -+ if (likely(missed_timer_offsets_pid != -+ task_pid_nr(task))) -+ return; -+ } -+ -+ now = ftrace_now(cpu); -+ latency = (long) div_s64(-latency_ns, NSECS_PER_USECS); -+ latency_hist(MISSED_TIMER_OFFSETS, cpu, latency, latency, now, -+ task); -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ task->timer_offset = latency; -+#endif -+ } -+} -+#endif -+ -+static __init int latency_hist_init(void) -+{ -+ struct dentry *latency_hist_root = NULL; -+ struct dentry *dentry; -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ struct dentry *dentry_sharedprio; -+#endif -+ struct dentry *entry; -+ struct dentry *enable_root; -+ int i = 0; -+ struct hist_data *my_hist; -+ char name[64]; -+ char *cpufmt = "CPU%d"; -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ char *cpufmt_maxlatproc = "max_latency-CPU%d"; -+ struct maxlatproc_data *mp = NULL; -+#endif -+ -+ dentry = tracing_init_dentry(); -+ latency_hist_root = debugfs_create_dir(latency_hist_dir_root, dentry); -+ enable_root = debugfs_create_dir("enable", latency_hist_root); -+ -+#ifdef CONFIG_INTERRUPT_OFF_HIST -+ dentry = debugfs_create_dir(irqsoff_hist_dir, latency_hist_root); -+ for_each_possible_cpu(i) { -+ sprintf(name, cpufmt, i); -+ entry = debugfs_create_file(name, 0444, dentry, -+ &per_cpu(irqsoff_hist, i), &latency_hist_fops); -+ my_hist = &per_cpu(irqsoff_hist, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ } -+ entry = debugfs_create_file("reset", 0644, dentry, -+ (void *)IRQSOFF_LATENCY, &latency_hist_reset_fops); -+#endif -+ -+#ifdef CONFIG_PREEMPT_OFF_HIST -+ dentry = debugfs_create_dir(preemptoff_hist_dir, -+ latency_hist_root); -+ for_each_possible_cpu(i) { -+ sprintf(name, cpufmt, i); -+ entry = debugfs_create_file(name, 0444, dentry, -+ &per_cpu(preemptoff_hist, i), &latency_hist_fops); -+ my_hist = &per_cpu(preemptoff_hist, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ } -+ entry = debugfs_create_file("reset", 0644, dentry, -+ (void *)PREEMPTOFF_LATENCY, &latency_hist_reset_fops); -+#endif -+ -+#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) -+ dentry = debugfs_create_dir(preemptirqsoff_hist_dir, -+ latency_hist_root); -+ for_each_possible_cpu(i) { -+ sprintf(name, cpufmt, i); -+ entry = debugfs_create_file(name, 0444, dentry, -+ &per_cpu(preemptirqsoff_hist, i), &latency_hist_fops); -+ my_hist = &per_cpu(preemptirqsoff_hist, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ } -+ entry = debugfs_create_file("reset", 0644, dentry, -+ (void *)PREEMPTIRQSOFF_LATENCY, &latency_hist_reset_fops); -+#endif -+ -+#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) -+ entry = debugfs_create_file("preemptirqsoff", 0644, -+ enable_root, (void *)&preemptirqsoff_enabled_data, -+ &enable_fops); -+#endif -+ -+#ifdef CONFIG_WAKEUP_LATENCY_HIST -+ dentry = debugfs_create_dir(wakeup_latency_hist_dir, -+ latency_hist_root); -+ dentry_sharedprio = debugfs_create_dir( -+ wakeup_latency_hist_dir_sharedprio, dentry); -+ for_each_possible_cpu(i) { -+ sprintf(name, cpufmt, i); -+ -+ entry = debugfs_create_file(name, 0444, dentry, -+ &per_cpu(wakeup_latency_hist, i), -+ &latency_hist_fops); -+ my_hist = &per_cpu(wakeup_latency_hist, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ -+ entry = debugfs_create_file(name, 0444, dentry_sharedprio, -+ &per_cpu(wakeup_latency_hist_sharedprio, i), -+ &latency_hist_fops); -+ my_hist = &per_cpu(wakeup_latency_hist_sharedprio, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ -+ sprintf(name, cpufmt_maxlatproc, i); -+ -+ mp = &per_cpu(wakeup_maxlatproc, i); -+ entry = debugfs_create_file(name, 0444, dentry, mp, -+ &maxlatproc_fops); -+ clear_maxlatprocdata(mp); -+ -+ mp = &per_cpu(wakeup_maxlatproc_sharedprio, i); -+ entry = debugfs_create_file(name, 0444, dentry_sharedprio, mp, -+ &maxlatproc_fops); -+ clear_maxlatprocdata(mp); -+ } -+ entry = debugfs_create_file("pid", 0644, dentry, -+ (void *)&wakeup_pid, &pid_fops); -+ entry = debugfs_create_file("reset", 0644, dentry, -+ (void *)WAKEUP_LATENCY, &latency_hist_reset_fops); -+ entry = debugfs_create_file("reset", 0644, dentry_sharedprio, -+ (void *)WAKEUP_LATENCY_SHAREDPRIO, &latency_hist_reset_fops); -+ entry = debugfs_create_file("wakeup", 0644, -+ enable_root, (void *)&wakeup_latency_enabled_data, -+ &enable_fops); -+#endif -+ -+#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST -+ dentry = debugfs_create_dir(missed_timer_offsets_dir, -+ latency_hist_root); -+ for_each_possible_cpu(i) { -+ sprintf(name, cpufmt, i); -+ entry = debugfs_create_file(name, 0444, dentry, -+ &per_cpu(missed_timer_offsets, i), &latency_hist_fops); -+ my_hist = &per_cpu(missed_timer_offsets, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ -+ sprintf(name, cpufmt_maxlatproc, i); -+ mp = &per_cpu(missed_timer_offsets_maxlatproc, i); -+ entry = debugfs_create_file(name, 0444, dentry, mp, -+ &maxlatproc_fops); -+ clear_maxlatprocdata(mp); -+ } -+ entry = debugfs_create_file("pid", 0644, dentry, -+ (void *)&missed_timer_offsets_pid, &pid_fops); -+ entry = debugfs_create_file("reset", 0644, dentry, -+ (void *)MISSED_TIMER_OFFSETS, &latency_hist_reset_fops); -+ entry = debugfs_create_file("missed_timer_offsets", 0644, -+ enable_root, (void *)&missed_timer_offsets_enabled_data, -+ &enable_fops); -+#endif -+ -+#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ -+ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) -+ dentry = debugfs_create_dir(timerandwakeup_latency_hist_dir, -+ latency_hist_root); -+ for_each_possible_cpu(i) { -+ sprintf(name, cpufmt, i); -+ entry = debugfs_create_file(name, 0444, dentry, -+ &per_cpu(timerandwakeup_latency_hist, i), -+ &latency_hist_fops); -+ my_hist = &per_cpu(timerandwakeup_latency_hist, i); -+ atomic_set(&my_hist->hist_mode, 1); -+ my_hist->min_lat = LONG_MAX; -+ -+ sprintf(name, cpufmt_maxlatproc, i); -+ mp = &per_cpu(timerandwakeup_maxlatproc, i); -+ entry = debugfs_create_file(name, 0444, dentry, mp, -+ &maxlatproc_fops); -+ clear_maxlatprocdata(mp); -+ } -+ entry = debugfs_create_file("reset", 0644, dentry, -+ (void *)TIMERANDWAKEUP_LATENCY, &latency_hist_reset_fops); -+ entry = debugfs_create_file("timerandwakeup", 0644, -+ enable_root, (void *)&timerandwakeup_enabled_data, -+ &enable_fops); -+#endif -+ return 0; -+} -+ -+device_initcall(latency_hist_init); -diff -Nur linux-4.1.26.orig/kernel/trace/Makefile linux-4.1.26/kernel/trace/Makefile ---- linux-4.1.26.orig/kernel/trace/Makefile 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/Makefile 2016-06-19 15:30:58.715298429 +0200 -@@ -36,6 +36,10 @@ - obj-$(CONFIG_IRQSOFF_TRACER) += trace_irqsoff.o - obj-$(CONFIG_PREEMPT_TRACER) += trace_irqsoff.o - obj-$(CONFIG_SCHED_TRACER) += trace_sched_wakeup.o -+obj-$(CONFIG_INTERRUPT_OFF_HIST) += latency_hist.o -+obj-$(CONFIG_PREEMPT_OFF_HIST) += latency_hist.o -+obj-$(CONFIG_WAKEUP_LATENCY_HIST) += latency_hist.o -+obj-$(CONFIG_MISSED_TIMER_OFFSETS_HIST) += latency_hist.o - obj-$(CONFIG_NOP_TRACER) += trace_nop.o - obj-$(CONFIG_STACK_TRACER) += trace_stack.o - obj-$(CONFIG_MMIOTRACE) += trace_mmiotrace.o -diff -Nur linux-4.1.26.orig/kernel/trace/trace.c linux-4.1.26/kernel/trace/trace.c ---- linux-4.1.26.orig/kernel/trace/trace.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace.c 2016-06-19 15:30:58.715298429 +0200 -@@ -1630,6 +1630,7 @@ - struct task_struct *tsk = current; - - entry->preempt_count = pc & 0xff; -+ entry->preempt_lazy_count = preempt_lazy_count(); - entry->pid = (tsk) ? tsk->pid : 0; - entry->flags = - #ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT -@@ -1639,8 +1640,11 @@ - #endif - ((pc & HARDIRQ_MASK) ? TRACE_FLAG_HARDIRQ : 0) | - ((pc & SOFTIRQ_MASK) ? TRACE_FLAG_SOFTIRQ : 0) | -- (tif_need_resched() ? TRACE_FLAG_NEED_RESCHED : 0) | -+ (tif_need_resched_now() ? TRACE_FLAG_NEED_RESCHED : 0) | -+ (need_resched_lazy() ? TRACE_FLAG_NEED_RESCHED_LAZY : 0) | - (test_preempt_need_resched() ? TRACE_FLAG_PREEMPT_RESCHED : 0); -+ -+ entry->migrate_disable = (tsk) ? __migrate_disabled(tsk) & 0xFF : 0; - } - EXPORT_SYMBOL_GPL(tracing_generic_entry_update); - -@@ -2558,14 +2562,17 @@ - - static void print_lat_help_header(struct seq_file *m) - { -- seq_puts(m, "# _------=> CPU# \n" -- "# / _-----=> irqs-off \n" -- "# | / _----=> need-resched \n" -- "# || / _---=> hardirq/softirq \n" -- "# ||| / _--=> preempt-depth \n" -- "# |||| / delay \n" -- "# cmd pid ||||| time | caller \n" -- "# \\ / ||||| \\ | / \n"); -+ seq_puts(m, "# _--------=> CPU# \n" -+ "# / _-------=> irqs-off \n" -+ "# | / _------=> need-resched \n" -+ "# || / _-----=> need-resched_lazy \n" -+ "# ||| / _----=> hardirq/softirq \n" -+ "# |||| / _---=> preempt-depth \n" -+ "# ||||| / _--=> preempt-lazy-depth\n" -+ "# |||||| / _-=> migrate-disable \n" -+ "# ||||||| / delay \n" -+ "# cmd pid |||||||| time | caller \n" -+ "# \\ / |||||||| \\ | / \n"); - } - - static void print_event_info(struct trace_buffer *buf, struct seq_file *m) -@@ -2591,11 +2598,14 @@ - print_event_info(buf, m); - seq_puts(m, "# _-----=> irqs-off\n" - "# / _----=> need-resched\n" -- "# | / _---=> hardirq/softirq\n" -- "# || / _--=> preempt-depth\n" -- "# ||| / delay\n" -- "# TASK-PID CPU# |||| TIMESTAMP FUNCTION\n" -- "# | | | |||| | |\n"); -+ "# |/ _-----=> need-resched_lazy\n" -+ "# || / _---=> hardirq/softirq\n" -+ "# ||| / _--=> preempt-depth\n" -+ "# |||| /_--=> preempt-lazy-depth\n" -+ "# ||||| _-=> migrate-disable \n" -+ "# ||||| / delay\n" -+ "# TASK-PID CPU# |||||| TIMESTAMP FUNCTION\n" -+ "# | | | |||||| | |\n"); - } - - void -diff -Nur linux-4.1.26.orig/kernel/trace/trace_events.c linux-4.1.26/kernel/trace/trace_events.c ---- linux-4.1.26.orig/kernel/trace/trace_events.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace_events.c 2016-06-19 15:30:58.715298429 +0200 -@@ -162,6 +162,8 @@ - __common_field(unsigned char, flags); - __common_field(unsigned char, preempt_count); - __common_field(int, pid); -+ __common_field(unsigned short, migrate_disable); -+ __common_field(unsigned short, padding); - - return ret; - } -diff -Nur linux-4.1.26.orig/kernel/trace/trace.h linux-4.1.26/kernel/trace/trace.h ---- linux-4.1.26.orig/kernel/trace/trace.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace.h 2016-06-19 15:30:58.715298429 +0200 -@@ -120,6 +120,7 @@ - * NEED_RESCHED - reschedule is requested - * HARDIRQ - inside an interrupt handler - * SOFTIRQ - inside a softirq handler -+ * NEED_RESCHED_LAZY - lazy reschedule is requested - */ - enum trace_flag_type { - TRACE_FLAG_IRQS_OFF = 0x01, -@@ -128,6 +129,7 @@ - TRACE_FLAG_HARDIRQ = 0x08, - TRACE_FLAG_SOFTIRQ = 0x10, - TRACE_FLAG_PREEMPT_RESCHED = 0x20, -+ TRACE_FLAG_NEED_RESCHED_LAZY = 0x40, - }; - - #define TRACE_BUF_SIZE 1024 -diff -Nur linux-4.1.26.orig/kernel/trace/trace_irqsoff.c linux-4.1.26/kernel/trace/trace_irqsoff.c ---- linux-4.1.26.orig/kernel/trace/trace_irqsoff.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace_irqsoff.c 2016-06-19 15:30:58.715298429 +0200 -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - - #include "trace.h" - -@@ -433,11 +434,13 @@ - { - if (preempt_trace() || irq_trace()) - start_critical_timing(CALLER_ADDR0, CALLER_ADDR1); -+ trace_preemptirqsoff_hist_rcuidle(TRACE_START, 1); - } - EXPORT_SYMBOL_GPL(start_critical_timings); - - void stop_critical_timings(void) - { -+ trace_preemptirqsoff_hist_rcuidle(TRACE_STOP, 0); - if (preempt_trace() || irq_trace()) - stop_critical_timing(CALLER_ADDR0, CALLER_ADDR1); - } -@@ -447,6 +450,7 @@ - #ifdef CONFIG_PROVE_LOCKING - void time_hardirqs_on(unsigned long a0, unsigned long a1) - { -+ trace_preemptirqsoff_hist_rcuidle(IRQS_ON, 0); - if (!preempt_trace() && irq_trace()) - stop_critical_timing(a0, a1); - } -@@ -455,6 +459,7 @@ - { - if (!preempt_trace() && irq_trace()) - start_critical_timing(a0, a1); -+ trace_preemptirqsoff_hist_rcuidle(IRQS_OFF, 1); - } - - #else /* !CONFIG_PROVE_LOCKING */ -@@ -480,6 +485,7 @@ - */ - void trace_hardirqs_on(void) - { -+ trace_preemptirqsoff_hist_rcuidle(IRQS_ON, 0); - if (!preempt_trace() && irq_trace()) - stop_critical_timing(CALLER_ADDR0, CALLER_ADDR1); - } -@@ -489,11 +495,13 @@ - { - if (!preempt_trace() && irq_trace()) - start_critical_timing(CALLER_ADDR0, CALLER_ADDR1); -+ trace_preemptirqsoff_hist_rcuidle(IRQS_OFF, 1); - } - EXPORT_SYMBOL(trace_hardirqs_off); - - __visible void trace_hardirqs_on_caller(unsigned long caller_addr) - { -+ trace_preemptirqsoff_hist(IRQS_ON, 0); - if (!preempt_trace() && irq_trace()) - stop_critical_timing(CALLER_ADDR0, caller_addr); - } -@@ -503,6 +511,7 @@ - { - if (!preempt_trace() && irq_trace()) - start_critical_timing(CALLER_ADDR0, caller_addr); -+ trace_preemptirqsoff_hist(IRQS_OFF, 1); - } - EXPORT_SYMBOL(trace_hardirqs_off_caller); - -@@ -512,12 +521,14 @@ - #ifdef CONFIG_PREEMPT_TRACER - void trace_preempt_on(unsigned long a0, unsigned long a1) - { -+ trace_preemptirqsoff_hist(PREEMPT_ON, 0); - if (preempt_trace() && !irq_trace()) - stop_critical_timing(a0, a1); - } - - void trace_preempt_off(unsigned long a0, unsigned long a1) - { -+ trace_preemptirqsoff_hist(PREEMPT_ON, 1); - if (preempt_trace() && !irq_trace()) - start_critical_timing(a0, a1); - } -diff -Nur linux-4.1.26.orig/kernel/trace/trace_output.c linux-4.1.26/kernel/trace/trace_output.c ---- linux-4.1.26.orig/kernel/trace/trace_output.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace_output.c 2016-06-19 15:30:58.715298429 +0200 -@@ -430,6 +430,7 @@ - { - char hardsoft_irq; - char need_resched; -+ char need_resched_lazy; - char irqs_off; - int hardirq; - int softirq; -@@ -457,6 +458,8 @@ - need_resched = '.'; - break; - } -+ need_resched_lazy = -+ (entry->flags & TRACE_FLAG_NEED_RESCHED_LAZY) ? 'L' : '.'; - - hardsoft_irq = - (hardirq && softirq) ? 'H' : -@@ -464,14 +467,25 @@ - softirq ? 's' : - '.'; - -- trace_seq_printf(s, "%c%c%c", -- irqs_off, need_resched, hardsoft_irq); -+ trace_seq_printf(s, "%c%c%c%c", -+ irqs_off, need_resched, need_resched_lazy, -+ hardsoft_irq); - - if (entry->preempt_count) - trace_seq_printf(s, "%x", entry->preempt_count); - else - trace_seq_putc(s, '.'); - -+ if (entry->preempt_lazy_count) -+ trace_seq_printf(s, "%x", entry->preempt_lazy_count); -+ else -+ trace_seq_putc(s, '.'); -+ -+ if (entry->migrate_disable) -+ trace_seq_printf(s, "%x", entry->migrate_disable); -+ else -+ trace_seq_putc(s, '.'); -+ - return !trace_seq_has_overflowed(s); - } - -diff -Nur linux-4.1.26.orig/kernel/trace/trace_sched_switch.c linux-4.1.26/kernel/trace/trace_sched_switch.c ---- linux-4.1.26.orig/kernel/trace/trace_sched_switch.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace_sched_switch.c 2016-06-19 15:30:58.715298429 +0200 -@@ -26,7 +26,7 @@ - } - - static void --probe_sched_wakeup(void *ignore, struct task_struct *wakee, int success) -+probe_sched_wakeup(void *ignore, struct task_struct *wakee) - { - if (unlikely(!sched_ref)) - return; -diff -Nur linux-4.1.26.orig/kernel/trace/trace_sched_wakeup.c linux-4.1.26/kernel/trace/trace_sched_wakeup.c ---- linux-4.1.26.orig/kernel/trace/trace_sched_wakeup.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/trace/trace_sched_wakeup.c 2016-06-19 15:30:58.719298583 +0200 -@@ -514,7 +514,7 @@ - } - - static void --probe_wakeup(void *ignore, struct task_struct *p, int success) -+probe_wakeup(void *ignore, struct task_struct *p) - { - struct trace_array_cpu *data; - int cpu = smp_processor_id(); -diff -Nur linux-4.1.26.orig/kernel/user.c linux-4.1.26/kernel/user.c ---- linux-4.1.26.orig/kernel/user.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/user.c 2016-06-19 15:30:58.719298583 +0200 -@@ -161,11 +161,11 @@ - if (!up) - return; - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - if (atomic_dec_and_lock(&up->__count, &uidhash_lock)) - free_user(up, flags); - else -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - - struct user_struct *alloc_uid(kuid_t uid) -diff -Nur linux-4.1.26.orig/kernel/watchdog.c linux-4.1.26/kernel/watchdog.c ---- linux-4.1.26.orig/kernel/watchdog.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/watchdog.c 2016-06-19 15:30:58.719298583 +0200 -@@ -262,6 +262,8 @@ - - #ifdef CONFIG_HARDLOCKUP_DETECTOR - -+static DEFINE_RAW_SPINLOCK(watchdog_output_lock); -+ - static struct perf_event_attr wd_hw_attr = { - .type = PERF_TYPE_HARDWARE, - .config = PERF_COUNT_HW_CPU_CYCLES, -@@ -295,13 +297,21 @@ - /* only print hardlockups once */ - if (__this_cpu_read(hard_watchdog_warn) == true) - return; -+ /* -+ * If early-printk is enabled then make sure we do not -+ * lock up in printk() and kill console logging: -+ */ -+ printk_kill(); - -- if (hardlockup_panic) -+ if (hardlockup_panic) { - panic("Watchdog detected hard LOCKUP on cpu %d", - this_cpu); -- else -+ } else { -+ raw_spin_lock(&watchdog_output_lock); - WARN(1, "Watchdog detected hard LOCKUP on cpu %d", - this_cpu); -+ raw_spin_unlock(&watchdog_output_lock); -+ } - - __this_cpu_write(hard_watchdog_warn, true); - return; -@@ -444,6 +454,7 @@ - /* kick off the timer for the hardlockup detector */ - hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); - hrtimer->function = watchdog_timer_fn; -+ hrtimer->irqsafe = 1; - - /* Enable the perf event */ - watchdog_nmi_enable(cpu); -diff -Nur linux-4.1.26.orig/kernel/workqueue.c linux-4.1.26/kernel/workqueue.c ---- linux-4.1.26.orig/kernel/workqueue.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/workqueue.c 2016-06-19 15:30:58.719298583 +0200 -@@ -48,6 +48,8 @@ - #include - #include - #include -+#include -+#include - - #include "workqueue_internal.h" - -@@ -121,11 +123,16 @@ - * cpu or grabbing pool->lock is enough for read access. If - * POOL_DISASSOCIATED is set, it's identical to L. - * -+ * On RT we need the extra protection via rt_lock_idle_list() for -+ * the list manipulations against read access from -+ * wq_worker_sleeping(). All other places are nicely serialized via -+ * pool->lock. -+ * - * A: pool->attach_mutex protected. - * - * PL: wq_pool_mutex protected. - * -- * PR: wq_pool_mutex protected for writes. Sched-RCU protected for reads. -+ * PR: wq_pool_mutex protected for writes. RCU protected for reads. - * - * PW: wq_pool_mutex and wq->mutex protected for writes. Either for reads. - * -@@ -134,7 +141,7 @@ - * - * WQ: wq->mutex protected. - * -- * WR: wq->mutex protected for writes. Sched-RCU protected for reads. -+ * WR: wq->mutex protected for writes. RCU protected for reads. - * - * MD: wq_mayday_lock protected. - */ -@@ -183,7 +190,7 @@ - atomic_t nr_running ____cacheline_aligned_in_smp; - - /* -- * Destruction of pool is sched-RCU protected to allow dereferences -+ * Destruction of pool is RCU protected to allow dereferences - * from get_work_pool(). - */ - struct rcu_head rcu; -@@ -212,7 +219,7 @@ - /* - * Release of unbound pwq is punted to system_wq. See put_pwq() - * and pwq_unbound_release_workfn() for details. pool_workqueue -- * itself is also sched-RCU protected so that the first pwq can be -+ * itself is also RCU protected so that the first pwq can be - * determined without grabbing wq->mutex. - */ - struct work_struct unbound_release_work; -@@ -334,6 +341,8 @@ - struct workqueue_struct *system_freezable_power_efficient_wq __read_mostly; - EXPORT_SYMBOL_GPL(system_freezable_power_efficient_wq); - -+static DEFINE_LOCAL_IRQ_LOCK(pendingb_lock); -+ - static int worker_thread(void *__worker); - static void copy_workqueue_attrs(struct workqueue_attrs *to, - const struct workqueue_attrs *from); -@@ -343,14 +352,14 @@ - #include - - #define assert_rcu_or_pool_mutex() \ -- rcu_lockdep_assert(rcu_read_lock_sched_held() || \ -+ rcu_lockdep_assert(rcu_read_lock_held() || \ - lockdep_is_held(&wq_pool_mutex), \ -- "sched RCU or wq_pool_mutex should be held") -+ "RCU or wq_pool_mutex should be held") - - #define assert_rcu_or_wq_mutex(wq) \ -- rcu_lockdep_assert(rcu_read_lock_sched_held() || \ -+ rcu_lockdep_assert(rcu_read_lock_held() || \ - lockdep_is_held(&wq->mutex), \ -- "sched RCU or wq->mutex should be held") -+ "RCU or wq->mutex should be held") - - #define assert_rcu_or_wq_mutex_or_pool_mutex(wq) \ - rcu_lockdep_assert(rcu_read_lock_sched_held() || \ -@@ -368,7 +377,7 @@ - * @pool: iteration cursor - * @pi: integer used for iteration - * -- * This must be called either with wq_pool_mutex held or sched RCU read -+ * This must be called either with wq_pool_mutex held or RCU read - * locked. If the pool needs to be used beyond the locking in effect, the - * caller is responsible for guaranteeing that the pool stays online. - * -@@ -400,7 +409,7 @@ - * @pwq: iteration cursor - * @wq: the target workqueue - * -- * This must be called either with wq->mutex held or sched RCU read locked. -+ * This must be called either with wq->mutex held or RCU read locked. - * If the pwq needs to be used beyond the locking in effect, the caller is - * responsible for guaranteeing that the pwq stays online. - * -@@ -412,6 +421,31 @@ - if (({ assert_rcu_or_wq_mutex(wq); false; })) { } \ - else - -+#ifdef CONFIG_PREEMPT_RT_BASE -+static inline void rt_lock_idle_list(struct worker_pool *pool) -+{ -+ preempt_disable(); -+} -+static inline void rt_unlock_idle_list(struct worker_pool *pool) -+{ -+ preempt_enable(); -+} -+static inline void sched_lock_idle_list(struct worker_pool *pool) { } -+static inline void sched_unlock_idle_list(struct worker_pool *pool) { } -+#else -+static inline void rt_lock_idle_list(struct worker_pool *pool) { } -+static inline void rt_unlock_idle_list(struct worker_pool *pool) { } -+static inline void sched_lock_idle_list(struct worker_pool *pool) -+{ -+ spin_lock_irq(&pool->lock); -+} -+static inline void sched_unlock_idle_list(struct worker_pool *pool) -+{ -+ spin_unlock_irq(&pool->lock); -+} -+#endif -+ -+ - #ifdef CONFIG_DEBUG_OBJECTS_WORK - - static struct debug_obj_descr work_debug_descr; -@@ -562,8 +596,7 @@ - * @wq: the target workqueue - * @node: the node ID - * -- * This must be called with any of wq_pool_mutex, wq->mutex or sched RCU -- * read locked. -+ * This must be called with any of wq_pool_mutex, wq->mutex or RCU read locked. - * If the pwq needs to be used beyond the locking in effect, the caller is - * responsible for guaranteeing that the pwq stays online. - * -@@ -706,8 +739,8 @@ - * @work: the work item of interest - * - * Pools are created and destroyed under wq_pool_mutex, and allows read -- * access under sched-RCU read lock. As such, this function should be -- * called under wq_pool_mutex or with preemption disabled. -+ * access under RCU read lock. As such, this function should be -+ * called under wq_pool_mutex or inside of a rcu_read_lock() region. - * - * All fields of the returned pool are accessible as long as the above - * mentioned locking is in effect. If the returned pool needs to be used -@@ -844,51 +877,44 @@ - */ - static void wake_up_worker(struct worker_pool *pool) - { -- struct worker *worker = first_idle_worker(pool); -+ struct worker *worker; -+ -+ rt_lock_idle_list(pool); -+ -+ worker = first_idle_worker(pool); - - if (likely(worker)) - wake_up_process(worker->task); -+ -+ rt_unlock_idle_list(pool); - } - - /** -- * wq_worker_waking_up - a worker is waking up -- * @task: task waking up -- * @cpu: CPU @task is waking up to -- * -- * This function is called during try_to_wake_up() when a worker is -- * being awoken. -+ * wq_worker_running - a worker is running again -+ * @task: task returning from sleep - * -- * CONTEXT: -- * spin_lock_irq(rq->lock) -+ * This function is called when a worker returns from schedule() - */ --void wq_worker_waking_up(struct task_struct *task, int cpu) -+void wq_worker_running(struct task_struct *task) - { - struct worker *worker = kthread_data(task); - -- if (!(worker->flags & WORKER_NOT_RUNNING)) { -- WARN_ON_ONCE(worker->pool->cpu != cpu); -+ if (!worker->sleeping) -+ return; -+ if (!(worker->flags & WORKER_NOT_RUNNING)) - atomic_inc(&worker->pool->nr_running); -- } -+ worker->sleeping = 0; - } - - /** - * wq_worker_sleeping - a worker is going to sleep - * @task: task going to sleep -- * @cpu: CPU in question, must be the current CPU number -- * -- * This function is called during schedule() when a busy worker is -- * going to sleep. Worker on the same cpu can be woken up by -- * returning pointer to its task. -- * -- * CONTEXT: -- * spin_lock_irq(rq->lock) -- * -- * Return: -- * Worker task on @cpu to wake up, %NULL if none. -+ * This function is called from schedule() when a busy worker is -+ * going to sleep. - */ --struct task_struct *wq_worker_sleeping(struct task_struct *task, int cpu) -+void wq_worker_sleeping(struct task_struct *task) - { -- struct worker *worker = kthread_data(task), *to_wakeup = NULL; -+ struct worker *worker = kthread_data(task); - struct worker_pool *pool; - - /* -@@ -897,29 +923,26 @@ - * checking NOT_RUNNING. - */ - if (worker->flags & WORKER_NOT_RUNNING) -- return NULL; -+ return; - - pool = worker->pool; - -- /* this can only happen on the local cpu */ -- if (WARN_ON_ONCE(cpu != raw_smp_processor_id() || pool->cpu != cpu)) -- return NULL; -+ if (WARN_ON_ONCE(worker->sleeping)) -+ return; -+ -+ worker->sleeping = 1; - - /* - * The counterpart of the following dec_and_test, implied mb, - * worklist not empty test sequence is in insert_work(). - * Please read comment there. -- * -- * NOT_RUNNING is clear. This means that we're bound to and -- * running on the local cpu w/ rq lock held and preemption -- * disabled, which in turn means that none else could be -- * manipulating idle_list, so dereferencing idle_list without pool -- * lock is safe. - */ - if (atomic_dec_and_test(&pool->nr_running) && -- !list_empty(&pool->worklist)) -- to_wakeup = first_idle_worker(pool); -- return to_wakeup ? to_wakeup->task : NULL; -+ !list_empty(&pool->worklist)) { -+ sched_lock_idle_list(pool); -+ wake_up_worker(pool); -+ sched_unlock_idle_list(pool); -+ } - } - - /** -@@ -1113,12 +1136,12 @@ - { - if (pwq) { - /* -- * As both pwqs and pools are sched-RCU protected, the -+ * As both pwqs and pools are RCU protected, the - * following lock operations are safe. - */ -- spin_lock_irq(&pwq->pool->lock); -+ local_spin_lock_irq(pendingb_lock, &pwq->pool->lock); - put_pwq(pwq); -- spin_unlock_irq(&pwq->pool->lock); -+ local_spin_unlock_irq(pendingb_lock, &pwq->pool->lock); - } - } - -@@ -1220,7 +1243,7 @@ - struct worker_pool *pool; - struct pool_workqueue *pwq; - -- local_irq_save(*flags); -+ local_lock_irqsave(pendingb_lock, *flags); - - /* try to steal the timer if it exists */ - if (is_dwork) { -@@ -1239,6 +1262,7 @@ - if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) - return 0; - -+ rcu_read_lock(); - /* - * The queueing is in progress, or it is already queued. Try to - * steal it from ->worklist without clearing WORK_STRUCT_PENDING. -@@ -1277,14 +1301,16 @@ - set_work_pool_and_keep_pending(work, pool->id); - - spin_unlock(&pool->lock); -+ rcu_read_unlock(); - return 1; - } - spin_unlock(&pool->lock); - fail: -- local_irq_restore(*flags); -+ rcu_read_unlock(); -+ local_unlock_irqrestore(pendingb_lock, *flags); - if (work_is_canceling(work)) - return -ENOENT; -- cpu_relax(); -+ cpu_chill(); - return -EAGAIN; - } - -@@ -1353,7 +1379,7 @@ - * queued or lose PENDING. Grabbing PENDING and queueing should - * happen with IRQ disabled. - */ -- WARN_ON_ONCE(!irqs_disabled()); -+ WARN_ON_ONCE_NONRT(!irqs_disabled()); - - debug_work_activate(work); - -@@ -1361,6 +1387,8 @@ - if (unlikely(wq->flags & __WQ_DRAINING) && - WARN_ON_ONCE(!is_chained_work(wq))) - return; -+ -+ rcu_read_lock(); - retry: - if (req_cpu == WORK_CPU_UNBOUND) - cpu = raw_smp_processor_id(); -@@ -1417,10 +1445,8 @@ - /* pwq determined, queue */ - trace_workqueue_queue_work(req_cpu, pwq, work); - -- if (WARN_ON(!list_empty(&work->entry))) { -- spin_unlock(&pwq->pool->lock); -- return; -- } -+ if (WARN_ON(!list_empty(&work->entry))) -+ goto out; - - pwq->nr_in_flight[pwq->work_color]++; - work_flags = work_color_to_flags(pwq->work_color); -@@ -1436,7 +1462,9 @@ - - insert_work(pwq, work, worklist, work_flags); - -+out: - spin_unlock(&pwq->pool->lock); -+ rcu_read_unlock(); - } - - /** -@@ -1456,14 +1484,14 @@ - bool ret = false; - unsigned long flags; - -- local_irq_save(flags); -+ local_lock_irqsave(pendingb_lock,flags); - - if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) { - __queue_work(cpu, wq, work); - ret = true; - } - -- local_irq_restore(flags); -+ local_unlock_irqrestore(pendingb_lock, flags); - return ret; - } - EXPORT_SYMBOL(queue_work_on); -@@ -1530,14 +1558,14 @@ - unsigned long flags; - - /* read the comment in __queue_work() */ -- local_irq_save(flags); -+ local_lock_irqsave(pendingb_lock, flags); - - if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) { - __queue_delayed_work(cpu, wq, dwork, delay); - ret = true; - } - -- local_irq_restore(flags); -+ local_unlock_irqrestore(pendingb_lock, flags); - return ret; - } - EXPORT_SYMBOL(queue_delayed_work_on); -@@ -1572,7 +1600,7 @@ - - if (likely(ret >= 0)) { - __queue_delayed_work(cpu, wq, dwork, delay); -- local_irq_restore(flags); -+ local_unlock_irqrestore(pendingb_lock, flags); - } - - /* -ENOENT from try_to_grab_pending() becomes %true */ -@@ -1605,7 +1633,9 @@ - worker->last_active = jiffies; - - /* idle_list is LIFO */ -+ rt_lock_idle_list(pool); - list_add(&worker->entry, &pool->idle_list); -+ rt_unlock_idle_list(pool); - - if (too_many_workers(pool) && !timer_pending(&pool->idle_timer)) - mod_timer(&pool->idle_timer, jiffies + IDLE_WORKER_TIMEOUT); -@@ -1638,7 +1668,9 @@ - return; - worker_clr_flags(worker, WORKER_IDLE); - pool->nr_idle--; -+ rt_lock_idle_list(pool); - list_del_init(&worker->entry); -+ rt_unlock_idle_list(pool); - } - - static struct worker *alloc_worker(int node) -@@ -1806,7 +1838,9 @@ - pool->nr_workers--; - pool->nr_idle--; - -+ rt_lock_idle_list(pool); - list_del_init(&worker->entry); -+ rt_unlock_idle_list(pool); - worker->flags |= WORKER_DIE; - wake_up_process(worker->task); - } -@@ -2723,14 +2757,14 @@ - - might_sleep(); - -- local_irq_disable(); -+ rcu_read_lock(); - pool = get_work_pool(work); - if (!pool) { -- local_irq_enable(); -+ rcu_read_unlock(); - return false; - } - -- spin_lock(&pool->lock); -+ spin_lock_irq(&pool->lock); - /* see the comment in try_to_grab_pending() with the same code */ - pwq = get_work_pwq(work); - if (pwq) { -@@ -2757,10 +2791,11 @@ - else - lock_map_acquire_read(&pwq->wq->lockdep_map); - lock_map_release(&pwq->wq->lockdep_map); -- -+ rcu_read_unlock(); - return true; - already_gone: - spin_unlock_irq(&pool->lock); -+ rcu_read_unlock(); - return false; - } - -@@ -2847,7 +2882,7 @@ - - /* tell other tasks trying to grab @work to back off */ - mark_work_canceling(work); -- local_irq_restore(flags); -+ local_unlock_irqrestore(pendingb_lock, flags); - - flush_work(work); - clear_work_data(work); -@@ -2902,10 +2937,10 @@ - */ - bool flush_delayed_work(struct delayed_work *dwork) - { -- local_irq_disable(); -+ local_lock_irq(pendingb_lock); - if (del_timer_sync(&dwork->timer)) - __queue_work(dwork->cpu, dwork->wq, &dwork->work); -- local_irq_enable(); -+ local_unlock_irq(pendingb_lock); - return flush_work(&dwork->work); - } - EXPORT_SYMBOL(flush_delayed_work); -@@ -2940,7 +2975,7 @@ - - set_work_pool_and_clear_pending(&dwork->work, - get_work_pool_id(&dwork->work)); -- local_irq_restore(flags); -+ local_unlock_irqrestore(pendingb_lock, flags); - return ret; - } - EXPORT_SYMBOL(cancel_delayed_work); -@@ -3198,7 +3233,7 @@ - * put_unbound_pool - put a worker_pool - * @pool: worker_pool to put - * -- * Put @pool. If its refcnt reaches zero, it gets destroyed in sched-RCU -+ * Put @pool. If its refcnt reaches zero, it gets destroyed in RCU - * safe manner. get_unbound_pool() calls this function on its failure path - * and this function should be able to release pools which went through, - * successfully or not, init_worker_pool(). -@@ -3252,8 +3287,8 @@ - del_timer_sync(&pool->idle_timer); - del_timer_sync(&pool->mayday_timer); - -- /* sched-RCU protected to allow dereferences from get_work_pool() */ -- call_rcu_sched(&pool->rcu, rcu_free_pool); -+ /* RCU protected to allow dereferences from get_work_pool() */ -+ call_rcu(&pool->rcu, rcu_free_pool); - } - - /** -@@ -3358,14 +3393,14 @@ - put_unbound_pool(pool); - mutex_unlock(&wq_pool_mutex); - -- call_rcu_sched(&pwq->rcu, rcu_free_pwq); -+ call_rcu(&pwq->rcu, rcu_free_pwq); - - /* - * If we're the last pwq going away, @wq is already dead and no one - * is gonna access it anymore. Schedule RCU free. - */ - if (is_last) -- call_rcu_sched(&wq->rcu, rcu_free_wq); -+ call_rcu(&wq->rcu, rcu_free_wq); - } - - /** -@@ -4003,7 +4038,7 @@ - * The base ref is never dropped on per-cpu pwqs. Directly - * schedule RCU free. - */ -- call_rcu_sched(&wq->rcu, rcu_free_wq); -+ call_rcu(&wq->rcu, rcu_free_wq); - } else { - /* - * We're the sole accessor of @wq at this point. Directly -@@ -4096,7 +4131,8 @@ - struct pool_workqueue *pwq; - bool ret; - -- rcu_read_lock_sched(); -+ rcu_read_lock(); -+ preempt_disable(); - - if (cpu == WORK_CPU_UNBOUND) - cpu = smp_processor_id(); -@@ -4107,7 +4143,8 @@ - pwq = unbound_pwq_by_node(wq, cpu_to_node(cpu)); - - ret = !list_empty(&pwq->delayed_works); -- rcu_read_unlock_sched(); -+ preempt_enable(); -+ rcu_read_unlock(); - - return ret; - } -@@ -4133,15 +4170,15 @@ - if (work_pending(work)) - ret |= WORK_BUSY_PENDING; - -- local_irq_save(flags); -+ rcu_read_lock(); - pool = get_work_pool(work); - if (pool) { -- spin_lock(&pool->lock); -+ spin_lock_irqsave(&pool->lock, flags); - if (find_worker_executing_work(pool, work)) - ret |= WORK_BUSY_RUNNING; -- spin_unlock(&pool->lock); -+ spin_unlock_irqrestore(&pool->lock, flags); - } -- local_irq_restore(flags); -+ rcu_read_unlock(); - - return ret; - } -@@ -4330,7 +4367,7 @@ - unsigned long flags; - int pi; - -- rcu_read_lock_sched(); -+ rcu_read_lock(); - - pr_info("Showing busy workqueues and worker pools:\n"); - -@@ -4381,7 +4418,7 @@ - spin_unlock_irqrestore(&pool->lock, flags); - } - -- rcu_read_unlock_sched(); -+ rcu_read_unlock(); - } - - /* -@@ -4742,16 +4779,16 @@ - * nr_active is monotonically decreasing. It's safe - * to peek without lock. - */ -- rcu_read_lock_sched(); -+ rcu_read_lock(); - for_each_pwq(pwq, wq) { - WARN_ON_ONCE(pwq->nr_active < 0); - if (pwq->nr_active) { - busy = true; -- rcu_read_unlock_sched(); -+ rcu_read_unlock(); - goto out_unlock; - } - } -- rcu_read_unlock_sched(); -+ rcu_read_unlock(); - } - out_unlock: - mutex_unlock(&wq_pool_mutex); -@@ -4865,7 +4902,8 @@ - const char *delim = ""; - int node, written = 0; - -- rcu_read_lock_sched(); -+ get_online_cpus(); -+ rcu_read_lock(); - for_each_node(node) { - written += scnprintf(buf + written, PAGE_SIZE - written, - "%s%d:%d", delim, node, -@@ -4873,7 +4911,8 @@ - delim = " "; - } - written += scnprintf(buf + written, PAGE_SIZE - written, "\n"); -- rcu_read_unlock_sched(); -+ rcu_read_unlock(); -+ put_online_cpus(); - - return written; - } -diff -Nur linux-4.1.26.orig/kernel/workqueue_internal.h linux-4.1.26/kernel/workqueue_internal.h ---- linux-4.1.26.orig/kernel/workqueue_internal.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/kernel/workqueue_internal.h 2016-06-19 15:30:58.719298583 +0200 -@@ -43,6 +43,7 @@ - unsigned long last_active; /* L: last active timestamp */ - unsigned int flags; /* X: flags */ - int id; /* I: worker id */ -+ int sleeping; /* None */ - - /* - * Opaque string set with work_set_desc(). Printed out with task -@@ -68,7 +69,7 @@ - * Scheduler hooks for concurrency managed workqueue. Only to be used from - * sched/core.c and workqueue.c. - */ --void wq_worker_waking_up(struct task_struct *task, int cpu); --struct task_struct *wq_worker_sleeping(struct task_struct *task, int cpu); -+void wq_worker_running(struct task_struct *task); -+void wq_worker_sleeping(struct task_struct *task); - - #endif /* _KERNEL_WORKQUEUE_INTERNAL_H */ -diff -Nur linux-4.1.26.orig/lib/debugobjects.c linux-4.1.26/lib/debugobjects.c ---- linux-4.1.26.orig/lib/debugobjects.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/debugobjects.c 2016-06-19 15:30:58.719298583 +0200 -@@ -309,7 +309,10 @@ - struct debug_obj *obj; - unsigned long flags; - -- fill_pool(); -+#ifdef CONFIG_PREEMPT_RT_FULL -+ if (preempt_count() == 0 && !irqs_disabled()) -+#endif -+ fill_pool(); - - db = get_bucket((unsigned long) addr); - -diff -Nur linux-4.1.26.orig/lib/dump_stack.c linux-4.1.26/lib/dump_stack.c ---- linux-4.1.26.orig/lib/dump_stack.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/dump_stack.c 2016-06-19 15:30:58.719298583 +0200 -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - - static void __dump_stack(void) - { -diff -Nur linux-4.1.26.orig/lib/idr.c linux-4.1.26/lib/idr.c ---- linux-4.1.26.orig/lib/idr.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/idr.c 2016-06-19 15:30:58.723298738 +0200 -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - - #define MAX_IDR_SHIFT (sizeof(int) * 8 - 1) - #define MAX_IDR_BIT (1U << MAX_IDR_SHIFT) -@@ -366,6 +367,35 @@ - idr_mark_full(pa, id); - } - -+#ifdef CONFIG_PREEMPT_RT_FULL -+static DEFINE_LOCAL_IRQ_LOCK(idr_lock); -+ -+static inline void idr_preload_lock(void) -+{ -+ local_lock(idr_lock); -+} -+ -+static inline void idr_preload_unlock(void) -+{ -+ local_unlock(idr_lock); -+} -+ -+void idr_preload_end(void) -+{ -+ idr_preload_unlock(); -+} -+EXPORT_SYMBOL(idr_preload_end); -+#else -+static inline void idr_preload_lock(void) -+{ -+ preempt_disable(); -+} -+ -+static inline void idr_preload_unlock(void) -+{ -+ preempt_enable(); -+} -+#endif - - /** - * idr_preload - preload for idr_alloc() -@@ -401,7 +431,7 @@ - WARN_ON_ONCE(in_interrupt()); - might_sleep_if(gfp_mask & __GFP_WAIT); - -- preempt_disable(); -+ idr_preload_lock(); - - /* - * idr_alloc() is likely to succeed w/o full idr_layer buffer and -@@ -413,9 +443,9 @@ - while (__this_cpu_read(idr_preload_cnt) < MAX_IDR_FREE) { - struct idr_layer *new; - -- preempt_enable(); -+ idr_preload_unlock(); - new = kmem_cache_zalloc(idr_layer_cache, gfp_mask); -- preempt_disable(); -+ idr_preload_lock(); - if (!new) - break; - -diff -Nur linux-4.1.26.orig/lib/Kconfig linux-4.1.26/lib/Kconfig ---- linux-4.1.26.orig/lib/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/Kconfig 2016-06-19 15:30:58.719298583 +0200 -@@ -391,6 +391,7 @@ - - config CPUMASK_OFFSTACK - bool "Force CPU masks off stack" if DEBUG_PER_CPU_MAPS -+ depends on !PREEMPT_RT_FULL - help - Use dynamic allocation for cpumask_var_t, instead of putting - them on the stack. This is a bit more expensive, but avoids -diff -Nur linux-4.1.26.orig/lib/locking-selftest.c linux-4.1.26/lib/locking-selftest.c ---- linux-4.1.26.orig/lib/locking-selftest.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/locking-selftest.c 2016-06-19 15:30:58.723298738 +0200 -@@ -590,6 +590,8 @@ - #include "locking-selftest-spin-hardirq.h" - GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_spin) - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - #include "locking-selftest-rlock-hardirq.h" - GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_rlock) - -@@ -605,9 +607,12 @@ - #include "locking-selftest-wlock-softirq.h" - GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_soft_wlock) - -+#endif -+ - #undef E1 - #undef E2 - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * Enabling hardirqs with a softirq-safe lock held: - */ -@@ -640,6 +645,8 @@ - #undef E1 - #undef E2 - -+#endif -+ - /* - * Enabling irqs with an irq-safe lock held: - */ -@@ -663,6 +670,8 @@ - #include "locking-selftest-spin-hardirq.h" - GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_spin) - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - #include "locking-selftest-rlock-hardirq.h" - GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_rlock) - -@@ -678,6 +687,8 @@ - #include "locking-selftest-wlock-softirq.h" - GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_wlock) - -+#endif -+ - #undef E1 - #undef E2 - -@@ -709,6 +720,8 @@ - #include "locking-selftest-spin-hardirq.h" - GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_spin) - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - #include "locking-selftest-rlock-hardirq.h" - GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_rlock) - -@@ -724,6 +737,8 @@ - #include "locking-selftest-wlock-softirq.h" - GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_wlock) - -+#endif -+ - #undef E1 - #undef E2 - #undef E3 -@@ -757,6 +772,8 @@ - #include "locking-selftest-spin-hardirq.h" - GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_spin) - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - #include "locking-selftest-rlock-hardirq.h" - GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_rlock) - -@@ -772,10 +789,14 @@ - #include "locking-selftest-wlock-softirq.h" - GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_soft_wlock) - -+#endif -+ - #undef E1 - #undef E2 - #undef E3 - -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - /* - * read-lock / write-lock irq inversion. - * -@@ -838,6 +859,10 @@ - #undef E2 - #undef E3 - -+#endif -+ -+#ifndef CONFIG_PREEMPT_RT_FULL -+ - /* - * read-lock / write-lock recursion that is actually safe. - */ -@@ -876,6 +901,8 @@ - #undef E2 - #undef E3 - -+#endif -+ - /* - * read-lock / write-lock recursion that is unsafe. - */ -@@ -1858,6 +1885,7 @@ - - printk(" --------------------------------------------------------------------------\n"); - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * irq-context testcases: - */ -@@ -1870,6 +1898,28 @@ - - DO_TESTCASE_6x2("irq read-recursion", irq_read_recursion); - // DO_TESTCASE_6x2B("irq read-recursion #2", irq_read_recursion2); -+#else -+ /* On -rt, we only do hardirq context test for raw spinlock */ -+ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 12); -+ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 21); -+ -+ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 12); -+ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 21); -+ -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 123); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 132); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 213); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 231); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 312); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 321); -+ -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 123); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 132); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 213); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 231); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 312); -+ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 321); -+#endif - - ww_tests(); - -diff -Nur linux-4.1.26.orig/lib/percpu_ida.c linux-4.1.26/lib/percpu_ida.c ---- linux-4.1.26.orig/lib/percpu_ida.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/percpu_ida.c 2016-06-19 15:30:58.723298738 +0200 -@@ -26,6 +26,9 @@ - #include - #include - #include -+#include -+ -+static DEFINE_LOCAL_IRQ_LOCK(irq_off_lock); - - struct percpu_ida_cpu { - /* -@@ -148,13 +151,13 @@ - unsigned long flags; - int tag; - -- local_irq_save(flags); -+ local_lock_irqsave(irq_off_lock, flags); - tags = this_cpu_ptr(pool->tag_cpu); - - /* Fastpath */ - tag = alloc_local_tag(tags); - if (likely(tag >= 0)) { -- local_irq_restore(flags); -+ local_unlock_irqrestore(irq_off_lock, flags); - return tag; - } - -@@ -173,6 +176,7 @@ - - if (!tags->nr_free) - alloc_global_tags(pool, tags); -+ - if (!tags->nr_free) - steal_tags(pool, tags); - -@@ -184,7 +188,7 @@ - } - - spin_unlock(&pool->lock); -- local_irq_restore(flags); -+ local_unlock_irqrestore(irq_off_lock, flags); - - if (tag >= 0 || state == TASK_RUNNING) - break; -@@ -196,7 +200,7 @@ - - schedule(); - -- local_irq_save(flags); -+ local_lock_irqsave(irq_off_lock, flags); - tags = this_cpu_ptr(pool->tag_cpu); - } - if (state != TASK_RUNNING) -@@ -221,7 +225,7 @@ - - BUG_ON(tag >= pool->nr_tags); - -- local_irq_save(flags); -+ local_lock_irqsave(irq_off_lock, flags); - tags = this_cpu_ptr(pool->tag_cpu); - - spin_lock(&tags->lock); -@@ -253,7 +257,7 @@ - spin_unlock(&pool->lock); - } - -- local_irq_restore(flags); -+ local_unlock_irqrestore(irq_off_lock, flags); - } - EXPORT_SYMBOL_GPL(percpu_ida_free); - -@@ -345,7 +349,7 @@ - struct percpu_ida_cpu *remote; - unsigned cpu, i, err = 0; - -- local_irq_save(flags); -+ local_lock_irqsave(irq_off_lock, flags); - for_each_possible_cpu(cpu) { - remote = per_cpu_ptr(pool->tag_cpu, cpu); - spin_lock(&remote->lock); -@@ -367,7 +371,7 @@ - } - spin_unlock(&pool->lock); - out: -- local_irq_restore(flags); -+ local_unlock_irqrestore(irq_off_lock, flags); - return err; - } - EXPORT_SYMBOL_GPL(percpu_ida_for_each_free); -diff -Nur linux-4.1.26.orig/lib/radix-tree.c linux-4.1.26/lib/radix-tree.c ---- linux-4.1.26.orig/lib/radix-tree.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/radix-tree.c 2016-06-19 15:30:58.723298738 +0200 -@@ -195,12 +195,13 @@ - * succeed in getting a node here (and never reach - * kmem_cache_alloc) - */ -- rtp = this_cpu_ptr(&radix_tree_preloads); -+ rtp = &get_cpu_var(radix_tree_preloads); - if (rtp->nr) { - ret = rtp->nodes[rtp->nr - 1]; - rtp->nodes[rtp->nr - 1] = NULL; - rtp->nr--; - } -+ put_cpu_var(radix_tree_preloads); - /* - * Update the allocation stack trace as this is more useful - * for debugging. -@@ -240,6 +241,7 @@ - call_rcu(&node->rcu_head, radix_tree_node_rcu_free); - } - -+#ifndef CONFIG_PREEMPT_RT_FULL - /* - * Load up this CPU's radix_tree_node buffer with sufficient objects to - * ensure that the addition of a single element in the tree cannot fail. On -@@ -305,6 +307,7 @@ - return 0; - } - EXPORT_SYMBOL(radix_tree_maybe_preload); -+#endif - - /* - * Return the maximum key which can be store into a -diff -Nur linux-4.1.26.orig/lib/scatterlist.c linux-4.1.26/lib/scatterlist.c ---- linux-4.1.26.orig/lib/scatterlist.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/scatterlist.c 2016-06-19 15:30:58.723298738 +0200 -@@ -592,7 +592,7 @@ - flush_kernel_dcache_page(miter->page); - - if (miter->__flags & SG_MITER_ATOMIC) { -- WARN_ON_ONCE(preemptible()); -+ WARN_ON_ONCE(!pagefault_disabled()); - kunmap_atomic(miter->addr); - } else - kunmap(miter->page); -@@ -637,7 +637,7 @@ - if (!sg_miter_skip(&miter, skip)) - return false; - -- local_irq_save(flags); -+ local_irq_save_nort(flags); - - while (sg_miter_next(&miter) && offset < buflen) { - unsigned int len; -@@ -654,7 +654,7 @@ - - sg_miter_stop(&miter); - -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - return offset; - } - -diff -Nur linux-4.1.26.orig/lib/smp_processor_id.c linux-4.1.26/lib/smp_processor_id.c ---- linux-4.1.26.orig/lib/smp_processor_id.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/smp_processor_id.c 2016-06-19 15:30:58.723298738 +0200 -@@ -39,8 +39,9 @@ - if (!printk_ratelimit()) - goto out_enable; - -- printk(KERN_ERR "BUG: using %s%s() in preemptible [%08x] code: %s/%d\n", -- what1, what2, preempt_count() - 1, current->comm, current->pid); -+ printk(KERN_ERR "BUG: using %s%s() in preemptible [%08x %08x] code: %s/%d\n", -+ what1, what2, preempt_count() - 1, __migrate_disabled(current), -+ current->comm, current->pid); - - print_symbol("caller is %s\n", (long)__builtin_return_address(0)); - dump_stack(); -diff -Nur linux-4.1.26.orig/lib/strnlen_user.c linux-4.1.26/lib/strnlen_user.c ---- linux-4.1.26.orig/lib/strnlen_user.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/lib/strnlen_user.c 2016-06-19 15:30:58.723298738 +0200 -@@ -85,7 +85,8 @@ - * @str: The string to measure. - * @count: Maximum count (including NUL character) - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Get the size of a NUL-terminated string in user space. - * -@@ -121,7 +122,8 @@ - * strlen_user: - Get the size of a user string INCLUDING final NUL. - * @str: The string to measure. - * -- * Context: User context only. This function may sleep. -+ * Context: User context only. This function may sleep if pagefaults are -+ * enabled. - * - * Get the size of a NUL-terminated string in user space. - * -diff -Nur linux-4.1.26.orig/mm/compaction.c linux-4.1.26/mm/compaction.c ---- linux-4.1.26.orig/mm/compaction.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/compaction.c 2016-06-19 15:30:58.823302594 +0200 -@@ -1398,10 +1398,12 @@ - cc->migrate_pfn & ~((1UL << cc->order) - 1); - - if (last_migrated_pfn < current_block_start) { -- cpu = get_cpu(); -+ cpu = get_cpu_light(); -+ local_lock_irq(swapvec_lock); - lru_add_drain_cpu(cpu); -+ local_unlock_irq(swapvec_lock); - drain_local_pages(zone); -- put_cpu(); -+ put_cpu_light(); - /* No more flushing until we migrate again */ - last_migrated_pfn = 0; - } -diff -Nur linux-4.1.26.orig/mm/filemap.c linux-4.1.26/mm/filemap.c ---- linux-4.1.26.orig/mm/filemap.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/filemap.c 2016-06-19 15:30:58.823302594 +0200 -@@ -167,7 +167,9 @@ - if (!workingset_node_pages(node) && - list_empty(&node->private_list)) { - node->private_data = mapping; -- list_lru_add(&workingset_shadow_nodes, &node->private_list); -+ local_lock(workingset_shadow_lock); -+ list_lru_add(&__workingset_shadow_nodes, &node->private_list); -+ local_unlock(workingset_shadow_lock); - } - } - -@@ -533,9 +535,12 @@ - * node->private_list is protected by - * mapping->tree_lock. - */ -- if (!list_empty(&node->private_list)) -- list_lru_del(&workingset_shadow_nodes, -+ if (!list_empty(&node->private_list)) { -+ local_lock(workingset_shadow_lock); -+ list_lru_del(&__workingset_shadow_nodes, - &node->private_list); -+ local_unlock(workingset_shadow_lock); -+ } - } - return 0; - } -diff -Nur linux-4.1.26.orig/mm/highmem.c linux-4.1.26/mm/highmem.c ---- linux-4.1.26.orig/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/highmem.c 2016-06-19 15:30:58.823302594 +0200 -@@ -29,10 +29,11 @@ - #include - #include - -- -+#ifndef CONFIG_PREEMPT_RT_FULL - #if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) - DEFINE_PER_CPU(int, __kmap_atomic_idx); - #endif -+#endif - - /* - * Virtual_count is not a pure "count". -@@ -107,8 +108,9 @@ - unsigned long totalhigh_pages __read_mostly; - EXPORT_SYMBOL(totalhigh_pages); - -- -+#ifndef CONFIG_PREEMPT_RT_FULL - EXPORT_PER_CPU_SYMBOL(__kmap_atomic_idx); -+#endif - - unsigned int nr_free_highpages (void) - { -diff -Nur linux-4.1.26.orig/mm/Kconfig linux-4.1.26/mm/Kconfig ---- linux-4.1.26.orig/mm/Kconfig 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/Kconfig 2016-06-19 15:30:58.823302594 +0200 -@@ -409,7 +409,7 @@ - - config TRANSPARENT_HUGEPAGE - bool "Transparent Hugepage Support" -- depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE -+ depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE && !PREEMPT_RT_FULL - select COMPACTION - help - Transparent Hugepages allows the kernel to use huge pages and -diff -Nur linux-4.1.26.orig/mm/memcontrol.c linux-4.1.26/mm/memcontrol.c ---- linux-4.1.26.orig/mm/memcontrol.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/memcontrol.c 2016-06-19 15:30:58.827302748 +0200 -@@ -66,6 +66,8 @@ - #include - #include - #include -+#include -+ - #include "slab.h" - - #include -@@ -85,6 +87,7 @@ - #define do_swap_account 0 - #endif - -+static DEFINE_LOCAL_IRQ_LOCK(event_lock); - static const char * const mem_cgroup_stat_names[] = { - "cache", - "rss", -@@ -2124,14 +2127,17 @@ - */ - static void refill_stock(struct mem_cgroup *memcg, unsigned int nr_pages) - { -- struct memcg_stock_pcp *stock = &get_cpu_var(memcg_stock); -+ struct memcg_stock_pcp *stock; -+ int cpu = get_cpu_light(); -+ -+ stock = &per_cpu(memcg_stock, cpu); - - if (stock->cached != memcg) { /* reset if necessary */ - drain_stock(stock); - stock->cached = memcg; - } - stock->nr_pages += nr_pages; -- put_cpu_var(memcg_stock); -+ put_cpu_light(); - } - - /* -@@ -2147,7 +2153,7 @@ - return; - /* Notify other cpus that system-wide "drain" is running */ - get_online_cpus(); -- curcpu = get_cpu(); -+ curcpu = get_cpu_light(); - for_each_online_cpu(cpu) { - struct memcg_stock_pcp *stock = &per_cpu(memcg_stock, cpu); - struct mem_cgroup *memcg; -@@ -2164,7 +2170,7 @@ - schedule_work_on(cpu, &stock->work); - } - } -- put_cpu(); -+ put_cpu_light(); - put_online_cpus(); - mutex_unlock(&percpu_charge_mutex); - } -@@ -4803,12 +4809,12 @@ - - ret = 0; - -- local_irq_disable(); -+ local_lock_irq(event_lock); - mem_cgroup_charge_statistics(to, page, nr_pages); - memcg_check_events(to, page); - mem_cgroup_charge_statistics(from, page, -nr_pages); - memcg_check_events(from, page); -- local_irq_enable(); -+ local_unlock_irq(event_lock); - out_unlock: - unlock_page(page); - out: -@@ -5551,10 +5557,10 @@ - VM_BUG_ON_PAGE(!PageTransHuge(page), page); - } - -- local_irq_disable(); -+ local_lock_irq(event_lock); - mem_cgroup_charge_statistics(memcg, page, nr_pages); - memcg_check_events(memcg, page); -- local_irq_enable(); -+ local_unlock_irq(event_lock); - - if (do_swap_account && PageSwapCache(page)) { - swp_entry_t entry = { .val = page_private(page) }; -@@ -5610,14 +5616,14 @@ - memcg_oom_recover(memcg); - } - -- local_irq_save(flags); -+ local_lock_irqsave(event_lock, flags); - __this_cpu_sub(memcg->stat->count[MEM_CGROUP_STAT_RSS], nr_anon); - __this_cpu_sub(memcg->stat->count[MEM_CGROUP_STAT_CACHE], nr_file); - __this_cpu_sub(memcg->stat->count[MEM_CGROUP_STAT_RSS_HUGE], nr_huge); - __this_cpu_add(memcg->stat->events[MEM_CGROUP_EVENTS_PGPGOUT], pgpgout); - __this_cpu_add(memcg->stat->nr_page_events, nr_pages); - memcg_check_events(memcg, dummy_page); -- local_irq_restore(flags); -+ local_unlock_irqrestore(event_lock, flags); - - if (!mem_cgroup_is_root(memcg)) - css_put_many(&memcg->css, nr_pages); -@@ -5821,6 +5827,7 @@ - { - struct mem_cgroup *memcg; - unsigned short oldid; -+ unsigned long flags; - - VM_BUG_ON_PAGE(PageLRU(page), page); - VM_BUG_ON_PAGE(page_count(page), page); -@@ -5843,9 +5850,11 @@ - if (!mem_cgroup_is_root(memcg)) - page_counter_uncharge(&memcg->memory, 1); - -+ local_lock_irqsave(event_lock, flags); - /* Caller disabled preemption with mapping->tree_lock */ - mem_cgroup_charge_statistics(memcg, page, -1); - memcg_check_events(memcg, page); -+ local_unlock_irqrestore(event_lock, flags); - } - - /** -diff -Nur linux-4.1.26.orig/mm/memory.c linux-4.1.26/mm/memory.c ---- linux-4.1.26.orig/mm/memory.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/memory.c 2016-06-19 15:30:58.827302748 +0200 -@@ -3753,7 +3753,7 @@ - } - - #if defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP) --void might_fault(void) -+void __might_fault(const char *file, int line) - { - /* - * Some code (nfs/sunrpc) uses socket ops on kernel memory while -@@ -3763,21 +3763,15 @@ - */ - if (segment_eq(get_fs(), KERNEL_DS)) - return; -- -- /* -- * it would be nicer only to annotate paths which are not under -- * pagefault_disable, however that requires a larger audit and -- * providing helpers like get_user_atomic. -- */ -- if (in_atomic()) -+ if (pagefault_disabled()) - return; -- -- __might_sleep(__FILE__, __LINE__, 0); -- -+ __might_sleep(file, line, 0); -+#if defined(CONFIG_DEBUG_ATOMIC_SLEEP) - if (current->mm) - might_lock_read(¤t->mm->mmap_sem); -+#endif - } --EXPORT_SYMBOL(might_fault); -+EXPORT_SYMBOL(__might_fault); - #endif - - #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLBFS) -diff -Nur linux-4.1.26.orig/mm/mmu_context.c linux-4.1.26/mm/mmu_context.c ---- linux-4.1.26.orig/mm/mmu_context.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/mmu_context.c 2016-06-19 15:30:58.827302748 +0200 -@@ -23,6 +23,7 @@ - struct task_struct *tsk = current; - - task_lock(tsk); -+ preempt_disable_rt(); - active_mm = tsk->active_mm; - if (active_mm != mm) { - atomic_inc(&mm->mm_count); -@@ -30,6 +31,7 @@ - } - tsk->mm = mm; - switch_mm(active_mm, mm, tsk); -+ preempt_enable_rt(); - task_unlock(tsk); - #ifdef finish_arch_post_lock_switch - finish_arch_post_lock_switch(); -diff -Nur linux-4.1.26.orig/mm/page_alloc.c linux-4.1.26/mm/page_alloc.c ---- linux-4.1.26.orig/mm/page_alloc.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/page_alloc.c 2016-06-19 15:30:58.827302748 +0200 -@@ -60,6 +60,7 @@ - #include - #include - #include -+#include - #include - - #include -@@ -233,6 +234,18 @@ - EXPORT_SYMBOL(nr_online_nodes); - #endif - -+static DEFINE_LOCAL_IRQ_LOCK(pa_lock); -+ -+#ifdef CONFIG_PREEMPT_RT_BASE -+# define cpu_lock_irqsave(cpu, flags) \ -+ local_lock_irqsave_on(pa_lock, flags, cpu) -+# define cpu_unlock_irqrestore(cpu, flags) \ -+ local_unlock_irqrestore_on(pa_lock, flags, cpu) -+#else -+# define cpu_lock_irqsave(cpu, flags) local_irq_save(flags) -+# define cpu_unlock_irqrestore(cpu, flags) local_irq_restore(flags) -+#endif -+ - int page_group_by_mobility_disabled __read_mostly; - - void set_pageblock_migratetype(struct page *page, int migratetype) -@@ -701,7 +714,7 @@ - } - - /* -- * Frees a number of pages from the PCP lists -+ * Frees a number of pages which have been collected from the pcp lists. - * Assumes all pages on list are in same zone, and of same order. - * count is the number of pages to free. - * -@@ -712,18 +725,51 @@ - * pinned" detection logic. - */ - static void free_pcppages_bulk(struct zone *zone, int count, -- struct per_cpu_pages *pcp) -+ struct list_head *list) - { -- int migratetype = 0; -- int batch_free = 0; - int to_free = count; - unsigned long nr_scanned; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&zone->lock, flags); - -- spin_lock(&zone->lock); - nr_scanned = zone_page_state(zone, NR_PAGES_SCANNED); - if (nr_scanned) - __mod_zone_page_state(zone, NR_PAGES_SCANNED, -nr_scanned); - -+ while (!list_empty(list)) { -+ struct page *page = list_first_entry(list, struct page, lru); -+ int mt; /* migratetype of the to-be-freed page */ -+ -+ /* must delete as __free_one_page list manipulates */ -+ list_del(&page->lru); -+ -+ mt = get_freepage_migratetype(page); -+ if (unlikely(has_isolate_pageblock(zone))) -+ mt = get_pageblock_migratetype(page); -+ -+ /* MIGRATE_MOVABLE list may include MIGRATE_RESERVEs */ -+ __free_one_page(page, page_to_pfn(page), zone, 0, mt); -+ trace_mm_page_pcpu_drain(page, 0, mt); -+ to_free--; -+ } -+ WARN_ON(to_free != 0); -+ spin_unlock_irqrestore(&zone->lock, flags); -+} -+ -+/* -+ * Moves a number of pages from the PCP lists to free list which -+ * is freed outside of the locked region. -+ * -+ * Assumes all pages on list are in same zone, and of same order. -+ * count is the number of pages to free. -+ */ -+static void isolate_pcp_pages(int to_free, struct per_cpu_pages *src, -+ struct list_head *dst) -+{ -+ int migratetype = 0; -+ int batch_free = 0; -+ - while (to_free) { - struct page *page; - struct list_head *list; -@@ -739,7 +785,7 @@ - batch_free++; - if (++migratetype == MIGRATE_PCPTYPES) - migratetype = 0; -- list = &pcp->lists[migratetype]; -+ list = &src->lists[migratetype]; - } while (list_empty(list)); - - /* This is the only non-empty list. Free them all. */ -@@ -747,21 +793,11 @@ - batch_free = to_free; - - do { -- int mt; /* migratetype of the to-be-freed page */ -- -- page = list_entry(list->prev, struct page, lru); -- /* must delete as __free_one_page list manipulates */ -+ page = list_last_entry(list, struct page, lru); - list_del(&page->lru); -- mt = get_freepage_migratetype(page); -- if (unlikely(has_isolate_pageblock(zone))) -- mt = get_pageblock_migratetype(page); -- -- /* MIGRATE_MOVABLE list may include MIGRATE_RESERVEs */ -- __free_one_page(page, page_to_pfn(page), zone, 0, mt); -- trace_mm_page_pcpu_drain(page, 0, mt); -+ list_add(&page->lru, dst); - } while (--to_free && --batch_free && !list_empty(list)); - } -- spin_unlock(&zone->lock); - } - - static void free_one_page(struct zone *zone, -@@ -770,7 +806,9 @@ - int migratetype) - { - unsigned long nr_scanned; -- spin_lock(&zone->lock); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&zone->lock, flags); - nr_scanned = zone_page_state(zone, NR_PAGES_SCANNED); - if (nr_scanned) - __mod_zone_page_state(zone, NR_PAGES_SCANNED, -nr_scanned); -@@ -780,7 +818,7 @@ - migratetype = get_pfnblock_migratetype(page, pfn); - } - __free_one_page(page, pfn, zone, order, migratetype); -- spin_unlock(&zone->lock); -+ spin_unlock_irqrestore(&zone->lock, flags); - } - - static int free_tail_pages_check(struct page *head_page, struct page *page) -@@ -845,11 +883,11 @@ - return; - - migratetype = get_pfnblock_migratetype(page, pfn); -- local_irq_save(flags); -+ local_lock_irqsave(pa_lock, flags); - __count_vm_events(PGFREE, 1 << order); - set_freepage_migratetype(page, migratetype); - free_one_page(page_zone(page), page, pfn, order, migratetype); -- local_irq_restore(flags); -+ local_unlock_irqrestore(pa_lock, flags); - } - - void __init __free_pages_bootmem(struct page *page, unsigned long pfn, -@@ -1396,16 +1434,18 @@ - void drain_zone_pages(struct zone *zone, struct per_cpu_pages *pcp) - { - unsigned long flags; -+ LIST_HEAD(dst); - int to_drain, batch; - -- local_irq_save(flags); -+ local_lock_irqsave(pa_lock, flags); - batch = READ_ONCE(pcp->batch); - to_drain = min(pcp->count, batch); - if (to_drain > 0) { -- free_pcppages_bulk(zone, to_drain, pcp); -+ isolate_pcp_pages(to_drain, pcp, &dst); - pcp->count -= to_drain; - } -- local_irq_restore(flags); -+ local_unlock_irqrestore(pa_lock, flags); -+ free_pcppages_bulk(zone, to_drain, &dst); - } - #endif - -@@ -1421,16 +1461,21 @@ - unsigned long flags; - struct per_cpu_pageset *pset; - struct per_cpu_pages *pcp; -+ LIST_HEAD(dst); -+ int count; - -- local_irq_save(flags); -+ cpu_lock_irqsave(cpu, flags); - pset = per_cpu_ptr(zone->pageset, cpu); - - pcp = &pset->pcp; -- if (pcp->count) { -- free_pcppages_bulk(zone, pcp->count, pcp); -+ count = pcp->count; -+ if (count) { -+ isolate_pcp_pages(count, pcp, &dst); - pcp->count = 0; - } -- local_irq_restore(flags); -+ cpu_unlock_irqrestore(cpu, flags); -+ if (count) -+ free_pcppages_bulk(zone, count, &dst); - } - - /* -@@ -1516,8 +1561,17 @@ - else - cpumask_clear_cpu(cpu, &cpus_with_pcps); - } -+#ifndef CONFIG_PREEMPT_RT_BASE - on_each_cpu_mask(&cpus_with_pcps, (smp_call_func_t) drain_local_pages, - zone, 1); -+#else -+ for_each_cpu(cpu, &cpus_with_pcps) { -+ if (zone) -+ drain_pages_zone(cpu, zone); -+ else -+ drain_pages(cpu); -+ } -+#endif - } - - #ifdef CONFIG_HIBERNATION -@@ -1573,7 +1627,7 @@ - - migratetype = get_pfnblock_migratetype(page, pfn); - set_freepage_migratetype(page, migratetype); -- local_irq_save(flags); -+ local_lock_irqsave(pa_lock, flags); - __count_vm_event(PGFREE); - - /* -@@ -1599,12 +1653,17 @@ - pcp->count++; - if (pcp->count >= pcp->high) { - unsigned long batch = READ_ONCE(pcp->batch); -- free_pcppages_bulk(zone, batch, pcp); -+ LIST_HEAD(dst); -+ -+ isolate_pcp_pages(batch, pcp, &dst); - pcp->count -= batch; -+ local_unlock_irqrestore(pa_lock, flags); -+ free_pcppages_bulk(zone, batch, &dst); -+ return; - } - - out: -- local_irq_restore(flags); -+ local_unlock_irqrestore(pa_lock, flags); - } - - /* -@@ -1735,7 +1794,7 @@ - struct per_cpu_pages *pcp; - struct list_head *list; - -- local_irq_save(flags); -+ local_lock_irqsave(pa_lock, flags); - pcp = &this_cpu_ptr(zone->pageset)->pcp; - list = &pcp->lists[migratetype]; - if (list_empty(list)) { -@@ -1767,13 +1826,15 @@ - */ - WARN_ON_ONCE(order > 1); - } -- spin_lock_irqsave(&zone->lock, flags); -+ local_spin_lock_irqsave(pa_lock, &zone->lock, flags); - page = __rmqueue(zone, order, migratetype); -- spin_unlock(&zone->lock); -- if (!page) -+ if (!page) { -+ spin_unlock(&zone->lock); - goto failed; -+ } - __mod_zone_freepage_state(zone, -(1 << order), - get_freepage_migratetype(page)); -+ spin_unlock(&zone->lock); - } - - __mod_zone_page_state(zone, NR_ALLOC_BATCH, -(1 << order)); -@@ -1783,13 +1844,13 @@ - - __count_zone_vm_events(PGALLOC, zone, 1 << order); - zone_statistics(preferred_zone, zone, gfp_flags); -- local_irq_restore(flags); -+ local_unlock_irqrestore(pa_lock, flags); - - VM_BUG_ON_PAGE(bad_range(zone, page), page); - return page; - - failed: -- local_irq_restore(flags); -+ local_unlock_irqrestore(pa_lock, flags); - return NULL; - } - -@@ -5680,6 +5741,7 @@ - void __init page_alloc_init(void) - { - hotcpu_notifier(page_alloc_cpu_notify, 0); -+ local_irq_lock_init(pa_lock); - } - - /* -@@ -6575,7 +6637,7 @@ - struct per_cpu_pageset *pset; - - /* avoid races with drain_pages() */ -- local_irq_save(flags); -+ local_lock_irqsave(pa_lock, flags); - if (zone->pageset != &boot_pageset) { - for_each_online_cpu(cpu) { - pset = per_cpu_ptr(zone->pageset, cpu); -@@ -6584,7 +6646,7 @@ - free_percpu(zone->pageset); - zone->pageset = &boot_pageset; - } -- local_irq_restore(flags); -+ local_unlock_irqrestore(pa_lock, flags); - } - - #ifdef CONFIG_MEMORY_HOTREMOVE -diff -Nur linux-4.1.26.orig/mm/slab.h linux-4.1.26/mm/slab.h ---- linux-4.1.26.orig/mm/slab.h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/slab.h 2016-06-19 15:30:58.827302748 +0200 -@@ -330,7 +330,11 @@ - * The slab lists for all objects. - */ - struct kmem_cache_node { -+#ifdef CONFIG_SLUB -+ raw_spinlock_t list_lock; -+#else - spinlock_t list_lock; -+#endif - - #ifdef CONFIG_SLAB - struct list_head slabs_partial; /* partial list first, better asm code */ -diff -Nur linux-4.1.26.orig/mm/slub.c linux-4.1.26/mm/slub.c ---- linux-4.1.26.orig/mm/slub.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/slub.c 2016-06-19 15:30:58.827302748 +0200 -@@ -1069,7 +1069,7 @@ - { - struct kmem_cache_node *n = get_node(s, page_to_nid(page)); - -- spin_lock_irqsave(&n->list_lock, *flags); -+ raw_spin_lock_irqsave(&n->list_lock, *flags); - slab_lock(page); - - if (!check_slab(s, page)) -@@ -1116,7 +1116,7 @@ - - fail: - slab_unlock(page); -- spin_unlock_irqrestore(&n->list_lock, *flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, *flags); - slab_fix(s, "Object at 0x%p not freed", object); - return NULL; - } -@@ -1242,6 +1242,12 @@ - - #endif /* CONFIG_SLUB_DEBUG */ - -+struct slub_free_list { -+ raw_spinlock_t lock; -+ struct list_head list; -+}; -+static DEFINE_PER_CPU(struct slub_free_list, slub_free_list); -+ - /* - * Hooks for other subsystems that check memory allocations. In a typical - * production configuration these hooks all should produce no code at all. -@@ -1306,6 +1312,17 @@ - kasan_slab_free(s, x); - } - -+static void setup_object(struct kmem_cache *s, struct page *page, -+ void *object) -+{ -+ setup_object_debug(s, page, object); -+ if (unlikely(s->ctor)) { -+ kasan_unpoison_object_data(s, object); -+ s->ctor(object); -+ kasan_poison_object_data(s, object); -+ } -+} -+ - /* - * Slab allocation and freeing - */ -@@ -1336,10 +1353,17 @@ - struct page *page; - struct kmem_cache_order_objects oo = s->oo; - gfp_t alloc_gfp; -+ void *start, *p; -+ int idx, order; -+ bool enableirqs; - - flags &= gfp_allowed_mask; - -- if (flags & __GFP_WAIT) -+ enableirqs = (flags & __GFP_WAIT) != 0; -+#ifdef CONFIG_PREEMPT_RT_FULL -+ enableirqs |= system_state == SYSTEM_RUNNING; -+#endif -+ if (enableirqs) - local_irq_enable(); - - flags |= s->allocflags; -@@ -1359,13 +1383,13 @@ - * Try a lower order alloc if possible - */ - page = alloc_slab_page(s, alloc_gfp, node, oo); -- -- if (page) -- stat(s, ORDER_FALLBACK); -+ if (unlikely(!page)) -+ goto out; -+ stat(s, ORDER_FALLBACK); - } - -- if (kmemcheck_enabled && page -- && !(s->flags & (SLAB_NOTRACK | DEBUG_DEFAULT_FLAGS))) { -+ if (kmemcheck_enabled && -+ !(s->flags & (SLAB_NOTRACK | DEBUG_DEFAULT_FLAGS))) { - int pages = 1 << oo_order(oo); - - kmemcheck_alloc_shadow(page, oo_order(oo), alloc_gfp, node); -@@ -1380,51 +1404,9 @@ - kmemcheck_mark_unallocated_pages(page, pages); - } - -- if (flags & __GFP_WAIT) -- local_irq_disable(); -- if (!page) -- return NULL; -- - page->objects = oo_objects(oo); -- mod_zone_page_state(page_zone(page), -- (s->flags & SLAB_RECLAIM_ACCOUNT) ? -- NR_SLAB_RECLAIMABLE : NR_SLAB_UNRECLAIMABLE, -- 1 << oo_order(oo)); -- -- return page; --} -- --static void setup_object(struct kmem_cache *s, struct page *page, -- void *object) --{ -- setup_object_debug(s, page, object); -- if (unlikely(s->ctor)) { -- kasan_unpoison_object_data(s, object); -- s->ctor(object); -- kasan_poison_object_data(s, object); -- } --} -- --static struct page *new_slab(struct kmem_cache *s, gfp_t flags, int node) --{ -- struct page *page; -- void *start; -- void *p; -- int order; -- int idx; -- -- if (unlikely(flags & GFP_SLAB_BUG_MASK)) { -- pr_emerg("gfp: %u\n", flags & GFP_SLAB_BUG_MASK); -- BUG(); -- } -- -- page = allocate_slab(s, -- flags & (GFP_RECLAIM_MASK | GFP_CONSTRAINT_MASK), node); -- if (!page) -- goto out; - - order = compound_order(page); -- inc_slabs_node(s, page_to_nid(page), page->objects); - page->slab_cache = s; - __SetPageSlab(page); - if (page_is_pfmemalloc(page)) -@@ -1448,10 +1430,34 @@ - page->freelist = start; - page->inuse = page->objects; - page->frozen = 1; -+ - out: -+ if (enableirqs) -+ local_irq_disable(); -+ if (!page) -+ return NULL; -+ -+ mod_zone_page_state(page_zone(page), -+ (s->flags & SLAB_RECLAIM_ACCOUNT) ? -+ NR_SLAB_RECLAIMABLE : NR_SLAB_UNRECLAIMABLE, -+ 1 << oo_order(oo)); -+ -+ inc_slabs_node(s, page_to_nid(page), page->objects); -+ - return page; - } - -+static struct page *new_slab(struct kmem_cache *s, gfp_t flags, int node) -+{ -+ if (unlikely(flags & GFP_SLAB_BUG_MASK)) { -+ pr_emerg("gfp: %u\n", flags & GFP_SLAB_BUG_MASK); -+ BUG(); -+ } -+ -+ return allocate_slab(s, -+ flags & (GFP_RECLAIM_MASK | GFP_CONSTRAINT_MASK), node); -+} -+ - static void __free_slab(struct kmem_cache *s, struct page *page) - { - int order = compound_order(page); -@@ -1483,6 +1489,16 @@ - memcg_uncharge_slab(s, order); - } - -+static void free_delayed(struct list_head *h) -+{ -+ while(!list_empty(h)) { -+ struct page *page = list_first_entry(h, struct page, lru); -+ -+ list_del(&page->lru); -+ __free_slab(page->slab_cache, page); -+ } -+} -+ - #define need_reserve_slab_rcu \ - (sizeof(((struct page *)NULL)->lru) < sizeof(struct rcu_head)) - -@@ -1517,6 +1533,12 @@ - } - - call_rcu(head, rcu_free_slab); -+ } else if (irqs_disabled()) { -+ struct slub_free_list *f = this_cpu_ptr(&slub_free_list); -+ -+ raw_spin_lock(&f->lock); -+ list_add(&page->lru, &f->list); -+ raw_spin_unlock(&f->lock); - } else - __free_slab(s, page); - } -@@ -1630,7 +1652,7 @@ - if (!n || !n->nr_partial) - return NULL; - -- spin_lock(&n->list_lock); -+ raw_spin_lock(&n->list_lock); - list_for_each_entry_safe(page, page2, &n->partial, lru) { - void *t; - -@@ -1655,7 +1677,7 @@ - break; - - } -- spin_unlock(&n->list_lock); -+ raw_spin_unlock(&n->list_lock); - return object; - } - -@@ -1901,7 +1923,7 @@ - * that acquire_slab() will see a slab page that - * is frozen - */ -- spin_lock(&n->list_lock); -+ raw_spin_lock(&n->list_lock); - } - } else { - m = M_FULL; -@@ -1912,7 +1934,7 @@ - * slabs from diagnostic functions will not see - * any frozen slabs. - */ -- spin_lock(&n->list_lock); -+ raw_spin_lock(&n->list_lock); - } - } - -@@ -1947,7 +1969,7 @@ - goto redo; - - if (lock) -- spin_unlock(&n->list_lock); -+ raw_spin_unlock(&n->list_lock); - - if (m == M_FREE) { - stat(s, DEACTIVATE_EMPTY); -@@ -1979,10 +2001,10 @@ - n2 = get_node(s, page_to_nid(page)); - if (n != n2) { - if (n) -- spin_unlock(&n->list_lock); -+ raw_spin_unlock(&n->list_lock); - - n = n2; -- spin_lock(&n->list_lock); -+ raw_spin_lock(&n->list_lock); - } - - do { -@@ -2011,7 +2033,7 @@ - } - - if (n) -- spin_unlock(&n->list_lock); -+ raw_spin_unlock(&n->list_lock); - - while (discard_page) { - page = discard_page; -@@ -2050,14 +2072,21 @@ - pobjects = oldpage->pobjects; - pages = oldpage->pages; - if (drain && pobjects > s->cpu_partial) { -+ struct slub_free_list *f; - unsigned long flags; -+ LIST_HEAD(tofree); - /* - * partial array is full. Move the existing - * set to the per node partial list. - */ - local_irq_save(flags); - unfreeze_partials(s, this_cpu_ptr(s->cpu_slab)); -+ f = this_cpu_ptr(&slub_free_list); -+ raw_spin_lock(&f->lock); -+ list_splice_init(&f->list, &tofree); -+ raw_spin_unlock(&f->lock); - local_irq_restore(flags); -+ free_delayed(&tofree); - oldpage = NULL; - pobjects = 0; - pages = 0; -@@ -2129,7 +2158,22 @@ - - static void flush_all(struct kmem_cache *s) - { -+ LIST_HEAD(tofree); -+ int cpu; -+ - on_each_cpu_cond(has_cpu_slab, flush_cpu_slab, s, 1, GFP_ATOMIC); -+ for_each_online_cpu(cpu) { -+ struct slub_free_list *f; -+ -+ if (!has_cpu_slab(cpu, s)) -+ continue; -+ -+ f = &per_cpu(slub_free_list, cpu); -+ raw_spin_lock_irq(&f->lock); -+ list_splice_init(&f->list, &tofree); -+ raw_spin_unlock_irq(&f->lock); -+ free_delayed(&tofree); -+ } - } - - /* -@@ -2165,10 +2209,10 @@ - unsigned long x = 0; - struct page *page; - -- spin_lock_irqsave(&n->list_lock, flags); -+ raw_spin_lock_irqsave(&n->list_lock, flags); - list_for_each_entry(page, &n->partial, lru) - x += get_count(page); -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - return x; - } - #endif /* CONFIG_SLUB_DEBUG || CONFIG_SYSFS */ -@@ -2305,9 +2349,11 @@ - static void *__slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, - unsigned long addr, struct kmem_cache_cpu *c) - { -+ struct slub_free_list *f; - void *freelist; - struct page *page; - unsigned long flags; -+ LIST_HEAD(tofree); - - local_irq_save(flags); - #ifdef CONFIG_PREEMPT -@@ -2375,7 +2421,13 @@ - VM_BUG_ON(!c->page->frozen); - c->freelist = get_freepointer(s, freelist); - c->tid = next_tid(c->tid); -+out: -+ f = this_cpu_ptr(&slub_free_list); -+ raw_spin_lock(&f->lock); -+ list_splice_init(&f->list, &tofree); -+ raw_spin_unlock(&f->lock); - local_irq_restore(flags); -+ free_delayed(&tofree); - return freelist; - - new_slab: -@@ -2392,8 +2444,7 @@ - - if (unlikely(!freelist)) { - slab_out_of_memory(s, gfpflags, node); -- local_irq_restore(flags); -- return NULL; -+ goto out; - } - - page = c->page; -@@ -2408,8 +2459,7 @@ - deactivate_slab(s, page, get_freepointer(s, freelist)); - c->page = NULL; - c->freelist = NULL; -- local_irq_restore(flags); -- return freelist; -+ goto out; - } - - /* -@@ -2593,7 +2643,7 @@ - - do { - if (unlikely(n)) { -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - n = NULL; - } - prior = page->freelist; -@@ -2625,7 +2675,7 @@ - * Otherwise the list_lock will synchronize with - * other processors updating the list of slabs. - */ -- spin_lock_irqsave(&n->list_lock, flags); -+ raw_spin_lock_irqsave(&n->list_lock, flags); - - } - } -@@ -2667,7 +2717,7 @@ - add_partial(n, page, DEACTIVATE_TO_TAIL); - stat(s, FREE_ADD_PARTIAL); - } -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - return; - - slab_empty: -@@ -2682,7 +2732,7 @@ - remove_full(s, n, page); - } - -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - stat(s, FREE_SLAB); - discard_slab(s, page); - } -@@ -2881,7 +2931,7 @@ - init_kmem_cache_node(struct kmem_cache_node *n) - { - n->nr_partial = 0; -- spin_lock_init(&n->list_lock); -+ raw_spin_lock_init(&n->list_lock); - INIT_LIST_HEAD(&n->partial); - #ifdef CONFIG_SLUB_DEBUG - atomic_long_set(&n->nr_slabs, 0); -@@ -3463,7 +3513,7 @@ - for (i = 0; i < SHRINK_PROMOTE_MAX; i++) - INIT_LIST_HEAD(promote + i); - -- spin_lock_irqsave(&n->list_lock, flags); -+ raw_spin_lock_irqsave(&n->list_lock, flags); - - /* - * Build lists of slabs to discard or promote. -@@ -3494,7 +3544,7 @@ - for (i = SHRINK_PROMOTE_MAX - 1; i >= 0; i--) - list_splice(promote + i, &n->partial); - -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - - /* Release empty slabs */ - list_for_each_entry_safe(page, t, &discard, lru) -@@ -3670,6 +3720,12 @@ - { - static __initdata struct kmem_cache boot_kmem_cache, - boot_kmem_cache_node; -+ int cpu; -+ -+ for_each_possible_cpu(cpu) { -+ raw_spin_lock_init(&per_cpu(slub_free_list, cpu).lock); -+ INIT_LIST_HEAD(&per_cpu(slub_free_list, cpu).list); -+ } - - if (debug_guardpage_minorder()) - slub_max_order = 0; -@@ -3912,7 +3968,7 @@ - struct page *page; - unsigned long flags; - -- spin_lock_irqsave(&n->list_lock, flags); -+ raw_spin_lock_irqsave(&n->list_lock, flags); - - list_for_each_entry(page, &n->partial, lru) { - validate_slab_slab(s, page, map); -@@ -3934,7 +3990,7 @@ - s->name, count, atomic_long_read(&n->nr_slabs)); - - out: -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - return count; - } - -@@ -4122,12 +4178,12 @@ - if (!atomic_long_read(&n->nr_slabs)) - continue; - -- spin_lock_irqsave(&n->list_lock, flags); -+ raw_spin_lock_irqsave(&n->list_lock, flags); - list_for_each_entry(page, &n->partial, lru) - process_slab(&t, s, page, alloc, map); - list_for_each_entry(page, &n->full, lru) - process_slab(&t, s, page, alloc, map); -- spin_unlock_irqrestore(&n->list_lock, flags); -+ raw_spin_unlock_irqrestore(&n->list_lock, flags); - } - - for (i = 0; i < t.count; i++) { -diff -Nur linux-4.1.26.orig/mm/swap.c linux-4.1.26/mm/swap.c ---- linux-4.1.26.orig/mm/swap.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/swap.c 2016-06-19 15:30:58.831302903 +0200 -@@ -32,6 +32,7 @@ - #include - #include - #include -+#include - - #include "internal.h" - -@@ -45,6 +46,9 @@ - static DEFINE_PER_CPU(struct pagevec, lru_rotate_pvecs); - static DEFINE_PER_CPU(struct pagevec, lru_deactivate_file_pvecs); - -+static DEFINE_LOCAL_IRQ_LOCK(rotate_lock); -+DEFINE_LOCAL_IRQ_LOCK(swapvec_lock); -+ - /* - * This path almost never happens for VM activity - pages are normally - * freed via pagevecs. But it gets used by networking. -@@ -481,11 +485,11 @@ - unsigned long flags; - - page_cache_get(page); -- local_irq_save(flags); -+ local_lock_irqsave(rotate_lock, flags); - pvec = this_cpu_ptr(&lru_rotate_pvecs); - if (!pagevec_add(pvec, page)) - pagevec_move_tail(pvec); -- local_irq_restore(flags); -+ local_unlock_irqrestore(rotate_lock, flags); - } - } - -@@ -536,12 +540,13 @@ - void activate_page(struct page *page) - { - if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { -- struct pagevec *pvec = &get_cpu_var(activate_page_pvecs); -+ struct pagevec *pvec = &get_locked_var(swapvec_lock, -+ activate_page_pvecs); - - page_cache_get(page); - if (!pagevec_add(pvec, page)) - pagevec_lru_move_fn(pvec, __activate_page, NULL); -- put_cpu_var(activate_page_pvecs); -+ put_locked_var(swapvec_lock, activate_page_pvecs); - } - } - -@@ -567,7 +572,7 @@ - - static void __lru_cache_activate_page(struct page *page) - { -- struct pagevec *pvec = &get_cpu_var(lru_add_pvec); -+ struct pagevec *pvec = &get_locked_var(swapvec_lock, lru_add_pvec); - int i; - - /* -@@ -589,7 +594,7 @@ - } - } - -- put_cpu_var(lru_add_pvec); -+ put_locked_var(swapvec_lock, lru_add_pvec); - } - - /* -@@ -628,13 +633,13 @@ - - static void __lru_cache_add(struct page *page) - { -- struct pagevec *pvec = &get_cpu_var(lru_add_pvec); -+ struct pagevec *pvec = &get_locked_var(swapvec_lock, lru_add_pvec); - - page_cache_get(page); - if (!pagevec_space(pvec)) - __pagevec_lru_add(pvec); - pagevec_add(pvec, page); -- put_cpu_var(lru_add_pvec); -+ put_locked_var(swapvec_lock, lru_add_pvec); - } - - /** -@@ -814,9 +819,9 @@ - unsigned long flags; - - /* No harm done if a racing interrupt already did this */ -- local_irq_save(flags); -+ local_lock_irqsave(rotate_lock, flags); - pagevec_move_tail(pvec); -- local_irq_restore(flags); -+ local_unlock_irqrestore(rotate_lock, flags); - } - - pvec = &per_cpu(lru_deactivate_file_pvecs, cpu); -@@ -844,18 +849,19 @@ - return; - - if (likely(get_page_unless_zero(page))) { -- struct pagevec *pvec = &get_cpu_var(lru_deactivate_file_pvecs); -+ struct pagevec *pvec = &get_locked_var(swapvec_lock, -+ lru_deactivate_file_pvecs); - - if (!pagevec_add(pvec, page)) - pagevec_lru_move_fn(pvec, lru_deactivate_file_fn, NULL); -- put_cpu_var(lru_deactivate_file_pvecs); -+ put_locked_var(swapvec_lock, lru_deactivate_file_pvecs); - } - } - - void lru_add_drain(void) - { -- lru_add_drain_cpu(get_cpu()); -- put_cpu(); -+ lru_add_drain_cpu(local_lock_cpu(swapvec_lock)); -+ local_unlock_cpu(swapvec_lock); - } - - static void lru_add_drain_per_cpu(struct work_struct *dummy) -diff -Nur linux-4.1.26.orig/mm/truncate.c linux-4.1.26/mm/truncate.c ---- linux-4.1.26.orig/mm/truncate.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/truncate.c 2016-06-19 15:30:58.831302903 +0200 -@@ -56,8 +56,11 @@ - * protected by mapping->tree_lock. - */ - if (!workingset_node_shadows(node) && -- !list_empty(&node->private_list)) -- list_lru_del(&workingset_shadow_nodes, &node->private_list); -+ !list_empty(&node->private_list)) { -+ local_lock(workingset_shadow_lock); -+ list_lru_del(&__workingset_shadow_nodes, &node->private_list); -+ local_unlock(workingset_shadow_lock); -+ } - __radix_tree_delete_node(&mapping->page_tree, node); - unlock: - spin_unlock_irq(&mapping->tree_lock); -diff -Nur linux-4.1.26.orig/mm/vmalloc.c linux-4.1.26/mm/vmalloc.c ---- linux-4.1.26.orig/mm/vmalloc.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/vmalloc.c 2016-06-19 15:30:58.831302903 +0200 -@@ -819,7 +819,7 @@ - struct vmap_block *vb; - struct vmap_area *va; - unsigned long vb_idx; -- int node, err; -+ int node, err, cpu; - void *vaddr; - - node = numa_node_id(); -@@ -862,11 +862,12 @@ - BUG_ON(err); - radix_tree_preload_end(); - -- vbq = &get_cpu_var(vmap_block_queue); -+ cpu = get_cpu_light(); -+ vbq = this_cpu_ptr(&vmap_block_queue); - spin_lock(&vbq->lock); - list_add_tail_rcu(&vb->free_list, &vbq->free); - spin_unlock(&vbq->lock); -- put_cpu_var(vmap_block_queue); -+ put_cpu_light(); - - return vaddr; - } -@@ -935,6 +936,7 @@ - struct vmap_block *vb; - void *vaddr = NULL; - unsigned int order; -+ int cpu; - - BUG_ON(size & ~PAGE_MASK); - BUG_ON(size > PAGE_SIZE*VMAP_MAX_ALLOC); -@@ -949,7 +951,8 @@ - order = get_order(size); - - rcu_read_lock(); -- vbq = &get_cpu_var(vmap_block_queue); -+ cpu = get_cpu_light(); -+ vbq = this_cpu_ptr(&vmap_block_queue); - list_for_each_entry_rcu(vb, &vbq->free, free_list) { - unsigned long pages_off; - -@@ -972,7 +975,7 @@ - break; - } - -- put_cpu_var(vmap_block_queue); -+ put_cpu_light(); - rcu_read_unlock(); - - /* Allocate new block if nothing was found */ -diff -Nur linux-4.1.26.orig/mm/vmstat.c linux-4.1.26/mm/vmstat.c ---- linux-4.1.26.orig/mm/vmstat.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/vmstat.c 2016-06-19 15:30:58.831302903 +0200 -@@ -226,6 +226,7 @@ - long x; - long t; - -+ preempt_disable_rt(); - x = delta + __this_cpu_read(*p); - - t = __this_cpu_read(pcp->stat_threshold); -@@ -235,6 +236,7 @@ - x = 0; - } - __this_cpu_write(*p, x); -+ preempt_enable_rt(); - } - EXPORT_SYMBOL(__mod_zone_page_state); - -@@ -267,6 +269,7 @@ - s8 __percpu *p = pcp->vm_stat_diff + item; - s8 v, t; - -+ preempt_disable_rt(); - v = __this_cpu_inc_return(*p); - t = __this_cpu_read(pcp->stat_threshold); - if (unlikely(v > t)) { -@@ -275,6 +278,7 @@ - zone_page_state_add(v + overstep, zone, item); - __this_cpu_write(*p, -overstep); - } -+ preempt_enable_rt(); - } - - void __inc_zone_page_state(struct page *page, enum zone_stat_item item) -@@ -289,6 +293,7 @@ - s8 __percpu *p = pcp->vm_stat_diff + item; - s8 v, t; - -+ preempt_disable_rt(); - v = __this_cpu_dec_return(*p); - t = __this_cpu_read(pcp->stat_threshold); - if (unlikely(v < - t)) { -@@ -297,6 +302,7 @@ - zone_page_state_add(v - overstep, zone, item); - __this_cpu_write(*p, overstep); - } -+ preempt_enable_rt(); - } - - void __dec_zone_page_state(struct page *page, enum zone_stat_item item) -diff -Nur linux-4.1.26.orig/mm/workingset.c linux-4.1.26/mm/workingset.c ---- linux-4.1.26.orig/mm/workingset.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/mm/workingset.c 2016-06-19 15:30:58.835303057 +0200 -@@ -264,7 +264,8 @@ - * point where they would still be useful. - */ - --struct list_lru workingset_shadow_nodes; -+struct list_lru __workingset_shadow_nodes; -+DEFINE_LOCAL_IRQ_LOCK(workingset_shadow_lock); - - static unsigned long count_shadow_nodes(struct shrinker *shrinker, - struct shrink_control *sc) -@@ -274,9 +275,9 @@ - unsigned long pages; - - /* list_lru lock nests inside IRQ-safe mapping->tree_lock */ -- local_irq_disable(); -- shadow_nodes = list_lru_shrink_count(&workingset_shadow_nodes, sc); -- local_irq_enable(); -+ local_lock_irq(workingset_shadow_lock); -+ shadow_nodes = list_lru_shrink_count(&__workingset_shadow_nodes, sc); -+ local_unlock_irq(workingset_shadow_lock); - - pages = node_present_pages(sc->nid); - /* -@@ -363,9 +364,9 @@ - spin_unlock(&mapping->tree_lock); - ret = LRU_REMOVED_RETRY; - out: -- local_irq_enable(); -+ local_unlock_irq(workingset_shadow_lock); - cond_resched(); -- local_irq_disable(); -+ local_lock_irq(workingset_shadow_lock); - spin_lock(lru_lock); - return ret; - } -@@ -376,10 +377,10 @@ - unsigned long ret; - - /* list_lru lock nests inside IRQ-safe mapping->tree_lock */ -- local_irq_disable(); -- ret = list_lru_shrink_walk(&workingset_shadow_nodes, sc, -+ local_lock_irq(workingset_shadow_lock); -+ ret = list_lru_shrink_walk(&__workingset_shadow_nodes, sc, - shadow_lru_isolate, NULL); -- local_irq_enable(); -+ local_unlock_irq(workingset_shadow_lock); - return ret; - } - -@@ -400,7 +401,7 @@ - { - int ret; - -- ret = list_lru_init_key(&workingset_shadow_nodes, &shadow_nodes_key); -+ ret = list_lru_init_key(&__workingset_shadow_nodes, &shadow_nodes_key); - if (ret) - goto err; - ret = register_shrinker(&workingset_shadow_shrinker); -@@ -408,7 +409,7 @@ - goto err_list_lru; - return 0; - err_list_lru: -- list_lru_destroy(&workingset_shadow_nodes); -+ list_lru_destroy(&__workingset_shadow_nodes); - err: - return ret; - } -diff -Nur linux-4.1.26.orig/net/core/dev.c linux-4.1.26/net/core/dev.c ---- linux-4.1.26.orig/net/core/dev.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/core/dev.c 2016-06-19 15:30:58.839303211 +0200 -@@ -184,6 +184,7 @@ - static DEFINE_HASHTABLE(napi_hash, 8); - - static seqcount_t devnet_rename_seq; -+static DEFINE_MUTEX(devnet_rename_mutex); - - static inline void dev_base_seq_inc(struct net *net) - { -@@ -205,14 +206,14 @@ - static inline void rps_lock(struct softnet_data *sd) - { - #ifdef CONFIG_RPS -- spin_lock(&sd->input_pkt_queue.lock); -+ raw_spin_lock(&sd->input_pkt_queue.raw_lock); - #endif - } - - static inline void rps_unlock(struct softnet_data *sd) - { - #ifdef CONFIG_RPS -- spin_unlock(&sd->input_pkt_queue.lock); -+ raw_spin_unlock(&sd->input_pkt_queue.raw_lock); - #endif - } - -@@ -852,7 +853,8 @@ - strcpy(name, dev->name); - rcu_read_unlock(); - if (read_seqcount_retry(&devnet_rename_seq, seq)) { -- cond_resched(); -+ mutex_lock(&devnet_rename_mutex); -+ mutex_unlock(&devnet_rename_mutex); - goto retry; - } - -@@ -1121,20 +1123,17 @@ - if (dev->flags & IFF_UP) - return -EBUSY; - -- write_seqcount_begin(&devnet_rename_seq); -+ mutex_lock(&devnet_rename_mutex); -+ __raw_write_seqcount_begin(&devnet_rename_seq); - -- if (strncmp(newname, dev->name, IFNAMSIZ) == 0) { -- write_seqcount_end(&devnet_rename_seq); -- return 0; -- } -+ if (strncmp(newname, dev->name, IFNAMSIZ) == 0) -+ goto outunlock; - - memcpy(oldname, dev->name, IFNAMSIZ); - - err = dev_get_valid_name(net, dev, newname); -- if (err < 0) { -- write_seqcount_end(&devnet_rename_seq); -- return err; -- } -+ if (err < 0) -+ goto outunlock; - - if (oldname[0] && !strchr(oldname, '%')) - netdev_info(dev, "renamed from %s\n", oldname); -@@ -1147,11 +1146,12 @@ - if (ret) { - memcpy(dev->name, oldname, IFNAMSIZ); - dev->name_assign_type = old_assign_type; -- write_seqcount_end(&devnet_rename_seq); -- return ret; -+ err = ret; -+ goto outunlock; - } - -- write_seqcount_end(&devnet_rename_seq); -+ __raw_write_seqcount_end(&devnet_rename_seq); -+ mutex_unlock(&devnet_rename_mutex); - - netdev_adjacent_rename_links(dev, oldname); - -@@ -1172,7 +1172,8 @@ - /* err >= 0 after dev_alloc_name() or stores the first errno */ - if (err >= 0) { - err = ret; -- write_seqcount_begin(&devnet_rename_seq); -+ mutex_lock(&devnet_rename_mutex); -+ __raw_write_seqcount_begin(&devnet_rename_seq); - memcpy(dev->name, oldname, IFNAMSIZ); - memcpy(oldname, newname, IFNAMSIZ); - dev->name_assign_type = old_assign_type; -@@ -1185,6 +1186,11 @@ - } - - return err; -+ -+outunlock: -+ __raw_write_seqcount_end(&devnet_rename_seq); -+ mutex_unlock(&devnet_rename_mutex); -+ return err; - } - - /** -@@ -2214,6 +2220,7 @@ - sd->output_queue_tailp = &q->next_sched; - raise_softirq_irqoff(NET_TX_SOFTIRQ); - local_irq_restore(flags); -+ preempt_check_resched_rt(); - } - - void __netif_schedule(struct Qdisc *q) -@@ -2295,6 +2302,7 @@ - __this_cpu_write(softnet_data.completion_queue, skb); - raise_softirq_irqoff(NET_TX_SOFTIRQ); - local_irq_restore(flags); -+ preempt_check_resched_rt(); - } - EXPORT_SYMBOL(__dev_kfree_skb_irq); - -@@ -2880,9 +2888,44 @@ - #define skb_update_prio(skb) - #endif - -+#ifdef CONFIG_PREEMPT_RT_FULL -+ -+static inline int xmit_rec_read(void) -+{ -+ return current->xmit_recursion; -+} -+ -+static inline void xmit_rec_inc(void) -+{ -+ current->xmit_recursion++; -+} -+ -+static inline void xmit_rec_dec(void) -+{ -+ current->xmit_recursion--; -+} -+ -+#else -+ - DEFINE_PER_CPU(int, xmit_recursion); - EXPORT_SYMBOL(xmit_recursion); - -+static inline int xmit_rec_read(void) -+{ -+ return __this_cpu_read(xmit_recursion); -+} -+ -+static inline void xmit_rec_inc(void) -+{ -+ __this_cpu_inc(xmit_recursion); -+} -+ -+static inline int xmit_rec_dec(void) -+{ -+ __this_cpu_dec(xmit_recursion); -+} -+#endif -+ - #define RECURSION_LIMIT 10 - - /** -@@ -2984,7 +3027,7 @@ - - if (txq->xmit_lock_owner != cpu) { - -- if (__this_cpu_read(xmit_recursion) > RECURSION_LIMIT) -+ if (xmit_rec_read() > RECURSION_LIMIT) - goto recursion_alert; - - skb = validate_xmit_skb(skb, dev); -@@ -2994,9 +3037,9 @@ - HARD_TX_LOCK(dev, txq, cpu); - - if (!netif_xmit_stopped(txq)) { -- __this_cpu_inc(xmit_recursion); -+ xmit_rec_inc(); - skb = dev_hard_start_xmit(skb, dev, txq, &rc); -- __this_cpu_dec(xmit_recursion); -+ xmit_rec_dec(); - if (dev_xmit_complete(rc)) { - HARD_TX_UNLOCK(dev, txq); - goto out; -@@ -3370,6 +3413,7 @@ - rps_unlock(sd); - - local_irq_restore(flags); -+ preempt_check_resched_rt(); - - atomic_long_inc(&skb->dev->rx_dropped); - kfree_skb(skb); -@@ -3388,7 +3432,7 @@ - struct rps_dev_flow voidflow, *rflow = &voidflow; - int cpu; - -- preempt_disable(); -+ migrate_disable(); - rcu_read_lock(); - - cpu = get_rps_cpu(skb->dev, skb, &rflow); -@@ -3398,13 +3442,13 @@ - ret = enqueue_to_backlog(skb, cpu, &rflow->last_qtail); - - rcu_read_unlock(); -- preempt_enable(); -+ migrate_enable(); - } else - #endif - { - unsigned int qtail; -- ret = enqueue_to_backlog(skb, get_cpu(), &qtail); -- put_cpu(); -+ ret = enqueue_to_backlog(skb, get_cpu_light(), &qtail); -+ put_cpu_light(); - } - return ret; - } -@@ -3438,16 +3482,44 @@ - - trace_netif_rx_ni_entry(skb); - -- preempt_disable(); -+ local_bh_disable(); - err = netif_rx_internal(skb); -- if (local_softirq_pending()) -- do_softirq(); -- preempt_enable(); -+ local_bh_enable(); - - return err; - } - EXPORT_SYMBOL(netif_rx_ni); - -+#ifdef CONFIG_PREEMPT_RT_FULL -+/* -+ * RT runs ksoftirqd as a real time thread and the root_lock is a -+ * "sleeping spinlock". If the trylock fails then we can go into an -+ * infinite loop when ksoftirqd preempted the task which actually -+ * holds the lock, because we requeue q and raise NET_TX softirq -+ * causing ksoftirqd to loop forever. -+ * -+ * It's safe to use spin_lock on RT here as softirqs run in thread -+ * context and cannot deadlock against the thread which is holding -+ * root_lock. -+ * -+ * On !RT the trylock might fail, but there we bail out from the -+ * softirq loop after 10 attempts which we can't do on RT. And the -+ * task holding root_lock cannot be preempted, so the only downside of -+ * that trylock is that we need 10 loops to decide that we should have -+ * given up in the first one :) -+ */ -+static inline int take_root_lock(spinlock_t *lock) -+{ -+ spin_lock(lock); -+ return 1; -+} -+#else -+static inline int take_root_lock(spinlock_t *lock) -+{ -+ return spin_trylock(lock); -+} -+#endif -+ - static void net_tx_action(struct softirq_action *h) - { - struct softnet_data *sd = this_cpu_ptr(&softnet_data); -@@ -3489,7 +3561,7 @@ - head = head->next_sched; - - root_lock = qdisc_lock(q); -- if (spin_trylock(root_lock)) { -+ if (take_root_lock(root_lock)) { - smp_mb__before_atomic(); - clear_bit(__QDISC_STATE_SCHED, - &q->state); -@@ -3886,7 +3958,7 @@ - skb_queue_walk_safe(&sd->input_pkt_queue, skb, tmp) { - if (skb->dev == dev) { - __skb_unlink(skb, &sd->input_pkt_queue); -- kfree_skb(skb); -+ __skb_queue_tail(&sd->tofree_queue, skb); - input_queue_head_incr(sd); - } - } -@@ -3895,10 +3967,13 @@ - skb_queue_walk_safe(&sd->process_queue, skb, tmp) { - if (skb->dev == dev) { - __skb_unlink(skb, &sd->process_queue); -- kfree_skb(skb); -+ __skb_queue_tail(&sd->tofree_queue, skb); - input_queue_head_incr(sd); - } - } -+ -+ if (!skb_queue_empty(&sd->tofree_queue)) -+ raise_softirq_irqoff(NET_RX_SOFTIRQ); - } - - static int napi_gro_complete(struct sk_buff *skb) -@@ -4349,6 +4424,7 @@ - sd->rps_ipi_list = NULL; - - local_irq_enable(); -+ preempt_check_resched_rt(); - - /* Send pending IPI's to kick RPS processing on remote cpus. */ - while (remsd) { -@@ -4362,6 +4438,7 @@ - } else - #endif - local_irq_enable(); -+ preempt_check_resched_rt(); - } - - static bool sd_has_rps_ipi_waiting(struct softnet_data *sd) -@@ -4443,6 +4520,7 @@ - local_irq_save(flags); - ____napi_schedule(this_cpu_ptr(&softnet_data), n); - local_irq_restore(flags); -+ preempt_check_resched_rt(); - } - EXPORT_SYMBOL(__napi_schedule); - -@@ -4717,7 +4795,7 @@ - list_splice_tail(&repoll, &list); - list_splice(&list, &sd->poll_list); - if (!list_empty(&sd->poll_list)) -- __raise_softirq_irqoff(NET_RX_SOFTIRQ); -+ __raise_softirq_irqoff_ksoft(NET_RX_SOFTIRQ); - - net_rps_action_and_irq_enable(sd); - } -@@ -6931,7 +7009,7 @@ - void synchronize_net(void) - { - might_sleep(); -- if (rtnl_is_locked()) -+ if (rtnl_is_locked() && !IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) - synchronize_rcu_expedited(); - else - synchronize_rcu(); -@@ -7172,16 +7250,20 @@ - - raise_softirq_irqoff(NET_TX_SOFTIRQ); - local_irq_enable(); -+ preempt_check_resched_rt(); - - /* Process offline CPU's input_pkt_queue */ - while ((skb = __skb_dequeue(&oldsd->process_queue))) { - netif_rx_ni(skb); - input_queue_head_incr(oldsd); - } -- while ((skb = skb_dequeue(&oldsd->input_pkt_queue))) { -+ while ((skb = __skb_dequeue(&oldsd->input_pkt_queue))) { - netif_rx_ni(skb); - input_queue_head_incr(oldsd); - } -+ while ((skb = __skb_dequeue(&oldsd->tofree_queue))) { -+ kfree_skb(skb); -+ } - - return NOTIFY_OK; - } -@@ -7483,8 +7565,9 @@ - for_each_possible_cpu(i) { - struct softnet_data *sd = &per_cpu(softnet_data, i); - -- skb_queue_head_init(&sd->input_pkt_queue); -- skb_queue_head_init(&sd->process_queue); -+ skb_queue_head_init_raw(&sd->input_pkt_queue); -+ skb_queue_head_init_raw(&sd->process_queue); -+ skb_queue_head_init_raw(&sd->tofree_queue); - INIT_LIST_HEAD(&sd->poll_list); - sd->output_queue_tailp = &sd->output_queue; - #ifdef CONFIG_RPS -diff -Nur linux-4.1.26.orig/net/core/skbuff.c linux-4.1.26/net/core/skbuff.c ---- linux-4.1.26.orig/net/core/skbuff.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/core/skbuff.c 2016-06-19 15:30:58.839303211 +0200 -@@ -63,6 +63,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -358,6 +359,8 @@ - }; - static DEFINE_PER_CPU(struct netdev_alloc_cache, netdev_alloc_cache); - static DEFINE_PER_CPU(struct netdev_alloc_cache, napi_alloc_cache); -+static DEFINE_LOCAL_IRQ_LOCK(netdev_alloc_lock); -+static DEFINE_LOCAL_IRQ_LOCK(napi_alloc_cache_lock); - - static struct page *__page_frag_refill(struct netdev_alloc_cache *nc, - gfp_t gfp_mask) -@@ -435,9 +438,9 @@ - unsigned long flags; - void *data; - -- local_irq_save(flags); -+ local_lock_irqsave(netdev_alloc_lock, flags); - data = __alloc_page_frag(&netdev_alloc_cache, fragsz, gfp_mask); -- local_irq_restore(flags); -+ local_unlock_irqrestore(netdev_alloc_lock, flags); - return data; - } - -@@ -456,7 +459,12 @@ - - static void *__napi_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) - { -- return __alloc_page_frag(&napi_alloc_cache, fragsz, gfp_mask); -+ void *data; -+ -+ local_lock(napi_alloc_cache_lock); -+ data = __alloc_page_frag(&napi_alloc_cache, fragsz, gfp_mask); -+ local_unlock(napi_alloc_cache_lock); -+ return data; - } - - void *napi_alloc_frag(unsigned int fragsz) -diff -Nur linux-4.1.26.orig/net/core/sock.c linux-4.1.26/net/core/sock.c ---- linux-4.1.26.orig/net/core/sock.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/core/sock.c 2016-06-19 15:30:58.839303211 +0200 -@@ -2369,12 +2369,11 @@ - if (sk->sk_lock.owned) - __lock_sock(sk); - sk->sk_lock.owned = 1; -- spin_unlock(&sk->sk_lock.slock); -+ spin_unlock_bh(&sk->sk_lock.slock); - /* - * The sk_lock has mutex_lock() semantics here: - */ - mutex_acquire(&sk->sk_lock.dep_map, subclass, 0, _RET_IP_); -- local_bh_enable(); - } - EXPORT_SYMBOL(lock_sock_nested); - -diff -Nur linux-4.1.26.orig/net/ipv4/icmp.c linux-4.1.26/net/ipv4/icmp.c ---- linux-4.1.26.orig/net/ipv4/icmp.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/ipv4/icmp.c 2016-06-19 15:30:58.839303211 +0200 -@@ -69,6 +69,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -867,6 +868,30 @@ - } - - /* -+ * 32bit and 64bit have different timestamp length, so we check for -+ * the cookie at offset 20 and verify it is repeated at offset 50 -+ */ -+#define CO_POS0 20 -+#define CO_POS1 50 -+#define CO_SIZE sizeof(int) -+#define ICMP_SYSRQ_SIZE 57 -+ -+/* -+ * We got a ICMP_SYSRQ_SIZE sized ping request. Check for the cookie -+ * pattern and if it matches send the next byte as a trigger to sysrq. -+ */ -+static void icmp_check_sysrq(struct net *net, struct sk_buff *skb) -+{ -+ int cookie = htonl(net->ipv4.sysctl_icmp_echo_sysrq); -+ char *p = skb->data; -+ -+ if (!memcmp(&cookie, p + CO_POS0, CO_SIZE) && -+ !memcmp(&cookie, p + CO_POS1, CO_SIZE) && -+ p[CO_POS0 + CO_SIZE] == p[CO_POS1 + CO_SIZE]) -+ handle_sysrq(p[CO_POS0 + CO_SIZE]); -+} -+ -+/* - * Handle ICMP_ECHO ("ping") requests. - * - * RFC 1122: 3.2.2.6 MUST have an echo server that answers ICMP echo -@@ -893,6 +918,11 @@ - icmp_param.data_len = skb->len; - icmp_param.head_len = sizeof(struct icmphdr); - icmp_reply(&icmp_param, skb); -+ -+ if (skb->len == ICMP_SYSRQ_SIZE && -+ net->ipv4.sysctl_icmp_echo_sysrq) { -+ icmp_check_sysrq(net, skb); -+ } - } - /* should there be an ICMP stat for ignored echos? */ - return true; -diff -Nur linux-4.1.26.orig/net/ipv4/sysctl_net_ipv4.c linux-4.1.26/net/ipv4/sysctl_net_ipv4.c ---- linux-4.1.26.orig/net/ipv4/sysctl_net_ipv4.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/ipv4/sysctl_net_ipv4.c 2016-06-19 15:30:58.839303211 +0200 -@@ -779,6 +779,13 @@ - .proc_handler = proc_dointvec - }, - { -+ .procname = "icmp_echo_sysrq", -+ .data = &init_net.ipv4.sysctl_icmp_echo_sysrq, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = proc_dointvec -+ }, -+ { - .procname = "icmp_ignore_bogus_error_responses", - .data = &init_net.ipv4.sysctl_icmp_ignore_bogus_error_responses, - .maxlen = sizeof(int), -diff -Nur linux-4.1.26.orig/net/mac80211/rx.c linux-4.1.26/net/mac80211/rx.c ---- linux-4.1.26.orig/net/mac80211/rx.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/mac80211/rx.c 2016-06-19 15:30:58.839303211 +0200 -@@ -3573,7 +3573,7 @@ - struct ieee80211_supported_band *sband; - struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); - -- WARN_ON_ONCE(softirq_count() == 0); -+ WARN_ON_ONCE_NONRT(softirq_count() == 0); - - if (WARN_ON(status->band >= IEEE80211_NUM_BANDS)) - goto drop; -diff -Nur linux-4.1.26.orig/net/netfilter/core.c linux-4.1.26/net/netfilter/core.c ---- linux-4.1.26.orig/net/netfilter/core.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/netfilter/core.c 2016-06-19 15:30:58.839303211 +0200 -@@ -22,11 +22,17 @@ - #include - #include - #include -+#include - #include - #include - - #include "nf_internals.h" - -+#ifdef CONFIG_PREEMPT_RT_BASE -+DEFINE_LOCAL_IRQ_LOCK(xt_write_lock); -+EXPORT_PER_CPU_SYMBOL(xt_write_lock); -+#endif -+ - static DEFINE_MUTEX(afinfo_mutex); - - const struct nf_afinfo __rcu *nf_afinfo[NFPROTO_NUMPROTO] __read_mostly; -diff -Nur linux-4.1.26.orig/net/packet/af_packet.c linux-4.1.26/net/packet/af_packet.c ---- linux-4.1.26.orig/net/packet/af_packet.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/packet/af_packet.c 2016-06-19 15:30:58.839303211 +0200 -@@ -63,6 +63,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -698,7 +699,7 @@ - if (BLOCK_NUM_PKTS(pbd)) { - while (atomic_read(&pkc->blk_fill_in_prog)) { - /* Waiting for skb_copy_bits to finish... */ -- cpu_relax(); -+ cpu_chill(); - } - } - -@@ -960,7 +961,7 @@ - if (!(status & TP_STATUS_BLK_TMO)) { - while (atomic_read(&pkc->blk_fill_in_prog)) { - /* Waiting for skb_copy_bits to finish... */ -- cpu_relax(); -+ cpu_chill(); - } - } - prb_close_block(pkc, pbd, po, status); -diff -Nur linux-4.1.26.orig/net/rds/ib_rdma.c linux-4.1.26/net/rds/ib_rdma.c ---- linux-4.1.26.orig/net/rds/ib_rdma.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/rds/ib_rdma.c 2016-06-19 15:30:58.843303365 +0200 -@@ -34,6 +34,7 @@ - #include - #include - #include -+#include - - #include "rds.h" - #include "ib.h" -@@ -286,7 +287,7 @@ - for_each_online_cpu(cpu) { - flag = &per_cpu(clean_list_grace, cpu); - while (test_bit(CLEAN_LIST_BUSY_BIT, flag)) -- cpu_relax(); -+ cpu_chill(); - } - } - -diff -Nur linux-4.1.26.orig/net/sched/sch_generic.c linux-4.1.26/net/sched/sch_generic.c ---- linux-4.1.26.orig/net/sched/sch_generic.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/sched/sch_generic.c 2016-06-19 15:30:58.843303365 +0200 -@@ -896,7 +896,7 @@ - /* Wait for outstanding qdisc_run calls. */ - list_for_each_entry(dev, head, close_list) - while (some_qdisc_is_busy(dev)) -- yield(); -+ msleep(1); - } - - void dev_deactivate(struct net_device *dev) -diff -Nur linux-4.1.26.orig/net/sunrpc/svc_xprt.c linux-4.1.26/net/sunrpc/svc_xprt.c ---- linux-4.1.26.orig/net/sunrpc/svc_xprt.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/net/sunrpc/svc_xprt.c 2016-06-19 15:30:58.843303365 +0200 -@@ -341,7 +341,7 @@ - goto out; - } - -- cpu = get_cpu(); -+ cpu = get_cpu_light(); - pool = svc_pool_for_cpu(xprt->xpt_server, cpu); - - atomic_long_inc(&pool->sp_stats.packets); -@@ -377,7 +377,7 @@ - - atomic_long_inc(&pool->sp_stats.threads_woken); - wake_up_process(rqstp->rq_task); -- put_cpu(); -+ put_cpu_light(); - goto out; - } - rcu_read_unlock(); -@@ -398,7 +398,7 @@ - goto redo_search; - } - rqstp = NULL; -- put_cpu(); -+ put_cpu_light(); - out: - trace_svc_xprt_do_enqueue(xprt, rqstp); - } -diff -Nur linux-4.1.26.orig/scripts/mkcompile_h linux-4.1.26/scripts/mkcompile_h ---- linux-4.1.26.orig/scripts/mkcompile_h 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/scripts/mkcompile_h 2016-06-19 15:30:58.843303365 +0200 -@@ -4,7 +4,8 @@ - ARCH=$2 - SMP=$3 - PREEMPT=$4 --CC=$5 -+RT=$5 -+CC=$6 - - vecho() { [ "${quiet}" = "silent_" ] || echo "$@" ; } - -@@ -57,6 +58,7 @@ - CONFIG_FLAGS="" - if [ -n "$SMP" ] ; then CONFIG_FLAGS="SMP"; fi - if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi -+if [ -n "$RT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS RT"; fi - UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP" - - # Truncate to maximum length -diff -Nur linux-4.1.26.orig/sound/core/pcm_native.c linux-4.1.26/sound/core/pcm_native.c ---- linux-4.1.26.orig/sound/core/pcm_native.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/sound/core/pcm_native.c 2016-06-19 15:30:58.843303365 +0200 -@@ -135,7 +135,7 @@ - void snd_pcm_stream_lock_irq(struct snd_pcm_substream *substream) - { - if (!substream->pcm->nonatomic) -- local_irq_disable(); -+ local_irq_disable_nort(); - snd_pcm_stream_lock(substream); - } - EXPORT_SYMBOL_GPL(snd_pcm_stream_lock_irq); -@@ -150,7 +150,7 @@ - { - snd_pcm_stream_unlock(substream); - if (!substream->pcm->nonatomic) -- local_irq_enable(); -+ local_irq_enable_nort(); - } - EXPORT_SYMBOL_GPL(snd_pcm_stream_unlock_irq); - -@@ -158,7 +158,7 @@ - { - unsigned long flags = 0; - if (!substream->pcm->nonatomic) -- local_irq_save(flags); -+ local_irq_save_nort(flags); - snd_pcm_stream_lock(substream); - return flags; - } -@@ -176,7 +176,7 @@ - { - snd_pcm_stream_unlock(substream); - if (!substream->pcm->nonatomic) -- local_irq_restore(flags); -+ local_irq_restore_nort(flags); - } - EXPORT_SYMBOL_GPL(snd_pcm_stream_unlock_irqrestore); - -diff -Nur linux-4.1.26.orig/sound/soc/intel/atom/sst/sst.c linux-4.1.26/sound/soc/intel/atom/sst/sst.c ---- linux-4.1.26.orig/sound/soc/intel/atom/sst/sst.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/sound/soc/intel/atom/sst/sst.c 2016-06-19 15:30:58.843303365 +0200 -@@ -368,8 +368,8 @@ - * initialize by FW or driver when firmware is loaded - */ - spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags); -- sst_shim_write64(shim, SST_IMRX, shim_regs->imrx), -- sst_shim_write64(shim, SST_CSR, shim_regs->csr), -+ sst_shim_write64(shim, SST_IMRX, shim_regs->imrx); -+ sst_shim_write64(shim, SST_CSR, shim_regs->csr); - spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags); - } - -diff -Nur linux-4.1.26.orig/virt/kvm/async_pf.c linux-4.1.26/virt/kvm/async_pf.c ---- linux-4.1.26.orig/virt/kvm/async_pf.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/virt/kvm/async_pf.c 2016-06-19 15:30:58.843303365 +0200 -@@ -94,8 +94,8 @@ - - trace_kvm_async_pf_completed(addr, gva); - -- if (waitqueue_active(&vcpu->wq)) -- wake_up_interruptible(&vcpu->wq); -+ if (swaitqueue_active(&vcpu->wq)) -+ swait_wake_interruptible(&vcpu->wq); - - mmput(mm); - kvm_put_kvm(vcpu->kvm); -diff -Nur linux-4.1.26.orig/virt/kvm/kvm_main.c linux-4.1.26/virt/kvm/kvm_main.c ---- linux-4.1.26.orig/virt/kvm/kvm_main.c 2016-06-07 01:13:11.000000000 +0200 -+++ linux-4.1.26/virt/kvm/kvm_main.c 2016-06-19 15:30:58.843303365 +0200 -@@ -218,7 +218,7 @@ - vcpu->kvm = kvm; - vcpu->vcpu_id = id; - vcpu->pid = NULL; -- init_waitqueue_head(&vcpu->wq); -+ init_swait_head(&vcpu->wq); - kvm_async_pf_vcpu_init(vcpu); - - page = alloc_page(GFP_KERNEL | __GFP_ZERO); -@@ -1780,7 +1780,7 @@ - void kvm_vcpu_block(struct kvm_vcpu *vcpu) - { - ktime_t start, cur; -- DEFINE_WAIT(wait); -+ DEFINE_SWAITER(wait); - bool waited = false; - - start = cur = ktime_get(); -@@ -1801,7 +1801,7 @@ - } - - for (;;) { -- prepare_to_wait(&vcpu->wq, &wait, TASK_INTERRUPTIBLE); -+ swait_prepare(&vcpu->wq, &wait, TASK_INTERRUPTIBLE); - - if (kvm_vcpu_check_block(vcpu) < 0) - break; -@@ -1810,7 +1810,7 @@ - schedule(); - } - -- finish_wait(&vcpu->wq, &wait); -+ swait_finish(&vcpu->wq, &wait); - cur = ktime_get(); - - out: -@@ -1826,11 +1826,11 @@ - { - int me; - int cpu = vcpu->cpu; -- wait_queue_head_t *wqp; -+ struct swait_head *wqp; - - wqp = kvm_arch_vcpu_wq(vcpu); -- if (waitqueue_active(wqp)) { -- wake_up_interruptible(wqp); -+ if (swaitqueue_active(wqp)) { -+ swait_wake_interruptible(wqp); - ++vcpu->stat.halt_wakeup; - } - -@@ -1931,7 +1931,7 @@ - continue; - if (vcpu == me) - continue; -- if (waitqueue_active(&vcpu->wq) && !kvm_arch_vcpu_runnable(vcpu)) -+ if (swaitqueue_active(&vcpu->wq) && !kvm_arch_vcpu_runnable(vcpu)) - continue; - if (!kvm_vcpu_eligible_for_directed_yield(vcpu)) - continue; diff --git a/target/linux/patches/4.1.30/regmap-default-on.patch b/target/linux/patches/4.1.30/regmap-default-on.patch deleted file mode 100644 index 8d72224bf..000000000 --- a/target/linux/patches/4.1.30/regmap-default-on.patch +++ /dev/null @@ -1,17 +0,0 @@ -diff -Nur linux-4.1.6.orig/drivers/base/regmap/Kconfig linux-4.1.6/drivers/base/regmap/Kconfig ---- linux-4.1.6.orig/drivers/base/regmap/Kconfig 2015-08-17 05:52:51.000000000 +0200 -+++ linux-4.1.6/drivers/base/regmap/Kconfig 2015-08-29 22:18:50.329683337 +0200 -@@ -3,7 +3,7 @@ - # subsystems should select the appropriate symbols. - - config REGMAP -- default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ) -+ default y - select LZO_COMPRESS - select LZO_DECOMPRESS - select IRQ_DOMAIN if REGMAP_IRQ -@@ -29,3 +29,4 @@ - - config REGMAP_IRQ - bool -+ default y diff --git a/target/linux/patches/4.1.30/remove-warn.patch b/target/linux/patches/4.1.30/remove-warn.patch deleted file mode 100644 index 1f89c710d..000000000 --- a/target/linux/patches/4.1.30/remove-warn.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff -Nur linux-4.1.10.orig/drivers/media/v4l2-core/videobuf2-core.c linux-4.1.10/drivers/media/v4l2-core/videobuf2-core.c ---- linux-4.1.10.orig/drivers/media/v4l2-core/videobuf2-core.c 2015-10-03 13:49:38.000000000 +0200 -+++ linux-4.1.10/drivers/media/v4l2-core/videobuf2-core.c 2015-10-18 18:18:47.000000000 +0200 -@@ -1245,7 +1245,6 @@ - return; - - __check_once = true; -- __WARN(); - - pr_warn_once("use of bytesused == 0 is deprecated and will be removed in the future,\n"); - if (vb->vb2_queue->allow_zero_bytesused) diff --git a/target/linux/patches/4.1.30/startup.patch b/target/linux/patches/4.1.30/startup.patch deleted file mode 100644 index d396b75e4..000000000 --- a/target/linux/patches/4.1.30/startup.patch +++ /dev/null @@ -1,37 +0,0 @@ -diff -Nur linux-3.13.3.orig/init/main.c linux-3.13.3/init/main.c ---- linux-3.13.3.orig/init/main.c 2014-02-13 23:00:14.000000000 +0100 -+++ linux-3.13.3/init/main.c 2014-02-17 11:35:14.000000000 +0100 -@@ -916,6 +917,8 @@ - if (sys_open((const char __user *) "/dev/console", O_RDWR, 0) < 0) - pr_err("Warning: unable to open an initial console.\n"); - -+ printk(KERN_WARNING "Starting Linux (built with OpenADK).\n"); -+ - (void) sys_dup(0); - (void) sys_dup(0); - /* -diff -Nur linux-3.13.6.orig/init/initramfs.c linux-3.13.6/init/initramfs.c ---- linux-3.13.6.orig/init/initramfs.c 2014-03-07 07:07:02.000000000 +0100 -+++ linux-3.13.6/init/initramfs.c 2014-03-15 12:11:31.882731916 +0100 -@@ -622,6 +622,9 @@ - */ - load_default_modules(); - } -+#ifdef CONFIG_DEVTMPFS_MOUNT -+ devtmpfs_mount("dev"); -+#endif - return 0; - } - rootfs_initcall(populate_rootfs); -diff -Nur linux-3.13.6.orig/init/main.c linux-3.13.6/init/main.c ---- linux-3.13.6.orig/init/main.c 2014-03-07 07:07:02.000000000 +0100 -+++ linux-3.13.6/init/main.c 2014-03-15 12:13:16.459024452 +0100 -@@ -924,7 +924,7 @@ - */ - - if (!ramdisk_execute_command) -- ramdisk_execute_command = "/init"; -+ ramdisk_execute_command = "/sbin/init"; - - if (sys_access((const char __user *) ramdisk_execute_command, 0) != 0) { - ramdisk_execute_command = NULL; diff --git a/target/linux/patches/4.1.30/use-gawk.patch b/target/linux/patches/4.1.30/use-gawk.patch deleted file mode 100644 index 5b312589d..000000000 --- a/target/linux/patches/4.1.30/use-gawk.patch +++ /dev/null @@ -1,24 +0,0 @@ -diff -Nur linux-4.1.20.orig/Makefile linux-4.1.20/Makefile ---- linux-4.1.20.orig/Makefile 2016-03-17 19:11:03.000000000 +0100 -+++ linux-4.1.20/Makefile 2016-04-02 13:24:23.000000000 +0200 -@@ -359,7 +359,7 @@ - STRIP = $(CROSS_COMPILE)strip - OBJCOPY = $(CROSS_COMPILE)objcopy - OBJDUMP = $(CROSS_COMPILE)objdump --AWK = awk -+AWK = gawk - GENKSYMS = scripts/genksyms/genksyms - INSTALLKERNEL := installkernel - DEPMOD = /sbin/depmod -diff -Nur linux-4.1.20.orig/lib/raid6/test/Makefile linux-4.1.20/lib/raid6/test/Makefile ---- linux-4.1.20.orig/lib/raid6/test/Makefile 2016-03-17 19:11:03.000000000 +0100 -+++ linux-4.1.20/lib/raid6/test/Makefile 2016-04-02 09:45:15.000000000 +0200 -@@ -7,7 +7,7 @@ - OPTFLAGS = -O2 # Adjust as desired - CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS) - LD = ld --AWK = awk -f -+AWK = gawk -f - AR = ar - RANLIB = ranlib - OBJS = int1.o int2.o int4.o int8.o int16.o int32.o recov.o algos.o tables.o diff --git a/target/linux/patches/4.1.30/use-libgcc-for-sh.patch b/target/linux/patches/4.1.30/use-libgcc-for-sh.patch deleted file mode 100644 index 6420219b0..000000000 --- a/target/linux/patches/4.1.30/use-libgcc-for-sh.patch +++ /dev/null @@ -1,29 +0,0 @@ -diff -Nur linux-4.1.13.orig/arch/sh/Makefile linux-4.1.13/arch/sh/Makefile ---- linux-4.1.13.orig/arch/sh/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/Makefile 2015-12-06 19:59:31.000000000 +0100 -@@ -200,7 +206,9 @@ - KBUILD_CFLAGS += -fasynchronous-unwind-tables - endif - --libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) -+LIBGCC = $(shell $(CC) $(KBUILD_CFLAGS) -print-file-name=libgcc.a) -+ -+libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) $(LIBGCC) - libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) - - BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.xz uImage.lzo \ -diff -Nur linux-4.1.13.orig/arch/sh/lib/Makefile linux-4.1.13/arch/sh/lib/Makefile ---- linux-4.1.13.orig/arch/sh/lib/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/sh/lib/Makefile 2015-12-06 19:59:14.000000000 +0100 -@@ -5,11 +5,6 @@ - lib-y = delay.o memmove.o memchr.o \ - checksum.o strlen.o div64.o div64-generic.o - --# Extracted from libgcc --obj-y += movmem.o ashldi3.o ashrdi3.o lshrdi3.o \ -- ashlsi3.o ashrsi3.o ashiftrt.o lshrsi3.o \ -- udiv_qrnnd.o -- - udivsi3-y := udivsi3_i4i-Os.o - - ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y) diff --git a/target/linux/patches/4.1.35/cleankernel.patch b/target/linux/patches/4.1.35/cleankernel.patch new file mode 100644 index 000000000..59693f426 --- /dev/null +++ b/target/linux/patches/4.1.35/cleankernel.patch @@ -0,0 +1,11 @@ +diff -Nur linux-4.1.10.orig/scripts/Makefile.headersinst linux-4.1.10/scripts/Makefile.headersinst +--- linux-4.1.10.orig/scripts/Makefile.headersinst 2015-10-03 13:49:38.000000000 +0200 ++++ linux-4.1.10/scripts/Makefile.headersinst 2015-10-15 11:23:35.000000000 +0200 +@@ -107,7 +107,6 @@ + + targets += $(install-file) + $(install-file): scripts/headers_install.sh $(input-files1) $(input-files2) $(input-files3) FORCE +- $(if $(unwanted),$(call cmd,remove),) + $(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@))) + $(call if_changed,install) + diff --git a/target/linux/patches/4.1.35/cris-header.patch b/target/linux/patches/4.1.35/cris-header.patch new file mode 100644 index 000000000..2b5a88461 --- /dev/null +++ b/target/linux/patches/4.1.35/cris-header.patch @@ -0,0 +1,12 @@ +diff -Nur linux-3.16.2.orig/arch/cris/include/arch-v10/arch/Kbuild linux-3.16.2/arch/cris/include/arch-v10/arch/Kbuild +--- linux-3.16.2.orig/arch/cris/include/arch-v10/arch/Kbuild 2014-09-06 01:37:11.000000000 +0200 ++++ linux-3.16.2/arch/cris/include/arch-v10/arch/Kbuild 2014-09-26 19:24:50.000000000 +0200 +@@ -1 +1,2 @@ + # CRISv10 arch ++header-y += ptrace.h +diff -Nur linux-3.16.2.orig/arch/cris/include/arch-v32/arch/Kbuild linux-3.16.2/arch/cris/include/arch-v32/arch/Kbuild +--- linux-3.16.2.orig/arch/cris/include/arch-v32/arch/Kbuild 2014-09-06 01:37:11.000000000 +0200 ++++ linux-3.16.2/arch/cris/include/arch-v32/arch/Kbuild 2014-09-26 19:24:31.000000000 +0200 +@@ -1 +1,2 @@ + # CRISv32 arch ++header-y += ptrace.h diff --git a/target/linux/patches/4.1.35/initramfs-nosizelimit.patch b/target/linux/patches/4.1.35/initramfs-nosizelimit.patch new file mode 100644 index 000000000..40d2f6bd8 --- /dev/null +++ b/target/linux/patches/4.1.35/initramfs-nosizelimit.patch @@ -0,0 +1,57 @@ +From 9a18df7a71bfa620b1278777d64783a359d7eb4e Mon Sep 17 00:00:00 2001 +From: Thorsten Glaser +Date: Sun, 4 May 2014 01:37:54 +0200 +Subject: [PATCH] mount tmpfs-as-rootfs (initramfs) with -o + nr_blocks=0,nr_inodes=0 + +I would have preferred to write this patch to be able to pass +rootflags=nr_blocks=0,nr_inodes=0 on the kernel command line, +and then hand these rootflags over to the initramfs (tmpfs) +mount in the same way the kernel hands them over to the block +device rootfs mount. But at least the Debian/m68k initrd also +parses $rootflags from the environment and adds it to the call +to the user-space mount for the eventual root device, which +would make the kernel command line rootflags option be used in +both places (tmpfs and e.g. ext4) which is guaranteed to error +out in at least one of them. + +This change is intended to aid people in a setup where the +initrd is the final root filesystem, i.e. not mounted over. +This is especially useful in automated tests running on qemu +for boards with constrained memory (e.g. 64 MiB on sh4). + +Considering that the initramfs is normally emptied out then +overmounted, this change is probably safe for setups where +initramfs just hosts early userspace, too, since the tmpfs +backing it is not accessible any more later on, AFAICT. + +Signed-off-by: Thorsten Glaser +--- + init/do_mounts.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/init/do_mounts.c b/init/do_mounts.c +index 82f2288..55a4cfe 100644 +--- a/init/do_mounts.c ++++ b/init/do_mounts.c +@@ -594,6 +594,7 @@ out: + } + + static bool is_tmpfs; ++static char tmpfs_rootflags[] = "nr_blocks=0,nr_inodes=0"; + static struct dentry *rootfs_mount(struct file_system_type *fs_type, + int flags, const char *dev_name, void *data) + { +@@ -606,6 +607,9 @@ static struct dentry *rootfs_mount(struct file_system_type *fs_type, + if (IS_ENABLED(CONFIG_TMPFS) && is_tmpfs) + fill = shmem_fill_super; + ++ if (is_tmpfs) ++ data = tmpfs_rootflags; ++ + return mount_nodev(fs_type, flags, data, fill); + } + +-- +2.0.0.rc0 + diff --git a/target/linux/patches/4.1.35/j2-core.patch b/target/linux/patches/4.1.35/j2-core.patch new file mode 100644 index 000000000..38136df2c --- /dev/null +++ b/target/linux/patches/4.1.35/j2-core.patch @@ -0,0 +1,2060 @@ +diff -Nur linux-4.1.13.orig/arch/sh/Kconfig linux-4.1.13/arch/sh/Kconfig +--- linux-4.1.13.orig/arch/sh/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/Kconfig 2015-12-05 00:16:48.000000000 +0100 +@@ -66,7 +66,7 @@ + select HAVE_MIXED_BREAKPOINTS_REGS + select PERF_EVENTS + select ARCH_HIBERNATION_POSSIBLE if MMU +- select SPARSE_IRQ ++ select SPARSE_IRQ if !CPU_SUBTYPE_0PF + select HAVE_CC_STACKPROTECTOR + + config SUPERH64 +@@ -108,6 +108,9 @@ + config ARCH_HIBERNATION_POSSIBLE + def_bool n + ++config ARCH_USES_GETTIMEOFFSET ++ def_bool n ++ + config SYS_SUPPORTS_APM_EMULATION + bool + select ARCH_SUSPEND_POSSIBLE +@@ -184,6 +187,11 @@ + select CPU_SH2 + select UNCACHED_MAPPING + ++config CPU_SH2J ++ bool ++ select CPU_SH2 ++ select ARCH_USES_GETTIMEOFFSET ++ + config CPU_SH3 + bool + select CPU_HAS_INTEVT +@@ -303,6 +311,12 @@ + help + Select MX-G if running on an R8A03022BG part. + ++# SH-2J Processor Support ++ ++config CPU_SUBTYPE_0PF ++ bool "Support 0PF J2 SoftCore" ++ select CPU_SH2J ++ + # SH-3 Processor Support + + config CPU_SUBTYPE_SH7705 +@@ -753,6 +767,7 @@ + SH_7751_SOLUTION_ENGINE + default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 + default "0x00002000" if PAGE_SIZE_8KB ++ default "0x0003F000" if CPU_SUBTYPE_0PF + default "0x00001000" + help + This sets the default offset of zero page. +diff -Nur linux-4.1.13.orig/arch/sh/Makefile linux-4.1.13/arch/sh/Makefile +--- linux-4.1.13.orig/arch/sh/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/Makefile 2015-12-05 00:16:48.000000000 +0100 +@@ -4,6 +4,7 @@ + # Copyright (C) 1999 Kaz Kojima + # Copyright (C) 2002 - 2008 Paul Mundt + # Copyright (C) 2002 M. R. Brown ++# Copyright (C) 2012 SEI, Inc. (sh2j) + # + # This file is subject to the terms and conditions of the GNU General Public + # License. See the file "COPYING" in the main directory of this archive +@@ -19,6 +20,7 @@ + isa-$(CONFIG_SH_DSP) := sh + isa-$(CONFIG_CPU_SH2) := sh2 + isa-$(CONFIG_CPU_SH2A) := sh2a ++isa-$(CONFIG_CPU_SH2J) := sh2j + isa-$(CONFIG_CPU_SH3) := sh3 + isa-$(CONFIG_CPU_SH4) := sh4 + isa-$(CONFIG_CPU_SH4A) := sh4a +@@ -31,6 +33,8 @@ + endif + + cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,) ++cflags-$(CONFIG_CPU_SH2J) := $(call cc-option,-m2,) \ ++ $(call cc-option,-melf,) + cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \ + $(call cc-option,-m2a-nofpu,) \ + $(call cc-option,-m4-nofpu,) +@@ -91,6 +95,7 @@ + defaultimage-$(CONFIG_SH_7724_SOLUTION_ENGINE) := uImage + defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE) := vmlinux + defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE) := vmlinux ++defaultimage-$(CONFIG_SH_0PF) := vmlinux + + # Set some sensible Kbuild defaults + KBUILD_IMAGE := $(defaultimage-y) +@@ -173,6 +178,7 @@ + # As an example, in order of preference, SH-2A > SH-2 > common definitions. + # + cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a ++cpuincdir-$(CONFIG_CPU_SH2J) += cpu-sh2j + cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 + cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 + cpuincdir-$(CONFIG_CPU_SH4A) += cpu-sh4a +diff -Nur linux-4.1.13.orig/arch/sh/boards/Kconfig linux-4.1.13/arch/sh/boards/Kconfig +--- linux-4.1.13.orig/arch/sh/boards/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/boards/Kconfig 2015-12-05 00:16:48.000000000 +0100 +@@ -90,6 +90,13 @@ + Select 7343 SolutionEngine if configuring for a Hitachi + SH7343 (SH-Mobile 3AS) evaluation board. + ++config 0PF_FPGA ++ bool "0PF FPGA" ++ depends on CPU_SUBTYPE_0PF ++ help ++ Select 0PF_FPGA if you are configuring for an FPGA with ++ the SH2j-workalike SoftCore from http://0pf.org ++ + config SH_HP6XX + bool "HP6XX" + select SYS_SUPPORTS_APM_EMULATION +diff -Nur linux-4.1.13.orig/arch/sh/boards/Makefile linux-4.1.13/arch/sh/boards/Makefile +--- linux-4.1.13.orig/arch/sh/boards/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/boards/Makefile 2015-12-05 00:16:48.000000000 +0100 +@@ -15,3 +15,4 @@ + obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o + obj-$(CONFIG_SH_APSH4A3A) += board-apsh4a3a.o + obj-$(CONFIG_SH_APSH4AD0A) += board-apsh4ad0a.o ++obj-$(CONFIG_0PF_FPGA) += board-0pf.o +diff -Nur linux-4.1.13.orig/arch/sh/boards/board-0pf.c linux-4.1.13/arch/sh/boards/board-0pf.c +--- linux-4.1.13.orig/arch/sh/boards/board-0pf.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/sh/boards/board-0pf.c 2015-12-05 00:16:48.000000000 +0100 +@@ -0,0 +1,270 @@ ++/* ++ * board-0pf.c ++ * ++ * Copyright (C) 2006 Yoshinori Sato ++ * Copyright (C) 2009 D. Jeff Dionne ++ * ++ * 0PF j-series CPU on FPGA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++int shj_irq_demux(int irq) ++{ ++ return irq; /* punt.. */ ++} ++ ++static void shj_ack_noop(struct irq_data *data) ++{ ++ asm("nop;nop"); ++ /* Dummy function. */ ++} ++ ++static inline void shj_enable_irq(struct irq_data *data) ++{ ++ unsigned int irq = data->irq; ++ volatile unsigned int vui; ++ ++// printk("%s: IRQ %d (0x%x)\n", __func__, irq, irq); ++ ++ switch (irq) { ++ case PIT_IRQ: ++ //AQ_PIO = 0x0BB; ++ /* enable, lvl 2, vector 64 */ ++ AQ_SYS = (1 << 26) | /* enable PIT */ ++ (0x02 << 20) | /* interrupt level 2 */ ++ (PIT_IRQ << 12) | /* vector 64 */ ++ 1; /* turn off interval timer */ ++ break; ++ ++ case Irq_UART0: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_UART0, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_UART0, 0x7); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_UART1: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_UART1, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_UART1, 0x7); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_GPS: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_GPS, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_GPS, 0x7); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_I2C: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_I2C, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_I2C, 0x7); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_EMAC: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_EMAC, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_EMAC, 0x8); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ printk("EMAC prio is: %x\n", vui); ++ break; ++ ++ case Irq_GPIO: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_GPIO, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_GPIO, 0x7); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_1PPS: // prio is higher for 1PPS porposes ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_1PPS, 0xf); /* clear old setting */ ++ vui |= ID2Pri(EIrqID_1PPS, 0x9); /* set interrupt level */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ printk("1PPS prio is: %x\n", vui); ++ break; ++ ++ default: ++ break; ++ ++ } ++} ++ ++static inline void shj_disable_irq(struct irq_data *data) ++{ ++ volatile unsigned int vui; ++ unsigned int irq = data->irq; ++ ++ printk("%s: IRQ %d\n", __func__, irq); ++ ++ switch (irq) { ++ case PIT_IRQ: ++ /* enable, lvl 2, vector 64 */ ++ AQ_SYS = (0 << 26) | /* disable PIT */ ++ (0x02 << 20) | /* interrupt level 2 */ ++ (PIT_IRQ << 12) | /* vector 64 */ ++ 1; /* turn off interval timer */ ++ break; ++ ++ case Irq_UART0: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_UART0, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_UART1: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_UART1, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_GPS: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_GPS, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_I2C: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_I2C, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_EMAC: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_EMAC, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_GPIO: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_GPIO, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ case Irq_1PPS: ++ vui = *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri); ++ vui &= ~ID2Pri(EIrqID_1PPS, 0xf); /* clear setting */ ++ *(volatile unsigned int *)(sys_SYS_BASE + Sys_IntPri) = vui; ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++static struct irq_chip shj_irq_chip = { ++ .name = "0PF_INTC", ++ .irq_enable = shj_enable_irq, ++ .irq_disable = shj_disable_irq, ++ .irq_ack = shj_ack_noop, ++}; ++ ++static void __init shj_irq_init(void) ++{ ++ int c; ++ ++ printk(KERN_INFO "0PF FPGA interrupt controller...\n"); ++ ++ for (c = 0; c < NR_IRQS; c++) { ++ //irq_desc[c].action = NULL; ++ //irq_desc[c].depth = 1; ++ irq_set_chip_and_handler_name(c, &shj_irq_chip, ++ handle_simple_irq, "simple"); ++ } ++} ++ ++#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET ++// Commit 7b1f62076 switched this to a pointer ++/* ++ * Should return nanoseconds since last timer tick ++ */ ++u32 shj_gettimeoffset(void) ++{ ++ u32 clocks_counter = readl(SHJ_PIT_PCNTR); ++ ++ return clocks_counter * readl(SHJ_NSEC_PER_CLOCK); ++} ++ ++static void __init shj_board_setup(char **cmdline) ++{ ++ arch_gettimeoffset = shj_gettimeoffset; ++} ++#else ++#define shj_gettimeoffset 0 ++#endif ++ ++static struct sh_machine_vector mv_se __initmv = { ++ .mv_name = "0PF_FPGA", ++ //.mv_nr_irqs = 256, ++ .mv_irq_demux = shj_irq_demux, ++ .mv_init_irq = shj_irq_init, ++ .mv_setup = shj_board_setup, ++}; ++ ++static irqreturn_t timer_interrupt(int irq, void *dev_id) ++{ ++ // AQ_PIO = 0x011; // GREEN ++ ++ if (current->pid) ++ profile_tick(CPU_PROFILING); ++ ++ xtime_update(1); ++ update_process_times(user_mode(get_irq_regs())); ++ ++ return IRQ_HANDLED; ++} ++ ++static void __init start_pit(void) ++{ ++ if (request_irq ++ (PIT_IRQ, timer_interrupt, IRQF_TIMER, "pit", NULL)) ++ printk("irq_desc[%p] : fail to register\n", &irq_desc[PIT_IRQ]); ++ ++ irq_set_chip_and_handler_name(PIT_IRQ, &shj_irq_chip, handle_edge_irq, ++ "pit"); ++} ++ ++static int __init shj_initialise(void) ++{ ++ struct irq_data *data; ++ ++ pr_info("0PF Machine setup...\n"); ++ ++ start_pit(); ++ ++ data = irq_get_irq_data(Irq_UART0); ++ shj_enable_irq(data); ++ ++ data = irq_get_irq_data(Irq_UART1); ++ shj_enable_irq(data); ++ ++ data = irq_get_irq_data(Irq_EMAC); ++ shj_enable_irq(data); ++ ++ data = irq_get_irq_data(PIT_IRQ); ++ shj_enable_irq(data); ++ ++ pr_info("0PF Machine setup done.\n"); ++ ++ return 0; ++} ++ ++arch_initcall(shj_initialise); +diff -Nur linux-4.1.13.orig/arch/sh/configs/0pf_defconfig linux-4.1.13/arch/sh/configs/0pf_defconfig +--- linux-4.1.13.orig/arch/sh/configs/0pf_defconfig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/sh/configs/0pf_defconfig 2015-12-05 00:16:48.000000000 +0100 +@@ -0,0 +1,945 @@ ++# ++# Automatically generated file; DO NOT EDIT. ++# Linux/sh 4.1.0-rc6 Kernel Configuration ++# ++CONFIG_SUPERH=y ++CONFIG_SUPERH32=y ++# CONFIG_SUPERH64 is not set ++CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++CONFIG_GENERIC_BUG=y ++CONFIG_GENERIC_HWEIGHT=y ++# CONFIG_ARCH_SUSPEND_POSSIBLE is not set ++# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set ++CONFIG_ARCH_USES_GETTIMEOFFSET=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_NO_IOPORT_MAP=y ++CONFIG_DMA_NONCOHERENT=y ++CONFIG_NEED_DMA_MAP_STATE=y ++CONFIG_NEED_SG_DMA_LENGTH=y ++CONFIG_PGTABLE_LEVELS=2 ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++CONFIG_IRQ_WORK=y ++ ++# ++# General setup ++# ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_CROSS_COMPILE="" ++# CONFIG_COMPILE_TEST is not set ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_HAVE_KERNEL_GZIP=y ++CONFIG_HAVE_KERNEL_BZIP2=y ++CONFIG_HAVE_KERNEL_LZMA=y ++CONFIG_HAVE_KERNEL_XZ=y ++CONFIG_HAVE_KERNEL_LZO=y ++CONFIG_KERNEL_GZIP=y ++# CONFIG_KERNEL_BZIP2 is not set ++# CONFIG_KERNEL_LZMA is not set ++# CONFIG_KERNEL_XZ is not set ++# CONFIG_KERNEL_LZO is not set ++CONFIG_DEFAULT_HOSTNAME="(none)" ++# CONFIG_SYSVIPC is not set ++# CONFIG_FHANDLE is not set ++# CONFIG_USELIB is not set ++CONFIG_HAVE_ARCH_AUDITSYSCALL=y ++ ++# ++# IRQ subsystem ++# ++CONFIG_MAY_HAVE_SPARSE_IRQ=y ++CONFIG_GENERIC_IRQ_SHOW=y ++CONFIG_IRQ_DOMAIN=y ++CONFIG_IRQ_FORCED_THREADING=y ++# CONFIG_SPARSE_IRQ is not set ++CONFIG_GENERIC_CLOCKEVENTS=y ++ ++# ++# Timers subsystem ++# ++CONFIG_HZ_PERIODIC=y ++ ++# ++# CPU/Task time and stats accounting ++# ++CONFIG_TICK_CPU_ACCOUNTING=y ++# CONFIG_BSD_PROCESS_ACCT is not set ++ ++# ++# RCU Subsystem ++# ++CONFIG_TINY_RCU=y ++CONFIG_SRCU=y ++# CONFIG_TASKS_RCU is not set ++# CONFIG_RCU_STALL_COMMON is not set ++# CONFIG_TREE_RCU_TRACE is not set ++CONFIG_RCU_KTHREAD_PRIO=0 ++# CONFIG_RCU_EXPEDITE_BOOT is not set ++# CONFIG_BUILD_BIN2C is not set ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=17 ++# CONFIG_CGROUPS is not set ++# CONFIG_CHECKPOINT_RESTORE is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_SCHED_AUTOGROUP is not set ++# CONFIG_SYSFS_DEPRECATED is not set ++# CONFIG_RELAY is not set ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="initrd/root-dev initrd/root-files" ++CONFIG_INITRAMFS_ROOT_UID=0 ++CONFIG_INITRAMFS_ROOT_GID=0 ++# CONFIG_RD_GZIP is not set ++# CONFIG_RD_BZIP2 is not set ++# CONFIG_RD_LZMA is not set ++# CONFIG_RD_XZ is not set ++# CONFIG_RD_LZO is not set ++# CONFIG_RD_LZ4 is not set ++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set ++CONFIG_SYSCTL=y ++CONFIG_ANON_INODES=y ++CONFIG_HAVE_UID16=y ++# CONFIG_EXPERT is not set ++CONFIG_UID16=y ++CONFIG_MULTIUSER=y ++CONFIG_SGETMASK_SYSCALL=y ++CONFIG_SYSFS_SYSCALL=y ++# CONFIG_SYSCTL_SYSCALL is not set ++CONFIG_KALLSYMS=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++# CONFIG_BPF_SYSCALL is not set ++CONFIG_AIO=y ++CONFIG_ADVISE_SYSCALLS=y ++# CONFIG_EMBEDDED is not set ++CONFIG_HAVE_PERF_EVENTS=y ++CONFIG_PERF_USE_VMALLOC=y ++ ++# ++# Kernel Performance Events And Counters ++# ++CONFIG_PERF_EVENTS=y ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++# CONFIG_COMPAT_BRK is not set ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_PROFILING is not set ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_UPROBES is not set ++# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_ARCH_TRACEHOOK=y ++CONFIG_HAVE_DMA_ATTRS=y ++CONFIG_GENERIC_SMP_IDLE_THREAD=y ++CONFIG_GENERIC_IDLE_POLL_SETUP=y ++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_DMA_API_DEBUG=y ++CONFIG_HAVE_HW_BREAKPOINT=y ++CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y ++CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y ++CONFIG_HAVE_CC_STACKPROTECTOR=y ++# CONFIG_CC_STACKPROTECTOR is not set ++CONFIG_CC_STACKPROTECTOR_NONE=y ++# CONFIG_CC_STACKPROTECTOR_REGULAR is not set ++# CONFIG_CC_STACKPROTECTOR_STRONG is not set ++CONFIG_MODULES_USE_ELF_RELA=y ++CONFIG_OLD_SIGSUSPEND=y ++CONFIG_OLD_SIGACTION=y ++ ++# ++# GCOV-based kernel profiling ++# ++CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++CONFIG_BASE_SMALL=0 ++# CONFIG_MODULES is not set ++CONFIG_BLOCK=y ++# CONFIG_LBDAF is not set ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_BSGLIB is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++# CONFIG_BLK_CMDLINE_PARSER is not set ++ ++# ++# Partition Types ++# ++# CONFIG_PARTITION_ADVANCED is not set ++CONFIG_MSDOS_PARTITION=y ++CONFIG_EFI_PARTITION=y ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_DEADLINE is not set ++# CONFIG_IOSCHED_CFQ is not set ++CONFIG_DEFAULT_NOOP=y ++CONFIG_DEFAULT_IOSCHED="noop" ++CONFIG_INLINE_SPIN_UNLOCK_IRQ=y ++CONFIG_INLINE_READ_UNLOCK=y ++CONFIG_INLINE_READ_UNLOCK_IRQ=y ++CONFIG_INLINE_WRITE_UNLOCK=y ++CONFIG_INLINE_WRITE_UNLOCK_IRQ=y ++# CONFIG_FREEZER is not set ++ ++# ++# System type ++# ++CONFIG_CPU_SH2=y ++CONFIG_CPU_SH2J=y ++# CONFIG_CPU_SUBTYPE_SH7619 is not set ++# CONFIG_CPU_SUBTYPE_SH7201 is not set ++# CONFIG_CPU_SUBTYPE_SH7203 is not set ++# CONFIG_CPU_SUBTYPE_SH7206 is not set ++# CONFIG_CPU_SUBTYPE_SH7263 is not set ++# CONFIG_CPU_SUBTYPE_SH7264 is not set ++# CONFIG_CPU_SUBTYPE_SH7269 is not set ++# CONFIG_CPU_SUBTYPE_MXG is not set ++CONFIG_CPU_SUBTYPE_0PF=y ++# CONFIG_CPU_SUBTYPE_SH7705 is not set ++# CONFIG_CPU_SUBTYPE_SH7706 is not set ++# CONFIG_CPU_SUBTYPE_SH7707 is not set ++# CONFIG_CPU_SUBTYPE_SH7708 is not set ++# CONFIG_CPU_SUBTYPE_SH7709 is not set ++# CONFIG_CPU_SUBTYPE_SH7710 is not set ++# CONFIG_CPU_SUBTYPE_SH7712 is not set ++# CONFIG_CPU_SUBTYPE_SH7720 is not set ++# CONFIG_CPU_SUBTYPE_SH7721 is not set ++# CONFIG_CPU_SUBTYPE_SH7750 is not set ++# CONFIG_CPU_SUBTYPE_SH7091 is not set ++# CONFIG_CPU_SUBTYPE_SH7750R is not set ++# CONFIG_CPU_SUBTYPE_SH7750S is not set ++# CONFIG_CPU_SUBTYPE_SH7751 is not set ++# CONFIG_CPU_SUBTYPE_SH7751R is not set ++# CONFIG_CPU_SUBTYPE_SH7760 is not set ++# CONFIG_CPU_SUBTYPE_SH4_202 is not set ++# CONFIG_CPU_SUBTYPE_SH7723 is not set ++# CONFIG_CPU_SUBTYPE_SH7724 is not set ++# CONFIG_CPU_SUBTYPE_SH7734 is not set ++# CONFIG_CPU_SUBTYPE_SH7757 is not set ++# CONFIG_CPU_SUBTYPE_SH7763 is not set ++# CONFIG_CPU_SUBTYPE_SH7770 is not set ++# CONFIG_CPU_SUBTYPE_SH7780 is not set ++# CONFIG_CPU_SUBTYPE_SH7785 is not set ++# CONFIG_CPU_SUBTYPE_SH7786 is not set ++# CONFIG_CPU_SUBTYPE_SHX3 is not set ++# CONFIG_CPU_SUBTYPE_SH7343 is not set ++# CONFIG_CPU_SUBTYPE_SH7722 is not set ++# CONFIG_CPU_SUBTYPE_SH7366 is not set ++ ++# ++# Memory management options ++# ++CONFIG_QUICKLIST=y ++CONFIG_PAGE_OFFSET=0x00000000 ++CONFIG_FORCE_MAX_ZONEORDER=14 ++CONFIG_MEMORY_START=0x10000000 ++CONFIG_MEMORY_SIZE=0x8000000 ++# CONFIG_29BIT is not set ++CONFIG_32BIT=y ++CONFIG_ARCH_FLATMEM_ENABLE=y ++CONFIG_ARCH_SPARSEMEM_ENABLE=y ++CONFIG_ARCH_SPARSEMEM_DEFAULT=y ++CONFIG_ARCH_SELECT_MEMORY_MODEL=y ++CONFIG_PAGE_SIZE_4KB=y ++# CONFIG_PAGE_SIZE_8KB is not set ++# CONFIG_PAGE_SIZE_16KB is not set ++# CONFIG_PAGE_SIZE_64KB is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_SPARSEMEM_STATIC=y ++CONFIG_HAVE_MEMBLOCK=y ++CONFIG_HAVE_MEMBLOCK_NODE_MAP=y ++CONFIG_ARCH_DISCARD_MEMBLOCK=y ++# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=999999 ++# CONFIG_PHYS_ADDR_T_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_NR_QUICK=1 ++CONFIG_NOMMU_INITIAL_TRIM_EXCESS=1 ++CONFIG_NEED_PER_CPU_KM=y ++# CONFIG_CLEANCACHE is not set ++# CONFIG_ZPOOL is not set ++# CONFIG_ZBUD is not set ++ ++# ++# Cache configuration ++# ++# CONFIG_CACHE_WRITEBACK is not set ++# CONFIG_CACHE_WRITETHROUGH is not set ++CONFIG_CACHE_OFF=y ++ ++# ++# Processor features ++# ++# CONFIG_CPU_LITTLE_ENDIAN is not set ++CONFIG_CPU_BIG_ENDIAN=y ++# CONFIG_SH_FPU_EMU is not set ++ ++# ++# Board support ++# ++CONFIG_0PF_FPGA=y ++ ++# ++# Timer and clock configuration ++# ++CONFIG_SH_PCLK_FREQ=32000000 ++CONFIG_SH_CLK_CPG=y ++CONFIG_SH_CLK_CPG_LEGACY=y ++ ++# ++# CPU Frequency scaling ++# ++ ++# ++# CPU Frequency scaling ++# ++# CONFIG_CPU_FREQ is not set ++ ++# ++# DMA support ++# ++ ++# ++# Companion Chips ++# ++ ++# ++# Additional SuperH Device Drivers ++# ++# CONFIG_HEARTBEAT is not set ++# CONFIG_PUSH_SWITCH is not set ++ ++# ++# Kernel features ++# ++CONFIG_HZ_100=y ++# CONFIG_HZ_250 is not set ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=100 ++# CONFIG_SCHED_HRTICK is not set ++# CONFIG_CRASH_DUMP is not set ++CONFIG_PHYSICAL_START=0x10000000 ++# CONFIG_SECCOMP is not set ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++CONFIG_GUSA=y ++ ++# ++# SuperH / SH-Mobile Driver Options ++# ++CONFIG_SH_INTC=y ++ ++# ++# Interrupt controller options ++# ++ ++# ++# Boot options ++# ++CONFIG_ZERO_PAGE_OFFSET=0x0003F000 ++CONFIG_BOOT_LINK_OFFSET=0x00800000 ++CONFIG_ENTRY_OFFSET=0x00001000 ++# CONFIG_CMDLINE_OVERWRITE is not set ++CONFIG_CMDLINE_EXTEND=y ++CONFIG_CMDLINE="console=ttyUL0" ++ ++# ++# Bus options ++# ++# CONFIG_PCCARD is not set ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF_FDPIC=y ++CONFIG_BINFMT_SCRIPT=y ++CONFIG_BINFMT_FLAT=y ++# CONFIG_BINFMT_ZFLAT is not set ++# CONFIG_BINFMT_SHARED_FLAT is not set ++# CONFIG_HAVE_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++CONFIG_COREDUMP=y ++ ++# ++# Power management options (EXPERIMENTAL) ++# ++# CONFIG_PM is not set ++ ++# ++# CPU Idle ++# ++# CONFIG_CPU_IDLE is not set ++# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set ++# CONFIG_NET is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++# CONFIG_UEVENT_HELPER is not set ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++# CONFIG_STANDALONE is not set ++# CONFIG_PREVENT_FIRMWARE_BUILD is not set ++CONFIG_FW_LOADER=y ++# CONFIG_FIRMWARE_IN_KERNEL is not set ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set ++CONFIG_ALLOW_DEV_COREDUMP=y ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_GENERIC_CPU_DEVICES is not set ++# CONFIG_DMA_SHARED_BUFFER is not set ++ ++# ++# Bus devices ++# ++# CONFIG_MTD is not set ++CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y ++# CONFIG_PARPORT is not set ++# CONFIG_BLK_DEV is not set ++ ++# ++# Misc devices ++# ++# CONFIG_SENSORS_LIS3LV02D is not set ++# CONFIG_DUMMY_IRQ is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++# CONFIG_SRAM is not set ++# CONFIG_C2PORT is not set ++ ++# ++# EEPROM support ++# ++# CONFIG_EEPROM_93CX6 is not set ++ ++# ++# Texas Instruments shared transport line discipline ++# ++ ++# ++# Altera FPGA firmware download module ++# ++ ++# ++# Intel MIC Bus Driver ++# ++ ++# ++# Intel MIC Host Driver ++# ++ ++# ++# Intel MIC Card Driver ++# ++# CONFIG_ECHO is not set ++# CONFIG_CXL_BASE is not set ++ ++# ++# SCSI device support ++# ++CONFIG_SCSI_MOD=y ++# CONFIG_RAID_ATTRS is not set ++# CONFIG_SCSI is not set ++# CONFIG_SCSI_DMA is not set ++CONFIG_HAVE_PATA_PLATFORM=y ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++# CONFIG_INPUT_SPARSEKMAP is not set ++# CONFIG_INPUT_MATRIXKMAP is not set ++ ++# ++# Userland interfaces ++# ++# CONFIG_INPUT_MOUSEDEV is not set ++# CONFIG_INPUT_JOYDEV is not set ++# CONFIG_INPUT_EVDEV is not set ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_TTY=y ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_HW_CONSOLE=y ++# CONFIG_VT_HW_CONSOLE_BINDING is not set ++CONFIG_UNIX98_PTYS=y ++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++# CONFIG_TRACE_SINK is not set ++CONFIG_DEVMEM=y ++# CONFIG_DEVKMEM is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_UARTLITE=y ++CONFIG_SERIAL_UARTLITE_CONSOLE=y ++CONFIG_SERIAL_UARTLITE_0PF=y ++# CONFIG_SERIAL_SH_SCI is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++# CONFIG_SERIAL_SCCNXP is not set ++# CONFIG_SERIAL_ALTERA_JTAGUART is not set ++# CONFIG_SERIAL_ALTERA_UART is not set ++# CONFIG_SERIAL_ARC is not set ++# CONFIG_SERIAL_FSL_LPUART is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++ ++# ++# I2C support ++# ++# CONFIG_I2C is not set ++# CONFIG_SPI is not set ++# CONFIG_SPMI is not set ++# CONFIG_HSI is not set ++ ++# ++# PPS support ++# ++# CONFIG_PPS is not set ++ ++# ++# PPS generators support ++# ++ ++# ++# PTP clock support ++# ++ ++# ++# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. ++# ++CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_POWER_AVS is not set ++# CONFIG_HWMON is not set ++# CONFIG_THERMAL is not set ++# CONFIG_WATCHDOG is not set ++CONFIG_SSB_POSSIBLE=y ++ ++# ++# Sonics Silicon Backplane ++# ++# CONFIG_SSB is not set ++CONFIG_BCMA_POSSIBLE=y ++ ++# ++# Broadcom specific AMBA ++# ++# CONFIG_BCMA is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_CORE is not set ++# CONFIG_MFD_CROS_EC is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_KEMPLD is not set ++# CONFIG_MFD_MT6397 is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_ABX500_CORE is not set ++# CONFIG_MFD_SYSCON is not set ++# CONFIG_MFD_TI_AM335X_TSCADC is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_REGULATOR is not set ++# CONFIG_MEDIA_SUPPORT is not set ++ ++# ++# Graphics support ++# ++ ++# ++# Direct Rendering Manager ++# ++ ++# ++# Frame buffer Devices ++# ++# CONFIG_FB is not set ++# CONFIG_FB_SH_MOBILE_MERAM is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++# CONFIG_VGASTATE is not set ++ ++# ++# Console display driver support ++# ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_DUMMY_CONSOLE_COLUMNS=80 ++CONFIG_DUMMY_CONSOLE_ROWS=25 ++# CONFIG_SOUND is not set ++ ++# ++# HID support ++# ++# CONFIG_HID is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++# CONFIG_USB_SUPPORT is not set ++# CONFIG_UWB is not set ++# CONFIG_MMC is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_NEW_LEDS is not set ++# CONFIG_ACCESSIBILITY is not set ++CONFIG_RTC_LIB=y ++# CONFIG_RTC_CLASS is not set ++# CONFIG_DMADEVICES is not set ++# CONFIG_AUXDISPLAY is not set ++# CONFIG_VIRT_DRIVERS is not set ++ ++# ++# Virtio drivers ++# ++# CONFIG_VIRTIO_MMIO is not set ++ ++# ++# Microsoft Hyper-V guest support ++# ++# CONFIG_STAGING is not set ++CONFIG_CLKDEV_LOOKUP=y ++ ++# ++# Hardware Spinlock drivers ++# ++ ++# ++# Clock Source drivers ++# ++# CONFIG_ATMEL_PIT is not set ++# CONFIG_SH_TIMER_CMT is not set ++# CONFIG_SH_TIMER_MTU2 is not set ++# CONFIG_SH_TIMER_TMU is not set ++# CONFIG_EM_TIMER_STI is not set ++# CONFIG_MAILBOX is not set ++ ++# ++# Remoteproc drivers ++# ++# CONFIG_STE_MODEM_RPROC is not set ++ ++# ++# Rpmsg drivers ++# ++ ++# ++# SOC (System On Chip) specific Drivers ++# ++# CONFIG_SOC_TI is not set ++# CONFIG_PM_DEVFREQ is not set ++# CONFIG_EXTCON is not set ++# CONFIG_MEMORY is not set ++# CONFIG_IIO is not set ++# CONFIG_PWM is not set ++# CONFIG_IPACK_BUS is not set ++# CONFIG_RESET_CONTROLLER is not set ++# CONFIG_FMC is not set ++ ++# ++# PHY Subsystem ++# ++# CONFIG_GENERIC_PHY is not set ++# CONFIG_BCM_KONA_USB2_PHY is not set ++# CONFIG_POWERCAP is not set ++# CONFIG_MCB is not set ++ ++# ++# Android ++# ++# CONFIG_ANDROID is not set ++ ++# ++# File systems ++# ++# CONFIG_EXT2_FS is not set ++# CONFIG_EXT3_FS is not set ++# CONFIG_EXT4_FS is not set ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_BTRFS_FS is not set ++# CONFIG_NILFS2_FS is not set ++# CONFIG_F2FS_FS is not set ++# CONFIG_FS_POSIX_ACL is not set ++CONFIG_FILE_LOCKING=y ++# CONFIG_FSNOTIFY is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_INOTIFY_USER is not set ++# CONFIG_FANOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_QUOTACTL is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++# CONFIG_OVERLAY_FS is not set ++ ++# ++# Caches ++# ++# CONFIG_FSCACHE is not set ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="utf8" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_KERNFS=y ++CONFIG_SYSFS=y ++# CONFIG_HUGETLB_PAGE is not set ++# CONFIG_CONFIGFS_FS is not set ++# CONFIG_MISC_FILESYSTEMS is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="utf8" ++# CONFIG_NLS_CODEPAGE_437 is not set ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++# CONFIG_NLS_ISO8859_1 is not set ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++# CONFIG_NLS_MAC_ROMAN is not set ++# CONFIG_NLS_MAC_CELTIC is not set ++# CONFIG_NLS_MAC_CENTEURO is not set ++# CONFIG_NLS_MAC_CROATIAN is not set ++# CONFIG_NLS_MAC_CYRILLIC is not set ++# CONFIG_NLS_MAC_GAELIC is not set ++# CONFIG_NLS_MAC_GREEK is not set ++# CONFIG_NLS_MAC_ICELAND is not set ++# CONFIG_NLS_MAC_INUIT is not set ++# CONFIG_NLS_MAC_ROMANIAN is not set ++# CONFIG_NLS_MAC_TURKISH is not set ++CONFIG_NLS_UTF8=y ++ ++# ++# Kernel hacking ++# ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++ ++# ++# printk and dmesg options ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 ++ ++# ++# Compile-time checks and compiler options ++# ++# CONFIG_ENABLE_WARN_DEPRECATED is not set ++# CONFIG_ENABLE_MUST_CHECK is not set ++CONFIG_FRAME_WARN=1024 ++# CONFIG_STRIP_ASM_SYMS is not set ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_SECTION_MISMATCH is not set ++# CONFIG_MAGIC_SYSRQ is not set ++# CONFIG_DEBUG_KERNEL is not set ++ ++# ++# Memory Debugging ++# ++# CONFIG_PAGE_EXTENSION is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_HAVE_DEBUG_KMEMLEAK=y ++CONFIG_DEBUG_MEMORY_INIT=y ++ ++# ++# Debug Lockups and Hangs ++# ++# CONFIG_PANIC_ON_OOPS is not set ++CONFIG_PANIC_ON_OOPS_VALUE=0 ++CONFIG_PANIC_TIMEOUT=0 ++# CONFIG_DEBUG_TIMEKEEPING is not set ++ ++# ++# Lock Debugging (spinlocks, mutexes, etc...) ++# ++# CONFIG_STACKTRACE is not set ++CONFIG_HAVE_DEBUG_BUGVERBOSE=y ++CONFIG_DEBUG_BUGVERBOSE=y ++ ++# ++# RCU Debugging ++# ++# CONFIG_PROVE_RCU is not set ++# CONFIG_SPARSE_RCU_POINTER is not set ++# CONFIG_TORTURE_TEST is not set ++CONFIG_HAVE_FUNCTION_TRACER=y ++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y ++CONFIG_HAVE_DYNAMIC_FTRACE=y ++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y ++CONFIG_HAVE_SYSCALL_TRACEPOINTS=y ++CONFIG_TRACING_SUPPORT=y ++# CONFIG_FTRACE is not set ++ ++# ++# Runtime Testing ++# ++# CONFIG_ATOMIC64_SELFTEST is not set ++# CONFIG_TEST_HEXDUMP is not set ++# CONFIG_TEST_STRING_HELPERS is not set ++# CONFIG_TEST_KSTRTOX is not set ++# CONFIG_TEST_RHASHTABLE is not set ++# CONFIG_DMA_API_DEBUG is not set ++# CONFIG_TEST_FIRMWARE is not set ++# CONFIG_TEST_UDELAY is not set ++# CONFIG_MEMTEST is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_SH_STANDARD_BIOS is not set ++# CONFIG_DWARF_UNWINDER is not set ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY_DMESG_RESTRICT is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++CONFIG_DEFAULT_SECURITY_DAC=y ++CONFIG_DEFAULT_SECURITY="" ++# CONFIG_CRYPTO is not set ++# CONFIG_BINARY_PRINTF is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++# CONFIG_HAVE_ARCH_BITREVERSE is not set ++CONFIG_GENERIC_STRNCPY_FROM_USER=y ++CONFIG_GENERIC_STRNLEN_USER=y ++CONFIG_GENERIC_IO=y ++# CONFIG_CRC_CCITT is not set ++# CONFIG_CRC16 is not set ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC32_SELFTEST is not set ++CONFIG_CRC32_SLICEBY8=y ++# CONFIG_CRC32_SLICEBY4 is not set ++# CONFIG_CRC32_SARWATE is not set ++# CONFIG_CRC32_BIT is not set ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++# CONFIG_CRC8 is not set ++# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set ++# CONFIG_RANDOM32_SELFTEST is not set ++# CONFIG_XZ_DEC is not set ++# CONFIG_XZ_DEC_BCJ is not set ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y ++CONFIG_GENERIC_ATOMIC64=y ++CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y ++# CONFIG_AVERAGE is not set ++# CONFIG_CORDIC is not set ++# CONFIG_DDR is not set ++# CONFIG_ARCH_HAS_SG_CHAIN is not set +diff -Nur linux-4.1.13.orig/arch/sh/include/asm/board-0pf.h linux-4.1.13/arch/sh/include/asm/board-0pf.h +--- linux-4.1.13.orig/arch/sh/include/asm/board-0pf.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/sh/include/asm/board-0pf.h 2015-12-05 00:16:48.000000000 +0100 +@@ -0,0 +1,247 @@ ++#ifndef SGM_BOARD_H ++#define SGM_BOARD_H ++ ++#define sys_IntTable (*(unsigned*)0x0) ++#define sys_IntVectors 256 ++ ++/* Some of interrupt is fixed vector */ ++#define Irq_MRES 0x02 /* Manual reset */ ++#define Irq_CPUERR 0x09 ++#define Irq_DMAERR 0x0a ++#define Irq_NMI 0x0b ++#define Irq_PIT 0x10 /* 100 Hz PIT */ ++#define Irq_EMAC 0x11 /* irqs(0) */ ++#define Irq_UART0 0x12 /* irqs(1) */ ++#define Irq_GPS 0x13 /* irqs(2) */ ++#define Irq_Ext 0x14 /* irqs(3) use by CS42518*/ ++#define Irq_1PPS 0x16 /* irqs(5) */ ++#define Irq_UART1 0x17 /* irqs(6) */ ++#define Irq_I2C 0x18 /* irqs(7) */ ++#define Irq_TMR 0x19 /* a 12 bit countdown counter */ ++#define Irq_GPIO 0x15 ++ ++/* External interrupt IDs */ ++#define EIrqID_EMAC 0 ++#define EIrqID_UART0 1 ++#define EIrqID_GPS 2 ++#define EIrqID_Ext 3 ++#define EIrqID_GPIO 4 ++#define EIrqID_1PPS 5 ++#define EIrqID_UART1 6 ++#define EIrqID_I2C 7 ++ ++/* External Interrupt ID convert to interrupt vector */ ++#define ID2Vect(x) (0x11 + (x)) ++ ++/* Convert external interupt ID to priority value */ ++#define ID2Pri(id, pri) ((pri) << ((id) <<2)) ++ ++/* Convert vector to interrupt entry address */ ++#define Vect2Irq(x) ((x) << 2) ++ ++#define PIT_IRQ Vect2Irq(Irq_PIT) ++#define EMAC_IRQ Vect2Irq(Irq_EMAC) ++#define UART0_IRQ Vect2Irq(Irq_UART0) ++#define GPS_IRQ Vect2Irq(Irq_GPS) ++#define EXT_IRQ Vect2Irq(Irq_Ext) ++#define UART1_IRQ Vect2Irq(Irq_UART1) ++#define I2C_IRQ Vect2Irq(Irq_I2C) ++#define TMR_IRQ Vect2Irq(Irq_TMR) ++ ++ ++/* End of interrupt definations */ ++#define sys_RAM_BASE 0x10000000 ++#define sys_PIO_BASE 0xabcd0000 ++#define sys_SPI_BASE 0xabcd0040 ++#define sys_I2C_BASE 0xabcd0080 // 0xabcd0020 ++#define sys_UART0_BASE 0xabcd0100 ++#define sys_SYS_BASE 0xabcd0200 ++#define sys_UART1_BASE 0xabcd0300 ++#define sys_GPS_BASE 0xabcd0400 ++#define sys_D2A_BASE 0xabcd0500 ++#define sys_EMAC_BASE 0xabce0000 ++ ++#define AQ_PIO (*(volatile unsigned int *)sys_PIO_BASE) ++#define AQ_I2C (*(volatile unsigned int *)sys_I2C_BASE) ++#define AQ_SPI (*(volatile unsigned int *)sys_SPI_BASE) ++#define AQ_UART0 (*(volatile unsigned int *)sys_UART0_BASE) ++#define AQ_SYS (*(volatile unsigned int *)sys_SYS_BASE) ++#define AQ_UART1 (*(volatile unsigned int *)sys_UART1_BASE) ++#define AQ_GPS (*(volatile unsigned int *)sys_GPS_BASE) ++#define AQ_D2A (*(volatile unsigned int *)sys_D2A_BASE) ++#define AQ_EMAC (*(volatile unsigned int *)sys_EMAC_BASE) ++ ++ ++struct st_uart16550 ++{ ++ unsigned int RTX; ++ unsigned int IER; ++ unsigned int IIR; ++ unsigned int LCR; ++ unsigned int MCR; ++ unsigned int LSR; ++ unsigned int MSR; ++ unsigned int SCR; ++}; ++#define uLSRDR 0x01 ++#define uLSROE 0x02 ++#define uLSRPE 0x04 ++#define uLSRFE 0x08 ++#define uLSRBI 0x10 ++#define uLSRTHRE 0x20 ++#define uLSRTEMT 0x40 ++#define uLSRRFE 0x80 /* Error in Revr FIFO */ ++ ++#if 0 ++#define B115200 0x000a ++#define B38400 0x001e ++#define B19200 0x003c ++#define B9600 0x0078 ++#define B4800 0x00f0 ++#endif ++ ++/* the following is belong to sys_SYS_BASE */ ++#define Sys_IntCon 0x0 ++/* When SIC_BRKON is set, BreadAddress will compare with Bus address to generate NMI interrupt */ ++#define Sys_BRKADR 0x04 ++/* Interrupt priority is 4 bits width, irqs(0) is [3,0], irqs(1) is [7,4] ... */ ++#define Sys_IntPri 0x08 ++/* End of offset define of sys_SYS_BASE */ ++/* Refer to Aquarius datasheet Page 12, NMI is lvl16, and lvl0 will not be accept */ ++/* Refer to define.v, IBit in SR [7:4] */ ++#define SIC_ENMI ((unsigned int) 0x1<<31) /* Emulate NMI */ ++#define SIC EIRQ ((unsigned int) 0x1<<30) /* Emulate IRQ */ ++#define SIC_ECER ((unsigned int) 0x1<<29) /* Emulate CPU Address Error */ ++#define SIC_EDER ((unsigned int) 0x1<<28) /* Emulate DMA Address Error */ ++#define SIC_EMRS ((unsigned int) 0x1<<27) /* Emulate Manual Reset */ ++#define SIC_EPIT ((unsigned int) 0x1<<26) /* Enable Periodical interval timer(PIT) */ ++#define SIC_TMRON ((unsigned int) 0x1<<25) /* Enable timer */ ++#define SIC_BRKON ((unsigned int) 0x1<<24) /* Break ON */ ++#define SIC_ILVL ((unsigned int) 0xF<<20) /* interrupt level for PIT */ ++#define SIC_IVEC ((unsigned int) 0xFF<<12) /* Interrupt Vector for PIT */ ++#define SIC_TMR ((unsigned int)0xFFF) /* Interval Timer when 0x0, it request IRQ*/ ++ ++/* PIO registers offset */ ++#define Poffset_IO 0x00 ++#define Poffset_imask 0x04 ++#define Poffset_redge 0x08 ++#define Poffset_changes 0x0c ++ ++/* Keys are connected to Parallel Input, Active low */ ++#define Pio_KeyEnter 0x0001 ++#define Pio_KeyESC 0x0002 ++#define Pio_KeyNorth 0x0020 ++#define Pio_KeyEast 0x0040 ++#define Pio_KeySouth 0x0080 ++#define Pio_KeyWest 0x0100 ++ ++/* SD_CD is active high of this bit */ ++#define Pio_SD_CD 0x00200000 ++ ++#define Pio_1PPS 0x00800000 ++ ++/* IMPORTANT!!! Pio_LEDPwr is connected with with reset pins of USB, ETH-PHY ++ * and GPS. DON'T CHANGE IT or use it for now!!! ++ * TODO: VHDL needs to fix Power LED to other location with set and reset feature ++ */ ++#define Pio_LEDPwr 0x0010 ++#define Pio_LEDErr 0x0020 ++#define Pio_TP70 0x0040 ++ ++#if 0 ++ #define I2c_busy 0x8000 ++ #define I2c_next 0x4000 ++ #define I2c_ack 0x2000 ++ #define I2c_timeout 0x1000 ++ #define I2c_timer 0x0800 ++ #define I2c_mask 0xf800 ++#else ++ #define I2cO_ctrl 0x00 ++ #define I2cO_slen 0x04 ++ #define I2cO_word 0x0C ++ ++ /* for I2cO_ctrl */ ++ #define I2cC_busy 0x01 ++ #define I2cC_timeout 0x02 ++ #define I2cC_complete 0x04 ++ #define I2cC_reset 0x08 ++ #define I2cC_run 0x10 ++ #define I2cC_irqen 0x20 ++ #define I2cC_clk 0x40 ++ #define I2cC_dat 0x80 ++ #define I2cC_MaskDelay 0xff00 ++ #define I2c_delay(x) ((x)<< 8) ++ #define I2cC_MaskAckTimeout 0xf0000 ++ #define I2c_timeout(x) ((x) << 16) ++ /* for I2cO_slen */ ++ #define I2cS_MaskXlen 0x1f ++ #define I2cS_MaxLen 16 ++ #define I2cS_MaskSpeed 0x30000 ++ #define I2cS_100k 0x0 ++ #define I2cS_400k 0x10000 ++ #define I2cS_1m 0x20000 ++ #define I2cS_3m4 0x30000 ++ #define I2cS_Maskwordcount 0xf80000 ++#endif ++ ++/***********************************************************/ ++/************************************ EMAC **************/ ++/***********************************************************/ ++ ++#define AQ_EMAC_BASE 0xABCE0000 ++#define AQ_EMAC_CONTROL 0xABCE0000 ++#define AQ_EMAC_STATUS 0xABCE0000 ++ ++/* Control bits */ ++#define AQ_EMAC_ENABLE_RX 0x00000002 ++#define AQ_EMAC_ENABLE_TX 0x00000004 ++#define AQ_EMAC_READ 0x00000010 ++#define AQ_EMAC_ENABLE_INT_RX 0x00000020 ++#define AQ_EMAC_ENABLE_INT_TX 0x00000040 ++ ++/* Status bits */ ++#define AQ_EMAC_TX_BUSY 0x00000004 ++#define AQ_EMAC_COMPLETE 0x00000100 ++#define AQ_EMAC_CRC 0x00000200 ++ ++#define AQ_EMAC_TX_LEN 0xABCE0004 ++#define AQ_EMAC_MACL 0xABCE0008 ++#define AQ_EMAC_MACH 0xABCE000C ++#define AQ_EMAC_RX_BUF 0xABCE1000 ++#define AQ_EMAC_TX_BUF 0xABCE1800 ++ ++#define Emac_Rbuf 0x1000 ++#define Emac_Xbuf 0x1800 ++#define Emac_Ctrl 0x0000 ++#define Emac_xlen 0x0004 ++#define Emac_MACL 0x0008 ++#define Emac_MACH 0x000c ++#define ECtrl_RecvEnable 0x2 /* Receive enable */ ++#define ECtrl_Xmit 0x4 /* Read: Transmit busy(1); Write: Start transmit(1) */ ++#define ECtrl_MACReset 0x8 /* Reset MAC address */ ++#define ECtrl_Read 0x10 /* complete read from Receive FIFO */ ++#define ECtrl_RIntEnable 0x20 /* Receive interrupt enable(1) */ ++#define ECtrl_XIntEnable 0x40 /* Transmit interrupt enable(1) */ ++#define ECtrl_PROM 0x80 /* Promiscuous Mode enable(1)/disable(0) */ ++#define ECtrl_Complete 0x100 /* Receive packet waiting in FIFO */ ++#define ECtrl_CRC 0x200 /* Receive packet has CRC error */ ++#define ECtrl_getrxlen(x) ((x) >> 16) /* Length of received package, when ECtrl_Complete is set */ ++ ++#define Spi_Ctrl 0x0 ++#define Spi_Data 0x4 ++#define SpiCtrl_ACS 0x01 /* chipselect for applcation data */ ++#define SpiCtrl_CCS 0x04 /* chipselect for FPGA configure */ ++#define SpiCtrl_DCS 0x10 /* chipselect for D2A or extra SPI device */ ++#define SpiCtrl_setDiv(x) ((x) << 27) /* Div contrl SPI_CK = 12.5/(div + 1), Min: 400KHz for now*/ ++#define SpiCtrl_Xmit 0x02 ++#define SpiCtrl_Busy 0x02 ++#define SpiCtrl_Loop 0x08 /* When it assert, mosi will connect to miso */ ++/* by default SPI run at 12.5 MHz,maxium speed for Spartan 3E, for SPI Flash ++ * We need a DDS delay for different devices ++ */ ++ ++#define SHJ_PIT_PMR 0xABCD0210 ++#define SHJ_PIT_PCNTR 0xABCD0214 ++#define SHJ_NSEC_PER_CLOCK 0xABCD0218 ++ ++#endif +diff -Nur linux-4.1.13.orig/arch/sh/include/asm/processor.h linux-4.1.13/arch/sh/include/asm/processor.h +--- linux-4.1.13.orig/arch/sh/include/asm/processor.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/include/asm/processor.h 2015-12-05 00:16:49.000000000 +0100 +@@ -15,7 +15,7 @@ + */ + enum cpu_type { + /* SH-2 types */ +- CPU_SH7619, ++ CPU_SH7619, CPU_0PF, + + /* SH-2A types */ + CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_SH7264, CPU_SH7269, +diff -Nur linux-4.1.13.orig/arch/sh/include/cpu-sh2/cpu/cache.h linux-4.1.13/arch/sh/include/cpu-sh2/cpu/cache.h +--- linux-4.1.13.orig/arch/sh/include/cpu-sh2/cpu/cache.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/include/cpu-sh2/cpu/cache.h 2015-12-05 00:16:49.000000000 +0100 +@@ -38,6 +38,10 @@ + #define CCR_CACHE_INVALIDATE CCR_CACHE_CF + #define CACHE_PHYSADDR_MASK 0x1ffffc00 + ++#elif defined(CONFIG_CPU_SUBTYPE_0PF) ++#define CCR 0xabcd00c0 ++#define CCR_CACHE_ENABLE 0x80000000 ++#define CCR_CACHE_RESET 0x101 + #endif + + #endif /* __ASM_CPU_SH2_CACHE_H */ +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/init.c linux-4.1.13/arch/sh/kernel/cpu/init.c +--- linux-4.1.13.orig/arch/sh/kernel/cpu/init.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/init.c 2015-12-05 00:16:49.000000000 +0100 +@@ -106,7 +106,7 @@ + /* + * Generic first-level cache init + */ +-#ifdef CONFIG_SUPERH32 ++#if defined(CONFIG_SUPERH32) && !defined(CONFIG_CPU_SUBTYPE_0PF) + static void cache_init(void) + { + unsigned long ccr, flags; +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/proc.c linux-4.1.13/arch/sh/kernel/cpu/proc.c +--- linux-4.1.13.orig/arch/sh/kernel/cpu/proc.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/proc.c 2015-12-05 00:16:49.000000000 +0100 +@@ -26,6 +26,7 @@ + [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", + [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", + [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", ++ [CPU_0PF] = "SH2J-0PF", + [CPU_SH7372] = "SH7372", [CPU_SH7734] = "SH7734", + [CPU_SH_NONE] = "Unknown" + }; +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/Makefile linux-4.1.13/arch/sh/kernel/cpu/sh2/Makefile +--- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/sh2/Makefile 2015-12-05 00:16:49.000000000 +0100 +@@ -5,3 +5,4 @@ + obj-y := ex.o probe.o entry.o + + obj-$(CONFIG_CPU_SUBTYPE_SH7619) += setup-sh7619.o clock-sh7619.o ++obj-$(CONFIG_CPU_SUBTYPE_0PF) += setup-0pf.o clock-0pf.o +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/clock-0pf.c linux-4.1.13/arch/sh/kernel/cpu/sh2/clock-0pf.c +--- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/clock-0pf.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/sh2/clock-0pf.c 2015-12-05 00:16:48.000000000 +0100 +@@ -0,0 +1,80 @@ ++/* ++ * arch/sh/kernel/cpu/sh2/clock-0pf.c ++ * ++ * 0PF FPGA support for the clock framework ++ * ++ * Copyright (C) 2012 SEI, Inc. ++ * ++ * Based on clock-sh4.c ++ * Copyright (C) 2005 Paul Mundt ++ * Copyright (C) 2009 D. Jeff Dionne ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++static void master_clk_init(struct clk *clk) ++{ ++ clk->rate = CONFIG_SH_PCLK_FREQ; /* Fixed Rate */ ++} ++ ++static struct sh_clk_ops shj_master_clk_ops = { ++ .init = master_clk_init, ++}; ++ ++static unsigned long module_clk_recalc(struct clk *clk) ++{ ++ return clk->parent->rate; ++} ++ ++static struct sh_clk_ops shj_module_clk_ops = { ++ .recalc = module_clk_recalc, ++}; ++ ++static unsigned long bus_clk_recalc(struct clk *clk) ++{ ++ return clk->parent->rate; ++} ++ ++static struct sh_clk_ops shj_bus_clk_ops = { ++ .recalc = bus_clk_recalc, ++}; ++ ++static struct sh_clk_ops shj_cpu_clk_ops = { ++ .recalc = followparent_recalc, ++}; ++ ++static struct sh_clk_ops *shj_clk_ops[] = { ++ &shj_master_clk_ops, ++ &shj_module_clk_ops, ++ &shj_bus_clk_ops, ++ &shj_cpu_clk_ops, ++}; ++ ++void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) ++{ ++ if (idx < ARRAY_SIZE(shj_clk_ops)) ++ *ops = shj_clk_ops[idx]; ++} ++ ++int __init arch_clk_init() ++{ ++ int ret; ++ ++ printk("%s(): 0PF Clock init...\n", __func__); ++ ++ ret = cpg_clk_init(); /* appease Over-engineered "clock infrastructure" */ ++ ++ return ret; ++} +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/entry.S linux-4.1.13/arch/sh/kernel/cpu/sh2/entry.S +--- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/entry.S 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/sh2/entry.S 2015-12-05 00:16:49.000000000 +0100 +@@ -3,6 +3,7 @@ + * + * The SH-2 exception entry + * ++ * Copyright (C) 2012 SEI,Inc. + * Copyright (C) 2005-2008 Yoshinori Sato + * Copyright (C) 2005 AXE,Inc. + * +@@ -147,7 +148,11 @@ + mov #32,r8 + cmp/hs r8,r9 + bt trap_entry ! 64 > vec >= 32 is trap +- ++#if defined(CONFIG_CPU_SUBTYPE_0PF) ++ mov #16,r8 ++ cmp/hs r8,r9 ++ bt interrupt_entry ! 32 > vec >= 16 is interrupt ++#endif + mov.l 4f,r8 + mov r9,r4 + shll2 r9 +@@ -245,6 +250,19 @@ + .align 2 + 1: .long do_address_error + ++#if defined(CONFIG_CPU_SUBTYPE_0PF) ++ENTRY(pc_address_error_trap_handler) ++ mov r15,r4 ! regs ++ mov #OFF_PC,r0 ++ mov.l @(r0,r15),r6 ! pc ++ mov.l 1f,r0 ++ jmp @r0 ++ mov #0,r5 ! writeaccess is unknown ++ ++ .align 2 ++1: .long do_pc_address_error ++#endif // CONFIG_CPU_SUBTYPE_0PF ++ + restore_all: + stc sr,r0 + or #0xf0,r0 +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/probe.c linux-4.1.13/arch/sh/kernel/cpu/sh2/probe.c +--- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/probe.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/sh2/probe.c 2015-12-05 00:16:49.000000000 +0100 +@@ -24,6 +24,12 @@ + boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; + boot_cpu_data.dcache.flags = 0; + #endif ++ ++#if defined(CONFIG_CPU_SUBTYPE_0PF) ++ boot_cpu_data.type = CPU_0PF; ++ boot_cpu_data.dcache.flags = 0; ++#endif ++ + /* + * SH-2 doesn't have separate caches + */ +diff -Nur linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/setup-0pf.c linux-4.1.13/arch/sh/kernel/cpu/sh2/setup-0pf.c +--- linux-4.1.13.orig/arch/sh/kernel/cpu/sh2/setup-0pf.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/cpu/sh2/setup-0pf.c 2015-12-05 00:16:48.000000000 +0100 +@@ -0,0 +1,82 @@ ++/* ++ * 0PF-FPGA Setup ++ * ++ * Copyright (C) 2006 Yoshinori Sato ++ * Copyright (C) 2009 Paul Mundt ++ * Copyright (C) 2009 D. Jeff Dionne ++ * Copyright (C) 2012 SEI, Inc. ++ * by Oleksandr Zhadan ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined(CONFIG_SERIAL_UARTLITE_0PF) ++static struct resource shj_uartlite_resources[] = { ++ [0] = DEFINE_RES_MEM(0xABCD0100, 16), ++ [1] = DEFINE_RES_IRQ(0x12), ++ ++ [2] = DEFINE_RES_MEM(0xABCD0300, 16), ++ [3] = DEFINE_RES_IRQ(0x17), ++ ++ [4] = DEFINE_RES_MEM(0xABCD0400, 16), ++ [5] = DEFINE_RES_IRQ(0x13), ++}; ++ ++static struct platform_device shj_uartlite_device[] = { ++ [0] = { .name = "uartlite", .id = 0 }, ++ [1] = { .name = "uartlite", .id = 1 }, ++ [2] = { .name = "uartlite", .id = 2 }, ++}; ++#endif ++ ++/***************************************************************************** ++ * 0PF FPGA platform devices ++ ****************************************************************************/ ++static struct platform_device *shj_devices[] __initdata = { ++#if defined(CONFIG_SERIAL_UARTLITE_0PF) ++ shj_uartlite_device, ++ shj_uartlite_device + 1, ++ shj_uartlite_device + 2, ++#endif ++}; ++ ++static int __init shj_devices_setup(void) ++{ ++ int i; ++ pr_info("%s(): registering device resources\n", __func__); ++ ++#if defined(CONFIG_SERIAL_UARTLITE_0PF) ++ for (i = 0; i < ARRAY_SIZE(shj_uartlite_device); i++) { ++ printk("Register UARTLITE resources %d\n", i); ++ if (platform_device_add_resources( ++ shj_uartlite_device + i, ++ shj_uartlite_resources + 2 * i, ++ 2)) ++ pr_err("Failed to set uartlite %d IRQ and MEM\n", i); ++ ++ } ++#endif ++ platform_add_devices(shj_devices, ARRAY_SIZE(shj_devices)); ++ ++ return 0; ++} ++ ++arch_initcall(shj_devices_setup); ++ ++void __init native_machine_early_platform_add_devices(void) ++{ ++} ++ ++void __init plat_irq_setup(void) ++{ ++} +diff -Nur linux-4.1.13.orig/arch/sh/kernel/irq.c linux-4.1.13/arch/sh/kernel/irq.c +--- linux-4.1.13.orig/arch/sh/kernel/irq.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/irq.c 2015-12-05 00:16:49.000000000 +0100 +@@ -20,6 +20,8 @@ + #include + #include + ++#include ++ + atomic_t irq_err_count; + + /* +@@ -175,11 +177,24 @@ + ); + } + #else ++#define noinline __attribute__((noinline)) ++static noinline void handle_irq_UART0(unsigned int irq) { generic_handle_irq(irq); } ++static noinline void handle_irq_UART1(unsigned int irq) { generic_handle_irq(irq); } ++static noinline void handle_irq_GPS(unsigned int irq) { generic_handle_irq(irq); } ++static noinline void handle_irq_EMAC(unsigned int irq) { generic_handle_irq(irq); } + static inline void handle_one_irq(unsigned int irq) + { +- generic_handle_irq(irq); ++ switch(irq) { ++ case Irq_UART0: handle_irq_UART0(irq); break; ++ case Irq_UART1: handle_irq_UART1(irq); break; ++ case Irq_GPS: handle_irq_GPS(irq); break; ++ case Irq_EMAC: handle_irq_EMAC(irq); break; ++ default: ++ generic_handle_irq(irq); ++ break; ++ } + } +-#endif ++#endif // CONFIG_IRQSTACKS + + asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs) + { +diff -Nur linux-4.1.13.orig/arch/sh/kernel/traps_32.c linux-4.1.13/arch/sh/kernel/traps_32.c +--- linux-4.1.13.orig/arch/sh/kernel/traps_32.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/kernel/traps_32.c 2015-12-05 00:16:49.000000000 +0100 +@@ -34,6 +34,7 @@ + #ifdef CONFIG_CPU_SH2 + # define TRAP_RESERVED_INST 4 + # define TRAP_ILLEGAL_SLOT_INST 6 ++# define TRAP_PC_ADDRESS_ERROR 8 // Aug 20, 2012 ulianov - SEI extension - PC governor + # define TRAP_ADDRESS_ERROR 9 + # ifdef CONFIG_CPU_SH2A + # define TRAP_UBC 12 +@@ -458,6 +459,14 @@ + return ret; + } + ++#if defined(CONFIG_CPU_SUBTYPE_0PF) ++asmlinkage void do_pc_address_error(struct pt_regs *regs, ++ unsigned long writeaccess, ++ unsigned long address) ++{ ++} ++#endif // CONFIG_CPU_SUBTYPE_0PF ++ + /* + * Handle various address error exceptions: + * - instruction address error: +@@ -779,6 +788,9 @@ + #endif + + #ifdef CONFIG_CPU_SH2 ++ #if defined(CONFIG_CPU_SUBTYPE_0PF) ++ set_exception_table_vec(TRAP_PC_ADDRESS_ERROR, address_error_trap_handler); ++ #endif + set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler); + #endif + #ifdef CONFIG_CPU_SH2A +diff -Nur linux-4.1.13.orig/arch/sh/mm/cache-sh2.c linux-4.1.13/arch/sh/mm/cache-sh2.c +--- linux-4.1.13.orig/arch/sh/mm/cache-sh2.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/mm/cache-sh2.c 2015-12-05 00:16:49.000000000 +0100 +@@ -3,6 +3,7 @@ + * + * Copyright (C) 2002 Paul Mundt + * Copyright (C) 2008 Yoshinori Sato ++ * Copyright (C) 2012 SEI, Inc. + * + * Released under the terms of the GNU GPL v2.0. + */ +@@ -16,6 +17,30 @@ + #include + #include + ++#if defined(CONFIG_CPU_SUBTYPE_0PF) ++ ++// Just flush the whole thing each time ++static void j2_flush_icache_range(void *fwoosh) ++{ ++ __raw_writel(CCR_CACHE_RESET, CCR); ++} ++ ++// This should never happen, but... ++static void j2_flush_icache_page(void *fwoosh) ++{ ++ __raw_writel(CCR_CACHE_RESET, CCR); ++} ++ ++void __init sh2_cache_init(void) ++{ ++ local_flush_icache_range = j2_flush_icache_range; ++ local_flush_icache_page = j2_flush_icache_page; ++ boot_cpu_data.dcache.n_aliases = 0; ++ ++ __raw_writel(CCR_CACHE_RESET, CCR); ++} ++ ++#else + static void sh2__flush_wback_region(void *start, int size) + { + unsigned long v; +@@ -89,3 +114,4 @@ + __flush_purge_region = sh2__flush_purge_region; + __flush_invalidate_region = sh2__flush_invalidate_region; + } ++#endif +diff -Nur linux-4.1.13.orig/arch/sh/mm/cache.c linux-4.1.13/arch/sh/mm/cache.c +--- linux-4.1.13.orig/arch/sh/mm/cache.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/mm/cache.c 2015-12-05 00:16:49.000000000 +0100 +@@ -258,14 +258,16 @@ + boot_cpu_data.icache.entry_mask, + boot_cpu_data.icache.alias_mask, + boot_cpu_data.icache.n_aliases); +- printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n", +- boot_cpu_data.dcache.ways, +- boot_cpu_data.dcache.sets, +- boot_cpu_data.dcache.way_incr); +- printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", +- boot_cpu_data.dcache.entry_mask, +- boot_cpu_data.dcache.alias_mask, +- boot_cpu_data.dcache.n_aliases); ++ if (boot_cpu_data.dcache.n_aliases) { ++ printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n", ++ boot_cpu_data.dcache.ways, ++ boot_cpu_data.dcache.sets, ++ boot_cpu_data.dcache.way_incr); ++ printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", ++ boot_cpu_data.dcache.entry_mask, ++ boot_cpu_data.dcache.alias_mask, ++ boot_cpu_data.dcache.n_aliases); ++ } + + /* + * Emit Secondary Cache parameters if the CPU has a probed L2. +diff -Nur linux-4.1.13.orig/drivers/tty/serial/Kconfig linux-4.1.13/drivers/tty/serial/Kconfig +--- linux-4.1.13.orig/drivers/tty/serial/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/tty/serial/Kconfig 2015-12-05 00:16:49.000000000 +0100 +@@ -594,7 +594,7 @@ + + config SERIAL_UARTLITE + tristate "Xilinx uartlite serial port support" +- depends on PPC32 || MICROBLAZE || MFD_TIMBERDALE || ARCH_ZYNQ ++ depends on PPC32 || MICROBLAZE || MFD_TIMBERDALE || ARCH_ZYNQ || CPU_SUBTYPE_0PF + select SERIAL_CORE + help + Say Y here if you want to use the Xilinx uartlite serial controller. +@@ -611,6 +611,12 @@ + console (the system console is the device which receives all kernel + messages and warnings and which allows logins in single user mode). + ++config SERIAL_UARTLITE_0PF ++ tristate "Support 0PF UARTLITEs" ++ depends on SERIAL_UARTLITE = y && CPU_SUBTYPE_0PF ++ help ++ Say Y here to set up 0PF's UARTLITEs. ++ + config SERIAL_SUNCORE + bool + depends on SPARC diff --git a/target/linux/patches/4.1.35/mtd-rootfs.patch b/target/linux/patches/4.1.35/mtd-rootfs.patch new file mode 100644 index 000000000..5f6d82b5c --- /dev/null +++ b/target/linux/patches/4.1.35/mtd-rootfs.patch @@ -0,0 +1,26 @@ +diff -Nur linux-4.1.15.orig/drivers/mtd/mtdpart.c linux-4.1.15/drivers/mtd/mtdpart.c +--- linux-4.1.15.orig/drivers/mtd/mtdpart.c 2015-12-15 06:24:51.000000000 +0100 ++++ linux-4.1.15/drivers/mtd/mtdpart.c 2015-12-26 21:02:02.766905805 +0100 +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + #include + + #include "mtdcore.h" +@@ -667,6 +668,14 @@ + if (IS_ERR(slave)) + return PTR_ERR(slave); + ++ if (strcmp(parts[i].name, "rootfs") == 0) { ++ if (ROOT_DEV == 0) { ++ printk(KERN_NOTICE "mtd: partition \"rootfs\" " ++ "set to be root filesystem\n"); ++ ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i); ++ } ++ } ++ + mutex_lock(&mtd_partitions_mutex); + list_add(&slave->list, &mtd_partitions); + mutex_unlock(&mtd_partitions_mutex); diff --git a/target/linux/patches/4.1.35/patch-realtime b/target/linux/patches/4.1.35/patch-realtime new file mode 100644 index 000000000..6ecf019b9 --- /dev/null +++ b/target/linux/patches/4.1.35/patch-realtime @@ -0,0 +1,28362 @@ +diff -Nur linux-4.1.26.orig/arch/alpha/mm/fault.c linux-4.1.26/arch/alpha/mm/fault.c +--- linux-4.1.26.orig/arch/alpha/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/alpha/mm/fault.c 2016-06-19 15:30:54.915151887 +0200 +@@ -23,8 +23,7 @@ + #include + #include + #include +- +-#include ++#include + + extern void die_if_kernel(char *,struct pt_regs *,long, unsigned long *); + +@@ -107,7 +106,7 @@ + + /* If we're in an interrupt context, or have no user context, + we must not take the fault. */ +- if (!mm || in_atomic()) ++ if (!mm || faulthandler_disabled()) + goto no_context; + + #ifdef CONFIG_ALPHA_LARGE_VMALLOC +diff -Nur linux-4.1.26.orig/arch/arc/include/asm/futex.h linux-4.1.26/arch/arc/include/asm/futex.h +--- linux-4.1.26.orig/arch/arc/include/asm/futex.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arc/include/asm/futex.h 2016-06-19 15:30:54.915151887 +0200 +@@ -53,7 +53,7 @@ + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + +- pagefault_disable(); /* implies preempt_disable() */ ++ pagefault_disable(); + + switch (op) { + case FUTEX_OP_SET: +@@ -75,7 +75,7 @@ + ret = -ENOSYS; + } + +- pagefault_enable(); /* subsumes preempt_enable() */ ++ pagefault_enable(); + + if (!ret) { + switch (cmp) { +@@ -104,7 +104,7 @@ + return ret; + } + +-/* Compare-xchg with preemption disabled. ++/* Compare-xchg with pagefaults disabled. + * Notes: + * -Best-Effort: Exchg happens only if compare succeeds. + * If compare fails, returns; leaving retry/looping to upper layers +@@ -121,7 +121,7 @@ + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + +- pagefault_disable(); /* implies preempt_disable() */ ++ pagefault_disable(); + + /* TBD : can use llock/scond */ + __asm__ __volatile__( +@@ -142,7 +142,7 @@ + : "r"(oldval), "r"(newval), "r"(uaddr), "ir"(-EFAULT) + : "cc", "memory"); + +- pagefault_enable(); /* subsumes preempt_enable() */ ++ pagefault_enable(); + + *uval = val; + return val; +diff -Nur linux-4.1.26.orig/arch/arc/mm/fault.c linux-4.1.26/arch/arc/mm/fault.c +--- linux-4.1.26.orig/arch/arc/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arc/mm/fault.c 2016-06-19 15:30:54.915151887 +0200 +@@ -86,7 +86,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/arm/include/asm/cmpxchg.h linux-4.1.26/arch/arm/include/asm/cmpxchg.h +--- linux-4.1.26.orig/arch/arm/include/asm/cmpxchg.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/include/asm/cmpxchg.h 2016-06-19 15:30:54.919152041 +0200 +@@ -129,6 +129,8 @@ + + #else /* min ARCH >= ARMv6 */ + ++#define __HAVE_ARCH_CMPXCHG 1 ++ + extern void __bad_cmpxchg(volatile void *ptr, int size); + + /* +diff -Nur linux-4.1.26.orig/arch/arm/include/asm/futex.h linux-4.1.26/arch/arm/include/asm/futex.h +--- linux-4.1.26.orig/arch/arm/include/asm/futex.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/include/asm/futex.h 2016-06-19 15:30:54.919152041 +0200 +@@ -93,6 +93,7 @@ + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) + return -EFAULT; + ++ preempt_disable(); + __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" + "1: " TUSER(ldr) " %1, [%4]\n" + " teq %1, %2\n" +@@ -104,6 +105,8 @@ + : "cc", "memory"); + + *uval = val; ++ preempt_enable(); ++ + return ret; + } + +@@ -124,7 +127,10 @@ + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) + return -EFAULT; + +- pagefault_disable(); /* implies preempt_disable() */ ++#ifndef CONFIG_SMP ++ preempt_disable(); ++#endif ++ pagefault_disable(); + + switch (op) { + case FUTEX_OP_SET: +@@ -146,7 +152,10 @@ + ret = -ENOSYS; + } + +- pagefault_enable(); /* subsumes preempt_enable() */ ++ pagefault_enable(); ++#ifndef CONFIG_SMP ++ preempt_enable(); ++#endif + + if (!ret) { + switch (cmp) { +diff -Nur linux-4.1.26.orig/arch/arm/include/asm/switch_to.h linux-4.1.26/arch/arm/include/asm/switch_to.h +--- linux-4.1.26.orig/arch/arm/include/asm/switch_to.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/include/asm/switch_to.h 2016-06-19 15:30:54.919152041 +0200 +@@ -3,6 +3,13 @@ + + #include + ++#if defined CONFIG_PREEMPT_RT_FULL && defined CONFIG_HIGHMEM ++void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p); ++#else ++static inline void ++switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) { } ++#endif ++ + /* + * For v7 SMP cores running a preemptible kernel we may be pre-empted + * during a TLB maintenance operation, so execute an inner-shareable dsb +@@ -22,6 +29,7 @@ + + #define switch_to(prev,next,last) \ + do { \ ++ switch_kmaps(prev, next); \ + last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ + } while (0) + +diff -Nur linux-4.1.26.orig/arch/arm/include/asm/thread_info.h linux-4.1.26/arch/arm/include/asm/thread_info.h +--- linux-4.1.26.orig/arch/arm/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/include/asm/thread_info.h 2016-06-19 15:30:54.919152041 +0200 +@@ -50,6 +50,7 @@ + struct thread_info { + unsigned long flags; /* low level flags */ + int preempt_count; /* 0 => preemptable, <0 => bug */ ++ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ + mm_segment_t addr_limit; /* address limit */ + struct task_struct *task; /* main task structure */ + __u32 cpu; /* cpu */ +@@ -147,6 +148,7 @@ + #define TIF_SIGPENDING 0 + #define TIF_NEED_RESCHED 1 + #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ ++#define TIF_NEED_RESCHED_LAZY 3 + #define TIF_UPROBE 7 + #define TIF_SYSCALL_TRACE 8 + #define TIF_SYSCALL_AUDIT 9 +@@ -160,6 +162,7 @@ + #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) + #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) + #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_UPROBE (1 << TIF_UPROBE) + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) + #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) +diff -Nur linux-4.1.26.orig/arch/arm/Kconfig linux-4.1.26/arch/arm/Kconfig +--- linux-4.1.26.orig/arch/arm/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/Kconfig 2016-06-19 15:30:54.919152041 +0200 +@@ -31,7 +31,7 @@ + select HARDIRQS_SW_RESEND + select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6 +- select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL ++ select HAVE_ARCH_JUMP_LABEL if (!XIP_KERNEL && !PREEMPT_RT_BASE) + select HAVE_ARCH_KGDB + select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_TRACEHOOK +@@ -66,6 +66,7 @@ + select HAVE_PERF_EVENTS + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP ++ select HAVE_PREEMPT_LAZY + select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE) + select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_SYSCALL_TRACEPOINTS +diff -Nur linux-4.1.26.orig/arch/arm/kernel/asm-offsets.c linux-4.1.26/arch/arm/kernel/asm-offsets.c +--- linux-4.1.26.orig/arch/arm/kernel/asm-offsets.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kernel/asm-offsets.c 2016-06-19 15:30:54.919152041 +0200 +@@ -65,6 +65,7 @@ + BLANK(); + DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); + DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); ++ DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); + DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); + DEFINE(TI_TASK, offsetof(struct thread_info, task)); + DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); +diff -Nur linux-4.1.26.orig/arch/arm/kernel/entry-armv.S linux-4.1.26/arch/arm/kernel/entry-armv.S +--- linux-4.1.26.orig/arch/arm/kernel/entry-armv.S 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kernel/entry-armv.S 2016-06-19 15:30:54.919152041 +0200 +@@ -208,11 +208,18 @@ + #ifdef CONFIG_PREEMPT + get_thread_info tsk + ldr r8, [tsk, #TI_PREEMPT] @ get preempt count +- ldr r0, [tsk, #TI_FLAGS] @ get flags + teq r8, #0 @ if preempt count != 0 ++ bne 1f @ return from exeption ++ ldr r0, [tsk, #TI_FLAGS] @ get flags ++ tst r0, #_TIF_NEED_RESCHED @ if NEED_RESCHED is set ++ blne svc_preempt @ preempt! ++ ++ ldr r8, [tsk, #TI_PREEMPT_LAZY] @ get preempt lazy count ++ teq r8, #0 @ if preempt lazy count != 0 + movne r0, #0 @ force flags to 0 +- tst r0, #_TIF_NEED_RESCHED ++ tst r0, #_TIF_NEED_RESCHED_LAZY + blne svc_preempt ++1: + #endif + + svc_exit r5, irq = 1 @ return from exception +@@ -227,6 +234,8 @@ + 1: bl preempt_schedule_irq @ irq en/disable is done inside + ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS + tst r0, #_TIF_NEED_RESCHED ++ bne 1b ++ tst r0, #_TIF_NEED_RESCHED_LAZY + reteq r8 @ go again + b 1b + #endif +diff -Nur linux-4.1.26.orig/arch/arm/kernel/process.c linux-4.1.26/arch/arm/kernel/process.c +--- linux-4.1.26.orig/arch/arm/kernel/process.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kernel/process.c 2016-06-19 15:30:54.919152041 +0200 +@@ -290,6 +290,30 @@ + } + + #ifdef CONFIG_MMU ++/* ++ * CONFIG_SPLIT_PTLOCK_CPUS results in a page->ptl lock. If the lock is not ++ * initialized by pgtable_page_ctor() then a coredump of the vector page will ++ * fail. ++ */ ++static int __init vectors_user_mapping_init_page(void) ++{ ++ struct page *page; ++ unsigned long addr = 0xffff0000; ++ pgd_t *pgd; ++ pud_t *pud; ++ pmd_t *pmd; ++ ++ pgd = pgd_offset_k(addr); ++ pud = pud_offset(pgd, addr); ++ pmd = pmd_offset(pud, addr); ++ page = pmd_page(*(pmd)); ++ ++ pgtable_page_ctor(page); ++ ++ return 0; ++} ++late_initcall(vectors_user_mapping_init_page); ++ + #ifdef CONFIG_KUSER_HELPERS + /* + * The vectors page is always readable from user space for the +diff -Nur linux-4.1.26.orig/arch/arm/kernel/signal.c linux-4.1.26/arch/arm/kernel/signal.c +--- linux-4.1.26.orig/arch/arm/kernel/signal.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kernel/signal.c 2016-06-19 15:30:54.919152041 +0200 +@@ -568,7 +568,8 @@ + do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) + { + do { +- if (likely(thread_flags & _TIF_NEED_RESCHED)) { ++ if (likely(thread_flags & (_TIF_NEED_RESCHED | ++ _TIF_NEED_RESCHED_LAZY))) { + schedule(); + } else { + if (unlikely(!user_mode(regs))) +diff -Nur linux-4.1.26.orig/arch/arm/kernel/smp.c linux-4.1.26/arch/arm/kernel/smp.c +--- linux-4.1.26.orig/arch/arm/kernel/smp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kernel/smp.c 2016-06-19 15:30:54.919152041 +0200 +@@ -213,8 +213,6 @@ + flush_cache_louis(); + local_flush_tlb_all(); + +- clear_tasks_mm_cpumask(cpu); +- + return 0; + } + +@@ -230,6 +228,9 @@ + pr_err("CPU%u: cpu didn't die\n", cpu); + return; + } ++ ++ clear_tasks_mm_cpumask(cpu); ++ + pr_notice("CPU%u: shutdown\n", cpu); + + /* +diff -Nur linux-4.1.26.orig/arch/arm/kernel/unwind.c linux-4.1.26/arch/arm/kernel/unwind.c +--- linux-4.1.26.orig/arch/arm/kernel/unwind.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kernel/unwind.c 2016-06-19 15:30:54.919152041 +0200 +@@ -93,7 +93,7 @@ + static const struct unwind_idx *__origin_unwind_idx; + extern const struct unwind_idx __stop_unwind_idx[]; + +-static DEFINE_SPINLOCK(unwind_lock); ++static DEFINE_RAW_SPINLOCK(unwind_lock); + static LIST_HEAD(unwind_tables); + + /* Convert a prel31 symbol to an absolute address */ +@@ -201,7 +201,7 @@ + /* module unwind tables */ + struct unwind_table *table; + +- spin_lock_irqsave(&unwind_lock, flags); ++ raw_spin_lock_irqsave(&unwind_lock, flags); + list_for_each_entry(table, &unwind_tables, list) { + if (addr >= table->begin_addr && + addr < table->end_addr) { +@@ -213,7 +213,7 @@ + break; + } + } +- spin_unlock_irqrestore(&unwind_lock, flags); ++ raw_spin_unlock_irqrestore(&unwind_lock, flags); + } + + pr_debug("%s: idx = %p\n", __func__, idx); +@@ -529,9 +529,9 @@ + tab->begin_addr = text_addr; + tab->end_addr = text_addr + text_size; + +- spin_lock_irqsave(&unwind_lock, flags); ++ raw_spin_lock_irqsave(&unwind_lock, flags); + list_add_tail(&tab->list, &unwind_tables); +- spin_unlock_irqrestore(&unwind_lock, flags); ++ raw_spin_unlock_irqrestore(&unwind_lock, flags); + + return tab; + } +@@ -543,9 +543,9 @@ + if (!tab) + return; + +- spin_lock_irqsave(&unwind_lock, flags); ++ raw_spin_lock_irqsave(&unwind_lock, flags); + list_del(&tab->list); +- spin_unlock_irqrestore(&unwind_lock, flags); ++ raw_spin_unlock_irqrestore(&unwind_lock, flags); + + kfree(tab); + } +diff -Nur linux-4.1.26.orig/arch/arm/kvm/arm.c linux-4.1.26/arch/arm/kvm/arm.c +--- linux-4.1.26.orig/arch/arm/kvm/arm.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kvm/arm.c 2016-06-19 15:30:54.919152041 +0200 +@@ -474,9 +474,9 @@ + + static void vcpu_pause(struct kvm_vcpu *vcpu) + { +- wait_queue_head_t *wq = kvm_arch_vcpu_wq(vcpu); ++ struct swait_head *wq = kvm_arch_vcpu_wq(vcpu); + +- wait_event_interruptible(*wq, !vcpu->arch.pause); ++ swait_event_interruptible(*wq, !vcpu->arch.pause); + } + + static int kvm_vcpu_initialized(struct kvm_vcpu *vcpu) +diff -Nur linux-4.1.26.orig/arch/arm/kvm/psci.c linux-4.1.26/arch/arm/kvm/psci.c +--- linux-4.1.26.orig/arch/arm/kvm/psci.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/kvm/psci.c 2016-06-19 15:30:54.919152041 +0200 +@@ -68,7 +68,7 @@ + { + struct kvm *kvm = source_vcpu->kvm; + struct kvm_vcpu *vcpu = NULL; +- wait_queue_head_t *wq; ++ struct swait_head *wq; + unsigned long cpu_id; + unsigned long context_id; + phys_addr_t target_pc; +@@ -117,7 +117,7 @@ + smp_mb(); /* Make sure the above is visible */ + + wq = kvm_arch_vcpu_wq(vcpu); +- wake_up_interruptible(wq); ++ swait_wake_interruptible(wq); + + return PSCI_RET_SUCCESS; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-exynos/platsmp.c linux-4.1.26/arch/arm/mach-exynos/platsmp.c +--- linux-4.1.26.orig/arch/arm/mach-exynos/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-exynos/platsmp.c 2016-06-19 15:30:54.919152041 +0200 +@@ -231,7 +231,7 @@ + return (void __iomem *)(S5P_VA_SCU); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void exynos_secondary_init(unsigned int cpu) + { +@@ -244,8 +244,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -259,7 +259,7 @@ + * Set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -286,7 +286,7 @@ + + if (timeout == 0) { + printk(KERN_ERR "cpu1 power enable failed"); +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + return -ETIMEDOUT; + } + } +@@ -342,7 +342,7 @@ + * calibrations, then wait for it to finish + */ + fail: +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? ret : 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-hisi/platmcpm.c linux-4.1.26/arch/arm/mach-hisi/platmcpm.c +--- linux-4.1.26.orig/arch/arm/mach-hisi/platmcpm.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-hisi/platmcpm.c 2016-06-19 15:30:54.923152195 +0200 +@@ -57,7 +57,7 @@ + + static void __iomem *sysctrl, *fabric; + static int hip04_cpu_table[HIP04_MAX_CLUSTERS][HIP04_MAX_CPUS_PER_CLUSTER]; +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + static u32 fabric_phys_addr; + /* + * [0]: bootwrapper physical address +@@ -104,7 +104,7 @@ + if (cluster >= HIP04_MAX_CLUSTERS || cpu >= HIP04_MAX_CPUS_PER_CLUSTER) + return -EINVAL; + +- spin_lock_irq(&boot_lock); ++ raw_spin_lock_irq(&boot_lock); + + if (hip04_cpu_table[cluster][cpu]) + goto out; +@@ -133,7 +133,7 @@ + udelay(20); + out: + hip04_cpu_table[cluster][cpu]++; +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + + return 0; + } +@@ -149,7 +149,7 @@ + + __mcpm_cpu_going_down(cpu, cluster); + +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + BUG_ON(__mcpm_cluster_state(cluster) != CLUSTER_UP); + hip04_cpu_table[cluster][cpu]--; + if (hip04_cpu_table[cluster][cpu] == 1) { +@@ -162,7 +162,7 @@ + + last_man = hip04_cluster_is_down(cluster); + if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) { +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + /* Since it's Cortex A15, disable L2 prefetching. */ + asm volatile( + "mcr p15, 1, %0, c15, c0, 3 \n\t" +@@ -173,7 +173,7 @@ + hip04_set_snoop_filter(cluster, 0); + __mcpm_outbound_leave_critical(cluster, CLUSTER_DOWN); + } else { +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + v7_exit_coherency_flush(louis); + } + +@@ -192,7 +192,7 @@ + cpu >= HIP04_MAX_CPUS_PER_CLUSTER); + + count = TIMEOUT_MSEC / POLL_MSEC; +- spin_lock_irq(&boot_lock); ++ raw_spin_lock_irq(&boot_lock); + for (tries = 0; tries < count; tries++) { + if (hip04_cpu_table[cluster][cpu]) { + ret = -EBUSY; +@@ -202,10 +202,10 @@ + data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster)); + if (data & CORE_WFI_STATUS(cpu)) + break; +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + /* Wait for clean L2 when the whole cluster is down. */ + msleep(POLL_MSEC); +- spin_lock_irq(&boot_lock); ++ raw_spin_lock_irq(&boot_lock); + } + if (tries >= count) + goto err; +@@ -220,10 +220,10 @@ + } + if (tries >= count) + goto err; +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + return 0; + err: +- spin_unlock_irq(&boot_lock); ++ raw_spin_unlock_irq(&boot_lock); + return ret; + } + +@@ -235,10 +235,10 @@ + cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); + +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + if (!hip04_cpu_table[cluster][cpu]) + hip04_cpu_table[cluster][cpu] = 1; +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static void __naked hip04_mcpm_power_up_setup(unsigned int affinity_level) +diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/gpio.c linux-4.1.26/arch/arm/mach-omap2/gpio.c +--- linux-4.1.26.orig/arch/arm/mach-omap2/gpio.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-omap2/gpio.c 2016-06-19 15:30:54.923152195 +0200 +@@ -130,7 +130,6 @@ + } + + pwrdm = omap_hwmod_get_pwrdm(oh); +- pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); + + pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata)); + kfree(pdata); +diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/omap-smp.c linux-4.1.26/arch/arm/mach-omap2/omap-smp.c +--- linux-4.1.26.orig/arch/arm/mach-omap2/omap-smp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-omap2/omap-smp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -43,7 +43,7 @@ + /* SCU base address */ + static void __iomem *scu_base; + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + void __iomem *omap4_get_scu_base(void) + { +@@ -74,8 +74,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -89,7 +89,7 @@ + * Set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * Update the AuxCoreBoot0 with boot state for secondary core. +@@ -166,7 +166,7 @@ + * Now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.c linux-4.1.26/arch/arm/mach-omap2/powerdomain.c +--- linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-omap2/powerdomain.c 2016-06-19 15:30:54.923152195 +0200 +@@ -1166,43 +1166,3 @@ + return count; + } + +-/** +- * pwrdm_can_ever_lose_context - can this powerdomain ever lose context? +- * @pwrdm: struct powerdomain * +- * +- * Given a struct powerdomain * @pwrdm, returns 1 if the powerdomain +- * can lose either memory or logic context or if @pwrdm is invalid, or +- * returns 0 otherwise. This function is not concerned with how the +- * powerdomain registers are programmed (i.e., to go off or not); it's +- * concerned with whether it's ever possible for this powerdomain to +- * go off while some other part of the chip is active. This function +- * assumes that every powerdomain can go to either ON or INACTIVE. +- */ +-bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm) +-{ +- int i; +- +- if (!pwrdm) { +- pr_debug("powerdomain: %s: invalid powerdomain pointer\n", +- __func__); +- return 1; +- } +- +- if (pwrdm->pwrsts & PWRSTS_OFF) +- return 1; +- +- if (pwrdm->pwrsts & PWRSTS_RET) { +- if (pwrdm->pwrsts_logic_ret & PWRSTS_OFF) +- return 1; +- +- for (i = 0; i < pwrdm->banks; i++) +- if (pwrdm->pwrsts_mem_ret[i] & PWRSTS_OFF) +- return 1; +- } +- +- for (i = 0; i < pwrdm->banks; i++) +- if (pwrdm->pwrsts_mem_on[i] & PWRSTS_OFF) +- return 1; +- +- return 0; +-} +diff -Nur linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.h linux-4.1.26/arch/arm/mach-omap2/powerdomain.h +--- linux-4.1.26.orig/arch/arm/mach-omap2/powerdomain.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-omap2/powerdomain.h 2016-06-19 15:30:54.923152195 +0200 +@@ -244,7 +244,6 @@ + int pwrdm_pre_transition(struct powerdomain *pwrdm); + int pwrdm_post_transition(struct powerdomain *pwrdm); + int pwrdm_get_context_loss_count(struct powerdomain *pwrdm); +-bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); + + extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 state); + +diff -Nur linux-4.1.26.orig/arch/arm/mach-prima2/platsmp.c linux-4.1.26/arch/arm/mach-prima2/platsmp.c +--- linux-4.1.26.orig/arch/arm/mach-prima2/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-prima2/platsmp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -22,7 +22,7 @@ + + static void __iomem *clk_base; + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void sirfsoc_secondary_init(unsigned int cpu) + { +@@ -36,8 +36,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static const struct of_device_id clk_ids[] = { +@@ -75,7 +75,7 @@ + /* make sure write buffer is drained */ + mb(); + +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -107,7 +107,7 @@ + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-qcom/platsmp.c linux-4.1.26/arch/arm/mach-qcom/platsmp.c +--- linux-4.1.26.orig/arch/arm/mach-qcom/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-qcom/platsmp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -46,7 +46,7 @@ + + extern void secondary_startup_arm(void); + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + #ifdef CONFIG_HOTPLUG_CPU + static void __ref qcom_cpu_die(unsigned int cpu) +@@ -60,8 +60,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int scss_release_secondary(unsigned int cpu) +@@ -284,7 +284,7 @@ + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * Send the secondary CPU a soft interrupt, thereby causing +@@ -297,7 +297,7 @@ + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return ret; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-spear/platsmp.c linux-4.1.26/arch/arm/mach-spear/platsmp.c +--- linux-4.1.26.orig/arch/arm/mach-spear/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-spear/platsmp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -32,7 +32,7 @@ + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void __iomem *scu_base = IOMEM(VA_SCU_BASE); + +@@ -47,8 +47,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -59,7 +59,7 @@ + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -84,7 +84,7 @@ + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-sti/platsmp.c linux-4.1.26/arch/arm/mach-sti/platsmp.c +--- linux-4.1.26.orig/arch/arm/mach-sti/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-sti/platsmp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -34,7 +34,7 @@ + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void sti_secondary_init(unsigned int cpu) + { +@@ -49,8 +49,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int sti_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -61,7 +61,7 @@ + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -92,7 +92,7 @@ + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mach-ux500/platsmp.c linux-4.1.26/arch/arm/mach-ux500/platsmp.c +--- linux-4.1.26.orig/arch/arm/mach-ux500/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mach-ux500/platsmp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -51,7 +51,7 @@ + return NULL; + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + static void ux500_secondary_init(unsigned int cpu) + { +@@ -64,8 +64,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -76,7 +76,7 @@ + * set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from +@@ -97,7 +97,7 @@ + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mm/fault.c linux-4.1.26/arch/arm/mm/fault.c +--- linux-4.1.26.orig/arch/arm/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mm/fault.c 2016-06-19 15:30:54.923152195 +0200 +@@ -276,7 +276,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +@@ -430,6 +430,9 @@ + if (addr < TASK_SIZE) + return do_page_fault(addr, fsr, regs); + ++ if (interrupts_enabled(regs)) ++ local_irq_enable(); ++ + if (user_mode(regs)) + goto bad_area; + +@@ -497,6 +500,9 @@ + static int + do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) + { ++ if (interrupts_enabled(regs)) ++ local_irq_enable(); ++ + do_bad_area(addr, fsr, regs); + return 0; + } +diff -Nur linux-4.1.26.orig/arch/arm/mm/highmem.c linux-4.1.26/arch/arm/mm/highmem.c +--- linux-4.1.26.orig/arch/arm/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/mm/highmem.c 2016-06-19 15:30:54.923152195 +0200 +@@ -54,11 +54,13 @@ + + void *kmap_atomic(struct page *page) + { ++ pte_t pte = mk_pte(page, kmap_prot); + unsigned int idx; + unsigned long vaddr; + void *kmap; + int type; + ++ preempt_disable_nort(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -92,7 +94,10 @@ + * in place, so the contained TLB flush ensures the TLB is updated + * with the new mapping. + */ +- set_fixmap_pte(idx, mk_pte(page, kmap_prot)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_fixmap_pte(idx, pte); + + return (void *)vaddr; + } +@@ -109,27 +114,33 @@ + + if (cache_is_vivt()) + __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = __pte(0); ++#endif + #ifdef CONFIG_DEBUG_HIGHMEM + BUG_ON(vaddr != __fix_to_virt(idx)); +- set_fixmap_pte(idx, __pte(0)); + #else + (void) idx; /* to kill a warning */ + #endif ++ set_fixmap_pte(idx, __pte(0)); + kmap_atomic_idx_pop(); + } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { + /* this address was obtained through kmap_high_get() */ + kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); + } + pagefault_enable(); ++ preempt_enable_nort(); + } + EXPORT_SYMBOL(__kunmap_atomic); + + void *kmap_atomic_pfn(unsigned long pfn) + { ++ pte_t pte = pfn_pte(pfn, kmap_prot); + unsigned long vaddr; + int idx, type; + struct page *page = pfn_to_page(pfn); + ++ preempt_disable_nort(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -140,7 +151,10 @@ + #ifdef CONFIG_DEBUG_HIGHMEM + BUG_ON(!pte_none(get_fixmap_pte(vaddr))); + #endif +- set_fixmap_pte(idx, pfn_pte(pfn, kmap_prot)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_fixmap_pte(idx, pte); + + return (void *)vaddr; + } +@@ -154,3 +168,28 @@ + + return pte_page(get_fixmap_pte(vaddr)); + } ++ ++#if defined CONFIG_PREEMPT_RT_FULL ++void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) ++{ ++ int i; ++ ++ /* ++ * Clear @prev's kmap_atomic mappings ++ */ ++ for (i = 0; i < prev_p->kmap_idx; i++) { ++ int idx = i + KM_TYPE_NR * smp_processor_id(); ++ ++ set_fixmap_pte(idx, __pte(0)); ++ } ++ /* ++ * Restore @next_p's kmap_atomic mappings ++ */ ++ for (i = 0; i < next_p->kmap_idx; i++) { ++ int idx = i + KM_TYPE_NR * smp_processor_id(); ++ ++ if (!pte_none(next_p->kmap_pte[i])) ++ set_fixmap_pte(idx, next_p->kmap_pte[i]); ++ } ++} ++#endif +diff -Nur linux-4.1.26.orig/arch/arm/plat-versatile/platsmp.c linux-4.1.26/arch/arm/plat-versatile/platsmp.c +--- linux-4.1.26.orig/arch/arm/plat-versatile/platsmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm/plat-versatile/platsmp.c 2016-06-19 15:30:54.923152195 +0200 +@@ -30,7 +30,7 @@ + sync_cache_w(&pen_release); + } + +-static DEFINE_SPINLOCK(boot_lock); ++static DEFINE_RAW_SPINLOCK(boot_lock); + + void versatile_secondary_init(unsigned int cpu) + { +@@ -43,8 +43,8 @@ + /* + * Synchronise with the boot thread. + */ +- spin_lock(&boot_lock); +- spin_unlock(&boot_lock); ++ raw_spin_lock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + } + + int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) +@@ -55,7 +55,7 @@ + * Set synchronisation state between this boot processor + * and the secondary one + */ +- spin_lock(&boot_lock); ++ raw_spin_lock(&boot_lock); + + /* + * This is really belt and braces; we hold unintended secondary +@@ -85,7 +85,7 @@ + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ +- spin_unlock(&boot_lock); ++ raw_spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; + } +diff -Nur linux-4.1.26.orig/arch/arm64/include/asm/futex.h linux-4.1.26/arch/arm64/include/asm/futex.h +--- linux-4.1.26.orig/arch/arm64/include/asm/futex.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/include/asm/futex.h 2016-06-19 15:30:54.923152195 +0200 +@@ -58,7 +58,7 @@ + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) + return -EFAULT; + +- pagefault_disable(); /* implies preempt_disable() */ ++ pagefault_disable(); + + switch (op) { + case FUTEX_OP_SET: +@@ -85,7 +85,7 @@ + ret = -ENOSYS; + } + +- pagefault_enable(); /* subsumes preempt_enable() */ ++ pagefault_enable(); + + if (!ret) { + switch (cmp) { +diff -Nur linux-4.1.26.orig/arch/arm64/include/asm/thread_info.h linux-4.1.26/arch/arm64/include/asm/thread_info.h +--- linux-4.1.26.orig/arch/arm64/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/include/asm/thread_info.h 2016-06-19 15:30:54.923152195 +0200 +@@ -47,6 +47,7 @@ + mm_segment_t addr_limit; /* address limit */ + struct task_struct *task; /* main task structure */ + int preempt_count; /* 0 => preemptable, <0 => bug */ ++ int preempt_lazy_count; /* 0 => preemptable, <0 => bug */ + int cpu; /* cpu */ + }; + +@@ -101,6 +102,7 @@ + #define TIF_NEED_RESCHED 1 + #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ + #define TIF_FOREIGN_FPSTATE 3 /* CPU's FP state is not current's */ ++#define TIF_NEED_RESCHED_LAZY 4 + #define TIF_NOHZ 7 + #define TIF_SYSCALL_TRACE 8 + #define TIF_SYSCALL_AUDIT 9 +@@ -117,6 +119,7 @@ + #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) + #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) + #define _TIF_FOREIGN_FPSTATE (1 << TIF_FOREIGN_FPSTATE) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_NOHZ (1 << TIF_NOHZ) + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) + #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) +diff -Nur linux-4.1.26.orig/arch/arm64/Kconfig linux-4.1.26/arch/arm64/Kconfig +--- linux-4.1.26.orig/arch/arm64/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/Kconfig 2016-06-19 15:30:54.923152195 +0200 +@@ -69,8 +69,10 @@ + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP + select HAVE_RCU_TABLE_FREE ++ select HAVE_PREEMPT_LAZY + select HAVE_SYSCALL_TRACEPOINTS + select IRQ_DOMAIN ++ select IRQ_FORCED_THREADING + select MODULES_USE_ELF_RELA + select NO_BOOTMEM + select OF +@@ -599,7 +601,7 @@ + + config XEN + bool "Xen guest support on ARM64" +- depends on ARM64 && OF ++ depends on ARM64 && OF && !PREEMPT_RT_FULL + select SWIOTLB_XEN + help + Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64. +diff -Nur linux-4.1.26.orig/arch/arm64/kernel/asm-offsets.c linux-4.1.26/arch/arm64/kernel/asm-offsets.c +--- linux-4.1.26.orig/arch/arm64/kernel/asm-offsets.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/kernel/asm-offsets.c 2016-06-19 15:30:54.923152195 +0200 +@@ -35,6 +35,7 @@ + BLANK(); + DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); + DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); ++ DEFINE(TI_PREEMPT_LAZY, offsetof(struct thread_info, preempt_lazy_count)); + DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); + DEFINE(TI_TASK, offsetof(struct thread_info, task)); + DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); +diff -Nur linux-4.1.26.orig/arch/arm64/kernel/entry.S linux-4.1.26/arch/arm64/kernel/entry.S +--- linux-4.1.26.orig/arch/arm64/kernel/entry.S 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/kernel/entry.S 2016-06-19 15:30:58.591293647 +0200 +@@ -367,11 +367,16 @@ + #ifdef CONFIG_PREEMPT + get_thread_info tsk + ldr w24, [tsk, #TI_PREEMPT] // get preempt count +- cbnz w24, 1f // preempt count != 0 ++ cbnz w24, 2f // preempt count != 0 + ldr x0, [tsk, #TI_FLAGS] // get flags +- tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling? +- bl el1_preempt ++ tbnz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling? ++ ++ ldr w24, [tsk, #TI_PREEMPT_LAZY] // get preempt lazy count ++ cbnz w24, 2f // preempt lazy count != 0 ++ tbz x0, #TIF_NEED_RESCHED_LAZY, 2f // needs rescheduling? + 1: ++ bl el1_preempt ++2: + #endif + #ifdef CONFIG_TRACE_IRQFLAGS + bl trace_hardirqs_on +@@ -385,6 +390,7 @@ + 1: bl preempt_schedule_irq // irq en/disable is done inside + ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS + tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling? ++ tbnz x0, #TIF_NEED_RESCHED_LAZY, 1b // needs rescheduling? + ret x24 + #endif + +@@ -622,6 +628,7 @@ + str x0, [sp, #S_X0] // returned x0 + work_pending: + tbnz x1, #TIF_NEED_RESCHED, work_resched ++ tbnz x1, #TIF_NEED_RESCHED_LAZY, work_resched + /* TIF_SIGPENDING, TIF_NOTIFY_RESUME or TIF_FOREIGN_FPSTATE case */ + ldr x2, [sp, #S_PSTATE] + mov x0, sp // 'regs' +diff -Nur linux-4.1.26.orig/arch/arm64/kernel/insn.c linux-4.1.26/arch/arm64/kernel/insn.c +--- linux-4.1.26.orig/arch/arm64/kernel/insn.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/kernel/insn.c 2016-06-19 15:30:58.595293802 +0200 +@@ -77,7 +77,7 @@ + } + } + +-static DEFINE_SPINLOCK(patch_lock); ++static DEFINE_RAW_SPINLOCK(patch_lock); + + static void __kprobes *patch_map(void *addr, int fixmap) + { +@@ -124,13 +124,13 @@ + unsigned long flags = 0; + int ret; + +- spin_lock_irqsave(&patch_lock, flags); ++ raw_spin_lock_irqsave(&patch_lock, flags); + waddr = patch_map(addr, FIX_TEXT_POKE0); + + ret = probe_kernel_write(waddr, &insn, AARCH64_INSN_SIZE); + + patch_unmap(FIX_TEXT_POKE0); +- spin_unlock_irqrestore(&patch_lock, flags); ++ raw_spin_unlock_irqrestore(&patch_lock, flags); + + return ret; + } +diff -Nur linux-4.1.26.orig/arch/arm64/kernel/perf_event.c linux-4.1.26/arch/arm64/kernel/perf_event.c +--- linux-4.1.26.orig/arch/arm64/kernel/perf_event.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/kernel/perf_event.c 2016-06-19 15:30:58.595293802 +0200 +@@ -488,7 +488,7 @@ + } + + err = request_irq(irq, armpmu->handle_irq, +- IRQF_NOBALANCING, ++ IRQF_NOBALANCING | IRQF_NO_THREAD, + "arm-pmu", armpmu); + if (err) { + pr_err("unable to request IRQ%d for ARM PMU counters\n", +diff -Nur linux-4.1.26.orig/arch/arm64/mm/fault.c linux-4.1.26/arch/arm64/mm/fault.c +--- linux-4.1.26.orig/arch/arm64/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/arm64/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -211,7 +211,7 @@ + * If we're in an interrupt or have no user context, we must not take + * the fault. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/avr32/include/asm/uaccess.h linux-4.1.26/arch/avr32/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/avr32/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/avr32/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 +@@ -97,7 +97,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -116,7 +117,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -136,7 +138,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -158,7 +161,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +diff -Nur linux-4.1.26.orig/arch/avr32/mm/fault.c linux-4.1.26/arch/avr32/mm/fault.c +--- linux-4.1.26.orig/arch/avr32/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/avr32/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -14,11 +14,11 @@ + #include + #include + #include ++#include + + #include + #include + #include +-#include + + #ifdef CONFIG_KPROBES + static inline int notify_page_fault(struct pt_regs *regs, int trap) +@@ -81,7 +81,7 @@ + * If we're in an interrupt or have no user context, we must + * not take the fault... + */ +- if (in_atomic() || !mm || regs->sr & SYSREG_BIT(GM)) ++ if (faulthandler_disabled() || !mm || regs->sr & SYSREG_BIT(GM)) + goto no_context; + + local_irq_enable(); +diff -Nur linux-4.1.26.orig/arch/cris/mm/fault.c linux-4.1.26/arch/cris/mm/fault.c +--- linux-4.1.26.orig/arch/cris/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/cris/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -8,7 +8,7 @@ + #include + #include + #include +-#include ++#include + #include + + extern int find_fixup_code(struct pt_regs *); +@@ -109,11 +109,11 @@ + info.si_code = SEGV_MAPERR; + + /* +- * If we're in an interrupt or "atomic" operation or have no ++ * If we're in an interrupt, have pagefaults disabled or have no + * user context, we must not take the fault. + */ + +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/frv/mm/fault.c linux-4.1.26/arch/frv/mm/fault.c +--- linux-4.1.26.orig/arch/frv/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/frv/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -19,9 +19,9 @@ + #include + #include + #include ++#include + + #include +-#include + #include + + /*****************************************************************************/ +@@ -78,7 +78,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(__frame)) +diff -Nur linux-4.1.26.orig/arch/frv/mm/highmem.c linux-4.1.26/arch/frv/mm/highmem.c +--- linux-4.1.26.orig/arch/frv/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/frv/mm/highmem.c 2016-06-19 15:30:58.595293802 +0200 +@@ -42,6 +42,7 @@ + unsigned long paddr; + int type; + ++ preempt_disable(); + pagefault_disable(); + type = kmap_atomic_idx_push(); + paddr = page_to_phys(page); +@@ -85,5 +86,6 @@ + } + kmap_atomic_idx_pop(); + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); +diff -Nur linux-4.1.26.orig/arch/hexagon/include/asm/uaccess.h linux-4.1.26/arch/hexagon/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/hexagon/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/hexagon/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 +@@ -36,7 +36,8 @@ + * @addr: User space pointer to start of block to check + * @size: Size of block to check + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Checks if a pointer to a block of memory in user space is valid. + * +diff -Nur linux-4.1.26.orig/arch/ia64/mm/fault.c linux-4.1.26/arch/ia64/mm/fault.c +--- linux-4.1.26.orig/arch/ia64/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/ia64/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -11,10 +11,10 @@ + #include + #include + #include ++#include + + #include + #include +-#include + + extern int die(char *, struct pt_regs *, long); + +@@ -96,7 +96,7 @@ + /* + * If we're in an interrupt or have no user context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + #ifdef CONFIG_VIRTUAL_MEM_MAP +diff -Nur linux-4.1.26.orig/arch/Kconfig linux-4.1.26/arch/Kconfig +--- linux-4.1.26.orig/arch/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/Kconfig 2016-06-19 15:30:54.915151887 +0200 +@@ -6,6 +6,7 @@ + tristate "OProfile system profiling" + depends on PROFILING + depends on HAVE_OPROFILE ++ depends on !PREEMPT_RT_FULL + select RING_BUFFER + select RING_BUFFER_ALLOW_SWAP + help +@@ -49,6 +50,7 @@ + config JUMP_LABEL + bool "Optimize very unlikely/likely branches" + depends on HAVE_ARCH_JUMP_LABEL ++ depends on (!INTERRUPT_OFF_HIST && !PREEMPT_OFF_HIST && !WAKEUP_LATENCY_HIST && !MISSED_TIMER_OFFSETS_HIST) + help + This option enables a transparent branch optimization that + makes certain almost-always-true or almost-always-false branch +diff -Nur linux-4.1.26.orig/arch/m32r/include/asm/uaccess.h linux-4.1.26/arch/m32r/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/m32r/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/m32r/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 +@@ -91,7 +91,8 @@ + * @addr: User space pointer to start of block to check + * @size: Size of block to check + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Checks if a pointer to a block of memory in user space is valid. + * +@@ -155,7 +156,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -175,7 +177,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -194,7 +197,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -274,7 +278,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -568,7 +573,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -588,7 +594,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. + * +@@ -606,7 +613,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -626,7 +634,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. + * +@@ -677,7 +686,8 @@ + * strlen_user: - Get the size of a string in user space. + * @str: The string to measure. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Get the size of a NUL-terminated string in user space. + * +diff -Nur linux-4.1.26.orig/arch/m32r/mm/fault.c linux-4.1.26/arch/m32r/mm/fault.c +--- linux-4.1.26.orig/arch/m32r/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/m32r/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -24,9 +24,9 @@ + #include /* For unblank_screen() */ + #include + #include ++#include + + #include +-#include + #include + #include + #include +@@ -111,10 +111,10 @@ + mm = tsk->mm; + + /* +- * If we're in an interrupt or have no user context or are running in an +- * atomic region then we must not take the fault.. ++ * If we're in an interrupt or have no user context or have pagefaults ++ * disabled then we must not take the fault. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto bad_area_nosemaphore; + + if (error_code & ACE_USERMODE) +diff -Nur linux-4.1.26.orig/arch/m68k/mm/fault.c linux-4.1.26/arch/m68k/mm/fault.c +--- linux-4.1.26.orig/arch/m68k/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/m68k/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -10,10 +10,10 @@ + #include + #include + #include ++#include + + #include + #include +-#include + #include + + extern void die_if_kernel(char *, struct pt_regs *, long); +@@ -81,7 +81,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/metag/mm/fault.c linux-4.1.26/arch/metag/mm/fault.c +--- linux-4.1.26.orig/arch/metag/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/metag/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -105,7 +105,7 @@ + + mm = tsk->mm; + +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/metag/mm/highmem.c linux-4.1.26/arch/metag/mm/highmem.c +--- linux-4.1.26.orig/arch/metag/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/metag/mm/highmem.c 2016-06-19 15:30:58.595293802 +0200 +@@ -43,7 +43,7 @@ + unsigned long vaddr; + int type; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -82,6 +82,7 @@ + } + + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); + +@@ -95,6 +96,7 @@ + unsigned long vaddr; + int type; + ++ preempt_disable(); + pagefault_disable(); + + type = kmap_atomic_idx_push(); +diff -Nur linux-4.1.26.orig/arch/microblaze/include/asm/uaccess.h linux-4.1.26/arch/microblaze/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/microblaze/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/microblaze/include/asm/uaccess.h 2016-06-19 15:30:58.595293802 +0200 +@@ -178,7 +178,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -290,7 +291,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +diff -Nur linux-4.1.26.orig/arch/microblaze/mm/fault.c linux-4.1.26/arch/microblaze/mm/fault.c +--- linux-4.1.26.orig/arch/microblaze/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/microblaze/mm/fault.c 2016-06-19 15:30:58.595293802 +0200 +@@ -107,14 +107,14 @@ + if ((error_code & 0x13) == 0x13 || (error_code & 0x11) == 0x11) + is_write = 0; + +- if (unlikely(in_atomic() || !mm)) { ++ if (unlikely(faulthandler_disabled() || !mm)) { + if (kernel_mode(regs)) + goto bad_area_nosemaphore; + +- /* in_atomic() in user mode is really bad, ++ /* faulthandler_disabled() in user mode is really bad, + as is current->mm == NULL. */ +- pr_emerg("Page fault in user mode with in_atomic(), mm = %p\n", +- mm); ++ pr_emerg("Page fault in user mode with faulthandler_disabled(), mm = %p\n", ++ mm); + pr_emerg("r15 = %lx MSR = %lx\n", + regs->r15, regs->msr); + die("Weird page fault", regs, SIGSEGV); +diff -Nur linux-4.1.26.orig/arch/microblaze/mm/highmem.c linux-4.1.26/arch/microblaze/mm/highmem.c +--- linux-4.1.26.orig/arch/microblaze/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/microblaze/mm/highmem.c 2016-06-19 15:30:58.599293956 +0200 +@@ -37,7 +37,7 @@ + unsigned long vaddr; + int idx, type; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -63,6 +63,7 @@ + + if (vaddr < __fix_to_virt(FIX_KMAP_END)) { + pagefault_enable(); ++ preempt_enable(); + return; + } + +@@ -84,5 +85,6 @@ + #endif + kmap_atomic_idx_pop(); + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); +diff -Nur linux-4.1.26.orig/arch/mips/include/asm/uaccess.h linux-4.1.26/arch/mips/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/mips/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mips/include/asm/uaccess.h 2016-06-19 15:30:58.599293956 +0200 +@@ -103,7 +103,8 @@ + * @addr: User space pointer to start of block to check + * @size: Size of block to check + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Checks if a pointer to a block of memory in user space is valid. + * +@@ -138,7 +139,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -157,7 +159,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -177,7 +180,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -199,7 +203,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -498,7 +503,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -517,7 +523,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -537,7 +544,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -559,7 +567,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -815,7 +824,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -888,7 +898,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. + * +@@ -1075,7 +1086,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -1107,7 +1119,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. + * +@@ -1329,7 +1342,8 @@ + * strlen_user: - Get the size of a string in user space. + * @str: The string to measure. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Get the size of a NUL-terminated string in user space. + * +@@ -1398,7 +1412,8 @@ + * strnlen_user: - Get the size of a string in user space. + * @str: The string to measure. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Get the size of a NUL-terminated string in user space. + * +diff -Nur linux-4.1.26.orig/arch/mips/Kconfig linux-4.1.26/arch/mips/Kconfig +--- linux-4.1.26.orig/arch/mips/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mips/Kconfig 2016-06-19 15:30:58.599293956 +0200 +@@ -2367,7 +2367,7 @@ + # + config HIGHMEM + bool "High Memory Support" +- depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA ++ depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA && !PREEMPT_RT_FULL + + config CPU_SUPPORTS_HIGHMEM + bool +diff -Nur linux-4.1.26.orig/arch/mips/kernel/signal-common.h linux-4.1.26/arch/mips/kernel/signal-common.h +--- linux-4.1.26.orig/arch/mips/kernel/signal-common.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mips/kernel/signal-common.h 2016-06-19 15:30:58.599293956 +0200 +@@ -28,12 +28,7 @@ + extern int fpcsr_pending(unsigned int __user *fpcsr); + + /* Make sure we will not lose FPU ownership */ +-#ifdef CONFIG_PREEMPT +-#define lock_fpu_owner() preempt_disable() +-#define unlock_fpu_owner() preempt_enable() +-#else +-#define lock_fpu_owner() pagefault_disable() +-#define unlock_fpu_owner() pagefault_enable() +-#endif ++#define lock_fpu_owner() ({ preempt_disable(); pagefault_disable(); }) ++#define unlock_fpu_owner() ({ pagefault_enable(); preempt_enable(); }) + + #endif /* __SIGNAL_COMMON_H */ +diff -Nur linux-4.1.26.orig/arch/mips/mm/fault.c linux-4.1.26/arch/mips/mm/fault.c +--- linux-4.1.26.orig/arch/mips/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mips/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 +@@ -21,10 +21,10 @@ + #include + #include + #include ++#include + + #include + #include +-#include + #include + #include /* For VMALLOC_END */ + #include +@@ -94,7 +94,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto bad_area_nosemaphore; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/mips/mm/highmem.c linux-4.1.26/arch/mips/mm/highmem.c +--- linux-4.1.26.orig/arch/mips/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mips/mm/highmem.c 2016-06-19 15:30:58.599293956 +0200 +@@ -47,7 +47,7 @@ + unsigned long vaddr; + int idx, type; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -72,6 +72,7 @@ + + if (vaddr < FIXADDR_START) { // FIXME + pagefault_enable(); ++ preempt_enable(); + return; + } + +@@ -92,6 +93,7 @@ + #endif + kmap_atomic_idx_pop(); + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); + +@@ -104,6 +106,7 @@ + unsigned long vaddr; + int idx, type; + ++ preempt_disable(); + pagefault_disable(); + + type = kmap_atomic_idx_push(); +diff -Nur linux-4.1.26.orig/arch/mips/mm/init.c linux-4.1.26/arch/mips/mm/init.c +--- linux-4.1.26.orig/arch/mips/mm/init.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mips/mm/init.c 2016-06-19 15:30:58.599293956 +0200 +@@ -90,6 +90,7 @@ + + BUG_ON(Page_dcache_dirty(page)); + ++ preempt_disable(); + pagefault_disable(); + idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); + idx += in_interrupt() ? FIX_N_COLOURS : 0; +@@ -152,6 +153,7 @@ + write_c0_entryhi(old_ctx); + local_irq_restore(flags); + pagefault_enable(); ++ preempt_enable(); + } + + void copy_user_highpage(struct page *to, struct page *from, +diff -Nur linux-4.1.26.orig/arch/mn10300/include/asm/highmem.h linux-4.1.26/arch/mn10300/include/asm/highmem.h +--- linux-4.1.26.orig/arch/mn10300/include/asm/highmem.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mn10300/include/asm/highmem.h 2016-06-19 15:30:58.599293956 +0200 +@@ -75,6 +75,7 @@ + unsigned long vaddr; + int idx, type; + ++ preempt_disable(); + pagefault_disable(); + if (page < highmem_start_page) + return page_address(page); +@@ -98,6 +99,7 @@ + + if (vaddr < FIXADDR_START) { /* FIXME */ + pagefault_enable(); ++ preempt_enable(); + return; + } + +@@ -122,6 +124,7 @@ + + kmap_atomic_idx_pop(); + pagefault_enable(); ++ preempt_enable(); + } + #endif /* __KERNEL__ */ + +diff -Nur linux-4.1.26.orig/arch/mn10300/mm/fault.c linux-4.1.26/arch/mn10300/mm/fault.c +--- linux-4.1.26.orig/arch/mn10300/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/mn10300/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 +@@ -23,8 +23,8 @@ + #include + #include + #include /* For unblank_screen() */ ++#include + +-#include + #include + #include + #include +@@ -168,7 +168,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if ((fault_code & MMUFCR_xFC_ACCESS) == MMUFCR_xFC_ACCESS_USR) +diff -Nur linux-4.1.26.orig/arch/nios2/mm/fault.c linux-4.1.26/arch/nios2/mm/fault.c +--- linux-4.1.26.orig/arch/nios2/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/nios2/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 +@@ -77,7 +77,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto bad_area_nosemaphore; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/parisc/include/asm/cacheflush.h linux-4.1.26/arch/parisc/include/asm/cacheflush.h +--- linux-4.1.26.orig/arch/parisc/include/asm/cacheflush.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/parisc/include/asm/cacheflush.h 2016-06-19 15:30:58.599293956 +0200 +@@ -142,6 +142,7 @@ + + static inline void *kmap_atomic(struct page *page) + { ++ preempt_disable(); + pagefault_disable(); + return page_address(page); + } +@@ -150,6 +151,7 @@ + { + flush_kernel_dcache_page_addr(addr); + pagefault_enable(); ++ preempt_enable(); + } + + #define kmap_atomic_prot(page, prot) kmap_atomic(page) +diff -Nur linux-4.1.26.orig/arch/parisc/kernel/traps.c linux-4.1.26/arch/parisc/kernel/traps.c +--- linux-4.1.26.orig/arch/parisc/kernel/traps.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/parisc/kernel/traps.c 2016-06-19 15:30:58.599293956 +0200 +@@ -26,9 +26,9 @@ + #include + #include + #include ++#include + + #include +-#include + #include + #include + #include +@@ -796,7 +796,7 @@ + * unless pagefault_disable() was called before. + */ + +- if (fault_space == 0 && !in_atomic()) ++ if (fault_space == 0 && !faulthandler_disabled()) + { + /* Clean up and return if in exception table. */ + if (fixup_exception(regs)) +diff -Nur linux-4.1.26.orig/arch/parisc/mm/fault.c linux-4.1.26/arch/parisc/mm/fault.c +--- linux-4.1.26.orig/arch/parisc/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/parisc/mm/fault.c 2016-06-19 15:30:58.599293956 +0200 +@@ -15,8 +15,8 @@ + #include + #include + #include ++#include + +-#include + #include + + /* Various important other fields */ +@@ -208,7 +208,7 @@ + int fault; + unsigned int flags; + +- if (in_atomic()) ++ if (pagefault_disabled()) + goto no_context; + + tsk = current; +diff -Nur linux-4.1.26.orig/arch/powerpc/include/asm/kvm_host.h linux-4.1.26/arch/powerpc/include/asm/kvm_host.h +--- linux-4.1.26.orig/arch/powerpc/include/asm/kvm_host.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/include/asm/kvm_host.h 2016-06-19 15:30:58.599293956 +0200 +@@ -280,7 +280,7 @@ + u8 in_guest; + struct list_head runnable_threads; + spinlock_t lock; +- wait_queue_head_t wq; ++ struct swait_head wq; + spinlock_t stoltb_lock; /* protects stolen_tb and preempt_tb */ + u64 stolen_tb; + u64 preempt_tb; +@@ -613,7 +613,7 @@ + u8 prodded; + u32 last_inst; + +- wait_queue_head_t *wqp; ++ struct swait_head *wqp; + struct kvmppc_vcore *vcore; + int ret; + int trap; +diff -Nur linux-4.1.26.orig/arch/powerpc/include/asm/thread_info.h linux-4.1.26/arch/powerpc/include/asm/thread_info.h +--- linux-4.1.26.orig/arch/powerpc/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/include/asm/thread_info.h 2016-06-19 15:30:58.603294110 +0200 +@@ -42,6 +42,8 @@ + int cpu; /* cpu we're on */ + int preempt_count; /* 0 => preemptable, + <0 => BUG */ ++ int preempt_lazy_count; /* 0 => preemptable, ++ <0 => BUG */ + unsigned long local_flags; /* private flags for thread */ + + /* low level flags - has atomic operations done on it */ +@@ -82,8 +84,7 @@ + #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ + #define TIF_SIGPENDING 1 /* signal pending */ + #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ +-#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling +- TIF_NEED_RESCHED */ ++#define TIF_NEED_RESCHED_LAZY 3 /* lazy rescheduling necessary */ + #define TIF_32BIT 4 /* 32 bit binary */ + #define TIF_RESTORE_TM 5 /* need to restore TM FP/VEC/VSX */ + #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ +@@ -101,6 +102,8 @@ + #if defined(CONFIG_PPC64) + #define TIF_ELF2ABI 18 /* function descriptors must die! */ + #endif ++#define TIF_POLLING_NRFLAG 19 /* true if poll_idle() is polling ++ TIF_NEED_RESCHED */ + + /* as above, but as bit values */ + #define _TIF_SYSCALL_TRACE (1<flags) + set_bits(irqtp->flags, &curtp->flags); + } ++#endif + + irq_hw_number_t virq_to_hw(unsigned int virq) + { +diff -Nur linux-4.1.26.orig/arch/powerpc/kernel/misc_32.S linux-4.1.26/arch/powerpc/kernel/misc_32.S +--- linux-4.1.26.orig/arch/powerpc/kernel/misc_32.S 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/kernel/misc_32.S 2016-06-19 15:30:58.603294110 +0200 +@@ -40,6 +40,7 @@ + * We store the saved ksp_limit in the unused part + * of the STACK_FRAME_OVERHEAD + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + _GLOBAL(call_do_softirq) + mflr r0 + stw r0,4(r1) +@@ -56,6 +57,7 @@ + stw r10,THREAD+KSP_LIMIT(r2) + mtlr r0 + blr ++#endif + + /* + * void call_do_irq(struct pt_regs *regs, struct thread_info *irqtp); +diff -Nur linux-4.1.26.orig/arch/powerpc/kernel/misc_64.S linux-4.1.26/arch/powerpc/kernel/misc_64.S +--- linux-4.1.26.orig/arch/powerpc/kernel/misc_64.S 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/kernel/misc_64.S 2016-06-19 15:30:58.603294110 +0200 +@@ -29,6 +29,7 @@ + + .text + ++#ifndef CONFIG_PREEMPT_RT_FULL + _GLOBAL(call_do_softirq) + mflr r0 + std r0,16(r1) +@@ -39,6 +40,7 @@ + ld r0,16(r1) + mtlr r0 + blr ++#endif + + _GLOBAL(call_do_irq) + mflr r0 +diff -Nur linux-4.1.26.orig/arch/powerpc/kvm/book3s_hv.c linux-4.1.26/arch/powerpc/kvm/book3s_hv.c +--- linux-4.1.26.orig/arch/powerpc/kvm/book3s_hv.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/kvm/book3s_hv.c 2016-06-19 15:30:58.603294110 +0200 +@@ -115,11 +115,11 @@ + static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) + { + int cpu = vcpu->cpu; +- wait_queue_head_t *wqp; ++ struct swait_head *wqp; + + wqp = kvm_arch_vcpu_wq(vcpu); +- if (waitqueue_active(wqp)) { +- wake_up_interruptible(wqp); ++ if (swaitqueue_active(wqp)) { ++ swait_wake_interruptible(wqp); + ++vcpu->stat.halt_wakeup; + } + +@@ -692,8 +692,8 @@ + tvcpu->arch.prodded = 1; + smp_mb(); + if (vcpu->arch.ceded) { +- if (waitqueue_active(&vcpu->wq)) { +- wake_up_interruptible(&vcpu->wq); ++ if (swaitqueue_active(&vcpu->wq)) { ++ swait_wake_interruptible(&vcpu->wq); + vcpu->stat.halt_wakeup++; + } + } +@@ -1432,7 +1432,7 @@ + INIT_LIST_HEAD(&vcore->runnable_threads); + spin_lock_init(&vcore->lock); + spin_lock_init(&vcore->stoltb_lock); +- init_waitqueue_head(&vcore->wq); ++ init_swait_head(&vcore->wq); + vcore->preempt_tb = TB_NIL; + vcore->lpcr = kvm->arch.lpcr; + vcore->first_vcpuid = core * threads_per_subcore; +@@ -2079,10 +2079,9 @@ + { + struct kvm_vcpu *vcpu; + int do_sleep = 1; ++ DEFINE_SWAITER(wait); + +- DEFINE_WAIT(wait); +- +- prepare_to_wait(&vc->wq, &wait, TASK_INTERRUPTIBLE); ++ swait_prepare(&vc->wq, &wait, TASK_INTERRUPTIBLE); + + /* + * Check one last time for pending exceptions and ceded state after +@@ -2096,7 +2095,7 @@ + } + + if (!do_sleep) { +- finish_wait(&vc->wq, &wait); ++ swait_finish(&vc->wq, &wait); + return; + } + +@@ -2104,7 +2103,7 @@ + trace_kvmppc_vcore_blocked(vc, 0); + spin_unlock(&vc->lock); + schedule(); +- finish_wait(&vc->wq, &wait); ++ swait_finish(&vc->wq, &wait); + spin_lock(&vc->lock); + vc->vcore_state = VCORE_INACTIVE; + trace_kvmppc_vcore_blocked(vc, 1); +@@ -2148,7 +2147,7 @@ + kvmppc_start_thread(vcpu); + trace_kvm_guest_enter(vcpu); + } else if (vc->vcore_state == VCORE_SLEEPING) { +- wake_up(&vc->wq); ++ swait_wake(&vc->wq); + } + + } +diff -Nur linux-4.1.26.orig/arch/powerpc/kvm/Kconfig linux-4.1.26/arch/powerpc/kvm/Kconfig +--- linux-4.1.26.orig/arch/powerpc/kvm/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/kvm/Kconfig 2016-06-19 15:30:58.603294110 +0200 +@@ -172,6 +172,7 @@ + config KVM_MPIC + bool "KVM in-kernel MPIC emulation" + depends on KVM && E500 ++ depends on !PREEMPT_RT_FULL + select HAVE_KVM_IRQCHIP + select HAVE_KVM_IRQFD + select HAVE_KVM_IRQ_ROUTING +diff -Nur linux-4.1.26.orig/arch/powerpc/mm/fault.c linux-4.1.26/arch/powerpc/mm/fault.c +--- linux-4.1.26.orig/arch/powerpc/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/mm/fault.c 2016-06-19 15:30:58.603294110 +0200 +@@ -33,13 +33,13 @@ + #include + #include + #include ++#include + + #include + #include + #include + #include + #include +-#include + #include + #include + #include +@@ -272,15 +272,16 @@ + if (!arch_irq_disabled_regs(regs)) + local_irq_enable(); + +- if (in_atomic() || mm == NULL) { ++ if (faulthandler_disabled() || mm == NULL) { + if (!user_mode(regs)) { + rc = SIGSEGV; + goto bail; + } +- /* in_atomic() in user mode is really bad, ++ /* faulthandler_disabled() in user mode is really bad, + as is current->mm == NULL. */ + printk(KERN_EMERG "Page fault in user mode with " +- "in_atomic() = %d mm = %p\n", in_atomic(), mm); ++ "faulthandler_disabled() = %d mm = %p\n", ++ faulthandler_disabled(), mm); + printk(KERN_EMERG "NIP = %lx MSR = %lx\n", + regs->nip, regs->msr); + die("Weird page fault", regs, SIGSEGV); +diff -Nur linux-4.1.26.orig/arch/powerpc/mm/highmem.c linux-4.1.26/arch/powerpc/mm/highmem.c +--- linux-4.1.26.orig/arch/powerpc/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/mm/highmem.c 2016-06-19 15:30:58.603294110 +0200 +@@ -34,7 +34,7 @@ + unsigned long vaddr; + int idx, type; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -59,6 +59,7 @@ + + if (vaddr < __fix_to_virt(FIX_KMAP_END)) { + pagefault_enable(); ++ preempt_enable(); + return; + } + +@@ -82,5 +83,6 @@ + + kmap_atomic_idx_pop(); + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); +diff -Nur linux-4.1.26.orig/arch/powerpc/platforms/ps3/device-init.c linux-4.1.26/arch/powerpc/platforms/ps3/device-init.c +--- linux-4.1.26.orig/arch/powerpc/platforms/ps3/device-init.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/powerpc/platforms/ps3/device-init.c 2016-06-19 15:30:58.603294110 +0200 +@@ -752,7 +752,7 @@ + } + pr_debug("%s:%u: notification %s issued\n", __func__, __LINE__, op); + +- res = wait_event_interruptible(dev->done.wait, ++ res = swait_event_interruptible(dev->done.wait, + dev->done.done || kthread_should_stop()); + if (kthread_should_stop()) + res = -EINTR; +diff -Nur linux-4.1.26.orig/arch/s390/include/asm/kvm_host.h linux-4.1.26/arch/s390/include/asm/kvm_host.h +--- linux-4.1.26.orig/arch/s390/include/asm/kvm_host.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/s390/include/asm/kvm_host.h 2016-06-19 15:30:58.603294110 +0200 +@@ -419,7 +419,7 @@ + struct kvm_s390_local_interrupt { + spinlock_t lock; + struct kvm_s390_float_interrupt *float_int; +- wait_queue_head_t *wq; ++ struct swait_head *wq; + atomic_t *cpuflags; + DECLARE_BITMAP(sigp_emerg_pending, KVM_MAX_VCPUS); + struct kvm_s390_irq_payload irq; +diff -Nur linux-4.1.26.orig/arch/s390/include/asm/uaccess.h linux-4.1.26/arch/s390/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/s390/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/s390/include/asm/uaccess.h 2016-06-19 15:30:58.603294110 +0200 +@@ -98,7 +98,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -118,7 +119,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -264,7 +266,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. + * +@@ -290,7 +293,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. + * +@@ -348,7 +352,8 @@ + * strlen_user: - Get the size of a string in user space. + * @str: The string to measure. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Get the size of a NUL-terminated string in user space. + * +diff -Nur linux-4.1.26.orig/arch/s390/kvm/interrupt.c linux-4.1.26/arch/s390/kvm/interrupt.c +--- linux-4.1.26.orig/arch/s390/kvm/interrupt.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/s390/kvm/interrupt.c 2016-06-19 15:30:58.607294264 +0200 +@@ -875,13 +875,13 @@ + + void kvm_s390_vcpu_wakeup(struct kvm_vcpu *vcpu) + { +- if (waitqueue_active(&vcpu->wq)) { ++ if (swaitqueue_active(&vcpu->wq)) { + /* + * The vcpu gave up the cpu voluntarily, mark it as a good + * yield-candidate. + */ + vcpu->preempted = true; +- wake_up_interruptible(&vcpu->wq); ++ swait_wake_interruptible(&vcpu->wq); + vcpu->stat.halt_wakeup++; + } + } +@@ -987,7 +987,7 @@ + spin_lock(&li->lock); + irq.u.pgm.code = code; + __inject_prog(vcpu, &irq); +- BUG_ON(waitqueue_active(li->wq)); ++ BUG_ON(swaitqueue_active(li->wq)); + spin_unlock(&li->lock); + return 0; + } +@@ -1006,7 +1006,7 @@ + spin_lock(&li->lock); + irq.u.pgm = *pgm_info; + rc = __inject_prog(vcpu, &irq); +- BUG_ON(waitqueue_active(li->wq)); ++ BUG_ON(swaitqueue_active(li->wq)); + spin_unlock(&li->lock); + return rc; + } +diff -Nur linux-4.1.26.orig/arch/s390/mm/fault.c linux-4.1.26/arch/s390/mm/fault.c +--- linux-4.1.26.orig/arch/s390/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/s390/mm/fault.c 2016-06-19 15:30:58.607294264 +0200 +@@ -399,7 +399,7 @@ + * user context. + */ + fault = VM_FAULT_BADCONTEXT; +- if (unlikely(!user_space_fault(regs) || in_atomic() || !mm)) ++ if (unlikely(!user_space_fault(regs) || faulthandler_disabled() || !mm)) + goto out; + + address = trans_exc_code & __FAIL_ADDR_MASK; +diff -Nur linux-4.1.26.orig/arch/score/include/asm/uaccess.h linux-4.1.26/arch/score/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/score/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/score/include/asm/uaccess.h 2016-06-19 15:30:58.607294264 +0200 +@@ -36,7 +36,8 @@ + * @addr: User space pointer to start of block to check + * @size: Size of block to check + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Checks if a pointer to a block of memory in user space is valid. + * +@@ -61,7 +62,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -79,7 +81,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -98,7 +101,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -119,7 +123,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +diff -Nur linux-4.1.26.orig/arch/score/mm/fault.c linux-4.1.26/arch/score/mm/fault.c +--- linux-4.1.26.orig/arch/score/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/score/mm/fault.c 2016-06-19 15:30:58.607294264 +0200 +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + + /* + * This routine handles page faults. It determines the address, +@@ -73,7 +74,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (pagefault_disabled() || !mm) + goto bad_area_nosemaphore; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/sh/kernel/irq.c linux-4.1.26/arch/sh/kernel/irq.c +--- linux-4.1.26.orig/arch/sh/kernel/irq.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sh/kernel/irq.c 2016-06-19 15:30:58.607294264 +0200 +@@ -147,6 +147,7 @@ + hardirq_ctx[cpu] = NULL; + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + void do_softirq_own_stack(void) + { + struct thread_info *curctx; +@@ -174,6 +175,7 @@ + "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr" + ); + } ++#endif + #else + static inline void handle_one_irq(unsigned int irq) + { +diff -Nur linux-4.1.26.orig/arch/sh/mm/fault.c linux-4.1.26/arch/sh/mm/fault.c +--- linux-4.1.26.orig/arch/sh/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sh/mm/fault.c 2016-06-19 15:30:58.607294264 +0200 +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -438,9 +439,9 @@ + + /* + * If we're in an interrupt, have no user context or are running +- * in an atomic region then we must not take the fault: ++ * with pagefaults disabled then we must not take the fault: + */ +- if (unlikely(in_atomic() || !mm)) { ++ if (unlikely(faulthandler_disabled() || !mm)) { + bad_area_nosemaphore(regs, error_code, address); + return; + } +diff -Nur linux-4.1.26.orig/arch/sparc/Kconfig linux-4.1.26/arch/sparc/Kconfig +--- linux-4.1.26.orig/arch/sparc/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sparc/Kconfig 2016-06-19 15:30:58.607294264 +0200 +@@ -189,12 +189,10 @@ + source kernel/Kconfig.hz + + config RWSEM_GENERIC_SPINLOCK +- bool +- default y if SPARC32 ++ def_bool PREEMPT_RT_FULL + + config RWSEM_XCHGADD_ALGORITHM +- bool +- default y if SPARC64 ++ def_bool !RWSEM_GENERIC_SPINLOCK && !PREEMPT_RT_FULL + + config GENERIC_HWEIGHT + bool +diff -Nur linux-4.1.26.orig/arch/sparc/kernel/irq_64.c linux-4.1.26/arch/sparc/kernel/irq_64.c +--- linux-4.1.26.orig/arch/sparc/kernel/irq_64.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sparc/kernel/irq_64.c 2016-06-19 15:30:58.607294264 +0200 +@@ -849,6 +849,7 @@ + set_irq_regs(old_regs); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + void do_softirq_own_stack(void) + { + void *orig_sp, *sp = softirq_stack[smp_processor_id()]; +@@ -863,6 +864,7 @@ + __asm__ __volatile__("mov %0, %%sp" + : : "r" (orig_sp)); + } ++#endif + + #ifdef CONFIG_HOTPLUG_CPU + void fixup_irqs(void) +diff -Nur linux-4.1.26.orig/arch/sparc/mm/fault_32.c linux-4.1.26/arch/sparc/mm/fault_32.c +--- linux-4.1.26.orig/arch/sparc/mm/fault_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sparc/mm/fault_32.c 2016-06-19 15:30:58.607294264 +0200 +@@ -21,6 +21,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -29,7 +30,6 @@ + #include + #include + #include +-#include + + #include "mm_32.h" + +@@ -196,7 +196,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (pagefault_disabled() || !mm) + goto no_context; + + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); +diff -Nur linux-4.1.26.orig/arch/sparc/mm/fault_64.c linux-4.1.26/arch/sparc/mm/fault_64.c +--- linux-4.1.26.orig/arch/sparc/mm/fault_64.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sparc/mm/fault_64.c 2016-06-19 15:30:58.607294264 +0200 +@@ -22,12 +22,12 @@ + #include + #include + #include ++#include + + #include + #include + #include + #include +-#include + #include + #include + #include +@@ -330,7 +330,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto intr_or_no_mm; + + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); +diff -Nur linux-4.1.26.orig/arch/sparc/mm/highmem.c linux-4.1.26/arch/sparc/mm/highmem.c +--- linux-4.1.26.orig/arch/sparc/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sparc/mm/highmem.c 2016-06-19 15:30:58.607294264 +0200 +@@ -53,7 +53,7 @@ + unsigned long vaddr; + long idx, type; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -91,6 +91,7 @@ + + if (vaddr < FIXADDR_START) { // FIXME + pagefault_enable(); ++ preempt_enable(); + return; + } + +@@ -126,5 +127,6 @@ + + kmap_atomic_idx_pop(); + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); +diff -Nur linux-4.1.26.orig/arch/sparc/mm/init_64.c linux-4.1.26/arch/sparc/mm/init_64.c +--- linux-4.1.26.orig/arch/sparc/mm/init_64.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/sparc/mm/init_64.c 2016-06-19 15:30:58.607294264 +0200 +@@ -2738,7 +2738,7 @@ + struct mm_struct *mm = current->mm; + struct tsb_config *tp; + +- if (in_atomic() || !mm) { ++ if (faulthandler_disabled() || !mm) { + const struct exception_table_entry *entry; + + entry = search_exception_tables(regs->tpc); +diff -Nur linux-4.1.26.orig/arch/tile/include/asm/uaccess.h linux-4.1.26/arch/tile/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/tile/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/tile/include/asm/uaccess.h 2016-06-19 15:30:58.611294419 +0200 +@@ -78,7 +78,8 @@ + * @addr: User space pointer to start of block to check + * @size: Size of block to check + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Checks if a pointer to a block of memory in user space is valid. + * +@@ -192,7 +193,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -274,7 +276,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -330,7 +333,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -366,7 +370,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -437,7 +442,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to user space. Caller must check + * the specified blocks with access_ok() before calling this function. +diff -Nur linux-4.1.26.orig/arch/tile/mm/fault.c linux-4.1.26/arch/tile/mm/fault.c +--- linux-4.1.26.orig/arch/tile/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/tile/mm/fault.c 2016-06-19 15:30:58.611294419 +0200 +@@ -354,9 +354,9 @@ + + /* + * If we're in an interrupt, have no user context or are running in an +- * atomic region then we must not take the fault. ++ * region with pagefaults disabled then we must not take the fault. + */ +- if (in_atomic() || !mm) { ++ if (pagefault_disabled() || !mm) { + vma = NULL; /* happy compiler */ + goto bad_area_nosemaphore; + } +diff -Nur linux-4.1.26.orig/arch/tile/mm/highmem.c linux-4.1.26/arch/tile/mm/highmem.c +--- linux-4.1.26.orig/arch/tile/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/tile/mm/highmem.c 2016-06-19 15:30:58.611294419 +0200 +@@ -201,7 +201,7 @@ + int idx, type; + pte_t *pte; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable(); + pagefault_disable(); + + /* Avoid icache flushes by disallowing atomic executable mappings. */ +@@ -259,6 +259,7 @@ + } + + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); + +diff -Nur linux-4.1.26.orig/arch/um/kernel/trap.c linux-4.1.26/arch/um/kernel/trap.c +--- linux-4.1.26.orig/arch/um/kernel/trap.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/um/kernel/trap.c 2016-06-19 15:30:58.611294419 +0200 +@@ -35,10 +35,10 @@ + *code_out = SEGV_MAPERR; + + /* +- * If the fault was during atomic operation, don't take the fault, just ++ * If the fault was with pagefaults disabled, don't take the fault, just + * fail. + */ +- if (in_atomic()) ++ if (faulthandler_disabled()) + goto out_nosemaphore; + + if (is_user) +diff -Nur linux-4.1.26.orig/arch/unicore32/mm/fault.c linux-4.1.26/arch/unicore32/mm/fault.c +--- linux-4.1.26.orig/arch/unicore32/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/unicore32/mm/fault.c 2016-06-19 15:30:58.611294419 +0200 +@@ -218,7 +218,7 @@ + * If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) ++ if (faulthandler_disabled() || !mm) + goto no_context; + + if (user_mode(regs)) +diff -Nur linux-4.1.26.orig/arch/x86/crypto/aesni-intel_glue.c linux-4.1.26/arch/x86/crypto/aesni-intel_glue.c +--- linux-4.1.26.orig/arch/x86/crypto/aesni-intel_glue.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/crypto/aesni-intel_glue.c 2016-06-19 15:30:58.611294419 +0200 +@@ -382,14 +382,14 @@ + err = blkcipher_walk_virt(desc, &walk); + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, +- nbytes & AES_BLOCK_MASK); ++ nbytes & AES_BLOCK_MASK); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = blkcipher_walk_done(desc, &walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -406,14 +406,14 @@ + err = blkcipher_walk_virt(desc, &walk); + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = blkcipher_walk_done(desc, &walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -430,14 +430,14 @@ + err = blkcipher_walk_virt(desc, &walk); + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = blkcipher_walk_done(desc, &walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -454,14 +454,14 @@ + err = blkcipher_walk_virt(desc, &walk); + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes)) { ++ kernel_fpu_begin(); + aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = blkcipher_walk_done(desc, &walk, nbytes); + } +- kernel_fpu_end(); + + return err; + } +@@ -513,18 +513,20 @@ + err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE); + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + +- kernel_fpu_begin(); + while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) { ++ kernel_fpu_begin(); + aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr, + nbytes & AES_BLOCK_MASK, walk.iv); ++ kernel_fpu_end(); + nbytes &= AES_BLOCK_SIZE - 1; + err = blkcipher_walk_done(desc, &walk, nbytes); + } + if (walk.nbytes) { ++ kernel_fpu_begin(); + ctr_crypt_final(ctx, &walk); ++ kernel_fpu_end(); + err = blkcipher_walk_done(desc, &walk, 0); + } +- kernel_fpu_end(); + + return err; + } +diff -Nur linux-4.1.26.orig/arch/x86/crypto/cast5_avx_glue.c linux-4.1.26/arch/x86/crypto/cast5_avx_glue.c +--- linux-4.1.26.orig/arch/x86/crypto/cast5_avx_glue.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/crypto/cast5_avx_glue.c 2016-06-19 15:30:58.611294419 +0200 +@@ -60,7 +60,7 @@ + static int ecb_crypt(struct blkcipher_desc *desc, struct blkcipher_walk *walk, + bool enc) + { +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); + const unsigned int bsize = CAST5_BLOCK_SIZE; + unsigned int nbytes; +@@ -76,7 +76,7 @@ + u8 *wsrc = walk->src.virt.addr; + u8 *wdst = walk->dst.virt.addr; + +- fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, nbytes); + + /* Process multi-block batch */ + if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) { +@@ -104,10 +104,9 @@ + } while (nbytes >= bsize); + + done: ++ cast5_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, walk, nbytes); + } +- +- cast5_fpu_end(fpu_enabled); + return err; + } + +@@ -228,7 +227,7 @@ + static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst, + struct scatterlist *src, unsigned int nbytes) + { +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct blkcipher_walk walk; + int err; + +@@ -237,12 +236,11 @@ + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + + while ((nbytes = walk.nbytes)) { +- fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, nbytes); + nbytes = __cbc_decrypt(desc, &walk); ++ cast5_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, &walk, nbytes); + } +- +- cast5_fpu_end(fpu_enabled); + return err; + } + +@@ -312,7 +310,7 @@ + static int ctr_crypt(struct blkcipher_desc *desc, struct scatterlist *dst, + struct scatterlist *src, unsigned int nbytes) + { +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct blkcipher_walk walk; + int err; + +@@ -321,13 +319,12 @@ + desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP; + + while ((nbytes = walk.nbytes) >= CAST5_BLOCK_SIZE) { +- fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes); ++ fpu_enabled = cast5_fpu_begin(false, nbytes); + nbytes = __ctr_crypt(desc, &walk); ++ cast5_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, &walk, nbytes); + } + +- cast5_fpu_end(fpu_enabled); +- + if (walk.nbytes) { + ctr_crypt_final(desc, &walk); + err = blkcipher_walk_done(desc, &walk, 0); +diff -Nur linux-4.1.26.orig/arch/x86/crypto/glue_helper.c linux-4.1.26/arch/x86/crypto/glue_helper.c +--- linux-4.1.26.orig/arch/x86/crypto/glue_helper.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/crypto/glue_helper.c 2016-06-19 15:30:58.611294419 +0200 +@@ -39,7 +39,7 @@ + void *ctx = crypto_blkcipher_ctx(desc->tfm); + const unsigned int bsize = 128 / 8; + unsigned int nbytes, i, func_bytes; +- bool fpu_enabled = false; ++ bool fpu_enabled; + int err; + + err = blkcipher_walk_virt(desc, walk); +@@ -49,7 +49,7 @@ + u8 *wdst = walk->dst.virt.addr; + + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- desc, fpu_enabled, nbytes); ++ desc, false, nbytes); + + for (i = 0; i < gctx->num_funcs; i++) { + func_bytes = bsize * gctx->funcs[i].num_blocks; +@@ -71,10 +71,10 @@ + } + + done: ++ glue_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); + return err; + } + +@@ -194,7 +194,7 @@ + struct scatterlist *src, unsigned int nbytes) + { + const unsigned int bsize = 128 / 8; +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct blkcipher_walk walk; + int err; + +@@ -203,12 +203,12 @@ + + while ((nbytes = walk.nbytes)) { + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- desc, fpu_enabled, nbytes); ++ desc, false, nbytes); + nbytes = __glue_cbc_decrypt_128bit(gctx, desc, &walk); ++ glue_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, &walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); + return err; + } + EXPORT_SYMBOL_GPL(glue_cbc_decrypt_128bit); +@@ -277,7 +277,7 @@ + struct scatterlist *src, unsigned int nbytes) + { + const unsigned int bsize = 128 / 8; +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct blkcipher_walk walk; + int err; + +@@ -286,13 +286,12 @@ + + while ((nbytes = walk.nbytes) >= bsize) { + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- desc, fpu_enabled, nbytes); ++ desc, false, nbytes); + nbytes = __glue_ctr_crypt_128bit(gctx, desc, &walk); ++ glue_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, &walk, nbytes); + } + +- glue_fpu_end(fpu_enabled); +- + if (walk.nbytes) { + glue_ctr_crypt_final_128bit( + gctx->funcs[gctx->num_funcs - 1].fn_u.ctr, desc, &walk); +@@ -347,7 +346,7 @@ + void *tweak_ctx, void *crypt_ctx) + { + const unsigned int bsize = 128 / 8; +- bool fpu_enabled = false; ++ bool fpu_enabled; + struct blkcipher_walk walk; + int err; + +@@ -360,21 +359,21 @@ + + /* set minimum length to bsize, for tweak_fn */ + fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, +- desc, fpu_enabled, ++ desc, false, + nbytes < bsize ? bsize : nbytes); +- + /* calculate first value of T */ + tweak_fn(tweak_ctx, walk.iv, walk.iv); ++ glue_fpu_end(fpu_enabled); + + while (nbytes) { ++ fpu_enabled = glue_fpu_begin(bsize, gctx->fpu_blocks_limit, ++ desc, false, nbytes); + nbytes = __glue_xts_crypt_128bit(gctx, crypt_ctx, desc, &walk); + ++ glue_fpu_end(fpu_enabled); + err = blkcipher_walk_done(desc, &walk, nbytes); + nbytes = walk.nbytes; + } +- +- glue_fpu_end(fpu_enabled); +- + return err; + } + EXPORT_SYMBOL_GPL(glue_xts_crypt_128bit); +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/preempt.h linux-4.1.26/arch/x86/include/asm/preempt.h +--- linux-4.1.26.orig/arch/x86/include/asm/preempt.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/preempt.h 2016-06-19 15:30:58.611294419 +0200 +@@ -82,17 +82,33 @@ + * a decrement which hits zero means we have no preempt_count and should + * reschedule. + */ +-static __always_inline bool __preempt_count_dec_and_test(void) ++static __always_inline bool ____preempt_count_dec_and_test(void) + { + GEN_UNARY_RMWcc("decl", __preempt_count, __percpu_arg(0), "e"); + } + ++static __always_inline bool __preempt_count_dec_and_test(void) ++{ ++ if (____preempt_count_dec_and_test()) ++ return true; ++#ifdef CONFIG_PREEMPT_LAZY ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++#else ++ return false; ++#endif ++} ++ + /* + * Returns true when we need to resched and can (barring IRQ state). + */ + static __always_inline bool should_resched(int preempt_offset) + { ++#ifdef CONFIG_PREEMPT_LAZY ++ return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset || ++ test_thread_flag(TIF_NEED_RESCHED_LAZY)); ++#else + return unlikely(raw_cpu_read_4(__preempt_count) == preempt_offset); ++#endif + } + + #ifdef CONFIG_PREEMPT +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/signal.h linux-4.1.26/arch/x86/include/asm/signal.h +--- linux-4.1.26.orig/arch/x86/include/asm/signal.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/signal.h 2016-06-19 15:30:58.611294419 +0200 +@@ -23,6 +23,19 @@ + unsigned long sig[_NSIG_WORDS]; + } sigset_t; + ++/* ++ * Because some traps use the IST stack, we must keep preemption ++ * disabled while calling do_trap(), but do_trap() may call ++ * force_sig_info() which will grab the signal spin_locks for the ++ * task, which in PREEMPT_RT_FULL are mutexes. By defining ++ * ARCH_RT_DELAYS_SIGNAL_SEND the force_sig_info() will set ++ * TIF_NOTIFY_RESUME and set up the signal to be sent on exit of the ++ * trap. ++ */ ++#if defined(CONFIG_PREEMPT_RT_FULL) ++#define ARCH_RT_DELAYS_SIGNAL_SEND ++#endif ++ + #ifndef CONFIG_COMPAT + typedef sigset_t compat_sigset_t; + #endif +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/stackprotector.h linux-4.1.26/arch/x86/include/asm/stackprotector.h +--- linux-4.1.26.orig/arch/x86/include/asm/stackprotector.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/stackprotector.h 2016-06-19 15:30:58.611294419 +0200 +@@ -57,7 +57,7 @@ + */ + static __always_inline void boot_init_stack_canary(void) + { +- u64 canary; ++ u64 uninitialized_var(canary); + u64 tsc; + + #ifdef CONFIG_X86_64 +@@ -68,8 +68,16 @@ + * of randomness. The TSC only matters for very early init, + * there it already has some randomness on most systems. Later + * on during the bootup the random pool has true entropy too. ++ * ++ * For preempt-rt we need to weaken the randomness a bit, as ++ * we can't call into the random generator from atomic context ++ * due to locking constraints. We just leave canary ++ * uninitialized and use the TSC based randomness on top of ++ * it. + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + get_random_bytes(&canary, sizeof(canary)); ++#endif + tsc = __native_read_tsc(); + canary += tsc + (tsc << 32UL); + +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/thread_info.h linux-4.1.26/arch/x86/include/asm/thread_info.h +--- linux-4.1.26.orig/arch/x86/include/asm/thread_info.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/thread_info.h 2016-06-19 15:30:58.611294419 +0200 +@@ -55,6 +55,8 @@ + __u32 status; /* thread synchronous flags */ + __u32 cpu; /* current CPU */ + int saved_preempt_count; ++ int preempt_lazy_count; /* 0 => lazy preemptable ++ <0 => BUG */ + mm_segment_t addr_limit; + void __user *sysenter_return; + unsigned int sig_on_uaccess_error:1; +@@ -95,6 +97,7 @@ + #define TIF_SYSCALL_EMU 6 /* syscall emulation active */ + #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ + #define TIF_SECCOMP 8 /* secure computing */ ++#define TIF_NEED_RESCHED_LAZY 9 /* lazy rescheduling necessary */ + #define TIF_USER_RETURN_NOTIFY 11 /* notify kernel of userspace return */ + #define TIF_UPROBE 12 /* breakpointed or singlestepping */ + #define TIF_NOTSC 16 /* TSC is not accessible in userland */ +@@ -119,6 +122,7 @@ + #define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) + #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) + #define _TIF_SECCOMP (1 << TIF_SECCOMP) ++#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) + #define _TIF_USER_RETURN_NOTIFY (1 << TIF_USER_RETURN_NOTIFY) + #define _TIF_UPROBE (1 << TIF_UPROBE) + #define _TIF_NOTSC (1 << TIF_NOTSC) +@@ -168,6 +172,8 @@ + #define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW|_TIF_USER_RETURN_NOTIFY) + #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW) + ++#define _TIF_NEED_RESCHED_MASK (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY) ++ + #define STACK_WARN (THREAD_SIZE/8) + + /* +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uaccess_32.h linux-4.1.26/arch/x86/include/asm/uaccess_32.h +--- linux-4.1.26.orig/arch/x86/include/asm/uaccess_32.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/uaccess_32.h 2016-06-19 15:30:58.615294573 +0200 +@@ -70,7 +70,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. Caller must check + * the specified block with access_ok() before calling this function. +@@ -117,7 +118,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. Caller must check + * the specified block with access_ok() before calling this function. +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uaccess.h linux-4.1.26/arch/x86/include/asm/uaccess.h +--- linux-4.1.26.orig/arch/x86/include/asm/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/uaccess.h 2016-06-19 15:30:58.611294419 +0200 +@@ -74,7 +74,8 @@ + * @addr: User space pointer to start of block to check + * @size: Size of block to check + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Checks if a pointer to a block of memory in user space is valid. + * +@@ -145,7 +146,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -240,7 +242,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +@@ -455,7 +458,8 @@ + * @x: Variable to store result. + * @ptr: Source address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger +@@ -479,7 +483,8 @@ + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uv/uv_bau.h linux-4.1.26/arch/x86/include/asm/uv/uv_bau.h +--- linux-4.1.26.orig/arch/x86/include/asm/uv/uv_bau.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/uv/uv_bau.h 2016-06-19 15:30:58.615294573 +0200 +@@ -615,9 +615,9 @@ + cycles_t send_message; + cycles_t period_end; + cycles_t period_time; +- spinlock_t uvhub_lock; +- spinlock_t queue_lock; +- spinlock_t disable_lock; ++ raw_spinlock_t uvhub_lock; ++ raw_spinlock_t queue_lock; ++ raw_spinlock_t disable_lock; + /* tunables */ + int max_concurr; + int max_concurr_const; +@@ -776,15 +776,15 @@ + * to be lowered below the current 'v'. atomic_add_unless can only stop + * on equal. + */ +-static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u) ++static inline int atomic_inc_unless_ge(raw_spinlock_t *lock, atomic_t *v, int u) + { +- spin_lock(lock); ++ raw_spin_lock(lock); + if (atomic_read(v) >= u) { +- spin_unlock(lock); ++ raw_spin_unlock(lock); + return 0; + } + atomic_inc(v); +- spin_unlock(lock); ++ raw_spin_unlock(lock); + return 1; + } + +diff -Nur linux-4.1.26.orig/arch/x86/include/asm/uv/uv_hub.h linux-4.1.26/arch/x86/include/asm/uv/uv_hub.h +--- linux-4.1.26.orig/arch/x86/include/asm/uv/uv_hub.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/include/asm/uv/uv_hub.h 2016-06-19 15:30:58.615294573 +0200 +@@ -492,7 +492,7 @@ + unsigned short nr_online_cpus; + unsigned short pnode; + short memory_nid; +- spinlock_t nmi_lock; /* obsolete, see uv_hub_nmi */ ++ raw_spinlock_t nmi_lock; /* obsolete, see uv_hub_nmi */ + unsigned long nmi_count; /* obsolete, see uv_hub_nmi */ + }; + extern struct uv_blade_info *uv_blade_info; +diff -Nur linux-4.1.26.orig/arch/x86/Kconfig linux-4.1.26/arch/x86/Kconfig +--- linux-4.1.26.orig/arch/x86/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/Kconfig 2016-06-19 15:30:58.611294419 +0200 +@@ -22,6 +22,7 @@ + ### Arch settings + config X86 + def_bool y ++ select HAVE_PREEMPT_LAZY + select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI + select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI + select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS +@@ -203,8 +204,11 @@ + def_bool y + depends on ISA_DMA_API + ++config RWSEM_GENERIC_SPINLOCK ++ def_bool PREEMPT_RT_FULL ++ + config RWSEM_XCHGADD_ALGORITHM +- def_bool y ++ def_bool !RWSEM_GENERIC_SPINLOCK && !PREEMPT_RT_FULL + + config GENERIC_CALIBRATE_DELAY + def_bool y +@@ -838,7 +842,7 @@ + config MAXSMP + bool "Enable Maximum number of SMP Processors and NUMA Nodes" + depends on X86_64 && SMP && DEBUG_KERNEL +- select CPUMASK_OFFSTACK ++ select CPUMASK_OFFSTACK if !PREEMPT_RT_FULL + ---help--- + Enable maximum number of CPUS and NUMA Nodes for this architecture. + If unsure, say N. +diff -Nur linux-4.1.26.orig/arch/x86/kernel/apic/io_apic.c linux-4.1.26/arch/x86/kernel/apic/io_apic.c +--- linux-4.1.26.orig/arch/x86/kernel/apic/io_apic.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/apic/io_apic.c 2016-06-19 15:30:58.615294573 +0200 +@@ -1891,7 +1891,8 @@ + static inline bool ioapic_irqd_mask(struct irq_data *data, struct irq_cfg *cfg) + { + /* If we are moving the irq we need to mask it */ +- if (unlikely(irqd_is_setaffinity_pending(data))) { ++ if (unlikely(irqd_is_setaffinity_pending(data) && ++ !irqd_irq_inprogress(data))) { + mask_ioapic(cfg); + return true; + } +diff -Nur linux-4.1.26.orig/arch/x86/kernel/apic/x2apic_uv_x.c linux-4.1.26/arch/x86/kernel/apic/x2apic_uv_x.c +--- linux-4.1.26.orig/arch/x86/kernel/apic/x2apic_uv_x.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/apic/x2apic_uv_x.c 2016-06-19 15:30:58.615294573 +0200 +@@ -949,7 +949,7 @@ + uv_blade_info[blade].pnode = pnode; + uv_blade_info[blade].nr_possible_cpus = 0; + uv_blade_info[blade].nr_online_cpus = 0; +- spin_lock_init(&uv_blade_info[blade].nmi_lock); ++ raw_spin_lock_init(&uv_blade_info[blade].nmi_lock); + min_pnode = min(pnode, min_pnode); + max_pnode = max(pnode, max_pnode); + blade++; +diff -Nur linux-4.1.26.orig/arch/x86/kernel/asm-offsets.c linux-4.1.26/arch/x86/kernel/asm-offsets.c +--- linux-4.1.26.orig/arch/x86/kernel/asm-offsets.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/asm-offsets.c 2016-06-19 15:30:58.615294573 +0200 +@@ -32,6 +32,7 @@ + OFFSET(TI_flags, thread_info, flags); + OFFSET(TI_status, thread_info, status); + OFFSET(TI_addr_limit, thread_info, addr_limit); ++ OFFSET(TI_preempt_lazy_count, thread_info, preempt_lazy_count); + + BLANK(); + OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); +@@ -71,4 +72,5 @@ + + BLANK(); + DEFINE(PTREGS_SIZE, sizeof(struct pt_regs)); ++ DEFINE(_PREEMPT_ENABLED, PREEMPT_ENABLED); + } +diff -Nur linux-4.1.26.orig/arch/x86/kernel/cpu/mcheck/mce.c linux-4.1.26/arch/x86/kernel/cpu/mcheck/mce.c +--- linux-4.1.26.orig/arch/x86/kernel/cpu/mcheck/mce.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/cpu/mcheck/mce.c 2016-06-19 15:30:58.615294573 +0200 +@@ -41,6 +41,8 @@ + #include + #include + #include ++#include ++#include + + #include + #include +@@ -1267,7 +1269,7 @@ + static unsigned long check_interval = INITIAL_CHECK_INTERVAL; + + static DEFINE_PER_CPU(unsigned long, mce_next_interval); /* in jiffies */ +-static DEFINE_PER_CPU(struct timer_list, mce_timer); ++static DEFINE_PER_CPU(struct hrtimer, mce_timer); + + static unsigned long mce_adjust_timer_default(unsigned long interval) + { +@@ -1276,32 +1278,18 @@ + + static unsigned long (*mce_adjust_timer)(unsigned long interval) = mce_adjust_timer_default; + +-static void __restart_timer(struct timer_list *t, unsigned long interval) ++static enum hrtimer_restart __restart_timer(struct hrtimer *timer, unsigned long interval) + { +- unsigned long when = jiffies + interval; +- unsigned long flags; +- +- local_irq_save(flags); +- +- if (timer_pending(t)) { +- if (time_before(when, t->expires)) +- mod_timer_pinned(t, when); +- } else { +- t->expires = round_jiffies(when); +- add_timer_on(t, smp_processor_id()); +- } +- +- local_irq_restore(flags); ++ if (!interval) ++ return HRTIMER_NORESTART; ++ hrtimer_forward_now(timer, ns_to_ktime(jiffies_to_nsecs(interval))); ++ return HRTIMER_RESTART; + } + +-static void mce_timer_fn(unsigned long data) ++static enum hrtimer_restart mce_timer_fn(struct hrtimer *timer) + { +- struct timer_list *t = this_cpu_ptr(&mce_timer); +- int cpu = smp_processor_id(); + unsigned long iv; + +- WARN_ON(cpu != data); +- + iv = __this_cpu_read(mce_next_interval); + + if (mce_available(this_cpu_ptr(&cpu_info))) { +@@ -1324,7 +1312,7 @@ + + done: + __this_cpu_write(mce_next_interval, iv); +- __restart_timer(t, iv); ++ return __restart_timer(timer, iv); + } + + /* +@@ -1332,7 +1320,7 @@ + */ + void mce_timer_kick(unsigned long interval) + { +- struct timer_list *t = this_cpu_ptr(&mce_timer); ++ struct hrtimer *t = this_cpu_ptr(&mce_timer); + unsigned long iv = __this_cpu_read(mce_next_interval); + + __restart_timer(t, interval); +@@ -1347,7 +1335,7 @@ + int cpu; + + for_each_online_cpu(cpu) +- del_timer_sync(&per_cpu(mce_timer, cpu)); ++ hrtimer_cancel(&per_cpu(mce_timer, cpu)); + } + + static void mce_do_trigger(struct work_struct *work) +@@ -1357,6 +1345,56 @@ + + static DECLARE_WORK(mce_trigger_work, mce_do_trigger); + ++static void __mce_notify_work(struct swork_event *event) ++{ ++ /* Not more than two messages every minute */ ++ static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2); ++ ++ /* wake processes polling /dev/mcelog */ ++ wake_up_interruptible(&mce_chrdev_wait); ++ ++ /* ++ * There is no risk of missing notifications because ++ * work_pending is always cleared before the function is ++ * executed. ++ */ ++ if (mce_helper[0] && !work_pending(&mce_trigger_work)) ++ schedule_work(&mce_trigger_work); ++ ++ if (__ratelimit(&ratelimit)) ++ pr_info(HW_ERR "Machine check events logged\n"); ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++static bool notify_work_ready __read_mostly; ++static struct swork_event notify_work; ++ ++static int mce_notify_work_init(void) ++{ ++ int err; ++ ++ err = swork_get(); ++ if (err) ++ return err; ++ ++ INIT_SWORK(¬ify_work, __mce_notify_work); ++ notify_work_ready = true; ++ return 0; ++} ++ ++static void mce_notify_work(void) ++{ ++ if (notify_work_ready) ++ swork_queue(¬ify_work); ++} ++#else ++static void mce_notify_work(void) ++{ ++ __mce_notify_work(NULL); ++} ++static inline int mce_notify_work_init(void) { return 0; } ++#endif ++ + /* + * Notify the user(s) about new machine check events. + * Can be called from interrupt context, but not from machine check/NMI +@@ -1364,19 +1402,8 @@ + */ + int mce_notify_irq(void) + { +- /* Not more than two messages every minute */ +- static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2); +- + if (test_and_clear_bit(0, &mce_need_notify)) { +- /* wake processes polling /dev/mcelog */ +- wake_up_interruptible(&mce_chrdev_wait); +- +- if (mce_helper[0]) +- schedule_work(&mce_trigger_work); +- +- if (__ratelimit(&ratelimit)) +- pr_info(HW_ERR "Machine check events logged\n"); +- ++ mce_notify_work(); + return 1; + } + return 0; +@@ -1649,7 +1676,7 @@ + } + } + +-static void mce_start_timer(unsigned int cpu, struct timer_list *t) ++static void mce_start_timer(unsigned int cpu, struct hrtimer *t) + { + unsigned long iv = check_interval * HZ; + +@@ -1658,16 +1685,17 @@ + + per_cpu(mce_next_interval, cpu) = iv; + +- t->expires = round_jiffies(jiffies + iv); +- add_timer_on(t, cpu); ++ hrtimer_start_range_ns(t, ns_to_ktime(jiffies_to_usecs(iv) * 1000ULL), ++ 0, HRTIMER_MODE_REL_PINNED); + } + + static void __mcheck_cpu_init_timer(void) + { +- struct timer_list *t = this_cpu_ptr(&mce_timer); ++ struct hrtimer *t = this_cpu_ptr(&mce_timer); + unsigned int cpu = smp_processor_id(); + +- setup_timer(t, mce_timer_fn, cpu); ++ hrtimer_init(t, CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ t->function = mce_timer_fn; + mce_start_timer(cpu, t); + } + +@@ -2345,6 +2373,8 @@ + if (!mce_available(raw_cpu_ptr(&cpu_info))) + return; + ++ hrtimer_cancel(this_cpu_ptr(&mce_timer)); ++ + if (!(action & CPU_TASKS_FROZEN)) + cmci_clear(); + for (i = 0; i < mca_cfg.banks; i++) { +@@ -2371,6 +2401,7 @@ + if (b->init) + wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl); + } ++ __mcheck_cpu_init_timer(); + } + + /* Get notified when a cpu comes on/off. Be hotplug friendly. */ +@@ -2378,7 +2409,6 @@ + mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) + { + unsigned int cpu = (unsigned long)hcpu; +- struct timer_list *t = &per_cpu(mce_timer, cpu); + + switch (action & ~CPU_TASKS_FROZEN) { + case CPU_ONLINE: +@@ -2398,11 +2428,9 @@ + break; + case CPU_DOWN_PREPARE: + smp_call_function_single(cpu, mce_disable_cpu, &action, 1); +- del_timer_sync(t); + break; + case CPU_DOWN_FAILED: + smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); +- mce_start_timer(cpu, t); + break; + } + +@@ -2441,6 +2469,10 @@ + goto err_out; + } + ++ err = mce_notify_work_init(); ++ if (err) ++ goto err_out; ++ + if (!zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL)) { + err = -ENOMEM; + goto err_out; +diff -Nur linux-4.1.26.orig/arch/x86/kernel/dumpstack_32.c linux-4.1.26/arch/x86/kernel/dumpstack_32.c +--- linux-4.1.26.orig/arch/x86/kernel/dumpstack_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/dumpstack_32.c 2016-06-19 15:30:58.615294573 +0200 +@@ -42,7 +42,7 @@ + unsigned long *stack, unsigned long bp, + const struct stacktrace_ops *ops, void *data) + { +- const unsigned cpu = get_cpu(); ++ const unsigned cpu = get_cpu_light(); + int graph = 0; + u32 *prev_esp; + +@@ -86,7 +86,7 @@ + break; + touch_nmi_watchdog(); + } +- put_cpu(); ++ put_cpu_light(); + } + EXPORT_SYMBOL(dump_trace); + +diff -Nur linux-4.1.26.orig/arch/x86/kernel/dumpstack_64.c linux-4.1.26/arch/x86/kernel/dumpstack_64.c +--- linux-4.1.26.orig/arch/x86/kernel/dumpstack_64.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/dumpstack_64.c 2016-06-19 15:30:58.615294573 +0200 +@@ -152,7 +152,7 @@ + unsigned long *stack, unsigned long bp, + const struct stacktrace_ops *ops, void *data) + { +- const unsigned cpu = get_cpu(); ++ const unsigned cpu = get_cpu_light(); + struct thread_info *tinfo; + unsigned long *irq_stack = (unsigned long *)per_cpu(irq_stack_ptr, cpu); + unsigned long dummy; +@@ -241,7 +241,7 @@ + * This handles the process stack: + */ + bp = ops->walk_stack(tinfo, stack, bp, ops, data, NULL, &graph); +- put_cpu(); ++ put_cpu_light(); + } + EXPORT_SYMBOL(dump_trace); + +@@ -255,7 +255,7 @@ + int cpu; + int i; + +- preempt_disable(); ++ migrate_disable(); + cpu = smp_processor_id(); + + irq_stack_end = (unsigned long *)(per_cpu(irq_stack_ptr, cpu)); +@@ -291,7 +291,7 @@ + pr_cont(" %016lx", *stack++); + touch_nmi_watchdog(); + } +- preempt_enable(); ++ migrate_enable(); + + pr_cont("\n"); + show_trace_log_lvl(task, regs, sp, bp, log_lvl); +diff -Nur linux-4.1.26.orig/arch/x86/kernel/entry_32.S linux-4.1.26/arch/x86/kernel/entry_32.S +--- linux-4.1.26.orig/arch/x86/kernel/entry_32.S 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/entry_32.S 2016-06-19 15:30:58.615294573 +0200 +@@ -359,8 +359,24 @@ + ENTRY(resume_kernel) + DISABLE_INTERRUPTS(CLBR_ANY) + need_resched: ++ # preempt count == 0 + NEED_RS set? + cmpl $0,PER_CPU_VAR(__preempt_count) ++#ifndef CONFIG_PREEMPT_LAZY + jnz restore_all ++#else ++ jz test_int_off ++ ++ # atleast preempt count == 0 ? ++ cmpl $_PREEMPT_ENABLED,PER_CPU_VAR(__preempt_count) ++ jne restore_all ++ ++ cmpl $0,TI_preempt_lazy_count(%ebp) # non-zero preempt_lazy_count ? ++ jnz restore_all ++ ++ testl $_TIF_NEED_RESCHED_LAZY, TI_flags(%ebp) ++ jz restore_all ++test_int_off: ++#endif + testl $X86_EFLAGS_IF,PT_EFLAGS(%esp) # interrupts off (exception path) ? + jz restore_all + call preempt_schedule_irq +@@ -594,7 +610,7 @@ + ALIGN + RING0_PTREGS_FRAME # can't unwind into user space anyway + work_pending: +- testb $_TIF_NEED_RESCHED, %cl ++ testl $_TIF_NEED_RESCHED_MASK, %ecx + jz work_notifysig + work_resched: + call schedule +@@ -607,7 +623,7 @@ + andl $_TIF_WORK_MASK, %ecx # is there any work to be done other + # than syscall tracing? + jz restore_all +- testb $_TIF_NEED_RESCHED, %cl ++ testl $_TIF_NEED_RESCHED_MASK, %ecx + jnz work_resched + + work_notifysig: # deal with pending signals and +diff -Nur linux-4.1.26.orig/arch/x86/kernel/entry_64.S linux-4.1.26/arch/x86/kernel/entry_64.S +--- linux-4.1.26.orig/arch/x86/kernel/entry_64.S 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/entry_64.S 2016-06-19 15:30:58.615294573 +0200 +@@ -370,8 +370,8 @@ + /* First do a reschedule test. */ + /* edx: work, edi: workmask */ + int_careful: +- bt $TIF_NEED_RESCHED,%edx +- jnc int_very_careful ++ testl $_TIF_NEED_RESCHED_MASK,%edx ++ jz int_very_careful + TRACE_IRQS_ON + ENABLE_INTERRUPTS(CLBR_NONE) + pushq_cfi %rdi +@@ -776,7 +776,23 @@ + bt $9,EFLAGS(%rsp) /* interrupts were off? */ + jnc 1f + 0: cmpl $0,PER_CPU_VAR(__preempt_count) ++#ifndef CONFIG_PREEMPT_LAZY + jnz 1f ++#else ++ jz do_preempt_schedule_irq ++ ++ # atleast preempt count == 0 ? ++ cmpl $_PREEMPT_ENABLED,PER_CPU_VAR(__preempt_count) ++ jnz 1f ++ ++ GET_THREAD_INFO(%rcx) ++ cmpl $0, TI_preempt_lazy_count(%rcx) ++ jnz 1f ++ ++ bt $TIF_NEED_RESCHED_LAZY,TI_flags(%rcx) ++ jnc 1f ++do_preempt_schedule_irq: ++#endif + call preempt_schedule_irq + jmp 0b + 1: +@@ -844,8 +860,8 @@ + /* edi: workmask, edx: work */ + retint_careful: + CFI_RESTORE_STATE +- bt $TIF_NEED_RESCHED,%edx +- jnc retint_signal ++ testl $_TIF_NEED_RESCHED_MASK,%edx ++ jz retint_signal + TRACE_IRQS_ON + ENABLE_INTERRUPTS(CLBR_NONE) + pushq_cfi %rdi +@@ -1118,6 +1134,7 @@ + jmp 2b + .previous + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* Call softirq on interrupt stack. Interrupts are off. */ + ENTRY(do_softirq_own_stack) + CFI_STARTPROC +@@ -1137,6 +1154,7 @@ + ret + CFI_ENDPROC + END(do_softirq_own_stack) ++#endif + + #ifdef CONFIG_XEN + idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 +diff -Nur linux-4.1.26.orig/arch/x86/kernel/irq_32.c linux-4.1.26/arch/x86/kernel/irq_32.c +--- linux-4.1.26.orig/arch/x86/kernel/irq_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/irq_32.c 2016-06-19 15:30:58.619294727 +0200 +@@ -135,6 +135,7 @@ + cpu, per_cpu(hardirq_stack, cpu), per_cpu(softirq_stack, cpu)); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + void do_softirq_own_stack(void) + { + struct thread_info *curstk; +@@ -153,6 +154,7 @@ + + call_on_stack(__do_softirq, isp); + } ++#endif + + bool handle_irq(unsigned irq, struct pt_regs *regs) + { +diff -Nur linux-4.1.26.orig/arch/x86/kernel/process_32.c linux-4.1.26/arch/x86/kernel/process_32.c +--- linux-4.1.26.orig/arch/x86/kernel/process_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/process_32.c 2016-06-19 15:30:58.619294727 +0200 +@@ -35,6 +35,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -210,6 +211,35 @@ + } + EXPORT_SYMBOL_GPL(start_thread); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) ++{ ++ int i; ++ ++ /* ++ * Clear @prev's kmap_atomic mappings ++ */ ++ for (i = 0; i < prev_p->kmap_idx; i++) { ++ int idx = i + KM_TYPE_NR * smp_processor_id(); ++ pte_t *ptep = kmap_pte - idx; ++ ++ kpte_clear_flush(ptep, __fix_to_virt(FIX_KMAP_BEGIN + idx)); ++ } ++ /* ++ * Restore @next_p's kmap_atomic mappings ++ */ ++ for (i = 0; i < next_p->kmap_idx; i++) { ++ int idx = i + KM_TYPE_NR * smp_processor_id(); ++ ++ if (!pte_none(next_p->kmap_pte[i])) ++ set_pte(kmap_pte - idx, next_p->kmap_pte[i]); ++ } ++} ++#else ++static inline void ++switch_kmaps(struct task_struct *prev_p, struct task_struct *next_p) { } ++#endif ++ + + /* + * switch_to(x,y) should switch tasks from x to y. +@@ -292,6 +322,8 @@ + task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT)) + __switch_to_xtra(prev_p, next_p, tss); + ++ switch_kmaps(prev_p, next_p); ++ + /* + * Leave lazy mode, flushing any hypercalls made here. + * This must be done before restoring TLS segments so +diff -Nur linux-4.1.26.orig/arch/x86/kernel/signal.c linux-4.1.26/arch/x86/kernel/signal.c +--- linux-4.1.26.orig/arch/x86/kernel/signal.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kernel/signal.c 2016-06-19 15:30:58.619294727 +0200 +@@ -726,6 +726,14 @@ + { + user_exit(); + ++#ifdef ARCH_RT_DELAYS_SIGNAL_SEND ++ if (unlikely(current->forced_info.si_signo)) { ++ struct task_struct *t = current; ++ force_sig_info(t->forced_info.si_signo, &t->forced_info, t); ++ t->forced_info.si_signo = 0; ++ } ++#endif ++ + if (thread_info_flags & _TIF_UPROBE) + uprobe_notify_resume(regs); + +diff -Nur linux-4.1.26.orig/arch/x86/kvm/lapic.c linux-4.1.26/arch/x86/kvm/lapic.c +--- linux-4.1.26.orig/arch/x86/kvm/lapic.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kvm/lapic.c 2016-06-19 15:30:58.619294727 +0200 +@@ -1106,7 +1106,7 @@ + static void apic_timer_expired(struct kvm_lapic *apic) + { + struct kvm_vcpu *vcpu = apic->vcpu; +- wait_queue_head_t *q = &vcpu->wq; ++ struct swait_head *q = &vcpu->wq; + struct kvm_timer *ktimer = &apic->lapic_timer; + + if (atomic_read(&apic->lapic_timer.pending)) +@@ -1115,8 +1115,8 @@ + atomic_inc(&apic->lapic_timer.pending); + kvm_set_pending_timer(vcpu); + +- if (waitqueue_active(q)) +- wake_up_interruptible(q); ++ if (swaitqueue_active(q)) ++ swait_wake_interruptible(q); + + if (apic_lvtt_tscdeadline(apic)) + ktimer->expired_tscdeadline = ktimer->tscdeadline; +@@ -1169,8 +1169,36 @@ + __delay(tsc_deadline - guest_tsc); + } + ++static enum hrtimer_restart apic_timer_fn(struct hrtimer *data); ++ ++static void __apic_timer_expired(struct hrtimer *data) ++{ ++ int ret, i = 0; ++ enum hrtimer_restart r; ++ struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer); ++ ++ r = apic_timer_fn(data); ++ ++ if (r == HRTIMER_RESTART) { ++ do { ++ ret = hrtimer_start_expires(data, HRTIMER_MODE_ABS); ++ if (ret == -ETIME) ++ hrtimer_add_expires_ns(&ktimer->timer, ++ ktimer->period); ++ i++; ++ } while (ret == -ETIME && i < 10); ++ ++ if (ret == -ETIME) { ++ printk_once(KERN_ERR "%s: failed to reprogram timer\n", ++ __func__); ++ WARN_ON_ONCE(1); ++ } ++ } ++} ++ + static void start_apic_timer(struct kvm_lapic *apic) + { ++ int ret; + ktime_t now; + + atomic_set(&apic->lapic_timer.pending, 0); +@@ -1201,9 +1229,11 @@ + } + } + +- hrtimer_start(&apic->lapic_timer.timer, ++ ret = hrtimer_start(&apic->lapic_timer.timer, + ktime_add_ns(now, apic->lapic_timer.period), + HRTIMER_MODE_ABS); ++ if (ret == -ETIME) ++ __apic_timer_expired(&apic->lapic_timer.timer); + + apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016" + PRIx64 ", " +@@ -1235,8 +1265,10 @@ + do_div(ns, this_tsc_khz); + expire = ktime_add_ns(now, ns); + expire = ktime_sub_ns(expire, lapic_timer_advance_ns); +- hrtimer_start(&apic->lapic_timer.timer, ++ ret = hrtimer_start(&apic->lapic_timer.timer, + expire, HRTIMER_MODE_ABS); ++ if (ret == -ETIME) ++ __apic_timer_expired(&apic->lapic_timer.timer); + } else + apic_timer_expired(apic); + +@@ -1709,6 +1741,7 @@ + hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC, + HRTIMER_MODE_ABS); + apic->lapic_timer.timer.function = apic_timer_fn; ++ apic->lapic_timer.timer.irqsafe = 1; + + /* + * APIC is created enabled. This will prevent kvm_lapic_set_base from +@@ -1836,7 +1869,8 @@ + + timer = &vcpu->arch.apic->lapic_timer.timer; + if (hrtimer_cancel(timer)) +- hrtimer_start_expires(timer, HRTIMER_MODE_ABS); ++ if (hrtimer_start_expires(timer, HRTIMER_MODE_ABS) == -ETIME) ++ __apic_timer_expired(timer); + } + + /* +diff -Nur linux-4.1.26.orig/arch/x86/kvm/x86.c linux-4.1.26/arch/x86/kvm/x86.c +--- linux-4.1.26.orig/arch/x86/kvm/x86.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/kvm/x86.c 2016-06-19 15:30:58.619294727 +0200 +@@ -5810,6 +5810,13 @@ + goto out; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { ++ printk(KERN_ERR "RT requires X86_FEATURE_CONSTANT_TSC\n"); ++ return -EOPNOTSUPP; ++ } ++#endif ++ + r = kvm_mmu_module_init(); + if (r) + goto out_free_percpu; +diff -Nur linux-4.1.26.orig/arch/x86/lib/usercopy_32.c linux-4.1.26/arch/x86/lib/usercopy_32.c +--- linux-4.1.26.orig/arch/x86/lib/usercopy_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/lib/usercopy_32.c 2016-06-19 15:30:58.619294727 +0200 +@@ -647,7 +647,8 @@ + * @from: Source address, in kernel space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from kernel space to user space. + * +@@ -668,7 +669,8 @@ + * @from: Source address, in user space. + * @n: Number of bytes to copy. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Copy data from user space to kernel space. + * +diff -Nur linux-4.1.26.orig/arch/x86/mm/fault.c linux-4.1.26/arch/x86/mm/fault.c +--- linux-4.1.26.orig/arch/x86/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/mm/fault.c 2016-06-19 15:30:58.619294727 +0200 +@@ -13,6 +13,7 @@ + #include /* hstate_index_to_shift */ + #include /* prefetchw */ + #include /* exception_enter(), ... */ ++#include /* faulthandler_disabled() */ + + #include /* dotraplinkage, ... */ + #include /* pgd_*(), ... */ +@@ -1133,9 +1134,9 @@ + + /* + * If we're in an interrupt, have no user context or are running +- * in an atomic region then we must not take the fault: ++ * in a region with pagefaults disabled then we must not take the fault + */ +- if (unlikely(in_atomic() || !mm)) { ++ if (unlikely(faulthandler_disabled() || !mm)) { + bad_area_nosemaphore(regs, error_code, address); + return; + } +diff -Nur linux-4.1.26.orig/arch/x86/mm/highmem_32.c linux-4.1.26/arch/x86/mm/highmem_32.c +--- linux-4.1.26.orig/arch/x86/mm/highmem_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/mm/highmem_32.c 2016-06-19 15:30:58.619294727 +0200 +@@ -32,10 +32,11 @@ + */ + void *kmap_atomic_prot(struct page *page, pgprot_t prot) + { ++ pte_t pte = mk_pte(page, prot); + unsigned long vaddr; + int idx, type; + +- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ ++ preempt_disable_nort(); + pagefault_disable(); + + if (!PageHighMem(page)) +@@ -45,7 +46,10 @@ + idx = type + KM_TYPE_NR*smp_processor_id(); + vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); + BUG_ON(!pte_none(*(kmap_pte-idx))); +- set_pte(kmap_pte-idx, mk_pte(page, prot)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_pte(kmap_pte-idx, pte); + arch_flush_lazy_mmu_mode(); + + return (void *)vaddr; +@@ -88,6 +92,9 @@ + * is a bad idea also, in case the page changes cacheability + * attributes or becomes a protected page in a hypervisor. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = __pte(0); ++#endif + kpte_clear_flush(kmap_pte-idx, vaddr); + kmap_atomic_idx_pop(); + arch_flush_lazy_mmu_mode(); +@@ -100,6 +107,7 @@ + #endif + + pagefault_enable(); ++ preempt_enable_nort(); + } + EXPORT_SYMBOL(__kunmap_atomic); + +diff -Nur linux-4.1.26.orig/arch/x86/mm/iomap_32.c linux-4.1.26/arch/x86/mm/iomap_32.c +--- linux-4.1.26.orig/arch/x86/mm/iomap_32.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/mm/iomap_32.c 2016-06-19 15:30:58.619294727 +0200 +@@ -56,15 +56,22 @@ + + void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot) + { ++ pte_t pte = pfn_pte(pfn, prot); + unsigned long vaddr; + int idx, type; + ++ preempt_disable(); + pagefault_disable(); + + type = kmap_atomic_idx_push(); + idx = type + KM_TYPE_NR * smp_processor_id(); + vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); +- set_pte(kmap_pte - idx, pfn_pte(pfn, prot)); ++ WARN_ON(!pte_none(*(kmap_pte - idx))); ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = pte; ++#endif ++ set_pte(kmap_pte - idx, pte); + arch_flush_lazy_mmu_mode(); + + return (void *)vaddr; +@@ -112,10 +119,14 @@ + * is a bad idea also, in case the page changes cacheability + * attributes or becomes a protected page in a hypervisor. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ current->kmap_pte[type] = __pte(0); ++#endif + kpte_clear_flush(kmap_pte-idx, vaddr); + kmap_atomic_idx_pop(); + } + + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL_GPL(iounmap_atomic); +diff -Nur linux-4.1.26.orig/arch/x86/platform/uv/tlb_uv.c linux-4.1.26/arch/x86/platform/uv/tlb_uv.c +--- linux-4.1.26.orig/arch/x86/platform/uv/tlb_uv.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/platform/uv/tlb_uv.c 2016-06-19 15:30:58.619294727 +0200 +@@ -714,9 +714,9 @@ + + quiesce_local_uvhub(hmaster); + +- spin_lock(&hmaster->queue_lock); ++ raw_spin_lock(&hmaster->queue_lock); + reset_with_ipi(&bau_desc->distribution, bcp); +- spin_unlock(&hmaster->queue_lock); ++ raw_spin_unlock(&hmaster->queue_lock); + + end_uvhub_quiesce(hmaster); + +@@ -736,9 +736,9 @@ + + quiesce_local_uvhub(hmaster); + +- spin_lock(&hmaster->queue_lock); ++ raw_spin_lock(&hmaster->queue_lock); + reset_with_ipi(&bau_desc->distribution, bcp); +- spin_unlock(&hmaster->queue_lock); ++ raw_spin_unlock(&hmaster->queue_lock); + + end_uvhub_quiesce(hmaster); + +@@ -759,7 +759,7 @@ + cycles_t tm1; + + hmaster = bcp->uvhub_master; +- spin_lock(&hmaster->disable_lock); ++ raw_spin_lock(&hmaster->disable_lock); + if (!bcp->baudisabled) { + stat->s_bau_disabled++; + tm1 = get_cycles(); +@@ -772,7 +772,7 @@ + } + } + } +- spin_unlock(&hmaster->disable_lock); ++ raw_spin_unlock(&hmaster->disable_lock); + } + + static void count_max_concurr(int stat, struct bau_control *bcp, +@@ -835,7 +835,7 @@ + */ + static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat) + { +- spinlock_t *lock = &hmaster->uvhub_lock; ++ raw_spinlock_t *lock = &hmaster->uvhub_lock; + atomic_t *v; + + v = &hmaster->active_descriptor_count; +@@ -968,7 +968,7 @@ + struct bau_control *hmaster; + + hmaster = bcp->uvhub_master; +- spin_lock(&hmaster->disable_lock); ++ raw_spin_lock(&hmaster->disable_lock); + if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) { + stat->s_bau_reenabled++; + for_each_present_cpu(tcpu) { +@@ -980,10 +980,10 @@ + tbcp->period_giveups = 0; + } + } +- spin_unlock(&hmaster->disable_lock); ++ raw_spin_unlock(&hmaster->disable_lock); + return 0; + } +- spin_unlock(&hmaster->disable_lock); ++ raw_spin_unlock(&hmaster->disable_lock); + return -1; + } + +@@ -1901,9 +1901,9 @@ + bcp->cong_reps = congested_reps; + bcp->disabled_period = sec_2_cycles(disabled_period); + bcp->giveup_limit = giveup_limit; +- spin_lock_init(&bcp->queue_lock); +- spin_lock_init(&bcp->uvhub_lock); +- spin_lock_init(&bcp->disable_lock); ++ raw_spin_lock_init(&bcp->queue_lock); ++ raw_spin_lock_init(&bcp->uvhub_lock); ++ raw_spin_lock_init(&bcp->disable_lock); + } + } + +diff -Nur linux-4.1.26.orig/arch/x86/platform/uv/uv_time.c linux-4.1.26/arch/x86/platform/uv/uv_time.c +--- linux-4.1.26.orig/arch/x86/platform/uv/uv_time.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/x86/platform/uv/uv_time.c 2016-06-19 15:30:58.623294881 +0200 +@@ -58,7 +58,7 @@ + + /* There is one of these allocated per node */ + struct uv_rtc_timer_head { +- spinlock_t lock; ++ raw_spinlock_t lock; + /* next cpu waiting for timer, local node relative: */ + int next_cpu; + /* number of cpus on this node: */ +@@ -178,7 +178,7 @@ + uv_rtc_deallocate_timers(); + return -ENOMEM; + } +- spin_lock_init(&head->lock); ++ raw_spin_lock_init(&head->lock); + head->ncpus = uv_blade_nr_possible_cpus(bid); + head->next_cpu = -1; + blade_info[bid] = head; +@@ -232,7 +232,7 @@ + unsigned long flags; + int next_cpu; + +- spin_lock_irqsave(&head->lock, flags); ++ raw_spin_lock_irqsave(&head->lock, flags); + + next_cpu = head->next_cpu; + *t = expires; +@@ -244,12 +244,12 @@ + if (uv_setup_intr(cpu, expires)) { + *t = ULLONG_MAX; + uv_rtc_find_next_timer(head, pnode); +- spin_unlock_irqrestore(&head->lock, flags); ++ raw_spin_unlock_irqrestore(&head->lock, flags); + return -ETIME; + } + } + +- spin_unlock_irqrestore(&head->lock, flags); ++ raw_spin_unlock_irqrestore(&head->lock, flags); + return 0; + } + +@@ -268,7 +268,7 @@ + unsigned long flags; + int rc = 0; + +- spin_lock_irqsave(&head->lock, flags); ++ raw_spin_lock_irqsave(&head->lock, flags); + + if ((head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) || force) + rc = 1; +@@ -280,7 +280,7 @@ + uv_rtc_find_next_timer(head, pnode); + } + +- spin_unlock_irqrestore(&head->lock, flags); ++ raw_spin_unlock_irqrestore(&head->lock, flags); + + return rc; + } +@@ -300,13 +300,18 @@ + static cycle_t uv_read_rtc(struct clocksource *cs) + { + unsigned long offset; ++ cycle_t cycles; + ++ preempt_disable(); + if (uv_get_min_hub_revision_id() == 1) + offset = 0; + else + offset = (uv_blade_processor_id() * L1_CACHE_BYTES) % PAGE_SIZE; + +- return (cycle_t)uv_read_local_mmr(UVH_RTC | offset); ++ cycles = (cycle_t)uv_read_local_mmr(UVH_RTC | offset); ++ preempt_enable(); ++ ++ return cycles; + } + + /* +diff -Nur linux-4.1.26.orig/arch/xtensa/mm/fault.c linux-4.1.26/arch/xtensa/mm/fault.c +--- linux-4.1.26.orig/arch/xtensa/mm/fault.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/xtensa/mm/fault.c 2016-06-19 15:30:58.623294881 +0200 +@@ -15,10 +15,10 @@ + #include + #include + #include ++#include + #include + #include + #include +-#include + #include + + DEFINE_PER_CPU(unsigned long, asid_cache) = ASID_USER_FIRST; +@@ -57,7 +57,7 @@ + /* If we're in an interrupt or have no user + * context, we must not take the fault.. + */ +- if (in_atomic() || !mm) { ++ if (faulthandler_disabled() || !mm) { + bad_page_fault(regs, address, SIGSEGV); + return; + } +diff -Nur linux-4.1.26.orig/arch/xtensa/mm/highmem.c linux-4.1.26/arch/xtensa/mm/highmem.c +--- linux-4.1.26.orig/arch/xtensa/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/arch/xtensa/mm/highmem.c 2016-06-19 15:30:58.623294881 +0200 +@@ -42,6 +42,7 @@ + enum fixed_addresses idx; + unsigned long vaddr; + ++ preempt_disable(); + pagefault_disable(); + if (!PageHighMem(page)) + return page_address(page); +@@ -79,6 +80,7 @@ + } + + pagefault_enable(); ++ preempt_enable(); + } + EXPORT_SYMBOL(__kunmap_atomic); + +diff -Nur linux-4.1.26.orig/block/blk-core.c linux-4.1.26/block/blk-core.c +--- linux-4.1.26.orig/block/blk-core.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-core.c 2016-06-19 15:30:58.623294881 +0200 +@@ -100,6 +100,9 @@ + + INIT_LIST_HEAD(&rq->queuelist); + INIT_LIST_HEAD(&rq->timeout_list); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ INIT_WORK(&rq->work, __blk_mq_complete_request_remote_work); ++#endif + rq->cpu = -1; + rq->q = q; + rq->__sector = (sector_t) -1; +@@ -194,7 +197,7 @@ + **/ + void blk_start_queue(struct request_queue *q) + { +- WARN_ON(!irqs_disabled()); ++ WARN_ON_NONRT(!irqs_disabled()); + + queue_flag_clear(QUEUE_FLAG_STOPPED, q); + __blk_run_queue(q); +@@ -661,7 +664,7 @@ + q->bypass_depth = 1; + __set_bit(QUEUE_FLAG_BYPASS, &q->queue_flags); + +- init_waitqueue_head(&q->mq_freeze_wq); ++ init_swait_head(&q->mq_freeze_wq); + + if (blkcg_init_queue(q)) + goto fail_bdi; +@@ -3077,7 +3080,7 @@ + blk_run_queue_async(q); + else + __blk_run_queue(q); +- spin_unlock(q->queue_lock); ++ spin_unlock_irq(q->queue_lock); + } + + static void flush_plug_callbacks(struct blk_plug *plug, bool from_schedule) +@@ -3125,7 +3128,6 @@ + void blk_flush_plug_list(struct blk_plug *plug, bool from_schedule) + { + struct request_queue *q; +- unsigned long flags; + struct request *rq; + LIST_HEAD(list); + unsigned int depth; +@@ -3145,11 +3147,6 @@ + q = NULL; + depth = 0; + +- /* +- * Save and disable interrupts here, to avoid doing it for every +- * queue lock we have to take. +- */ +- local_irq_save(flags); + while (!list_empty(&list)) { + rq = list_entry_rq(list.next); + list_del_init(&rq->queuelist); +@@ -3162,7 +3159,7 @@ + queue_unplugged(q, depth, from_schedule); + q = rq->q; + depth = 0; +- spin_lock(q->queue_lock); ++ spin_lock_irq(q->queue_lock); + } + + /* +@@ -3189,8 +3186,6 @@ + */ + if (q) + queue_unplugged(q, depth, from_schedule); +- +- local_irq_restore(flags); + } + + void blk_finish_plug(struct blk_plug *plug) +diff -Nur linux-4.1.26.orig/block/blk-ioc.c linux-4.1.26/block/blk-ioc.c +--- linux-4.1.26.orig/block/blk-ioc.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-ioc.c 2016-06-19 15:30:58.623294881 +0200 +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + + #include "blk.h" + +@@ -109,7 +110,7 @@ + spin_unlock(q->queue_lock); + } else { + spin_unlock_irqrestore(&ioc->lock, flags); +- cpu_relax(); ++ cpu_chill(); + spin_lock_irqsave_nested(&ioc->lock, flags, 1); + } + } +@@ -187,7 +188,7 @@ + spin_unlock(icq->q->queue_lock); + } else { + spin_unlock_irqrestore(&ioc->lock, flags); +- cpu_relax(); ++ cpu_chill(); + goto retry; + } + } +diff -Nur linux-4.1.26.orig/block/blk-iopoll.c linux-4.1.26/block/blk-iopoll.c +--- linux-4.1.26.orig/block/blk-iopoll.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-iopoll.c 2016-06-19 15:30:58.623294881 +0200 +@@ -35,6 +35,7 @@ + list_add_tail(&iop->list, this_cpu_ptr(&blk_cpu_iopoll)); + __raise_softirq_irqoff(BLOCK_IOPOLL_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(blk_iopoll_sched); + +@@ -132,6 +133,7 @@ + __raise_softirq_irqoff(BLOCK_IOPOLL_SOFTIRQ); + + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + /** +@@ -201,6 +203,7 @@ + this_cpu_ptr(&blk_cpu_iopoll)); + __raise_softirq_irqoff(BLOCK_IOPOLL_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + return NOTIFY_OK; +diff -Nur linux-4.1.26.orig/block/blk-mq.c linux-4.1.26/block/blk-mq.c +--- linux-4.1.26.orig/block/blk-mq.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-mq.c 2016-06-19 15:30:58.623294881 +0200 +@@ -88,7 +88,7 @@ + if (!(gfp & __GFP_WAIT)) + return -EBUSY; + +- ret = wait_event_interruptible(q->mq_freeze_wq, ++ ret = swait_event_interruptible(q->mq_freeze_wq, + !q->mq_freeze_depth || blk_queue_dying(q)); + if (blk_queue_dying(q)) + return -ENODEV; +@@ -107,7 +107,7 @@ + struct request_queue *q = + container_of(ref, struct request_queue, mq_usage_counter); + +- wake_up_all(&q->mq_freeze_wq); ++ swait_wake_all(&q->mq_freeze_wq); + } + + void blk_mq_freeze_queue_start(struct request_queue *q) +@@ -127,7 +127,7 @@ + + static void blk_mq_freeze_queue_wait(struct request_queue *q) + { +- wait_event(q->mq_freeze_wq, percpu_ref_is_zero(&q->mq_usage_counter)); ++ swait_event(q->mq_freeze_wq, percpu_ref_is_zero(&q->mq_usage_counter)); + } + + /* +@@ -151,7 +151,7 @@ + spin_unlock_irq(q->queue_lock); + if (wake) { + percpu_ref_reinit(&q->mq_usage_counter); +- wake_up_all(&q->mq_freeze_wq); ++ swait_wake_all(&q->mq_freeze_wq); + } + } + EXPORT_SYMBOL_GPL(blk_mq_unfreeze_queue); +@@ -170,7 +170,7 @@ + * dying, we need to ensure that processes currently waiting on + * the queue are notified as well. + */ +- wake_up_all(&q->mq_freeze_wq); ++ swait_wake_all(&q->mq_freeze_wq); + } + + bool blk_mq_can_queue(struct blk_mq_hw_ctx *hctx) +@@ -217,6 +217,9 @@ + rq->resid_len = 0; + rq->sense = NULL; + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ INIT_WORK(&rq->work, __blk_mq_complete_request_remote_work); ++#endif + INIT_LIST_HEAD(&rq->timeout_list); + rq->timeout = 0; + +@@ -346,6 +349,17 @@ + } + EXPORT_SYMBOL(blk_mq_end_request); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++void __blk_mq_complete_request_remote_work(struct work_struct *work) ++{ ++ struct request *rq = container_of(work, struct request, work); ++ ++ rq->q->softirq_done_fn(rq); ++} ++ ++#else ++ + static void __blk_mq_complete_request_remote(void *data) + { + struct request *rq = data; +@@ -353,6 +367,8 @@ + rq->q->softirq_done_fn(rq); + } + ++#endif ++ + static void blk_mq_ipi_complete_request(struct request *rq) + { + struct blk_mq_ctx *ctx = rq->mq_ctx; +@@ -364,19 +380,23 @@ + return; + } + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + if (!test_bit(QUEUE_FLAG_SAME_FORCE, &rq->q->queue_flags)) + shared = cpus_share_cache(cpu, ctx->cpu); + + if (cpu != ctx->cpu && !shared && cpu_online(ctx->cpu)) { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ schedule_work_on(ctx->cpu, &rq->work); ++#else + rq->csd.func = __blk_mq_complete_request_remote; + rq->csd.info = rq; + rq->csd.flags = 0; + smp_call_function_single_async(ctx->cpu, &rq->csd); ++#endif + } else { + rq->q->softirq_done_fn(rq); + } +- put_cpu(); ++ put_cpu_light(); + } + + void __blk_mq_complete_request(struct request *rq) +@@ -905,14 +925,14 @@ + return; + + if (!async) { +- int cpu = get_cpu(); ++ int cpu = get_cpu_light(); + if (cpumask_test_cpu(cpu, hctx->cpumask)) { + __blk_mq_run_hw_queue(hctx); +- put_cpu(); ++ put_cpu_light(); + return; + } + +- put_cpu(); ++ put_cpu_light(); + } + + kblockd_schedule_delayed_work_on(blk_mq_hctx_next_cpu(hctx), +@@ -1589,7 +1609,7 @@ + { + struct blk_mq_hw_ctx *hctx = data; + +- if (action == CPU_DEAD || action == CPU_DEAD_FROZEN) ++ if (action == CPU_POST_DEAD) + return blk_mq_hctx_cpu_offline(hctx, cpu); + + /* +diff -Nur linux-4.1.26.orig/block/blk-mq-cpu.c linux-4.1.26/block/blk-mq-cpu.c +--- linux-4.1.26.orig/block/blk-mq-cpu.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-mq-cpu.c 2016-06-19 15:30:58.623294881 +0200 +@@ -16,7 +16,7 @@ + #include "blk-mq.h" + + static LIST_HEAD(blk_mq_cpu_notify_list); +-static DEFINE_RAW_SPINLOCK(blk_mq_cpu_notify_lock); ++static DEFINE_SPINLOCK(blk_mq_cpu_notify_lock); + + static int blk_mq_main_cpu_notify(struct notifier_block *self, + unsigned long action, void *hcpu) +@@ -25,7 +25,10 @@ + struct blk_mq_cpu_notifier *notify; + int ret = NOTIFY_OK; + +- raw_spin_lock(&blk_mq_cpu_notify_lock); ++ if (action != CPU_POST_DEAD) ++ return NOTIFY_OK; ++ ++ spin_lock(&blk_mq_cpu_notify_lock); + + list_for_each_entry(notify, &blk_mq_cpu_notify_list, list) { + ret = notify->notify(notify->data, action, cpu); +@@ -33,7 +36,7 @@ + break; + } + +- raw_spin_unlock(&blk_mq_cpu_notify_lock); ++ spin_unlock(&blk_mq_cpu_notify_lock); + return ret; + } + +@@ -41,16 +44,16 @@ + { + BUG_ON(!notifier->notify); + +- raw_spin_lock(&blk_mq_cpu_notify_lock); ++ spin_lock(&blk_mq_cpu_notify_lock); + list_add_tail(¬ifier->list, &blk_mq_cpu_notify_list); +- raw_spin_unlock(&blk_mq_cpu_notify_lock); ++ spin_unlock(&blk_mq_cpu_notify_lock); + } + + void blk_mq_unregister_cpu_notifier(struct blk_mq_cpu_notifier *notifier) + { +- raw_spin_lock(&blk_mq_cpu_notify_lock); ++ spin_lock(&blk_mq_cpu_notify_lock); + list_del(¬ifier->list); +- raw_spin_unlock(&blk_mq_cpu_notify_lock); ++ spin_unlock(&blk_mq_cpu_notify_lock); + } + + void blk_mq_init_cpu_notifier(struct blk_mq_cpu_notifier *notifier, +diff -Nur linux-4.1.26.orig/block/blk-mq.h linux-4.1.26/block/blk-mq.h +--- linux-4.1.26.orig/block/blk-mq.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-mq.h 2016-06-19 15:30:58.623294881 +0200 +@@ -76,7 +76,10 @@ + static inline struct blk_mq_ctx *__blk_mq_get_ctx(struct request_queue *q, + unsigned int cpu) + { +- return per_cpu_ptr(q->queue_ctx, cpu); ++ struct blk_mq_ctx *ctx; ++ ++ ctx = per_cpu_ptr(q->queue_ctx, cpu); ++ return ctx; + } + + /* +@@ -87,12 +90,12 @@ + */ + static inline struct blk_mq_ctx *blk_mq_get_ctx(struct request_queue *q) + { +- return __blk_mq_get_ctx(q, get_cpu()); ++ return __blk_mq_get_ctx(q, get_cpu_light()); + } + + static inline void blk_mq_put_ctx(struct blk_mq_ctx *ctx) + { +- put_cpu(); ++ put_cpu_light(); + } + + struct blk_mq_alloc_data { +diff -Nur linux-4.1.26.orig/block/blk-softirq.c linux-4.1.26/block/blk-softirq.c +--- linux-4.1.26.orig/block/blk-softirq.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/blk-softirq.c 2016-06-19 15:30:58.623294881 +0200 +@@ -51,6 +51,7 @@ + raise_softirq_irqoff(BLOCK_SOFTIRQ); + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + + /* +@@ -93,6 +94,7 @@ + this_cpu_ptr(&blk_cpu_done)); + raise_softirq_irqoff(BLOCK_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + return NOTIFY_OK; +@@ -150,6 +152,7 @@ + goto do_local; + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + + /** +diff -Nur linux-4.1.26.orig/block/bounce.c linux-4.1.26/block/bounce.c +--- linux-4.1.26.orig/block/bounce.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/block/bounce.c 2016-06-19 15:30:58.623294881 +0200 +@@ -54,11 +54,11 @@ + unsigned long flags; + unsigned char *vto; + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + vto = kmap_atomic(to->bv_page); + memcpy(vto + to->bv_offset, vfrom, to->bv_len); + kunmap_atomic(vto); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + + #else /* CONFIG_HIGHMEM */ +diff -Nur linux-4.1.26.orig/crypto/algapi.c linux-4.1.26/crypto/algapi.c +--- linux-4.1.26.orig/crypto/algapi.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/crypto/algapi.c 2016-06-19 15:30:58.623294881 +0200 +@@ -695,13 +695,13 @@ + + int crypto_register_notifier(struct notifier_block *nb) + { +- return blocking_notifier_chain_register(&crypto_chain, nb); ++ return srcu_notifier_chain_register(&crypto_chain, nb); + } + EXPORT_SYMBOL_GPL(crypto_register_notifier); + + int crypto_unregister_notifier(struct notifier_block *nb) + { +- return blocking_notifier_chain_unregister(&crypto_chain, nb); ++ return srcu_notifier_chain_unregister(&crypto_chain, nb); + } + EXPORT_SYMBOL_GPL(crypto_unregister_notifier); + +diff -Nur linux-4.1.26.orig/crypto/api.c linux-4.1.26/crypto/api.c +--- linux-4.1.26.orig/crypto/api.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/crypto/api.c 2016-06-19 15:30:58.623294881 +0200 +@@ -31,7 +31,7 @@ + DECLARE_RWSEM(crypto_alg_sem); + EXPORT_SYMBOL_GPL(crypto_alg_sem); + +-BLOCKING_NOTIFIER_HEAD(crypto_chain); ++SRCU_NOTIFIER_HEAD(crypto_chain); + EXPORT_SYMBOL_GPL(crypto_chain); + + static struct crypto_alg *crypto_larval_wait(struct crypto_alg *alg); +@@ -236,10 +236,10 @@ + { + int ok; + +- ok = blocking_notifier_call_chain(&crypto_chain, val, v); ++ ok = srcu_notifier_call_chain(&crypto_chain, val, v); + if (ok == NOTIFY_DONE) { + request_module("cryptomgr"); +- ok = blocking_notifier_call_chain(&crypto_chain, val, v); ++ ok = srcu_notifier_call_chain(&crypto_chain, val, v); + } + + return ok; +diff -Nur linux-4.1.26.orig/crypto/internal.h linux-4.1.26/crypto/internal.h +--- linux-4.1.26.orig/crypto/internal.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/crypto/internal.h 2016-06-19 15:30:58.623294881 +0200 +@@ -48,7 +48,7 @@ + + extern struct list_head crypto_alg_list; + extern struct rw_semaphore crypto_alg_sem; +-extern struct blocking_notifier_head crypto_chain; ++extern struct srcu_notifier_head crypto_chain; + + #ifdef CONFIG_PROC_FS + void __init crypto_init_proc(void); +@@ -142,7 +142,7 @@ + + static inline void crypto_notify(unsigned long val, void *v) + { +- blocking_notifier_call_chain(&crypto_chain, val, v); ++ srcu_notifier_call_chain(&crypto_chain, val, v); + } + + #endif /* _CRYPTO_INTERNAL_H */ +diff -Nur linux-4.1.26.orig/Documentation/hwlat_detector.txt linux-4.1.26/Documentation/hwlat_detector.txt +--- linux-4.1.26.orig/Documentation/hwlat_detector.txt 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/Documentation/hwlat_detector.txt 2016-06-19 15:30:54.915151887 +0200 +@@ -0,0 +1,64 @@ ++Introduction: ++------------- ++ ++The module hwlat_detector is a special purpose kernel module that is used to ++detect large system latencies induced by the behavior of certain underlying ++hardware or firmware, independent of Linux itself. The code was developed ++originally to detect SMIs (System Management Interrupts) on x86 systems, ++however there is nothing x86 specific about this patchset. It was ++originally written for use by the "RT" patch since the Real Time ++kernel is highly latency sensitive. ++ ++SMIs are usually not serviced by the Linux kernel, which typically does not ++even know that they are occuring. SMIs are instead are set up by BIOS code ++and are serviced by BIOS code, usually for "critical" events such as ++management of thermal sensors and fans. Sometimes though, SMIs are used for ++other tasks and those tasks can spend an inordinate amount of time in the ++handler (sometimes measured in milliseconds). Obviously this is a problem if ++you are trying to keep event service latencies down in the microsecond range. ++ ++The hardware latency detector works by hogging all of the cpus for configurable ++amounts of time (by calling stop_machine()), polling the CPU Time Stamp Counter ++for some period, then looking for gaps in the TSC data. Any gap indicates a ++time when the polling was interrupted and since the machine is stopped and ++interrupts turned off the only thing that could do that would be an SMI. ++ ++Note that the SMI detector should *NEVER* be used in a production environment. ++It is intended to be run manually to determine if the hardware platform has a ++problem with long system firmware service routines. ++ ++Usage: ++------ ++ ++Loading the module hwlat_detector passing the parameter "enabled=1" (or by ++setting the "enable" entry in "hwlat_detector" debugfs toggled on) is the only ++step required to start the hwlat_detector. It is possible to redefine the ++threshold in microseconds (us) above which latency spikes will be taken ++into account (parameter "threshold="). ++ ++Example: ++ ++ # modprobe hwlat_detector enabled=1 threshold=100 ++ ++After the module is loaded, it creates a directory named "hwlat_detector" under ++the debugfs mountpoint, "/debug/hwlat_detector" for this text. It is necessary ++to have debugfs mounted, which might be on /sys/debug on your system. ++ ++The /debug/hwlat_detector interface contains the following files: ++ ++count - number of latency spikes observed since last reset ++enable - a global enable/disable toggle (0/1), resets count ++max - maximum hardware latency actually observed (usecs) ++sample - a pipe from which to read current raw sample data ++ in the format ++ (can be opened O_NONBLOCK for a single sample) ++threshold - minimum latency value to be considered (usecs) ++width - time period to sample with CPUs held (usecs) ++ must be less than the total window size (enforced) ++window - total period of sampling, width being inside (usecs) ++ ++By default we will set width to 500,000 and window to 1,000,000, meaning that ++we will sample every 1,000,000 usecs (1s) for 500,000 usecs (0.5s). If we ++observe any latencies that exceed the threshold (initially 100 usecs), ++then we write to a global sample ring buffer of 8K samples, which is ++consumed by reading from the "sample" (pipe) debugfs file interface. +diff -Nur linux-4.1.26.orig/Documentation/sysrq.txt linux-4.1.26/Documentation/sysrq.txt +--- linux-4.1.26.orig/Documentation/sysrq.txt 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/Documentation/sysrq.txt 2016-06-19 15:30:54.915151887 +0200 +@@ -59,10 +59,17 @@ + On other - If you know of the key combos for other architectures, please + let me know so I can add them to this section. + +-On all - write a character to /proc/sysrq-trigger. e.g.: +- ++On all - write a character to /proc/sysrq-trigger, e.g.: + echo t > /proc/sysrq-trigger + ++On all - Enable network SysRq by writing a cookie to icmp_echo_sysrq, e.g. ++ echo 0x01020304 >/proc/sys/net/ipv4/icmp_echo_sysrq ++ Send an ICMP echo request with this pattern plus the particular ++ SysRq command key. Example: ++ # ping -c1 -s57 -p0102030468 ++ will trigger the SysRq-H (help) command. ++ ++ + * What are the 'command' keys? + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + 'b' - Will immediately reboot the system without syncing or unmounting +diff -Nur linux-4.1.26.orig/Documentation/trace/histograms.txt linux-4.1.26/Documentation/trace/histograms.txt +--- linux-4.1.26.orig/Documentation/trace/histograms.txt 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/Documentation/trace/histograms.txt 2016-06-19 15:30:54.915151887 +0200 +@@ -0,0 +1,186 @@ ++ Using the Linux Kernel Latency Histograms ++ ++ ++This document gives a short explanation how to enable, configure and use ++latency histograms. Latency histograms are primarily relevant in the ++context of real-time enabled kernels (CONFIG_PREEMPT/CONFIG_PREEMPT_RT) ++and are used in the quality management of the Linux real-time ++capabilities. ++ ++ ++* Purpose of latency histograms ++ ++A latency histogram continuously accumulates the frequencies of latency ++data. There are two types of histograms ++- potential sources of latencies ++- effective latencies ++ ++ ++* Potential sources of latencies ++ ++Potential sources of latencies are code segments where interrupts, ++preemption or both are disabled (aka critical sections). To create ++histograms of potential sources of latency, the kernel stores the time ++stamp at the start of a critical section, determines the time elapsed ++when the end of the section is reached, and increments the frequency ++counter of that latency value - irrespective of whether any concurrently ++running process is affected by latency or not. ++- Configuration items (in the Kernel hacking/Tracers submenu) ++ CONFIG_INTERRUPT_OFF_LATENCY ++ CONFIG_PREEMPT_OFF_LATENCY ++ ++ ++* Effective latencies ++ ++Effective latencies are actually occuring during wakeup of a process. To ++determine effective latencies, the kernel stores the time stamp when a ++process is scheduled to be woken up, and determines the duration of the ++wakeup time shortly before control is passed over to this process. Note ++that the apparent latency in user space may be somewhat longer, since the ++process may be interrupted after control is passed over to it but before ++the execution in user space takes place. Simply measuring the interval ++between enqueuing and wakeup may also not appropriate in cases when a ++process is scheduled as a result of a timer expiration. The timer may have ++missed its deadline, e.g. due to disabled interrupts, but this latency ++would not be registered. Therefore, the offsets of missed timers are ++recorded in a separate histogram. If both wakeup latency and missed timer ++offsets are configured and enabled, a third histogram may be enabled that ++records the overall latency as a sum of the timer latency, if any, and the ++wakeup latency. This histogram is called "timerandwakeup". ++- Configuration items (in the Kernel hacking/Tracers submenu) ++ CONFIG_WAKEUP_LATENCY ++ CONFIG_MISSED_TIMER_OFSETS ++ ++ ++* Usage ++ ++The interface to the administration of the latency histograms is located ++in the debugfs file system. To mount it, either enter ++ ++mount -t sysfs nodev /sys ++mount -t debugfs nodev /sys/kernel/debug ++ ++from shell command line level, or add ++ ++nodev /sys sysfs defaults 0 0 ++nodev /sys/kernel/debug debugfs defaults 0 0 ++ ++to the file /etc/fstab. All latency histogram related files are then ++available in the directory /sys/kernel/debug/tracing/latency_hist. A ++particular histogram type is enabled by writing non-zero to the related ++variable in the /sys/kernel/debug/tracing/latency_hist/enable directory. ++Select "preemptirqsoff" for the histograms of potential sources of ++latencies and "wakeup" for histograms of effective latencies etc. The ++histogram data - one per CPU - are available in the files ++ ++/sys/kernel/debug/tracing/latency_hist/preemptoff/CPUx ++/sys/kernel/debug/tracing/latency_hist/irqsoff/CPUx ++/sys/kernel/debug/tracing/latency_hist/preemptirqsoff/CPUx ++/sys/kernel/debug/tracing/latency_hist/wakeup/CPUx ++/sys/kernel/debug/tracing/latency_hist/wakeup/sharedprio/CPUx ++/sys/kernel/debug/tracing/latency_hist/missed_timer_offsets/CPUx ++/sys/kernel/debug/tracing/latency_hist/timerandwakeup/CPUx ++ ++The histograms are reset by writing non-zero to the file "reset" in a ++particular latency directory. To reset all latency data, use ++ ++#!/bin/sh ++ ++TRACINGDIR=/sys/kernel/debug/tracing ++HISTDIR=$TRACINGDIR/latency_hist ++ ++if test -d $HISTDIR ++then ++ cd $HISTDIR ++ for i in `find . | grep /reset$` ++ do ++ echo 1 >$i ++ done ++fi ++ ++ ++* Data format ++ ++Latency data are stored with a resolution of one microsecond. The ++maximum latency is 10,240 microseconds. The data are only valid, if the ++overflow register is empty. Every output line contains the latency in ++microseconds in the first row and the number of samples in the second ++row. To display only lines with a positive latency count, use, for ++example, ++ ++grep -v " 0$" /sys/kernel/debug/tracing/latency_hist/preemptoff/CPU0 ++ ++#Minimum latency: 0 microseconds. ++#Average latency: 0 microseconds. ++#Maximum latency: 25 microseconds. ++#Total samples: 3104770694 ++#There are 0 samples greater or equal than 10240 microseconds ++#usecs samples ++ 0 2984486876 ++ 1 49843506 ++ 2 58219047 ++ 3 5348126 ++ 4 2187960 ++ 5 3388262 ++ 6 959289 ++ 7 208294 ++ 8 40420 ++ 9 4485 ++ 10 14918 ++ 11 18340 ++ 12 25052 ++ 13 19455 ++ 14 5602 ++ 15 969 ++ 16 47 ++ 17 18 ++ 18 14 ++ 19 1 ++ 20 3 ++ 21 2 ++ 22 5 ++ 23 2 ++ 25 1 ++ ++ ++* Wakeup latency of a selected process ++ ++To only collect wakeup latency data of a particular process, write the ++PID of the requested process to ++ ++/sys/kernel/debug/tracing/latency_hist/wakeup/pid ++ ++PIDs are not considered, if this variable is set to 0. ++ ++ ++* Details of the process with the highest wakeup latency so far ++ ++Selected data of the process that suffered from the highest wakeup ++latency that occurred in a particular CPU are available in the file ++ ++/sys/kernel/debug/tracing/latency_hist/wakeup/max_latency-CPUx. ++ ++In addition, other relevant system data at the time when the ++latency occurred are given. ++ ++The format of the data is (all in one line): ++ () \ ++<- ++ ++The value of is only relevant in the combined timer ++and wakeup latency recording. In the wakeup recording, it is ++always 0, in the missed_timer_offsets recording, it is the same ++as . ++ ++When retrospectively searching for the origin of a latency and ++tracing was not enabled, it may be helpful to know the name and ++some basic data of the task that (finally) was switching to the ++late real-tlme task. In addition to the victim's data, also the ++data of the possible culprit are therefore displayed after the ++"<-" symbol. ++ ++Finally, the timestamp of the time when the latency occurred ++in . after the most recent system boot ++is provided. ++ ++These data are also reset when the wakeup histogram is reset. +diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/acglobal.h linux-4.1.26/drivers/acpi/acpica/acglobal.h +--- linux-4.1.26.orig/drivers/acpi/acpica/acglobal.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/acpi/acpica/acglobal.h 2016-06-19 15:30:58.627295036 +0200 +@@ -112,7 +112,7 @@ + * interrupt level + */ + ACPI_GLOBAL(acpi_spinlock, acpi_gbl_gpe_lock); /* For GPE data structs and registers */ +-ACPI_GLOBAL(acpi_spinlock, acpi_gbl_hardware_lock); /* For ACPI H/W except GPE registers */ ++ACPI_GLOBAL(acpi_raw_spinlock, acpi_gbl_hardware_lock); /* For ACPI H/W except GPE registers */ + ACPI_GLOBAL(acpi_spinlock, acpi_gbl_reference_count_lock); + + /* Mutex for _OSI support */ +diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/hwregs.c linux-4.1.26/drivers/acpi/acpica/hwregs.c +--- linux-4.1.26.orig/drivers/acpi/acpica/hwregs.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/acpi/acpica/hwregs.c 2016-06-19 15:30:58.627295036 +0200 +@@ -269,14 +269,14 @@ + ACPI_BITMASK_ALL_FIXED_STATUS, + ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address))); + +- lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock); ++ raw_spin_lock_irqsave(acpi_gbl_hardware_lock, lock_flags); + + /* Clear the fixed events in PM1 A/B */ + + status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS, + ACPI_BITMASK_ALL_FIXED_STATUS); + +- acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags); ++ raw_spin_unlock_irqrestore(acpi_gbl_hardware_lock, lock_flags); + + if (ACPI_FAILURE(status)) { + goto exit; +diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/hwxface.c linux-4.1.26/drivers/acpi/acpica/hwxface.c +--- linux-4.1.26.orig/drivers/acpi/acpica/hwxface.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/acpi/acpica/hwxface.c 2016-06-19 15:30:58.627295036 +0200 +@@ -374,7 +374,7 @@ + return_ACPI_STATUS(AE_BAD_PARAMETER); + } + +- lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock); ++ raw_spin_lock_irqsave(acpi_gbl_hardware_lock, lock_flags); + + /* + * At this point, we know that the parent register is one of the +@@ -435,7 +435,7 @@ + + unlock_and_exit: + +- acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags); ++ raw_spin_unlock_irqrestore(acpi_gbl_hardware_lock, lock_flags); + return_ACPI_STATUS(status); + } + +diff -Nur linux-4.1.26.orig/drivers/acpi/acpica/utmutex.c linux-4.1.26/drivers/acpi/acpica/utmutex.c +--- linux-4.1.26.orig/drivers/acpi/acpica/utmutex.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/acpi/acpica/utmutex.c 2016-06-19 15:30:58.627295036 +0200 +@@ -88,7 +88,7 @@ + return_ACPI_STATUS (status); + } + +- status = acpi_os_create_lock (&acpi_gbl_hardware_lock); ++ status = acpi_os_create_raw_lock (&acpi_gbl_hardware_lock); + if (ACPI_FAILURE (status)) { + return_ACPI_STATUS (status); + } +@@ -141,7 +141,7 @@ + /* Delete the spinlocks */ + + acpi_os_delete_lock(acpi_gbl_gpe_lock); +- acpi_os_delete_lock(acpi_gbl_hardware_lock); ++ acpi_os_delete_raw_lock(acpi_gbl_hardware_lock); + acpi_os_delete_lock(acpi_gbl_reference_count_lock); + + /* Delete the reader/writer lock */ +diff -Nur linux-4.1.26.orig/drivers/ata/libata-sff.c linux-4.1.26/drivers/ata/libata-sff.c +--- linux-4.1.26.orig/drivers/ata/libata-sff.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ata/libata-sff.c 2016-06-19 15:30:58.627295036 +0200 +@@ -678,9 +678,9 @@ + unsigned long flags; + unsigned int consumed; + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + consumed = ata_sff_data_xfer32(dev, buf, buflen, rw); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + return consumed; + } +@@ -719,7 +719,7 @@ + unsigned long flags; + + /* FIXME: use a bounce buffer */ +- local_irq_save(flags); ++ local_irq_save_nort(flags); + buf = kmap_atomic(page); + + /* do the actual data transfer */ +@@ -727,7 +727,7 @@ + do_write); + + kunmap_atomic(buf); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } else { + buf = page_address(page); + ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size, +@@ -864,7 +864,7 @@ + unsigned long flags; + + /* FIXME: use bounce buffer */ +- local_irq_save(flags); ++ local_irq_save_nort(flags); + buf = kmap_atomic(page); + + /* do the actual data transfer */ +@@ -872,7 +872,7 @@ + count, rw); + + kunmap_atomic(buf); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } else { + buf = page_address(page); + consumed = ap->ops->sff_data_xfer(dev, buf + offset, +diff -Nur linux-4.1.26.orig/drivers/char/random.c linux-4.1.26/drivers/char/random.c +--- linux-4.1.26.orig/drivers/char/random.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/char/random.c 2016-06-19 15:30:58.627295036 +0200 +@@ -776,8 +776,6 @@ + } sample; + long delta, delta2, delta3; + +- preempt_disable(); +- + sample.jiffies = jiffies; + sample.cycles = random_get_entropy(); + sample.num = num; +@@ -818,7 +816,6 @@ + */ + credit_entropy_bits(r, min_t(int, fls(delta>>1), 11)); + } +- preempt_enable(); + } + + void add_input_randomness(unsigned int type, unsigned int code, +@@ -871,28 +868,27 @@ + return *(ptr + f->reg_idx++); + } + +-void add_interrupt_randomness(int irq, int irq_flags) ++void add_interrupt_randomness(int irq, int irq_flags, __u64 ip) + { + struct entropy_store *r; + struct fast_pool *fast_pool = this_cpu_ptr(&irq_randomness); +- struct pt_regs *regs = get_irq_regs(); + unsigned long now = jiffies; + cycles_t cycles = random_get_entropy(); + __u32 c_high, j_high; +- __u64 ip; + unsigned long seed; + int credit = 0; + + if (cycles == 0) +- cycles = get_reg(fast_pool, regs); ++ cycles = get_reg(fast_pool, NULL); + c_high = (sizeof(cycles) > 4) ? cycles >> 32 : 0; + j_high = (sizeof(now) > 4) ? now >> 32 : 0; + fast_pool->pool[0] ^= cycles ^ j_high ^ irq; + fast_pool->pool[1] ^= now ^ c_high; +- ip = regs ? instruction_pointer(regs) : _RET_IP_; ++ if (!ip) ++ ip = _RET_IP_; + fast_pool->pool[2] ^= ip; + fast_pool->pool[3] ^= (sizeof(ip) > 4) ? ip >> 32 : +- get_reg(fast_pool, regs); ++ get_reg(fast_pool, NULL); + + fast_mix(fast_pool); + add_interrupt_bench(cycles); +diff -Nur linux-4.1.26.orig/drivers/clocksource/tcb_clksrc.c linux-4.1.26/drivers/clocksource/tcb_clksrc.c +--- linux-4.1.26.orig/drivers/clocksource/tcb_clksrc.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/clocksource/tcb_clksrc.c 2016-06-19 15:30:58.627295036 +0200 +@@ -23,8 +23,7 @@ + * this 32 bit free-running counter. the second channel is not used. + * + * - The third channel may be used to provide a 16-bit clockevent +- * source, used in either periodic or oneshot mode. This runs +- * at 32 KiHZ, and can handle delays of up to two seconds. ++ * source, used in either periodic or oneshot mode. + * + * A boot clocksource and clockevent source are also currently needed, + * unless the relevant platforms (ARM/AT91, AVR32/AT32) are changed so +@@ -74,6 +73,7 @@ + struct tc_clkevt_device { + struct clock_event_device clkevt; + struct clk *clk; ++ u32 freq; + void __iomem *regs; + }; + +@@ -82,13 +82,6 @@ + return container_of(clkevt, struct tc_clkevt_device, clkevt); + } + +-/* For now, we always use the 32K clock ... this optimizes for NO_HZ, +- * because using one of the divided clocks would usually mean the +- * tick rate can never be less than several dozen Hz (vs 0.5 Hz). +- * +- * A divided clock could be good for high resolution timers, since +- * 30.5 usec resolution can seem "low". +- */ + static u32 timer_clock; + + static void tc_mode(enum clock_event_mode m, struct clock_event_device *d) +@@ -111,11 +104,12 @@ + case CLOCK_EVT_MODE_PERIODIC: + clk_enable(tcd->clk); + +- /* slow clock, count up to RC, then irq and restart */ ++ /* count up to RC, then irq and restart */ + __raw_writel(timer_clock + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, + regs + ATMEL_TC_REG(2, CMR)); +- __raw_writel((32768 + HZ/2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); ++ __raw_writel((tcd->freq + HZ / 2) / HZ, ++ tcaddr + ATMEL_TC_REG(2, RC)); + + /* Enable clock and interrupts on RC compare */ + __raw_writel(ATMEL_TC_CPCS, regs + ATMEL_TC_REG(2, IER)); +@@ -128,7 +122,7 @@ + case CLOCK_EVT_MODE_ONESHOT: + clk_enable(tcd->clk); + +- /* slow clock, count up to RC, then irq and stop */ ++ /* count up to RC, then irq and stop */ + __raw_writel(timer_clock | ATMEL_TC_CPCSTOP + | ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO, + regs + ATMEL_TC_REG(2, CMR)); +@@ -157,8 +151,12 @@ + .name = "tc_clkevt", + .features = CLOCK_EVT_FEAT_PERIODIC + | CLOCK_EVT_FEAT_ONESHOT, ++#ifdef CONFIG_ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK + /* Should be lower than at91rm9200's system timer */ + .rating = 125, ++#else ++ .rating = 200, ++#endif + .set_next_event = tc_next_event, + .set_mode = tc_mode, + }, +@@ -178,8 +176,9 @@ + return IRQ_NONE; + } + +-static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) ++static int __init setup_clkevents(struct atmel_tc *tc, int divisor_idx) + { ++ unsigned divisor = atmel_tc_divisors[divisor_idx]; + int ret; + struct clk *t2_clk = tc->clk[2]; + int irq = tc->irq[2]; +@@ -193,7 +192,11 @@ + clkevt.regs = tc->regs; + clkevt.clk = t2_clk; + +- timer_clock = clk32k_divisor_idx; ++ timer_clock = divisor_idx; ++ if (!divisor) ++ clkevt.freq = 32768; ++ else ++ clkevt.freq = clk_get_rate(t2_clk) / divisor; + + clkevt.clkevt.cpumask = cpumask_of(0); + +@@ -203,7 +206,7 @@ + return ret; + } + +- clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff); ++ clockevents_config_and_register(&clkevt.clkevt, clkevt.freq, 1, 0xffff); + + return ret; + } +@@ -340,7 +343,11 @@ + goto err_disable_t1; + + /* channel 2: periodic and oneshot timer support */ ++#ifdef CONFIG_ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK + ret = setup_clkevents(tc, clk32k_divisor_idx); ++#else ++ ret = setup_clkevents(tc, best_divisor_idx); ++#endif + if (ret) + goto err_unregister_clksrc; + +diff -Nur linux-4.1.26.orig/drivers/clocksource/timer-atmel-pit.c linux-4.1.26/drivers/clocksource/timer-atmel-pit.c +--- linux-4.1.26.orig/drivers/clocksource/timer-atmel-pit.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/clocksource/timer-atmel-pit.c 2016-06-19 15:30:58.627295036 +0200 +@@ -90,6 +90,7 @@ + return elapsed; + } + ++static struct irqaction at91sam926x_pit_irq; + /* + * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16) + */ +@@ -100,6 +101,8 @@ + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: ++ /* Set up irq handler */ ++ setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq); + /* update clocksource counter */ + data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR)); + pit_write(data->base, AT91_PIT_MR, +@@ -113,6 +116,7 @@ + /* disable irq, leaving the clocksource active */ + pit_write(data->base, AT91_PIT_MR, + (data->cycle - 1) | AT91_PIT_PITEN); ++ remove_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq); + break; + case CLOCK_EVT_MODE_RESUME: + break; +diff -Nur linux-4.1.26.orig/drivers/clocksource/timer-atmel-st.c linux-4.1.26/drivers/clocksource/timer-atmel-st.c +--- linux-4.1.26.orig/drivers/clocksource/timer-atmel-st.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/clocksource/timer-atmel-st.c 2016-06-19 15:30:58.627295036 +0200 +@@ -131,6 +131,7 @@ + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: ++ remove_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq); + case CLOCK_EVT_MODE_RESUME: + irqmask = 0; + break; +diff -Nur linux-4.1.26.orig/drivers/cpufreq/cpufreq.c linux-4.1.26/drivers/cpufreq/cpufreq.c +--- linux-4.1.26.orig/drivers/cpufreq/cpufreq.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/cpufreq/cpufreq.c 2016-06-19 15:30:58.627295036 +0200 +@@ -64,12 +64,6 @@ + return cpufreq_driver->target_index || cpufreq_driver->target; + } + +-/* +- * rwsem to guarantee that cpufreq driver module doesn't unload during critical +- * sections +- */ +-static DECLARE_RWSEM(cpufreq_rwsem); +- + /* internal prototypes */ + static int __cpufreq_governor(struct cpufreq_policy *policy, + unsigned int event); +@@ -215,9 +209,6 @@ + if (cpu >= nr_cpu_ids) + return NULL; + +- if (!down_read_trylock(&cpufreq_rwsem)) +- return NULL; +- + /* get the cpufreq driver */ + read_lock_irqsave(&cpufreq_driver_lock, flags); + +@@ -230,9 +221,6 @@ + + read_unlock_irqrestore(&cpufreq_driver_lock, flags); + +- if (!policy) +- up_read(&cpufreq_rwsem); +- + return policy; + } + EXPORT_SYMBOL_GPL(cpufreq_cpu_get); +@@ -240,7 +228,6 @@ + void cpufreq_cpu_put(struct cpufreq_policy *policy) + { + kobject_put(&policy->kobj); +- up_read(&cpufreq_rwsem); + } + EXPORT_SYMBOL_GPL(cpufreq_cpu_put); + +@@ -765,9 +752,6 @@ + struct freq_attr *fattr = to_attr(attr); + ssize_t ret; + +- if (!down_read_trylock(&cpufreq_rwsem)) +- return -EINVAL; +- + down_read(&policy->rwsem); + + if (fattr->show) +@@ -776,7 +760,6 @@ + ret = -EIO; + + up_read(&policy->rwsem); +- up_read(&cpufreq_rwsem); + + return ret; + } +@@ -793,9 +776,6 @@ + if (!cpu_online(policy->cpu)) + goto unlock; + +- if (!down_read_trylock(&cpufreq_rwsem)) +- goto unlock; +- + down_write(&policy->rwsem); + + if (fattr->store) +@@ -804,8 +784,6 @@ + ret = -EIO; + + up_write(&policy->rwsem); +- +- up_read(&cpufreq_rwsem); + unlock: + put_online_cpus(); + +@@ -1117,16 +1095,12 @@ + if (unlikely(policy)) + return 0; + +- if (!down_read_trylock(&cpufreq_rwsem)) +- return 0; +- + /* Check if this cpu was hot-unplugged earlier and has siblings */ + read_lock_irqsave(&cpufreq_driver_lock, flags); + for_each_policy(policy) { + if (cpumask_test_cpu(cpu, policy->related_cpus)) { + read_unlock_irqrestore(&cpufreq_driver_lock, flags); + ret = cpufreq_add_policy_cpu(policy, cpu, dev); +- up_read(&cpufreq_rwsem); + return ret; + } + } +@@ -1269,8 +1243,6 @@ + + kobject_uevent(&policy->kobj, KOBJ_ADD); + +- up_read(&cpufreq_rwsem); +- + /* Callback for handling stuff after policy is ready */ + if (cpufreq_driver->ready) + cpufreq_driver->ready(policy); +@@ -1304,8 +1276,6 @@ + cpufreq_policy_free(policy); + + nomem_out: +- up_read(&cpufreq_rwsem); +- + return ret; + } + +@@ -2499,19 +2469,20 @@ + + pr_debug("unregistering driver %s\n", driver->name); + ++ /* Protect against concurrent cpu hotplug */ ++ get_online_cpus(); + subsys_interface_unregister(&cpufreq_interface); + if (cpufreq_boost_supported()) + cpufreq_sysfs_remove_file(&boost.attr); + + unregister_hotcpu_notifier(&cpufreq_cpu_notifier); + +- down_write(&cpufreq_rwsem); + write_lock_irqsave(&cpufreq_driver_lock, flags); + + cpufreq_driver = NULL; + + write_unlock_irqrestore(&cpufreq_driver_lock, flags); +- up_write(&cpufreq_rwsem); ++ put_online_cpus(); + + return 0; + } +diff -Nur linux-4.1.26.orig/drivers/cpufreq/Kconfig.x86 linux-4.1.26/drivers/cpufreq/Kconfig.x86 +--- linux-4.1.26.orig/drivers/cpufreq/Kconfig.x86 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/cpufreq/Kconfig.x86 2016-06-19 15:30:58.627295036 +0200 +@@ -123,7 +123,7 @@ + + config X86_POWERNOW_K8 + tristate "AMD Opteron/Athlon64 PowerNow!" +- depends on ACPI && ACPI_PROCESSOR && X86_ACPI_CPUFREQ ++ depends on ACPI && ACPI_PROCESSOR && X86_ACPI_CPUFREQ && !PREEMPT_RT_BASE + help + This adds the CPUFreq driver for K8/early Opteron/Athlon64 processors. + Support for K10 and newer processors is now in acpi-cpufreq. +diff -Nur linux-4.1.26.orig/drivers/gpio/gpio-omap.c linux-4.1.26/drivers/gpio/gpio-omap.c +--- linux-4.1.26.orig/drivers/gpio/gpio-omap.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpio/gpio-omap.c 2016-06-19 15:30:58.631295190 +0200 +@@ -29,6 +29,7 @@ + #include + + #define OFF_MODE 1 ++#define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF + + static LIST_HEAD(omap_gpio_list); + +@@ -50,14 +51,15 @@ + struct gpio_bank { + struct list_head node; + void __iomem *base; +- u16 irq; ++ int irq; + u32 non_wakeup_gpios; + u32 enabled_non_wakeup_gpios; + struct gpio_regs context; + u32 saved_datain; + u32 level_mask; + u32 toggle_mask; +- spinlock_t lock; ++ raw_spinlock_t lock; ++ raw_spinlock_t wa_lock; + struct gpio_chip chip; + struct clk *dbck; + u32 mod_usage; +@@ -67,7 +69,7 @@ + struct device *dev; + bool is_mpuio; + bool dbck_flag; +- bool loses_context; ++ + bool context_valid; + int stride; + u32 width; +@@ -175,7 +177,7 @@ + static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) + { + if (bank->dbck_enable_mask && !bank->dbck_enabled) { +- clk_prepare_enable(bank->dbck); ++ clk_enable(bank->dbck); + bank->dbck_enabled = true; + + writel_relaxed(bank->dbck_enable_mask, +@@ -193,7 +195,7 @@ + */ + writel_relaxed(0, bank->base + bank->regs->debounce_en); + +- clk_disable_unprepare(bank->dbck); ++ clk_disable(bank->dbck); + bank->dbck_enabled = false; + } + } +@@ -204,8 +206,9 @@ + * @offset: the gpio number on this @bank + * @debounce: debounce time to use + * +- * OMAP's debounce time is in 31us steps so we need +- * to convert and round up to the closest unit. ++ * OMAP's debounce time is in 31us steps ++ * = (GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) x 31 ++ * so we need to convert and round up to the closest unit. + */ + static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, + unsigned debounce) +@@ -213,34 +216,33 @@ + void __iomem *reg; + u32 val; + u32 l; ++ bool enable = !!debounce; + + if (!bank->dbck_flag) + return; + +- if (debounce < 32) +- debounce = 0x01; +- else if (debounce > 7936) +- debounce = 0xff; +- else +- debounce = (debounce / 0x1f) - 1; ++ if (enable) { ++ debounce = DIV_ROUND_UP(debounce, 31) - 1; ++ debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK; ++ } + + l = BIT(offset); + +- clk_prepare_enable(bank->dbck); ++ clk_enable(bank->dbck); + reg = bank->base + bank->regs->debounce; + writel_relaxed(debounce, reg); + + reg = bank->base + bank->regs->debounce_en; + val = readl_relaxed(reg); + +- if (debounce) ++ if (enable) + val |= l; + else + val &= ~l; + bank->dbck_enable_mask = val; + + writel_relaxed(val, reg); +- clk_disable_unprepare(bank->dbck); ++ clk_disable(bank->dbck); + /* + * Enable debounce clock per module. + * This call is mandatory because in omap_gpio_request() when +@@ -285,7 +287,7 @@ + bank->context.debounce = 0; + writel_relaxed(bank->context.debounce, bank->base + + bank->regs->debounce); +- clk_disable_unprepare(bank->dbck); ++ clk_disable(bank->dbck); + bank->dbck_enabled = false; + } + } +@@ -488,9 +490,6 @@ + unsigned long flags; + unsigned offset = d->hwirq; + +- if (!BANK_USED(bank)) +- pm_runtime_get_sync(bank->dev); +- + if (type & ~IRQ_TYPE_SENSE_MASK) + return -EINVAL; + +@@ -498,20 +497,28 @@ + (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) + return -EINVAL; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + retval = omap_set_gpio_triggering(bank, offset, type); ++ if (retval) { ++ raw_spin_unlock_irqrestore(&bank->lock, flags); ++ goto error; ++ } + omap_gpio_init_irq(bank, offset); + if (!omap_gpio_is_input(bank, offset)) { +- spin_unlock_irqrestore(&bank->lock, flags); +- return -EINVAL; ++ raw_spin_unlock_irqrestore(&bank->lock, flags); ++ retval = -EINVAL; ++ goto error; + } +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) + __irq_set_handler_locked(d->irq, handle_level_irq); + else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + __irq_set_handler_locked(d->irq, handle_edge_irq); + ++ return 0; ++ ++error: + return retval; + } + +@@ -626,34 +633,30 @@ + return -EINVAL; + } + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + if (enable) + bank->context.wake_en |= gpio_bit; + else + bank->context.wake_en &= ~gpio_bit; + + writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } + +-static void omap_reset_gpio(struct gpio_bank *bank, unsigned offset) +-{ +- omap_set_gpio_direction(bank, offset, 1); +- omap_set_gpio_irqenable(bank, offset, 0); +- omap_clear_gpio_irqstatus(bank, offset); +- omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); +- omap_clear_gpio_debounce(bank, offset); +-} +- + /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ + static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) + { + struct gpio_bank *bank = omap_irq_data_get_bank(d); + unsigned offset = d->hwirq; ++ int ret; ++ ++ ret = omap_set_gpio_wakeup(bank, offset, enable); ++ if (!ret) ++ ret = irq_set_irq_wake(bank->irq, enable); + +- return omap_set_gpio_wakeup(bank, offset, enable); ++ return ret; + } + + static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) +@@ -668,17 +671,10 @@ + if (!BANK_USED(bank)) + pm_runtime_get_sync(bank->dev); + +- spin_lock_irqsave(&bank->lock, flags); +- /* Set trigger to none. You need to enable the desired trigger with +- * request_irq() or set_irq_type(). Only do this if the IRQ line has +- * not already been requested. +- */ +- if (!LINE_USED(bank->irq_usage, offset)) { +- omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); +- omap_enable_gpio_module(bank, offset); +- } ++ raw_spin_lock_irqsave(&bank->lock, flags); ++ omap_enable_gpio_module(bank, offset); + bank->mod_usage |= BIT(offset); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } +@@ -688,11 +684,14 @@ + struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); + unsigned long flags; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + bank->mod_usage &= ~(BIT(offset)); ++ if (!LINE_USED(bank->irq_usage, offset)) { ++ omap_set_gpio_direction(bank, offset, 1); ++ omap_clear_gpio_debounce(bank, offset); ++ } + omap_disable_gpio_module(bank, offset); +- omap_reset_gpio(bank, offset); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + /* + * If this is the last gpio to be freed in the bank, +@@ -711,29 +710,27 @@ + * line's interrupt handler has been run, we may miss some nested + * interrupts. + */ +-static void omap_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) ++static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) + { + void __iomem *isr_reg = NULL; + u32 isr; + unsigned int bit; +- struct gpio_bank *bank; +- int unmasked = 0; +- struct irq_chip *irqchip = irq_desc_get_chip(desc); +- struct gpio_chip *chip = irq_get_handler_data(irq); ++ struct gpio_bank *bank = gpiobank; ++ unsigned long wa_lock_flags; ++ unsigned long lock_flags; + +- chained_irq_enter(irqchip, desc); +- +- bank = container_of(chip, struct gpio_bank, chip); + isr_reg = bank->base + bank->regs->irqstatus; +- pm_runtime_get_sync(bank->dev); +- + if (WARN_ON(!isr_reg)) + goto exit; + ++ pm_runtime_get_sync(bank->dev); ++ + while (1) { + u32 isr_saved, level_mask = 0; + u32 enabled; + ++ raw_spin_lock_irqsave(&bank->lock, lock_flags); ++ + enabled = omap_get_gpio_irqbank_mask(bank); + isr_saved = isr = readl_relaxed(isr_reg) & enabled; + +@@ -747,12 +744,7 @@ + omap_clear_gpio_irqbank(bank, isr_saved & ~level_mask); + omap_enable_gpio_irqbank(bank, isr_saved & ~level_mask); + +- /* if there is only edge sensitive GPIO pin interrupts +- configured, we could unmask GPIO bank interrupt immediately */ +- if (!level_mask && !unmasked) { +- unmasked = 1; +- chained_irq_exit(irqchip, desc); +- } ++ raw_spin_unlock_irqrestore(&bank->lock, lock_flags); + + if (!isr) + break; +@@ -761,6 +753,7 @@ + bit = __ffs(isr); + isr &= ~(BIT(bit)); + ++ raw_spin_lock_irqsave(&bank->lock, lock_flags); + /* + * Some chips can't respond to both rising and falling + * at the same time. If this irq was requested with +@@ -771,18 +764,20 @@ + if (bank->toggle_mask & (BIT(bit))) + omap_toggle_gpio_edge_triggering(bank, bit); + ++ raw_spin_unlock_irqrestore(&bank->lock, lock_flags); ++ ++ raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); ++ + generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, + bit)); ++ ++ raw_spin_unlock_irqrestore(&bank->wa_lock, ++ wa_lock_flags); + } + } +- /* if bank has any level sensitive GPIO pin interrupt +- configured, we must unmask the bank interrupt only after +- handler(s) are executed in order to avoid spurious bank +- interrupt */ + exit: +- if (!unmasked) +- chained_irq_exit(irqchip, desc); + pm_runtime_put(bank->dev); ++ return IRQ_HANDLED; + } + + static unsigned int omap_gpio_irq_startup(struct irq_data *d) +@@ -791,15 +786,22 @@ + unsigned long flags; + unsigned offset = d->hwirq; + +- if (!BANK_USED(bank)) +- pm_runtime_get_sync(bank->dev); ++ raw_spin_lock_irqsave(&bank->lock, flags); + +- spin_lock_irqsave(&bank->lock, flags); +- omap_gpio_init_irq(bank, offset); +- spin_unlock_irqrestore(&bank->lock, flags); ++ if (!LINE_USED(bank->mod_usage, offset)) ++ omap_set_gpio_direction(bank, offset, 1); ++ else if (!omap_gpio_is_input(bank, offset)) ++ goto err; ++ omap_enable_gpio_module(bank, offset); ++ bank->irq_usage |= BIT(offset); ++ ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + omap_gpio_unmask_irq(d); + + return 0; ++err: ++ raw_spin_unlock_irqrestore(&bank->lock, flags); ++ return -EINVAL; + } + + static void omap_gpio_irq_shutdown(struct irq_data *d) +@@ -808,11 +810,28 @@ + unsigned long flags; + unsigned offset = d->hwirq; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + bank->irq_usage &= ~(BIT(offset)); ++ omap_set_gpio_irqenable(bank, offset, 0); ++ omap_clear_gpio_irqstatus(bank, offset); ++ omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); ++ if (!LINE_USED(bank->mod_usage, offset)) ++ omap_clear_gpio_debounce(bank, offset); + omap_disable_gpio_module(bank, offset); +- omap_reset_gpio(bank, offset); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); ++} ++ ++static void omap_gpio_irq_bus_lock(struct irq_data *data) ++{ ++ struct gpio_bank *bank = omap_irq_data_get_bank(data); ++ ++ if (!BANK_USED(bank)) ++ pm_runtime_get_sync(bank->dev); ++} ++ ++static void gpio_irq_bus_sync_unlock(struct irq_data *data) ++{ ++ struct gpio_bank *bank = omap_irq_data_get_bank(data); + + /* + * If this is the last IRQ to be freed in the bank, +@@ -836,10 +855,10 @@ + unsigned offset = d->hwirq; + unsigned long flags; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + omap_set_gpio_irqenable(bank, offset, 0); + omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + } + + static void omap_gpio_unmask_irq(struct irq_data *d) +@@ -849,7 +868,7 @@ + u32 trigger = irqd_get_trigger_type(d); + unsigned long flags; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + if (trigger) + omap_set_gpio_triggering(bank, offset, trigger); + +@@ -861,7 +880,7 @@ + } + + omap_set_gpio_irqenable(bank, offset, 1); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + } + + /*---------------------------------------------------------------------*/ +@@ -874,9 +893,9 @@ + OMAP_MPUIO_GPIO_MASKIT / bank->stride; + unsigned long flags; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } +@@ -889,9 +908,9 @@ + OMAP_MPUIO_GPIO_MASKIT / bank->stride; + unsigned long flags; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + writel_relaxed(bank->context.wake_en, mask_reg); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } +@@ -937,9 +956,9 @@ + + bank = container_of(chip, struct gpio_bank, chip); + reg = bank->base + bank->regs->direction; +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + dir = !!(readl_relaxed(reg) & BIT(offset)); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + return dir; + } + +@@ -949,9 +968,9 @@ + unsigned long flags; + + bank = container_of(chip, struct gpio_bank, chip); +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + omap_set_gpio_direction(bank, offset, 1); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + return 0; + } + +@@ -973,10 +992,10 @@ + unsigned long flags; + + bank = container_of(chip, struct gpio_bank, chip); +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + bank->set_dataout(bank, offset, value); + omap_set_gpio_direction(bank, offset, 0); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + return 0; + } + +@@ -988,9 +1007,9 @@ + + bank = container_of(chip, struct gpio_bank, chip); + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + omap2_set_gpio_debounce(bank, offset, debounce); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } +@@ -1001,9 +1020,9 @@ + unsigned long flags; + + bank = container_of(chip, struct gpio_bank, chip); +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + bank->set_dataout(bank, offset, value); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + } + + /*---------------------------------------------------------------------*/ +@@ -1048,10 +1067,6 @@ + /* Initialize interface clk ungated, module enabled */ + if (bank->regs->ctrl) + writel_relaxed(0, base + bank->regs->ctrl); +- +- bank->dbck = clk_get(bank->dev, "dbclk"); +- if (IS_ERR(bank->dbck)) +- dev_err(bank->dev, "Could not get gpio dbck\n"); + } + + static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) +@@ -1080,7 +1095,6 @@ + } else { + bank->chip.label = "gpio"; + bank->chip.base = gpio; +- gpio += bank->width; + } + bank->chip.ngpio = bank->width; + +@@ -1090,6 +1104,9 @@ + return ret; + } + ++ if (!bank->is_mpuio) ++ gpio += bank->width; ++ + #ifdef CONFIG_ARCH_OMAP1 + /* + * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop +@@ -1112,7 +1129,7 @@ + } + + ret = gpiochip_irqchip_add(&bank->chip, irqc, +- irq_base, omap_gpio_irq_handler, ++ irq_base, handle_bad_irq, + IRQ_TYPE_NONE); + + if (ret) { +@@ -1121,10 +1138,14 @@ + return -ENODEV; + } + +- gpiochip_set_chained_irqchip(&bank->chip, irqc, +- bank->irq, omap_gpio_irq_handler); ++ gpiochip_set_chained_irqchip(&bank->chip, irqc, bank->irq, NULL); + +- return 0; ++ ret = devm_request_irq(bank->dev, bank->irq, omap_gpio_irq_handler, ++ 0, dev_name(bank->dev), bank); ++ if (ret) ++ gpiochip_remove(&bank->chip); ++ ++ return ret; + } + + static const struct of_device_id omap_gpio_match[]; +@@ -1163,17 +1184,23 @@ + irqc->irq_unmask = omap_gpio_unmask_irq, + irqc->irq_set_type = omap_gpio_irq_type, + irqc->irq_set_wake = omap_gpio_wake_enable, ++ irqc->irq_bus_lock = omap_gpio_irq_bus_lock, ++ irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, + irqc->name = dev_name(&pdev->dev); + +- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); +- if (unlikely(!res)) { +- dev_err(dev, "Invalid IRQ resource\n"); +- return -ENODEV; ++ bank->irq = platform_get_irq(pdev, 0); ++ if (bank->irq <= 0) { ++ if (!bank->irq) ++ bank->irq = -ENXIO; ++ if (bank->irq != -EPROBE_DEFER) ++ dev_err(dev, ++ "can't get irq resource ret=%d\n", bank->irq); ++ return bank->irq; + } + +- bank->irq = res->start; + bank->dev = dev; + bank->chip.dev = dev; ++ bank->chip.owner = THIS_MODULE; + bank->dbck_flag = pdata->dbck_flag; + bank->stride = pdata->bank_stride; + bank->width = pdata->bank_width; +@@ -1183,15 +1210,9 @@ + #ifdef CONFIG_OF_GPIO + bank->chip.of_node = of_node_get(node); + #endif +- if (node) { +- if (!of_property_read_bool(node, "ti,gpio-always-on")) +- bank->loses_context = true; +- } else { +- bank->loses_context = pdata->loses_context; +- +- if (bank->loses_context) +- bank->get_context_loss_count = +- pdata->get_context_loss_count; ++ if (!node) { ++ bank->get_context_loss_count = ++ pdata->get_context_loss_count; + } + + if (bank->regs->set_dataout && bank->regs->clr_dataout) +@@ -1199,16 +1220,27 @@ + else + bank->set_dataout = omap_set_gpio_dataout_mask; + +- spin_lock_init(&bank->lock); ++ raw_spin_lock_init(&bank->lock); ++ raw_spin_lock_init(&bank->wa_lock); + + /* Static mapping, never released */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + bank->base = devm_ioremap_resource(dev, res); + if (IS_ERR(bank->base)) { +- irq_domain_remove(bank->chip.irqdomain); + return PTR_ERR(bank->base); + } + ++ if (bank->dbck_flag) { ++ bank->dbck = devm_clk_get(bank->dev, "dbclk"); ++ if (IS_ERR(bank->dbck)) { ++ dev_err(bank->dev, ++ "Could not get gpio dbck. Disable debounce\n"); ++ bank->dbck_flag = false; ++ } else { ++ clk_prepare(bank->dbck); ++ } ++ } ++ + platform_set_drvdata(pdev, bank); + + pm_runtime_enable(bank->dev); +@@ -1221,8 +1253,11 @@ + omap_gpio_mod_init(bank); + + ret = omap_gpio_chip_init(bank, irqc); +- if (ret) ++ if (ret) { ++ pm_runtime_put_sync(bank->dev); ++ pm_runtime_disable(bank->dev); + return ret; ++ } + + omap_gpio_show_rev(bank); + +@@ -1233,6 +1268,19 @@ + return 0; + } + ++static int omap_gpio_remove(struct platform_device *pdev) ++{ ++ struct gpio_bank *bank = platform_get_drvdata(pdev); ++ ++ list_del(&bank->node); ++ gpiochip_remove(&bank->chip); ++ pm_runtime_disable(bank->dev); ++ if (bank->dbck_flag) ++ clk_unprepare(bank->dbck); ++ ++ return 0; ++} ++ + #ifdef CONFIG_ARCH_OMAP2PLUS + + #if defined(CONFIG_PM) +@@ -1246,7 +1294,7 @@ + unsigned long flags; + u32 wake_low, wake_hi; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + + /* + * Only edges can generate a wakeup event to the PRCM. +@@ -1299,7 +1347,7 @@ + bank->get_context_loss_count(bank->dev); + + omap_gpio_dbck_disable(bank); +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } +@@ -1314,14 +1362,14 @@ + unsigned long flags; + int c; + +- spin_lock_irqsave(&bank->lock, flags); ++ raw_spin_lock_irqsave(&bank->lock, flags); + + /* + * On the first resume during the probe, the context has not + * been initialised and so initialise it now. Also initialise + * the context loss count. + */ +- if (bank->loses_context && !bank->context_valid) { ++ if (!bank->context_valid) { + omap_gpio_init_context(bank); + + if (bank->get_context_loss_count) +@@ -1342,22 +1390,20 @@ + writel_relaxed(bank->context.risingdetect, + bank->base + bank->regs->risingdetect); + +- if (bank->loses_context) { +- if (!bank->get_context_loss_count) { ++ if (!bank->get_context_loss_count) { ++ omap_gpio_restore_context(bank); ++ } else { ++ c = bank->get_context_loss_count(bank->dev); ++ if (c != bank->context_loss_count) { + omap_gpio_restore_context(bank); + } else { +- c = bank->get_context_loss_count(bank->dev); +- if (c != bank->context_loss_count) { +- omap_gpio_restore_context(bank); +- } else { +- spin_unlock_irqrestore(&bank->lock, flags); +- return 0; +- } ++ raw_spin_unlock_irqrestore(&bank->lock, flags); ++ return 0; + } + } + + if (!bank->workaround_enabled) { +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + return 0; + } + +@@ -1412,18 +1458,19 @@ + } + + bank->workaround_enabled = false; +- spin_unlock_irqrestore(&bank->lock, flags); ++ raw_spin_unlock_irqrestore(&bank->lock, flags); + + return 0; + } + #endif /* CONFIG_PM */ + ++#if IS_BUILTIN(CONFIG_GPIO_OMAP) + void omap2_gpio_prepare_for_idle(int pwr_mode) + { + struct gpio_bank *bank; + + list_for_each_entry(bank, &omap_gpio_list, node) { +- if (!BANK_USED(bank) || !bank->loses_context) ++ if (!BANK_USED(bank)) + continue; + + bank->power_mode = pwr_mode; +@@ -1437,12 +1484,13 @@ + struct gpio_bank *bank; + + list_for_each_entry(bank, &omap_gpio_list, node) { +- if (!BANK_USED(bank) || !bank->loses_context) ++ if (!BANK_USED(bank)) + continue; + + pm_runtime_get_sync(bank->dev); + } + } ++#endif + + #if defined(CONFIG_PM) + static void omap_gpio_init_context(struct gpio_bank *p) +@@ -1598,6 +1646,7 @@ + + static struct platform_driver omap_gpio_driver = { + .probe = omap_gpio_probe, ++ .remove = omap_gpio_remove, + .driver = { + .name = "omap_gpio", + .pm = &gpio_pm_ops, +@@ -1615,3 +1664,13 @@ + return platform_driver_register(&omap_gpio_driver); + } + postcore_initcall(omap_gpio_drv_reg); ++ ++static void __exit omap_gpio_exit(void) ++{ ++ platform_driver_unregister(&omap_gpio_driver); ++} ++module_exit(omap_gpio_exit); ++ ++MODULE_DESCRIPTION("omap gpio driver"); ++MODULE_ALIAS("platform:gpio-omap"); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.26.orig/drivers/gpio/Kconfig linux-4.1.26/drivers/gpio/Kconfig +--- linux-4.1.26.orig/drivers/gpio/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpio/Kconfig 2016-06-19 15:30:58.631295190 +0200 +@@ -308,7 +308,7 @@ + family of SOCs. + + config GPIO_OMAP +- bool "TI OMAP GPIO support" if COMPILE_TEST && !ARCH_OMAP2PLUS ++ tristate "TI OMAP GPIO support" if ARCH_OMAP2PLUS || COMPILE_TEST + default y if ARCH_OMAP + depends on ARM + select GENERIC_IRQ_CHIP +diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_execbuffer.c linux-4.1.26/drivers/gpu/drm/i915/i915_gem_execbuffer.c +--- linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_execbuffer.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpu/drm/i915/i915_gem_execbuffer.c 2016-06-19 15:30:58.631295190 +0200 +@@ -32,6 +32,7 @@ + #include "i915_trace.h" + #include "intel_drv.h" + #include ++#include + + #define __EXEC_OBJECT_HAS_PIN (1<<31) + #define __EXEC_OBJECT_HAS_FENCE (1<<30) +@@ -465,7 +466,7 @@ + } + + /* We can't wait for rendering with pagefaults disabled */ +- if (obj->active && in_atomic()) ++ if (obj->active && pagefault_disabled()) + return -EFAULT; + + if (use_cpu_reloc(obj)) +@@ -1338,7 +1339,9 @@ + return ret; + } + ++#ifndef CONFIG_PREEMPT_RT_BASE + trace_i915_gem_ring_dispatch(intel_ring_get_request(ring), dispatch_flags); ++#endif + + i915_gem_execbuffer_move_to_active(vmas, ring); + i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj); +diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_shrinker.c linux-4.1.26/drivers/gpu/drm/i915/i915_gem_shrinker.c +--- linux-4.1.26.orig/drivers/gpu/drm/i915/i915_gem_shrinker.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpu/drm/i915/i915_gem_shrinker.c 2016-06-19 15:30:58.631295190 +0200 +@@ -39,7 +39,7 @@ + if (!mutex_is_locked(mutex)) + return false; + +-#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES) ++#if (defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES)) && !defined(CONFIG_PREEMPT_RT_BASE) + return mutex->owner == task; + #else + /* Since UP may be pre-empted, we cannot assume that we own the lock */ +diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/i915_irq.c linux-4.1.26/drivers/gpu/drm/i915/i915_irq.c +--- linux-4.1.26.orig/drivers/gpu/drm/i915/i915_irq.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpu/drm/i915/i915_irq.c 2016-06-19 15:30:58.631295190 +0200 +@@ -676,6 +676,7 @@ + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); + + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_disable_rt(); + + /* Get optional system timestamp before query. */ + if (stime) +@@ -727,6 +728,7 @@ + *etime = ktime_get(); + + /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_enable_rt(); + + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); + +diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/intel_display.c linux-4.1.26/drivers/gpu/drm/i915/intel_display.c +--- linux-4.1.26.orig/drivers/gpu/drm/i915/intel_display.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpu/drm/i915/intel_display.c 2016-06-19 15:30:58.635295344 +0200 +@@ -10084,7 +10084,7 @@ + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + +- WARN_ON(!in_interrupt()); ++ WARN_ON_NONRT(!in_interrupt()); + + if (crtc == NULL) + return; +diff -Nur linux-4.1.26.orig/drivers/gpu/drm/i915/intel_sprite.c linux-4.1.26/drivers/gpu/drm/i915/intel_sprite.c +--- linux-4.1.26.orig/drivers/gpu/drm/i915/intel_sprite.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpu/drm/i915/intel_sprite.c 2016-06-19 15:30:58.635295344 +0200 +@@ -37,6 +37,7 @@ + #include "intel_drv.h" + #include + #include "i915_drv.h" ++#include + + static bool + format_is_yuv(uint32_t format) +@@ -61,6 +62,8 @@ + return DIV_ROUND_UP(usecs * mode->crtc_clock, 1000 * mode->crtc_htotal); + } + ++static DEFINE_LOCAL_IRQ_LOCK(pipe_update_lock); ++ + /** + * intel_pipe_update_start() - start update of a set of display registers + * @crtc: the crtc of which the registers are going to be updated +@@ -101,7 +104,7 @@ + if (WARN_ON(drm_crtc_vblank_get(&crtc->base))) + return false; + +- local_irq_disable(); ++ local_lock_irq(pipe_update_lock); + + trace_i915_pipe_update_start(crtc, min, max); + +@@ -123,11 +126,11 @@ + break; + } + +- local_irq_enable(); ++ local_unlock_irq(pipe_update_lock); + + timeout = schedule_timeout(timeout); + +- local_irq_disable(); ++ local_lock_irq(pipe_update_lock); + } + + finish_wait(wq, &wait); +@@ -158,7 +161,7 @@ + + trace_i915_pipe_update_end(crtc, end_vbl_count); + +- local_irq_enable(); ++ local_unlock_irq(pipe_update_lock); + + if (start_vbl_count != end_vbl_count) + DRM_ERROR("Atomic update failure on pipe %c (start=%u end=%u)\n", +diff -Nur linux-4.1.26.orig/drivers/gpu/drm/radeon/radeon_display.c linux-4.1.26/drivers/gpu/drm/radeon/radeon_display.c +--- linux-4.1.26.orig/drivers/gpu/drm/radeon/radeon_display.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/gpu/drm/radeon/radeon_display.c 2016-06-19 15:30:58.635295344 +0200 +@@ -1798,6 +1798,7 @@ + struct radeon_device *rdev = dev->dev_private; + + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_disable_rt(); + + /* Get optional system timestamp before query. */ + if (stime) +@@ -1890,6 +1891,7 @@ + *etime = ktime_get(); + + /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */ ++ preempt_enable_rt(); + + /* Decode into vertical and horizontal scanout position. */ + *vpos = position & 0x1fff; +diff -Nur linux-4.1.26.orig/drivers/i2c/busses/i2c-omap.c linux-4.1.26/drivers/i2c/busses/i2c-omap.c +--- linux-4.1.26.orig/drivers/i2c/busses/i2c-omap.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/i2c/busses/i2c-omap.c 2016-06-19 15:30:58.635295344 +0200 +@@ -996,15 +996,12 @@ + u16 mask; + u16 stat; + +- spin_lock(&dev->lock); +- mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); + stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); ++ mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); + + if (stat & mask) + ret = IRQ_WAKE_THREAD; + +- spin_unlock(&dev->lock); +- + return ret; + } + +diff -Nur linux-4.1.26.orig/drivers/ide/alim15x3.c linux-4.1.26/drivers/ide/alim15x3.c +--- linux-4.1.26.orig/drivers/ide/alim15x3.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/alim15x3.c 2016-06-19 15:30:58.635295344 +0200 +@@ -234,7 +234,7 @@ + + isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + + if (m5229_revision < 0xC2) { + /* +@@ -325,7 +325,7 @@ + } + pci_dev_put(north); + pci_dev_put(isa_dev); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + return 0; + } + +diff -Nur linux-4.1.26.orig/drivers/ide/hpt366.c linux-4.1.26/drivers/ide/hpt366.c +--- linux-4.1.26.orig/drivers/ide/hpt366.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/hpt366.c 2016-06-19 15:30:58.635295344 +0200 +@@ -1241,7 +1241,7 @@ + + dma_old = inb(base + 2); + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + + dma_new = dma_old; + pci_read_config_byte(dev, hwif->channel ? 0x4b : 0x43, &masterdma); +@@ -1252,7 +1252,7 @@ + if (dma_new != dma_old) + outb(dma_new, base + 2); + +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", + hwif->name, base, base + 7); +diff -Nur linux-4.1.26.orig/drivers/ide/ide-io.c linux-4.1.26/drivers/ide/ide-io.c +--- linux-4.1.26.orig/drivers/ide/ide-io.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/ide-io.c 2016-06-19 15:30:58.635295344 +0200 +@@ -659,7 +659,7 @@ + /* disable_irq_nosync ?? */ + disable_irq(hwif->irq); + /* local CPU only, as if we were handling an interrupt */ +- local_irq_disable(); ++ local_irq_disable_nort(); + if (hwif->polling) { + startstop = handler(drive); + } else if (drive_is_ready(drive)) { +diff -Nur linux-4.1.26.orig/drivers/ide/ide-iops.c linux-4.1.26/drivers/ide/ide-iops.c +--- linux-4.1.26.orig/drivers/ide/ide-iops.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/ide-iops.c 2016-06-19 15:30:58.635295344 +0200 +@@ -129,12 +129,12 @@ + if ((stat & ATA_BUSY) == 0) + break; + +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + *rstat = stat; + return -EBUSY; + } + } +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + /* + * Allow status to settle, then read it again. +diff -Nur linux-4.1.26.orig/drivers/ide/ide-io-std.c linux-4.1.26/drivers/ide/ide-io-std.c +--- linux-4.1.26.orig/drivers/ide/ide-io-std.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/ide-io-std.c 2016-06-19 15:30:58.635295344 +0200 +@@ -175,7 +175,7 @@ + unsigned long uninitialized_var(flags); + + if ((io_32bit & 2) && !mmio) { +- local_irq_save(flags); ++ local_irq_save_nort(flags); + ata_vlb_sync(io_ports->nsect_addr); + } + +@@ -186,7 +186,7 @@ + insl(data_addr, buf, words); + + if ((io_32bit & 2) && !mmio) +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + if (((len + 1) & 3) < 2) + return; +@@ -219,7 +219,7 @@ + unsigned long uninitialized_var(flags); + + if ((io_32bit & 2) && !mmio) { +- local_irq_save(flags); ++ local_irq_save_nort(flags); + ata_vlb_sync(io_ports->nsect_addr); + } + +@@ -230,7 +230,7 @@ + outsl(data_addr, buf, words); + + if ((io_32bit & 2) && !mmio) +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + if (((len + 1) & 3) < 2) + return; +diff -Nur linux-4.1.26.orig/drivers/ide/ide-probe.c linux-4.1.26/drivers/ide/ide-probe.c +--- linux-4.1.26.orig/drivers/ide/ide-probe.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/ide-probe.c 2016-06-19 15:30:58.635295344 +0200 +@@ -196,10 +196,10 @@ + int bswap = 1; + + /* local CPU only; some systems need this */ +- local_irq_save(flags); ++ local_irq_save_nort(flags); + /* read 512 bytes of id info */ + hwif->tp_ops->input_data(drive, NULL, id, SECTOR_SIZE); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + drive->dev_flags |= IDE_DFLAG_ID_READ; + #ifdef DEBUG +diff -Nur linux-4.1.26.orig/drivers/ide/ide-taskfile.c linux-4.1.26/drivers/ide/ide-taskfile.c +--- linux-4.1.26.orig/drivers/ide/ide-taskfile.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/ide/ide-taskfile.c 2016-06-19 15:30:58.635295344 +0200 +@@ -250,7 +250,7 @@ + + page_is_high = PageHighMem(page); + if (page_is_high) +- local_irq_save(flags); ++ local_irq_save_nort(flags); + + buf = kmap_atomic(page) + offset; + +@@ -271,7 +271,7 @@ + kunmap_atomic(buf); + + if (page_is_high) +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + len -= nr_bytes; + } +@@ -414,7 +414,7 @@ + } + + if ((drive->dev_flags & IDE_DFLAG_UNMASK) == 0) +- local_irq_disable(); ++ local_irq_disable_nort(); + + ide_set_handler(drive, &task_pio_intr, WAIT_WORSTCASE); + +diff -Nur linux-4.1.26.orig/drivers/infiniband/ulp/ipoib/ipoib_multicast.c linux-4.1.26/drivers/infiniband/ulp/ipoib/ipoib_multicast.c +--- linux-4.1.26.orig/drivers/infiniband/ulp/ipoib/ipoib_multicast.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/infiniband/ulp/ipoib/ipoib_multicast.c 2016-06-19 15:30:58.639295498 +0200 +@@ -821,7 +821,7 @@ + + ipoib_dbg_mcast(priv, "restarting multicast task\n"); + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + netif_addr_lock(dev); + spin_lock(&priv->lock); + +@@ -903,7 +903,7 @@ + + spin_unlock(&priv->lock); + netif_addr_unlock(dev); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + /* + * make sure the in-flight joins have finished before we attempt +diff -Nur linux-4.1.26.orig/drivers/input/gameport/gameport.c linux-4.1.26/drivers/input/gameport/gameport.c +--- linux-4.1.26.orig/drivers/input/gameport/gameport.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/input/gameport/gameport.c 2016-06-19 15:30:58.639295498 +0200 +@@ -124,12 +124,12 @@ + tx = 1 << 30; + + for(i = 0; i < 50; i++) { +- local_irq_save(flags); ++ local_irq_save_nort(flags); + GET_TIME(t1); + for (t = 0; t < 50; t++) gameport_read(gameport); + GET_TIME(t2); + GET_TIME(t3); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + udelay(i * 10); + if ((t = DELTA(t2,t1) - DELTA(t3,t2)) < tx) tx = t; + } +@@ -148,11 +148,11 @@ + tx = 1 << 30; + + for(i = 0; i < 50; i++) { +- local_irq_save(flags); ++ local_irq_save_nort(flags); + rdtscl(t1); + for (t = 0; t < 50; t++) gameport_read(gameport); + rdtscl(t2); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + udelay(i * 10); + if (t2 - t1 < tx) tx = t2 - t1; + } +diff -Nur linux-4.1.26.orig/drivers/leds/trigger/Kconfig linux-4.1.26/drivers/leds/trigger/Kconfig +--- linux-4.1.26.orig/drivers/leds/trigger/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/leds/trigger/Kconfig 2016-06-19 15:30:58.639295498 +0200 +@@ -61,7 +61,7 @@ + + config LEDS_TRIGGER_CPU + bool "LED CPU Trigger" +- depends on LEDS_TRIGGERS ++ depends on LEDS_TRIGGERS && !PREEMPT_RT_BASE + help + This allows LEDs to be controlled by active CPUs. This shows + the active CPUs across an array of LEDs so you can see which +diff -Nur linux-4.1.26.orig/drivers/md/bcache/Kconfig linux-4.1.26/drivers/md/bcache/Kconfig +--- linux-4.1.26.orig/drivers/md/bcache/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/md/bcache/Kconfig 2016-06-19 15:30:58.639295498 +0200 +@@ -1,6 +1,7 @@ + + config BCACHE + tristate "Block device as cache" ++ depends on !PREEMPT_RT_FULL + ---help--- + Allows a block device to be used as cache for other devices; uses + a btree for indexing and the layout is optimized for SSDs. +diff -Nur linux-4.1.26.orig/drivers/md/dm.c linux-4.1.26/drivers/md/dm.c +--- linux-4.1.26.orig/drivers/md/dm.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/md/dm.c 2016-06-19 15:30:58.639295498 +0200 +@@ -2133,7 +2133,7 @@ + /* Establish tio->ti before queuing work (map_tio_request) */ + tio->ti = ti; + queue_kthread_work(&md->kworker, &tio->work); +- BUG_ON(!irqs_disabled()); ++ BUG_ON_NONRT(!irqs_disabled()); + } + + goto out; +diff -Nur linux-4.1.26.orig/drivers/md/raid5.c linux-4.1.26/drivers/md/raid5.c +--- linux-4.1.26.orig/drivers/md/raid5.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/md/raid5.c 2016-06-19 15:30:58.639295498 +0200 +@@ -1918,8 +1918,9 @@ + struct raid5_percpu *percpu; + unsigned long cpu; + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + percpu = per_cpu_ptr(conf->percpu, cpu); ++ spin_lock(&percpu->lock); + if (test_bit(STRIPE_OP_BIOFILL, &ops_request)) { + ops_run_biofill(sh); + overlap_clear++; +@@ -1975,7 +1976,8 @@ + if (test_and_clear_bit(R5_Overlap, &dev->flags)) + wake_up(&sh->raid_conf->wait_for_overlap); + } +- put_cpu(); ++ spin_unlock(&percpu->lock); ++ put_cpu_light(); + } + + static struct stripe_head *alloc_stripe(struct kmem_cache *sc, gfp_t gfp) +@@ -6375,6 +6377,7 @@ + __func__, cpu); + break; + } ++ spin_lock_init(&per_cpu_ptr(conf->percpu, cpu)->lock); + } + put_online_cpus(); + +diff -Nur linux-4.1.26.orig/drivers/md/raid5.h linux-4.1.26/drivers/md/raid5.h +--- linux-4.1.26.orig/drivers/md/raid5.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/md/raid5.h 2016-06-19 15:30:58.639295498 +0200 +@@ -495,6 +495,7 @@ + int recovery_disabled; + /* per cpu variables */ + struct raid5_percpu { ++ spinlock_t lock; /* Protection for -RT */ + struct page *spare_page; /* Used when checking P/Q in raid6 */ + struct flex_array *scribble; /* space for constructing buffer + * lists and performing address +diff -Nur linux-4.1.26.orig/drivers/misc/hwlat_detector.c linux-4.1.26/drivers/misc/hwlat_detector.c +--- linux-4.1.26.orig/drivers/misc/hwlat_detector.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/drivers/misc/hwlat_detector.c 2016-06-19 15:30:58.643295653 +0200 +@@ -0,0 +1,1240 @@ ++/* ++ * hwlat_detector.c - A simple Hardware Latency detector. ++ * ++ * Use this module to detect large system latencies induced by the behavior of ++ * certain underlying system hardware or firmware, independent of Linux itself. ++ * The code was developed originally to detect the presence of SMIs on Intel ++ * and AMD systems, although there is no dependency upon x86 herein. ++ * ++ * The classical example usage of this module is in detecting the presence of ++ * SMIs or System Management Interrupts on Intel and AMD systems. An SMI is a ++ * somewhat special form of hardware interrupt spawned from earlier CPU debug ++ * modes in which the (BIOS/EFI/etc.) firmware arranges for the South Bridge ++ * LPC (or other device) to generate a special interrupt under certain ++ * circumstances, for example, upon expiration of a special SMI timer device, ++ * due to certain external thermal readings, on certain I/O address accesses, ++ * and other situations. An SMI hits a special CPU pin, triggers a special ++ * SMI mode (complete with special memory map), and the OS is unaware. ++ * ++ * Although certain hardware-inducing latencies are necessary (for example, ++ * a modern system often requires an SMI handler for correct thermal control ++ * and remote management) they can wreak havoc upon any OS-level performance ++ * guarantees toward low-latency, especially when the OS is not even made ++ * aware of the presence of these interrupts. For this reason, we need a ++ * somewhat brute force mechanism to detect these interrupts. In this case, ++ * we do it by hogging all of the CPU(s) for configurable timer intervals, ++ * sampling the built-in CPU timer, looking for discontiguous readings. ++ * ++ * WARNING: This implementation necessarily introduces latencies. Therefore, ++ * you should NEVER use this module in a production environment ++ * requiring any kind of low-latency performance guarantee(s). ++ * ++ * Copyright (C) 2008-2009 Jon Masters, Red Hat, Inc. ++ * ++ * Includes useful feedback from Clark Williams ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define BUF_SIZE_DEFAULT 262144UL /* 8K*(sizeof(entry)) */ ++#define BUF_FLAGS (RB_FL_OVERWRITE) /* no block on full */ ++#define U64STR_SIZE 22 /* 20 digits max */ ++ ++#define VERSION "1.0.0" ++#define BANNER "hwlat_detector: " ++#define DRVNAME "hwlat_detector" ++#define DEFAULT_SAMPLE_WINDOW 1000000 /* 1s */ ++#define DEFAULT_SAMPLE_WIDTH 500000 /* 0.5s */ ++#define DEFAULT_LAT_THRESHOLD 10 /* 10us */ ++ ++/* Module metadata */ ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Jon Masters "); ++MODULE_DESCRIPTION("A simple hardware latency detector"); ++MODULE_VERSION(VERSION); ++ ++/* Module parameters */ ++ ++static int debug; ++static int enabled; ++static int threshold; ++ ++module_param(debug, int, 0); /* enable debug */ ++module_param(enabled, int, 0); /* enable detector */ ++module_param(threshold, int, 0); /* latency threshold */ ++ ++/* Buffering and sampling */ ++ ++static struct ring_buffer *ring_buffer; /* sample buffer */ ++static DEFINE_MUTEX(ring_buffer_mutex); /* lock changes */ ++static unsigned long buf_size = BUF_SIZE_DEFAULT; ++static struct task_struct *kthread; /* sampling thread */ ++ ++/* DebugFS filesystem entries */ ++ ++static struct dentry *debug_dir; /* debugfs directory */ ++static struct dentry *debug_max; /* maximum TSC delta */ ++static struct dentry *debug_count; /* total detect count */ ++static struct dentry *debug_sample_width; /* sample width us */ ++static struct dentry *debug_sample_window; /* sample window us */ ++static struct dentry *debug_sample; /* raw samples us */ ++static struct dentry *debug_threshold; /* threshold us */ ++static struct dentry *debug_enable; /* enable/disable */ ++ ++/* Individual samples and global state */ ++ ++struct sample; /* latency sample */ ++struct data; /* Global state */ ++ ++/* Sampling functions */ ++static int __buffer_add_sample(struct sample *sample); ++static struct sample *buffer_get_sample(struct sample *sample); ++ ++/* Threading and state */ ++static int kthread_fn(void *unused); ++static int start_kthread(void); ++static int stop_kthread(void); ++static void __reset_stats(void); ++static int init_stats(void); ++ ++/* Debugfs interface */ ++static ssize_t simple_data_read(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos, const u64 *entry); ++static ssize_t simple_data_write(struct file *filp, const char __user *ubuf, ++ size_t cnt, loff_t *ppos, u64 *entry); ++static int debug_sample_fopen(struct inode *inode, struct file *filp); ++static ssize_t debug_sample_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos); ++static int debug_sample_release(struct inode *inode, struct file *filp); ++static int debug_enable_fopen(struct inode *inode, struct file *filp); ++static ssize_t debug_enable_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos); ++static ssize_t debug_enable_fwrite(struct file *file, ++ const char __user *user_buffer, ++ size_t user_size, loff_t *offset); ++ ++/* Initialization functions */ ++static int init_debugfs(void); ++static void free_debugfs(void); ++static int detector_init(void); ++static void detector_exit(void); ++ ++/* Individual latency samples are stored here when detected and packed into ++ * the ring_buffer circular buffer, where they are overwritten when ++ * more than buf_size/sizeof(sample) samples are received. */ ++struct sample { ++ u64 seqnum; /* unique sequence */ ++ u64 duration; /* ktime delta */ ++ u64 outer_duration; /* ktime delta (outer loop) */ ++ struct timespec timestamp; /* wall time */ ++ unsigned long lost; ++}; ++ ++/* keep the global state somewhere. */ ++static struct data { ++ ++ struct mutex lock; /* protect changes */ ++ ++ u64 count; /* total since reset */ ++ u64 max_sample; /* max hardware latency */ ++ u64 threshold; /* sample threshold level */ ++ ++ u64 sample_window; /* total sampling window (on+off) */ ++ u64 sample_width; /* active sampling portion of window */ ++ ++ atomic_t sample_open; /* whether the sample file is open */ ++ ++ wait_queue_head_t wq; /* waitqeue for new sample values */ ++ ++} data; ++ ++/** ++ * __buffer_add_sample - add a new latency sample recording to the ring buffer ++ * @sample: The new latency sample value ++ * ++ * This receives a new latency sample and records it in a global ring buffer. ++ * No additional locking is used in this case. ++ */ ++static int __buffer_add_sample(struct sample *sample) ++{ ++ return ring_buffer_write(ring_buffer, ++ sizeof(struct sample), sample); ++} ++ ++/** ++ * buffer_get_sample - remove a hardware latency sample from the ring buffer ++ * @sample: Pre-allocated storage for the sample ++ * ++ * This retrieves a hardware latency sample from the global circular buffer ++ */ ++static struct sample *buffer_get_sample(struct sample *sample) ++{ ++ struct ring_buffer_event *e = NULL; ++ struct sample *s = NULL; ++ unsigned int cpu = 0; ++ ++ if (!sample) ++ return NULL; ++ ++ mutex_lock(&ring_buffer_mutex); ++ for_each_online_cpu(cpu) { ++ e = ring_buffer_consume(ring_buffer, cpu, NULL, &sample->lost); ++ if (e) ++ break; ++ } ++ ++ if (e) { ++ s = ring_buffer_event_data(e); ++ memcpy(sample, s, sizeof(struct sample)); ++ } else ++ sample = NULL; ++ mutex_unlock(&ring_buffer_mutex); ++ ++ return sample; ++} ++ ++#ifndef CONFIG_TRACING ++#define time_type ktime_t ++#define time_get() ktime_get() ++#define time_to_us(x) ktime_to_us(x) ++#define time_sub(a, b) ktime_sub(a, b) ++#define init_time(a, b) (a).tv64 = b ++#define time_u64(a) ((a).tv64) ++#else ++#define time_type u64 ++#define time_get() trace_clock_local() ++#define time_to_us(x) div_u64(x, 1000) ++#define time_sub(a, b) ((a) - (b)) ++#define init_time(a, b) (a = b) ++#define time_u64(a) a ++#endif ++/** ++ * get_sample - sample the CPU TSC and look for likely hardware latencies ++ * ++ * Used to repeatedly capture the CPU TSC (or similar), looking for potential ++ * hardware-induced latency. Called with interrupts disabled and with ++ * data.lock held. ++ */ ++static int get_sample(void) ++{ ++ time_type start, t1, t2, last_t2; ++ s64 diff, total = 0; ++ u64 sample = 0; ++ u64 outer_sample = 0; ++ int ret = -1; ++ ++ init_time(last_t2, 0); ++ start = time_get(); /* start timestamp */ ++ ++ do { ++ ++ t1 = time_get(); /* we'll look for a discontinuity */ ++ t2 = time_get(); ++ ++ if (time_u64(last_t2)) { ++ /* Check the delta from outer loop (t2 to next t1) */ ++ diff = time_to_us(time_sub(t1, last_t2)); ++ /* This shouldn't happen */ ++ if (diff < 0) { ++ pr_err(BANNER "time running backwards\n"); ++ goto out; ++ } ++ if (diff > outer_sample) ++ outer_sample = diff; ++ } ++ last_t2 = t2; ++ ++ total = time_to_us(time_sub(t2, start)); /* sample width */ ++ ++ /* This checks the inner loop (t1 to t2) */ ++ diff = time_to_us(time_sub(t2, t1)); /* current diff */ ++ ++ /* This shouldn't happen */ ++ if (diff < 0) { ++ pr_err(BANNER "time running backwards\n"); ++ goto out; ++ } ++ ++ if (diff > sample) ++ sample = diff; /* only want highest value */ ++ ++ } while (total <= data.sample_width); ++ ++ ret = 0; ++ ++ /* If we exceed the threshold value, we have found a hardware latency */ ++ if (sample > data.threshold || outer_sample > data.threshold) { ++ struct sample s; ++ ++ ret = 1; ++ ++ data.count++; ++ s.seqnum = data.count; ++ s.duration = sample; ++ s.outer_duration = outer_sample; ++ s.timestamp = CURRENT_TIME; ++ __buffer_add_sample(&s); ++ ++ /* Keep a running maximum ever recorded hardware latency */ ++ if (sample > data.max_sample) ++ data.max_sample = sample; ++ } ++ ++out: ++ return ret; ++} ++ ++/* ++ * kthread_fn - The CPU time sampling/hardware latency detection kernel thread ++ * @unused: A required part of the kthread API. ++ * ++ * Used to periodically sample the CPU TSC via a call to get_sample. We ++ * disable interrupts, which does (intentionally) introduce latency since we ++ * need to ensure nothing else might be running (and thus pre-empting). ++ * Obviously this should never be used in production environments. ++ * ++ * Currently this runs on which ever CPU it was scheduled on, but most ++ * real-worald hardware latency situations occur across several CPUs, ++ * but we might later generalize this if we find there are any actualy ++ * systems with alternate SMI delivery or other hardware latencies. ++ */ ++static int kthread_fn(void *unused) ++{ ++ int ret; ++ u64 interval; ++ ++ while (!kthread_should_stop()) { ++ ++ mutex_lock(&data.lock); ++ ++ local_irq_disable(); ++ ret = get_sample(); ++ local_irq_enable(); ++ ++ if (ret > 0) ++ wake_up(&data.wq); /* wake up reader(s) */ ++ ++ interval = data.sample_window - data.sample_width; ++ do_div(interval, USEC_PER_MSEC); /* modifies interval value */ ++ ++ mutex_unlock(&data.lock); ++ ++ if (msleep_interruptible(interval)) ++ break; ++ } ++ ++ return 0; ++} ++ ++/** ++ * start_kthread - Kick off the hardware latency sampling/detector kthread ++ * ++ * This starts a kernel thread that will sit and sample the CPU timestamp ++ * counter (TSC or similar) and look for potential hardware latencies. ++ */ ++static int start_kthread(void) ++{ ++ kthread = kthread_run(kthread_fn, NULL, ++ DRVNAME); ++ if (IS_ERR(kthread)) { ++ pr_err(BANNER "could not start sampling thread\n"); ++ enabled = 0; ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++/** ++ * stop_kthread - Inform the hardware latency samping/detector kthread to stop ++ * ++ * This kicks the running hardware latency sampling/detector kernel thread and ++ * tells it to stop sampling now. Use this on unload and at system shutdown. ++ */ ++static int stop_kthread(void) ++{ ++ int ret; ++ ++ ret = kthread_stop(kthread); ++ ++ return ret; ++} ++ ++/** ++ * __reset_stats - Reset statistics for the hardware latency detector ++ * ++ * We use data to store various statistics and global state. We call this ++ * function in order to reset those when "enable" is toggled on or off, and ++ * also at initialization. Should be called with data.lock held. ++ */ ++static void __reset_stats(void) ++{ ++ data.count = 0; ++ data.max_sample = 0; ++ ring_buffer_reset(ring_buffer); /* flush out old sample entries */ ++} ++ ++/** ++ * init_stats - Setup global state statistics for the hardware latency detector ++ * ++ * We use data to store various statistics and global state. We also use ++ * a global ring buffer (ring_buffer) to keep raw samples of detected hardware ++ * induced system latencies. This function initializes these structures and ++ * allocates the global ring buffer also. ++ */ ++static int init_stats(void) ++{ ++ int ret = -ENOMEM; ++ ++ mutex_init(&data.lock); ++ init_waitqueue_head(&data.wq); ++ atomic_set(&data.sample_open, 0); ++ ++ ring_buffer = ring_buffer_alloc(buf_size, BUF_FLAGS); ++ ++ if (WARN(!ring_buffer, KERN_ERR BANNER ++ "failed to allocate ring buffer!\n")) ++ goto out; ++ ++ __reset_stats(); ++ data.threshold = threshold ?: DEFAULT_LAT_THRESHOLD; /* threshold us */ ++ data.sample_window = DEFAULT_SAMPLE_WINDOW; /* window us */ ++ data.sample_width = DEFAULT_SAMPLE_WIDTH; /* width us */ ++ ++ ret = 0; ++ ++out: ++ return ret; ++ ++} ++ ++/* ++ * simple_data_read - Wrapper read function for global state debugfs entries ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * @entry: The entry to read from ++ * ++ * This function provides a generic read implementation for the global state ++ * "data" structure debugfs filesystem entries. It would be nice to use ++ * simple_attr_read directly, but we need to make sure that the data.lock ++ * is held during the actual read. ++ */ ++static ssize_t simple_data_read(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos, const u64 *entry) ++{ ++ char buf[U64STR_SIZE]; ++ u64 val = 0; ++ int len = 0; ++ ++ memset(buf, 0, sizeof(buf)); ++ ++ if (!entry) ++ return -EFAULT; ++ ++ mutex_lock(&data.lock); ++ val = *entry; ++ mutex_unlock(&data.lock); ++ ++ len = snprintf(buf, sizeof(buf), "%llu\n", (unsigned long long)val); ++ ++ return simple_read_from_buffer(ubuf, cnt, ppos, buf, len); ++ ++} ++ ++/* ++ * simple_data_write - Wrapper write function for global state debugfs entries ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to write value from ++ * @cnt: The maximum number of bytes to write ++ * @ppos: The current "file" position ++ * @entry: The entry to write to ++ * ++ * This function provides a generic write implementation for the global state ++ * "data" structure debugfs filesystem entries. It would be nice to use ++ * simple_attr_write directly, but we need to make sure that the data.lock ++ * is held during the actual write. ++ */ ++static ssize_t simple_data_write(struct file *filp, const char __user *ubuf, ++ size_t cnt, loff_t *ppos, u64 *entry) ++{ ++ char buf[U64STR_SIZE]; ++ int csize = min(cnt, sizeof(buf)); ++ u64 val = 0; ++ int err = 0; ++ ++ memset(buf, '\0', sizeof(buf)); ++ if (copy_from_user(buf, ubuf, csize)) ++ return -EFAULT; ++ ++ buf[U64STR_SIZE-1] = '\0'; /* just in case */ ++ err = kstrtoull(buf, 10, &val); ++ if (err) ++ return -EINVAL; ++ ++ mutex_lock(&data.lock); ++ *entry = val; ++ mutex_unlock(&data.lock); ++ ++ return csize; ++} ++ ++/** ++ * debug_count_fopen - Open function for "count" debugfs entry ++ * @inode: The in-kernel inode representation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function provides an open implementation for the "count" debugfs ++ * interface to the hardware latency detector. ++ */ ++static int debug_count_fopen(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/** ++ * debug_count_fread - Read function for "count" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * ++ * This function provides a read implementation for the "count" debugfs ++ * interface to the hardware latency detector. Can be used to read the ++ * number of latency readings exceeding the configured threshold since ++ * the detector was last reset (e.g. by writing a zero into "count"). ++ */ ++static ssize_t debug_count_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ return simple_data_read(filp, ubuf, cnt, ppos, &data.count); ++} ++ ++/** ++ * debug_count_fwrite - Write function for "count" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that contains the value to write ++ * @cnt: The maximum number of bytes to write to "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function provides a write implementation for the "count" debugfs ++ * interface to the hardware latency detector. Can be used to write a ++ * desired value, especially to zero the total count. ++ */ ++static ssize_t debug_count_fwrite(struct file *filp, ++ const char __user *ubuf, ++ size_t cnt, ++ loff_t *ppos) ++{ ++ return simple_data_write(filp, ubuf, cnt, ppos, &data.count); ++} ++ ++/** ++ * debug_enable_fopen - Dummy open function for "enable" debugfs interface ++ * @inode: The in-kernel inode representation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function provides an open implementation for the "enable" debugfs ++ * interface to the hardware latency detector. ++ */ ++static int debug_enable_fopen(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/** ++ * debug_enable_fread - Read function for "enable" debugfs interface ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * ++ * This function provides a read implementation for the "enable" debugfs ++ * interface to the hardware latency detector. Can be used to determine ++ * whether the detector is currently enabled ("0\n" or "1\n" returned). ++ */ ++static ssize_t debug_enable_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ char buf[4]; ++ ++ if ((cnt < sizeof(buf)) || (*ppos)) ++ return 0; ++ ++ buf[0] = enabled ? '1' : '0'; ++ buf[1] = '\n'; ++ buf[2] = '\0'; ++ if (copy_to_user(ubuf, buf, strlen(buf))) ++ return -EFAULT; ++ return *ppos = strlen(buf); ++} ++ ++/** ++ * debug_enable_fwrite - Write function for "enable" debugfs interface ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that contains the value to write ++ * @cnt: The maximum number of bytes to write to "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function provides a write implementation for the "enable" debugfs ++ * interface to the hardware latency detector. Can be used to enable or ++ * disable the detector, which will have the side-effect of possibly ++ * also resetting the global stats and kicking off the measuring ++ * kthread (on an enable) or the converse (upon a disable). ++ */ ++static ssize_t debug_enable_fwrite(struct file *filp, ++ const char __user *ubuf, ++ size_t cnt, ++ loff_t *ppos) ++{ ++ char buf[4]; ++ int csize = min(cnt, sizeof(buf)); ++ long val = 0; ++ int err = 0; ++ ++ memset(buf, '\0', sizeof(buf)); ++ if (copy_from_user(buf, ubuf, csize)) ++ return -EFAULT; ++ ++ buf[sizeof(buf)-1] = '\0'; /* just in case */ ++ err = kstrtoul(buf, 10, &val); ++ if (0 != err) ++ return -EINVAL; ++ ++ if (val) { ++ if (enabled) ++ goto unlock; ++ enabled = 1; ++ __reset_stats(); ++ if (start_kthread()) ++ return -EFAULT; ++ } else { ++ if (!enabled) ++ goto unlock; ++ enabled = 0; ++ err = stop_kthread(); ++ if (err) { ++ pr_err(BANNER "cannot stop kthread\n"); ++ return -EFAULT; ++ } ++ wake_up(&data.wq); /* reader(s) should return */ ++ } ++unlock: ++ return csize; ++} ++ ++/** ++ * debug_max_fopen - Open function for "max" debugfs entry ++ * @inode: The in-kernel inode representation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function provides an open implementation for the "max" debugfs ++ * interface to the hardware latency detector. ++ */ ++static int debug_max_fopen(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/** ++ * debug_max_fread - Read function for "max" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * ++ * This function provides a read implementation for the "max" debugfs ++ * interface to the hardware latency detector. Can be used to determine ++ * the maximum latency value observed since it was last reset. ++ */ ++static ssize_t debug_max_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ return simple_data_read(filp, ubuf, cnt, ppos, &data.max_sample); ++} ++ ++/** ++ * debug_max_fwrite - Write function for "max" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that contains the value to write ++ * @cnt: The maximum number of bytes to write to "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function provides a write implementation for the "max" debugfs ++ * interface to the hardware latency detector. Can be used to reset the ++ * maximum or set it to some other desired value - if, then, subsequent ++ * measurements exceed this value, the maximum will be updated. ++ */ ++static ssize_t debug_max_fwrite(struct file *filp, ++ const char __user *ubuf, ++ size_t cnt, ++ loff_t *ppos) ++{ ++ return simple_data_write(filp, ubuf, cnt, ppos, &data.max_sample); ++} ++ ++ ++/** ++ * debug_sample_fopen - An open function for "sample" debugfs interface ++ * @inode: The in-kernel inode representation of this debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function handles opening the "sample" file within the hardware ++ * latency detector debugfs directory interface. This file is used to read ++ * raw samples from the global ring_buffer and allows the user to see a ++ * running latency history. Can be opened blocking or non-blocking, ++ * affecting whether it behaves as a buffer read pipe, or does not. ++ * Implements simple locking to prevent multiple simultaneous use. ++ */ ++static int debug_sample_fopen(struct inode *inode, struct file *filp) ++{ ++ if (!atomic_add_unless(&data.sample_open, 1, 1)) ++ return -EBUSY; ++ else ++ return 0; ++} ++ ++/** ++ * debug_sample_fread - A read function for "sample" debugfs interface ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that will contain the samples read ++ * @cnt: The maximum bytes to read from the debugfs "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function handles reading from the "sample" file within the hardware ++ * latency detector debugfs directory interface. This file is used to read ++ * raw samples from the global ring_buffer and allows the user to see a ++ * running latency history. By default this will block pending a new ++ * value written into the sample buffer, unless there are already a ++ * number of value(s) waiting in the buffer, or the sample file was ++ * previously opened in a non-blocking mode of operation. ++ */ ++static ssize_t debug_sample_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ int len = 0; ++ char buf[64]; ++ struct sample *sample = NULL; ++ ++ if (!enabled) ++ return 0; ++ ++ sample = kzalloc(sizeof(struct sample), GFP_KERNEL); ++ if (!sample) ++ return -ENOMEM; ++ ++ while (!buffer_get_sample(sample)) { ++ ++ DEFINE_WAIT(wait); ++ ++ if (filp->f_flags & O_NONBLOCK) { ++ len = -EAGAIN; ++ goto out; ++ } ++ ++ prepare_to_wait(&data.wq, &wait, TASK_INTERRUPTIBLE); ++ schedule(); ++ finish_wait(&data.wq, &wait); ++ ++ if (signal_pending(current)) { ++ len = -EINTR; ++ goto out; ++ } ++ ++ if (!enabled) { /* enable was toggled */ ++ len = 0; ++ goto out; ++ } ++ } ++ ++ len = snprintf(buf, sizeof(buf), "%010lu.%010lu\t%llu\t%llu\n", ++ sample->timestamp.tv_sec, ++ sample->timestamp.tv_nsec, ++ sample->duration, ++ sample->outer_duration); ++ ++ ++ /* handling partial reads is more trouble than it's worth */ ++ if (len > cnt) ++ goto out; ++ ++ if (copy_to_user(ubuf, buf, len)) ++ len = -EFAULT; ++ ++out: ++ kfree(sample); ++ return len; ++} ++ ++/** ++ * debug_sample_release - Release function for "sample" debugfs interface ++ * @inode: The in-kernel inode represenation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function completes the close of the debugfs interface "sample" file. ++ * Frees the sample_open "lock" so that other users may open the interface. ++ */ ++static int debug_sample_release(struct inode *inode, struct file *filp) ++{ ++ atomic_dec(&data.sample_open); ++ ++ return 0; ++} ++ ++/** ++ * debug_threshold_fopen - Open function for "threshold" debugfs entry ++ * @inode: The in-kernel inode representation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function provides an open implementation for the "threshold" debugfs ++ * interface to the hardware latency detector. ++ */ ++static int debug_threshold_fopen(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/** ++ * debug_threshold_fread - Read function for "threshold" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * ++ * This function provides a read implementation for the "threshold" debugfs ++ * interface to the hardware latency detector. It can be used to determine ++ * the current threshold level at which a latency will be recorded in the ++ * global ring buffer, typically on the order of 10us. ++ */ ++static ssize_t debug_threshold_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ return simple_data_read(filp, ubuf, cnt, ppos, &data.threshold); ++} ++ ++/** ++ * debug_threshold_fwrite - Write function for "threshold" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that contains the value to write ++ * @cnt: The maximum number of bytes to write to "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function provides a write implementation for the "threshold" debugfs ++ * interface to the hardware latency detector. It can be used to configure ++ * the threshold level at which any subsequently detected latencies will ++ * be recorded into the global ring buffer. ++ */ ++static ssize_t debug_threshold_fwrite(struct file *filp, ++ const char __user *ubuf, ++ size_t cnt, ++ loff_t *ppos) ++{ ++ int ret; ++ ++ ret = simple_data_write(filp, ubuf, cnt, ppos, &data.threshold); ++ ++ if (enabled) ++ wake_up_process(kthread); ++ ++ return ret; ++} ++ ++/** ++ * debug_width_fopen - Open function for "width" debugfs entry ++ * @inode: The in-kernel inode representation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function provides an open implementation for the "width" debugfs ++ * interface to the hardware latency detector. ++ */ ++static int debug_width_fopen(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/** ++ * debug_width_fread - Read function for "width" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * ++ * This function provides a read implementation for the "width" debugfs ++ * interface to the hardware latency detector. It can be used to determine ++ * for how many us of the total window us we will actively sample for any ++ * hardware-induced latecy periods. Obviously, it is not possible to ++ * sample constantly and have the system respond to a sample reader, or, ++ * worse, without having the system appear to have gone out to lunch. ++ */ ++static ssize_t debug_width_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ return simple_data_read(filp, ubuf, cnt, ppos, &data.sample_width); ++} ++ ++/** ++ * debug_width_fwrite - Write function for "width" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that contains the value to write ++ * @cnt: The maximum number of bytes to write to "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function provides a write implementation for the "width" debugfs ++ * interface to the hardware latency detector. It can be used to configure ++ * for how many us of the total window us we will actively sample for any ++ * hardware-induced latency periods. Obviously, it is not possible to ++ * sample constantly and have the system respond to a sample reader, or, ++ * worse, without having the system appear to have gone out to lunch. It ++ * is enforced that width is less that the total window size. ++ */ ++static ssize_t debug_width_fwrite(struct file *filp, ++ const char __user *ubuf, ++ size_t cnt, ++ loff_t *ppos) ++{ ++ char buf[U64STR_SIZE]; ++ int csize = min(cnt, sizeof(buf)); ++ u64 val = 0; ++ int err = 0; ++ ++ memset(buf, '\0', sizeof(buf)); ++ if (copy_from_user(buf, ubuf, csize)) ++ return -EFAULT; ++ ++ buf[U64STR_SIZE-1] = '\0'; /* just in case */ ++ err = kstrtoull(buf, 10, &val); ++ if (0 != err) ++ return -EINVAL; ++ ++ mutex_lock(&data.lock); ++ if (val < data.sample_window) ++ data.sample_width = val; ++ else { ++ mutex_unlock(&data.lock); ++ return -EINVAL; ++ } ++ mutex_unlock(&data.lock); ++ ++ if (enabled) ++ wake_up_process(kthread); ++ ++ return csize; ++} ++ ++/** ++ * debug_window_fopen - Open function for "window" debugfs entry ++ * @inode: The in-kernel inode representation of the debugfs "file" ++ * @filp: The active open file structure for the debugfs "file" ++ * ++ * This function provides an open implementation for the "window" debugfs ++ * interface to the hardware latency detector. The window is the total time ++ * in us that will be considered one sample period. Conceptually, windows ++ * occur back-to-back and contain a sample width period during which ++ * actual sampling occurs. ++ */ ++static int debug_window_fopen(struct inode *inode, struct file *filp) ++{ ++ return 0; ++} ++ ++/** ++ * debug_window_fread - Read function for "window" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The userspace provided buffer to read value into ++ * @cnt: The maximum number of bytes to read ++ * @ppos: The current "file" position ++ * ++ * This function provides a read implementation for the "window" debugfs ++ * interface to the hardware latency detector. The window is the total time ++ * in us that will be considered one sample period. Conceptually, windows ++ * occur back-to-back and contain a sample width period during which ++ * actual sampling occurs. Can be used to read the total window size. ++ */ ++static ssize_t debug_window_fread(struct file *filp, char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ return simple_data_read(filp, ubuf, cnt, ppos, &data.sample_window); ++} ++ ++/** ++ * debug_window_fwrite - Write function for "window" debugfs entry ++ * @filp: The active open file structure for the debugfs "file" ++ * @ubuf: The user buffer that contains the value to write ++ * @cnt: The maximum number of bytes to write to "file" ++ * @ppos: The current position in the debugfs "file" ++ * ++ * This function provides a write implementation for the "window" debufds ++ * interface to the hardware latency detetector. The window is the total time ++ * in us that will be considered one sample period. Conceptually, windows ++ * occur back-to-back and contain a sample width period during which ++ * actual sampling occurs. Can be used to write a new total window size. It ++ * is enfoced that any value written must be greater than the sample width ++ * size, or an error results. ++ */ ++static ssize_t debug_window_fwrite(struct file *filp, ++ const char __user *ubuf, ++ size_t cnt, ++ loff_t *ppos) ++{ ++ char buf[U64STR_SIZE]; ++ int csize = min(cnt, sizeof(buf)); ++ u64 val = 0; ++ int err = 0; ++ ++ memset(buf, '\0', sizeof(buf)); ++ if (copy_from_user(buf, ubuf, csize)) ++ return -EFAULT; ++ ++ buf[U64STR_SIZE-1] = '\0'; /* just in case */ ++ err = kstrtoull(buf, 10, &val); ++ if (0 != err) ++ return -EINVAL; ++ ++ mutex_lock(&data.lock); ++ if (data.sample_width < val) ++ data.sample_window = val; ++ else { ++ mutex_unlock(&data.lock); ++ return -EINVAL; ++ } ++ mutex_unlock(&data.lock); ++ ++ return csize; ++} ++ ++/* ++ * Function pointers for the "count" debugfs file operations ++ */ ++static const struct file_operations count_fops = { ++ .open = debug_count_fopen, ++ .read = debug_count_fread, ++ .write = debug_count_fwrite, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * Function pointers for the "enable" debugfs file operations ++ */ ++static const struct file_operations enable_fops = { ++ .open = debug_enable_fopen, ++ .read = debug_enable_fread, ++ .write = debug_enable_fwrite, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * Function pointers for the "max" debugfs file operations ++ */ ++static const struct file_operations max_fops = { ++ .open = debug_max_fopen, ++ .read = debug_max_fread, ++ .write = debug_max_fwrite, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * Function pointers for the "sample" debugfs file operations ++ */ ++static const struct file_operations sample_fops = { ++ .open = debug_sample_fopen, ++ .read = debug_sample_fread, ++ .release = debug_sample_release, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * Function pointers for the "threshold" debugfs file operations ++ */ ++static const struct file_operations threshold_fops = { ++ .open = debug_threshold_fopen, ++ .read = debug_threshold_fread, ++ .write = debug_threshold_fwrite, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * Function pointers for the "width" debugfs file operations ++ */ ++static const struct file_operations width_fops = { ++ .open = debug_width_fopen, ++ .read = debug_width_fread, ++ .write = debug_width_fwrite, ++ .owner = THIS_MODULE, ++}; ++ ++/* ++ * Function pointers for the "window" debugfs file operations ++ */ ++static const struct file_operations window_fops = { ++ .open = debug_window_fopen, ++ .read = debug_window_fread, ++ .write = debug_window_fwrite, ++ .owner = THIS_MODULE, ++}; ++ ++/** ++ * init_debugfs - A function to initialize the debugfs interface files ++ * ++ * This function creates entries in debugfs for "hwlat_detector", including ++ * files to read values from the detector, current samples, and the ++ * maximum sample that has been captured since the hardware latency ++ * dectector was started. ++ */ ++static int init_debugfs(void) ++{ ++ int ret = -ENOMEM; ++ ++ debug_dir = debugfs_create_dir(DRVNAME, NULL); ++ if (!debug_dir) ++ goto err_debug_dir; ++ ++ debug_sample = debugfs_create_file("sample", 0444, ++ debug_dir, NULL, ++ &sample_fops); ++ if (!debug_sample) ++ goto err_sample; ++ ++ debug_count = debugfs_create_file("count", 0444, ++ debug_dir, NULL, ++ &count_fops); ++ if (!debug_count) ++ goto err_count; ++ ++ debug_max = debugfs_create_file("max", 0444, ++ debug_dir, NULL, ++ &max_fops); ++ if (!debug_max) ++ goto err_max; ++ ++ debug_sample_window = debugfs_create_file("window", 0644, ++ debug_dir, NULL, ++ &window_fops); ++ if (!debug_sample_window) ++ goto err_window; ++ ++ debug_sample_width = debugfs_create_file("width", 0644, ++ debug_dir, NULL, ++ &width_fops); ++ if (!debug_sample_width) ++ goto err_width; ++ ++ debug_threshold = debugfs_create_file("threshold", 0644, ++ debug_dir, NULL, ++ &threshold_fops); ++ if (!debug_threshold) ++ goto err_threshold; ++ ++ debug_enable = debugfs_create_file("enable", 0644, ++ debug_dir, &enabled, ++ &enable_fops); ++ if (!debug_enable) ++ goto err_enable; ++ ++ else { ++ ret = 0; ++ goto out; ++ } ++ ++err_enable: ++ debugfs_remove(debug_threshold); ++err_threshold: ++ debugfs_remove(debug_sample_width); ++err_width: ++ debugfs_remove(debug_sample_window); ++err_window: ++ debugfs_remove(debug_max); ++err_max: ++ debugfs_remove(debug_count); ++err_count: ++ debugfs_remove(debug_sample); ++err_sample: ++ debugfs_remove(debug_dir); ++err_debug_dir: ++out: ++ return ret; ++} ++ ++/** ++ * free_debugfs - A function to cleanup the debugfs file interface ++ */ ++static void free_debugfs(void) ++{ ++ /* could also use a debugfs_remove_recursive */ ++ debugfs_remove(debug_enable); ++ debugfs_remove(debug_threshold); ++ debugfs_remove(debug_sample_width); ++ debugfs_remove(debug_sample_window); ++ debugfs_remove(debug_max); ++ debugfs_remove(debug_count); ++ debugfs_remove(debug_sample); ++ debugfs_remove(debug_dir); ++} ++ ++/** ++ * detector_init - Standard module initialization code ++ */ ++static int detector_init(void) ++{ ++ int ret = -ENOMEM; ++ ++ pr_info(BANNER "version %s\n", VERSION); ++ ++ ret = init_stats(); ++ if (0 != ret) ++ goto out; ++ ++ ret = init_debugfs(); ++ if (0 != ret) ++ goto err_stats; ++ ++ if (enabled) ++ ret = start_kthread(); ++ ++ goto out; ++ ++err_stats: ++ ring_buffer_free(ring_buffer); ++out: ++ return ret; ++ ++} ++ ++/** ++ * detector_exit - Standard module cleanup code ++ */ ++static void detector_exit(void) ++{ ++ int err; ++ ++ if (enabled) { ++ enabled = 0; ++ err = stop_kthread(); ++ if (err) ++ pr_err(BANNER "cannot stop kthread\n"); ++ } ++ ++ free_debugfs(); ++ ring_buffer_free(ring_buffer); /* free up the ring buffer */ ++ ++} ++ ++module_init(detector_init); ++module_exit(detector_exit); +diff -Nur linux-4.1.26.orig/drivers/misc/Kconfig linux-4.1.26/drivers/misc/Kconfig +--- linux-4.1.26.orig/drivers/misc/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/misc/Kconfig 2016-06-19 15:30:58.639295498 +0200 +@@ -54,6 +54,7 @@ + config ATMEL_TCLIB + bool "Atmel AT32/AT91 Timer/Counter Library" + depends on (AVR32 || ARCH_AT91) ++ default y if PREEMPT_RT_FULL + help + Select this if you want a library to allocate the Timer/Counter + blocks found on many Atmel processors. This facilitates using +@@ -69,8 +70,7 @@ + are combined to make a single 32-bit timer. + + When GENERIC_CLOCKEVENTS is defined, the third timer channel +- may be used as a clock event device supporting oneshot mode +- (delays of up to two seconds) based on the 32 KiHz clock. ++ may be used as a clock event device supporting oneshot mode. + + config ATMEL_TCB_CLKSRC_BLOCK + int +@@ -84,6 +84,15 @@ + TC can be used for other purposes, such as PWM generation and + interval timing. + ++config ATMEL_TCB_CLKSRC_USE_SLOW_CLOCK ++ bool "TC Block use 32 KiHz clock" ++ depends on ATMEL_TCB_CLKSRC ++ default y if !PREEMPT_RT_FULL ++ help ++ Select this to use 32 KiHz base clock rate as TC block clock ++ source for clock events. ++ ++ + config DUMMY_IRQ + tristate "Dummy IRQ handler" + default n +@@ -113,6 +122,35 @@ + for information on the specific driver level and support statement + for your IBM server. + ++config HWLAT_DETECTOR ++ tristate "Testing module to detect hardware-induced latencies" ++ depends on DEBUG_FS ++ depends on RING_BUFFER ++ default m ++ ---help--- ++ A simple hardware latency detector. Use this module to detect ++ large latencies introduced by the behavior of the underlying ++ system firmware external to Linux. We do this using periodic ++ use of stop_machine to grab all available CPUs and measure ++ for unexplainable gaps in the CPU timestamp counter(s). By ++ default, the module is not enabled until the "enable" file ++ within the "hwlat_detector" debugfs directory is toggled. ++ ++ This module is often used to detect SMI (System Management ++ Interrupts) on x86 systems, though is not x86 specific. To ++ this end, we default to using a sample window of 1 second, ++ during which we will sample for 0.5 seconds. If an SMI or ++ similar event occurs during that time, it is recorded ++ into an 8K samples global ring buffer until retreived. ++ ++ WARNING: This software should never be enabled (it can be built ++ but should not be turned on after it is loaded) in a production ++ environment where high latencies are a concern since the ++ sampling mechanism actually introduces latencies for ++ regular tasks while the CPU(s) are being held. ++ ++ If unsure, say N ++ + config PHANTOM + tristate "Sensable PHANToM (PCI)" + depends on PCI +diff -Nur linux-4.1.26.orig/drivers/misc/Makefile linux-4.1.26/drivers/misc/Makefile +--- linux-4.1.26.orig/drivers/misc/Makefile 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/misc/Makefile 2016-06-19 15:30:58.639295498 +0200 +@@ -38,6 +38,7 @@ + obj-$(CONFIG_HMC6352) += hmc6352.o + obj-y += eeprom/ + obj-y += cb710/ ++obj-$(CONFIG_HWLAT_DETECTOR) += hwlat_detector.o + obj-$(CONFIG_SPEAR13XX_PCIE_GADGET) += spear13xx_pcie_gadget.o + obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o + obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o +diff -Nur linux-4.1.26.orig/drivers/mmc/host/mmci.c linux-4.1.26/drivers/mmc/host/mmci.c +--- linux-4.1.26.orig/drivers/mmc/host/mmci.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/mmc/host/mmci.c 2016-06-19 15:30:58.643295653 +0200 +@@ -1155,15 +1155,12 @@ + struct sg_mapping_iter *sg_miter = &host->sg_miter; + struct variant_data *variant = host->variant; + void __iomem *base = host->base; +- unsigned long flags; + u32 status; + + status = readl(base + MMCISTATUS); + + dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); + +- local_irq_save(flags); +- + do { + unsigned int remain, len; + char *buffer; +@@ -1203,8 +1200,6 @@ + + sg_miter_stop(sg_miter); + +- local_irq_restore(flags); +- + /* + * If we have less than the fifo 'half-full' threshold to transfer, + * trigger a PIO interrupt as soon as any data is available. +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/3com/3c59x.c linux-4.1.26/drivers/net/ethernet/3com/3c59x.c +--- linux-4.1.26.orig/drivers/net/ethernet/3com/3c59x.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/3com/3c59x.c 2016-06-19 15:30:58.643295653 +0200 +@@ -842,9 +842,9 @@ + { + struct vortex_private *vp = netdev_priv(dev); + unsigned long flags; +- local_irq_save(flags); ++ local_irq_save_nort(flags); + (vp->full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev->irq,dev); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + #endif + +@@ -1916,12 +1916,12 @@ + * Block interrupts because vortex_interrupt does a bare spin_lock() + */ + unsigned long flags; +- local_irq_save(flags); ++ local_irq_save_nort(flags); + if (vp->full_bus_master_tx) + boomerang_interrupt(dev->irq, dev); + else + vortex_interrupt(dev->irq, dev); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + } + +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1c/atl1c_main.c linux-4.1.26/drivers/net/ethernet/atheros/atl1c/atl1c_main.c +--- linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1c/atl1c_main.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/atheros/atl1c/atl1c_main.c 2016-06-19 15:30:58.643295653 +0200 +@@ -2212,11 +2212,7 @@ + } + + tpd_req = atl1c_cal_tpd_req(skb); +- if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { +- if (netif_msg_pktdata(adapter)) +- dev_info(&adapter->pdev->dev, "tx locked\n"); +- return NETDEV_TX_LOCKED; +- } ++ spin_lock_irqsave(&adapter->tx_lock, flags); + + if (atl1c_tpd_avail(adapter, type) < tpd_req) { + /* no enough descriptor, just stop queue */ +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1e/atl1e_main.c linux-4.1.26/drivers/net/ethernet/atheros/atl1e/atl1e_main.c +--- linux-4.1.26.orig/drivers/net/ethernet/atheros/atl1e/atl1e_main.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/atheros/atl1e/atl1e_main.c 2016-06-19 15:30:58.643295653 +0200 +@@ -1880,8 +1880,7 @@ + return NETDEV_TX_OK; + } + tpd_req = atl1e_cal_tdp_req(skb); +- if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) +- return NETDEV_TX_LOCKED; ++ spin_lock_irqsave(&adapter->tx_lock, flags); + + if (atl1e_tpd_avail(adapter) < tpd_req) { + /* no enough descriptor, just stop queue */ +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/chelsio/cxgb/sge.c linux-4.1.26/drivers/net/ethernet/chelsio/cxgb/sge.c +--- linux-4.1.26.orig/drivers/net/ethernet/chelsio/cxgb/sge.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/chelsio/cxgb/sge.c 2016-06-19 15:30:58.643295653 +0200 +@@ -1664,8 +1664,7 @@ + struct cmdQ *q = &sge->cmdQ[qid]; + unsigned int credits, pidx, genbit, count, use_sched_skb = 0; + +- if (!spin_trylock(&q->lock)) +- return NETDEV_TX_LOCKED; ++ spin_lock(&q->lock); + + reclaim_completed_tx(sge, q); + +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/freescale/gianfar.c linux-4.1.26/drivers/net/ethernet/freescale/gianfar.c +--- linux-4.1.26.orig/drivers/net/ethernet/freescale/gianfar.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/freescale/gianfar.c 2016-06-19 15:30:58.643295653 +0200 +@@ -1540,7 +1540,7 @@ + + if (netif_running(ndev)) { + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + lock_tx_qs(priv); + + gfar_halt_nodisable(priv); +@@ -1556,7 +1556,7 @@ + gfar_write(®s->maccfg1, tempval); + + unlock_tx_qs(priv); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + disable_napi(priv); + +@@ -1598,7 +1598,7 @@ + /* Disable Magic Packet mode, in case something + * else woke us up. + */ +- local_irq_save(flags); ++ local_irq_save_nort(flags); + lock_tx_qs(priv); + + tempval = gfar_read(®s->maccfg2); +@@ -1608,7 +1608,7 @@ + gfar_start(priv); + + unlock_tx_qs(priv); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + netif_device_attach(ndev); + +@@ -3418,14 +3418,14 @@ + dev->stats.tx_dropped++; + atomic64_inc(&priv->extra_stats.tx_underrun); + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + lock_tx_qs(priv); + + /* Reactivate the Tx Queues */ + gfar_write(®s->tstat, gfargrp->tstat); + + unlock_tx_qs(priv); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + netif_dbg(priv, tx_err, dev, "Transmit Error\n"); + } +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/neterion/s2io.c linux-4.1.26/drivers/net/ethernet/neterion/s2io.c +--- linux-4.1.26.orig/drivers/net/ethernet/neterion/s2io.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/neterion/s2io.c 2016-06-19 15:30:58.647295807 +0200 +@@ -4084,12 +4084,7 @@ + [skb->priority & (MAX_TX_FIFOS - 1)]; + fifo = &mac_control->fifos[queue]; + +- if (do_spin_lock) +- spin_lock_irqsave(&fifo->tx_lock, flags); +- else { +- if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags))) +- return NETDEV_TX_LOCKED; +- } ++ spin_lock_irqsave(&fifo->tx_lock, flags); + + if (sp->config.multiq) { + if (__netif_subqueue_stopped(dev, fifo->fifo_no)) { +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c linux-4.1.26/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +--- linux-4.1.26.orig/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c 2016-06-19 15:30:58.647295807 +0200 +@@ -2137,10 +2137,8 @@ + struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; + unsigned long flags; + +- if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags)) { +- /* Collision - tell upper layer to requeue */ +- return NETDEV_TX_LOCKED; +- } ++ spin_lock_irqsave(&tx_ring->tx_lock, flags); ++ + if (unlikely(!PCH_GBE_DESC_UNUSED(tx_ring))) { + netif_stop_queue(netdev); + spin_unlock_irqrestore(&tx_ring->tx_lock, flags); +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/realtek/8139too.c linux-4.1.26/drivers/net/ethernet/realtek/8139too.c +--- linux-4.1.26.orig/drivers/net/ethernet/realtek/8139too.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/realtek/8139too.c 2016-06-19 15:30:58.647295807 +0200 +@@ -2229,7 +2229,7 @@ + struct rtl8139_private *tp = netdev_priv(dev); + const int irq = tp->pci_dev->irq; + +- disable_irq(irq); ++ disable_irq_nosync(irq); + rtl8139_interrupt(irq, dev); + enable_irq(irq); + } +diff -Nur linux-4.1.26.orig/drivers/net/ethernet/tehuti/tehuti.c linux-4.1.26/drivers/net/ethernet/tehuti/tehuti.c +--- linux-4.1.26.orig/drivers/net/ethernet/tehuti/tehuti.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/ethernet/tehuti/tehuti.c 2016-06-19 15:30:58.647295807 +0200 +@@ -1629,13 +1629,8 @@ + unsigned long flags; + + ENTER; +- local_irq_save(flags); +- if (!spin_trylock(&priv->tx_lock)) { +- local_irq_restore(flags); +- DBG("%s[%s]: TX locked, returning NETDEV_TX_LOCKED\n", +- BDX_DRV_NAME, ndev->name); +- return NETDEV_TX_LOCKED; +- } ++ ++ spin_lock_irqsave(&priv->tx_lock, flags); + + /* build tx descriptor */ + BDX_ASSERT(f->m.wptr >= f->m.memsz); /* started with valid wptr */ +diff -Nur linux-4.1.26.orig/drivers/net/rionet.c linux-4.1.26/drivers/net/rionet.c +--- linux-4.1.26.orig/drivers/net/rionet.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/rionet.c 2016-06-19 15:30:58.647295807 +0200 +@@ -174,11 +174,7 @@ + unsigned long flags; + int add_num = 1; + +- local_irq_save(flags); +- if (!spin_trylock(&rnet->tx_lock)) { +- local_irq_restore(flags); +- return NETDEV_TX_LOCKED; +- } ++ spin_lock_irqsave(&rnet->tx_lock, flags); + + if (is_multicast_ether_addr(eth->h_dest)) + add_num = nets[rnet->mport->id].nact; +diff -Nur linux-4.1.26.orig/drivers/net/wireless/orinoco/orinoco_usb.c linux-4.1.26/drivers/net/wireless/orinoco/orinoco_usb.c +--- linux-4.1.26.orig/drivers/net/wireless/orinoco/orinoco_usb.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/net/wireless/orinoco/orinoco_usb.c 2016-06-19 15:30:58.647295807 +0200 +@@ -697,7 +697,7 @@ + while (!ctx->done.done && msecs--) + udelay(1000); + } else { +- wait_event_interruptible(ctx->done.wait, ++ swait_event_interruptible(ctx->done.wait, + ctx->done.done); + } + break; +diff -Nur linux-4.1.26.orig/drivers/pci/access.c linux-4.1.26/drivers/pci/access.c +--- linux-4.1.26.orig/drivers/pci/access.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/pci/access.c 2016-06-19 15:30:58.647295807 +0200 +@@ -561,7 +561,7 @@ + WARN_ON(!dev->block_cfg_access); + + dev->block_cfg_access = 0; +- wake_up_all(&pci_cfg_wait); ++ wake_up_all_locked(&pci_cfg_wait); + raw_spin_unlock_irqrestore(&pci_lock, flags); + } + EXPORT_SYMBOL_GPL(pci_cfg_access_unlock); +diff -Nur linux-4.1.26.orig/drivers/scsi/fcoe/fcoe.c linux-4.1.26/drivers/scsi/fcoe/fcoe.c +--- linux-4.1.26.orig/drivers/scsi/fcoe/fcoe.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/scsi/fcoe/fcoe.c 2016-06-19 15:30:58.647295807 +0200 +@@ -1287,7 +1287,7 @@ + struct sk_buff *skb; + #ifdef CONFIG_SMP + struct fcoe_percpu_s *p0; +- unsigned targ_cpu = get_cpu(); ++ unsigned targ_cpu = get_cpu_light(); + #endif /* CONFIG_SMP */ + + FCOE_DBG("Destroying receive thread for CPU %d\n", cpu); +@@ -1343,7 +1343,7 @@ + kfree_skb(skb); + spin_unlock_bh(&p->fcoe_rx_list.lock); + } +- put_cpu(); ++ put_cpu_light(); + #else + /* + * This a non-SMP scenario where the singular Rx thread is +@@ -1567,11 +1567,11 @@ + static int fcoe_alloc_paged_crc_eof(struct sk_buff *skb, int tlen) + { + struct fcoe_percpu_s *fps; +- int rc; ++ int rc, cpu = get_cpu_light(); + +- fps = &get_cpu_var(fcoe_percpu); ++ fps = &per_cpu(fcoe_percpu, cpu); + rc = fcoe_get_paged_crc_eof(skb, tlen, fps); +- put_cpu_var(fcoe_percpu); ++ put_cpu_light(); + + return rc; + } +@@ -1767,11 +1767,11 @@ + return 0; + } + +- stats = per_cpu_ptr(lport->stats, get_cpu()); ++ stats = per_cpu_ptr(lport->stats, get_cpu_light()); + stats->InvalidCRCCount++; + if (stats->InvalidCRCCount < 5) + printk(KERN_WARNING "fcoe: dropping frame with CRC error\n"); +- put_cpu(); ++ put_cpu_light(); + return -EINVAL; + } + +@@ -1847,13 +1847,13 @@ + goto drop; + + if (!fcoe_filter_frames(lport, fp)) { +- put_cpu(); ++ put_cpu_light(); + fc_exch_recv(lport, fp); + return; + } + drop: + stats->ErrorFrames++; +- put_cpu(); ++ put_cpu_light(); + kfree_skb(skb); + } + +diff -Nur linux-4.1.26.orig/drivers/scsi/fcoe/fcoe_ctlr.c linux-4.1.26/drivers/scsi/fcoe/fcoe_ctlr.c +--- linux-4.1.26.orig/drivers/scsi/fcoe/fcoe_ctlr.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/scsi/fcoe/fcoe_ctlr.c 2016-06-19 15:30:58.651295961 +0200 +@@ -831,7 +831,7 @@ + + INIT_LIST_HEAD(&del_list); + +- stats = per_cpu_ptr(fip->lp->stats, get_cpu()); ++ stats = per_cpu_ptr(fip->lp->stats, get_cpu_light()); + + list_for_each_entry_safe(fcf, next, &fip->fcfs, list) { + deadline = fcf->time + fcf->fka_period + fcf->fka_period / 2; +@@ -867,7 +867,7 @@ + sel_time = fcf->time; + } + } +- put_cpu(); ++ put_cpu_light(); + + list_for_each_entry_safe(fcf, next, &del_list, list) { + /* Removes fcf from current list */ +diff -Nur linux-4.1.26.orig/drivers/scsi/libfc/fc_exch.c linux-4.1.26/drivers/scsi/libfc/fc_exch.c +--- linux-4.1.26.orig/drivers/scsi/libfc/fc_exch.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/scsi/libfc/fc_exch.c 2016-06-19 15:30:58.651295961 +0200 +@@ -814,10 +814,10 @@ + } + memset(ep, 0, sizeof(*ep)); + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + pool = per_cpu_ptr(mp->pool, cpu); + spin_lock_bh(&pool->lock); +- put_cpu(); ++ put_cpu_light(); + + /* peek cache of free slot */ + if (pool->left != FC_XID_UNKNOWN) { +diff -Nur linux-4.1.26.orig/drivers/scsi/libsas/sas_ata.c linux-4.1.26/drivers/scsi/libsas/sas_ata.c +--- linux-4.1.26.orig/drivers/scsi/libsas/sas_ata.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/scsi/libsas/sas_ata.c 2016-06-19 15:30:58.651295961 +0200 +@@ -190,7 +190,7 @@ + /* TODO: audit callers to ensure they are ready for qc_issue to + * unconditionally re-enable interrupts + */ +- local_irq_save(flags); ++ local_irq_save_nort(flags); + spin_unlock(ap->lock); + + /* If the device fell off, no sense in issuing commands */ +@@ -255,7 +255,7 @@ + + out: + spin_lock(ap->lock); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + return ret; + } + +diff -Nur linux-4.1.26.orig/drivers/scsi/qla2xxx/qla_inline.h linux-4.1.26/drivers/scsi/qla2xxx/qla_inline.h +--- linux-4.1.26.orig/drivers/scsi/qla2xxx/qla_inline.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/scsi/qla2xxx/qla_inline.h 2016-06-19 15:30:58.651295961 +0200 +@@ -59,12 +59,12 @@ + { + unsigned long flags; + struct qla_hw_data *ha = rsp->hw; +- local_irq_save(flags); ++ local_irq_save_nort(flags); + if (IS_P3P_TYPE(ha)) + qla82xx_poll(0, rsp); + else + ha->isp_ops->intr_handler(0, rsp); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + + static inline uint8_t * +diff -Nur linux-4.1.26.orig/drivers/thermal/x86_pkg_temp_thermal.c linux-4.1.26/drivers/thermal/x86_pkg_temp_thermal.c +--- linux-4.1.26.orig/drivers/thermal/x86_pkg_temp_thermal.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/thermal/x86_pkg_temp_thermal.c 2016-06-19 15:30:58.651295961 +0200 +@@ -29,6 +29,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -352,7 +353,7 @@ + } + } + +-static int pkg_temp_thermal_platform_thermal_notify(__u64 msr_val) ++static void platform_thermal_notify_work(struct swork_event *event) + { + unsigned long flags; + int cpu = smp_processor_id(); +@@ -369,7 +370,7 @@ + pkg_work_scheduled[phy_id]) { + disable_pkg_thres_interrupt(); + spin_unlock_irqrestore(&pkg_work_lock, flags); +- return -EINVAL; ++ return; + } + pkg_work_scheduled[phy_id] = 1; + spin_unlock_irqrestore(&pkg_work_lock, flags); +@@ -378,9 +379,48 @@ + schedule_delayed_work_on(cpu, + &per_cpu(pkg_temp_thermal_threshold_work, cpu), + msecs_to_jiffies(notify_delay_ms)); ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++static struct swork_event notify_work; ++ ++static int thermal_notify_work_init(void) ++{ ++ int err; ++ ++ err = swork_get(); ++ if (err) ++ return err; ++ ++ INIT_SWORK(¬ify_work, platform_thermal_notify_work); + return 0; + } + ++static void thermal_notify_work_cleanup(void) ++{ ++ swork_put(); ++} ++ ++static int pkg_temp_thermal_platform_thermal_notify(__u64 msr_val) ++{ ++ swork_queue(¬ify_work); ++ return 0; ++} ++ ++#else /* !CONFIG_PREEMPT_RT_FULL */ ++ ++static int thermal_notify_work_init(void) { return 0; } ++ ++static void thermal_notify_work_cleanup(void) { } ++ ++static int pkg_temp_thermal_platform_thermal_notify(__u64 msr_val) ++{ ++ platform_thermal_notify_work(NULL); ++ ++ return 0; ++} ++#endif /* CONFIG_PREEMPT_RT_FULL */ ++ + static int find_siblings_cpu(int cpu) + { + int i; +@@ -584,6 +624,9 @@ + if (!x86_match_cpu(pkg_temp_thermal_ids)) + return -ENODEV; + ++ if (!thermal_notify_work_init()) ++ return -ENODEV; ++ + spin_lock_init(&pkg_work_lock); + platform_thermal_package_notify = + pkg_temp_thermal_platform_thermal_notify; +@@ -608,7 +651,7 @@ + kfree(pkg_work_scheduled); + platform_thermal_package_notify = NULL; + platform_thermal_package_rate_control = NULL; +- ++ thermal_notify_work_cleanup(); + return -ENODEV; + } + +@@ -633,6 +676,7 @@ + mutex_unlock(&phy_dev_list_mutex); + platform_thermal_package_notify = NULL; + platform_thermal_package_rate_control = NULL; ++ thermal_notify_work_cleanup(); + for_each_online_cpu(i) + cancel_delayed_work_sync( + &per_cpu(pkg_temp_thermal_threshold_work, i)); +diff -Nur linux-4.1.26.orig/drivers/tty/serial/8250/8250_core.c linux-4.1.26/drivers/tty/serial/8250/8250_core.c +--- linux-4.1.26.orig/drivers/tty/serial/8250/8250_core.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/tty/serial/8250/8250_core.c 2016-06-19 15:30:58.651295961 +0200 +@@ -36,6 +36,7 @@ + #include + #include + #include ++#include + #include + #include + #ifdef CONFIG_SPARC +@@ -80,7 +81,16 @@ + #define DEBUG_INTR(fmt...) do { } while (0) + #endif + +-#define PASS_LIMIT 512 ++/* ++ * On -rt we can have a more delays, and legitimately ++ * so - so don't drop work spuriously and spam the ++ * syslog: ++ */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define PASS_LIMIT 1000000 ++#else ++# define PASS_LIMIT 512 ++#endif + + #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) + +@@ -3372,7 +3382,7 @@ + + if (port->sysrq) + locked = 0; +- else if (oops_in_progress) ++ else if (oops_in_progress || in_kdb_printk()) + locked = spin_trylock_irqsave(&port->lock, flags); + else + spin_lock_irqsave(&port->lock, flags); +diff -Nur linux-4.1.26.orig/drivers/tty/serial/amba-pl011.c linux-4.1.26/drivers/tty/serial/amba-pl011.c +--- linux-4.1.26.orig/drivers/tty/serial/amba-pl011.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/tty/serial/amba-pl011.c 2016-06-19 15:30:58.651295961 +0200 +@@ -2000,13 +2000,19 @@ + + clk_enable(uap->clk); + +- local_irq_save(flags); ++ /* ++ * local_irq_save(flags); ++ * ++ * This local_irq_save() is nonsense. If we come in via sysrq ++ * handling then interrupts are already disabled. Aside of ++ * that the port.sysrq check is racy on SMP regardless. ++ */ + if (uap->port.sysrq) + locked = 0; + else if (oops_in_progress) +- locked = spin_trylock(&uap->port.lock); ++ locked = spin_trylock_irqsave(&uap->port.lock, flags); + else +- spin_lock(&uap->port.lock); ++ spin_lock_irqsave(&uap->port.lock, flags); + + /* + * First save the CR then disable the interrupts +@@ -2028,8 +2034,7 @@ + writew(old_cr, uap->port.membase + UART011_CR); + + if (locked) +- spin_unlock(&uap->port.lock); +- local_irq_restore(flags); ++ spin_unlock_irqrestore(&uap->port.lock, flags); + + clk_disable(uap->clk); + } +diff -Nur linux-4.1.26.orig/drivers/tty/serial/omap-serial.c linux-4.1.26/drivers/tty/serial/omap-serial.c +--- linux-4.1.26.orig/drivers/tty/serial/omap-serial.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/tty/serial/omap-serial.c 2016-06-19 15:30:58.651295961 +0200 +@@ -1282,13 +1282,10 @@ + + pm_runtime_get_sync(up->dev); + +- local_irq_save(flags); +- if (up->port.sysrq) +- locked = 0; +- else if (oops_in_progress) +- locked = spin_trylock(&up->port.lock); ++ if (up->port.sysrq || oops_in_progress) ++ locked = spin_trylock_irqsave(&up->port.lock, flags); + else +- spin_lock(&up->port.lock); ++ spin_lock_irqsave(&up->port.lock, flags); + + /* + * First save the IER then disable the interrupts +@@ -1317,8 +1314,7 @@ + pm_runtime_mark_last_busy(up->dev); + pm_runtime_put_autosuspend(up->dev); + if (locked) +- spin_unlock(&up->port.lock); +- local_irq_restore(flags); ++ spin_unlock_irqrestore(&up->port.lock, flags); + } + + static int __init +diff -Nur linux-4.1.26.orig/drivers/usb/core/hcd.c linux-4.1.26/drivers/usb/core/hcd.c +--- linux-4.1.26.orig/drivers/usb/core/hcd.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/usb/core/hcd.c 2016-06-19 15:30:58.655296115 +0200 +@@ -1684,9 +1684,9 @@ + * and no one may trigger the above deadlock situation when + * running complete() in tasklet. + */ +- local_irq_save(flags); ++ local_irq_save_nort(flags); + urb->complete(urb); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + + usb_anchor_resume_wakeups(anchor); + atomic_dec(&urb->use_count); +diff -Nur linux-4.1.26.orig/drivers/usb/gadget/function/f_fs.c linux-4.1.26/drivers/usb/gadget/function/f_fs.c +--- linux-4.1.26.orig/drivers/usb/gadget/function/f_fs.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/usb/gadget/function/f_fs.c 2016-06-19 15:30:58.655296115 +0200 +@@ -1404,7 +1404,7 @@ + pr_info("%s(): freeing\n", __func__); + ffs_data_clear(ffs); + BUG_ON(waitqueue_active(&ffs->ev.waitq) || +- waitqueue_active(&ffs->ep0req_completion.wait)); ++ swaitqueue_active(&ffs->ep0req_completion.wait)); + kfree(ffs->dev_name); + kfree(ffs); + } +diff -Nur linux-4.1.26.orig/drivers/usb/gadget/legacy/inode.c linux-4.1.26/drivers/usb/gadget/legacy/inode.c +--- linux-4.1.26.orig/drivers/usb/gadget/legacy/inode.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/drivers/usb/gadget/legacy/inode.c 2016-06-19 15:30:58.655296115 +0200 +@@ -345,7 +345,7 @@ + spin_unlock_irq (&epdata->dev->lock); + + if (likely (value == 0)) { +- value = wait_event_interruptible (done.wait, done.done); ++ value = swait_event_interruptible (done.wait, done.done); + if (value != 0) { + spin_lock_irq (&epdata->dev->lock); + if (likely (epdata->ep != NULL)) { +@@ -354,7 +354,7 @@ + usb_ep_dequeue (epdata->ep, epdata->req); + spin_unlock_irq (&epdata->dev->lock); + +- wait_event (done.wait, done.done); ++ swait_event (done.wait, done.done); + if (epdata->status == -ECONNRESET) + epdata->status = -EINTR; + } else { +diff -Nur linux-4.1.26.orig/fs/aio.c linux-4.1.26/fs/aio.c +--- linux-4.1.26.orig/fs/aio.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/aio.c 2016-06-19 15:30:58.655296115 +0200 +@@ -40,6 +40,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -115,7 +116,7 @@ + struct page **ring_pages; + long nr_pages; + +- struct work_struct free_work; ++ struct swork_event free_work; + + /* + * signals when all in-flight requests are done +@@ -253,6 +254,7 @@ + .mount = aio_mount, + .kill_sb = kill_anon_super, + }; ++ BUG_ON(swork_get()); + aio_mnt = kern_mount(&aio_fs); + if (IS_ERR(aio_mnt)) + panic("Failed to create aio fs mount."); +@@ -559,9 +561,9 @@ + return cancel(&kiocb->common); + } + +-static void free_ioctx(struct work_struct *work) ++static void free_ioctx(struct swork_event *sev) + { +- struct kioctx *ctx = container_of(work, struct kioctx, free_work); ++ struct kioctx *ctx = container_of(sev, struct kioctx, free_work); + + pr_debug("freeing %p\n", ctx); + +@@ -580,8 +582,8 @@ + if (ctx->rq_wait && atomic_dec_and_test(&ctx->rq_wait->count)) + complete(&ctx->rq_wait->comp); + +- INIT_WORK(&ctx->free_work, free_ioctx); +- schedule_work(&ctx->free_work); ++ INIT_SWORK(&ctx->free_work, free_ioctx); ++ swork_queue(&ctx->free_work); + } + + /* +@@ -589,9 +591,9 @@ + * and ctx->users has dropped to 0, so we know no more kiocbs can be submitted - + * now it's safe to cancel any that need to be. + */ +-static void free_ioctx_users(struct percpu_ref *ref) ++static void free_ioctx_users_work(struct swork_event *sev) + { +- struct kioctx *ctx = container_of(ref, struct kioctx, users); ++ struct kioctx *ctx = container_of(sev, struct kioctx, free_work); + struct aio_kiocb *req; + + spin_lock_irq(&ctx->ctx_lock); +@@ -610,6 +612,14 @@ + percpu_ref_put(&ctx->reqs); + } + ++static void free_ioctx_users(struct percpu_ref *ref) ++{ ++ struct kioctx *ctx = container_of(ref, struct kioctx, users); ++ ++ INIT_SWORK(&ctx->free_work, free_ioctx_users_work); ++ swork_queue(&ctx->free_work); ++} ++ + static int ioctx_add_table(struct kioctx *ctx, struct mm_struct *mm) + { + unsigned i, new_nr; +diff -Nur linux-4.1.26.orig/fs/autofs4/autofs_i.h linux-4.1.26/fs/autofs4/autofs_i.h +--- linux-4.1.26.orig/fs/autofs4/autofs_i.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/autofs4/autofs_i.h 2016-06-19 15:30:58.655296115 +0200 +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + #include + #include + +diff -Nur linux-4.1.26.orig/fs/autofs4/expire.c linux-4.1.26/fs/autofs4/expire.c +--- linux-4.1.26.orig/fs/autofs4/expire.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/autofs4/expire.c 2016-06-19 15:30:58.655296115 +0200 +@@ -150,7 +150,7 @@ + parent = p->d_parent; + if (!spin_trylock(&parent->d_lock)) { + spin_unlock(&p->d_lock); +- cpu_relax(); ++ cpu_chill(); + goto relock; + } + spin_unlock(&p->d_lock); +diff -Nur linux-4.1.26.orig/fs/buffer.c linux-4.1.26/fs/buffer.c +--- linux-4.1.26.orig/fs/buffer.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/buffer.c 2016-06-19 15:30:58.655296115 +0200 +@@ -301,8 +301,7 @@ + * decide that the page is now completely done. + */ + first = page_buffers(page); +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); ++ flags = bh_uptodate_lock_irqsave(first); + clear_buffer_async_read(bh); + unlock_buffer(bh); + tmp = bh; +@@ -315,8 +314,7 @@ + } + tmp = tmp->b_this_page; + } while (tmp != bh); +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(first, flags); + + /* + * If none of the buffers had errors and they are all +@@ -328,9 +326,7 @@ + return; + + still_busy: +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); +- return; ++ bh_uptodate_unlock_irqrestore(first, flags); + } + + /* +@@ -358,8 +354,7 @@ + } + + first = page_buffers(page); +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); ++ flags = bh_uptodate_lock_irqsave(first); + + clear_buffer_async_write(bh); + unlock_buffer(bh); +@@ -371,15 +366,12 @@ + } + tmp = tmp->b_this_page; + } +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(first, flags); + end_page_writeback(page); + return; + + still_busy: +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); +- return; ++ bh_uptodate_unlock_irqrestore(first, flags); + } + EXPORT_SYMBOL(end_buffer_async_write); + +@@ -3325,6 +3317,7 @@ + struct buffer_head *ret = kmem_cache_zalloc(bh_cachep, gfp_flags); + if (ret) { + INIT_LIST_HEAD(&ret->b_assoc_buffers); ++ buffer_head_init_locks(ret); + preempt_disable(); + __this_cpu_inc(bh_accounting.nr); + recalc_bh_state(); +diff -Nur linux-4.1.26.orig/fs/dcache.c linux-4.1.26/fs/dcache.c +--- linux-4.1.26.orig/fs/dcache.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/dcache.c 2016-06-19 15:30:58.655296115 +0200 +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -578,7 +579,7 @@ + + failed: + spin_unlock(&dentry->d_lock); +- cpu_relax(); ++ cpu_chill(); + return dentry; /* try again with same dentry */ + } + +@@ -2388,7 +2389,7 @@ + if (dentry->d_lockref.count == 1) { + if (!spin_trylock(&inode->i_lock)) { + spin_unlock(&dentry->d_lock); +- cpu_relax(); ++ cpu_chill(); + goto again; + } + dentry->d_flags &= ~DCACHE_CANT_MOUNT; +diff -Nur linux-4.1.26.orig/fs/eventpoll.c linux-4.1.26/fs/eventpoll.c +--- linux-4.1.26.orig/fs/eventpoll.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/eventpoll.c 2016-06-19 15:30:58.655296115 +0200 +@@ -505,12 +505,12 @@ + */ + static void ep_poll_safewake(wait_queue_head_t *wq) + { +- int this_cpu = get_cpu(); ++ int this_cpu = get_cpu_light(); + + ep_call_nested(&poll_safewake_ncalls, EP_MAX_NESTS, + ep_poll_wakeup_proc, NULL, wq, (void *) (long) this_cpu); + +- put_cpu(); ++ put_cpu_light(); + } + + static void ep_remove_wait_queue(struct eppoll_entry *pwq) +diff -Nur linux-4.1.26.orig/fs/exec.c linux-4.1.26/fs/exec.c +--- linux-4.1.26.orig/fs/exec.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/exec.c 2016-06-19 15:30:58.659296270 +0200 +@@ -859,12 +859,14 @@ + } + } + task_lock(tsk); ++ preempt_disable_rt(); + active_mm = tsk->active_mm; + tsk->mm = mm; + tsk->active_mm = mm; + activate_mm(active_mm, mm); + tsk->mm->vmacache_seqnum = 0; + vmacache_flush(tsk); ++ preempt_enable_rt(); + task_unlock(tsk); + if (old_mm) { + up_read(&old_mm->mmap_sem); +diff -Nur linux-4.1.26.orig/fs/f2fs/f2fs.h linux-4.1.26/fs/f2fs/f2fs.h +--- linux-4.1.26.orig/fs/f2fs/f2fs.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/f2fs/f2fs.h 2016-06-19 15:30:58.659296270 +0200 +@@ -22,7 +22,6 @@ + + #ifdef CONFIG_F2FS_CHECK_FS + #define f2fs_bug_on(sbi, condition) BUG_ON(condition) +-#define f2fs_down_write(x, y) down_write_nest_lock(x, y) + #else + #define f2fs_bug_on(sbi, condition) \ + do { \ +@@ -31,7 +30,6 @@ + set_sbi_flag(sbi, SBI_NEED_FSCK); \ + } \ + } while (0) +-#define f2fs_down_write(x, y) down_write(x) + #endif + + /* +@@ -838,7 +836,7 @@ + + static inline void f2fs_lock_all(struct f2fs_sb_info *sbi) + { +- f2fs_down_write(&sbi->cp_rwsem, &sbi->cp_mutex); ++ down_write(&sbi->cp_rwsem); + } + + static inline void f2fs_unlock_all(struct f2fs_sb_info *sbi) +diff -Nur linux-4.1.26.orig/fs/jbd/checkpoint.c linux-4.1.26/fs/jbd/checkpoint.c +--- linux-4.1.26.orig/fs/jbd/checkpoint.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/jbd/checkpoint.c 2016-06-19 15:30:58.659296270 +0200 +@@ -129,6 +129,8 @@ + if (journal->j_flags & JFS_ABORT) + return; + spin_unlock(&journal->j_state_lock); ++ if (current->plug) ++ io_schedule(); + mutex_lock(&journal->j_checkpoint_mutex); + + /* +diff -Nur linux-4.1.26.orig/fs/jbd2/checkpoint.c linux-4.1.26/fs/jbd2/checkpoint.c +--- linux-4.1.26.orig/fs/jbd2/checkpoint.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/jbd2/checkpoint.c 2016-06-19 15:30:58.659296270 +0200 +@@ -116,6 +116,8 @@ + nblocks = jbd2_space_needed(journal); + while (jbd2_log_space_left(journal) < nblocks) { + write_unlock(&journal->j_state_lock); ++ if (current->plug) ++ io_schedule(); + mutex_lock(&journal->j_checkpoint_mutex); + + /* +diff -Nur linux-4.1.26.orig/fs/namespace.c linux-4.1.26/fs/namespace.c +--- linux-4.1.26.orig/fs/namespace.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/namespace.c 2016-06-19 15:30:58.659296270 +0200 +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include /* init_rootfs */ +@@ -353,8 +354,11 @@ + * incremented count after it has set MNT_WRITE_HOLD. + */ + smp_mb(); +- while (ACCESS_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) +- cpu_relax(); ++ while (ACCESS_ONCE(mnt->mnt.mnt_flags) & MNT_WRITE_HOLD) { ++ preempt_enable(); ++ cpu_chill(); ++ preempt_disable(); ++ } + /* + * After the slowpath clears MNT_WRITE_HOLD, mnt_is_readonly will + * be set to match its requirements. So we must not load that until +diff -Nur linux-4.1.26.orig/fs/ntfs/aops.c linux-4.1.26/fs/ntfs/aops.c +--- linux-4.1.26.orig/fs/ntfs/aops.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/ntfs/aops.c 2016-06-19 15:30:58.659296270 +0200 +@@ -107,8 +107,7 @@ + "0x%llx.", (unsigned long long)bh->b_blocknr); + } + first = page_buffers(page); +- local_irq_save(flags); +- bit_spin_lock(BH_Uptodate_Lock, &first->b_state); ++ flags = bh_uptodate_lock_irqsave(first); + clear_buffer_async_read(bh); + unlock_buffer(bh); + tmp = bh; +@@ -123,8 +122,7 @@ + } + tmp = tmp->b_this_page; + } while (tmp != bh); +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); ++ bh_uptodate_unlock_irqrestore(first, flags); + /* + * If none of the buffers had errors then we can set the page uptodate, + * but we first have to perform the post read mst fixups, if the +@@ -145,13 +143,13 @@ + recs = PAGE_CACHE_SIZE / rec_size; + /* Should have been verified before we got here... */ + BUG_ON(!recs); +- local_irq_save(flags); ++ local_irq_save_nort(flags); + kaddr = kmap_atomic(page); + for (i = 0; i < recs; i++) + post_read_mst_fixup((NTFS_RECORD*)(kaddr + + i * rec_size), rec_size); + kunmap_atomic(kaddr); +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + flush_dcache_page(page); + if (likely(page_uptodate && !PageError(page))) + SetPageUptodate(page); +@@ -159,9 +157,7 @@ + unlock_page(page); + return; + still_busy: +- bit_spin_unlock(BH_Uptodate_Lock, &first->b_state); +- local_irq_restore(flags); +- return; ++ bh_uptodate_unlock_irqrestore(first, flags); + } + + /** +diff -Nur linux-4.1.26.orig/fs/timerfd.c linux-4.1.26/fs/timerfd.c +--- linux-4.1.26.orig/fs/timerfd.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/timerfd.c 2016-06-19 15:30:58.659296270 +0200 +@@ -450,7 +450,10 @@ + break; + } + spin_unlock_irq(&ctx->wqh.lock); +- cpu_relax(); ++ if (isalarm(ctx)) ++ hrtimer_wait_for_timer(&ctx->t.alarm.timer); ++ else ++ hrtimer_wait_for_timer(&ctx->t.tmr); + } + + /* +diff -Nur linux-4.1.26.orig/fs/xfs/xfs_inode.c linux-4.1.26/fs/xfs/xfs_inode.c +--- linux-4.1.26.orig/fs/xfs/xfs_inode.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/xfs/xfs_inode.c 2016-06-19 15:30:58.659296270 +0200 +@@ -164,7 +164,7 @@ + (XFS_MMAPLOCK_SHARED | XFS_MMAPLOCK_EXCL)); + ASSERT((lock_flags & (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)) != + (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)); +- ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_DEP_MASK)) == 0); ++ ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_SUBCLASS_MASK)) == 0); + + if (lock_flags & XFS_IOLOCK_EXCL) + mrupdate_nested(&ip->i_iolock, XFS_IOLOCK_DEP(lock_flags)); +@@ -212,7 +212,7 @@ + (XFS_MMAPLOCK_SHARED | XFS_MMAPLOCK_EXCL)); + ASSERT((lock_flags & (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)) != + (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)); +- ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_DEP_MASK)) == 0); ++ ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_SUBCLASS_MASK)) == 0); + + if (lock_flags & XFS_IOLOCK_EXCL) { + if (!mrtryupdate(&ip->i_iolock)) +@@ -281,7 +281,7 @@ + (XFS_MMAPLOCK_SHARED | XFS_MMAPLOCK_EXCL)); + ASSERT((lock_flags & (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)) != + (XFS_ILOCK_SHARED | XFS_ILOCK_EXCL)); +- ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_DEP_MASK)) == 0); ++ ASSERT((lock_flags & ~(XFS_LOCK_MASK | XFS_LOCK_SUBCLASS_MASK)) == 0); + ASSERT(lock_flags != 0); + + if (lock_flags & XFS_IOLOCK_EXCL) +@@ -364,30 +364,38 @@ + + /* + * Bump the subclass so xfs_lock_inodes() acquires each lock with a different +- * value. This shouldn't be called for page fault locking, but we also need to +- * ensure we don't overrun the number of lockdep subclasses for the iolock or +- * mmaplock as that is limited to 12 by the mmap lock lockdep annotations. ++ * value. This can be called for any type of inode lock combination, including ++ * parent locking. Care must be taken to ensure we don't overrun the subclass ++ * storage fields in the class mask we build. + */ + static inline int + xfs_lock_inumorder(int lock_mode, int subclass) + { ++ int class = 0; ++ ++ ASSERT(!(lock_mode & (XFS_ILOCK_PARENT | XFS_ILOCK_RTBITMAP | ++ XFS_ILOCK_RTSUM))); ++ + if (lock_mode & (XFS_IOLOCK_SHARED|XFS_IOLOCK_EXCL)) { +- ASSERT(subclass + XFS_LOCK_INUMORDER < +- (1 << (XFS_MMAPLOCK_SHIFT - XFS_IOLOCK_SHIFT))); +- lock_mode |= (subclass + XFS_LOCK_INUMORDER) << XFS_IOLOCK_SHIFT; ++ ASSERT(subclass <= XFS_IOLOCK_MAX_SUBCLASS); ++ ASSERT(subclass + XFS_IOLOCK_PARENT_VAL < ++ MAX_LOCKDEP_SUBCLASSES); ++ class += subclass << XFS_IOLOCK_SHIFT; ++ if (lock_mode & XFS_IOLOCK_PARENT) ++ class += XFS_IOLOCK_PARENT_VAL << XFS_IOLOCK_SHIFT; + } + + if (lock_mode & (XFS_MMAPLOCK_SHARED|XFS_MMAPLOCK_EXCL)) { +- ASSERT(subclass + XFS_LOCK_INUMORDER < +- (1 << (XFS_ILOCK_SHIFT - XFS_MMAPLOCK_SHIFT))); +- lock_mode |= (subclass + XFS_LOCK_INUMORDER) << +- XFS_MMAPLOCK_SHIFT; ++ ASSERT(subclass <= XFS_MMAPLOCK_MAX_SUBCLASS); ++ class += subclass << XFS_MMAPLOCK_SHIFT; + } + +- if (lock_mode & (XFS_ILOCK_SHARED|XFS_ILOCK_EXCL)) +- lock_mode |= (subclass + XFS_LOCK_INUMORDER) << XFS_ILOCK_SHIFT; ++ if (lock_mode & (XFS_ILOCK_SHARED|XFS_ILOCK_EXCL)) { ++ ASSERT(subclass <= XFS_ILOCK_MAX_SUBCLASS); ++ class += subclass << XFS_ILOCK_SHIFT; ++ } + +- return lock_mode; ++ return (lock_mode & ~XFS_LOCK_SUBCLASS_MASK) | class; + } + + /* +@@ -399,6 +407,11 @@ + * transaction (such as truncate). This can result in deadlock since the long + * running trans might need to wait for the inode we just locked in order to + * push the tail and free space in the log. ++ * ++ * xfs_lock_inodes() can only be used to lock one type of lock at a time - ++ * the iolock, the mmaplock or the ilock, but not more than one at a time. If we ++ * lock more than one at a time, lockdep will report false positives saying we ++ * have violated locking orders. + */ + void + xfs_lock_inodes( +@@ -409,8 +422,29 @@ + int attempts = 0, i, j, try_lock; + xfs_log_item_t *lp; + +- /* currently supports between 2 and 5 inodes */ ++ /* ++ * Currently supports between 2 and 5 inodes with exclusive locking. We ++ * support an arbitrary depth of locking here, but absolute limits on ++ * inodes depend on the the type of locking and the limits placed by ++ * lockdep annotations in xfs_lock_inumorder. These are all checked by ++ * the asserts. ++ */ + ASSERT(ips && inodes >= 2 && inodes <= 5); ++ ASSERT(lock_mode & (XFS_IOLOCK_EXCL | XFS_MMAPLOCK_EXCL | ++ XFS_ILOCK_EXCL)); ++ ASSERT(!(lock_mode & (XFS_IOLOCK_SHARED | XFS_MMAPLOCK_SHARED | ++ XFS_ILOCK_SHARED))); ++ ASSERT(!(lock_mode & XFS_IOLOCK_EXCL) || ++ inodes <= XFS_IOLOCK_MAX_SUBCLASS + 1); ++ ASSERT(!(lock_mode & XFS_MMAPLOCK_EXCL) || ++ inodes <= XFS_MMAPLOCK_MAX_SUBCLASS + 1); ++ ASSERT(!(lock_mode & XFS_ILOCK_EXCL) || ++ inodes <= XFS_ILOCK_MAX_SUBCLASS + 1); ++ ++ if (lock_mode & XFS_IOLOCK_EXCL) { ++ ASSERT(!(lock_mode & (XFS_MMAPLOCK_EXCL | XFS_ILOCK_EXCL))); ++ } else if (lock_mode & XFS_MMAPLOCK_EXCL) ++ ASSERT(!(lock_mode & XFS_ILOCK_EXCL)); + + try_lock = 0; + i = 0; +diff -Nur linux-4.1.26.orig/fs/xfs/xfs_inode.h linux-4.1.26/fs/xfs/xfs_inode.h +--- linux-4.1.26.orig/fs/xfs/xfs_inode.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/fs/xfs/xfs_inode.h 2016-06-19 15:30:58.659296270 +0200 +@@ -284,9 +284,9 @@ + * Flags for lockdep annotations. + * + * XFS_LOCK_PARENT - for directory operations that require locking a +- * parent directory inode and a child entry inode. The parent gets locked +- * with this flag so it gets a lockdep subclass of 1 and the child entry +- * lock will have a lockdep subclass of 0. ++ * parent directory inode and a child entry inode. IOLOCK requires nesting, ++ * MMAPLOCK does not support this class, ILOCK requires a single subclass ++ * to differentiate parent from child. + * + * XFS_LOCK_RTBITMAP/XFS_LOCK_RTSUM - the realtime device bitmap and summary + * inodes do not participate in the normal lock order, and thus have their +@@ -295,30 +295,63 @@ + * XFS_LOCK_INUMORDER - for locking several inodes at the some time + * with xfs_lock_inodes(). This flag is used as the starting subclass + * and each subsequent lock acquired will increment the subclass by one. +- * So the first lock acquired will have a lockdep subclass of 4, the +- * second lock will have a lockdep subclass of 5, and so on. It is +- * the responsibility of the class builder to shift this to the correct +- * portion of the lock_mode lockdep mask. ++ * However, MAX_LOCKDEP_SUBCLASSES == 8, which means we are greatly ++ * limited to the subclasses we can represent via nesting. We need at least ++ * 5 inodes nest depth for the ILOCK through rename, and we also have to support ++ * XFS_ILOCK_PARENT, which gives 6 subclasses. Then we have XFS_ILOCK_RTBITMAP ++ * and XFS_ILOCK_RTSUM, which are another 2 unique subclasses, so that's all ++ * 8 subclasses supported by lockdep. ++ * ++ * This also means we have to number the sub-classes in the lowest bits of ++ * the mask we keep, and we have to ensure we never exceed 3 bits of lockdep ++ * mask and we can't use bit-masking to build the subclasses. What a mess. ++ * ++ * Bit layout: ++ * ++ * Bit Lock Region ++ * 16-19 XFS_IOLOCK_SHIFT dependencies ++ * 20-23 XFS_MMAPLOCK_SHIFT dependencies ++ * 24-31 XFS_ILOCK_SHIFT dependencies ++ * ++ * IOLOCK values ++ * ++ * 0-3 subclass value ++ * 4-7 PARENT subclass values ++ * ++ * MMAPLOCK values ++ * ++ * 0-3 subclass value ++ * 4-7 unused ++ * ++ * ILOCK values ++ * 0-4 subclass values ++ * 5 PARENT subclass (not nestable) ++ * 6 RTBITMAP subclass (not nestable) ++ * 7 RTSUM subclass (not nestable) ++ * + */ +-#define XFS_LOCK_PARENT 1 +-#define XFS_LOCK_RTBITMAP 2 +-#define XFS_LOCK_RTSUM 3 +-#define XFS_LOCK_INUMORDER 4 +- +-#define XFS_IOLOCK_SHIFT 16 +-#define XFS_IOLOCK_PARENT (XFS_LOCK_PARENT << XFS_IOLOCK_SHIFT) ++#define XFS_IOLOCK_SHIFT 16 ++#define XFS_IOLOCK_PARENT_VAL 4 ++#define XFS_IOLOCK_MAX_SUBCLASS (XFS_IOLOCK_PARENT_VAL - 1) ++#define XFS_IOLOCK_DEP_MASK 0x000f0000 ++#define XFS_IOLOCK_PARENT (XFS_IOLOCK_PARENT_VAL << XFS_IOLOCK_SHIFT) + +-#define XFS_MMAPLOCK_SHIFT 20 ++#define XFS_MMAPLOCK_SHIFT 20 ++#define XFS_MMAPLOCK_NUMORDER 0 ++#define XFS_MMAPLOCK_MAX_SUBCLASS 3 ++#define XFS_MMAPLOCK_DEP_MASK 0x00f00000 + +-#define XFS_ILOCK_SHIFT 24 +-#define XFS_ILOCK_PARENT (XFS_LOCK_PARENT << XFS_ILOCK_SHIFT) +-#define XFS_ILOCK_RTBITMAP (XFS_LOCK_RTBITMAP << XFS_ILOCK_SHIFT) +-#define XFS_ILOCK_RTSUM (XFS_LOCK_RTSUM << XFS_ILOCK_SHIFT) ++#define XFS_ILOCK_SHIFT 24 ++#define XFS_ILOCK_PARENT_VAL 5 ++#define XFS_ILOCK_MAX_SUBCLASS (XFS_ILOCK_PARENT_VAL - 1) ++#define XFS_ILOCK_RTBITMAP_VAL 6 ++#define XFS_ILOCK_RTSUM_VAL 7 ++#define XFS_ILOCK_DEP_MASK 0xff000000 ++#define XFS_ILOCK_PARENT (XFS_ILOCK_PARENT_VAL << XFS_ILOCK_SHIFT) ++#define XFS_ILOCK_RTBITMAP (XFS_ILOCK_RTBITMAP_VAL << XFS_ILOCK_SHIFT) ++#define XFS_ILOCK_RTSUM (XFS_ILOCK_RTSUM_VAL << XFS_ILOCK_SHIFT) + +-#define XFS_IOLOCK_DEP_MASK 0x000f0000 +-#define XFS_MMAPLOCK_DEP_MASK 0x00f00000 +-#define XFS_ILOCK_DEP_MASK 0xff000000 +-#define XFS_LOCK_DEP_MASK (XFS_IOLOCK_DEP_MASK | \ ++#define XFS_LOCK_SUBCLASS_MASK (XFS_IOLOCK_DEP_MASK | \ + XFS_MMAPLOCK_DEP_MASK | \ + XFS_ILOCK_DEP_MASK) + +diff -Nur linux-4.1.26.orig/include/acpi/platform/aclinux.h linux-4.1.26/include/acpi/platform/aclinux.h +--- linux-4.1.26.orig/include/acpi/platform/aclinux.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/acpi/platform/aclinux.h 2016-06-19 15:30:58.659296270 +0200 +@@ -123,6 +123,7 @@ + + #define acpi_cache_t struct kmem_cache + #define acpi_spinlock spinlock_t * ++#define acpi_raw_spinlock raw_spinlock_t * + #define acpi_cpu_flags unsigned long + + /* Use native linux version of acpi_os_allocate_zeroed */ +@@ -141,6 +142,20 @@ + #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_get_thread_id + #define ACPI_USE_ALTERNATE_PROTOTYPE_acpi_os_create_lock + ++#define acpi_os_create_raw_lock(__handle) \ ++({ \ ++ raw_spinlock_t *lock = ACPI_ALLOCATE(sizeof(*lock)); \ ++ \ ++ if (lock) { \ ++ *(__handle) = lock; \ ++ raw_spin_lock_init(*(__handle)); \ ++ } \ ++ lock ? AE_OK : AE_NO_MEMORY; \ ++ }) ++ ++#define acpi_os_delete_raw_lock(__handle) kfree(__handle) ++ ++ + /* + * OSL interfaces used by debugger/disassembler + */ +diff -Nur linux-4.1.26.orig/include/asm-generic/bug.h linux-4.1.26/include/asm-generic/bug.h +--- linux-4.1.26.orig/include/asm-generic/bug.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/asm-generic/bug.h 2016-06-19 15:30:58.663296424 +0200 +@@ -206,6 +206,20 @@ + # define WARN_ON_SMP(x) ({0;}) + #endif + ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define BUG_ON_RT(c) BUG_ON(c) ++# define BUG_ON_NONRT(c) do { } while (0) ++# define WARN_ON_RT(condition) WARN_ON(condition) ++# define WARN_ON_NONRT(condition) do { } while (0) ++# define WARN_ON_ONCE_NONRT(condition) do { } while (0) ++#else ++# define BUG_ON_RT(c) do { } while (0) ++# define BUG_ON_NONRT(c) BUG_ON(c) ++# define WARN_ON_RT(condition) do { } while (0) ++# define WARN_ON_NONRT(condition) WARN_ON(condition) ++# define WARN_ON_ONCE_NONRT(condition) WARN_ON_ONCE(condition) ++#endif ++ + #endif /* __ASSEMBLY__ */ + + #endif +diff -Nur linux-4.1.26.orig/include/asm-generic/futex.h linux-4.1.26/include/asm-generic/futex.h +--- linux-4.1.26.orig/include/asm-generic/futex.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/asm-generic/futex.h 2016-06-19 15:30:58.663296424 +0200 +@@ -8,8 +8,7 @@ + #ifndef CONFIG_SMP + /* + * The following implementation only for uniprocessor machines. +- * For UP, it's relies on the fact that pagefault_disable() also disables +- * preemption to ensure mutual exclusion. ++ * It relies on preempt_disable() ensuring mutual exclusion. + * + */ + +@@ -38,6 +37,7 @@ + if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) + oparg = 1 << oparg; + ++ preempt_disable(); + pagefault_disable(); + + ret = -EFAULT; +@@ -72,6 +72,7 @@ + + out_pagefault_enable: + pagefault_enable(); ++ preempt_enable(); + + if (ret == 0) { + switch (cmp) { +@@ -106,6 +107,7 @@ + { + u32 val; + ++ preempt_disable(); + if (unlikely(get_user(val, uaddr) != 0)) + return -EFAULT; + +@@ -113,6 +115,7 @@ + return -EFAULT; + + *uval = val; ++ preempt_enable(); + + return 0; + } +diff -Nur linux-4.1.26.orig/include/linux/blkdev.h linux-4.1.26/include/linux/blkdev.h +--- linux-4.1.26.orig/include/linux/blkdev.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/blkdev.h 2016-06-19 15:30:58.663296424 +0200 +@@ -101,6 +101,7 @@ + struct list_head queuelist; + union { + struct call_single_data csd; ++ struct work_struct work; + unsigned long fifo_time; + }; + +@@ -482,7 +483,7 @@ + struct throtl_data *td; + #endif + struct rcu_head rcu_head; +- wait_queue_head_t mq_freeze_wq; ++ struct swait_head mq_freeze_wq; + struct percpu_ref mq_usage_counter; + struct list_head all_q_node; + +diff -Nur linux-4.1.26.orig/include/linux/blk-mq.h linux-4.1.26/include/linux/blk-mq.h +--- linux-4.1.26.orig/include/linux/blk-mq.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/blk-mq.h 2016-06-19 15:30:58.663296424 +0200 +@@ -202,6 +202,7 @@ + + struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index); + struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int); ++void __blk_mq_complete_request_remote_work(struct work_struct *work); + + int blk_mq_request_started(struct request *rq); + void blk_mq_start_request(struct request *rq); +diff -Nur linux-4.1.26.orig/include/linux/bottom_half.h linux-4.1.26/include/linux/bottom_half.h +--- linux-4.1.26.orig/include/linux/bottom_half.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/bottom_half.h 2016-06-19 15:30:58.663296424 +0200 +@@ -4,6 +4,39 @@ + #include + #include + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++extern void __local_bh_disable(void); ++extern void _local_bh_enable(void); ++extern void __local_bh_enable(void); ++ ++static inline void local_bh_disable(void) ++{ ++ __local_bh_disable(); ++} ++ ++static inline void __local_bh_disable_ip(unsigned long ip, unsigned int cnt) ++{ ++ __local_bh_disable(); ++} ++ ++static inline void local_bh_enable(void) ++{ ++ __local_bh_enable(); ++} ++ ++static inline void __local_bh_enable_ip(unsigned long ip, unsigned int cnt) ++{ ++ __local_bh_enable(); ++} ++ ++static inline void local_bh_enable_ip(unsigned long ip) ++{ ++ __local_bh_enable(); ++} ++ ++#else ++ + #ifdef CONFIG_TRACE_IRQFLAGS + extern void __local_bh_disable_ip(unsigned long ip, unsigned int cnt); + #else +@@ -31,5 +64,6 @@ + { + __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); + } ++#endif + + #endif /* _LINUX_BH_H */ +diff -Nur linux-4.1.26.orig/include/linux/buffer_head.h linux-4.1.26/include/linux/buffer_head.h +--- linux-4.1.26.orig/include/linux/buffer_head.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/buffer_head.h 2016-06-19 15:30:58.663296424 +0200 +@@ -75,8 +75,52 @@ + struct address_space *b_assoc_map; /* mapping this buffer is + associated with */ + atomic_t b_count; /* users using this buffer_head */ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ spinlock_t b_uptodate_lock; ++#if defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE) || \ ++ defined(CONFIG_JBD2) || defined(CONFIG_JBD2_MODULE) ++ spinlock_t b_state_lock; ++ spinlock_t b_journal_head_lock; ++#endif ++#endif + }; + ++static inline unsigned long bh_uptodate_lock_irqsave(struct buffer_head *bh) ++{ ++ unsigned long flags; ++ ++#ifndef CONFIG_PREEMPT_RT_BASE ++ local_irq_save(flags); ++ bit_spin_lock(BH_Uptodate_Lock, &bh->b_state); ++#else ++ spin_lock_irqsave(&bh->b_uptodate_lock, flags); ++#endif ++ return flags; ++} ++ ++static inline void ++bh_uptodate_unlock_irqrestore(struct buffer_head *bh, unsigned long flags) ++{ ++#ifndef CONFIG_PREEMPT_RT_BASE ++ bit_spin_unlock(BH_Uptodate_Lock, &bh->b_state); ++ local_irq_restore(flags); ++#else ++ spin_unlock_irqrestore(&bh->b_uptodate_lock, flags); ++#endif ++} ++ ++static inline void buffer_head_init_locks(struct buffer_head *bh) ++{ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ spin_lock_init(&bh->b_uptodate_lock); ++#if defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE) || \ ++ defined(CONFIG_JBD2) || defined(CONFIG_JBD2_MODULE) ++ spin_lock_init(&bh->b_state_lock); ++ spin_lock_init(&bh->b_journal_head_lock); ++#endif ++#endif ++} ++ + /* + * macro tricks to expand the set_buffer_foo(), clear_buffer_foo() + * and buffer_foo() functions. +diff -Nur linux-4.1.26.orig/include/linux/cgroup-defs.h linux-4.1.26/include/linux/cgroup-defs.h +--- linux-4.1.26.orig/include/linux/cgroup-defs.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/cgroup-defs.h 2016-06-19 15:30:58.663296424 +0200 +@@ -124,6 +124,7 @@ + /* percpu_ref killing and RCU release */ + struct rcu_head rcu_head; + struct work_struct destroy_work; ++ struct swork_event destroy_swork; + }; + + /* +diff -Nur linux-4.1.26.orig/include/linux/cgroup.h linux-4.1.26/include/linux/cgroup.h +--- linux-4.1.26.orig/include/linux/cgroup.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/cgroup.h 2016-06-19 15:30:58.663296424 +0200 +@@ -17,6 +17,8 @@ + #include + #include + #include ++#include ++#include + + #include + +diff -Nur linux-4.1.26.orig/include/linux/completion.h linux-4.1.26/include/linux/completion.h +--- linux-4.1.26.orig/include/linux/completion.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/completion.h 2016-06-19 15:30:58.663296424 +0200 +@@ -7,8 +7,7 @@ + * Atomic wait-for-completion handler data structures. + * See kernel/sched/completion.c for details. + */ +- +-#include ++#include + + /* + * struct completion - structure used to maintain state for a "completion" +@@ -24,11 +23,11 @@ + */ + struct completion { + unsigned int done; +- wait_queue_head_t wait; ++ struct swait_head wait; + }; + + #define COMPLETION_INITIALIZER(work) \ +- { 0, __WAIT_QUEUE_HEAD_INITIALIZER((work).wait) } ++ { 0, SWAIT_HEAD_INITIALIZER((work).wait) } + + #define COMPLETION_INITIALIZER_ONSTACK(work) \ + ({ init_completion(&work); work; }) +@@ -73,7 +72,7 @@ + static inline void init_completion(struct completion *x) + { + x->done = 0; +- init_waitqueue_head(&x->wait); ++ init_swait_head(&x->wait); + } + + /** +diff -Nur linux-4.1.26.orig/include/linux/cpu.h linux-4.1.26/include/linux/cpu.h +--- linux-4.1.26.orig/include/linux/cpu.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/cpu.h 2016-06-19 15:30:58.663296424 +0200 +@@ -231,6 +231,8 @@ + extern void put_online_cpus(void); + extern void cpu_hotplug_disable(void); + extern void cpu_hotplug_enable(void); ++extern void pin_current_cpu(void); ++extern void unpin_current_cpu(void); + #define hotcpu_notifier(fn, pri) cpu_notifier(fn, pri) + #define __hotcpu_notifier(fn, pri) __cpu_notifier(fn, pri) + #define register_hotcpu_notifier(nb) register_cpu_notifier(nb) +@@ -249,6 +251,8 @@ + #define put_online_cpus() do { } while (0) + #define cpu_hotplug_disable() do { } while (0) + #define cpu_hotplug_enable() do { } while (0) ++static inline void pin_current_cpu(void) { } ++static inline void unpin_current_cpu(void) { } + #define hotcpu_notifier(fn, pri) do { (void)(fn); } while (0) + #define __hotcpu_notifier(fn, pri) do { (void)(fn); } while (0) + /* These aren't inline functions due to a GCC bug. */ +diff -Nur linux-4.1.26.orig/include/linux/delay.h linux-4.1.26/include/linux/delay.h +--- linux-4.1.26.orig/include/linux/delay.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/delay.h 2016-06-19 15:30:58.663296424 +0200 +@@ -52,4 +52,10 @@ + msleep(seconds * 1000); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++extern void cpu_chill(void); ++#else ++# define cpu_chill() cpu_relax() ++#endif ++ + #endif /* defined(_LINUX_DELAY_H) */ +diff -Nur linux-4.1.26.orig/include/linux/ftrace_event.h linux-4.1.26/include/linux/ftrace_event.h +--- linux-4.1.26.orig/include/linux/ftrace_event.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/ftrace_event.h 2016-06-19 15:30:58.663296424 +0200 +@@ -66,6 +66,9 @@ + unsigned char flags; + unsigned char preempt_count; + int pid; ++ unsigned short migrate_disable; ++ unsigned short padding; ++ unsigned char preempt_lazy_count; + }; + + #define FTRACE_MAX_EVENT \ +diff -Nur linux-4.1.26.orig/include/linux/ftrace.h linux-4.1.26/include/linux/ftrace.h +--- linux-4.1.26.orig/include/linux/ftrace.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/ftrace.h 2016-06-19 15:30:58.663296424 +0200 +@@ -682,6 +682,18 @@ + #define CALLER_ADDR5 ((unsigned long)ftrace_return_address(5)) + #define CALLER_ADDR6 ((unsigned long)ftrace_return_address(6)) + ++static inline unsigned long get_lock_parent_ip(void) ++{ ++ unsigned long addr = CALLER_ADDR0; ++ ++ if (!in_lock_functions(addr)) ++ return addr; ++ addr = CALLER_ADDR1; ++ if (!in_lock_functions(addr)) ++ return addr; ++ return CALLER_ADDR2; ++} ++ + #ifdef CONFIG_IRQSOFF_TRACER + extern void time_hardirqs_on(unsigned long a0, unsigned long a1); + extern void time_hardirqs_off(unsigned long a0, unsigned long a1); +diff -Nur linux-4.1.26.orig/include/linux/highmem.h linux-4.1.26/include/linux/highmem.h +--- linux-4.1.26.orig/include/linux/highmem.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/highmem.h 2016-06-19 15:30:58.663296424 +0200 +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + + #include + +@@ -65,6 +66,7 @@ + + static inline void *kmap_atomic(struct page *page) + { ++ preempt_disable_nort(); + pagefault_disable(); + return page_address(page); + } +@@ -73,6 +75,7 @@ + static inline void __kunmap_atomic(void *addr) + { + pagefault_enable(); ++ preempt_enable_nort(); + } + + #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) +@@ -85,32 +88,51 @@ + + #if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) + ++#ifndef CONFIG_PREEMPT_RT_FULL + DECLARE_PER_CPU(int, __kmap_atomic_idx); ++#endif + + static inline int kmap_atomic_idx_push(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + int idx = __this_cpu_inc_return(__kmap_atomic_idx) - 1; + +-#ifdef CONFIG_DEBUG_HIGHMEM ++# ifdef CONFIG_DEBUG_HIGHMEM + WARN_ON_ONCE(in_irq() && !irqs_disabled()); + BUG_ON(idx >= KM_TYPE_NR); +-#endif ++# endif + return idx; ++#else ++ current->kmap_idx++; ++ BUG_ON(current->kmap_idx > KM_TYPE_NR); ++ return current->kmap_idx - 1; ++#endif + } + + static inline int kmap_atomic_idx(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + return __this_cpu_read(__kmap_atomic_idx) - 1; ++#else ++ return current->kmap_idx - 1; ++#endif + } + + static inline void kmap_atomic_idx_pop(void) + { +-#ifdef CONFIG_DEBUG_HIGHMEM ++#ifndef CONFIG_PREEMPT_RT_FULL ++# ifdef CONFIG_DEBUG_HIGHMEM + int idx = __this_cpu_dec_return(__kmap_atomic_idx); + + BUG_ON(idx < 0); +-#else ++# else + __this_cpu_dec(__kmap_atomic_idx); ++# endif ++#else ++ current->kmap_idx--; ++# ifdef CONFIG_DEBUG_HIGHMEM ++ BUG_ON(current->kmap_idx < 0); ++# endif + #endif + } + +diff -Nur linux-4.1.26.orig/include/linux/hrtimer.h linux-4.1.26/include/linux/hrtimer.h +--- linux-4.1.26.orig/include/linux/hrtimer.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/hrtimer.h 2016-06-19 15:30:58.663296424 +0200 +@@ -111,6 +111,11 @@ + enum hrtimer_restart (*function)(struct hrtimer *); + struct hrtimer_clock_base *base; + unsigned long state; ++ struct list_head cb_entry; ++ int irqsafe; ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ ktime_t praecox; ++#endif + #ifdef CONFIG_TIMER_STATS + int start_pid; + void *start_site; +@@ -147,6 +152,7 @@ + int index; + clockid_t clockid; + struct timerqueue_head active; ++ struct list_head expired; + ktime_t resolution; + ktime_t (*get_time)(void); + ktime_t softirq_time; +@@ -194,6 +200,9 @@ + unsigned long nr_hangs; + ktime_t max_hang_time; + #endif ++#ifdef CONFIG_PREEMPT_RT_BASE ++ wait_queue_head_t wait; ++#endif + struct hrtimer_clock_base clock_base[HRTIMER_MAX_CLOCK_BASES]; + }; + +@@ -381,6 +390,13 @@ + return hrtimer_start_expires(timer, HRTIMER_MODE_ABS); + } + ++/* Softirq preemption could deadlock timer removal */ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ extern void hrtimer_wait_for_timer(const struct hrtimer *timer); ++#else ++# define hrtimer_wait_for_timer(timer) do { cpu_relax(); } while (0) ++#endif ++ + /* Query timers: */ + extern ktime_t hrtimer_get_remaining(const struct hrtimer *timer); + extern int hrtimer_get_res(const clockid_t which_clock, struct timespec *tp); +diff -Nur linux-4.1.26.orig/include/linux/idr.h linux-4.1.26/include/linux/idr.h +--- linux-4.1.26.orig/include/linux/idr.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/idr.h 2016-06-19 15:30:58.663296424 +0200 +@@ -95,10 +95,14 @@ + * Each idr_preload() should be matched with an invocation of this + * function. See idr_preload() for details. + */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++void idr_preload_end(void); ++#else + static inline void idr_preload_end(void) + { + preempt_enable(); + } ++#endif + + /** + * idr_find - return pointer for given id +diff -Nur linux-4.1.26.orig/include/linux/init_task.h linux-4.1.26/include/linux/init_task.h +--- linux-4.1.26.orig/include/linux/init_task.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/init_task.h 2016-06-19 15:30:58.667296578 +0200 +@@ -147,9 +147,16 @@ + # define INIT_PERF_EVENTS(tsk) + #endif + ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define INIT_TIMER_LIST .posix_timer_list = NULL, ++#else ++# define INIT_TIMER_LIST ++#endif ++ + #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN + # define INIT_VTIME(tsk) \ +- .vtime_seqlock = __SEQLOCK_UNLOCKED(tsk.vtime_seqlock), \ ++ .vtime_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.vtime_lock), \ ++ .vtime_seq = SEQCNT_ZERO(tsk.vtime_seq), \ + .vtime_snap = 0, \ + .vtime_snap_whence = VTIME_SYS, + #else +@@ -238,6 +245,7 @@ + .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ + .pi_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.pi_lock), \ + .timer_slack_ns = 50000, /* 50 usec default slack */ \ ++ INIT_TIMER_LIST \ + .pids = { \ + [PIDTYPE_PID] = INIT_PID_LINK(PIDTYPE_PID), \ + [PIDTYPE_PGID] = INIT_PID_LINK(PIDTYPE_PGID), \ +diff -Nur linux-4.1.26.orig/include/linux/interrupt.h linux-4.1.26/include/linux/interrupt.h +--- linux-4.1.26.orig/include/linux/interrupt.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/interrupt.h 2016-06-19 15:30:58.667296578 +0200 +@@ -61,6 +61,7 @@ + * interrupt handler after suspending interrupts. For system + * wakeup devices users need to implement wakeup detection in + * their interrupt handlers. ++ * IRQF_NO_SOFTIRQ_CALL - Do not process softirqs in the irq thread context (RT) + */ + #define IRQF_SHARED 0x00000080 + #define IRQF_PROBE_SHARED 0x00000100 +@@ -74,6 +75,7 @@ + #define IRQF_NO_THREAD 0x00010000 + #define IRQF_EARLY_RESUME 0x00020000 + #define IRQF_COND_SUSPEND 0x00040000 ++#define IRQF_NO_SOFTIRQ_CALL 0x00080000 + + #define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) + +@@ -102,6 +104,7 @@ + * @flags: flags (see IRQF_* above) + * @thread_fn: interrupt handler function for threaded interrupts + * @thread: thread pointer for threaded interrupts ++ * @secondary: pointer to secondary irqaction (force threading) + * @thread_flags: flags related to @thread + * @thread_mask: bitmask for keeping track of @thread activity + * @dir: pointer to the proc/irq/NN/name entry +@@ -113,6 +116,7 @@ + struct irqaction *next; + irq_handler_t thread_fn; + struct task_struct *thread; ++ struct irqaction *secondary; + unsigned int irq; + unsigned int flags; + unsigned long thread_flags; +@@ -184,7 +188,7 @@ + #ifdef CONFIG_LOCKDEP + # define local_irq_enable_in_hardirq() do { } while (0) + #else +-# define local_irq_enable_in_hardirq() local_irq_enable() ++# define local_irq_enable_in_hardirq() local_irq_enable_nort() + #endif + + extern void disable_irq_nosync(unsigned int irq); +@@ -215,6 +219,7 @@ + unsigned int irq; + struct kref kref; + struct work_struct work; ++ struct list_head list; + void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask); + void (*release)(struct kref *ref); + }; +@@ -377,9 +382,13 @@ + bool state); + + #ifdef CONFIG_IRQ_FORCED_THREADING ++# ifndef CONFIG_PREEMPT_RT_BASE + extern bool force_irqthreads; ++# else ++# define force_irqthreads (true) ++# endif + #else +-#define force_irqthreads (0) ++#define force_irqthreads (false) + #endif + + #ifndef __ARCH_SET_SOFTIRQ_PENDING +@@ -435,9 +444,10 @@ + void (*action)(struct softirq_action *); + }; + ++#ifndef CONFIG_PREEMPT_RT_FULL + asmlinkage void do_softirq(void); + asmlinkage void __do_softirq(void); +- ++static inline void thread_do_softirq(void) { do_softirq(); } + #ifdef __ARCH_HAS_DO_SOFTIRQ + void do_softirq_own_stack(void); + #else +@@ -446,13 +456,25 @@ + __do_softirq(); + } + #endif ++#else ++extern void thread_do_softirq(void); ++#endif + + extern void open_softirq(int nr, void (*action)(struct softirq_action *)); + extern void softirq_init(void); + extern void __raise_softirq_irqoff(unsigned int nr); ++#ifdef CONFIG_PREEMPT_RT_FULL ++extern void __raise_softirq_irqoff_ksoft(unsigned int nr); ++#else ++static inline void __raise_softirq_irqoff_ksoft(unsigned int nr) ++{ ++ __raise_softirq_irqoff(nr); ++} ++#endif + + extern void raise_softirq_irqoff(unsigned int nr); + extern void raise_softirq(unsigned int nr); ++extern void softirq_check_pending_idle(void); + + DECLARE_PER_CPU(struct task_struct *, ksoftirqd); + +@@ -474,8 +496,9 @@ + to be executed on some cpu at least once after this. + * If the tasklet is already scheduled, but its execution is still not + started, it will be executed only once. +- * If this tasklet is already running on another CPU (or schedule is called +- from tasklet itself), it is rescheduled for later. ++ * If this tasklet is already running on another CPU, it is rescheduled ++ for later. ++ * Schedule must not be called from the tasklet itself (a lockup occurs) + * Tasklet is strictly serialized wrt itself, but not + wrt another tasklets. If client needs some intertask synchronization, + he makes it with spinlocks. +@@ -500,27 +523,36 @@ + enum + { + TASKLET_STATE_SCHED, /* Tasklet is scheduled for execution */ +- TASKLET_STATE_RUN /* Tasklet is running (SMP only) */ ++ TASKLET_STATE_RUN, /* Tasklet is running (SMP only) */ ++ TASKLET_STATE_PENDING /* Tasklet is pending */ + }; + +-#ifdef CONFIG_SMP ++#define TASKLET_STATEF_SCHED (1 << TASKLET_STATE_SCHED) ++#define TASKLET_STATEF_RUN (1 << TASKLET_STATE_RUN) ++#define TASKLET_STATEF_PENDING (1 << TASKLET_STATE_PENDING) ++ ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) + static inline int tasklet_trylock(struct tasklet_struct *t) + { + return !test_and_set_bit(TASKLET_STATE_RUN, &(t)->state); + } + ++static inline int tasklet_tryunlock(struct tasklet_struct *t) ++{ ++ return cmpxchg(&t->state, TASKLET_STATEF_RUN, 0) == TASKLET_STATEF_RUN; ++} ++ + static inline void tasklet_unlock(struct tasklet_struct *t) + { + smp_mb__before_atomic(); + clear_bit(TASKLET_STATE_RUN, &(t)->state); + } + +-static inline void tasklet_unlock_wait(struct tasklet_struct *t) +-{ +- while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { barrier(); } +-} ++extern void tasklet_unlock_wait(struct tasklet_struct *t); ++ + #else + #define tasklet_trylock(t) 1 ++#define tasklet_tryunlock(t) 1 + #define tasklet_unlock_wait(t) do { } while (0) + #define tasklet_unlock(t) do { } while (0) + #endif +@@ -569,12 +601,7 @@ + smp_mb(); + } + +-static inline void tasklet_enable(struct tasklet_struct *t) +-{ +- smp_mb__before_atomic(); +- atomic_dec(&t->count); +-} +- ++extern void tasklet_enable(struct tasklet_struct *t); + extern void tasklet_kill(struct tasklet_struct *t); + extern void tasklet_kill_immediate(struct tasklet_struct *t, unsigned int cpu); + extern void tasklet_init(struct tasklet_struct *t, +@@ -605,6 +632,12 @@ + tasklet_kill(&ttimer->tasklet); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++extern void softirq_early_init(void); ++#else ++static inline void softirq_early_init(void) { } ++#endif ++ + /* + * Autoprobing for irqs: + * +diff -Nur linux-4.1.26.orig/include/linux/io-mapping.h linux-4.1.26/include/linux/io-mapping.h +--- linux-4.1.26.orig/include/linux/io-mapping.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/io-mapping.h 2016-06-19 15:30:58.667296578 +0200 +@@ -141,6 +141,7 @@ + io_mapping_map_atomic_wc(struct io_mapping *mapping, + unsigned long offset) + { ++ preempt_disable(); + pagefault_disable(); + return ((char __force __iomem *) mapping) + offset; + } +@@ -149,6 +150,7 @@ + io_mapping_unmap_atomic(void __iomem *vaddr) + { + pagefault_enable(); ++ preempt_enable(); + } + + /* Non-atomic map/unmap */ +diff -Nur linux-4.1.26.orig/include/linux/irqdesc.h linux-4.1.26/include/linux/irqdesc.h +--- linux-4.1.26.orig/include/linux/irqdesc.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/irqdesc.h 2016-06-19 15:30:58.667296578 +0200 +@@ -63,6 +63,7 @@ + unsigned int irqs_unhandled; + atomic_t threads_handled; + int threads_handled_last; ++ u64 random_ip; + raw_spinlock_t lock; + struct cpumask *percpu_enabled; + #ifdef CONFIG_SMP +diff -Nur linux-4.1.26.orig/include/linux/irqflags.h linux-4.1.26/include/linux/irqflags.h +--- linux-4.1.26.orig/include/linux/irqflags.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/irqflags.h 2016-06-19 15:30:58.667296578 +0200 +@@ -25,8 +25,6 @@ + # define trace_softirqs_enabled(p) ((p)->softirqs_enabled) + # define trace_hardirq_enter() do { current->hardirq_context++; } while (0) + # define trace_hardirq_exit() do { current->hardirq_context--; } while (0) +-# define lockdep_softirq_enter() do { current->softirq_context++; } while (0) +-# define lockdep_softirq_exit() do { current->softirq_context--; } while (0) + # define INIT_TRACE_IRQFLAGS .softirqs_enabled = 1, + #else + # define trace_hardirqs_on() do { } while (0) +@@ -39,9 +37,15 @@ + # define trace_softirqs_enabled(p) 0 + # define trace_hardirq_enter() do { } while (0) + # define trace_hardirq_exit() do { } while (0) ++# define INIT_TRACE_IRQFLAGS ++#endif ++ ++#if defined(CONFIG_TRACE_IRQFLAGS) && !defined(CONFIG_PREEMPT_RT_FULL) ++# define lockdep_softirq_enter() do { current->softirq_context++; } while (0) ++# define lockdep_softirq_exit() do { current->softirq_context--; } while (0) ++#else + # define lockdep_softirq_enter() do { } while (0) + # define lockdep_softirq_exit() do { } while (0) +-# define INIT_TRACE_IRQFLAGS + #endif + + #if defined(CONFIG_IRQSOFF_TRACER) || \ +@@ -148,4 +152,23 @@ + + #define irqs_disabled_flags(flags) raw_irqs_disabled_flags(flags) + ++/* ++ * local_irq* variants depending on RT/!RT ++ */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define local_irq_disable_nort() do { } while (0) ++# define local_irq_enable_nort() do { } while (0) ++# define local_irq_save_nort(flags) local_save_flags(flags) ++# define local_irq_restore_nort(flags) (void)(flags) ++# define local_irq_disable_rt() local_irq_disable() ++# define local_irq_enable_rt() local_irq_enable() ++#else ++# define local_irq_disable_nort() local_irq_disable() ++# define local_irq_enable_nort() local_irq_enable() ++# define local_irq_save_nort(flags) local_irq_save(flags) ++# define local_irq_restore_nort(flags) local_irq_restore(flags) ++# define local_irq_disable_rt() do { } while (0) ++# define local_irq_enable_rt() do { } while (0) ++#endif ++ + #endif +diff -Nur linux-4.1.26.orig/include/linux/irq.h linux-4.1.26/include/linux/irq.h +--- linux-4.1.26.orig/include/linux/irq.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/irq.h 2016-06-19 15:30:58.667296578 +0200 +@@ -72,6 +72,7 @@ + * IRQ_IS_POLLED - Always polled by another interrupt. Exclude + * it from the spurious interrupt detection + * mechanism and from core side polling. ++ * IRQ_NO_SOFTIRQ_CALL - No softirq processing in the irq thread context (RT) + */ + enum { + IRQ_TYPE_NONE = 0x00000000, +@@ -97,13 +98,14 @@ + IRQ_NOTHREAD = (1 << 16), + IRQ_PER_CPU_DEVID = (1 << 17), + IRQ_IS_POLLED = (1 << 18), ++ IRQ_NO_SOFTIRQ_CALL = (1 << 19), + }; + + #define IRQF_MODIFY_MASK \ + (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \ + IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \ + IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID | \ +- IRQ_IS_POLLED) ++ IRQ_IS_POLLED | IRQ_NO_SOFTIRQ_CALL) + + #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) + +diff -Nur linux-4.1.26.orig/include/linux/irq_work.h linux-4.1.26/include/linux/irq_work.h +--- linux-4.1.26.orig/include/linux/irq_work.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/irq_work.h 2016-06-19 15:30:58.667296578 +0200 +@@ -16,6 +16,7 @@ + #define IRQ_WORK_BUSY 2UL + #define IRQ_WORK_FLAGS 3UL + #define IRQ_WORK_LAZY 4UL /* Doesn't want IPI, wait for tick */ ++#define IRQ_WORK_HARD_IRQ 8UL /* Run hard IRQ context, even on RT */ + + struct irq_work { + unsigned long flags; +@@ -51,4 +52,10 @@ + static inline void irq_work_run(void) { } + #endif + ++#if defined(CONFIG_IRQ_WORK) && defined(CONFIG_PREEMPT_RT_FULL) ++void irq_work_tick_soft(void); ++#else ++static inline void irq_work_tick_soft(void) { } ++#endif ++ + #endif /* _LINUX_IRQ_WORK_H */ +diff -Nur linux-4.1.26.orig/include/linux/jbd_common.h linux-4.1.26/include/linux/jbd_common.h +--- linux-4.1.26.orig/include/linux/jbd_common.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/jbd_common.h 2016-06-19 15:30:58.667296578 +0200 +@@ -15,32 +15,56 @@ + + static inline void jbd_lock_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_lock(BH_State, &bh->b_state); ++#else ++ spin_lock(&bh->b_state_lock); ++#endif + } + + static inline int jbd_trylock_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + return bit_spin_trylock(BH_State, &bh->b_state); ++#else ++ return spin_trylock(&bh->b_state_lock); ++#endif + } + + static inline int jbd_is_locked_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + return bit_spin_is_locked(BH_State, &bh->b_state); ++#else ++ return spin_is_locked(&bh->b_state_lock); ++#endif + } + + static inline void jbd_unlock_bh_state(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_unlock(BH_State, &bh->b_state); ++#else ++ spin_unlock(&bh->b_state_lock); ++#endif + } + + static inline void jbd_lock_bh_journal_head(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_lock(BH_JournalHead, &bh->b_state); ++#else ++ spin_lock(&bh->b_journal_head_lock); ++#endif + } + + static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_unlock(BH_JournalHead, &bh->b_state); ++#else ++ spin_unlock(&bh->b_journal_head_lock); ++#endif + } + + #endif +diff -Nur linux-4.1.26.orig/include/linux/kdb.h linux-4.1.26/include/linux/kdb.h +--- linux-4.1.26.orig/include/linux/kdb.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/kdb.h 2016-06-19 15:30:58.667296578 +0200 +@@ -167,6 +167,7 @@ + extern __printf(1, 2) int kdb_printf(const char *, ...); + typedef __printf(1, 2) int (*kdb_printf_t)(const char *, ...); + ++#define in_kdb_printk() (kdb_trap_printk) + extern void kdb_init(int level); + + /* Access to kdb specific polling devices */ +@@ -201,6 +202,7 @@ + extern int kdb_unregister(char *); + #else /* ! CONFIG_KGDB_KDB */ + static inline __printf(1, 2) int kdb_printf(const char *fmt, ...) { return 0; } ++#define in_kdb_printk() (0) + static inline void kdb_init(int level) {} + static inline int kdb_register(char *cmd, kdb_func_t func, char *usage, + char *help, short minlen) { return 0; } +diff -Nur linux-4.1.26.orig/include/linux/kernel.h linux-4.1.26/include/linux/kernel.h +--- linux-4.1.26.orig/include/linux/kernel.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/kernel.h 2016-06-19 15:30:58.667296578 +0200 +@@ -188,6 +188,9 @@ + */ + # define might_sleep() \ + do { __might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) ++ ++# define might_sleep_no_state_check() \ ++ do { ___might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0) + # define sched_annotate_sleep() (current->task_state_change = 0) + #else + static inline void ___might_sleep(const char *file, int line, +@@ -195,6 +198,7 @@ + static inline void __might_sleep(const char *file, int line, + int preempt_offset) { } + # define might_sleep() do { might_resched(); } while (0) ++# define might_sleep_no_state_check() do { might_resched(); } while (0) + # define sched_annotate_sleep() do { } while (0) + #endif + +@@ -244,7 +248,8 @@ + + #if defined(CONFIG_MMU) && \ + (defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP)) +-void might_fault(void); ++#define might_fault() __might_fault(__FILE__, __LINE__) ++void __might_fault(const char *file, int line); + #else + static inline void might_fault(void) { } + #endif +@@ -466,6 +471,7 @@ + SYSTEM_HALT, + SYSTEM_POWER_OFF, + SYSTEM_RESTART, ++ SYSTEM_SUSPEND, + } system_state; + + #define TAINT_PROPRIETARY_MODULE 0 +diff -Nur linux-4.1.26.orig/include/linux/kvm_host.h linux-4.1.26/include/linux/kvm_host.h +--- linux-4.1.26.orig/include/linux/kvm_host.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/kvm_host.h 2016-06-19 15:30:58.667296578 +0200 +@@ -230,7 +230,7 @@ + + int fpu_active; + int guest_fpu_loaded, guest_xcr0_loaded; +- wait_queue_head_t wq; ++ struct swait_head wq; + struct pid *pid; + int sigset_active; + sigset_t sigset; +@@ -701,7 +701,7 @@ + } + #endif + +-static inline wait_queue_head_t *kvm_arch_vcpu_wq(struct kvm_vcpu *vcpu) ++static inline struct swait_head *kvm_arch_vcpu_wq(struct kvm_vcpu *vcpu) + { + #ifdef __KVM_HAVE_ARCH_WQP + return vcpu->arch.wqp; +diff -Nur linux-4.1.26.orig/include/linux/lglock.h linux-4.1.26/include/linux/lglock.h +--- linux-4.1.26.orig/include/linux/lglock.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/lglock.h 2016-06-19 15:30:58.667296578 +0200 +@@ -34,22 +34,39 @@ + #endif + + struct lglock { ++#ifndef CONFIG_PREEMPT_RT_FULL + arch_spinlock_t __percpu *lock; ++#else ++ struct rt_mutex __percpu *lock; ++#endif + #ifdef CONFIG_DEBUG_LOCK_ALLOC + struct lock_class_key lock_key; + struct lockdep_map lock_dep_map; + #endif + }; + +-#define DEFINE_LGLOCK(name) \ ++#ifndef CONFIG_PREEMPT_RT_FULL ++# define DEFINE_LGLOCK(name) \ + static DEFINE_PER_CPU(arch_spinlock_t, name ## _lock) \ + = __ARCH_SPIN_LOCK_UNLOCKED; \ + struct lglock name = { .lock = &name ## _lock } + +-#define DEFINE_STATIC_LGLOCK(name) \ ++# define DEFINE_STATIC_LGLOCK(name) \ + static DEFINE_PER_CPU(arch_spinlock_t, name ## _lock) \ + = __ARCH_SPIN_LOCK_UNLOCKED; \ + static struct lglock name = { .lock = &name ## _lock } ++#else ++ ++# define DEFINE_LGLOCK(name) \ ++ static DEFINE_PER_CPU(struct rt_mutex, name ## _lock) \ ++ = __RT_MUTEX_INITIALIZER( name ## _lock); \ ++ struct lglock name = { .lock = &name ## _lock } ++ ++# define DEFINE_STATIC_LGLOCK(name) \ ++ static DEFINE_PER_CPU(struct rt_mutex, name ## _lock) \ ++ = __RT_MUTEX_INITIALIZER( name ## _lock); \ ++ static struct lglock name = { .lock = &name ## _lock } ++#endif + + void lg_lock_init(struct lglock *lg, char *name); + void lg_local_lock(struct lglock *lg); +@@ -59,6 +76,12 @@ + void lg_global_lock(struct lglock *lg); + void lg_global_unlock(struct lglock *lg); + ++#ifndef CONFIG_PREEMPT_RT_FULL ++#define lg_global_trylock_relax(name) lg_global_lock(name) ++#else ++void lg_global_trylock_relax(struct lglock *lg); ++#endif ++ + #else + /* When !CONFIG_SMP, map lglock to spinlock */ + #define lglock spinlock +diff -Nur linux-4.1.26.orig/include/linux/list_bl.h linux-4.1.26/include/linux/list_bl.h +--- linux-4.1.26.orig/include/linux/list_bl.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/list_bl.h 2016-06-19 15:30:58.667296578 +0200 +@@ -2,6 +2,7 @@ + #define _LINUX_LIST_BL_H + + #include ++#include + #include + + /* +@@ -32,13 +33,22 @@ + + struct hlist_bl_head { + struct hlist_bl_node *first; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ raw_spinlock_t lock; ++#endif + }; + + struct hlist_bl_node { + struct hlist_bl_node *next, **pprev; + }; +-#define INIT_HLIST_BL_HEAD(ptr) \ +- ((ptr)->first = NULL) ++ ++static inline void INIT_HLIST_BL_HEAD(struct hlist_bl_head *h) ++{ ++ h->first = NULL; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ raw_spin_lock_init(&h->lock); ++#endif ++} + + static inline void INIT_HLIST_BL_NODE(struct hlist_bl_node *h) + { +@@ -117,12 +127,26 @@ + + static inline void hlist_bl_lock(struct hlist_bl_head *b) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + bit_spin_lock(0, (unsigned long *)b); ++#else ++ raw_spin_lock(&b->lock); ++#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) ++ __set_bit(0, (unsigned long *)b); ++#endif ++#endif + } + + static inline void hlist_bl_unlock(struct hlist_bl_head *b) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + __bit_spin_unlock(0, (unsigned long *)b); ++#else ++#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) ++ __clear_bit(0, (unsigned long *)b); ++#endif ++ raw_spin_unlock(&b->lock); ++#endif + } + + static inline bool hlist_bl_is_locked(struct hlist_bl_head *b) +diff -Nur linux-4.1.26.orig/include/linux/locallock.h linux-4.1.26/include/linux/locallock.h +--- linux-4.1.26.orig/include/linux/locallock.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/locallock.h 2016-06-19 15:30:58.667296578 +0200 +@@ -0,0 +1,270 @@ ++#ifndef _LINUX_LOCALLOCK_H ++#define _LINUX_LOCALLOCK_H ++ ++#include ++#include ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++ ++#ifdef CONFIG_DEBUG_SPINLOCK ++# define LL_WARN(cond) WARN_ON(cond) ++#else ++# define LL_WARN(cond) do { } while (0) ++#endif ++ ++/* ++ * per cpu lock based substitute for local_irq_*() ++ */ ++struct local_irq_lock { ++ spinlock_t lock; ++ struct task_struct *owner; ++ int nestcnt; ++ unsigned long flags; ++}; ++ ++#define DEFINE_LOCAL_IRQ_LOCK(lvar) \ ++ DEFINE_PER_CPU(struct local_irq_lock, lvar) = { \ ++ .lock = __SPIN_LOCK_UNLOCKED((lvar).lock) } ++ ++#define DECLARE_LOCAL_IRQ_LOCK(lvar) \ ++ DECLARE_PER_CPU(struct local_irq_lock, lvar) ++ ++#define local_irq_lock_init(lvar) \ ++ do { \ ++ int __cpu; \ ++ for_each_possible_cpu(__cpu) \ ++ spin_lock_init(&per_cpu(lvar, __cpu).lock); \ ++ } while (0) ++ ++/* ++ * spin_lock|trylock|unlock_local flavour that does not migrate disable ++ * used for __local_lock|trylock|unlock where get_local_var/put_local_var ++ * already takes care of the migrate_disable/enable ++ * for CONFIG_PREEMPT_BASE map to the normal spin_* calls. ++ */ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define spin_lock_local(lock) rt_spin_lock(lock) ++# define spin_trylock_local(lock) rt_spin_trylock(lock) ++# define spin_unlock_local(lock) rt_spin_unlock(lock) ++#else ++# define spin_lock_local(lock) spin_lock(lock) ++# define spin_trylock_local(lock) spin_trylock(lock) ++# define spin_unlock_local(lock) spin_unlock(lock) ++#endif ++ ++static inline void __local_lock(struct local_irq_lock *lv) ++{ ++ if (lv->owner != current) { ++ spin_lock_local(&lv->lock); ++ LL_WARN(lv->owner); ++ LL_WARN(lv->nestcnt); ++ lv->owner = current; ++ } ++ lv->nestcnt++; ++} ++ ++#define local_lock(lvar) \ ++ do { __local_lock(&get_local_var(lvar)); } while (0) ++ ++static inline int __local_trylock(struct local_irq_lock *lv) ++{ ++ if (lv->owner != current && spin_trylock_local(&lv->lock)) { ++ LL_WARN(lv->owner); ++ LL_WARN(lv->nestcnt); ++ lv->owner = current; ++ lv->nestcnt = 1; ++ return 1; ++ } ++ return 0; ++} ++ ++#define local_trylock(lvar) \ ++ ({ \ ++ int __locked; \ ++ __locked = __local_trylock(&get_local_var(lvar)); \ ++ if (!__locked) \ ++ put_local_var(lvar); \ ++ __locked; \ ++ }) ++ ++static inline void __local_unlock(struct local_irq_lock *lv) ++{ ++ LL_WARN(lv->nestcnt == 0); ++ LL_WARN(lv->owner != current); ++ if (--lv->nestcnt) ++ return; ++ ++ lv->owner = NULL; ++ spin_unlock_local(&lv->lock); ++} ++ ++#define local_unlock(lvar) \ ++ do { \ ++ __local_unlock(this_cpu_ptr(&lvar)); \ ++ put_local_var(lvar); \ ++ } while (0) ++ ++static inline void __local_lock_irq(struct local_irq_lock *lv) ++{ ++ spin_lock_irqsave(&lv->lock, lv->flags); ++ LL_WARN(lv->owner); ++ LL_WARN(lv->nestcnt); ++ lv->owner = current; ++ lv->nestcnt = 1; ++} ++ ++#define local_lock_irq(lvar) \ ++ do { __local_lock_irq(&get_local_var(lvar)); } while (0) ++ ++#define local_lock_irq_on(lvar, cpu) \ ++ do { __local_lock_irq(&per_cpu(lvar, cpu)); } while (0) ++ ++static inline void __local_unlock_irq(struct local_irq_lock *lv) ++{ ++ LL_WARN(!lv->nestcnt); ++ LL_WARN(lv->owner != current); ++ lv->owner = NULL; ++ lv->nestcnt = 0; ++ spin_unlock_irq(&lv->lock); ++} ++ ++#define local_unlock_irq(lvar) \ ++ do { \ ++ __local_unlock_irq(this_cpu_ptr(&lvar)); \ ++ put_local_var(lvar); \ ++ } while (0) ++ ++#define local_unlock_irq_on(lvar, cpu) \ ++ do { \ ++ __local_unlock_irq(&per_cpu(lvar, cpu)); \ ++ } while (0) ++ ++static inline int __local_lock_irqsave(struct local_irq_lock *lv) ++{ ++ if (lv->owner != current) { ++ __local_lock_irq(lv); ++ return 0; ++ } else { ++ lv->nestcnt++; ++ return 1; ++ } ++} ++ ++#define local_lock_irqsave(lvar, _flags) \ ++ do { \ ++ if (__local_lock_irqsave(&get_local_var(lvar))) \ ++ put_local_var(lvar); \ ++ _flags = __this_cpu_read(lvar.flags); \ ++ } while (0) ++ ++#define local_lock_irqsave_on(lvar, _flags, cpu) \ ++ do { \ ++ __local_lock_irqsave(&per_cpu(lvar, cpu)); \ ++ _flags = per_cpu(lvar, cpu).flags; \ ++ } while (0) ++ ++static inline int __local_unlock_irqrestore(struct local_irq_lock *lv, ++ unsigned long flags) ++{ ++ LL_WARN(!lv->nestcnt); ++ LL_WARN(lv->owner != current); ++ if (--lv->nestcnt) ++ return 0; ++ ++ lv->owner = NULL; ++ spin_unlock_irqrestore(&lv->lock, lv->flags); ++ return 1; ++} ++ ++#define local_unlock_irqrestore(lvar, flags) \ ++ do { \ ++ if (__local_unlock_irqrestore(this_cpu_ptr(&lvar), flags)) \ ++ put_local_var(lvar); \ ++ } while (0) ++ ++#define local_unlock_irqrestore_on(lvar, flags, cpu) \ ++ do { \ ++ __local_unlock_irqrestore(&per_cpu(lvar, cpu), flags); \ ++ } while (0) ++ ++#define local_spin_trylock_irq(lvar, lock) \ ++ ({ \ ++ int __locked; \ ++ local_lock_irq(lvar); \ ++ __locked = spin_trylock(lock); \ ++ if (!__locked) \ ++ local_unlock_irq(lvar); \ ++ __locked; \ ++ }) ++ ++#define local_spin_lock_irq(lvar, lock) \ ++ do { \ ++ local_lock_irq(lvar); \ ++ spin_lock(lock); \ ++ } while (0) ++ ++#define local_spin_unlock_irq(lvar, lock) \ ++ do { \ ++ spin_unlock(lock); \ ++ local_unlock_irq(lvar); \ ++ } while (0) ++ ++#define local_spin_lock_irqsave(lvar, lock, flags) \ ++ do { \ ++ local_lock_irqsave(lvar, flags); \ ++ spin_lock(lock); \ ++ } while (0) ++ ++#define local_spin_unlock_irqrestore(lvar, lock, flags) \ ++ do { \ ++ spin_unlock(lock); \ ++ local_unlock_irqrestore(lvar, flags); \ ++ } while (0) ++ ++#define get_locked_var(lvar, var) \ ++ (*({ \ ++ local_lock(lvar); \ ++ this_cpu_ptr(&var); \ ++ })) ++ ++#define put_locked_var(lvar, var) local_unlock(lvar); ++ ++#define local_lock_cpu(lvar) \ ++ ({ \ ++ local_lock(lvar); \ ++ smp_processor_id(); \ ++ }) ++ ++#define local_unlock_cpu(lvar) local_unlock(lvar) ++ ++#else /* PREEMPT_RT_BASE */ ++ ++#define DEFINE_LOCAL_IRQ_LOCK(lvar) __typeof__(const int) lvar ++#define DECLARE_LOCAL_IRQ_LOCK(lvar) extern __typeof__(const int) lvar ++ ++static inline void local_irq_lock_init(int lvar) { } ++ ++#define local_lock(lvar) preempt_disable() ++#define local_unlock(lvar) preempt_enable() ++#define local_lock_irq(lvar) local_irq_disable() ++#define local_unlock_irq(lvar) local_irq_enable() ++#define local_lock_irqsave(lvar, flags) local_irq_save(flags) ++#define local_unlock_irqrestore(lvar, flags) local_irq_restore(flags) ++ ++#define local_spin_trylock_irq(lvar, lock) spin_trylock_irq(lock) ++#define local_spin_lock_irq(lvar, lock) spin_lock_irq(lock) ++#define local_spin_unlock_irq(lvar, lock) spin_unlock_irq(lock) ++#define local_spin_lock_irqsave(lvar, lock, flags) \ ++ spin_lock_irqsave(lock, flags) ++#define local_spin_unlock_irqrestore(lvar, lock, flags) \ ++ spin_unlock_irqrestore(lock, flags) ++ ++#define get_locked_var(lvar, var) get_cpu_var(var) ++#define put_locked_var(lvar, var) put_cpu_var(var) ++ ++#define local_lock_cpu(lvar) get_cpu() ++#define local_unlock_cpu(lvar) put_cpu() ++ ++#endif ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/mm_types.h linux-4.1.26/include/linux/mm_types.h +--- linux-4.1.26.orig/include/linux/mm_types.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/mm_types.h 2016-06-19 15:30:58.667296578 +0200 +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -453,6 +454,9 @@ + bool tlb_flush_pending; + #endif + struct uprobes_state uprobes_state; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct rcu_head delayed_drop; ++#endif + #ifdef CONFIG_X86_INTEL_MPX + /* address of the bounds directory */ + void __user *bd_addr; +diff -Nur linux-4.1.26.orig/include/linux/mutex.h linux-4.1.26/include/linux/mutex.h +--- linux-4.1.26.orig/include/linux/mutex.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/mutex.h 2016-06-19 15:30:58.671296732 +0200 +@@ -19,6 +19,17 @@ + #include + #include + ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ ++ , .dep_map = { .name = #lockname } ++#else ++# define __DEP_MAP_MUTEX_INITIALIZER(lockname) ++#endif ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# include ++#else ++ + /* + * Simple, straightforward mutexes with strict semantics: + * +@@ -99,13 +110,6 @@ + static inline void mutex_destroy(struct mutex *lock) {} + #endif + +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define __DEP_MAP_MUTEX_INITIALIZER(lockname) \ +- , .dep_map = { .name = #lockname } +-#else +-# define __DEP_MAP_MUTEX_INITIALIZER(lockname) +-#endif +- + #define __MUTEX_INITIALIZER(lockname) \ + { .count = ATOMIC_INIT(1) \ + , .wait_lock = __SPIN_LOCK_UNLOCKED(lockname.wait_lock) \ +@@ -173,6 +177,8 @@ + extern int mutex_trylock(struct mutex *lock); + extern void mutex_unlock(struct mutex *lock); + ++#endif /* !PREEMPT_RT_FULL */ ++ + extern int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock); + + #endif /* __LINUX_MUTEX_H */ +diff -Nur linux-4.1.26.orig/include/linux/mutex_rt.h linux-4.1.26/include/linux/mutex_rt.h +--- linux-4.1.26.orig/include/linux/mutex_rt.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/mutex_rt.h 2016-06-19 15:30:58.671296732 +0200 +@@ -0,0 +1,84 @@ ++#ifndef __LINUX_MUTEX_RT_H ++#define __LINUX_MUTEX_RT_H ++ ++#ifndef __LINUX_MUTEX_H ++#error "Please include mutex.h" ++#endif ++ ++#include ++ ++/* FIXME: Just for __lockfunc */ ++#include ++ ++struct mutex { ++ struct rt_mutex lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define __MUTEX_INITIALIZER(mutexname) \ ++ { \ ++ .lock = __RT_MUTEX_INITIALIZER(mutexname.lock) \ ++ __DEP_MAP_MUTEX_INITIALIZER(mutexname) \ ++ } ++ ++#define DEFINE_MUTEX(mutexname) \ ++ struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) ++ ++extern void __mutex_do_init(struct mutex *lock, const char *name, struct lock_class_key *key); ++extern void __lockfunc _mutex_lock(struct mutex *lock); ++extern int __lockfunc _mutex_lock_interruptible(struct mutex *lock); ++extern int __lockfunc _mutex_lock_killable(struct mutex *lock); ++extern void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass); ++extern void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest_lock); ++extern int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass); ++extern int __lockfunc _mutex_trylock(struct mutex *lock); ++extern void __lockfunc _mutex_unlock(struct mutex *lock); ++ ++#define mutex_is_locked(l) rt_mutex_is_locked(&(l)->lock) ++#define mutex_lock(l) _mutex_lock(l) ++#define mutex_lock_interruptible(l) _mutex_lock_interruptible(l) ++#define mutex_lock_killable(l) _mutex_lock_killable(l) ++#define mutex_trylock(l) _mutex_trylock(l) ++#define mutex_unlock(l) _mutex_unlock(l) ++#define mutex_destroy(l) rt_mutex_destroy(&(l)->lock) ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define mutex_lock_nested(l, s) _mutex_lock_nested(l, s) ++# define mutex_lock_interruptible_nested(l, s) \ ++ _mutex_lock_interruptible_nested(l, s) ++# define mutex_lock_killable_nested(l, s) \ ++ _mutex_lock_killable_nested(l, s) ++ ++# define mutex_lock_nest_lock(lock, nest_lock) \ ++do { \ ++ typecheck(struct lockdep_map *, &(nest_lock)->dep_map); \ ++ _mutex_lock_nest_lock(lock, &(nest_lock)->dep_map); \ ++} while (0) ++ ++#else ++# define mutex_lock_nested(l, s) _mutex_lock(l) ++# define mutex_lock_interruptible_nested(l, s) \ ++ _mutex_lock_interruptible(l) ++# define mutex_lock_killable_nested(l, s) \ ++ _mutex_lock_killable(l) ++# define mutex_lock_nest_lock(lock, nest_lock) mutex_lock(lock) ++#endif ++ ++# define mutex_init(mutex) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(mutex)->lock); \ ++ __mutex_do_init((mutex), #mutex, &__key); \ ++} while (0) ++ ++# define __mutex_init(mutex, name, key) \ ++do { \ ++ rt_mutex_init(&(mutex)->lock); \ ++ __mutex_do_init((mutex), name, key); \ ++} while (0) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/netdevice.h linux-4.1.26/include/linux/netdevice.h +--- linux-4.1.26.orig/include/linux/netdevice.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/netdevice.h 2016-06-19 15:30:58.671296732 +0200 +@@ -2192,11 +2192,20 @@ + void synchronize_net(void); + int init_dummy_netdev(struct net_device *dev); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static inline int dev_recursion_level(void) ++{ ++ return current->xmit_recursion; ++} ++ ++#else ++ + DECLARE_PER_CPU(int, xmit_recursion); + static inline int dev_recursion_level(void) + { + return this_cpu_read(xmit_recursion); + } ++#endif + + struct net_device *dev_get_by_index(struct net *net, int ifindex); + struct net_device *__dev_get_by_index(struct net *net, int ifindex); +@@ -2469,6 +2478,7 @@ + unsigned int dropped; + struct sk_buff_head input_pkt_queue; + struct napi_struct backlog; ++ struct sk_buff_head tofree_queue; + + }; + +diff -Nur linux-4.1.26.orig/include/linux/netfilter/x_tables.h linux-4.1.26/include/linux/netfilter/x_tables.h +--- linux-4.1.26.orig/include/linux/netfilter/x_tables.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/netfilter/x_tables.h 2016-06-19 15:30:58.671296732 +0200 +@@ -3,6 +3,7 @@ + + + #include ++#include + #include + + /** +@@ -282,6 +283,8 @@ + */ + DECLARE_PER_CPU(seqcount_t, xt_recseq); + ++DECLARE_LOCAL_IRQ_LOCK(xt_write_lock); ++ + /** + * xt_write_recseq_begin - start of a write section + * +@@ -296,6 +299,9 @@ + { + unsigned int addend; + ++ /* RT protection */ ++ local_lock(xt_write_lock); ++ + /* + * Low order bit of sequence is set if we already + * called xt_write_recseq_begin(). +@@ -326,6 +332,7 @@ + /* this is kind of a write_seqcount_end(), but addend is 0 or 1 */ + smp_wmb(); + __this_cpu_add(xt_recseq.sequence, addend); ++ local_unlock(xt_write_lock); + } + + /* +diff -Nur linux-4.1.26.orig/include/linux/notifier.h linux-4.1.26/include/linux/notifier.h +--- linux-4.1.26.orig/include/linux/notifier.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/notifier.h 2016-06-19 15:30:58.671296732 +0200 +@@ -6,7 +6,7 @@ + * + * Alan Cox + */ +- ++ + #ifndef _LINUX_NOTIFIER_H + #define _LINUX_NOTIFIER_H + #include +@@ -42,9 +42,7 @@ + * in srcu_notifier_call_chain(): no cache bounces and no memory barriers. + * As compensation, srcu_notifier_chain_unregister() is rather expensive. + * SRCU notifier chains should be used when the chain will be called very +- * often but notifier_blocks will seldom be removed. Also, SRCU notifier +- * chains are slightly more difficult to use because they require special +- * runtime initialization. ++ * often but notifier_blocks will seldom be removed. + */ + + typedef int (*notifier_fn_t)(struct notifier_block *nb, +@@ -88,7 +86,7 @@ + (name)->head = NULL; \ + } while (0) + +-/* srcu_notifier_heads must be initialized and cleaned up dynamically */ ++/* srcu_notifier_heads must be cleaned up dynamically */ + extern void srcu_init_notifier_head(struct srcu_notifier_head *nh); + #define srcu_cleanup_notifier_head(name) \ + cleanup_srcu_struct(&(name)->srcu); +@@ -101,7 +99,13 @@ + .head = NULL } + #define RAW_NOTIFIER_INIT(name) { \ + .head = NULL } +-/* srcu_notifier_heads cannot be initialized statically */ ++ ++#define SRCU_NOTIFIER_INIT(name, pcpu) \ ++ { \ ++ .mutex = __MUTEX_INITIALIZER(name.mutex), \ ++ .head = NULL, \ ++ .srcu = __SRCU_STRUCT_INIT(name.srcu, pcpu), \ ++ } + + #define ATOMIC_NOTIFIER_HEAD(name) \ + struct atomic_notifier_head name = \ +@@ -113,6 +117,18 @@ + struct raw_notifier_head name = \ + RAW_NOTIFIER_INIT(name) + ++#define _SRCU_NOTIFIER_HEAD(name, mod) \ ++ static DEFINE_PER_CPU(struct srcu_struct_array, \ ++ name##_head_srcu_array); \ ++ mod struct srcu_notifier_head name = \ ++ SRCU_NOTIFIER_INIT(name, name##_head_srcu_array) ++ ++#define SRCU_NOTIFIER_HEAD(name) \ ++ _SRCU_NOTIFIER_HEAD(name, ) ++ ++#define SRCU_NOTIFIER_HEAD_STATIC(name) \ ++ _SRCU_NOTIFIER_HEAD(name, static) ++ + #ifdef __KERNEL__ + + extern int atomic_notifier_chain_register(struct atomic_notifier_head *nh, +@@ -182,12 +198,12 @@ + + /* + * Declared notifiers so far. I can imagine quite a few more chains +- * over time (eg laptop power reset chains, reboot chain (to clean ++ * over time (eg laptop power reset chains, reboot chain (to clean + * device units up), device [un]mount chain, module load/unload chain, +- * low memory chain, screenblank chain (for plug in modular screenblankers) ++ * low memory chain, screenblank chain (for plug in modular screenblankers) + * VC switch chains (for loadable kernel svgalib VC switch helpers) etc... + */ +- ++ + /* CPU notfiers are defined in include/linux/cpu.h. */ + + /* netdevice notifiers are defined in include/linux/netdevice.h */ +diff -Nur linux-4.1.26.orig/include/linux/percpu.h linux-4.1.26/include/linux/percpu.h +--- linux-4.1.26.orig/include/linux/percpu.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/percpu.h 2016-06-19 15:30:58.671296732 +0200 +@@ -24,6 +24,35 @@ + PERCPU_MODULE_RESERVE) + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++#define get_local_var(var) (*({ \ ++ migrate_disable(); \ ++ this_cpu_ptr(&var); })) ++ ++#define put_local_var(var) do { \ ++ (void)&(var); \ ++ migrate_enable(); \ ++} while (0) ++ ++# define get_local_ptr(var) ({ \ ++ migrate_disable(); \ ++ this_cpu_ptr(var); }) ++ ++# define put_local_ptr(var) do { \ ++ (void)(var); \ ++ migrate_enable(); \ ++} while (0) ++ ++#else ++ ++#define get_local_var(var) get_cpu_var(var) ++#define put_local_var(var) put_cpu_var(var) ++#define get_local_ptr(var) get_cpu_ptr(var) ++#define put_local_ptr(var) put_cpu_ptr(var) ++ ++#endif ++ + /* minimum unit size, also is the maximum supported allocation size */ + #define PCPU_MIN_UNIT_SIZE PFN_ALIGN(32 << 10) + +diff -Nur linux-4.1.26.orig/include/linux/pid.h linux-4.1.26/include/linux/pid.h +--- linux-4.1.26.orig/include/linux/pid.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/pid.h 2016-06-19 15:30:58.671296732 +0200 +@@ -2,6 +2,7 @@ + #define _LINUX_PID_H + + #include ++#include + + enum pid_type + { +diff -Nur linux-4.1.26.orig/include/linux/platform_data/gpio-omap.h linux-4.1.26/include/linux/platform_data/gpio-omap.h +--- linux-4.1.26.orig/include/linux/platform_data/gpio-omap.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/platform_data/gpio-omap.h 2016-06-19 15:30:58.671296732 +0200 +@@ -198,7 +198,6 @@ + int bank_width; /* GPIO bank width */ + int bank_stride; /* Only needed for omap1 MPUIO */ + bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ +- bool loses_context; /* whether the bank would ever lose context */ + bool is_mpuio; /* whether the bank is of type MPUIO */ + u32 non_wakeup_gpios; + +@@ -208,9 +207,17 @@ + int (*get_context_loss_count)(struct device *dev); + }; + ++#if IS_BUILTIN(CONFIG_GPIO_OMAP) + extern void omap2_gpio_prepare_for_idle(int off_mode); + extern void omap2_gpio_resume_after_idle(void); +-extern void omap_set_gpio_debounce(int gpio, int enable); +-extern void omap_set_gpio_debounce_time(int gpio, int enable); ++#else ++static inline void omap2_gpio_prepare_for_idle(int off_mode) ++{ ++} ++ ++static inline void omap2_gpio_resume_after_idle(void) ++{ ++} ++#endif + + #endif +diff -Nur linux-4.1.26.orig/include/linux/preempt.h linux-4.1.26/include/linux/preempt.h +--- linux-4.1.26.orig/include/linux/preempt.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/preempt.h 2016-06-19 15:30:58.671296732 +0200 +@@ -34,6 +34,20 @@ + #define preempt_count_inc() preempt_count_add(1) + #define preempt_count_dec() preempt_count_sub(1) + ++#ifdef CONFIG_PREEMPT_LAZY ++#define add_preempt_lazy_count(val) do { preempt_lazy_count() += (val); } while (0) ++#define sub_preempt_lazy_count(val) do { preempt_lazy_count() -= (val); } while (0) ++#define inc_preempt_lazy_count() add_preempt_lazy_count(1) ++#define dec_preempt_lazy_count() sub_preempt_lazy_count(1) ++#define preempt_lazy_count() (current_thread_info()->preempt_lazy_count) ++#else ++#define add_preempt_lazy_count(val) do { } while (0) ++#define sub_preempt_lazy_count(val) do { } while (0) ++#define inc_preempt_lazy_count() do { } while (0) ++#define dec_preempt_lazy_count() do { } while (0) ++#define preempt_lazy_count() (0) ++#endif ++ + #ifdef CONFIG_PREEMPT_COUNT + + #define preempt_disable() \ +@@ -42,13 +56,25 @@ + barrier(); \ + } while (0) + ++#define preempt_lazy_disable() \ ++do { \ ++ inc_preempt_lazy_count(); \ ++ barrier(); \ ++} while (0) ++ + #define sched_preempt_enable_no_resched() \ + do { \ + barrier(); \ + preempt_count_dec(); \ + } while (0) + +-#define preempt_enable_no_resched() sched_preempt_enable_no_resched() ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define preempt_enable_no_resched() sched_preempt_enable_no_resched() ++# define preempt_check_resched_rt() preempt_check_resched() ++#else ++# define preempt_enable_no_resched() preempt_enable() ++# define preempt_check_resched_rt() barrier(); ++#endif + + #ifdef CONFIG_PREEMPT + #define preempt_enable() \ +@@ -64,6 +90,13 @@ + __preempt_schedule(); \ + } while (0) + ++#define preempt_lazy_enable() \ ++do { \ ++ dec_preempt_lazy_count(); \ ++ barrier(); \ ++ preempt_check_resched(); \ ++} while (0) ++ + #else + #define preempt_enable() \ + do { \ +@@ -122,6 +155,7 @@ + #define preempt_disable_notrace() barrier() + #define preempt_enable_no_resched_notrace() barrier() + #define preempt_enable_notrace() barrier() ++#define preempt_check_resched_rt() barrier() + + #endif /* CONFIG_PREEMPT_COUNT */ + +@@ -141,10 +175,31 @@ + } while (0) + #define preempt_fold_need_resched() \ + do { \ +- if (tif_need_resched()) \ ++ if (tif_need_resched_now()) \ + set_preempt_need_resched(); \ + } while (0) + ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define preempt_disable_rt() preempt_disable() ++# define preempt_enable_rt() preempt_enable() ++# define preempt_disable_nort() barrier() ++# define preempt_enable_nort() barrier() ++# ifdef CONFIG_SMP ++ extern void migrate_disable(void); ++ extern void migrate_enable(void); ++# else /* CONFIG_SMP */ ++# define migrate_disable() barrier() ++# define migrate_enable() barrier() ++# endif /* CONFIG_SMP */ ++#else ++# define preempt_disable_rt() barrier() ++# define preempt_enable_rt() barrier() ++# define preempt_disable_nort() preempt_disable() ++# define preempt_enable_nort() preempt_enable() ++# define migrate_disable() preempt_disable() ++# define migrate_enable() preempt_enable() ++#endif ++ + #ifdef CONFIG_PREEMPT_NOTIFIERS + + struct preempt_notifier; +diff -Nur linux-4.1.26.orig/include/linux/preempt_mask.h linux-4.1.26/include/linux/preempt_mask.h +--- linux-4.1.26.orig/include/linux/preempt_mask.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/preempt_mask.h 2016-06-19 15:30:58.671296732 +0200 +@@ -44,16 +44,26 @@ + #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT) + #define NMI_OFFSET (1UL << NMI_SHIFT) + +-#define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) ++#ifndef CONFIG_PREEMPT_RT_FULL ++# define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET) ++#else ++# define SOFTIRQ_DISABLE_OFFSET (0) ++#endif + + #define PREEMPT_ACTIVE_BITS 1 + #define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS) + #define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT) + + #define hardirq_count() (preempt_count() & HARDIRQ_MASK) +-#define softirq_count() (preempt_count() & SOFTIRQ_MASK) + #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \ + | NMI_MASK)) ++#ifndef CONFIG_PREEMPT_RT_FULL ++# define softirq_count() (preempt_count() & SOFTIRQ_MASK) ++# define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) ++#else ++# define softirq_count() (0UL) ++extern int in_serving_softirq(void); ++#endif + + /* + * Are we doing bottom half or hardware interrupt processing? +@@ -64,7 +74,6 @@ + #define in_irq() (hardirq_count()) + #define in_softirq() (softirq_count()) + #define in_interrupt() (irq_count()) +-#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) + + /* + * Are we in NMI context? +@@ -83,7 +92,11 @@ + /* + * The preempt_count offset after spin_lock() + */ ++#if !defined(CONFIG_PREEMPT_RT_FULL) + #define PREEMPT_LOCK_OFFSET PREEMPT_DISABLE_OFFSET ++#else ++#define PREEMPT_LOCK_OFFSET 0 ++#endif + + /* + * The preempt_count offset needed for things like: +diff -Nur linux-4.1.26.orig/include/linux/printk.h linux-4.1.26/include/linux/printk.h +--- linux-4.1.26.orig/include/linux/printk.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/printk.h 2016-06-19 15:30:58.671296732 +0200 +@@ -115,9 +115,11 @@ + #ifdef CONFIG_EARLY_PRINTK + extern asmlinkage __printf(1, 2) + void early_printk(const char *fmt, ...); ++extern void printk_kill(void); + #else + static inline __printf(1, 2) __cold + void early_printk(const char *s, ...) { } ++static inline void printk_kill(void) { } + #endif + + typedef int(*printk_func_t)(const char *fmt, va_list args); +diff -Nur linux-4.1.26.orig/include/linux/radix-tree.h linux-4.1.26/include/linux/radix-tree.h +--- linux-4.1.26.orig/include/linux/radix-tree.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/radix-tree.h 2016-06-19 15:30:58.671296732 +0200 +@@ -277,8 +277,13 @@ + unsigned int radix_tree_gang_lookup_slot(struct radix_tree_root *root, + void ***results, unsigned long *indices, + unsigned long first_index, unsigned int max_items); ++#ifndef CONFIG_PREEMPT_RT_FULL + int radix_tree_preload(gfp_t gfp_mask); + int radix_tree_maybe_preload(gfp_t gfp_mask); ++#else ++static inline int radix_tree_preload(gfp_t gm) { return 0; } ++static inline int radix_tree_maybe_preload(gfp_t gfp_mask) { return 0; } ++#endif + void radix_tree_init(void); + void *radix_tree_tag_set(struct radix_tree_root *root, + unsigned long index, unsigned int tag); +@@ -303,7 +308,7 @@ + + static inline void radix_tree_preload_end(void) + { +- preempt_enable(); ++ preempt_enable_nort(); + } + + /** +diff -Nur linux-4.1.26.orig/include/linux/random.h linux-4.1.26/include/linux/random.h +--- linux-4.1.26.orig/include/linux/random.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/random.h 2016-06-19 15:30:58.671296732 +0200 +@@ -11,7 +11,7 @@ + extern void add_device_randomness(const void *, unsigned int); + extern void add_input_randomness(unsigned int type, unsigned int code, + unsigned int value); +-extern void add_interrupt_randomness(int irq, int irq_flags); ++extern void add_interrupt_randomness(int irq, int irq_flags, __u64 ip); + + extern void get_random_bytes(void *buf, int nbytes); + extern void get_random_bytes_arch(void *buf, int nbytes); +diff -Nur linux-4.1.26.orig/include/linux/rcupdate.h linux-4.1.26/include/linux/rcupdate.h +--- linux-4.1.26.orig/include/linux/rcupdate.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/rcupdate.h 2016-06-19 15:30:58.671296732 +0200 +@@ -167,6 +167,9 @@ + + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + ++#ifdef CONFIG_PREEMPT_RT_FULL ++#define call_rcu_bh call_rcu ++#else + /** + * call_rcu_bh() - Queue an RCU for invocation after a quicker grace period. + * @head: structure to be used for queueing the RCU updates. +@@ -190,6 +193,7 @@ + */ + void call_rcu_bh(struct rcu_head *head, + void (*func)(struct rcu_head *head)); ++#endif + + /** + * call_rcu_sched() - Queue an RCU for invocation after sched grace period. +@@ -260,6 +264,11 @@ + * types of kernel builds, the rcu_read_lock() nesting depth is unknowable. + */ + #define rcu_preempt_depth() (current->rcu_read_lock_nesting) ++#ifndef CONFIG_PREEMPT_RT_FULL ++#define sched_rcu_preempt_depth() rcu_preempt_depth() ++#else ++static inline int sched_rcu_preempt_depth(void) { return 0; } ++#endif + + #else /* #ifdef CONFIG_PREEMPT_RCU */ + +@@ -283,6 +292,8 @@ + return 0; + } + ++#define sched_rcu_preempt_depth() rcu_preempt_depth() ++ + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + + /* Internal to kernel */ +@@ -463,7 +474,14 @@ + int debug_lockdep_rcu_enabled(void); + + int rcu_read_lock_held(void); ++#ifdef CONFIG_PREEMPT_RT_FULL ++static inline int rcu_read_lock_bh_held(void) ++{ ++ return rcu_read_lock_held(); ++} ++#else + int rcu_read_lock_bh_held(void); ++#endif + + /** + * rcu_read_lock_sched_held() - might we be in RCU-sched read-side critical section? +@@ -990,10 +1008,14 @@ + static inline void rcu_read_lock_bh(void) + { + local_bh_disable(); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ rcu_read_lock(); ++#else + __acquire(RCU_BH); + rcu_lock_acquire(&rcu_bh_lock_map); + rcu_lockdep_assert(rcu_is_watching(), + "rcu_read_lock_bh() used illegally while idle"); ++#endif + } + + /* +@@ -1003,10 +1025,14 @@ + */ + static inline void rcu_read_unlock_bh(void) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ rcu_read_unlock(); ++#else + rcu_lockdep_assert(rcu_is_watching(), + "rcu_read_unlock_bh() used illegally while idle"); + rcu_lock_release(&rcu_bh_lock_map); + __release(RCU_BH); ++#endif + local_bh_enable(); + } + +diff -Nur linux-4.1.26.orig/include/linux/rcutree.h linux-4.1.26/include/linux/rcutree.h +--- linux-4.1.26.orig/include/linux/rcutree.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/rcutree.h 2016-06-19 15:30:58.671296732 +0200 +@@ -46,7 +46,11 @@ + rcu_note_context_switch(); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define synchronize_rcu_bh synchronize_rcu ++#else + void synchronize_rcu_bh(void); ++#endif + void synchronize_sched_expedited(void); + void synchronize_rcu_expedited(void); + +@@ -74,7 +78,11 @@ + } + + void rcu_barrier(void); ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define rcu_barrier_bh rcu_barrier ++#else + void rcu_barrier_bh(void); ++#endif + void rcu_barrier_sched(void); + unsigned long get_state_synchronize_rcu(void); + void cond_synchronize_rcu(unsigned long oldstate); +@@ -85,12 +93,10 @@ + unsigned long rcu_batches_started_bh(void); + unsigned long rcu_batches_started_sched(void); + unsigned long rcu_batches_completed(void); +-unsigned long rcu_batches_completed_bh(void); + unsigned long rcu_batches_completed_sched(void); + void show_rcu_gp_kthreads(void); + + void rcu_force_quiescent_state(void); +-void rcu_bh_force_quiescent_state(void); + void rcu_sched_force_quiescent_state(void); + + void exit_rcu(void); +@@ -100,6 +106,14 @@ + + bool rcu_is_watching(void); + ++#ifndef CONFIG_PREEMPT_RT_FULL ++void rcu_bh_force_quiescent_state(void); ++unsigned long rcu_batches_completed_bh(void); ++#else ++# define rcu_bh_force_quiescent_state rcu_force_quiescent_state ++# define rcu_batches_completed_bh rcu_batches_completed ++#endif ++ + void rcu_all_qs(void); + + #endif /* __LINUX_RCUTREE_H */ +diff -Nur linux-4.1.26.orig/include/linux/rtmutex.h linux-4.1.26/include/linux/rtmutex.h +--- linux-4.1.26.orig/include/linux/rtmutex.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/rtmutex.h 2016-06-19 15:30:58.675296887 +0200 +@@ -14,10 +14,14 @@ + + #include + #include +-#include ++#include + + extern int max_lock_depth; /* for sysctl */ + ++#ifdef CONFIG_DEBUG_MUTEXES ++#include ++#endif ++ + /** + * The rt_mutex structure + * +@@ -31,8 +35,8 @@ + struct rb_root waiters; + struct rb_node *waiters_leftmost; + struct task_struct *owner; +-#ifdef CONFIG_DEBUG_RT_MUTEXES + int save_state; ++#ifdef CONFIG_DEBUG_RT_MUTEXES + const char *name, *file; + int line; + void *magic; +@@ -55,22 +59,33 @@ + # define rt_mutex_debug_check_no_locks_held(task) do { } while (0) + #endif + ++# define rt_mutex_init(mutex) \ ++ do { \ ++ raw_spin_lock_init(&(mutex)->wait_lock); \ ++ __rt_mutex_init(mutex, #mutex); \ ++ } while (0) ++ + #ifdef CONFIG_DEBUG_RT_MUTEXES + # define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ + , .name = #mutexname, .file = __FILE__, .line = __LINE__ +-# define rt_mutex_init(mutex) __rt_mutex_init(mutex, __func__) + extern void rt_mutex_debug_task_free(struct task_struct *tsk); + #else + # define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) +-# define rt_mutex_init(mutex) __rt_mutex_init(mutex, NULL) + # define rt_mutex_debug_task_free(t) do { } while (0) + #endif + +-#define __RT_MUTEX_INITIALIZER(mutexname) \ +- { .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ ++#define __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(mutexname.wait_lock) \ + , .waiters = RB_ROOT \ + , .owner = NULL \ +- __DEBUG_RT_MUTEX_INITIALIZER(mutexname)} ++ __DEBUG_RT_MUTEX_INITIALIZER(mutexname) ++ ++#define __RT_MUTEX_INITIALIZER(mutexname) \ ++ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) } ++ ++#define __RT_MUTEX_INITIALIZER_SAVE_STATE(mutexname) \ ++ { __RT_MUTEX_INITIALIZER_PLAIN(mutexname) \ ++ , .save_state = 1 } + + #define DEFINE_RT_MUTEX(mutexname) \ + struct rt_mutex mutexname = __RT_MUTEX_INITIALIZER(mutexname) +@@ -91,6 +106,7 @@ + + extern void rt_mutex_lock(struct rt_mutex *lock); + extern int rt_mutex_lock_interruptible(struct rt_mutex *lock); ++extern int rt_mutex_lock_killable(struct rt_mutex *lock); + extern int rt_mutex_timed_lock(struct rt_mutex *lock, + struct hrtimer_sleeper *timeout); + +diff -Nur linux-4.1.26.orig/include/linux/rwlock_rt.h linux-4.1.26/include/linux/rwlock_rt.h +--- linux-4.1.26.orig/include/linux/rwlock_rt.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/rwlock_rt.h 2016-06-19 15:30:58.675296887 +0200 +@@ -0,0 +1,99 @@ ++#ifndef __LINUX_RWLOCK_RT_H ++#define __LINUX_RWLOCK_RT_H ++ ++#ifndef __LINUX_SPINLOCK_H ++#error Do not include directly. Use spinlock.h ++#endif ++ ++#define rwlock_init(rwl) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(rwl)->lock); \ ++ __rt_rwlock_init(rwl, #rwl, &__key); \ ++} while (0) ++ ++extern void __lockfunc rt_write_lock(rwlock_t *rwlock); ++extern void __lockfunc rt_read_lock(rwlock_t *rwlock); ++extern int __lockfunc rt_write_trylock(rwlock_t *rwlock); ++extern int __lockfunc rt_write_trylock_irqsave(rwlock_t *trylock, unsigned long *flags); ++extern int __lockfunc rt_read_trylock(rwlock_t *rwlock); ++extern void __lockfunc rt_write_unlock(rwlock_t *rwlock); ++extern void __lockfunc rt_read_unlock(rwlock_t *rwlock); ++extern unsigned long __lockfunc rt_write_lock_irqsave(rwlock_t *rwlock); ++extern unsigned long __lockfunc rt_read_lock_irqsave(rwlock_t *rwlock); ++extern void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key); ++ ++#define read_trylock(lock) __cond_lock(lock, rt_read_trylock(lock)) ++#define write_trylock(lock) __cond_lock(lock, rt_write_trylock(lock)) ++ ++#define write_trylock_irqsave(lock, flags) \ ++ __cond_lock(lock, rt_write_trylock_irqsave(lock, &flags)) ++ ++#define read_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = rt_read_lock_irqsave(lock); \ ++ } while (0) ++ ++#define write_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = rt_write_lock_irqsave(lock); \ ++ } while (0) ++ ++#define read_lock(lock) rt_read_lock(lock) ++ ++#define read_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_read_lock(lock); \ ++ } while (0) ++ ++#define read_lock_irq(lock) read_lock(lock) ++ ++#define write_lock(lock) rt_write_lock(lock) ++ ++#define write_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ rt_write_lock(lock); \ ++ } while (0) ++ ++#define write_lock_irq(lock) write_lock(lock) ++ ++#define read_unlock(lock) rt_read_unlock(lock) ++ ++#define read_unlock_bh(lock) \ ++ do { \ ++ rt_read_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define read_unlock_irq(lock) read_unlock(lock) ++ ++#define write_unlock(lock) rt_write_unlock(lock) ++ ++#define write_unlock_bh(lock) \ ++ do { \ ++ rt_write_unlock(lock); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define write_unlock_irq(lock) write_unlock(lock) ++ ++#define read_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ rt_read_unlock(lock); \ ++ } while (0) ++ ++#define write_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ rt_write_unlock(lock); \ ++ } while (0) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/rwlock_types.h linux-4.1.26/include/linux/rwlock_types.h +--- linux-4.1.26.orig/include/linux/rwlock_types.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/rwlock_types.h 2016-06-19 15:30:58.675296887 +0200 +@@ -1,6 +1,10 @@ + #ifndef __LINUX_RWLOCK_TYPES_H + #define __LINUX_RWLOCK_TYPES_H + ++#if !defined(__LINUX_SPINLOCK_TYPES_H) ++# error "Do not include directly, include spinlock_types.h" ++#endif ++ + /* + * include/linux/rwlock_types.h - generic rwlock type definitions + * and initializers +@@ -43,6 +47,7 @@ + RW_DEP_MAP_INIT(lockname) } + #endif + +-#define DEFINE_RWLOCK(x) rwlock_t x = __RW_LOCK_UNLOCKED(x) ++#define DEFINE_RWLOCK(name) \ ++ rwlock_t name __cacheline_aligned_in_smp = __RW_LOCK_UNLOCKED(name) + + #endif /* __LINUX_RWLOCK_TYPES_H */ +diff -Nur linux-4.1.26.orig/include/linux/rwlock_types_rt.h linux-4.1.26/include/linux/rwlock_types_rt.h +--- linux-4.1.26.orig/include/linux/rwlock_types_rt.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/rwlock_types_rt.h 2016-06-19 15:30:58.675296887 +0200 +@@ -0,0 +1,33 @@ ++#ifndef __LINUX_RWLOCK_TYPES_RT_H ++#define __LINUX_RWLOCK_TYPES_RT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++/* ++ * rwlocks - rtmutex which allows single reader recursion ++ */ ++typedef struct { ++ struct rt_mutex lock; ++ int read_depth; ++ unsigned int break_lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} rwlock_t; ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define RW_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } ++#else ++# define RW_DEP_MAP_INIT(lockname) ++#endif ++ ++#define __RW_LOCK_UNLOCKED(name) \ ++ { .lock = __RT_MUTEX_INITIALIZER_SAVE_STATE(name.lock), \ ++ RW_DEP_MAP_INIT(name) } ++ ++#define DEFINE_RWLOCK(name) \ ++ rwlock_t name __cacheline_aligned_in_smp = __RW_LOCK_UNLOCKED(name) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/rwsem.h linux-4.1.26/include/linux/rwsem.h +--- linux-4.1.26.orig/include/linux/rwsem.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/rwsem.h 2016-06-19 15:30:58.675296887 +0200 +@@ -18,6 +18,10 @@ + #include + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++#include ++#else /* PREEMPT_RT_FULL */ ++ + struct rw_semaphore; + + #ifdef CONFIG_RWSEM_GENERIC_SPINLOCK +@@ -177,4 +181,6 @@ + # define up_read_non_owner(sem) up_read(sem) + #endif + ++#endif /* !PREEMPT_RT_FULL */ ++ + #endif /* _LINUX_RWSEM_H */ +diff -Nur linux-4.1.26.orig/include/linux/rwsem_rt.h linux-4.1.26/include/linux/rwsem_rt.h +--- linux-4.1.26.orig/include/linux/rwsem_rt.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/rwsem_rt.h 2016-06-19 15:30:58.675296887 +0200 +@@ -0,0 +1,140 @@ ++#ifndef _LINUX_RWSEM_RT_H ++#define _LINUX_RWSEM_RT_H ++ ++#ifndef _LINUX_RWSEM_H ++#error "Include rwsem.h" ++#endif ++ ++/* ++ * RW-semaphores are a spinlock plus a reader-depth count. ++ * ++ * Note that the semantics are different from the usual ++ * Linux rw-sems, in PREEMPT_RT mode we do not allow ++ * multiple readers to hold the lock at once, we only allow ++ * a read-lock owner to read-lock recursively. This is ++ * better for latency, makes the implementation inherently ++ * fair and makes it simpler as well. ++ */ ++ ++#include ++ ++struct rw_semaphore { ++ struct rt_mutex lock; ++ int read_depth; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++}; ++ ++#define __RWSEM_INITIALIZER(name) \ ++ { .lock = __RT_MUTEX_INITIALIZER(name.lock), \ ++ RW_DEP_MAP_INIT(name) } ++ ++#define DECLARE_RWSEM(lockname) \ ++ struct rw_semaphore lockname = __RWSEM_INITIALIZER(lockname) ++ ++extern void __rt_rwsem_init(struct rw_semaphore *rwsem, const char *name, ++ struct lock_class_key *key); ++ ++#define __rt_init_rwsem(sem, name, key) \ ++ do { \ ++ rt_mutex_init(&(sem)->lock); \ ++ __rt_rwsem_init((sem), (name), (key));\ ++ } while (0) ++ ++#define __init_rwsem(sem, name, key) __rt_init_rwsem(sem, name, key) ++ ++# define rt_init_rwsem(sem) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __rt_init_rwsem((sem), #sem, &__key); \ ++} while (0) ++ ++extern void rt_down_write(struct rw_semaphore *rwsem); ++extern void rt_down_read_nested(struct rw_semaphore *rwsem, int subclass); ++extern void rt_down_write_nested(struct rw_semaphore *rwsem, int subclass); ++extern void rt_down_write_nested_lock(struct rw_semaphore *rwsem, ++ struct lockdep_map *nest); ++extern void rt_down_read(struct rw_semaphore *rwsem); ++extern int rt_down_write_trylock(struct rw_semaphore *rwsem); ++extern int rt_down_read_trylock(struct rw_semaphore *rwsem); ++extern void __rt_up_read(struct rw_semaphore *rwsem); ++extern void rt_up_read(struct rw_semaphore *rwsem); ++extern void rt_up_write(struct rw_semaphore *rwsem); ++extern void rt_downgrade_write(struct rw_semaphore *rwsem); ++ ++#define init_rwsem(sem) rt_init_rwsem(sem) ++#define rwsem_is_locked(s) rt_mutex_is_locked(&(s)->lock) ++ ++static inline int rwsem_is_contended(struct rw_semaphore *sem) ++{ ++ /* rt_mutex_has_waiters() */ ++ return !RB_EMPTY_ROOT(&sem->lock.waiters); ++} ++ ++static inline void down_read(struct rw_semaphore *sem) ++{ ++ rt_down_read(sem); ++} ++ ++static inline int down_read_trylock(struct rw_semaphore *sem) ++{ ++ return rt_down_read_trylock(sem); ++} ++ ++static inline void down_write(struct rw_semaphore *sem) ++{ ++ rt_down_write(sem); ++} ++ ++static inline int down_write_trylock(struct rw_semaphore *sem) ++{ ++ return rt_down_write_trylock(sem); ++} ++ ++static inline void __up_read(struct rw_semaphore *sem) ++{ ++ __rt_up_read(sem); ++} ++ ++static inline void up_read(struct rw_semaphore *sem) ++{ ++ rt_up_read(sem); ++} ++ ++static inline void up_write(struct rw_semaphore *sem) ++{ ++ rt_up_write(sem); ++} ++ ++static inline void downgrade_write(struct rw_semaphore *sem) ++{ ++ rt_downgrade_write(sem); ++} ++ ++static inline void down_read_nested(struct rw_semaphore *sem, int subclass) ++{ ++ return rt_down_read_nested(sem, subclass); ++} ++ ++static inline void down_write_nested(struct rw_semaphore *sem, int subclass) ++{ ++ rt_down_write_nested(sem, subclass); ++} ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++static inline void down_write_nest_lock(struct rw_semaphore *sem, ++ struct rw_semaphore *nest_lock) ++{ ++ rt_down_write_nested_lock(sem, &nest_lock->dep_map); ++} ++ ++#else ++ ++static inline void down_write_nest_lock(struct rw_semaphore *sem, ++ struct rw_semaphore *nest_lock) ++{ ++ rt_down_write_nested_lock(sem, NULL); ++} ++#endif ++#endif +diff -Nur linux-4.1.26.orig/include/linux/sched.h linux-4.1.26/include/linux/sched.h +--- linux-4.1.26.orig/include/linux/sched.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/sched.h 2016-06-19 15:30:58.675296887 +0200 +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -175,8 +176,6 @@ + extern void calc_global_load(unsigned long ticks); + extern void update_cpu_load_nohz(void); + +-extern unsigned long get_parent_ip(unsigned long addr); +- + extern void dump_cpu_task(int cpu); + + struct seq_file; +@@ -234,10 +233,7 @@ + TASK_UNINTERRUPTIBLE | __TASK_STOPPED | \ + __TASK_TRACED | EXIT_ZOMBIE | EXIT_DEAD) + +-#define task_is_traced(task) ((task->state & __TASK_TRACED) != 0) + #define task_is_stopped(task) ((task->state & __TASK_STOPPED) != 0) +-#define task_is_stopped_or_traced(task) \ +- ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0) + #define task_contributes_to_load(task) \ + ((task->state & TASK_UNINTERRUPTIBLE) != 0 && \ + (task->flags & PF_FROZEN) == 0) +@@ -302,6 +298,11 @@ + + #endif + ++#define __set_current_state_no_track(state_value) \ ++ do { current->state = (state_value); } while (0) ++#define set_current_state_no_track(state_value) \ ++ set_mb(current->state, (state_value)) ++ + /* Task command name length */ + #define TASK_COMM_LEN 16 + +@@ -901,6 +902,50 @@ + #define SCHED_CAPACITY_SCALE (1L << SCHED_CAPACITY_SHIFT) + + /* ++ * Wake-queues are lists of tasks with a pending wakeup, whose ++ * callers have already marked the task as woken internally, ++ * and can thus carry on. A common use case is being able to ++ * do the wakeups once the corresponding user lock as been ++ * released. ++ * ++ * We hold reference to each task in the list across the wakeup, ++ * thus guaranteeing that the memory is still valid by the time ++ * the actual wakeups are performed in wake_up_q(). ++ * ++ * One per task suffices, because there's never a need for a task to be ++ * in two wake queues simultaneously; it is forbidden to abandon a task ++ * in a wake queue (a call to wake_up_q() _must_ follow), so if a task is ++ * already in a wake queue, the wakeup will happen soon and the second ++ * waker can just skip it. ++ * ++ * The WAKE_Q macro declares and initializes the list head. ++ * wake_up_q() does NOT reinitialize the list; it's expected to be ++ * called near the end of a function, where the fact that the queue is ++ * not used again will be easy to see by inspection. ++ * ++ * Note that this can cause spurious wakeups. schedule() callers ++ * must ensure the call is done inside a loop, confirming that the ++ * wakeup condition has in fact occurred. ++ */ ++struct wake_q_node { ++ struct wake_q_node *next; ++}; ++ ++struct wake_q_head { ++ struct wake_q_node *first; ++ struct wake_q_node **lastp; ++}; ++ ++#define WAKE_Q_TAIL ((struct wake_q_node *) 0x01) ++ ++#define WAKE_Q(name) \ ++ struct wake_q_head name = { WAKE_Q_TAIL, &name.first } ++ ++extern void wake_q_add(struct wake_q_head *head, ++ struct task_struct *task); ++extern void wake_up_q(struct wake_q_head *head); ++ ++/* + * sched-domains (multiprocessor balancing) declarations: + */ + #ifdef CONFIG_SMP +@@ -1292,6 +1337,7 @@ + + struct task_struct { + volatile long state; /* -1 unrunnable, 0 runnable, >0 stopped */ ++ volatile long saved_state; /* saved state for "spinlock sleepers" */ + void *stack; + atomic_t usage; + unsigned int flags; /* per process flags, defined below */ +@@ -1328,6 +1374,12 @@ + #endif + + unsigned int policy; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ int migrate_disable; ++# ifdef CONFIG_SCHED_DEBUG ++ int migrate_disable_atomic; ++# endif ++#endif + int nr_cpus_allowed; + cpumask_t cpus_allowed; + +@@ -1435,7 +1487,8 @@ + struct cputime prev_cputime; + #endif + #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN +- seqlock_t vtime_seqlock; ++ raw_spinlock_t vtime_lock; ++ seqcount_t vtime_seq; + unsigned long long vtime_snap; + enum { + VTIME_SLEEPING = 0, +@@ -1451,6 +1504,9 @@ + + struct task_cputime cputime_expires; + struct list_head cpu_timers[3]; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct task_struct *posix_timer_list; ++#endif + + /* process credentials */ + const struct cred __rcu *real_cred; /* objective and real subjective task +@@ -1483,10 +1539,15 @@ + /* signal handlers */ + struct signal_struct *signal; + struct sighand_struct *sighand; ++ struct sigqueue *sigqueue_cache; + + sigset_t blocked, real_blocked; + sigset_t saved_sigmask; /* restored if set_restore_sigmask() was used */ + struct sigpending pending; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* TODO: move me into ->restart_block ? */ ++ struct siginfo forced_info; ++#endif + + unsigned long sas_ss_sp; + size_t sas_ss_size; +@@ -1512,6 +1573,8 @@ + /* Protection of the PI data structures: */ + raw_spinlock_t pi_lock; + ++ struct wake_q_node wake_q; ++ + #ifdef CONFIG_RT_MUTEXES + /* PI waiters blocked on a rt_mutex held by this task */ + struct rb_root pi_waiters; +@@ -1706,6 +1769,12 @@ + unsigned long trace; + /* bitmask and counter of trace recursion */ + unsigned long trace_recursion; ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ u64 preempt_timestamp_hist; ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ long timer_offset; ++#endif ++#endif + #endif /* CONFIG_TRACING */ + #ifdef CONFIG_MEMCG + struct memcg_oom_info { +@@ -1722,14 +1791,26 @@ + unsigned int sequential_io; + unsigned int sequential_io_avg; + #endif ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct rcu_head put_rcu; ++ int softirq_nestcnt; ++ unsigned int softirqs_raised; ++#endif ++#ifdef CONFIG_PREEMPT_RT_FULL ++# if defined CONFIG_HIGHMEM || defined CONFIG_X86_32 ++ int kmap_idx; ++ pte_t kmap_pte[KM_TYPE_NR]; ++# endif ++#endif + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + unsigned long task_state_change; + #endif ++#ifdef CONFIG_PREEMPT_RT_FULL ++ int xmit_recursion; ++#endif ++ int pagefault_disabled; + }; + +-/* Future-safe accessor for struct task_struct's cpus_allowed. */ +-#define tsk_cpus_allowed(tsk) (&(tsk)->cpus_allowed) +- + #define TNF_MIGRATED 0x01 + #define TNF_NO_GROUP 0x02 + #define TNF_SHARED 0x04 +@@ -1918,6 +1999,15 @@ + extern void free_task(struct task_struct *tsk); + #define get_task_struct(tsk) do { atomic_inc(&(tsk)->usage); } while(0) + ++#ifdef CONFIG_PREEMPT_RT_BASE ++extern void __put_task_struct_cb(struct rcu_head *rhp); ++ ++static inline void put_task_struct(struct task_struct *t) ++{ ++ if (atomic_dec_and_test(&t->usage)) ++ call_rcu(&t->put_rcu, __put_task_struct_cb); ++} ++#else + extern void __put_task_struct(struct task_struct *t); + + static inline void put_task_struct(struct task_struct *t) +@@ -1925,6 +2015,7 @@ + if (atomic_dec_and_test(&t->usage)) + __put_task_struct(t); + } ++#endif + + #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN + extern void task_cputime(struct task_struct *t, +@@ -1963,6 +2054,7 @@ + /* + * Per process flags + */ ++#define PF_IN_SOFTIRQ 0x00000001 /* Task is serving softirq */ + #define PF_EXITING 0x00000004 /* getting shut down */ + #define PF_EXITPIDONE 0x00000008 /* pi exit done on shut down */ + #define PF_VCPU 0x00000010 /* I'm a virtual CPU */ +@@ -2127,6 +2219,10 @@ + + extern int set_cpus_allowed_ptr(struct task_struct *p, + const struct cpumask *new_mask); ++int migrate_me(void); ++void tell_sched_cpu_down_begin(int cpu); ++void tell_sched_cpu_down_done(int cpu); ++ + #else + static inline void do_set_cpus_allowed(struct task_struct *p, + const struct cpumask *new_mask) +@@ -2139,6 +2235,9 @@ + return -EINVAL; + return 0; + } ++static inline int migrate_me(void) { return 0; } ++static inline void tell_sched_cpu_down_begin(int cpu) { } ++static inline void tell_sched_cpu_down_done(int cpu) { } + #endif + + #ifdef CONFIG_NO_HZ_COMMON +@@ -2355,6 +2454,7 @@ + + extern int wake_up_state(struct task_struct *tsk, unsigned int state); + extern int wake_up_process(struct task_struct *tsk); ++extern int wake_up_lock_sleeper(struct task_struct * tsk); + extern void wake_up_new_task(struct task_struct *tsk); + #ifdef CONFIG_SMP + extern void kick_process(struct task_struct *tsk); +@@ -2471,12 +2571,24 @@ + + /* mmdrop drops the mm and the page tables */ + extern void __mmdrop(struct mm_struct *); ++ + static inline void mmdrop(struct mm_struct * mm) + { + if (unlikely(atomic_dec_and_test(&mm->mm_count))) + __mmdrop(mm); + } + ++#ifdef CONFIG_PREEMPT_RT_BASE ++extern void __mmdrop_delayed(struct rcu_head *rhp); ++static inline void mmdrop_delayed(struct mm_struct *mm) ++{ ++ if (atomic_dec_and_test(&mm->mm_count)) ++ call_rcu(&mm->delayed_drop, __mmdrop_delayed); ++} ++#else ++# define mmdrop_delayed(mm) mmdrop(mm) ++#endif ++ + /* mmput gets rid of the mappings and all user-space */ + extern void mmput(struct mm_struct *); + /* Grab a reference to a task's mm, if it is not already going away */ +@@ -2788,6 +2900,43 @@ + return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED)); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++static inline void set_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ set_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline int test_tsk_need_resched_lazy(struct task_struct *tsk) ++{ ++ return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED_LAZY)); ++} ++ ++static inline int need_resched_lazy(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED_LAZY); ++} ++ ++static inline int need_resched_now(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED); ++} ++ ++#else ++static inline void clear_tsk_need_resched_lazy(struct task_struct *tsk) { } ++static inline int need_resched_lazy(void) { return 0; } ++ ++static inline int need_resched_now(void) ++{ ++ return test_thread_flag(TIF_NEED_RESCHED); ++} ++ ++#endif ++ + static inline int restart_syscall(void) + { + set_tsk_thread_flag(current, TIF_SIGPENDING); +@@ -2819,6 +2968,51 @@ + return (state & TASK_INTERRUPTIBLE) || __fatal_signal_pending(p); + } + ++static inline bool __task_is_stopped_or_traced(struct task_struct *task) ++{ ++ if (task->state & (__TASK_STOPPED | __TASK_TRACED)) ++ return true; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (task->saved_state & (__TASK_STOPPED | __TASK_TRACED)) ++ return true; ++#endif ++ return false; ++} ++ ++static inline bool task_is_stopped_or_traced(struct task_struct *task) ++{ ++ bool traced_stopped; ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ traced_stopped = __task_is_stopped_or_traced(task); ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); ++#else ++ traced_stopped = __task_is_stopped_or_traced(task); ++#endif ++ return traced_stopped; ++} ++ ++static inline bool task_is_traced(struct task_struct *task) ++{ ++ bool traced = false; ++ ++ if (task->state & __TASK_TRACED) ++ return true; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* in case the task is sleeping on tasklist_lock */ ++ raw_spin_lock_irq(&task->pi_lock); ++ if (task->state & __TASK_TRACED) ++ traced = true; ++ else if (task->saved_state & __TASK_TRACED) ++ traced = true; ++ raw_spin_unlock_irq(&task->pi_lock); ++#endif ++ return traced; ++} ++ + /* + * cond_resched() and cond_resched_lock(): latency reduction via + * explicit rescheduling in places that are safe. The return +@@ -2840,12 +3034,16 @@ + __cond_resched_lock(lock); \ + }) + ++#ifndef CONFIG_PREEMPT_RT_FULL + extern int __cond_resched_softirq(void); + + #define cond_resched_softirq() ({ \ + ___might_sleep(__FILE__, __LINE__, SOFTIRQ_DISABLE_OFFSET); \ + __cond_resched_softirq(); \ + }) ++#else ++# define cond_resched_softirq() cond_resched() ++#endif + + static inline void cond_resched_rcu(void) + { +@@ -3012,6 +3210,26 @@ + + #endif /* CONFIG_SMP */ + ++static inline int __migrate_disabled(struct task_struct *p) ++{ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ return p->migrate_disable; ++#else ++ return 0; ++#endif ++} ++ ++/* Future-safe accessor for struct task_struct's cpus_allowed. */ ++static inline const struct cpumask *tsk_cpus_allowed(struct task_struct *p) ++{ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (p->migrate_disable) ++ return cpumask_of(task_cpu(p)); ++#endif ++ ++ return &p->cpus_allowed; ++} ++ + extern long sched_setaffinity(pid_t pid, const struct cpumask *new_mask); + extern long sched_getaffinity(pid_t pid, struct cpumask *mask); + +diff -Nur linux-4.1.26.orig/include/linux/seqlock.h linux-4.1.26/include/linux/seqlock.h +--- linux-4.1.26.orig/include/linux/seqlock.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/seqlock.h 2016-06-19 15:30:58.675296887 +0200 +@@ -219,20 +219,30 @@ + return __read_seqcount_retry(s, start); + } + +- +- +-static inline void raw_write_seqcount_begin(seqcount_t *s) ++static inline void __raw_write_seqcount_begin(seqcount_t *s) + { + s->sequence++; + smp_wmb(); + } + +-static inline void raw_write_seqcount_end(seqcount_t *s) ++static inline void raw_write_seqcount_begin(seqcount_t *s) ++{ ++ preempt_disable_rt(); ++ __raw_write_seqcount_begin(s); ++} ++ ++static inline void __raw_write_seqcount_end(seqcount_t *s) + { + smp_wmb(); + s->sequence++; + } + ++static inline void raw_write_seqcount_end(seqcount_t *s) ++{ ++ __raw_write_seqcount_end(s); ++ preempt_enable_rt(); ++} ++ + /* + * raw_write_seqcount_latch - redirect readers to even/odd copy + * @s: pointer to seqcount_t +@@ -305,10 +315,32 @@ + /* + * Read side functions for starting and finalizing a read side section. + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + static inline unsigned read_seqbegin(const seqlock_t *sl) + { + return read_seqcount_begin(&sl->seqcount); + } ++#else ++/* ++ * Starvation safe read side for RT ++ */ ++static inline unsigned read_seqbegin(seqlock_t *sl) ++{ ++ unsigned ret; ++ ++repeat: ++ ret = ACCESS_ONCE(sl->seqcount.sequence); ++ if (unlikely(ret & 1)) { ++ /* ++ * Take the lock and let the writer proceed (i.e. evtl ++ * boost it), otherwise we could loop here forever. ++ */ ++ spin_unlock_wait(&sl->lock); ++ goto repeat; ++ } ++ return ret; ++} ++#endif + + static inline unsigned read_seqretry(const seqlock_t *sl, unsigned start) + { +@@ -323,36 +355,36 @@ + static inline void write_seqlock(seqlock_t *sl) + { + spin_lock(&sl->lock); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + } + + static inline void write_sequnlock(seqlock_t *sl) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock(&sl->lock); + } + + static inline void write_seqlock_bh(seqlock_t *sl) + { + spin_lock_bh(&sl->lock); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + } + + static inline void write_sequnlock_bh(seqlock_t *sl) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock_bh(&sl->lock); + } + + static inline void write_seqlock_irq(seqlock_t *sl) + { + spin_lock_irq(&sl->lock); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + } + + static inline void write_sequnlock_irq(seqlock_t *sl) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock_irq(&sl->lock); + } + +@@ -361,7 +393,7 @@ + unsigned long flags; + + spin_lock_irqsave(&sl->lock, flags); +- write_seqcount_begin(&sl->seqcount); ++ __raw_write_seqcount_begin(&sl->seqcount); + return flags; + } + +@@ -371,7 +403,7 @@ + static inline void + write_sequnlock_irqrestore(seqlock_t *sl, unsigned long flags) + { +- write_seqcount_end(&sl->seqcount); ++ __raw_write_seqcount_end(&sl->seqcount); + spin_unlock_irqrestore(&sl->lock, flags); + } + +diff -Nur linux-4.1.26.orig/include/linux/signal.h linux-4.1.26/include/linux/signal.h +--- linux-4.1.26.orig/include/linux/signal.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/signal.h 2016-06-19 15:30:58.675296887 +0200 +@@ -233,6 +233,7 @@ + } + + extern void flush_sigqueue(struct sigpending *queue); ++extern void flush_task_sigqueue(struct task_struct *tsk); + + /* Test if 'sig' is valid signal. Use this instead of testing _NSIG directly */ + static inline int valid_signal(unsigned long sig) +diff -Nur linux-4.1.26.orig/include/linux/skbuff.h linux-4.1.26/include/linux/skbuff.h +--- linux-4.1.26.orig/include/linux/skbuff.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/skbuff.h 2016-06-19 15:30:58.675296887 +0200 +@@ -187,6 +187,7 @@ + + __u32 qlen; + spinlock_t lock; ++ raw_spinlock_t raw_lock; + }; + + struct sk_buff; +@@ -1337,6 +1338,12 @@ + __skb_queue_head_init(list); + } + ++static inline void skb_queue_head_init_raw(struct sk_buff_head *list) ++{ ++ raw_spin_lock_init(&list->raw_lock); ++ __skb_queue_head_init(list); ++} ++ + static inline void skb_queue_head_init_class(struct sk_buff_head *list, + struct lock_class_key *class) + { +diff -Nur linux-4.1.26.orig/include/linux/smp.h linux-4.1.26/include/linux/smp.h +--- linux-4.1.26.orig/include/linux/smp.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/smp.h 2016-06-19 15:30:58.675296887 +0200 +@@ -185,6 +185,9 @@ + #define get_cpu() ({ preempt_disable(); smp_processor_id(); }) + #define put_cpu() preempt_enable() + ++#define get_cpu_light() ({ migrate_disable(); smp_processor_id(); }) ++#define put_cpu_light() migrate_enable() ++ + /* + * Callback to arch code if there's nosmp or maxcpus=0 on the + * boot command line: +diff -Nur linux-4.1.26.orig/include/linux/spinlock_api_smp.h linux-4.1.26/include/linux/spinlock_api_smp.h +--- linux-4.1.26.orig/include/linux/spinlock_api_smp.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/spinlock_api_smp.h 2016-06-19 15:30:58.679297041 +0200 +@@ -189,6 +189,8 @@ + return 0; + } + +-#include ++#ifndef CONFIG_PREEMPT_RT_FULL ++# include ++#endif + + #endif /* __LINUX_SPINLOCK_API_SMP_H */ +diff -Nur linux-4.1.26.orig/include/linux/spinlock.h linux-4.1.26/include/linux/spinlock.h +--- linux-4.1.26.orig/include/linux/spinlock.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/spinlock.h 2016-06-19 15:30:58.679297041 +0200 +@@ -281,7 +281,11 @@ + #define raw_spin_can_lock(lock) (!raw_spin_is_locked(lock)) + + /* Include rwlock functions */ +-#include ++#ifdef CONFIG_PREEMPT_RT_FULL ++# include ++#else ++# include ++#endif + + /* + * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: +@@ -292,6 +296,10 @@ + # include + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++# include ++#else /* PREEMPT_RT_FULL */ ++ + /* + * Map the spin_lock functions to the raw variants for PREEMPT_RT=n + */ +@@ -426,4 +434,6 @@ + #define atomic_dec_and_lock(atomic, lock) \ + __cond_lock(lock, _atomic_dec_and_lock(atomic, lock)) + ++#endif /* !PREEMPT_RT_FULL */ ++ + #endif /* __LINUX_SPINLOCK_H */ +diff -Nur linux-4.1.26.orig/include/linux/spinlock_rt.h linux-4.1.26/include/linux/spinlock_rt.h +--- linux-4.1.26.orig/include/linux/spinlock_rt.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/spinlock_rt.h 2016-06-19 15:30:58.679297041 +0200 +@@ -0,0 +1,174 @@ ++#ifndef __LINUX_SPINLOCK_RT_H ++#define __LINUX_SPINLOCK_RT_H ++ ++#ifndef __LINUX_SPINLOCK_H ++#error Do not include directly. Use spinlock.h ++#endif ++ ++#include ++ ++extern void ++__rt_spin_lock_init(spinlock_t *lock, char *name, struct lock_class_key *key); ++ ++#define spin_lock_init(slock) \ ++do { \ ++ static struct lock_class_key __key; \ ++ \ ++ rt_mutex_init(&(slock)->lock); \ ++ __rt_spin_lock_init(slock, #slock, &__key); \ ++} while (0) ++ ++extern void __lockfunc rt_spin_lock(spinlock_t *lock); ++extern unsigned long __lockfunc rt_spin_lock_trace_flags(spinlock_t *lock); ++extern void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass); ++extern void __lockfunc rt_spin_unlock(spinlock_t *lock); ++extern void __lockfunc rt_spin_unlock_wait(spinlock_t *lock); ++extern int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags); ++extern int __lockfunc rt_spin_trylock_bh(spinlock_t *lock); ++extern int __lockfunc rt_spin_trylock(spinlock_t *lock); ++extern int atomic_dec_and_spin_lock(atomic_t *atomic, spinlock_t *lock); ++ ++/* ++ * lockdep-less calls, for derived types like rwlock: ++ * (for trylock they can use rt_mutex_trylock() directly. ++ */ ++extern void __lockfunc __rt_spin_lock(struct rt_mutex *lock); ++extern void __lockfunc __rt_spin_unlock(struct rt_mutex *lock); ++extern int __lockfunc __rt_spin_trylock(struct rt_mutex *lock); ++ ++#define spin_lock(lock) \ ++ do { \ ++ migrate_disable(); \ ++ rt_spin_lock(lock); \ ++ } while (0) ++ ++#define spin_lock_bh(lock) \ ++ do { \ ++ local_bh_disable(); \ ++ migrate_disable(); \ ++ rt_spin_lock(lock); \ ++ } while (0) ++ ++#define spin_lock_irq(lock) spin_lock(lock) ++ ++#define spin_do_trylock(lock) __cond_lock(lock, rt_spin_trylock(lock)) ++ ++#define spin_trylock(lock) \ ++({ \ ++ int __locked; \ ++ migrate_disable(); \ ++ __locked = spin_do_trylock(lock); \ ++ if (!__locked) \ ++ migrate_enable(); \ ++ __locked; \ ++}) ++ ++#ifdef CONFIG_LOCKDEP ++# define spin_lock_nested(lock, subclass) \ ++ do { \ ++ migrate_disable(); \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++ ++#define spin_lock_bh_nested(lock, subclass) \ ++ do { \ ++ local_bh_disable(); \ ++ migrate_disable(); \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++ ++# define spin_lock_irqsave_nested(lock, flags, subclass) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ migrate_disable(); \ ++ rt_spin_lock_nested(lock, subclass); \ ++ } while (0) ++#else ++# define spin_lock_nested(lock, subclass) spin_lock(lock) ++# define spin_lock_bh_nested(lock, subclass) spin_lock_bh(lock) ++ ++# define spin_lock_irqsave_nested(lock, flags, subclass) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ spin_lock(lock); \ ++ } while (0) ++#endif ++ ++#define spin_lock_irqsave(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ flags = 0; \ ++ spin_lock(lock); \ ++ } while (0) ++ ++static inline unsigned long spin_lock_trace_flags(spinlock_t *lock) ++{ ++ unsigned long flags = 0; ++#ifdef CONFIG_TRACE_IRQFLAGS ++ flags = rt_spin_lock_trace_flags(lock); ++#else ++ spin_lock(lock); /* lock_local */ ++#endif ++ return flags; ++} ++ ++/* FIXME: we need rt_spin_lock_nest_lock */ ++#define spin_lock_nest_lock(lock, nest_lock) spin_lock_nested(lock, 0) ++ ++#define spin_unlock(lock) \ ++ do { \ ++ rt_spin_unlock(lock); \ ++ migrate_enable(); \ ++ } while (0) ++ ++#define spin_unlock_bh(lock) \ ++ do { \ ++ rt_spin_unlock(lock); \ ++ migrate_enable(); \ ++ local_bh_enable(); \ ++ } while (0) ++ ++#define spin_unlock_irq(lock) spin_unlock(lock) ++ ++#define spin_unlock_irqrestore(lock, flags) \ ++ do { \ ++ typecheck(unsigned long, flags); \ ++ (void) flags; \ ++ spin_unlock(lock); \ ++ } while (0) ++ ++#define spin_trylock_bh(lock) __cond_lock(lock, rt_spin_trylock_bh(lock)) ++#define spin_trylock_irq(lock) spin_trylock(lock) ++ ++#define spin_trylock_irqsave(lock, flags) \ ++ rt_spin_trylock_irqsave(lock, &(flags)) ++ ++#define spin_unlock_wait(lock) rt_spin_unlock_wait(lock) ++ ++#ifdef CONFIG_GENERIC_LOCKBREAK ++# define spin_is_contended(lock) ((lock)->break_lock) ++#else ++# define spin_is_contended(lock) (((void)(lock), 0)) ++#endif ++ ++static inline int spin_can_lock(spinlock_t *lock) ++{ ++ return !rt_mutex_is_locked(&lock->lock); ++} ++ ++static inline int spin_is_locked(spinlock_t *lock) ++{ ++ return rt_mutex_is_locked(&lock->lock); ++} ++ ++static inline void assert_spin_locked(spinlock_t *lock) ++{ ++ BUG_ON(!spin_is_locked(lock)); ++} ++ ++#define atomic_dec_and_lock(atomic, lock) \ ++ atomic_dec_and_spin_lock(atomic, lock) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/spinlock_types.h linux-4.1.26/include/linux/spinlock_types.h +--- linux-4.1.26.orig/include/linux/spinlock_types.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/spinlock_types.h 2016-06-19 15:30:58.679297041 +0200 +@@ -9,80 +9,15 @@ + * Released under the General Public License (GPL). + */ + +-#if defined(CONFIG_SMP) +-# include +-#else +-# include +-#endif +- +-#include +- +-typedef struct raw_spinlock { +- arch_spinlock_t raw_lock; +-#ifdef CONFIG_GENERIC_LOCKBREAK +- unsigned int break_lock; +-#endif +-#ifdef CONFIG_DEBUG_SPINLOCK +- unsigned int magic, owner_cpu; +- void *owner; +-#endif +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +- struct lockdep_map dep_map; +-#endif +-} raw_spinlock_t; +- +-#define SPINLOCK_MAGIC 0xdead4ead +- +-#define SPINLOCK_OWNER_INIT ((void *)-1L) +- +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define SPIN_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } +-#else +-# define SPIN_DEP_MAP_INIT(lockname) +-#endif ++#include + +-#ifdef CONFIG_DEBUG_SPINLOCK +-# define SPIN_DEBUG_INIT(lockname) \ +- .magic = SPINLOCK_MAGIC, \ +- .owner_cpu = -1, \ +- .owner = SPINLOCK_OWNER_INIT, ++#ifndef CONFIG_PREEMPT_RT_FULL ++# include ++# include + #else +-# define SPIN_DEBUG_INIT(lockname) ++# include ++# include ++# include + #endif + +-#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ +- { \ +- .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ +- SPIN_DEBUG_INIT(lockname) \ +- SPIN_DEP_MAP_INIT(lockname) } +- +-#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ +- (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) +- +-#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) +- +-typedef struct spinlock { +- union { +- struct raw_spinlock rlock; +- +-#ifdef CONFIG_DEBUG_LOCK_ALLOC +-# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) +- struct { +- u8 __padding[LOCK_PADSIZE]; +- struct lockdep_map dep_map; +- }; +-#endif +- }; +-} spinlock_t; +- +-#define __SPIN_LOCK_INITIALIZER(lockname) \ +- { { .rlock = __RAW_SPIN_LOCK_INITIALIZER(lockname) } } +- +-#define __SPIN_LOCK_UNLOCKED(lockname) \ +- (spinlock_t ) __SPIN_LOCK_INITIALIZER(lockname) +- +-#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) +- +-#include +- + #endif /* __LINUX_SPINLOCK_TYPES_H */ +diff -Nur linux-4.1.26.orig/include/linux/spinlock_types_nort.h linux-4.1.26/include/linux/spinlock_types_nort.h +--- linux-4.1.26.orig/include/linux/spinlock_types_nort.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/spinlock_types_nort.h 2016-06-19 15:30:58.679297041 +0200 +@@ -0,0 +1,33 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_NORT_H ++#define __LINUX_SPINLOCK_TYPES_NORT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++/* ++ * The non RT version maps spinlocks to raw_spinlocks ++ */ ++typedef struct spinlock { ++ union { ++ struct raw_spinlock rlock; ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define LOCK_PADSIZE (offsetof(struct raw_spinlock, dep_map)) ++ struct { ++ u8 __padding[LOCK_PADSIZE]; ++ struct lockdep_map dep_map; ++ }; ++#endif ++ }; ++} spinlock_t; ++ ++#define __SPIN_LOCK_INITIALIZER(lockname) \ ++ { { .rlock = __RAW_SPIN_LOCK_INITIALIZER(lockname) } } ++ ++#define __SPIN_LOCK_UNLOCKED(lockname) \ ++ (spinlock_t ) __SPIN_LOCK_INITIALIZER(lockname) ++ ++#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/spinlock_types_raw.h linux-4.1.26/include/linux/spinlock_types_raw.h +--- linux-4.1.26.orig/include/linux/spinlock_types_raw.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/spinlock_types_raw.h 2016-06-19 15:30:58.679297041 +0200 +@@ -0,0 +1,56 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_RAW_H ++#define __LINUX_SPINLOCK_TYPES_RAW_H ++ ++#if defined(CONFIG_SMP) ++# include ++#else ++# include ++#endif ++ ++#include ++ ++typedef struct raw_spinlock { ++ arch_spinlock_t raw_lock; ++#ifdef CONFIG_GENERIC_LOCKBREAK ++ unsigned int break_lock; ++#endif ++#ifdef CONFIG_DEBUG_SPINLOCK ++ unsigned int magic, owner_cpu; ++ void *owner; ++#endif ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} raw_spinlock_t; ++ ++#define SPINLOCK_MAGIC 0xdead4ead ++ ++#define SPINLOCK_OWNER_INIT ((void *)-1L) ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++# define SPIN_DEP_MAP_INIT(lockname) .dep_map = { .name = #lockname } ++#else ++# define SPIN_DEP_MAP_INIT(lockname) ++#endif ++ ++#ifdef CONFIG_DEBUG_SPINLOCK ++# define SPIN_DEBUG_INIT(lockname) \ ++ .magic = SPINLOCK_MAGIC, \ ++ .owner_cpu = -1, \ ++ .owner = SPINLOCK_OWNER_INIT, ++#else ++# define SPIN_DEBUG_INIT(lockname) ++#endif ++ ++#define __RAW_SPIN_LOCK_INITIALIZER(lockname) \ ++ { \ ++ .raw_lock = __ARCH_SPIN_LOCK_UNLOCKED, \ ++ SPIN_DEBUG_INIT(lockname) \ ++ SPIN_DEP_MAP_INIT(lockname) } ++ ++#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ ++ (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) ++ ++#define DEFINE_RAW_SPINLOCK(x) raw_spinlock_t x = __RAW_SPIN_LOCK_UNLOCKED(x) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/spinlock_types_rt.h linux-4.1.26/include/linux/spinlock_types_rt.h +--- linux-4.1.26.orig/include/linux/spinlock_types_rt.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/spinlock_types_rt.h 2016-06-19 15:30:58.679297041 +0200 +@@ -0,0 +1,51 @@ ++#ifndef __LINUX_SPINLOCK_TYPES_RT_H ++#define __LINUX_SPINLOCK_TYPES_RT_H ++ ++#ifndef __LINUX_SPINLOCK_TYPES_H ++#error "Do not include directly. Include spinlock_types.h instead" ++#endif ++ ++#include ++ ++/* ++ * PREEMPT_RT: spinlocks - an RT mutex plus lock-break field: ++ */ ++typedef struct spinlock { ++ struct rt_mutex lock; ++ unsigned int break_lock; ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ struct lockdep_map dep_map; ++#endif ++} spinlock_t; ++ ++#ifdef CONFIG_DEBUG_RT_MUTEXES ++# define __RT_SPIN_INITIALIZER(name) \ ++ { \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ ++ .save_state = 1, \ ++ .file = __FILE__, \ ++ .line = __LINE__ , \ ++ } ++#else ++# define __RT_SPIN_INITIALIZER(name) \ ++ { \ ++ .wait_lock = __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), \ ++ .save_state = 1, \ ++ } ++#endif ++ ++/* ++.wait_list = PLIST_HEAD_INIT_RAW((name).lock.wait_list, (name).lock.wait_lock) ++*/ ++ ++#define __SPIN_LOCK_UNLOCKED(name) \ ++ { .lock = __RT_SPIN_INITIALIZER(name.lock), \ ++ SPIN_DEP_MAP_INIT(name) } ++ ++#define __DEFINE_SPINLOCK(name) \ ++ spinlock_t name = __SPIN_LOCK_UNLOCKED(name) ++ ++#define DEFINE_SPINLOCK(name) \ ++ spinlock_t name __cacheline_aligned_in_smp = __SPIN_LOCK_UNLOCKED(name) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/srcu.h linux-4.1.26/include/linux/srcu.h +--- linux-4.1.26.orig/include/linux/srcu.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/srcu.h 2016-06-19 15:30:58.679297041 +0200 +@@ -84,10 +84,10 @@ + + void process_srcu(struct work_struct *work); + +-#define __SRCU_STRUCT_INIT(name) \ ++#define __SRCU_STRUCT_INIT(name, pcpu_name) \ + { \ + .completed = -300, \ +- .per_cpu_ref = &name##_srcu_array, \ ++ .per_cpu_ref = &pcpu_name, \ + .queue_lock = __SPIN_LOCK_UNLOCKED(name.queue_lock), \ + .running = false, \ + .batch_queue = RCU_BATCH_INIT(name.batch_queue), \ +@@ -104,7 +104,7 @@ + */ + #define __DEFINE_SRCU(name, is_static) \ + static DEFINE_PER_CPU(struct srcu_struct_array, name##_srcu_array);\ +- is_static struct srcu_struct name = __SRCU_STRUCT_INIT(name) ++ is_static struct srcu_struct name = __SRCU_STRUCT_INIT(name, name##_srcu_array) + #define DEFINE_SRCU(name) __DEFINE_SRCU(name, /* not static */) + #define DEFINE_STATIC_SRCU(name) __DEFINE_SRCU(name, static) + +diff -Nur linux-4.1.26.orig/include/linux/swap.h linux-4.1.26/include/linux/swap.h +--- linux-4.1.26.orig/include/linux/swap.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/swap.h 2016-06-19 15:30:58.679297041 +0200 +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + + struct notifier_block; +@@ -252,7 +253,8 @@ + void *workingset_eviction(struct address_space *mapping, struct page *page); + bool workingset_refault(void *shadow); + void workingset_activation(struct page *page); +-extern struct list_lru workingset_shadow_nodes; ++extern struct list_lru __workingset_shadow_nodes; ++DECLARE_LOCAL_IRQ_LOCK(workingset_shadow_lock); + + static inline unsigned int workingset_node_pages(struct radix_tree_node *node) + { +@@ -296,6 +298,7 @@ + + + /* linux/mm/swap.c */ ++DECLARE_LOCAL_IRQ_LOCK(swapvec_lock); + extern void lru_cache_add(struct page *); + extern void lru_cache_add_anon(struct page *page); + extern void lru_cache_add_file(struct page *page); +diff -Nur linux-4.1.26.orig/include/linux/thread_info.h linux-4.1.26/include/linux/thread_info.h +--- linux-4.1.26.orig/include/linux/thread_info.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/thread_info.h 2016-06-19 15:30:58.679297041 +0200 +@@ -102,7 +102,17 @@ + #define test_thread_flag(flag) \ + test_ti_thread_flag(current_thread_info(), flag) + +-#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) ++#ifdef CONFIG_PREEMPT_LAZY ++#define tif_need_resched() (test_thread_flag(TIF_NEED_RESCHED) || \ ++ test_thread_flag(TIF_NEED_RESCHED_LAZY)) ++#define tif_need_resched_now() (test_thread_flag(TIF_NEED_RESCHED)) ++#define tif_need_resched_lazy() test_thread_flag(TIF_NEED_RESCHED_LAZY)) ++ ++#else ++#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED) ++#define tif_need_resched_now() test_thread_flag(TIF_NEED_RESCHED) ++#define tif_need_resched_lazy() 0 ++#endif + + #if defined TIF_RESTORE_SIGMASK && !defined HAVE_SET_RESTORE_SIGMASK + /* +diff -Nur linux-4.1.26.orig/include/linux/timer.h linux-4.1.26/include/linux/timer.h +--- linux-4.1.26.orig/include/linux/timer.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/timer.h 2016-06-19 15:30:58.679297041 +0200 +@@ -241,7 +241,7 @@ + + extern int try_to_del_timer_sync(struct timer_list *timer); + +-#ifdef CONFIG_SMP ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) + extern int del_timer_sync(struct timer_list *timer); + #else + # define del_timer_sync(t) del_timer(t) +diff -Nur linux-4.1.26.orig/include/linux/uaccess.h linux-4.1.26/include/linux/uaccess.h +--- linux-4.1.26.orig/include/linux/uaccess.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/uaccess.h 2016-06-19 15:30:58.679297041 +0200 +@@ -1,21 +1,31 @@ + #ifndef __LINUX_UACCESS_H__ + #define __LINUX_UACCESS_H__ + +-#include ++#include + #include + ++static __always_inline void pagefault_disabled_inc(void) ++{ ++ current->pagefault_disabled++; ++} ++ ++static __always_inline void pagefault_disabled_dec(void) ++{ ++ current->pagefault_disabled--; ++ WARN_ON(current->pagefault_disabled < 0); ++} ++ + /* +- * These routines enable/disable the pagefault handler in that +- * it will not take any locks and go straight to the fixup table. ++ * These routines enable/disable the pagefault handler. If disabled, it will ++ * not take any locks and go straight to the fixup table. + * +- * They have great resemblance to the preempt_disable/enable calls +- * and in fact they are identical; this is because currently there is +- * no other way to make the pagefault handlers do this. So we do +- * disable preemption but we don't necessarily care about that. ++ * User access methods will not sleep when called from a pagefault_disabled() ++ * environment. + */ + static inline void pagefault_disable(void) + { +- preempt_count_inc(); ++ migrate_disable(); ++ pagefault_disabled_inc(); + /* + * make sure to have issued the store before a pagefault + * can hit. +@@ -25,18 +35,32 @@ + + static inline void pagefault_enable(void) + { +-#ifndef CONFIG_PREEMPT + /* + * make sure to issue those last loads/stores before enabling + * the pagefault handler again. + */ + barrier(); +- preempt_count_dec(); +-#else +- preempt_enable(); +-#endif ++ pagefault_disabled_dec(); ++ migrate_enable(); + } + ++/* ++ * Is the pagefault handler disabled? If so, user access methods will not sleep. ++ */ ++#define pagefault_disabled() (current->pagefault_disabled != 0) ++ ++/* ++ * The pagefault handler is in general disabled by pagefault_disable() or ++ * when in irq context (via in_atomic()). ++ * ++ * This function should only be used by the fault handlers. Other users should ++ * stick to pagefault_disabled(). ++ * Please NEVER use preempt_disable() to disable the fault handler. With ++ * !CONFIG_PREEMPT_COUNT, this is like a NOP. So the handler won't be disabled. ++ * in_atomic() will report different values based on !CONFIG_PREEMPT_COUNT. ++ */ ++#define faulthandler_disabled() (pagefault_disabled() || in_atomic()) ++ + #ifndef ARCH_HAS_NOCACHE_UACCESS + + static inline unsigned long __copy_from_user_inatomic_nocache(void *to, +diff -Nur linux-4.1.26.orig/include/linux/uprobes.h linux-4.1.26/include/linux/uprobes.h +--- linux-4.1.26.orig/include/linux/uprobes.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/uprobes.h 2016-06-19 15:30:58.679297041 +0200 +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + struct vm_area_struct; + struct mm_struct; +diff -Nur linux-4.1.26.orig/include/linux/vmstat.h linux-4.1.26/include/linux/vmstat.h +--- linux-4.1.26.orig/include/linux/vmstat.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/vmstat.h 2016-06-19 15:30:58.679297041 +0200 +@@ -33,7 +33,9 @@ + */ + static inline void __count_vm_event(enum vm_event_item item) + { ++ preempt_disable_rt(); + raw_cpu_inc(vm_event_states.event[item]); ++ preempt_enable_rt(); + } + + static inline void count_vm_event(enum vm_event_item item) +@@ -43,7 +45,9 @@ + + static inline void __count_vm_events(enum vm_event_item item, long delta) + { ++ preempt_disable_rt(); + raw_cpu_add(vm_event_states.event[item], delta); ++ preempt_enable_rt(); + } + + static inline void count_vm_events(enum vm_event_item item, long delta) +diff -Nur linux-4.1.26.orig/include/linux/wait.h linux-4.1.26/include/linux/wait.h +--- linux-4.1.26.orig/include/linux/wait.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/linux/wait.h 2016-06-19 15:30:58.679297041 +0200 +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + + typedef struct __wait_queue wait_queue_t; + typedef int (*wait_queue_func_t)(wait_queue_t *wait, unsigned mode, int flags, void *key); +diff -Nur linux-4.1.26.orig/include/linux/wait-simple.h linux-4.1.26/include/linux/wait-simple.h +--- linux-4.1.26.orig/include/linux/wait-simple.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/wait-simple.h 2016-06-19 15:30:58.679297041 +0200 +@@ -0,0 +1,207 @@ ++#ifndef _LINUX_WAIT_SIMPLE_H ++#define _LINUX_WAIT_SIMPLE_H ++ ++#include ++#include ++ ++#include ++ ++struct swaiter { ++ struct task_struct *task; ++ struct list_head node; ++}; ++ ++#define DEFINE_SWAITER(name) \ ++ struct swaiter name = { \ ++ .task = current, \ ++ .node = LIST_HEAD_INIT((name).node), \ ++ } ++ ++struct swait_head { ++ raw_spinlock_t lock; ++ struct list_head list; ++}; ++ ++#define SWAIT_HEAD_INITIALIZER(name) { \ ++ .lock = __RAW_SPIN_LOCK_UNLOCKED(name.lock), \ ++ .list = LIST_HEAD_INIT((name).list), \ ++ } ++ ++#define DEFINE_SWAIT_HEAD(name) \ ++ struct swait_head name = SWAIT_HEAD_INITIALIZER(name) ++ ++extern void __init_swait_head(struct swait_head *h, struct lock_class_key *key); ++ ++#define init_swait_head(swh) \ ++ do { \ ++ static struct lock_class_key __key; \ ++ \ ++ __init_swait_head((swh), &__key); \ ++ } while (0) ++ ++/* ++ * Waiter functions ++ */ ++extern void swait_prepare_locked(struct swait_head *head, struct swaiter *w); ++extern void swait_prepare(struct swait_head *head, struct swaiter *w, int state); ++extern void swait_finish_locked(struct swait_head *head, struct swaiter *w); ++extern void swait_finish(struct swait_head *head, struct swaiter *w); ++ ++/* Check whether a head has waiters enqueued */ ++static inline bool swaitqueue_active(struct swait_head *h) ++{ ++ /* Make sure the condition is visible before checking list_empty() */ ++ smp_mb(); ++ return !list_empty(&h->list); ++} ++ ++/* ++ * Wakeup functions ++ */ ++extern unsigned int __swait_wake(struct swait_head *head, unsigned int state, unsigned int num); ++extern unsigned int __swait_wake_locked(struct swait_head *head, unsigned int state, unsigned int num); ++ ++#define swait_wake(head) __swait_wake(head, TASK_NORMAL, 1) ++#define swait_wake_interruptible(head) __swait_wake(head, TASK_INTERRUPTIBLE, 1) ++#define swait_wake_all(head) __swait_wake(head, TASK_NORMAL, 0) ++#define swait_wake_all_interruptible(head) __swait_wake(head, TASK_INTERRUPTIBLE, 0) ++ ++/* ++ * Event API ++ */ ++#define __swait_event(wq, condition) \ ++do { \ ++ DEFINE_SWAITER(__wait); \ ++ \ ++ for (;;) { \ ++ swait_prepare(&wq, &__wait, TASK_UNINTERRUPTIBLE); \ ++ if (condition) \ ++ break; \ ++ schedule(); \ ++ } \ ++ swait_finish(&wq, &__wait); \ ++} while (0) ++ ++/** ++ * swait_event - sleep until a condition gets true ++ * @wq: the waitqueue to wait on ++ * @condition: a C expression for the event to wait for ++ * ++ * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the ++ * @condition evaluates to true. The @condition is checked each time ++ * the waitqueue @wq is woken up. ++ * ++ * wake_up() has to be called after changing any variable that could ++ * change the result of the wait condition. ++ */ ++#define swait_event(wq, condition) \ ++do { \ ++ if (condition) \ ++ break; \ ++ __swait_event(wq, condition); \ ++} while (0) ++ ++#define __swait_event_interruptible(wq, condition, ret) \ ++do { \ ++ DEFINE_SWAITER(__wait); \ ++ \ ++ for (;;) { \ ++ swait_prepare(&wq, &__wait, TASK_INTERRUPTIBLE); \ ++ if (condition) \ ++ break; \ ++ if (signal_pending(current)) { \ ++ ret = -ERESTARTSYS; \ ++ break; \ ++ } \ ++ schedule(); \ ++ } \ ++ swait_finish(&wq, &__wait); \ ++} while (0) ++ ++#define __swait_event_interruptible_timeout(wq, condition, ret) \ ++do { \ ++ DEFINE_SWAITER(__wait); \ ++ \ ++ for (;;) { \ ++ swait_prepare(&wq, &__wait, TASK_INTERRUPTIBLE); \ ++ if (condition) \ ++ break; \ ++ if (signal_pending(current)) { \ ++ ret = -ERESTARTSYS; \ ++ break; \ ++ } \ ++ ret = schedule_timeout(ret); \ ++ if (!ret) \ ++ break; \ ++ } \ ++ swait_finish(&wq, &__wait); \ ++} while (0) ++ ++/** ++ * swait_event_interruptible - sleep until a condition gets true ++ * @wq: the waitqueue to wait on ++ * @condition: a C expression for the event to wait for ++ * ++ * The process is put to sleep (TASK_INTERRUPTIBLE) until the ++ * @condition evaluates to true. The @condition is checked each time ++ * the waitqueue @wq is woken up. ++ * ++ * wake_up() has to be called after changing any variable that could ++ * change the result of the wait condition. ++ */ ++#define swait_event_interruptible(wq, condition) \ ++({ \ ++ int __ret = 0; \ ++ if (!(condition)) \ ++ __swait_event_interruptible(wq, condition, __ret); \ ++ __ret; \ ++}) ++ ++#define swait_event_interruptible_timeout(wq, condition, timeout) \ ++({ \ ++ int __ret = timeout; \ ++ if (!(condition)) \ ++ __swait_event_interruptible_timeout(wq, condition, __ret); \ ++ __ret; \ ++}) ++ ++#define __swait_event_timeout(wq, condition, ret) \ ++do { \ ++ DEFINE_SWAITER(__wait); \ ++ \ ++ for (;;) { \ ++ swait_prepare(&wq, &__wait, TASK_UNINTERRUPTIBLE); \ ++ if (condition) \ ++ break; \ ++ ret = schedule_timeout(ret); \ ++ if (!ret) \ ++ break; \ ++ } \ ++ swait_finish(&wq, &__wait); \ ++} while (0) ++ ++/** ++ * swait_event_timeout - sleep until a condition gets true or a timeout elapses ++ * @wq: the waitqueue to wait on ++ * @condition: a C expression for the event to wait for ++ * @timeout: timeout, in jiffies ++ * ++ * The process is put to sleep (TASK_UNINTERRUPTIBLE) until the ++ * @condition evaluates to true. The @condition is checked each time ++ * the waitqueue @wq is woken up. ++ * ++ * wake_up() has to be called after changing any variable that could ++ * change the result of the wait condition. ++ * ++ * The function returns 0 if the @timeout elapsed, and the remaining ++ * jiffies if the condition evaluated to true before the timeout elapsed. ++ */ ++#define swait_event_timeout(wq, condition, timeout) \ ++({ \ ++ long __ret = timeout; \ ++ if (!(condition)) \ ++ __swait_event_timeout(wq, condition, __ret); \ ++ __ret; \ ++}) ++ ++#endif +diff -Nur linux-4.1.26.orig/include/linux/work-simple.h linux-4.1.26/include/linux/work-simple.h +--- linux-4.1.26.orig/include/linux/work-simple.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/linux/work-simple.h 2016-06-19 15:30:58.679297041 +0200 +@@ -0,0 +1,24 @@ ++#ifndef _LINUX_SWORK_H ++#define _LINUX_SWORK_H ++ ++#include ++ ++struct swork_event { ++ struct list_head item; ++ unsigned long flags; ++ void (*func)(struct swork_event *); ++}; ++ ++static inline void INIT_SWORK(struct swork_event *event, ++ void (*func)(struct swork_event *)) ++{ ++ event->flags = 0; ++ event->func = func; ++} ++ ++bool swork_queue(struct swork_event *sev); ++ ++int swork_get(void); ++void swork_put(void); ++ ++#endif /* _LINUX_SWORK_H */ +diff -Nur linux-4.1.26.orig/include/net/dst.h linux-4.1.26/include/net/dst.h +--- linux-4.1.26.orig/include/net/dst.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/net/dst.h 2016-06-19 15:30:58.679297041 +0200 +@@ -436,7 +436,7 @@ + static inline int dst_neigh_output(struct dst_entry *dst, struct neighbour *n, + struct sk_buff *skb) + { +- const struct hh_cache *hh; ++ struct hh_cache *hh; + + if (dst->pending_confirm) { + unsigned long now = jiffies; +diff -Nur linux-4.1.26.orig/include/net/neighbour.h linux-4.1.26/include/net/neighbour.h +--- linux-4.1.26.orig/include/net/neighbour.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/net/neighbour.h 2016-06-19 15:30:58.679297041 +0200 +@@ -445,7 +445,7 @@ + } + #endif + +-static inline int neigh_hh_output(const struct hh_cache *hh, struct sk_buff *skb) ++static inline int neigh_hh_output(struct hh_cache *hh, struct sk_buff *skb) + { + unsigned int seq; + int hh_len; +@@ -500,7 +500,7 @@ + + #define NEIGH_CB(skb) ((struct neighbour_cb *)(skb)->cb) + +-static inline void neigh_ha_snapshot(char *dst, const struct neighbour *n, ++static inline void neigh_ha_snapshot(char *dst, struct neighbour *n, + const struct net_device *dev) + { + unsigned int seq; +diff -Nur linux-4.1.26.orig/include/net/netns/ipv4.h linux-4.1.26/include/net/netns/ipv4.h +--- linux-4.1.26.orig/include/net/netns/ipv4.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/net/netns/ipv4.h 2016-06-19 15:30:58.683297195 +0200 +@@ -69,6 +69,7 @@ + + int sysctl_icmp_echo_ignore_all; + int sysctl_icmp_echo_ignore_broadcasts; ++ int sysctl_icmp_echo_sysrq; + int sysctl_icmp_ignore_bogus_error_responses; + int sysctl_icmp_ratelimit; + int sysctl_icmp_ratemask; +diff -Nur linux-4.1.26.orig/include/trace/events/hist.h linux-4.1.26/include/trace/events/hist.h +--- linux-4.1.26.orig/include/trace/events/hist.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/trace/events/hist.h 2016-06-19 15:30:58.683297195 +0200 +@@ -0,0 +1,74 @@ ++#undef TRACE_SYSTEM ++#define TRACE_SYSTEM hist ++ ++#if !defined(_TRACE_HIST_H) || defined(TRACE_HEADER_MULTI_READ) ++#define _TRACE_HIST_H ++ ++#include "latency_hist.h" ++#include ++ ++#if !defined(CONFIG_PREEMPT_OFF_HIST) && !defined(CONFIG_INTERRUPT_OFF_HIST) ++#define trace_preemptirqsoff_hist(a, b) ++#define trace_preemptirqsoff_hist_rcuidle(a, b) ++#else ++TRACE_EVENT(preemptirqsoff_hist, ++ ++ TP_PROTO(int reason, int starthist), ++ ++ TP_ARGS(reason, starthist), ++ ++ TP_STRUCT__entry( ++ __field(int, reason) ++ __field(int, starthist) ++ ), ++ ++ TP_fast_assign( ++ __entry->reason = reason; ++ __entry->starthist = starthist; ++ ), ++ ++ TP_printk("reason=%s starthist=%s", getaction(__entry->reason), ++ __entry->starthist ? "start" : "stop") ++); ++#endif ++ ++#ifndef CONFIG_MISSED_TIMER_OFFSETS_HIST ++#define trace_hrtimer_interrupt(a, b, c, d) ++#define trace_hrtimer_interrupt_rcuidle(a, b, c, d) ++#else ++TRACE_EVENT(hrtimer_interrupt, ++ ++ TP_PROTO(int cpu, long long offset, struct task_struct *curr, ++ struct task_struct *task), ++ ++ TP_ARGS(cpu, offset, curr, task), ++ ++ TP_STRUCT__entry( ++ __field(int, cpu) ++ __field(long long, offset) ++ __array(char, ccomm, TASK_COMM_LEN) ++ __field(int, cprio) ++ __array(char, tcomm, TASK_COMM_LEN) ++ __field(int, tprio) ++ ), ++ ++ TP_fast_assign( ++ __entry->cpu = cpu; ++ __entry->offset = offset; ++ memcpy(__entry->ccomm, curr->comm, TASK_COMM_LEN); ++ __entry->cprio = curr->prio; ++ memcpy(__entry->tcomm, task != NULL ? task->comm : "", ++ task != NULL ? TASK_COMM_LEN : 7); ++ __entry->tprio = task != NULL ? task->prio : -1; ++ ), ++ ++ TP_printk("cpu=%d offset=%lld curr=%s[%d] thread=%s[%d]", ++ __entry->cpu, __entry->offset, __entry->ccomm, ++ __entry->cprio, __entry->tcomm, __entry->tprio) ++); ++#endif ++ ++#endif /* _TRACE_HIST_H */ ++ ++/* This part must be outside protection */ ++#include +diff -Nur linux-4.1.26.orig/include/trace/events/latency_hist.h linux-4.1.26/include/trace/events/latency_hist.h +--- linux-4.1.26.orig/include/trace/events/latency_hist.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/include/trace/events/latency_hist.h 2016-06-19 15:30:58.683297195 +0200 +@@ -0,0 +1,29 @@ ++#ifndef _LATENCY_HIST_H ++#define _LATENCY_HIST_H ++ ++enum hist_action { ++ IRQS_ON, ++ PREEMPT_ON, ++ TRACE_STOP, ++ IRQS_OFF, ++ PREEMPT_OFF, ++ TRACE_START, ++}; ++ ++static char *actions[] = { ++ "IRQS_ON", ++ "PREEMPT_ON", ++ "TRACE_STOP", ++ "IRQS_OFF", ++ "PREEMPT_OFF", ++ "TRACE_START", ++}; ++ ++static inline char *getaction(int action) ++{ ++ if (action >= 0 && action <= sizeof(actions)/sizeof(actions[0])) ++ return actions[action]; ++ return "unknown"; ++} ++ ++#endif /* _LATENCY_HIST_H */ +diff -Nur linux-4.1.26.orig/include/trace/events/sched.h linux-4.1.26/include/trace/events/sched.h +--- linux-4.1.26.orig/include/trace/events/sched.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/include/trace/events/sched.h 2016-06-19 15:30:58.683297195 +0200 +@@ -55,9 +55,9 @@ + */ + DECLARE_EVENT_CLASS(sched_wakeup_template, + +- TP_PROTO(struct task_struct *p, int success), ++ TP_PROTO(struct task_struct *p), + +- TP_ARGS(__perf_task(p), success), ++ TP_ARGS(__perf_task(p)), + + TP_STRUCT__entry( + __array( char, comm, TASK_COMM_LEN ) +@@ -71,25 +71,37 @@ + memcpy(__entry->comm, p->comm, TASK_COMM_LEN); + __entry->pid = p->pid; + __entry->prio = p->prio; +- __entry->success = success; ++ __entry->success = 1; /* rudiment, kill when possible */ + __entry->target_cpu = task_cpu(p); + ), + +- TP_printk("comm=%s pid=%d prio=%d success=%d target_cpu=%03d", ++ TP_printk("comm=%s pid=%d prio=%d target_cpu=%03d", + __entry->comm, __entry->pid, __entry->prio, +- __entry->success, __entry->target_cpu) ++ __entry->target_cpu) + ); + ++/* ++ * Tracepoint called when waking a task; this tracepoint is guaranteed to be ++ * called from the waking context. ++ */ ++DEFINE_EVENT(sched_wakeup_template, sched_waking, ++ TP_PROTO(struct task_struct *p), ++ TP_ARGS(p)); ++ ++/* ++ * Tracepoint called when the task is actually woken; p->state == TASK_RUNNNG. ++ * It it not always called from the waking context. ++ */ + DEFINE_EVENT(sched_wakeup_template, sched_wakeup, +- TP_PROTO(struct task_struct *p, int success), +- TP_ARGS(p, success)); ++ TP_PROTO(struct task_struct *p), ++ TP_ARGS(p)); + + /* + * Tracepoint for waking up a new task: + */ + DEFINE_EVENT(sched_wakeup_template, sched_wakeup_new, +- TP_PROTO(struct task_struct *p, int success), +- TP_ARGS(p, success)); ++ TP_PROTO(struct task_struct *p), ++ TP_ARGS(p)); + + #ifdef CREATE_TRACE_POINTS + static inline long __trace_sched_switch_state(struct task_struct *p) +diff -Nur linux-4.1.26.orig/init/Kconfig linux-4.1.26/init/Kconfig +--- linux-4.1.26.orig/init/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/init/Kconfig 2016-06-19 15:30:58.683297195 +0200 +@@ -637,7 +637,7 @@ + + config RCU_FAST_NO_HZ + bool "Accelerate last non-dyntick-idle CPU's grace periods" +- depends on NO_HZ_COMMON && SMP ++ depends on NO_HZ_COMMON && SMP && !PREEMPT_RT_FULL + default n + help + This option permits CPUs to enter dynticks-idle state even if +@@ -664,7 +664,7 @@ + config RCU_BOOST + bool "Enable RCU priority boosting" + depends on RT_MUTEXES && PREEMPT_RCU +- default n ++ default y if PREEMPT_RT_FULL + help + This option boosts the priority of preempted RCU readers that + block the current preemptible RCU grace period for too long. +@@ -1101,6 +1101,7 @@ + config RT_GROUP_SCHED + bool "Group scheduling for SCHED_RR/FIFO" + depends on CGROUP_SCHED ++ depends on !PREEMPT_RT_FULL + default n + help + This feature lets you explicitly allocate real CPU bandwidth +@@ -1688,6 +1689,7 @@ + + config SLAB + bool "SLAB" ++ depends on !PREEMPT_RT_FULL + help + The regular slab allocator that is established and known to work + well in all environments. It organizes cache hot objects in +@@ -1706,6 +1708,7 @@ + config SLOB + depends on EXPERT + bool "SLOB (Simple Allocator)" ++ depends on !PREEMPT_RT_FULL + help + SLOB replaces the stock allocator with a drastically simpler + allocator. SLOB is generally more space efficient but +@@ -1715,7 +1718,7 @@ + + config SLUB_CPU_PARTIAL + default y +- depends on SLUB && SMP ++ depends on SLUB && SMP && !PREEMPT_RT_FULL + bool "SLUB per cpu partial cache" + help + Per cpu partial caches accellerate objects allocation and freeing +diff -Nur linux-4.1.26.orig/init/main.c linux-4.1.26/init/main.c +--- linux-4.1.26.orig/init/main.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/init/main.c 2016-06-19 15:30:58.683297195 +0200 +@@ -525,6 +525,7 @@ + setup_command_line(command_line); + setup_nr_cpu_ids(); + setup_per_cpu_areas(); ++ softirq_early_init(); + smp_prepare_boot_cpu(); /* arch-specific boot-cpu hooks */ + + build_all_zonelists(NULL, NULL); +diff -Nur linux-4.1.26.orig/init/Makefile linux-4.1.26/init/Makefile +--- linux-4.1.26.orig/init/Makefile 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/init/Makefile 2016-06-19 15:30:58.683297195 +0200 +@@ -33,4 +33,4 @@ + include/generated/compile.h: FORCE + @$($(quiet)chk_compile.h) + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkcompile_h $@ \ +- "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CC) $(KBUILD_CFLAGS)" ++ "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CONFIG_PREEMPT_RT_FULL)" "$(CC) $(KBUILD_CFLAGS)" +diff -Nur linux-4.1.26.orig/ipc/mqueue.c linux-4.1.26/ipc/mqueue.c +--- linux-4.1.26.orig/ipc/mqueue.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/ipc/mqueue.c 2016-06-19 15:30:58.683297195 +0200 +@@ -47,8 +47,7 @@ + #define RECV 1 + + #define STATE_NONE 0 +-#define STATE_PENDING 1 +-#define STATE_READY 2 ++#define STATE_READY 1 + + struct posix_msg_tree_node { + struct rb_node rb_node; +@@ -568,15 +567,12 @@ + wq_add(info, sr, ewp); + + for (;;) { +- set_current_state(TASK_INTERRUPTIBLE); ++ __set_current_state(TASK_INTERRUPTIBLE); + + spin_unlock(&info->lock); + time = schedule_hrtimeout_range_clock(timeout, 0, + HRTIMER_MODE_ABS, CLOCK_REALTIME); + +- while (ewp->state == STATE_PENDING) +- cpu_relax(); +- + if (ewp->state == STATE_READY) { + retval = 0; + goto out; +@@ -904,11 +900,15 @@ + * list of waiting receivers. A sender checks that list before adding the new + * message into the message array. If there is a waiting receiver, then it + * bypasses the message array and directly hands the message over to the +- * receiver. +- * The receiver accepts the message and returns without grabbing the queue +- * spinlock. Therefore an intermediate STATE_PENDING state and memory barriers +- * are necessary. The same algorithm is used for sysv semaphores, see +- * ipc/sem.c for more details. ++ * receiver. The receiver accepts the message and returns without grabbing the ++ * queue spinlock: ++ * ++ * - Set pointer to message. ++ * - Queue the receiver task for later wakeup (without the info->lock). ++ * - Update its state to STATE_READY. Now the receiver can continue. ++ * - Wake up the process after the lock is dropped. Should the process wake up ++ * before this wakeup (due to a timeout or a signal) it will either see ++ * STATE_READY and continue or acquire the lock to check the state again. + * + * The same algorithm is used for senders. + */ +@@ -916,21 +916,29 @@ + /* pipelined_send() - send a message directly to the task waiting in + * sys_mq_timedreceive() (without inserting message into a queue). + */ +-static inline void pipelined_send(struct mqueue_inode_info *info, ++static inline void pipelined_send(struct wake_q_head *wake_q, ++ struct mqueue_inode_info *info, + struct msg_msg *message, + struct ext_wait_queue *receiver) + { + receiver->msg = message; + list_del(&receiver->list); +- receiver->state = STATE_PENDING; +- wake_up_process(receiver->task); +- smp_wmb(); ++ wake_q_add(wake_q, receiver->task); ++ /* ++ * Rely on the implicit cmpxchg barrier from wake_q_add such ++ * that we can ensure that updating receiver->state is the last ++ * write operation: As once set, the receiver can continue, ++ * and if we don't have the reference count from the wake_q, ++ * yet, at that point we can later have a use-after-free ++ * condition and bogus wakeup. ++ */ + receiver->state = STATE_READY; + } + + /* pipelined_receive() - if there is task waiting in sys_mq_timedsend() + * gets its message and put to the queue (we have one free place for sure). */ +-static inline void pipelined_receive(struct mqueue_inode_info *info) ++static inline void pipelined_receive(struct wake_q_head *wake_q, ++ struct mqueue_inode_info *info) + { + struct ext_wait_queue *sender = wq_get_first_waiter(info, SEND); + +@@ -941,10 +949,9 @@ + } + if (msg_insert(sender->msg, info)) + return; ++ + list_del(&sender->list); +- sender->state = STATE_PENDING; +- wake_up_process(sender->task); +- smp_wmb(); ++ wake_q_add(wake_q, sender->task); + sender->state = STATE_READY; + } + +@@ -962,6 +969,7 @@ + struct timespec ts; + struct posix_msg_tree_node *new_leaf = NULL; + int ret = 0; ++ WAKE_Q(wake_q); + + if (u_abs_timeout) { + int res = prepare_timeout(u_abs_timeout, &expires, &ts); +@@ -1045,7 +1053,7 @@ + } else { + receiver = wq_get_first_waiter(info, RECV); + if (receiver) { +- pipelined_send(info, msg_ptr, receiver); ++ pipelined_send(&wake_q, info, msg_ptr, receiver); + } else { + /* adds message to the queue */ + ret = msg_insert(msg_ptr, info); +@@ -1058,6 +1066,7 @@ + } + out_unlock: + spin_unlock(&info->lock); ++ wake_up_q(&wake_q); + out_free: + if (ret) + free_msg(msg_ptr); +@@ -1144,14 +1153,17 @@ + msg_ptr = wait.msg; + } + } else { ++ WAKE_Q(wake_q); ++ + msg_ptr = msg_get(info); + + inode->i_atime = inode->i_mtime = inode->i_ctime = + CURRENT_TIME; + + /* There is now free space in queue. */ +- pipelined_receive(info); ++ pipelined_receive(&wake_q, info); + spin_unlock(&info->lock); ++ wake_up_q(&wake_q); + ret = 0; + } + if (ret == 0) { +diff -Nur linux-4.1.26.orig/ipc/msg.c linux-4.1.26/ipc/msg.c +--- linux-4.1.26.orig/ipc/msg.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/ipc/msg.c 2016-06-19 15:30:58.683297195 +0200 +@@ -188,6 +188,12 @@ + struct msg_receiver *msr, *t; + + list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) { ++ /* ++ * Make sure that the wakeup doesnt preempt ++ * this CPU prematurely. (on PREEMPT_RT) ++ */ ++ preempt_disable_rt(); ++ + msr->r_msg = NULL; /* initialize expunge ordering */ + wake_up_process(msr->r_tsk); + /* +@@ -198,6 +204,8 @@ + */ + smp_mb(); + msr->r_msg = ERR_PTR(res); ++ ++ preempt_enable_rt(); + } + } + +@@ -574,6 +582,11 @@ + if (testmsg(msg, msr->r_msgtype, msr->r_mode) && + !security_msg_queue_msgrcv(msq, msg, msr->r_tsk, + msr->r_msgtype, msr->r_mode)) { ++ /* ++ * Make sure that the wakeup doesnt preempt ++ * this CPU prematurely. (on PREEMPT_RT) ++ */ ++ preempt_disable_rt(); + + list_del(&msr->r_list); + if (msr->r_maxsize < msg->m_ts) { +@@ -595,12 +608,13 @@ + */ + smp_mb(); + msr->r_msg = msg; ++ preempt_enable_rt(); + + return 1; + } ++ preempt_enable_rt(); + } + } +- + return 0; + } + +diff -Nur linux-4.1.26.orig/ipc/sem.c linux-4.1.26/ipc/sem.c +--- linux-4.1.26.orig/ipc/sem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/ipc/sem.c 2016-06-19 15:30:58.683297195 +0200 +@@ -690,6 +690,13 @@ + static void wake_up_sem_queue_prepare(struct list_head *pt, + struct sem_queue *q, int error) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ struct task_struct *p = q->sleeper; ++ get_task_struct(p); ++ q->status = error; ++ wake_up_process(p); ++ put_task_struct(p); ++#else + if (list_empty(pt)) { + /* + * Hold preempt off so that we don't get preempted and have the +@@ -701,6 +708,7 @@ + q->pid = error; + + list_add_tail(&q->list, pt); ++#endif + } + + /** +@@ -714,6 +722,7 @@ + */ + static void wake_up_sem_queue_do(struct list_head *pt) + { ++#ifndef CONFIG_PREEMPT_RT_BASE + struct sem_queue *q, *t; + int did_something; + +@@ -726,6 +735,7 @@ + } + if (did_something) + preempt_enable(); ++#endif + } + + static void unlink_queue(struct sem_array *sma, struct sem_queue *q) +diff -Nur linux-4.1.26.orig/kernel/bpf/hashtab.c linux-4.1.26/kernel/bpf/hashtab.c +--- linux-4.1.26.orig/kernel/bpf/hashtab.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/bpf/hashtab.c 2016-06-19 15:30:58.683297195 +0200 +@@ -17,7 +17,7 @@ + struct bpf_htab { + struct bpf_map map; + struct hlist_head *buckets; +- spinlock_t lock; ++ raw_spinlock_t lock; + u32 count; /* number of elements in this hashtable */ + u32 n_buckets; /* number of hash buckets */ + u32 elem_size; /* size of each element in bytes */ +@@ -82,7 +82,7 @@ + for (i = 0; i < htab->n_buckets; i++) + INIT_HLIST_HEAD(&htab->buckets[i]); + +- spin_lock_init(&htab->lock); ++ raw_spin_lock_init(&htab->lock); + htab->count = 0; + + htab->elem_size = sizeof(struct htab_elem) + +@@ -230,7 +230,7 @@ + l_new->hash = htab_map_hash(l_new->key, key_size); + + /* bpf_map_update_elem() can be called in_irq() */ +- spin_lock_irqsave(&htab->lock, flags); ++ raw_spin_lock_irqsave(&htab->lock, flags); + + head = select_bucket(htab, l_new->hash); + +@@ -266,11 +266,11 @@ + } else { + htab->count++; + } +- spin_unlock_irqrestore(&htab->lock, flags); ++ raw_spin_unlock_irqrestore(&htab->lock, flags); + + return 0; + err: +- spin_unlock_irqrestore(&htab->lock, flags); ++ raw_spin_unlock_irqrestore(&htab->lock, flags); + kfree(l_new); + return ret; + } +@@ -291,7 +291,7 @@ + + hash = htab_map_hash(key, key_size); + +- spin_lock_irqsave(&htab->lock, flags); ++ raw_spin_lock_irqsave(&htab->lock, flags); + + head = select_bucket(htab, hash); + +@@ -304,7 +304,7 @@ + ret = 0; + } + +- spin_unlock_irqrestore(&htab->lock, flags); ++ raw_spin_unlock_irqrestore(&htab->lock, flags); + return ret; + } + +diff -Nur linux-4.1.26.orig/kernel/cgroup.c linux-4.1.26/kernel/cgroup.c +--- linux-4.1.26.orig/kernel/cgroup.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/cgroup.c 2016-06-19 15:30:58.687297349 +0200 +@@ -4422,10 +4422,10 @@ + queue_work(cgroup_destroy_wq, &css->destroy_work); + } + +-static void css_release_work_fn(struct work_struct *work) ++static void css_release_work_fn(struct swork_event *sev) + { + struct cgroup_subsys_state *css = +- container_of(work, struct cgroup_subsys_state, destroy_work); ++ container_of(sev, struct cgroup_subsys_state, destroy_swork); + struct cgroup_subsys *ss = css->ss; + struct cgroup *cgrp = css->cgroup; + +@@ -4464,8 +4464,8 @@ + struct cgroup_subsys_state *css = + container_of(ref, struct cgroup_subsys_state, refcnt); + +- INIT_WORK(&css->destroy_work, css_release_work_fn); +- queue_work(cgroup_destroy_wq, &css->destroy_work); ++ INIT_SWORK(&css->destroy_swork, css_release_work_fn); ++ swork_queue(&css->destroy_swork); + } + + static void init_and_link_css(struct cgroup_subsys_state *css, +@@ -5081,6 +5081,7 @@ + */ + cgroup_destroy_wq = alloc_workqueue("cgroup_destroy", 0, 1); + BUG_ON(!cgroup_destroy_wq); ++ BUG_ON(swork_get()); + + /* + * Used to destroy pidlists and separate to serve as flush domain. +diff -Nur linux-4.1.26.orig/kernel/cpu.c linux-4.1.26/kernel/cpu.c +--- linux-4.1.26.orig/kernel/cpu.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/cpu.c 2016-06-19 15:30:58.687297349 +0200 +@@ -74,8 +74,8 @@ + #endif + } cpu_hotplug = { + .active_writer = NULL, +- .wq = __WAIT_QUEUE_HEAD_INITIALIZER(cpu_hotplug.wq), + .lock = __MUTEX_INITIALIZER(cpu_hotplug.lock), ++ .wq = __WAIT_QUEUE_HEAD_INITIALIZER(cpu_hotplug.wq), + #ifdef CONFIG_DEBUG_LOCK_ALLOC + .dep_map = {.name = "cpu_hotplug.lock" }, + #endif +@@ -88,6 +88,289 @@ + #define cpuhp_lock_acquire() lock_map_acquire(&cpu_hotplug.dep_map) + #define cpuhp_lock_release() lock_map_release(&cpu_hotplug.dep_map) + ++/** ++ * hotplug_pcp - per cpu hotplug descriptor ++ * @unplug: set when pin_current_cpu() needs to sync tasks ++ * @sync_tsk: the task that waits for tasks to finish pinned sections ++ * @refcount: counter of tasks in pinned sections ++ * @grab_lock: set when the tasks entering pinned sections should wait ++ * @synced: notifier for @sync_tsk to tell cpu_down it's finished ++ * @mutex: the mutex to make tasks wait (used when @grab_lock is true) ++ * @mutex_init: zero if the mutex hasn't been initialized yet. ++ * ++ * Although @unplug and @sync_tsk may point to the same task, the @unplug ++ * is used as a flag and still exists after @sync_tsk has exited and ++ * @sync_tsk set to NULL. ++ */ ++struct hotplug_pcp { ++ struct task_struct *unplug; ++ struct task_struct *sync_tsk; ++ int refcount; ++ int grab_lock; ++ struct completion synced; ++ struct completion unplug_wait; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* ++ * Note, on PREEMPT_RT, the hotplug lock must save the state of ++ * the task, otherwise the mutex will cause the task to fail ++ * to sleep when required. (Because it's called from migrate_disable()) ++ * ++ * The spinlock_t on PREEMPT_RT is a mutex that saves the task's ++ * state. ++ */ ++ spinlock_t lock; ++#else ++ struct mutex mutex; ++#endif ++ int mutex_init; ++}; ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++# define hotplug_lock(hp) rt_spin_lock(&(hp)->lock) ++# define hotplug_unlock(hp) rt_spin_unlock(&(hp)->lock) ++#else ++# define hotplug_lock(hp) mutex_lock(&(hp)->mutex) ++# define hotplug_unlock(hp) mutex_unlock(&(hp)->mutex) ++#endif ++ ++static DEFINE_PER_CPU(struct hotplug_pcp, hotplug_pcp); ++ ++/** ++ * pin_current_cpu - Prevent the current cpu from being unplugged ++ * ++ * Lightweight version of get_online_cpus() to prevent cpu from being ++ * unplugged when code runs in a migration disabled region. ++ * ++ * Must be called with preemption disabled (preempt_count = 1)! ++ */ ++void pin_current_cpu(void) ++{ ++ struct hotplug_pcp *hp; ++ int force = 0; ++ ++retry: ++ hp = this_cpu_ptr(&hotplug_pcp); ++ ++ if (!hp->unplug || hp->refcount || force || preempt_count() > 1 || ++ hp->unplug == current) { ++ hp->refcount++; ++ return; ++ } ++ if (hp->grab_lock) { ++ preempt_enable(); ++ hotplug_lock(hp); ++ hotplug_unlock(hp); ++ } else { ++ preempt_enable(); ++ /* ++ * Try to push this task off of this CPU. ++ */ ++ if (!migrate_me()) { ++ preempt_disable(); ++ hp = this_cpu_ptr(&hotplug_pcp); ++ if (!hp->grab_lock) { ++ /* ++ * Just let it continue it's already pinned ++ * or about to sleep. ++ */ ++ force = 1; ++ goto retry; ++ } ++ preempt_enable(); ++ } ++ } ++ preempt_disable(); ++ goto retry; ++} ++ ++/** ++ * unpin_current_cpu - Allow unplug of current cpu ++ * ++ * Must be called with preemption or interrupts disabled! ++ */ ++void unpin_current_cpu(void) ++{ ++ struct hotplug_pcp *hp = this_cpu_ptr(&hotplug_pcp); ++ ++ WARN_ON(hp->refcount <= 0); ++ ++ /* This is safe. sync_unplug_thread is pinned to this cpu */ ++ if (!--hp->refcount && hp->unplug && hp->unplug != current) ++ wake_up_process(hp->unplug); ++} ++ ++static void wait_for_pinned_cpus(struct hotplug_pcp *hp) ++{ ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ while (hp->refcount) { ++ schedule_preempt_disabled(); ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ } ++} ++ ++static int sync_unplug_thread(void *data) ++{ ++ struct hotplug_pcp *hp = data; ++ ++ wait_for_completion(&hp->unplug_wait); ++ preempt_disable(); ++ hp->unplug = current; ++ wait_for_pinned_cpus(hp); ++ ++ /* ++ * This thread will synchronize the cpu_down() with threads ++ * that have pinned the CPU. When the pinned CPU count reaches ++ * zero, we inform the cpu_down code to continue to the next step. ++ */ ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ preempt_enable(); ++ complete(&hp->synced); ++ ++ /* ++ * If all succeeds, the next step will need tasks to wait till ++ * the CPU is offline before continuing. To do this, the grab_lock ++ * is set and tasks going into pin_current_cpu() will block on the ++ * mutex. But we still need to wait for those that are already in ++ * pinned CPU sections. If the cpu_down() failed, the kthread_should_stop() ++ * will kick this thread out. ++ */ ++ while (!hp->grab_lock && !kthread_should_stop()) { ++ schedule(); ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ } ++ ++ /* Make sure grab_lock is seen before we see a stale completion */ ++ smp_mb(); ++ ++ /* ++ * Now just before cpu_down() enters stop machine, we need to make ++ * sure all tasks that are in pinned CPU sections are out, and new ++ * tasks will now grab the lock, keeping them from entering pinned ++ * CPU sections. ++ */ ++ if (!kthread_should_stop()) { ++ preempt_disable(); ++ wait_for_pinned_cpus(hp); ++ preempt_enable(); ++ complete(&hp->synced); ++ } ++ ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ while (!kthread_should_stop()) { ++ schedule(); ++ set_current_state(TASK_UNINTERRUPTIBLE); ++ } ++ set_current_state(TASK_RUNNING); ++ ++ /* ++ * Force this thread off this CPU as it's going down and ++ * we don't want any more work on this CPU. ++ */ ++ current->flags &= ~PF_NO_SETAFFINITY; ++ set_cpus_allowed_ptr(current, cpu_present_mask); ++ migrate_me(); ++ return 0; ++} ++ ++static void __cpu_unplug_sync(struct hotplug_pcp *hp) ++{ ++ wake_up_process(hp->sync_tsk); ++ wait_for_completion(&hp->synced); ++} ++ ++static void __cpu_unplug_wait(unsigned int cpu) ++{ ++ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); ++ ++ complete(&hp->unplug_wait); ++ wait_for_completion(&hp->synced); ++} ++ ++/* ++ * Start the sync_unplug_thread on the target cpu and wait for it to ++ * complete. ++ */ ++static int cpu_unplug_begin(unsigned int cpu) ++{ ++ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); ++ int err; ++ ++ /* Protected by cpu_hotplug.lock */ ++ if (!hp->mutex_init) { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ spin_lock_init(&hp->lock); ++#else ++ mutex_init(&hp->mutex); ++#endif ++ hp->mutex_init = 1; ++ } ++ ++ /* Inform the scheduler to migrate tasks off this CPU */ ++ tell_sched_cpu_down_begin(cpu); ++ ++ init_completion(&hp->synced); ++ init_completion(&hp->unplug_wait); ++ ++ hp->sync_tsk = kthread_create(sync_unplug_thread, hp, "sync_unplug/%d", cpu); ++ if (IS_ERR(hp->sync_tsk)) { ++ err = PTR_ERR(hp->sync_tsk); ++ hp->sync_tsk = NULL; ++ return err; ++ } ++ kthread_bind(hp->sync_tsk, cpu); ++ ++ /* ++ * Wait for tasks to get out of the pinned sections, ++ * it's still OK if new tasks enter. Some CPU notifiers will ++ * wait for tasks that are going to enter these sections and ++ * we must not have them block. ++ */ ++ wake_up_process(hp->sync_tsk); ++ return 0; ++} ++ ++static void cpu_unplug_sync(unsigned int cpu) ++{ ++ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); ++ ++ init_completion(&hp->synced); ++ /* The completion needs to be initialzied before setting grab_lock */ ++ smp_wmb(); ++ ++ /* Grab the mutex before setting grab_lock */ ++ hotplug_lock(hp); ++ hp->grab_lock = 1; ++ ++ /* ++ * The CPU notifiers have been completed. ++ * Wait for tasks to get out of pinned CPU sections and have new ++ * tasks block until the CPU is completely down. ++ */ ++ __cpu_unplug_sync(hp); ++ ++ /* All done with the sync thread */ ++ kthread_stop(hp->sync_tsk); ++ hp->sync_tsk = NULL; ++} ++ ++static void cpu_unplug_done(unsigned int cpu) ++{ ++ struct hotplug_pcp *hp = &per_cpu(hotplug_pcp, cpu); ++ ++ hp->unplug = NULL; ++ /* Let all tasks know cpu unplug is finished before cleaning up */ ++ smp_wmb(); ++ ++ if (hp->sync_tsk) ++ kthread_stop(hp->sync_tsk); ++ ++ if (hp->grab_lock) { ++ hotplug_unlock(hp); ++ /* protected by cpu_hotplug.lock */ ++ hp->grab_lock = 0; ++ } ++ tell_sched_cpu_down_done(cpu); ++} + + void get_online_cpus(void) + { +@@ -349,13 +632,15 @@ + /* Requires cpu_add_remove_lock to be held */ + static int __ref _cpu_down(unsigned int cpu, int tasks_frozen) + { +- int err, nr_calls = 0; ++ int mycpu, err, nr_calls = 0; + void *hcpu = (void *)(long)cpu; + unsigned long mod = tasks_frozen ? CPU_TASKS_FROZEN : 0; + struct take_cpu_down_param tcd_param = { + .mod = mod, + .hcpu = hcpu, + }; ++ cpumask_var_t cpumask; ++ cpumask_var_t cpumask_org; + + if (num_online_cpus() == 1) + return -EBUSY; +@@ -363,7 +648,34 @@ + if (!cpu_online(cpu)) + return -EINVAL; + ++ /* Move the downtaker off the unplug cpu */ ++ if (!alloc_cpumask_var(&cpumask, GFP_KERNEL)) ++ return -ENOMEM; ++ if (!alloc_cpumask_var(&cpumask_org, GFP_KERNEL)) { ++ free_cpumask_var(cpumask); ++ return -ENOMEM; ++ } ++ ++ cpumask_copy(cpumask_org, tsk_cpus_allowed(current)); ++ cpumask_andnot(cpumask, cpu_online_mask, cpumask_of(cpu)); ++ set_cpus_allowed_ptr(current, cpumask); ++ free_cpumask_var(cpumask); ++ migrate_disable(); ++ mycpu = smp_processor_id(); ++ if (mycpu == cpu) { ++ printk(KERN_ERR "Yuck! Still on unplug CPU\n!"); ++ migrate_enable(); ++ err = -EBUSY; ++ goto restore_cpus; ++ } ++ migrate_enable(); ++ + cpu_hotplug_begin(); ++ err = cpu_unplug_begin(cpu); ++ if (err) { ++ printk("cpu_unplug_begin(%d) failed\n", cpu); ++ goto out_cancel; ++ } + + err = __cpu_notify(CPU_DOWN_PREPARE | mod, hcpu, -1, &nr_calls); + if (err) { +@@ -389,8 +701,12 @@ + #endif + synchronize_rcu(); + ++ __cpu_unplug_wait(cpu); + smpboot_park_threads(cpu); + ++ /* Notifiers are done. Don't let any more tasks pin this CPU. */ ++ cpu_unplug_sync(cpu); ++ + /* + * So now all preempt/rcu users must observe !cpu_active(). + */ +@@ -427,9 +743,14 @@ + check_for_tasks(cpu); + + out_release: ++ cpu_unplug_done(cpu); ++out_cancel: + cpu_hotplug_done(); + if (!err) + cpu_notify_nofail(CPU_POST_DEAD | mod, hcpu); ++restore_cpus: ++ set_cpus_allowed_ptr(current, cpumask_org); ++ free_cpumask_var(cpumask_org); + return err; + } + +diff -Nur linux-4.1.26.orig/kernel/debug/kdb/kdb_io.c linux-4.1.26/kernel/debug/kdb/kdb_io.c +--- linux-4.1.26.orig/kernel/debug/kdb/kdb_io.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/debug/kdb/kdb_io.c 2016-06-19 15:30:58.687297349 +0200 +@@ -554,7 +554,6 @@ + int linecount; + int colcount; + int logging, saved_loglevel = 0; +- int saved_trap_printk; + int got_printf_lock = 0; + int retlen = 0; + int fnd, len; +@@ -565,8 +564,6 @@ + unsigned long uninitialized_var(flags); + + preempt_disable(); +- saved_trap_printk = kdb_trap_printk; +- kdb_trap_printk = 0; + + /* Serialize kdb_printf if multiple cpus try to write at once. + * But if any cpu goes recursive in kdb, just print the output, +@@ -855,7 +852,6 @@ + } else { + __release(kdb_printf_lock); + } +- kdb_trap_printk = saved_trap_printk; + preempt_enable(); + return retlen; + } +@@ -865,9 +861,11 @@ + va_list ap; + int r; + ++ kdb_trap_printk++; + va_start(ap, fmt); + r = vkdb_printf(KDB_MSGSRC_INTERNAL, fmt, ap); + va_end(ap); ++ kdb_trap_printk--; + + return r; + } +diff -Nur linux-4.1.26.orig/kernel/events/core.c linux-4.1.26/kernel/events/core.c +--- linux-4.1.26.orig/kernel/events/core.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/events/core.c 2016-06-19 15:30:58.687297349 +0200 +@@ -6925,6 +6925,7 @@ + + hrtimer_init(&hwc->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + hwc->hrtimer.function = perf_swevent_hrtimer; ++ hwc->hrtimer.irqsafe = 1; + + /* + * Since hrtimers have a fixed rate, we can do a static freq->period +diff -Nur linux-4.1.26.orig/kernel/exit.c linux-4.1.26/kernel/exit.c +--- linux-4.1.26.orig/kernel/exit.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/exit.c 2016-06-19 15:30:58.687297349 +0200 +@@ -144,7 +144,7 @@ + * Do this under ->siglock, we can race with another thread + * doing sigqueue_free() if we have SIGQUEUE_PREALLOC signals. + */ +- flush_sigqueue(&tsk->pending); ++ flush_task_sigqueue(tsk); + tsk->sighand = NULL; + spin_unlock(&sighand->siglock); + +diff -Nur linux-4.1.26.orig/kernel/fork.c linux-4.1.26/kernel/fork.c +--- linux-4.1.26.orig/kernel/fork.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/fork.c 2016-06-19 15:30:58.687297349 +0200 +@@ -108,7 +108,7 @@ + + DEFINE_PER_CPU(unsigned long, process_counts) = 0; + +-__cacheline_aligned DEFINE_RWLOCK(tasklist_lock); /* outer */ ++DEFINE_RWLOCK(tasklist_lock); /* outer */ + + #ifdef CONFIG_PROVE_RCU + int lockdep_tasklist_lock_is_held(void) +@@ -244,7 +244,9 @@ + if (atomic_dec_and_test(&sig->sigcnt)) + free_signal_struct(sig); + } +- ++#ifdef CONFIG_PREEMPT_RT_BASE ++static ++#endif + void __put_task_struct(struct task_struct *tsk) + { + WARN_ON(!tsk->exit_state); +@@ -260,7 +262,18 @@ + if (!profile_handoff_task(tsk)) + free_task(tsk); + } ++#ifndef CONFIG_PREEMPT_RT_BASE + EXPORT_SYMBOL_GPL(__put_task_struct); ++#else ++void __put_task_struct_cb(struct rcu_head *rhp) ++{ ++ struct task_struct *tsk = container_of(rhp, struct task_struct, put_rcu); ++ ++ __put_task_struct(tsk); ++ ++} ++EXPORT_SYMBOL_GPL(__put_task_struct_cb); ++#endif + + void __init __weak arch_task_cache_init(void) { } + +@@ -374,6 +387,7 @@ + #endif + tsk->splice_pipe = NULL; + tsk->task_frag.page = NULL; ++ tsk->wake_q.next = NULL; + + account_kernel_stack(ti, 1); + +@@ -680,6 +694,19 @@ + } + EXPORT_SYMBOL_GPL(__mmdrop); + ++#ifdef CONFIG_PREEMPT_RT_BASE ++/* ++ * RCU callback for delayed mm drop. Not strictly rcu, but we don't ++ * want another facility to make this work. ++ */ ++void __mmdrop_delayed(struct rcu_head *rhp) ++{ ++ struct mm_struct *mm = container_of(rhp, struct mm_struct, delayed_drop); ++ ++ __mmdrop(mm); ++} ++#endif ++ + /* + * Decrement the use count and release all resources for an mm. + */ +@@ -1214,6 +1241,9 @@ + */ + static void posix_cpu_timers_init(struct task_struct *tsk) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ tsk->posix_timer_list = NULL; ++#endif + tsk->cputime_expires.prof_exp = 0; + tsk->cputime_expires.virt_exp = 0; + tsk->cputime_expires.sched_exp = 0; +@@ -1338,6 +1368,7 @@ + spin_lock_init(&p->alloc_lock); + + init_sigpending(&p->pending); ++ p->sigqueue_cache = NULL; + + p->utime = p->stime = p->gtime = 0; + p->utimescaled = p->stimescaled = 0; +@@ -1345,7 +1376,8 @@ + p->prev_cputime.utime = p->prev_cputime.stime = 0; + #endif + #ifdef CONFIG_VIRT_CPU_ACCOUNTING_GEN +- seqlock_init(&p->vtime_seqlock); ++ raw_spin_lock_init(&p->vtime_lock); ++ seqcount_init(&p->vtime_seq); + p->vtime_snap = 0; + p->vtime_snap_whence = VTIME_SLEEPING; + #endif +@@ -1396,6 +1428,9 @@ + p->hardirq_context = 0; + p->softirq_context = 0; + #endif ++ ++ p->pagefault_disabled = 0; ++ + #ifdef CONFIG_LOCKDEP + p->lockdep_depth = 0; /* no locks held yet */ + p->curr_chain_key = 0; +diff -Nur linux-4.1.26.orig/kernel/futex.c linux-4.1.26/kernel/futex.c +--- linux-4.1.26.orig/kernel/futex.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/futex.c 2016-06-19 15:32:42.447298576 +0200 +@@ -738,7 +738,9 @@ + * task still owns the PI-state: + */ + if (head->next != next) { ++ raw_spin_unlock_irq(&curr->pi_lock); + spin_unlock(&hb->lock); ++ raw_spin_lock_irq(&curr->pi_lock); + continue; + } + +@@ -1090,9 +1092,11 @@ + + /* + * The hash bucket lock must be held when this is called. +- * Afterwards, the futex_q must not be accessed. ++ * Afterwards, the futex_q must not be accessed. Callers ++ * must ensure to later call wake_up_q() for the actual ++ * wakeups to occur. + */ +-static void wake_futex(struct futex_q *q) ++static void mark_wake_futex(struct wake_q_head *wake_q, struct futex_q *q) + { + struct task_struct *p = q->task; + +@@ -1100,14 +1104,10 @@ + return; + + /* +- * We set q->lock_ptr = NULL _before_ we wake up the task. If +- * a non-futex wake up happens on another CPU then the task +- * might exit and p would dereference a non-existing task +- * struct. Prevent this by holding a reference on p across the +- * wake up. ++ * Queue the task for later wakeup for after we've released ++ * the hb->lock. wake_q_add() grabs reference to p. + */ +- get_task_struct(p); +- ++ wake_q_add(wake_q, p); + __unqueue_futex(q); + /* + * The waiting task can free the futex_q as soon as +@@ -1117,16 +1117,15 @@ + */ + smp_wmb(); + q->lock_ptr = NULL; +- +- wake_up_state(p, TASK_NORMAL); +- put_task_struct(p); + } + +-static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_q *this) ++static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_q *this, ++ struct futex_hash_bucket *hb) + { + struct task_struct *new_owner; + struct futex_pi_state *pi_state = this->pi_state; + u32 uninitialized_var(curval), newval; ++ bool deboost; + int ret = 0; + + if (!pi_state) +@@ -1188,7 +1187,17 @@ + raw_spin_unlock_irq(&new_owner->pi_lock); + + raw_spin_unlock(&pi_state->pi_mutex.wait_lock); +- rt_mutex_unlock(&pi_state->pi_mutex); ++ ++ deboost = rt_mutex_futex_unlock(&pi_state->pi_mutex); ++ ++ /* ++ * We deboost after dropping hb->lock. That prevents a double ++ * wakeup on RT. ++ */ ++ spin_unlock(&hb->lock); ++ ++ if (deboost) ++ rt_mutex_adjust_prio(current); + + return 0; + } +@@ -1227,6 +1236,7 @@ + struct futex_q *this, *next; + union futex_key key = FUTEX_KEY_INIT; + int ret; ++ WAKE_Q(wake_q); + + if (!bitset) + return -EINVAL; +@@ -1254,13 +1264,14 @@ + if (!(this->bitset & bitset)) + continue; + +- wake_futex(this); ++ mark_wake_futex(&wake_q, this); + if (++ret >= nr_wake) + break; + } + } + + spin_unlock(&hb->lock); ++ wake_up_q(&wake_q); + out_put_key: + put_futex_key(&key); + out: +@@ -1279,6 +1290,7 @@ + struct futex_hash_bucket *hb1, *hb2; + struct futex_q *this, *next; + int ret, op_ret; ++ WAKE_Q(wake_q); + + retry: + ret = get_futex_key(uaddr1, flags & FLAGS_SHARED, &key1, VERIFY_READ); +@@ -1330,7 +1342,7 @@ + ret = -EINVAL; + goto out_unlock; + } +- wake_futex(this); ++ mark_wake_futex(&wake_q, this); + if (++ret >= nr_wake) + break; + } +@@ -1344,7 +1356,7 @@ + ret = -EINVAL; + goto out_unlock; + } +- wake_futex(this); ++ mark_wake_futex(&wake_q, this); + if (++op_ret >= nr_wake2) + break; + } +@@ -1354,6 +1366,7 @@ + + out_unlock: + double_unlock_hb(hb1, hb2); ++ wake_up_q(&wake_q); + out_put_keys: + put_futex_key(&key2); + out_put_key1: +@@ -1513,6 +1526,7 @@ + struct futex_pi_state *pi_state = NULL; + struct futex_hash_bucket *hb1, *hb2; + struct futex_q *this, *next; ++ WAKE_Q(wake_q); + + if (requeue_pi) { + /* +@@ -1689,7 +1703,7 @@ + * woken by futex_unlock_pi(). + */ + if (++task_count <= nr_wake && !requeue_pi) { +- wake_futex(this); ++ mark_wake_futex(&wake_q, this); + continue; + } + +@@ -1715,6 +1729,16 @@ + requeue_pi_wake_futex(this, &key2, hb2); + drop_count++; + continue; ++ } else if (ret == -EAGAIN) { ++ /* ++ * Waiter was woken by timeout or ++ * signal and has set pi_blocked_on to ++ * PI_WAKEUP_INPROGRESS before we ++ * tried to enqueue it on the rtmutex. ++ */ ++ this->pi_state = NULL; ++ free_pi_state(pi_state); ++ continue; + } else if (ret) { + /* -EDEADLK */ + this->pi_state = NULL; +@@ -1729,6 +1753,7 @@ + out_unlock: + free_pi_state(pi_state); + double_unlock_hb(hb1, hb2); ++ wake_up_q(&wake_q); + hb_waiters_dec(hb2); + + /* +@@ -2422,7 +2447,15 @@ + */ + match = futex_top_waiter(hb, &key); + if (match) { +- ret = wake_futex_pi(uaddr, uval, match); ++ ret = wake_futex_pi(uaddr, uval, match, hb); ++ ++ /* ++ * In case of success wake_futex_pi dropped the hash ++ * bucket lock. ++ */ ++ if (!ret) ++ goto out_putkey; ++ + /* + * The atomic access to the futex value generated a + * pagefault, so retry the user-access and the wakeup: +@@ -2458,6 +2491,7 @@ + + out_unlock: + spin_unlock(&hb->lock); ++out_putkey: + put_futex_key(&key); + return ret; + +@@ -2568,7 +2602,7 @@ + struct hrtimer_sleeper timeout, *to = NULL; + struct rt_mutex_waiter rt_waiter; + struct rt_mutex *pi_mutex = NULL; +- struct futex_hash_bucket *hb; ++ struct futex_hash_bucket *hb, *hb2; + union futex_key key2 = FUTEX_KEY_INIT; + struct futex_q q = futex_q_init; + int res, ret; +@@ -2593,10 +2627,7 @@ + * The waiter is allocated on our stack, manipulated by the requeue + * code while we sleep on uaddr. + */ +- debug_rt_mutex_init_waiter(&rt_waiter); +- RB_CLEAR_NODE(&rt_waiter.pi_tree_entry); +- RB_CLEAR_NODE(&rt_waiter.tree_entry); +- rt_waiter.task = NULL; ++ rt_mutex_init_waiter(&rt_waiter, false); + + ret = get_futex_key(uaddr2, flags & FLAGS_SHARED, &key2, VERIFY_WRITE); + if (unlikely(ret != 0)) +@@ -2627,20 +2658,55 @@ + /* Queue the futex_q, drop the hb lock, wait for wakeup. */ + futex_wait_queue_me(hb, &q, to); + +- spin_lock(&hb->lock); +- ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); +- spin_unlock(&hb->lock); +- if (ret) +- goto out_put_keys; ++ /* ++ * On RT we must avoid races with requeue and trying to block ++ * on two mutexes (hb->lock and uaddr2's rtmutex) by ++ * serializing access to pi_blocked_on with pi_lock. ++ */ ++ raw_spin_lock_irq(¤t->pi_lock); ++ if (current->pi_blocked_on) { ++ /* ++ * We have been requeued or are in the process of ++ * being requeued. ++ */ ++ raw_spin_unlock_irq(¤t->pi_lock); ++ } else { ++ /* ++ * Setting pi_blocked_on to PI_WAKEUP_INPROGRESS ++ * prevents a concurrent requeue from moving us to the ++ * uaddr2 rtmutex. After that we can safely acquire ++ * (and possibly block on) hb->lock. ++ */ ++ current->pi_blocked_on = PI_WAKEUP_INPROGRESS; ++ raw_spin_unlock_irq(¤t->pi_lock); ++ ++ spin_lock(&hb->lock); ++ ++ /* ++ * Clean up pi_blocked_on. We might leak it otherwise ++ * when we succeeded with the hb->lock in the fast ++ * path. ++ */ ++ raw_spin_lock_irq(¤t->pi_lock); ++ current->pi_blocked_on = NULL; ++ raw_spin_unlock_irq(¤t->pi_lock); ++ ++ ret = handle_early_requeue_pi_wakeup(hb, &q, &key2, to); ++ spin_unlock(&hb->lock); ++ if (ret) ++ goto out_put_keys; ++ } + + /* +- * In order for us to be here, we know our q.key == key2, and since +- * we took the hb->lock above, we also know that futex_requeue() has +- * completed and we no longer have to concern ourselves with a wakeup +- * race with the atomic proxy lock acquisition by the requeue code. The +- * futex_requeue dropped our key1 reference and incremented our key2 +- * reference count. ++ * In order to be here, we have either been requeued, are in ++ * the process of being requeued, or requeue successfully ++ * acquired uaddr2 on our behalf. If pi_blocked_on was ++ * non-null above, we may be racing with a requeue. Do not ++ * rely on q->lock_ptr to be hb2->lock until after blocking on ++ * hb->lock or hb2->lock. The futex_requeue dropped our key1 ++ * reference and incremented our key2 reference count. + */ ++ hb2 = hash_futex(&key2); + + /* Check if the requeue code acquired the second futex for us. */ + if (!q.rt_waiter) { +@@ -2649,14 +2715,15 @@ + * did a lock-steal - fix up the PI-state in that case. + */ + if (q.pi_state && (q.pi_state->owner != current)) { +- spin_lock(q.lock_ptr); ++ spin_lock(&hb2->lock); ++ BUG_ON(&hb2->lock != q.lock_ptr); + ret = fixup_pi_state_owner(uaddr2, &q, current); + /* + * Drop the reference to the pi state which + * the requeue_pi() code acquired for us. + */ + free_pi_state(q.pi_state); +- spin_unlock(q.lock_ptr); ++ spin_unlock(&hb2->lock); + } + } else { + /* +@@ -2669,7 +2736,8 @@ + ret = rt_mutex_finish_proxy_lock(pi_mutex, to, &rt_waiter); + debug_rt_mutex_free_waiter(&rt_waiter); + +- spin_lock(q.lock_ptr); ++ spin_lock(&hb2->lock); ++ BUG_ON(&hb2->lock != q.lock_ptr); + /* + * Fixup the pi_state owner and possibly acquire the lock if we + * haven't already. +diff -Nur linux-4.1.26.orig/kernel/irq/handle.c linux-4.1.26/kernel/irq/handle.c +--- linux-4.1.26.orig/kernel/irq/handle.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/irq/handle.c 2016-06-19 15:30:58.691297504 +0200 +@@ -133,6 +133,8 @@ + irqreturn_t + handle_irq_event_percpu(struct irq_desc *desc, struct irqaction *action) + { ++ struct pt_regs *regs = get_irq_regs(); ++ u64 ip = regs ? instruction_pointer(regs) : 0; + irqreturn_t retval = IRQ_NONE; + unsigned int flags = 0, irq = desc->irq_data.irq; + +@@ -173,7 +175,11 @@ + action = action->next; + } while (action); + +- add_interrupt_randomness(irq, flags); ++#ifndef CONFIG_PREEMPT_RT_FULL ++ add_interrupt_randomness(irq, flags, ip); ++#else ++ desc->random_ip = ip; ++#endif + + if (!noirqdebug) + note_interrupt(irq, desc, retval); +diff -Nur linux-4.1.26.orig/kernel/irq/manage.c linux-4.1.26/kernel/irq/manage.c +--- linux-4.1.26.orig/kernel/irq/manage.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/irq/manage.c 2016-06-19 15:30:58.691297504 +0200 +@@ -22,6 +22,7 @@ + #include "internals.h" + + #ifdef CONFIG_IRQ_FORCED_THREADING ++# ifndef CONFIG_PREEMPT_RT_BASE + __read_mostly bool force_irqthreads; + + static int __init setup_forced_irqthreads(char *arg) +@@ -30,6 +31,7 @@ + return 0; + } + early_param("threadirqs", setup_forced_irqthreads); ++# endif + #endif + + static void __synchronize_hardirq(struct irq_desc *desc) +@@ -179,6 +181,62 @@ + irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void _irq_affinity_notify(struct irq_affinity_notify *notify); ++static struct task_struct *set_affinity_helper; ++static LIST_HEAD(affinity_list); ++static DEFINE_RAW_SPINLOCK(affinity_list_lock); ++ ++static int set_affinity_thread(void *unused) ++{ ++ while (1) { ++ struct irq_affinity_notify *notify; ++ int empty; ++ ++ set_current_state(TASK_INTERRUPTIBLE); ++ ++ raw_spin_lock_irq(&affinity_list_lock); ++ empty = list_empty(&affinity_list); ++ raw_spin_unlock_irq(&affinity_list_lock); ++ ++ if (empty) ++ schedule(); ++ if (kthread_should_stop()) ++ break; ++ set_current_state(TASK_RUNNING); ++try_next: ++ notify = NULL; ++ ++ raw_spin_lock_irq(&affinity_list_lock); ++ if (!list_empty(&affinity_list)) { ++ notify = list_first_entry(&affinity_list, ++ struct irq_affinity_notify, list); ++ list_del_init(¬ify->list); ++ } ++ raw_spin_unlock_irq(&affinity_list_lock); ++ ++ if (!notify) ++ continue; ++ _irq_affinity_notify(notify); ++ goto try_next; ++ } ++ return 0; ++} ++ ++static void init_helper_thread(void) ++{ ++ if (set_affinity_helper) ++ return; ++ set_affinity_helper = kthread_run(set_affinity_thread, NULL, ++ "affinity-cb"); ++ WARN_ON(IS_ERR(set_affinity_helper)); ++} ++#else ++ ++static inline void init_helper_thread(void) { } ++ ++#endif ++ + int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask, + bool force) + { +@@ -218,7 +276,17 @@ + + if (desc->affinity_notify) { + kref_get(&desc->affinity_notify->kref); ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ raw_spin_lock(&affinity_list_lock); ++ if (list_empty(&desc->affinity_notify->list)) ++ list_add_tail(&affinity_list, ++ &desc->affinity_notify->list); ++ raw_spin_unlock(&affinity_list_lock); ++ wake_up_process(set_affinity_helper); ++#else + schedule_work(&desc->affinity_notify->work); ++#endif + } + irqd_set(data, IRQD_AFFINITY_SET); + +@@ -256,10 +324,8 @@ + } + EXPORT_SYMBOL_GPL(irq_set_affinity_hint); + +-static void irq_affinity_notify(struct work_struct *work) ++static void _irq_affinity_notify(struct irq_affinity_notify *notify) + { +- struct irq_affinity_notify *notify = +- container_of(work, struct irq_affinity_notify, work); + struct irq_desc *desc = irq_to_desc(notify->irq); + cpumask_var_t cpumask; + unsigned long flags; +@@ -281,6 +347,13 @@ + kref_put(¬ify->kref, notify->release); + } + ++static void irq_affinity_notify(struct work_struct *work) ++{ ++ struct irq_affinity_notify *notify = ++ container_of(work, struct irq_affinity_notify, work); ++ _irq_affinity_notify(notify); ++} ++ + /** + * irq_set_affinity_notifier - control notification of IRQ affinity changes + * @irq: Interrupt for which to enable/disable notification +@@ -310,6 +383,8 @@ + notify->irq = irq; + kref_init(¬ify->kref); + INIT_WORK(¬ify->work, irq_affinity_notify); ++ INIT_LIST_HEAD(¬ify->list); ++ init_helper_thread(); + } + + raw_spin_lock_irqsave(&desc->lock, flags); +@@ -697,6 +772,12 @@ + return IRQ_NONE; + } + ++static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id) ++{ ++ WARN(1, "Secondary action handler called for irq %d\n", irq); ++ return IRQ_NONE; ++} ++ + static int irq_wait_for_interrupt(struct irqaction *action) + { + set_current_state(TASK_INTERRUPTIBLE); +@@ -723,7 +804,8 @@ + static void irq_finalize_oneshot(struct irq_desc *desc, + struct irqaction *action) + { +- if (!(desc->istate & IRQS_ONESHOT)) ++ if (!(desc->istate & IRQS_ONESHOT) || ++ action->handler == irq_forced_secondary_handler) + return; + again: + chip_bus_lock(desc); +@@ -825,7 +907,15 @@ + local_bh_disable(); + ret = action->thread_fn(action->irq, action->dev_id); + irq_finalize_oneshot(desc, action); +- local_bh_enable(); ++ /* ++ * Interrupts which have real time requirements can be set up ++ * to avoid softirq processing in the thread handler. This is ++ * safe as these interrupts do not raise soft interrupts. ++ */ ++ if (irq_settings_no_softirq_call(desc)) ++ _local_bh_enable(); ++ else ++ local_bh_enable(); + return ret; + } + +@@ -877,6 +967,18 @@ + irq_finalize_oneshot(desc, action); + } + ++static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action) ++{ ++ struct irqaction *secondary = action->secondary; ++ ++ if (WARN_ON_ONCE(!secondary)) ++ return; ++ ++ raw_spin_lock_irq(&desc->lock); ++ __irq_wake_thread(desc, secondary); ++ raw_spin_unlock_irq(&desc->lock); ++} ++ + /* + * Interrupt handler thread + */ +@@ -907,7 +1009,15 @@ + action_ret = handler_fn(desc, action); + if (action_ret == IRQ_HANDLED) + atomic_inc(&desc->threads_handled); ++ if (action_ret == IRQ_WAKE_THREAD) ++ irq_wake_secondary(desc, action); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ migrate_disable(); ++ add_interrupt_randomness(action->irq, 0, ++ desc->random_ip ^ (unsigned long) action); ++ migrate_enable(); ++#endif + wake_threads_waitq(desc); + } + +@@ -951,20 +1061,36 @@ + } + EXPORT_SYMBOL_GPL(irq_wake_thread); + +-static void irq_setup_forced_threading(struct irqaction *new) ++static int irq_setup_forced_threading(struct irqaction *new) + { + if (!force_irqthreads) +- return; ++ return 0; + if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) +- return; ++ return 0; + + new->flags |= IRQF_ONESHOT; + +- if (!new->thread_fn) { +- set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); +- new->thread_fn = new->handler; +- new->handler = irq_default_primary_handler; +- } ++ /* ++ * Handle the case where we have a real primary handler and a ++ * thread handler. We force thread them as well by creating a ++ * secondary action. ++ */ ++ if (new->handler != irq_default_primary_handler && new->thread_fn) { ++ /* Allocate the secondary action */ ++ new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL); ++ if (!new->secondary) ++ return -ENOMEM; ++ new->secondary->handler = irq_forced_secondary_handler; ++ new->secondary->thread_fn = new->thread_fn; ++ new->secondary->dev_id = new->dev_id; ++ new->secondary->irq = new->irq; ++ new->secondary->name = new->name; ++ } ++ /* Deal with the primary handler */ ++ set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); ++ new->thread_fn = new->handler; ++ new->handler = irq_default_primary_handler; ++ return 0; + } + + static int irq_request_resources(struct irq_desc *desc) +@@ -984,6 +1110,48 @@ + c->irq_release_resources(d); + } + ++static int ++setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary) ++{ ++ struct task_struct *t; ++ struct sched_param param = { ++ .sched_priority = MAX_USER_RT_PRIO/2, ++ }; ++ ++ if (!secondary) { ++ t = kthread_create(irq_thread, new, "irq/%d-%s", irq, ++ new->name); ++ } else { ++ t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq, ++ new->name); ++ param.sched_priority += 1; ++ } ++ ++ if (IS_ERR(t)) ++ return PTR_ERR(t); ++ ++ sched_setscheduler_nocheck(t, SCHED_FIFO, ¶m); ++ ++ /* ++ * We keep the reference to the task struct even if ++ * the thread dies to avoid that the interrupt code ++ * references an already freed task_struct. ++ */ ++ get_task_struct(t); ++ new->thread = t; ++ /* ++ * Tell the thread to set its affinity. This is ++ * important for shared interrupt handlers as we do ++ * not invoke setup_affinity() for the secondary ++ * handlers as everything is already set up. Even for ++ * interrupts marked with IRQF_NO_BALANCE this is ++ * correct as we want the thread to move to the cpu(s) ++ * on which the requesting code placed the interrupt. ++ */ ++ set_bit(IRQTF_AFFINITY, &new->thread_flags); ++ return 0; ++} ++ + /* + * Internal function to register an irqaction - typically used to + * allocate special interrupts that are part of the architecture. +@@ -1004,6 +1172,8 @@ + if (!try_module_get(desc->owner)) + return -ENODEV; + ++ new->irq = irq; ++ + /* + * Check whether the interrupt nests into another interrupt + * thread. +@@ -1021,8 +1191,11 @@ + */ + new->handler = irq_nested_primary_handler; + } else { +- if (irq_settings_can_thread(desc)) +- irq_setup_forced_threading(new); ++ if (irq_settings_can_thread(desc)) { ++ ret = irq_setup_forced_threading(new); ++ if (ret) ++ goto out_mput; ++ } + } + + /* +@@ -1031,37 +1204,14 @@ + * thread. + */ + if (new->thread_fn && !nested) { +- struct task_struct *t; +- static const struct sched_param param = { +- .sched_priority = MAX_USER_RT_PRIO/2, +- }; +- +- t = kthread_create(irq_thread, new, "irq/%d-%s", irq, +- new->name); +- if (IS_ERR(t)) { +- ret = PTR_ERR(t); ++ ret = setup_irq_thread(new, irq, false); ++ if (ret) + goto out_mput; ++ if (new->secondary) { ++ ret = setup_irq_thread(new->secondary, irq, true); ++ if (ret) ++ goto out_thread; + } +- +- sched_setscheduler_nocheck(t, SCHED_FIFO, ¶m); +- +- /* +- * We keep the reference to the task struct even if +- * the thread dies to avoid that the interrupt code +- * references an already freed task_struct. +- */ +- get_task_struct(t); +- new->thread = t; +- /* +- * Tell the thread to set its affinity. This is +- * important for shared interrupt handlers as we do +- * not invoke setup_affinity() for the secondary +- * handlers as everything is already set up. Even for +- * interrupts marked with IRQF_NO_BALANCE this is +- * correct as we want the thread to move to the cpu(s) +- * on which the requesting code placed the interrupt. +- */ +- set_bit(IRQTF_AFFINITY, &new->thread_flags); + } + + if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { +@@ -1221,6 +1371,9 @@ + irqd_set(&desc->irq_data, IRQD_NO_BALANCING); + } + ++ if (new->flags & IRQF_NO_SOFTIRQ_CALL) ++ irq_settings_set_no_softirq_call(desc); ++ + /* Set default affinity mask once everything is setup */ + setup_affinity(irq, desc, mask); + +@@ -1234,7 +1387,6 @@ + irq, nmsk, omsk); + } + +- new->irq = irq; + *old_ptr = new; + + irq_pm_install_action(desc, new); +@@ -1260,6 +1412,8 @@ + */ + if (new->thread) + wake_up_process(new->thread); ++ if (new->secondary) ++ wake_up_process(new->secondary->thread); + + register_irq_proc(irq, desc); + new->dir = NULL; +@@ -1290,6 +1444,13 @@ + kthread_stop(t); + put_task_struct(t); + } ++ if (new->secondary && new->secondary->thread) { ++ struct task_struct *t = new->secondary->thread; ++ ++ new->secondary->thread = NULL; ++ kthread_stop(t); ++ put_task_struct(t); ++ } + out_mput: + module_put(desc->owner); + return ret; +@@ -1397,9 +1558,14 @@ + if (action->thread) { + kthread_stop(action->thread); + put_task_struct(action->thread); ++ if (action->secondary && action->secondary->thread) { ++ kthread_stop(action->secondary->thread); ++ put_task_struct(action->secondary->thread); ++ } + } + + module_put(desc->owner); ++ kfree(action->secondary); + return action; + } + +@@ -1543,8 +1709,10 @@ + retval = __setup_irq(irq, desc, action); + chip_bus_sync_unlock(desc); + +- if (retval) ++ if (retval) { ++ kfree(action->secondary); + kfree(action); ++ } + + #ifdef CONFIG_DEBUG_SHIRQ_FIXME + if (!retval && (irqflags & IRQF_SHARED)) { +diff -Nur linux-4.1.26.orig/kernel/irq/settings.h linux-4.1.26/kernel/irq/settings.h +--- linux-4.1.26.orig/kernel/irq/settings.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/irq/settings.h 2016-06-19 15:30:58.691297504 +0200 +@@ -15,6 +15,7 @@ + _IRQ_NESTED_THREAD = IRQ_NESTED_THREAD, + _IRQ_PER_CPU_DEVID = IRQ_PER_CPU_DEVID, + _IRQ_IS_POLLED = IRQ_IS_POLLED, ++ _IRQ_NO_SOFTIRQ_CALL = IRQ_NO_SOFTIRQ_CALL, + _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK, + }; + +@@ -28,6 +29,7 @@ + #define IRQ_NESTED_THREAD GOT_YOU_MORON + #define IRQ_PER_CPU_DEVID GOT_YOU_MORON + #define IRQ_IS_POLLED GOT_YOU_MORON ++#define IRQ_NO_SOFTIRQ_CALL GOT_YOU_MORON + #undef IRQF_MODIFY_MASK + #define IRQF_MODIFY_MASK GOT_YOU_MORON + +@@ -38,6 +40,16 @@ + desc->status_use_accessors |= (set & _IRQF_MODIFY_MASK); + } + ++static inline bool irq_settings_no_softirq_call(struct irq_desc *desc) ++{ ++ return desc->status_use_accessors & _IRQ_NO_SOFTIRQ_CALL; ++} ++ ++static inline void irq_settings_set_no_softirq_call(struct irq_desc *desc) ++{ ++ desc->status_use_accessors |= _IRQ_NO_SOFTIRQ_CALL; ++} ++ + static inline bool irq_settings_is_per_cpu(struct irq_desc *desc) + { + return desc->status_use_accessors & _IRQ_PER_CPU; +diff -Nur linux-4.1.26.orig/kernel/irq/spurious.c linux-4.1.26/kernel/irq/spurious.c +--- linux-4.1.26.orig/kernel/irq/spurious.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/irq/spurious.c 2016-06-19 15:30:58.691297504 +0200 +@@ -444,6 +444,10 @@ + + static int __init irqfixup_setup(char *str) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ pr_warn("irqfixup boot option not supported w/ CONFIG_PREEMPT_RT_BASE\n"); ++ return 1; ++#endif + irqfixup = 1; + printk(KERN_WARNING "Misrouted IRQ fixup support enabled.\n"); + printk(KERN_WARNING "This may impact system performance.\n"); +@@ -456,6 +460,10 @@ + + static int __init irqpoll_setup(char *str) + { ++#ifdef CONFIG_PREEMPT_RT_BASE ++ pr_warn("irqpoll boot option not supported w/ CONFIG_PREEMPT_RT_BASE\n"); ++ return 1; ++#endif + irqfixup = 2; + printk(KERN_WARNING "Misrouted IRQ fixup and polling support " + "enabled\n"); +diff -Nur linux-4.1.26.orig/kernel/irq_work.c linux-4.1.26/kernel/irq_work.c +--- linux-4.1.26.orig/kernel/irq_work.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/irq_work.c 2016-06-19 15:30:58.691297504 +0200 +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + + +@@ -65,6 +66,8 @@ + */ + bool irq_work_queue_on(struct irq_work *work, int cpu) + { ++ struct llist_head *list; ++ + /* All work should have been flushed before going offline */ + WARN_ON_ONCE(cpu_is_offline(cpu)); + +@@ -75,7 +78,12 @@ + if (!irq_work_claim(work)) + return false; + +- if (llist_add(&work->llnode, &per_cpu(raised_list, cpu))) ++ if (IS_ENABLED(CONFIG_PREEMPT_RT_FULL) && !(work->flags & IRQ_WORK_HARD_IRQ)) ++ list = &per_cpu(lazy_list, cpu); ++ else ++ list = &per_cpu(raised_list, cpu); ++ ++ if (llist_add(&work->llnode, list)) + arch_send_call_function_single_ipi(cpu); + + return true; +@@ -86,6 +94,9 @@ + /* Enqueue the irq work @work on the current CPU */ + bool irq_work_queue(struct irq_work *work) + { ++ struct llist_head *list; ++ bool lazy_work, realtime = IS_ENABLED(CONFIG_PREEMPT_RT_FULL); ++ + /* Only queue if not already pending */ + if (!irq_work_claim(work)) + return false; +@@ -93,13 +104,15 @@ + /* Queue the entry and raise the IPI if needed. */ + preempt_disable(); + +- /* If the work is "lazy", handle it from next tick if any */ +- if (work->flags & IRQ_WORK_LAZY) { +- if (llist_add(&work->llnode, this_cpu_ptr(&lazy_list)) && +- tick_nohz_tick_stopped()) +- arch_irq_work_raise(); +- } else { +- if (llist_add(&work->llnode, this_cpu_ptr(&raised_list))) ++ lazy_work = work->flags & IRQ_WORK_LAZY; ++ ++ if (lazy_work || (realtime && !(work->flags & IRQ_WORK_HARD_IRQ))) ++ list = this_cpu_ptr(&lazy_list); ++ else ++ list = this_cpu_ptr(&raised_list); ++ ++ if (llist_add(&work->llnode, list)) { ++ if (!lazy_work || tick_nohz_tick_stopped()) + arch_irq_work_raise(); + } + +@@ -116,9 +129,8 @@ + raised = this_cpu_ptr(&raised_list); + lazy = this_cpu_ptr(&lazy_list); + +- if (llist_empty(raised) || arch_irq_work_has_interrupt()) +- if (llist_empty(lazy)) +- return false; ++ if (llist_empty(raised) && llist_empty(lazy)) ++ return false; + + /* All work should have been flushed before going offline */ + WARN_ON_ONCE(cpu_is_offline(smp_processor_id())); +@@ -132,7 +144,7 @@ + struct irq_work *work; + struct llist_node *llnode; + +- BUG_ON(!irqs_disabled()); ++ BUG_ON_NONRT(!irqs_disabled()); + + if (llist_empty(list)) + return; +@@ -169,7 +181,16 @@ + void irq_work_run(void) + { + irq_work_run_list(this_cpu_ptr(&raised_list)); +- irq_work_run_list(this_cpu_ptr(&lazy_list)); ++ if (IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) { ++ /* ++ * NOTE: we raise softirq via IPI for safety, ++ * and execute in irq_work_tick() to move the ++ * overhead from hard to soft irq context. ++ */ ++ if (!llist_empty(this_cpu_ptr(&lazy_list))) ++ raise_softirq(TIMER_SOFTIRQ); ++ } else ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); + } + EXPORT_SYMBOL_GPL(irq_work_run); + +@@ -179,8 +200,17 @@ + + if (!llist_empty(raised) && !arch_irq_work_has_interrupt()) + irq_work_run_list(raised); ++ ++ if (!IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) ++ irq_work_run_list(this_cpu_ptr(&lazy_list)); ++} ++ ++#if defined(CONFIG_IRQ_WORK) && defined(CONFIG_PREEMPT_RT_FULL) ++void irq_work_tick_soft(void) ++{ + irq_work_run_list(this_cpu_ptr(&lazy_list)); + } ++#endif + + /* + * Synchronize against the irq_work @entry, ensures the entry is not +diff -Nur linux-4.1.26.orig/kernel/Kconfig.locks linux-4.1.26/kernel/Kconfig.locks +--- linux-4.1.26.orig/kernel/Kconfig.locks 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/Kconfig.locks 2016-06-19 15:30:58.683297195 +0200 +@@ -225,11 +225,11 @@ + + config MUTEX_SPIN_ON_OWNER + def_bool y +- depends on SMP && !DEBUG_MUTEXES && ARCH_SUPPORTS_ATOMIC_RMW ++ depends on SMP && !DEBUG_MUTEXES && ARCH_SUPPORTS_ATOMIC_RMW && !PREEMPT_RT_FULL + + config RWSEM_SPIN_ON_OWNER + def_bool y +- depends on SMP && RWSEM_XCHGADD_ALGORITHM && ARCH_SUPPORTS_ATOMIC_RMW ++ depends on SMP && RWSEM_XCHGADD_ALGORITHM && ARCH_SUPPORTS_ATOMIC_RMW && !PREEMPT_RT_FULL + + config LOCK_SPIN_ON_OWNER + def_bool y +diff -Nur linux-4.1.26.orig/kernel/Kconfig.preempt linux-4.1.26/kernel/Kconfig.preempt +--- linux-4.1.26.orig/kernel/Kconfig.preempt 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/Kconfig.preempt 2016-06-19 15:30:58.683297195 +0200 +@@ -1,3 +1,16 @@ ++config PREEMPT ++ bool ++ select PREEMPT_COUNT ++ ++config PREEMPT_RT_BASE ++ bool ++ select PREEMPT ++ ++config HAVE_PREEMPT_LAZY ++ bool ++ ++config PREEMPT_LAZY ++ def_bool y if HAVE_PREEMPT_LAZY && PREEMPT_RT_FULL + + choice + prompt "Preemption Model" +@@ -33,9 +46,9 @@ + + Select this if you are building a kernel for a desktop system. + +-config PREEMPT ++config PREEMPT__LL + bool "Preemptible Kernel (Low-Latency Desktop)" +- select PREEMPT_COUNT ++ select PREEMPT + select UNINLINE_SPIN_UNLOCK if !ARCH_INLINE_SPIN_UNLOCK + help + This option reduces the latency of the kernel by making +@@ -52,6 +65,22 @@ + embedded system with latency requirements in the milliseconds + range. + ++config PREEMPT_RTB ++ bool "Preemptible Kernel (Basic RT)" ++ select PREEMPT_RT_BASE ++ help ++ This option is basically the same as (Low-Latency Desktop) but ++ enables changes which are preliminary for the full preemptible ++ RT kernel. ++ ++config PREEMPT_RT_FULL ++ bool "Fully Preemptible Kernel (RT)" ++ depends on IRQ_FORCED_THREADING ++ select PREEMPT_RT_BASE ++ select PREEMPT_RCU ++ help ++ All and everything ++ + endchoice + + config PREEMPT_COUNT +diff -Nur linux-4.1.26.orig/kernel/ksysfs.c linux-4.1.26/kernel/ksysfs.c +--- linux-4.1.26.orig/kernel/ksysfs.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/ksysfs.c 2016-06-19 15:30:58.691297504 +0200 +@@ -136,6 +136,15 @@ + + #endif /* CONFIG_KEXEC */ + ++#if defined(CONFIG_PREEMPT_RT_FULL) ++static ssize_t realtime_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return sprintf(buf, "%d\n", 1); ++} ++KERNEL_ATTR_RO(realtime); ++#endif ++ + /* whether file capabilities are enabled */ + static ssize_t fscaps_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +@@ -203,6 +212,9 @@ + &vmcoreinfo_attr.attr, + #endif + &rcu_expedited_attr.attr, ++#ifdef CONFIG_PREEMPT_RT_FULL ++ &realtime_attr.attr, ++#endif + NULL + }; + +diff -Nur linux-4.1.26.orig/kernel/locking/lglock.c linux-4.1.26/kernel/locking/lglock.c +--- linux-4.1.26.orig/kernel/locking/lglock.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/lglock.c 2016-06-19 15:30:58.691297504 +0200 +@@ -4,6 +4,15 @@ + #include + #include + ++#ifndef CONFIG_PREEMPT_RT_FULL ++# define lg_lock_ptr arch_spinlock_t ++# define lg_do_lock(l) arch_spin_lock(l) ++# define lg_do_unlock(l) arch_spin_unlock(l) ++#else ++# define lg_lock_ptr struct rt_mutex ++# define lg_do_lock(l) __rt_spin_lock(l) ++# define lg_do_unlock(l) __rt_spin_unlock(l) ++#endif + /* + * Note there is no uninit, so lglocks cannot be defined in + * modules (but it's fine to use them from there) +@@ -12,51 +21,60 @@ + + void lg_lock_init(struct lglock *lg, char *name) + { ++#ifdef CONFIG_PREEMPT_RT_FULL ++ int i; ++ ++ for_each_possible_cpu(i) { ++ struct rt_mutex *lock = per_cpu_ptr(lg->lock, i); ++ ++ rt_mutex_init(lock); ++ } ++#endif + LOCKDEP_INIT_MAP(&lg->lock_dep_map, name, &lg->lock_key, 0); + } + EXPORT_SYMBOL(lg_lock_init); + + void lg_local_lock(struct lglock *lg) + { +- arch_spinlock_t *lock; ++ lg_lock_ptr *lock; + +- preempt_disable(); ++ migrate_disable(); + lock_acquire_shared(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); + lock = this_cpu_ptr(lg->lock); +- arch_spin_lock(lock); ++ lg_do_lock(lock); + } + EXPORT_SYMBOL(lg_local_lock); + + void lg_local_unlock(struct lglock *lg) + { +- arch_spinlock_t *lock; ++ lg_lock_ptr *lock; + + lock_release(&lg->lock_dep_map, 1, _RET_IP_); + lock = this_cpu_ptr(lg->lock); +- arch_spin_unlock(lock); +- preempt_enable(); ++ lg_do_unlock(lock); ++ migrate_enable(); + } + EXPORT_SYMBOL(lg_local_unlock); + + void lg_local_lock_cpu(struct lglock *lg, int cpu) + { +- arch_spinlock_t *lock; ++ lg_lock_ptr *lock; + +- preempt_disable(); ++ preempt_disable_nort(); + lock_acquire_shared(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); + lock = per_cpu_ptr(lg->lock, cpu); +- arch_spin_lock(lock); ++ lg_do_lock(lock); + } + EXPORT_SYMBOL(lg_local_lock_cpu); + + void lg_local_unlock_cpu(struct lglock *lg, int cpu) + { +- arch_spinlock_t *lock; ++ lg_lock_ptr *lock; + + lock_release(&lg->lock_dep_map, 1, _RET_IP_); + lock = per_cpu_ptr(lg->lock, cpu); +- arch_spin_unlock(lock); +- preempt_enable(); ++ lg_do_unlock(lock); ++ preempt_enable_nort(); + } + EXPORT_SYMBOL(lg_local_unlock_cpu); + +@@ -64,12 +82,12 @@ + { + int i; + +- preempt_disable(); ++ preempt_disable_nort(); + lock_acquire_exclusive(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); + for_each_possible_cpu(i) { +- arch_spinlock_t *lock; ++ lg_lock_ptr *lock; + lock = per_cpu_ptr(lg->lock, i); +- arch_spin_lock(lock); ++ lg_do_lock(lock); + } + } + EXPORT_SYMBOL(lg_global_lock); +@@ -80,10 +98,35 @@ + + lock_release(&lg->lock_dep_map, 1, _RET_IP_); + for_each_possible_cpu(i) { +- arch_spinlock_t *lock; ++ lg_lock_ptr *lock; + lock = per_cpu_ptr(lg->lock, i); +- arch_spin_unlock(lock); ++ lg_do_unlock(lock); + } +- preempt_enable(); ++ preempt_enable_nort(); + } + EXPORT_SYMBOL(lg_global_unlock); ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * HACK: If you use this, you get to keep the pieces. ++ * Used in queue_stop_cpus_work() when stop machinery ++ * is called from inactive CPU, so we can't schedule. ++ */ ++# define lg_do_trylock_relax(l) \ ++ do { \ ++ while (!__rt_spin_trylock(l)) \ ++ cpu_relax(); \ ++ } while (0) ++ ++void lg_global_trylock_relax(struct lglock *lg) ++{ ++ int i; ++ ++ lock_acquire_exclusive(&lg->lock_dep_map, 0, 0, NULL, _RET_IP_); ++ for_each_possible_cpu(i) { ++ lg_lock_ptr *lock; ++ lock = per_cpu_ptr(lg->lock, i); ++ lg_do_trylock_relax(lock); ++ } ++} ++#endif +diff -Nur linux-4.1.26.orig/kernel/locking/lockdep.c linux-4.1.26/kernel/locking/lockdep.c +--- linux-4.1.26.orig/kernel/locking/lockdep.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/lockdep.c 2016-06-19 15:30:58.691297504 +0200 +@@ -3563,6 +3563,7 @@ + } + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * We dont accurately track softirq state in e.g. + * hardirq contexts (such as on 4KSTACKS), so only +@@ -3577,6 +3578,7 @@ + DEBUG_LOCKS_WARN_ON(!current->softirqs_enabled); + } + } ++#endif + + if (!debug_locks) + print_irqtrace_events(current); +diff -Nur linux-4.1.26.orig/kernel/locking/locktorture.c linux-4.1.26/kernel/locking/locktorture.c +--- linux-4.1.26.orig/kernel/locking/locktorture.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/locktorture.c 2016-06-19 15:30:58.695297658 +0200 +@@ -24,7 +24,6 @@ + #include + #include + #include +-#include + #include + #include + #include +diff -Nur linux-4.1.26.orig/kernel/locking/Makefile linux-4.1.26/kernel/locking/Makefile +--- linux-4.1.26.orig/kernel/locking/Makefile 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/Makefile 2016-06-19 15:30:58.691297504 +0200 +@@ -1,5 +1,5 @@ + +-obj-y += mutex.o semaphore.o rwsem.o ++obj-y += semaphore.o + + ifdef CONFIG_FUNCTION_TRACER + CFLAGS_REMOVE_lockdep.o = $(CC_FLAGS_FTRACE) +@@ -8,7 +8,11 @@ + CFLAGS_REMOVE_rtmutex-debug.o = $(CC_FLAGS_FTRACE) + endif + ++ifneq ($(CONFIG_PREEMPT_RT_FULL),y) ++obj-y += mutex.o + obj-$(CONFIG_DEBUG_MUTEXES) += mutex-debug.o ++obj-y += rwsem.o ++endif + obj-$(CONFIG_LOCKDEP) += lockdep.o + ifeq ($(CONFIG_PROC_FS),y) + obj-$(CONFIG_LOCKDEP) += lockdep_proc.o +@@ -22,8 +26,11 @@ + obj-$(CONFIG_RT_MUTEX_TESTER) += rtmutex-tester.o + obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock.o + obj-$(CONFIG_DEBUG_SPINLOCK) += spinlock_debug.o ++ifneq ($(CONFIG_PREEMPT_RT_FULL),y) + obj-$(CONFIG_RWSEM_GENERIC_SPINLOCK) += rwsem-spinlock.o + obj-$(CONFIG_RWSEM_XCHGADD_ALGORITHM) += rwsem-xadd.o ++endif + obj-$(CONFIG_PERCPU_RWSEM) += percpu-rwsem.o ++obj-$(CONFIG_PREEMPT_RT_FULL) += rt.o + obj-$(CONFIG_QUEUE_RWLOCK) += qrwlock.o + obj-$(CONFIG_LOCK_TORTURE_TEST) += locktorture.o +diff -Nur linux-4.1.26.orig/kernel/locking/rt.c linux-4.1.26/kernel/locking/rt.c +--- linux-4.1.26.orig/kernel/locking/rt.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/kernel/locking/rt.c 2016-06-19 15:30:58.695297658 +0200 +@@ -0,0 +1,461 @@ ++/* ++ * kernel/rt.c ++ * ++ * Real-Time Preemption Support ++ * ++ * started by Ingo Molnar: ++ * ++ * Copyright (C) 2004-2006 Red Hat, Inc., Ingo Molnar ++ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner ++ * ++ * historic credit for proving that Linux spinlocks can be implemented via ++ * RT-aware mutexes goes to many people: The Pmutex project (Dirk Grambow ++ * and others) who prototyped it on 2.4 and did lots of comparative ++ * research and analysis; TimeSys, for proving that you can implement a ++ * fully preemptible kernel via the use of IRQ threading and mutexes; ++ * Bill Huey for persuasively arguing on lkml that the mutex model is the ++ * right one; and to MontaVista, who ported pmutexes to 2.6. ++ * ++ * This code is a from-scratch implementation and is not based on pmutexes, ++ * but the idea of converting spinlocks to mutexes is used here too. ++ * ++ * lock debugging, locking tree, deadlock detection: ++ * ++ * Copyright (C) 2004, LynuxWorks, Inc., Igor Manyilov, Bill Huey ++ * Released under the General Public License (GPL). ++ * ++ * Includes portions of the generic R/W semaphore implementation from: ++ * ++ * Copyright (c) 2001 David Howells (dhowells@redhat.com). ++ * - Derived partially from idea by Andrea Arcangeli ++ * - Derived also from comments by Linus ++ * ++ * Pending ownership of locks and ownership stealing: ++ * ++ * Copyright (C) 2005, Kihon Technologies Inc., Steven Rostedt ++ * ++ * (also by Steven Rostedt) ++ * - Converted single pi_lock to individual task locks. ++ * ++ * By Esben Nielsen: ++ * Doing priority inheritance with help of the scheduler. ++ * ++ * Copyright (C) 2006, Timesys Corp., Thomas Gleixner ++ * - major rework based on Esben Nielsens initial patch ++ * - replaced thread_info references by task_struct refs ++ * - removed task->pending_owner dependency ++ * - BKL drop/reacquire for semaphore style locks to avoid deadlocks ++ * in the scheduler return path as discussed with Steven Rostedt ++ * ++ * Copyright (C) 2006, Kihon Technologies Inc. ++ * Steven Rostedt ++ * - debugged and patched Thomas Gleixner's rework. ++ * - added back the cmpxchg to the rework. ++ * - turned atomic require back on for SMP. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "rtmutex_common.h" ++ ++/* ++ * struct mutex functions ++ */ ++void __mutex_do_init(struct mutex *mutex, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)mutex, sizeof(*mutex)); ++ lockdep_init_map(&mutex->dep_map, name, key, 0); ++#endif ++ mutex->lock.save_state = 0; ++} ++EXPORT_SYMBOL(__mutex_do_init); ++ ++void __lockfunc _mutex_lock(struct mutex *lock) ++{ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ rt_mutex_lock(&lock->lock); ++} ++EXPORT_SYMBOL(_mutex_lock); ++ ++int __lockfunc _mutex_lock_interruptible(struct mutex *lock) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ ret = rt_mutex_lock_interruptible(&lock->lock); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_interruptible); ++ ++int __lockfunc _mutex_lock_killable(struct mutex *lock) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++ ret = rt_mutex_lock_killable(&lock->lock); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_killable); ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++void __lockfunc _mutex_lock_nested(struct mutex *lock, int subclass) ++{ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ rt_mutex_lock(&lock->lock); ++} ++EXPORT_SYMBOL(_mutex_lock_nested); ++ ++void __lockfunc _mutex_lock_nest_lock(struct mutex *lock, struct lockdep_map *nest) ++{ ++ mutex_acquire_nest(&lock->dep_map, 0, 0, nest, _RET_IP_); ++ rt_mutex_lock(&lock->lock); ++} ++EXPORT_SYMBOL(_mutex_lock_nest_lock); ++ ++int __lockfunc _mutex_lock_interruptible_nested(struct mutex *lock, int subclass) ++{ ++ int ret; ++ ++ mutex_acquire_nest(&lock->dep_map, subclass, 0, NULL, _RET_IP_); ++ ret = rt_mutex_lock_interruptible(&lock->lock); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_interruptible_nested); ++ ++int __lockfunc _mutex_lock_killable_nested(struct mutex *lock, int subclass) ++{ ++ int ret; ++ ++ mutex_acquire(&lock->dep_map, subclass, 0, _RET_IP_); ++ ret = rt_mutex_lock_killable(&lock->lock); ++ if (ret) ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_lock_killable_nested); ++#endif ++ ++int __lockfunc _mutex_trylock(struct mutex *lock) ++{ ++ int ret = rt_mutex_trylock(&lock->lock); ++ ++ if (ret) ++ mutex_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ ++ return ret; ++} ++EXPORT_SYMBOL(_mutex_trylock); ++ ++void __lockfunc _mutex_unlock(struct mutex *lock) ++{ ++ mutex_release(&lock->dep_map, 1, _RET_IP_); ++ rt_mutex_unlock(&lock->lock); ++} ++EXPORT_SYMBOL(_mutex_unlock); ++ ++/* ++ * rwlock_t functions ++ */ ++int __lockfunc rt_write_trylock(rwlock_t *rwlock) ++{ ++ int ret; ++ ++ migrate_disable(); ++ ret = rt_mutex_trylock(&rwlock->lock); ++ if (ret) ++ rwlock_acquire(&rwlock->dep_map, 0, 1, _RET_IP_); ++ else ++ migrate_enable(); ++ ++ return ret; ++} ++EXPORT_SYMBOL(rt_write_trylock); ++ ++int __lockfunc rt_write_trylock_irqsave(rwlock_t *rwlock, unsigned long *flags) ++{ ++ int ret; ++ ++ *flags = 0; ++ ret = rt_write_trylock(rwlock); ++ return ret; ++} ++EXPORT_SYMBOL(rt_write_trylock_irqsave); ++ ++int __lockfunc rt_read_trylock(rwlock_t *rwlock) ++{ ++ struct rt_mutex *lock = &rwlock->lock; ++ int ret = 1; ++ ++ /* ++ * recursive read locks succeed when current owns the lock, ++ * but not when read_depth == 0 which means that the lock is ++ * write locked. ++ */ ++ if (rt_mutex_owner(lock) != current) { ++ migrate_disable(); ++ ret = rt_mutex_trylock(lock); ++ if (ret) ++ rwlock_acquire(&rwlock->dep_map, 0, 1, _RET_IP_); ++ else ++ migrate_enable(); ++ ++ } else if (!rwlock->read_depth) { ++ ret = 0; ++ } ++ ++ if (ret) ++ rwlock->read_depth++; ++ ++ return ret; ++} ++EXPORT_SYMBOL(rt_read_trylock); ++ ++void __lockfunc rt_write_lock(rwlock_t *rwlock) ++{ ++ rwlock_acquire(&rwlock->dep_map, 0, 0, _RET_IP_); ++ migrate_disable(); ++ __rt_spin_lock(&rwlock->lock); ++} ++EXPORT_SYMBOL(rt_write_lock); ++ ++void __lockfunc rt_read_lock(rwlock_t *rwlock) ++{ ++ struct rt_mutex *lock = &rwlock->lock; ++ ++ ++ /* ++ * recursive read locks succeed when current owns the lock ++ */ ++ if (rt_mutex_owner(lock) != current) { ++ migrate_disable(); ++ rwlock_acquire(&rwlock->dep_map, 0, 0, _RET_IP_); ++ __rt_spin_lock(lock); ++ } ++ rwlock->read_depth++; ++} ++ ++EXPORT_SYMBOL(rt_read_lock); ++ ++void __lockfunc rt_write_unlock(rwlock_t *rwlock) ++{ ++ /* NOTE: we always pass in '1' for nested, for simplicity */ ++ rwlock_release(&rwlock->dep_map, 1, _RET_IP_); ++ __rt_spin_unlock(&rwlock->lock); ++ migrate_enable(); ++} ++EXPORT_SYMBOL(rt_write_unlock); ++ ++void __lockfunc rt_read_unlock(rwlock_t *rwlock) ++{ ++ /* Release the lock only when read_depth is down to 0 */ ++ if (--rwlock->read_depth == 0) { ++ rwlock_release(&rwlock->dep_map, 1, _RET_IP_); ++ __rt_spin_unlock(&rwlock->lock); ++ migrate_enable(); ++ } ++} ++EXPORT_SYMBOL(rt_read_unlock); ++ ++unsigned long __lockfunc rt_write_lock_irqsave(rwlock_t *rwlock) ++{ ++ rt_write_lock(rwlock); ++ ++ return 0; ++} ++EXPORT_SYMBOL(rt_write_lock_irqsave); ++ ++unsigned long __lockfunc rt_read_lock_irqsave(rwlock_t *rwlock) ++{ ++ rt_read_lock(rwlock); ++ ++ return 0; ++} ++EXPORT_SYMBOL(rt_read_lock_irqsave); ++ ++void __rt_rwlock_init(rwlock_t *rwlock, char *name, struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)rwlock, sizeof(*rwlock)); ++ lockdep_init_map(&rwlock->dep_map, name, key, 0); ++#endif ++ rwlock->lock.save_state = 1; ++ rwlock->read_depth = 0; ++} ++EXPORT_SYMBOL(__rt_rwlock_init); ++ ++/* ++ * rw_semaphores ++ */ ++ ++void rt_up_write(struct rw_semaphore *rwsem) ++{ ++ rwsem_release(&rwsem->dep_map, 1, _RET_IP_); ++ rt_mutex_unlock(&rwsem->lock); ++} ++EXPORT_SYMBOL(rt_up_write); ++ ++void __rt_up_read(struct rw_semaphore *rwsem) ++{ ++ if (--rwsem->read_depth == 0) ++ rt_mutex_unlock(&rwsem->lock); ++} ++ ++void rt_up_read(struct rw_semaphore *rwsem) ++{ ++ rwsem_release(&rwsem->dep_map, 1, _RET_IP_); ++ __rt_up_read(rwsem); ++} ++EXPORT_SYMBOL(rt_up_read); ++ ++/* ++ * downgrade a write lock into a read lock ++ * - just wake up any readers at the front of the queue ++ */ ++void rt_downgrade_write(struct rw_semaphore *rwsem) ++{ ++ BUG_ON(rt_mutex_owner(&rwsem->lock) != current); ++ rwsem->read_depth = 1; ++} ++EXPORT_SYMBOL(rt_downgrade_write); ++ ++int rt_down_write_trylock(struct rw_semaphore *rwsem) ++{ ++ int ret = rt_mutex_trylock(&rwsem->lock); ++ ++ if (ret) ++ rwsem_acquire(&rwsem->dep_map, 0, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(rt_down_write_trylock); ++ ++void rt_down_write(struct rw_semaphore *rwsem) ++{ ++ rwsem_acquire(&rwsem->dep_map, 0, 0, _RET_IP_); ++ rt_mutex_lock(&rwsem->lock); ++} ++EXPORT_SYMBOL(rt_down_write); ++ ++void rt_down_write_nested(struct rw_semaphore *rwsem, int subclass) ++{ ++ rwsem_acquire(&rwsem->dep_map, subclass, 0, _RET_IP_); ++ rt_mutex_lock(&rwsem->lock); ++} ++EXPORT_SYMBOL(rt_down_write_nested); ++ ++void rt_down_write_nested_lock(struct rw_semaphore *rwsem, ++ struct lockdep_map *nest) ++{ ++ rwsem_acquire_nest(&rwsem->dep_map, 0, 0, nest, _RET_IP_); ++ rt_mutex_lock(&rwsem->lock); ++} ++EXPORT_SYMBOL(rt_down_write_nested_lock); ++ ++int rt_down_read_trylock(struct rw_semaphore *rwsem) ++{ ++ struct rt_mutex *lock = &rwsem->lock; ++ int ret = 1; ++ ++ /* ++ * recursive read locks succeed when current owns the rwsem, ++ * but not when read_depth == 0 which means that the rwsem is ++ * write locked. ++ */ ++ if (rt_mutex_owner(lock) != current) ++ ret = rt_mutex_trylock(&rwsem->lock); ++ else if (!rwsem->read_depth) ++ ret = 0; ++ ++ if (ret) { ++ rwsem->read_depth++; ++ rwsem_acquire(&rwsem->dep_map, 0, 1, _RET_IP_); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_down_read_trylock); ++ ++static void __rt_down_read(struct rw_semaphore *rwsem, int subclass) ++{ ++ struct rt_mutex *lock = &rwsem->lock; ++ ++ rwsem_acquire_read(&rwsem->dep_map, subclass, 0, _RET_IP_); ++ ++ if (rt_mutex_owner(lock) != current) ++ rt_mutex_lock(&rwsem->lock); ++ rwsem->read_depth++; ++} ++ ++void rt_down_read(struct rw_semaphore *rwsem) ++{ ++ __rt_down_read(rwsem, 0); ++} ++EXPORT_SYMBOL(rt_down_read); ++ ++void rt_down_read_nested(struct rw_semaphore *rwsem, int subclass) ++{ ++ __rt_down_read(rwsem, subclass); ++} ++EXPORT_SYMBOL(rt_down_read_nested); ++ ++void __rt_rwsem_init(struct rw_semaphore *rwsem, const char *name, ++ struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)rwsem, sizeof(*rwsem)); ++ lockdep_init_map(&rwsem->dep_map, name, key, 0); ++#endif ++ rwsem->read_depth = 0; ++ rwsem->lock.save_state = 0; ++} ++EXPORT_SYMBOL(__rt_rwsem_init); ++ ++/** ++ * atomic_dec_and_mutex_lock - return holding mutex if we dec to 0 ++ * @cnt: the atomic which we are to dec ++ * @lock: the mutex to return holding if we dec to 0 ++ * ++ * return true and hold lock if we dec to 0, return false otherwise ++ */ ++int atomic_dec_and_mutex_lock(atomic_t *cnt, struct mutex *lock) ++{ ++ /* dec if we can't possibly hit 0 */ ++ if (atomic_add_unless(cnt, -1, 1)) ++ return 0; ++ /* we might hit 0, so take the lock */ ++ mutex_lock(lock); ++ if (!atomic_dec_and_test(cnt)) { ++ /* when we actually did the dec, we didn't hit 0 */ ++ mutex_unlock(lock); ++ return 0; ++ } ++ /* we hit 0, and we hold the lock */ ++ return 1; ++} ++EXPORT_SYMBOL(atomic_dec_and_mutex_lock); +diff -Nur linux-4.1.26.orig/kernel/locking/rtmutex.c linux-4.1.26/kernel/locking/rtmutex.c +--- linux-4.1.26.orig/kernel/locking/rtmutex.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/rtmutex.c 2016-06-19 15:30:58.695297658 +0200 +@@ -7,6 +7,11 @@ + * Copyright (C) 2005-2006 Timesys Corp., Thomas Gleixner + * Copyright (C) 2005 Kihon Technologies Inc., Steven Rostedt + * Copyright (C) 2006 Esben Nielsen ++ * Adaptive Spinlocks: ++ * Copyright (C) 2008 Novell, Inc., Gregory Haskins, Sven Dietrich, ++ * and Peter Morreale, ++ * Adaptive Spinlocks simplification: ++ * Copyright (C) 2008 Red Hat, Inc., Steven Rostedt + * + * See Documentation/locking/rt-mutex-design.txt for details. + */ +@@ -16,6 +21,7 @@ + #include + #include + #include ++#include + + #include "rtmutex_common.h" + +@@ -69,6 +75,12 @@ + clear_rt_mutex_waiters(lock); + } + ++static int rt_mutex_real_waiter(struct rt_mutex_waiter *waiter) ++{ ++ return waiter && waiter != PI_WAKEUP_INPROGRESS && ++ waiter != PI_REQUEUE_INPROGRESS; ++} ++ + /* + * We can speed up the acquire/release, if the architecture + * supports cmpxchg and if there's no debugging state to be set up +@@ -300,7 +312,7 @@ + * of task. We do not use the spin_xx_mutex() variants here as we are + * outside of the debug path.) + */ +-static void rt_mutex_adjust_prio(struct task_struct *task) ++void rt_mutex_adjust_prio(struct task_struct *task) + { + unsigned long flags; + +@@ -335,6 +347,14 @@ + return debug_rt_mutex_detect_deadlock(waiter, chwalk); + } + ++static void rt_mutex_wake_waiter(struct rt_mutex_waiter *waiter) ++{ ++ if (waiter->savestate) ++ wake_up_lock_sleeper(waiter->task); ++ else ++ wake_up_process(waiter->task); ++} ++ + /* + * Max number of times we'll walk the boosting chain: + */ +@@ -342,7 +362,8 @@ + + static inline struct rt_mutex *task_blocked_on_lock(struct task_struct *p) + { +- return p->pi_blocked_on ? p->pi_blocked_on->lock : NULL; ++ return rt_mutex_real_waiter(p->pi_blocked_on) ? ++ p->pi_blocked_on->lock : NULL; + } + + /* +@@ -479,7 +500,7 @@ + * reached or the state of the chain has changed while we + * dropped the locks. + */ +- if (!waiter) ++ if (!rt_mutex_real_waiter(waiter)) + goto out_unlock_pi; + + /* +@@ -641,13 +662,16 @@ + * follow here. This is the end of the chain we are walking. + */ + if (!rt_mutex_owner(lock)) { ++ struct rt_mutex_waiter *lock_top_waiter; ++ + /* + * If the requeue [7] above changed the top waiter, + * then we need to wake the new top waiter up to try + * to get the lock. + */ +- if (prerequeue_top_waiter != rt_mutex_top_waiter(lock)) +- wake_up_process(rt_mutex_top_waiter(lock)->task); ++ lock_top_waiter = rt_mutex_top_waiter(lock); ++ if (prerequeue_top_waiter != lock_top_waiter) ++ rt_mutex_wake_waiter(lock_top_waiter); + raw_spin_unlock(&lock->wait_lock); + return 0; + } +@@ -740,6 +764,25 @@ + return ret; + } + ++ ++#define STEAL_NORMAL 0 ++#define STEAL_LATERAL 1 ++ ++/* ++ * Note that RT tasks are excluded from lateral-steals to prevent the ++ * introduction of an unbounded latency ++ */ ++static inline int lock_is_stealable(struct task_struct *task, ++ struct task_struct *pendowner, int mode) ++{ ++ if (mode == STEAL_NORMAL || rt_task(task)) { ++ if (task->prio >= pendowner->prio) ++ return 0; ++ } else if (task->prio > pendowner->prio) ++ return 0; ++ return 1; ++} ++ + /* + * Try to take an rt-mutex + * +@@ -750,8 +793,9 @@ + * @waiter: The waiter that is queued to the lock's wait list if the + * callsite called task_blocked_on_lock(), otherwise NULL + */ +-static int try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, +- struct rt_mutex_waiter *waiter) ++static int __try_to_take_rt_mutex(struct rt_mutex *lock, ++ struct task_struct *task, ++ struct rt_mutex_waiter *waiter, int mode) + { + unsigned long flags; + +@@ -790,8 +834,10 @@ + * If waiter is not the highest priority waiter of + * @lock, give up. + */ +- if (waiter != rt_mutex_top_waiter(lock)) ++ if (waiter != rt_mutex_top_waiter(lock)) { ++ /* XXX lock_is_stealable() ? */ + return 0; ++ } + + /* + * We can acquire the lock. Remove the waiter from the +@@ -809,14 +855,10 @@ + * not need to be dequeued. + */ + if (rt_mutex_has_waiters(lock)) { +- /* +- * If @task->prio is greater than or equal to +- * the top waiter priority (kernel view), +- * @task lost. +- */ +- if (task->prio >= rt_mutex_top_waiter(lock)->prio) +- return 0; ++ struct task_struct *pown = rt_mutex_top_waiter(lock)->task; + ++ if (task != pown && !lock_is_stealable(task, pown, mode)) ++ return 0; + /* + * The current top waiter stays enqueued. We + * don't have to change anything in the lock +@@ -865,6 +907,347 @@ + return 1; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * preemptible spin_lock functions: ++ */ ++static inline void rt_spin_lock_fastlock(struct rt_mutex *lock, ++ void (*slowfn)(struct rt_mutex *lock)) ++{ ++ might_sleep_no_state_check(); ++ ++ if (likely(rt_mutex_cmpxchg(lock, NULL, current))) ++ rt_mutex_deadlock_account_lock(lock, current); ++ else ++ slowfn(lock); ++} ++ ++static inline void rt_spin_lock_fastunlock(struct rt_mutex *lock, ++ void (*slowfn)(struct rt_mutex *lock)) ++{ ++ if (likely(rt_mutex_cmpxchg(lock, current, NULL))) ++ rt_mutex_deadlock_account_unlock(current); ++ else ++ slowfn(lock); ++} ++#ifdef CONFIG_SMP ++/* ++ * Note that owner is a speculative pointer and dereferencing relies ++ * on rcu_read_lock() and the check against the lock owner. ++ */ ++static int adaptive_wait(struct rt_mutex *lock, ++ struct task_struct *owner) ++{ ++ int res = 0; ++ ++ rcu_read_lock(); ++ for (;;) { ++ if (owner != rt_mutex_owner(lock)) ++ break; ++ /* ++ * Ensure that owner->on_cpu is dereferenced _after_ ++ * checking the above to be valid. ++ */ ++ barrier(); ++ if (!owner->on_cpu) { ++ res = 1; ++ break; ++ } ++ cpu_relax(); ++ } ++ rcu_read_unlock(); ++ return res; ++} ++#else ++static int adaptive_wait(struct rt_mutex *lock, ++ struct task_struct *orig_owner) ++{ ++ return 1; ++} ++#endif ++ ++# define pi_lock(lock) raw_spin_lock_irq(lock) ++# define pi_unlock(lock) raw_spin_unlock_irq(lock) ++ ++static int task_blocks_on_rt_mutex(struct rt_mutex *lock, ++ struct rt_mutex_waiter *waiter, ++ struct task_struct *task, ++ enum rtmutex_chainwalk chwalk); ++/* ++ * Slow path lock function spin_lock style: this variant is very ++ * careful not to miss any non-lock wakeups. ++ * ++ * We store the current state under p->pi_lock in p->saved_state and ++ * the try_to_wake_up() code handles this accordingly. ++ */ ++static void noinline __sched rt_spin_lock_slowlock(struct rt_mutex *lock) ++{ ++ struct task_struct *lock_owner, *self = current; ++ struct rt_mutex_waiter waiter, *top_waiter; ++ int ret; ++ ++ rt_mutex_init_waiter(&waiter, true); ++ ++ raw_spin_lock(&lock->wait_lock); ++ ++ if (__try_to_take_rt_mutex(lock, self, NULL, STEAL_LATERAL)) { ++ raw_spin_unlock(&lock->wait_lock); ++ return; ++ } ++ ++ BUG_ON(rt_mutex_owner(lock) == self); ++ ++ /* ++ * We save whatever state the task is in and we'll restore it ++ * after acquiring the lock taking real wakeups into account ++ * as well. We are serialized via pi_lock against wakeups. See ++ * try_to_wake_up(). ++ */ ++ pi_lock(&self->pi_lock); ++ self->saved_state = self->state; ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ pi_unlock(&self->pi_lock); ++ ++ ret = task_blocks_on_rt_mutex(lock, &waiter, self, RT_MUTEX_MIN_CHAINWALK); ++ BUG_ON(ret); ++ ++ for (;;) { ++ /* Try to acquire the lock again. */ ++ if (__try_to_take_rt_mutex(lock, self, &waiter, STEAL_LATERAL)) ++ break; ++ ++ top_waiter = rt_mutex_top_waiter(lock); ++ lock_owner = rt_mutex_owner(lock); ++ ++ raw_spin_unlock(&lock->wait_lock); ++ ++ debug_rt_mutex_print_deadlock(&waiter); ++ ++ if (top_waiter != &waiter || adaptive_wait(lock, lock_owner)) ++ schedule_rt_mutex(lock); ++ ++ raw_spin_lock(&lock->wait_lock); ++ ++ pi_lock(&self->pi_lock); ++ __set_current_state_no_track(TASK_UNINTERRUPTIBLE); ++ pi_unlock(&self->pi_lock); ++ } ++ ++ /* ++ * Restore the task state to current->saved_state. We set it ++ * to the original state above and the try_to_wake_up() code ++ * has possibly updated it when a real (non-rtmutex) wakeup ++ * happened while we were blocked. Clear saved_state so ++ * try_to_wakeup() does not get confused. ++ */ ++ pi_lock(&self->pi_lock); ++ __set_current_state_no_track(self->saved_state); ++ self->saved_state = TASK_RUNNING; ++ pi_unlock(&self->pi_lock); ++ ++ /* ++ * try_to_take_rt_mutex() sets the waiter bit ++ * unconditionally. We might have to fix that up: ++ */ ++ fixup_rt_mutex_waiters(lock); ++ ++ BUG_ON(rt_mutex_has_waiters(lock) && &waiter == rt_mutex_top_waiter(lock)); ++ BUG_ON(!RB_EMPTY_NODE(&waiter.tree_entry)); ++ ++ raw_spin_unlock(&lock->wait_lock); ++ ++ debug_rt_mutex_free_waiter(&waiter); ++} ++ ++static void wakeup_next_waiter(struct rt_mutex *lock); ++/* ++ * Slow path to release a rt_mutex spin_lock style ++ */ ++static void noinline __sched rt_spin_lock_slowunlock(struct rt_mutex *lock) ++{ ++ raw_spin_lock(&lock->wait_lock); ++ ++ debug_rt_mutex_unlock(lock); ++ ++ rt_mutex_deadlock_account_unlock(current); ++ ++ if (!rt_mutex_has_waiters(lock)) { ++ lock->owner = NULL; ++ raw_spin_unlock(&lock->wait_lock); ++ return; ++ } ++ ++ wakeup_next_waiter(lock); ++ ++ raw_spin_unlock(&lock->wait_lock); ++ ++ /* Undo pi boosting.when necessary */ ++ rt_mutex_adjust_prio(current); ++} ++ ++void __lockfunc rt_spin_lock(spinlock_t *lock) ++{ ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++ spin_acquire(&lock->dep_map, 0, 0, _RET_IP_); ++} ++EXPORT_SYMBOL(rt_spin_lock); ++ ++void __lockfunc __rt_spin_lock(struct rt_mutex *lock) ++{ ++ rt_spin_lock_fastlock(lock, rt_spin_lock_slowlock); ++} ++EXPORT_SYMBOL(__rt_spin_lock); ++ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++void __lockfunc rt_spin_lock_nested(spinlock_t *lock, int subclass) ++{ ++ rt_spin_lock_fastlock(&lock->lock, rt_spin_lock_slowlock); ++ spin_acquire(&lock->dep_map, subclass, 0, _RET_IP_); ++} ++EXPORT_SYMBOL(rt_spin_lock_nested); ++#endif ++ ++void __lockfunc rt_spin_unlock(spinlock_t *lock) ++{ ++ /* NOTE: we always pass in '1' for nested, for simplicity */ ++ spin_release(&lock->dep_map, 1, _RET_IP_); ++ rt_spin_lock_fastunlock(&lock->lock, rt_spin_lock_slowunlock); ++} ++EXPORT_SYMBOL(rt_spin_unlock); ++ ++void __lockfunc __rt_spin_unlock(struct rt_mutex *lock) ++{ ++ rt_spin_lock_fastunlock(lock, rt_spin_lock_slowunlock); ++} ++EXPORT_SYMBOL(__rt_spin_unlock); ++ ++/* ++ * Wait for the lock to get unlocked: instead of polling for an unlock ++ * (like raw spinlocks do), we lock and unlock, to force the kernel to ++ * schedule if there's contention: ++ */ ++void __lockfunc rt_spin_unlock_wait(spinlock_t *lock) ++{ ++ spin_lock(lock); ++ spin_unlock(lock); ++} ++EXPORT_SYMBOL(rt_spin_unlock_wait); ++ ++int __lockfunc __rt_spin_trylock(struct rt_mutex *lock) ++{ ++ return rt_mutex_trylock(lock); ++} ++ ++int __lockfunc rt_spin_trylock(spinlock_t *lock) ++{ ++ int ret = rt_mutex_trylock(&lock->lock); ++ ++ if (ret) ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock); ++ ++int __lockfunc rt_spin_trylock_bh(spinlock_t *lock) ++{ ++ int ret; ++ ++ local_bh_disable(); ++ ret = rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ migrate_disable(); ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ } else ++ local_bh_enable(); ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock_bh); ++ ++int __lockfunc rt_spin_trylock_irqsave(spinlock_t *lock, unsigned long *flags) ++{ ++ int ret; ++ ++ *flags = 0; ++ ret = rt_mutex_trylock(&lock->lock); ++ if (ret) { ++ migrate_disable(); ++ spin_acquire(&lock->dep_map, 0, 1, _RET_IP_); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(rt_spin_trylock_irqsave); ++ ++int atomic_dec_and_spin_lock(atomic_t *atomic, spinlock_t *lock) ++{ ++ /* Subtract 1 from counter unless that drops it to 0 (ie. it was 1) */ ++ if (atomic_add_unless(atomic, -1, 1)) ++ return 0; ++ migrate_disable(); ++ rt_spin_lock(lock); ++ if (atomic_dec_and_test(atomic)) ++ return 1; ++ rt_spin_unlock(lock); ++ migrate_enable(); ++ return 0; ++} ++EXPORT_SYMBOL(atomic_dec_and_spin_lock); ++ ++ void ++__rt_spin_lock_init(spinlock_t *lock, char *name, struct lock_class_key *key) ++{ ++#ifdef CONFIG_DEBUG_LOCK_ALLOC ++ /* ++ * Make sure we are not reinitializing a held lock: ++ */ ++ debug_check_no_locks_freed((void *)lock, sizeof(*lock)); ++ lockdep_init_map(&lock->dep_map, name, key, 0); ++#endif ++} ++EXPORT_SYMBOL(__rt_spin_lock_init); ++ ++#endif /* PREEMPT_RT_FULL */ ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ static inline int __sched ++__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); ++ struct ww_acquire_ctx *hold_ctx = ACCESS_ONCE(ww->ctx); ++ ++ if (!hold_ctx) ++ return 0; ++ ++ if (unlikely(ctx == hold_ctx)) ++ return -EALREADY; ++ ++ if (ctx->stamp - hold_ctx->stamp <= LONG_MAX && ++ (ctx->stamp != hold_ctx->stamp || ctx > hold_ctx)) { ++#ifdef CONFIG_DEBUG_MUTEXES ++ DEBUG_LOCKS_WARN_ON(ctx->contending_lock); ++ ctx->contending_lock = ww; ++#endif ++ return -EDEADLK; ++ } ++ ++ return 0; ++} ++#else ++ static inline int __sched ++__mutex_lock_check_stamp(struct rt_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++ BUG(); ++ return 0; ++} ++ ++#endif ++ ++static inline int ++try_to_take_rt_mutex(struct rt_mutex *lock, struct task_struct *task, ++ struct rt_mutex_waiter *waiter) ++{ ++ return __try_to_take_rt_mutex(lock, task, waiter, STEAL_NORMAL); ++} ++ + /* + * Task blocks on lock. + * +@@ -896,6 +1279,23 @@ + return -EDEADLK; + + raw_spin_lock_irqsave(&task->pi_lock, flags); ++ ++ /* ++ * In the case of futex requeue PI, this will be a proxy ++ * lock. The task will wake unaware that it is enqueueed on ++ * this lock. Avoid blocking on two locks and corrupting ++ * pi_blocked_on via the PI_WAKEUP_INPROGRESS ++ * flag. futex_wait_requeue_pi() sets this when it wakes up ++ * before requeue (due to a signal or timeout). Do not enqueue ++ * the task if PI_WAKEUP_INPROGRESS is set. ++ */ ++ if (task != current && task->pi_blocked_on == PI_WAKEUP_INPROGRESS) { ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); ++ return -EAGAIN; ++ } ++ ++ BUG_ON(rt_mutex_real_waiter(task->pi_blocked_on)); ++ + __rt_mutex_adjust_prio(task); + waiter->task = task; + waiter->lock = lock; +@@ -919,7 +1319,7 @@ + rt_mutex_enqueue_pi(owner, waiter); + + __rt_mutex_adjust_prio(owner); +- if (owner->pi_blocked_on) ++ if (rt_mutex_real_waiter(owner->pi_blocked_on)) + chain_walk = 1; + } else if (rt_mutex_cond_detect_deadlock(waiter, chwalk)) { + chain_walk = 1; +@@ -957,8 +1357,9 @@ + /* + * Wake up the next waiter on the lock. + * +- * Remove the top waiter from the current tasks pi waiter list and +- * wake it up. ++ * Remove the top waiter from the current tasks pi waiter list, ++ * wake it up and return whether the current task needs to undo ++ * a potential priority boosting. + * + * Called with lock->wait_lock held. + */ +@@ -996,7 +1397,7 @@ + * long as we hold lock->wait_lock. The waiter task needs to + * acquire it in order to dequeue the waiter. + */ +- wake_up_process(waiter->task); ++ rt_mutex_wake_waiter(waiter); + } + + /* +@@ -1010,7 +1411,7 @@ + { + bool is_top_waiter = (waiter == rt_mutex_top_waiter(lock)); + struct task_struct *owner = rt_mutex_owner(lock); +- struct rt_mutex *next_lock; ++ struct rt_mutex *next_lock = NULL; + unsigned long flags; + + raw_spin_lock_irqsave(¤t->pi_lock, flags); +@@ -1035,7 +1436,8 @@ + __rt_mutex_adjust_prio(owner); + + /* Store the lock on which owner is blocked or NULL */ +- next_lock = task_blocked_on_lock(owner); ++ if (rt_mutex_real_waiter(owner->pi_blocked_on)) ++ next_lock = task_blocked_on_lock(owner); + + raw_spin_unlock_irqrestore(&owner->pi_lock, flags); + +@@ -1071,17 +1473,17 @@ + raw_spin_lock_irqsave(&task->pi_lock, flags); + + waiter = task->pi_blocked_on; +- if (!waiter || (waiter->prio == task->prio && ++ if (!rt_mutex_real_waiter(waiter) || (waiter->prio == task->prio && + !dl_prio(task->prio))) { + raw_spin_unlock_irqrestore(&task->pi_lock, flags); + return; + } + next_lock = waiter->lock; +- raw_spin_unlock_irqrestore(&task->pi_lock, flags); + + /* gets dropped in rt_mutex_adjust_prio_chain()! */ + get_task_struct(task); + ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); + rt_mutex_adjust_prio_chain(task, RT_MUTEX_MIN_CHAINWALK, NULL, + next_lock, NULL, task); + } +@@ -1099,7 +1501,8 @@ + static int __sched + __rt_mutex_slowlock(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- struct rt_mutex_waiter *waiter) ++ struct rt_mutex_waiter *waiter, ++ struct ww_acquire_ctx *ww_ctx) + { + int ret = 0; + +@@ -1122,6 +1525,12 @@ + break; + } + ++ if (ww_ctx && ww_ctx->acquired > 0) { ++ ret = __mutex_lock_check_stamp(lock, ww_ctx); ++ if (ret) ++ break; ++ } ++ + raw_spin_unlock(&lock->wait_lock); + + debug_rt_mutex_print_deadlock(waiter); +@@ -1156,25 +1565,102 @@ + } + } + ++static __always_inline void ww_mutex_lock_acquired(struct ww_mutex *ww, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++#ifdef CONFIG_DEBUG_MUTEXES ++ /* ++ * If this WARN_ON triggers, you used ww_mutex_lock to acquire, ++ * but released with a normal mutex_unlock in this call. ++ * ++ * This should never happen, always use ww_mutex_unlock. ++ */ ++ DEBUG_LOCKS_WARN_ON(ww->ctx); ++ ++ /* ++ * Not quite done after calling ww_acquire_done() ? ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->done_acquire); ++ ++ if (ww_ctx->contending_lock) { ++ /* ++ * After -EDEADLK you tried to ++ * acquire a different ww_mutex? Bad! ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->contending_lock != ww); ++ ++ /* ++ * You called ww_mutex_lock after receiving -EDEADLK, ++ * but 'forgot' to unlock everything else first? ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->acquired > 0); ++ ww_ctx->contending_lock = NULL; ++ } ++ ++ /* ++ * Naughty, using a different class will lead to undefined behavior! ++ */ ++ DEBUG_LOCKS_WARN_ON(ww_ctx->ww_class != ww->ww_class); ++#endif ++ ww_ctx->acquired++; ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void ww_mutex_account_lock(struct rt_mutex *lock, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ struct ww_mutex *ww = container_of(lock, struct ww_mutex, base.lock); ++ struct rt_mutex_waiter *waiter, *n; ++ ++ /* ++ * This branch gets optimized out for the common case, ++ * and is only important for ww_mutex_lock. ++ */ ++ ww_mutex_lock_acquired(ww, ww_ctx); ++ ww->ctx = ww_ctx; ++ ++ /* ++ * Give any possible sleeping processes the chance to wake up, ++ * so they can recheck if they have to back off. ++ */ ++ rbtree_postorder_for_each_entry_safe(waiter, n, &lock->waiters, ++ tree_entry) { ++ /* XXX debug rt mutex waiter wakeup */ ++ ++ BUG_ON(waiter->lock != lock); ++ rt_mutex_wake_waiter(waiter); ++ } ++} ++ ++#else ++ ++static void ww_mutex_account_lock(struct rt_mutex *lock, ++ struct ww_acquire_ctx *ww_ctx) ++{ ++ BUG(); ++} ++#endif ++ + /* + * Slow path lock function: + */ + static int __sched + rt_mutex_slowlock(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk) ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx) + { + struct rt_mutex_waiter waiter; + int ret = 0; + +- debug_rt_mutex_init_waiter(&waiter); +- RB_CLEAR_NODE(&waiter.pi_tree_entry); +- RB_CLEAR_NODE(&waiter.tree_entry); ++ rt_mutex_init_waiter(&waiter, false); + + raw_spin_lock(&lock->wait_lock); + + /* Try to acquire the lock again: */ + if (try_to_take_rt_mutex(lock, current, NULL)) { ++ if (ww_ctx) ++ ww_mutex_account_lock(lock, ww_ctx); + raw_spin_unlock(&lock->wait_lock); + return 0; + } +@@ -1192,13 +1678,23 @@ + + if (likely(!ret)) + /* sleep on the mutex */ +- ret = __rt_mutex_slowlock(lock, state, timeout, &waiter); ++ ret = __rt_mutex_slowlock(lock, state, timeout, &waiter, ++ ww_ctx); ++ else if (ww_ctx) { ++ /* ww_mutex received EDEADLK, let it become EALREADY */ ++ ret = __mutex_lock_check_stamp(lock, ww_ctx); ++ BUG_ON(!ret); ++ } + + if (unlikely(ret)) { + __set_current_state(TASK_RUNNING); + if (rt_mutex_has_waiters(lock)) + remove_waiter(lock, &waiter); +- rt_mutex_handle_deadlock(ret, chwalk, &waiter); ++ /* ww_mutex want to report EDEADLK/EALREADY, let them */ ++ if (!ww_ctx) ++ rt_mutex_handle_deadlock(ret, chwalk, &waiter); ++ } else if (ww_ctx) { ++ ww_mutex_account_lock(lock, ww_ctx); + } + + /* +@@ -1255,7 +1751,7 @@ + /* + * Slow path to release a rt-mutex: + */ +-static void __sched ++static bool __sched + rt_mutex_slowunlock(struct rt_mutex *lock) + { + raw_spin_lock(&lock->wait_lock); +@@ -1298,7 +1794,7 @@ + while (!rt_mutex_has_waiters(lock)) { + /* Drops lock->wait_lock ! */ + if (unlock_rt_mutex_safe(lock) == true) +- return; ++ return false; + /* Relock the rtmutex and try again */ + raw_spin_lock(&lock->wait_lock); + } +@@ -1311,8 +1807,7 @@ + + raw_spin_unlock(&lock->wait_lock); + +- /* Undo pi boosting if necessary: */ +- rt_mutex_adjust_prio(current); ++ return true; + } + + /* +@@ -1323,31 +1818,36 @@ + */ + static inline int + rt_mutex_fastlock(struct rt_mutex *lock, int state, ++ struct ww_acquire_ctx *ww_ctx, + int (*slowfn)(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk)) ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx)) + { + if (likely(rt_mutex_cmpxchg(lock, NULL, current))) { + rt_mutex_deadlock_account_lock(lock, current); + return 0; + } else +- return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK); ++ return slowfn(lock, state, NULL, RT_MUTEX_MIN_CHAINWALK, ++ ww_ctx); + } + + static inline int + rt_mutex_timed_fastlock(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, + enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx, + int (*slowfn)(struct rt_mutex *lock, int state, + struct hrtimer_sleeper *timeout, +- enum rtmutex_chainwalk chwalk)) ++ enum rtmutex_chainwalk chwalk, ++ struct ww_acquire_ctx *ww_ctx)) + { + if (chwalk == RT_MUTEX_MIN_CHAINWALK && + likely(rt_mutex_cmpxchg(lock, NULL, current))) { + rt_mutex_deadlock_account_lock(lock, current); + return 0; + } else +- return slowfn(lock, state, timeout, chwalk); ++ return slowfn(lock, state, timeout, chwalk, ww_ctx); + } + + static inline int +@@ -1363,12 +1863,14 @@ + + static inline void + rt_mutex_fastunlock(struct rt_mutex *lock, +- void (*slowfn)(struct rt_mutex *lock)) ++ bool (*slowfn)(struct rt_mutex *lock)) + { +- if (likely(rt_mutex_cmpxchg(lock, current, NULL))) ++ if (likely(rt_mutex_cmpxchg(lock, current, NULL))) { + rt_mutex_deadlock_account_unlock(current); +- else +- slowfn(lock); ++ } else if (slowfn(lock)) { ++ /* Undo pi boosting if necessary: */ ++ rt_mutex_adjust_prio(current); ++ } + } + + /** +@@ -1380,7 +1882,7 @@ + { + might_sleep(); + +- rt_mutex_fastlock(lock, TASK_UNINTERRUPTIBLE, rt_mutex_slowlock); ++ rt_mutex_fastlock(lock, TASK_UNINTERRUPTIBLE, NULL, rt_mutex_slowlock); + } + EXPORT_SYMBOL_GPL(rt_mutex_lock); + +@@ -1397,7 +1899,7 @@ + { + might_sleep(); + +- return rt_mutex_fastlock(lock, TASK_INTERRUPTIBLE, rt_mutex_slowlock); ++ return rt_mutex_fastlock(lock, TASK_INTERRUPTIBLE, NULL, rt_mutex_slowlock); + } + EXPORT_SYMBOL_GPL(rt_mutex_lock_interruptible); + +@@ -1410,11 +1912,30 @@ + might_sleep(); + + return rt_mutex_timed_fastlock(lock, TASK_INTERRUPTIBLE, timeout, +- RT_MUTEX_FULL_CHAINWALK, ++ RT_MUTEX_FULL_CHAINWALK, NULL, + rt_mutex_slowlock); + } + + /** ++ * rt_mutex_lock_killable - lock a rt_mutex killable ++ * ++ * @lock: the rt_mutex to be locked ++ * @detect_deadlock: deadlock detection on/off ++ * ++ * Returns: ++ * 0 on success ++ * -EINTR when interrupted by a signal ++ * -EDEADLK when the lock would deadlock (when deadlock detection is on) ++ */ ++int __sched rt_mutex_lock_killable(struct rt_mutex *lock) ++{ ++ might_sleep(); ++ ++ return rt_mutex_fastlock(lock, TASK_KILLABLE, NULL, rt_mutex_slowlock); ++} ++EXPORT_SYMBOL_GPL(rt_mutex_lock_killable); ++ ++/** + * rt_mutex_timed_lock - lock a rt_mutex interruptible + * the timeout structure is provided + * by the caller +@@ -1434,6 +1955,7 @@ + + return rt_mutex_timed_fastlock(lock, TASK_INTERRUPTIBLE, timeout, + RT_MUTEX_MIN_CHAINWALK, ++ NULL, + rt_mutex_slowlock); + } + EXPORT_SYMBOL_GPL(rt_mutex_timed_lock); +@@ -1463,6 +1985,22 @@ + EXPORT_SYMBOL_GPL(rt_mutex_unlock); + + /** ++ * rt_mutex_futex_unlock - Futex variant of rt_mutex_unlock ++ * @lock: the rt_mutex to be unlocked ++ * ++ * Returns: true/false indicating whether priority adjustment is ++ * required or not. ++ */ ++bool __sched rt_mutex_futex_unlock(struct rt_mutex *lock) ++{ ++ if (likely(rt_mutex_cmpxchg(lock, current, NULL))) { ++ rt_mutex_deadlock_account_unlock(current); ++ return false; ++ } ++ return rt_mutex_slowunlock(lock); ++} ++ ++/** + * rt_mutex_destroy - mark a mutex unusable + * @lock: the mutex to be destroyed + * +@@ -1492,13 +2030,12 @@ + void __rt_mutex_init(struct rt_mutex *lock, const char *name) + { + lock->owner = NULL; +- raw_spin_lock_init(&lock->wait_lock); + lock->waiters = RB_ROOT; + lock->waiters_leftmost = NULL; + + debug_rt_mutex_init(lock, name); + } +-EXPORT_SYMBOL_GPL(__rt_mutex_init); ++EXPORT_SYMBOL(__rt_mutex_init); + + /** + * rt_mutex_init_proxy_locked - initialize and lock a rt_mutex on behalf of a +@@ -1513,7 +2050,7 @@ + void rt_mutex_init_proxy_locked(struct rt_mutex *lock, + struct task_struct *proxy_owner) + { +- __rt_mutex_init(lock, NULL); ++ rt_mutex_init(lock); + debug_rt_mutex_proxy_lock(lock, proxy_owner); + rt_mutex_set_owner(lock, proxy_owner); + rt_mutex_deadlock_account_lock(lock, proxy_owner); +@@ -1561,6 +2098,35 @@ + return 1; + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* ++ * In PREEMPT_RT there's an added race. ++ * If the task, that we are about to requeue, times out, ++ * it can set the PI_WAKEUP_INPROGRESS. This tells the requeue ++ * to skip this task. But right after the task sets ++ * its pi_blocked_on to PI_WAKEUP_INPROGRESS it can then ++ * block on the spin_lock(&hb->lock), which in RT is an rtmutex. ++ * This will replace the PI_WAKEUP_INPROGRESS with the actual ++ * lock that it blocks on. We *must not* place this task ++ * on this proxy lock in that case. ++ * ++ * To prevent this race, we first take the task's pi_lock ++ * and check if it has updated its pi_blocked_on. If it has, ++ * we assume that it woke up and we return -EAGAIN. ++ * Otherwise, we set the task's pi_blocked_on to ++ * PI_REQUEUE_INPROGRESS, so that if the task is waking up ++ * it will know that we are in the process of requeuing it. ++ */ ++ raw_spin_lock_irq(&task->pi_lock); ++ if (task->pi_blocked_on) { ++ raw_spin_unlock_irq(&task->pi_lock); ++ raw_spin_unlock(&lock->wait_lock); ++ return -EAGAIN; ++ } ++ task->pi_blocked_on = PI_REQUEUE_INPROGRESS; ++ raw_spin_unlock_irq(&task->pi_lock); ++#endif ++ + /* We enforce deadlock detection for futexes */ + ret = task_blocks_on_rt_mutex(lock, waiter, task, + RT_MUTEX_FULL_CHAINWALK); +@@ -1575,7 +2141,7 @@ + ret = 0; + } + +- if (unlikely(ret)) ++ if (ret && rt_mutex_has_waiters(lock)) + remove_waiter(lock, waiter); + + raw_spin_unlock(&lock->wait_lock); +@@ -1631,7 +2197,7 @@ + set_current_state(TASK_INTERRUPTIBLE); + + /* sleep on the mutex */ +- ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter); ++ ret = __rt_mutex_slowlock(lock, TASK_INTERRUPTIBLE, to, waiter, NULL); + + if (unlikely(ret)) + remove_waiter(lock, waiter); +@@ -1646,3 +2212,89 @@ + + return ret; + } ++ ++static inline int ++ww_mutex_deadlock_injection(struct ww_mutex *lock, struct ww_acquire_ctx *ctx) ++{ ++#ifdef CONFIG_DEBUG_WW_MUTEX_SLOWPATH ++ unsigned tmp; ++ ++ if (ctx->deadlock_inject_countdown-- == 0) { ++ tmp = ctx->deadlock_inject_interval; ++ if (tmp > UINT_MAX/4) ++ tmp = UINT_MAX; ++ else ++ tmp = tmp*2 + tmp + tmp/2; ++ ++ ctx->deadlock_inject_interval = tmp; ++ ctx->deadlock_inject_countdown = tmp; ++ ctx->contending_lock = lock; ++ ++ ww_mutex_unlock(lock); ++ ++ return -EDEADLK; ++ } ++#endif ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PREEMPT_RT_FULL ++int __sched ++__ww_mutex_lock_interruptible(struct ww_mutex *lock, struct ww_acquire_ctx *ww_ctx) ++{ ++ int ret; ++ ++ might_sleep(); ++ ++ mutex_acquire_nest(&lock->base.dep_map, 0, 0, &ww_ctx->dep_map, _RET_IP_); ++ ret = rt_mutex_slowlock(&lock->base.lock, TASK_INTERRUPTIBLE, NULL, 0, ww_ctx); ++ if (ret) ++ mutex_release(&lock->base.dep_map, 1, _RET_IP_); ++ else if (!ret && ww_ctx->acquired > 1) ++ return ww_mutex_deadlock_injection(lock, ww_ctx); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(__ww_mutex_lock_interruptible); ++ ++int __sched ++__ww_mutex_lock(struct ww_mutex *lock, struct ww_acquire_ctx *ww_ctx) ++{ ++ int ret; ++ ++ might_sleep(); ++ ++ mutex_acquire_nest(&lock->base.dep_map, 0, 0, &ww_ctx->dep_map, _RET_IP_); ++ ret = rt_mutex_slowlock(&lock->base.lock, TASK_UNINTERRUPTIBLE, NULL, 0, ww_ctx); ++ if (ret) ++ mutex_release(&lock->base.dep_map, 1, _RET_IP_); ++ else if (!ret && ww_ctx->acquired > 1) ++ return ww_mutex_deadlock_injection(lock, ww_ctx); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(__ww_mutex_lock); ++ ++void __sched ww_mutex_unlock(struct ww_mutex *lock) ++{ ++ int nest = !!lock->ctx; ++ ++ /* ++ * The unlocking fastpath is the 0->1 transition from 'locked' ++ * into 'unlocked' state: ++ */ ++ if (nest) { ++#ifdef CONFIG_DEBUG_MUTEXES ++ DEBUG_LOCKS_WARN_ON(!lock->ctx->acquired); ++#endif ++ if (lock->ctx->acquired > 0) ++ lock->ctx->acquired--; ++ lock->ctx = NULL; ++ } ++ ++ mutex_release(&lock->base.dep_map, nest, _RET_IP_); ++ rt_mutex_unlock(&lock->base.lock); ++} ++EXPORT_SYMBOL(ww_mutex_unlock); ++#endif +diff -Nur linux-4.1.26.orig/kernel/locking/rtmutex_common.h linux-4.1.26/kernel/locking/rtmutex_common.h +--- linux-4.1.26.orig/kernel/locking/rtmutex_common.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/rtmutex_common.h 2016-06-19 15:30:58.695297658 +0200 +@@ -49,6 +49,7 @@ + struct rb_node pi_tree_entry; + struct task_struct *task; + struct rt_mutex *lock; ++ bool savestate; + #ifdef CONFIG_DEBUG_RT_MUTEXES + unsigned long ip; + struct pid *deadlock_task_pid; +@@ -119,6 +120,9 @@ + /* + * PI-futex support (proxy locking functions, etc.): + */ ++#define PI_WAKEUP_INPROGRESS ((struct rt_mutex_waiter *) 1) ++#define PI_REQUEUE_INPROGRESS ((struct rt_mutex_waiter *) 2) ++ + extern struct task_struct *rt_mutex_next_owner(struct rt_mutex *lock); + extern void rt_mutex_init_proxy_locked(struct rt_mutex *lock, + struct task_struct *proxy_owner); +@@ -132,10 +136,24 @@ + struct rt_mutex_waiter *waiter); + extern int rt_mutex_timed_futex_lock(struct rt_mutex *l, struct hrtimer_sleeper *to); + ++extern bool rt_mutex_futex_unlock(struct rt_mutex *lock); ++ ++extern void rt_mutex_adjust_prio(struct task_struct *task); ++ + #ifdef CONFIG_DEBUG_RT_MUTEXES + # include "rtmutex-debug.h" + #else + # include "rtmutex.h" + #endif + ++static inline void ++rt_mutex_init_waiter(struct rt_mutex_waiter *waiter, bool savestate) ++{ ++ debug_rt_mutex_init_waiter(waiter); ++ waiter->task = NULL; ++ waiter->savestate = savestate; ++ RB_CLEAR_NODE(&waiter->pi_tree_entry); ++ RB_CLEAR_NODE(&waiter->tree_entry); ++} ++ + #endif +diff -Nur linux-4.1.26.orig/kernel/locking/spinlock.c linux-4.1.26/kernel/locking/spinlock.c +--- linux-4.1.26.orig/kernel/locking/spinlock.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/spinlock.c 2016-06-19 15:30:58.695297658 +0200 +@@ -124,8 +124,11 @@ + * __[spin|read|write]_lock_bh() + */ + BUILD_LOCK_OPS(spin, raw_spinlock); ++ ++#ifndef CONFIG_PREEMPT_RT_FULL + BUILD_LOCK_OPS(read, rwlock); + BUILD_LOCK_OPS(write, rwlock); ++#endif + + #endif + +@@ -209,6 +212,8 @@ + EXPORT_SYMBOL(_raw_spin_unlock_bh); + #endif + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #ifndef CONFIG_INLINE_READ_TRYLOCK + int __lockfunc _raw_read_trylock(rwlock_t *lock) + { +@@ -353,6 +358,8 @@ + EXPORT_SYMBOL(_raw_write_unlock_bh); + #endif + ++#endif /* !PREEMPT_RT_FULL */ ++ + #ifdef CONFIG_DEBUG_LOCK_ALLOC + + void __lockfunc _raw_spin_lock_nested(raw_spinlock_t *lock, int subclass) +diff -Nur linux-4.1.26.orig/kernel/locking/spinlock_debug.c linux-4.1.26/kernel/locking/spinlock_debug.c +--- linux-4.1.26.orig/kernel/locking/spinlock_debug.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/locking/spinlock_debug.c 2016-06-19 15:30:58.695297658 +0200 +@@ -31,6 +31,7 @@ + + EXPORT_SYMBOL(__raw_spin_lock_init); + ++#ifndef CONFIG_PREEMPT_RT_FULL + void __rwlock_init(rwlock_t *lock, const char *name, + struct lock_class_key *key) + { +@@ -48,6 +49,7 @@ + } + + EXPORT_SYMBOL(__rwlock_init); ++#endif + + static void spin_dump(raw_spinlock_t *lock, const char *msg) + { +@@ -159,6 +161,7 @@ + arch_spin_unlock(&lock->raw_lock); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + static void rwlock_bug(rwlock_t *lock, const char *msg) + { + if (!debug_locks_off()) +@@ -300,3 +303,5 @@ + debug_write_unlock(lock); + arch_write_unlock(&lock->raw_lock); + } ++ ++#endif +diff -Nur linux-4.1.26.orig/kernel/panic.c linux-4.1.26/kernel/panic.c +--- linux-4.1.26.orig/kernel/panic.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/panic.c 2016-06-19 15:30:58.695297658 +0200 +@@ -399,9 +399,11 @@ + + static int init_oops_id(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + if (!oops_id) + get_random_bytes(&oops_id, sizeof(oops_id)); + else ++#endif + oops_id++; + + return 0; +diff -Nur linux-4.1.26.orig/kernel/power/hibernate.c linux-4.1.26/kernel/power/hibernate.c +--- linux-4.1.26.orig/kernel/power/hibernate.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/power/hibernate.c 2016-06-19 15:30:58.695297658 +0200 +@@ -285,6 +285,8 @@ + + local_irq_disable(); + ++ system_state = SYSTEM_SUSPEND; ++ + error = syscore_suspend(); + if (error) { + printk(KERN_ERR "PM: Some system devices failed to power down, " +@@ -314,6 +316,7 @@ + syscore_resume(); + + Enable_irqs: ++ system_state = SYSTEM_RUNNING; + local_irq_enable(); + + Enable_cpus: +@@ -437,6 +440,7 @@ + goto Enable_cpus; + + local_irq_disable(); ++ system_state = SYSTEM_SUSPEND; + + error = syscore_suspend(); + if (error) +@@ -470,6 +474,7 @@ + syscore_resume(); + + Enable_irqs: ++ system_state = SYSTEM_RUNNING; + local_irq_enable(); + + Enable_cpus: +@@ -555,6 +560,7 @@ + goto Platform_finish; + + local_irq_disable(); ++ system_state = SYSTEM_SUSPEND; + syscore_suspend(); + if (pm_wakeup_pending()) { + error = -EAGAIN; +@@ -567,6 +573,7 @@ + + Power_up: + syscore_resume(); ++ system_state = SYSTEM_RUNNING; + local_irq_enable(); + enable_nonboot_cpus(); + +diff -Nur linux-4.1.26.orig/kernel/power/suspend.c linux-4.1.26/kernel/power/suspend.c +--- linux-4.1.26.orig/kernel/power/suspend.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/power/suspend.c 2016-06-19 15:30:58.695297658 +0200 +@@ -356,6 +356,8 @@ + arch_suspend_disable_irqs(); + BUG_ON(!irqs_disabled()); + ++ system_state = SYSTEM_SUSPEND; ++ + error = syscore_suspend(); + if (!error) { + *wakeup = pm_wakeup_pending(); +@@ -370,6 +372,8 @@ + syscore_resume(); + } + ++ system_state = SYSTEM_RUNNING; ++ + arch_suspend_enable_irqs(); + BUG_ON(irqs_disabled()); + +diff -Nur linux-4.1.26.orig/kernel/printk/printk.c linux-4.1.26/kernel/printk/printk.c +--- linux-4.1.26.orig/kernel/printk/printk.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/printk/printk.c 2016-06-19 15:30:58.695297658 +0200 +@@ -1163,6 +1163,7 @@ + { + char *text; + int len = 0; ++ int attempts = 0; + + text = kmalloc(LOG_LINE_MAX + PREFIX_MAX, GFP_KERNEL); + if (!text) +@@ -1174,7 +1175,14 @@ + u64 seq; + u32 idx; + enum log_flags prev; +- ++ int num_msg; ++try_again: ++ attempts++; ++ if (attempts > 10) { ++ len = -EBUSY; ++ goto out; ++ } ++ num_msg = 0; + if (clear_seq < log_first_seq) { + /* messages are gone, move to first available one */ + clear_seq = log_first_seq; +@@ -1195,6 +1203,14 @@ + prev = msg->flags; + idx = log_next(idx); + seq++; ++ num_msg++; ++ if (num_msg > 5) { ++ num_msg = 0; ++ raw_spin_unlock_irq(&logbuf_lock); ++ raw_spin_lock_irq(&logbuf_lock); ++ if (clear_seq < log_first_seq) ++ goto try_again; ++ } + } + + /* move first record forward until length fits into the buffer */ +@@ -1208,6 +1224,14 @@ + prev = msg->flags; + idx = log_next(idx); + seq++; ++ num_msg++; ++ if (num_msg > 5) { ++ num_msg = 0; ++ raw_spin_unlock_irq(&logbuf_lock); ++ raw_spin_lock_irq(&logbuf_lock); ++ if (clear_seq < log_first_seq) ++ goto try_again; ++ } + } + + /* last message fitting into this dump */ +@@ -1248,6 +1272,7 @@ + clear_seq = log_next_seq; + clear_idx = log_next_idx; + } ++out: + raw_spin_unlock_irq(&logbuf_lock); + + kfree(text); +@@ -1401,6 +1426,7 @@ + if (!console_drivers) + return; + ++ migrate_disable(); + for_each_console(con) { + if (exclusive_console && con != exclusive_console) + continue; +@@ -1413,6 +1439,7 @@ + continue; + con->write(con, text, len); + } ++ migrate_enable(); + } + + /* +@@ -1473,6 +1500,15 @@ + static int console_trylock_for_printk(void) + { + unsigned int cpu = smp_processor_id(); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ int lock = !early_boot_irqs_disabled && (preempt_count() == 0) && ++ !irqs_disabled(); ++#else ++ int lock = 1; ++#endif ++ ++ if (!lock) ++ return 0; + + if (!console_trylock()) + return 0; +@@ -1607,6 +1643,62 @@ + return textlen; + } + ++#ifdef CONFIG_EARLY_PRINTK ++struct console *early_console; ++ ++static void early_vprintk(const char *fmt, va_list ap) ++{ ++ if (early_console) { ++ char buf[512]; ++ int n = vscnprintf(buf, sizeof(buf), fmt, ap); ++ ++ early_console->write(early_console, buf, n); ++ } ++} ++ ++asmlinkage void early_printk(const char *fmt, ...) ++{ ++ va_list ap; ++ ++ va_start(ap, fmt); ++ early_vprintk(fmt, ap); ++ va_end(ap); ++} ++ ++/* ++ * This is independent of any log levels - a global ++ * kill switch that turns off all of printk. ++ * ++ * Used by the NMI watchdog if early-printk is enabled. ++ */ ++static bool __read_mostly printk_killswitch; ++ ++static int __init force_early_printk_setup(char *str) ++{ ++ printk_killswitch = true; ++ return 0; ++} ++early_param("force_early_printk", force_early_printk_setup); ++ ++void printk_kill(void) ++{ ++ printk_killswitch = true; ++} ++ ++static int forced_early_printk(const char *fmt, va_list ap) ++{ ++ if (!printk_killswitch) ++ return 0; ++ early_vprintk(fmt, ap); ++ return 1; ++} ++#else ++static inline int forced_early_printk(const char *fmt, va_list ap) ++{ ++ return 0; ++} ++#endif ++ + asmlinkage int vprintk_emit(int facility, int level, + const char *dict, size_t dictlen, + const char *fmt, va_list args) +@@ -1623,6 +1715,13 @@ + /* cpu currently holding logbuf_lock in this function */ + static unsigned int logbuf_cpu = UINT_MAX; + ++ /* ++ * Fall back to early_printk if a debugging subsystem has ++ * killed printk output ++ */ ++ if (unlikely(forced_early_printk(fmt, args))) ++ return 1; ++ + if (level == LOGLEVEL_SCHED) { + level = LOGLEVEL_DEFAULT; + in_sched = true; +@@ -1764,8 +1863,7 @@ + * console_sem which would prevent anyone from printing to + * console + */ +- preempt_disable(); +- ++ migrate_disable(); + /* + * Try to acquire and then immediately release the console + * semaphore. The release will print out buffers and wake up +@@ -1773,7 +1871,7 @@ + */ + if (console_trylock_for_printk()) + console_unlock(); +- preempt_enable(); ++ migrate_enable(); + lockdep_on(); + } + +@@ -1902,26 +2000,6 @@ + + #endif /* CONFIG_PRINTK */ + +-#ifdef CONFIG_EARLY_PRINTK +-struct console *early_console; +- +-asmlinkage __visible void early_printk(const char *fmt, ...) +-{ +- va_list ap; +- char buf[512]; +- int n; +- +- if (!early_console) +- return; +- +- va_start(ap, fmt); +- n = vscnprintf(buf, sizeof(buf), fmt, ap); +- va_end(ap); +- +- early_console->write(early_console, buf, n); +-} +-#endif +- + static int __add_preferred_console(char *name, int idx, char *options, + char *brl_options) + { +@@ -2143,11 +2221,16 @@ + goto out; + + len = cont_print_text(text, size); ++#ifndef CONFIG_PREEMPT_RT_FULL + raw_spin_unlock(&logbuf_lock); + stop_critical_timings(); + call_console_drivers(cont.level, text, len); + start_critical_timings(); + local_irq_restore(flags); ++#else ++ raw_spin_unlock_irqrestore(&logbuf_lock, flags); ++ call_console_drivers(cont.level, text, len); ++#endif + return; + out: + raw_spin_unlock_irqrestore(&logbuf_lock, flags); +@@ -2246,12 +2329,17 @@ + console_idx = log_next(console_idx); + console_seq++; + console_prev = msg->flags; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ raw_spin_unlock_irqrestore(&logbuf_lock, flags); ++ call_console_drivers(level, text, len); ++#else + raw_spin_unlock(&logbuf_lock); + + stop_critical_timings(); /* don't trace print latency */ + call_console_drivers(level, text, len); + start_critical_timings(); + local_irq_restore(flags); ++#endif + + if (do_cond_resched) + cond_resched(); +diff -Nur linux-4.1.26.orig/kernel/ptrace.c linux-4.1.26/kernel/ptrace.c +--- linux-4.1.26.orig/kernel/ptrace.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/ptrace.c 2016-06-19 15:30:58.699297812 +0200 +@@ -129,7 +129,14 @@ + + spin_lock_irq(&task->sighand->siglock); + if (task_is_traced(task) && !__fatal_signal_pending(task)) { +- task->state = __TASK_TRACED; ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&task->pi_lock, flags); ++ if (task->state & __TASK_TRACED) ++ task->state = __TASK_TRACED; ++ else ++ task->saved_state = __TASK_TRACED; ++ raw_spin_unlock_irqrestore(&task->pi_lock, flags); + ret = true; + } + spin_unlock_irq(&task->sighand->siglock); +diff -Nur linux-4.1.26.orig/kernel/rcu/rcutorture.c linux-4.1.26/kernel/rcu/rcutorture.c +--- linux-4.1.26.orig/kernel/rcu/rcutorture.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/rcu/rcutorture.c 2016-06-19 15:30:58.699297812 +0200 +@@ -389,6 +389,7 @@ + .name = "rcu" + }; + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Definitions for rcu_bh torture testing. + */ +@@ -428,6 +429,12 @@ + .name = "rcu_bh" + }; + ++#else ++static struct rcu_torture_ops rcu_bh_ops = { ++ .ttype = INVALID_RCU_FLAVOR, ++}; ++#endif ++ + /* + * Don't even think about trying any of these in real life!!! + * The names includes "busted", and they really means it! +diff -Nur linux-4.1.26.orig/kernel/rcu/tree.c linux-4.1.26/kernel/rcu/tree.c +--- linux-4.1.26.orig/kernel/rcu/tree.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/rcu/tree.c 2016-06-19 15:30:58.699297812 +0200 +@@ -56,6 +56,11 @@ + #include + #include + #include ++#include ++#include ++#include ++#include ++#include "../time/tick-internal.h" + + #include "tree.h" + #include "rcu.h" +@@ -220,6 +225,19 @@ + } + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void rcu_preempt_qs(void); ++ ++void rcu_bh_qs(void) ++{ ++ unsigned long flags; ++ ++ /* Callers to this function, rcu_preempt_qs(), must disable irqs. */ ++ local_irq_save(flags); ++ rcu_preempt_qs(); ++ local_irq_restore(flags); ++} ++#else + void rcu_bh_qs(void) + { + if (!__this_cpu_read(rcu_bh_data.passed_quiesce)) { +@@ -229,6 +247,7 @@ + __this_cpu_write(rcu_bh_data.passed_quiesce, 1); + } + } ++#endif + + static DEFINE_PER_CPU(int, rcu_sched_qs_mask); + +@@ -404,6 +423,7 @@ + } + EXPORT_SYMBOL_GPL(rcu_batches_completed_sched); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Return the number of RCU BH batches completed thus far for debug & stats. + */ +@@ -431,6 +451,13 @@ + } + EXPORT_SYMBOL_GPL(rcu_bh_force_quiescent_state); + ++#else ++void rcu_force_quiescent_state(void) ++{ ++} ++EXPORT_SYMBOL_GPL(rcu_force_quiescent_state); ++#endif ++ + /* + * Force a quiescent state for RCU-sched. + */ +@@ -1545,7 +1572,7 @@ + !ACCESS_ONCE(rsp->gp_flags) || + !rsp->gp_kthread) + return; +- wake_up(&rsp->gp_wq); ++ swait_wake(&rsp->gp_wq); + } + + /* +@@ -1986,7 +2013,7 @@ + ACCESS_ONCE(rsp->gpnum), + TPS("reqwait")); + rsp->gp_state = RCU_GP_WAIT_GPS; +- wait_event_interruptible(rsp->gp_wq, ++ swait_event_interruptible(rsp->gp_wq, + ACCESS_ONCE(rsp->gp_flags) & + RCU_GP_FLAG_INIT); + /* Locking provides needed memory barrier. */ +@@ -2015,7 +2042,7 @@ + ACCESS_ONCE(rsp->gpnum), + TPS("fqswait")); + rsp->gp_state = RCU_GP_WAIT_FQS; +- ret = wait_event_interruptible_timeout(rsp->gp_wq, ++ ret = swait_event_interruptible_timeout(rsp->gp_wq, + ((gf = ACCESS_ONCE(rsp->gp_flags)) & + RCU_GP_FLAG_FQS) || + (!ACCESS_ONCE(rnp->qsmask) && +@@ -2860,18 +2887,17 @@ + /* + * Do RCU core processing for the current CPU. + */ +-static void rcu_process_callbacks(struct softirq_action *unused) ++static void rcu_process_callbacks(void) + { + struct rcu_state *rsp; + + if (cpu_is_offline(smp_processor_id())) + return; +- trace_rcu_utilization(TPS("Start RCU core")); + for_each_rcu_flavor(rsp) + __rcu_process_callbacks(rsp); +- trace_rcu_utilization(TPS("End RCU core")); + } + ++static DEFINE_PER_CPU(struct task_struct *, rcu_cpu_kthread_task); + /* + * Schedule RCU callback invocation. If the specified type of RCU + * does not support RCU priority boosting, just do a direct call, +@@ -2883,18 +2909,105 @@ + { + if (unlikely(!ACCESS_ONCE(rcu_scheduler_fully_active))) + return; +- if (likely(!rsp->boost)) { +- rcu_do_batch(rsp, rdp); ++ rcu_do_batch(rsp, rdp); ++} ++ ++static void rcu_wake_cond(struct task_struct *t, int status) ++{ ++ /* ++ * If the thread is yielding, only wake it when this ++ * is invoked from idle ++ */ ++ if (t && (status != RCU_KTHREAD_YIELDING || is_idle_task(current))) ++ wake_up_process(t); ++} ++ ++/* ++ * Wake up this CPU's rcuc kthread to do RCU core processing. ++ */ ++static void invoke_rcu_core(void) ++{ ++ unsigned long flags; ++ struct task_struct *t; ++ ++ if (!cpu_online(smp_processor_id())) + return; ++ local_irq_save(flags); ++ __this_cpu_write(rcu_cpu_has_work, 1); ++ t = __this_cpu_read(rcu_cpu_kthread_task); ++ if (t != NULL && current != t) ++ rcu_wake_cond(t, __this_cpu_read(rcu_cpu_kthread_status)); ++ local_irq_restore(flags); ++} ++ ++static void rcu_cpu_kthread_park(unsigned int cpu) ++{ ++ per_cpu(rcu_cpu_kthread_status, cpu) = RCU_KTHREAD_OFFCPU; ++} ++ ++static int rcu_cpu_kthread_should_run(unsigned int cpu) ++{ ++ return __this_cpu_read(rcu_cpu_has_work); ++} ++ ++/* ++ * Per-CPU kernel thread that invokes RCU callbacks. This replaces the ++ * RCU softirq used in flavors and configurations of RCU that do not ++ * support RCU priority boosting. ++ */ ++static void rcu_cpu_kthread(unsigned int cpu) ++{ ++ unsigned int *statusp = this_cpu_ptr(&rcu_cpu_kthread_status); ++ char work, *workp = this_cpu_ptr(&rcu_cpu_has_work); ++ int spincnt; ++ ++ for (spincnt = 0; spincnt < 10; spincnt++) { ++ trace_rcu_utilization(TPS("Start CPU kthread@rcu_wait")); ++ local_bh_disable(); ++ *statusp = RCU_KTHREAD_RUNNING; ++ this_cpu_inc(rcu_cpu_kthread_loops); ++ local_irq_disable(); ++ work = *workp; ++ *workp = 0; ++ local_irq_enable(); ++ if (work) ++ rcu_process_callbacks(); ++ local_bh_enable(); ++ if (*workp == 0) { ++ trace_rcu_utilization(TPS("End CPU kthread@rcu_wait")); ++ *statusp = RCU_KTHREAD_WAITING; ++ return; ++ } + } +- invoke_rcu_callbacks_kthread(); ++ *statusp = RCU_KTHREAD_YIELDING; ++ trace_rcu_utilization(TPS("Start CPU kthread@rcu_yield")); ++ schedule_timeout_interruptible(2); ++ trace_rcu_utilization(TPS("End CPU kthread@rcu_yield")); ++ *statusp = RCU_KTHREAD_WAITING; + } + +-static void invoke_rcu_core(void) ++static struct smp_hotplug_thread rcu_cpu_thread_spec = { ++ .store = &rcu_cpu_kthread_task, ++ .thread_should_run = rcu_cpu_kthread_should_run, ++ .thread_fn = rcu_cpu_kthread, ++ .thread_comm = "rcuc/%u", ++ .setup = rcu_cpu_kthread_setup, ++ .park = rcu_cpu_kthread_park, ++}; ++ ++/* ++ * Spawn per-CPU RCU core processing kthreads. ++ */ ++static int __init rcu_spawn_core_kthreads(void) + { +- if (cpu_online(smp_processor_id())) +- raise_softirq(RCU_SOFTIRQ); ++ int cpu; ++ ++ for_each_possible_cpu(cpu) ++ per_cpu(rcu_cpu_has_work, cpu) = 0; ++ BUG_ON(smpboot_register_percpu_thread(&rcu_cpu_thread_spec)); ++ return 0; + } ++early_initcall(rcu_spawn_core_kthreads); + + /* + * Handle any core-RCU processing required by a call_rcu() invocation. +@@ -3040,6 +3153,7 @@ + } + EXPORT_SYMBOL_GPL(call_rcu_sched); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Queue an RCU callback for invocation after a quicker grace period. + */ +@@ -3048,6 +3162,7 @@ + __call_rcu(head, func, &rcu_bh_state, -1, 0); + } + EXPORT_SYMBOL_GPL(call_rcu_bh); ++#endif + + /* + * Queue an RCU callback for lazy invocation after a grace period. +@@ -3139,6 +3254,7 @@ + } + EXPORT_SYMBOL_GPL(synchronize_sched); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * synchronize_rcu_bh - wait until an rcu_bh grace period has elapsed. + * +@@ -3165,6 +3281,7 @@ + wait_rcu_gp(call_rcu_bh); + } + EXPORT_SYMBOL_GPL(synchronize_rcu_bh); ++#endif + + /** + * get_state_synchronize_rcu - Snapshot current RCU state +@@ -3677,6 +3794,7 @@ + mutex_unlock(&rsp->barrier_mutex); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * rcu_barrier_bh - Wait until all in-flight call_rcu_bh() callbacks complete. + */ +@@ -3685,6 +3803,7 @@ + _rcu_barrier(&rcu_bh_state); + } + EXPORT_SYMBOL_GPL(rcu_barrier_bh); ++#endif + + /** + * rcu_barrier_sched - Wait for in-flight call_rcu_sched() callbacks. +@@ -4021,7 +4140,7 @@ + } + } + +- init_waitqueue_head(&rsp->gp_wq); ++ init_swait_head(&rsp->gp_wq); + rnp = rsp->level[rcu_num_lvls - 1]; + for_each_possible_cpu(i) { + while (i > rnp->grphi) +@@ -4120,7 +4239,6 @@ + rcu_init_one(&rcu_bh_state, &rcu_bh_data); + rcu_init_one(&rcu_sched_state, &rcu_sched_data); + __rcu_init_preempt(); +- open_softirq(RCU_SOFTIRQ, rcu_process_callbacks); + + /* + * We don't need protection against CPU-hotplug here because +diff -Nur linux-4.1.26.orig/kernel/rcu/tree.h linux-4.1.26/kernel/rcu/tree.h +--- linux-4.1.26.orig/kernel/rcu/tree.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/rcu/tree.h 2016-06-19 15:30:58.699297812 +0200 +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + /* + * Define shape of hierarchy based on NR_CPUS, CONFIG_RCU_FANOUT, and +@@ -210,7 +211,7 @@ + /* This can happen due to race conditions. */ + #endif /* #ifdef CONFIG_RCU_BOOST */ + #ifdef CONFIG_RCU_NOCB_CPU +- wait_queue_head_t nocb_gp_wq[2]; ++ struct swait_head nocb_gp_wq[2]; + /* Place for rcu_nocb_kthread() to wait GP. */ + #endif /* #ifdef CONFIG_RCU_NOCB_CPU */ + int need_future_gp[2]; +@@ -349,7 +350,7 @@ + atomic_long_t nocb_q_count_lazy; /* invocation (all stages). */ + struct rcu_head *nocb_follower_head; /* CBs ready to invoke. */ + struct rcu_head **nocb_follower_tail; +- wait_queue_head_t nocb_wq; /* For nocb kthreads to sleep on. */ ++ struct swait_head nocb_wq; /* For nocb kthreads to sleep on. */ + struct task_struct *nocb_kthread; + int nocb_defer_wakeup; /* Defer wakeup of nocb_kthread. */ + +@@ -438,7 +439,7 @@ + unsigned long gpnum; /* Current gp number. */ + unsigned long completed; /* # of last completed gp. */ + struct task_struct *gp_kthread; /* Task for grace periods. */ +- wait_queue_head_t gp_wq; /* Where GP task waits. */ ++ struct swait_head gp_wq; /* Where GP task waits. */ + short gp_flags; /* Commands for GP task. */ + short gp_state; /* GP kthread sleep state. */ + +@@ -529,12 +530,10 @@ + DECLARE_PER_CPU(struct rcu_data, rcu_preempt_data); + #endif /* #ifdef CONFIG_PREEMPT_RCU */ + +-#ifdef CONFIG_RCU_BOOST + DECLARE_PER_CPU(unsigned int, rcu_cpu_kthread_status); + DECLARE_PER_CPU(int, rcu_cpu_kthread_cpu); + DECLARE_PER_CPU(unsigned int, rcu_cpu_kthread_loops); + DECLARE_PER_CPU(char, rcu_cpu_has_work); +-#endif /* #ifdef CONFIG_RCU_BOOST */ + + #ifndef RCU_TREE_NONCORE + +@@ -553,10 +552,9 @@ + static void __init __rcu_init_preempt(void); + static void rcu_initiate_boost(struct rcu_node *rnp, unsigned long flags); + static void rcu_preempt_boost_start_gp(struct rcu_node *rnp); +-static void invoke_rcu_callbacks_kthread(void); + static bool rcu_is_callbacks_kthread(void); ++static void rcu_cpu_kthread_setup(unsigned int cpu); + #ifdef CONFIG_RCU_BOOST +-static void rcu_preempt_do_callbacks(void); + static int rcu_spawn_one_boost_kthread(struct rcu_state *rsp, + struct rcu_node *rnp); + #endif /* #ifdef CONFIG_RCU_BOOST */ +diff -Nur linux-4.1.26.orig/kernel/rcu/tree_plugin.h linux-4.1.26/kernel/rcu/tree_plugin.h +--- linux-4.1.26.orig/kernel/rcu/tree_plugin.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/rcu/tree_plugin.h 2016-06-19 15:30:58.699297812 +0200 +@@ -24,27 +24,20 @@ + * Paul E. McKenney + */ + +-#include +-#include +-#include +-#include +-#include "../time/tick-internal.h" +- + #ifdef CONFIG_RCU_BOOST + + #include "../locking/rtmutex_common.h" + ++#endif /* #ifdef CONFIG_RCU_BOOST */ ++ + /* + * Control variables for per-CPU and per-rcu_node kthreads. These + * handle all flavors of RCU. + */ +-static DEFINE_PER_CPU(struct task_struct *, rcu_cpu_kthread_task); + DEFINE_PER_CPU(unsigned int, rcu_cpu_kthread_status); + DEFINE_PER_CPU(unsigned int, rcu_cpu_kthread_loops); + DEFINE_PER_CPU(char, rcu_cpu_has_work); + +-#endif /* #ifdef CONFIG_RCU_BOOST */ +- + #ifdef CONFIG_RCU_NOCB_CPU + static cpumask_var_t rcu_nocb_mask; /* CPUs to have callbacks offloaded. */ + static bool have_rcu_nocb_mask; /* Was rcu_nocb_mask allocated? */ +@@ -291,7 +284,7 @@ + } + + /* Hardware IRQ handlers cannot block, complain if they get here. */ +- if (in_irq() || in_serving_softirq()) { ++ if (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_OFFSET)) { + lockdep_rcu_suspicious(__FILE__, __LINE__, + "rcu_read_unlock() from irq or softirq with blocking in critical section!!!\n"); + pr_alert("->rcu_read_unlock_special: %#x (b: %d, nq: %d)\n", +@@ -496,15 +489,6 @@ + t->rcu_read_unlock_special.b.need_qs = true; + } + +-#ifdef CONFIG_RCU_BOOST +- +-static void rcu_preempt_do_callbacks(void) +-{ +- rcu_do_batch(&rcu_preempt_state, this_cpu_ptr(&rcu_preempt_data)); +-} +- +-#endif /* #ifdef CONFIG_RCU_BOOST */ +- + /* + * Queue a preemptible-RCU callback for invocation after a grace period. + */ +@@ -939,6 +923,19 @@ + + #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ + ++/* ++ * If boosting, set rcuc kthreads to realtime priority. ++ */ ++static void rcu_cpu_kthread_setup(unsigned int cpu) ++{ ++#ifdef CONFIG_RCU_BOOST ++ struct sched_param sp; ++ ++ sp.sched_priority = kthread_prio; ++ sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); ++#endif /* #ifdef CONFIG_RCU_BOOST */ ++} ++ + #ifdef CONFIG_RCU_BOOST + + #include "../locking/rtmutex_common.h" +@@ -970,16 +967,6 @@ + + #endif /* #else #ifdef CONFIG_RCU_TRACE */ + +-static void rcu_wake_cond(struct task_struct *t, int status) +-{ +- /* +- * If the thread is yielding, only wake it when this +- * is invoked from idle +- */ +- if (status != RCU_KTHREAD_YIELDING || is_idle_task(current)) +- wake_up_process(t); +-} +- + /* + * Carry out RCU priority boosting on the task indicated by ->exp_tasks + * or ->boost_tasks, advancing the pointer to the next task in the +@@ -1125,23 +1112,6 @@ + } + + /* +- * Wake up the per-CPU kthread to invoke RCU callbacks. +- */ +-static void invoke_rcu_callbacks_kthread(void) +-{ +- unsigned long flags; +- +- local_irq_save(flags); +- __this_cpu_write(rcu_cpu_has_work, 1); +- if (__this_cpu_read(rcu_cpu_kthread_task) != NULL && +- current != __this_cpu_read(rcu_cpu_kthread_task)) { +- rcu_wake_cond(__this_cpu_read(rcu_cpu_kthread_task), +- __this_cpu_read(rcu_cpu_kthread_status)); +- } +- local_irq_restore(flags); +-} +- +-/* + * Is the current CPU running the RCU-callbacks kthread? + * Caller must have preemption disabled. + */ +@@ -1196,67 +1166,6 @@ + return 0; + } + +-static void rcu_kthread_do_work(void) +-{ +- rcu_do_batch(&rcu_sched_state, this_cpu_ptr(&rcu_sched_data)); +- rcu_do_batch(&rcu_bh_state, this_cpu_ptr(&rcu_bh_data)); +- rcu_preempt_do_callbacks(); +-} +- +-static void rcu_cpu_kthread_setup(unsigned int cpu) +-{ +- struct sched_param sp; +- +- sp.sched_priority = kthread_prio; +- sched_setscheduler_nocheck(current, SCHED_FIFO, &sp); +-} +- +-static void rcu_cpu_kthread_park(unsigned int cpu) +-{ +- per_cpu(rcu_cpu_kthread_status, cpu) = RCU_KTHREAD_OFFCPU; +-} +- +-static int rcu_cpu_kthread_should_run(unsigned int cpu) +-{ +- return __this_cpu_read(rcu_cpu_has_work); +-} +- +-/* +- * Per-CPU kernel thread that invokes RCU callbacks. This replaces the +- * RCU softirq used in flavors and configurations of RCU that do not +- * support RCU priority boosting. +- */ +-static void rcu_cpu_kthread(unsigned int cpu) +-{ +- unsigned int *statusp = this_cpu_ptr(&rcu_cpu_kthread_status); +- char work, *workp = this_cpu_ptr(&rcu_cpu_has_work); +- int spincnt; +- +- for (spincnt = 0; spincnt < 10; spincnt++) { +- trace_rcu_utilization(TPS("Start CPU kthread@rcu_wait")); +- local_bh_disable(); +- *statusp = RCU_KTHREAD_RUNNING; +- this_cpu_inc(rcu_cpu_kthread_loops); +- local_irq_disable(); +- work = *workp; +- *workp = 0; +- local_irq_enable(); +- if (work) +- rcu_kthread_do_work(); +- local_bh_enable(); +- if (*workp == 0) { +- trace_rcu_utilization(TPS("End CPU kthread@rcu_wait")); +- *statusp = RCU_KTHREAD_WAITING; +- return; +- } +- } +- *statusp = RCU_KTHREAD_YIELDING; +- trace_rcu_utilization(TPS("Start CPU kthread@rcu_yield")); +- schedule_timeout_interruptible(2); +- trace_rcu_utilization(TPS("End CPU kthread@rcu_yield")); +- *statusp = RCU_KTHREAD_WAITING; +-} +- + /* + * Set the per-rcu_node kthread's affinity to cover all CPUs that are + * served by the rcu_node in question. The CPU hotplug lock is still +@@ -1286,26 +1195,12 @@ + free_cpumask_var(cm); + } + +-static struct smp_hotplug_thread rcu_cpu_thread_spec = { +- .store = &rcu_cpu_kthread_task, +- .thread_should_run = rcu_cpu_kthread_should_run, +- .thread_fn = rcu_cpu_kthread, +- .thread_comm = "rcuc/%u", +- .setup = rcu_cpu_kthread_setup, +- .park = rcu_cpu_kthread_park, +-}; +- + /* + * Spawn boost kthreads -- called as soon as the scheduler is running. + */ + static void __init rcu_spawn_boost_kthreads(void) + { + struct rcu_node *rnp; +- int cpu; +- +- for_each_possible_cpu(cpu) +- per_cpu(rcu_cpu_has_work, cpu) = 0; +- BUG_ON(smpboot_register_percpu_thread(&rcu_cpu_thread_spec)); + rcu_for_each_leaf_node(rcu_state_p, rnp) + (void)rcu_spawn_one_boost_kthread(rcu_state_p, rnp); + } +@@ -1328,11 +1223,6 @@ + raw_spin_unlock_irqrestore(&rnp->lock, flags); + } + +-static void invoke_rcu_callbacks_kthread(void) +-{ +- WARN_ON_ONCE(1); +-} +- + static bool rcu_is_callbacks_kthread(void) + { + return false; +@@ -1356,7 +1246,7 @@ + + #endif /* #else #ifdef CONFIG_RCU_BOOST */ + +-#if !defined(CONFIG_RCU_FAST_NO_HZ) ++#if !defined(CONFIG_RCU_FAST_NO_HZ) || defined(CONFIG_PREEMPT_RT_FULL) + + /* + * Check to see if any future RCU-related work will need to be done +@@ -1374,7 +1264,9 @@ + return rcu_cpu_has_callbacks(NULL); + } + #endif /* #ifndef CONFIG_RCU_NOCB_CPU_ALL */ ++#endif /* !defined(CONFIG_RCU_FAST_NO_HZ) || defined(CONFIG_PREEMPT_RT_FULL) */ + ++#if !defined(CONFIG_RCU_FAST_NO_HZ) + /* + * Because we do not have RCU_FAST_NO_HZ, don't bother cleaning up + * after it. +@@ -1472,6 +1364,8 @@ + return cbs_ready; + } + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + /* + * Allow the CPU to enter dyntick-idle mode unless it has callbacks ready + * to invoke. If the CPU has callbacks, try to advance them. Tell the +@@ -1512,7 +1406,7 @@ + return 0; + } + #endif /* #ifndef CONFIG_RCU_NOCB_CPU_ALL */ +- ++#endif /* #ifndef CONFIG_PREEMPT_RT_FULL */ + /* + * Prepare a CPU for idle from an RCU perspective. The first major task + * is to sense whether nohz mode has been enabled or disabled via sysfs. +@@ -1859,7 +1753,7 @@ + */ + static void rcu_nocb_gp_cleanup(struct rcu_state *rsp, struct rcu_node *rnp) + { +- wake_up_all(&rnp->nocb_gp_wq[rnp->completed & 0x1]); ++ swait_wake_all(&rnp->nocb_gp_wq[rnp->completed & 0x1]); + } + + /* +@@ -1877,8 +1771,8 @@ + + static void rcu_init_one_nocb(struct rcu_node *rnp) + { +- init_waitqueue_head(&rnp->nocb_gp_wq[0]); +- init_waitqueue_head(&rnp->nocb_gp_wq[1]); ++ init_swait_head(&rnp->nocb_gp_wq[0]); ++ init_swait_head(&rnp->nocb_gp_wq[1]); + } + + #ifndef CONFIG_RCU_NOCB_CPU_ALL +@@ -1903,7 +1797,7 @@ + if (ACCESS_ONCE(rdp_leader->nocb_leader_sleep) || force) { + /* Prior smp_mb__after_atomic() orders against prior enqueue. */ + ACCESS_ONCE(rdp_leader->nocb_leader_sleep) = false; +- wake_up(&rdp_leader->nocb_wq); ++ swait_wake(&rdp_leader->nocb_wq); + } + } + +@@ -2116,7 +2010,7 @@ + */ + trace_rcu_future_gp(rnp, rdp, c, TPS("StartWait")); + for (;;) { +- wait_event_interruptible( ++ swait_event_interruptible( + rnp->nocb_gp_wq[c & 0x1], + (d = ULONG_CMP_GE(ACCESS_ONCE(rnp->completed), c))); + if (likely(d)) +@@ -2144,7 +2038,7 @@ + /* Wait for callbacks to appear. */ + if (!rcu_nocb_poll) { + trace_rcu_nocb_wake(my_rdp->rsp->name, my_rdp->cpu, "Sleep"); +- wait_event_interruptible(my_rdp->nocb_wq, ++ swait_event_interruptible(my_rdp->nocb_wq, + !ACCESS_ONCE(my_rdp->nocb_leader_sleep)); + /* Memory barrier handled by smp_mb() calls below and repoll. */ + } else if (firsttime) { +@@ -2219,7 +2113,7 @@ + * List was empty, wake up the follower. + * Memory barriers supplied by atomic_long_add(). + */ +- wake_up(&rdp->nocb_wq); ++ swait_wake(&rdp->nocb_wq); + } + } + +@@ -2240,7 +2134,7 @@ + if (!rcu_nocb_poll) { + trace_rcu_nocb_wake(rdp->rsp->name, rdp->cpu, + "FollowerSleep"); +- wait_event_interruptible(rdp->nocb_wq, ++ swait_event_interruptible(rdp->nocb_wq, + ACCESS_ONCE(rdp->nocb_follower_head)); + } else if (firsttime) { + /* Don't drown trace log with "Poll"! */ +@@ -2399,7 +2293,7 @@ + static void __init rcu_boot_init_nocb_percpu_data(struct rcu_data *rdp) + { + rdp->nocb_tail = &rdp->nocb_head; +- init_waitqueue_head(&rdp->nocb_wq); ++ init_swait_head(&rdp->nocb_wq); + rdp->nocb_follower_tail = &rdp->nocb_follower_head; + } + +diff -Nur linux-4.1.26.orig/kernel/rcu/update.c linux-4.1.26/kernel/rcu/update.c +--- linux-4.1.26.orig/kernel/rcu/update.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/rcu/update.c 2016-06-19 15:30:58.699297812 +0200 +@@ -227,6 +227,7 @@ + } + EXPORT_SYMBOL_GPL(rcu_read_lock_held); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /** + * rcu_read_lock_bh_held() - might we be in RCU-bh read-side critical section? + * +@@ -253,6 +254,7 @@ + return in_softirq() || irqs_disabled(); + } + EXPORT_SYMBOL_GPL(rcu_read_lock_bh_held); ++#endif + + #endif /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */ + +diff -Nur linux-4.1.26.orig/kernel/relay.c linux-4.1.26/kernel/relay.c +--- linux-4.1.26.orig/kernel/relay.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/relay.c 2016-06-19 15:30:58.699297812 +0200 +@@ -339,6 +339,10 @@ + { + struct rchan_buf *buf = (struct rchan_buf *)data; + wake_up_interruptible(&buf->read_wait); ++ /* ++ * Stupid polling for now: ++ */ ++ mod_timer(&buf->timer, jiffies + 1); + } + + /** +@@ -356,6 +360,7 @@ + init_waitqueue_head(&buf->read_wait); + kref_init(&buf->kref); + setup_timer(&buf->timer, wakeup_readers, (unsigned long)buf); ++ mod_timer(&buf->timer, jiffies + 1); + } else + del_timer_sync(&buf->timer); + +@@ -739,15 +744,6 @@ + else + buf->early_bytes += buf->chan->subbuf_size - + buf->padding[old_subbuf]; +- smp_mb(); +- if (waitqueue_active(&buf->read_wait)) +- /* +- * Calling wake_up_interruptible() from here +- * will deadlock if we happen to be logging +- * from the scheduler (trying to re-grab +- * rq->lock), so defer it. +- */ +- mod_timer(&buf->timer, jiffies + 1); + } + + old = buf->data; +diff -Nur linux-4.1.26.orig/kernel/sched/completion.c linux-4.1.26/kernel/sched/completion.c +--- linux-4.1.26.orig/kernel/sched/completion.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/completion.c 2016-06-19 15:30:58.699297812 +0200 +@@ -30,10 +30,10 @@ + { + unsigned long flags; + +- spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); + x->done++; +- __wake_up_locked(&x->wait, TASK_NORMAL, 1); +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ __swait_wake_locked(&x->wait, TASK_NORMAL, 1); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + } + EXPORT_SYMBOL(complete); + +@@ -50,10 +50,10 @@ + { + unsigned long flags; + +- spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); + x->done += UINT_MAX/2; +- __wake_up_locked(&x->wait, TASK_NORMAL, 0); +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ __swait_wake_locked(&x->wait, TASK_NORMAL, 0); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + } + EXPORT_SYMBOL(complete_all); + +@@ -62,20 +62,20 @@ + long (*action)(long), long timeout, int state) + { + if (!x->done) { +- DECLARE_WAITQUEUE(wait, current); ++ DEFINE_SWAITER(wait); + +- __add_wait_queue_tail_exclusive(&x->wait, &wait); ++ swait_prepare_locked(&x->wait, &wait); + do { + if (signal_pending_state(state, current)) { + timeout = -ERESTARTSYS; + break; + } + __set_current_state(state); +- spin_unlock_irq(&x->wait.lock); ++ raw_spin_unlock_irq(&x->wait.lock); + timeout = action(timeout); +- spin_lock_irq(&x->wait.lock); ++ raw_spin_lock_irq(&x->wait.lock); + } while (!x->done && timeout); +- __remove_wait_queue(&x->wait, &wait); ++ swait_finish_locked(&x->wait, &wait); + if (!x->done) + return timeout; + } +@@ -89,9 +89,9 @@ + { + might_sleep(); + +- spin_lock_irq(&x->wait.lock); ++ raw_spin_lock_irq(&x->wait.lock); + timeout = do_wait_for_common(x, action, timeout, state); +- spin_unlock_irq(&x->wait.lock); ++ raw_spin_unlock_irq(&x->wait.lock); + return timeout; + } + +@@ -277,12 +277,12 @@ + if (!READ_ONCE(x->done)) + return 0; + +- spin_lock_irqsave(&x->wait.lock, flags); ++ raw_spin_lock_irqsave(&x->wait.lock, flags); + if (!x->done) + ret = 0; + else + x->done--; +- spin_unlock_irqrestore(&x->wait.lock, flags); ++ raw_spin_unlock_irqrestore(&x->wait.lock, flags); + return ret; + } + EXPORT_SYMBOL(try_wait_for_completion); +@@ -311,7 +311,7 @@ + * after it's acquired the lock. + */ + smp_rmb(); +- spin_unlock_wait(&x->wait.lock); ++ raw_spin_unlock_wait(&x->wait.lock); + return true; + } + EXPORT_SYMBOL(completion_done); +diff -Nur linux-4.1.26.orig/kernel/sched/core.c linux-4.1.26/kernel/sched/core.c +--- linux-4.1.26.orig/kernel/sched/core.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/core.c 2016-06-19 15:30:58.703297966 +0200 +@@ -282,7 +282,11 @@ + * Number of tasks to iterate in a single balance run. + * Limited because this is done with IRQs disabled. + */ ++#ifndef CONFIG_PREEMPT_RT_FULL + const_debug unsigned int sysctl_sched_nr_migrate = 32; ++#else ++const_debug unsigned int sysctl_sched_nr_migrate = 8; ++#endif + + /* + * period over which we average the RT time consumption, measured +@@ -461,6 +465,7 @@ + + hrtimer_init(&rq->hrtick_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + rq->hrtick_timer.function = hrtick; ++ rq->hrtick_timer.irqsafe = 1; + } + #else /* CONFIG_SCHED_HRTICK */ + static inline void hrtick_clear(struct rq *rq) +@@ -541,6 +546,52 @@ + #endif + #endif + ++void wake_q_add(struct wake_q_head *head, struct task_struct *task) ++{ ++ struct wake_q_node *node = &task->wake_q; ++ ++ /* ++ * Atomically grab the task, if ->wake_q is !nil already it means ++ * its already queued (either by us or someone else) and will get the ++ * wakeup due to that. ++ * ++ * This cmpxchg() implies a full barrier, which pairs with the write ++ * barrier implied by the wakeup in wake_up_list(). ++ */ ++ if (cmpxchg(&node->next, NULL, WAKE_Q_TAIL)) ++ return; ++ ++ get_task_struct(task); ++ ++ /* ++ * The head is context local, there can be no concurrency. ++ */ ++ *head->lastp = node; ++ head->lastp = &node->next; ++} ++ ++void wake_up_q(struct wake_q_head *head) ++{ ++ struct wake_q_node *node = head->first; ++ ++ while (node != WAKE_Q_TAIL) { ++ struct task_struct *task; ++ ++ task = container_of(node, struct task_struct, wake_q); ++ BUG_ON(!task); ++ /* task can safely be re-inserted now */ ++ node = node->next; ++ task->wake_q.next = NULL; ++ ++ /* ++ * wake_up_process() implies a wmb() to pair with the queueing ++ * in wake_q_add() so as not to miss wakeups. ++ */ ++ wake_up_process(task); ++ put_task_struct(task); ++ } ++} ++ + /* + * resched_curr - mark rq's current task 'to be rescheduled now'. + * +@@ -572,6 +623,38 @@ + trace_sched_wake_idle_without_ipi(cpu); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++void resched_curr_lazy(struct rq *rq) ++{ ++ struct task_struct *curr = rq->curr; ++ int cpu; ++ ++ if (!sched_feat(PREEMPT_LAZY)) { ++ resched_curr(rq); ++ return; ++ } ++ ++ lockdep_assert_held(&rq->lock); ++ ++ if (test_tsk_need_resched(curr)) ++ return; ++ ++ if (test_tsk_need_resched_lazy(curr)) ++ return; ++ ++ set_tsk_need_resched_lazy(curr); ++ ++ cpu = cpu_of(rq); ++ if (cpu == smp_processor_id()) ++ return; ++ ++ /* NEED_RESCHED_LAZY must be visible before we test polling */ ++ smp_mb(); ++ if (!tsk_is_polling(curr)) ++ smp_send_reschedule(cpu); ++} ++#endif ++ + void resched_cpu(int cpu) + { + struct rq *rq = cpu_rq(cpu); +@@ -595,12 +678,14 @@ + */ + int get_nohz_timer_target(int pinned) + { +- int cpu = smp_processor_id(); ++ int cpu; + int i; + struct sched_domain *sd; + ++ preempt_disable_rt(); ++ cpu = smp_processor_id(); + if (pinned || !get_sysctl_timer_migration() || !idle_cpu(cpu)) +- return cpu; ++ goto preempt_en_rt; + + rcu_read_lock(); + for_each_domain(cpu, sd) { +@@ -613,6 +698,8 @@ + } + unlock: + rcu_read_unlock(); ++preempt_en_rt: ++ preempt_enable_rt(); + return cpu; + } + /* +@@ -1164,6 +1251,18 @@ + + static int migration_cpu_stop(void *data); + ++static bool check_task_state(struct task_struct *p, long match_state) ++{ ++ bool match = false; ++ ++ raw_spin_lock_irq(&p->pi_lock); ++ if (p->state == match_state || p->saved_state == match_state) ++ match = true; ++ raw_spin_unlock_irq(&p->pi_lock); ++ ++ return match; ++} ++ + /* + * wait_task_inactive - wait for a thread to unschedule. + * +@@ -1208,7 +1307,7 @@ + * is actually now running somewhere else! + */ + while (task_running(rq, p)) { +- if (match_state && unlikely(p->state != match_state)) ++ if (match_state && !check_task_state(p, match_state)) + return 0; + cpu_relax(); + } +@@ -1223,7 +1322,8 @@ + running = task_running(rq, p); + queued = task_on_rq_queued(p); + ncsw = 0; +- if (!match_state || p->state == match_state) ++ if (!match_state || p->state == match_state || ++ p->saved_state == match_state) + ncsw = p->nvcsw | LONG_MIN; /* sets MSB */ + task_rq_unlock(rq, p, &flags); + +@@ -1449,10 +1549,6 @@ + { + activate_task(rq, p, en_flags); + p->on_rq = TASK_ON_RQ_QUEUED; +- +- /* if a worker is waking up, notify workqueue */ +- if (p->flags & PF_WQ_WORKER) +- wq_worker_waking_up(p, cpu_of(rq)); + } + + /* +@@ -1462,9 +1558,9 @@ + ttwu_do_wakeup(struct rq *rq, struct task_struct *p, int wake_flags) + { + check_preempt_curr(rq, p, wake_flags); +- trace_sched_wakeup(p, true); +- + p->state = TASK_RUNNING; ++ trace_sched_wakeup(p); ++ + #ifdef CONFIG_SMP + if (p->sched_class->task_woken) + p->sched_class->task_woken(rq, p); +@@ -1666,8 +1762,29 @@ + */ + smp_mb__before_spinlock(); + raw_spin_lock_irqsave(&p->pi_lock, flags); +- if (!(p->state & state)) ++ if (!(p->state & state)) { ++ /* ++ * The task might be running due to a spinlock sleeper ++ * wakeup. Check the saved state and set it to running ++ * if the wakeup condition is true. ++ */ ++ if (!(wake_flags & WF_LOCK_SLEEPER)) { ++ if (p->saved_state & state) { ++ p->saved_state = TASK_RUNNING; ++ success = 1; ++ } ++ } + goto out; ++ } ++ ++ /* ++ * If this is a regular wakeup, then we can unconditionally ++ * clear the saved state of a "lock sleeper". ++ */ ++ if (!(wake_flags & WF_LOCK_SLEEPER)) ++ p->saved_state = TASK_RUNNING; ++ ++ trace_sched_waking(p); + + success = 1; /* we're going to change ->state */ + cpu = task_cpu(p); +@@ -1710,42 +1827,6 @@ + } + + /** +- * try_to_wake_up_local - try to wake up a local task with rq lock held +- * @p: the thread to be awakened +- * +- * Put @p on the run-queue if it's not already there. The caller must +- * ensure that this_rq() is locked, @p is bound to this_rq() and not +- * the current task. +- */ +-static void try_to_wake_up_local(struct task_struct *p) +-{ +- struct rq *rq = task_rq(p); +- +- if (WARN_ON_ONCE(rq != this_rq()) || +- WARN_ON_ONCE(p == current)) +- return; +- +- lockdep_assert_held(&rq->lock); +- +- if (!raw_spin_trylock(&p->pi_lock)) { +- raw_spin_unlock(&rq->lock); +- raw_spin_lock(&p->pi_lock); +- raw_spin_lock(&rq->lock); +- } +- +- if (!(p->state & TASK_NORMAL)) +- goto out; +- +- if (!task_on_rq_queued(p)) +- ttwu_activate(rq, p, ENQUEUE_WAKEUP); +- +- ttwu_do_wakeup(rq, p, 0); +- ttwu_stat(p, smp_processor_id(), 0); +-out: +- raw_spin_unlock(&p->pi_lock); +-} +- +-/** + * wake_up_process - Wake up a specific process + * @p: The process to be woken up. + * +@@ -1759,11 +1840,23 @@ + */ + int wake_up_process(struct task_struct *p) + { +- WARN_ON(task_is_stopped_or_traced(p)); ++ WARN_ON(__task_is_stopped_or_traced(p)); + return try_to_wake_up(p, TASK_NORMAL, 0); + } + EXPORT_SYMBOL(wake_up_process); + ++/** ++ * wake_up_lock_sleeper - Wake up a specific process blocked on a "sleeping lock" ++ * @p: The process to be woken up. ++ * ++ * Same as wake_up_process() above, but wake_flags=WF_LOCK_SLEEPER to indicate ++ * the nature of the wakeup. ++ */ ++int wake_up_lock_sleeper(struct task_struct *p) ++{ ++ return try_to_wake_up(p, TASK_ALL, WF_LOCK_SLEEPER); ++} ++ + int wake_up_state(struct task_struct *p, unsigned int state) + { + return try_to_wake_up(p, state, 0); +@@ -1959,6 +2052,9 @@ + p->on_cpu = 0; + #endif + init_task_preempt_count(p); ++#ifdef CONFIG_HAVE_PREEMPT_LAZY ++ task_thread_info(p)->preempt_lazy_count = 0; ++#endif + #ifdef CONFIG_SMP + plist_node_init(&p->pushable_tasks, MAX_PRIO); + RB_CLEAR_NODE(&p->pushable_dl_tasks); +@@ -2094,7 +2190,7 @@ + rq = __task_rq_lock(p); + activate_task(rq, p, 0); + p->on_rq = TASK_ON_RQ_QUEUED; +- trace_sched_wakeup_new(p, true); ++ trace_sched_wakeup_new(p); + check_preempt_curr(rq, p, WF_FORK); + #ifdef CONFIG_SMP + if (p->sched_class->task_woken) +@@ -2231,8 +2327,12 @@ + finish_arch_post_lock_switch(); + + fire_sched_in_preempt_notifiers(current); ++ /* ++ * We use mmdrop_delayed() here so we don't have to do the ++ * full __mmdrop() when we are the last user. ++ */ + if (mm) +- mmdrop(mm); ++ mmdrop_delayed(mm); + if (unlikely(prev_state == TASK_DEAD)) { + if (prev->sched_class->task_dead) + prev->sched_class->task_dead(prev); +@@ -2543,16 +2643,6 @@ + } + #endif + +-notrace unsigned long get_parent_ip(unsigned long addr) +-{ +- if (in_lock_functions(addr)) { +- addr = CALLER_ADDR2; +- if (in_lock_functions(addr)) +- addr = CALLER_ADDR3; +- } +- return addr; +-} +- + #if defined(CONFIG_PREEMPT) && (defined(CONFIG_DEBUG_PREEMPT) || \ + defined(CONFIG_PREEMPT_TRACER)) + +@@ -2574,7 +2664,7 @@ + PREEMPT_MASK - 10); + #endif + if (preempt_count() == val) { +- unsigned long ip = get_parent_ip(CALLER_ADDR1); ++ unsigned long ip = get_lock_parent_ip(); + #ifdef CONFIG_DEBUG_PREEMPT + current->preempt_disable_ip = ip; + #endif +@@ -2601,7 +2691,7 @@ + #endif + + if (preempt_count() == val) +- trace_preempt_on(CALLER_ADDR0, get_parent_ip(CALLER_ADDR1)); ++ trace_preempt_on(CALLER_ADDR0, get_lock_parent_ip()); + __preempt_count_sub(val); + } + EXPORT_SYMBOL(preempt_count_sub); +@@ -2657,6 +2747,133 @@ + schedstat_inc(this_rq(), sched_count); + } + ++#if defined(CONFIG_PREEMPT_RT_FULL) && defined(CONFIG_SMP) ++#define MIGRATE_DISABLE_SET_AFFIN (1<<30) /* Can't make a negative */ ++#define migrate_disabled_updated(p) ((p)->migrate_disable & MIGRATE_DISABLE_SET_AFFIN) ++#define migrate_disable_count(p) ((p)->migrate_disable & ~MIGRATE_DISABLE_SET_AFFIN) ++ ++static inline void update_migrate_disable(struct task_struct *p) ++{ ++ const struct cpumask *mask; ++ ++ if (likely(!p->migrate_disable)) ++ return; ++ ++ /* Did we already update affinity? */ ++ if (unlikely(migrate_disabled_updated(p))) ++ return; ++ ++ /* ++ * Since this is always current we can get away with only locking ++ * rq->lock, the ->cpus_allowed value can normally only be changed ++ * while holding both p->pi_lock and rq->lock, but seeing that this ++ * is current, we cannot actually be waking up, so all code that ++ * relies on serialization against p->pi_lock is out of scope. ++ * ++ * Having rq->lock serializes us against things like ++ * set_cpus_allowed_ptr() that can still happen concurrently. ++ */ ++ mask = tsk_cpus_allowed(p); ++ ++ if (p->sched_class->set_cpus_allowed) ++ p->sched_class->set_cpus_allowed(p, mask); ++ /* mask==cpumask_of(task_cpu(p)) which has a cpumask_weight==1 */ ++ p->nr_cpus_allowed = 1; ++ ++ /* Let migrate_enable know to fix things back up */ ++ p->migrate_disable |= MIGRATE_DISABLE_SET_AFFIN; ++} ++ ++void migrate_disable(void) ++{ ++ struct task_struct *p = current; ++ ++ if (in_atomic() || irqs_disabled()) { ++#ifdef CONFIG_SCHED_DEBUG ++ p->migrate_disable_atomic++; ++#endif ++ return; ++ } ++ ++#ifdef CONFIG_SCHED_DEBUG ++ if (unlikely(p->migrate_disable_atomic)) { ++ tracing_off(); ++ WARN_ON_ONCE(1); ++ } ++#endif ++ ++ if (p->migrate_disable) { ++ p->migrate_disable++; ++ return; ++ } ++ ++ preempt_disable(); ++ preempt_lazy_disable(); ++ pin_current_cpu(); ++ p->migrate_disable = 1; ++ preempt_enable(); ++} ++EXPORT_SYMBOL(migrate_disable); ++ ++void migrate_enable(void) ++{ ++ struct task_struct *p = current; ++ const struct cpumask *mask; ++ unsigned long flags; ++ struct rq *rq; ++ ++ if (in_atomic() || irqs_disabled()) { ++#ifdef CONFIG_SCHED_DEBUG ++ p->migrate_disable_atomic--; ++#endif ++ return; ++ } ++ ++#ifdef CONFIG_SCHED_DEBUG ++ if (unlikely(p->migrate_disable_atomic)) { ++ tracing_off(); ++ WARN_ON_ONCE(1); ++ } ++#endif ++ WARN_ON_ONCE(p->migrate_disable <= 0); ++ ++ if (migrate_disable_count(p) > 1) { ++ p->migrate_disable--; ++ return; ++ } ++ ++ preempt_disable(); ++ if (unlikely(migrate_disabled_updated(p))) { ++ /* ++ * Undo whatever update_migrate_disable() did, also see there ++ * about locking. ++ */ ++ rq = this_rq(); ++ raw_spin_lock_irqsave(&rq->lock, flags); ++ ++ /* ++ * Clearing migrate_disable causes tsk_cpus_allowed to ++ * show the tasks original cpu affinity. ++ */ ++ p->migrate_disable = 0; ++ mask = tsk_cpus_allowed(p); ++ if (p->sched_class->set_cpus_allowed) ++ p->sched_class->set_cpus_allowed(p, mask); ++ p->nr_cpus_allowed = cpumask_weight(mask); ++ raw_spin_unlock_irqrestore(&rq->lock, flags); ++ } else ++ p->migrate_disable = 0; ++ ++ unpin_current_cpu(); ++ preempt_enable(); ++ preempt_lazy_enable(); ++} ++EXPORT_SYMBOL(migrate_enable); ++#else ++static inline void update_migrate_disable(struct task_struct *p) { } ++#define migrate_disabled_updated(p) 0 ++#endif ++ + /* + * Pick up the highest-prio task: + */ +@@ -2763,6 +2980,8 @@ + smp_mb__before_spinlock(); + raw_spin_lock_irq(&rq->lock); + ++ update_migrate_disable(prev); ++ + rq->clock_skip_update <<= 1; /* promote REQ to ACT */ + + switch_count = &prev->nivcsw; +@@ -2772,19 +2991,6 @@ + } else { + deactivate_task(rq, prev, DEQUEUE_SLEEP); + prev->on_rq = 0; +- +- /* +- * If a worker went to sleep, notify and ask workqueue +- * whether it wants to wake up a task to maintain +- * concurrency. +- */ +- if (prev->flags & PF_WQ_WORKER) { +- struct task_struct *to_wakeup; +- +- to_wakeup = wq_worker_sleeping(prev, cpu); +- if (to_wakeup) +- try_to_wake_up_local(to_wakeup); +- } + } + switch_count = &prev->nvcsw; + } +@@ -2794,6 +3000,7 @@ + + next = pick_next_task(rq, prev); + clear_tsk_need_resched(prev); ++ clear_tsk_need_resched_lazy(prev); + clear_preempt_need_resched(); + rq->clock_skip_update = 0; + +@@ -2814,8 +3021,19 @@ + + static inline void sched_submit_work(struct task_struct *tsk) + { +- if (!tsk->state || tsk_is_pi_blocked(tsk)) ++ if (!tsk->state) ++ return; ++ /* ++ * If a worker went to sleep, notify and ask workqueue whether ++ * it wants to wake up a task to maintain concurrency. ++ */ ++ if (tsk->flags & PF_WQ_WORKER) ++ wq_worker_sleeping(tsk); ++ ++ ++ if (tsk_is_pi_blocked(tsk)) + return; ++ + /* + * If we are going to sleep and we have plugged IO queued, + * make sure to submit it to avoid deadlocks. +@@ -2824,6 +3042,12 @@ + blk_schedule_flush_plug(tsk); + } + ++static void sched_update_worker(struct task_struct *tsk) ++{ ++ if (tsk->flags & PF_WQ_WORKER) ++ wq_worker_running(tsk); ++} ++ + asmlinkage __visible void __sched schedule(void) + { + struct task_struct *tsk = current; +@@ -2832,6 +3056,7 @@ + do { + __schedule(); + } while (need_resched()); ++ sched_update_worker(tsk); + } + EXPORT_SYMBOL(schedule); + +@@ -2881,6 +3106,30 @@ + } while (need_resched()); + } + ++#ifdef CONFIG_PREEMPT_LAZY ++/* ++ * If TIF_NEED_RESCHED is then we allow to be scheduled away since this is ++ * set by a RT task. Oterwise we try to avoid beeing scheduled out as long as ++ * preempt_lazy_count counter >0. ++ */ ++static __always_inline int preemptible_lazy(void) ++{ ++ if (test_thread_flag(TIF_NEED_RESCHED)) ++ return 1; ++ if (current_thread_info()->preempt_lazy_count) ++ return 0; ++ return 1; ++} ++ ++#else ++ ++static int preemptible_lazy(void) ++{ ++ return 1; ++} ++ ++#endif ++ + #ifdef CONFIG_PREEMPT + /* + * this is the entry point to schedule() from in-kernel preemption +@@ -2895,6 +3144,8 @@ + */ + if (likely(!preemptible())) + return; ++ if (!preemptible_lazy()) ++ return; + + preempt_schedule_common(); + } +@@ -2922,6 +3173,8 @@ + + if (likely(!preemptible())) + return; ++ if (!preemptible_lazy()) ++ return; + + do { + __preempt_count_add(PREEMPT_ACTIVE); +@@ -2931,7 +3184,16 @@ + * an infinite recursion. + */ + prev_ctx = exception_enter(); ++ /* ++ * The add/subtract must not be traced by the function ++ * tracer. But we still want to account for the ++ * preempt off latency tracer. Since the _notrace versions ++ * of add/subtract skip the accounting for latency tracer ++ * we must force it manually. ++ */ ++ start_critical_timings(); + __schedule(); ++ stop_critical_timings(); + exception_exit(prev_ctx); + + __preempt_count_sub(PREEMPT_ACTIVE); +@@ -4268,6 +4530,7 @@ + } + EXPORT_SYMBOL(__cond_resched_lock); + ++#ifndef CONFIG_PREEMPT_RT_FULL + int __sched __cond_resched_softirq(void) + { + BUG_ON(!in_softirq()); +@@ -4281,6 +4544,7 @@ + return 0; + } + EXPORT_SYMBOL(__cond_resched_softirq); ++#endif + + /** + * yield - yield the current processor to other threads. +@@ -4635,7 +4899,9 @@ + + /* Set the preempt count _outside_ the spinlocks! */ + init_idle_preempt_count(idle, cpu); +- ++#ifdef CONFIG_HAVE_PREEMPT_LAZY ++ task_thread_info(idle)->preempt_lazy_count = 0; ++#endif + /* + * The idle tasks have their own, simple scheduling class: + */ +@@ -4755,11 +5021,91 @@ + + void do_set_cpus_allowed(struct task_struct *p, const struct cpumask *new_mask) + { +- if (p->sched_class->set_cpus_allowed) +- p->sched_class->set_cpus_allowed(p, new_mask); ++ if (!migrate_disabled_updated(p)) { ++ if (p->sched_class->set_cpus_allowed) ++ p->sched_class->set_cpus_allowed(p, new_mask); ++ p->nr_cpus_allowed = cpumask_weight(new_mask); ++ } + + cpumask_copy(&p->cpus_allowed, new_mask); +- p->nr_cpus_allowed = cpumask_weight(new_mask); ++} ++ ++static DEFINE_PER_CPU(struct cpumask, sched_cpumasks); ++static DEFINE_MUTEX(sched_down_mutex); ++static cpumask_t sched_down_cpumask; ++ ++void tell_sched_cpu_down_begin(int cpu) ++{ ++ mutex_lock(&sched_down_mutex); ++ cpumask_set_cpu(cpu, &sched_down_cpumask); ++ mutex_unlock(&sched_down_mutex); ++} ++ ++void tell_sched_cpu_down_done(int cpu) ++{ ++ mutex_lock(&sched_down_mutex); ++ cpumask_clear_cpu(cpu, &sched_down_cpumask); ++ mutex_unlock(&sched_down_mutex); ++} ++ ++/** ++ * migrate_me - try to move the current task off this cpu ++ * ++ * Used by the pin_current_cpu() code to try to get tasks ++ * to move off the current CPU as it is going down. ++ * It will only move the task if the task isn't pinned to ++ * the CPU (with migrate_disable, affinity or NO_SETAFFINITY) ++ * and the task has to be in a RUNNING state. Otherwise the ++ * movement of the task will wake it up (change its state ++ * to running) when the task did not expect it. ++ * ++ * Returns 1 if it succeeded in moving the current task ++ * 0 otherwise. ++ */ ++int migrate_me(void) ++{ ++ struct task_struct *p = current; ++ struct migration_arg arg; ++ struct cpumask *cpumask; ++ struct cpumask *mask; ++ unsigned long flags; ++ unsigned int dest_cpu; ++ struct rq *rq; ++ ++ /* ++ * We can not migrate tasks bounded to a CPU or tasks not ++ * running. The movement of the task will wake it up. ++ */ ++ if (p->flags & PF_NO_SETAFFINITY || p->state) ++ return 0; ++ ++ mutex_lock(&sched_down_mutex); ++ rq = task_rq_lock(p, &flags); ++ ++ cpumask = this_cpu_ptr(&sched_cpumasks); ++ mask = &p->cpus_allowed; ++ ++ cpumask_andnot(cpumask, mask, &sched_down_cpumask); ++ ++ if (!cpumask_weight(cpumask)) { ++ /* It's only on this CPU? */ ++ task_rq_unlock(rq, p, &flags); ++ mutex_unlock(&sched_down_mutex); ++ return 0; ++ } ++ ++ dest_cpu = cpumask_any_and(cpu_active_mask, cpumask); ++ ++ arg.task = p; ++ arg.dest_cpu = dest_cpu; ++ ++ task_rq_unlock(rq, p, &flags); ++ ++ stop_one_cpu(cpu_of(rq), migration_cpu_stop, &arg); ++ tlb_migrate_finish(p->mm); ++ mutex_unlock(&sched_down_mutex); ++ ++ return 1; + } + + /* +@@ -4805,7 +5151,7 @@ + do_set_cpus_allowed(p, new_mask); + + /* Can the task run on the task's current CPU? If so, we're done */ +- if (cpumask_test_cpu(task_cpu(p), new_mask)) ++ if (cpumask_test_cpu(task_cpu(p), new_mask) || __migrate_disabled(p)) + goto out; + + dest_cpu = cpumask_any_and(cpu_active_mask, new_mask); +@@ -4945,6 +5291,8 @@ + + #ifdef CONFIG_HOTPLUG_CPU + ++static DEFINE_PER_CPU(struct mm_struct *, idle_last_mm); ++ + /* + * Ensures that the idle task is using init_mm right before its cpu goes + * offline. +@@ -4959,7 +5307,11 @@ + switch_mm(mm, &init_mm, current); + finish_arch_post_lock_switch(); + } +- mmdrop(mm); ++ /* ++ * Defer the cleanup to an alive cpu. On RT we can neither ++ * call mmdrop() nor mmdrop_delayed() from here. ++ */ ++ per_cpu(idle_last_mm, smp_processor_id()) = mm; + } + + /* +@@ -5302,6 +5654,10 @@ + + case CPU_DEAD: + calc_load_migrate(rq); ++ if (per_cpu(idle_last_mm, cpu)) { ++ mmdrop(per_cpu(idle_last_mm, cpu)); ++ per_cpu(idle_last_mm, cpu) = NULL; ++ } + break; + #endif + } +@@ -7281,7 +7637,8 @@ + #ifdef CONFIG_DEBUG_ATOMIC_SLEEP + static inline int preempt_count_equals(int preempt_offset) + { +- int nested = (preempt_count() & ~PREEMPT_ACTIVE) + rcu_preempt_depth(); ++ int nested = (preempt_count() & ~PREEMPT_ACTIVE) + ++ sched_rcu_preempt_depth(); + + return (nested == preempt_offset); + } +diff -Nur linux-4.1.26.orig/kernel/sched/cputime.c linux-4.1.26/kernel/sched/cputime.c +--- linux-4.1.26.orig/kernel/sched/cputime.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/cputime.c 2016-06-19 15:30:58.703297966 +0200 +@@ -675,37 +675,45 @@ + + void vtime_account_system(struct task_struct *tsk) + { +- write_seqlock(&tsk->vtime_seqlock); ++ raw_spin_lock(&tsk->vtime_lock); ++ write_seqcount_begin(&tsk->vtime_seq); + __vtime_account_system(tsk); +- write_sequnlock(&tsk->vtime_seqlock); ++ write_seqcount_end(&tsk->vtime_seq); ++ raw_spin_unlock(&tsk->vtime_lock); + } + + void vtime_gen_account_irq_exit(struct task_struct *tsk) + { +- write_seqlock(&tsk->vtime_seqlock); ++ raw_spin_lock(&tsk->vtime_lock); ++ write_seqcount_begin(&tsk->vtime_seq); + __vtime_account_system(tsk); + if (context_tracking_in_user()) + tsk->vtime_snap_whence = VTIME_USER; +- write_sequnlock(&tsk->vtime_seqlock); ++ write_seqcount_end(&tsk->vtime_seq); ++ raw_spin_unlock(&tsk->vtime_lock); + } + + void vtime_account_user(struct task_struct *tsk) + { + cputime_t delta_cpu; + +- write_seqlock(&tsk->vtime_seqlock); ++ raw_spin_lock(&tsk->vtime_lock); ++ write_seqcount_begin(&tsk->vtime_seq); + delta_cpu = get_vtime_delta(tsk); + tsk->vtime_snap_whence = VTIME_SYS; + account_user_time(tsk, delta_cpu, cputime_to_scaled(delta_cpu)); +- write_sequnlock(&tsk->vtime_seqlock); ++ write_seqcount_end(&tsk->vtime_seq); ++ raw_spin_unlock(&tsk->vtime_lock); + } + + void vtime_user_enter(struct task_struct *tsk) + { +- write_seqlock(&tsk->vtime_seqlock); ++ raw_spin_lock(&tsk->vtime_lock); ++ write_seqcount_begin(&tsk->vtime_seq); + __vtime_account_system(tsk); + tsk->vtime_snap_whence = VTIME_USER; +- write_sequnlock(&tsk->vtime_seqlock); ++ write_seqcount_end(&tsk->vtime_seq); ++ raw_spin_unlock(&tsk->vtime_lock); + } + + void vtime_guest_enter(struct task_struct *tsk) +@@ -717,19 +725,23 @@ + * synchronization against the reader (task_gtime()) + * that can thus safely catch up with a tickless delta. + */ +- write_seqlock(&tsk->vtime_seqlock); ++ raw_spin_lock(&tsk->vtime_lock); ++ write_seqcount_begin(&tsk->vtime_seq); + __vtime_account_system(tsk); + current->flags |= PF_VCPU; +- write_sequnlock(&tsk->vtime_seqlock); ++ write_seqcount_end(&tsk->vtime_seq); ++ raw_spin_unlock(&tsk->vtime_lock); + } + EXPORT_SYMBOL_GPL(vtime_guest_enter); + + void vtime_guest_exit(struct task_struct *tsk) + { +- write_seqlock(&tsk->vtime_seqlock); ++ raw_spin_lock(&tsk->vtime_lock); ++ write_seqcount_begin(&tsk->vtime_seq); + __vtime_account_system(tsk); + current->flags &= ~PF_VCPU; +- write_sequnlock(&tsk->vtime_seqlock); ++ write_seqcount_end(&tsk->vtime_seq); ++ raw_spin_unlock(&tsk->vtime_lock); + } + EXPORT_SYMBOL_GPL(vtime_guest_exit); + +@@ -742,24 +754,30 @@ + + void arch_vtime_task_switch(struct task_struct *prev) + { +- write_seqlock(&prev->vtime_seqlock); ++ raw_spin_lock(&prev->vtime_lock); ++ write_seqcount_begin(&prev->vtime_seq); + prev->vtime_snap_whence = VTIME_SLEEPING; +- write_sequnlock(&prev->vtime_seqlock); ++ write_seqcount_end(&prev->vtime_seq); ++ raw_spin_unlock(&prev->vtime_lock); + +- write_seqlock(¤t->vtime_seqlock); ++ raw_spin_lock(¤t->vtime_lock); ++ write_seqcount_begin(¤t->vtime_seq); + current->vtime_snap_whence = VTIME_SYS; + current->vtime_snap = sched_clock_cpu(smp_processor_id()); +- write_sequnlock(¤t->vtime_seqlock); ++ write_seqcount_end(¤t->vtime_seq); ++ raw_spin_unlock(¤t->vtime_lock); + } + + void vtime_init_idle(struct task_struct *t, int cpu) + { + unsigned long flags; + +- write_seqlock_irqsave(&t->vtime_seqlock, flags); ++ raw_spin_lock_irqsave(&t->vtime_lock, flags); ++ write_seqcount_begin(&t->vtime_seq); + t->vtime_snap_whence = VTIME_SYS; + t->vtime_snap = sched_clock_cpu(cpu); +- write_sequnlock_irqrestore(&t->vtime_seqlock, flags); ++ write_seqcount_end(&t->vtime_seq); ++ raw_spin_unlock_irqrestore(&t->vtime_lock, flags); + } + + cputime_t task_gtime(struct task_struct *t) +@@ -768,13 +786,13 @@ + cputime_t gtime; + + do { +- seq = read_seqbegin(&t->vtime_seqlock); ++ seq = read_seqcount_begin(&t->vtime_seq); + + gtime = t->gtime; + if (t->flags & PF_VCPU) + gtime += vtime_delta(t); + +- } while (read_seqretry(&t->vtime_seqlock, seq)); ++ } while (read_seqcount_retry(&t->vtime_seq, seq)); + + return gtime; + } +@@ -797,7 +815,7 @@ + *udelta = 0; + *sdelta = 0; + +- seq = read_seqbegin(&t->vtime_seqlock); ++ seq = read_seqcount_begin(&t->vtime_seq); + + if (u_dst) + *u_dst = *u_src; +@@ -821,7 +839,7 @@ + if (t->vtime_snap_whence == VTIME_SYS) + *sdelta = delta; + } +- } while (read_seqretry(&t->vtime_seqlock, seq)); ++ } while (read_seqcount_retry(&t->vtime_seq, seq)); + } + + +diff -Nur linux-4.1.26.orig/kernel/sched/deadline.c linux-4.1.26/kernel/sched/deadline.c +--- linux-4.1.26.orig/kernel/sched/deadline.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/deadline.c 2016-06-19 15:30:58.703297966 +0200 +@@ -637,6 +637,7 @@ + + hrtimer_init(timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + timer->function = dl_task_timer; ++ timer->irqsafe = 1; + } + + static +diff -Nur linux-4.1.26.orig/kernel/sched/debug.c linux-4.1.26/kernel/sched/debug.c +--- linux-4.1.26.orig/kernel/sched/debug.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/debug.c 2016-06-19 15:30:58.703297966 +0200 +@@ -260,6 +260,9 @@ + P(rt_throttled); + PN(rt_time); + PN(rt_runtime); ++#ifdef CONFIG_SMP ++ P(rt_nr_migratory); ++#endif + + #undef PN + #undef P +@@ -648,6 +651,10 @@ + #endif + P(policy); + P(prio); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ P(migrate_disable); ++#endif ++ P(nr_cpus_allowed); + #undef PN + #undef __PN + #undef P +diff -Nur linux-4.1.26.orig/kernel/sched/fair.c linux-4.1.26/kernel/sched/fair.c +--- linux-4.1.26.orig/kernel/sched/fair.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/fair.c 2016-06-19 15:30:58.703297966 +0200 +@@ -3201,7 +3201,7 @@ + ideal_runtime = sched_slice(cfs_rq, curr); + delta_exec = curr->sum_exec_runtime - curr->prev_sum_exec_runtime; + if (delta_exec > ideal_runtime) { +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + /* + * The current task ran long enough, ensure it doesn't get + * re-elected due to buddy favours. +@@ -3225,7 +3225,7 @@ + return; + + if (delta > ideal_runtime) +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + } + + static void +@@ -3366,7 +3366,7 @@ + * validating it and just reschedule. + */ + if (queued) { +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + return; + } + /* +@@ -3557,7 +3557,7 @@ + * hierarchy can be throttled + */ + if (!assign_cfs_rq_runtime(cfs_rq) && likely(cfs_rq->curr)) +- resched_curr(rq_of(cfs_rq)); ++ resched_curr_lazy(rq_of(cfs_rq)); + } + + static __always_inline +@@ -4180,7 +4180,7 @@ + + if (delta < 0) { + if (rq->curr == p) +- resched_curr(rq); ++ resched_curr_lazy(rq); + return; + } + hrtick_start(rq, delta); +@@ -5076,7 +5076,7 @@ + return; + + preempt: +- resched_curr(rq); ++ resched_curr_lazy(rq); + /* + * Only set the backward buddy when the current task is still + * on the rq. This can happen when a wakeup gets interleaved +@@ -7869,7 +7869,7 @@ + * 'current' within the tree based on its new key value. + */ + swap(curr->vruntime, se->vruntime); +- resched_curr(rq); ++ resched_curr_lazy(rq); + } + + se->vruntime -= cfs_rq->min_vruntime; +@@ -7894,7 +7894,7 @@ + */ + if (rq->curr == p) { + if (p->prio > oldprio) +- resched_curr(rq); ++ resched_curr_lazy(rq); + } else + check_preempt_curr(rq, p, 0); + } +diff -Nur linux-4.1.26.orig/kernel/sched/features.h linux-4.1.26/kernel/sched/features.h +--- linux-4.1.26.orig/kernel/sched/features.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/features.h 2016-06-19 15:30:58.707298121 +0200 +@@ -50,11 +50,19 @@ + */ + SCHED_FEAT(NONTASK_CAPACITY, true) + ++#ifdef CONFIG_PREEMPT_RT_FULL ++SCHED_FEAT(TTWU_QUEUE, false) ++# ifdef CONFIG_PREEMPT_LAZY ++SCHED_FEAT(PREEMPT_LAZY, true) ++# endif ++#else ++ + /* + * Queue remote wakeups on the target CPU and process them + * using the scheduler IPI. Reduces rq->lock contention/bounces. + */ + SCHED_FEAT(TTWU_QUEUE, true) ++#endif + + #ifdef HAVE_RT_PUSH_IPI + /* +diff -Nur linux-4.1.26.orig/kernel/sched/Makefile linux-4.1.26/kernel/sched/Makefile +--- linux-4.1.26.orig/kernel/sched/Makefile 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/Makefile 2016-06-19 15:30:58.699297812 +0200 +@@ -13,7 +13,7 @@ + + obj-y += core.o proc.o clock.o cputime.o + obj-y += idle_task.o fair.o rt.o deadline.o stop_task.o +-obj-y += wait.o completion.o idle.o ++obj-y += wait.o wait-simple.o work-simple.o completion.o idle.o + obj-$(CONFIG_SMP) += cpupri.o cpudeadline.o + obj-$(CONFIG_SCHED_AUTOGROUP) += auto_group.o + obj-$(CONFIG_SCHEDSTATS) += stats.o +diff -Nur linux-4.1.26.orig/kernel/sched/rt.c linux-4.1.26/kernel/sched/rt.c +--- linux-4.1.26.orig/kernel/sched/rt.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/rt.c 2016-06-19 15:30:58.707298121 +0200 +@@ -44,6 +44,7 @@ + + hrtimer_init(&rt_b->rt_period_timer, + CLOCK_MONOTONIC, HRTIMER_MODE_REL); ++ rt_b->rt_period_timer.irqsafe = 1; + rt_b->rt_period_timer.function = sched_rt_period_timer; + } + +@@ -89,6 +90,7 @@ + rt_rq->push_cpu = nr_cpu_ids; + raw_spin_lock_init(&rt_rq->push_lock); + init_irq_work(&rt_rq->push_work, push_irq_work_func); ++ rt_rq->push_work.flags |= IRQ_WORK_HARD_IRQ; + #endif + #endif /* CONFIG_SMP */ + /* We start is dequeued state, because no RT tasks are queued */ +diff -Nur linux-4.1.26.orig/kernel/sched/sched.h linux-4.1.26/kernel/sched/sched.h +--- linux-4.1.26.orig/kernel/sched/sched.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/sched/sched.h 2016-06-19 15:30:58.707298121 +0200 +@@ -1093,6 +1093,7 @@ + #define WF_SYNC 0x01 /* waker goes to sleep after wakeup */ + #define WF_FORK 0x02 /* child wakeup after fork */ + #define WF_MIGRATED 0x4 /* internal use, task got migrated */ ++#define WF_LOCK_SLEEPER 0x08 /* wakeup spinlock "sleeper" */ + + /* + * To aid in avoiding the subversion of "niceness" due to uneven distribution +@@ -1290,6 +1291,15 @@ + extern void resched_curr(struct rq *rq); + extern void resched_cpu(int cpu); + ++#ifdef CONFIG_PREEMPT_LAZY ++extern void resched_curr_lazy(struct rq *rq); ++#else ++static inline void resched_curr_lazy(struct rq *rq) ++{ ++ resched_curr(rq); ++} ++#endif ++ + extern struct rt_bandwidth def_rt_bandwidth; + extern void init_rt_bandwidth(struct rt_bandwidth *rt_b, u64 period, u64 runtime); + +diff -Nur linux-4.1.26.orig/kernel/sched/wait-simple.c linux-4.1.26/kernel/sched/wait-simple.c +--- linux-4.1.26.orig/kernel/sched/wait-simple.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/kernel/sched/wait-simple.c 2016-06-19 15:30:58.707298121 +0200 +@@ -0,0 +1,115 @@ ++/* ++ * Simple waitqueues without fancy flags and callbacks ++ * ++ * (C) 2011 Thomas Gleixner ++ * ++ * Based on kernel/wait.c ++ * ++ * For licencing details see kernel-base/COPYING ++ */ ++#include ++#include ++#include ++#include ++ ++/* Adds w to head->list. Must be called with head->lock locked. */ ++static inline void __swait_enqueue(struct swait_head *head, struct swaiter *w) ++{ ++ list_add(&w->node, &head->list); ++ /* We can't let the condition leak before the setting of head */ ++ smp_mb(); ++} ++ ++/* Removes w from head->list. Must be called with head->lock locked. */ ++static inline void __swait_dequeue(struct swaiter *w) ++{ ++ list_del_init(&w->node); ++} ++ ++void __init_swait_head(struct swait_head *head, struct lock_class_key *key) ++{ ++ raw_spin_lock_init(&head->lock); ++ lockdep_set_class(&head->lock, key); ++ INIT_LIST_HEAD(&head->list); ++} ++EXPORT_SYMBOL(__init_swait_head); ++ ++void swait_prepare_locked(struct swait_head *head, struct swaiter *w) ++{ ++ w->task = current; ++ if (list_empty(&w->node)) ++ __swait_enqueue(head, w); ++} ++ ++void swait_prepare(struct swait_head *head, struct swaiter *w, int state) ++{ ++ unsigned long flags; ++ ++ raw_spin_lock_irqsave(&head->lock, flags); ++ swait_prepare_locked(head, w); ++ __set_current_state(state); ++ raw_spin_unlock_irqrestore(&head->lock, flags); ++} ++EXPORT_SYMBOL(swait_prepare); ++ ++void swait_finish_locked(struct swait_head *head, struct swaiter *w) ++{ ++ __set_current_state(TASK_RUNNING); ++ if (w->task) ++ __swait_dequeue(w); ++} ++ ++void swait_finish(struct swait_head *head, struct swaiter *w) ++{ ++ unsigned long flags; ++ ++ __set_current_state(TASK_RUNNING); ++ if (w->task) { ++ raw_spin_lock_irqsave(&head->lock, flags); ++ __swait_dequeue(w); ++ raw_spin_unlock_irqrestore(&head->lock, flags); ++ } ++} ++EXPORT_SYMBOL(swait_finish); ++ ++unsigned int ++__swait_wake_locked(struct swait_head *head, unsigned int state, unsigned int num) ++{ ++ struct swaiter *curr, *next; ++ int woken = 0; ++ ++ list_for_each_entry_safe(curr, next, &head->list, node) { ++ if (wake_up_state(curr->task, state)) { ++ __swait_dequeue(curr); ++ /* ++ * The waiting task can free the waiter as ++ * soon as curr->task = NULL is written, ++ * without taking any locks. A memory barrier ++ * is required here to prevent the following ++ * store to curr->task from getting ahead of ++ * the dequeue operation. ++ */ ++ smp_wmb(); ++ curr->task = NULL; ++ if (++woken == num) ++ break; ++ } ++ } ++ return woken; ++} ++ ++unsigned int ++__swait_wake(struct swait_head *head, unsigned int state, unsigned int num) ++{ ++ unsigned long flags; ++ int woken; ++ ++ if (!swaitqueue_active(head)) ++ return 0; ++ ++ raw_spin_lock_irqsave(&head->lock, flags); ++ woken = __swait_wake_locked(head, state, num); ++ raw_spin_unlock_irqrestore(&head->lock, flags); ++ return woken; ++} ++EXPORT_SYMBOL(__swait_wake); +diff -Nur linux-4.1.26.orig/kernel/sched/work-simple.c linux-4.1.26/kernel/sched/work-simple.c +--- linux-4.1.26.orig/kernel/sched/work-simple.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/kernel/sched/work-simple.c 2016-06-19 15:30:58.707298121 +0200 +@@ -0,0 +1,173 @@ ++/* ++ * Copyright (C) 2014 BMW Car IT GmbH, Daniel Wagner daniel.wagner@bmw-carit.de ++ * ++ * Provides a framework for enqueuing callbacks from irq context ++ * PREEMPT_RT_FULL safe. The callbacks are executed in kthread context. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SWORK_EVENT_PENDING (1 << 0) ++ ++static DEFINE_MUTEX(worker_mutex); ++static struct sworker *glob_worker; ++ ++struct sworker { ++ struct list_head events; ++ struct swait_head wq; ++ ++ raw_spinlock_t lock; ++ ++ struct task_struct *task; ++ int refs; ++}; ++ ++static bool swork_readable(struct sworker *worker) ++{ ++ bool r; ++ ++ if (kthread_should_stop()) ++ return true; ++ ++ raw_spin_lock_irq(&worker->lock); ++ r = !list_empty(&worker->events); ++ raw_spin_unlock_irq(&worker->lock); ++ ++ return r; ++} ++ ++static int swork_kthread(void *arg) ++{ ++ struct sworker *worker = arg; ++ ++ for (;;) { ++ swait_event_interruptible(worker->wq, ++ swork_readable(worker)); ++ if (kthread_should_stop()) ++ break; ++ ++ raw_spin_lock_irq(&worker->lock); ++ while (!list_empty(&worker->events)) { ++ struct swork_event *sev; ++ ++ sev = list_first_entry(&worker->events, ++ struct swork_event, item); ++ list_del(&sev->item); ++ raw_spin_unlock_irq(&worker->lock); ++ ++ WARN_ON_ONCE(!test_and_clear_bit(SWORK_EVENT_PENDING, ++ &sev->flags)); ++ sev->func(sev); ++ raw_spin_lock_irq(&worker->lock); ++ } ++ raw_spin_unlock_irq(&worker->lock); ++ } ++ return 0; ++} ++ ++static struct sworker *swork_create(void) ++{ ++ struct sworker *worker; ++ ++ worker = kzalloc(sizeof(*worker), GFP_KERNEL); ++ if (!worker) ++ return ERR_PTR(-ENOMEM); ++ ++ INIT_LIST_HEAD(&worker->events); ++ raw_spin_lock_init(&worker->lock); ++ init_swait_head(&worker->wq); ++ ++ worker->task = kthread_run(swork_kthread, worker, "kswork"); ++ if (IS_ERR(worker->task)) { ++ kfree(worker); ++ return ERR_PTR(-ENOMEM); ++ } ++ ++ return worker; ++} ++ ++static void swork_destroy(struct sworker *worker) ++{ ++ kthread_stop(worker->task); ++ ++ WARN_ON(!list_empty(&worker->events)); ++ kfree(worker); ++} ++ ++/** ++ * swork_queue - queue swork ++ * ++ * Returns %false if @work was already on a queue, %true otherwise. ++ * ++ * The work is queued and processed on a random CPU ++ */ ++bool swork_queue(struct swork_event *sev) ++{ ++ unsigned long flags; ++ ++ if (test_and_set_bit(SWORK_EVENT_PENDING, &sev->flags)) ++ return false; ++ ++ raw_spin_lock_irqsave(&glob_worker->lock, flags); ++ list_add_tail(&sev->item, &glob_worker->events); ++ raw_spin_unlock_irqrestore(&glob_worker->lock, flags); ++ ++ swait_wake(&glob_worker->wq); ++ return true; ++} ++EXPORT_SYMBOL_GPL(swork_queue); ++ ++/** ++ * swork_get - get an instance of the sworker ++ * ++ * Returns an negative error code if the initialization if the worker did not ++ * work, %0 otherwise. ++ * ++ */ ++int swork_get(void) ++{ ++ struct sworker *worker; ++ ++ mutex_lock(&worker_mutex); ++ if (!glob_worker) { ++ worker = swork_create(); ++ if (IS_ERR(worker)) { ++ mutex_unlock(&worker_mutex); ++ return -ENOMEM; ++ } ++ ++ glob_worker = worker; ++ } ++ ++ glob_worker->refs++; ++ mutex_unlock(&worker_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(swork_get); ++ ++/** ++ * swork_put - puts an instance of the sworker ++ * ++ * Will destroy the sworker thread. This function must not be called until all ++ * queued events have been completed. ++ */ ++void swork_put(void) ++{ ++ mutex_lock(&worker_mutex); ++ ++ glob_worker->refs--; ++ if (glob_worker->refs > 0) ++ goto out; ++ ++ swork_destroy(glob_worker); ++ glob_worker = NULL; ++out: ++ mutex_unlock(&worker_mutex); ++} ++EXPORT_SYMBOL_GPL(swork_put); +diff -Nur linux-4.1.26.orig/kernel/signal.c linux-4.1.26/kernel/signal.c +--- linux-4.1.26.orig/kernel/signal.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/signal.c 2016-06-19 15:30:58.707298121 +0200 +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -352,13 +353,45 @@ + return false; + } + ++#ifdef __HAVE_ARCH_CMPXCHG ++static inline struct sigqueue *get_task_cache(struct task_struct *t) ++{ ++ struct sigqueue *q = t->sigqueue_cache; ++ ++ if (cmpxchg(&t->sigqueue_cache, q, NULL) != q) ++ return NULL; ++ return q; ++} ++ ++static inline int put_task_cache(struct task_struct *t, struct sigqueue *q) ++{ ++ if (cmpxchg(&t->sigqueue_cache, NULL, q) == NULL) ++ return 0; ++ return 1; ++} ++ ++#else ++ ++static inline struct sigqueue *get_task_cache(struct task_struct *t) ++{ ++ return NULL; ++} ++ ++static inline int put_task_cache(struct task_struct *t, struct sigqueue *q) ++{ ++ return 1; ++} ++ ++#endif ++ + /* + * allocate a new signal queue record + * - this may be called without locks if and only if t == current, otherwise an + * appropriate lock must be held to stop the target task from exiting + */ + static struct sigqueue * +-__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimit) ++__sigqueue_do_alloc(int sig, struct task_struct *t, gfp_t flags, ++ int override_rlimit, int fromslab) + { + struct sigqueue *q = NULL; + struct user_struct *user; +@@ -375,7 +408,10 @@ + if (override_rlimit || + atomic_read(&user->sigpending) <= + task_rlimit(t, RLIMIT_SIGPENDING)) { +- q = kmem_cache_alloc(sigqueue_cachep, flags); ++ if (!fromslab) ++ q = get_task_cache(t); ++ if (!q) ++ q = kmem_cache_alloc(sigqueue_cachep, flags); + } else { + print_dropped_signal(sig); + } +@@ -392,6 +428,13 @@ + return q; + } + ++static struct sigqueue * ++__sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, ++ int override_rlimit) ++{ ++ return __sigqueue_do_alloc(sig, t, flags, override_rlimit, 0); ++} ++ + static void __sigqueue_free(struct sigqueue *q) + { + if (q->flags & SIGQUEUE_PREALLOC) +@@ -401,6 +444,21 @@ + kmem_cache_free(sigqueue_cachep, q); + } + ++static void sigqueue_free_current(struct sigqueue *q) ++{ ++ struct user_struct *up; ++ ++ if (q->flags & SIGQUEUE_PREALLOC) ++ return; ++ ++ up = q->user; ++ if (rt_prio(current->normal_prio) && !put_task_cache(current, q)) { ++ atomic_dec(&up->sigpending); ++ free_uid(up); ++ } else ++ __sigqueue_free(q); ++} ++ + void flush_sigqueue(struct sigpending *queue) + { + struct sigqueue *q; +@@ -414,6 +472,21 @@ + } + + /* ++ * Called from __exit_signal. Flush tsk->pending and ++ * tsk->sigqueue_cache ++ */ ++void flush_task_sigqueue(struct task_struct *tsk) ++{ ++ struct sigqueue *q; ++ ++ flush_sigqueue(&tsk->pending); ++ ++ q = get_task_cache(tsk); ++ if (q) ++ kmem_cache_free(sigqueue_cachep, q); ++} ++ ++/* + * Flush all pending signals for a task. + */ + void __flush_signals(struct task_struct *t) +@@ -565,7 +638,7 @@ + still_pending: + list_del_init(&first->list); + copy_siginfo(info, &first->info); +- __sigqueue_free(first); ++ sigqueue_free_current(first); + } else { + /* + * Ok, it wasn't in the queue. This must be +@@ -611,6 +684,8 @@ + { + int signr; + ++ WARN_ON_ONCE(tsk != current); ++ + /* We only dequeue private signals from ourselves, we don't let + * signalfd steal them + */ +@@ -1207,8 +1282,8 @@ + * We don't want to have recursive SIGSEGV's etc, for example, + * that is why we also clear SIGNAL_UNKILLABLE. + */ +-int +-force_sig_info(int sig, struct siginfo *info, struct task_struct *t) ++static int ++do_force_sig_info(int sig, struct siginfo *info, struct task_struct *t) + { + unsigned long int flags; + int ret, blocked, ignored; +@@ -1233,6 +1308,39 @@ + return ret; + } + ++int force_sig_info(int sig, struct siginfo *info, struct task_struct *t) ++{ ++/* ++ * On some archs, PREEMPT_RT has to delay sending a signal from a trap ++ * since it can not enable preemption, and the signal code's spin_locks ++ * turn into mutexes. Instead, it must set TIF_NOTIFY_RESUME which will ++ * send the signal on exit of the trap. ++ */ ++#ifdef ARCH_RT_DELAYS_SIGNAL_SEND ++ if (in_atomic()) { ++ if (WARN_ON_ONCE(t != current)) ++ return 0; ++ if (WARN_ON_ONCE(t->forced_info.si_signo)) ++ return 0; ++ ++ if (is_si_special(info)) { ++ WARN_ON_ONCE(info != SEND_SIG_PRIV); ++ t->forced_info.si_signo = sig; ++ t->forced_info.si_errno = 0; ++ t->forced_info.si_code = SI_KERNEL; ++ t->forced_info.si_pid = 0; ++ t->forced_info.si_uid = 0; ++ } else { ++ t->forced_info = *info; ++ } ++ ++ set_tsk_thread_flag(t, TIF_NOTIFY_RESUME); ++ return 0; ++ } ++#endif ++ return do_force_sig_info(sig, info, t); ++} ++ + /* + * Nuke all other threads in the group. + */ +@@ -1267,12 +1375,12 @@ + * Disable interrupts early to avoid deadlocks. + * See rcu_read_unlock() comment header for details. + */ +- local_irq_save(*flags); ++ local_irq_save_nort(*flags); + rcu_read_lock(); + sighand = rcu_dereference(tsk->sighand); + if (unlikely(sighand == NULL)) { + rcu_read_unlock(); +- local_irq_restore(*flags); ++ local_irq_restore_nort(*flags); + break; + } + /* +@@ -1293,7 +1401,7 @@ + } + spin_unlock(&sighand->siglock); + rcu_read_unlock(); +- local_irq_restore(*flags); ++ local_irq_restore_nort(*flags); + } + + return sighand; +@@ -1536,7 +1644,8 @@ + */ + struct sigqueue *sigqueue_alloc(void) + { +- struct sigqueue *q = __sigqueue_alloc(-1, current, GFP_KERNEL, 0); ++ /* Preallocated sigqueue objects always from the slabcache ! */ ++ struct sigqueue *q = __sigqueue_do_alloc(-1, current, GFP_KERNEL, 0, 1); + + if (q) + q->flags |= SIGQUEUE_PREALLOC; +@@ -1897,15 +2006,7 @@ + if (gstop_done && ptrace_reparented(current)) + do_notify_parent_cldstop(current, false, why); + +- /* +- * Don't want to allow preemption here, because +- * sys_ptrace() needs this task to be inactive. +- * +- * XXX: implement read_unlock_no_resched(). +- */ +- preempt_disable(); + read_unlock(&tasklist_lock); +- preempt_enable_no_resched(); + freezable_schedule(); + } else { + /* +diff -Nur linux-4.1.26.orig/kernel/softirq.c linux-4.1.26/kernel/softirq.c +--- linux-4.1.26.orig/kernel/softirq.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/softirq.c 2016-06-19 15:30:58.707298121 +0200 +@@ -21,10 +21,12 @@ + #include + #include + #include ++#include + #include + #include + #include + #include ++#include + #include + + #define CREATE_TRACE_POINTS +@@ -56,12 +58,108 @@ + static struct softirq_action softirq_vec[NR_SOFTIRQS] __cacheline_aligned_in_smp; + + DEFINE_PER_CPU(struct task_struct *, ksoftirqd); ++#ifdef CONFIG_PREEMPT_RT_FULL ++#define TIMER_SOFTIRQS ((1 << TIMER_SOFTIRQ) | (1 << HRTIMER_SOFTIRQ)) ++DEFINE_PER_CPU(struct task_struct *, ktimer_softirqd); ++#endif + + const char * const softirq_to_name[NR_SOFTIRQS] = { + "HI", "TIMER", "NET_TX", "NET_RX", "BLOCK", "BLOCK_IOPOLL", + "TASKLET", "SCHED", "HRTIMER", "RCU" + }; + ++#ifdef CONFIG_NO_HZ_COMMON ++# ifdef CONFIG_PREEMPT_RT_FULL ++ ++struct softirq_runner { ++ struct task_struct *runner[NR_SOFTIRQS]; ++}; ++ ++static DEFINE_PER_CPU(struct softirq_runner, softirq_runners); ++ ++static inline void softirq_set_runner(unsigned int sirq) ++{ ++ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); ++ ++ sr->runner[sirq] = current; ++} ++ ++static inline void softirq_clr_runner(unsigned int sirq) ++{ ++ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); ++ ++ sr->runner[sirq] = NULL; ++} ++ ++/* ++ * On preempt-rt a softirq running context might be blocked on a ++ * lock. There might be no other runnable task on this CPU because the ++ * lock owner runs on some other CPU. So we have to go into idle with ++ * the pending bit set. Therefor we need to check this otherwise we ++ * warn about false positives which confuses users and defeats the ++ * whole purpose of this test. ++ * ++ * This code is called with interrupts disabled. ++ */ ++void softirq_check_pending_idle(void) ++{ ++ static int rate_limit; ++ struct softirq_runner *sr = this_cpu_ptr(&softirq_runners); ++ u32 warnpending; ++ int i; ++ ++ if (rate_limit >= 10) ++ return; ++ ++ warnpending = local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK; ++ for (i = 0; i < NR_SOFTIRQS; i++) { ++ struct task_struct *tsk = sr->runner[i]; ++ ++ /* ++ * The wakeup code in rtmutex.c wakes up the task ++ * _before_ it sets pi_blocked_on to NULL under ++ * tsk->pi_lock. So we need to check for both: state ++ * and pi_blocked_on. ++ */ ++ if (tsk) { ++ raw_spin_lock(&tsk->pi_lock); ++ if (tsk->pi_blocked_on || tsk->state == TASK_RUNNING) { ++ /* Clear all bits pending in that task */ ++ warnpending &= ~(tsk->softirqs_raised); ++ warnpending &= ~(1 << i); ++ } ++ raw_spin_unlock(&tsk->pi_lock); ++ } ++ } ++ ++ if (warnpending) { ++ printk(KERN_ERR "NOHZ: local_softirq_pending %02x\n", ++ warnpending); ++ rate_limit++; ++ } ++} ++# else ++/* ++ * On !PREEMPT_RT we just printk rate limited: ++ */ ++void softirq_check_pending_idle(void) ++{ ++ static int rate_limit; ++ ++ if (rate_limit < 10 && ++ (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { ++ printk(KERN_ERR "NOHZ: local_softirq_pending %02x\n", ++ local_softirq_pending()); ++ rate_limit++; ++ } ++} ++# endif ++ ++#else /* !CONFIG_NO_HZ_COMMON */ ++static inline void softirq_set_runner(unsigned int sirq) { } ++static inline void softirq_clr_runner(unsigned int sirq) { } ++#endif ++ + /* + * we cannot loop indefinitely here to avoid userspace starvation, + * but we also don't want to introduce a worst case 1/HZ latency +@@ -77,6 +175,79 @@ + wake_up_process(tsk); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static void wakeup_timer_softirqd(void) ++{ ++ /* Interrupts are disabled: no need to stop preemption */ ++ struct task_struct *tsk = __this_cpu_read(ktimer_softirqd); ++ ++ if (tsk && tsk->state != TASK_RUNNING) ++ wake_up_process(tsk); ++} ++#endif ++ ++static void handle_softirq(unsigned int vec_nr) ++{ ++ struct softirq_action *h = softirq_vec + vec_nr; ++ int prev_count; ++ ++ prev_count = preempt_count(); ++ ++ kstat_incr_softirqs_this_cpu(vec_nr); ++ ++ trace_softirq_entry(vec_nr); ++ h->action(h); ++ trace_softirq_exit(vec_nr); ++ if (unlikely(prev_count != preempt_count())) { ++ pr_err("huh, entered softirq %u %s %p with preempt_count %08x, exited with %08x?\n", ++ vec_nr, softirq_to_name[vec_nr], h->action, ++ prev_count, preempt_count()); ++ preempt_count_set(prev_count); ++ } ++} ++ ++#ifndef CONFIG_PREEMPT_RT_FULL ++static inline int ksoftirqd_softirq_pending(void) ++{ ++ return local_softirq_pending(); ++} ++ ++static void handle_pending_softirqs(u32 pending) ++{ ++ struct softirq_action *h = softirq_vec; ++ int softirq_bit; ++ ++ local_irq_enable(); ++ ++ h = softirq_vec; ++ ++ while ((softirq_bit = ffs(pending))) { ++ unsigned int vec_nr; ++ ++ h += softirq_bit - 1; ++ vec_nr = h - softirq_vec; ++ handle_softirq(vec_nr); ++ ++ h++; ++ pending >>= softirq_bit; ++ } ++ ++ rcu_bh_qs(); ++ local_irq_disable(); ++} ++ ++static void run_ksoftirqd(unsigned int cpu) ++{ ++ local_irq_disable(); ++ if (ksoftirqd_softirq_pending()) { ++ __do_softirq(); ++ local_irq_enable(); ++ cond_resched_rcu_qs(); ++ return; ++ } ++ local_irq_enable(); ++} ++ + /* + * preempt_count and SOFTIRQ_OFFSET usage: + * - preempt_count is changed by SOFTIRQ_OFFSET on entering or leaving +@@ -116,9 +287,9 @@ + + if (preempt_count() == cnt) { + #ifdef CONFIG_DEBUG_PREEMPT +- current->preempt_disable_ip = get_parent_ip(CALLER_ADDR1); ++ current->preempt_disable_ip = get_lock_parent_ip(); + #endif +- trace_preempt_off(CALLER_ADDR0, get_parent_ip(CALLER_ADDR1)); ++ trace_preempt_off(CALLER_ADDR0, get_lock_parent_ip()); + } + } + EXPORT_SYMBOL(__local_bh_disable_ip); +@@ -232,10 +403,8 @@ + unsigned long end = jiffies + MAX_SOFTIRQ_TIME; + unsigned long old_flags = current->flags; + int max_restart = MAX_SOFTIRQ_RESTART; +- struct softirq_action *h; + bool in_hardirq; + __u32 pending; +- int softirq_bit; + + /* + * Mask out PF_MEMALLOC s current task context is borrowed for the +@@ -254,36 +423,7 @@ + /* Reset the pending bitmask before enabling irqs */ + set_softirq_pending(0); + +- local_irq_enable(); +- +- h = softirq_vec; +- +- while ((softirq_bit = ffs(pending))) { +- unsigned int vec_nr; +- int prev_count; +- +- h += softirq_bit - 1; +- +- vec_nr = h - softirq_vec; +- prev_count = preempt_count(); +- +- kstat_incr_softirqs_this_cpu(vec_nr); +- +- trace_softirq_entry(vec_nr); +- h->action(h); +- trace_softirq_exit(vec_nr); +- if (unlikely(prev_count != preempt_count())) { +- pr_err("huh, entered softirq %u %s %p with preempt_count %08x, exited with %08x?\n", +- vec_nr, softirq_to_name[vec_nr], h->action, +- prev_count, preempt_count()); +- preempt_count_set(prev_count); +- } +- h++; +- pending >>= softirq_bit; +- } +- +- rcu_bh_qs(); +- local_irq_disable(); ++ handle_pending_softirqs(pending); + + pending = local_softirq_pending(); + if (pending) { +@@ -320,6 +460,310 @@ + } + + /* ++ * This function must run with irqs disabled! ++ */ ++void raise_softirq_irqoff(unsigned int nr) ++{ ++ __raise_softirq_irqoff(nr); ++ ++ /* ++ * If we're in an interrupt or softirq, we're done ++ * (this also catches softirq-disabled code). We will ++ * actually run the softirq once we return from ++ * the irq or softirq. ++ * ++ * Otherwise we wake up ksoftirqd to make sure we ++ * schedule the softirq soon. ++ */ ++ if (!in_interrupt()) ++ wakeup_softirqd(); ++} ++ ++void __raise_softirq_irqoff(unsigned int nr) ++{ ++ trace_softirq_raise(nr); ++ or_softirq_pending(1UL << nr); ++} ++ ++static inline void local_bh_disable_nort(void) { local_bh_disable(); } ++static inline void _local_bh_enable_nort(void) { _local_bh_enable(); } ++static void ksoftirqd_set_sched_params(unsigned int cpu) { } ++ ++#else /* !PREEMPT_RT_FULL */ ++ ++/* ++ * On RT we serialize softirq execution with a cpu local lock per softirq ++ */ ++static DEFINE_PER_CPU(struct local_irq_lock [NR_SOFTIRQS], local_softirq_locks); ++ ++void __init softirq_early_init(void) ++{ ++ int i; ++ ++ for (i = 0; i < NR_SOFTIRQS; i++) ++ local_irq_lock_init(local_softirq_locks[i]); ++} ++ ++static void lock_softirq(int which) ++{ ++ local_lock(local_softirq_locks[which]); ++} ++ ++static void unlock_softirq(int which) ++{ ++ local_unlock(local_softirq_locks[which]); ++} ++ ++static void do_single_softirq(int which) ++{ ++ unsigned long old_flags = current->flags; ++ ++ current->flags &= ~PF_MEMALLOC; ++ vtime_account_irq_enter(current); ++ current->flags |= PF_IN_SOFTIRQ; ++ lockdep_softirq_enter(); ++ local_irq_enable(); ++ handle_softirq(which); ++ local_irq_disable(); ++ lockdep_softirq_exit(); ++ current->flags &= ~PF_IN_SOFTIRQ; ++ vtime_account_irq_enter(current); ++ tsk_restore_flags(current, old_flags, PF_MEMALLOC); ++} ++ ++/* ++ * Called with interrupts disabled. Process softirqs which were raised ++ * in current context (or on behalf of ksoftirqd). ++ */ ++static void do_current_softirqs(void) ++{ ++ while (current->softirqs_raised) { ++ int i = __ffs(current->softirqs_raised); ++ unsigned int pending, mask = (1U << i); ++ ++ current->softirqs_raised &= ~mask; ++ local_irq_enable(); ++ ++ /* ++ * If the lock is contended, we boost the owner to ++ * process the softirq or leave the critical section ++ * now. ++ */ ++ lock_softirq(i); ++ local_irq_disable(); ++ softirq_set_runner(i); ++ /* ++ * Check with the local_softirq_pending() bits, ++ * whether we need to process this still or if someone ++ * else took care of it. ++ */ ++ pending = local_softirq_pending(); ++ if (pending & mask) { ++ set_softirq_pending(pending & ~mask); ++ do_single_softirq(i); ++ } ++ softirq_clr_runner(i); ++ WARN_ON(current->softirq_nestcnt != 1); ++ local_irq_enable(); ++ unlock_softirq(i); ++ local_irq_disable(); ++ } ++} ++ ++void __local_bh_disable(void) ++{ ++ if (++current->softirq_nestcnt == 1) ++ migrate_disable(); ++} ++EXPORT_SYMBOL(__local_bh_disable); ++ ++void __local_bh_enable(void) ++{ ++ if (WARN_ON(current->softirq_nestcnt == 0)) ++ return; ++ ++ local_irq_disable(); ++ if (current->softirq_nestcnt == 1 && current->softirqs_raised) ++ do_current_softirqs(); ++ local_irq_enable(); ++ ++ if (--current->softirq_nestcnt == 0) ++ migrate_enable(); ++} ++EXPORT_SYMBOL(__local_bh_enable); ++ ++void _local_bh_enable(void) ++{ ++ if (WARN_ON(current->softirq_nestcnt == 0)) ++ return; ++ if (--current->softirq_nestcnt == 0) ++ migrate_enable(); ++} ++EXPORT_SYMBOL(_local_bh_enable); ++ ++int in_serving_softirq(void) ++{ ++ return current->flags & PF_IN_SOFTIRQ; ++} ++EXPORT_SYMBOL(in_serving_softirq); ++ ++/* Called with preemption disabled */ ++static void run_ksoftirqd(unsigned int cpu) ++{ ++ local_irq_disable(); ++ current->softirq_nestcnt++; ++ ++ do_current_softirqs(); ++ current->softirq_nestcnt--; ++ local_irq_enable(); ++ cond_resched_rcu_qs(); ++} ++ ++/* ++ * Called from netif_rx_ni(). Preemption enabled, but migration ++ * disabled. So the cpu can't go away under us. ++ */ ++void thread_do_softirq(void) ++{ ++ if (!in_serving_softirq() && current->softirqs_raised) { ++ current->softirq_nestcnt++; ++ do_current_softirqs(); ++ current->softirq_nestcnt--; ++ } ++} ++ ++static void do_raise_softirq_irqoff(unsigned int nr) ++{ ++ unsigned int mask; ++ ++ mask = 1UL << nr; ++ ++ trace_softirq_raise(nr); ++ or_softirq_pending(mask); ++ ++ /* ++ * If we are not in a hard interrupt and inside a bh disabled ++ * region, we simply raise the flag on current. local_bh_enable() ++ * will make sure that the softirq is executed. Otherwise we ++ * delegate it to ksoftirqd. ++ */ ++ if (!in_irq() && current->softirq_nestcnt) ++ current->softirqs_raised |= mask; ++ else if (!__this_cpu_read(ksoftirqd) || !__this_cpu_read(ktimer_softirqd)) ++ return; ++ ++ if (mask & TIMER_SOFTIRQS) ++ __this_cpu_read(ktimer_softirqd)->softirqs_raised |= mask; ++ else ++ __this_cpu_read(ksoftirqd)->softirqs_raised |= mask; ++} ++ ++static void wakeup_proper_softirq(unsigned int nr) ++{ ++ if ((1UL << nr) & TIMER_SOFTIRQS) ++ wakeup_timer_softirqd(); ++ else ++ wakeup_softirqd(); ++} ++ ++ ++void __raise_softirq_irqoff(unsigned int nr) ++{ ++ do_raise_softirq_irqoff(nr); ++ if (!in_irq() && !current->softirq_nestcnt) ++ wakeup_proper_softirq(nr); ++} ++ ++/* ++ * Same as __raise_softirq_irqoff() but will process them in ksoftirqd ++ */ ++void __raise_softirq_irqoff_ksoft(unsigned int nr) ++{ ++ unsigned int mask; ++ ++ if (WARN_ON_ONCE(!__this_cpu_read(ksoftirqd) || ++ !__this_cpu_read(ktimer_softirqd))) ++ return; ++ mask = 1UL << nr; ++ ++ trace_softirq_raise(nr); ++ or_softirq_pending(mask); ++ if (mask & TIMER_SOFTIRQS) ++ __this_cpu_read(ktimer_softirqd)->softirqs_raised |= mask; ++ else ++ __this_cpu_read(ksoftirqd)->softirqs_raised |= mask; ++ wakeup_proper_softirq(nr); ++} ++ ++/* ++ * This function must run with irqs disabled! ++ */ ++void raise_softirq_irqoff(unsigned int nr) ++{ ++ do_raise_softirq_irqoff(nr); ++ ++ /* ++ * If we're in an hard interrupt we let irq return code deal ++ * with the wakeup of ksoftirqd. ++ */ ++ if (in_irq()) ++ return; ++ /* ++ * If we are in thread context but outside of a bh disabled ++ * region, we need to wake ksoftirqd as well. ++ * ++ * CHECKME: Some of the places which do that could be wrapped ++ * into local_bh_disable/enable pairs. Though it's unclear ++ * whether this is worth the effort. To find those places just ++ * raise a WARN() if the condition is met. ++ */ ++ if (!current->softirq_nestcnt) ++ wakeup_proper_softirq(nr); ++} ++ ++static inline int ksoftirqd_softirq_pending(void) ++{ ++ return current->softirqs_raised; ++} ++ ++static inline void local_bh_disable_nort(void) { } ++static inline void _local_bh_enable_nort(void) { } ++ ++static inline void ksoftirqd_set_sched_params(unsigned int cpu) ++{ ++ /* Take over all but timer pending softirqs when starting */ ++ local_irq_disable(); ++ current->softirqs_raised = local_softirq_pending() & ~TIMER_SOFTIRQS; ++ local_irq_enable(); ++} ++ ++static inline void ktimer_softirqd_set_sched_params(unsigned int cpu) ++{ ++ struct sched_param param = { .sched_priority = 1 }; ++ ++ sched_setscheduler(current, SCHED_FIFO, ¶m); ++ ++ /* Take over timer pending softirqs when starting */ ++ local_irq_disable(); ++ current->softirqs_raised = local_softirq_pending() & TIMER_SOFTIRQS; ++ local_irq_enable(); ++} ++ ++static inline void ktimer_softirqd_clr_sched_params(unsigned int cpu, ++ bool online) ++{ ++ struct sched_param param = { .sched_priority = 0 }; ++ ++ sched_setscheduler(current, SCHED_NORMAL, ¶m); ++} ++ ++static int ktimer_softirqd_should_run(unsigned int cpu) ++{ ++ return current->softirqs_raised; ++} ++ ++#endif /* PREEMPT_RT_FULL */ ++/* + * Enter an interrupt context. + */ + void irq_enter(void) +@@ -330,9 +774,9 @@ + * Prevent raise_softirq from needlessly waking up ksoftirqd + * here, as softirq will be serviced on return from interrupt. + */ +- local_bh_disable(); ++ local_bh_disable_nort(); + tick_irq_enter(); +- _local_bh_enable(); ++ _local_bh_enable_nort(); + } + + __irq_enter(); +@@ -340,6 +784,7 @@ + + static inline void invoke_softirq(void) + { ++#ifndef CONFIG_PREEMPT_RT_FULL + if (!force_irqthreads) { + #ifdef CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK + /* +@@ -359,6 +804,18 @@ + } else { + wakeup_softirqd(); + } ++#else /* PREEMPT_RT_FULL */ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ if (__this_cpu_read(ksoftirqd) && ++ __this_cpu_read(ksoftirqd)->softirqs_raised) ++ wakeup_softirqd(); ++ if (__this_cpu_read(ktimer_softirqd) && ++ __this_cpu_read(ktimer_softirqd)->softirqs_raised) ++ wakeup_timer_softirqd(); ++ local_irq_restore(flags); ++#endif + } + + static inline void tick_irq_exit(void) +@@ -395,26 +852,6 @@ + trace_hardirq_exit(); /* must be last! */ + } + +-/* +- * This function must run with irqs disabled! +- */ +-inline void raise_softirq_irqoff(unsigned int nr) +-{ +- __raise_softirq_irqoff(nr); +- +- /* +- * If we're in an interrupt or softirq, we're done +- * (this also catches softirq-disabled code). We will +- * actually run the softirq once we return from +- * the irq or softirq. +- * +- * Otherwise we wake up ksoftirqd to make sure we +- * schedule the softirq soon. +- */ +- if (!in_interrupt()) +- wakeup_softirqd(); +-} +- + void raise_softirq(unsigned int nr) + { + unsigned long flags; +@@ -424,12 +861,6 @@ + local_irq_restore(flags); + } + +-void __raise_softirq_irqoff(unsigned int nr) +-{ +- trace_softirq_raise(nr); +- or_softirq_pending(1UL << nr); +-} +- + void open_softirq(int nr, void (*action)(struct softirq_action *)) + { + softirq_vec[nr].action = action; +@@ -446,15 +877,45 @@ + static DEFINE_PER_CPU(struct tasklet_head, tasklet_vec); + static DEFINE_PER_CPU(struct tasklet_head, tasklet_hi_vec); + ++static void inline ++__tasklet_common_schedule(struct tasklet_struct *t, struct tasklet_head *head, unsigned int nr) ++{ ++ if (tasklet_trylock(t)) { ++again: ++ /* We may have been preempted before tasklet_trylock ++ * and __tasklet_action may have already run. ++ * So double check the sched bit while the takslet ++ * is locked before adding it to the list. ++ */ ++ if (test_bit(TASKLET_STATE_SCHED, &t->state)) { ++ t->next = NULL; ++ *head->tail = t; ++ head->tail = &(t->next); ++ raise_softirq_irqoff(nr); ++ tasklet_unlock(t); ++ } else { ++ /* This is subtle. If we hit the corner case above ++ * It is possible that we get preempted right here, ++ * and another task has successfully called ++ * tasklet_schedule(), then this function, and ++ * failed on the trylock. Thus we must be sure ++ * before releasing the tasklet lock, that the ++ * SCHED_BIT is clear. Otherwise the tasklet ++ * may get its SCHED_BIT set, but not added to the ++ * list ++ */ ++ if (!tasklet_tryunlock(t)) ++ goto again; ++ } ++ } ++} ++ + void __tasklet_schedule(struct tasklet_struct *t) + { + unsigned long flags; + + local_irq_save(flags); +- t->next = NULL; +- *__this_cpu_read(tasklet_vec.tail) = t; +- __this_cpu_write(tasklet_vec.tail, &(t->next)); +- raise_softirq_irqoff(TASKLET_SOFTIRQ); ++ __tasklet_common_schedule(t, this_cpu_ptr(&tasklet_vec), TASKLET_SOFTIRQ); + local_irq_restore(flags); + } + EXPORT_SYMBOL(__tasklet_schedule); +@@ -464,10 +925,7 @@ + unsigned long flags; + + local_irq_save(flags); +- t->next = NULL; +- *__this_cpu_read(tasklet_hi_vec.tail) = t; +- __this_cpu_write(tasklet_hi_vec.tail, &(t->next)); +- raise_softirq_irqoff(HI_SOFTIRQ); ++ __tasklet_common_schedule(t, this_cpu_ptr(&tasklet_hi_vec), HI_SOFTIRQ); + local_irq_restore(flags); + } + EXPORT_SYMBOL(__tasklet_hi_schedule); +@@ -476,82 +934,122 @@ + { + BUG_ON(!irqs_disabled()); + +- t->next = __this_cpu_read(tasklet_hi_vec.head); +- __this_cpu_write(tasklet_hi_vec.head, t); +- __raise_softirq_irqoff(HI_SOFTIRQ); ++ __tasklet_hi_schedule(t); + } + EXPORT_SYMBOL(__tasklet_hi_schedule_first); + +-static void tasklet_action(struct softirq_action *a) ++void tasklet_enable(struct tasklet_struct *t) + { +- struct tasklet_struct *list; ++ if (!atomic_dec_and_test(&t->count)) ++ return; ++ if (test_and_clear_bit(TASKLET_STATE_PENDING, &t->state)) ++ tasklet_schedule(t); ++} ++EXPORT_SYMBOL(tasklet_enable); + +- local_irq_disable(); +- list = __this_cpu_read(tasklet_vec.head); +- __this_cpu_write(tasklet_vec.head, NULL); +- __this_cpu_write(tasklet_vec.tail, this_cpu_ptr(&tasklet_vec.head)); +- local_irq_enable(); ++static void __tasklet_action(struct softirq_action *a, ++ struct tasklet_struct *list) ++{ ++ int loops = 1000000; + + while (list) { + struct tasklet_struct *t = list; + + list = list->next; + +- if (tasklet_trylock(t)) { +- if (!atomic_read(&t->count)) { +- if (!test_and_clear_bit(TASKLET_STATE_SCHED, +- &t->state)) +- BUG(); +- t->func(t->data); +- tasklet_unlock(t); +- continue; +- } +- tasklet_unlock(t); ++ /* ++ * Should always succeed - after a tasklist got on the ++ * list (after getting the SCHED bit set from 0 to 1), ++ * nothing but the tasklet softirq it got queued to can ++ * lock it: ++ */ ++ if (!tasklet_trylock(t)) { ++ WARN_ON(1); ++ continue; + } + +- local_irq_disable(); + t->next = NULL; +- *__this_cpu_read(tasklet_vec.tail) = t; +- __this_cpu_write(tasklet_vec.tail, &(t->next)); +- __raise_softirq_irqoff(TASKLET_SOFTIRQ); +- local_irq_enable(); ++ ++ /* ++ * If we cannot handle the tasklet because it's disabled, ++ * mark it as pending. tasklet_enable() will later ++ * re-schedule the tasklet. ++ */ ++ if (unlikely(atomic_read(&t->count))) { ++out_disabled: ++ /* implicit unlock: */ ++ wmb(); ++ t->state = TASKLET_STATEF_PENDING; ++ continue; ++ } ++ ++ /* ++ * After this point on the tasklet might be rescheduled ++ * on another CPU, but it can only be added to another ++ * CPU's tasklet list if we unlock the tasklet (which we ++ * dont do yet). ++ */ ++ if (!test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) ++ WARN_ON(1); ++ ++again: ++ t->func(t->data); ++ ++ /* ++ * Try to unlock the tasklet. We must use cmpxchg, because ++ * another CPU might have scheduled or disabled the tasklet. ++ * We only allow the STATE_RUN -> 0 transition here. ++ */ ++ while (!tasklet_tryunlock(t)) { ++ /* ++ * If it got disabled meanwhile, bail out: ++ */ ++ if (atomic_read(&t->count)) ++ goto out_disabled; ++ /* ++ * If it got scheduled meanwhile, re-execute ++ * the tasklet function: ++ */ ++ if (test_and_clear_bit(TASKLET_STATE_SCHED, &t->state)) ++ goto again; ++ if (!--loops) { ++ printk("hm, tasklet state: %08lx\n", t->state); ++ WARN_ON(1); ++ tasklet_unlock(t); ++ break; ++ } ++ } + } + } + ++static void tasklet_action(struct softirq_action *a) ++{ ++ struct tasklet_struct *list; ++ ++ local_irq_disable(); ++ ++ list = __this_cpu_read(tasklet_vec.head); ++ __this_cpu_write(tasklet_vec.head, NULL); ++ __this_cpu_write(tasklet_vec.tail, this_cpu_ptr(&tasklet_vec.head)); ++ ++ local_irq_enable(); ++ ++ __tasklet_action(a, list); ++} ++ + static void tasklet_hi_action(struct softirq_action *a) + { + struct tasklet_struct *list; + + local_irq_disable(); ++ + list = __this_cpu_read(tasklet_hi_vec.head); + __this_cpu_write(tasklet_hi_vec.head, NULL); + __this_cpu_write(tasklet_hi_vec.tail, this_cpu_ptr(&tasklet_hi_vec.head)); +- local_irq_enable(); + +- while (list) { +- struct tasklet_struct *t = list; +- +- list = list->next; +- +- if (tasklet_trylock(t)) { +- if (!atomic_read(&t->count)) { +- if (!test_and_clear_bit(TASKLET_STATE_SCHED, +- &t->state)) +- BUG(); +- t->func(t->data); +- tasklet_unlock(t); +- continue; +- } +- tasklet_unlock(t); +- } ++ local_irq_enable(); + +- local_irq_disable(); +- t->next = NULL; +- *__this_cpu_read(tasklet_hi_vec.tail) = t; +- __this_cpu_write(tasklet_hi_vec.tail, &(t->next)); +- __raise_softirq_irqoff(HI_SOFTIRQ); +- local_irq_enable(); +- } ++ __tasklet_action(a, list); + } + + void tasklet_init(struct tasklet_struct *t, +@@ -572,7 +1070,7 @@ + + while (test_and_set_bit(TASKLET_STATE_SCHED, &t->state)) { + do { +- yield(); ++ msleep(1); + } while (test_bit(TASKLET_STATE_SCHED, &t->state)); + } + tasklet_unlock_wait(t); +@@ -646,25 +1144,26 @@ + open_softirq(HI_SOFTIRQ, tasklet_hi_action); + } + +-static int ksoftirqd_should_run(unsigned int cpu) +-{ +- return local_softirq_pending(); +-} +- +-static void run_ksoftirqd(unsigned int cpu) ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) ++void tasklet_unlock_wait(struct tasklet_struct *t) + { +- local_irq_disable(); +- if (local_softirq_pending()) { ++ while (test_bit(TASKLET_STATE_RUN, &(t)->state)) { + /* +- * We can safely run softirq on inline stack, as we are not deep +- * in the task stack here. ++ * Hack for now to avoid this busy-loop: + */ +- __do_softirq(); +- local_irq_enable(); +- cond_resched_rcu_qs(); +- return; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ msleep(1); ++#else ++ barrier(); ++#endif + } +- local_irq_enable(); ++} ++EXPORT_SYMBOL(tasklet_unlock_wait); ++#endif ++ ++static int ksoftirqd_should_run(unsigned int cpu) ++{ ++ return ksoftirqd_softirq_pending(); + } + + #ifdef CONFIG_HOTPLUG_CPU +@@ -746,16 +1245,31 @@ + + static struct smp_hotplug_thread softirq_threads = { + .store = &ksoftirqd, ++ .setup = ksoftirqd_set_sched_params, + .thread_should_run = ksoftirqd_should_run, + .thread_fn = run_ksoftirqd, + .thread_comm = "ksoftirqd/%u", + }; + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static struct smp_hotplug_thread softirq_timer_threads = { ++ .store = &ktimer_softirqd, ++ .setup = ktimer_softirqd_set_sched_params, ++ .cleanup = ktimer_softirqd_clr_sched_params, ++ .thread_should_run = ktimer_softirqd_should_run, ++ .thread_fn = run_ksoftirqd, ++ .thread_comm = "ktimersoftd/%u", ++}; ++#endif ++ + static __init int spawn_ksoftirqd(void) + { + register_cpu_notifier(&cpu_nfb); + + BUG_ON(smpboot_register_percpu_thread(&softirq_threads)); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ BUG_ON(smpboot_register_percpu_thread(&softirq_timer_threads)); ++#endif + + return 0; + } +diff -Nur linux-4.1.26.orig/kernel/stop_machine.c linux-4.1.26/kernel/stop_machine.c +--- linux-4.1.26.orig/kernel/stop_machine.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/stop_machine.c 2016-06-19 15:30:58.707298121 +0200 +@@ -35,7 +35,7 @@ + + /* the actual stopper, one per every possible cpu, enabled on online cpus */ + struct cpu_stopper { +- spinlock_t lock; ++ raw_spinlock_t lock; + bool enabled; /* is this stopper enabled? */ + struct list_head works; /* list of pending works */ + }; +@@ -78,7 +78,7 @@ + + unsigned long flags; + +- spin_lock_irqsave(&stopper->lock, flags); ++ raw_spin_lock_irqsave(&stopper->lock, flags); + + if (stopper->enabled) { + list_add_tail(&work->list, &stopper->works); +@@ -86,7 +86,7 @@ + } else + cpu_stop_signal_done(work->done, false); + +- spin_unlock_irqrestore(&stopper->lock, flags); ++ raw_spin_unlock_irqrestore(&stopper->lock, flags); + } + + /** +@@ -248,7 +248,7 @@ + struct irq_cpu_stop_queue_work_info call_args; + struct multi_stop_data msdata; + +- preempt_disable(); ++ preempt_disable_nort(); + msdata = (struct multi_stop_data){ + .fn = fn, + .data = arg, +@@ -281,7 +281,7 @@ + * This relies on the stopper workqueues to be FIFO. + */ + if (!cpu_active(cpu1) || !cpu_active(cpu2)) { +- preempt_enable(); ++ preempt_enable_nort(); + return -ENOENT; + } + +@@ -295,7 +295,7 @@ + &irq_cpu_stop_queue_work, + &call_args, 1); + lg_local_unlock(&stop_cpus_lock); +- preempt_enable(); ++ preempt_enable_nort(); + + wait_for_completion(&done.completion); + +@@ -329,7 +329,7 @@ + + static void queue_stop_cpus_work(const struct cpumask *cpumask, + cpu_stop_fn_t fn, void *arg, +- struct cpu_stop_done *done) ++ struct cpu_stop_done *done, bool inactive) + { + struct cpu_stop_work *work; + unsigned int cpu; +@@ -343,11 +343,13 @@ + } + + /* +- * Disable preemption while queueing to avoid getting +- * preempted by a stopper which might wait for other stoppers +- * to enter @fn which can lead to deadlock. ++ * Make sure that all work is queued on all cpus before ++ * any of the cpus can execute it. + */ +- lg_global_lock(&stop_cpus_lock); ++ if (!inactive) ++ lg_global_lock(&stop_cpus_lock); ++ else ++ lg_global_trylock_relax(&stop_cpus_lock); + for_each_cpu(cpu, cpumask) + cpu_stop_queue_work(cpu, &per_cpu(stop_cpus_work, cpu)); + lg_global_unlock(&stop_cpus_lock); +@@ -359,7 +361,7 @@ + struct cpu_stop_done done; + + cpu_stop_init_done(&done, cpumask_weight(cpumask)); +- queue_stop_cpus_work(cpumask, fn, arg, &done); ++ queue_stop_cpus_work(cpumask, fn, arg, &done, false); + wait_for_completion(&done.completion); + return done.executed ? done.ret : -ENOENT; + } +@@ -439,9 +441,9 @@ + unsigned long flags; + int run; + +- spin_lock_irqsave(&stopper->lock, flags); ++ raw_spin_lock_irqsave(&stopper->lock, flags); + run = !list_empty(&stopper->works); +- spin_unlock_irqrestore(&stopper->lock, flags); ++ raw_spin_unlock_irqrestore(&stopper->lock, flags); + return run; + } + +@@ -453,13 +455,13 @@ + + repeat: + work = NULL; +- spin_lock_irq(&stopper->lock); ++ raw_spin_lock_irq(&stopper->lock); + if (!list_empty(&stopper->works)) { + work = list_first_entry(&stopper->works, + struct cpu_stop_work, list); + list_del_init(&work->list); + } +- spin_unlock_irq(&stopper->lock); ++ raw_spin_unlock_irq(&stopper->lock); + + if (work) { + cpu_stop_fn_t fn = work->fn; +@@ -467,6 +469,16 @@ + struct cpu_stop_done *done = work->done; + char ksym_buf[KSYM_NAME_LEN] __maybe_unused; + ++ /* ++ * Wait until the stopper finished scheduling on all ++ * cpus ++ */ ++ lg_global_lock(&stop_cpus_lock); ++ /* ++ * Let other cpu threads continue as well ++ */ ++ lg_global_unlock(&stop_cpus_lock); ++ + /* cpu stop callbacks are not allowed to sleep */ + preempt_disable(); + +@@ -500,20 +512,20 @@ + unsigned long flags; + + /* drain remaining works */ +- spin_lock_irqsave(&stopper->lock, flags); ++ raw_spin_lock_irqsave(&stopper->lock, flags); + list_for_each_entry(work, &stopper->works, list) + cpu_stop_signal_done(work->done, false); + stopper->enabled = false; +- spin_unlock_irqrestore(&stopper->lock, flags); ++ raw_spin_unlock_irqrestore(&stopper->lock, flags); + } + + static void cpu_stop_unpark(unsigned int cpu) + { + struct cpu_stopper *stopper = &per_cpu(cpu_stopper, cpu); + +- spin_lock_irq(&stopper->lock); ++ raw_spin_lock_irq(&stopper->lock); + stopper->enabled = true; +- spin_unlock_irq(&stopper->lock); ++ raw_spin_unlock_irq(&stopper->lock); + } + + static struct smp_hotplug_thread cpu_stop_threads = { +@@ -535,10 +547,12 @@ + for_each_possible_cpu(cpu) { + struct cpu_stopper *stopper = &per_cpu(cpu_stopper, cpu); + +- spin_lock_init(&stopper->lock); ++ raw_spin_lock_init(&stopper->lock); + INIT_LIST_HEAD(&stopper->works); + } + ++ lg_lock_init(&stop_cpus_lock, "stop_cpus_lock"); ++ + BUG_ON(smpboot_register_percpu_thread(&cpu_stop_threads)); + stop_machine_initialized = true; + return 0; +@@ -634,7 +648,7 @@ + set_state(&msdata, MULTI_STOP_PREPARE); + cpu_stop_init_done(&done, num_active_cpus()); + queue_stop_cpus_work(cpu_active_mask, multi_cpu_stop, &msdata, +- &done); ++ &done, true); + ret = multi_cpu_stop(&msdata); + + /* Busy wait for completion. */ +diff -Nur linux-4.1.26.orig/kernel/time/hrtimer.c linux-4.1.26/kernel/time/hrtimer.c +--- linux-4.1.26.orig/kernel/time/hrtimer.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/hrtimer.c 2016-06-19 15:30:58.707298121 +0200 +@@ -48,11 +48,13 @@ + #include + #include + #include ++#include + #include + + #include + + #include ++#include + + #include "tick-internal.h" + +@@ -576,8 +578,7 @@ + * When the callback is running, we do not reprogram the clock event + * device. The timer callback is either running on a different CPU or + * the callback is executed in the hrtimer_interrupt context. The +- * reprogramming is handled either by the softirq, which called the +- * callback or at the end of the hrtimer_interrupt. ++ * reprogramming is handled at the end of the hrtimer_interrupt. + */ + if (hrtimer_callback_running(timer)) + return 0; +@@ -621,6 +622,9 @@ + return res; + } + ++static void __run_hrtimer(struct hrtimer *timer, ktime_t *now); ++static int hrtimer_rt_defer(struct hrtimer *timer); ++ + /* + * Initialize the high resolution related parts of cpu_base + */ +@@ -630,6 +634,21 @@ + base->hres_active = 0; + } + ++static inline int hrtimer_enqueue_reprogram(struct hrtimer *timer, ++ struct hrtimer_clock_base *base, ++ int wakeup) ++{ ++ if (!hrtimer_reprogram(timer, base)) ++ return 0; ++ if (!wakeup) ++ return -ETIME; ++#ifdef CONFIG_PREEMPT_RT_BASE ++ if (!hrtimer_rt_defer(timer)) ++ return -ETIME; ++#endif ++ return 1; ++} ++ + static inline ktime_t hrtimer_update_base(struct hrtimer_cpu_base *base) + { + ktime_t *offs_real = &base->clock_base[HRTIMER_BASE_REALTIME].offset; +@@ -695,6 +714,44 @@ + + static DECLARE_WORK(hrtimer_work, clock_was_set_work); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * RT can not call schedule_work from real interrupt context. ++ * Need to make a thread to do the real work. ++ */ ++static struct task_struct *clock_set_delay_thread; ++static bool do_clock_set_delay; ++ ++static int run_clock_set_delay(void *ignore) ++{ ++ while (!kthread_should_stop()) { ++ set_current_state(TASK_INTERRUPTIBLE); ++ if (do_clock_set_delay) { ++ do_clock_set_delay = false; ++ schedule_work(&hrtimer_work); ++ } ++ schedule(); ++ } ++ __set_current_state(TASK_RUNNING); ++ return 0; ++} ++ ++void clock_was_set_delayed(void) ++{ ++ do_clock_set_delay = true; ++ /* Make visible before waking up process */ ++ smp_wmb(); ++ wake_up_process(clock_set_delay_thread); ++} ++ ++static __init int create_clock_set_delay_thread(void) ++{ ++ clock_set_delay_thread = kthread_run(run_clock_set_delay, NULL, "kclksetdelayd"); ++ BUG_ON(!clock_set_delay_thread); ++ return 0; ++} ++early_initcall(create_clock_set_delay_thread); ++#else /* PREEMPT_RT_FULL */ + /* + * Called from timekeeping and resume code to reprogramm the hrtimer + * interrupt device on all cpus. +@@ -703,6 +760,7 @@ + { + schedule_work(&hrtimer_work); + } ++#endif + + #else + +@@ -711,6 +769,13 @@ + static inline int hrtimer_switch_to_hres(void) { return 0; } + static inline void + hrtimer_force_reprogram(struct hrtimer_cpu_base *base, int skip_equal) { } ++static inline int hrtimer_enqueue_reprogram(struct hrtimer *timer, ++ struct hrtimer_clock_base *base, ++ int wakeup) ++{ ++ return 0; ++} ++ + static inline int hrtimer_reprogram(struct hrtimer *timer, + struct hrtimer_clock_base *base) + { +@@ -718,7 +783,6 @@ + } + static inline void hrtimer_init_hres(struct hrtimer_cpu_base *base) { } + static inline void retrigger_next_event(void *arg) { } +- + #endif /* CONFIG_HIGH_RES_TIMERS */ + + /* +@@ -836,6 +900,32 @@ + } + EXPORT_SYMBOL_GPL(hrtimer_forward); + ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define wake_up_timer_waiters(b) wake_up(&(b)->wait) ++ ++/** ++ * hrtimer_wait_for_timer - Wait for a running timer ++ * ++ * @timer: timer to wait for ++ * ++ * The function waits in case the timers callback function is ++ * currently executed on the waitqueue of the timer base. The ++ * waitqueue is woken up after the timer callback function has ++ * finished execution. ++ */ ++void hrtimer_wait_for_timer(const struct hrtimer *timer) ++{ ++ struct hrtimer_clock_base *base = timer->base; ++ ++ if (base && base->cpu_base && !timer->irqsafe) ++ wait_event(base->cpu_base->wait, ++ !(timer->state & HRTIMER_STATE_CALLBACK)); ++} ++ ++#else ++# define wake_up_timer_waiters(b) do { } while (0) ++#endif ++ + /* + * enqueue_hrtimer - internal function to (re)start a timer + * +@@ -879,6 +969,11 @@ + if (!(timer->state & HRTIMER_STATE_ENQUEUED)) + goto out; + ++ if (unlikely(!list_empty(&timer->cb_entry))) { ++ list_del_init(&timer->cb_entry); ++ goto out; ++ } ++ + next_timer = timerqueue_getnext(&base->active); + timerqueue_del(&base->active, &timer->node); + if (&timer->node == next_timer) { +@@ -966,7 +1061,16 @@ + new_base = switch_hrtimer_base(timer, base, mode & HRTIMER_MODE_PINNED); + + timer_stats_hrtimer_set_start_info(timer); ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ { ++ ktime_t now = new_base->get_time(); + ++ if (ktime_to_ns(tim) < ktime_to_ns(now)) ++ timer->praecox = now; ++ else ++ timer->praecox = ktime_set(0, 0); ++ } ++#endif + leftmost = enqueue_hrtimer(timer, new_base); + + if (!leftmost) { +@@ -980,15 +1084,26 @@ + * on dynticks target. + */ + wake_up_nohz_cpu(new_base->cpu_base->cpu); +- } else if (new_base->cpu_base == this_cpu_ptr(&hrtimer_bases) && +- hrtimer_reprogram(timer, new_base)) { ++ } else if (new_base->cpu_base == this_cpu_ptr(&hrtimer_bases)) { ++ ++ ret = hrtimer_enqueue_reprogram(timer, new_base, wakeup); ++ if (ret < 0) { ++ /* ++ * In case we failed to reprogram the timer (mostly ++ * because out current timer is already elapsed), ++ * remove it again and report a failure. This avoids ++ * stale base->first entries. ++ */ ++ debug_deactivate(timer); ++ __remove_hrtimer(timer, new_base, ++ timer->state & HRTIMER_STATE_CALLBACK, 0); ++ } else if (ret > 0) { + /* + * Only allow reprogramming if the new base is on this CPU. + * (it might still be on another CPU if the timer was pending) + * + * XXX send_remote_softirq() ? + */ +- if (wakeup) { + /* + * We need to drop cpu_base->lock to avoid a + * lock ordering issue vs. rq->lock. +@@ -996,9 +1111,7 @@ + raw_spin_unlock(&new_base->cpu_base->lock); + raise_softirq_irqoff(HRTIMER_SOFTIRQ); + local_irq_restore(flags); +- return ret; +- } else { +- __raise_softirq_irqoff(HRTIMER_SOFTIRQ); ++ return 0; + } + } + +@@ -1089,7 +1202,7 @@ + + if (ret >= 0) + return ret; +- cpu_relax(); ++ hrtimer_wait_for_timer(timer); + } + } + EXPORT_SYMBOL_GPL(hrtimer_cancel); +@@ -1153,6 +1266,7 @@ + + base = hrtimer_clockid_to_base(clock_id); + timer->base = &cpu_base->clock_base[base]; ++ INIT_LIST_HEAD(&timer->cb_entry); + timerqueue_init(&timer->node); + + #ifdef CONFIG_TIMER_STATS +@@ -1236,6 +1350,126 @@ + timer->state &= ~HRTIMER_STATE_CALLBACK; + } + ++static enum hrtimer_restart hrtimer_wakeup(struct hrtimer *timer); ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++static void hrtimer_rt_reprogram(int restart, struct hrtimer *timer, ++ struct hrtimer_clock_base *base) ++{ ++ /* ++ * Note, we clear the callback flag before we requeue the ++ * timer otherwise we trigger the callback_running() check ++ * in hrtimer_reprogram(). ++ */ ++ timer->state &= ~HRTIMER_STATE_CALLBACK; ++ ++ if (restart != HRTIMER_NORESTART) { ++ BUG_ON(hrtimer_active(timer)); ++ /* ++ * Enqueue the timer, if it's the leftmost timer then ++ * we need to reprogram it. ++ */ ++ if (!enqueue_hrtimer(timer, base)) ++ return; ++ ++#ifndef CONFIG_HIGH_RES_TIMERS ++ } ++#else ++ if (base->cpu_base->hres_active && ++ hrtimer_reprogram(timer, base)) ++ goto requeue; ++ ++ } else if (hrtimer_active(timer)) { ++ /* ++ * If the timer was rearmed on another CPU, reprogram ++ * the event device. ++ */ ++ if (&timer->node == base->active.next && ++ base->cpu_base->hres_active && ++ hrtimer_reprogram(timer, base)) ++ goto requeue; ++ } ++ return; ++ ++requeue: ++ /* ++ * Timer is expired. Thus move it from tree to pending list ++ * again. ++ */ ++ __remove_hrtimer(timer, base, timer->state, 0); ++ list_add_tail(&timer->cb_entry, &base->expired); ++#endif ++} ++ ++/* ++ * The changes in mainline which removed the callback modes from ++ * hrtimer are not yet working with -rt. The non wakeup_process() ++ * based callbacks which involve sleeping locks need to be treated ++ * seperately. ++ */ ++static void hrtimer_rt_run_pending(void) ++{ ++ enum hrtimer_restart (*fn)(struct hrtimer *); ++ struct hrtimer_cpu_base *cpu_base; ++ struct hrtimer_clock_base *base; ++ struct hrtimer *timer; ++ int index, restart; ++ ++ local_irq_disable(); ++ cpu_base = &per_cpu(hrtimer_bases, smp_processor_id()); ++ ++ raw_spin_lock(&cpu_base->lock); ++ ++ for (index = 0; index < HRTIMER_MAX_CLOCK_BASES; index++) { ++ base = &cpu_base->clock_base[index]; ++ ++ while (!list_empty(&base->expired)) { ++ timer = list_first_entry(&base->expired, ++ struct hrtimer, cb_entry); ++ ++ /* ++ * Same as the above __run_hrtimer function ++ * just we run with interrupts enabled. ++ */ ++ debug_hrtimer_deactivate(timer); ++ __remove_hrtimer(timer, base, HRTIMER_STATE_CALLBACK, 0); ++ timer_stats_account_hrtimer(timer); ++ fn = timer->function; ++ ++ raw_spin_unlock_irq(&cpu_base->lock); ++ restart = fn(timer); ++ raw_spin_lock_irq(&cpu_base->lock); ++ ++ hrtimer_rt_reprogram(restart, timer, base); ++ } ++ } ++ ++ raw_spin_unlock_irq(&cpu_base->lock); ++ ++ wake_up_timer_waiters(cpu_base); ++} ++ ++static int hrtimer_rt_defer(struct hrtimer *timer) ++{ ++ if (timer->irqsafe) ++ return 0; ++ ++ __remove_hrtimer(timer, timer->base, timer->state, 0); ++ list_add_tail(&timer->cb_entry, &timer->base->expired); ++ return 1; ++} ++ ++#else ++ ++static inline void hrtimer_rt_run_pending(void) ++{ ++ hrtimer_peek_ahead_timers(); ++} ++ ++static inline int hrtimer_rt_defer(struct hrtimer *timer) { return 0; } ++ ++#endif ++ + #ifdef CONFIG_HIGH_RES_TIMERS + + /* +@@ -1246,7 +1480,7 @@ + { + struct hrtimer_cpu_base *cpu_base = this_cpu_ptr(&hrtimer_bases); + ktime_t expires_next, now, entry_time, delta; +- int i, retries = 0; ++ int i, retries = 0, raise = 0; + + BUG_ON(!cpu_base->hres_active); + cpu_base->nr_events++; +@@ -1281,6 +1515,15 @@ + + timer = container_of(node, struct hrtimer, node); + ++ trace_hrtimer_interrupt(raw_smp_processor_id(), ++ ktime_to_ns(ktime_sub(ktime_to_ns(timer->praecox) ? ++ timer->praecox : hrtimer_get_expires(timer), ++ basenow)), ++ current, ++ timer->function == hrtimer_wakeup ? ++ container_of(timer, struct hrtimer_sleeper, ++ timer)->task : NULL); ++ + /* + * The immediate goal for using the softexpires is + * minimizing wakeups, not running timers at the +@@ -1296,7 +1539,10 @@ + if (basenow.tv64 < hrtimer_get_softexpires_tv64(timer)) + break; + +- __run_hrtimer(timer, &basenow); ++ if (!hrtimer_rt_defer(timer)) ++ __run_hrtimer(timer, &basenow); ++ else ++ raise = 1; + } + } + /* Reevaluate the clock bases for the next expiry */ +@@ -1313,7 +1559,7 @@ + if (expires_next.tv64 == KTIME_MAX || + !tick_program_event(expires_next, 0)) { + cpu_base->hang_detected = 0; +- return; ++ goto out; + } + + /* +@@ -1357,6 +1603,9 @@ + tick_program_event(expires_next, 1); + printk_once(KERN_WARNING "hrtimer: interrupt took %llu ns\n", + ktime_to_ns(delta)); ++out: ++ if (raise) ++ raise_softirq_irqoff(HRTIMER_SOFTIRQ); + } + + /* +@@ -1392,18 +1641,18 @@ + __hrtimer_peek_ahead_timers(); + local_irq_restore(flags); + } +- +-static void run_hrtimer_softirq(struct softirq_action *h) +-{ +- hrtimer_peek_ahead_timers(); +-} +- + #else /* CONFIG_HIGH_RES_TIMERS */ + + static inline void __hrtimer_peek_ahead_timers(void) { } + + #endif /* !CONFIG_HIGH_RES_TIMERS */ + ++ ++static void run_hrtimer_softirq(struct softirq_action *h) ++{ ++ hrtimer_rt_run_pending(); ++} ++ + /* + * Called from timer softirq every jiffy, expire hrtimers: + * +@@ -1436,7 +1685,7 @@ + struct timerqueue_node *node; + struct hrtimer_cpu_base *cpu_base = this_cpu_ptr(&hrtimer_bases); + struct hrtimer_clock_base *base; +- int index, gettime = 1; ++ int index, gettime = 1, raise = 0; + + if (hrtimer_hres_active()) + return; +@@ -1461,10 +1710,16 @@ + hrtimer_get_expires_tv64(timer)) + break; + +- __run_hrtimer(timer, &base->softirq_time); ++ if (!hrtimer_rt_defer(timer)) ++ __run_hrtimer(timer, &base->softirq_time); ++ else ++ raise = 1; + } + raw_spin_unlock(&cpu_base->lock); + } ++ ++ if (raise) ++ raise_softirq_irqoff(HRTIMER_SOFTIRQ); + } + + /* +@@ -1486,16 +1741,18 @@ + void hrtimer_init_sleeper(struct hrtimer_sleeper *sl, struct task_struct *task) + { + sl->timer.function = hrtimer_wakeup; ++ sl->timer.irqsafe = 1; + sl->task = task; + } + EXPORT_SYMBOL_GPL(hrtimer_init_sleeper); + +-static int __sched do_nanosleep(struct hrtimer_sleeper *t, enum hrtimer_mode mode) ++static int __sched do_nanosleep(struct hrtimer_sleeper *t, enum hrtimer_mode mode, ++ unsigned long state) + { + hrtimer_init_sleeper(t, current); + + do { +- set_current_state(TASK_INTERRUPTIBLE); ++ set_current_state(state); + hrtimer_start_expires(&t->timer, mode); + if (!hrtimer_active(&t->timer)) + t->task = NULL; +@@ -1539,7 +1796,8 @@ + HRTIMER_MODE_ABS); + hrtimer_set_expires_tv64(&t.timer, restart->nanosleep.expires); + +- if (do_nanosleep(&t, HRTIMER_MODE_ABS)) ++ /* cpu_chill() does not care about restart state. */ ++ if (do_nanosleep(&t, HRTIMER_MODE_ABS, TASK_INTERRUPTIBLE)) + goto out; + + rmtp = restart->nanosleep.rmtp; +@@ -1556,8 +1814,10 @@ + return ret; + } + +-long hrtimer_nanosleep(struct timespec *rqtp, struct timespec __user *rmtp, +- const enum hrtimer_mode mode, const clockid_t clockid) ++static long ++__hrtimer_nanosleep(struct timespec *rqtp, struct timespec __user *rmtp, ++ const enum hrtimer_mode mode, const clockid_t clockid, ++ unsigned long state) + { + struct restart_block *restart; + struct hrtimer_sleeper t; +@@ -1570,7 +1830,7 @@ + + hrtimer_init_on_stack(&t.timer, clockid, mode); + hrtimer_set_expires_range_ns(&t.timer, timespec_to_ktime(*rqtp), slack); +- if (do_nanosleep(&t, mode)) ++ if (do_nanosleep(&t, mode, state)) + goto out; + + /* Absolute timers do not update the rmtp value and restart: */ +@@ -1597,6 +1857,12 @@ + return ret; + } + ++long hrtimer_nanosleep(struct timespec *rqtp, struct timespec __user *rmtp, ++ const enum hrtimer_mode mode, const clockid_t clockid) ++{ ++ return __hrtimer_nanosleep(rqtp, rmtp, mode, clockid, TASK_INTERRUPTIBLE); ++} ++ + SYSCALL_DEFINE2(nanosleep, struct timespec __user *, rqtp, + struct timespec __user *, rmtp) + { +@@ -1611,6 +1877,26 @@ + return hrtimer_nanosleep(&tu, rmtp, HRTIMER_MODE_REL, CLOCK_MONOTONIC); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * Sleep for 1 ms in hope whoever holds what we want will let it go. ++ */ ++void cpu_chill(void) ++{ ++ struct timespec tu = { ++ .tv_nsec = NSEC_PER_MSEC, ++ }; ++ unsigned int freeze_flag = current->flags & PF_NOFREEZE; ++ ++ current->flags |= PF_NOFREEZE; ++ __hrtimer_nanosleep(&tu, NULL, HRTIMER_MODE_REL, CLOCK_MONOTONIC, ++ TASK_UNINTERRUPTIBLE); ++ if (!freeze_flag) ++ current->flags &= ~PF_NOFREEZE; ++} ++EXPORT_SYMBOL(cpu_chill); ++#endif ++ + /* + * Functions related to boot-time initialization: + */ +@@ -1622,10 +1908,14 @@ + for (i = 0; i < HRTIMER_MAX_CLOCK_BASES; i++) { + cpu_base->clock_base[i].cpu_base = cpu_base; + timerqueue_init_head(&cpu_base->clock_base[i].active); ++ INIT_LIST_HEAD(&cpu_base->clock_base[i].expired); + } + + cpu_base->cpu = cpu; + hrtimer_init_hres(cpu_base); ++#ifdef CONFIG_PREEMPT_RT_BASE ++ init_waitqueue_head(&cpu_base->wait); ++#endif + } + + #ifdef CONFIG_HOTPLUG_CPU +@@ -1731,9 +2021,7 @@ + hrtimer_cpu_notify(&hrtimers_nb, (unsigned long)CPU_UP_PREPARE, + (void *)(long)smp_processor_id()); + register_cpu_notifier(&hrtimers_nb); +-#ifdef CONFIG_HIGH_RES_TIMERS + open_softirq(HRTIMER_SOFTIRQ, run_hrtimer_softirq); +-#endif + } + + /** +diff -Nur linux-4.1.26.orig/kernel/time/itimer.c linux-4.1.26/kernel/time/itimer.c +--- linux-4.1.26.orig/kernel/time/itimer.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/itimer.c 2016-06-19 15:30:58.711298275 +0200 +@@ -213,6 +213,7 @@ + /* We are sharing ->siglock with it_real_fn() */ + if (hrtimer_try_to_cancel(timer) < 0) { + spin_unlock_irq(&tsk->sighand->siglock); ++ hrtimer_wait_for_timer(&tsk->signal->real_timer); + goto again; + } + expires = timeval_to_ktime(value->it_value); +diff -Nur linux-4.1.26.orig/kernel/time/jiffies.c linux-4.1.26/kernel/time/jiffies.c +--- linux-4.1.26.orig/kernel/time/jiffies.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/jiffies.c 2016-06-19 15:30:58.711298275 +0200 +@@ -74,7 +74,8 @@ + .max_cycles = 10, + }; + +-__cacheline_aligned_in_smp DEFINE_SEQLOCK(jiffies_lock); ++__cacheline_aligned_in_smp DEFINE_RAW_SPINLOCK(jiffies_lock); ++__cacheline_aligned_in_smp seqcount_t jiffies_seq; + + #if (BITS_PER_LONG < 64) + u64 get_jiffies_64(void) +@@ -83,9 +84,9 @@ + u64 ret; + + do { +- seq = read_seqbegin(&jiffies_lock); ++ seq = read_seqcount_begin(&jiffies_seq); + ret = jiffies_64; +- } while (read_seqretry(&jiffies_lock, seq)); ++ } while (read_seqcount_retry(&jiffies_seq, seq)); + return ret; + } + EXPORT_SYMBOL(get_jiffies_64); +diff -Nur linux-4.1.26.orig/kernel/time/ntp.c linux-4.1.26/kernel/time/ntp.c +--- linux-4.1.26.orig/kernel/time/ntp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/ntp.c 2016-06-19 15:30:58.711298275 +0200 +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -529,10 +530,52 @@ + &sync_cmos_work, timespec_to_jiffies(&next)); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * RT can not call schedule_delayed_work from real interrupt context. ++ * Need to make a thread to do the real work. ++ */ ++static struct task_struct *cmos_delay_thread; ++static bool do_cmos_delay; ++ ++static int run_cmos_delay(void *ignore) ++{ ++ while (!kthread_should_stop()) { ++ set_current_state(TASK_INTERRUPTIBLE); ++ if (do_cmos_delay) { ++ do_cmos_delay = false; ++ queue_delayed_work(system_power_efficient_wq, ++ &sync_cmos_work, 0); ++ } ++ schedule(); ++ } ++ __set_current_state(TASK_RUNNING); ++ return 0; ++} ++ ++void ntp_notify_cmos_timer(void) ++{ ++ do_cmos_delay = true; ++ /* Make visible before waking up process */ ++ smp_wmb(); ++ wake_up_process(cmos_delay_thread); ++} ++ ++static __init int create_cmos_delay_thread(void) ++{ ++ cmos_delay_thread = kthread_run(run_cmos_delay, NULL, "kcmosdelayd"); ++ BUG_ON(!cmos_delay_thread); ++ return 0; ++} ++early_initcall(create_cmos_delay_thread); ++ ++#else ++ + void ntp_notify_cmos_timer(void) + { + queue_delayed_work(system_power_efficient_wq, &sync_cmos_work, 0); + } ++#endif /* CONFIG_PREEMPT_RT_FULL */ + + #else + void ntp_notify_cmos_timer(void) { } +diff -Nur linux-4.1.26.orig/kernel/time/posix-cpu-timers.c linux-4.1.26/kernel/time/posix-cpu-timers.c +--- linux-4.1.26.orig/kernel/time/posix-cpu-timers.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/posix-cpu-timers.c 2016-06-19 15:30:58.711298275 +0200 +@@ -3,6 +3,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -626,7 +627,7 @@ + /* + * Disarm any old timer after extracting its expiry time. + */ +- WARN_ON_ONCE(!irqs_disabled()); ++ WARN_ON_ONCE_NONRT(!irqs_disabled()); + + ret = 0; + old_incr = timer->it.cpu.incr; +@@ -1047,7 +1048,7 @@ + /* + * Now re-arm for the new expiry time. + */ +- WARN_ON_ONCE(!irqs_disabled()); ++ WARN_ON_ONCE_NONRT(!irqs_disabled()); + arm_timer(timer); + unlock_task_sighand(p, &flags); + +@@ -1113,10 +1114,11 @@ + sig = tsk->signal; + if (sig->cputimer.running) { + struct task_cputime group_sample; ++ unsigned long flags; + +- raw_spin_lock(&sig->cputimer.lock); ++ raw_spin_lock_irqsave(&sig->cputimer.lock, flags); + group_sample = sig->cputimer.cputime; +- raw_spin_unlock(&sig->cputimer.lock); ++ raw_spin_unlock_irqrestore(&sig->cputimer.lock, flags); + + if (task_cputime_expired(&group_sample, &sig->cputime_expires)) + return 1; +@@ -1130,13 +1132,13 @@ + * already updated our counts. We need to check if any timers fire now. + * Interrupts are disabled. + */ +-void run_posix_cpu_timers(struct task_struct *tsk) ++static void __run_posix_cpu_timers(struct task_struct *tsk) + { + LIST_HEAD(firing); + struct k_itimer *timer, *next; + unsigned long flags; + +- WARN_ON_ONCE(!irqs_disabled()); ++ WARN_ON_ONCE_NONRT(!irqs_disabled()); + + /* + * The fast path checks that there are no expired thread or thread +@@ -1194,6 +1196,190 @@ + } + } + ++#ifdef CONFIG_PREEMPT_RT_BASE ++#include ++#include ++DEFINE_PER_CPU(struct task_struct *, posix_timer_task); ++DEFINE_PER_CPU(struct task_struct *, posix_timer_tasklist); ++ ++static int posix_cpu_timers_thread(void *data) ++{ ++ int cpu = (long)data; ++ ++ BUG_ON(per_cpu(posix_timer_task,cpu) != current); ++ ++ while (!kthread_should_stop()) { ++ struct task_struct *tsk = NULL; ++ struct task_struct *next = NULL; ++ ++ if (cpu_is_offline(cpu)) ++ goto wait_to_die; ++ ++ /* grab task list */ ++ raw_local_irq_disable(); ++ tsk = per_cpu(posix_timer_tasklist, cpu); ++ per_cpu(posix_timer_tasklist, cpu) = NULL; ++ raw_local_irq_enable(); ++ ++ /* its possible the list is empty, just return */ ++ if (!tsk) { ++ set_current_state(TASK_INTERRUPTIBLE); ++ schedule(); ++ __set_current_state(TASK_RUNNING); ++ continue; ++ } ++ ++ /* Process task list */ ++ while (1) { ++ /* save next */ ++ next = tsk->posix_timer_list; ++ ++ /* run the task timers, clear its ptr and ++ * unreference it ++ */ ++ __run_posix_cpu_timers(tsk); ++ tsk->posix_timer_list = NULL; ++ put_task_struct(tsk); ++ ++ /* check if this is the last on the list */ ++ if (next == tsk) ++ break; ++ tsk = next; ++ } ++ } ++ return 0; ++ ++wait_to_die: ++ /* Wait for kthread_stop */ ++ set_current_state(TASK_INTERRUPTIBLE); ++ while (!kthread_should_stop()) { ++ schedule(); ++ set_current_state(TASK_INTERRUPTIBLE); ++ } ++ __set_current_state(TASK_RUNNING); ++ return 0; ++} ++ ++static inline int __fastpath_timer_check(struct task_struct *tsk) ++{ ++ /* tsk == current, ensure it is safe to use ->signal/sighand */ ++ if (unlikely(tsk->exit_state)) ++ return 0; ++ ++ if (!task_cputime_zero(&tsk->cputime_expires)) ++ return 1; ++ ++ if (!task_cputime_zero(&tsk->signal->cputime_expires)) ++ return 1; ++ ++ return 0; ++} ++ ++void run_posix_cpu_timers(struct task_struct *tsk) ++{ ++ unsigned long cpu = smp_processor_id(); ++ struct task_struct *tasklist; ++ ++ BUG_ON(!irqs_disabled()); ++ if(!per_cpu(posix_timer_task, cpu)) ++ return; ++ /* get per-cpu references */ ++ tasklist = per_cpu(posix_timer_tasklist, cpu); ++ ++ /* check to see if we're already queued */ ++ if (!tsk->posix_timer_list && __fastpath_timer_check(tsk)) { ++ get_task_struct(tsk); ++ if (tasklist) { ++ tsk->posix_timer_list = tasklist; ++ } else { ++ /* ++ * The list is terminated by a self-pointing ++ * task_struct ++ */ ++ tsk->posix_timer_list = tsk; ++ } ++ per_cpu(posix_timer_tasklist, cpu) = tsk; ++ ++ wake_up_process(per_cpu(posix_timer_task, cpu)); ++ } ++} ++ ++/* ++ * posix_cpu_thread_call - callback that gets triggered when a CPU is added. ++ * Here we can start up the necessary migration thread for the new CPU. ++ */ ++static int posix_cpu_thread_call(struct notifier_block *nfb, ++ unsigned long action, void *hcpu) ++{ ++ int cpu = (long)hcpu; ++ struct task_struct *p; ++ struct sched_param param; ++ ++ switch (action) { ++ case CPU_UP_PREPARE: ++ p = kthread_create(posix_cpu_timers_thread, hcpu, ++ "posixcputmr/%d",cpu); ++ if (IS_ERR(p)) ++ return NOTIFY_BAD; ++ p->flags |= PF_NOFREEZE; ++ kthread_bind(p, cpu); ++ /* Must be high prio to avoid getting starved */ ++ param.sched_priority = MAX_RT_PRIO-1; ++ sched_setscheduler(p, SCHED_FIFO, ¶m); ++ per_cpu(posix_timer_task,cpu) = p; ++ break; ++ case CPU_ONLINE: ++ /* Strictly unneccessary, as first user will wake it. */ ++ wake_up_process(per_cpu(posix_timer_task,cpu)); ++ break; ++#ifdef CONFIG_HOTPLUG_CPU ++ case CPU_UP_CANCELED: ++ /* Unbind it from offline cpu so it can run. Fall thru. */ ++ kthread_bind(per_cpu(posix_timer_task, cpu), ++ cpumask_any(cpu_online_mask)); ++ kthread_stop(per_cpu(posix_timer_task,cpu)); ++ per_cpu(posix_timer_task,cpu) = NULL; ++ break; ++ case CPU_DEAD: ++ kthread_stop(per_cpu(posix_timer_task,cpu)); ++ per_cpu(posix_timer_task,cpu) = NULL; ++ break; ++#endif ++ } ++ return NOTIFY_OK; ++} ++ ++/* Register at highest priority so that task migration (migrate_all_tasks) ++ * happens before everything else. ++ */ ++static struct notifier_block posix_cpu_thread_notifier = { ++ .notifier_call = posix_cpu_thread_call, ++ .priority = 10 ++}; ++ ++static int __init posix_cpu_thread_init(void) ++{ ++ void *hcpu = (void *)(long)smp_processor_id(); ++ /* Start one for boot CPU. */ ++ unsigned long cpu; ++ ++ /* init the per-cpu posix_timer_tasklets */ ++ for_each_possible_cpu(cpu) ++ per_cpu(posix_timer_tasklist, cpu) = NULL; ++ ++ posix_cpu_thread_call(&posix_cpu_thread_notifier, CPU_UP_PREPARE, hcpu); ++ posix_cpu_thread_call(&posix_cpu_thread_notifier, CPU_ONLINE, hcpu); ++ register_cpu_notifier(&posix_cpu_thread_notifier); ++ return 0; ++} ++early_initcall(posix_cpu_thread_init); ++#else /* CONFIG_PREEMPT_RT_BASE */ ++void run_posix_cpu_timers(struct task_struct *tsk) ++{ ++ __run_posix_cpu_timers(tsk); ++} ++#endif /* CONFIG_PREEMPT_RT_BASE */ ++ + /* + * Set one of the process-wide special case CPU timers or RLIMIT_CPU. + * The tsk->sighand->siglock must be held by the caller. +diff -Nur linux-4.1.26.orig/kernel/time/posix-timers.c linux-4.1.26/kernel/time/posix-timers.c +--- linux-4.1.26.orig/kernel/time/posix-timers.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/posix-timers.c 2016-06-19 15:30:58.711298275 +0200 +@@ -499,6 +499,7 @@ + static struct pid *good_sigevent(sigevent_t * event) + { + struct task_struct *rtn = current->group_leader; ++ int sig = event->sigev_signo; + + if ((event->sigev_notify & SIGEV_THREAD_ID ) && + (!(rtn = find_task_by_vpid(event->sigev_notify_thread_id)) || +@@ -507,7 +508,8 @@ + return NULL; + + if (((event->sigev_notify & ~SIGEV_THREAD_ID) != SIGEV_NONE) && +- ((event->sigev_signo <= 0) || (event->sigev_signo > SIGRTMAX))) ++ (sig <= 0 || sig > SIGRTMAX || sig_kernel_only(sig) || ++ sig_kernel_coredump(sig))) + return NULL; + + return task_pid(rtn); +@@ -819,6 +821,20 @@ + return overrun; + } + ++/* ++ * Protected by RCU! ++ */ ++static void timer_wait_for_callback(struct k_clock *kc, struct k_itimer *timr) ++{ ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (kc->timer_set == common_timer_set) ++ hrtimer_wait_for_timer(&timr->it.real.timer); ++ else ++ /* FIXME: Whacky hack for posix-cpu-timers */ ++ schedule_timeout(1); ++#endif ++} ++ + /* Set a POSIX.1b interval timer. */ + /* timr->it_lock is taken. */ + static int +@@ -896,6 +912,7 @@ + if (!timr) + return -EINVAL; + ++ rcu_read_lock(); + kc = clockid_to_kclock(timr->it_clock); + if (WARN_ON_ONCE(!kc || !kc->timer_set)) + error = -EINVAL; +@@ -904,9 +921,12 @@ + + unlock_timer(timr, flag); + if (error == TIMER_RETRY) { ++ timer_wait_for_callback(kc, timr); + rtn = NULL; // We already got the old time... ++ rcu_read_unlock(); + goto retry; + } ++ rcu_read_unlock(); + + if (old_setting && !error && + copy_to_user(old_setting, &old_spec, sizeof (old_spec))) +@@ -944,10 +964,15 @@ + if (!timer) + return -EINVAL; + ++ rcu_read_lock(); + if (timer_delete_hook(timer) == TIMER_RETRY) { + unlock_timer(timer, flags); ++ timer_wait_for_callback(clockid_to_kclock(timer->it_clock), ++ timer); ++ rcu_read_unlock(); + goto retry_delete; + } ++ rcu_read_unlock(); + + spin_lock(¤t->sighand->siglock); + list_del(&timer->list); +@@ -973,8 +998,18 @@ + retry_delete: + spin_lock_irqsave(&timer->it_lock, flags); + ++ /* On RT we can race with a deletion */ ++ if (!timer->it_signal) { ++ unlock_timer(timer, flags); ++ return; ++ } ++ + if (timer_delete_hook(timer) == TIMER_RETRY) { ++ rcu_read_lock(); + unlock_timer(timer, flags); ++ timer_wait_for_callback(clockid_to_kclock(timer->it_clock), ++ timer); ++ rcu_read_unlock(); + goto retry_delete; + } + list_del(&timer->list); +diff -Nur linux-4.1.26.orig/kernel/time/tick-broadcast-hrtimer.c linux-4.1.26/kernel/time/tick-broadcast-hrtimer.c +--- linux-4.1.26.orig/kernel/time/tick-broadcast-hrtimer.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/tick-broadcast-hrtimer.c 2016-06-19 15:30:58.711298275 +0200 +@@ -109,5 +109,6 @@ + { + hrtimer_init(&bctimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); + bctimer.function = bc_handler; ++ bctimer.irqsafe = true; + clockevents_register_device(&ce_broadcast_hrtimer); + } +diff -Nur linux-4.1.26.orig/kernel/time/tick-common.c linux-4.1.26/kernel/time/tick-common.c +--- linux-4.1.26.orig/kernel/time/tick-common.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/tick-common.c 2016-06-19 15:30:58.711298275 +0200 +@@ -78,13 +78,15 @@ + static void tick_periodic(int cpu) + { + if (tick_do_timer_cpu == cpu) { +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + + /* Keep track of the next tick event */ + tick_next_period = ktime_add(tick_next_period, tick_period); + + do_timer(1); +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + update_wall_time(); + } + +@@ -146,9 +148,9 @@ + ktime_t next; + + do { +- seq = read_seqbegin(&jiffies_lock); ++ seq = read_seqcount_begin(&jiffies_seq); + next = tick_next_period; +- } while (read_seqretry(&jiffies_lock, seq)); ++ } while (read_seqcount_retry(&jiffies_seq, seq)); + + clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT); + +diff -Nur linux-4.1.26.orig/kernel/time/tick-sched.c linux-4.1.26/kernel/time/tick-sched.c +--- linux-4.1.26.orig/kernel/time/tick-sched.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/tick-sched.c 2016-06-19 15:30:58.711298275 +0200 +@@ -62,7 +62,8 @@ + return; + + /* Reevalute with jiffies_lock held */ +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + + delta = ktime_sub(now, last_jiffies_update); + if (delta.tv64 >= tick_period.tv64) { +@@ -85,10 +86,12 @@ + /* Keep the tick_next_period variable up to date */ + tick_next_period = ktime_add(last_jiffies_update, tick_period); + } else { +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + return; + } +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + update_wall_time(); + } + +@@ -99,12 +102,14 @@ + { + ktime_t period; + +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + /* Did we start the jiffies update yet ? */ + if (last_jiffies_update.tv64 == 0) + last_jiffies_update = tick_next_period; + period = last_jiffies_update; +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + return period; + } + +@@ -176,6 +181,11 @@ + return false; + } + ++ if (!arch_irq_work_has_interrupt()) { ++ trace_tick_stop(0, "missing irq work interrupt\n"); ++ return false; ++ } ++ + /* sched_clock_tick() needs us? */ + #ifdef CONFIG_HAVE_UNSTABLE_SCHED_CLOCK + /* +@@ -222,6 +232,7 @@ + + static DEFINE_PER_CPU(struct irq_work, nohz_full_kick_work) = { + .func = nohz_full_kick_work_func, ++ .flags = IRQ_WORK_HARD_IRQ, + }; + + /* +@@ -578,10 +589,10 @@ + + /* Read jiffies and the time when jiffies were updated last */ + do { +- seq = read_seqbegin(&jiffies_lock); ++ seq = read_seqcount_begin(&jiffies_seq); + last_update = last_jiffies_update; + last_jiffies = jiffies; +- } while (read_seqretry(&jiffies_lock, seq)); ++ } while (read_seqcount_retry(&jiffies_seq, seq)); + + if (rcu_needs_cpu(&rcu_delta_jiffies) || + arch_needs_cpu() || irq_work_needs_cpu()) { +@@ -759,14 +770,7 @@ + return false; + + if (unlikely(local_softirq_pending() && cpu_online(cpu))) { +- static int ratelimit; +- +- if (ratelimit < 10 && +- (local_softirq_pending() & SOFTIRQ_STOP_IDLE_MASK)) { +- pr_warn("NOHZ: local_softirq_pending %02x\n", +- (unsigned int) local_softirq_pending()); +- ratelimit++; +- } ++ softirq_check_pending_idle(); + return false; + } + +@@ -1154,6 +1158,7 @@ + * Emulate tick processing via per-CPU hrtimers: + */ + hrtimer_init(&ts->sched_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); ++ ts->sched_timer.irqsafe = 1; + ts->sched_timer.function = tick_sched_timer; + + /* Get the next period (per cpu) */ +diff -Nur linux-4.1.26.orig/kernel/time/timekeeping.c linux-4.1.26/kernel/time/timekeeping.c +--- linux-4.1.26.orig/kernel/time/timekeeping.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/timekeeping.c 2016-06-19 15:30:58.711298275 +0200 +@@ -2064,8 +2064,10 @@ + */ + void xtime_update(unsigned long ticks) + { +- write_seqlock(&jiffies_lock); ++ raw_spin_lock(&jiffies_lock); ++ write_seqcount_begin(&jiffies_seq); + do_timer(ticks); +- write_sequnlock(&jiffies_lock); ++ write_seqcount_end(&jiffies_seq); ++ raw_spin_unlock(&jiffies_lock); + update_wall_time(); + } +diff -Nur linux-4.1.26.orig/kernel/time/timekeeping.h linux-4.1.26/kernel/time/timekeeping.h +--- linux-4.1.26.orig/kernel/time/timekeeping.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/timekeeping.h 2016-06-19 15:30:58.711298275 +0200 +@@ -22,7 +22,8 @@ + extern void do_timer(unsigned long ticks); + extern void update_wall_time(void); + +-extern seqlock_t jiffies_lock; ++extern raw_spinlock_t jiffies_lock; ++extern seqcount_t jiffies_seq; + + #define CS_NAME_LEN 32 + +diff -Nur linux-4.1.26.orig/kernel/time/timer.c linux-4.1.26/kernel/time/timer.c +--- linux-4.1.26.orig/kernel/time/timer.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/time/timer.c 2016-06-19 15:30:58.711298275 +0200 +@@ -78,6 +78,9 @@ + struct tvec_base { + spinlock_t lock; + struct timer_list *running_timer; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ wait_queue_head_t wait_for_running_timer; ++#endif + unsigned long timer_jiffies; + unsigned long next_timer; + unsigned long active_timers; +@@ -768,6 +771,36 @@ + } + } + ++#ifndef CONFIG_PREEMPT_RT_FULL ++static inline struct tvec_base *switch_timer_base(struct timer_list *timer, ++ struct tvec_base *old, ++ struct tvec_base *new) ++{ ++ /* See the comment in lock_timer_base() */ ++ timer_set_base(timer, NULL); ++ spin_unlock(&old->lock); ++ spin_lock(&new->lock); ++ timer_set_base(timer, new); ++ return new; ++} ++#else ++static inline struct tvec_base *switch_timer_base(struct timer_list *timer, ++ struct tvec_base *old, ++ struct tvec_base *new) ++{ ++ /* ++ * We cannot do the above because we might be preempted and ++ * then the preempter would see NULL and loop forever. ++ */ ++ if (spin_trylock(&new->lock)) { ++ timer_set_base(timer, new); ++ spin_unlock(&old->lock); ++ return new; ++ } ++ return old; ++} ++#endif ++ + static inline int + __mod_timer(struct timer_list *timer, unsigned long expires, + bool pending_only, int pinned) +@@ -798,14 +831,8 @@ + * handler yet has not finished. This also guarantees that + * the timer is serialized wrt itself. + */ +- if (likely(base->running_timer != timer)) { +- /* See the comment in lock_timer_base() */ +- timer_set_base(timer, NULL); +- spin_unlock(&base->lock); +- base = new_base; +- spin_lock(&base->lock); +- timer_set_base(timer, base); +- } ++ if (likely(base->running_timer != timer)) ++ base = switch_timer_base(timer, base, new_base); + } + + timer->expires = expires; +@@ -979,6 +1006,29 @@ + } + EXPORT_SYMBOL_GPL(add_timer_on); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * Wait for a running timer ++ */ ++static void wait_for_running_timer(struct timer_list *timer) ++{ ++ struct tvec_base *base = timer->base; ++ ++ if (base->running_timer == timer) ++ wait_event(base->wait_for_running_timer, ++ base->running_timer != timer); ++} ++ ++# define wakeup_timer_waiters(b) wake_up(&(b)->wait_for_running_timer) ++#else ++static inline void wait_for_running_timer(struct timer_list *timer) ++{ ++ cpu_relax(); ++} ++ ++# define wakeup_timer_waiters(b) do { } while (0) ++#endif ++ + /** + * del_timer - deactive a timer. + * @timer: the timer to be deactivated +@@ -1036,7 +1086,7 @@ + } + EXPORT_SYMBOL(try_to_del_timer_sync); + +-#ifdef CONFIG_SMP ++#if defined(CONFIG_SMP) || defined(CONFIG_PREEMPT_RT_FULL) + static DEFINE_PER_CPU(struct tvec_base, __tvec_bases); + + /** +@@ -1098,7 +1148,7 @@ + int ret = try_to_del_timer_sync(timer); + if (ret >= 0) + return ret; +- cpu_relax(); ++ wait_for_running_timer(timer); + } + } + EXPORT_SYMBOL(del_timer_sync); +@@ -1219,15 +1269,17 @@ + if (irqsafe) { + spin_unlock(&base->lock); + call_timer_fn(timer, fn, data); ++ base->running_timer = NULL; + spin_lock(&base->lock); + } else { + spin_unlock_irq(&base->lock); + call_timer_fn(timer, fn, data); ++ base->running_timer = NULL; + spin_lock_irq(&base->lock); + } + } + } +- base->running_timer = NULL; ++ wakeup_timer_waiters(base); + spin_unlock_irq(&base->lock); + } + +@@ -1367,6 +1419,14 @@ + if (cpu_is_offline(smp_processor_id())) + return expires; + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ /* ++ * On PREEMPT_RT we cannot sleep here. As a result we can't take ++ * the base lock to check when the next timer is pending and so ++ * we assume the next jiffy. ++ */ ++ return now + 1; ++#endif + spin_lock(&base->lock); + if (base->active_timers) { + if (time_before_eq(base->next_timer, base->timer_jiffies)) +@@ -1392,13 +1452,13 @@ + + /* Note: this timer irq context must be accounted for as well. */ + account_process_tick(p, user_tick); ++ scheduler_tick(); + run_local_timers(); + rcu_check_callbacks(user_tick); +-#ifdef CONFIG_IRQ_WORK ++#if defined(CONFIG_IRQ_WORK) + if (in_irq()) + irq_work_tick(); + #endif +- scheduler_tick(); + run_posix_cpu_timers(p); + } + +@@ -1411,6 +1471,8 @@ + + hrtimer_run_pending(); + ++ irq_work_tick_soft(); ++ + if (time_after_eq(jiffies, base->timer_jiffies)) + __run_timers(base); + } +@@ -1566,7 +1628,7 @@ + + BUG_ON(cpu_online(cpu)); + old_base = per_cpu(tvec_bases, cpu); +- new_base = get_cpu_var(tvec_bases); ++ new_base = get_local_var(tvec_bases); + /* + * The caller is globally serialized and nobody else + * takes two locks at once, deadlock is not possible. +@@ -1590,7 +1652,7 @@ + + spin_unlock(&old_base->lock); + spin_unlock_irq(&new_base->lock); +- put_cpu_var(tvec_bases); ++ put_local_var(tvec_bases); + } + + static int timer_cpu_notify(struct notifier_block *self, +@@ -1625,6 +1687,9 @@ + base->cpu = cpu; + per_cpu(tvec_bases, cpu) = base; + spin_lock_init(&base->lock); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ init_waitqueue_head(&base->wait_for_running_timer); ++#endif + + for (j = 0; j < TVN_SIZE; j++) { + INIT_LIST_HEAD(base->tv5.vec + j); +diff -Nur linux-4.1.26.orig/kernel/trace/Kconfig linux-4.1.26/kernel/trace/Kconfig +--- linux-4.1.26.orig/kernel/trace/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/Kconfig 2016-06-19 15:30:58.711298275 +0200 +@@ -187,6 +187,24 @@ + enabled. This option and the preempt-off timing option can be + used together or separately.) + ++config INTERRUPT_OFF_HIST ++ bool "Interrupts-off Latency Histogram" ++ depends on IRQSOFF_TRACER ++ help ++ This option generates continuously updated histograms (one per cpu) ++ of the duration of time periods with interrupts disabled. The ++ histograms are disabled by default. To enable them, write a non-zero ++ number to ++ ++ /sys/kernel/debug/tracing/latency_hist/enable/preemptirqsoff ++ ++ If PREEMPT_OFF_HIST is also selected, additional histograms (one ++ per cpu) are generated that accumulate the duration of time periods ++ when both interrupts and preemption are disabled. The histogram data ++ will be located in the debug file system at ++ ++ /sys/kernel/debug/tracing/latency_hist/irqsoff ++ + config PREEMPT_TRACER + bool "Preemption-off Latency Tracer" + default n +@@ -211,6 +229,24 @@ + enabled. This option and the irqs-off timing option can be + used together or separately.) + ++config PREEMPT_OFF_HIST ++ bool "Preemption-off Latency Histogram" ++ depends on PREEMPT_TRACER ++ help ++ This option generates continuously updated histograms (one per cpu) ++ of the duration of time periods with preemption disabled. The ++ histograms are disabled by default. To enable them, write a non-zero ++ number to ++ ++ /sys/kernel/debug/tracing/latency_hist/enable/preemptirqsoff ++ ++ If INTERRUPT_OFF_HIST is also selected, additional histograms (one ++ per cpu) are generated that accumulate the duration of time periods ++ when both interrupts and preemption are disabled. The histogram data ++ will be located in the debug file system at ++ ++ /sys/kernel/debug/tracing/latency_hist/preemptoff ++ + config SCHED_TRACER + bool "Scheduling Latency Tracer" + select GENERIC_TRACER +@@ -221,6 +257,74 @@ + This tracer tracks the latency of the highest priority task + to be scheduled in, starting from the point it has woken up. + ++config WAKEUP_LATENCY_HIST ++ bool "Scheduling Latency Histogram" ++ depends on SCHED_TRACER ++ help ++ This option generates continuously updated histograms (one per cpu) ++ of the scheduling latency of the highest priority task. ++ The histograms are disabled by default. To enable them, write a ++ non-zero number to ++ ++ /sys/kernel/debug/tracing/latency_hist/enable/wakeup ++ ++ Two different algorithms are used, one to determine the latency of ++ processes that exclusively use the highest priority of the system and ++ another one to determine the latency of processes that share the ++ highest system priority with other processes. The former is used to ++ improve hardware and system software, the latter to optimize the ++ priority design of a given system. The histogram data will be ++ located in the debug file system at ++ ++ /sys/kernel/debug/tracing/latency_hist/wakeup ++ ++ and ++ ++ /sys/kernel/debug/tracing/latency_hist/wakeup/sharedprio ++ ++ If both Scheduling Latency Histogram and Missed Timer Offsets ++ Histogram are selected, additional histogram data will be collected ++ that contain, in addition to the wakeup latency, the timer latency, in ++ case the wakeup was triggered by an expired timer. These histograms ++ are available in the ++ ++ /sys/kernel/debug/tracing/latency_hist/timerandwakeup ++ ++ directory. They reflect the apparent interrupt and scheduling latency ++ and are best suitable to determine the worst-case latency of a given ++ system. To enable these histograms, write a non-zero number to ++ ++ /sys/kernel/debug/tracing/latency_hist/enable/timerandwakeup ++ ++config MISSED_TIMER_OFFSETS_HIST ++ depends on HIGH_RES_TIMERS ++ select GENERIC_TRACER ++ bool "Missed Timer Offsets Histogram" ++ help ++ Generate a histogram of missed timer offsets in microseconds. The ++ histograms are disabled by default. To enable them, write a non-zero ++ number to ++ ++ /sys/kernel/debug/tracing/latency_hist/enable/missed_timer_offsets ++ ++ The histogram data will be located in the debug file system at ++ ++ /sys/kernel/debug/tracing/latency_hist/missed_timer_offsets ++ ++ If both Scheduling Latency Histogram and Missed Timer Offsets ++ Histogram are selected, additional histogram data will be collected ++ that contain, in addition to the wakeup latency, the timer latency, in ++ case the wakeup was triggered by an expired timer. These histograms ++ are available in the ++ ++ /sys/kernel/debug/tracing/latency_hist/timerandwakeup ++ ++ directory. They reflect the apparent interrupt and scheduling latency ++ and are best suitable to determine the worst-case latency of a given ++ system. To enable these histograms, write a non-zero number to ++ ++ /sys/kernel/debug/tracing/latency_hist/enable/timerandwakeup ++ + config ENABLE_DEFAULT_TRACERS + bool "Trace process context switches and events" + depends on !GENERIC_TRACER +diff -Nur linux-4.1.26.orig/kernel/trace/latency_hist.c linux-4.1.26/kernel/trace/latency_hist.c +--- linux-4.1.26.orig/kernel/trace/latency_hist.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.26/kernel/trace/latency_hist.c 2016-06-19 15:30:58.715298429 +0200 +@@ -0,0 +1,1178 @@ ++/* ++ * kernel/trace/latency_hist.c ++ * ++ * Add support for histograms of preemption-off latency and ++ * interrupt-off latency and wakeup latency, it depends on ++ * Real-Time Preemption Support. ++ * ++ * Copyright (C) 2005 MontaVista Software, Inc. ++ * Yi Yang ++ * ++ * Converted to work with the new latency tracer. ++ * Copyright (C) 2008 Red Hat, Inc. ++ * Steven Rostedt ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "trace.h" ++#include ++ ++#define NSECS_PER_USECS 1000L ++ ++#define CREATE_TRACE_POINTS ++#include ++ ++enum { ++ IRQSOFF_LATENCY = 0, ++ PREEMPTOFF_LATENCY, ++ PREEMPTIRQSOFF_LATENCY, ++ WAKEUP_LATENCY, ++ WAKEUP_LATENCY_SHAREDPRIO, ++ MISSED_TIMER_OFFSETS, ++ TIMERANDWAKEUP_LATENCY, ++ MAX_LATENCY_TYPE, ++}; ++ ++#define MAX_ENTRY_NUM 10240 ++ ++struct hist_data { ++ atomic_t hist_mode; /* 0 log, 1 don't log */ ++ long offset; /* set it to MAX_ENTRY_NUM/2 for a bipolar scale */ ++ long min_lat; ++ long max_lat; ++ unsigned long long below_hist_bound_samples; ++ unsigned long long above_hist_bound_samples; ++ long long accumulate_lat; ++ unsigned long long total_samples; ++ unsigned long long hist_array[MAX_ENTRY_NUM]; ++}; ++ ++struct enable_data { ++ int latency_type; ++ int enabled; ++}; ++ ++static char *latency_hist_dir_root = "latency_hist"; ++ ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++static DEFINE_PER_CPU(struct hist_data, irqsoff_hist); ++static char *irqsoff_hist_dir = "irqsoff"; ++static DEFINE_PER_CPU(cycles_t, hist_irqsoff_start); ++static DEFINE_PER_CPU(int, hist_irqsoff_counting); ++#endif ++ ++#ifdef CONFIG_PREEMPT_OFF_HIST ++static DEFINE_PER_CPU(struct hist_data, preemptoff_hist); ++static char *preemptoff_hist_dir = "preemptoff"; ++static DEFINE_PER_CPU(cycles_t, hist_preemptoff_start); ++static DEFINE_PER_CPU(int, hist_preemptoff_counting); ++#endif ++ ++#if defined(CONFIG_PREEMPT_OFF_HIST) && defined(CONFIG_INTERRUPT_OFF_HIST) ++static DEFINE_PER_CPU(struct hist_data, preemptirqsoff_hist); ++static char *preemptirqsoff_hist_dir = "preemptirqsoff"; ++static DEFINE_PER_CPU(cycles_t, hist_preemptirqsoff_start); ++static DEFINE_PER_CPU(int, hist_preemptirqsoff_counting); ++#endif ++ ++#if defined(CONFIG_PREEMPT_OFF_HIST) || defined(CONFIG_INTERRUPT_OFF_HIST) ++static notrace void probe_preemptirqsoff_hist(void *v, int reason, int start); ++static struct enable_data preemptirqsoff_enabled_data = { ++ .latency_type = PREEMPTIRQSOFF_LATENCY, ++ .enabled = 0, ++}; ++#endif ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++struct maxlatproc_data { ++ char comm[FIELD_SIZEOF(struct task_struct, comm)]; ++ char current_comm[FIELD_SIZEOF(struct task_struct, comm)]; ++ int pid; ++ int current_pid; ++ int prio; ++ int current_prio; ++ long latency; ++ long timeroffset; ++ cycle_t timestamp; ++}; ++#endif ++ ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++static DEFINE_PER_CPU(struct hist_data, wakeup_latency_hist); ++static DEFINE_PER_CPU(struct hist_data, wakeup_latency_hist_sharedprio); ++static char *wakeup_latency_hist_dir = "wakeup"; ++static char *wakeup_latency_hist_dir_sharedprio = "sharedprio"; ++static notrace void probe_wakeup_latency_hist_start(void *v, ++ struct task_struct *p); ++static notrace void probe_wakeup_latency_hist_stop(void *v, ++ struct task_struct *prev, struct task_struct *next); ++static notrace void probe_sched_migrate_task(void *, ++ struct task_struct *task, int cpu); ++static struct enable_data wakeup_latency_enabled_data = { ++ .latency_type = WAKEUP_LATENCY, ++ .enabled = 0, ++}; ++static DEFINE_PER_CPU(struct maxlatproc_data, wakeup_maxlatproc); ++static DEFINE_PER_CPU(struct maxlatproc_data, wakeup_maxlatproc_sharedprio); ++static DEFINE_PER_CPU(struct task_struct *, wakeup_task); ++static DEFINE_PER_CPU(int, wakeup_sharedprio); ++static unsigned long wakeup_pid; ++#endif ++ ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++static DEFINE_PER_CPU(struct hist_data, missed_timer_offsets); ++static char *missed_timer_offsets_dir = "missed_timer_offsets"; ++static notrace void probe_hrtimer_interrupt(void *v, int cpu, ++ long long offset, struct task_struct *curr, struct task_struct *task); ++static struct enable_data missed_timer_offsets_enabled_data = { ++ .latency_type = MISSED_TIMER_OFFSETS, ++ .enabled = 0, ++}; ++static DEFINE_PER_CPU(struct maxlatproc_data, missed_timer_offsets_maxlatproc); ++static unsigned long missed_timer_offsets_pid; ++#endif ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++static DEFINE_PER_CPU(struct hist_data, timerandwakeup_latency_hist); ++static char *timerandwakeup_latency_hist_dir = "timerandwakeup"; ++static struct enable_data timerandwakeup_enabled_data = { ++ .latency_type = TIMERANDWAKEUP_LATENCY, ++ .enabled = 0, ++}; ++static DEFINE_PER_CPU(struct maxlatproc_data, timerandwakeup_maxlatproc); ++#endif ++ ++void notrace latency_hist(int latency_type, int cpu, long latency, ++ long timeroffset, cycle_t stop, ++ struct task_struct *p) ++{ ++ struct hist_data *my_hist; ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ struct maxlatproc_data *mp = NULL; ++#endif ++ ++ if (!cpu_possible(cpu) || latency_type < 0 || ++ latency_type >= MAX_LATENCY_TYPE) ++ return; ++ ++ switch (latency_type) { ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++ case IRQSOFF_LATENCY: ++ my_hist = &per_cpu(irqsoff_hist, cpu); ++ break; ++#endif ++#ifdef CONFIG_PREEMPT_OFF_HIST ++ case PREEMPTOFF_LATENCY: ++ my_hist = &per_cpu(preemptoff_hist, cpu); ++ break; ++#endif ++#if defined(CONFIG_PREEMPT_OFF_HIST) && defined(CONFIG_INTERRUPT_OFF_HIST) ++ case PREEMPTIRQSOFF_LATENCY: ++ my_hist = &per_cpu(preemptirqsoff_hist, cpu); ++ break; ++#endif ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ case WAKEUP_LATENCY: ++ my_hist = &per_cpu(wakeup_latency_hist, cpu); ++ mp = &per_cpu(wakeup_maxlatproc, cpu); ++ break; ++ case WAKEUP_LATENCY_SHAREDPRIO: ++ my_hist = &per_cpu(wakeup_latency_hist_sharedprio, cpu); ++ mp = &per_cpu(wakeup_maxlatproc_sharedprio, cpu); ++ break; ++#endif ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ case MISSED_TIMER_OFFSETS: ++ my_hist = &per_cpu(missed_timer_offsets, cpu); ++ mp = &per_cpu(missed_timer_offsets_maxlatproc, cpu); ++ break; ++#endif ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ case TIMERANDWAKEUP_LATENCY: ++ my_hist = &per_cpu(timerandwakeup_latency_hist, cpu); ++ mp = &per_cpu(timerandwakeup_maxlatproc, cpu); ++ break; ++#endif ++ ++ default: ++ return; ++ } ++ ++ latency += my_hist->offset; ++ ++ if (atomic_read(&my_hist->hist_mode) == 0) ++ return; ++ ++ if (latency < 0 || latency >= MAX_ENTRY_NUM) { ++ if (latency < 0) ++ my_hist->below_hist_bound_samples++; ++ else ++ my_hist->above_hist_bound_samples++; ++ } else ++ my_hist->hist_array[latency]++; ++ ++ if (unlikely(latency > my_hist->max_lat || ++ my_hist->min_lat == LONG_MAX)) { ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ if (latency_type == WAKEUP_LATENCY || ++ latency_type == WAKEUP_LATENCY_SHAREDPRIO || ++ latency_type == MISSED_TIMER_OFFSETS || ++ latency_type == TIMERANDWAKEUP_LATENCY) { ++ strncpy(mp->comm, p->comm, sizeof(mp->comm)); ++ strncpy(mp->current_comm, current->comm, ++ sizeof(mp->current_comm)); ++ mp->pid = task_pid_nr(p); ++ mp->current_pid = task_pid_nr(current); ++ mp->prio = p->prio; ++ mp->current_prio = current->prio; ++ mp->latency = latency; ++ mp->timeroffset = timeroffset; ++ mp->timestamp = stop; ++ } ++#endif ++ my_hist->max_lat = latency; ++ } ++ if (unlikely(latency < my_hist->min_lat)) ++ my_hist->min_lat = latency; ++ my_hist->total_samples++; ++ my_hist->accumulate_lat += latency; ++} ++ ++static void *l_start(struct seq_file *m, loff_t *pos) ++{ ++ loff_t *index_ptr = NULL; ++ loff_t index = *pos; ++ struct hist_data *my_hist = m->private; ++ ++ if (index == 0) { ++ char minstr[32], avgstr[32], maxstr[32]; ++ ++ atomic_dec(&my_hist->hist_mode); ++ ++ if (likely(my_hist->total_samples)) { ++ long avg = (long) div64_s64(my_hist->accumulate_lat, ++ my_hist->total_samples); ++ snprintf(minstr, sizeof(minstr), "%ld", ++ my_hist->min_lat - my_hist->offset); ++ snprintf(avgstr, sizeof(avgstr), "%ld", ++ avg - my_hist->offset); ++ snprintf(maxstr, sizeof(maxstr), "%ld", ++ my_hist->max_lat - my_hist->offset); ++ } else { ++ strcpy(minstr, ""); ++ strcpy(avgstr, minstr); ++ strcpy(maxstr, minstr); ++ } ++ ++ seq_printf(m, "#Minimum latency: %s microseconds\n" ++ "#Average latency: %s microseconds\n" ++ "#Maximum latency: %s microseconds\n" ++ "#Total samples: %llu\n" ++ "#There are %llu samples lower than %ld" ++ " microseconds.\n" ++ "#There are %llu samples greater or equal" ++ " than %ld microseconds.\n" ++ "#usecs\t%16s\n", ++ minstr, avgstr, maxstr, ++ my_hist->total_samples, ++ my_hist->below_hist_bound_samples, ++ -my_hist->offset, ++ my_hist->above_hist_bound_samples, ++ MAX_ENTRY_NUM - my_hist->offset, ++ "samples"); ++ } ++ if (index < MAX_ENTRY_NUM) { ++ index_ptr = kmalloc(sizeof(loff_t), GFP_KERNEL); ++ if (index_ptr) ++ *index_ptr = index; ++ } ++ ++ return index_ptr; ++} ++ ++static void *l_next(struct seq_file *m, void *p, loff_t *pos) ++{ ++ loff_t *index_ptr = p; ++ struct hist_data *my_hist = m->private; ++ ++ if (++*pos >= MAX_ENTRY_NUM) { ++ atomic_inc(&my_hist->hist_mode); ++ return NULL; ++ } ++ *index_ptr = *pos; ++ return index_ptr; ++} ++ ++static void l_stop(struct seq_file *m, void *p) ++{ ++ kfree(p); ++} ++ ++static int l_show(struct seq_file *m, void *p) ++{ ++ int index = *(loff_t *) p; ++ struct hist_data *my_hist = m->private; ++ ++ seq_printf(m, "%6ld\t%16llu\n", index - my_hist->offset, ++ my_hist->hist_array[index]); ++ return 0; ++} ++ ++static const struct seq_operations latency_hist_seq_op = { ++ .start = l_start, ++ .next = l_next, ++ .stop = l_stop, ++ .show = l_show ++}; ++ ++static int latency_hist_open(struct inode *inode, struct file *file) ++{ ++ int ret; ++ ++ ret = seq_open(file, &latency_hist_seq_op); ++ if (!ret) { ++ struct seq_file *seq = file->private_data; ++ seq->private = inode->i_private; ++ } ++ return ret; ++} ++ ++static const struct file_operations latency_hist_fops = { ++ .open = latency_hist_open, ++ .read = seq_read, ++ .llseek = seq_lseek, ++ .release = seq_release, ++}; ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++static void clear_maxlatprocdata(struct maxlatproc_data *mp) ++{ ++ mp->comm[0] = mp->current_comm[0] = '\0'; ++ mp->prio = mp->current_prio = mp->pid = mp->current_pid = ++ mp->latency = mp->timeroffset = -1; ++ mp->timestamp = 0; ++} ++#endif ++ ++static void hist_reset(struct hist_data *hist) ++{ ++ atomic_dec(&hist->hist_mode); ++ ++ memset(hist->hist_array, 0, sizeof(hist->hist_array)); ++ hist->below_hist_bound_samples = 0ULL; ++ hist->above_hist_bound_samples = 0ULL; ++ hist->min_lat = LONG_MAX; ++ hist->max_lat = LONG_MIN; ++ hist->total_samples = 0ULL; ++ hist->accumulate_lat = 0LL; ++ ++ atomic_inc(&hist->hist_mode); ++} ++ ++static ssize_t ++latency_hist_reset(struct file *file, const char __user *a, ++ size_t size, loff_t *off) ++{ ++ int cpu; ++ struct hist_data *hist = NULL; ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ struct maxlatproc_data *mp = NULL; ++#endif ++ off_t latency_type = (off_t) file->private_data; ++ ++ for_each_online_cpu(cpu) { ++ ++ switch (latency_type) { ++#ifdef CONFIG_PREEMPT_OFF_HIST ++ case PREEMPTOFF_LATENCY: ++ hist = &per_cpu(preemptoff_hist, cpu); ++ break; ++#endif ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++ case IRQSOFF_LATENCY: ++ hist = &per_cpu(irqsoff_hist, cpu); ++ break; ++#endif ++#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) ++ case PREEMPTIRQSOFF_LATENCY: ++ hist = &per_cpu(preemptirqsoff_hist, cpu); ++ break; ++#endif ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ case WAKEUP_LATENCY: ++ hist = &per_cpu(wakeup_latency_hist, cpu); ++ mp = &per_cpu(wakeup_maxlatproc, cpu); ++ break; ++ case WAKEUP_LATENCY_SHAREDPRIO: ++ hist = &per_cpu(wakeup_latency_hist_sharedprio, cpu); ++ mp = &per_cpu(wakeup_maxlatproc_sharedprio, cpu); ++ break; ++#endif ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ case MISSED_TIMER_OFFSETS: ++ hist = &per_cpu(missed_timer_offsets, cpu); ++ mp = &per_cpu(missed_timer_offsets_maxlatproc, cpu); ++ break; ++#endif ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ case TIMERANDWAKEUP_LATENCY: ++ hist = &per_cpu(timerandwakeup_latency_hist, cpu); ++ mp = &per_cpu(timerandwakeup_maxlatproc, cpu); ++ break; ++#endif ++ } ++ ++ hist_reset(hist); ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ if (latency_type == WAKEUP_LATENCY || ++ latency_type == WAKEUP_LATENCY_SHAREDPRIO || ++ latency_type == MISSED_TIMER_OFFSETS || ++ latency_type == TIMERANDWAKEUP_LATENCY) ++ clear_maxlatprocdata(mp); ++#endif ++ } ++ ++ return size; ++} ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++static ssize_t ++show_pid(struct file *file, char __user *ubuf, size_t cnt, loff_t *ppos) ++{ ++ char buf[64]; ++ int r; ++ unsigned long *this_pid = file->private_data; ++ ++ r = snprintf(buf, sizeof(buf), "%lu\n", *this_pid); ++ return simple_read_from_buffer(ubuf, cnt, ppos, buf, r); ++} ++ ++static ssize_t do_pid(struct file *file, const char __user *ubuf, ++ size_t cnt, loff_t *ppos) ++{ ++ char buf[64]; ++ unsigned long pid; ++ unsigned long *this_pid = file->private_data; ++ ++ if (cnt >= sizeof(buf)) ++ return -EINVAL; ++ ++ if (copy_from_user(&buf, ubuf, cnt)) ++ return -EFAULT; ++ ++ buf[cnt] = '\0'; ++ ++ if (kstrtoul(buf, 10, &pid)) ++ return -EINVAL; ++ ++ *this_pid = pid; ++ ++ return cnt; ++} ++#endif ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++static ssize_t ++show_maxlatproc(struct file *file, char __user *ubuf, size_t cnt, loff_t *ppos) ++{ ++ int r; ++ struct maxlatproc_data *mp = file->private_data; ++ int strmaxlen = (TASK_COMM_LEN * 2) + (8 * 8); ++ unsigned long long t; ++ unsigned long usecs, secs; ++ char *buf; ++ ++ if (mp->pid == -1 || mp->current_pid == -1) { ++ buf = "(none)\n"; ++ return simple_read_from_buffer(ubuf, cnt, ppos, buf, ++ strlen(buf)); ++ } ++ ++ buf = kmalloc(strmaxlen, GFP_KERNEL); ++ if (buf == NULL) ++ return -ENOMEM; ++ ++ t = ns2usecs(mp->timestamp); ++ usecs = do_div(t, USEC_PER_SEC); ++ secs = (unsigned long) t; ++ r = snprintf(buf, strmaxlen, ++ "%d %d %ld (%ld) %s <- %d %d %s %lu.%06lu\n", mp->pid, ++ MAX_RT_PRIO-1 - mp->prio, mp->latency, mp->timeroffset, mp->comm, ++ mp->current_pid, MAX_RT_PRIO-1 - mp->current_prio, mp->current_comm, ++ secs, usecs); ++ r = simple_read_from_buffer(ubuf, cnt, ppos, buf, r); ++ kfree(buf); ++ return r; ++} ++#endif ++ ++static ssize_t ++show_enable(struct file *file, char __user *ubuf, size_t cnt, loff_t *ppos) ++{ ++ char buf[64]; ++ struct enable_data *ed = file->private_data; ++ int r; ++ ++ r = snprintf(buf, sizeof(buf), "%d\n", ed->enabled); ++ return simple_read_from_buffer(ubuf, cnt, ppos, buf, r); ++} ++ ++static ssize_t ++do_enable(struct file *file, const char __user *ubuf, size_t cnt, loff_t *ppos) ++{ ++ char buf[64]; ++ long enable; ++ struct enable_data *ed = file->private_data; ++ ++ if (cnt >= sizeof(buf)) ++ return -EINVAL; ++ ++ if (copy_from_user(&buf, ubuf, cnt)) ++ return -EFAULT; ++ ++ buf[cnt] = 0; ++ ++ if (kstrtoul(buf, 10, &enable)) ++ return -EINVAL; ++ ++ if ((enable && ed->enabled) || (!enable && !ed->enabled)) ++ return cnt; ++ ++ if (enable) { ++ int ret; ++ ++ switch (ed->latency_type) { ++#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) ++ case PREEMPTIRQSOFF_LATENCY: ++ ret = register_trace_preemptirqsoff_hist( ++ probe_preemptirqsoff_hist, NULL); ++ if (ret) { ++ pr_info("wakeup trace: Couldn't assign " ++ "probe_preemptirqsoff_hist " ++ "to trace_preemptirqsoff_hist\n"); ++ return ret; ++ } ++ break; ++#endif ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ case WAKEUP_LATENCY: ++ ret = register_trace_sched_wakeup( ++ probe_wakeup_latency_hist_start, NULL); ++ if (ret) { ++ pr_info("wakeup trace: Couldn't assign " ++ "probe_wakeup_latency_hist_start " ++ "to trace_sched_wakeup\n"); ++ return ret; ++ } ++ ret = register_trace_sched_wakeup_new( ++ probe_wakeup_latency_hist_start, NULL); ++ if (ret) { ++ pr_info("wakeup trace: Couldn't assign " ++ "probe_wakeup_latency_hist_start " ++ "to trace_sched_wakeup_new\n"); ++ unregister_trace_sched_wakeup( ++ probe_wakeup_latency_hist_start, NULL); ++ return ret; ++ } ++ ret = register_trace_sched_switch( ++ probe_wakeup_latency_hist_stop, NULL); ++ if (ret) { ++ pr_info("wakeup trace: Couldn't assign " ++ "probe_wakeup_latency_hist_stop " ++ "to trace_sched_switch\n"); ++ unregister_trace_sched_wakeup( ++ probe_wakeup_latency_hist_start, NULL); ++ unregister_trace_sched_wakeup_new( ++ probe_wakeup_latency_hist_start, NULL); ++ return ret; ++ } ++ ret = register_trace_sched_migrate_task( ++ probe_sched_migrate_task, NULL); ++ if (ret) { ++ pr_info("wakeup trace: Couldn't assign " ++ "probe_sched_migrate_task " ++ "to trace_sched_migrate_task\n"); ++ unregister_trace_sched_wakeup( ++ probe_wakeup_latency_hist_start, NULL); ++ unregister_trace_sched_wakeup_new( ++ probe_wakeup_latency_hist_start, NULL); ++ unregister_trace_sched_switch( ++ probe_wakeup_latency_hist_stop, NULL); ++ return ret; ++ } ++ break; ++#endif ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ case MISSED_TIMER_OFFSETS: ++ ret = register_trace_hrtimer_interrupt( ++ probe_hrtimer_interrupt, NULL); ++ if (ret) { ++ pr_info("wakeup trace: Couldn't assign " ++ "probe_hrtimer_interrupt " ++ "to trace_hrtimer_interrupt\n"); ++ return ret; ++ } ++ break; ++#endif ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ case TIMERANDWAKEUP_LATENCY: ++ if (!wakeup_latency_enabled_data.enabled || ++ !missed_timer_offsets_enabled_data.enabled) ++ return -EINVAL; ++ break; ++#endif ++ default: ++ break; ++ } ++ } else { ++ switch (ed->latency_type) { ++#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) ++ case PREEMPTIRQSOFF_LATENCY: ++ { ++ int cpu; ++ ++ unregister_trace_preemptirqsoff_hist( ++ probe_preemptirqsoff_hist, NULL); ++ for_each_online_cpu(cpu) { ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++ per_cpu(hist_irqsoff_counting, ++ cpu) = 0; ++#endif ++#ifdef CONFIG_PREEMPT_OFF_HIST ++ per_cpu(hist_preemptoff_counting, ++ cpu) = 0; ++#endif ++#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) ++ per_cpu(hist_preemptirqsoff_counting, ++ cpu) = 0; ++#endif ++ } ++ } ++ break; ++#endif ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ case WAKEUP_LATENCY: ++ { ++ int cpu; ++ ++ unregister_trace_sched_wakeup( ++ probe_wakeup_latency_hist_start, NULL); ++ unregister_trace_sched_wakeup_new( ++ probe_wakeup_latency_hist_start, NULL); ++ unregister_trace_sched_switch( ++ probe_wakeup_latency_hist_stop, NULL); ++ unregister_trace_sched_migrate_task( ++ probe_sched_migrate_task, NULL); ++ ++ for_each_online_cpu(cpu) { ++ per_cpu(wakeup_task, cpu) = NULL; ++ per_cpu(wakeup_sharedprio, cpu) = 0; ++ } ++ } ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ timerandwakeup_enabled_data.enabled = 0; ++#endif ++ break; ++#endif ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ case MISSED_TIMER_OFFSETS: ++ unregister_trace_hrtimer_interrupt( ++ probe_hrtimer_interrupt, NULL); ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ timerandwakeup_enabled_data.enabled = 0; ++#endif ++ break; ++#endif ++ default: ++ break; ++ } ++ } ++ ed->enabled = enable; ++ return cnt; ++} ++ ++static const struct file_operations latency_hist_reset_fops = { ++ .open = tracing_open_generic, ++ .write = latency_hist_reset, ++}; ++ ++static const struct file_operations enable_fops = { ++ .open = tracing_open_generic, ++ .read = show_enable, ++ .write = do_enable, ++}; ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++static const struct file_operations pid_fops = { ++ .open = tracing_open_generic, ++ .read = show_pid, ++ .write = do_pid, ++}; ++ ++static const struct file_operations maxlatproc_fops = { ++ .open = tracing_open_generic, ++ .read = show_maxlatproc, ++}; ++#endif ++ ++#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) ++static notrace void probe_preemptirqsoff_hist(void *v, int reason, ++ int starthist) ++{ ++ int cpu = raw_smp_processor_id(); ++ int time_set = 0; ++ ++ if (starthist) { ++ cycle_t uninitialized_var(start); ++ ++ if (!preempt_count() && !irqs_disabled()) ++ return; ++ ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++ if ((reason == IRQS_OFF || reason == TRACE_START) && ++ !per_cpu(hist_irqsoff_counting, cpu)) { ++ per_cpu(hist_irqsoff_counting, cpu) = 1; ++ start = ftrace_now(cpu); ++ time_set++; ++ per_cpu(hist_irqsoff_start, cpu) = start; ++ } ++#endif ++ ++#ifdef CONFIG_PREEMPT_OFF_HIST ++ if ((reason == PREEMPT_OFF || reason == TRACE_START) && ++ !per_cpu(hist_preemptoff_counting, cpu)) { ++ per_cpu(hist_preemptoff_counting, cpu) = 1; ++ if (!(time_set++)) ++ start = ftrace_now(cpu); ++ per_cpu(hist_preemptoff_start, cpu) = start; ++ } ++#endif ++ ++#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) ++ if (per_cpu(hist_irqsoff_counting, cpu) && ++ per_cpu(hist_preemptoff_counting, cpu) && ++ !per_cpu(hist_preemptirqsoff_counting, cpu)) { ++ per_cpu(hist_preemptirqsoff_counting, cpu) = 1; ++ if (!time_set) ++ start = ftrace_now(cpu); ++ per_cpu(hist_preemptirqsoff_start, cpu) = start; ++ } ++#endif ++ } else { ++ cycle_t uninitialized_var(stop); ++ ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++ if ((reason == IRQS_ON || reason == TRACE_STOP) && ++ per_cpu(hist_irqsoff_counting, cpu)) { ++ cycle_t start = per_cpu(hist_irqsoff_start, cpu); ++ ++ stop = ftrace_now(cpu); ++ time_set++; ++ if (start) { ++ long latency = ((long) (stop - start)) / ++ NSECS_PER_USECS; ++ ++ latency_hist(IRQSOFF_LATENCY, cpu, latency, 0, ++ stop, NULL); ++ } ++ per_cpu(hist_irqsoff_counting, cpu) = 0; ++ } ++#endif ++ ++#ifdef CONFIG_PREEMPT_OFF_HIST ++ if ((reason == PREEMPT_ON || reason == TRACE_STOP) && ++ per_cpu(hist_preemptoff_counting, cpu)) { ++ cycle_t start = per_cpu(hist_preemptoff_start, cpu); ++ ++ if (!(time_set++)) ++ stop = ftrace_now(cpu); ++ if (start) { ++ long latency = ((long) (stop - start)) / ++ NSECS_PER_USECS; ++ ++ latency_hist(PREEMPTOFF_LATENCY, cpu, latency, ++ 0, stop, NULL); ++ } ++ per_cpu(hist_preemptoff_counting, cpu) = 0; ++ } ++#endif ++ ++#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) ++ if ((!per_cpu(hist_irqsoff_counting, cpu) || ++ !per_cpu(hist_preemptoff_counting, cpu)) && ++ per_cpu(hist_preemptirqsoff_counting, cpu)) { ++ cycle_t start = per_cpu(hist_preemptirqsoff_start, cpu); ++ ++ if (!time_set) ++ stop = ftrace_now(cpu); ++ if (start) { ++ long latency = ((long) (stop - start)) / ++ NSECS_PER_USECS; ++ ++ latency_hist(PREEMPTIRQSOFF_LATENCY, cpu, ++ latency, 0, stop, NULL); ++ } ++ per_cpu(hist_preemptirqsoff_counting, cpu) = 0; ++ } ++#endif ++ } ++} ++#endif ++ ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++static DEFINE_RAW_SPINLOCK(wakeup_lock); ++static notrace void probe_sched_migrate_task(void *v, struct task_struct *task, ++ int cpu) ++{ ++ int old_cpu = task_cpu(task); ++ ++ if (cpu != old_cpu) { ++ unsigned long flags; ++ struct task_struct *cpu_wakeup_task; ++ ++ raw_spin_lock_irqsave(&wakeup_lock, flags); ++ ++ cpu_wakeup_task = per_cpu(wakeup_task, old_cpu); ++ if (task == cpu_wakeup_task) { ++ put_task_struct(cpu_wakeup_task); ++ per_cpu(wakeup_task, old_cpu) = NULL; ++ cpu_wakeup_task = per_cpu(wakeup_task, cpu) = task; ++ get_task_struct(cpu_wakeup_task); ++ } ++ ++ raw_spin_unlock_irqrestore(&wakeup_lock, flags); ++ } ++} ++ ++static notrace void probe_wakeup_latency_hist_start(void *v, ++ struct task_struct *p) ++{ ++ unsigned long flags; ++ struct task_struct *curr = current; ++ int cpu = task_cpu(p); ++ struct task_struct *cpu_wakeup_task; ++ ++ raw_spin_lock_irqsave(&wakeup_lock, flags); ++ ++ cpu_wakeup_task = per_cpu(wakeup_task, cpu); ++ ++ if (wakeup_pid) { ++ if ((cpu_wakeup_task && p->prio == cpu_wakeup_task->prio) || ++ p->prio == curr->prio) ++ per_cpu(wakeup_sharedprio, cpu) = 1; ++ if (likely(wakeup_pid != task_pid_nr(p))) ++ goto out; ++ } else { ++ if (likely(!rt_task(p)) || ++ (cpu_wakeup_task && p->prio > cpu_wakeup_task->prio) || ++ p->prio > curr->prio) ++ goto out; ++ if ((cpu_wakeup_task && p->prio == cpu_wakeup_task->prio) || ++ p->prio == curr->prio) ++ per_cpu(wakeup_sharedprio, cpu) = 1; ++ } ++ ++ if (cpu_wakeup_task) ++ put_task_struct(cpu_wakeup_task); ++ cpu_wakeup_task = per_cpu(wakeup_task, cpu) = p; ++ get_task_struct(cpu_wakeup_task); ++ cpu_wakeup_task->preempt_timestamp_hist = ++ ftrace_now(raw_smp_processor_id()); ++out: ++ raw_spin_unlock_irqrestore(&wakeup_lock, flags); ++} ++ ++static notrace void probe_wakeup_latency_hist_stop(void *v, ++ struct task_struct *prev, struct task_struct *next) ++{ ++ unsigned long flags; ++ int cpu = task_cpu(next); ++ long latency; ++ cycle_t stop; ++ struct task_struct *cpu_wakeup_task; ++ ++ raw_spin_lock_irqsave(&wakeup_lock, flags); ++ ++ cpu_wakeup_task = per_cpu(wakeup_task, cpu); ++ ++ if (cpu_wakeup_task == NULL) ++ goto out; ++ ++ /* Already running? */ ++ if (unlikely(current == cpu_wakeup_task)) ++ goto out_reset; ++ ++ if (next != cpu_wakeup_task) { ++ if (next->prio < cpu_wakeup_task->prio) ++ goto out_reset; ++ ++ if (next->prio == cpu_wakeup_task->prio) ++ per_cpu(wakeup_sharedprio, cpu) = 1; ++ ++ goto out; ++ } ++ ++ if (current->prio == cpu_wakeup_task->prio) ++ per_cpu(wakeup_sharedprio, cpu) = 1; ++ ++ /* ++ * The task we are waiting for is about to be switched to. ++ * Calculate latency and store it in histogram. ++ */ ++ stop = ftrace_now(raw_smp_processor_id()); ++ ++ latency = ((long) (stop - next->preempt_timestamp_hist)) / ++ NSECS_PER_USECS; ++ ++ if (per_cpu(wakeup_sharedprio, cpu)) { ++ latency_hist(WAKEUP_LATENCY_SHAREDPRIO, cpu, latency, 0, stop, ++ next); ++ per_cpu(wakeup_sharedprio, cpu) = 0; ++ } else { ++ latency_hist(WAKEUP_LATENCY, cpu, latency, 0, stop, next); ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ if (timerandwakeup_enabled_data.enabled) { ++ latency_hist(TIMERANDWAKEUP_LATENCY, cpu, ++ next->timer_offset + latency, next->timer_offset, ++ stop, next); ++ } ++#endif ++ } ++ ++out_reset: ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ next->timer_offset = 0; ++#endif ++ put_task_struct(cpu_wakeup_task); ++ per_cpu(wakeup_task, cpu) = NULL; ++out: ++ raw_spin_unlock_irqrestore(&wakeup_lock, flags); ++} ++#endif ++ ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++static notrace void probe_hrtimer_interrupt(void *v, int cpu, ++ long long latency_ns, struct task_struct *curr, ++ struct task_struct *task) ++{ ++ if (latency_ns <= 0 && task != NULL && rt_task(task) && ++ (task->prio < curr->prio || ++ (task->prio == curr->prio && ++ !cpumask_test_cpu(cpu, &task->cpus_allowed)))) { ++ long latency; ++ cycle_t now; ++ ++ if (missed_timer_offsets_pid) { ++ if (likely(missed_timer_offsets_pid != ++ task_pid_nr(task))) ++ return; ++ } ++ ++ now = ftrace_now(cpu); ++ latency = (long) div_s64(-latency_ns, NSECS_PER_USECS); ++ latency_hist(MISSED_TIMER_OFFSETS, cpu, latency, latency, now, ++ task); ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ task->timer_offset = latency; ++#endif ++ } ++} ++#endif ++ ++static __init int latency_hist_init(void) ++{ ++ struct dentry *latency_hist_root = NULL; ++ struct dentry *dentry; ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ struct dentry *dentry_sharedprio; ++#endif ++ struct dentry *entry; ++ struct dentry *enable_root; ++ int i = 0; ++ struct hist_data *my_hist; ++ char name[64]; ++ char *cpufmt = "CPU%d"; ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) || \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ char *cpufmt_maxlatproc = "max_latency-CPU%d"; ++ struct maxlatproc_data *mp = NULL; ++#endif ++ ++ dentry = tracing_init_dentry(); ++ latency_hist_root = debugfs_create_dir(latency_hist_dir_root, dentry); ++ enable_root = debugfs_create_dir("enable", latency_hist_root); ++ ++#ifdef CONFIG_INTERRUPT_OFF_HIST ++ dentry = debugfs_create_dir(irqsoff_hist_dir, latency_hist_root); ++ for_each_possible_cpu(i) { ++ sprintf(name, cpufmt, i); ++ entry = debugfs_create_file(name, 0444, dentry, ++ &per_cpu(irqsoff_hist, i), &latency_hist_fops); ++ my_hist = &per_cpu(irqsoff_hist, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ } ++ entry = debugfs_create_file("reset", 0644, dentry, ++ (void *)IRQSOFF_LATENCY, &latency_hist_reset_fops); ++#endif ++ ++#ifdef CONFIG_PREEMPT_OFF_HIST ++ dentry = debugfs_create_dir(preemptoff_hist_dir, ++ latency_hist_root); ++ for_each_possible_cpu(i) { ++ sprintf(name, cpufmt, i); ++ entry = debugfs_create_file(name, 0444, dentry, ++ &per_cpu(preemptoff_hist, i), &latency_hist_fops); ++ my_hist = &per_cpu(preemptoff_hist, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ } ++ entry = debugfs_create_file("reset", 0644, dentry, ++ (void *)PREEMPTOFF_LATENCY, &latency_hist_reset_fops); ++#endif ++ ++#if defined(CONFIG_INTERRUPT_OFF_HIST) && defined(CONFIG_PREEMPT_OFF_HIST) ++ dentry = debugfs_create_dir(preemptirqsoff_hist_dir, ++ latency_hist_root); ++ for_each_possible_cpu(i) { ++ sprintf(name, cpufmt, i); ++ entry = debugfs_create_file(name, 0444, dentry, ++ &per_cpu(preemptirqsoff_hist, i), &latency_hist_fops); ++ my_hist = &per_cpu(preemptirqsoff_hist, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ } ++ entry = debugfs_create_file("reset", 0644, dentry, ++ (void *)PREEMPTIRQSOFF_LATENCY, &latency_hist_reset_fops); ++#endif ++ ++#if defined(CONFIG_INTERRUPT_OFF_HIST) || defined(CONFIG_PREEMPT_OFF_HIST) ++ entry = debugfs_create_file("preemptirqsoff", 0644, ++ enable_root, (void *)&preemptirqsoff_enabled_data, ++ &enable_fops); ++#endif ++ ++#ifdef CONFIG_WAKEUP_LATENCY_HIST ++ dentry = debugfs_create_dir(wakeup_latency_hist_dir, ++ latency_hist_root); ++ dentry_sharedprio = debugfs_create_dir( ++ wakeup_latency_hist_dir_sharedprio, dentry); ++ for_each_possible_cpu(i) { ++ sprintf(name, cpufmt, i); ++ ++ entry = debugfs_create_file(name, 0444, dentry, ++ &per_cpu(wakeup_latency_hist, i), ++ &latency_hist_fops); ++ my_hist = &per_cpu(wakeup_latency_hist, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ ++ entry = debugfs_create_file(name, 0444, dentry_sharedprio, ++ &per_cpu(wakeup_latency_hist_sharedprio, i), ++ &latency_hist_fops); ++ my_hist = &per_cpu(wakeup_latency_hist_sharedprio, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ ++ sprintf(name, cpufmt_maxlatproc, i); ++ ++ mp = &per_cpu(wakeup_maxlatproc, i); ++ entry = debugfs_create_file(name, 0444, dentry, mp, ++ &maxlatproc_fops); ++ clear_maxlatprocdata(mp); ++ ++ mp = &per_cpu(wakeup_maxlatproc_sharedprio, i); ++ entry = debugfs_create_file(name, 0444, dentry_sharedprio, mp, ++ &maxlatproc_fops); ++ clear_maxlatprocdata(mp); ++ } ++ entry = debugfs_create_file("pid", 0644, dentry, ++ (void *)&wakeup_pid, &pid_fops); ++ entry = debugfs_create_file("reset", 0644, dentry, ++ (void *)WAKEUP_LATENCY, &latency_hist_reset_fops); ++ entry = debugfs_create_file("reset", 0644, dentry_sharedprio, ++ (void *)WAKEUP_LATENCY_SHAREDPRIO, &latency_hist_reset_fops); ++ entry = debugfs_create_file("wakeup", 0644, ++ enable_root, (void *)&wakeup_latency_enabled_data, ++ &enable_fops); ++#endif ++ ++#ifdef CONFIG_MISSED_TIMER_OFFSETS_HIST ++ dentry = debugfs_create_dir(missed_timer_offsets_dir, ++ latency_hist_root); ++ for_each_possible_cpu(i) { ++ sprintf(name, cpufmt, i); ++ entry = debugfs_create_file(name, 0444, dentry, ++ &per_cpu(missed_timer_offsets, i), &latency_hist_fops); ++ my_hist = &per_cpu(missed_timer_offsets, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ ++ sprintf(name, cpufmt_maxlatproc, i); ++ mp = &per_cpu(missed_timer_offsets_maxlatproc, i); ++ entry = debugfs_create_file(name, 0444, dentry, mp, ++ &maxlatproc_fops); ++ clear_maxlatprocdata(mp); ++ } ++ entry = debugfs_create_file("pid", 0644, dentry, ++ (void *)&missed_timer_offsets_pid, &pid_fops); ++ entry = debugfs_create_file("reset", 0644, dentry, ++ (void *)MISSED_TIMER_OFFSETS, &latency_hist_reset_fops); ++ entry = debugfs_create_file("missed_timer_offsets", 0644, ++ enable_root, (void *)&missed_timer_offsets_enabled_data, ++ &enable_fops); ++#endif ++ ++#if defined(CONFIG_WAKEUP_LATENCY_HIST) && \ ++ defined(CONFIG_MISSED_TIMER_OFFSETS_HIST) ++ dentry = debugfs_create_dir(timerandwakeup_latency_hist_dir, ++ latency_hist_root); ++ for_each_possible_cpu(i) { ++ sprintf(name, cpufmt, i); ++ entry = debugfs_create_file(name, 0444, dentry, ++ &per_cpu(timerandwakeup_latency_hist, i), ++ &latency_hist_fops); ++ my_hist = &per_cpu(timerandwakeup_latency_hist, i); ++ atomic_set(&my_hist->hist_mode, 1); ++ my_hist->min_lat = LONG_MAX; ++ ++ sprintf(name, cpufmt_maxlatproc, i); ++ mp = &per_cpu(timerandwakeup_maxlatproc, i); ++ entry = debugfs_create_file(name, 0444, dentry, mp, ++ &maxlatproc_fops); ++ clear_maxlatprocdata(mp); ++ } ++ entry = debugfs_create_file("reset", 0644, dentry, ++ (void *)TIMERANDWAKEUP_LATENCY, &latency_hist_reset_fops); ++ entry = debugfs_create_file("timerandwakeup", 0644, ++ enable_root, (void *)&timerandwakeup_enabled_data, ++ &enable_fops); ++#endif ++ return 0; ++} ++ ++device_initcall(latency_hist_init); +diff -Nur linux-4.1.26.orig/kernel/trace/Makefile linux-4.1.26/kernel/trace/Makefile +--- linux-4.1.26.orig/kernel/trace/Makefile 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/Makefile 2016-06-19 15:30:58.715298429 +0200 +@@ -36,6 +36,10 @@ + obj-$(CONFIG_IRQSOFF_TRACER) += trace_irqsoff.o + obj-$(CONFIG_PREEMPT_TRACER) += trace_irqsoff.o + obj-$(CONFIG_SCHED_TRACER) += trace_sched_wakeup.o ++obj-$(CONFIG_INTERRUPT_OFF_HIST) += latency_hist.o ++obj-$(CONFIG_PREEMPT_OFF_HIST) += latency_hist.o ++obj-$(CONFIG_WAKEUP_LATENCY_HIST) += latency_hist.o ++obj-$(CONFIG_MISSED_TIMER_OFFSETS_HIST) += latency_hist.o + obj-$(CONFIG_NOP_TRACER) += trace_nop.o + obj-$(CONFIG_STACK_TRACER) += trace_stack.o + obj-$(CONFIG_MMIOTRACE) += trace_mmiotrace.o +diff -Nur linux-4.1.26.orig/kernel/trace/trace.c linux-4.1.26/kernel/trace/trace.c +--- linux-4.1.26.orig/kernel/trace/trace.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace.c 2016-06-19 15:30:58.715298429 +0200 +@@ -1630,6 +1630,7 @@ + struct task_struct *tsk = current; + + entry->preempt_count = pc & 0xff; ++ entry->preempt_lazy_count = preempt_lazy_count(); + entry->pid = (tsk) ? tsk->pid : 0; + entry->flags = + #ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT +@@ -1639,8 +1640,11 @@ + #endif + ((pc & HARDIRQ_MASK) ? TRACE_FLAG_HARDIRQ : 0) | + ((pc & SOFTIRQ_MASK) ? TRACE_FLAG_SOFTIRQ : 0) | +- (tif_need_resched() ? TRACE_FLAG_NEED_RESCHED : 0) | ++ (tif_need_resched_now() ? TRACE_FLAG_NEED_RESCHED : 0) | ++ (need_resched_lazy() ? TRACE_FLAG_NEED_RESCHED_LAZY : 0) | + (test_preempt_need_resched() ? TRACE_FLAG_PREEMPT_RESCHED : 0); ++ ++ entry->migrate_disable = (tsk) ? __migrate_disabled(tsk) & 0xFF : 0; + } + EXPORT_SYMBOL_GPL(tracing_generic_entry_update); + +@@ -2558,14 +2562,17 @@ + + static void print_lat_help_header(struct seq_file *m) + { +- seq_puts(m, "# _------=> CPU# \n" +- "# / _-----=> irqs-off \n" +- "# | / _----=> need-resched \n" +- "# || / _---=> hardirq/softirq \n" +- "# ||| / _--=> preempt-depth \n" +- "# |||| / delay \n" +- "# cmd pid ||||| time | caller \n" +- "# \\ / ||||| \\ | / \n"); ++ seq_puts(m, "# _--------=> CPU# \n" ++ "# / _-------=> irqs-off \n" ++ "# | / _------=> need-resched \n" ++ "# || / _-----=> need-resched_lazy \n" ++ "# ||| / _----=> hardirq/softirq \n" ++ "# |||| / _---=> preempt-depth \n" ++ "# ||||| / _--=> preempt-lazy-depth\n" ++ "# |||||| / _-=> migrate-disable \n" ++ "# ||||||| / delay \n" ++ "# cmd pid |||||||| time | caller \n" ++ "# \\ / |||||||| \\ | / \n"); + } + + static void print_event_info(struct trace_buffer *buf, struct seq_file *m) +@@ -2591,11 +2598,14 @@ + print_event_info(buf, m); + seq_puts(m, "# _-----=> irqs-off\n" + "# / _----=> need-resched\n" +- "# | / _---=> hardirq/softirq\n" +- "# || / _--=> preempt-depth\n" +- "# ||| / delay\n" +- "# TASK-PID CPU# |||| TIMESTAMP FUNCTION\n" +- "# | | | |||| | |\n"); ++ "# |/ _-----=> need-resched_lazy\n" ++ "# || / _---=> hardirq/softirq\n" ++ "# ||| / _--=> preempt-depth\n" ++ "# |||| /_--=> preempt-lazy-depth\n" ++ "# ||||| _-=> migrate-disable \n" ++ "# ||||| / delay\n" ++ "# TASK-PID CPU# |||||| TIMESTAMP FUNCTION\n" ++ "# | | | |||||| | |\n"); + } + + void +diff -Nur linux-4.1.26.orig/kernel/trace/trace_events.c linux-4.1.26/kernel/trace/trace_events.c +--- linux-4.1.26.orig/kernel/trace/trace_events.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace_events.c 2016-06-19 15:30:58.715298429 +0200 +@@ -162,6 +162,8 @@ + __common_field(unsigned char, flags); + __common_field(unsigned char, preempt_count); + __common_field(int, pid); ++ __common_field(unsigned short, migrate_disable); ++ __common_field(unsigned short, padding); + + return ret; + } +diff -Nur linux-4.1.26.orig/kernel/trace/trace.h linux-4.1.26/kernel/trace/trace.h +--- linux-4.1.26.orig/kernel/trace/trace.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace.h 2016-06-19 15:30:58.715298429 +0200 +@@ -120,6 +120,7 @@ + * NEED_RESCHED - reschedule is requested + * HARDIRQ - inside an interrupt handler + * SOFTIRQ - inside a softirq handler ++ * NEED_RESCHED_LAZY - lazy reschedule is requested + */ + enum trace_flag_type { + TRACE_FLAG_IRQS_OFF = 0x01, +@@ -128,6 +129,7 @@ + TRACE_FLAG_HARDIRQ = 0x08, + TRACE_FLAG_SOFTIRQ = 0x10, + TRACE_FLAG_PREEMPT_RESCHED = 0x20, ++ TRACE_FLAG_NEED_RESCHED_LAZY = 0x40, + }; + + #define TRACE_BUF_SIZE 1024 +diff -Nur linux-4.1.26.orig/kernel/trace/trace_irqsoff.c linux-4.1.26/kernel/trace/trace_irqsoff.c +--- linux-4.1.26.orig/kernel/trace/trace_irqsoff.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace_irqsoff.c 2016-06-19 15:30:58.715298429 +0200 +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + + #include "trace.h" + +@@ -433,11 +434,13 @@ + { + if (preempt_trace() || irq_trace()) + start_critical_timing(CALLER_ADDR0, CALLER_ADDR1); ++ trace_preemptirqsoff_hist_rcuidle(TRACE_START, 1); + } + EXPORT_SYMBOL_GPL(start_critical_timings); + + void stop_critical_timings(void) + { ++ trace_preemptirqsoff_hist_rcuidle(TRACE_STOP, 0); + if (preempt_trace() || irq_trace()) + stop_critical_timing(CALLER_ADDR0, CALLER_ADDR1); + } +@@ -447,6 +450,7 @@ + #ifdef CONFIG_PROVE_LOCKING + void time_hardirqs_on(unsigned long a0, unsigned long a1) + { ++ trace_preemptirqsoff_hist_rcuidle(IRQS_ON, 0); + if (!preempt_trace() && irq_trace()) + stop_critical_timing(a0, a1); + } +@@ -455,6 +459,7 @@ + { + if (!preempt_trace() && irq_trace()) + start_critical_timing(a0, a1); ++ trace_preemptirqsoff_hist_rcuidle(IRQS_OFF, 1); + } + + #else /* !CONFIG_PROVE_LOCKING */ +@@ -480,6 +485,7 @@ + */ + void trace_hardirqs_on(void) + { ++ trace_preemptirqsoff_hist_rcuidle(IRQS_ON, 0); + if (!preempt_trace() && irq_trace()) + stop_critical_timing(CALLER_ADDR0, CALLER_ADDR1); + } +@@ -489,11 +495,13 @@ + { + if (!preempt_trace() && irq_trace()) + start_critical_timing(CALLER_ADDR0, CALLER_ADDR1); ++ trace_preemptirqsoff_hist_rcuidle(IRQS_OFF, 1); + } + EXPORT_SYMBOL(trace_hardirqs_off); + + __visible void trace_hardirqs_on_caller(unsigned long caller_addr) + { ++ trace_preemptirqsoff_hist(IRQS_ON, 0); + if (!preempt_trace() && irq_trace()) + stop_critical_timing(CALLER_ADDR0, caller_addr); + } +@@ -503,6 +511,7 @@ + { + if (!preempt_trace() && irq_trace()) + start_critical_timing(CALLER_ADDR0, caller_addr); ++ trace_preemptirqsoff_hist(IRQS_OFF, 1); + } + EXPORT_SYMBOL(trace_hardirqs_off_caller); + +@@ -512,12 +521,14 @@ + #ifdef CONFIG_PREEMPT_TRACER + void trace_preempt_on(unsigned long a0, unsigned long a1) + { ++ trace_preemptirqsoff_hist(PREEMPT_ON, 0); + if (preempt_trace() && !irq_trace()) + stop_critical_timing(a0, a1); + } + + void trace_preempt_off(unsigned long a0, unsigned long a1) + { ++ trace_preemptirqsoff_hist(PREEMPT_ON, 1); + if (preempt_trace() && !irq_trace()) + start_critical_timing(a0, a1); + } +diff -Nur linux-4.1.26.orig/kernel/trace/trace_output.c linux-4.1.26/kernel/trace/trace_output.c +--- linux-4.1.26.orig/kernel/trace/trace_output.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace_output.c 2016-06-19 15:30:58.715298429 +0200 +@@ -430,6 +430,7 @@ + { + char hardsoft_irq; + char need_resched; ++ char need_resched_lazy; + char irqs_off; + int hardirq; + int softirq; +@@ -457,6 +458,8 @@ + need_resched = '.'; + break; + } ++ need_resched_lazy = ++ (entry->flags & TRACE_FLAG_NEED_RESCHED_LAZY) ? 'L' : '.'; + + hardsoft_irq = + (hardirq && softirq) ? 'H' : +@@ -464,14 +467,25 @@ + softirq ? 's' : + '.'; + +- trace_seq_printf(s, "%c%c%c", +- irqs_off, need_resched, hardsoft_irq); ++ trace_seq_printf(s, "%c%c%c%c", ++ irqs_off, need_resched, need_resched_lazy, ++ hardsoft_irq); + + if (entry->preempt_count) + trace_seq_printf(s, "%x", entry->preempt_count); + else + trace_seq_putc(s, '.'); + ++ if (entry->preempt_lazy_count) ++ trace_seq_printf(s, "%x", entry->preempt_lazy_count); ++ else ++ trace_seq_putc(s, '.'); ++ ++ if (entry->migrate_disable) ++ trace_seq_printf(s, "%x", entry->migrate_disable); ++ else ++ trace_seq_putc(s, '.'); ++ + return !trace_seq_has_overflowed(s); + } + +diff -Nur linux-4.1.26.orig/kernel/trace/trace_sched_switch.c linux-4.1.26/kernel/trace/trace_sched_switch.c +--- linux-4.1.26.orig/kernel/trace/trace_sched_switch.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace_sched_switch.c 2016-06-19 15:30:58.715298429 +0200 +@@ -26,7 +26,7 @@ + } + + static void +-probe_sched_wakeup(void *ignore, struct task_struct *wakee, int success) ++probe_sched_wakeup(void *ignore, struct task_struct *wakee) + { + if (unlikely(!sched_ref)) + return; +diff -Nur linux-4.1.26.orig/kernel/trace/trace_sched_wakeup.c linux-4.1.26/kernel/trace/trace_sched_wakeup.c +--- linux-4.1.26.orig/kernel/trace/trace_sched_wakeup.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/trace/trace_sched_wakeup.c 2016-06-19 15:30:58.719298583 +0200 +@@ -514,7 +514,7 @@ + } + + static void +-probe_wakeup(void *ignore, struct task_struct *p, int success) ++probe_wakeup(void *ignore, struct task_struct *p) + { + struct trace_array_cpu *data; + int cpu = smp_processor_id(); +diff -Nur linux-4.1.26.orig/kernel/user.c linux-4.1.26/kernel/user.c +--- linux-4.1.26.orig/kernel/user.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/user.c 2016-06-19 15:30:58.719298583 +0200 +@@ -161,11 +161,11 @@ + if (!up) + return; + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + if (atomic_dec_and_lock(&up->__count, &uidhash_lock)) + free_user(up, flags); + else +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + + struct user_struct *alloc_uid(kuid_t uid) +diff -Nur linux-4.1.26.orig/kernel/watchdog.c linux-4.1.26/kernel/watchdog.c +--- linux-4.1.26.orig/kernel/watchdog.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/watchdog.c 2016-06-19 15:30:58.719298583 +0200 +@@ -262,6 +262,8 @@ + + #ifdef CONFIG_HARDLOCKUP_DETECTOR + ++static DEFINE_RAW_SPINLOCK(watchdog_output_lock); ++ + static struct perf_event_attr wd_hw_attr = { + .type = PERF_TYPE_HARDWARE, + .config = PERF_COUNT_HW_CPU_CYCLES, +@@ -295,13 +297,21 @@ + /* only print hardlockups once */ + if (__this_cpu_read(hard_watchdog_warn) == true) + return; ++ /* ++ * If early-printk is enabled then make sure we do not ++ * lock up in printk() and kill console logging: ++ */ ++ printk_kill(); + +- if (hardlockup_panic) ++ if (hardlockup_panic) { + panic("Watchdog detected hard LOCKUP on cpu %d", + this_cpu); +- else ++ } else { ++ raw_spin_lock(&watchdog_output_lock); + WARN(1, "Watchdog detected hard LOCKUP on cpu %d", + this_cpu); ++ raw_spin_unlock(&watchdog_output_lock); ++ } + + __this_cpu_write(hard_watchdog_warn, true); + return; +@@ -444,6 +454,7 @@ + /* kick off the timer for the hardlockup detector */ + hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); + hrtimer->function = watchdog_timer_fn; ++ hrtimer->irqsafe = 1; + + /* Enable the perf event */ + watchdog_nmi_enable(cpu); +diff -Nur linux-4.1.26.orig/kernel/workqueue.c linux-4.1.26/kernel/workqueue.c +--- linux-4.1.26.orig/kernel/workqueue.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/workqueue.c 2016-06-19 15:30:58.719298583 +0200 +@@ -48,6 +48,8 @@ + #include + #include + #include ++#include ++#include + + #include "workqueue_internal.h" + +@@ -121,11 +123,16 @@ + * cpu or grabbing pool->lock is enough for read access. If + * POOL_DISASSOCIATED is set, it's identical to L. + * ++ * On RT we need the extra protection via rt_lock_idle_list() for ++ * the list manipulations against read access from ++ * wq_worker_sleeping(). All other places are nicely serialized via ++ * pool->lock. ++ * + * A: pool->attach_mutex protected. + * + * PL: wq_pool_mutex protected. + * +- * PR: wq_pool_mutex protected for writes. Sched-RCU protected for reads. ++ * PR: wq_pool_mutex protected for writes. RCU protected for reads. + * + * PW: wq_pool_mutex and wq->mutex protected for writes. Either for reads. + * +@@ -134,7 +141,7 @@ + * + * WQ: wq->mutex protected. + * +- * WR: wq->mutex protected for writes. Sched-RCU protected for reads. ++ * WR: wq->mutex protected for writes. RCU protected for reads. + * + * MD: wq_mayday_lock protected. + */ +@@ -183,7 +190,7 @@ + atomic_t nr_running ____cacheline_aligned_in_smp; + + /* +- * Destruction of pool is sched-RCU protected to allow dereferences ++ * Destruction of pool is RCU protected to allow dereferences + * from get_work_pool(). + */ + struct rcu_head rcu; +@@ -212,7 +219,7 @@ + /* + * Release of unbound pwq is punted to system_wq. See put_pwq() + * and pwq_unbound_release_workfn() for details. pool_workqueue +- * itself is also sched-RCU protected so that the first pwq can be ++ * itself is also RCU protected so that the first pwq can be + * determined without grabbing wq->mutex. + */ + struct work_struct unbound_release_work; +@@ -334,6 +341,8 @@ + struct workqueue_struct *system_freezable_power_efficient_wq __read_mostly; + EXPORT_SYMBOL_GPL(system_freezable_power_efficient_wq); + ++static DEFINE_LOCAL_IRQ_LOCK(pendingb_lock); ++ + static int worker_thread(void *__worker); + static void copy_workqueue_attrs(struct workqueue_attrs *to, + const struct workqueue_attrs *from); +@@ -343,14 +352,14 @@ + #include + + #define assert_rcu_or_pool_mutex() \ +- rcu_lockdep_assert(rcu_read_lock_sched_held() || \ ++ rcu_lockdep_assert(rcu_read_lock_held() || \ + lockdep_is_held(&wq_pool_mutex), \ +- "sched RCU or wq_pool_mutex should be held") ++ "RCU or wq_pool_mutex should be held") + + #define assert_rcu_or_wq_mutex(wq) \ +- rcu_lockdep_assert(rcu_read_lock_sched_held() || \ ++ rcu_lockdep_assert(rcu_read_lock_held() || \ + lockdep_is_held(&wq->mutex), \ +- "sched RCU or wq->mutex should be held") ++ "RCU or wq->mutex should be held") + + #define assert_rcu_or_wq_mutex_or_pool_mutex(wq) \ + rcu_lockdep_assert(rcu_read_lock_sched_held() || \ +@@ -368,7 +377,7 @@ + * @pool: iteration cursor + * @pi: integer used for iteration + * +- * This must be called either with wq_pool_mutex held or sched RCU read ++ * This must be called either with wq_pool_mutex held or RCU read + * locked. If the pool needs to be used beyond the locking in effect, the + * caller is responsible for guaranteeing that the pool stays online. + * +@@ -400,7 +409,7 @@ + * @pwq: iteration cursor + * @wq: the target workqueue + * +- * This must be called either with wq->mutex held or sched RCU read locked. ++ * This must be called either with wq->mutex held or RCU read locked. + * If the pwq needs to be used beyond the locking in effect, the caller is + * responsible for guaranteeing that the pwq stays online. + * +@@ -412,6 +421,31 @@ + if (({ assert_rcu_or_wq_mutex(wq); false; })) { } \ + else + ++#ifdef CONFIG_PREEMPT_RT_BASE ++static inline void rt_lock_idle_list(struct worker_pool *pool) ++{ ++ preempt_disable(); ++} ++static inline void rt_unlock_idle_list(struct worker_pool *pool) ++{ ++ preempt_enable(); ++} ++static inline void sched_lock_idle_list(struct worker_pool *pool) { } ++static inline void sched_unlock_idle_list(struct worker_pool *pool) { } ++#else ++static inline void rt_lock_idle_list(struct worker_pool *pool) { } ++static inline void rt_unlock_idle_list(struct worker_pool *pool) { } ++static inline void sched_lock_idle_list(struct worker_pool *pool) ++{ ++ spin_lock_irq(&pool->lock); ++} ++static inline void sched_unlock_idle_list(struct worker_pool *pool) ++{ ++ spin_unlock_irq(&pool->lock); ++} ++#endif ++ ++ + #ifdef CONFIG_DEBUG_OBJECTS_WORK + + static struct debug_obj_descr work_debug_descr; +@@ -562,8 +596,7 @@ + * @wq: the target workqueue + * @node: the node ID + * +- * This must be called with any of wq_pool_mutex, wq->mutex or sched RCU +- * read locked. ++ * This must be called with any of wq_pool_mutex, wq->mutex or RCU read locked. + * If the pwq needs to be used beyond the locking in effect, the caller is + * responsible for guaranteeing that the pwq stays online. + * +@@ -706,8 +739,8 @@ + * @work: the work item of interest + * + * Pools are created and destroyed under wq_pool_mutex, and allows read +- * access under sched-RCU read lock. As such, this function should be +- * called under wq_pool_mutex or with preemption disabled. ++ * access under RCU read lock. As such, this function should be ++ * called under wq_pool_mutex or inside of a rcu_read_lock() region. + * + * All fields of the returned pool are accessible as long as the above + * mentioned locking is in effect. If the returned pool needs to be used +@@ -844,51 +877,44 @@ + */ + static void wake_up_worker(struct worker_pool *pool) + { +- struct worker *worker = first_idle_worker(pool); ++ struct worker *worker; ++ ++ rt_lock_idle_list(pool); ++ ++ worker = first_idle_worker(pool); + + if (likely(worker)) + wake_up_process(worker->task); ++ ++ rt_unlock_idle_list(pool); + } + + /** +- * wq_worker_waking_up - a worker is waking up +- * @task: task waking up +- * @cpu: CPU @task is waking up to +- * +- * This function is called during try_to_wake_up() when a worker is +- * being awoken. ++ * wq_worker_running - a worker is running again ++ * @task: task returning from sleep + * +- * CONTEXT: +- * spin_lock_irq(rq->lock) ++ * This function is called when a worker returns from schedule() + */ +-void wq_worker_waking_up(struct task_struct *task, int cpu) ++void wq_worker_running(struct task_struct *task) + { + struct worker *worker = kthread_data(task); + +- if (!(worker->flags & WORKER_NOT_RUNNING)) { +- WARN_ON_ONCE(worker->pool->cpu != cpu); ++ if (!worker->sleeping) ++ return; ++ if (!(worker->flags & WORKER_NOT_RUNNING)) + atomic_inc(&worker->pool->nr_running); +- } ++ worker->sleeping = 0; + } + + /** + * wq_worker_sleeping - a worker is going to sleep + * @task: task going to sleep +- * @cpu: CPU in question, must be the current CPU number +- * +- * This function is called during schedule() when a busy worker is +- * going to sleep. Worker on the same cpu can be woken up by +- * returning pointer to its task. +- * +- * CONTEXT: +- * spin_lock_irq(rq->lock) +- * +- * Return: +- * Worker task on @cpu to wake up, %NULL if none. ++ * This function is called from schedule() when a busy worker is ++ * going to sleep. + */ +-struct task_struct *wq_worker_sleeping(struct task_struct *task, int cpu) ++void wq_worker_sleeping(struct task_struct *task) + { +- struct worker *worker = kthread_data(task), *to_wakeup = NULL; ++ struct worker *worker = kthread_data(task); + struct worker_pool *pool; + + /* +@@ -897,29 +923,26 @@ + * checking NOT_RUNNING. + */ + if (worker->flags & WORKER_NOT_RUNNING) +- return NULL; ++ return; + + pool = worker->pool; + +- /* this can only happen on the local cpu */ +- if (WARN_ON_ONCE(cpu != raw_smp_processor_id() || pool->cpu != cpu)) +- return NULL; ++ if (WARN_ON_ONCE(worker->sleeping)) ++ return; ++ ++ worker->sleeping = 1; + + /* + * The counterpart of the following dec_and_test, implied mb, + * worklist not empty test sequence is in insert_work(). + * Please read comment there. +- * +- * NOT_RUNNING is clear. This means that we're bound to and +- * running on the local cpu w/ rq lock held and preemption +- * disabled, which in turn means that none else could be +- * manipulating idle_list, so dereferencing idle_list without pool +- * lock is safe. + */ + if (atomic_dec_and_test(&pool->nr_running) && +- !list_empty(&pool->worklist)) +- to_wakeup = first_idle_worker(pool); +- return to_wakeup ? to_wakeup->task : NULL; ++ !list_empty(&pool->worklist)) { ++ sched_lock_idle_list(pool); ++ wake_up_worker(pool); ++ sched_unlock_idle_list(pool); ++ } + } + + /** +@@ -1113,12 +1136,12 @@ + { + if (pwq) { + /* +- * As both pwqs and pools are sched-RCU protected, the ++ * As both pwqs and pools are RCU protected, the + * following lock operations are safe. + */ +- spin_lock_irq(&pwq->pool->lock); ++ local_spin_lock_irq(pendingb_lock, &pwq->pool->lock); + put_pwq(pwq); +- spin_unlock_irq(&pwq->pool->lock); ++ local_spin_unlock_irq(pendingb_lock, &pwq->pool->lock); + } + } + +@@ -1220,7 +1243,7 @@ + struct worker_pool *pool; + struct pool_workqueue *pwq; + +- local_irq_save(*flags); ++ local_lock_irqsave(pendingb_lock, *flags); + + /* try to steal the timer if it exists */ + if (is_dwork) { +@@ -1239,6 +1262,7 @@ + if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) + return 0; + ++ rcu_read_lock(); + /* + * The queueing is in progress, or it is already queued. Try to + * steal it from ->worklist without clearing WORK_STRUCT_PENDING. +@@ -1277,14 +1301,16 @@ + set_work_pool_and_keep_pending(work, pool->id); + + spin_unlock(&pool->lock); ++ rcu_read_unlock(); + return 1; + } + spin_unlock(&pool->lock); + fail: +- local_irq_restore(*flags); ++ rcu_read_unlock(); ++ local_unlock_irqrestore(pendingb_lock, *flags); + if (work_is_canceling(work)) + return -ENOENT; +- cpu_relax(); ++ cpu_chill(); + return -EAGAIN; + } + +@@ -1353,7 +1379,7 @@ + * queued or lose PENDING. Grabbing PENDING and queueing should + * happen with IRQ disabled. + */ +- WARN_ON_ONCE(!irqs_disabled()); ++ WARN_ON_ONCE_NONRT(!irqs_disabled()); + + debug_work_activate(work); + +@@ -1361,6 +1387,8 @@ + if (unlikely(wq->flags & __WQ_DRAINING) && + WARN_ON_ONCE(!is_chained_work(wq))) + return; ++ ++ rcu_read_lock(); + retry: + if (req_cpu == WORK_CPU_UNBOUND) + cpu = raw_smp_processor_id(); +@@ -1417,10 +1445,8 @@ + /* pwq determined, queue */ + trace_workqueue_queue_work(req_cpu, pwq, work); + +- if (WARN_ON(!list_empty(&work->entry))) { +- spin_unlock(&pwq->pool->lock); +- return; +- } ++ if (WARN_ON(!list_empty(&work->entry))) ++ goto out; + + pwq->nr_in_flight[pwq->work_color]++; + work_flags = work_color_to_flags(pwq->work_color); +@@ -1436,7 +1462,9 @@ + + insert_work(pwq, work, worklist, work_flags); + ++out: + spin_unlock(&pwq->pool->lock); ++ rcu_read_unlock(); + } + + /** +@@ -1456,14 +1484,14 @@ + bool ret = false; + unsigned long flags; + +- local_irq_save(flags); ++ local_lock_irqsave(pendingb_lock,flags); + + if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) { + __queue_work(cpu, wq, work); + ret = true; + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + return ret; + } + EXPORT_SYMBOL(queue_work_on); +@@ -1530,14 +1558,14 @@ + unsigned long flags; + + /* read the comment in __queue_work() */ +- local_irq_save(flags); ++ local_lock_irqsave(pendingb_lock, flags); + + if (!test_and_set_bit(WORK_STRUCT_PENDING_BIT, work_data_bits(work))) { + __queue_delayed_work(cpu, wq, dwork, delay); + ret = true; + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + return ret; + } + EXPORT_SYMBOL(queue_delayed_work_on); +@@ -1572,7 +1600,7 @@ + + if (likely(ret >= 0)) { + __queue_delayed_work(cpu, wq, dwork, delay); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + } + + /* -ENOENT from try_to_grab_pending() becomes %true */ +@@ -1605,7 +1633,9 @@ + worker->last_active = jiffies; + + /* idle_list is LIFO */ ++ rt_lock_idle_list(pool); + list_add(&worker->entry, &pool->idle_list); ++ rt_unlock_idle_list(pool); + + if (too_many_workers(pool) && !timer_pending(&pool->idle_timer)) + mod_timer(&pool->idle_timer, jiffies + IDLE_WORKER_TIMEOUT); +@@ -1638,7 +1668,9 @@ + return; + worker_clr_flags(worker, WORKER_IDLE); + pool->nr_idle--; ++ rt_lock_idle_list(pool); + list_del_init(&worker->entry); ++ rt_unlock_idle_list(pool); + } + + static struct worker *alloc_worker(int node) +@@ -1806,7 +1838,9 @@ + pool->nr_workers--; + pool->nr_idle--; + ++ rt_lock_idle_list(pool); + list_del_init(&worker->entry); ++ rt_unlock_idle_list(pool); + worker->flags |= WORKER_DIE; + wake_up_process(worker->task); + } +@@ -2723,14 +2757,14 @@ + + might_sleep(); + +- local_irq_disable(); ++ rcu_read_lock(); + pool = get_work_pool(work); + if (!pool) { +- local_irq_enable(); ++ rcu_read_unlock(); + return false; + } + +- spin_lock(&pool->lock); ++ spin_lock_irq(&pool->lock); + /* see the comment in try_to_grab_pending() with the same code */ + pwq = get_work_pwq(work); + if (pwq) { +@@ -2757,10 +2791,11 @@ + else + lock_map_acquire_read(&pwq->wq->lockdep_map); + lock_map_release(&pwq->wq->lockdep_map); +- ++ rcu_read_unlock(); + return true; + already_gone: + spin_unlock_irq(&pool->lock); ++ rcu_read_unlock(); + return false; + } + +@@ -2847,7 +2882,7 @@ + + /* tell other tasks trying to grab @work to back off */ + mark_work_canceling(work); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + + flush_work(work); + clear_work_data(work); +@@ -2902,10 +2937,10 @@ + */ + bool flush_delayed_work(struct delayed_work *dwork) + { +- local_irq_disable(); ++ local_lock_irq(pendingb_lock); + if (del_timer_sync(&dwork->timer)) + __queue_work(dwork->cpu, dwork->wq, &dwork->work); +- local_irq_enable(); ++ local_unlock_irq(pendingb_lock); + return flush_work(&dwork->work); + } + EXPORT_SYMBOL(flush_delayed_work); +@@ -2940,7 +2975,7 @@ + + set_work_pool_and_clear_pending(&dwork->work, + get_work_pool_id(&dwork->work)); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pendingb_lock, flags); + return ret; + } + EXPORT_SYMBOL(cancel_delayed_work); +@@ -3198,7 +3233,7 @@ + * put_unbound_pool - put a worker_pool + * @pool: worker_pool to put + * +- * Put @pool. If its refcnt reaches zero, it gets destroyed in sched-RCU ++ * Put @pool. If its refcnt reaches zero, it gets destroyed in RCU + * safe manner. get_unbound_pool() calls this function on its failure path + * and this function should be able to release pools which went through, + * successfully or not, init_worker_pool(). +@@ -3252,8 +3287,8 @@ + del_timer_sync(&pool->idle_timer); + del_timer_sync(&pool->mayday_timer); + +- /* sched-RCU protected to allow dereferences from get_work_pool() */ +- call_rcu_sched(&pool->rcu, rcu_free_pool); ++ /* RCU protected to allow dereferences from get_work_pool() */ ++ call_rcu(&pool->rcu, rcu_free_pool); + } + + /** +@@ -3358,14 +3393,14 @@ + put_unbound_pool(pool); + mutex_unlock(&wq_pool_mutex); + +- call_rcu_sched(&pwq->rcu, rcu_free_pwq); ++ call_rcu(&pwq->rcu, rcu_free_pwq); + + /* + * If we're the last pwq going away, @wq is already dead and no one + * is gonna access it anymore. Schedule RCU free. + */ + if (is_last) +- call_rcu_sched(&wq->rcu, rcu_free_wq); ++ call_rcu(&wq->rcu, rcu_free_wq); + } + + /** +@@ -4003,7 +4038,7 @@ + * The base ref is never dropped on per-cpu pwqs. Directly + * schedule RCU free. + */ +- call_rcu_sched(&wq->rcu, rcu_free_wq); ++ call_rcu(&wq->rcu, rcu_free_wq); + } else { + /* + * We're the sole accessor of @wq at this point. Directly +@@ -4096,7 +4131,8 @@ + struct pool_workqueue *pwq; + bool ret; + +- rcu_read_lock_sched(); ++ rcu_read_lock(); ++ preempt_disable(); + + if (cpu == WORK_CPU_UNBOUND) + cpu = smp_processor_id(); +@@ -4107,7 +4143,8 @@ + pwq = unbound_pwq_by_node(wq, cpu_to_node(cpu)); + + ret = !list_empty(&pwq->delayed_works); +- rcu_read_unlock_sched(); ++ preempt_enable(); ++ rcu_read_unlock(); + + return ret; + } +@@ -4133,15 +4170,15 @@ + if (work_pending(work)) + ret |= WORK_BUSY_PENDING; + +- local_irq_save(flags); ++ rcu_read_lock(); + pool = get_work_pool(work); + if (pool) { +- spin_lock(&pool->lock); ++ spin_lock_irqsave(&pool->lock, flags); + if (find_worker_executing_work(pool, work)) + ret |= WORK_BUSY_RUNNING; +- spin_unlock(&pool->lock); ++ spin_unlock_irqrestore(&pool->lock, flags); + } +- local_irq_restore(flags); ++ rcu_read_unlock(); + + return ret; + } +@@ -4330,7 +4367,7 @@ + unsigned long flags; + int pi; + +- rcu_read_lock_sched(); ++ rcu_read_lock(); + + pr_info("Showing busy workqueues and worker pools:\n"); + +@@ -4381,7 +4418,7 @@ + spin_unlock_irqrestore(&pool->lock, flags); + } + +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); + } + + /* +@@ -4742,16 +4779,16 @@ + * nr_active is monotonically decreasing. It's safe + * to peek without lock. + */ +- rcu_read_lock_sched(); ++ rcu_read_lock(); + for_each_pwq(pwq, wq) { + WARN_ON_ONCE(pwq->nr_active < 0); + if (pwq->nr_active) { + busy = true; +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); + goto out_unlock; + } + } +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); + } + out_unlock: + mutex_unlock(&wq_pool_mutex); +@@ -4865,7 +4902,8 @@ + const char *delim = ""; + int node, written = 0; + +- rcu_read_lock_sched(); ++ get_online_cpus(); ++ rcu_read_lock(); + for_each_node(node) { + written += scnprintf(buf + written, PAGE_SIZE - written, + "%s%d:%d", delim, node, +@@ -4873,7 +4911,8 @@ + delim = " "; + } + written += scnprintf(buf + written, PAGE_SIZE - written, "\n"); +- rcu_read_unlock_sched(); ++ rcu_read_unlock(); ++ put_online_cpus(); + + return written; + } +diff -Nur linux-4.1.26.orig/kernel/workqueue_internal.h linux-4.1.26/kernel/workqueue_internal.h +--- linux-4.1.26.orig/kernel/workqueue_internal.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/kernel/workqueue_internal.h 2016-06-19 15:30:58.719298583 +0200 +@@ -43,6 +43,7 @@ + unsigned long last_active; /* L: last active timestamp */ + unsigned int flags; /* X: flags */ + int id; /* I: worker id */ ++ int sleeping; /* None */ + + /* + * Opaque string set with work_set_desc(). Printed out with task +@@ -68,7 +69,7 @@ + * Scheduler hooks for concurrency managed workqueue. Only to be used from + * sched/core.c and workqueue.c. + */ +-void wq_worker_waking_up(struct task_struct *task, int cpu); +-struct task_struct *wq_worker_sleeping(struct task_struct *task, int cpu); ++void wq_worker_running(struct task_struct *task); ++void wq_worker_sleeping(struct task_struct *task); + + #endif /* _KERNEL_WORKQUEUE_INTERNAL_H */ +diff -Nur linux-4.1.26.orig/lib/debugobjects.c linux-4.1.26/lib/debugobjects.c +--- linux-4.1.26.orig/lib/debugobjects.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/debugobjects.c 2016-06-19 15:30:58.719298583 +0200 +@@ -309,7 +309,10 @@ + struct debug_obj *obj; + unsigned long flags; + +- fill_pool(); ++#ifdef CONFIG_PREEMPT_RT_FULL ++ if (preempt_count() == 0 && !irqs_disabled()) ++#endif ++ fill_pool(); + + db = get_bucket((unsigned long) addr); + +diff -Nur linux-4.1.26.orig/lib/dump_stack.c linux-4.1.26/lib/dump_stack.c +--- linux-4.1.26.orig/lib/dump_stack.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/dump_stack.c 2016-06-19 15:30:58.719298583 +0200 +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + + static void __dump_stack(void) + { +diff -Nur linux-4.1.26.orig/lib/idr.c linux-4.1.26/lib/idr.c +--- linux-4.1.26.orig/lib/idr.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/idr.c 2016-06-19 15:30:58.723298738 +0200 +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #define MAX_IDR_SHIFT (sizeof(int) * 8 - 1) + #define MAX_IDR_BIT (1U << MAX_IDR_SHIFT) +@@ -366,6 +367,35 @@ + idr_mark_full(pa, id); + } + ++#ifdef CONFIG_PREEMPT_RT_FULL ++static DEFINE_LOCAL_IRQ_LOCK(idr_lock); ++ ++static inline void idr_preload_lock(void) ++{ ++ local_lock(idr_lock); ++} ++ ++static inline void idr_preload_unlock(void) ++{ ++ local_unlock(idr_lock); ++} ++ ++void idr_preload_end(void) ++{ ++ idr_preload_unlock(); ++} ++EXPORT_SYMBOL(idr_preload_end); ++#else ++static inline void idr_preload_lock(void) ++{ ++ preempt_disable(); ++} ++ ++static inline void idr_preload_unlock(void) ++{ ++ preempt_enable(); ++} ++#endif + + /** + * idr_preload - preload for idr_alloc() +@@ -401,7 +431,7 @@ + WARN_ON_ONCE(in_interrupt()); + might_sleep_if(gfp_mask & __GFP_WAIT); + +- preempt_disable(); ++ idr_preload_lock(); + + /* + * idr_alloc() is likely to succeed w/o full idr_layer buffer and +@@ -413,9 +443,9 @@ + while (__this_cpu_read(idr_preload_cnt) < MAX_IDR_FREE) { + struct idr_layer *new; + +- preempt_enable(); ++ idr_preload_unlock(); + new = kmem_cache_zalloc(idr_layer_cache, gfp_mask); +- preempt_disable(); ++ idr_preload_lock(); + if (!new) + break; + +diff -Nur linux-4.1.26.orig/lib/Kconfig linux-4.1.26/lib/Kconfig +--- linux-4.1.26.orig/lib/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/Kconfig 2016-06-19 15:30:58.719298583 +0200 +@@ -391,6 +391,7 @@ + + config CPUMASK_OFFSTACK + bool "Force CPU masks off stack" if DEBUG_PER_CPU_MAPS ++ depends on !PREEMPT_RT_FULL + help + Use dynamic allocation for cpumask_var_t, instead of putting + them on the stack. This is a bit more expensive, but avoids +diff -Nur linux-4.1.26.orig/lib/locking-selftest.c linux-4.1.26/lib/locking-selftest.c +--- linux-4.1.26.orig/lib/locking-selftest.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/locking-selftest.c 2016-06-19 15:30:58.723298738 +0200 +@@ -590,6 +590,8 @@ + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_hard_rlock) + +@@ -605,9 +607,12 @@ + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe1_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Enabling hardirqs with a softirq-safe lock held: + */ +@@ -640,6 +645,8 @@ + #undef E1 + #undef E2 + ++#endif ++ + /* + * Enabling irqs with an irq-safe lock held: + */ +@@ -663,6 +670,8 @@ + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_hard_rlock) + +@@ -678,6 +687,8 @@ + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_2_EVENTS(irqsafe2B_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + +@@ -709,6 +720,8 @@ + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_hard_rlock) + +@@ -724,6 +737,8 @@ + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe3_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + #undef E3 +@@ -757,6 +772,8 @@ + #include "locking-selftest-spin-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_spin) + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + #include "locking-selftest-rlock-hardirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_hard_rlock) + +@@ -772,10 +789,14 @@ + #include "locking-selftest-wlock-softirq.h" + GENERATE_PERMUTATIONS_3_EVENTS(irqsafe4_soft_wlock) + ++#endif ++ + #undef E1 + #undef E2 + #undef E3 + ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + /* + * read-lock / write-lock irq inversion. + * +@@ -838,6 +859,10 @@ + #undef E2 + #undef E3 + ++#endif ++ ++#ifndef CONFIG_PREEMPT_RT_FULL ++ + /* + * read-lock / write-lock recursion that is actually safe. + */ +@@ -876,6 +901,8 @@ + #undef E2 + #undef E3 + ++#endif ++ + /* + * read-lock / write-lock recursion that is unsafe. + */ +@@ -1858,6 +1885,7 @@ + + printk(" --------------------------------------------------------------------------\n"); + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * irq-context testcases: + */ +@@ -1870,6 +1898,28 @@ + + DO_TESTCASE_6x2("irq read-recursion", irq_read_recursion); + // DO_TESTCASE_6x2B("irq read-recursion #2", irq_read_recursion2); ++#else ++ /* On -rt, we only do hardirq context test for raw spinlock */ ++ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 12); ++ DO_TESTCASE_1B("hard-irqs-on + irq-safe-A", irqsafe1_hard_spin, 21); ++ ++ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 12); ++ DO_TESTCASE_1B("hard-safe-A + irqs-on", irqsafe2B_hard_spin, 21); ++ ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 123); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 132); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 213); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 231); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 312); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #1", irqsafe3_hard_spin, 321); ++ ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 123); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 132); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 213); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 231); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 312); ++ DO_TESTCASE_1B("hard-safe-A + unsafe-B #2", irqsafe4_hard_spin, 321); ++#endif + + ww_tests(); + +diff -Nur linux-4.1.26.orig/lib/percpu_ida.c linux-4.1.26/lib/percpu_ida.c +--- linux-4.1.26.orig/lib/percpu_ida.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/percpu_ida.c 2016-06-19 15:30:58.723298738 +0200 +@@ -26,6 +26,9 @@ + #include + #include + #include ++#include ++ ++static DEFINE_LOCAL_IRQ_LOCK(irq_off_lock); + + struct percpu_ida_cpu { + /* +@@ -148,13 +151,13 @@ + unsigned long flags; + int tag; + +- local_irq_save(flags); ++ local_lock_irqsave(irq_off_lock, flags); + tags = this_cpu_ptr(pool->tag_cpu); + + /* Fastpath */ + tag = alloc_local_tag(tags); + if (likely(tag >= 0)) { +- local_irq_restore(flags); ++ local_unlock_irqrestore(irq_off_lock, flags); + return tag; + } + +@@ -173,6 +176,7 @@ + + if (!tags->nr_free) + alloc_global_tags(pool, tags); ++ + if (!tags->nr_free) + steal_tags(pool, tags); + +@@ -184,7 +188,7 @@ + } + + spin_unlock(&pool->lock); +- local_irq_restore(flags); ++ local_unlock_irqrestore(irq_off_lock, flags); + + if (tag >= 0 || state == TASK_RUNNING) + break; +@@ -196,7 +200,7 @@ + + schedule(); + +- local_irq_save(flags); ++ local_lock_irqsave(irq_off_lock, flags); + tags = this_cpu_ptr(pool->tag_cpu); + } + if (state != TASK_RUNNING) +@@ -221,7 +225,7 @@ + + BUG_ON(tag >= pool->nr_tags); + +- local_irq_save(flags); ++ local_lock_irqsave(irq_off_lock, flags); + tags = this_cpu_ptr(pool->tag_cpu); + + spin_lock(&tags->lock); +@@ -253,7 +257,7 @@ + spin_unlock(&pool->lock); + } + +- local_irq_restore(flags); ++ local_unlock_irqrestore(irq_off_lock, flags); + } + EXPORT_SYMBOL_GPL(percpu_ida_free); + +@@ -345,7 +349,7 @@ + struct percpu_ida_cpu *remote; + unsigned cpu, i, err = 0; + +- local_irq_save(flags); ++ local_lock_irqsave(irq_off_lock, flags); + for_each_possible_cpu(cpu) { + remote = per_cpu_ptr(pool->tag_cpu, cpu); + spin_lock(&remote->lock); +@@ -367,7 +371,7 @@ + } + spin_unlock(&pool->lock); + out: +- local_irq_restore(flags); ++ local_unlock_irqrestore(irq_off_lock, flags); + return err; + } + EXPORT_SYMBOL_GPL(percpu_ida_for_each_free); +diff -Nur linux-4.1.26.orig/lib/radix-tree.c linux-4.1.26/lib/radix-tree.c +--- linux-4.1.26.orig/lib/radix-tree.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/radix-tree.c 2016-06-19 15:30:58.723298738 +0200 +@@ -195,12 +195,13 @@ + * succeed in getting a node here (and never reach + * kmem_cache_alloc) + */ +- rtp = this_cpu_ptr(&radix_tree_preloads); ++ rtp = &get_cpu_var(radix_tree_preloads); + if (rtp->nr) { + ret = rtp->nodes[rtp->nr - 1]; + rtp->nodes[rtp->nr - 1] = NULL; + rtp->nr--; + } ++ put_cpu_var(radix_tree_preloads); + /* + * Update the allocation stack trace as this is more useful + * for debugging. +@@ -240,6 +241,7 @@ + call_rcu(&node->rcu_head, radix_tree_node_rcu_free); + } + ++#ifndef CONFIG_PREEMPT_RT_FULL + /* + * Load up this CPU's radix_tree_node buffer with sufficient objects to + * ensure that the addition of a single element in the tree cannot fail. On +@@ -305,6 +307,7 @@ + return 0; + } + EXPORT_SYMBOL(radix_tree_maybe_preload); ++#endif + + /* + * Return the maximum key which can be store into a +diff -Nur linux-4.1.26.orig/lib/scatterlist.c linux-4.1.26/lib/scatterlist.c +--- linux-4.1.26.orig/lib/scatterlist.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/scatterlist.c 2016-06-19 15:30:58.723298738 +0200 +@@ -592,7 +592,7 @@ + flush_kernel_dcache_page(miter->page); + + if (miter->__flags & SG_MITER_ATOMIC) { +- WARN_ON_ONCE(preemptible()); ++ WARN_ON_ONCE(!pagefault_disabled()); + kunmap_atomic(miter->addr); + } else + kunmap(miter->page); +@@ -637,7 +637,7 @@ + if (!sg_miter_skip(&miter, skip)) + return false; + +- local_irq_save(flags); ++ local_irq_save_nort(flags); + + while (sg_miter_next(&miter) && offset < buflen) { + unsigned int len; +@@ -654,7 +654,7 @@ + + sg_miter_stop(&miter); + +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + return offset; + } + +diff -Nur linux-4.1.26.orig/lib/smp_processor_id.c linux-4.1.26/lib/smp_processor_id.c +--- linux-4.1.26.orig/lib/smp_processor_id.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/smp_processor_id.c 2016-06-19 15:30:58.723298738 +0200 +@@ -39,8 +39,9 @@ + if (!printk_ratelimit()) + goto out_enable; + +- printk(KERN_ERR "BUG: using %s%s() in preemptible [%08x] code: %s/%d\n", +- what1, what2, preempt_count() - 1, current->comm, current->pid); ++ printk(KERN_ERR "BUG: using %s%s() in preemptible [%08x %08x] code: %s/%d\n", ++ what1, what2, preempt_count() - 1, __migrate_disabled(current), ++ current->comm, current->pid); + + print_symbol("caller is %s\n", (long)__builtin_return_address(0)); + dump_stack(); +diff -Nur linux-4.1.26.orig/lib/strnlen_user.c linux-4.1.26/lib/strnlen_user.c +--- linux-4.1.26.orig/lib/strnlen_user.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/lib/strnlen_user.c 2016-06-19 15:30:58.723298738 +0200 +@@ -85,7 +85,8 @@ + * @str: The string to measure. + * @count: Maximum count (including NUL character) + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Get the size of a NUL-terminated string in user space. + * +@@ -121,7 +122,8 @@ + * strlen_user: - Get the size of a user string INCLUDING final NUL. + * @str: The string to measure. + * +- * Context: User context only. This function may sleep. ++ * Context: User context only. This function may sleep if pagefaults are ++ * enabled. + * + * Get the size of a NUL-terminated string in user space. + * +diff -Nur linux-4.1.26.orig/mm/compaction.c linux-4.1.26/mm/compaction.c +--- linux-4.1.26.orig/mm/compaction.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/compaction.c 2016-06-19 15:30:58.823302594 +0200 +@@ -1398,10 +1398,12 @@ + cc->migrate_pfn & ~((1UL << cc->order) - 1); + + if (last_migrated_pfn < current_block_start) { +- cpu = get_cpu(); ++ cpu = get_cpu_light(); ++ local_lock_irq(swapvec_lock); + lru_add_drain_cpu(cpu); ++ local_unlock_irq(swapvec_lock); + drain_local_pages(zone); +- put_cpu(); ++ put_cpu_light(); + /* No more flushing until we migrate again */ + last_migrated_pfn = 0; + } +diff -Nur linux-4.1.26.orig/mm/filemap.c linux-4.1.26/mm/filemap.c +--- linux-4.1.26.orig/mm/filemap.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/filemap.c 2016-06-19 15:30:58.823302594 +0200 +@@ -167,7 +167,9 @@ + if (!workingset_node_pages(node) && + list_empty(&node->private_list)) { + node->private_data = mapping; +- list_lru_add(&workingset_shadow_nodes, &node->private_list); ++ local_lock(workingset_shadow_lock); ++ list_lru_add(&__workingset_shadow_nodes, &node->private_list); ++ local_unlock(workingset_shadow_lock); + } + } + +@@ -533,9 +535,12 @@ + * node->private_list is protected by + * mapping->tree_lock. + */ +- if (!list_empty(&node->private_list)) +- list_lru_del(&workingset_shadow_nodes, ++ if (!list_empty(&node->private_list)) { ++ local_lock(workingset_shadow_lock); ++ list_lru_del(&__workingset_shadow_nodes, + &node->private_list); ++ local_unlock(workingset_shadow_lock); ++ } + } + return 0; + } +diff -Nur linux-4.1.26.orig/mm/highmem.c linux-4.1.26/mm/highmem.c +--- linux-4.1.26.orig/mm/highmem.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/highmem.c 2016-06-19 15:30:58.823302594 +0200 +@@ -29,10 +29,11 @@ + #include + #include + +- ++#ifndef CONFIG_PREEMPT_RT_FULL + #if defined(CONFIG_HIGHMEM) || defined(CONFIG_X86_32) + DEFINE_PER_CPU(int, __kmap_atomic_idx); + #endif ++#endif + + /* + * Virtual_count is not a pure "count". +@@ -107,8 +108,9 @@ + unsigned long totalhigh_pages __read_mostly; + EXPORT_SYMBOL(totalhigh_pages); + +- ++#ifndef CONFIG_PREEMPT_RT_FULL + EXPORT_PER_CPU_SYMBOL(__kmap_atomic_idx); ++#endif + + unsigned int nr_free_highpages (void) + { +diff -Nur linux-4.1.26.orig/mm/Kconfig linux-4.1.26/mm/Kconfig +--- linux-4.1.26.orig/mm/Kconfig 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/Kconfig 2016-06-19 15:30:58.823302594 +0200 +@@ -409,7 +409,7 @@ + + config TRANSPARENT_HUGEPAGE + bool "Transparent Hugepage Support" +- depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE ++ depends on HAVE_ARCH_TRANSPARENT_HUGEPAGE && !PREEMPT_RT_FULL + select COMPACTION + help + Transparent Hugepages allows the kernel to use huge pages and +diff -Nur linux-4.1.26.orig/mm/memcontrol.c linux-4.1.26/mm/memcontrol.c +--- linux-4.1.26.orig/mm/memcontrol.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/memcontrol.c 2016-06-19 15:30:58.827302748 +0200 +@@ -66,6 +66,8 @@ + #include + #include + #include ++#include ++ + #include "slab.h" + + #include +@@ -85,6 +87,7 @@ + #define do_swap_account 0 + #endif + ++static DEFINE_LOCAL_IRQ_LOCK(event_lock); + static const char * const mem_cgroup_stat_names[] = { + "cache", + "rss", +@@ -2124,14 +2127,17 @@ + */ + static void refill_stock(struct mem_cgroup *memcg, unsigned int nr_pages) + { +- struct memcg_stock_pcp *stock = &get_cpu_var(memcg_stock); ++ struct memcg_stock_pcp *stock; ++ int cpu = get_cpu_light(); ++ ++ stock = &per_cpu(memcg_stock, cpu); + + if (stock->cached != memcg) { /* reset if necessary */ + drain_stock(stock); + stock->cached = memcg; + } + stock->nr_pages += nr_pages; +- put_cpu_var(memcg_stock); ++ put_cpu_light(); + } + + /* +@@ -2147,7 +2153,7 @@ + return; + /* Notify other cpus that system-wide "drain" is running */ + get_online_cpus(); +- curcpu = get_cpu(); ++ curcpu = get_cpu_light(); + for_each_online_cpu(cpu) { + struct memcg_stock_pcp *stock = &per_cpu(memcg_stock, cpu); + struct mem_cgroup *memcg; +@@ -2164,7 +2170,7 @@ + schedule_work_on(cpu, &stock->work); + } + } +- put_cpu(); ++ put_cpu_light(); + put_online_cpus(); + mutex_unlock(&percpu_charge_mutex); + } +@@ -4803,12 +4809,12 @@ + + ret = 0; + +- local_irq_disable(); ++ local_lock_irq(event_lock); + mem_cgroup_charge_statistics(to, page, nr_pages); + memcg_check_events(to, page); + mem_cgroup_charge_statistics(from, page, -nr_pages); + memcg_check_events(from, page); +- local_irq_enable(); ++ local_unlock_irq(event_lock); + out_unlock: + unlock_page(page); + out: +@@ -5551,10 +5557,10 @@ + VM_BUG_ON_PAGE(!PageTransHuge(page), page); + } + +- local_irq_disable(); ++ local_lock_irq(event_lock); + mem_cgroup_charge_statistics(memcg, page, nr_pages); + memcg_check_events(memcg, page); +- local_irq_enable(); ++ local_unlock_irq(event_lock); + + if (do_swap_account && PageSwapCache(page)) { + swp_entry_t entry = { .val = page_private(page) }; +@@ -5610,14 +5616,14 @@ + memcg_oom_recover(memcg); + } + +- local_irq_save(flags); ++ local_lock_irqsave(event_lock, flags); + __this_cpu_sub(memcg->stat->count[MEM_CGROUP_STAT_RSS], nr_anon); + __this_cpu_sub(memcg->stat->count[MEM_CGROUP_STAT_CACHE], nr_file); + __this_cpu_sub(memcg->stat->count[MEM_CGROUP_STAT_RSS_HUGE], nr_huge); + __this_cpu_add(memcg->stat->events[MEM_CGROUP_EVENTS_PGPGOUT], pgpgout); + __this_cpu_add(memcg->stat->nr_page_events, nr_pages); + memcg_check_events(memcg, dummy_page); +- local_irq_restore(flags); ++ local_unlock_irqrestore(event_lock, flags); + + if (!mem_cgroup_is_root(memcg)) + css_put_many(&memcg->css, nr_pages); +@@ -5821,6 +5827,7 @@ + { + struct mem_cgroup *memcg; + unsigned short oldid; ++ unsigned long flags; + + VM_BUG_ON_PAGE(PageLRU(page), page); + VM_BUG_ON_PAGE(page_count(page), page); +@@ -5843,9 +5850,11 @@ + if (!mem_cgroup_is_root(memcg)) + page_counter_uncharge(&memcg->memory, 1); + ++ local_lock_irqsave(event_lock, flags); + /* Caller disabled preemption with mapping->tree_lock */ + mem_cgroup_charge_statistics(memcg, page, -1); + memcg_check_events(memcg, page); ++ local_unlock_irqrestore(event_lock, flags); + } + + /** +diff -Nur linux-4.1.26.orig/mm/memory.c linux-4.1.26/mm/memory.c +--- linux-4.1.26.orig/mm/memory.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/memory.c 2016-06-19 15:30:58.827302748 +0200 +@@ -3753,7 +3753,7 @@ + } + + #if defined(CONFIG_PROVE_LOCKING) || defined(CONFIG_DEBUG_ATOMIC_SLEEP) +-void might_fault(void) ++void __might_fault(const char *file, int line) + { + /* + * Some code (nfs/sunrpc) uses socket ops on kernel memory while +@@ -3763,21 +3763,15 @@ + */ + if (segment_eq(get_fs(), KERNEL_DS)) + return; +- +- /* +- * it would be nicer only to annotate paths which are not under +- * pagefault_disable, however that requires a larger audit and +- * providing helpers like get_user_atomic. +- */ +- if (in_atomic()) ++ if (pagefault_disabled()) + return; +- +- __might_sleep(__FILE__, __LINE__, 0); +- ++ __might_sleep(file, line, 0); ++#if defined(CONFIG_DEBUG_ATOMIC_SLEEP) + if (current->mm) + might_lock_read(¤t->mm->mmap_sem); ++#endif + } +-EXPORT_SYMBOL(might_fault); ++EXPORT_SYMBOL(__might_fault); + #endif + + #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLBFS) +diff -Nur linux-4.1.26.orig/mm/mmu_context.c linux-4.1.26/mm/mmu_context.c +--- linux-4.1.26.orig/mm/mmu_context.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/mmu_context.c 2016-06-19 15:30:58.827302748 +0200 +@@ -23,6 +23,7 @@ + struct task_struct *tsk = current; + + task_lock(tsk); ++ preempt_disable_rt(); + active_mm = tsk->active_mm; + if (active_mm != mm) { + atomic_inc(&mm->mm_count); +@@ -30,6 +31,7 @@ + } + tsk->mm = mm; + switch_mm(active_mm, mm, tsk); ++ preempt_enable_rt(); + task_unlock(tsk); + #ifdef finish_arch_post_lock_switch + finish_arch_post_lock_switch(); +diff -Nur linux-4.1.26.orig/mm/page_alloc.c linux-4.1.26/mm/page_alloc.c +--- linux-4.1.26.orig/mm/page_alloc.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/page_alloc.c 2016-06-19 15:30:58.827302748 +0200 +@@ -60,6 +60,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -233,6 +234,18 @@ + EXPORT_SYMBOL(nr_online_nodes); + #endif + ++static DEFINE_LOCAL_IRQ_LOCK(pa_lock); ++ ++#ifdef CONFIG_PREEMPT_RT_BASE ++# define cpu_lock_irqsave(cpu, flags) \ ++ local_lock_irqsave_on(pa_lock, flags, cpu) ++# define cpu_unlock_irqrestore(cpu, flags) \ ++ local_unlock_irqrestore_on(pa_lock, flags, cpu) ++#else ++# define cpu_lock_irqsave(cpu, flags) local_irq_save(flags) ++# define cpu_unlock_irqrestore(cpu, flags) local_irq_restore(flags) ++#endif ++ + int page_group_by_mobility_disabled __read_mostly; + + void set_pageblock_migratetype(struct page *page, int migratetype) +@@ -701,7 +714,7 @@ + } + + /* +- * Frees a number of pages from the PCP lists ++ * Frees a number of pages which have been collected from the pcp lists. + * Assumes all pages on list are in same zone, and of same order. + * count is the number of pages to free. + * +@@ -712,18 +725,51 @@ + * pinned" detection logic. + */ + static void free_pcppages_bulk(struct zone *zone, int count, +- struct per_cpu_pages *pcp) ++ struct list_head *list) + { +- int migratetype = 0; +- int batch_free = 0; + int to_free = count; + unsigned long nr_scanned; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&zone->lock, flags); + +- spin_lock(&zone->lock); + nr_scanned = zone_page_state(zone, NR_PAGES_SCANNED); + if (nr_scanned) + __mod_zone_page_state(zone, NR_PAGES_SCANNED, -nr_scanned); + ++ while (!list_empty(list)) { ++ struct page *page = list_first_entry(list, struct page, lru); ++ int mt; /* migratetype of the to-be-freed page */ ++ ++ /* must delete as __free_one_page list manipulates */ ++ list_del(&page->lru); ++ ++ mt = get_freepage_migratetype(page); ++ if (unlikely(has_isolate_pageblock(zone))) ++ mt = get_pageblock_migratetype(page); ++ ++ /* MIGRATE_MOVABLE list may include MIGRATE_RESERVEs */ ++ __free_one_page(page, page_to_pfn(page), zone, 0, mt); ++ trace_mm_page_pcpu_drain(page, 0, mt); ++ to_free--; ++ } ++ WARN_ON(to_free != 0); ++ spin_unlock_irqrestore(&zone->lock, flags); ++} ++ ++/* ++ * Moves a number of pages from the PCP lists to free list which ++ * is freed outside of the locked region. ++ * ++ * Assumes all pages on list are in same zone, and of same order. ++ * count is the number of pages to free. ++ */ ++static void isolate_pcp_pages(int to_free, struct per_cpu_pages *src, ++ struct list_head *dst) ++{ ++ int migratetype = 0; ++ int batch_free = 0; ++ + while (to_free) { + struct page *page; + struct list_head *list; +@@ -739,7 +785,7 @@ + batch_free++; + if (++migratetype == MIGRATE_PCPTYPES) + migratetype = 0; +- list = &pcp->lists[migratetype]; ++ list = &src->lists[migratetype]; + } while (list_empty(list)); + + /* This is the only non-empty list. Free them all. */ +@@ -747,21 +793,11 @@ + batch_free = to_free; + + do { +- int mt; /* migratetype of the to-be-freed page */ +- +- page = list_entry(list->prev, struct page, lru); +- /* must delete as __free_one_page list manipulates */ ++ page = list_last_entry(list, struct page, lru); + list_del(&page->lru); +- mt = get_freepage_migratetype(page); +- if (unlikely(has_isolate_pageblock(zone))) +- mt = get_pageblock_migratetype(page); +- +- /* MIGRATE_MOVABLE list may include MIGRATE_RESERVEs */ +- __free_one_page(page, page_to_pfn(page), zone, 0, mt); +- trace_mm_page_pcpu_drain(page, 0, mt); ++ list_add(&page->lru, dst); + } while (--to_free && --batch_free && !list_empty(list)); + } +- spin_unlock(&zone->lock); + } + + static void free_one_page(struct zone *zone, +@@ -770,7 +806,9 @@ + int migratetype) + { + unsigned long nr_scanned; +- spin_lock(&zone->lock); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&zone->lock, flags); + nr_scanned = zone_page_state(zone, NR_PAGES_SCANNED); + if (nr_scanned) + __mod_zone_page_state(zone, NR_PAGES_SCANNED, -nr_scanned); +@@ -780,7 +818,7 @@ + migratetype = get_pfnblock_migratetype(page, pfn); + } + __free_one_page(page, pfn, zone, order, migratetype); +- spin_unlock(&zone->lock); ++ spin_unlock_irqrestore(&zone->lock, flags); + } + + static int free_tail_pages_check(struct page *head_page, struct page *page) +@@ -845,11 +883,11 @@ + return; + + migratetype = get_pfnblock_migratetype(page, pfn); +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + __count_vm_events(PGFREE, 1 << order); + set_freepage_migratetype(page, migratetype); + free_one_page(page_zone(page), page, pfn, order, migratetype); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + } + + void __init __free_pages_bootmem(struct page *page, unsigned long pfn, +@@ -1396,16 +1434,18 @@ + void drain_zone_pages(struct zone *zone, struct per_cpu_pages *pcp) + { + unsigned long flags; ++ LIST_HEAD(dst); + int to_drain, batch; + +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + batch = READ_ONCE(pcp->batch); + to_drain = min(pcp->count, batch); + if (to_drain > 0) { +- free_pcppages_bulk(zone, to_drain, pcp); ++ isolate_pcp_pages(to_drain, pcp, &dst); + pcp->count -= to_drain; + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); ++ free_pcppages_bulk(zone, to_drain, &dst); + } + #endif + +@@ -1421,16 +1461,21 @@ + unsigned long flags; + struct per_cpu_pageset *pset; + struct per_cpu_pages *pcp; ++ LIST_HEAD(dst); ++ int count; + +- local_irq_save(flags); ++ cpu_lock_irqsave(cpu, flags); + pset = per_cpu_ptr(zone->pageset, cpu); + + pcp = &pset->pcp; +- if (pcp->count) { +- free_pcppages_bulk(zone, pcp->count, pcp); ++ count = pcp->count; ++ if (count) { ++ isolate_pcp_pages(count, pcp, &dst); + pcp->count = 0; + } +- local_irq_restore(flags); ++ cpu_unlock_irqrestore(cpu, flags); ++ if (count) ++ free_pcppages_bulk(zone, count, &dst); + } + + /* +@@ -1516,8 +1561,17 @@ + else + cpumask_clear_cpu(cpu, &cpus_with_pcps); + } ++#ifndef CONFIG_PREEMPT_RT_BASE + on_each_cpu_mask(&cpus_with_pcps, (smp_call_func_t) drain_local_pages, + zone, 1); ++#else ++ for_each_cpu(cpu, &cpus_with_pcps) { ++ if (zone) ++ drain_pages_zone(cpu, zone); ++ else ++ drain_pages(cpu); ++ } ++#endif + } + + #ifdef CONFIG_HIBERNATION +@@ -1573,7 +1627,7 @@ + + migratetype = get_pfnblock_migratetype(page, pfn); + set_freepage_migratetype(page, migratetype); +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + __count_vm_event(PGFREE); + + /* +@@ -1599,12 +1653,17 @@ + pcp->count++; + if (pcp->count >= pcp->high) { + unsigned long batch = READ_ONCE(pcp->batch); +- free_pcppages_bulk(zone, batch, pcp); ++ LIST_HEAD(dst); ++ ++ isolate_pcp_pages(batch, pcp, &dst); + pcp->count -= batch; ++ local_unlock_irqrestore(pa_lock, flags); ++ free_pcppages_bulk(zone, batch, &dst); ++ return; + } + + out: +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + } + + /* +@@ -1735,7 +1794,7 @@ + struct per_cpu_pages *pcp; + struct list_head *list; + +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + pcp = &this_cpu_ptr(zone->pageset)->pcp; + list = &pcp->lists[migratetype]; + if (list_empty(list)) { +@@ -1767,13 +1826,15 @@ + */ + WARN_ON_ONCE(order > 1); + } +- spin_lock_irqsave(&zone->lock, flags); ++ local_spin_lock_irqsave(pa_lock, &zone->lock, flags); + page = __rmqueue(zone, order, migratetype); +- spin_unlock(&zone->lock); +- if (!page) ++ if (!page) { ++ spin_unlock(&zone->lock); + goto failed; ++ } + __mod_zone_freepage_state(zone, -(1 << order), + get_freepage_migratetype(page)); ++ spin_unlock(&zone->lock); + } + + __mod_zone_page_state(zone, NR_ALLOC_BATCH, -(1 << order)); +@@ -1783,13 +1844,13 @@ + + __count_zone_vm_events(PGALLOC, zone, 1 << order); + zone_statistics(preferred_zone, zone, gfp_flags); +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + + VM_BUG_ON_PAGE(bad_range(zone, page), page); + return page; + + failed: +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + return NULL; + } + +@@ -5680,6 +5741,7 @@ + void __init page_alloc_init(void) + { + hotcpu_notifier(page_alloc_cpu_notify, 0); ++ local_irq_lock_init(pa_lock); + } + + /* +@@ -6575,7 +6637,7 @@ + struct per_cpu_pageset *pset; + + /* avoid races with drain_pages() */ +- local_irq_save(flags); ++ local_lock_irqsave(pa_lock, flags); + if (zone->pageset != &boot_pageset) { + for_each_online_cpu(cpu) { + pset = per_cpu_ptr(zone->pageset, cpu); +@@ -6584,7 +6646,7 @@ + free_percpu(zone->pageset); + zone->pageset = &boot_pageset; + } +- local_irq_restore(flags); ++ local_unlock_irqrestore(pa_lock, flags); + } + + #ifdef CONFIG_MEMORY_HOTREMOVE +diff -Nur linux-4.1.26.orig/mm/slab.h linux-4.1.26/mm/slab.h +--- linux-4.1.26.orig/mm/slab.h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/slab.h 2016-06-19 15:30:58.827302748 +0200 +@@ -330,7 +330,11 @@ + * The slab lists for all objects. + */ + struct kmem_cache_node { ++#ifdef CONFIG_SLUB ++ raw_spinlock_t list_lock; ++#else + spinlock_t list_lock; ++#endif + + #ifdef CONFIG_SLAB + struct list_head slabs_partial; /* partial list first, better asm code */ +diff -Nur linux-4.1.26.orig/mm/slub.c linux-4.1.26/mm/slub.c +--- linux-4.1.26.orig/mm/slub.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/slub.c 2016-06-19 15:30:58.827302748 +0200 +@@ -1069,7 +1069,7 @@ + { + struct kmem_cache_node *n = get_node(s, page_to_nid(page)); + +- spin_lock_irqsave(&n->list_lock, *flags); ++ raw_spin_lock_irqsave(&n->list_lock, *flags); + slab_lock(page); + + if (!check_slab(s, page)) +@@ -1116,7 +1116,7 @@ + + fail: + slab_unlock(page); +- spin_unlock_irqrestore(&n->list_lock, *flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, *flags); + slab_fix(s, "Object at 0x%p not freed", object); + return NULL; + } +@@ -1242,6 +1242,12 @@ + + #endif /* CONFIG_SLUB_DEBUG */ + ++struct slub_free_list { ++ raw_spinlock_t lock; ++ struct list_head list; ++}; ++static DEFINE_PER_CPU(struct slub_free_list, slub_free_list); ++ + /* + * Hooks for other subsystems that check memory allocations. In a typical + * production configuration these hooks all should produce no code at all. +@@ -1306,6 +1312,17 @@ + kasan_slab_free(s, x); + } + ++static void setup_object(struct kmem_cache *s, struct page *page, ++ void *object) ++{ ++ setup_object_debug(s, page, object); ++ if (unlikely(s->ctor)) { ++ kasan_unpoison_object_data(s, object); ++ s->ctor(object); ++ kasan_poison_object_data(s, object); ++ } ++} ++ + /* + * Slab allocation and freeing + */ +@@ -1336,10 +1353,17 @@ + struct page *page; + struct kmem_cache_order_objects oo = s->oo; + gfp_t alloc_gfp; ++ void *start, *p; ++ int idx, order; ++ bool enableirqs; + + flags &= gfp_allowed_mask; + +- if (flags & __GFP_WAIT) ++ enableirqs = (flags & __GFP_WAIT) != 0; ++#ifdef CONFIG_PREEMPT_RT_FULL ++ enableirqs |= system_state == SYSTEM_RUNNING; ++#endif ++ if (enableirqs) + local_irq_enable(); + + flags |= s->allocflags; +@@ -1359,13 +1383,13 @@ + * Try a lower order alloc if possible + */ + page = alloc_slab_page(s, alloc_gfp, node, oo); +- +- if (page) +- stat(s, ORDER_FALLBACK); ++ if (unlikely(!page)) ++ goto out; ++ stat(s, ORDER_FALLBACK); + } + +- if (kmemcheck_enabled && page +- && !(s->flags & (SLAB_NOTRACK | DEBUG_DEFAULT_FLAGS))) { ++ if (kmemcheck_enabled && ++ !(s->flags & (SLAB_NOTRACK | DEBUG_DEFAULT_FLAGS))) { + int pages = 1 << oo_order(oo); + + kmemcheck_alloc_shadow(page, oo_order(oo), alloc_gfp, node); +@@ -1380,51 +1404,9 @@ + kmemcheck_mark_unallocated_pages(page, pages); + } + +- if (flags & __GFP_WAIT) +- local_irq_disable(); +- if (!page) +- return NULL; +- + page->objects = oo_objects(oo); +- mod_zone_page_state(page_zone(page), +- (s->flags & SLAB_RECLAIM_ACCOUNT) ? +- NR_SLAB_RECLAIMABLE : NR_SLAB_UNRECLAIMABLE, +- 1 << oo_order(oo)); +- +- return page; +-} +- +-static void setup_object(struct kmem_cache *s, struct page *page, +- void *object) +-{ +- setup_object_debug(s, page, object); +- if (unlikely(s->ctor)) { +- kasan_unpoison_object_data(s, object); +- s->ctor(object); +- kasan_poison_object_data(s, object); +- } +-} +- +-static struct page *new_slab(struct kmem_cache *s, gfp_t flags, int node) +-{ +- struct page *page; +- void *start; +- void *p; +- int order; +- int idx; +- +- if (unlikely(flags & GFP_SLAB_BUG_MASK)) { +- pr_emerg("gfp: %u\n", flags & GFP_SLAB_BUG_MASK); +- BUG(); +- } +- +- page = allocate_slab(s, +- flags & (GFP_RECLAIM_MASK | GFP_CONSTRAINT_MASK), node); +- if (!page) +- goto out; + + order = compound_order(page); +- inc_slabs_node(s, page_to_nid(page), page->objects); + page->slab_cache = s; + __SetPageSlab(page); + if (page_is_pfmemalloc(page)) +@@ -1448,10 +1430,34 @@ + page->freelist = start; + page->inuse = page->objects; + page->frozen = 1; ++ + out: ++ if (enableirqs) ++ local_irq_disable(); ++ if (!page) ++ return NULL; ++ ++ mod_zone_page_state(page_zone(page), ++ (s->flags & SLAB_RECLAIM_ACCOUNT) ? ++ NR_SLAB_RECLAIMABLE : NR_SLAB_UNRECLAIMABLE, ++ 1 << oo_order(oo)); ++ ++ inc_slabs_node(s, page_to_nid(page), page->objects); ++ + return page; + } + ++static struct page *new_slab(struct kmem_cache *s, gfp_t flags, int node) ++{ ++ if (unlikely(flags & GFP_SLAB_BUG_MASK)) { ++ pr_emerg("gfp: %u\n", flags & GFP_SLAB_BUG_MASK); ++ BUG(); ++ } ++ ++ return allocate_slab(s, ++ flags & (GFP_RECLAIM_MASK | GFP_CONSTRAINT_MASK), node); ++} ++ + static void __free_slab(struct kmem_cache *s, struct page *page) + { + int order = compound_order(page); +@@ -1483,6 +1489,16 @@ + memcg_uncharge_slab(s, order); + } + ++static void free_delayed(struct list_head *h) ++{ ++ while(!list_empty(h)) { ++ struct page *page = list_first_entry(h, struct page, lru); ++ ++ list_del(&page->lru); ++ __free_slab(page->slab_cache, page); ++ } ++} ++ + #define need_reserve_slab_rcu \ + (sizeof(((struct page *)NULL)->lru) < sizeof(struct rcu_head)) + +@@ -1517,6 +1533,12 @@ + } + + call_rcu(head, rcu_free_slab); ++ } else if (irqs_disabled()) { ++ struct slub_free_list *f = this_cpu_ptr(&slub_free_list); ++ ++ raw_spin_lock(&f->lock); ++ list_add(&page->lru, &f->list); ++ raw_spin_unlock(&f->lock); + } else + __free_slab(s, page); + } +@@ -1630,7 +1652,7 @@ + if (!n || !n->nr_partial) + return NULL; + +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + list_for_each_entry_safe(page, page2, &n->partial, lru) { + void *t; + +@@ -1655,7 +1677,7 @@ + break; + + } +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + return object; + } + +@@ -1901,7 +1923,7 @@ + * that acquire_slab() will see a slab page that + * is frozen + */ +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + } else { + m = M_FULL; +@@ -1912,7 +1934,7 @@ + * slabs from diagnostic functions will not see + * any frozen slabs. + */ +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + } + +@@ -1947,7 +1969,7 @@ + goto redo; + + if (lock) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + if (m == M_FREE) { + stat(s, DEACTIVATE_EMPTY); +@@ -1979,10 +2001,10 @@ + n2 = get_node(s, page_to_nid(page)); + if (n != n2) { + if (n) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + n = n2; +- spin_lock(&n->list_lock); ++ raw_spin_lock(&n->list_lock); + } + + do { +@@ -2011,7 +2033,7 @@ + } + + if (n) +- spin_unlock(&n->list_lock); ++ raw_spin_unlock(&n->list_lock); + + while (discard_page) { + page = discard_page; +@@ -2050,14 +2072,21 @@ + pobjects = oldpage->pobjects; + pages = oldpage->pages; + if (drain && pobjects > s->cpu_partial) { ++ struct slub_free_list *f; + unsigned long flags; ++ LIST_HEAD(tofree); + /* + * partial array is full. Move the existing + * set to the per node partial list. + */ + local_irq_save(flags); + unfreeze_partials(s, this_cpu_ptr(s->cpu_slab)); ++ f = this_cpu_ptr(&slub_free_list); ++ raw_spin_lock(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock(&f->lock); + local_irq_restore(flags); ++ free_delayed(&tofree); + oldpage = NULL; + pobjects = 0; + pages = 0; +@@ -2129,7 +2158,22 @@ + + static void flush_all(struct kmem_cache *s) + { ++ LIST_HEAD(tofree); ++ int cpu; ++ + on_each_cpu_cond(has_cpu_slab, flush_cpu_slab, s, 1, GFP_ATOMIC); ++ for_each_online_cpu(cpu) { ++ struct slub_free_list *f; ++ ++ if (!has_cpu_slab(cpu, s)) ++ continue; ++ ++ f = &per_cpu(slub_free_list, cpu); ++ raw_spin_lock_irq(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock_irq(&f->lock); ++ free_delayed(&tofree); ++ } + } + + /* +@@ -2165,10 +2209,10 @@ + unsigned long x = 0; + struct page *page; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + list_for_each_entry(page, &n->partial, lru) + x += get_count(page); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return x; + } + #endif /* CONFIG_SLUB_DEBUG || CONFIG_SYSFS */ +@@ -2305,9 +2349,11 @@ + static void *__slab_alloc(struct kmem_cache *s, gfp_t gfpflags, int node, + unsigned long addr, struct kmem_cache_cpu *c) + { ++ struct slub_free_list *f; + void *freelist; + struct page *page; + unsigned long flags; ++ LIST_HEAD(tofree); + + local_irq_save(flags); + #ifdef CONFIG_PREEMPT +@@ -2375,7 +2421,13 @@ + VM_BUG_ON(!c->page->frozen); + c->freelist = get_freepointer(s, freelist); + c->tid = next_tid(c->tid); ++out: ++ f = this_cpu_ptr(&slub_free_list); ++ raw_spin_lock(&f->lock); ++ list_splice_init(&f->list, &tofree); ++ raw_spin_unlock(&f->lock); + local_irq_restore(flags); ++ free_delayed(&tofree); + return freelist; + + new_slab: +@@ -2392,8 +2444,7 @@ + + if (unlikely(!freelist)) { + slab_out_of_memory(s, gfpflags, node); +- local_irq_restore(flags); +- return NULL; ++ goto out; + } + + page = c->page; +@@ -2408,8 +2459,7 @@ + deactivate_slab(s, page, get_freepointer(s, freelist)); + c->page = NULL; + c->freelist = NULL; +- local_irq_restore(flags); +- return freelist; ++ goto out; + } + + /* +@@ -2593,7 +2643,7 @@ + + do { + if (unlikely(n)) { +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + n = NULL; + } + prior = page->freelist; +@@ -2625,7 +2675,7 @@ + * Otherwise the list_lock will synchronize with + * other processors updating the list of slabs. + */ +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + } + } +@@ -2667,7 +2717,7 @@ + add_partial(n, page, DEACTIVATE_TO_TAIL); + stat(s, FREE_ADD_PARTIAL); + } +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return; + + slab_empty: +@@ -2682,7 +2732,7 @@ + remove_full(s, n, page); + } + +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + stat(s, FREE_SLAB); + discard_slab(s, page); + } +@@ -2881,7 +2931,7 @@ + init_kmem_cache_node(struct kmem_cache_node *n) + { + n->nr_partial = 0; +- spin_lock_init(&n->list_lock); ++ raw_spin_lock_init(&n->list_lock); + INIT_LIST_HEAD(&n->partial); + #ifdef CONFIG_SLUB_DEBUG + atomic_long_set(&n->nr_slabs, 0); +@@ -3463,7 +3513,7 @@ + for (i = 0; i < SHRINK_PROMOTE_MAX; i++) + INIT_LIST_HEAD(promote + i); + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + /* + * Build lists of slabs to discard or promote. +@@ -3494,7 +3544,7 @@ + for (i = SHRINK_PROMOTE_MAX - 1; i >= 0; i--) + list_splice(promote + i, &n->partial); + +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + + /* Release empty slabs */ + list_for_each_entry_safe(page, t, &discard, lru) +@@ -3670,6 +3720,12 @@ + { + static __initdata struct kmem_cache boot_kmem_cache, + boot_kmem_cache_node; ++ int cpu; ++ ++ for_each_possible_cpu(cpu) { ++ raw_spin_lock_init(&per_cpu(slub_free_list, cpu).lock); ++ INIT_LIST_HEAD(&per_cpu(slub_free_list, cpu).list); ++ } + + if (debug_guardpage_minorder()) + slub_max_order = 0; +@@ -3912,7 +3968,7 @@ + struct page *page; + unsigned long flags; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + + list_for_each_entry(page, &n->partial, lru) { + validate_slab_slab(s, page, map); +@@ -3934,7 +3990,7 @@ + s->name, count, atomic_long_read(&n->nr_slabs)); + + out: +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + return count; + } + +@@ -4122,12 +4178,12 @@ + if (!atomic_long_read(&n->nr_slabs)) + continue; + +- spin_lock_irqsave(&n->list_lock, flags); ++ raw_spin_lock_irqsave(&n->list_lock, flags); + list_for_each_entry(page, &n->partial, lru) + process_slab(&t, s, page, alloc, map); + list_for_each_entry(page, &n->full, lru) + process_slab(&t, s, page, alloc, map); +- spin_unlock_irqrestore(&n->list_lock, flags); ++ raw_spin_unlock_irqrestore(&n->list_lock, flags); + } + + for (i = 0; i < t.count; i++) { +diff -Nur linux-4.1.26.orig/mm/swap.c linux-4.1.26/mm/swap.c +--- linux-4.1.26.orig/mm/swap.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/swap.c 2016-06-19 15:30:58.831302903 +0200 +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + + #include "internal.h" + +@@ -45,6 +46,9 @@ + static DEFINE_PER_CPU(struct pagevec, lru_rotate_pvecs); + static DEFINE_PER_CPU(struct pagevec, lru_deactivate_file_pvecs); + ++static DEFINE_LOCAL_IRQ_LOCK(rotate_lock); ++DEFINE_LOCAL_IRQ_LOCK(swapvec_lock); ++ + /* + * This path almost never happens for VM activity - pages are normally + * freed via pagevecs. But it gets used by networking. +@@ -481,11 +485,11 @@ + unsigned long flags; + + page_cache_get(page); +- local_irq_save(flags); ++ local_lock_irqsave(rotate_lock, flags); + pvec = this_cpu_ptr(&lru_rotate_pvecs); + if (!pagevec_add(pvec, page)) + pagevec_move_tail(pvec); +- local_irq_restore(flags); ++ local_unlock_irqrestore(rotate_lock, flags); + } + } + +@@ -536,12 +540,13 @@ + void activate_page(struct page *page) + { + if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { +- struct pagevec *pvec = &get_cpu_var(activate_page_pvecs); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, ++ activate_page_pvecs); + + page_cache_get(page); + if (!pagevec_add(pvec, page)) + pagevec_lru_move_fn(pvec, __activate_page, NULL); +- put_cpu_var(activate_page_pvecs); ++ put_locked_var(swapvec_lock, activate_page_pvecs); + } + } + +@@ -567,7 +572,7 @@ + + static void __lru_cache_activate_page(struct page *page) + { +- struct pagevec *pvec = &get_cpu_var(lru_add_pvec); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, lru_add_pvec); + int i; + + /* +@@ -589,7 +594,7 @@ + } + } + +- put_cpu_var(lru_add_pvec); ++ put_locked_var(swapvec_lock, lru_add_pvec); + } + + /* +@@ -628,13 +633,13 @@ + + static void __lru_cache_add(struct page *page) + { +- struct pagevec *pvec = &get_cpu_var(lru_add_pvec); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, lru_add_pvec); + + page_cache_get(page); + if (!pagevec_space(pvec)) + __pagevec_lru_add(pvec); + pagevec_add(pvec, page); +- put_cpu_var(lru_add_pvec); ++ put_locked_var(swapvec_lock, lru_add_pvec); + } + + /** +@@ -814,9 +819,9 @@ + unsigned long flags; + + /* No harm done if a racing interrupt already did this */ +- local_irq_save(flags); ++ local_lock_irqsave(rotate_lock, flags); + pagevec_move_tail(pvec); +- local_irq_restore(flags); ++ local_unlock_irqrestore(rotate_lock, flags); + } + + pvec = &per_cpu(lru_deactivate_file_pvecs, cpu); +@@ -844,18 +849,19 @@ + return; + + if (likely(get_page_unless_zero(page))) { +- struct pagevec *pvec = &get_cpu_var(lru_deactivate_file_pvecs); ++ struct pagevec *pvec = &get_locked_var(swapvec_lock, ++ lru_deactivate_file_pvecs); + + if (!pagevec_add(pvec, page)) + pagevec_lru_move_fn(pvec, lru_deactivate_file_fn, NULL); +- put_cpu_var(lru_deactivate_file_pvecs); ++ put_locked_var(swapvec_lock, lru_deactivate_file_pvecs); + } + } + + void lru_add_drain(void) + { +- lru_add_drain_cpu(get_cpu()); +- put_cpu(); ++ lru_add_drain_cpu(local_lock_cpu(swapvec_lock)); ++ local_unlock_cpu(swapvec_lock); + } + + static void lru_add_drain_per_cpu(struct work_struct *dummy) +diff -Nur linux-4.1.26.orig/mm/truncate.c linux-4.1.26/mm/truncate.c +--- linux-4.1.26.orig/mm/truncate.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/truncate.c 2016-06-19 15:30:58.831302903 +0200 +@@ -56,8 +56,11 @@ + * protected by mapping->tree_lock. + */ + if (!workingset_node_shadows(node) && +- !list_empty(&node->private_list)) +- list_lru_del(&workingset_shadow_nodes, &node->private_list); ++ !list_empty(&node->private_list)) { ++ local_lock(workingset_shadow_lock); ++ list_lru_del(&__workingset_shadow_nodes, &node->private_list); ++ local_unlock(workingset_shadow_lock); ++ } + __radix_tree_delete_node(&mapping->page_tree, node); + unlock: + spin_unlock_irq(&mapping->tree_lock); +diff -Nur linux-4.1.26.orig/mm/vmalloc.c linux-4.1.26/mm/vmalloc.c +--- linux-4.1.26.orig/mm/vmalloc.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/vmalloc.c 2016-06-19 15:30:58.831302903 +0200 +@@ -819,7 +819,7 @@ + struct vmap_block *vb; + struct vmap_area *va; + unsigned long vb_idx; +- int node, err; ++ int node, err, cpu; + void *vaddr; + + node = numa_node_id(); +@@ -862,11 +862,12 @@ + BUG_ON(err); + radix_tree_preload_end(); + +- vbq = &get_cpu_var(vmap_block_queue); ++ cpu = get_cpu_light(); ++ vbq = this_cpu_ptr(&vmap_block_queue); + spin_lock(&vbq->lock); + list_add_tail_rcu(&vb->free_list, &vbq->free); + spin_unlock(&vbq->lock); +- put_cpu_var(vmap_block_queue); ++ put_cpu_light(); + + return vaddr; + } +@@ -935,6 +936,7 @@ + struct vmap_block *vb; + void *vaddr = NULL; + unsigned int order; ++ int cpu; + + BUG_ON(size & ~PAGE_MASK); + BUG_ON(size > PAGE_SIZE*VMAP_MAX_ALLOC); +@@ -949,7 +951,8 @@ + order = get_order(size); + + rcu_read_lock(); +- vbq = &get_cpu_var(vmap_block_queue); ++ cpu = get_cpu_light(); ++ vbq = this_cpu_ptr(&vmap_block_queue); + list_for_each_entry_rcu(vb, &vbq->free, free_list) { + unsigned long pages_off; + +@@ -972,7 +975,7 @@ + break; + } + +- put_cpu_var(vmap_block_queue); ++ put_cpu_light(); + rcu_read_unlock(); + + /* Allocate new block if nothing was found */ +diff -Nur linux-4.1.26.orig/mm/vmstat.c linux-4.1.26/mm/vmstat.c +--- linux-4.1.26.orig/mm/vmstat.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/vmstat.c 2016-06-19 15:30:58.831302903 +0200 +@@ -226,6 +226,7 @@ + long x; + long t; + ++ preempt_disable_rt(); + x = delta + __this_cpu_read(*p); + + t = __this_cpu_read(pcp->stat_threshold); +@@ -235,6 +236,7 @@ + x = 0; + } + __this_cpu_write(*p, x); ++ preempt_enable_rt(); + } + EXPORT_SYMBOL(__mod_zone_page_state); + +@@ -267,6 +269,7 @@ + s8 __percpu *p = pcp->vm_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_inc_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v > t)) { +@@ -275,6 +278,7 @@ + zone_page_state_add(v + overstep, zone, item); + __this_cpu_write(*p, -overstep); + } ++ preempt_enable_rt(); + } + + void __inc_zone_page_state(struct page *page, enum zone_stat_item item) +@@ -289,6 +293,7 @@ + s8 __percpu *p = pcp->vm_stat_diff + item; + s8 v, t; + ++ preempt_disable_rt(); + v = __this_cpu_dec_return(*p); + t = __this_cpu_read(pcp->stat_threshold); + if (unlikely(v < - t)) { +@@ -297,6 +302,7 @@ + zone_page_state_add(v - overstep, zone, item); + __this_cpu_write(*p, overstep); + } ++ preempt_enable_rt(); + } + + void __dec_zone_page_state(struct page *page, enum zone_stat_item item) +diff -Nur linux-4.1.26.orig/mm/workingset.c linux-4.1.26/mm/workingset.c +--- linux-4.1.26.orig/mm/workingset.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/mm/workingset.c 2016-06-19 15:30:58.835303057 +0200 +@@ -264,7 +264,8 @@ + * point where they would still be useful. + */ + +-struct list_lru workingset_shadow_nodes; ++struct list_lru __workingset_shadow_nodes; ++DEFINE_LOCAL_IRQ_LOCK(workingset_shadow_lock); + + static unsigned long count_shadow_nodes(struct shrinker *shrinker, + struct shrink_control *sc) +@@ -274,9 +275,9 @@ + unsigned long pages; + + /* list_lru lock nests inside IRQ-safe mapping->tree_lock */ +- local_irq_disable(); +- shadow_nodes = list_lru_shrink_count(&workingset_shadow_nodes, sc); +- local_irq_enable(); ++ local_lock_irq(workingset_shadow_lock); ++ shadow_nodes = list_lru_shrink_count(&__workingset_shadow_nodes, sc); ++ local_unlock_irq(workingset_shadow_lock); + + pages = node_present_pages(sc->nid); + /* +@@ -363,9 +364,9 @@ + spin_unlock(&mapping->tree_lock); + ret = LRU_REMOVED_RETRY; + out: +- local_irq_enable(); ++ local_unlock_irq(workingset_shadow_lock); + cond_resched(); +- local_irq_disable(); ++ local_lock_irq(workingset_shadow_lock); + spin_lock(lru_lock); + return ret; + } +@@ -376,10 +377,10 @@ + unsigned long ret; + + /* list_lru lock nests inside IRQ-safe mapping->tree_lock */ +- local_irq_disable(); +- ret = list_lru_shrink_walk(&workingset_shadow_nodes, sc, ++ local_lock_irq(workingset_shadow_lock); ++ ret = list_lru_shrink_walk(&__workingset_shadow_nodes, sc, + shadow_lru_isolate, NULL); +- local_irq_enable(); ++ local_unlock_irq(workingset_shadow_lock); + return ret; + } + +@@ -400,7 +401,7 @@ + { + int ret; + +- ret = list_lru_init_key(&workingset_shadow_nodes, &shadow_nodes_key); ++ ret = list_lru_init_key(&__workingset_shadow_nodes, &shadow_nodes_key); + if (ret) + goto err; + ret = register_shrinker(&workingset_shadow_shrinker); +@@ -408,7 +409,7 @@ + goto err_list_lru; + return 0; + err_list_lru: +- list_lru_destroy(&workingset_shadow_nodes); ++ list_lru_destroy(&__workingset_shadow_nodes); + err: + return ret; + } +diff -Nur linux-4.1.26.orig/net/core/dev.c linux-4.1.26/net/core/dev.c +--- linux-4.1.26.orig/net/core/dev.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/core/dev.c 2016-06-19 15:30:58.839303211 +0200 +@@ -184,6 +184,7 @@ + static DEFINE_HASHTABLE(napi_hash, 8); + + static seqcount_t devnet_rename_seq; ++static DEFINE_MUTEX(devnet_rename_mutex); + + static inline void dev_base_seq_inc(struct net *net) + { +@@ -205,14 +206,14 @@ + static inline void rps_lock(struct softnet_data *sd) + { + #ifdef CONFIG_RPS +- spin_lock(&sd->input_pkt_queue.lock); ++ raw_spin_lock(&sd->input_pkt_queue.raw_lock); + #endif + } + + static inline void rps_unlock(struct softnet_data *sd) + { + #ifdef CONFIG_RPS +- spin_unlock(&sd->input_pkt_queue.lock); ++ raw_spin_unlock(&sd->input_pkt_queue.raw_lock); + #endif + } + +@@ -852,7 +853,8 @@ + strcpy(name, dev->name); + rcu_read_unlock(); + if (read_seqcount_retry(&devnet_rename_seq, seq)) { +- cond_resched(); ++ mutex_lock(&devnet_rename_mutex); ++ mutex_unlock(&devnet_rename_mutex); + goto retry; + } + +@@ -1121,20 +1123,17 @@ + if (dev->flags & IFF_UP) + return -EBUSY; + +- write_seqcount_begin(&devnet_rename_seq); ++ mutex_lock(&devnet_rename_mutex); ++ __raw_write_seqcount_begin(&devnet_rename_seq); + +- if (strncmp(newname, dev->name, IFNAMSIZ) == 0) { +- write_seqcount_end(&devnet_rename_seq); +- return 0; +- } ++ if (strncmp(newname, dev->name, IFNAMSIZ) == 0) ++ goto outunlock; + + memcpy(oldname, dev->name, IFNAMSIZ); + + err = dev_get_valid_name(net, dev, newname); +- if (err < 0) { +- write_seqcount_end(&devnet_rename_seq); +- return err; +- } ++ if (err < 0) ++ goto outunlock; + + if (oldname[0] && !strchr(oldname, '%')) + netdev_info(dev, "renamed from %s\n", oldname); +@@ -1147,11 +1146,12 @@ + if (ret) { + memcpy(dev->name, oldname, IFNAMSIZ); + dev->name_assign_type = old_assign_type; +- write_seqcount_end(&devnet_rename_seq); +- return ret; ++ err = ret; ++ goto outunlock; + } + +- write_seqcount_end(&devnet_rename_seq); ++ __raw_write_seqcount_end(&devnet_rename_seq); ++ mutex_unlock(&devnet_rename_mutex); + + netdev_adjacent_rename_links(dev, oldname); + +@@ -1172,7 +1172,8 @@ + /* err >= 0 after dev_alloc_name() or stores the first errno */ + if (err >= 0) { + err = ret; +- write_seqcount_begin(&devnet_rename_seq); ++ mutex_lock(&devnet_rename_mutex); ++ __raw_write_seqcount_begin(&devnet_rename_seq); + memcpy(dev->name, oldname, IFNAMSIZ); + memcpy(oldname, newname, IFNAMSIZ); + dev->name_assign_type = old_assign_type; +@@ -1185,6 +1186,11 @@ + } + + return err; ++ ++outunlock: ++ __raw_write_seqcount_end(&devnet_rename_seq); ++ mutex_unlock(&devnet_rename_mutex); ++ return err; + } + + /** +@@ -2214,6 +2220,7 @@ + sd->output_queue_tailp = &q->next_sched; + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + + void __netif_schedule(struct Qdisc *q) +@@ -2295,6 +2302,7 @@ + __this_cpu_write(softnet_data.completion_queue, skb); + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__dev_kfree_skb_irq); + +@@ -2880,9 +2888,44 @@ + #define skb_update_prio(skb) + #endif + ++#ifdef CONFIG_PREEMPT_RT_FULL ++ ++static inline int xmit_rec_read(void) ++{ ++ return current->xmit_recursion; ++} ++ ++static inline void xmit_rec_inc(void) ++{ ++ current->xmit_recursion++; ++} ++ ++static inline void xmit_rec_dec(void) ++{ ++ current->xmit_recursion--; ++} ++ ++#else ++ + DEFINE_PER_CPU(int, xmit_recursion); + EXPORT_SYMBOL(xmit_recursion); + ++static inline int xmit_rec_read(void) ++{ ++ return __this_cpu_read(xmit_recursion); ++} ++ ++static inline void xmit_rec_inc(void) ++{ ++ __this_cpu_inc(xmit_recursion); ++} ++ ++static inline int xmit_rec_dec(void) ++{ ++ __this_cpu_dec(xmit_recursion); ++} ++#endif ++ + #define RECURSION_LIMIT 10 + + /** +@@ -2984,7 +3027,7 @@ + + if (txq->xmit_lock_owner != cpu) { + +- if (__this_cpu_read(xmit_recursion) > RECURSION_LIMIT) ++ if (xmit_rec_read() > RECURSION_LIMIT) + goto recursion_alert; + + skb = validate_xmit_skb(skb, dev); +@@ -2994,9 +3037,9 @@ + HARD_TX_LOCK(dev, txq, cpu); + + if (!netif_xmit_stopped(txq)) { +- __this_cpu_inc(xmit_recursion); ++ xmit_rec_inc(); + skb = dev_hard_start_xmit(skb, dev, txq, &rc); +- __this_cpu_dec(xmit_recursion); ++ xmit_rec_dec(); + if (dev_xmit_complete(rc)) { + HARD_TX_UNLOCK(dev, txq); + goto out; +@@ -3370,6 +3413,7 @@ + rps_unlock(sd); + + local_irq_restore(flags); ++ preempt_check_resched_rt(); + + atomic_long_inc(&skb->dev->rx_dropped); + kfree_skb(skb); +@@ -3388,7 +3432,7 @@ + struct rps_dev_flow voidflow, *rflow = &voidflow; + int cpu; + +- preempt_disable(); ++ migrate_disable(); + rcu_read_lock(); + + cpu = get_rps_cpu(skb->dev, skb, &rflow); +@@ -3398,13 +3442,13 @@ + ret = enqueue_to_backlog(skb, cpu, &rflow->last_qtail); + + rcu_read_unlock(); +- preempt_enable(); ++ migrate_enable(); + } else + #endif + { + unsigned int qtail; +- ret = enqueue_to_backlog(skb, get_cpu(), &qtail); +- put_cpu(); ++ ret = enqueue_to_backlog(skb, get_cpu_light(), &qtail); ++ put_cpu_light(); + } + return ret; + } +@@ -3438,16 +3482,44 @@ + + trace_netif_rx_ni_entry(skb); + +- preempt_disable(); ++ local_bh_disable(); + err = netif_rx_internal(skb); +- if (local_softirq_pending()) +- do_softirq(); +- preempt_enable(); ++ local_bh_enable(); + + return err; + } + EXPORT_SYMBOL(netif_rx_ni); + ++#ifdef CONFIG_PREEMPT_RT_FULL ++/* ++ * RT runs ksoftirqd as a real time thread and the root_lock is a ++ * "sleeping spinlock". If the trylock fails then we can go into an ++ * infinite loop when ksoftirqd preempted the task which actually ++ * holds the lock, because we requeue q and raise NET_TX softirq ++ * causing ksoftirqd to loop forever. ++ * ++ * It's safe to use spin_lock on RT here as softirqs run in thread ++ * context and cannot deadlock against the thread which is holding ++ * root_lock. ++ * ++ * On !RT the trylock might fail, but there we bail out from the ++ * softirq loop after 10 attempts which we can't do on RT. And the ++ * task holding root_lock cannot be preempted, so the only downside of ++ * that trylock is that we need 10 loops to decide that we should have ++ * given up in the first one :) ++ */ ++static inline int take_root_lock(spinlock_t *lock) ++{ ++ spin_lock(lock); ++ return 1; ++} ++#else ++static inline int take_root_lock(spinlock_t *lock) ++{ ++ return spin_trylock(lock); ++} ++#endif ++ + static void net_tx_action(struct softirq_action *h) + { + struct softnet_data *sd = this_cpu_ptr(&softnet_data); +@@ -3489,7 +3561,7 @@ + head = head->next_sched; + + root_lock = qdisc_lock(q); +- if (spin_trylock(root_lock)) { ++ if (take_root_lock(root_lock)) { + smp_mb__before_atomic(); + clear_bit(__QDISC_STATE_SCHED, + &q->state); +@@ -3886,7 +3958,7 @@ + skb_queue_walk_safe(&sd->input_pkt_queue, skb, tmp) { + if (skb->dev == dev) { + __skb_unlink(skb, &sd->input_pkt_queue); +- kfree_skb(skb); ++ __skb_queue_tail(&sd->tofree_queue, skb); + input_queue_head_incr(sd); + } + } +@@ -3895,10 +3967,13 @@ + skb_queue_walk_safe(&sd->process_queue, skb, tmp) { + if (skb->dev == dev) { + __skb_unlink(skb, &sd->process_queue); +- kfree_skb(skb); ++ __skb_queue_tail(&sd->tofree_queue, skb); + input_queue_head_incr(sd); + } + } ++ ++ if (!skb_queue_empty(&sd->tofree_queue)) ++ raise_softirq_irqoff(NET_RX_SOFTIRQ); + } + + static int napi_gro_complete(struct sk_buff *skb) +@@ -4349,6 +4424,7 @@ + sd->rps_ipi_list = NULL; + + local_irq_enable(); ++ preempt_check_resched_rt(); + + /* Send pending IPI's to kick RPS processing on remote cpus. */ + while (remsd) { +@@ -4362,6 +4438,7 @@ + } else + #endif + local_irq_enable(); ++ preempt_check_resched_rt(); + } + + static bool sd_has_rps_ipi_waiting(struct softnet_data *sd) +@@ -4443,6 +4520,7 @@ + local_irq_save(flags); + ____napi_schedule(this_cpu_ptr(&softnet_data), n); + local_irq_restore(flags); ++ preempt_check_resched_rt(); + } + EXPORT_SYMBOL(__napi_schedule); + +@@ -4717,7 +4795,7 @@ + list_splice_tail(&repoll, &list); + list_splice(&list, &sd->poll_list); + if (!list_empty(&sd->poll_list)) +- __raise_softirq_irqoff(NET_RX_SOFTIRQ); ++ __raise_softirq_irqoff_ksoft(NET_RX_SOFTIRQ); + + net_rps_action_and_irq_enable(sd); + } +@@ -6931,7 +7009,7 @@ + void synchronize_net(void) + { + might_sleep(); +- if (rtnl_is_locked()) ++ if (rtnl_is_locked() && !IS_ENABLED(CONFIG_PREEMPT_RT_FULL)) + synchronize_rcu_expedited(); + else + synchronize_rcu(); +@@ -7172,16 +7250,20 @@ + + raise_softirq_irqoff(NET_TX_SOFTIRQ); + local_irq_enable(); ++ preempt_check_resched_rt(); + + /* Process offline CPU's input_pkt_queue */ + while ((skb = __skb_dequeue(&oldsd->process_queue))) { + netif_rx_ni(skb); + input_queue_head_incr(oldsd); + } +- while ((skb = skb_dequeue(&oldsd->input_pkt_queue))) { ++ while ((skb = __skb_dequeue(&oldsd->input_pkt_queue))) { + netif_rx_ni(skb); + input_queue_head_incr(oldsd); + } ++ while ((skb = __skb_dequeue(&oldsd->tofree_queue))) { ++ kfree_skb(skb); ++ } + + return NOTIFY_OK; + } +@@ -7483,8 +7565,9 @@ + for_each_possible_cpu(i) { + struct softnet_data *sd = &per_cpu(softnet_data, i); + +- skb_queue_head_init(&sd->input_pkt_queue); +- skb_queue_head_init(&sd->process_queue); ++ skb_queue_head_init_raw(&sd->input_pkt_queue); ++ skb_queue_head_init_raw(&sd->process_queue); ++ skb_queue_head_init_raw(&sd->tofree_queue); + INIT_LIST_HEAD(&sd->poll_list); + sd->output_queue_tailp = &sd->output_queue; + #ifdef CONFIG_RPS +diff -Nur linux-4.1.26.orig/net/core/skbuff.c linux-4.1.26/net/core/skbuff.c +--- linux-4.1.26.orig/net/core/skbuff.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/core/skbuff.c 2016-06-19 15:30:58.839303211 +0200 +@@ -63,6 +63,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -358,6 +359,8 @@ + }; + static DEFINE_PER_CPU(struct netdev_alloc_cache, netdev_alloc_cache); + static DEFINE_PER_CPU(struct netdev_alloc_cache, napi_alloc_cache); ++static DEFINE_LOCAL_IRQ_LOCK(netdev_alloc_lock); ++static DEFINE_LOCAL_IRQ_LOCK(napi_alloc_cache_lock); + + static struct page *__page_frag_refill(struct netdev_alloc_cache *nc, + gfp_t gfp_mask) +@@ -435,9 +438,9 @@ + unsigned long flags; + void *data; + +- local_irq_save(flags); ++ local_lock_irqsave(netdev_alloc_lock, flags); + data = __alloc_page_frag(&netdev_alloc_cache, fragsz, gfp_mask); +- local_irq_restore(flags); ++ local_unlock_irqrestore(netdev_alloc_lock, flags); + return data; + } + +@@ -456,7 +459,12 @@ + + static void *__napi_alloc_frag(unsigned int fragsz, gfp_t gfp_mask) + { +- return __alloc_page_frag(&napi_alloc_cache, fragsz, gfp_mask); ++ void *data; ++ ++ local_lock(napi_alloc_cache_lock); ++ data = __alloc_page_frag(&napi_alloc_cache, fragsz, gfp_mask); ++ local_unlock(napi_alloc_cache_lock); ++ return data; + } + + void *napi_alloc_frag(unsigned int fragsz) +diff -Nur linux-4.1.26.orig/net/core/sock.c linux-4.1.26/net/core/sock.c +--- linux-4.1.26.orig/net/core/sock.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/core/sock.c 2016-06-19 15:30:58.839303211 +0200 +@@ -2369,12 +2369,11 @@ + if (sk->sk_lock.owned) + __lock_sock(sk); + sk->sk_lock.owned = 1; +- spin_unlock(&sk->sk_lock.slock); ++ spin_unlock_bh(&sk->sk_lock.slock); + /* + * The sk_lock has mutex_lock() semantics here: + */ + mutex_acquire(&sk->sk_lock.dep_map, subclass, 0, _RET_IP_); +- local_bh_enable(); + } + EXPORT_SYMBOL(lock_sock_nested); + +diff -Nur linux-4.1.26.orig/net/ipv4/icmp.c linux-4.1.26/net/ipv4/icmp.c +--- linux-4.1.26.orig/net/ipv4/icmp.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/ipv4/icmp.c 2016-06-19 15:30:58.839303211 +0200 +@@ -69,6 +69,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -867,6 +868,30 @@ + } + + /* ++ * 32bit and 64bit have different timestamp length, so we check for ++ * the cookie at offset 20 and verify it is repeated at offset 50 ++ */ ++#define CO_POS0 20 ++#define CO_POS1 50 ++#define CO_SIZE sizeof(int) ++#define ICMP_SYSRQ_SIZE 57 ++ ++/* ++ * We got a ICMP_SYSRQ_SIZE sized ping request. Check for the cookie ++ * pattern and if it matches send the next byte as a trigger to sysrq. ++ */ ++static void icmp_check_sysrq(struct net *net, struct sk_buff *skb) ++{ ++ int cookie = htonl(net->ipv4.sysctl_icmp_echo_sysrq); ++ char *p = skb->data; ++ ++ if (!memcmp(&cookie, p + CO_POS0, CO_SIZE) && ++ !memcmp(&cookie, p + CO_POS1, CO_SIZE) && ++ p[CO_POS0 + CO_SIZE] == p[CO_POS1 + CO_SIZE]) ++ handle_sysrq(p[CO_POS0 + CO_SIZE]); ++} ++ ++/* + * Handle ICMP_ECHO ("ping") requests. + * + * RFC 1122: 3.2.2.6 MUST have an echo server that answers ICMP echo +@@ -893,6 +918,11 @@ + icmp_param.data_len = skb->len; + icmp_param.head_len = sizeof(struct icmphdr); + icmp_reply(&icmp_param, skb); ++ ++ if (skb->len == ICMP_SYSRQ_SIZE && ++ net->ipv4.sysctl_icmp_echo_sysrq) { ++ icmp_check_sysrq(net, skb); ++ } + } + /* should there be an ICMP stat for ignored echos? */ + return true; +diff -Nur linux-4.1.26.orig/net/ipv4/sysctl_net_ipv4.c linux-4.1.26/net/ipv4/sysctl_net_ipv4.c +--- linux-4.1.26.orig/net/ipv4/sysctl_net_ipv4.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/ipv4/sysctl_net_ipv4.c 2016-06-19 15:30:58.839303211 +0200 +@@ -779,6 +779,13 @@ + .proc_handler = proc_dointvec + }, + { ++ .procname = "icmp_echo_sysrq", ++ .data = &init_net.ipv4.sysctl_icmp_echo_sysrq, ++ .maxlen = sizeof(int), ++ .mode = 0644, ++ .proc_handler = proc_dointvec ++ }, ++ { + .procname = "icmp_ignore_bogus_error_responses", + .data = &init_net.ipv4.sysctl_icmp_ignore_bogus_error_responses, + .maxlen = sizeof(int), +diff -Nur linux-4.1.26.orig/net/mac80211/rx.c linux-4.1.26/net/mac80211/rx.c +--- linux-4.1.26.orig/net/mac80211/rx.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/mac80211/rx.c 2016-06-19 15:30:58.839303211 +0200 +@@ -3573,7 +3573,7 @@ + struct ieee80211_supported_band *sband; + struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); + +- WARN_ON_ONCE(softirq_count() == 0); ++ WARN_ON_ONCE_NONRT(softirq_count() == 0); + + if (WARN_ON(status->band >= IEEE80211_NUM_BANDS)) + goto drop; +diff -Nur linux-4.1.26.orig/net/netfilter/core.c linux-4.1.26/net/netfilter/core.c +--- linux-4.1.26.orig/net/netfilter/core.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/netfilter/core.c 2016-06-19 15:30:58.839303211 +0200 +@@ -22,11 +22,17 @@ + #include + #include + #include ++#include + #include + #include + + #include "nf_internals.h" + ++#ifdef CONFIG_PREEMPT_RT_BASE ++DEFINE_LOCAL_IRQ_LOCK(xt_write_lock); ++EXPORT_PER_CPU_SYMBOL(xt_write_lock); ++#endif ++ + static DEFINE_MUTEX(afinfo_mutex); + + const struct nf_afinfo __rcu *nf_afinfo[NFPROTO_NUMPROTO] __read_mostly; +diff -Nur linux-4.1.26.orig/net/packet/af_packet.c linux-4.1.26/net/packet/af_packet.c +--- linux-4.1.26.orig/net/packet/af_packet.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/packet/af_packet.c 2016-06-19 15:30:58.839303211 +0200 +@@ -63,6 +63,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -698,7 +699,7 @@ + if (BLOCK_NUM_PKTS(pbd)) { + while (atomic_read(&pkc->blk_fill_in_prog)) { + /* Waiting for skb_copy_bits to finish... */ +- cpu_relax(); ++ cpu_chill(); + } + } + +@@ -960,7 +961,7 @@ + if (!(status & TP_STATUS_BLK_TMO)) { + while (atomic_read(&pkc->blk_fill_in_prog)) { + /* Waiting for skb_copy_bits to finish... */ +- cpu_relax(); ++ cpu_chill(); + } + } + prb_close_block(pkc, pbd, po, status); +diff -Nur linux-4.1.26.orig/net/rds/ib_rdma.c linux-4.1.26/net/rds/ib_rdma.c +--- linux-4.1.26.orig/net/rds/ib_rdma.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/rds/ib_rdma.c 2016-06-19 15:30:58.843303365 +0200 +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + + #include "rds.h" + #include "ib.h" +@@ -286,7 +287,7 @@ + for_each_online_cpu(cpu) { + flag = &per_cpu(clean_list_grace, cpu); + while (test_bit(CLEAN_LIST_BUSY_BIT, flag)) +- cpu_relax(); ++ cpu_chill(); + } + } + +diff -Nur linux-4.1.26.orig/net/sched/sch_generic.c linux-4.1.26/net/sched/sch_generic.c +--- linux-4.1.26.orig/net/sched/sch_generic.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/sched/sch_generic.c 2016-06-19 15:30:58.843303365 +0200 +@@ -896,7 +896,7 @@ + /* Wait for outstanding qdisc_run calls. */ + list_for_each_entry(dev, head, close_list) + while (some_qdisc_is_busy(dev)) +- yield(); ++ msleep(1); + } + + void dev_deactivate(struct net_device *dev) +diff -Nur linux-4.1.26.orig/net/sunrpc/svc_xprt.c linux-4.1.26/net/sunrpc/svc_xprt.c +--- linux-4.1.26.orig/net/sunrpc/svc_xprt.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/net/sunrpc/svc_xprt.c 2016-06-19 15:30:58.843303365 +0200 +@@ -341,7 +341,7 @@ + goto out; + } + +- cpu = get_cpu(); ++ cpu = get_cpu_light(); + pool = svc_pool_for_cpu(xprt->xpt_server, cpu); + + atomic_long_inc(&pool->sp_stats.packets); +@@ -377,7 +377,7 @@ + + atomic_long_inc(&pool->sp_stats.threads_woken); + wake_up_process(rqstp->rq_task); +- put_cpu(); ++ put_cpu_light(); + goto out; + } + rcu_read_unlock(); +@@ -398,7 +398,7 @@ + goto redo_search; + } + rqstp = NULL; +- put_cpu(); ++ put_cpu_light(); + out: + trace_svc_xprt_do_enqueue(xprt, rqstp); + } +diff -Nur linux-4.1.26.orig/scripts/mkcompile_h linux-4.1.26/scripts/mkcompile_h +--- linux-4.1.26.orig/scripts/mkcompile_h 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/scripts/mkcompile_h 2016-06-19 15:30:58.843303365 +0200 +@@ -4,7 +4,8 @@ + ARCH=$2 + SMP=$3 + PREEMPT=$4 +-CC=$5 ++RT=$5 ++CC=$6 + + vecho() { [ "${quiet}" = "silent_" ] || echo "$@" ; } + +@@ -57,6 +58,7 @@ + CONFIG_FLAGS="" + if [ -n "$SMP" ] ; then CONFIG_FLAGS="SMP"; fi + if [ -n "$PREEMPT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS PREEMPT"; fi ++if [ -n "$RT" ] ; then CONFIG_FLAGS="$CONFIG_FLAGS RT"; fi + UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP" + + # Truncate to maximum length +diff -Nur linux-4.1.26.orig/sound/core/pcm_native.c linux-4.1.26/sound/core/pcm_native.c +--- linux-4.1.26.orig/sound/core/pcm_native.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/sound/core/pcm_native.c 2016-06-19 15:30:58.843303365 +0200 +@@ -135,7 +135,7 @@ + void snd_pcm_stream_lock_irq(struct snd_pcm_substream *substream) + { + if (!substream->pcm->nonatomic) +- local_irq_disable(); ++ local_irq_disable_nort(); + snd_pcm_stream_lock(substream); + } + EXPORT_SYMBOL_GPL(snd_pcm_stream_lock_irq); +@@ -150,7 +150,7 @@ + { + snd_pcm_stream_unlock(substream); + if (!substream->pcm->nonatomic) +- local_irq_enable(); ++ local_irq_enable_nort(); + } + EXPORT_SYMBOL_GPL(snd_pcm_stream_unlock_irq); + +@@ -158,7 +158,7 @@ + { + unsigned long flags = 0; + if (!substream->pcm->nonatomic) +- local_irq_save(flags); ++ local_irq_save_nort(flags); + snd_pcm_stream_lock(substream); + return flags; + } +@@ -176,7 +176,7 @@ + { + snd_pcm_stream_unlock(substream); + if (!substream->pcm->nonatomic) +- local_irq_restore(flags); ++ local_irq_restore_nort(flags); + } + EXPORT_SYMBOL_GPL(snd_pcm_stream_unlock_irqrestore); + +diff -Nur linux-4.1.26.orig/sound/soc/intel/atom/sst/sst.c linux-4.1.26/sound/soc/intel/atom/sst/sst.c +--- linux-4.1.26.orig/sound/soc/intel/atom/sst/sst.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/sound/soc/intel/atom/sst/sst.c 2016-06-19 15:30:58.843303365 +0200 +@@ -368,8 +368,8 @@ + * initialize by FW or driver when firmware is loaded + */ + spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags); +- sst_shim_write64(shim, SST_IMRX, shim_regs->imrx), +- sst_shim_write64(shim, SST_CSR, shim_regs->csr), ++ sst_shim_write64(shim, SST_IMRX, shim_regs->imrx); ++ sst_shim_write64(shim, SST_CSR, shim_regs->csr); + spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags); + } + +diff -Nur linux-4.1.26.orig/virt/kvm/async_pf.c linux-4.1.26/virt/kvm/async_pf.c +--- linux-4.1.26.orig/virt/kvm/async_pf.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/virt/kvm/async_pf.c 2016-06-19 15:30:58.843303365 +0200 +@@ -94,8 +94,8 @@ + + trace_kvm_async_pf_completed(addr, gva); + +- if (waitqueue_active(&vcpu->wq)) +- wake_up_interruptible(&vcpu->wq); ++ if (swaitqueue_active(&vcpu->wq)) ++ swait_wake_interruptible(&vcpu->wq); + + mmput(mm); + kvm_put_kvm(vcpu->kvm); +diff -Nur linux-4.1.26.orig/virt/kvm/kvm_main.c linux-4.1.26/virt/kvm/kvm_main.c +--- linux-4.1.26.orig/virt/kvm/kvm_main.c 2016-06-07 01:13:11.000000000 +0200 ++++ linux-4.1.26/virt/kvm/kvm_main.c 2016-06-19 15:30:58.843303365 +0200 +@@ -218,7 +218,7 @@ + vcpu->kvm = kvm; + vcpu->vcpu_id = id; + vcpu->pid = NULL; +- init_waitqueue_head(&vcpu->wq); ++ init_swait_head(&vcpu->wq); + kvm_async_pf_vcpu_init(vcpu); + + page = alloc_page(GFP_KERNEL | __GFP_ZERO); +@@ -1780,7 +1780,7 @@ + void kvm_vcpu_block(struct kvm_vcpu *vcpu) + { + ktime_t start, cur; +- DEFINE_WAIT(wait); ++ DEFINE_SWAITER(wait); + bool waited = false; + + start = cur = ktime_get(); +@@ -1801,7 +1801,7 @@ + } + + for (;;) { +- prepare_to_wait(&vcpu->wq, &wait, TASK_INTERRUPTIBLE); ++ swait_prepare(&vcpu->wq, &wait, TASK_INTERRUPTIBLE); + + if (kvm_vcpu_check_block(vcpu) < 0) + break; +@@ -1810,7 +1810,7 @@ + schedule(); + } + +- finish_wait(&vcpu->wq, &wait); ++ swait_finish(&vcpu->wq, &wait); + cur = ktime_get(); + + out: +@@ -1826,11 +1826,11 @@ + { + int me; + int cpu = vcpu->cpu; +- wait_queue_head_t *wqp; ++ struct swait_head *wqp; + + wqp = kvm_arch_vcpu_wq(vcpu); +- if (waitqueue_active(wqp)) { +- wake_up_interruptible(wqp); ++ if (swaitqueue_active(wqp)) { ++ swait_wake_interruptible(wqp); + ++vcpu->stat.halt_wakeup; + } + +@@ -1931,7 +1931,7 @@ + continue; + if (vcpu == me) + continue; +- if (waitqueue_active(&vcpu->wq) && !kvm_arch_vcpu_runnable(vcpu)) ++ if (swaitqueue_active(&vcpu->wq) && !kvm_arch_vcpu_runnable(vcpu)) + continue; + if (!kvm_vcpu_eligible_for_directed_yield(vcpu)) + continue; diff --git a/target/linux/patches/4.1.35/regmap-default-on.patch b/target/linux/patches/4.1.35/regmap-default-on.patch new file mode 100644 index 000000000..8d72224bf --- /dev/null +++ b/target/linux/patches/4.1.35/regmap-default-on.patch @@ -0,0 +1,17 @@ +diff -Nur linux-4.1.6.orig/drivers/base/regmap/Kconfig linux-4.1.6/drivers/base/regmap/Kconfig +--- linux-4.1.6.orig/drivers/base/regmap/Kconfig 2015-08-17 05:52:51.000000000 +0200 ++++ linux-4.1.6/drivers/base/regmap/Kconfig 2015-08-29 22:18:50.329683337 +0200 +@@ -3,7 +3,7 @@ + # subsystems should select the appropriate symbols. + + config REGMAP +- default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ) ++ default y + select LZO_COMPRESS + select LZO_DECOMPRESS + select IRQ_DOMAIN if REGMAP_IRQ +@@ -29,3 +29,4 @@ + + config REGMAP_IRQ + bool ++ default y diff --git a/target/linux/patches/4.1.35/remove-warn.patch b/target/linux/patches/4.1.35/remove-warn.patch new file mode 100644 index 000000000..1f89c710d --- /dev/null +++ b/target/linux/patches/4.1.35/remove-warn.patch @@ -0,0 +1,11 @@ +diff -Nur linux-4.1.10.orig/drivers/media/v4l2-core/videobuf2-core.c linux-4.1.10/drivers/media/v4l2-core/videobuf2-core.c +--- linux-4.1.10.orig/drivers/media/v4l2-core/videobuf2-core.c 2015-10-03 13:49:38.000000000 +0200 ++++ linux-4.1.10/drivers/media/v4l2-core/videobuf2-core.c 2015-10-18 18:18:47.000000000 +0200 +@@ -1245,7 +1245,6 @@ + return; + + __check_once = true; +- __WARN(); + + pr_warn_once("use of bytesused == 0 is deprecated and will be removed in the future,\n"); + if (vb->vb2_queue->allow_zero_bytesused) diff --git a/target/linux/patches/4.1.35/startup.patch b/target/linux/patches/4.1.35/startup.patch new file mode 100644 index 000000000..d396b75e4 --- /dev/null +++ b/target/linux/patches/4.1.35/startup.patch @@ -0,0 +1,37 @@ +diff -Nur linux-3.13.3.orig/init/main.c linux-3.13.3/init/main.c +--- linux-3.13.3.orig/init/main.c 2014-02-13 23:00:14.000000000 +0100 ++++ linux-3.13.3/init/main.c 2014-02-17 11:35:14.000000000 +0100 +@@ -916,6 +917,8 @@ + if (sys_open((const char __user *) "/dev/console", O_RDWR, 0) < 0) + pr_err("Warning: unable to open an initial console.\n"); + ++ printk(KERN_WARNING "Starting Linux (built with OpenADK).\n"); ++ + (void) sys_dup(0); + (void) sys_dup(0); + /* +diff -Nur linux-3.13.6.orig/init/initramfs.c linux-3.13.6/init/initramfs.c +--- linux-3.13.6.orig/init/initramfs.c 2014-03-07 07:07:02.000000000 +0100 ++++ linux-3.13.6/init/initramfs.c 2014-03-15 12:11:31.882731916 +0100 +@@ -622,6 +622,9 @@ + */ + load_default_modules(); + } ++#ifdef CONFIG_DEVTMPFS_MOUNT ++ devtmpfs_mount("dev"); ++#endif + return 0; + } + rootfs_initcall(populate_rootfs); +diff -Nur linux-3.13.6.orig/init/main.c linux-3.13.6/init/main.c +--- linux-3.13.6.orig/init/main.c 2014-03-07 07:07:02.000000000 +0100 ++++ linux-3.13.6/init/main.c 2014-03-15 12:13:16.459024452 +0100 +@@ -924,7 +924,7 @@ + */ + + if (!ramdisk_execute_command) +- ramdisk_execute_command = "/init"; ++ ramdisk_execute_command = "/sbin/init"; + + if (sys_access((const char __user *) ramdisk_execute_command, 0) != 0) { + ramdisk_execute_command = NULL; diff --git a/target/linux/patches/4.1.35/use-gawk.patch b/target/linux/patches/4.1.35/use-gawk.patch new file mode 100644 index 000000000..5b312589d --- /dev/null +++ b/target/linux/patches/4.1.35/use-gawk.patch @@ -0,0 +1,24 @@ +diff -Nur linux-4.1.20.orig/Makefile linux-4.1.20/Makefile +--- linux-4.1.20.orig/Makefile 2016-03-17 19:11:03.000000000 +0100 ++++ linux-4.1.20/Makefile 2016-04-02 13:24:23.000000000 +0200 +@@ -359,7 +359,7 @@ + STRIP = $(CROSS_COMPILE)strip + OBJCOPY = $(CROSS_COMPILE)objcopy + OBJDUMP = $(CROSS_COMPILE)objdump +-AWK = awk ++AWK = gawk + GENKSYMS = scripts/genksyms/genksyms + INSTALLKERNEL := installkernel + DEPMOD = /sbin/depmod +diff -Nur linux-4.1.20.orig/lib/raid6/test/Makefile linux-4.1.20/lib/raid6/test/Makefile +--- linux-4.1.20.orig/lib/raid6/test/Makefile 2016-03-17 19:11:03.000000000 +0100 ++++ linux-4.1.20/lib/raid6/test/Makefile 2016-04-02 09:45:15.000000000 +0200 +@@ -7,7 +7,7 @@ + OPTFLAGS = -O2 # Adjust as desired + CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS) + LD = ld +-AWK = awk -f ++AWK = gawk -f + AR = ar + RANLIB = ranlib + OBJS = int1.o int2.o int4.o int8.o int16.o int32.o recov.o algos.o tables.o diff --git a/target/linux/patches/4.1.35/use-libgcc-for-sh.patch b/target/linux/patches/4.1.35/use-libgcc-for-sh.patch new file mode 100644 index 000000000..6420219b0 --- /dev/null +++ b/target/linux/patches/4.1.35/use-libgcc-for-sh.patch @@ -0,0 +1,29 @@ +diff -Nur linux-4.1.13.orig/arch/sh/Makefile linux-4.1.13/arch/sh/Makefile +--- linux-4.1.13.orig/arch/sh/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/Makefile 2015-12-06 19:59:31.000000000 +0100 +@@ -200,7 +206,9 @@ + KBUILD_CFLAGS += -fasynchronous-unwind-tables + endif + +-libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) ++LIBGCC = $(shell $(CC) $(KBUILD_CFLAGS) -print-file-name=libgcc.a) ++ ++libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) $(LIBGCC) + libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) + + BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.xz uImage.lzo \ +diff -Nur linux-4.1.13.orig/arch/sh/lib/Makefile linux-4.1.13/arch/sh/lib/Makefile +--- linux-4.1.13.orig/arch/sh/lib/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/sh/lib/Makefile 2015-12-06 19:59:14.000000000 +0100 +@@ -5,11 +5,6 @@ + lib-y = delay.o memmove.o memchr.o \ + checksum.o strlen.o div64.o div64-generic.o + +-# Extracted from libgcc +-obj-y += movmem.o ashldi3.o ashrdi3.o lshrdi3.o \ +- ashlsi3.o ashrsi3.o ashiftrt.o lshrsi3.o \ +- udiv_qrnnd.o +- + udivsi3-y := udivsi3_i4i-Os.o + + ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y) diff --git a/target/m68k/qemu-m68k-mcf5208/patches/4.1.30/m68k-coldfire-fec.patch b/target/m68k/qemu-m68k-mcf5208/patches/4.1.30/m68k-coldfire-fec.patch deleted file mode 100644 index 690befe8f..000000000 --- a/target/m68k/qemu-m68k-mcf5208/patches/4.1.30/m68k-coldfire-fec.patch +++ /dev/null @@ -1,118 +0,0 @@ -diff -Nur linux-4.1.10.orig/drivers/net/ethernet/freescale/fec_main.c linux-4.1.10/drivers/net/ethernet/freescale/fec_main.c ---- linux-4.1.10.orig/drivers/net/ethernet/freescale/fec_main.c 2015-10-03 13:49:38.000000000 +0200 -+++ linux-4.1.10/drivers/net/ethernet/freescale/fec_main.c 2015-10-31 18:05:40.000000000 +0100 -@@ -137,7 +137,7 @@ - module_param_array(macaddr, byte, NULL, 0); - MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); - --#if defined(CONFIG_M5272) -+#if defined(CONFIG_COLDFIRE) - /* - * Some hardware gets it MAC address out of local flash memory. - * if this is non-zero then assume it is the address to get MAC from. -@@ -155,7 +155,7 @@ - #else - #define FEC_FLASHMAC 0 - #endif --#endif /* CONFIG_M5272 */ -+#endif /* CONFIG_COLDFIRE */ - - /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets. - */ -@@ -969,7 +969,7 @@ - /* Set MII speed */ - writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); - --#if !defined(CONFIG_M5272) -+#if !defined(CONFIG_COLDFIRE) - /* set RX checksum */ - val = readl(fep->hwp + FEC_RACC); - if (fep->csum_flags & FLAG_RX_CSUM_ENABLED) -@@ -1033,7 +1033,7 @@ - #endif - } - --#if !defined(CONFIG_M5272) -+#if !defined(CONFIG_COLDFIRE) - /* enable pause frame*/ - if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) || - ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) && -@@ -1051,13 +1051,13 @@ - } else { - rcntl &= ~FEC_ENET_FCE; - } --#endif /* !defined(CONFIG_M5272) */ -+#endif /* !defined(CONFIG_COLDFIRE) */ - - writel(rcntl, fep->hwp + FEC_R_CNTRL); - - /* Setup multicast filter. */ - set_multicast_list(ndev); --#ifndef CONFIG_M5272 -+#ifndef CONFIG_COLDFIRE - writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); - writel(0, fep->hwp + FEC_HASH_TABLE_LOW); - #endif -@@ -1072,7 +1072,7 @@ - if (fep->bufdesc_ex) - ecntl |= (1 << 4); - --#ifndef CONFIG_M5272 -+#ifndef CONFIG_COLDFIRE - /* Enable the MIB statistic event counters */ - writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); - #endif -@@ -1657,7 +1657,7 @@ - * 3) from flash or fuse (via platform data) - */ - if (!is_valid_ether_addr(iap)) { --#ifdef CONFIG_M5272 -+#ifdef CONFIG_COLDFIRE - if (FEC_FLASHMAC) - iap = (unsigned char *)FEC_FLASHMAC; - #else -@@ -1931,7 +1931,7 @@ - if (fep->quirks & FEC_QUIRK_HAS_GBIT) { - phy_dev->supported &= PHY_GBIT_FEATURES; - phy_dev->supported &= ~SUPPORTED_1000baseT_Half; --#if !defined(CONFIG_M5272) -+#if !defined(CONFIG_COLDFIRE) - phy_dev->supported |= SUPPORTED_Pause; - #endif - } -@@ -2148,7 +2148,7 @@ - } - } - --#if !defined(CONFIG_M5272) -+#if !defined(CONFIG_COLDFIRE) - - static void fec_enet_get_pauseparam(struct net_device *ndev, - struct ethtool_pauseparam *pause) -@@ -2303,7 +2303,7 @@ - return -EOPNOTSUPP; - } - } --#endif /* !defined(CONFIG_M5272) */ -+#endif /* !defined(CONFIG_COLDFIRE) */ - - static int fec_enet_nway_reset(struct net_device *dev) - { -@@ -2520,7 +2520,7 @@ - .get_link = ethtool_op_get_link, - .get_coalesce = fec_enet_get_coalesce, - .set_coalesce = fec_enet_set_coalesce, --#ifndef CONFIG_M5272 -+#ifndef CONFIG_COLDFIRE - .get_pauseparam = fec_enet_get_pauseparam, - .set_pauseparam = fec_enet_set_pauseparam, - .get_strings = fec_enet_get_strings, -@@ -3220,7 +3220,7 @@ - fep->num_rx_queues = num_rx_qs; - fep->num_tx_queues = num_tx_qs; - --#if !defined(CONFIG_M5272) -+#if !defined(CONFIG_COLDFIRE) - /* default enable pause frame auto negotiation */ - if (fep->quirks & FEC_QUIRK_HAS_GBIT) - fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; diff --git a/target/m68k/qemu-m68k-mcf5208/patches/4.1.35/m68k-coldfire-fec.patch b/target/m68k/qemu-m68k-mcf5208/patches/4.1.35/m68k-coldfire-fec.patch new file mode 100644 index 000000000..690befe8f --- /dev/null +++ b/target/m68k/qemu-m68k-mcf5208/patches/4.1.35/m68k-coldfire-fec.patch @@ -0,0 +1,118 @@ +diff -Nur linux-4.1.10.orig/drivers/net/ethernet/freescale/fec_main.c linux-4.1.10/drivers/net/ethernet/freescale/fec_main.c +--- linux-4.1.10.orig/drivers/net/ethernet/freescale/fec_main.c 2015-10-03 13:49:38.000000000 +0200 ++++ linux-4.1.10/drivers/net/ethernet/freescale/fec_main.c 2015-10-31 18:05:40.000000000 +0100 +@@ -137,7 +137,7 @@ + module_param_array(macaddr, byte, NULL, 0); + MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); + +-#if defined(CONFIG_M5272) ++#if defined(CONFIG_COLDFIRE) + /* + * Some hardware gets it MAC address out of local flash memory. + * if this is non-zero then assume it is the address to get MAC from. +@@ -155,7 +155,7 @@ + #else + #define FEC_FLASHMAC 0 + #endif +-#endif /* CONFIG_M5272 */ ++#endif /* CONFIG_COLDFIRE */ + + /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets. + */ +@@ -969,7 +969,7 @@ + /* Set MII speed */ + writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); + +-#if !defined(CONFIG_M5272) ++#if !defined(CONFIG_COLDFIRE) + /* set RX checksum */ + val = readl(fep->hwp + FEC_RACC); + if (fep->csum_flags & FLAG_RX_CSUM_ENABLED) +@@ -1033,7 +1033,7 @@ + #endif + } + +-#if !defined(CONFIG_M5272) ++#if !defined(CONFIG_COLDFIRE) + /* enable pause frame*/ + if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) || + ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) && +@@ -1051,13 +1051,13 @@ + } else { + rcntl &= ~FEC_ENET_FCE; + } +-#endif /* !defined(CONFIG_M5272) */ ++#endif /* !defined(CONFIG_COLDFIRE) */ + + writel(rcntl, fep->hwp + FEC_R_CNTRL); + + /* Setup multicast filter. */ + set_multicast_list(ndev); +-#ifndef CONFIG_M5272 ++#ifndef CONFIG_COLDFIRE + writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); + writel(0, fep->hwp + FEC_HASH_TABLE_LOW); + #endif +@@ -1072,7 +1072,7 @@ + if (fep->bufdesc_ex) + ecntl |= (1 << 4); + +-#ifndef CONFIG_M5272 ++#ifndef CONFIG_COLDFIRE + /* Enable the MIB statistic event counters */ + writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); + #endif +@@ -1657,7 +1657,7 @@ + * 3) from flash or fuse (via platform data) + */ + if (!is_valid_ether_addr(iap)) { +-#ifdef CONFIG_M5272 ++#ifdef CONFIG_COLDFIRE + if (FEC_FLASHMAC) + iap = (unsigned char *)FEC_FLASHMAC; + #else +@@ -1931,7 +1931,7 @@ + if (fep->quirks & FEC_QUIRK_HAS_GBIT) { + phy_dev->supported &= PHY_GBIT_FEATURES; + phy_dev->supported &= ~SUPPORTED_1000baseT_Half; +-#if !defined(CONFIG_M5272) ++#if !defined(CONFIG_COLDFIRE) + phy_dev->supported |= SUPPORTED_Pause; + #endif + } +@@ -2148,7 +2148,7 @@ + } + } + +-#if !defined(CONFIG_M5272) ++#if !defined(CONFIG_COLDFIRE) + + static void fec_enet_get_pauseparam(struct net_device *ndev, + struct ethtool_pauseparam *pause) +@@ -2303,7 +2303,7 @@ + return -EOPNOTSUPP; + } + } +-#endif /* !defined(CONFIG_M5272) */ ++#endif /* !defined(CONFIG_COLDFIRE) */ + + static int fec_enet_nway_reset(struct net_device *dev) + { +@@ -2520,7 +2520,7 @@ + .get_link = ethtool_op_get_link, + .get_coalesce = fec_enet_get_coalesce, + .set_coalesce = fec_enet_set_coalesce, +-#ifndef CONFIG_M5272 ++#ifndef CONFIG_COLDFIRE + .get_pauseparam = fec_enet_get_pauseparam, + .set_pauseparam = fec_enet_set_pauseparam, + .get_strings = fec_enet_get_strings, +@@ -3220,7 +3220,7 @@ + fep->num_rx_queues = num_rx_qs; + fep->num_tx_queues = num_tx_qs; + +-#if !defined(CONFIG_M5272) ++#if !defined(CONFIG_COLDFIRE) + /* default enable pause frame auto negotiation */ + if (fep->quirks & FEC_QUIRK_HAS_GBIT) + fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; diff --git a/target/mips/ath79/patches/4.1.30/0001-openwrt-ath79.patch b/target/mips/ath79/patches/4.1.30/0001-openwrt-ath79.patch deleted file mode 100644 index 4178f20cb..000000000 --- a/target/mips/ath79/patches/4.1.30/0001-openwrt-ath79.patch +++ /dev/null @@ -1,47200 +0,0 @@ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/clock.c linux-4.1.13/arch/mips/ath79/clock.c ---- linux-4.1.13.orig/arch/mips/ath79/clock.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/clock.c 2015-12-04 19:57:05.422010155 +0100 -@@ -25,7 +25,7 @@ - #include "common.h" - - #define AR71XX_BASE_FREQ 40000000 --#define AR724X_BASE_FREQ 5000000 -+#define AR724X_BASE_FREQ 40000000 - #define AR913X_BASE_FREQ 5000000 - - struct clk { -@@ -99,8 +99,8 @@ - div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK); - freq = div * ref_rate; - -- div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK); -- freq *= div; -+ div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK) * 2; -+ freq /= div; - - cpu_rate = freq; - -@@ -350,6 +350,91 @@ - iounmap(dpll_base); - } - -+static void __init qca953x_clocks_init(void) -+{ -+ unsigned long ref_rate; -+ unsigned long cpu_rate; -+ unsigned long ddr_rate; -+ unsigned long ahb_rate; -+ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; -+ u32 cpu_pll, ddr_pll; -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40) -+ ref_rate = 40 * 1000 * 1000; -+ else -+ ref_rate = 25 * 1000 * 1000; -+ -+ pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_REFDIV_MASK; -+ nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_NINT_MASK; -+ frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_NFRAC_MASK; -+ -+ cpu_pll = nint * ref_rate / ref_div; -+ cpu_pll += frac * (ref_rate >> 6) / ref_div; -+ cpu_pll /= (1 << out_div); -+ -+ pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_REFDIV_MASK; -+ nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_NINT_MASK; -+ frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_NFRAC_MASK; -+ -+ ddr_pll = nint * ref_rate / ref_div; -+ ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); -+ ddr_pll /= (1 << out_div); -+ -+ clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); -+ -+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & -+ QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) -+ cpu_rate = ref_rate; -+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) -+ cpu_rate = cpu_pll / (postdiv + 1); -+ else -+ cpu_rate = ddr_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & -+ QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) -+ ddr_rate = ref_rate; -+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) -+ ddr_rate = ddr_pll / (postdiv + 1); -+ else -+ ddr_rate = cpu_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & -+ QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) -+ ahb_rate = ref_rate; -+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) -+ ahb_rate = ddr_pll / (postdiv + 1); -+ else -+ ahb_rate = cpu_pll / (postdiv + 1); -+ -+ ath79_add_sys_clkdev("ref", ref_rate); -+ ath79_add_sys_clkdev("cpu", cpu_rate); -+ ath79_add_sys_clkdev("ddr", ddr_rate); -+ ath79_add_sys_clkdev("ahb", ahb_rate); -+ -+ clk_add_alias("wdt", NULL, "ref", NULL); -+ clk_add_alias("uart", NULL, "ref", NULL); -+} -+ - static void __init qca955x_clocks_init(void) - { - unsigned long ref_rate; -@@ -435,6 +520,100 @@ - clk_add_alias("uart", NULL, "ref", NULL); - } - -+static void __init qca956x_clocks_init(void) -+{ -+ unsigned long ref_rate; -+ unsigned long cpu_rate; -+ unsigned long ddr_rate; -+ unsigned long ahb_rate; -+ u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; -+ u32 cpu_pll, ddr_pll; -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & QCA956X_BOOTSTRAP_REF_CLK_40) -+ ref_rate = 40 * 1000 * 1000; -+ else -+ ref_rate = 25 * 1000 * 1000; -+ -+ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG_REFDIV_MASK; -+ -+ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG); -+ nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG1_NINT_MASK; -+ hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK; -+ lfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK; -+ -+ cpu_pll = nint * ref_rate / ref_div; -+ cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); -+ cpu_pll += (hfrac >> 13) * ref_rate / ref_div; -+ cpu_pll /= (1 << out_div); -+ -+ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG_REFDIV_MASK; -+ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); -+ nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG1_NINT_MASK; -+ hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK; -+ lfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK; -+ -+ ddr_pll = nint * ref_rate / ref_div; -+ ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); -+ ddr_pll += (hfrac >> 13) * ref_rate / ref_div; -+ ddr_pll /= (1 << out_div); -+ -+ clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); -+ -+ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & -+ QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS) -+ cpu_rate = ref_rate; -+ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL) -+ cpu_rate = ddr_pll / (postdiv + 1); -+ else -+ cpu_rate = cpu_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & -+ QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS) -+ ddr_rate = ref_rate; -+ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL) -+ ddr_rate = cpu_pll / (postdiv + 1); -+ else -+ ddr_rate = ddr_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & -+ QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS) -+ ahb_rate = ref_rate; -+ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) -+ ahb_rate = ddr_pll / (postdiv + 1); -+ else -+ ahb_rate = cpu_pll / (postdiv + 1); -+ -+ ath79_add_sys_clkdev("ref", ref_rate); -+ ath79_add_sys_clkdev("cpu", cpu_rate); -+ ath79_add_sys_clkdev("ddr", ddr_rate); -+ ath79_add_sys_clkdev("ahb", ahb_rate); -+ -+ clk_add_alias("wdt", NULL, "ref", NULL); -+ clk_add_alias("uart", NULL, "ref", NULL); -+} -+ - void __init ath79_clocks_init(void) - { - if (soc_is_ar71xx()) -@@ -447,8 +626,12 @@ - ar933x_clocks_init(); - else if (soc_is_ar934x()) - ar934x_clocks_init(); -+ else if (soc_is_qca953x()) -+ qca953x_clocks_init(); - else if (soc_is_qca955x()) - qca955x_clocks_init(); -+ else if (soc_is_qca956x()) -+ qca956x_clocks_init(); - else - BUG(); - } -@@ -488,3 +671,15 @@ - return clk->rate; - } - EXPORT_SYMBOL(clk_get_rate); -+ -+int clk_set_rate(struct clk *clk, unsigned long rate) -+{ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(clk_set_rate); -+ -+long clk_round_rate(struct clk *clk, unsigned long rate) -+{ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(clk_round_rate); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/common.c linux-4.1.13/arch/mips/ath79/common.c ---- linux-4.1.13.orig/arch/mips/ath79/common.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/common.c 2015-12-04 19:57:04.474072175 +0100 -@@ -22,6 +22,7 @@ - #include "common.h" - - static DEFINE_SPINLOCK(ath79_device_reset_lock); -+static DEFINE_MUTEX(ath79_flash_mutex); - - u32 ath79_cpu_freq; - EXPORT_SYMBOL_GPL(ath79_cpu_freq); -@@ -72,10 +73,14 @@ - reg = AR933X_RESET_REG_RESET_MODULE; - else if (soc_is_ar934x()) - reg = AR934X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca953x()) -+ reg = QCA953X_RESET_REG_RESET_MODULE; - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x()) -+ reg = QCA956X_RESET_REG_RESET_MODULE; - else -- BUG(); -+ panic("Reset register not defined for this SOC"); - - spin_lock_irqsave(&ath79_device_reset_lock, flags); - t = ath79_reset_rr(reg); -@@ -100,10 +105,14 @@ - reg = AR933X_RESET_REG_RESET_MODULE; - else if (soc_is_ar934x()) - reg = AR934X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca953x()) -+ reg = QCA953X_RESET_REG_RESET_MODULE; - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x()) -+ reg = QCA956X_RESET_REG_RESET_MODULE; - else -- BUG(); -+ panic("Reset register not defined for this SOC"); - - spin_lock_irqsave(&ath79_device_reset_lock, flags); - t = ath79_reset_rr(reg); -@@ -111,3 +120,42 @@ - spin_unlock_irqrestore(&ath79_device_reset_lock, flags); - } - EXPORT_SYMBOL_GPL(ath79_device_reset_clear); -+ -+u32 ath79_device_reset_get(u32 mask) -+{ -+ unsigned long flags; -+ u32 reg; -+ u32 ret; -+ -+ if (soc_is_ar71xx()) -+ reg = AR71XX_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar724x()) -+ reg = AR724X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar913x()) -+ reg = AR913X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar933x()) -+ reg = AR933X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar934x()) -+ reg = AR934X_RESET_REG_RESET_MODULE; -+ else -+ BUG(); -+ -+ spin_lock_irqsave(&ath79_device_reset_lock, flags); -+ ret = ath79_reset_rr(reg); -+ spin_unlock_irqrestore(&ath79_device_reset_lock, flags); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(ath79_device_reset_get); -+ -+void ath79_flash_acquire(void) -+{ -+ mutex_lock(&ath79_flash_mutex); -+} -+EXPORT_SYMBOL_GPL(ath79_flash_acquire); -+ -+void ath79_flash_release(void) -+{ -+ mutex_unlock(&ath79_flash_mutex); -+} -+EXPORT_SYMBOL_GPL(ath79_flash_release); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/common.h linux-4.1.13/arch/mips/ath79/common.h ---- linux-4.1.13.orig/arch/mips/ath79/common.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/common.h 2015-12-04 19:57:05.893979276 +0100 -@@ -27,6 +27,9 @@ - void ath79_gpio_function_enable(u32 mask); - void ath79_gpio_function_disable(u32 mask); - void ath79_gpio_function_setup(u32 set, u32 clear); -+void ath79_gpio_function2_setup(u32 set, u32 clear); -+void ath79_gpio_output_select(unsigned gpio, u8 val); -+int ath79_gpio_direction_select(unsigned gpio, bool oe); - void ath79_gpio_init(void); - - #endif /* __ATH79_COMMON_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.c linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,159 @@ -+/* -+ * Atheros AP9X reference board PCI initialization -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "pci-ath9k-fixup.h" -+#include "pci.h" -+ -+static struct ath9k_platform_data ap9x_wmac0_data = { -+ .led_pin = -1, -+}; -+static struct ath9k_platform_data ap9x_wmac1_data = { -+ .led_pin = -1, -+}; -+static char ap9x_wmac0_mac[6]; -+static char ap9x_wmac1_mac[6]; -+ -+__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) -+{ -+ switch (wmac) { -+ case 0: -+ ap9x_wmac0_data.led_pin = pin; -+ break; -+ case 1: -+ ap9x_wmac1_data.led_pin = pin; -+ break; -+ } -+} -+ -+__init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac) -+{ -+ switch (wmac) { -+ case 0: -+ return &ap9x_wmac0_data; -+ -+ case 1: -+ return &ap9x_wmac1_data; -+ } -+ -+ return NULL; -+} -+ -+__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) -+{ -+ switch (wmac) { -+ case 0: -+ ap9x_wmac0_data.gpio_mask = mask; -+ ap9x_wmac0_data.gpio_val = val; -+ break; -+ case 1: -+ ap9x_wmac1_data.gpio_mask = mask; -+ ap9x_wmac1_data.gpio_val = val; -+ break; -+ } -+} -+ -+__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, -+ int num_leds) -+{ -+ switch (wmac) { -+ case 0: -+ ap9x_wmac0_data.leds = leds; -+ ap9x_wmac0_data.num_leds = num_leds; -+ break; -+ case 1: -+ ap9x_wmac1_data.leds = leds; -+ ap9x_wmac1_data.num_leds = num_leds; -+ break; -+ } -+} -+ -+static int ap91_pci_plat_dev_init(struct pci_dev *dev) -+{ -+ switch (PCI_SLOT(dev->devfn)) { -+ case 0: -+ dev->dev.platform_data = &ap9x_wmac0_data; -+ break; -+ } -+ -+ return 0; -+} -+ -+__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr) -+{ -+ if (cal_data) -+ memcpy(ap9x_wmac0_data.eeprom_data, cal_data, -+ sizeof(ap9x_wmac0_data.eeprom_data)); -+ -+ if (mac_addr) { -+ memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac)); -+ ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; -+ } -+ -+ ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init); -+ ath79_register_pci(); -+ -+ pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data); -+} -+ -+__init void ap91_pci_init_simple(void) -+{ -+ ap91_pci_init(NULL, NULL); -+ ap9x_wmac0_data.eeprom_name = "pci_wmac0.eeprom"; -+} -+ -+static int ap94_pci_plat_dev_init(struct pci_dev *dev) -+{ -+ switch (PCI_SLOT(dev->devfn)) { -+ case 17: -+ dev->dev.platform_data = &ap9x_wmac0_data; -+ break; -+ -+ case 18: -+ dev->dev.platform_data = &ap9x_wmac1_data; -+ break; -+ } -+ -+ return 0; -+} -+ -+__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, -+ u8 *cal_data1, u8 *mac_addr1) -+{ -+ if (cal_data0) -+ memcpy(ap9x_wmac0_data.eeprom_data, cal_data0, -+ sizeof(ap9x_wmac0_data.eeprom_data)); -+ -+ if (cal_data1) -+ memcpy(ap9x_wmac1_data.eeprom_data, cal_data1, -+ sizeof(ap9x_wmac1_data.eeprom_data)); -+ -+ if (mac_addr0) { -+ memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac)); -+ ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; -+ } -+ -+ if (mac_addr1) { -+ memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac)); -+ ap9x_wmac1_data.macaddr = ap9x_wmac1_mac; -+ } -+ -+ ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init); -+ ath79_register_pci(); -+ -+ pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data); -+ pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data); -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.h linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.h ---- linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.h 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,48 @@ -+/* -+ * Atheros AP9X reference board PCI initialization -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_DEV_AP9X_PCI_H -+#define _ATH79_DEV_AP9X_PCI_H -+ -+struct gpio_led; -+struct ath9k_platform_data; -+ -+#if defined(CONFIG_ATH79_DEV_AP9X_PCI) -+void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin); -+void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val); -+void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, -+ int num_leds); -+struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac); -+ -+void ap91_pci_init(u8 *cal_data, u8 *mac_addr); -+void ap91_pci_init_simple(void); -+void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, -+ u8 *cal_data1, u8 *mac_addr1); -+ -+#else -+static inline void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) {} -+static inline void ap9x_pci_setup_wmac_gpio(unsigned wmac, -+ u32 mask, u32 val) {} -+static inline void ap9x_pci_setup_wmac_leds(unsigned wmac, -+ struct gpio_led *leds, -+ int num_leds) {} -+static inline struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac) -+{ -+ return NULL; -+} -+ -+static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) {} -+static inline void ap91_pci_init_simple(void) {} -+static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, -+ u8 *cal_data1, u8 *mac_addr1) {} -+#endif -+ -+#endif /* _ATH79_DEV_AP9X_PCI_H */ -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-common.c linux-4.1.13/arch/mips/ath79/dev-common.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-common.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-common.c 2015-12-04 19:57:04.474072175 +0100 -@@ -80,11 +80,22 @@ - - uart_clk_rate = ath79_get_sys_clk_rate("uart"); - -+ if (soc_is_ar71xx()) -+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar724x()) -+ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar913x()) -+ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar933x()) -+ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN); -+ - if (soc_is_ar71xx() || - soc_is_ar724x() || - soc_is_ar913x() || - soc_is_ar934x() || -- soc_is_qca955x()) { -+ soc_is_qca953x() || -+ soc_is_qca955x() || -+ soc_is_qca956x()) { - ath79_uart_data[0].uartclk = uart_clk_rate; - platform_device_register(&ath79_uart_device); - } else if (soc_is_ar933x()) { -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-dsa.c linux-4.1.13/arch/mips/ath79/dev-dsa.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-dsa.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-dsa.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,41 @@ -+/* -+ * Atheros AR71xx DSA switch device support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-dsa.h" -+ -+static struct platform_device ar71xx_dsa_switch_device = { -+ .name = "dsa", -+ .id = 0, -+}; -+ -+void __init ath79_register_dsa(struct device *netdev, -+ struct device *miidev, -+ struct dsa_platform_data *d) -+{ -+ int i; -+ -+ d->netdev = netdev; -+ for (i = 0; i < d->nr_chips; i++) -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) -+ d->chip[i].mii_bus = miidev; -+#else -+ d->chip[i].host_dev = miidev; -+#endif -+ -+ ar71xx_dsa_switch_device.dev.platform_data = d; -+ platform_device_register(&ar71xx_dsa_switch_device); -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-dsa.h linux-4.1.13/arch/mips/ath79/dev-dsa.h ---- linux-4.1.13.orig/arch/mips/ath79/dev-dsa.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-dsa.h 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,21 @@ -+/* -+ * Atheros AR71xx DSA switch device support -+ * -+ * Copyright (C) 2008-2009 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_DEV_DSA_H -+#define _ATH79_DEV_DSA_H -+ -+#include -+ -+void ath79_register_dsa(struct device *netdev, -+ struct device *miidev, -+ struct dsa_platform_data *d); -+ -+#endif /* _ATH79_DEV_DSA_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-eth.c linux-4.1.13/arch/mips/ath79/dev-eth.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-eth.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-eth.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,1254 @@ -+/* -+ * Atheros AR71xx SoC platform devices -+ * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Parts of this file are based on Atheros 2.6.15 BSP -+ * Parts of this file are based on Atheros 2.6.31 BSP -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+ -+unsigned char ath79_mac_base[ETH_ALEN] __initdata; -+ -+static struct resource ath79_mdio0_resources[] = { -+ { -+ .name = "mdio_base", -+ .flags = IORESOURCE_MEM, -+ .start = AR71XX_GE0_BASE, -+ .end = AR71XX_GE0_BASE + 0x200 - 1, -+ } -+}; -+ -+struct ag71xx_mdio_platform_data ath79_mdio0_data; -+ -+struct platform_device ath79_mdio0_device = { -+ .name = "ag71xx-mdio", -+ .id = 0, -+ .resource = ath79_mdio0_resources, -+ .num_resources = ARRAY_SIZE(ath79_mdio0_resources), -+ .dev = { -+ .platform_data = &ath79_mdio0_data, -+ }, -+}; -+ -+static struct resource ath79_mdio1_resources[] = { -+ { -+ .name = "mdio_base", -+ .flags = IORESOURCE_MEM, -+ .start = AR71XX_GE1_BASE, -+ .end = AR71XX_GE1_BASE + 0x200 - 1, -+ } -+}; -+ -+struct ag71xx_mdio_platform_data ath79_mdio1_data; -+ -+struct platform_device ath79_mdio1_device = { -+ .name = "ag71xx-mdio", -+ .id = 1, -+ .resource = ath79_mdio1_resources, -+ .num_resources = ARRAY_SIZE(ath79_mdio1_resources), -+ .dev = { -+ .platform_data = &ath79_mdio1_data, -+ }, -+}; -+ -+static void ath79_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); -+ -+ t = __raw_readl(base + cfg_reg); -+ t &= ~(3 << shift); -+ t |= (2 << shift); -+ __raw_writel(t, base + cfg_reg); -+ udelay(100); -+ -+ __raw_writel(pll_val, base + pll_reg); -+ -+ t |= (3 << shift); -+ __raw_writel(t, base + cfg_reg); -+ udelay(100); -+ -+ t &= ~(3 << shift); -+ __raw_writel(t, base + cfg_reg); -+ udelay(100); -+ -+ printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", -+ (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); -+ -+ iounmap(base); -+} -+ -+static void __init ath79_mii_ctrl_set_if(unsigned int reg, -+ unsigned int mii_if) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); -+ -+ t = __raw_readl(base + reg); -+ t &= ~(AR71XX_MII_CTRL_IF_MASK); -+ t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); -+ __raw_writel(t, base + reg); -+ -+ iounmap(base); -+} -+ -+static void ath79_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) -+{ -+ void __iomem *base; -+ unsigned int mii_speed; -+ u32 t; -+ -+ switch (speed) { -+ case SPEED_10: -+ mii_speed = AR71XX_MII_CTRL_SPEED_10; -+ break; -+ case SPEED_100: -+ mii_speed = AR71XX_MII_CTRL_SPEED_100; -+ break; -+ case SPEED_1000: -+ mii_speed = AR71XX_MII_CTRL_SPEED_1000; -+ break; -+ default: -+ BUG(); -+ } -+ -+ base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); -+ -+ t = __raw_readl(base + reg); -+ t &= ~(AR71XX_MII_CTRL_SPEED_MASK << AR71XX_MII_CTRL_SPEED_SHIFT); -+ t |= mii_speed << AR71XX_MII_CTRL_SPEED_SHIFT; -+ __raw_writel(t, base + reg); -+ -+ iounmap(base); -+} -+ -+static unsigned long ar934x_get_mdio_ref_clock(void) -+{ -+ void __iomem *base; -+ unsigned long ret; -+ u32 t; -+ -+ base = ioremap(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); -+ -+ ret = 0; -+ t = __raw_readl(base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); -+ if (t & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) { -+ ret = 100 * 1000 * 1000; -+ } else { -+ struct clk *clk; -+ -+ clk = clk_get(NULL, "ref"); -+ if (!IS_ERR(clk)) -+ ret = clk_get_rate(clk); -+ } -+ -+ iounmap(base); -+ -+ return ret; -+} -+ -+void __init ath79_register_mdio(unsigned int id, u32 phy_mask) -+{ -+ struct platform_device *mdio_dev; -+ struct ag71xx_mdio_platform_data *mdio_data; -+ unsigned int max_id; -+ -+ if (ath79_soc == ATH79_SOC_AR9341 || -+ ath79_soc == ATH79_SOC_AR9342 || -+ ath79_soc == ATH79_SOC_AR9344 || -+ ath79_soc == ATH79_SOC_QCA9556 || -+ ath79_soc == ATH79_SOC_QCA9558) -+ max_id = 1; -+ else -+ max_id = 0; -+ -+ if (id > max_id) { -+ printk(KERN_ERR "ar71xx: invalid MDIO id %u\n", id); -+ return; -+ } -+ -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7241: -+ case ATH79_SOC_AR9330: -+ case ATH79_SOC_AR9331: -+ case ATH79_SOC_QCA9533: -+ case ATH79_SOC_QCA9561: -+ case ATH79_SOC_TP9343: -+ mdio_dev = &ath79_mdio1_device; -+ mdio_data = &ath79_mdio1_data; -+ break; -+ -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ if (id == 0) { -+ mdio_dev = &ath79_mdio0_device; -+ mdio_data = &ath79_mdio0_data; -+ } else { -+ mdio_dev = &ath79_mdio1_device; -+ mdio_data = &ath79_mdio1_data; -+ } -+ break; -+ -+ case ATH79_SOC_AR7242: -+ ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, -+ AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000, -+ AR71XX_ETH0_PLL_SHIFT); -+ /* fall through */ -+ default: -+ mdio_dev = &ath79_mdio0_device; -+ mdio_data = &ath79_mdio0_data; -+ break; -+ } -+ -+ mdio_data->phy_mask = phy_mask; -+ -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7240: -+ mdio_data->is_ar7240 = 1; -+ /* fall through */ -+ case ATH79_SOC_AR7241: -+ mdio_data->builtin_switch = 1; -+ break; -+ -+ case ATH79_SOC_AR9330: -+ mdio_data->is_ar9330 = 1; -+ /* fall through */ -+ case ATH79_SOC_AR9331: -+ mdio_data->builtin_switch = 1; -+ break; -+ -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ if (id == 1) { -+ mdio_data->builtin_switch = 1; -+ mdio_data->ref_clock = ar934x_get_mdio_ref_clock(); -+ mdio_data->mdio_clock = 6250000; -+ } -+ mdio_data->is_ar934x = 1; -+ break; -+ -+ case ATH79_SOC_QCA9533: -+ case ATH79_SOC_QCA9561: -+ case ATH79_SOC_TP9343: -+ mdio_data->builtin_switch = 1; -+ break; -+ -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ mdio_data->is_ar934x = 1; -+ break; -+ -+ default: -+ break; -+ } -+ -+ platform_device_register(mdio_dev); -+} -+ -+struct ath79_eth_pll_data ath79_eth0_pll_data; -+struct ath79_eth_pll_data ath79_eth1_pll_data; -+ -+static u32 ath79_get_eth_pll(unsigned int mac, int speed) -+{ -+ struct ath79_eth_pll_data *pll_data; -+ u32 pll_val; -+ -+ switch (mac) { -+ case 0: -+ pll_data = &ath79_eth0_pll_data; -+ break; -+ case 1: -+ pll_data = &ath79_eth1_pll_data; -+ break; -+ default: -+ BUG(); -+ } -+ -+ switch (speed) { -+ case SPEED_10: -+ pll_val = pll_data->pll_10; -+ break; -+ case SPEED_100: -+ pll_val = pll_data->pll_100; -+ break; -+ case SPEED_1000: -+ pll_val = pll_data->pll_1000; -+ break; -+ default: -+ BUG(); -+ } -+ -+ return pll_val; -+} -+ -+static void ath79_set_speed_ge0(int speed) -+{ -+ u32 val = ath79_get_eth_pll(0, speed); -+ -+ ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, -+ val, AR71XX_ETH0_PLL_SHIFT); -+ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); -+} -+ -+static void ath79_set_speed_ge1(int speed) -+{ -+ u32 val = ath79_get_eth_pll(1, speed); -+ -+ ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, -+ val, AR71XX_ETH1_PLL_SHIFT); -+ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); -+} -+ -+static void ar7242_set_speed_ge0(int speed) -+{ -+ u32 val = ath79_get_eth_pll(0, speed); -+ void __iomem *base; -+ -+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); -+ __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK); -+ iounmap(base); -+} -+ -+static void ar91xx_set_speed_ge0(int speed) -+{ -+ u32 val = ath79_get_eth_pll(0, speed); -+ -+ ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH0_INT_CLOCK, -+ val, AR913X_ETH0_PLL_SHIFT); -+ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); -+} -+ -+static void ar91xx_set_speed_ge1(int speed) -+{ -+ u32 val = ath79_get_eth_pll(1, speed); -+ -+ ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH1_INT_CLOCK, -+ val, AR913X_ETH1_PLL_SHIFT); -+ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); -+} -+ -+static void ar934x_set_speed_ge0(int speed) -+{ -+ void __iomem *base; -+ u32 val = ath79_get_eth_pll(0, speed); -+ -+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); -+ __raw_writel(val, base + AR934X_PLL_ETH_XMII_CONTROL_REG); -+ iounmap(base); -+} -+ -+static void qca955x_set_speed_xmii(int speed) -+{ -+ void __iomem *base; -+ u32 val = ath79_get_eth_pll(0, speed); -+ -+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); -+ __raw_writel(val, base + QCA955X_PLL_ETH_XMII_CONTROL_REG); -+ iounmap(base); -+} -+ -+static void qca955x_set_speed_sgmii(int speed) -+{ -+ void __iomem *base; -+ u32 val = ath79_get_eth_pll(1, speed); -+ -+ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); -+ __raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG); -+ iounmap(base); -+} -+ -+static void ath79_set_speed_dummy(int speed) -+{ -+} -+ -+static void ath79_ddr_no_flush(void) -+{ -+} -+ -+static void ath79_ddr_flush_ge0(void) -+{ -+ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); -+} -+ -+static void ath79_ddr_flush_ge1(void) -+{ -+ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE1); -+} -+ -+static void ar724x_ddr_flush_ge0(void) -+{ -+ ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE0); -+} -+ -+static void ar724x_ddr_flush_ge1(void) -+{ -+ ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE1); -+} -+ -+static void ar91xx_ddr_flush_ge0(void) -+{ -+ ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE0); -+} -+ -+static void ar91xx_ddr_flush_ge1(void) -+{ -+ ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE1); -+} -+ -+static void ar933x_ddr_flush_ge0(void) -+{ -+ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE0); -+} -+ -+static void ar933x_ddr_flush_ge1(void) -+{ -+ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); -+} -+ -+static struct resource ath79_eth0_resources[] = { -+ { -+ .name = "mac_base", -+ .flags = IORESOURCE_MEM, -+ .start = AR71XX_GE0_BASE, -+ .end = AR71XX_GE0_BASE + 0x200 - 1, -+ }, { -+ .name = "mac_irq", -+ .flags = IORESOURCE_IRQ, -+ .start = ATH79_CPU_IRQ(4), -+ .end = ATH79_CPU_IRQ(4), -+ }, -+}; -+ -+struct ag71xx_platform_data ath79_eth0_data = { -+ .reset_bit = AR71XX_RESET_GE0_MAC, -+}; -+ -+struct platform_device ath79_eth0_device = { -+ .name = "ag71xx", -+ .id = 0, -+ .resource = ath79_eth0_resources, -+ .num_resources = ARRAY_SIZE(ath79_eth0_resources), -+ .dev = { -+ .platform_data = &ath79_eth0_data, -+ }, -+}; -+ -+static struct resource ath79_eth1_resources[] = { -+ { -+ .name = "mac_base", -+ .flags = IORESOURCE_MEM, -+ .start = AR71XX_GE1_BASE, -+ .end = AR71XX_GE1_BASE + 0x200 - 1, -+ }, { -+ .name = "mac_irq", -+ .flags = IORESOURCE_IRQ, -+ .start = ATH79_CPU_IRQ(5), -+ .end = ATH79_CPU_IRQ(5), -+ }, -+}; -+ -+struct ag71xx_platform_data ath79_eth1_data = { -+ .reset_bit = AR71XX_RESET_GE1_MAC, -+}; -+ -+struct platform_device ath79_eth1_device = { -+ .name = "ag71xx", -+ .id = 1, -+ .resource = ath79_eth1_resources, -+ .num_resources = ARRAY_SIZE(ath79_eth1_resources), -+ .dev = { -+ .platform_data = &ath79_eth1_data, -+ }, -+}; -+ -+struct ag71xx_switch_platform_data ath79_switch_data; -+ -+#define AR71XX_PLL_VAL_1000 0x00110000 -+#define AR71XX_PLL_VAL_100 0x00001099 -+#define AR71XX_PLL_VAL_10 0x00991099 -+ -+#define AR724X_PLL_VAL_1000 0x00110000 -+#define AR724X_PLL_VAL_100 0x00001099 -+#define AR724X_PLL_VAL_10 0x00991099 -+ -+#define AR7242_PLL_VAL_1000 0x16000000 -+#define AR7242_PLL_VAL_100 0x00000101 -+#define AR7242_PLL_VAL_10 0x00001616 -+ -+#define AR913X_PLL_VAL_1000 0x1a000000 -+#define AR913X_PLL_VAL_100 0x13000a44 -+#define AR913X_PLL_VAL_10 0x00441099 -+ -+#define AR933X_PLL_VAL_1000 0x00110000 -+#define AR933X_PLL_VAL_100 0x00001099 -+#define AR933X_PLL_VAL_10 0x00991099 -+ -+#define AR934X_PLL_VAL_1000 0x16000000 -+#define AR934X_PLL_VAL_100 0x00000101 -+#define AR934X_PLL_VAL_10 0x00001616 -+ -+static void __init ath79_init_eth_pll_data(unsigned int id) -+{ -+ struct ath79_eth_pll_data *pll_data; -+ u32 pll_10, pll_100, pll_1000; -+ -+ switch (id) { -+ case 0: -+ pll_data = &ath79_eth0_pll_data; -+ break; -+ case 1: -+ pll_data = &ath79_eth1_pll_data; -+ break; -+ default: -+ BUG(); -+ } -+ -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7130: -+ case ATH79_SOC_AR7141: -+ case ATH79_SOC_AR7161: -+ pll_10 = AR71XX_PLL_VAL_10; -+ pll_100 = AR71XX_PLL_VAL_100; -+ pll_1000 = AR71XX_PLL_VAL_1000; -+ break; -+ -+ case ATH79_SOC_AR7240: -+ case ATH79_SOC_AR7241: -+ pll_10 = AR724X_PLL_VAL_10; -+ pll_100 = AR724X_PLL_VAL_100; -+ pll_1000 = AR724X_PLL_VAL_1000; -+ break; -+ -+ case ATH79_SOC_AR7242: -+ pll_10 = AR7242_PLL_VAL_10; -+ pll_100 = AR7242_PLL_VAL_100; -+ pll_1000 = AR7242_PLL_VAL_1000; -+ break; -+ -+ case ATH79_SOC_AR9130: -+ case ATH79_SOC_AR9132: -+ pll_10 = AR913X_PLL_VAL_10; -+ pll_100 = AR913X_PLL_VAL_100; -+ pll_1000 = AR913X_PLL_VAL_1000; -+ break; -+ -+ case ATH79_SOC_AR9330: -+ case ATH79_SOC_AR9331: -+ pll_10 = AR933X_PLL_VAL_10; -+ pll_100 = AR933X_PLL_VAL_100; -+ pll_1000 = AR933X_PLL_VAL_1000; -+ break; -+ -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ case ATH79_SOC_QCA9533: -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ case ATH79_SOC_QCA9561: -+ case ATH79_SOC_TP9343: -+ pll_10 = AR934X_PLL_VAL_10; -+ pll_100 = AR934X_PLL_VAL_100; -+ pll_1000 = AR934X_PLL_VAL_1000; -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ if (!pll_data->pll_10) -+ pll_data->pll_10 = pll_10; -+ -+ if (!pll_data->pll_100) -+ pll_data->pll_100 = pll_100; -+ -+ if (!pll_data->pll_1000) -+ pll_data->pll_1000 = pll_1000; -+} -+ -+static int __init ath79_setup_phy_if_mode(unsigned int id, -+ struct ag71xx_platform_data *pdata) -+{ -+ unsigned int mii_if; -+ -+ switch (id) { -+ case 0: -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7130: -+ case ATH79_SOC_AR7141: -+ case ATH79_SOC_AR7161: -+ case ATH79_SOC_AR9130: -+ case ATH79_SOC_AR9132: -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_MII: -+ mii_if = AR71XX_MII0_CTRL_IF_MII; -+ break; -+ case PHY_INTERFACE_MODE_GMII: -+ mii_if = AR71XX_MII0_CTRL_IF_GMII; -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ mii_if = AR71XX_MII0_CTRL_IF_RGMII; -+ break; -+ case PHY_INTERFACE_MODE_RMII: -+ mii_if = AR71XX_MII0_CTRL_IF_RMII; -+ break; -+ default: -+ return -EINVAL; -+ } -+ ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII0_CTRL, mii_if); -+ break; -+ -+ case ATH79_SOC_AR7240: -+ case ATH79_SOC_AR7241: -+ case ATH79_SOC_AR9330: -+ case ATH79_SOC_AR9331: -+ case ATH79_SOC_QCA9533: -+ case ATH79_SOC_TP9343: -+ pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; -+ break; -+ -+ case ATH79_SOC_AR7242: -+ /* FIXME */ -+ -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_GMII: -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_RMII: -+ break; -+ default: -+ return -EINVAL; -+ } -+ break; -+ -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_SGMII: -+ break; -+ default: -+ return -EINVAL; -+ } -+ break; -+ -+ case ATH79_SOC_QCA9561: -+ if (!pdata->phy_if_mode) -+ pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; -+ break; -+ -+ default: -+ BUG(); -+ } -+ break; -+ case 1: -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7130: -+ case ATH79_SOC_AR7141: -+ case ATH79_SOC_AR7161: -+ case ATH79_SOC_AR9130: -+ case ATH79_SOC_AR9132: -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_RMII: -+ mii_if = AR71XX_MII1_CTRL_IF_RMII; -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ mii_if = AR71XX_MII1_CTRL_IF_RGMII; -+ break; -+ default: -+ return -EINVAL; -+ } -+ ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII1_CTRL, mii_if); -+ break; -+ -+ case ATH79_SOC_AR7240: -+ case ATH79_SOC_AR7241: -+ case ATH79_SOC_AR9330: -+ case ATH79_SOC_AR9331: -+ case ATH79_SOC_QCA9561: -+ case ATH79_SOC_TP9343: -+ pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ break; -+ -+ case ATH79_SOC_AR7242: -+ /* FIXME */ -+ -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ case ATH79_SOC_QCA9533: -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_GMII: -+ break; -+ default: -+ return -EINVAL; -+ } -+ break; -+ -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_MII: -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_SGMII: -+ break; -+ default: -+ return -EINVAL; -+ } -+ break; -+ -+ default: -+ BUG(); -+ } -+ break; -+ } -+ -+ return 0; -+} -+ -+void __init ath79_setup_ar933x_phy4_switch(bool mac, bool mdio) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ioremap(AR933X_GMAC_BASE, AR933X_GMAC_SIZE); -+ -+ t = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG); -+ t &= ~(AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); -+ if (mac) -+ t |= AR933X_ETH_CFG_SW_PHY_SWAP; -+ if (mdio) -+ t |= AR933X_ETH_CFG_SW_PHY_ADDR_SWAP; -+ __raw_writel(t, base + AR933X_GMAC_REG_ETH_CFG); -+ -+ iounmap(base); -+} -+ -+void __init ath79_setup_ar934x_eth_cfg(u32 mask) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); -+ -+ t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); -+ -+ t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_MII_GMAC0 | -+ AR934X_ETH_CFG_GMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE | -+ AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ t |= mask; -+ -+ __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); -+ /* flush write */ -+ __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); -+ -+ iounmap(base); -+} -+ -+void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, -+ unsigned int rxdv) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ rxd &= AR934X_ETH_CFG_RXD_DELAY_MASK; -+ rxdv &= AR934X_ETH_CFG_RDV_DELAY_MASK; -+ -+ base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); -+ -+ t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); -+ -+ t &= ~(AR934X_ETH_CFG_RXD_DELAY_MASK << AR934X_ETH_CFG_RXD_DELAY_SHIFT | -+ AR934X_ETH_CFG_RDV_DELAY_MASK << AR934X_ETH_CFG_RDV_DELAY_SHIFT); -+ -+ t |= (rxd << AR934X_ETH_CFG_RXD_DELAY_SHIFT | -+ rxdv << AR934X_ETH_CFG_RDV_DELAY_SHIFT); -+ -+ __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); -+ /* flush write */ -+ __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); -+ -+ iounmap(base); -+} -+ -+void __init ath79_setup_qca955x_eth_cfg(u32 mask) -+{ -+ void __iomem *base; -+ u32 t; -+ -+ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); -+ -+ t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); -+ -+ t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); -+ -+ t |= mask; -+ -+ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); -+ -+ iounmap(base); -+} -+ -+static int ath79_eth_instance __initdata; -+void __init ath79_register_eth(unsigned int id) -+{ -+ struct platform_device *pdev; -+ struct ag71xx_platform_data *pdata; -+ int err; -+ -+ if (id > 1) { -+ printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); -+ return; -+ } -+ -+ ath79_init_eth_pll_data(id); -+ -+ if (id == 0) -+ pdev = &ath79_eth0_device; -+ else -+ pdev = &ath79_eth1_device; -+ -+ pdata = pdev->dev.platform_data; -+ -+ pdata->max_frame_len = 1540; -+ pdata->desc_pktlen_mask = 0xfff; -+ -+ err = ath79_setup_phy_if_mode(id, pdata); -+ if (err) { -+ printk(KERN_ERR -+ "ar71xx: invalid PHY interface mode for GE%u\n", id); -+ return; -+ } -+ -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7130: -+ if (id == 0) { -+ pdata->ddr_flush = ath79_ddr_flush_ge0; -+ pdata->set_speed = ath79_set_speed_ge0; -+ } else { -+ pdata->ddr_flush = ath79_ddr_flush_ge1; -+ pdata->set_speed = ath79_set_speed_ge1; -+ } -+ break; -+ -+ case ATH79_SOC_AR7141: -+ case ATH79_SOC_AR7161: -+ if (id == 0) { -+ pdata->ddr_flush = ath79_ddr_flush_ge0; -+ pdata->set_speed = ath79_set_speed_ge0; -+ } else { -+ pdata->ddr_flush = ath79_ddr_flush_ge1; -+ pdata->set_speed = ath79_set_speed_ge1; -+ } -+ pdata->has_gbit = 1; -+ break; -+ -+ case ATH79_SOC_AR7242: -+ if (id == 0) { -+ pdata->reset_bit |= AR724X_RESET_GE0_MDIO | -+ AR71XX_RESET_GE0_PHY; -+ pdata->ddr_flush = ar724x_ddr_flush_ge0; -+ pdata->set_speed = ar7242_set_speed_ge0; -+ } else { -+ pdata->reset_bit |= AR724X_RESET_GE1_MDIO | -+ AR71XX_RESET_GE1_PHY; -+ pdata->ddr_flush = ar724x_ddr_flush_ge1; -+ pdata->set_speed = ath79_set_speed_dummy; -+ } -+ pdata->has_gbit = 1; -+ pdata->is_ar724x = 1; -+ -+ if (!pdata->fifo_cfg1) -+ pdata->fifo_cfg1 = 0x0010ffff; -+ if (!pdata->fifo_cfg2) -+ pdata->fifo_cfg2 = 0x015500aa; -+ if (!pdata->fifo_cfg3) -+ pdata->fifo_cfg3 = 0x01f00140; -+ break; -+ -+ case ATH79_SOC_AR7241: -+ if (id == 0) -+ pdata->reset_bit |= AR724X_RESET_GE0_MDIO; -+ else -+ pdata->reset_bit |= AR724X_RESET_GE1_MDIO; -+ /* fall through */ -+ case ATH79_SOC_AR7240: -+ if (id == 0) { -+ pdata->reset_bit |= AR71XX_RESET_GE0_PHY; -+ pdata->ddr_flush = ar724x_ddr_flush_ge0; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ pdata->phy_mask = BIT(4); -+ } else { -+ pdata->reset_bit |= AR71XX_RESET_GE1_PHY; -+ pdata->ddr_flush = ar724x_ddr_flush_ge1; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ pdata->speed = SPEED_1000; -+ pdata->duplex = DUPLEX_FULL; -+ pdata->switch_data = &ath79_switch_data; -+ -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ } -+ pdata->has_gbit = 1; -+ pdata->is_ar724x = 1; -+ if (ath79_soc == ATH79_SOC_AR7240) -+ pdata->is_ar7240 = 1; -+ -+ if (!pdata->fifo_cfg1) -+ pdata->fifo_cfg1 = 0x0010ffff; -+ if (!pdata->fifo_cfg2) -+ pdata->fifo_cfg2 = 0x015500aa; -+ if (!pdata->fifo_cfg3) -+ pdata->fifo_cfg3 = 0x01f00140; -+ break; -+ -+ case ATH79_SOC_AR9130: -+ if (id == 0) { -+ pdata->ddr_flush = ar91xx_ddr_flush_ge0; -+ pdata->set_speed = ar91xx_set_speed_ge0; -+ } else { -+ pdata->ddr_flush = ar91xx_ddr_flush_ge1; -+ pdata->set_speed = ar91xx_set_speed_ge1; -+ } -+ pdata->is_ar91xx = 1; -+ break; -+ -+ case ATH79_SOC_AR9132: -+ if (id == 0) { -+ pdata->ddr_flush = ar91xx_ddr_flush_ge0; -+ pdata->set_speed = ar91xx_set_speed_ge0; -+ } else { -+ pdata->ddr_flush = ar91xx_ddr_flush_ge1; -+ pdata->set_speed = ar91xx_set_speed_ge1; -+ } -+ pdata->is_ar91xx = 1; -+ pdata->has_gbit = 1; -+ break; -+ -+ case ATH79_SOC_AR9330: -+ case ATH79_SOC_AR9331: -+ if (id == 0) { -+ pdata->reset_bit = AR933X_RESET_GE0_MAC | -+ AR933X_RESET_GE0_MDIO; -+ pdata->ddr_flush = ar933x_ddr_flush_ge0; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ pdata->phy_mask = BIT(4); -+ } else { -+ pdata->reset_bit = AR933X_RESET_GE1_MAC | -+ AR933X_RESET_GE1_MDIO; -+ pdata->ddr_flush = ar933x_ddr_flush_ge1; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ pdata->speed = SPEED_1000; -+ pdata->has_gbit = 1; -+ pdata->duplex = DUPLEX_FULL; -+ pdata->switch_data = &ath79_switch_data; -+ -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ } -+ -+ pdata->is_ar724x = 1; -+ -+ if (!pdata->fifo_cfg1) -+ pdata->fifo_cfg1 = 0x0010ffff; -+ if (!pdata->fifo_cfg2) -+ pdata->fifo_cfg2 = 0x015500aa; -+ if (!pdata->fifo_cfg3) -+ pdata->fifo_cfg3 = 0x01f00140; -+ break; -+ -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ case ATH79_SOC_QCA9533: -+ if (id == 0) { -+ pdata->reset_bit = AR934X_RESET_GE0_MAC | -+ AR934X_RESET_GE0_MDIO; -+ pdata->set_speed = ar934x_set_speed_ge0; -+ } else { -+ pdata->reset_bit = AR934X_RESET_GE1_MAC | -+ AR934X_RESET_GE1_MDIO; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ pdata->switch_data = &ath79_switch_data; -+ -+ /* reset the built-in switch */ -+ ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); -+ ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); -+ } -+ -+ pdata->ddr_flush = ath79_ddr_no_flush; -+ pdata->has_gbit = 1; -+ pdata->is_ar724x = 1; -+ -+ pdata->max_frame_len = SZ_16K - 1; -+ pdata->desc_pktlen_mask = SZ_16K - 1; -+ -+ if (!pdata->fifo_cfg1) -+ pdata->fifo_cfg1 = 0x0010ffff; -+ if (!pdata->fifo_cfg2) -+ pdata->fifo_cfg2 = 0x015500aa; -+ if (!pdata->fifo_cfg3) -+ pdata->fifo_cfg3 = 0x01f00140; -+ break; -+ -+ case ATH79_SOC_QCA9561: -+ case ATH79_SOC_TP9343: -+ if (id == 0) { -+ pdata->reset_bit = AR933X_RESET_GE0_MAC | -+ AR933X_RESET_GE0_MDIO; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ if (!pdata->phy_mask) -+ pdata->phy_mask = BIT(4); -+ } else { -+ pdata->reset_bit = AR933X_RESET_GE1_MAC | -+ AR933X_RESET_GE1_MDIO; -+ pdata->set_speed = ath79_set_speed_dummy; -+ -+ pdata->speed = SPEED_1000; -+ pdata->duplex = DUPLEX_FULL; -+ pdata->switch_data = &ath79_switch_data; -+ -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ } -+ -+ pdata->ddr_flush = ath79_ddr_no_flush; -+ pdata->has_gbit = 1; -+ pdata->is_ar724x = 1; -+ -+ if (!pdata->fifo_cfg1) -+ pdata->fifo_cfg1 = 0x0010ffff; -+ if (!pdata->fifo_cfg2) -+ pdata->fifo_cfg2 = 0x015500aa; -+ if (!pdata->fifo_cfg3) -+ pdata->fifo_cfg3 = 0x01f00140; -+ break; -+ -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ if (id == 0) { -+ pdata->reset_bit = QCA955X_RESET_GE0_MAC | -+ QCA955X_RESET_GE0_MDIO; -+ pdata->set_speed = qca955x_set_speed_xmii; -+ } else { -+ pdata->reset_bit = QCA955X_RESET_GE1_MAC | -+ QCA955X_RESET_GE1_MDIO; -+ pdata->set_speed = qca955x_set_speed_sgmii; -+ } -+ -+ pdata->ddr_flush = ath79_ddr_no_flush; -+ pdata->has_gbit = 1; -+ pdata->is_ar724x = 1; -+ -+ /* -+ * Limit the maximum frame length to 4095 bytes. -+ * Although the documentation says that the hardware -+ * limit is 16383 bytes but that does not work in -+ * practice. It seems that the hardware only updates -+ * the lowest 12 bits of the packet length field -+ * in the RX descriptor. -+ */ -+ pdata->max_frame_len = SZ_4K - 1; -+ pdata->desc_pktlen_mask = SZ_16K - 1; -+ -+ if (!pdata->fifo_cfg1) -+ pdata->fifo_cfg1 = 0x0010ffff; -+ if (!pdata->fifo_cfg2) -+ pdata->fifo_cfg2 = 0x015500aa; -+ if (!pdata->fifo_cfg3) -+ pdata->fifo_cfg3 = 0x01f00140; -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ switch (pdata->phy_if_mode) { -+ case PHY_INTERFACE_MODE_GMII: -+ case PHY_INTERFACE_MODE_RGMII: -+ case PHY_INTERFACE_MODE_SGMII: -+ if (!pdata->has_gbit) { -+ printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", -+ id); -+ return; -+ } -+ /* fallthrough */ -+ default: -+ break; -+ } -+ -+ if (!is_valid_ether_addr(pdata->mac_addr)) { -+ random_ether_addr(pdata->mac_addr); -+ printk(KERN_DEBUG -+ "ar71xx: using random MAC address for eth%d\n", -+ ath79_eth_instance); -+ } -+ -+ if (pdata->mii_bus_dev == NULL) { -+ switch (ath79_soc) { -+ case ATH79_SOC_AR9341: -+ case ATH79_SOC_AR9342: -+ case ATH79_SOC_AR9344: -+ if (id == 0) -+ pdata->mii_bus_dev = &ath79_mdio0_device.dev; -+ else -+ pdata->mii_bus_dev = &ath79_mdio1_device.dev; -+ break; -+ -+ case ATH79_SOC_AR7241: -+ case ATH79_SOC_AR9330: -+ case ATH79_SOC_AR9331: -+ case ATH79_SOC_QCA9533: -+ case ATH79_SOC_QCA9561: -+ case ATH79_SOC_TP9343: -+ pdata->mii_bus_dev = &ath79_mdio1_device.dev; -+ break; -+ -+ case ATH79_SOC_QCA9556: -+ case ATH79_SOC_QCA9558: -+ /* don't assign any MDIO device by default */ -+ break; -+ -+ default: -+ pdata->mii_bus_dev = &ath79_mdio0_device.dev; -+ break; -+ } -+ } -+ -+ /* Reset the device */ -+ ath79_device_reset_set(pdata->reset_bit); -+ msleep(100); -+ -+ ath79_device_reset_clear(pdata->reset_bit); -+ msleep(100); -+ -+ platform_device_register(pdev); -+ ath79_eth_instance++; -+} -+ -+void __init ath79_set_mac_base(unsigned char *mac) -+{ -+ memcpy(ath79_mac_base, mac, ETH_ALEN); -+} -+ -+void __init ath79_parse_ascii_mac(char *mac_str, u8 *mac) -+{ -+ int t; -+ -+ t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", -+ &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); -+ -+ if (t != ETH_ALEN) -+ t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", -+ &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); -+ -+ if (t != ETH_ALEN || !is_valid_ether_addr(mac)) { -+ memset(mac, 0, ETH_ALEN); -+ printk(KERN_DEBUG "ar71xx: invalid mac address \"%s\"\n", -+ mac_str); -+ } -+} -+ -+static void __init ath79_set_mac_base_ascii(char *str) -+{ -+ u8 mac[ETH_ALEN]; -+ -+ ath79_parse_ascii_mac(str, mac); -+ ath79_set_mac_base(mac); -+} -+ -+static int __init ath79_ethaddr_setup(char *str) -+{ -+ ath79_set_mac_base_ascii(str); -+ return 1; -+} -+__setup("ethaddr=", ath79_ethaddr_setup); -+ -+static int __init ath79_kmac_setup(char *str) -+{ -+ ath79_set_mac_base_ascii(str); -+ return 1; -+} -+__setup("kmac=", ath79_kmac_setup); -+ -+void __init ath79_init_mac(unsigned char *dst, const unsigned char *src, -+ int offset) -+{ -+ int t; -+ -+ if (!dst) -+ return; -+ -+ if (!src || !is_valid_ether_addr(src)) { -+ memset(dst, '\0', ETH_ALEN); -+ return; -+ } -+ -+ t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); -+ t += offset; -+ -+ dst[0] = src[0]; -+ dst[1] = src[1]; -+ dst[2] = src[2]; -+ dst[3] = (t >> 16) & 0xff; -+ dst[4] = (t >> 8) & 0xff; -+ dst[5] = t & 0xff; -+} -+ -+void __init ath79_init_local_mac(unsigned char *dst, const unsigned char *src) -+{ -+ int i; -+ -+ if (!dst) -+ return; -+ -+ if (!src || !is_valid_ether_addr(src)) { -+ memset(dst, '\0', ETH_ALEN); -+ return; -+ } -+ -+ for (i = 0; i < ETH_ALEN; i++) -+ dst[i] = src[i]; -+ dst[0] |= 0x02; -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-eth.h linux-4.1.13/arch/mips/ath79/dev-eth.h ---- linux-4.1.13.orig/arch/mips/ath79/dev-eth.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-eth.h 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,53 @@ -+/* -+ * Atheros AR71xx SoC device definitions -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_DEV_ETH_H -+#define _ATH79_DEV_ETH_H -+ -+#include -+ -+struct platform_device; -+ -+extern unsigned char ath79_mac_base[] __initdata; -+void ath79_parse_ascii_mac(char *mac_str, u8 *mac); -+void ath79_init_mac(unsigned char *dst, const unsigned char *src, -+ int offset); -+void ath79_init_local_mac(unsigned char *dst, const unsigned char *src); -+ -+struct ath79_eth_pll_data { -+ u32 pll_10; -+ u32 pll_100; -+ u32 pll_1000; -+}; -+ -+extern struct ath79_eth_pll_data ath79_eth0_pll_data; -+extern struct ath79_eth_pll_data ath79_eth1_pll_data; -+ -+extern struct ag71xx_platform_data ath79_eth0_data; -+extern struct ag71xx_platform_data ath79_eth1_data; -+extern struct platform_device ath79_eth0_device; -+extern struct platform_device ath79_eth1_device; -+void ath79_register_eth(unsigned int id); -+ -+extern struct ag71xx_switch_platform_data ath79_switch_data; -+ -+extern struct ag71xx_mdio_platform_data ath79_mdio0_data; -+extern struct ag71xx_mdio_platform_data ath79_mdio1_data; -+extern struct platform_device ath79_mdio0_device; -+extern struct platform_device ath79_mdio1_device; -+void ath79_register_mdio(unsigned int id, u32 phy_mask); -+ -+void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); -+void ath79_setup_ar934x_eth_cfg(u32 mask); -+void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); -+void ath79_setup_qca955x_eth_cfg(u32 mask); -+ -+#endif /* _ATH79_DEV_ETH_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.c linux-4.1.13/arch/mips/ath79/dev-m25p80.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-m25p80.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,118 @@ -+/* -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "dev-spi.h" -+#include "dev-m25p80.h" -+ -+static struct ath79_spi_controller_data ath79_spi0_cdata = -+{ -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ -+static struct ath79_spi_controller_data ath79_spi1_cdata = -+{ -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 1, -+}; -+ -+static struct spi_board_info ath79_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "m25p80", -+ .controller_data = &ath79_spi0_cdata, -+ }, -+ { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 25000000, -+ .modalias = "m25p80", -+ .controller_data = &ath79_spi1_cdata, -+ } -+}; -+ -+static struct ath79_spi_platform_data ath79_spi_data; -+ -+void __init ath79_register_m25p80(struct flash_platform_data *pdata) -+{ -+ ath79_spi_data.bus_num = 0; -+ ath79_spi_data.num_chipselect = 1; -+ ath79_spi0_cdata.is_flash = true; -+ ath79_spi_info[0].platform_data = pdata; -+ ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); -+} -+ -+static struct flash_platform_data *multi_pdata; -+ -+static struct mtd_info *concat_devs[2] = { NULL, NULL }; -+static struct work_struct mtd_concat_work; -+ -+static void mtd_concat_add_work(struct work_struct *work) -+{ -+ struct mtd_info *mtd; -+ -+ mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash"); -+ -+ mtd_device_register(mtd, multi_pdata->parts, multi_pdata->nr_parts); -+} -+ -+static void mtd_concat_add(struct mtd_info *mtd) -+{ -+ static bool registered = false; -+ -+ if (registered) -+ return; -+ -+ if (!strcmp(mtd->name, "spi0.0")) -+ concat_devs[0] = mtd; -+ else if (!strcmp(mtd->name, "spi0.1")) -+ concat_devs[1] = mtd; -+ else -+ return; -+ -+ if (!concat_devs[0] || !concat_devs[1]) -+ return; -+ -+ registered = true; -+ INIT_WORK(&mtd_concat_work, mtd_concat_add_work); -+ schedule_work(&mtd_concat_work); -+} -+ -+static void mtd_concat_remove(struct mtd_info *mtd) -+{ -+} -+ -+static void add_mtd_concat_notifier(void) -+{ -+ static struct mtd_notifier not = { -+ .add = mtd_concat_add, -+ .remove = mtd_concat_remove, -+ }; -+ -+ register_mtd_user(¬); -+} -+ -+ -+void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) -+{ -+ multi_pdata = pdata; -+ add_mtd_concat_notifier(); -+ ath79_spi_data.bus_num = 0; -+ ath79_spi_data.num_chipselect = 2; -+ ath79_spi0_cdata.is_flash = true; -+ ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.h linux-4.1.13/arch/mips/ath79/dev-m25p80.h ---- linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-m25p80.h 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,17 @@ -+/* -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_DEV_M25P80_H -+#define _ATH79_DEV_M25P80_H -+ -+#include -+ -+void ath79_register_m25p80(struct flash_platform_data *pdata) __init; -+void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; -+ -+#endif /* _ATH79_DEV_M25P80_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-nfc.c linux-4.1.13/arch/mips/ath79/dev-nfc.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-nfc.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-nfc.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,141 @@ -+/* -+ * Atheros AR934X SoCs built-in NAND flash controller support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "dev-nfc.h" -+ -+static struct resource ath79_nfc_resources[2]; -+static u64 ar934x_nfc_dmamask = DMA_BIT_MASK(32); -+static struct ar934x_nfc_platform_data ath79_nfc_data; -+ -+static struct platform_device ath79_nfc_device = { -+ .name = AR934X_NFC_DRIVER_NAME, -+ .id = -1, -+ .resource = ath79_nfc_resources, -+ .num_resources = ARRAY_SIZE(ath79_nfc_resources), -+ .dev = { -+ .dma_mask = &ar934x_nfc_dmamask, -+ .coherent_dma_mask = DMA_BIT_MASK(32), -+ .platform_data = &ath79_nfc_data, -+ }, -+}; -+ -+static void __init ath79_nfc_init_resource(struct resource res[2], -+ unsigned long base, -+ unsigned long size, -+ int irq) -+{ -+ memset(res, 0, sizeof(struct resource) * 2); -+ -+ res[0].flags = IORESOURCE_MEM; -+ res[0].start = base; -+ res[0].end = base + size - 1; -+ -+ res[1].flags = IORESOURCE_IRQ; -+ res[1].start = irq; -+ res[1].end = irq; -+} -+ -+static void ar934x_nfc_hw_reset(bool active) -+{ -+ if (active) { -+ ath79_device_reset_set(AR934X_RESET_NANDF); -+ udelay(100); -+ -+ ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG); -+ udelay(250); -+ } else { -+ ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG); -+ udelay(250); -+ -+ ath79_device_reset_clear(AR934X_RESET_NANDF); -+ udelay(100); -+ } -+} -+ -+static void ar934x_nfc_setup(void) -+{ -+ ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset; -+ -+ ath79_nfc_init_resource(ath79_nfc_resources, -+ AR934X_NFC_BASE, AR934X_NFC_SIZE, -+ ATH79_MISC_IRQ(21)); -+ -+ platform_device_register(&ath79_nfc_device); -+} -+ -+static void qca955x_nfc_hw_reset(bool active) -+{ -+ if (active) { -+ ath79_device_reset_set(QCA955X_RESET_NANDF); -+ udelay(250); -+ } else { -+ ath79_device_reset_clear(QCA955X_RESET_NANDF); -+ udelay(100); -+ } -+} -+ -+static void qca955x_nfc_setup(void) -+{ -+ ath79_nfc_data.hw_reset = qca955x_nfc_hw_reset; -+ -+ ath79_nfc_init_resource(ath79_nfc_resources, -+ QCA955X_NFC_BASE, QCA955X_NFC_SIZE, -+ ATH79_MISC_IRQ(21)); -+ -+ platform_device_register(&ath79_nfc_device); -+} -+ -+void __init ath79_nfc_set_select_chip(void (*f)(int chip_no)) -+{ -+ ath79_nfc_data.select_chip = f; -+} -+ -+void __init ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) -+{ -+ ath79_nfc_data.scan_fixup = f; -+} -+ -+void __init ath79_nfc_set_swap_dma(bool enable) -+{ -+ ath79_nfc_data.swap_dma = enable; -+} -+ -+void __init ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) -+{ -+ ath79_nfc_data.ecc_mode = mode; -+} -+ -+void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts) -+{ -+ ath79_nfc_data.parts = parts; -+ ath79_nfc_data.nr_parts = nr_parts; -+} -+ -+void __init ath79_register_nfc(void) -+{ -+ if (soc_is_ar934x()) -+ ar934x_nfc_setup(); -+ else if (soc_is_qca955x()) -+ qca955x_nfc_setup(); -+ else -+ BUG(); -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-nfc.h linux-4.1.13/arch/mips/ath79/dev-nfc.h ---- linux-4.1.13.orig/arch/mips/ath79/dev-nfc.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-nfc.h 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,34 @@ -+/* -+ * Atheros AR934X SoCs built-in NAND Flash Controller support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_DEV_NFC_H -+#define _ATH79_DEV_NFC_H -+ -+struct mtd_partition; -+enum ar934x_nfc_ecc_mode; -+ -+#ifdef CONFIG_ATH79_DEV_NFC -+void ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts); -+void ath79_nfc_set_select_chip(void (*f)(int chip_no)); -+void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)); -+void ath79_nfc_set_swap_dma(bool enable); -+void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode); -+void ath79_register_nfc(void); -+#else -+static inline void ath79_nfc_set_parts(struct mtd_partition *parts, -+ int nr_parts) {} -+static inline void ath79_nfc_set_select_chip(void (*f)(int chip_no)) {} -+static inline void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) {} -+static inline void ath79_nfc_set_swap_dma(bool enable) {} -+static inline void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) {} -+static inline void ath79_register_nfc(void) {} -+#endif -+ -+#endif /* _ATH79_DEV_NFC_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-usb.c linux-4.1.13/arch/mips/ath79/dev-usb.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-usb.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-usb.c 2015-12-04 19:57:04.478071913 +0100 -@@ -37,6 +37,8 @@ - static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { - .caps_offset = 0x100, - .has_tt = 1, -+ .qca_force_host_mode = 1, -+ .qca_force_16bit_ptw = 1, - }; - - static void __init ath79_usb_register(const char *name, int id, -@@ -159,6 +161,9 @@ - ath79_device_reset_clear(AR913X_RESET_USB_PHY); - mdelay(10); - -+ ath79_ehci_pdata_v2.qca_force_host_mode = 0; -+ ath79_ehci_pdata_v2.qca_force_16bit_ptw = 0; -+ - ath79_usb_register("ehci-platform", -1, - AR913X_EHCI_BASE, AR913X_EHCI_SIZE, - ATH79_CPU_IRQ(3), -@@ -182,14 +187,34 @@ - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - --static void __init ar934x_usb_setup(void) -+static void enable_tx_tx_idp_violation_fix(unsigned base) - { -- u32 bootstrap; -+ void __iomem *phy_reg; -+ u32 t; - -- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) -+ phy_reg = ioremap(base, 4); -+ if (!phy_reg) - return; - -+ t = ioread32(phy_reg); -+ t &= ~0xff; -+ t |= 0x58; -+ iowrite32(t, phy_reg); -+ -+ iounmap(phy_reg); -+} -+ -+static void ar934x_usb_reset_notifier(struct platform_device *pdev) -+{ -+ if (pdev->id != -1) -+ return; -+ -+ enable_tx_tx_idp_violation_fix(0x18116c94); -+ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); -+} -+ -+static void __init ar934x_usb_setup(void) -+{ - ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); - udelay(1000); - -@@ -202,14 +227,64 @@ - ath79_device_reset_clear(AR934X_RESET_USB_HOST); - udelay(1000); - -+ if (ath79_soc_rev >= 3) -+ ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; -+ - ath79_usb_register("ehci-platform", -1, - AR934X_EHCI_BASE, AR934X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - -+static void __init qca953x_usb_setup(void) -+{ -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ -+ ath79_device_reset_set(QCA953X_RESET_USBSUS_OVERRIDE); -+ udelay(1000); -+ -+ ath79_device_reset_clear(QCA953X_RESET_USB_PHY); -+ udelay(1000); -+ -+ ath79_device_reset_clear(QCA953X_RESET_USB_PHY_ANALOG); -+ udelay(1000); -+ -+ ath79_device_reset_clear(QCA953X_RESET_USB_HOST); -+ udelay(1000); -+ -+ ath79_usb_register("ehci-platform", -1, -+ QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE, -+ ATH79_CPU_IRQ(3), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+} -+ -+static void qca955x_usb_reset_notifier(struct platform_device *pdev) -+{ -+ u32 base; -+ -+ switch (pdev->id) { -+ case 0: -+ base = 0x18116c94; -+ break; -+ -+ case 1: -+ base = 0x18116e54; -+ break; -+ -+ default: -+ return; -+ } -+ -+ enable_tx_tx_idp_violation_fix(base); -+ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); -+} -+ - static void __init qca955x_usb_setup(void) - { -+ ath79_ehci_pdata_v2.reset_notifier = qca955x_usb_reset_notifier; -+ - ath79_usb_register("ehci-platform", 0, - QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, - ATH79_IP3_IRQ(0), -@@ -221,6 +296,19 @@ - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - -+static void __init qca956x_usb_setup(void) -+{ -+ ath79_usb_register("ehci-platform", 0, -+ QCA956X_EHCI0_BASE, QCA956X_EHCI_SIZE, -+ ATH79_IP3_IRQ(0), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ -+ ath79_usb_register("ehci-platform", 1, -+ QCA956X_EHCI1_BASE, QCA956X_EHCI_SIZE, -+ ATH79_IP3_IRQ(1), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+} -+ - void __init ath79_register_usb(void) - { - if (soc_is_ar71xx()) -@@ -235,8 +323,12 @@ - ar933x_usb_setup(); - else if (soc_is_ar934x()) - ar934x_usb_setup(); -+ else if (soc_is_qca953x()) -+ qca953x_usb_setup(); - else if (soc_is_qca955x()) - qca955x_usb_setup(); -+ else if (soc_is_qca9561()) -+ qca956x_usb_setup(); - else - BUG(); - } -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-wmac.c linux-4.1.13/arch/mips/ath79/dev-wmac.c ---- linux-4.1.13.orig/arch/mips/ath79/dev-wmac.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-wmac.c 2015-12-04 19:57:04.506070082 +0100 -@@ -15,14 +15,21 @@ - #include - #include - #include -+#include - #include - #include -+#include - - #include - #include -+#include "common.h" - #include "dev-wmac.h" - --static struct ath9k_platform_data ath79_wmac_data; -+static u8 ath79_wmac_mac[ETH_ALEN]; -+ -+static struct ath9k_platform_data ath79_wmac_data = { -+ .led_pin = -1, -+}; - - static struct resource ath79_wmac_resources[] = { - { -@@ -44,7 +51,7 @@ - }, - }; - --static void __init ar913x_wmac_setup(void) -+static int ar913x_wmac_reset(void) - { - /* reset the WMAC */ - ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); -@@ -53,22 +60,48 @@ - ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); - mdelay(10); - -+ return 0; -+} -+ -+static void __init ar913x_wmac_setup(void) -+{ -+ ar913x_wmac_reset(); -+ - ath79_wmac_resources[0].start = AR913X_WMAC_BASE; - ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; - ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); - ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); -+ -+ ath79_wmac_data.external_reset = ar913x_wmac_reset; - } - - - static int ar933x_wmac_reset(void) - { -+ int retries = 20; -+ - ath79_device_reset_set(AR933X_RESET_WMAC); - ath79_device_reset_clear(AR933X_RESET_WMAC); - -- return 0; -+ while (1) { -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0) -+ return 0; -+ -+ if (retries-- == 0) -+ break; -+ -+ udelay(10000); -+ retries++; -+ } -+ -+ pr_err("ar933x: WMAC reset timed out"); -+ return -ETIMEDOUT; - } - --static int ar933x_r1_get_wmac_revision(void) -+static int ar93xx_get_soc_revision(void) - { - return ath79_soc_rev; - } -@@ -93,7 +126,7 @@ - ath79_wmac_data.is_clk_25mhz = true; - - if (ath79_soc_rev == 1) -- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; - - ath79_wmac_data.external_reset = ar933x_wmac_reset; - } -@@ -114,6 +147,28 @@ - ath79_wmac_data.is_clk_25mhz = false; - else - ath79_wmac_data.is_clk_25mhz = true; -+ -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; -+} -+ -+static void qca953x_wmac_setup(void) -+{ -+ u32 t; -+ -+ ath79_wmac_device.name = "qca953x_wmac"; -+ -+ ath79_wmac_resources[0].start = QCA953X_WMAC_BASE; -+ ath79_wmac_resources[0].end = QCA953X_WMAC_BASE + QCA953X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); -+ -+ t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ if (t & QCA953X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; -+ -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; - } - - static void qca955x_wmac_setup(void) -@@ -134,7 +189,221 @@ - ath79_wmac_data.is_clk_25mhz = true; - } - --void __init ath79_register_wmac(u8 *cal_data) -+static void qca956x_wmac_setup(void) -+{ -+ u32 t; -+ -+ ath79_wmac_device.name = "qca956x_wmac"; -+ -+ ath79_wmac_resources[0].start = QCA956X_WMAC_BASE; -+ ath79_wmac_resources[0].end = QCA956X_WMAC_BASE + QCA956X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); -+ -+ t = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); -+ if (t & QCA956X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) -+{ -+ int timeout = 1000; -+ u32 val; -+ -+ __raw_readl(base + AR9300_OTP_BASE + (4 * addr)); -+ while (timeout--) { -+ val = __raw_readl(base + AR9300_OTP_STATUS); -+ if ((val & AR9300_OTP_STATUS_TYPE) == AR9300_OTP_STATUS_VALID) -+ break; -+ -+ udelay(10); -+ } -+ -+ if (!timeout) -+ return false; -+ -+ *data = __raw_readl(base + AR9300_OTP_READ_DATA); -+ return true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_read(void __iomem *base, int addr, u8 *dest, int len) -+{ -+ u32 data; -+ int i; -+ -+ for (i = 0; i < len; i++) { -+ int offset = 8 * ((addr - i) % 4); -+ -+ if (!ar93xx_wmac_otp_read_word(base, (addr - i) / 4, &data)) -+ return false; -+ -+ dest[i] = (data >> offset) & 0xff; -+ } -+ -+ return true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_uncompress(void __iomem *base, int addr, int len, u8 *dest, -+ int dest_start, int dest_len) -+{ -+ int dest_bytes = 0; -+ int offset = 0; -+ int end = addr - len; -+ u8 hdr[2]; -+ -+ while (addr > end) { -+ if (!ar93xx_wmac_otp_read(base, addr, hdr, 2)) -+ return false; -+ -+ addr -= 2; -+ offset += hdr[0]; -+ -+ if (offset <= dest_start + dest_len && -+ offset + len >= dest_start) { -+ int data_offset = 0; -+ int dest_offset = 0; -+ int copy_len; -+ -+ if (offset < dest_start) -+ data_offset = dest_start - offset; -+ else -+ dest_offset = offset - dest_start; -+ -+ copy_len = len - data_offset; -+ if (copy_len > dest_len - dest_offset) -+ copy_len = dest_len - dest_offset; -+ -+ ar93xx_wmac_otp_read(base, addr - data_offset, -+ dest + dest_offset, -+ copy_len); -+ -+ dest_bytes += copy_len; -+ } -+ addr -= hdr[1]; -+ } -+ return !!dest_bytes; -+} -+ -+bool __init ar93xx_wmac_read_mac_address(u8 *dest) -+{ -+ void __iomem *base; -+ bool ret = false; -+ int addr = 0x1ff; -+ unsigned int len; -+ u32 hdr_u32; -+ u8 *hdr = (u8 *) &hdr_u32; -+ u8 mac[6] = { 0x00, 0x02, 0x03, 0x04, 0x05, 0x06 }; -+ int mac_start = 2, mac_end = 8; -+ -+ BUG_ON(!soc_is_ar933x() && !soc_is_ar934x()); -+ base = ioremap_nocache(AR933X_WMAC_BASE, AR933X_WMAC_SIZE); -+ while (addr > sizeof(hdr)) { -+ if (!ar93xx_wmac_otp_read(base, addr, hdr, sizeof(hdr))) -+ break; -+ -+ if (hdr_u32 == 0 || hdr_u32 == ~0) -+ break; -+ -+ len = (hdr[1] << 4) | (hdr[2] >> 4); -+ addr -= 4; -+ -+ switch (hdr[0] >> 5) { -+ case 0: -+ if (len < mac_end) -+ break; -+ -+ ar93xx_wmac_otp_read(base, addr - mac_start, mac, 6); -+ ret = true; -+ break; -+ case 3: -+ ret |= ar93xx_wmac_otp_uncompress(base, addr, len, mac, -+ mac_start, 6); -+ break; -+ default: -+ break; -+ } -+ -+ addr -= len + 2; -+ } -+ -+ iounmap(base); -+ if (ret) -+ memcpy(dest, mac, 6); -+ -+ return ret; -+} -+ -+void __init ath79_wmac_disable_2ghz(void) -+{ -+ ath79_wmac_data.disable_2ghz = true; -+} -+ -+void __init ath79_wmac_disable_5ghz(void) -+{ -+ ath79_wmac_data.disable_5ghz = true; -+} -+ -+void __init ath79_wmac_set_tx_gain_buffalo(void) -+{ -+ ath79_wmac_data.tx_gain_buffalo = true; -+} -+ -+static int ath79_request_ext_lna_gpio(unsigned chain, int gpio) -+{ -+ char buf[32]; -+ char *label; -+ int err; -+ -+ scnprintf(buf, sizeof(buf), "external LNA%u", chain); -+ label = kstrdup(buf, GFP_KERNEL); -+ -+ err = gpio_request_one(gpio, GPIOF_DIR_OUT | GPIOF_INIT_LOW, label); -+ if (err) { -+ pr_err("unable to request GPIO%d for external LNA%u\n", -+ gpio, chain); -+ kfree(label); -+ } -+ -+ return err; -+} -+ -+static void ar934x_set_ext_lna_gpio(unsigned chain, int gpio) -+{ -+ unsigned int sel; -+ int err; -+ -+ if (WARN_ON(chain > 1)) -+ return; -+ -+ err = ath79_request_ext_lna_gpio(chain, gpio); -+ if (err) -+ return; -+ -+ if (chain == 0) -+ sel = AR934X_GPIO_OUT_EXT_LNA0; -+ else -+ sel = AR934X_GPIO_OUT_EXT_LNA1; -+ -+ ath79_gpio_output_select(gpio, sel); -+} -+ -+void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio) -+{ -+ if (soc_is_ar934x()) -+ ar934x_set_ext_lna_gpio(chain, gpio); -+} -+ -+void __init ath79_wmac_set_led_pin(int gpio) -+{ -+ ath79_wmac_data.led_pin = gpio; -+} -+ -+void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) - ar913x_wmac_setup(); -@@ -142,8 +411,12 @@ - ar933x_wmac_setup(); - else if (soc_is_ar934x()) - ar934x_wmac_setup(); -+ else if (soc_is_qca953x()) -+ qca953x_wmac_setup(); - else if (soc_is_qca955x()) - qca955x_wmac_setup(); -+ else if (soc_is_qca956x()) -+ qca956x_wmac_setup(); - else - BUG(); - -@@ -151,5 +424,16 @@ - memcpy(ath79_wmac_data.eeprom_data, cal_data, - sizeof(ath79_wmac_data.eeprom_data)); - -+ if (mac_addr) { -+ memcpy(ath79_wmac_mac, mac_addr, sizeof(ath79_wmac_mac)); -+ ath79_wmac_data.macaddr = ath79_wmac_mac; -+ } -+ - platform_device_register(&ath79_wmac_device); - } -+ -+void __init ath79_register_wmac_simple(void) -+{ -+ ath79_register_wmac(NULL, NULL); -+ ath79_wmac_data.eeprom_name = "soc_wmac.eeprom"; -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-wmac.h linux-4.1.13/arch/mips/ath79/dev-wmac.h ---- linux-4.1.13.orig/arch/mips/ath79/dev-wmac.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/dev-wmac.h 2015-12-04 19:57:04.510069820 +0100 -@@ -12,6 +12,14 @@ - #ifndef _ATH79_DEV_WMAC_H - #define _ATH79_DEV_WMAC_H - --void ath79_register_wmac(u8 *cal_data); -+void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); -+void ath79_register_wmac_simple(void); -+void ath79_wmac_disable_2ghz(void); -+void ath79_wmac_disable_5ghz(void); -+void ath79_wmac_set_tx_gain_buffalo(void); -+void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); -+void ath79_wmac_set_led_pin(int gpio); -+ -+bool ar93xx_wmac_read_mac_address(u8 *dest); - - #endif /* _ATH79_DEV_WMAC_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/early_printk.c linux-4.1.13/arch/mips/ath79/early_printk.c ---- linux-4.1.13.orig/arch/mips/ath79/early_printk.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/early_printk.c 2015-12-04 19:57:04.478071913 +0100 -@@ -56,6 +56,46 @@ - /* nothing to do */ - } - -+static void prom_enable_uart(u32 id) -+{ -+ void __iomem *gpio_base; -+ u32 uart_en; -+ u32 t; -+ -+ switch (id) { -+ case REV_ID_MAJOR_AR71XX: -+ uart_en = AR71XX_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR7240: -+ case REV_ID_MAJOR_AR7241: -+ case REV_ID_MAJOR_AR7242: -+ uart_en = AR724X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR913X: -+ uart_en = AR913X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR9330: -+ case REV_ID_MAJOR_AR9331: -+ uart_en = AR933X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR9341: -+ case REV_ID_MAJOR_AR9342: -+ case REV_ID_MAJOR_AR9344: -+ /* TODO */ -+ default: -+ return; -+ } -+ -+ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE)); -+ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC); -+ t |= uart_en; -+ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); -+} -+ - static void prom_putchar_init(void) - { - void __iomem *base; -@@ -74,8 +114,12 @@ - case REV_ID_MAJOR_AR9341: - case REV_ID_MAJOR_AR9342: - case REV_ID_MAJOR_AR9344: -+ case REV_ID_MAJOR_QCA9533: -+ case REV_ID_MAJOR_QCA9533_V2: - case REV_ID_MAJOR_QCA9556: - case REV_ID_MAJOR_QCA9558: -+ case REV_ID_MAJOR_TP9343: -+ case REV_ID_MAJOR_QCA9561: - _prom_putchar = prom_putchar_ar71xx; - break; - -@@ -86,8 +130,10 @@ - - default: - _prom_putchar = prom_putchar_dummy; -- break; -+ return; - } -+ -+ prom_enable_uart(id); - } - - void prom_putchar(unsigned char ch) -diff -Nur linux-4.1.13.orig/arch/mips/ath79/gpio.c linux-4.1.13/arch/mips/ath79/gpio.c ---- linux-4.1.13.orig/arch/mips/ath79/gpio.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/gpio.c 2015-12-04 19:57:05.893979276 +0100 -@@ -20,15 +20,29 @@ - #include - #include - #include -+#include -+#include -+ -+#include - - #include - #include -+#include - #include "common.h" - --static void __iomem *ath79_gpio_base; -+void __iomem *ath79_gpio_base; -+EXPORT_SYMBOL_GPL(ath79_gpio_base); -+ - static unsigned long ath79_gpio_count; - static DEFINE_SPINLOCK(ath79_gpio_lock); - -+/* -+ * gpio_both_edge is a bitmask of which gpio pins need to have -+ * the detect priority flipped from the interrupt handler to -+ * emulate IRQ_TYPE_EDGE_BOTH. -+ */ -+static unsigned long gpio_both_edge = 0; -+ - static void __ath79_gpio_set_value(unsigned gpio, int value) - { - void __iomem *base = ath79_gpio_base; -@@ -128,6 +142,30 @@ - return 0; - } - -+int ath79_gpio_direction_select(unsigned gpio, bool oe) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ bool ieq_1 = (soc_is_ar934x() || -+ soc_is_qca953x()); -+ -+ if (gpio >= ath79_gpio_count) -+ return -1; -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ if ((ieq_1 && oe) || (!ieq_1 && !oe)) -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), -+ base + AR71XX_GPIO_REG_OE); -+ else -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), -+ base + AR71XX_GPIO_REG_OE); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+ -+ return 0; -+} -+ - static struct gpio_chip ath79_gpio_chip = { - .label = "ath79", - .get = ath79_gpio_get_value, -@@ -146,7 +184,8 @@ - soc_is_ar913x() || - soc_is_ar933x()) - reg = AR71XX_GPIO_REG_FUNC; -- else if (soc_is_ar934x()) -+ else if (soc_is_ar934x() || -+ soc_is_qca953x() || soc_is_qca956x()) - reg = AR934X_GPIO_REG_FUNC; - else - BUG(); -@@ -154,6 +193,36 @@ - return ath79_gpio_base + reg; - } - -+static void __iomem *ath79_gpio_get_function2_reg(void) -+{ -+ u32 reg = 0; -+ -+ if (soc_is_ar71xx() || -+ soc_is_ar724x() || -+ soc_is_ar913x() || -+ soc_is_ar933x()) -+ reg = AR71XX_GPIO_REG_FUNC_2; -+ else -+ BUG(); -+ -+ return ath79_gpio_base + reg; -+} -+ -+ -+void ath79_gpio_function2_setup(u32 set, u32 clear) -+{ -+ void __iomem *reg = ath79_gpio_get_function2_reg(); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); -+ /* flush write */ -+ __raw_readl(reg); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+} -+ - void ath79_gpio_function_setup(u32 set, u32 clear) - { - void __iomem *reg = ath79_gpio_get_function_reg(); -@@ -178,6 +247,172 @@ - ath79_gpio_function_setup(0, mask); - } - -+void __init ath79_gpio_output_select(unsigned gpio, u8 val) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ unsigned int reg, reg_base; -+ unsigned long gpio_count; -+ u32 t, s; -+ -+ if (soc_is_ar934x()) { -+ gpio_count = AR934X_GPIO_COUNT; -+ reg_base = AR934X_GPIO_REG_OUT_FUNC0; -+ } else if (soc_is_qca953x()) { -+ gpio_count = QCA953X_GPIO_COUNT; -+ reg_base = QCA953X_GPIO_REG_OUT_FUNC0; -+ } else if (soc_is_qca955x()) { -+ gpio_count = QCA955X_GPIO_COUNT; -+ reg_base = QCA955X_GPIO_REG_OUT_FUNC0; -+ } else { -+ BUG(); -+ } -+ -+ if (gpio >= gpio_count) -+ return; -+ -+ reg = reg_base + 4 * (gpio / 4); -+ s = 8 * (gpio % 4); -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ t = __raw_readl(base + reg); -+ t &= ~(0xff << s); -+ t |= val << s; -+ __raw_writel(t, base + reg); -+ -+ /* flush write */ -+ (void) __raw_readl(base + reg); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+} -+ -+static int ath79_gpio_irq_type(struct irq_data *d, unsigned type) -+{ -+ int offset = d->irq - ATH79_GPIO_IRQ_BASE; -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ unsigned long int_type; -+ unsigned long int_polarity; -+ unsigned long bit = (1 << offset); -+ -+ spin_lock_irqsave(&ath79_gpio_lock, flags); -+ -+ int_type = __raw_readl(base + AR71XX_GPIO_REG_INT_TYPE); -+ int_polarity = __raw_readl(base + AR71XX_GPIO_REG_INT_POLARITY); -+ -+ gpio_both_edge &= ~bit; -+ -+ switch (type) { -+ case IRQ_TYPE_EDGE_RISING: -+ int_type &= ~bit; -+ int_polarity |= bit; -+ break; -+ -+ case IRQ_TYPE_EDGE_FALLING: -+ int_type &= ~bit; -+ int_polarity &= ~bit; -+ break; -+ -+ case IRQ_TYPE_LEVEL_HIGH: -+ int_type |= bit; -+ int_polarity |= bit; -+ break; -+ -+ case IRQ_TYPE_LEVEL_LOW: -+ int_type |= bit; -+ int_polarity &= ~bit; -+ break; -+ -+ case IRQ_TYPE_EDGE_BOTH: -+ int_type |= bit; -+ /* set polarity based on current value */ -+ if (gpio_get_value(offset)) { -+ int_polarity &= ~bit; -+ } else { -+ int_polarity |= bit; -+ } -+ /* flip this gpio in the interrupt handler */ -+ gpio_both_edge |= bit; -+ break; -+ -+ default: -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+ return -EINVAL; -+ } -+ -+ __raw_writel(int_type, base + AR71XX_GPIO_REG_INT_TYPE); -+ __raw_writel(int_polarity, base + AR71XX_GPIO_REG_INT_POLARITY); -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_MODE) | (1 << offset), -+ base + AR71XX_GPIO_REG_INT_MODE); -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE) & ~(1 << offset), -+ base + AR71XX_GPIO_REG_INT_ENABLE); -+ -+ spin_unlock_irqrestore(&ath79_gpio_lock, flags); -+ return 0; -+} -+ -+static void ath79_gpio_irq_enable(struct irq_data *d) -+{ -+ int offset = d->irq - ATH79_GPIO_IRQ_BASE; -+ void __iomem *base = ath79_gpio_base; -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE) | (1 << offset), -+ base + AR71XX_GPIO_REG_INT_ENABLE); -+} -+ -+static void ath79_gpio_irq_disable(struct irq_data *d) -+{ -+ int offset = d->irq - ATH79_GPIO_IRQ_BASE; -+ void __iomem *base = ath79_gpio_base; -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE) & ~(1 << offset), -+ base + AR71XX_GPIO_REG_INT_ENABLE); -+} -+ -+static struct irq_chip ath79_gpio_irqchip = { -+ .name = "GPIO", -+ .irq_enable = ath79_gpio_irq_enable, -+ .irq_disable = ath79_gpio_irq_disable, -+ .irq_set_type = ath79_gpio_irq_type, -+}; -+ -+static irqreturn_t ath79_gpio_irq(int irq, void *dev) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned long stat = __raw_readl(base + AR71XX_GPIO_REG_INT_PENDING); -+ int bit_num; -+ -+ for_each_set_bit(bit_num, &stat, sizeof(stat) * BITS_PER_BYTE) { -+ unsigned long bit = BIT(bit_num); -+ -+ if (bit & gpio_both_edge) { -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_POLARITY) ^ bit, -+ base + AR71XX_GPIO_REG_INT_POLARITY); -+ } -+ -+ generic_handle_irq(ATH79_GPIO_IRQ(bit_num)); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int __init ath79_gpio_irq_init(struct gpio_chip *chip) -+{ -+ int irq; -+ int irq_base = ATH79_GPIO_IRQ_BASE; -+ -+ for (irq = irq_base; irq < irq_base + chip->ngpio; irq++) { -+ irq_set_chip_data(irq, chip); -+ irq_set_chip_and_handler(irq, &ath79_gpio_irqchip, handle_simple_irq); -+ irq_set_noprobe(irq); -+ } -+ -+ return 0; -+} -+ - void __init ath79_gpio_init(void) - { - int err; -@@ -194,14 +429,19 @@ - ath79_gpio_count = AR933X_GPIO_COUNT; - else if (soc_is_ar934x()) - ath79_gpio_count = AR934X_GPIO_COUNT; -+ else if (soc_is_qca953x()) -+ ath79_gpio_count = QCA953X_GPIO_COUNT; - else if (soc_is_qca955x()) - ath79_gpio_count = QCA955X_GPIO_COUNT; -+ else if (soc_is_qca956x()) -+ ath79_gpio_count = QCA956X_GPIO_COUNT; - else - BUG(); - - ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); - ath79_gpio_chip.ngpio = ath79_gpio_count; -- if (soc_is_ar934x() || soc_is_qca955x()) { -+ if (soc_is_ar934x() || soc_is_qca953x() || soc_is_qca955x() || -+ soc_is_qca956x()) { - ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; - ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; - } -@@ -209,6 +449,10 @@ - err = gpiochip_add(&ath79_gpio_chip); - if (err) - panic("cannot add AR71xx GPIO chip, error=%d", err); -+ -+ ath79_gpio_irq_init(&ath79_gpio_chip); -+ -+ request_irq(ATH79_MISC_IRQ(2), ath79_gpio_irq, 0, "ath79-gpio", NULL); - } - - int gpio_get_value(unsigned gpio) -@@ -231,14 +475,22 @@ - - int gpio_to_irq(unsigned gpio) - { -- /* FIXME */ -- return -EINVAL; -+ if (gpio > ath79_gpio_count) { -+ return -EINVAL; -+ } -+ -+ return ATH79_GPIO_IRQ_BASE + gpio; - } - EXPORT_SYMBOL(gpio_to_irq); - - int irq_to_gpio(unsigned irq) - { -- /* FIXME */ -- return -EINVAL; -+ unsigned gpio = irq - ATH79_GPIO_IRQ_BASE; -+ -+ if (gpio > ath79_gpio_count) { -+ return -EINVAL; -+ } -+ -+ return gpio; - } - EXPORT_SYMBOL(irq_to_gpio); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/irq.c linux-4.1.13/arch/mips/ath79/irq.c ---- linux-4.1.13.orig/arch/mips/ath79/irq.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/irq.c 2015-12-04 19:57:04.498070605 +0100 -@@ -26,6 +26,8 @@ - - static void (*ath79_ip2_handler)(void); - static void (*ath79_ip3_handler)(void); -+static struct irq_chip ip2_chip; -+static struct irq_chip ip3_chip; - - static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) - { -@@ -106,7 +108,9 @@ - else if (soc_is_ar724x() || - soc_is_ar933x() || - soc_is_ar934x() || -- soc_is_qca955x()) -+ soc_is_qca953x() || -+ soc_is_qca955x() || -+ soc_is_qca956x()) - ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; - else - BUG(); -@@ -147,12 +151,43 @@ - - for (i = ATH79_IP2_IRQ_BASE; - i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); - } - -+static void qca953x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) -+{ -+ u32 status; -+ -+ disable_irq_nosync(irq); -+ -+ status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS); -+ -+ if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) { -+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_PCIE); -+ generic_handle_irq(ATH79_IP2_IRQ(0)); -+ } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) { -+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_WMAC); -+ generic_handle_irq(ATH79_IP2_IRQ(1)); -+ } else { -+ spurious_interrupt(); -+ } -+ -+ enable_irq(irq); -+} -+ -+static void qca953x_irq_init(void) -+{ -+ int i; -+ -+ for (i = ATH79_IP2_IRQ_BASE; -+ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); -+} -+ - static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) - { - u32 status; -@@ -222,19 +257,108 @@ - - for (i = ATH79_IP2_IRQ_BASE; - i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); - - for (i = ATH79_IP3_IRQ_BASE; - i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -+ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); - } - -+static void qca956x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) -+{ -+ u32 status; -+ -+ disable_irq_nosync(irq); -+ -+ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); -+ status &= QCA956X_EXT_INT_PCIE_RC1_ALL | QCA956X_EXT_INT_WMAC_ALL; -+ -+ if (status == 0) { -+ spurious_interrupt(); -+ goto enable; -+ } -+ -+ if (status & QCA956X_EXT_INT_PCIE_RC1_ALL) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP2_IRQ(0)); -+ } -+ -+ if (status & QCA956X_EXT_INT_WMAC_ALL) { -+ /* TODO: flsuh DDR? */ -+ generic_handle_irq(ATH79_IP2_IRQ(1)); -+ } -+ -+enable: -+ enable_irq(irq); -+} -+ -+static void qca956x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) -+{ -+ u32 status; -+ -+ disable_irq_nosync(irq); -+ -+ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); -+ status &= QCA956X_EXT_INT_PCIE_RC2_ALL | -+ QCA956X_EXT_INT_USB1 | QCA956X_EXT_INT_USB2; -+ -+ if (status == 0) { -+ spurious_interrupt(); -+ goto enable; -+ } -+ -+ if (status & QCA956X_EXT_INT_USB1) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(0)); -+ } -+ -+ if (status & QCA956X_EXT_INT_USB2) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(1)); -+ } -+ -+ if (status & QCA956X_EXT_INT_PCIE_RC2_ALL) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(2)); -+ } -+ -+enable: -+ enable_irq(irq); -+} -+ -+static void qca956x_enable_timer_cb(void) { -+ u32 misc; -+ -+ misc = ath79_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); -+ misc |= MISC_INT_MIPS_SI_TIMERINT_MASK; -+ ath79_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, misc); -+} -+ -+static void qca956x_irq_init(void) -+{ -+ int i; -+ -+ for (i = ATH79_IP2_IRQ_BASE; -+ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch); -+ -+ for (i = ATH79_IP3_IRQ_BASE; -+ i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); -+ -+ /* QCA956x timer init workaround has to be applied right before setting -+ * up the clock. Else, there will be no jiffies */ -+ late_time_init = &qca956x_enable_timer_cb; -+} -+ - asmlinkage void plat_irq_dispatch(void) - { - unsigned long pending; -@@ -335,8 +459,41 @@ - do_IRQ(ATH79_CPU_IRQ(3)); - } - -+static void qca953x_ip3_handler(void) -+{ -+ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_USB); -+ do_IRQ(ATH79_CPU_IRQ(3)); -+} -+ -+static void ath79_ip2_disable(struct irq_data *data) -+{ -+ disable_irq(ATH79_CPU_IRQ(2)); -+} -+ -+static void ath79_ip2_enable(struct irq_data *data) -+{ -+ enable_irq(ATH79_CPU_IRQ(2)); -+} -+ -+static void ath79_ip3_disable(struct irq_data *data) -+{ -+ disable_irq(ATH79_CPU_IRQ(3)); -+} -+ -+static void ath79_ip3_enable(struct irq_data *data) -+{ -+ enable_irq(ATH79_CPU_IRQ(3)); -+} -+ - void __init arch_init_irq(void) - { -+ ip2_chip = dummy_irq_chip; -+ ip3_chip = dummy_irq_chip; -+ ip2_chip.irq_disable = ath79_ip2_disable; -+ ip2_chip.irq_enable = ath79_ip2_enable; -+ ip3_chip.irq_disable = ath79_ip3_disable; -+ ip3_chip.irq_enable = ath79_ip3_enable; -+ - if (soc_is_ar71xx()) { - ath79_ip2_handler = ar71xx_ip2_handler; - ath79_ip3_handler = ar71xx_ip3_handler; -@@ -352,9 +509,15 @@ - } else if (soc_is_ar934x()) { - ath79_ip2_handler = ath79_default_ip2_handler; - ath79_ip3_handler = ar934x_ip3_handler; -+ } else if (soc_is_qca953x()) { -+ ath79_ip2_handler = ath79_default_ip2_handler; -+ ath79_ip3_handler = qca953x_ip3_handler; - } else if (soc_is_qca955x()) { - ath79_ip2_handler = ath79_default_ip2_handler; - ath79_ip3_handler = ath79_default_ip3_handler; -+ } else if (soc_is_qca956x()) { -+ ath79_ip2_handler = ath79_default_ip2_handler; -+ ath79_ip3_handler = ath79_default_ip3_handler; - } else { - BUG(); - } -@@ -364,6 +527,10 @@ - - if (soc_is_ar934x()) - ar934x_ip2_irq_init(); -+ else if (soc_is_qca953x()) -+ qca953x_irq_init(); - else if (soc_is_qca955x()) - qca955x_irq_init(); -+ else if (soc_is_qca956x()) -+ qca956x_irq_init(); - } -diff -Nur linux-4.1.13.orig/arch/mips/ath79/Kconfig linux-4.1.13/arch/mips/ath79/Kconfig ---- linux-4.1.13.orig/arch/mips/ath79/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/Kconfig 2015-12-04 19:57:05.957975089 +0100 -@@ -2,75 +2,1466 @@ - - menu "Atheros AR71XX/AR724X/AR913X machine selection" - -+config ATH79_MACH_ALFA_AP96 -+ bool "ALFA Network AP96 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_HORNET_UB -+ bool "ALFA Network Hornet-UB board support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ALFA_NX -+ bool "ALFA Network N2/N5 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TUBE2H -+ bool "ALFA Network Tube2H board support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ALL0258N -+ bool "Allnet ALL0258N support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_ALL0315N -+ bool "Allnet ALL0315N support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_ANTMINER_S1 -+ bool "Bitmain Antminer S1 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ANTMINER_S3 -+ bool "Bitmain Antminer S3 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ARDUINO_YUN -+ bool "Arduino Yun" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Arduino Yun. -+ -+config ATH79_MACH_AP113 -+ bool "Atheros AP113 board support" -+ select SOC_AR724X -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_PB9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ select ATH79_DEV_ETH -+ - config ATH79_MACH_AP121 - bool "Atheros AP121 reference board" - select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros AP121 reference board. -+ -+config ATH79_MACH_AP132 -+ bool "Atheros AP132 reference board" -+ select SOC_QCA955X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros AP132 reference boards. -+ -+config ATH79_MACH_AP136 -+ bool "Atheros AP136/AP135 reference board" -+ select SOC_QCA955X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_NFC -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros AP136 or AP135 reference boards. -+ -+config ATH79_MACH_AP143 -+ bool "Atheros AP143 reference board" -+ select SOC_QCA953X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_SPI -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_ETH -+ select ATH79_DEV_M25P80 -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros AP143 reference board. -+ -+config ATH79_MACH_AP147 -+ bool "Atheros AP147 reference board" -+ select SOC_QCA953X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_AP9X_PCI if PCI -+ help -+ Say 'Y' here if you want your kernel to support the -+ QCA AP147 reference boards. -+ -+config ATH79_MACH_AP152 -+ bool "Atheros AP152 reference board" -+ select SOC_QCA956X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_AP9X_PCI if PCI -+ help -+ Say 'Y' here if you want your kernel to support the -+ QCA AP152 reference boards. -+ -+ -+config ATH79_MACH_AP81 -+ bool "Atheros AP81 reference board" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros AP81 reference board. -+ -+config ATH79_MACH_AP83 -+ bool "Atheros AP83 board support" -+ select SOC_AR913X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_AP96 -+ bool "Atheros AP96 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_DB120 -+ bool "Atheros DB120 reference board" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros DB120 reference board. -+ -+config ATH79_MACH_PB42 -+ bool "Atheros PB42 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_PB44 -+ bool "Atheros PB44 reference board" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_SPI -+ select ATH79_DEV_USB -+ help -+ Say 'Y' here if you want your kernel to support the -+ Atheros PB44 reference board. -+ -+config ATH79_MACH_PB92 -+ bool "Atheros PB92 board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_PB9X_PCI if PCI -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_AW_NR580 -+ bool "AzureWave AW-NR580 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_F9K1115V2 -+ bool "Belkin AC1750DB board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_EPG5000 -+ bool "EnGenius EPG5000 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_ESR1750 -+ bool "EnGenius ESR1750 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WHR_HP_G300N -+ bool "Buffalo WHR-HP-G300N board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_WLAE_AG300N -+ bool "Buffalo WLAE-AG300N board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_WLR8100 -+ bool "Sitecom WLR-8100 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WZR_HP_AG300H -+ bool "Buffalo WZR-HP-AG300H board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WZR_HP_G300NH -+ bool "Buffalo WZR-HP-G300NH board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select RTL8366_SMI -+ -+config ATH79_MACH_WZR_HP_G300NH2 -+ bool "Buffalo WZR-HP-G300NH2 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WZR_HP_G450H -+ bool "Buffalo WZR-HP-G450H board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WZR_450HP2 -+ bool "Buffalo WZR-450HP2 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WP543 -+ bool "Compex WP543/WPJ543 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select MYLOADER -+ -+config ATH79_MACH_WPE72 -+ bool "Compex WPE72/WPE72NX board support" -+ select SOC_AR724X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select MYLOADER -+ -+config ATH79_MACH_WPJ344 -+ bool "Compex WPJ344 board support" -+ select SOC_AS934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WPJ531 -+ bool "Compex WPJ531 board support" -+ select SOC_QCA953X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WPJ558 -+ bool "Compex WPJ558 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_DGL_5500_A1 -+ bool "D-Link DGL-5500 A1 support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_DHP_1565_A1 -+ bool "D-Link DHP-1565 rev. A1 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_DIR_505_A1 -+ bool "D-Link DIR-505-A1 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_DIR_600_A1 -+ bool "D-Link DIR-600 A1/DIR-615 E1/DIR-615 E4 support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_NVRAM -+ -+config ATH79_MACH_DIR_615_C1 -+ bool "D-Link DIR-615 rev. C1 support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_DIR_615_I1 -+ bool "D-Link DIR-615 rev. I1 support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_DIR_825_B1 -+ bool "D-Link DIR-825 rev. B1 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_DIR_825_C1 -+ bool "D-Link DIR-825 rev. C1/DIR-835 rev. A1 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_DLAN_HOTSPOT -+ bool "devolo dLAN Hotspot support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_DLAN_PRO_500_WP -+ bool "devolo dLAN pro 500 Wireless+ support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_DLAN_PRO_1200_AC -+ bool "devolo dLAN pro 1200+ WiFi ac support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_DRAGINO2 -+ bool "DRAGINO V2 support" -+ select SOC_AR933X -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_ETH -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_ESR900 -+ bool "EnGenius ESR900 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_EW_DORIN -+ bool "embedded wireless Dorin Platform support" -+ select SOC_AR933X -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_ETH -+ help -+ Say 'Y' here if you want your kernel to support the -+ Dorin Platform from www.80211.de . -+ -+config ATH79_MACH_EL_M150 -+ bool "EasyLink EL-M150 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_EL_MINI -+ bool "EasyLink EL-MINI support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_GL_AR150 -+ bool "GL AR150 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_GL_AR300 -+ bool "GL_AR300 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_GL_DOMINO -+ bool "DOMINO support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_GL_INET -+ bool "GL-INET support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_EAP300V2 -+ bool "EnGenius EAP300 v2 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_GS_MINIBOX_V1 -+ bool "Gainstrong MiniBox V1.0 support" -+ select SOC_AR933X -+ select ARH79_DEV_ETH -+ select ARH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_GS_OOLITE -+ bool "GS Oolite V1 support" -+ select SOC_AR933X -+ select ARH79_DEV_ETH -+ select ARH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_HIWIFI_HC6361 -+ bool "HiWiFi HC6361 board support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_JA76PF -+ bool "jjPlus JA76PF board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_JWAP003 -+ bool "jjPlus JWAP003 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WRT160NL -+ bool "Linksys WRT160NL board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_WRT400N -+ bool "Linksys WRT400N board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_R6100 -+ bool "NETGEAR R6100 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MC_MAC1200R -+ bool "MERCURY MAC1200R board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_RB4XX -+ bool "MikroTik RouterBOARD 4xx series support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_RB750 -+ bool "MikroTik RouterBOARD 750 support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_USB -+ select ATH79_ROUTERBOOT -+ -+config ATH79_MACH_RB91X -+ bool "MikroTik RouterBOARD 91X support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_SPI -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_USB -+ select ATH79_ROUTERBOOT -+ -+config ATH79_MACH_RB922 -+ bool "MikroTik RouterBOARD 922 support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_ROUTERBOOT -+ select RLE_DECOMPRESS -+ -+config ATH79_MACH_RB95X -+ bool "MikroTik RouterBOARD 95X support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_NFC -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_USB -+ select ATH79_ROUTERBOOT -+ -+config ATH79_MACH_RB2011 -+ bool "MikroTik RouterBOARD 2011 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ select ATH79_ROUTERBOOT -+ -+config ATH79_MACH_RBSXTLITE -+ bool "MikroTik RouterBOARD SXT Lite" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_NFC -+ select ATH79_DEV_WMAC -+ select ATH79_ROUTERBOOT -+ -+config ATH79_MACH_SMART_300 -+ bool "NC-LINK SMART-300 board support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WNDAP360 -+ bool "NETGEAR WNDAP360 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_WNDR3700 -+ bool "NETGEAR WNDR3700 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WNDR4300 -+ bool "NETGEAR WNDR3700v4/WNDR4300 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WNR2000 -+ bool "NETGEAR WNR2000 board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_WNR2000_V3 -+ bool "NETGEAR WNR2000 V3/WNR612 v2/WNR1000 v2 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+ config ATH79_MACH_WNR2200 -+ bool "NETGEAR WNR2200 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_WNR2000_V4 -+ bool "NETGEAR WNR2000 V4" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_OM2P -+ bool "OpenMesh OM2P board support" -+ select SOC_AR724X -+ select SOC_AR933X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_OM5P -+ bool "OpenMesh OM5P board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ONION_OMEGA -+ bool "ONION OMEGA support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MR12 -+ bool "Meraki MR12 board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MR16 -+ bool "Meraki MR16 board support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MR600 -+ bool "OpenMesh MR600 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MZK_W04NU -+ bool "Planex MZK-W04NU board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MZK_W300NH -+ bool "Planex MZK-W300NH board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_RW2458N -+ bool "Redwave RW2458N board support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_CAP4200AG -+ bool "Senao CAP4200AG support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MR1750 -+ bool "OpenMesh MR1750 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MR900 -+ bool "OpenMesh MR900 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_EAP7660D -+ bool "Senao EAP7660D support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_BSB -+ bool "Smart Electronics Black Swift board" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_ARCHER_C7 -+ bool "TP-LINK Archer C5/C7/TL-WDR4900 v2 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_CPE510 -+ bool "TP-LINK CPE510 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_MR11U -+ bool "TP-LINK TL-MR11U/TL-MR3040 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros AP121 reference board. - --config ATH79_MACH_AP136 -- bool "Atheros AP136 reference board" -- select SOC_QCA955X -+config ATH79_MACH_TL_MR13U -+ bool "TP-LINK TL-MR13U support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros AP136 reference board. - --config ATH79_MACH_AP81 -- bool "Atheros AP81 reference board" -+config ATH79_MACH_TL_MR3020 -+ bool "TP-LINK TL-MR3020 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_MR3X20 -+ bool "TP-LINK TL-MR3220/3420 support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_TL_WAX50RE -+ bool "TP-LINK TL-WA750/850RE support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WA701ND_V2 -+ bool "TP-LINK TL-WA701ND v2 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WA7210N_V2 -+ bool "TP-LINK TL-WA7210N v2 support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WA830RE_V2 -+ bool "TP-LINK TL-WA830RE v2 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WA901ND -+ bool "TP-LINK TL-WA901ND/TL-WA7510N support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_WA901ND_V2 -+ bool "TP-LINK TL-WA901ND v2 support" - select SOC_AR913X -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WDR3320_V2 -+ bool "TP-LINK TL-WDR3320 v2 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros AP81 reference board. - --config ATH79_MACH_DB120 -- bool "Atheros DB120 reference board" -+config ATH79_MACH_TL_WDR3500 -+ bool "TP-LINK TL-WDR3500 board support" - select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC -- help -- Say 'Y' here if you want your kernel to support the -- Atheros DB120 reference board. - --config ATH79_MACH_PB44 -- bool "Atheros PB44 reference board" -+config ATH79_MACH_TL_WDR4300 -+ bool "TP-LINK TL-WDR3600/4300/4310 board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WDR6500_V2 -+ bool "TP-LINK TL-WDR6500 v2 board support" -+ select SOC_QCA956X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR703N -+ bool "TP-LINK TL-WR703N/TL-WR710N/TL-MR10U support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR720N_V3 -+ bool "TP-LINK TL-WR720N v3/v4 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR741ND -+ bool "TP-LINK TL-WR741ND support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_WR741ND_V4 -+ bool "TP-LINK TL-WR741ND v4/TL-MR3220 v2 support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR841N_V1 -+ bool "TP-LINK TL-WR841N v1 support" - select SOC_AR71XX -+ select ATH79_DEV_DSA -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_TL_WR841N_V8 -+ bool "TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR841N_V9 -+ bool "TP-LINK TL-WR841N/ND v9 support" -+ select SOC_QCA953X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR941ND -+ bool "TP-LINK TL-WR941ND support" -+ select SOC_AR913X -+ select ATH79_DEV_DSA -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR941ND_V6 -+ bool "TP-LINK TL-WR941ND v6 support" -+ select SOC_QCA956X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR1041N_V2 -+ bool "TP-LINK TL-WR1041N v2 support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR1043ND -+ bool "TP-LINK TL-WR1043ND support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR1043ND_V2 -+ bool "TP-LINK TL-WR1043ND v2 support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_TL_WR2543N -+ bool "TP-LINK TL-WR2543N/ND support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ -+config ATH79_MACH_TEW_632BRP -+ bool "TRENDnet TEW-632BRP support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_TEW_673GRU -+ bool "TRENDnet TEW-673GRU support" -+ select SOC_AR71XX -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_NVRAM -+ -+config ATH79_MACH_TEW_712BR -+ bool "TRENDnet TEW-712BR support" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_TEW_732BR -+ bool "TRENDnet TEW-732BR support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_UBNT -+ bool "Ubiquiti AR71xx based boards support" -+ select SOC_AR71XX -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB -- help -- Say 'Y' here if you want your kernel to support the -- Atheros PB44 reference board. - - config ATH79_MACH_UBNT_XM -- bool "Ubiquiti Networks XM (rev 1.0) board" -+ bool "Ubiquiti Networks XM/UniFi boards" - select SOC_AR724X -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC - help - Say 'Y' here if you want your kernel to support the - Ubiquiti Networks XM (rev 1.0) board. - -+config ATH79_MACH_WEIO -+ bool "WeIO board" -+ select SOC_AR933X -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_MYNET_N600 -+ bool "WD My Net N600 board support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_MYNET_N750 -+ bool "WD My Net N750 board support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_MYNET_REXT -+ bool "WD My Net Wi-Fi Range Extender board support" -+ select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_NVRAM -+ -+config ATH79_MACH_ZCN_1523H -+ bool "Zcomax ZCN-1523H support" -+ select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ -+config ATH79_MACH_NBG460N -+ bool "Zyxel NBG460N/550N/550NH board support" -+ select SOC_AR913X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_NBG6716 -+ bool "Zyxel NBG6616/NBG6716 board support" -+ select SOC_QCA955X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_NFC -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_CARAMBOLA2 -+ bool "8devices Carambola2 board" -+ select SOC_AR933X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_CF_E316N_V2 -+ bool "COMFAST CF-E316N v2 board" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_BHU_BXU2000N2_A -+ bool "BHU BXU2000n-2 rev. A support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC -+ -+config ATH79_MACH_QIHOO_C301 -+ bool "Qihoo 360 C301 board support" -+ select SOC_AR934X -+ select ATH79_DEV_ETH -+ select ATH79_DEV_GPIO_BUTTONS -+ select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_WMAC -+ select ATH79_DEV_USB -+ select ATH79_NVRAM -+ - endmenu - - config SOC_AR71XX -@@ -93,12 +1484,39 @@ - select PCI_AR724X if PCI - def_bool n - -+config SOC_QCA953X -+ select USB_ARCH_HAS_EHCI -+ def_bool n -+ - config SOC_QCA955X - select HW_HAS_PCI - select PCI_AR724X if PCI - def_bool n - --config PCI_AR724X -+config SOC_QCA956X -+ select USB_ARCH_HAS_EHCI -+ select HW_HAS_PCI -+ select PCI_AR724X if PCI -+ def_bool n -+ -+config ATH79_DEV_M25P80 -+ select ATH79_DEV_SPI -+ def_bool n -+ -+config ATH79_DEV_AP9X_PCI -+ select ATH79_PCI_ATH9K_FIXUP -+ def_bool n -+ -+config ATH79_DEV_DSA -+ def_bool n -+ -+config ATH79_DEV_ETH -+ def_bool n -+ -+config ATH79_DEV_DSA -+ def_bool n -+ -+config ATH79_DEV_ETH - def_bool n - - config ATH79_DEV_GPIO_BUTTONS -@@ -107,6 +1525,10 @@ - config ATH79_DEV_LEDS_GPIO - def_bool n - -+config ATH79_DEV_NFC -+ depends on (SOC_AR934X || SOC_QCA955X) -+ def_bool n -+ - config ATH79_DEV_SPI - def_bool n - -@@ -114,7 +1536,21 @@ - def_bool n - - config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) -+ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X || SOC_QCA956X) -+ def_bool n -+ -+config ATH79_NVRAM -+ def_bool n -+ -+config ATH79_PCI_ATH9K_FIXUP -+ def_bool n -+ -+config ATH79_ROUTERBOOT -+ select RLE_DECOMPRESS -+ select LZO_DECOMPRESS -+ def_bool n -+ -+config PCI_AR724X - def_bool n - - endif -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-alfa-ap96.c linux-4.1.13/arch/mips/ath79/mach-alfa-ap96.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-alfa-ap96.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-alfa-ap96.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,151 @@ -+/* -+ * ALFA Network AP96 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define ALFA_AP96_GPIO_PCIE_RESET 2 -+#define ALFA_AP96_GPIO_SIM_DETECT 3 -+#define ALFA_AP96_GPIO_MICROSD_CD 4 -+#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 -+ -+#define ALFA_AP96_GPIO_BUTTON_RESET 11 -+ -+#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) -+ -+static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ALFA_AP96_GPIO_BUTTON_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct mmc_spi_platform_data alfa_ap96_mmc_data = { -+ .flags = MMC_SPI_USE_CD_GPIO, -+ .cd_gpio = ALFA_AP96_GPIO_MICROSD_CD, -+ .cd_debounce = 1, -+ .caps = MMC_CAP_NEEDS_POLL, -+ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -+}; -+ -+static struct ath79_spi_controller_data ap96_spi0_cdata = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+ .is_flash = true, -+}; -+ -+static struct ath79_spi_controller_data ap96_spi1_cdata = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 1, -+}; -+ -+static struct ath79_spi_controller_data ap96_spi2_cdata = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 2, -+}; -+ -+static struct spi_board_info alfa_ap96_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "m25p80", -+ .controller_data = &ap96_spi0_cdata -+ }, { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 25000000, -+ .modalias = "mmc_spi", -+ .platform_data = &alfa_ap96_mmc_data, -+ .controller_data = &ap96_spi1_cdata -+ }, { -+ .bus_num = 0, -+ .chip_select = 2, -+ .max_speed_hz = 6250000, -+ .modalias = "rtc-pcf2123", -+ .controller_data = &ap96_spi2_cdata -+ }, -+}; -+ -+static struct ath79_spi_platform_data alfa_ap96_spi_data = { -+ .bus_num = 0, -+ .num_chipselect = 3, -+}; -+ -+static void __init alfa_ap96_gpio_setup(void) -+{ -+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | -+ AR71XX_GPIO_FUNC_SPI_CS2_EN); -+ -+ gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); -+ gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); -+ gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); -+ gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); -+ gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); -+ gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); -+} -+ -+#define ALFA_AP96_WAN_PHYMASK BIT(4) -+#define ALFA_AP96_LAN_PHYMASK BIT(5) -+#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) -+ -+static void __init alfa_ap96_init(void) -+{ -+ alfa_ap96_gpio_setup(); -+ -+ ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; -+ ath79_eth1_pll_data.pll_1000 = 0x110000; -+ -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; -+ ath79_eth1_pll_data.pll_1000 = 0x110000; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_pci(); -+ ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, -+ ARRAY_SIZE(alfa_ap96_spi_info)); -+ -+ ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(alfa_ap96_gpio_keys), -+ alfa_ap96_gpio_keys); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", -+ alfa_ap96_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-alfa-nx.c linux-4.1.13/arch/mips/ath79/mach-alfa-nx.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-alfa-nx.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-alfa-nx.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,113 @@ -+/* -+ * ALFA Network N2/N5 board support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define ALFA_NX_GPIO_LED_2 17 -+#define ALFA_NX_GPIO_LED_3 16 -+#define ALFA_NX_GPIO_LED_5 12 -+#define ALFA_NX_GPIO_LED_6 8 -+#define ALFA_NX_GPIO_LED_7 6 -+#define ALFA_NX_GPIO_LED_8 7 -+ -+#define ALFA_NX_GPIO_BTN_RESET 11 -+ -+#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) -+ -+#define ALFA_NX_MAC0_OFFSET 0 -+#define ALFA_NX_MAC1_OFFSET 6 -+#define ALFA_NX_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ALFA_NX_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led alfa_nx_leds_gpio[] __initdata = { -+ { -+ .name = "alfa:green:led_2", -+ .gpio = ALFA_NX_GPIO_LED_2, -+ .active_low = 1, -+ }, { -+ .name = "alfa:green:led_3", -+ .gpio = ALFA_NX_GPIO_LED_3, -+ .active_low = 1, -+ }, { -+ .name = "alfa:red:led_5", -+ .gpio = ALFA_NX_GPIO_LED_5, -+ .active_low = 1, -+ }, { -+ .name = "alfa:amber:led_6", -+ .gpio = ALFA_NX_GPIO_LED_6, -+ .active_low = 1, -+ }, { -+ .name = "alfa:green:led_7", -+ .gpio = ALFA_NX_GPIO_LED_7, -+ .active_low = 1, -+ }, { -+ .name = "alfa:green:led_8", -+ .gpio = ALFA_NX_GPIO_LED_8, -+ .active_low = 1, -+ } -+}; -+ -+static void __init alfa_nx_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), -+ alfa_nx_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(alfa_nx_gpio_keys), -+ alfa_nx_gpio_keys); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + ALFA_NX_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, -+ art + ALFA_NX_MAC1_OFFSET, 0); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+ /* LAN port */ -+ ath79_register_eth(1); -+ -+ ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", -+ alfa_nx_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-all0258n.c linux-4.1.13/arch/mips/ath79/mach-all0258n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-all0258n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-all0258n.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,88 @@ -+/* -+ * Allnet ALL0258N support -+ * -+ * Copyright (C) 2011 Daniel Golle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+/* found via /sys/gpio/... try and error */ -+#define ALL0258N_GPIO_BTN_RESET 1 -+#define ALL0258N_GPIO_LED_RSSIHIGH 13 -+#define ALL0258N_GPIO_LED_RSSIMEDIUM 15 -+#define ALL0258N_GPIO_LED_RSSILOW 14 -+ -+/* defaults taken from others machs */ -+#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL) -+ -+/* showed up in the original firmware's bootlog */ -+#define ALL0258N_SEC_PHYMASK BIT(3) -+ -+static struct gpio_led all0258n_leds_gpio[] __initdata = { -+ { -+ .name = "all0258n:green:rssihigh", -+ .gpio = ALL0258N_GPIO_LED_RSSIHIGH, -+ .active_low = 1, -+ }, { -+ .name = "all0258n:yellow:rssimedium", -+ .gpio = ALL0258N_GPIO_LED_RSSIMEDIUM, -+ .active_low = 1, -+ }, { -+ .name = "all0258n:red:rssilow", -+ .gpio = ALL0258N_GPIO_LED_RSSILOW, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button all0258n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ALL0258N_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init all0258n_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio), -+ all0258n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(all0258n_gpio_keys), -+ all0258n_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ -+ ath79_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK; -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N", -+ all0258n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-all0315n.c linux-4.1.13/arch/mips/ath79/mach-all0315n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-all0315n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-all0315n.c 2015-09-13 20:04:35.064524285 +0200 -@@ -0,0 +1,85 @@ -+/* -+ * Allnet ALL0315N support -+ * -+ * Copyright (C) 2012 Daniel Golle -+ * -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-m25p80.h" -+#include "dev-leds-gpio.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define ALL0315N_GPIO_BTN_RESET 0 -+#define ALL0315N_GPIO_LED_RSSIHIGH 14 -+#define ALL0315N_GPIO_LED_RSSIMEDIUM 15 -+#define ALL0315N_GPIO_LED_RSSILOW 16 -+ -+#define ALL0315N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ALL0315N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0315N_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led all0315n_leds_gpio[] __initdata = { -+ { -+ .name = "all0315n:green:rssihigh", -+ .gpio = ALL0315N_GPIO_LED_RSSIHIGH, -+ .active_low = 1, -+ }, { -+ .name = "all0315n:yellow:rssimedium", -+ .gpio = ALL0315N_GPIO_LED_RSSIMEDIUM, -+ .active_low = 1, -+ }, { -+ .name = "all0315n:red:rssilow", -+ .gpio = ALL0315N_GPIO_LED_RSSILOW, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button all0315n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ALL0315N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ALL0315N_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init all0315n_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1ffc0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1ffc1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(all0315n_leds_gpio), -+ all0315n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, ALL0315N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(all0315n_gpio_keys), -+ all0315n_gpio_keys); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 1); -+ ap91_pci_init(ee, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ALL0315N, "ALL0315N", "Allnet ALL0315N", -+ all0315n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s1.c linux-4.1.13/arch/mips/ath79/mach-antminer-s1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-antminer-s1.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,98 @@ -+/* -+ * Bitmain Antminer S1 board support -+ * -+ * Copyright (C) 2015 L. D. Pinney -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "dev-usb.h" -+ -+#define ANTMINER_S1_GPIO_BTN_RESET 11 -+ -+#define ANTMINER_S1_GPIO_LED_SYSTEM 23 -+#define ANTMINER_S1_GPIO_LED_WLAN 0 -+#define ANTMINER_S1_GPIO_USB_POWER 26 -+ -+#define ANTMINER_S1_KEYSPOLL_INTERVAL 20 /* msecs */ -+#define ANTMINER_S1_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S1_KEYSPOLL_INTERVAL) -+ -+static const char *ANTMINER_S1_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data ANTMINER_S1_flash_data = { -+ .part_probes = ANTMINER_S1_part_probes, -+}; -+ -+static struct gpio_led ANTMINER_S1_leds_gpio[] __initdata = { -+ { -+ .name = "antminer-s1:green:system", -+ .gpio = ANTMINER_S1_GPIO_LED_SYSTEM, -+ .active_low = 0, -+ },{ -+ .name = "antminer-s1:green:wlan", -+ .gpio = ANTMINER_S1_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button ANTMINER_S1_GPIO_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ANTMINER_S1_KEYSDEBOUNCE_INTERVAL, -+ .gpio = ANTMINER_S1_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init antminer_s1_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio), -+ ANTMINER_S1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL, -+ ARRAY_SIZE(ANTMINER_S1_GPIO_keys), -+ ANTMINER_S1_GPIO_keys); -+ -+ gpio_request_one(ANTMINER_S1_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&ANTMINER_S1_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ANTMINER_S1, "ANTMINER-S1", -+ "Antminer-S1", antminer_s1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s3.c linux-4.1.13/arch/mips/ath79/mach-antminer-s3.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s3.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-antminer-s3.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,103 @@ -+/* -+ * Bitmain Antminer S3 board support -+ * -+ * Copyright (C) 2015 L. D. Pinney -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "dev-usb.h" -+ -+#define ANTMINER_S3_GPIO_LED_WLAN 0 -+#define ANTMINER_S3_GPIO_LED_SYSTEM 17 -+#define ANTMINER_S3_GPIO_LED_LAN 22 -+#define ANTMINER_S3_GPIO_USB_POWER 26 -+ -+#define ANTMINER_S3_GPIO_BTN_RESET 11 -+ -+#define ANTMINER_S3_KEYSPOLL_INTERVAL 88 /* msecs */ -+#define ANTMINER_S3_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S3_KEYSPOLL_INTERVAL) -+ -+static const char *ANTMINER_S3_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data ANTMINER_S3_flash_data = { -+ .part_probes = ANTMINER_S3_part_probes, -+}; -+ -+static struct gpio_led ANTMINER_S3_leds_gpio[] __initdata = { -+ { -+ .name = "antminer-s3:green:wlan", -+ .gpio = ANTMINER_S3_GPIO_LED_WLAN, -+ .active_low = 0, -+ },{ -+ .name = "antminer-s3:green:system", -+ .gpio = ANTMINER_S3_GPIO_LED_SYSTEM, -+ .active_low = 0, -+ },{ -+ .name = "antminer-s3:yellow:lan", -+ .gpio = ANTMINER_S3_GPIO_LED_LAN, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button ANTMINER_S3_GPIO_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ANTMINER_S3_KEYSDEBOUNCE_INTERVAL, -+ .gpio = ANTMINER_S3_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init antminer_s3_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S3_leds_gpio), -+ ANTMINER_S3_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, ANTMINER_S3_KEYSPOLL_INTERVAL, -+ ARRAY_SIZE(ANTMINER_S3_GPIO_keys), -+ ANTMINER_S3_GPIO_keys); -+ -+ gpio_request_one(ANTMINER_S3_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&ANTMINER_S3_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ANTMINER_S3, "ANTMINER-S3", -+ "Antminer-S3", antminer_s3_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap113.c linux-4.1.13/arch/mips/ath79/mach-ap113.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap113.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap113.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,84 @@ -+/* -+ * Atheros AP113 board support -+ * -+ * Copyright (C) 2011 Florian Fainelli -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "pci.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define AP113_GPIO_LED_USB 0 -+#define AP113_GPIO_LED_STATUS 1 -+#define AP113_GPIO_LED_ST 11 -+ -+#define AP113_GPIO_BTN_JUMPSTART 12 -+ -+#define AP113_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP113_KEYS_DEBOUNCE_INTERVAL (3 * AP113_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led ap113_leds_gpio[] __initdata = { -+ { -+ .name = "ap113:green:usb", -+ .gpio = AP113_GPIO_LED_USB, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap113:green:status", -+ .gpio = AP113_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap113:green:st", -+ .gpio = AP113_GPIO_LED_ST, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button ap113_gpio_keys[] __initdata = { -+ { -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP113_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP113_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init ap113_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~BIT(0)); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_register_eth(0); -+ -+ ath79_register_gpio_keys_polled(-1, AP113_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap113_gpio_keys), -+ ap113_gpio_keys); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap113_leds_gpio), -+ ap113_leds_gpio); -+ -+ ath79_register_pci(); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP113, "AP113", "Atheros AP113", -+ ap113_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap121.c linux-4.1.13/arch/mips/ath79/mach-ap121.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap121.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap121.c 2015-12-04 19:57:04.298083689 +0100 -@@ -1,19 +1,21 @@ - /* - * Atheros AP121 board support - * -- * Copyright (C) 2011 Gabor Juhos -+ * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - --#include "machtypes.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -+#include "dev-m25p80.h" - #include "dev-spi.h" - #include "dev-usb.h" - #include "dev-wmac.h" -+#include "machtypes.h" - - #define AP121_GPIO_LED_WLAN 0 - #define AP121_GPIO_LED_USB 1 -@@ -24,7 +26,14 @@ - #define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ - #define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) - --#define AP121_CAL_DATA_ADDR 0x1fff1000 -+#define AP121_MAC0_OFFSET 0x0000 -+#define AP121_MAC1_OFFSET 0x0006 -+#define AP121_CALDATA_OFFSET 0x1000 -+#define AP121_WMAC_MAC_OFFSET 0x1002 -+ -+#define AP121_MINI_GPIO_LED_WLAN 0 -+#define AP121_MINI_GPIO_BTN_JUMPSTART 12 -+#define AP121_MINI_GPIO_BTN_RESET 11 - - static struct gpio_led ap121_leds_gpio[] __initdata = { - { -@@ -58,35 +67,78 @@ - } - }; - --static struct spi_board_info ap121_spi_info[] = { -+static struct gpio_led ap121_mini_leds_gpio[] __initdata = { - { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l1606e", -- } -+ .name = "ap121:green:wlan", -+ .gpio = AP121_MINI_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, - }; - --static struct ath79_spi_platform_data ap121_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = { -+ { -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP121_MINI_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+ { -+ .desc = "reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP121_MINI_GPIO_BTN_RESET, -+ .active_low = 1, -+ } - }; - -+static void __init ap121_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art + AP121_CALDATA_OFFSET, -+ art + AP121_WMAC_MAC_OFFSET); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+} -+ - static void __init ap121_setup(void) - { -- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); -+ ap121_common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), - ap121_leds_gpio); - ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap121_gpio_keys), - ap121_gpio_keys); -- -- ath79_register_spi(&ap121_spi_data, ap121_spi_info, -- ARRAY_SIZE(ap121_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(cal_data); - } - - MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", - ap121_setup); -+ -+static void __init ap121_mini_setup(void) -+{ -+ ap121_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio), -+ ap121_mini_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap121_mini_gpio_keys), -+ ap121_mini_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI", -+ ap121_mini_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap132.c linux-4.1.13/arch/mips/ath79/mach-ap132.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap132.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap132.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,189 @@ -+/* -+ * Atheros AP132 reference board support -+ * -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012 Gabor Juhos -+ * Copyright (c) 2013 Embedded Wireless GmbH -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define AP132_GPIO_LED_USB 4 -+#define AP132_GPIO_LED_WLAN_5G 12 -+#define AP132_GPIO_LED_WLAN_2G 13 -+#define AP132_GPIO_LED_STATUS_RED 14 -+#define AP132_GPIO_LED_WPS_RED 15 -+ -+#define AP132_GPIO_BTN_WPS 16 -+ -+#define AP132_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL) -+ -+#define AP132_MAC0_OFFSET 0 -+#define AP132_WMAC_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led ap132_leds_gpio[] __initdata = { -+ { -+ .name = "ap132:red:status", -+ .gpio = AP132_GPIO_LED_STATUS_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap132:red:wps", -+ .gpio = AP132_GPIO_LED_WPS_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap132:red:wlan-2g", -+ .gpio = AP132_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap132:red:usb", -+ .gpio = AP132_GPIO_LED_USB, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button ap132_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP132_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg; -+ -+static struct ar8327_platform_data ap132_ar8327_data = { -+ .pad0_cfg = &ap132_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info ap132_mdio1_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.1", -+ .phy_addr = 0, -+ .platform_data = &ap132_ar8327_data, -+ }, -+}; -+ -+static void __init ap132_mdio_setup(void) -+{ -+ void __iomem *base; -+ u32 t; -+ -+#define GPIO_IN_ENABLE3_ADDRESS 0x0050 -+#define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff0000 -+#define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16 -+#define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK) -+#define GPIO_OUT_FUNCTION4_ADDRESS 0x003c -+#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff000000 -+#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB 24 -+#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK) -+#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0x0000ff00 -+#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB 8 -+#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK) -+ -+ base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); -+ -+ t = __raw_readl(base + GPIO_IN_ENABLE3_ADDRESS); -+ t &= ~GPIO_IN_ENABLE3_MII_GE1_MDI_MASK; -+ t |= GPIO_IN_ENABLE3_MII_GE1_MDI_SET(19); -+ __raw_writel(t, base + GPIO_IN_ENABLE3_ADDRESS); -+ -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 19), base + AR71XX_GPIO_REG_OE); -+ -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 17), base + AR71XX_GPIO_REG_OE); -+ -+ -+ t = __raw_readl(base + GPIO_OUT_FUNCTION4_ADDRESS); -+ t &= ~(GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK); -+ t |= GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(0x20) | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(0x21); -+ __raw_writel(t, base + GPIO_OUT_FUNCTION4_ADDRESS); -+ -+ iounmap(base); -+ -+} -+ -+static void __init ap132_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap132_leds_gpio), -+ ap132_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP132_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap132_gpio_keys), -+ ap132_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac(art + AP132_WMAC_CALDATA_OFFSET, NULL); -+ -+ /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ -+ ap132_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; -+ ap132_ar8327_pad0_cfg.sgmii_delay_en = true; -+ -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ap132_mdio_setup(); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP132_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(ap132_mdio1_info, -+ ARRAY_SIZE(ap132_mdio1_info)); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_data.phy_mask = BIT(0); -+ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP132, "AP132", -+ "Atheros AP132 reference board", -+ ap132_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap136.c linux-4.1.13/arch/mips/ath79/mach-ap136.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap136.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap136.c 2015-12-04 19:57:04.370078979 +0100 -@@ -18,23 +18,29 @@ - * - */ - --#include --#include -+#include -+#include - --#include "machtypes.h" -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" - #include "dev-gpio-buttons.h" -+#include "dev-eth.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" - #include "dev-usb.h" - #include "dev-wmac.h" --#include "pci.h" -+#include "machtypes.h" - --#define AP136_GPIO_LED_STATUS_RED 14 --#define AP136_GPIO_LED_STATUS_GREEN 19 - #define AP136_GPIO_LED_USB 4 --#define AP136_GPIO_LED_WLAN_2G 13 - #define AP136_GPIO_LED_WLAN_5G 12 -+#define AP136_GPIO_LED_WLAN_2G 13 -+#define AP136_GPIO_LED_STATUS_RED 14 - #define AP136_GPIO_LED_WPS_RED 15 -+#define AP136_GPIO_LED_STATUS_GREEN 19 - #define AP136_GPIO_LED_WPS_GREEN 20 - - #define AP136_GPIO_BTN_WPS 16 -@@ -43,37 +49,39 @@ - #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ - #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) - --#define AP136_WMAC_CALDATA_OFFSET 0x1000 --#define AP136_PCIE_CALDATA_OFFSET 0x5000 -+#define AP136_MAC0_OFFSET 0 -+#define AP136_MAC1_OFFSET 6 -+#define AP136_WMAC_CALDATA_OFFSET 0x1000 -+#define AP136_PCIE_CALDATA_OFFSET 0x5000 - - static struct gpio_led ap136_leds_gpio[] __initdata = { - { -- .name = "qca:green:status", -+ .name = "ap136:green:status", - .gpio = AP136_GPIO_LED_STATUS_GREEN, - .active_low = 1, - }, - { -- .name = "qca:red:status", -+ .name = "ap136:red:status", - .gpio = AP136_GPIO_LED_STATUS_RED, - .active_low = 1, - }, - { -- .name = "qca:green:wps", -+ .name = "ap136:green:wps", - .gpio = AP136_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, - { -- .name = "qca:red:wps", -+ .name = "ap136:red:wps", - .gpio = AP136_GPIO_LED_WPS_RED, - .active_low = 1, - }, - { -- .name = "qca:red:wlan-2g", -+ .name = "ap136:red:wlan-2g", - .gpio = AP136_GPIO_LED_WLAN_2G, - .active_low = 1, - }, - { -- .name = "qca:red:usb", -+ .name = "ap136:red:usb", - .gpio = AP136_GPIO_LED_USB, - .active_low = 1, - } -@@ -98,59 +106,151 @@ - }, - }; - --static struct spi_board_info ap136_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- } -+static struct ar8327_pad_cfg ap136_ar8327_pad0_cfg; -+static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg; -+ -+static struct ar8327_platform_data ap136_ar8327_data = { -+ .pad0_cfg = &ap136_ar8327_pad0_cfg, -+ .pad6_cfg = &ap136_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, - }; - --static struct ath79_spi_platform_data ap136_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct mdio_board_info ap136_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &ap136_ar8327_data, -+ }, - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data ap136_ath9k_data; -+static void __init ap136_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), -+ ap136_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap136_gpio_keys), -+ ap136_gpio_keys); -+ -+ ath79_register_usb(); -+ ath79_register_nfc(); -+ -+ ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - --static int ap136_pci_plat_dev_init(struct pci_dev *dev) -+ ath79_register_mdio(0, 0x0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(ap136_mdio0_info, -+ ARRAY_SIZE(ap136_mdio0_info)); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected tot eh SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+} -+ -+static void __init ap136_010_setup(void) - { -- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) -- dev->dev.platform_data = &ap136_ath9k_data; -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -- return 0; -+ /* GMAC0 of the AR8327 switch is connected to GMAC0 via RGMII */ -+ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; -+ ap136_ar8327_pad0_cfg.txclk_delay_en = true; -+ ap136_ar8327_pad0_cfg.rxclk_delay_en = true; -+ ap136_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ ap136_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; -+ -+ /* GMAC6 of the AR8327 switch is connected to GMAC1 via SGMII */ -+ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; -+ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; -+ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ap136_common_setup(); -+ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); - } - --static void __init ap136_pci_init(u8 *eeprom) -+MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", -+ "Atheros AP136-010 reference board", -+ ap136_010_setup); -+ -+static void __init ap136_020_common_setup(void) - { -- memcpy(ap136_ath9k_data.eeprom_data, eeprom, -- sizeof(ap136_ath9k_data.eeprom_data)); -+ /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ -+ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; -+ ap136_ar8327_pad0_cfg.sgmii_delay_en = true; -+ -+ /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */ -+ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII; -+ ap136_ar8327_pad6_cfg.txclk_delay_en = true; -+ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; -+ ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; - -- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); -- ath79_register_pci(); -+ ath79_eth0_pll_data.pll_1000 = 0x56000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ap136_common_setup(); - } --#else --static inline void ap136_pci_init(u8 *eeprom) {} --#endif /* CONFIG_PCI */ - --static void __init ap136_setup(void) -+static void __init ap136_020_setup(void) - { - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), -- ap136_leds_gpio); -- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ap136_gpio_keys), -- ap136_gpio_keys); -- ath79_register_spi(&ap136_spi_data, ap136_spi_info, -- ARRAY_SIZE(ap136_spi_info)); -- ath79_register_usb(); -- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); -- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); -+ ap136_020_common_setup(); -+ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); - } - --MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", -- "Atheros AP136-010 reference board", -- ap136_setup); -+MIPS_MACHINE(ATH79_MACH_AP136_020, "AP136-020", -+ "Atheros AP136-020 reference board", -+ ap136_020_setup); -+ -+/* -+ * AP135-020 is similar to AP136-020, any future AP135 specific init -+ * code can be added here. -+ */ -+static void __init ap135_020_setup(void) -+{ -+ ap136_leds_gpio[0].name = "ap135:green:status"; -+ ap136_leds_gpio[1].name = "ap135:red:status"; -+ ap136_leds_gpio[2].name = "ap135:green:wps"; -+ ap136_leds_gpio[3].name = "ap135:red:wps"; -+ ap136_leds_gpio[4].name = "ap135:red:wlan-2g"; -+ ap136_leds_gpio[5].name = "ap135:red:usb"; -+ -+ ap136_020_common_setup(); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP135_020, "AP135-020", -+ "Atheros AP135-020 reference board", -+ ap135_020_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap143.c linux-4.1.13/arch/mips/ath79/mach-ap143.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap143.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap143.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,142 @@ -+/* -+ * Atheros AP143 reference board support -+ * -+ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved. -+ * Copyright (c) 2012 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define AP143_GPIO_LED_WLAN 12 -+#define AP143_GPIO_LED_WPS 13 -+#define AP143_GPIO_LED_STATUS 13 -+ -+#define AP143_GPIO_LED_WAN 4 -+#define AP143_GPIO_LED_LAN1 16 -+#define AP143_GPIO_LED_LAN2 15 -+#define AP143_GPIO_LED_LAN3 14 -+#define AP143_GPIO_LED_LAN4 11 -+ -+#define AP143_GPIO_BTN_WPS 17 -+ -+#define AP143_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL) -+ -+#define AP143_MAC0_OFFSET 0 -+#define AP143_MAC1_OFFSET 6 -+#define AP143_WMAC_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led ap143_leds_gpio[] __initdata = { -+ { -+ .name = "ap143:green:status", -+ .gpio = AP143_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap143:green:wlan", -+ .gpio = AP143_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button ap143_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP143_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init ap143_gpio_led_setup(void) -+{ -+ ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true); -+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true); -+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true); -+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true); -+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true); -+ -+ ath79_gpio_output_select(AP143_GPIO_LED_WAN, -+ QCA953X_GPIO_OUT_MUX_LED_LINK5); -+ ath79_gpio_output_select(AP143_GPIO_LED_LAN1, -+ QCA953X_GPIO_OUT_MUX_LED_LINK1); -+ ath79_gpio_output_select(AP143_GPIO_LED_LAN2, -+ QCA953X_GPIO_OUT_MUX_LED_LINK2); -+ ath79_gpio_output_select(AP143_GPIO_LED_LAN3, -+ QCA953X_GPIO_OUT_MUX_LED_LINK3); -+ ath79_gpio_output_select(AP143_GPIO_LED_LAN4, -+ QCA953X_GPIO_OUT_MUX_LED_LINK4); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio), -+ ap143_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap143_gpio_keys), -+ ap143_gpio_keys); -+} -+ -+static void __init ap143_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ap143_gpio_led_setup(); -+ -+ ath79_register_usb(); -+ -+ ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN); -+ ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0); -+ -+ /* WAN port */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_register_eth(0); -+ -+ /* LAN ports */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board", -+ ap143_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap147.c linux-4.1.13/arch/mips/ath79/mach-ap147.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap147.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap147.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,125 @@ -+/* -+ * Atheros AP147 reference board support -+ * -+ * Copyright (C) 2014 Matthias Schiffer -+ * Copyright (C) 2015 Sven Eckelmann -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define AP147_GPIO_LED_WAN 4 -+#define AP147_GPIO_LED_LAN1 16 -+#define AP147_GPIO_LED_LAN2 15 -+#define AP147_GPIO_LED_LAN3 14 -+#define AP147_GPIO_LED_LAN4 11 -+#define AP147_GPIO_LED_STATUS 13 -+#define AP147_GPIO_LED_WLAN_2G 12 -+ -+#define AP147_GPIO_BTN_WPS 17 -+ -+#define AP147_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP147_KEYS_DEBOUNCE_INTERVAL (3 * AP147_KEYS_POLL_INTERVAL) -+ -+#define AP147_MAC0_OFFSET 0x1000 -+ -+static struct gpio_led ap147_leds_gpio[] __initdata = { -+ { -+ .name = "ap147:green:status", -+ .gpio = AP147_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, { -+ .name = "ap147:green:wlan-2g", -+ .gpio = AP147_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, { -+ .name = "ap147:green:lan1", -+ .gpio = AP147_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "ap147:green:lan2", -+ .gpio = AP147_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "ap147:green:lan3", -+ .gpio = AP147_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "ap147:green:lan4", -+ .gpio = AP147_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "ap147:green:wan", -+ .gpio = AP147_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button ap147_gpio_keys[] __initdata = { -+ { -+ .desc = "wps button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP147_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP147_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init ap147_setup(void) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap147_leds_gpio), -+ ap147_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP147_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap147_gpio_keys), -+ ap147_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_pci(); -+ -+ ath79_register_wmac(art + AP147_MAC0_OFFSET, NULL); -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art, 0); -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_init_mac(ath79_eth0_data.mac_addr, art, 1); -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP147_010, "AP147-010", "Atheros AP147-010 reference board", ap147_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap152.c linux-4.1.13/arch/mips/ath79/mach-ap152.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap152.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap152.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,141 @@ -+ -+/* -+ * Qualcomm Atheros AP152 reference board support -+ * -+ * Copyright (c) 2015 Qualcomm Atheros -+ * Copyright (c) 2012 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+#include "pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+ -+#define AP152_GPIO_LED_USB0 7 -+#define AP152_GPIO_LED_USB1 8 -+ -+#define AP152_GPIO_BTN_RESET 2 -+#define AP152_GPIO_BTN_WPS 1 -+#define AP152_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP152_KEYS_DEBOUNCE_INTERVAL (3 * AP152_KEYS_POLL_INTERVAL) -+ -+#define AP152_MAC0_OFFSET 0 -+#define AP152_WMAC_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led ap152_leds_gpio[] __initdata = { -+ { -+ .name = "ap152:green:usb0", -+ .gpio = AP152_GPIO_LED_USB0, -+ .active_low = 1, -+ }, -+ { -+ .name = "ap152:green:usb1", -+ .gpio = AP152_GPIO_LED_USB1, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button ap152_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP152_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP152_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg ap152_ar8337_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_SGMII, -+ .sgmii_delay_en = true, -+}; -+ -+static struct ar8327_platform_data ap152_ar8337_data = { -+ .pad0_cfg = &ap152_ar8337_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info ap152_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &ap152_ar8337_data, -+ }, -+}; -+ -+static void __init ap152_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap152_leds_gpio), -+ ap152_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP152_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap152_gpio_keys), -+ ap152_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ platform_device_register(&ath79_mdio0_device); -+ -+ mdiobus_register_board_info(ap152_mdio0_info, -+ ARRAY_SIZE(ap152_mdio0_info)); -+ -+ ath79_register_wmac(art + AP152_WMAC_CALDATA_OFFSET, NULL); -+ ath79_register_pci(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP152_MAC0_OFFSET, 0); -+ -+ /* GMAC0 is connected to an AR8337 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP152, "AP152", "Qualcomm Atheros AP152 reference board", -+ ap152_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap81.c linux-4.1.13/arch/mips/ath79/mach-ap81.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap81.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap81.c 2015-12-04 19:57:04.310082904 +0100 -@@ -9,12 +9,16 @@ - * by the Free Software Foundation. - */ - --#include "machtypes.h" --#include "dev-wmac.h" -+#include -+#include -+ -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" - #include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" - - #define AP81_GPIO_LED_STATUS 1 - #define AP81_GPIO_LED_AOSS 3 -@@ -67,20 +71,6 @@ - } - }; - --static struct spi_board_info ap81_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "m25p64", -- } --}; -- --static struct ath79_spi_platform_data ap81_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, --}; -- - static void __init ap81_setup(void) - { - u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR); -@@ -90,10 +80,24 @@ - ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap81_gpio_keys), - ap81_gpio_keys); -- ath79_register_spi(&ap81_spi_data, ap81_spi_info, -- ARRAY_SIZE(ap81_spi_info)); -- ath79_register_wmac(cal_data); -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(cal_data, NULL); - ath79_register_usb(); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, cal_data, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.has_ar8216 = 1; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, cal_data, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); - } - - MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap83.c linux-4.1.13/arch/mips/ath79/mach-ap83.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap83.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap83.c 2015-12-04 19:57:04.438074530 +0100 -@@ -0,0 +1,242 @@ -+/* -+ * Atheros AP83 board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define AP83_GPIO_LED_WLAN 6 -+#define AP83_GPIO_LED_POWER 14 -+#define AP83_GPIO_LED_JUMPSTART 15 -+#define AP83_GPIO_BTN_JUMPSTART 12 -+#define AP83_GPIO_BTN_RESET 21 -+ -+#define AP83_050_GPIO_VSC7385_CS 1 -+#define AP83_050_GPIO_VSC7385_MISO 3 -+#define AP83_050_GPIO_VSC7385_MOSI 16 -+#define AP83_050_GPIO_VSC7385_SCK 17 -+ -+#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) -+ -+static struct physmap_flash_data ap83_flash_data = { -+ .width = 2, -+}; -+ -+static struct resource ap83_flash_resources[] = { -+ [0] = { -+ .start = AR71XX_SPI_BASE, -+ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct platform_device ap83_flash_device = { -+ .name = "ar91xx-flash", -+ .id = -1, -+ .resource = ap83_flash_resources, -+ .num_resources = ARRAY_SIZE(ap83_flash_resources), -+ .dev = { -+ .platform_data = &ap83_flash_data, -+ } -+}; -+ -+static struct gpio_led ap83_leds_gpio[] __initdata = { -+ { -+ .name = "ap83:green:jumpstart", -+ .gpio = AP83_GPIO_LED_JUMPSTART, -+ .active_low = 0, -+ }, { -+ .name = "ap83:green:power", -+ .gpio = AP83_GPIO_LED_POWER, -+ .active_low = 0, -+ }, { -+ .name = "ap83:green:wlan", -+ .gpio = AP83_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button ap83_gpio_keys[] __initdata = { -+ { -+ .desc = "soft_reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP83_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "jumpstart", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP83_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ } -+}; -+ -+static struct resource ap83_040_spi_resources[] = { -+ [0] = { -+ .start = AR71XX_SPI_BASE, -+ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct platform_device ap83_040_spi_device = { -+ .name = "ap83-spi", -+ .id = 0, -+ .resource = ap83_040_spi_resources, -+ .num_resources = ARRAY_SIZE(ap83_040_spi_resources), -+}; -+ -+static struct spi_gpio_platform_data ap83_050_spi_data = { -+ .miso = AP83_050_GPIO_VSC7385_MISO, -+ .mosi = AP83_050_GPIO_VSC7385_MOSI, -+ .sck = AP83_050_GPIO_VSC7385_SCK, -+ .num_chipselect = 1, -+}; -+ -+static struct platform_device ap83_050_spi_device = { -+ .name = "spi_gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &ap83_050_spi_data, -+ } -+}; -+ -+static void ap83_vsc7385_reset(void) -+{ -+ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); -+ udelay(10); -+ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); -+ mdelay(50); -+} -+ -+static struct vsc7385_platform_data ap83_vsc7385_data = { -+ .reset = ap83_vsc7385_reset, -+ .ucode_name = "vsc7385_ucode_ap83.bin", -+ .mac_cfg = { -+ .tx_ipg = 6, -+ .bit2 = 0, -+ .clk_sel = 3, -+ }, -+}; -+ -+static struct spi_board_info ap83_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "spi-vsc7385", -+ .platform_data = &ap83_vsc7385_data, -+ .controller_data = (void *) AP83_050_GPIO_VSC7385_CS, -+ } -+}; -+ -+static void __init ap83_generic_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_mdio(0, 0xfffffffe); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = 0x1; -+ -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_eth1_pll_data.pll_1000 = 0x1f000000; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), -+ ap83_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap83_gpio_keys), -+ ap83_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac(eeprom, NULL); -+ -+ platform_device_register(&ap83_flash_device); -+ -+ spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); -+} -+ -+static void ap83_040_flash_lock(struct platform_device *pdev) -+{ -+ ath79_flash_acquire(); -+} -+ -+static void ap83_040_flash_unlock(struct platform_device *pdev) -+{ -+ ath79_flash_release(); -+} -+ -+static void __init ap83_040_setup(void) -+{ -+ ap83_flash_data.lock = ap83_040_flash_lock; -+ ap83_flash_data.unlock = ap83_040_flash_unlock; -+ ap83_generic_setup(); -+ platform_device_register(&ap83_040_spi_device); -+} -+ -+static void __init ap83_050_setup(void) -+{ -+ ap83_generic_setup(); -+ platform_device_register(&ap83_050_spi_device); -+} -+ -+static void __init ap83_setup(void) -+{ -+ u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); -+ unsigned int board_version; -+ -+ board_version = (unsigned int)(board_id[0] - '0'); -+ board_version += ((unsigned int)(board_id[1] - '0')) * 10; -+ -+ switch (board_version) { -+ case 40: -+ ap83_040_setup(); -+ break; -+ case 50: -+ ap83_050_setup(); -+ break; -+ default: -+ printk(KERN_WARNING "AP83-%03u board is not yet supported\n", -+ board_version); -+ } -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap96.c linux-4.1.13/arch/mips/ath79/mach-ap96.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ap96.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ap96.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,142 @@ -+/* -+ * Atheros AP96 board support -+ * -+ * Copyright (C) 2009 Marco Porsch -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2010 Atheros Communications -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define AP96_GPIO_LED_12_GREEN 0 -+#define AP96_GPIO_LED_3_GREEN 1 -+#define AP96_GPIO_LED_2_GREEN 2 -+#define AP96_GPIO_LED_WPS_GREEN 4 -+#define AP96_GPIO_LED_5_GREEN 5 -+#define AP96_GPIO_LED_4_ORANGE 6 -+ -+/* Reset button - next to the power connector */ -+#define AP96_GPIO_BTN_RESET 3 -+/* WPS button - next to a led on right */ -+#define AP96_GPIO_BTN_WPS 8 -+ -+#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) -+ -+#define AP96_WMAC0_MAC_OFFSET 0x120c -+#define AP96_WMAC1_MAC_OFFSET 0x520c -+#define AP96_CALDATA0_OFFSET 0x1000 -+#define AP96_CALDATA1_OFFSET 0x5000 -+ -+/* -+ * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 -+ * below (from left to right on the board). Led 1 seems to be on whenever the -+ * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; -+ * others are green. -+ * -+ * In addition, there is one led next to a button on the right side for WPS. -+ */ -+static struct gpio_led ap96_leds_gpio[] __initdata = { -+ { -+ .name = "ap96:green:led2", -+ .gpio = AP96_GPIO_LED_2_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "ap96:green:led3", -+ .gpio = AP96_GPIO_LED_3_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "ap96:orange:led4", -+ .gpio = AP96_GPIO_LED_4_ORANGE, -+ .active_low = 1, -+ }, { -+ .name = "ap96:green:led5", -+ .gpio = AP96_GPIO_LED_5_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "ap96:green:led12", -+ .gpio = AP96_GPIO_LED_12_GREEN, -+ .active_low = 1, -+ }, { /* next to a button on right */ -+ .name = "ap96:green:wps", -+ .gpio = AP96_GPIO_LED_WPS_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button ap96_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP96_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP96_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+#define AP96_WAN_PHYMASK 0x10 -+#define AP96_LAN_PHYMASK 0x0f -+ -+static void __init ap96_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK; -+ -+ ath79_eth1_pll_data.pll_1000 = 0x1f000000; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), -+ ap96_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap96_gpio_keys), -+ ap96_gpio_keys); -+ -+ ap94_pci_init(art + AP96_CALDATA0_OFFSET, -+ art + AP96_WMAC0_MAC_OFFSET, -+ art + AP96_CALDATA1_OFFSET, -+ art + AP96_WMAC1_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-archer-c7.c linux-4.1.13/arch/mips/ath79/mach-archer-c7.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-archer-c7.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-archer-c7.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,266 @@ -+/* -+ * TP-LINK Archer C5/C7/TL-WDR4900 v2 board support -+ * -+ * Copyright (c) 2013 Gabor Juhos -+ * Copyright (c) 2014 施康成 -+ * Copyright (c) 2014 Imre Kaloz -+ * -+ * Based on the Qualcomm Atheros AP135/AP136 reference board support code -+ * Copyright (c) 2012 Qualcomm Atheros -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define ARCHER_C7_GPIO_LED_WLAN2G 12 -+#define ARCHER_C7_GPIO_LED_SYSTEM 14 -+#define ARCHER_C7_GPIO_LED_QSS 15 -+#define ARCHER_C7_GPIO_LED_WLAN5G 17 -+#define ARCHER_C7_GPIO_LED_USB1 18 -+#define ARCHER_C7_GPIO_LED_USB2 19 -+ -+#define ARCHER_C7_GPIO_BTN_RFKILL 13 -+#define ARCHER_C7_GPIO_BTN_RESET 16 -+ -+#define ARCHER_C7_GPIO_USB1_POWER 22 -+#define ARCHER_C7_GPIO_USB2_POWER 21 -+ -+#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL) -+ -+#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000 -+#define ARCHER_C7_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *archer_c7_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data archer_c7_flash_data = { -+ .part_probes = archer_c7_part_probes, -+}; -+ -+static struct gpio_led archer_c7_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:qss", -+ .gpio = ARCHER_C7_GPIO_LED_QSS, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:system", -+ .gpio = ARCHER_C7_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:wlan2g", -+ .gpio = ARCHER_C7_GPIO_LED_WLAN2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:wlan5g", -+ .gpio = ARCHER_C7_GPIO_LED_WLAN5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:usb1", -+ .gpio = ARCHER_C7_GPIO_LED_USB1, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:usb2", -+ .gpio = ARCHER_C7_GPIO_LED_USB2, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ARCHER_C7_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL switch", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ARCHER_C7_GPIO_BTN_RFKILL, -+ }, -+}; -+ -+static const struct ar8327_led_info archer_c7_leds_ar8327[] __initconst = { -+ AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), -+ AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), -+ AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), -+ AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), -+ AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), -+}; -+ -+/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ -+static struct ar8327_pad_cfg archer_c7_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_SGMII, -+ .sgmii_delay_en = true, -+}; -+ -+/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ -+static struct ar8327_pad_cfg archer_c7_ar8327_pad6_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg archer_c7_ar8327_led_cfg = { -+ .led_ctrl0 = 0xc737c737, -+ .led_ctrl1 = 0x00000000, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x0030c300, -+ .open_drain = false, -+}; -+ -+static struct ar8327_platform_data archer_c7_ar8327_data = { -+ .pad0_cfg = &archer_c7_ar8327_pad0_cfg, -+ .pad6_cfg = &archer_c7_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &archer_c7_ar8327_led_cfg, -+ .num_leds = ARRAY_SIZE(archer_c7_leds_ar8327), -+ .leds = archer_c7_leds_ar8327, -+}; -+ -+static struct mdio_board_info archer_c7_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &archer_c7_ar8327_data, -+ }, -+}; -+ -+static void __init common_setup(bool pcie_slot) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&archer_c7_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio), -+ archer_c7_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(archer_c7_gpio_keys), -+ archer_c7_gpio_keys); -+ -+ ath79_init_mac(tmpmac, mac, -1); -+ ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ if (pcie_slot) { -+ ath79_register_pci(); -+ } else { -+ ath79_init_mac(tmpmac, mac, -1); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+ ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac); -+ } -+ -+ mdiobus_register_board_info(archer_c7_mdio0_info, -+ ARRAY_SIZE(archer_c7_mdio0_info)); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x56000000; -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_eth(1); -+ -+ gpio_request_one(ARCHER_C7_GPIO_USB1_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB1 power"); -+ gpio_request_one(ARCHER_C7_GPIO_USB2_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB2 power"); -+ ath79_register_usb(); -+} -+ -+static void __init archer_c5_setup(void) -+{ -+ common_setup(true); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ARCHER_C5, "ARCHER-C5", "TP-LINK Archer C5", -+ archer_c5_setup); -+ -+static void __init archer_c7_setup(void) -+{ -+ common_setup(true); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7", -+ archer_c7_setup); -+ -+static void __init tl_wdr4900_v2_setup(void) -+{ -+ common_setup(false); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WDR4900_V2, "TL-WDR4900-v2", "TP-LINK TL-WDR4900 v2", -+ tl_wdr4900_v2_setup) -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-arduino-yun.c linux-4.1.13/arch/mips/ath79/mach-arduino-yun.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-arduino-yun.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-arduino-yun.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,137 @@ -+/* -+ * Arduino Yun support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2015 Hauke Mehrtens -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include -+#include -+#include "common.h" -+#include "gpio.h" -+#include "linux/gpio.h" -+ -+// Uncomment to have reset on gpio18 instead of gipo7 -+#define DS2_B -+ -+#define DS_GPIO_LED_WLAN 0 -+#define DS_GPIO_LED_USB 1 -+ -+#define DS_GPIO_OE 21 -+#define DS_GPIO_AVR_RESET 18 -+ -+// Maintained to have the console in the previous version of DS2 working -+#define DS_GPIO_AVR_RESET_DS2 7 -+ -+#define DS_GPIO_OE2 22 -+#define DS_GPIO_UART_ENA 23 -+#define DS_GPIO_CONF_BTN 20 -+ -+#define DS_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DS_KEYS_DEBOUNCE_INTERVAL (3 * DS_KEYS_POLL_INTERVAL) -+ -+#define DS_MAC0_OFFSET 0x0000 -+#define DS_MAC1_OFFSET 0x0006 -+#define DS_CALDATA_OFFSET 0x1000 -+#define DS_WMAC_MAC_OFFSET 0x1002 -+ -+ -+static struct gpio_led ds_leds_gpio[] __initdata = { -+ { -+ .name = "arduino:white:usb", -+ .gpio = DS_GPIO_LED_USB, -+ .active_low = 0, -+ }, -+ { -+ .name = "arduino:blue:wlan", -+ .gpio = DS_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init ds_common_setup(void) -+{ -+ static u8 mac[6]; -+ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ ath79_register_m25p80(NULL); -+ -+ if (ar93xx_wmac_read_mac_address(mac)) { -+ ath79_register_wmac(NULL, NULL); -+ } else { -+ ath79_register_wmac(art + DS_CALDATA_OFFSET, -+ art + DS_WMAC_MAC_OFFSET); -+ memcpy(mac, art + DS_WMAC_MAC_OFFSET, sizeof(mac)); -+ } -+ -+ mac[3] |= 0x08; -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ mac[3] &= 0xF7; -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+} -+ -+static void __init ds_setup(void) -+{ -+ u32 t; -+ -+ ds_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio), -+ ds_leds_gpio); -+ ath79_register_usb(); -+ -+ //Disable the Function for some pins to have GPIO functionality active -+ // GPIO6-7-8 and GPIO11 -+ ath79_gpio_function_setup(AR933X_GPIO_FUNC_JTAG_DISABLE | AR933X_GPIO_FUNC_I2S_MCK_EN, 0); -+ -+ ath79_gpio_function2_setup(AR933X_GPIO_FUNC2_JUMPSTART_DISABLE, 0); -+ -+ printk("Setting DogStick2 GPIO\n"); -+ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); -+ -+ // Put the avr reset to high -+ if (gpio_request_one(DS_GPIO_AVR_RESET_DS2, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-1") != 0) -+ printk("Error setting GPIO OE\n"); -+ gpio_unexport(DS_GPIO_AVR_RESET_DS2); -+ gpio_free(DS_GPIO_AVR_RESET_DS2); -+ -+ // enable OE of level shifter -+ if (gpio_request_one(DS_GPIO_OE, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-1") != 0) -+ printk("Error setting GPIO OE\n"); -+ -+ if (gpio_request_one(DS_GPIO_UART_ENA, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "UART-ENA") != 0) -+ printk("Error setting GPIO Uart Enable\n"); -+ -+ // enable OE of level shifter -+ if (gpio_request_one(DS_GPIO_OE2, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-2") != 0) -+ printk("Error setting GPIO OE2\n"); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ARDUINO_YUN, "Yun", "Arduino Yun", ds_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-aw-nr580.c linux-4.1.13/arch/mips/ath79/mach-aw-nr580.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-aw-nr580.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-aw-nr580.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,107 @@ -+/* -+ * AzureWave AW-NR580 board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define AW_NR580_GPIO_LED_READY_RED 0 -+#define AW_NR580_GPIO_LED_WLAN 1 -+#define AW_NR580_GPIO_LED_READY_GREEN 2 -+#define AW_NR580_GPIO_LED_WPS_GREEN 4 -+#define AW_NR580_GPIO_LED_WPS_AMBER 5 -+ -+#define AW_NR580_GPIO_BTN_WPS 3 -+#define AW_NR580_GPIO_BTN_RESET 11 -+ -+#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led aw_nr580_leds_gpio[] __initdata = { -+ { -+ .name = "aw-nr580:red:ready", -+ .gpio = AW_NR580_GPIO_LED_READY_RED, -+ .active_low = 0, -+ }, { -+ .name = "aw-nr580:green:ready", -+ .gpio = AW_NR580_GPIO_LED_READY_GREEN, -+ .active_low = 0, -+ }, { -+ .name = "aw-nr580:green:wps", -+ .gpio = AW_NR580_GPIO_LED_WPS_GREEN, -+ .active_low = 0, -+ }, { -+ .name = "aw-nr580:amber:wps", -+ .gpio = AW_NR580_GPIO_LED_WPS_AMBER, -+ .active_low = 0, -+ }, { -+ .name = "aw-nr580:green:wlan", -+ .gpio = AW_NR580_GPIO_LED_WLAN, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AW_NR580_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AW_NR580_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static const char *aw_nr580_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data aw_nr580_flash_data = { -+ .part_probes = aw_nr580_part_probes, -+}; -+ -+static void __init aw_nr580_setup(void) -+{ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_pci(); -+ -+ ath79_register_m25p80(&aw_nr580_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio), -+ aw_nr580_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(aw_nr580_gpio_keys), -+ aw_nr580_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580", -+ aw_nr580_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-bhu-bxu2000n2-a.c linux-4.1.13/arch/mips/ath79/mach-bhu-bxu2000n2-a.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-bhu-bxu2000n2-a.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-bhu-bxu2000n2-a.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,120 @@ -+/* -+ * BHU BXU2000n-2 A1 board support -+ * -+ * Copyright (C) 2013 Terry Yang -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define BHU_BXU2000N2_A1_GPIO_LED_WLAN 13 -+#define BHU_BXU2000N2_A1_GPIO_LED_WAN 19 -+#define BHU_BXU2000N2_A1_GPIO_LED_LAN 21 -+#define BHU_BXU2000N2_A1_GPIO_LED_SYSTEM 14 -+ -+#define BHU_BXU2000N2_A1_GPIO_BTN_RESET 17 -+ -+#define BHU_BXU2000N2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL \ -+ (3 * BHU_BXU2000N2_KEYS_POLL_INTERVAL) -+ -+static const char *bhu_bxu2000n2_part_probes[] = { -+ "cmdlinepart", -+ NULL, -+}; -+ -+static struct flash_platform_data bhu_bxu2000n2_flash_data = { -+ .part_probes = bhu_bxu2000n2_part_probes, -+}; -+ -+static struct gpio_led bhu_bxu2000n2_a1_leds_gpio[] __initdata = { -+ { -+ .name = "bhu:green:status", -+ .gpio = BHU_BXU2000N2_A1_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "bhu:green:lan", -+ .gpio = BHU_BXU2000N2_A1_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "bhu:green:wan", -+ .gpio = BHU_BXU2000N2_A1_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "bhu:green:wlan", -+ .gpio = BHU_BXU2000N2_A1_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button bhu_bxu2000n2_a1_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = BHU_BXU2000N2_A1_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init bhu_ap123_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&bhu_bxu2000n2_flash_data); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ /* GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch. Only use PHY3 */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.phy_mask = BIT(3); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, ee+2); -+} -+ -+static void __init bhu_bxu2000n2_a1_setup(void) -+{ -+ bhu_ap123_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(bhu_bxu2000n2_a1_leds_gpio), -+ bhu_bxu2000n2_a1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, BHU_BXU2000N2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(bhu_bxu2000n2_a1_gpio_keys), -+ bhu_bxu2000n2_a1_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_BHU_BXU2000N2_A1, "BXU2000n-2-A1", -+ "BHU BXU2000n-2 rev. A1", -+ bhu_bxu2000n2_a1_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-bsb.c linux-4.1.13/arch/mips/ath79/mach-bsb.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-bsb.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-bsb.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,83 @@ -+/* -+ * Smart Electronics Black Swift board support -+ * -+ * Copyright (C) 2014 Dmitriy Zherebkov dzh@black-swift.com -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define BSB_GPIO_LED_SYS 27 -+ -+#define BSB_GPIO_BTN_RESET 11 -+ -+#define BSB_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define BSB_KEYS_DEBOUNCE_INTERVAL (3 * BSB_KEYS_POLL_INTERVAL) -+ -+#define BSB_MAC_OFFSET 0x0000 -+#define BSB_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led bsb_leds_gpio[] __initdata = { -+ { -+ .name = "bsb:red:sys", -+ .gpio = BSB_GPIO_LED_SYS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button bsb_gpio_keys[] __initdata = { -+ { -+ .desc = "reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = BSB_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = BSB_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init bsb_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false,false); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(bsb_leds_gpio), -+ bsb_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, BSB_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(bsb_gpio_keys), -+ bsb_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + BSB_MAC_OFFSET, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + BSB_MAC_OFFSET, 2); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(art + BSB_CALDATA_OFFSET, -+ art + BSB_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_BSB, "BSB", "Smart Electronics Black Swift board", -+ bsb_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-cap4200ag.c linux-4.1.13/arch/mips/ath79/mach-cap4200ag.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-cap4200ag.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-cap4200ag.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,131 @@ -+/* -+ * Senao CAP4200AG board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define CAP4200AG_GPIO_LED_PWR_GREEN 12 -+#define CAP4200AG_GPIO_LED_PWR_AMBER 13 -+#define CAP4200AG_GPIO_LED_LAN_GREEN 14 -+#define CAP4200AG_GPIO_LED_LAN_AMBER 15 -+#define CAP4200AG_GPIO_LED_WLAN_GREEN 18 -+#define CAP4200AG_GPIO_LED_WLAN_AMBER 19 -+ -+#define CAP4200AG_GPIO_BTN_RESET 17 -+ -+#define CAP4200AG_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define CAP4200AG_KEYS_DEBOUNCE_INTERVAL (3 * CAP4200AG_KEYS_POLL_INTERVAL) -+ -+#define CAP4200AG_MAC_OFFSET 0 -+#define CAP4200AG_WMAC_CALDATA_OFFSET 0x1000 -+#define CAP4200AG_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led cap4200ag_leds_gpio[] __initdata = { -+ { -+ .name = "senao:green:pwr", -+ .gpio = CAP4200AG_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "senao:amber:pwr", -+ .gpio = CAP4200AG_GPIO_LED_PWR_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "senao:green:lan", -+ .gpio = CAP4200AG_GPIO_LED_LAN_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "senao:amber:lan", -+ .gpio = CAP4200AG_GPIO_LED_LAN_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "senao:green:wlan", -+ .gpio = CAP4200AG_GPIO_LED_WLAN_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "senao:amber:wlan", -+ .gpio = CAP4200AG_GPIO_LED_WLAN_AMBER, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button cap4200ag_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = CAP4200AG_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = CAP4200AG_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init cap4200ag_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 mac[6]; -+ -+ ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_GREEN, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_AMBER, -+ AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cap4200ag_leds_gpio), -+ cap4200ag_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, CAP4200AG_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(cap4200ag_gpio_keys), -+ cap4200ag_gpio_keys); -+ -+ ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -1); -+ ath79_wmac_disable_2ghz(); -+ ath79_register_wmac(art + CAP4200AG_WMAC_CALDATA_OFFSET, mac); -+ -+ ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -2); -+ ap91_pci_init(art + CAP4200AG_PCIE_CALDATA_OFFSET, mac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + CAP4200AG_MAC_OFFSET, -2); -+ -+ /* GMAC0 is connected to an external PHY */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_CAP4200AG, "CAP4200AG", "Senao CAP4200AG", -+ cap4200ag_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-carambola2.c linux-4.1.13/arch/mips/ath79/mach-carambola2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-carambola2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-carambola2.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,105 @@ -+/* -+ * 8devices Carambola2 board support -+ * -+ * Copyright (C) 2013 Darius Augulis -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define CARAMBOLA2_GPIO_LED_WLAN 0 -+#define CARAMBOLA2_GPIO_LED_ETH0 14 -+#define CARAMBOLA2_GPIO_LED_ETH1 13 -+ -+#define CARAMBOLA2_GPIO_BTN_JUMPSTART 11 -+ -+#define CARAMBOLA2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL (3 * CARAMBOLA2_KEYS_POLL_INTERVAL) -+ -+#define CARAMBOLA2_MAC0_OFFSET 0x0000 -+#define CARAMBOLA2_MAC1_OFFSET 0x0006 -+#define CARAMBOLA2_CALDATA_OFFSET 0x1000 -+#define CARAMBOLA2_WMAC_MAC_OFFSET 0x1002 -+ -+static struct gpio_led carambola2_leds_gpio[] __initdata = { -+ { -+ .name = "carambola2:green:wlan", -+ .gpio = CARAMBOLA2_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "carambola2:orange:eth0", -+ .gpio = CARAMBOLA2_GPIO_LED_ETH0, -+ .active_low = 0, -+ }, { -+ .name = "carambola2:orange:eth1", -+ .gpio = CARAMBOLA2_GPIO_LED_ETH1, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button carambola2_gpio_keys[] __initdata = { -+ { -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = CARAMBOLA2_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init carambola2_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art + CARAMBOLA2_CALDATA_OFFSET, -+ art + CARAMBOLA2_WMAC_MAC_OFFSET); -+ -+ ath79_setup_ar933x_phy4_switch(true, true); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + CARAMBOLA2_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + CARAMBOLA2_MAC1_OFFSET, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+} -+ -+static void __init carambola2_setup(void) -+{ -+ carambola2_common_setup(); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(carambola2_leds_gpio), -+ carambola2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, CARAMBOLA2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(carambola2_gpio_keys), -+ carambola2_gpio_keys); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_CARAMBOLA2, "CARAMBOLA2", "8devices Carambola2 board", -+ carambola2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-cf-e316n-v2.c linux-4.1.13/arch/mips/ath79/mach-cf-e316n-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-cf-e316n-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-cf-e316n-v2.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,132 @@ -+/* -+ * COMFAST CF-E316N v2 -+ * by Shenzhen Four Seas Global Link Network Technology Co., Ltd -+ * -+ * aka CF-E316V2, CF-E316N-V2 and CF-E316Nv2.0 (no FCC ID) -+ * -+ * Copyright (C) 2015 Paul Fertser -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+static struct gpio_led cf_e316n_v2_leds_gpio[] __initdata = { -+ { -+ .name = "cf-e316n-v2:blue:diag", -+ .gpio = 0, -+ .active_low = 0, -+ }, { -+ .name = "cf-e316n-v2:red:diag", -+ .gpio = 2, -+ .active_low = 0, -+ }, { -+ .name = "cf-e316n-v2:green:diag", -+ .gpio = 3, -+ .active_low = 0, -+ }, { -+ .name = "cf-e316n-v2:blue:wlan", -+ .gpio = 12, -+ .active_low = 1, -+ }, { -+ .name = "cf-e316n-v2:blue:wan", -+ .gpio = 17, -+ .active_low = 1, -+ }, { -+ .name = "cf-e316n-v2:blue:lan", -+ .gpio = 19, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button cf_e316n_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = 60, -+ .gpio = 20, -+ .active_low = 1, -+ }, -+}; -+ -+/* There's a Pericon Technology PT7A7514 connected to GPIO 16 */ -+#define EXT_WATCHDOG_GPIO 16 -+static struct timer_list gpio_wdt_timer; -+ -+static void gpio_wdt_toggle(unsigned long period) -+{ -+ static int state; -+ state = !state; -+ gpio_set_value(EXT_WATCHDOG_GPIO, state); -+ mod_timer(&gpio_wdt_timer, jiffies + period); -+} -+ -+static void __init cf_e316n_v2_setup(void) -+{ -+ u8 *maclan = (u8 *) KSEG1ADDR(0x1f010000); -+ u8 *macwlan = (u8 *) KSEG1ADDR(0x1f011002); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1f011000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ gpio_request(EXT_WATCHDOG_GPIO, "PT7A7514 watchdog"); -+ gpio_direction_output(EXT_WATCHDOG_GPIO, 0); -+ setup_timer(&gpio_wdt_timer, gpio_wdt_toggle, msecs_to_jiffies(500)); -+ gpio_wdt_toggle(msecs_to_jiffies(1)); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ ath79_register_mdio(1, 0x0); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_init_mac(ath79_eth0_data.mac_addr, maclan, 0); -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_init_mac(ath79_eth1_data.mac_addr, maclan, 2); -+ ath79_register_eth(1); -+ -+ /* Enable 2x Skyworks SE2576L WLAN power amplifiers */ -+ gpio_request(13, "RF Amp 1"); -+ gpio_direction_output(13, 1); -+ gpio_request(14, "RF Amp 2"); -+ gpio_direction_output(14, 1); -+ ath79_init_mac(tmpmac, macwlan, 0); -+ ath79_register_wmac(ee, tmpmac); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e316n_v2_leds_gpio), -+ cf_e316n_v2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, 20, -+ ARRAY_SIZE(cf_e316n_v2_gpio_keys), -+ cf_e316n_v2_gpio_keys); -+ -+ /* J1 is a High-Speed USB port, pin 1 is Vcc */ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_CF_E316N_V2, "CF-E316N-V2", "COMFAST CF-E316N v2", -+ cf_e316n_v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-cpe510.c linux-4.1.13/arch/mips/ath79/mach-cpe510.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-cpe510.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-cpe510.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,107 @@ -+/* -+ * TP-LINK CPE210/220/510/520 board support -+ * -+ * Copyright (C) 2014 Matthias Schiffer -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+ -+#define CPE510_GPIO_LED_LAN0 11 -+#define CPE510_GPIO_LED_LAN1 12 -+#define CPE510_GPIO_LED_L1 13 -+#define CPE510_GPIO_LED_L2 14 -+#define CPE510_GPIO_LED_L3 15 -+#define CPE510_GPIO_LED_L4 16 -+ -+#define CPE510_GPIO_BTN_RESET 4 -+ -+#define CPE510_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define CPE510_KEYS_DEBOUNCE_INTERVAL (3 * CPE510_KEYS_POLL_INTERVAL) -+ -+ -+static struct gpio_led cpe510_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan0", -+ .gpio = CPE510_GPIO_LED_LAN0, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan1", -+ .gpio = CPE510_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:link1", -+ .gpio = CPE510_GPIO_LED_L1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:link2", -+ .gpio = CPE510_GPIO_LED_L2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:link3", -+ .gpio = CPE510_GPIO_LED_L3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:link4", -+ .gpio = CPE510_GPIO_LED_L4, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button cpe510_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = CPE510_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+ -+static void __init cpe510_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f830008); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* Disable JTAG, enabling GPIOs 0-3 */ -+ /* Configure OBS4 line, for GPIO 4*/ -+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, -+ AR934X_GPIO_FUNC_CLK_OBS4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio), -+ cpe510_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, CPE510_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(cpe510_gpio_keys), -+ cpe510_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE210/220/510/520", -+ cpe510_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-db120.c linux-4.1.13/arch/mips/ath79/mach-db120.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-db120.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-db120.c 2015-12-04 19:57:04.322082119 +0100 -@@ -2,7 +2,7 @@ - * Atheros DB120 reference board support - * - * Copyright (c) 2011 Qualcomm Atheros -- * Copyright (c) 2011 Gabor Juhos -+ * Copyright (c) 2011-2012 Gabor Juhos - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above -@@ -19,16 +19,26 @@ - */ - - #include -+#include -+#include - #include -+#include - --#include "machtypes.h" -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" - #include "dev-spi.h" - #include "dev-usb.h" - #include "dev-wmac.h" --#include "pci.h" -+#include "machtypes.h" - -+#define DB120_GPIO_LED_USB 11 - #define DB120_GPIO_LED_WLAN_5G 12 - #define DB120_GPIO_LED_WLAN_2G 13 - #define DB120_GPIO_LED_STATUS 14 -@@ -39,8 +49,10 @@ - #define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ - #define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) - --#define DB120_WMAC_CALDATA_OFFSET 0x1000 --#define DB120_PCIE_CALDATA_OFFSET 0x5000 -+#define DB120_MAC0_OFFSET 0 -+#define DB120_MAC1_OFFSET 6 -+#define DB120_WMAC_CALDATA_OFFSET 0x1000 -+#define DB120_PCIE_CALDATA_OFFSET 0x5000 - - static struct gpio_led db120_leds_gpio[] __initdata = { - { -@@ -63,6 +75,11 @@ - .gpio = DB120_GPIO_LED_WLAN_2G, - .active_low = 1, - }, -+ { -+ .name = "db120:green:usb", -+ .gpio = DB120_GPIO_LED_USB, -+ .active_low = 1, -+ } - }; - - static struct gpio_keys_button db120_gpio_keys[] __initdata = { -@@ -76,60 +93,85 @@ - }, - }; - --static struct spi_board_info db120_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "s25sl064a", -- } -+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, - }; - --static struct ath79_spi_platform_data db120_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct ar8327_led_cfg db120_ar8327_led_cfg = { -+ .led_ctrl0 = 0x00000000, -+ .led_ctrl1 = 0xc737c737, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x00c30c00, -+ .open_drain = true, - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data db120_ath9k_data; -- --static int db120_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &db120_ath9k_data; -- break; -- } -- -- return 0; --} -- --static void __init db120_pci_init(u8 *eeprom) --{ -- memcpy(db120_ath9k_data.eeprom_data, eeprom, -- sizeof(db120_ath9k_data.eeprom_data)); -+static struct ar8327_platform_data db120_ar8327_data = { -+ .pad0_cfg = &db120_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &db120_ar8327_led_cfg, -+}; - -- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void db120_pci_init(u8 *eeprom) {} --#endif /* CONFIG_PCI */ -+static struct mdio_board_info db120_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &db120_ar8327_data, -+ }, -+}; - - static void __init db120_setup(void) - { - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -+ ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO); -+ ath79_register_m25p80(NULL); -+ - ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), - db120_leds_gpio); - ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, - ARRAY_SIZE(db120_gpio_keys), - db120_gpio_keys); -- ath79_register_spi(&db120_spi_data, db120_spi_info, -- ARRAY_SIZE(db120_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); -- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); -+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(db120_mdio0_info, -+ ARRAY_SIZE(db120_mdio0_info)); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_nfc(); - } - - MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dgl-5500-a1.c linux-4.1.13/arch/mips/ath79/mach-dgl-5500-a1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dgl-5500-a1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dgl-5500-a1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,150 @@ -+/* -+ * D-Link DGL-5500 board support -+ * -+ * Copyright (C) 2014 Gabor Juhos -+ * Copyright (C) 2014 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DGL_5500_A1_GPIO_LED_POWER_ORANGE 14 -+#define DGL_5500_A1_GPIO_LED_POWER_GREEN 19 -+#define DGL_5500_A1_GPIO_LED_PLANET_GREEN 22 -+#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE 23 -+ -+#define DGL_5500_A1_GPIO_BTN_WPS 16 -+#define DGL_5500_A1_GPIO_BTN_RESET 17 -+ -+#define DGL_5500_A1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL \ -+ (3 * DGL_5500_A1_KEYS_POLL_INTERVAL) -+ -+#define DGL_5500_A1_WMAC_CALDATA_OFFSET 0x1000 -+ -+#define DGL_5500_A1_LAN_MAC_OFFSET 0x04 -+#define DGL_5500_A1_WAN_MAC_OFFSET 0x16 -+ -+static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:green:power", -+ .gpio = DGL_5500_A1_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:orange:power", -+ .gpio = DGL_5500_A1_GPIO_LED_POWER_ORANGE, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:green:planet", -+ .gpio = DGL_5500_A1_GPIO_LED_PLANET_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:orange:planet", -+ .gpio = DGL_5500_A1_GPIO_LED_PLANET_ORANGE, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DGL_5500_A1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DGL_5500_A1_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = { -+ /* Use the SGMII interface for the GMAC0 of the AR8327 switch */ -+ .mode = AR8327_PAD_MAC_SGMII, -+ .sgmii_delay_en = true, -+}; -+ -+static struct ar8327_platform_data dgl_5500_a1_ar8327_data = { -+ .pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info dgl_5500_a1_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &dgl_5500_a1_ar8327_data, -+ }, -+}; -+ -+static void __init dgl_5500_a1_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 lan_mac[ETH_ALEN]; -+ -+ ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio), -+ dgl_5500_a1_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dgl_5500_a1_gpio_keys), -+ dgl_5500_a1_gpio_keys); -+ -+ ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac); -+ -+ ath79_register_mdio(0, 0x0); -+ mdiobus_register_board_info(dgl_5500_a1_mdio0_info, -+ ARRAY_SIZE(dgl_5500_a1_mdio0_info)); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); -+ -+ /* GMAC1 is connected to an AR8327N switch via the SMGII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.phy_mask = BIT(0); -+ ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1", -+ dgl_5500_a1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dhp-1565-a1.c linux-4.1.13/arch/mips/ath79/mach-dhp-1565-a1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dhp-1565-a1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dhp-1565-a1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,170 @@ -+/* -+ * D-Link DHP-1565 rev. A1 board support -+ * -+ * Copyright (C) 2014 Jacek Kikiewicz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DHP1565A1_GPIO_LED_BLUE_USB 11 -+#define DHP1565A1_GPIO_LED_AMBER_POWER 14 -+#define DHP1565A1_GPIO_LED_BLUE_POWER 22 -+#define DHP1565A1_GPIO_LED_BLUE_WPS 15 -+#define DHP1565A1_GPIO_LED_AMBER_PLANET 19 -+#define DHP1565A1_GPIO_LED_BLUE_PLANET 18 -+#define DHP1565A1_GPIO_LED_WLAN_2G 13 -+ -+#define DHP1565A1_GPIO_WAN_LED_ENABLE 20 -+ -+#define DHP1565A1_GPIO_BTN_RESET 17 -+#define DHP1565A1_GPIO_BTN_WPS 16 -+ -+#define DHP1565A1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DHP1565A1_KEYS_DEBOUNCE_INTERVAL (3 * DHP1565A1_KEYS_POLL_INTERVAL) -+ -+#define DHP1565A1_MAC0_OFFSET 0xFFA0 -+#define DHP1565A1_MAC1_OFFSET 0xFFB4 -+#define DHP1565A1_WMAC0_OFFSET 0x5 -+#define DHP1565A1_WMAC_CALDATA_OFFSET 0x1000 -+#define DHP1565A1_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led dhp1565a1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:amber:power", -+ .gpio = DHP1565A1_GPIO_LED_AMBER_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:green:power", -+ .gpio = DHP1565A1_GPIO_LED_BLUE_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:amber:planet", -+ .gpio = DHP1565A1_GPIO_LED_AMBER_PLANET, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:green:planet", -+ .gpio = DHP1565A1_GPIO_LED_BLUE_PLANET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button dhp1565a1_gpio_keys[] __initdata = { -+ { -+ .desc = "Soft reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DHP1565A1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DHP1565A1_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg dhp1565a1_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data dhp1565a1_ar8327_data = { -+ .pad0_cfg = &dhp1565a1_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info dhp1565a1_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &dhp1565a1_ar8327_data, -+ }, -+}; -+ -+static void __init dhp1565a1_generic_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; -+ u8 wmac0[ETH_ALEN]; -+ -+ ath79_parse_ascii_mac(mac + DHP1565A1_MAC0_OFFSET, mac0); -+ ath79_parse_ascii_mac(mac + DHP1565A1_MAC1_OFFSET, mac1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_gpio_keys_polled(-1, DHP1565A1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dhp1565a1_gpio_keys), -+ dhp1565a1_gpio_keys); -+ -+ ath79_init_mac(wmac0, mac0, 0); -+ ath79_register_wmac(art + DHP1565A1_WMAC_CALDATA_OFFSET, wmac0); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ -+ mdiobus_register_board_info(dhp1565a1_mdio0_info, -+ ARRAY_SIZE(dhp1565a1_mdio0_info)); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 1); -+ -+ /* GMAC0 is connected to an AR8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+} -+ -+static void __init dhp1565a1_setup(void) -+{ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dhp1565a1_leds_gpio), -+ dhp1565a1_leds_gpio); -+ -+ dhp1565a1_generic_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DHP_1565_A1, "DHP-1565-A1", -+ "D-Link DHP-1565 rev. A1", -+ dhp1565a1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-505-a1.c linux-4.1.13/arch/mips/ath79/mach-dir-505-a1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dir-505-a1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dir-505-a1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,116 @@ -+/* -+ * DLink DIR-505 A1 board support -+ * -+ * Copyright (C) 2013 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define DIR_505A1_GPIO_BTN_WPS 11 /* verify */ -+#define DIR_505A1_GPIO_BTN_RESET 12 /* verify */ -+ -+#define DIR_505A1_GPIO_LED_RED 26 /* unused, fyi */ -+#define DIR_505A1_GPIO_LED_GREEN 27 -+ -+#define DIR_505A1_GPIO_WAN_LED_ENABLE 1 -+ -+#define DIR_505A1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DIR_505A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_505A1_KEYS_POLL_INTERVAL) -+ -+#define DIR_505A1_ART_ADDRESS 0x1f010000 -+#define DIR_505A1_CALDATA_OFFSET 0x1000 -+ -+#define DIR_505A1_MAC_PART_ADDRESS 0x1f020000 -+#define DIR_505A1_LAN_MAC_OFFSET 0x04 -+#define DIR_505A1_WAN_MAC_OFFSET 0x16 -+ -+static struct gpio_led dir_505_a1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:green:power", -+ .gpio = DIR_505A1_GPIO_LED_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "d-link:red:status", -+ .gpio = DIR_505A1_GPIO_LED_RED, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button dir_505_a1_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_505A1_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_505A1_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init dir_505_a1_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(DIR_505A1_ART_ADDRESS); -+ u8 *mac = (u8 *) KSEG1ADDR(DIR_505A1_MAC_PART_ADDRESS); -+ u8 lan_mac[ETH_ALEN]; -+ u8 wan_mac[ETH_ALEN]; -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ gpio_request_one(DIR_505A1_GPIO_WAN_LED_ENABLE, -+ GPIOF_OUT_INIT_LOW, "WAN LED enable"); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_505_a1_leds_gpio), -+ dir_505_a1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, DIR_505A1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dir_505_a1_gpio_keys), -+ dir_505_a1_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_usb(); -+ -+ ath79_parse_ascii_mac(mac + DIR_505A1_LAN_MAC_OFFSET, lan_mac); -+ ath79_parse_ascii_mac(mac + DIR_505A1_WAN_MAC_OFFSET, wan_mac); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(art + DIR_505A1_CALDATA_OFFSET, lan_mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_505_A1, "DIR-505-A1", -+ "D-Link DIR-505 rev. A1", dir_505_a1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-600-a1.c linux-4.1.13/arch/mips/ath79/mach-dir-600-a1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dir-600-a1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dir-600-a1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,159 @@ -+/* -+ * D-Link DIR-600 rev. A1 board support -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * Copyright (C) 2012 Vadim Girlin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define DIR_600_A1_GPIO_LED_WPS 0 -+#define DIR_600_A1_GPIO_LED_POWER_AMBER 1 -+#define DIR_600_A1_GPIO_LED_POWER_GREEN 6 -+#define DIR_600_A1_GPIO_LED_LAN1 13 -+#define DIR_600_A1_GPIO_LED_LAN2 14 -+#define DIR_600_A1_GPIO_LED_LAN3 15 -+#define DIR_600_A1_GPIO_LED_LAN4 16 -+#define DIR_600_A1_GPIO_LED_WAN_AMBER 7 -+#define DIR_600_A1_GPIO_LED_WAN_GREEN 17 -+ -+#define DIR_600_A1_GPIO_BTN_RESET 8 -+#define DIR_600_A1_GPIO_BTN_WPS 12 -+ -+#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL) -+ -+#define DIR_600_A1_NVRAM_ADDR 0x1f030000 -+#define DIR_600_A1_NVRAM_SIZE 0x10000 -+ -+static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:green:power", -+ .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, -+ }, { -+ .name = "d-link:amber:power", -+ .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, -+ }, { -+ .name = "d-link:amber:wan", -+ .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER, -+ }, { -+ .name = "d-link:green:wan", -+ .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:lan1", -+ .gpio = DIR_600_A1_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:lan2", -+ .gpio = DIR_600_A1_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:lan3", -+ .gpio = DIR_600_A1_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:lan4", -+ .gpio = DIR_600_A1_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "d-link:blue:wps", -+ .gpio = DIR_600_A1_GPIO_LED_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_600_A1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_600_A1_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init dir_600_a1_setup(void) -+{ -+ const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 mac_buff[6]; -+ u8 *mac = NULL; -+ -+ if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, -+ "lan_mac=", mac_buff) == 0) { -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1); -+ mac = mac_buff; -+ } -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), -+ dir_600_a1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dir_600_a1_gpio_keys), -+ dir_600_a1_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ ap91_pci_init(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", -+ dir_600_a1_setup); -+ -+static void __init dir_615_e1_setup(void) -+{ -+ dir_600_a1_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_615_E1, "DIR-615-E1", "D-Link DIR-615 rev. E1", -+ dir_615_e1_setup); -+ -+static void __init dir_615_e4_setup(void) -+{ -+ dir_600_a1_setup(); -+ ap9x_pci_setup_wmac_led_pin(0, 1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4", -+ dir_615_e4_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-c1.c linux-4.1.13/arch/mips/ath79/mach-dir-615-c1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-c1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dir-615-c1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,135 @@ -+/* -+ * D-Link DIR-615 rev C1 board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */ -+#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */ -+#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */ -+#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */ -+#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */ -+#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */ -+#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */ -+ -+/* buttons may need refinement */ -+ -+#define DIR_615C1_GPIO_BTN_WPS 12 -+#define DIR_615C1_GPIO_BTN_RESET 21 -+ -+#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL) -+ -+#define DIR_615C1_CONFIG_ADDR 0x1f020000 -+#define DIR_615C1_CONFIG_SIZE 0x10000 -+ -+#define DIR_615C1_WLAN_MAC_ADDR 0x1f3fffb4 -+ -+static struct gpio_led dir_615c1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:orange:status", -+ .gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS, -+ .active_low = 1, -+ }, { -+ .name = "d-link:blue:wps", -+ .gpio = DIR_615C1_GPIO_LED_BLUE_WPS, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:wan", -+ .gpio = DIR_615C1_GPIO_LED_GREEN_WAN, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:wancpu", -+ .gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:wlan", -+ .gpio = DIR_615C1_GPIO_LED_GREEN_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:status", -+ .gpio = DIR_615C1_GPIO_LED_GREEN_STATUS, -+ .active_low = 1, -+ }, { -+ .name = "d-link:orange:wan", -+ .gpio = DIR_615C1_GPIO_LED_ORANGE_WAN, -+ .active_low = 1, -+ } -+ -+}; -+ -+static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_615C1_GPIO_BTN_RESET, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_615C1_GPIO_BTN_WPS, -+ } -+}; -+ -+#define DIR_615C1_LAN_PHYMASK BIT(0) -+#define DIR_615C1_WAN_PHYMASK BIT(4) -+#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \ -+ DIR_615C1_WAN_PHYMASK)) -+ -+static void __init dir_615c1_setup(void) -+{ -+ const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 mac[ETH_ALEN], wlan_mac[ETH_ALEN]; -+ -+ if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE, -+ "lan_mac=", mac) == 0) { -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ } -+ -+ ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615C1_WLAN_MAC_ADDR), wlan_mac); -+ -+ ath79_register_mdio(0, DIR_615C1_MDIO_MASK); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK; -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio), -+ dir_615c1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dir_615c1_gpio_keys), -+ dir_615c1_gpio_keys); -+ -+ ath79_register_wmac(eeprom, wlan_mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1", -+ dir_615c1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-i1.c linux-4.1.13/arch/mips/ath79/mach-dir-615-i1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-i1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dir-615-i1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,133 @@ -+/* -+ * D-Link DIR-615 rev. I1 board support -+ * Copyright (C) 2013-2015 Jaehoon You -+ * -+ * based on the DIR-600 rev. A1 board support code -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * Copyright (C) 2012 Vadim Girlin -+ * -+ * based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DIR_615_I1_GPIO_LED_WPS 15 -+#define DIR_615_I1_GPIO_LED_POWER_AMBER 14 -+#define DIR_615_I1_GPIO_LED_POWER_GREEN 4 -+#define DIR_615_I1_GPIO_LED_WAN_AMBER 22 -+#define DIR_615_I1_GPIO_LED_WAN_GREEN 12 -+#define DIR_615_I1_GPIO_LED_WLAN_GREEN 13 -+ -+#define DIR_615_I1_GPIO_BTN_WPS 16 -+#define DIR_615_I1_GPIO_BTN_RESET 17 -+ -+#define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL) -+ -+#define DIR_615_I1_LAN_PHYMASK BIT(0) -+#define DIR_615_I1_WAN_PHYMASK BIT(4) -+#define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4 -+ -+static struct gpio_led dir_615_i1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:green:power", -+ .gpio = DIR_615_I1_GPIO_LED_POWER_GREEN, -+ }, { -+ .name = "d-link:amber:power", -+ .gpio = DIR_615_I1_GPIO_LED_POWER_AMBER, -+ }, { -+ .name = "d-link:amber:wan", -+ .gpio = DIR_615_I1_GPIO_LED_WAN_AMBER, -+ }, { -+ .name = "d-link:green:wan", -+ .gpio = DIR_615_I1_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "d-link:green:wlan", -+ .gpio = DIR_615_I1_GPIO_LED_WLAN_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "d-link:blue:wps", -+ .gpio = DIR_615_I1_GPIO_LED_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button dir_615_i1_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_615_I1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR_615_I1_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init dir_615_i1_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 mac[ETH_ALEN]; -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK)); -+ -+ ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR), mac); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = DIR_615_I1_WAN_PHYMASK; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_mask = DIR_615_I1_LAN_PHYMASK; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ /* Disable JTAG, enabling GPIOs 0-3 */ -+ /* Configure OBS4 line, for GPIO 4*/ -+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, -+ AR934X_GPIO_FUNC_CLK_OBS4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio), -+ dir_615_i1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dir_615_i1_gpio_keys), -+ dir_615_i1_gpio_keys); -+ -+ ath79_register_wmac(eeprom, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_615_I1, "DIR-615-I1", "D-Link DIR-615 rev. I1", -+ dir_615_i1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-b1.c linux-4.1.13/arch/mips/ath79/mach-dir-825-b1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-b1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dir-825-b1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,191 @@ -+/* -+ * D-Link DIR-825 rev. B1 board support -+ * -+ * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o. -+ * -+ * based on mach-wndr3700.c -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define DIR825B1_GPIO_LED_BLUE_USB 0 -+#define DIR825B1_GPIO_LED_ORANGE_POWER 1 -+#define DIR825B1_GPIO_LED_BLUE_POWER 2 -+#define DIR825B1_GPIO_LED_BLUE_WPS 4 -+#define DIR825B1_GPIO_LED_ORANGE_PLANET 6 -+#define DIR825B1_GPIO_LED_BLUE_PLANET 11 -+ -+#define DIR825B1_GPIO_BTN_RESET 3 -+#define DIR825B1_GPIO_BTN_WPS 8 -+ -+#define DIR825B1_GPIO_RTL8366_SDA 5 -+#define DIR825B1_GPIO_RTL8366_SCK 7 -+ -+#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL) -+ -+#define DIR825B1_CAL0_OFFSET 0x1000 -+#define DIR825B1_CAL1_OFFSET 0x5000 -+#define DIR825B1_MAC0_OFFSET 0xffa0 -+#define DIR825B1_MAC1_OFFSET 0xffb4 -+ -+#define DIR825B1_CAL_LOCATION_0 0x1f660000 -+#define DIR825B1_CAL_LOCATION_1 0x1f7f0000 -+ -+static struct gpio_led dir825b1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:blue:usb", -+ .gpio = DIR825B1_GPIO_LED_BLUE_USB, -+ .active_low = 1, -+ }, { -+ .name = "d-link:orange:power", -+ .gpio = DIR825B1_GPIO_LED_ORANGE_POWER, -+ .active_low = 1, -+ }, { -+ .name = "d-link:blue:power", -+ .gpio = DIR825B1_GPIO_LED_BLUE_POWER, -+ .active_low = 1, -+ }, { -+ .name = "d-link:blue:wps", -+ .gpio = DIR825B1_GPIO_LED_BLUE_WPS, -+ .active_low = 1, -+ }, { -+ .name = "d-link:orange:planet", -+ .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET, -+ .active_low = 1, -+ }, { -+ .name = "d-link:blue:planet", -+ .gpio = DIR825B1_GPIO_LED_BLUE_PLANET, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR825B1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR825B1_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = { -+ { .reg = 0x06, .val = 0x0108 }, -+}; -+ -+static struct rtl8366_platform_data dir825b1_rtl8366s_data = { -+ .gpio_sda = DIR825B1_GPIO_RTL8366_SDA, -+ .gpio_sck = DIR825B1_GPIO_RTL8366_SCK, -+ .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals), -+ .initvals = dir825b1_rtl8366s_initvals, -+}; -+ -+static struct platform_device dir825b1_rtl8366s_device = { -+ .name = RTL8366S_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &dir825b1_rtl8366s_data, -+ } -+}; -+ -+static bool __init dir825b1_is_caldata_valid(u8 *p) -+{ -+ u16 *magic0, *magic1; -+ -+ magic0 = (u16 *)(p + DIR825B1_CAL0_OFFSET); -+ magic1 = (u16 *)(p + DIR825B1_CAL1_OFFSET); -+ -+ return (*magic0 == 0xa55a && *magic1 == 0xa55a); -+} -+ -+static void __init dir825b1_wlan_init(void) -+{ -+ u8 *caldata; -+ u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; -+ u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; -+ -+ caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0); -+ if (!dir825b1_is_caldata_valid(caldata)) { -+ caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1); -+ if (!dir825b1_is_caldata_valid(caldata)) { -+ pr_err("no calibration data found\n"); -+ return; -+ } -+ } -+ -+ ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0); -+ ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0); -+ ath79_init_mac(wmac0, mac0, 0); -+ ath79_init_mac(wmac1, mac1, 1); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 5); -+ ap9x_pci_setup_wmac_led_pin(1, 5); -+ -+ ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0, -+ caldata + DIR825B1_CAL1_OFFSET, wmac1); -+} -+ -+static void __init dir825b1_setup(void) -+{ -+ dir825b1_wlan_init(); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_pll_data.pll_1000 = 0x11110000; -+ -+ ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ ath79_eth1_pll_data.pll_1000 = 0x11110000; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio), -+ dir825b1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dir825b1_gpio_keys), -+ dir825b1_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ platform_device_register(&dir825b1_rtl8366s_device); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1", -+ dir825b1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-c1.c linux-4.1.13/arch/mips/ath79/mach-dir-825-c1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-c1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dir-825-c1.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,241 @@ -+/* -+ * D-Link DIR-825 rev. C1 board support -+ * -+ * Copyright (C) 2013 Alexander Stadler -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DIR825C1_GPIO_LED_BLUE_USB 11 -+#define DIR825C1_GPIO_LED_AMBER_POWER 14 -+#define DIR825C1_GPIO_LED_BLUE_POWER 22 -+#define DIR825C1_GPIO_LED_BLUE_WPS 15 -+#define DIR825C1_GPIO_LED_AMBER_PLANET 19 -+#define DIR825C1_GPIO_LED_BLUE_PLANET 18 -+#define DIR825C1_GPIO_LED_WLAN_2G 13 -+ -+#define DIR825C1_GPIO_WAN_LED_ENABLE 20 -+ -+#define DIR825C1_GPIO_BTN_RESET 17 -+#define DIR825C1_GPIO_BTN_WPS 16 -+ -+#define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL) -+ -+#define DIR825C1_MAC0_OFFSET 0x4 -+#define DIR825C1_MAC1_OFFSET 0x18 -+#define DIR825C1_WMAC_CALDATA_OFFSET 0x1000 -+#define DIR825C1_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led dir825c1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:blue:usb", -+ .gpio = DIR825C1_GPIO_LED_BLUE_USB, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:amber:power", -+ .gpio = DIR825C1_GPIO_LED_AMBER_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:blue:power", -+ .gpio = DIR825C1_GPIO_LED_BLUE_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:blue:wps", -+ .gpio = DIR825C1_GPIO_LED_BLUE_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:amber:planet", -+ .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:blue:wlan2g", -+ .gpio = DIR825C1_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led dir835a1_leds_gpio[] __initdata = { -+ { -+ .name = "d-link:amber:power", -+ .gpio = DIR825C1_GPIO_LED_AMBER_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:green:power", -+ .gpio = DIR825C1_GPIO_LED_BLUE_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:blue:wps", -+ .gpio = DIR825C1_GPIO_LED_BLUE_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:amber:planet", -+ .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, -+ .active_low = 1, -+ }, -+ { -+ .name = "d-link:green:planet", -+ .gpio = DIR825C1_GPIO_LED_BLUE_PLANET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = { -+ { -+ .desc = "Soft reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR825C1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DIR825C1_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = { -+ .led_ctrl0 = 0x00000000, -+ .led_ctrl1 = 0xc737c737, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x00c30c00, -+ .open_drain = true, -+}; -+ -+static struct ar8327_platform_data dir825c1_ar8327_data = { -+ .pad0_cfg = &dir825c1_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &dir825c1_ar8327_led_cfg, -+}; -+ -+static struct mdio_board_info dir825c1_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &dir825c1_ar8327_data, -+ }, -+}; -+ -+static void __init dir825c1_generic_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; -+ u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; -+ -+ ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0); -+ ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dir825c1_gpio_keys), -+ dir825c1_gpio_keys); -+ -+ ath79_init_mac(wmac0, mac0, 0); -+ ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0); -+ -+ ath79_init_mac(wmac1, mac1, 1); -+ ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ -+ mdiobus_register_board_info(dir825c1_mdio0_info, -+ ARRAY_SIZE(dir825c1_mdio0_info)); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); -+ -+ /* GMAC0 is connected to an AR8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+} -+ -+static void __init dir825c1_setup(void) -+{ -+ ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB, -+ AR934X_GPIO_OUT_GPIO); -+ -+ gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE, -+ GPIOF_OUT_INIT_LOW, "WAN LED enable"); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio), -+ dir825c1_leds_gpio); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+ -+ dir825c1_generic_setup(); -+} -+ -+static void __init dir835a1_setup(void) -+{ -+ dir825c1_ar8327_data.led_cfg = NULL; -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio), -+ dir835a1_leds_gpio); -+ -+ dir825c1_generic_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1", -+ "D-Link DIR-825 rev. C1", -+ dir825c1_setup); -+ -+MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1", -+ "D-Link DIR-835 rev. A1", -+ dir835a1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dlan-hotspot.c linux-4.1.13/arch/mips/ath79/mach-dlan-hotspot.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dlan-hotspot.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dlan-hotspot.c 2015-12-04 18:27:35.457807850 +0100 -@@ -0,0 +1,117 @@ -+/* -+ * devolo dLAN Hotspot board support -+ * -+ * Copyright (C) 2015 Torsten Schnuis -+ * Copyright (C) 2015 devolo AG -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DLAN_HOTSPOT_GPIO_LED_WIFI 0 -+ -+#define DLAN_HOTSPOT_GPIO_BTN_RESET 11 -+#define DLAN_HOTSPOT_GPIO_BTN_PLC_PAIRING 12 -+#define DLAN_HOTSPOT_GPIO_BTN_WIFI 21 -+ -+#define DLAN_HOTSPOT_GPIO_PLC_POWER 22 -+#define DLAN_HOTSPOT_GPIO_PLC_RESET 20 -+#define DLAN_HOTSPOT_GPIO_PLC_DISABLE_LEDS 18 -+ -+#define DLAN_HOTSPOT_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_HOTSPOT_KEYS_POLL_INTERVAL) -+ -+#define DLAN_HOTSPOT_ART_ADDRESS 0x1fff0000 -+#define DLAN_HOTSPOT_CALDATA_OFFSET 0x00001000 -+#define DLAN_HOTSPOT_MAC_ADDRESS_OFFSET 0x00001002 -+ -+static struct gpio_led dlan_hotspot_leds_gpio[] __initdata = { -+ { -+ .name = "devolo:green:wifi", -+ .gpio = DLAN_HOTSPOT_GPIO_LED_WIFI, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button dlan_hotspot_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_HOTSPOT_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "Pairing button", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_HOTSPOT_GPIO_BTN_PLC_PAIRING, -+ .active_low = 0, -+ }, -+ { -+ .desc = "WLAN button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_HOTSPOT_GPIO_BTN_WIFI, -+ .active_low = 0, -+ } -+}; -+ -+static void __init dlan_hotspot_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(DLAN_HOTSPOT_ART_ADDRESS); -+ u8 *cal = art + DLAN_HOTSPOT_CALDATA_OFFSET; -+ u8 *wifi_mac = art + DLAN_HOTSPOT_MAC_ADDRESS_OFFSET; -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_hotspot_leds_gpio), -+ dlan_hotspot_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DLAN_HOTSPOT_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dlan_hotspot_gpio_keys), -+ dlan_hotspot_gpio_keys); -+ -+ gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "PLC power"); -+ gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_RESET, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, -+ "PLC reset"); -+ gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_DISABLE_LEDS, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, -+ "PLC LEDs"); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 2); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(cal, wifi_mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DLAN_HOTSPOT, "dLAN-Hotspot", -+ "dLAN Hotspot", dlan_hotspot_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-1200-ac.c linux-4.1.13/arch/mips/ath79/mach-dlan-pro-1200-ac.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-1200-ac.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dlan-pro-1200-ac.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,189 @@ -+/* -+ * devolo dLAN pro 500 Wireless+ support -+ * -+ * Copyright (c) 2013-2015 devolo AG -+ * Copyright (c) 2011-2012 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE 13 -+#define DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE 21 -+#define DLAN_PRO_1200_AC_GPIO_LED_WLAN 12 -+#define DLAN_PRO_1200_AC_GPIO_LED_DLAN 14 -+#define DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR 15 -+ -+#define DLAN_PRO_1200_AC_GPIO_BTN_WLAN 20 -+#define DLAN_PRO_1200_AC_GPIO_BTN_DLAN 22 -+#define DLAN_PRO_1200_AC_GPIO_BTN_RESET 4 -+#define DLAN_PRO_1200_AC_GPIO_DLAN_IND 17 -+#define DLAN_PRO_1200_AC_GPIO_DLAN_ERR_IND 16 -+ -+#define DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL) -+ -+#define DLAN_PRO_1200_AC_ART_ADDRESS 0x1fff0000 -+#define DLAN_PRO_1200_AC_CALDATA_OFFSET 0x1000 -+#define DLAN_PRO_1200_AC_WIFIMAC_OFFSET 0x1002 -+#define DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led dlan_pro_1200_ac_leds_gpio[] __initdata = { -+ { -+ .name = "devolo:status:wlan", -+ .gpio = DLAN_PRO_1200_AC_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "devolo:status:dlan", -+ .gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "devolo:error:dlan", -+ .gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button dlan_pro_1200_ac_gpio_keys[] __initdata = { -+ { -+ .desc = "dLAN button", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_DLAN, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WLAN button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = false, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+}; -+ -+static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad5_cfg = { -+ .mode = 0, -+ .txclk_delay_en = 0, -+ .rxclk_delay_en = 0, -+ .txclk_delay_sel = 0, -+ .rxclk_delay_sel = 0, -+}; -+ -+static struct ar8327_platform_data dlan_pro_1200_ac_ar8327_data = { -+ .pad0_cfg = &dlan_pro_1200_ac_ar8327_pad0_cfg, -+ .pad5_cfg = &dlan_pro_1200_ac_ar8327_pad5_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info dlan_pro_1200_ac_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &dlan_pro_1200_ac_ar8327_data, -+ }, -+}; -+ -+static void __init dlan_pro_1200_ac_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_1200_AC_ART_ADDRESS); -+ u8 *cal = art + DLAN_PRO_1200_AC_CALDATA_OFFSET; -+ u8 *wifi_mac = art + DLAN_PRO_1200_AC_WIFIMAC_OFFSET; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_1200_ac_leds_gpio), -+ dlan_pro_1200_ac_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dlan_pro_1200_ac_gpio_keys), -+ dlan_pro_1200_ac_gpio_keys); -+ -+ /* dLAN power must be enabled from user-space as soon as the boot-from-host daemon is running */ -+ gpio_request_one(DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, -+ "dLAN power"); -+ -+ /* WLAN power is turned on initially to allow the PCI bus scan to succeed */ -+ gpio_request_one(DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "WLAN power"); -+ -+ ath79_register_wmac(cal, wifi_mac); -+ ap91_pci_init(art + DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2); -+ -+ mdiobus_register_board_info(dlan_pro_1200_ac_mdio0_info, -+ ARRAY_SIZE(dlan_pro_1200_ac_mdio0_info)); -+ -+ /* GMAC0 is connected to an AR8337 */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x02000000; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DLAN_PRO_1200_AC, "dLAN-pro-1200-ac", "devolo dLAN pro 1200+ WiFi ac", -+ dlan_pro_1200_ac_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-500-wp.c linux-4.1.13/arch/mips/ath79/mach-dlan-pro-500-wp.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-500-wp.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dlan-pro-500-wp.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,203 @@ -+/* -+ * devolo dLAN pro 500 Wireless+ support -+ * -+ * Copyright (c) 2013-2015 devolo AG -+ * Copyright (c) 2011-2012 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE 13 -+#define DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE 17 -+#define DLAN_PRO_500_WP_GPIO_LED_WLAN_5G 11 -+#define DLAN_PRO_500_WP_GPIO_LED_WLAN_2G 12 -+#define DLAN_PRO_500_WP_GPIO_LED_STATUS 16 -+#define DLAN_PRO_500_WP_GPIO_LED_ETH 14 -+ -+#define DLAN_PRO_500_WP_GPIO_BTN_WPS 20 -+#define DLAN_PRO_500_WP_GPIO_BTN_WLAN 22 -+#define DLAN_PRO_500_WP_GPIO_BTN_DLAN 21 -+#define DLAN_PRO_500_WP_GPIO_BTN_RESET 4 -+ -+#define DLAN_PRO_500_WP_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_500_WP_KEYS_POLL_INTERVAL) -+ -+#define DLAN_PRO_500_WP_ART_ADDRESS 0x1fff0000 -+#define DLAN_PRO_500_WP_CALDATA_OFFSET 0x1000 -+#define DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET 0x1002 -+#define DLAN_PRO_500_WP_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led dlan_pro_500_wp_leds_gpio[] __initdata = { -+ { -+ .name = "devolo:green:status", -+ .gpio = DLAN_PRO_500_WP_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, -+ { -+ .name = "devolo:green:eth", -+ .gpio = DLAN_PRO_500_WP_GPIO_LED_ETH, -+ .active_low = 1, -+ }, -+ { -+ .name = "devolo:blue:wlan-5g", -+ .gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "devolo:green:wlan-2g", -+ .gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button dlan_pro_500_wp_gpio_keys[] __initdata = { -+ { -+ .desc = "dLAN button", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_DLAN, -+ .active_low = 0, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_WPS, -+ .active_low = 0, -+ }, -+ { -+ .desc = "WLAN button", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_WLAN, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DLAN_PRO_500_WP_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct ar8327_pad_cfg dlan_pro_500_wp_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_PHY_RGMII, -+ .txclk_delay_en = false, -+ .rxclk_delay_en = false, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+}; -+ -+static struct ar8327_led_cfg dlan_pro_500_wp_ar8327_led_cfg = { -+ .led_ctrl0 = 0x00000000, -+ .led_ctrl1 = 0xc737c737, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x00c30c00, -+ .open_drain = true, -+}; -+ -+static struct ar8327_platform_data dlan_pro_500_wp_ar8327_data = { -+ .pad0_cfg = &dlan_pro_500_wp_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 0, -+ .rxpause = 0, -+ }, -+ .led_cfg = &dlan_pro_500_wp_ar8327_led_cfg, -+}; -+ -+static struct mdio_board_info dlan_pro_500_wp_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &dlan_pro_500_wp_ar8327_data, -+ }, -+}; -+ -+static void __init dlan_pro_500_wp_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_500_WP_ART_ADDRESS); -+ u8 *cal = art + DLAN_PRO_500_WP_CALDATA_OFFSET; -+ u8 *wifi_mac = art + DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_500_wp_leds_gpio), -+ dlan_pro_500_wp_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, DLAN_PRO_500_WP_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dlan_pro_500_wp_gpio_keys), -+ dlan_pro_500_wp_gpio_keys); -+ -+ gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, -+ "PLC power"); -+ gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, -+ "PLC LEDs"); -+ -+ ath79_register_wmac(cal, wifi_mac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(dlan_pro_500_wp_mdio0_info, -+ ARRAY_SIZE(dlan_pro_500_wp_mdio0_info)); -+ -+ /* GMAC0 is connected to a AR7400 PLC in PHY mode */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_pll_data.pll_1000 = 0x0e000000; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DLAN_PRO_500_WP, "dLAN-pro-500-wp", "devolo dLAN pro 500 Wireless+", -+ dlan_pro_500_wp_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dragino2.c linux-4.1.13/arch/mips/ath79/mach-dragino2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-dragino2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-dragino2.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,136 @@ -+/* -+ * DRAGINO V2 board support, based on Atheros AP121 board support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2012 Elektra Wagenrad -+ * Copyright (C) 2014 Vittorio Gambaletta -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DRAGINO2_GPIO_LED_WLAN 0 -+#define DRAGINO2_GPIO_LED_LAN 13 -+#define DRAGINO2_GPIO_LED_WAN 17 -+ -+/* -+ * The following GPIO is named "SYS" on newer revisions of the the board. -+ * It was previously used to indicate USB activity, even though it was -+ * named "Router". -+ */ -+ -+#define DRAGINO2_GPIO_LED_SYS 28 -+#define DRAGINO2_GPIO_BTN_JUMPSTART 11 -+#define DRAGINO2_GPIO_BTN_RESET 12 -+ -+#define DRAGINO2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DRAGINO2_KEYS_DEBOUNCE_INTERVAL (3 * DRAGINO2_KEYS_POLL_INTERVAL) -+ -+#define DRAGINO2_MAC0_OFFSET 0x0000 -+#define DRAGINO2_MAC1_OFFSET 0x0006 -+#define DRAGINO2_CALDATA_OFFSET 0x1000 -+#define DRAGINO2_WMAC_MAC_OFFSET 0x1002 -+ -+static struct gpio_led dragino2_leds_gpio[] __initdata = { -+ { -+ .name = "dragino2:red:wlan", -+ .gpio = DRAGINO2_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "dragino2:red:wan", -+ .gpio = DRAGINO2_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "dragino2:red:lan", -+ .gpio = DRAGINO2_GPIO_LED_LAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "dragino2:red:system", -+ .gpio = DRAGINO2_GPIO_LED_SYS, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button dragino2_gpio_keys[] __initdata = { -+ { -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DRAGINO2_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+ { -+ .desc = "reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DRAGINO2_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init dragino2_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art + DRAGINO2_CALDATA_OFFSET, -+ art + DRAGINO2_WMAC_MAC_OFFSET); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + DRAGINO2_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + DRAGINO2_MAC1_OFFSET, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* Enable GPIO13, GPIO14, GPIO15, GPIO16 and GPIO17 */ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ /* LAN port */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ /* Enable GPIO26 and GPIO27 */ -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, -+ ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) | -+ AR933X_BOOTSTRAP_MDIO_GPIO_EN); -+} -+ -+static void __init dragino2_setup(void) -+{ -+ dragino2_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dragino2_leds_gpio), -+ dragino2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, DRAGINO2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dragino2_gpio_keys), -+ dragino2_gpio_keys); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_DRAGINO2, "DRAGINO2", "Dragino Dragino v2", -+ dragino2_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-eap300v2.c linux-4.1.13/arch/mips/ath79/mach-eap300v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-eap300v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-eap300v2.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,101 @@ -+/* -+ * EnGenius EAP300 v2 board support -+ * -+ * Copyright (C) 2014 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define EAP300V2_GPIO_LED_POWER 0 -+#define EAP300V2_GPIO_LED_LAN 16 -+#define EAP300V2_GPIO_LED_WLAN 17 -+ -+#define EAP300V2_GPIO_BTN_RESET 1 -+ -+#define EAP300V2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define EAP300V2_KEYS_DEBOUNCE_INTERVAL (3 * EAP300V2_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led eap300v2_leds_gpio[] __initdata = { -+ { -+ .name = "engenius:blue:power", -+ .gpio = EAP300V2_GPIO_LED_POWER, -+ .active_low = 1, -+ }, { -+ .name = "engenius:blue:lan", -+ .gpio = EAP300V2_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "engenius:blue:wlan", -+ .gpio = EAP300V2_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button eap300v2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = EAP300V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EAP300V2_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+#define EAP300V2_ART_MAC_OFFSET 2 -+ -+#define EAP300V2_LAN_PHYMASK BIT(0) -+ -+static void __init eap300v2_setup(void) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff1000); -+ -+ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); -+ -+ ath79_gpio_output_select(EAP300V2_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(EAP300V2_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(EAP300V2_GPIO_LED_WLAN, AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(eap300v2_leds_gpio), -+ eap300v2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, EAP300V2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(eap300v2_gpio_keys), -+ eap300v2_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art, NULL); -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + EAP300V2_ART_MAC_OFFSET, 0); -+ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = EAP300V2_LAN_PHYMASK; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = EAP300V2_LAN_PHYMASK; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_EAP300V2, "EAP300V2", "EnGenius EAP300 v2", -+ eap300v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-eap7660d.c linux-4.1.13/arch/mips/ath79/mach-eap7660d.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-eap7660d.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-eap7660d.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,181 @@ -+/* -+ * Senao EAP7660D board support -+ * -+ * Copyright (C) 2010 Daniel Golle -+ * Copyright (C) 2008 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL) -+ -+#define EAP7660D_GPIO_DS4 7 -+#define EAP7660D_GPIO_DS5 2 -+#define EAP7660D_GPIO_DS7 0 -+#define EAP7660D_GPIO_DS8 4 -+#define EAP7660D_GPIO_SW1 3 -+#define EAP7660D_GPIO_SW3 8 -+#define EAP7660D_PHYMASK BIT(20) -+#define EAP7660D_BOARDCONFIG 0x1F7F0000 -+#define EAP7660D_GBIC_MAC_OFFSET 0x1000 -+#define EAP7660D_WMAC0_MAC_OFFSET 0x1010 -+#define EAP7660D_WMAC1_MAC_OFFSET 0x1016 -+#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000 -+#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000 -+ -+#ifdef CONFIG_PCI -+static struct ath5k_platform_data eap7660d_wmac0_data; -+static struct ath5k_platform_data eap7660d_wmac1_data; -+static char eap7660d_wmac0_mac[6]; -+static char eap7660d_wmac1_mac[6]; -+static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; -+static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; -+ -+static int eap7660d_pci_plat_dev_init(struct pci_dev *dev) -+{ -+ switch (PCI_SLOT(dev->devfn)) { -+ case 17: -+ dev->dev.platform_data = &eap7660d_wmac0_data; -+ break; -+ -+ case 18: -+ dev->dev.platform_data = &eap7660d_wmac1_data; -+ break; -+ } -+ -+ return 0; -+} -+ -+void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, -+ u8 *cal_data1, u8 *mac_addr1) -+{ -+ if (cal_data0 && *cal_data0 == 0xa55a) { -+ memcpy(eap7660d_wmac0_eeprom, cal_data0, -+ ATH5K_PLAT_EEP_MAX_WORDS); -+ eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom; -+ } -+ -+ if (cal_data1 && *cal_data1 == 0xa55a) { -+ memcpy(eap7660d_wmac1_eeprom, cal_data1, -+ ATH5K_PLAT_EEP_MAX_WORDS); -+ eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom; -+ } -+ -+ if (mac_addr0) { -+ memcpy(eap7660d_wmac0_mac, mac_addr0, -+ sizeof(eap7660d_wmac0_mac)); -+ eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; -+ } -+ -+ if (mac_addr1) { -+ memcpy(eap7660d_wmac1_mac, mac_addr1, -+ sizeof(eap7660d_wmac1_mac)); -+ eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; -+ } -+ -+ ath79_pci_set_plat_dev_init(eap7660d_pci_plat_dev_init); -+ ath79_register_pci(); -+} -+#else -+static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, -+ u8 *cal_data1, u8 *mac_addr1) -+{ -+} -+#endif /* CONFIG_PCI */ -+ -+static struct gpio_led eap7660d_leds_gpio[] __initdata = { -+ { -+ .name = "eap7660d:green:ds8", -+ .gpio = EAP7660D_GPIO_DS8, -+ .active_low = 0, -+ }, -+ { -+ .name = "eap7660d:green:ds5", -+ .gpio = EAP7660D_GPIO_DS5, -+ .active_low = 0, -+ }, -+ { -+ .name = "eap7660d:green:ds7", -+ .gpio = EAP7660D_GPIO_DS7, -+ .active_low = 0, -+ }, -+ { -+ .name = "eap7660d:green:ds4", -+ .gpio = EAP7660D_GPIO_DS4, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EAP7660D_GPIO_SW1, -+ .active_low = 1, -+ }, -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EAP7660D_GPIO_SW3, -+ .active_low = 1, -+ } -+}; -+ -+static const char *eap7660d_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data eap7660d_flash_data = { -+ .part_probes = eap7660d_part_probes, -+}; -+ -+static void __init eap7660d_setup(void) -+{ -+ u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); -+ -+ ath79_register_mdio(0, ~EAP7660D_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = EAP7660D_PHYMASK; -+ ath79_register_eth(0); -+ ath79_register_m25p80(&eap7660d_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio), -+ eap7660d_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(eap7660d_gpio_keys), -+ eap7660d_gpio_keys); -+ eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET, -+ boardconfig + EAP7660D_WMAC0_MAC_OFFSET, -+ boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET, -+ boardconfig + EAP7660D_WMAC1_MAC_OFFSET); -+}; -+ -+MIPS_MACHINE(ATH79_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D", -+ eap7660d_setup); -+ -+MIPS_MACHINE(ATH79_MACH_ALL0305, "ALL0305", "Allnet ALL0305", -+ eap7660d_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-el-m150.c linux-4.1.13/arch/mips/ath79/mach-el-m150.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-el-m150.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-el-m150.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,112 @@ -+/* -+ * Easy-Link EL-M150 board support -+ * -+ * Copyright (C) 2012 huangfc -+ * Copyright (C) 2012 HYS <550663898@qq.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "dev-usb.h" -+ -+#define EL_M150_GPIO_BTN6 6 -+#define EL_M150_GPIO_BTN7 7 -+#define EL_M150_GPIO_BTN_RESET 11 -+ -+#define EL_M150_GPIO_LED_SYSTEM 27 -+#define EL_M150_GPIO_USB_POWER 8 -+ -+#define EL_M150_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define EL_M150_KEYS_DEBOUNCE_INTERVAL (3 * EL_M150_KEYS_POLL_INTERVAL) -+ -+static const char *EL_M150_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data EL_M150_flash_data = { -+ .part_probes = EL_M150_part_probes, -+}; -+ -+static struct gpio_led EL_M150_leds_gpio[] __initdata = { -+ { -+ .name = "easylink:green:system", -+ .gpio = EL_M150_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button EL_M150_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EL_M150_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "BTN_6", -+ .type = EV_KEY, -+ .code = BTN_6, -+ .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EL_M150_GPIO_BTN6, -+ .active_low = 1, -+ }, -+ { -+ .desc = "BTN_7", -+ .type = EV_KEY, -+ .code = BTN_7, -+ .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EL_M150_GPIO_BTN7, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init el_m150_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(EL_M150_leds_gpio), -+ EL_M150_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, EL_M150_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(EL_M150_gpio_keys), -+ EL_M150_gpio_keys); -+ -+ gpio_request_one(EL_M150_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&EL_M150_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_EL_M150, "EL-M150", -+ "EasyLink EL-M150", el_m150_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-el-mini.c linux-4.1.13/arch/mips/ath79/mach-el-mini.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-el-mini.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-el-mini.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,86 @@ -+/* -+ * Easy-Link EL-MINI board support -+ * -+ * Copyright (C) 2012 huangfc -+ * Copyright (C) 2011 hys <550663898@qq.com> -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define MINI_GPIO_LED_SYSTEM 27 -+#define MINI_GPIO_BTN_RESET 11 -+ -+#define MINI_GPIO_USB_POWER 8 -+ -+#define MINI_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MINI_KEYS_DEBOUNCE_INTERVAL (3 * MINI_KEYS_POLL_INTERVAL) -+ -+static const char *mini_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data mini_flash_data = { -+ .part_probes = mini_part_probes, -+}; -+ -+static struct gpio_led mini_leds_gpio[] __initdata = { -+ { -+ .name = "easylink:green:system", -+ .gpio = MINI_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mini_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MINI_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MINI_GPIO_BTN_RESET, -+ .active_low = 0, -+ } -+}; -+ -+static void __init el_mini_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&mini_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mini_leds_gpio), -+ mini_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, MINI_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mini_gpio_keys), -+ mini_gpio_keys); -+ -+ gpio_request_one(MINI_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_EL_MINI, "EL-MINI", "EasyLink EL-MINI", -+ el_mini_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-epg5000.c linux-4.1.13/arch/mips/ath79/mach-epg5000.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-epg5000.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-epg5000.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,178 @@ -+/* -+ * EnGenius EPG5000 board support -+ * -+ * Copyright (c) 2014 Jon Suphammer -+ * Copyright (c) 2015 Christian Beier -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define EPG5000_GPIO_LED_WLAN_5G 23 -+#define EPG5000_GPIO_LED_WLAN_2G 13 -+#define EPG5000_GPIO_LED_POWER_AMBER 2 -+#define EPG5000_GPIO_LED_WPS_AMBER 22 -+#define EPG5000_GPIO_LED_WPS_BLUE 19 -+ -+#define EPG5000_GPIO_BTN_WPS 16 -+#define EPG5000_GPIO_BTN_RESET 17 -+ -+#define EPG5000_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define EPG5000_KEYS_DEBOUNCE_INTERVAL (3 * EPG5000_KEYS_POLL_INTERVAL) -+ -+#define EPG5000_CALDATA_ADDR 0x1fff0000 -+#define EPG5000_WMAC_CALDATA_OFFSET 0x1000 -+#define EPG5000_PCIE_CALDATA_OFFSET 0x5000 -+ -+#define EPG5000_NVRAM_ADDR 0x1f030000 -+#define EPG5000_NVRAM_SIZE 0x10000 -+ -+static struct gpio_led epg5000_leds_gpio[] __initdata = { -+ { -+ .name = "epg5000:amber:power", -+ .gpio = EPG5000_GPIO_LED_POWER_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "epg5000:blue:wps", -+ .gpio = EPG5000_GPIO_LED_WPS_BLUE, -+ .active_low = 1, -+ }, -+ { -+ .name = "epg5000:amber:wps", -+ .gpio = EPG5000_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "epg5000:blue:wlan-2g", -+ .gpio = EPG5000_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "epg5000:blue:wlan-5g", -+ .gpio = EPG5000_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button epg5000_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EPG5000_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = EPG5000_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+ .mac06_exchange_en = true, -+}; -+ -+static struct ar8327_platform_data epg5000_ar8327_data = { -+ .pad0_cfg = &epg5000_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info epg5000_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &epg5000_ar8327_data, -+ }, -+}; -+ -+static int epg5000_get_mac(const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(EPG5000_NVRAM_ADDR); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, EPG5000_NVRAM_SIZE, -+ name, mac); -+ if (err) { -+ pr_err("no MAC address found for %s\n", name); -+ return false; -+ } -+ -+ return true; -+} -+ -+static void __init epg5000_setup(void) -+{ -+ u8 *caldata = (u8 *) KSEG1ADDR(EPG5000_CALDATA_ADDR); -+ u8 mac1[ETH_ALEN]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(epg5000_leds_gpio), -+ epg5000_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, EPG5000_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(epg5000_gpio_keys), -+ epg5000_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(epg5000_mdio0_info, -+ ARRAY_SIZE(epg5000_mdio0_info)); -+ -+ /* GMAC0 is connected to an QCA8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ if (epg5000_get_mac("ethaddr=", mac1)) -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(caldata + EPG5000_WMAC_CALDATA_OFFSET, mac1); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_EPG5000, "EPG5000", -+ "EnGenius EPG5000", -+ epg5000_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-esr1750.c linux-4.1.13/arch/mips/ath79/mach-esr1750.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-esr1750.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-esr1750.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,177 @@ -+/* -+ * EnGenius ESR1750 board support -+ * -+ * Copyright (c) 2014 Jon Suphammer -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define ESR1750_GPIO_LED_WLAN_5G 23 -+#define ESR1750_GPIO_LED_WLAN_2G 13 -+#define ESR1750_GPIO_LED_POWER_AMBER 2 -+#define ESR1750_GPIO_LED_WPS_AMBER 22 -+#define ESR1750_GPIO_LED_WPS_BLUE 19 -+ -+#define ESR1750_GPIO_BTN_WPS 16 -+#define ESR1750_GPIO_BTN_RESET 17 -+ -+#define ESR1750_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ESR1750_KEYS_DEBOUNCE_INTERVAL (3 * ESR1750_KEYS_POLL_INTERVAL) -+ -+#define ESR1750_CALDATA_ADDR 0x1fff0000 -+#define ESR1750_WMAC_CALDATA_OFFSET 0x1000 -+#define ESR1750_PCIE_CALDATA_OFFSET 0x5000 -+ -+#define ESR1750_NVRAM_ADDR 0x1f030000 -+#define ESR1750_NVRAM_SIZE 0x10000 -+ -+static struct gpio_led esr1750_leds_gpio[] __initdata = { -+ { -+ .name = "esr1750:amber:power", -+ .gpio = ESR1750_GPIO_LED_POWER_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "esr1750:blue:wps", -+ .gpio = ESR1750_GPIO_LED_WPS_BLUE, -+ .active_low = 1, -+ }, -+ { -+ .name = "esr1750:amber:wps", -+ .gpio = ESR1750_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "esr1750:blue:wlan-2g", -+ .gpio = ESR1750_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "esr1750:blue:wlan-5g", -+ .gpio = ESR1750_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button esr1750_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ESR1750_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ESR1750_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+ .mac06_exchange_en = true, -+}; -+ -+static struct ar8327_platform_data esr1750_ar8327_data = { -+ .pad0_cfg = &esr1750_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info esr1750_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &esr1750_ar8327_data, -+ }, -+}; -+ -+static int esr1750_get_mac(const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(ESR1750_NVRAM_ADDR); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, ESR1750_NVRAM_SIZE, -+ name, mac); -+ if (err) { -+ pr_err("no MAC address found for %s\n", name); -+ return false; -+ } -+ -+ return true; -+} -+ -+static void __init esr1750_setup(void) -+{ -+ u8 *caldata = (u8 *) KSEG1ADDR(ESR1750_CALDATA_ADDR); -+ u8 mac1[ETH_ALEN]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(esr1750_leds_gpio), -+ esr1750_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, ESR1750_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(esr1750_gpio_keys), -+ esr1750_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(esr1750_mdio0_info, -+ ARRAY_SIZE(esr1750_mdio0_info)); -+ -+ /* GMAC0 is connected to an QCA8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ if (esr1750_get_mac("ethaddr=", mac1)) -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(caldata + ESR1750_WMAC_CALDATA_OFFSET, mac1); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ESR1750, "ESR1750", -+ "EnGenius ESR1750", -+ esr1750_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-esr900.c linux-4.1.13/arch/mips/ath79/mach-esr900.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-esr900.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-esr900.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,200 @@ -+/* -+ * EnGenius ESR900 board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) "esr900: " fmt -+ -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define ESR900_GPIO_LED_POWER 2 -+#define ESR900_GPIO_LED_WLAN_2G 13 -+#define ESR900_GPIO_LED_WPS_BLUE 19 -+#define ESR900_GPIO_LED_WPS_AMBER 22 -+#define ESR900_GPIO_LED_WLAN_5G 23 -+ -+#define ESR900_GPIO_BTN_WPS 16 -+#define ESR900_GPIO_BTN_RESET 17 -+ -+#define ESR900_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ESR900_KEYS_DEBOUNCE_INTERVAL (3 * ESR900_KEYS_POLL_INTERVAL) -+ -+#define ESR900_CALDATA_ADDR 0x1fff0000 -+#define ESR900_WMAC_CALDATA_OFFSET 0x1000 -+#define ESR900_PCIE_CALDATA_OFFSET 0x5000 -+ -+#define ESR900_CONFIG_ADDR 0x1f030000 -+#define ESR900_CONFIG_SIZE 0x10000 -+ -+#define ESR900_LAN_PHYMASK BIT(0) -+#define ESR900_WAN_PHYMASK BIT(5) -+#define ESR900_MDIO_MASK (~(ESR900_LAN_PHYMASK | ESR900_WAN_PHYMASK)) -+ -+static struct gpio_led esr900_leds_gpio[] __initdata = { -+ { -+ .name = "engenius:amber:power", -+ .gpio = ESR900_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "engenius:blue:wlan-2g", -+ .gpio = ESR900_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "engenius:blue:wps", -+ .gpio = ESR900_GPIO_LED_WPS_BLUE, -+ .active_low = 1, -+ }, -+ { -+ .name = "engenius:amber:wps", -+ .gpio = ESR900_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "engenius:blue:wlan-5g", -+ .gpio = ESR900_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button esr900_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ESR900_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ESR900_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg esr900_ar8327_pad0_cfg = { -+ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_pad_cfg esr900_ar8327_pad6_cfg = { -+ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ -+ .mode = AR8327_PAD_MAC_SGMII, -+ .rxclk_delay_en = true, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+}; -+ -+static struct ar8327_platform_data esr900_ar8327_data = { -+ .pad0_cfg = &esr900_ar8327_pad0_cfg, -+ .pad6_cfg = &esr900_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info esr900_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &esr900_ar8327_data, -+ }, -+}; -+ -+static void __init esr900_setup(void) -+{ -+ const char *config = (char *) KSEG1ADDR(ESR900_CONFIG_ADDR); -+ u8 *art = (u8 *) KSEG1ADDR(ESR900_CALDATA_ADDR); -+ u8 lan_mac[ETH_ALEN]; -+ u8 wlan0_mac[ETH_ALEN]; -+ u8 wlan1_mac[ETH_ALEN]; -+ -+ if (ath79_nvram_parse_mac_addr(config, ESR900_CONFIG_SIZE, -+ "ethaddr=", lan_mac) == 0) { -+ ath79_init_local_mac(ath79_eth0_data.mac_addr, lan_mac); -+ ath79_init_mac(wlan0_mac, lan_mac, 0); -+ ath79_init_mac(wlan1_mac, lan_mac, 1); -+ } else { -+ pr_err("could not find ethaddr in u-boot environment\n"); -+ } -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(esr900_leds_gpio), -+ esr900_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, ESR900_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(esr900_gpio_keys), -+ esr900_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(esr900_mdio0_info, -+ ARRAY_SIZE(esr900_mdio0_info)); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = ESR900_LAN_PHYMASK; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ ath79_register_eth(1); -+ -+ ap91_pci_init(art + ESR900_PCIE_CALDATA_OFFSET, wlan1_mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ESR900, "ESR900", "EnGenius ESR900", esr900_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ew-dorin.c linux-4.1.13/arch/mips/ath79/mach-ew-dorin.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ew-dorin.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ew-dorin.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,150 @@ -+/* -+ * EW Dorin board support -+ * (based on Atheros Ref. Design AP121) -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2012-2015 Embedded Wireless GmbH www.80211.de -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DORIN_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DORIN_KEYS_DEBOUNCE_INTERVAL (3 * DORIN_KEYS_POLL_INTERVAL) -+ -+#define DORIN_CALDATA_OFFSET 0x1000 -+#define DORIN_WMAC_MAC_OFFSET 0x1002 -+ -+#define DORIN_GPIO_LED_21 21 -+#define DORIN_GPIO_LED_22 22 -+#define DORIN_GPIO_LED_STATUS 23 -+ -+#define DORIN_GPIO_BTN_JUMPSTART 11 -+#define DORIN_GPIO_BTN_RESET 6 -+ -+static struct gpio_led dorin_leds_gpio[] __initdata = { -+ { -+ .name = "dorin:green:led21", -+ .gpio = DORIN_GPIO_LED_21, -+ .active_low = 1, -+ }, -+ { -+ .name = "dorin:green:led22", -+ .gpio = DORIN_GPIO_LED_22, -+ .active_low = 1, -+ }, -+ { -+ .name = "dorin:green:status", -+ .gpio = DORIN_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button dorin_gpio_keys[] __initdata = { -+ { -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DORIN_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+ { -+ .desc = "reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DORIN_GPIO_BTN_RESET, -+ .active_low = 0, -+ } -+}; -+ -+static void __init ew_dorin_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ static u8 mac[6]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_usb(); -+ -+ if (ar93xx_wmac_read_mac_address(mac)) { -+ ath79_register_wmac(NULL, NULL); -+ } else { -+ ath79_register_wmac(art + DORIN_CALDATA_OFFSET, -+ art + DORIN_WMAC_MAC_OFFSET); -+ memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac)); -+ } -+ -+ mac[3] |= 0x40; -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio), -+ dorin_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dorin_gpio_keys), -+ dorin_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_EW_DORIN, "EW-DORIN", "EmbWir-Dorin", -+ ew_dorin_setup); -+ -+ -+static void __init ew_dorin_router_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ static u8 mac[6]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_usb(); -+ -+ if (ar93xx_wmac_read_mac_address(mac)) { -+ ath79_register_wmac(NULL, NULL); -+ } else { -+ ath79_register_wmac(art + DORIN_CALDATA_OFFSET, -+ art + DORIN_WMAC_MAC_OFFSET); -+ memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac)); -+ } -+ -+ mac[3] |= 0x40; -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ -+ mac[3] &= 0x3F; -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_setup_ar933x_phy4_switch(true, true); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio), -+ dorin_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(dorin_gpio_keys), -+ dorin_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_EW_DORIN_ROUTER, "EW-DORIN-ROUTER", -+ "EmbWir-Dorin-Router", ew_dorin_router_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-f9k1115v2.c linux-4.1.13/arch/mips/ath79/mach-f9k1115v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-f9k1115v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-f9k1115v2.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,190 @@ -+/* -+ * Belkin AC1750DB (F9K1115V2) board support -+ * -+ * Copyright (C) 2014 Gabor Juhos -+ * Copyright (C) 2014 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define F9K1115V2_GPIO_LED_USB2 4 -+#define F9K1115V2_GPIO_LED_WPS_AMBER 14 -+#define F9K1115V2_GPIO_LED_STATUS_AMBER 15 -+#define F9K1115V2_GPIO_LED_WPS_BLUE 19 -+#define F9K1115V2_GPIO_LED_STATUS_BLUE 20 -+ -+#define F9K1115V2_GPIO_BTN_WPS 16 -+#define F9K1115V2_GPIO_BTN_RESET 17 -+ -+#define F9K1115V2_GPIO_USB2_POWER 21 -+ -+#define F9K1115V2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define F9K1115V2_KEYS_DEBOUNCE_INTERVAL (3 * F9K1115V2_KEYS_POLL_INTERVAL) -+ -+#define F9K1115V2_WAN_MAC_OFFSET 0 -+#define F9K1115V2_LAN_MAC_OFFSET 6 -+#define F9K1115V2_WMAC_CALDATA_OFFSET 0x1000 -+#define F9K1115V2_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led f9k1115v2_leds_gpio[] __initdata = { -+ { -+ .name = "belkin:amber:status", -+ .gpio = F9K1115V2_GPIO_LED_STATUS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "belkin:blue:status", -+ .gpio = F9K1115V2_GPIO_LED_STATUS_BLUE, -+ .active_low = 1, -+ }, -+ { -+ .name = "belkin:blue:wps", -+ .gpio = F9K1115V2_GPIO_LED_WPS_BLUE, -+ .active_low = 1, -+ }, -+ { -+ .name = "belkin:amber:wps", -+ .gpio = F9K1115V2_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "belkin:green:usb2", -+ .gpio = F9K1115V2_GPIO_LED_USB2, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button f9k1115v2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = F9K1115V2_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = F9K1115V2_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg f9k1115v2_ar8327_pad0_cfg = { -+ /* Use the RGMII interface for the GMAC0 of the AR8337 switch */ -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+ .mac06_exchange_en = true, -+}; -+ -+static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = { -+ /* Use the SGMII interface for the GMAC6 of the AR8337 switch */ -+ .mode = AR8327_PAD_MAC_SGMII, -+ .rxclk_delay_en = true, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+}; -+ -+static struct ar8327_platform_data f9k1115v2_ar8327_data = { -+ .pad0_cfg = &f9k1115v2_ar8327_pad0_cfg, -+ .pad6_cfg = &f9k1115v2_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info f9k1115v2_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &f9k1115v2_ar8327_data, -+ }, -+}; -+ -+static void __init f9k1115v2_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(f9k1115v2_leds_gpio), -+ f9k1115v2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, F9K1115V2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(f9k1115v2_gpio_keys), -+ f9k1115v2_gpio_keys); -+ -+ ath79_register_wmac(art + F9K1115V2_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_register_mdio(0, 0x0); -+ mdiobus_register_board_info(f9k1115v2_mdio0_info, -+ ARRAY_SIZE(f9k1115v2_mdio0_info)); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + F9K1115V2_WAN_MAC_OFFSET, 0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, -+ art + F9K1115V2_LAN_MAC_OFFSET, 0); -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_pci(); -+ -+ ath79_register_usb(); -+ gpio_request_one(F9K1115V2_GPIO_USB2_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB2 power"); -+} -+ -+MIPS_MACHINE(ATH79_MACH_F9K1115V2, "F9K1115V2", "Belkin AC1750DB", -+ f9k1115v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar150.c linux-4.1.13/arch/mips/ath79/mach-gl-ar150.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar150.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-gl-ar150.c 2015-12-04 18:27:35.461807609 +0100 -@@ -0,0 +1,125 @@ -+/* -+ * GL_ar150 board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2013 alzhao -+ * Copyright (C) 2014 Michel Stempin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+*/ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define GL_AR150_GPIO_LED_WLAN 0 -+#define GL_AR150_GPIO_LED_LAN 13 -+#define GL_AR150_GPIO_LED_WAN 15 -+ -+#define GL_AR150_GPIO_BIN_USB 6 -+#define GL_AR150_GPIO_BTN_MANUAL 7 -+#define GL_AR150_GPIO_BTN_AUTO 8 -+#define GL_AR150_GPIO_BTN_RESET 11 -+ -+#define GL_AR150_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define GL_AR150_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR150_KEYS_POLL_INTERVAL) -+ -+#define GL_AR150_MAC0_OFFSET 0x0000 -+#define GL_AR150_MAC1_OFFSET 0x0000 -+#define GL_AR150_CALDATA_OFFSET 0x1000 -+#define GL_AR150_WMAC_MAC_OFFSET 0x0000 -+ -+static struct gpio_led gl_ar150_leds_gpio[] __initdata = { -+ { -+ .name = "gl_ar150:wlan", -+ .gpio = GL_AR150_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "gl_ar150:lan", -+ .gpio = GL_AR150_GPIO_LED_LAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "gl_ar150:wan", -+ .gpio = GL_AR150_GPIO_LED_WAN, -+ .active_low = 0, -+ .default_state = 1, -+ }, -+}; -+ -+static struct gpio_keys_button gl_ar150_gpio_keys[] __initdata = { -+ { -+ .desc = "BTN_7", -+ .type = EV_KEY, -+ .code = BTN_7, -+ .debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GL_AR150_GPIO_BTN_MANUAL, -+ .active_low = 0, -+ }, -+ { -+ .desc = "BTN_8", -+ .type = EV_KEY, -+ .code = BTN_8, -+ .debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GL_AR150_GPIO_BTN_AUTO, -+ .active_low = 0, -+ }, -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GL_AR150_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init gl_ar150_setup(void) -+{ -+ -+ /* ART base address */ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ /* register flash. */ -+ ath79_register_m25p80(NULL); -+ -+ /* register gpio LEDs and keys */ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar150_leds_gpio), -+ gl_ar150_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, GL_AR150_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(gl_ar150_gpio_keys), -+ gl_ar150_gpio_keys); -+ -+ /* enable usb */ -+ gpio_request_one(GL_AR150_GPIO_BIN_USB, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ /* register eth0 as WAN, eth1 as LAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_AR150_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_AR150_MAC1_OFFSET, 0); -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ /* register wireless mac with cal data */ -+ ath79_register_wmac(art + GL_AR150_CALDATA_OFFSET, art + GL_AR150_WMAC_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_GL_AR150, "GL-AR150", "GL AR150",gl_ar150_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar300.c linux-4.1.13/arch/mips/ath79/mach-gl-ar300.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar300.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-gl-ar300.c 2015-12-04 18:27:35.461807609 +0100 -@@ -0,0 +1,103 @@ -+/* -+ * Domino board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2013 alzhao -+ * Copyright (C) 2014 Michel Stempin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+*/ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define GL_AR300_GPIO_LED_WLAN 13 -+#define GL_AR300_GPIO_LED_WAN 14 -+#define GL_AR300_GPIO_BTN_RESET 16 -+ -+ -+#define GL_AR300_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define GL_AR300_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR300_KEYS_POLL_INTERVAL) -+ -+#define GL_AR300_MAC0_OFFSET 0x0000 -+#define GL_AR300_MAC1_OFFSET 0x0000 -+#define GL_AR300_CALDATA_OFFSET 0x1000 -+#define GL_AR300_WMAC_MAC_OFFSET 0x0000 -+ -+static struct gpio_led gl_ar300_leds_gpio[] __initdata = { -+ { -+ .name = "gl_ar300:wlan", -+ .gpio = GL_AR300_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "gl_ar300:wan", -+ .gpio = GL_AR300_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button gl_ar300_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = GL_AR300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GL_AR300_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init gl_ar300_setup(void) -+{ -+ -+ /* ART base address */ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ /* register flash. */ -+ ath79_register_m25p80(NULL); -+ -+ /* register gpio LEDs and keys */ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300_leds_gpio), -+ gl_ar300_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, GL_AR300_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(gl_ar300_gpio_keys), -+ gl_ar300_gpio_keys); -+ -+ /* enable usb */ -+ ath79_register_usb(); -+ ath79_register_mdio(1, 0x0); -+ -+ /* register eth0 as WAN, eth1 as LAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_AR300_MAC0_OFFSET, 0); -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_AR300_MAC1_OFFSET, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ /* register wireless mac with cal data */ -+ ath79_register_wmac(art + GL_AR300_CALDATA_OFFSET, art + GL_AR300_WMAC_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_GL_AR300, "GL-AR300", "GL AR300",gl_ar300_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-domino.c linux-4.1.13/arch/mips/ath79/mach-gl-domino.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-gl-domino.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-gl-domino.c 2015-12-04 18:27:35.461807609 +0100 -@@ -0,0 +1,136 @@ -+/* -+ * Domino board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2013 alzhao -+ * Copyright (C) 2014 Michel Stempin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+*/ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define DOMINO_GPIO_LED_WLAN 0 -+#define DOMINO_GPIO_LED_WAN 17 -+#define DOMINO_GPIO_LED_USB 1 -+#define DOMINO_GPIO_LED_LAN1 13 -+#define DOMINO_GPIO_LED_LAN2 14 -+#define DOMINO_GPIO_LED_LAN3 15 -+#define DOMINO_GPIO_LED_LAN4 16 -+#define DOMINO_GPIO_LED_SYS 27 -+#define DOMINO_GPIO_LED_WPS 26 -+#define DOMINO_GPIO_USB_POWER 6 -+ -+#define DOMINO_GPIO_BTN_RESET 11 -+#define DOMINO_GPIO_BTN_WPS 20 -+ -+#define DOMINO_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define DOMINO_KEYS_DEBOUNCE_INTERVAL (3 * DOMINO_KEYS_POLL_INTERVAL) -+ -+#define DOMINO_MAC0_OFFSET 0x0000 -+#define DOMINO_MAC1_OFFSET 0x0000 -+#define DOMINO_CALDATA_OFFSET 0x1000 -+#define DOMINO_WMAC_MAC_OFFSET 0x0000 -+ -+static struct gpio_led domino_leds_gpio[] __initdata = { -+ { -+ .name = "domino:blue:wlan", -+ .gpio = DOMINO_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "domino:red:wan", -+ .gpio = DOMINO_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "domino:white:usb", -+ .gpio = DOMINO_GPIO_LED_USB, -+ .active_low = 0, -+ }, -+ { -+ .name = "domino:green:lan1", -+ .gpio = DOMINO_GPIO_LED_LAN1, -+ .active_low = 0, -+ }, -+ { -+ .name = "domino:yellow:wps", -+ .gpio = DOMINO_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "domino:orange:sys", -+ .gpio = DOMINO_GPIO_LED_SYS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button domino_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = DOMINO_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DOMINO_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = DOMINO_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = DOMINO_GPIO_BTN_WPS, -+ .active_low = 0, -+ } -+}; -+ -+static void __init domino_setup(void) -+{ -+ -+ /* ART base address */ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ /* register flash. */ -+ ath79_register_m25p80(NULL); -+ -+ /* register gpio LEDs and keys */ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(domino_leds_gpio), -+ domino_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, DOMINO_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(domino_gpio_keys), -+ domino_gpio_keys); -+ -+ gpio_request_one(DOMINO_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ /* enable usb */ -+ ath79_register_usb(); -+ -+ /* register eth0 as WAN, eth1 as LAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art+DOMINO_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art+DOMINO_MAC1_OFFSET, 0); -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ /* register wireless mac with cal data */ -+ ath79_register_wmac(art + DOMINO_CALDATA_OFFSET, art + DOMINO_WMAC_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_GL_DOMINO, "DOMINO", "Domino Pi", domino_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-inet.c linux-4.1.13/arch/mips/ath79/mach-gl-inet.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-gl-inet.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-gl-inet.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,104 @@ -+/* -+ * GL-CONNECT iNet board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2013 alzhao -+ * Copyright (C) 2014 Michel Stempin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define GL_INET_GPIO_LED_WLAN 0 -+#define GL_INET_GPIO_LED_LAN 13 -+#define GL_INET_GPIO_BTN_RESET 11 -+ -+#define GL_INET_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define GL_INET_KEYS_DEBOUNCE_INTERVAL (3 * GL_INET_KEYS_POLL_INTERVAL) -+ -+static const char * gl_inet_part_probes[] = { -+ "tp-link", /* dont change, this will use tplink parser */ -+ NULL , -+}; -+ -+static struct flash_platform_data gl_inet_flash_data = { -+ .part_probes = gl_inet_part_probes, -+}; -+ -+static struct gpio_led gl_inet_leds_gpio[] __initdata = { -+ { -+ .name = "gl-connect:red:wlan", -+ .gpio = GL_INET_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "gl-connect:green:lan", -+ .gpio = GL_INET_GPIO_LED_LAN, -+ .active_low = 0, -+ .default_state = 1, -+ }, -+}; -+ -+static struct gpio_keys_button gl_inet_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = GL_INET_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GL_INET_GPIO_BTN_RESET, -+ .active_low = 0, -+ } -+}; -+ -+static void __init gl_inet_setup(void) -+{ -+ /* get the mac address which is stored in the 1st 64k uboot MTD */ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ -+ /* get the art address, which is the last 64K. By using -+ 0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */ -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ /* register flash. MTD will use tp-link parser to parser MTD */ -+ ath79_register_m25p80(&gl_inet_flash_data); -+ -+ /* register gpio LEDs and keys */ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio), -+ gl_inet_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(gl_inet_gpio_keys), -+ gl_inet_gpio_keys); -+ -+ /* enable usb */ -+ ath79_register_usb(); -+ -+ /* register eth0 as WAN, eth1 as LAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_eth(1); -+ -+ /* register wireless mac with cal data */ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_GL_INET, "GL-INET", "GL-CONNECT INET v1", -+ gl_inet_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gs-minibox-v1.c linux-4.1.13/arch/mips/ath79/mach-gs-minibox-v1.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-gs-minibox-v1.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-gs-minibox-v1.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,85 @@ -+/* -+ * Gainstrong MiniBox V1.0 board support -+ * -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define GS_MINIBOX_V1_GPIO_BTN_RESET 11 -+ -+#define GS_MINIBOX_V1_GPIO_LED_SYSTEM 1 -+ -+#define GS_MINIBOX_V1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define GS_MINIBOX_V1_KEYS_DEBOUNCE_INTERVAL (3 * GS_MINIBOX_V1_KEYS_POLL_INTERVAL) -+ -+static const char *gs_minibox_v1_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data gs_minibox_v1_flash_data = { -+ .part_probes = gs_minibox_v1_part_probes, -+}; -+ -+static struct gpio_led gs_minibox_v1_leds_gpio[] __initdata = { -+ { -+ .name = "minibox-v1:green:system", -+ .gpio = GS_MINIBOX_V1_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button gs_minibox_v1_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = GS_MINIBOX_V1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GS_MINIBOX_V1_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init gs_minibox_v1_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_minibox_v1_leds_gpio), -+ gs_minibox_v1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, GS_MINIBOX_V1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(gs_minibox_v1_gpio_keys), -+ gs_minibox_v1_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&gs_minibox_v1_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_GS_MINIBOX_V1, "MINIBOX-V1", -+ "MiniBox V1.0", gs_minibox_v1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gs-oolite.c linux-4.1.13/arch/mips/ath79/mach-gs-oolite.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-gs-oolite.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-gs-oolite.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,103 @@ -+/* -+ * Oolite board support -+ * -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "dev-usb.h" -+ -+#define GS_OOLITE_GPIO_BTN6 6 -+#define GS_OOLITE_GPIO_BTN7 7 -+#define GS_OOLITE_GPIO_BTN_RESET 11 -+ -+#define GS_OOLITE_GPIO_LED_SYSTEM 27 -+ -+#define GS_OOLITE_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define GS_OOLITE_KEYS_DEBOUNCE_INTERVAL (3 * GS_OOLITE_KEYS_POLL_INTERVAL) -+ -+static const char *gs_oolite_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data gs_oolite_flash_data = { -+ .part_probes = gs_oolite_part_probes, -+}; -+ -+static struct gpio_led gs_oolite_leds_gpio[] __initdata = { -+ { -+ .name = "oolite:red:system", -+ .gpio = GS_OOLITE_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button gs_oolite_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GS_OOLITE_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "BTN_6", -+ .type = EV_KEY, -+ .code = BTN_6, -+ .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GS_OOLITE_GPIO_BTN6, -+ .active_low = 0, -+ }, -+ { -+ .desc = "BTN_7", -+ .type = EV_KEY, -+ .code = BTN_7, -+ .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = GS_OOLITE_GPIO_BTN7, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init gs_oolite_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_leds_gpio), -+ gs_oolite_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, GS_OOLITE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(gs_oolite_gpio_keys), -+ gs_oolite_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&gs_oolite_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_GS_OOLITE, "GS-OOLITE", -+ "Oolite V1.0", gs_oolite_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-hiwifi-hc6361.c linux-4.1.13/arch/mips/ath79/mach-hiwifi-hc6361.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-hiwifi-hc6361.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-hiwifi-hc6361.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,115 @@ -+/* -+ * HiWiFi HC6361 board support -+ * -+ * Copyright (C) 2012-2013 eric -+ * Copyright (C) 2014 Yousong Zhou -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define HIWIFI_HC6361_GPIO_LED_WLAN_2P4 0 /* 2.4G WLAN LED */ -+#define HIWIFI_HC6361_GPIO_LED_SYSTEM 1 /* System LED */ -+#define HIWIFI_HC6361_GPIO_LED_INTERNET 27 /* Internet LED */ -+ -+#define HIWIFI_HC6361_GPIO_USBPOWER 20 /* USB power control */ -+#define HIWIFI_HC6361_GPIO_BTN_RST 11 /* Reset button */ -+ -+#define HIWIFI_HC6361_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define HIWIFI_HC6361_KEYS_DEBOUNCE_INTERVAL \ -+ (3 * HIWIFI_HC6361_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led hiwifi_leds_gpio[] __initdata = { -+ { -+ .name = "hiwifi:blue:wlan-2p4", -+ .gpio = HIWIFI_HC6361_GPIO_LED_WLAN_2P4, -+ .active_low = 1, -+ }, { -+ .name = "hiwifi:blue:system", -+ .gpio = HIWIFI_HC6361_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "hiwifi:blue:internet", -+ .gpio = HIWIFI_HC6361_GPIO_LED_INTERNET, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button hiwifi_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = HIWIFI_HC6361_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = HIWIFI_HC6361_GPIO_BTN_RST, -+ .active_low = 1, -+ } -+}; -+ -+static void __init get_mac_from_bdinfo(u8 *mac, void *bdinfo) -+{ -+ if (sscanf(bdinfo, "fac_mac = %2hhx:%2hhx:%2hhx:%2hhx:%2hhx:%2hhx", -+ &mac[0], &mac[1], &mac[2], &mac[3], -+ &mac[4], &mac[5]) == 6) { -+ return; -+ } -+ -+ printk(KERN_WARNING "Parsing MAC address failed.\n"); -+ memcpy(mac, "\x00\xba\xbe\x00\x00\x00", 6); -+} -+ -+static void __init hiwifi_hc6361_setup(void) -+{ -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 mac[6]; -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_m25p80(NULL); -+ ath79_gpio_function_enable( -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(hiwifi_leds_gpio), -+ hiwifi_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, HIWIFI_HC6361_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(hiwifi_gpio_keys), -+ hiwifi_gpio_keys); -+ gpio_request_one(HIWIFI_HC6361_GPIO_USBPOWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ get_mac_from_bdinfo(mac, (void *) KSEG1ADDR(0x1f010180)); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_HIWIFI_HC6361, "HiWiFi-HC6361", -+ "HiWiFi HC6361", hiwifi_hc6361_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-hornet-ub.c linux-4.1.13/arch/mips/ath79/mach-hornet-ub.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-hornet-ub.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-hornet-ub.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,142 @@ -+/* -+ * ALFA NETWORK Hornet-UB board support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define HORNET_UB_GPIO_LED_WLAN 0 -+#define HORNET_UB_GPIO_LED_USB 1 -+#define HORNET_UB_GPIO_LED_LAN 13 -+#define HORNET_UB_GPIO_LED_WAN 17 -+#define HORNET_UB_GPIO_LED_WPS 27 -+#define HORNET_UB_GPIO_EXT_LNA 28 -+ -+#define HORNET_UB_GPIO_BTN_RESET 12 -+#define HORNET_UB_GPIO_BTN_WPS 11 -+ -+#define HORNET_UB_GPIO_USB_POWER 26 -+ -+#define HORNET_UB_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define HORNET_UB_KEYS_DEBOUNCE_INTERVAL (3 * HORNET_UB_KEYS_POLL_INTERVAL) -+ -+#define HORNET_UB_MAC0_OFFSET 0x0000 -+#define HORNET_UB_MAC1_OFFSET 0x0006 -+#define HORNET_UB_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led hornet_ub_leds_gpio[] __initdata = { -+ { -+ .name = "alfa:blue:lan", -+ .gpio = HORNET_UB_GPIO_LED_LAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "alfa:blue:usb", -+ .gpio = HORNET_UB_GPIO_LED_USB, -+ .active_low = 0, -+ }, -+ { -+ .name = "alfa:blue:wan", -+ .gpio = HORNET_UB_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "alfa:blue:wlan", -+ .gpio = HORNET_UB_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "alfa:blue:wps", -+ .gpio = HORNET_UB_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button hornet_ub_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = HORNET_UB_GPIO_BTN_WPS, -+ .active_low = 0, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = HORNET_UB_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init hornet_ub_gpio_setup(void) -+{ -+ u32 t; -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); -+ -+ gpio_request_one(HORNET_UB_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ gpio_request_one(HORNET_UB_GPIO_EXT_LNA, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "external LNA0"); -+ -+} -+ -+static void __init hornet_ub_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ hornet_ub_gpio_setup(); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio), -+ hornet_ub_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(hornet_ub_gpio_keys), -+ hornet_ub_gpio_keys); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, -+ art + HORNET_UB_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + HORNET_UB_MAC1_OFFSET, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_HORNET_UB, "HORNET-UB", "ALFA NETWORK Hornet-UB", -+ hornet_ub_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ja76pf.c linux-4.1.13/arch/mips/ath79/mach-ja76pf.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ja76pf.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ja76pf.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,190 @@ -+/* -+ * jjPlus JA76PF board support -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define JA76PF_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define JA76PF_KEYS_DEBOUNCE_INTERVAL (3 * JA76PF_KEYS_POLL_INTERVAL) -+ -+#define JA76PF_GPIO_I2C_SCL 0 -+#define JA76PF_GPIO_I2C_SDA 1 -+#define JA76PF_GPIO_LED_1 5 -+#define JA76PF_GPIO_LED_2 4 -+#define JA76PF_GPIO_LED_3 3 -+#define JA76PF_GPIO_BTN_RESET 11 -+ -+static struct gpio_led ja76pf_leds_gpio[] __initdata = { -+ { -+ .name = "jjplus:green:led1", -+ .gpio = JA76PF_GPIO_LED_1, -+ .active_low = 1, -+ }, { -+ .name = "jjplus:green:led2", -+ .gpio = JA76PF_GPIO_LED_2, -+ .active_low = 1, -+ }, { -+ .name = "jjplus:green:led3", -+ .gpio = JA76PF_GPIO_LED_3, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = JA76PF_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = { -+ .sda_pin = JA76PF_GPIO_I2C_SDA, -+ .scl_pin = JA76PF_GPIO_I2C_SCL, -+}; -+ -+static struct platform_device ja76pf_i2c_gpio_device = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &ja76pf_i2c_gpio_data, -+ } -+}; -+ -+static const char *ja76pf_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data ja76pf_flash_data = { -+ .part_probes = ja76pf_part_probes, -+}; -+ -+#define JA76PF_WAN_PHYMASK (1 << 4) -+#define JA76PF_LAN_PHYMASK ((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3)) -+#define JA76PF_MDIO_PHYMASK (JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK) -+ -+static void __init ja76pf_init(void) -+{ -+ ath79_register_m25p80(&ja76pf_flash_data); -+ -+ ath79_register_mdio(0, ~JA76PF_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = JA76PF_LAN_PHYMASK; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = JA76PF_WAN_PHYMASK; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ platform_device_register(&ja76pf_i2c_gpio_device); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio), -+ ja76pf_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ja76pf_gpio_keys), -+ ja76pf_gpio_keys); -+ -+ ath79_register_usb(); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init); -+ -+#define JA76PF2_GPIO_LED_D2 5 -+#define JA76PF2_GPIO_LED_D3 4 -+#define JA76PF2_GPIO_LED_D4 3 -+#define JA76PF2_GPIO_BTN_RESET 7 -+#define JA76PF2_GPIO_BTN_WPS 8 -+ -+static struct gpio_led ja76pf2_leds_gpio[] __initdata = { -+ { -+ .name = "jjplus:green:led1", -+ .gpio = JA76PF2_GPIO_LED_D2, -+ .active_low = 1, -+ }, { -+ .name = "jjplus:green:led2", -+ .gpio = JA76PF2_GPIO_LED_D3, -+ .active_low = 0, -+ }, { -+ .name = "jjplus:green:led3", -+ .gpio = JA76PF2_GPIO_LED_D4, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button ja76pf2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = JA76PF2_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = JA76PF2_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+#define JA76PF2_LAN_PHYMASK BIT(0) -+#define JA76PF2_WAN_PHYMASK BIT(4) -+#define JA76PF2_MDIO_PHYMASK (JA76PF2_LAN_PHYMASK | JA76PF2_WAN_PHYMASK) -+ -+static void __init ja76pf2_init(void) -+{ -+ ath79_register_m25p80(&ja76pf_flash_data); -+ -+ ath79_register_mdio(0, ~JA76PF2_MDIO_PHYMASK); -+ -+ /* MAC0 is connected to the CPU port of the AR8316 switch */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ /* MAC1 is connected to the PHY4 of the AR8316 switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = BIT(4); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf2_leds_gpio), -+ ja76pf2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ja76pf2_gpio_keys), -+ ja76pf2_gpio_keys); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_JA76PF2, "JA76PF2", "jjPlus JA76PF2", ja76pf2_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-jwap003.c linux-4.1.13/arch/mips/ath79/mach-jwap003.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-jwap003.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-jwap003.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,95 @@ -+/* -+ * jjPlus JWAP003 board support -+ * -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-gpio-buttons.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define JWAP003_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define JWAP003_KEYS_DEBOUNCE_INTERVAL (3 * JWAP003_KEYS_POLL_INTERVAL) -+ -+#define JWAP003_GPIO_WPS 11 -+#define JWAP003_GPIO_I2C_SCL 0 -+#define JWAP003_GPIO_I2C_SDA 1 -+ -+static struct gpio_keys_button jwap003_gpio_keys[] __initdata = { -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = JWAP003_GPIO_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = { -+ .sda_pin = JWAP003_GPIO_I2C_SDA, -+ .scl_pin = JWAP003_GPIO_I2C_SCL, -+}; -+ -+static struct platform_device jwap003_i2c_gpio_device = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &jwap003_i2c_gpio_data, -+ } -+}; -+ -+static const char *jwap003_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data jwap003_flash_data = { -+ .part_probes = jwap003_part_probes, -+}; -+ -+#define JWAP003_WAN_PHYMASK BIT(0) -+#define JWAP003_LAN_PHYMASK BIT(4) -+ -+static void __init jwap003_init(void) -+{ -+ ath79_register_m25p80(&jwap003_flash_data); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.phy_mask = JWAP003_WAN_PHYMASK; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.has_ar8216 = 1; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = JWAP003_LAN_PHYMASK; -+ ath79_eth1_data.speed = SPEED_100; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ platform_device_register(&jwap003_i2c_gpio_device); -+ -+ ath79_register_usb(); -+ -+ ath79_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(jwap003_gpio_keys), -+ jwap003_gpio_keys); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mc-mac1200r.c linux-4.1.13/arch/mips/ath79/mach-mc-mac1200r.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mc-mac1200r.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mc-mac1200r.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,155 @@ -+/* -+ * MERCURY MAC1200R board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2013 Gui Iribarren -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define MAC1200R_GPIO_LED_WLAN2G 13 -+#define MAC1200R_GPIO_LED_WLAN5G 17 -+#define MAC1200R_GPIO_LED_SYSTEM 14 -+#define MAC1200R_GPIO_LED_WPS 11 -+#define MAC1200R_GPIO_LED_WAN 12 -+#define MAC1200R_GPIO_LED_LAN1 15 -+#define MAC1200R_GPIO_LED_LAN2 21 -+#define MAC1200R_GPIO_LED_LAN3 22 -+#define MAC1200R_GPIO_LED_LAN4 20 -+ -+#define MAC1200R_GPIO_BTN_WPS 16 -+ -+#define MAC1200R_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MAC1200R_KEYS_DEBOUNCE_INTERVAL (3 * MAC1200R_KEYS_POLL_INTERVAL) -+ -+#define MAC1200R_MAC0_OFFSET 0 -+#define MAC1200R_MAC1_OFFSET 6 -+#define MAC1200R_WMAC_CALDATA_OFFSET 0x1000 -+#define MAC1200R_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *mac1200r_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data mac1200r_flash_data = { -+ .part_probes = mac1200r_part_probes, -+}; -+ -+static struct gpio_led mac1200r_leds_gpio[] __initdata = { -+ { -+ .name = "mercury:green:wps", -+ .gpio = MAC1200R_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "mercury:green:system", -+ .gpio = MAC1200R_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+ { -+ .name = "mercury:green:wlan2g", -+ .gpio = MAC1200R_GPIO_LED_WLAN2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "mercury:green:wlan5g", -+ .gpio = MAC1200R_GPIO_LED_WLAN5G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mac1200r_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MAC1200R_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MAC1200R_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+ -+static void __init mac1200r_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&mac1200r_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mac1200r_leds_gpio), -+ mac1200r_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, MAC1200R_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mac1200r_gpio_keys), -+ mac1200r_gpio_keys); -+ -+ ath79_init_mac(tmpmac, mac, 0); -+ ath79_wmac_disable_5ghz(); -+ ath79_register_wmac(art + MAC1200R_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_init_mac(tmpmac, mac, 1); -+ ap91_pci_init(art + MAC1200R_PCIE_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* LAN */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2); -+ -+ /* GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(0); -+ -+ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN1, -+ AR934X_GPIO_OUT_LED_LINK3); -+ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN2, -+ AR934X_GPIO_OUT_LED_LINK2); -+ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN3, -+ AR934X_GPIO_OUT_LED_LINK1); -+ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN4, -+ AR934X_GPIO_OUT_LED_LINK0); -+ ath79_gpio_output_select(MAC1200R_GPIO_LED_WAN, -+ AR934X_GPIO_OUT_LED_LINK4); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MC_MAC1200R, "MC-MAC1200R", -+ "MERCURY MAC1200R", -+ mac1200r_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr12.c linux-4.1.13/arch/mips/ath79/mach-mr12.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mr12.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mr12.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,115 @@ -+/* -+ * Cisco Meraki MR12 board support -+ * -+ * Copyright (C) 2014-2015 Chris Blake -+ * -+ * Based on Atheros AP96 board support configuration -+ * -+ * Copyright (C) 2009 Marco Porsch -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2010 Atheros Communications -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define MR12_GPIO_LED_W4_GREEN 14 -+#define MR12_GPIO_LED_W3_GREEN 13 -+#define MR12_GPIO_LED_W2_GREEN 12 -+#define MR12_GPIO_LED_W1_GREEN 11 -+ -+#define MR12_GPIO_LED_WAN 15 -+ -+#define MR12_GPIO_LED_POWER_ORANGE 16 -+#define MR12_GPIO_LED_POWER_GREEN 17 -+ -+#define MR12_GPIO_BTN_RESET 8 -+#define MR12_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MR12_KEYS_DEBOUNCE_INTERVAL (3 * MR12_KEYS_POLL_INTERVAL) -+ -+#define MR12_WAN_PHYMASK BIT(4) -+ -+#define MR12_WMAC0_MAC_OFFSET 0x120c -+#define MR12_CALDATA0_OFFSET 0x1000 -+ -+static struct gpio_led MR12_leds_gpio[] __initdata = { -+ { -+ .name = "mr12:green:wan", -+ .gpio = MR12_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "mr12:orange:power", -+ .gpio = MR12_GPIO_LED_POWER_ORANGE, -+ .active_low = 1, -+ }, { -+ .name = "mr12:green:power", -+ .gpio = MR12_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr12:green:wifi4", -+ .gpio = MR12_GPIO_LED_W4_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr12:green:wifi3", -+ .gpio = MR12_GPIO_LED_W3_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr12:green:wifi2", -+ .gpio = MR12_GPIO_LED_W2_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr12:green:wifi1", -+ .gpio = MR12_GPIO_LED_W1_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button MR12_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MR12_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MR12_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init MR12_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0xbfff0000); -+ -+ ath79_register_mdio(0,0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = MR12_WAN_PHYMASK; -+ ath79_register_eth(0); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(MR12_leds_gpio), -+ MR12_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, MR12_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(MR12_gpio_keys), -+ MR12_gpio_keys); -+ -+ ap91_pci_init(mac + MR12_CALDATA0_OFFSET, -+ mac + MR12_WMAC0_MAC_OFFSET); -+ -+} -+ -+MIPS_MACHINE(ATH79_MACH_MR12, "MR12", "Meraki MR12", MR12_setup); -\ No newline at end of file -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr16.c linux-4.1.13/arch/mips/ath79/mach-mr16.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mr16.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mr16.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,118 @@ -+/* -+ * Cisco Meraki MR16 board support -+ * -+ * Copyright (C) 2015 Chris Blake -+ * -+ * Based on Atheros AP96 board support configuration -+ * -+ * Copyright (C) 2009 Marco Porsch -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2010 Atheros Communications -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define MR16_GPIO_LED_W4_GREEN 3 -+#define MR16_GPIO_LED_W3_GREEN 2 -+#define MR16_GPIO_LED_W2_GREEN 1 -+#define MR16_GPIO_LED_W1_GREEN 0 -+ -+#define MR16_GPIO_LED_WAN 4 -+ -+#define MR16_GPIO_LED_POWER_ORANGE 5 -+#define MR16_GPIO_LED_POWER_GREEN 6 -+ -+#define MR16_GPIO_BTN_RESET 7 -+#define MR16_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MR16_KEYS_DEBOUNCE_INTERVAL (3 * MR16_KEYS_POLL_INTERVAL) -+ -+#define MR16_WAN_PHYMASK BIT(0) -+ -+#define MR16_WMAC0_MAC_OFFSET 0x120c -+#define MR16_WMAC1_MAC_OFFSET 0x520c -+#define MR16_CALDATA0_OFFSET 0x1000 -+#define MR16_CALDATA1_OFFSET 0x5000 -+ -+static struct gpio_led MR16_leds_gpio[] __initdata = { -+ { -+ .name = "mr16:green:wan", -+ .gpio = MR16_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "mr16:orange:power", -+ .gpio = MR16_GPIO_LED_POWER_ORANGE, -+ .active_low = 1, -+ }, { -+ .name = "mr16:green:power", -+ .gpio = MR16_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr16:green:wifi4", -+ .gpio = MR16_GPIO_LED_W4_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr16:green:wifi3", -+ .gpio = MR16_GPIO_LED_W3_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr16:green:wifi2", -+ .gpio = MR16_GPIO_LED_W2_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "mr16:green:wifi1", -+ .gpio = MR16_GPIO_LED_W1_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button MR16_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MR16_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MR16_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init MR16_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0xbfff0000); -+ -+ ath79_register_mdio(0,0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = MR16_WAN_PHYMASK; -+ ath79_register_eth(0); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(MR16_leds_gpio), -+ MR16_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, MR16_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(MR16_gpio_keys), -+ MR16_gpio_keys); -+ -+ ap94_pci_init(mac + MR16_CALDATA0_OFFSET, -+ mac + MR16_WMAC0_MAC_OFFSET, -+ mac + MR16_CALDATA1_OFFSET, -+ mac + MR16_WMAC1_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MR16, "MR16", "Meraki MR16", MR16_setup); -\ No newline at end of file -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr1750.c linux-4.1.13/arch/mips/ath79/mach-mr1750.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mr1750.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mr1750.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,129 @@ -+/* -+ * MR1750 board support -+ * -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012-2013 Marek Lindner -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define MR1750_GPIO_LED_LAN 12 -+#define MR1750_GPIO_LED_WLAN_2G 13 -+#define MR1750_GPIO_LED_STATUS_GREEN 19 -+#define MR1750_GPIO_LED_STATUS_RED 21 -+#define MR1750_GPIO_LED_POWER 22 -+#define MR1750_GPIO_LED_WLAN_5G 23 -+ -+#define MR1750_GPIO_BTN_RESET 17 -+ -+#define MR1750_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MR1750_KEYS_DEBOUNCE_INTERVAL (3 * MR1750_KEYS_POLL_INTERVAL) -+ -+#define MR1750_MAC0_OFFSET 0 -+#define MR1750_WMAC_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led mr1750_leds_gpio[] __initdata = { -+ { -+ .name = "mr1750:blue:power", -+ .gpio = MR1750_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr1750:blue:wan", -+ .gpio = MR1750_GPIO_LED_LAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr1750:blue:wlan24", -+ .gpio = MR1750_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr1750:blue:wlan58", -+ .gpio = MR1750_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr1750:green:status", -+ .gpio = MR1750_GPIO_LED_STATUS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr1750:red:status", -+ .gpio = MR1750_GPIO_LED_STATUS_RED, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mr1750_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MR1750_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MR1750_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init mr1750_setup(void) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); -+ u8 mac[6]; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xbe000101; -+ ath79_eth0_pll_data.pll_100 = 0x80000101; -+ ath79_eth0_pll_data.pll_10 = 0x80001313; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mr1750_leds_gpio), -+ mr1750_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, MR1750_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mr1750_gpio_keys), -+ mr1750_gpio_keys); -+ -+ ath79_init_mac(mac, art + MR1750_MAC0_OFFSET, 1); -+ ath79_register_wmac(art + MR1750_WMAC_CALDATA_OFFSET, mac); -+ ath79_register_pci(); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + MR1750_MAC0_OFFSET, 0); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(5); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MR1750, "MR1750", "OpenMesh MR1750", mr1750_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr600.c linux-4.1.13/arch/mips/ath79/mach-mr600.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mr600.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mr600.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,177 @@ -+/* -+ * OpenMesh OM2P board support -+ * -+ * Copyright (C) 2012 Marek Lindner -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define MR600_GPIO_LED_WLAN58 12 -+#define MR600_GPIO_LED_WPS 13 -+#define MR600_GPIO_LED_POWER 14 -+ -+#define MR600V2_GPIO_LED_WLAN58_RED 12 -+#define MR600V2_GPIO_LED_WPS 13 -+#define MR600V2_GPIO_LED_POWER 14 -+#define MR600V2_GPIO_LED_WLAN24_GREEN 18 -+#define MR600V2_GPIO_LED_WLAN24_YELLOW 19 -+#define MR600V2_GPIO_LED_WLAN24_RED 20 -+#define MR600V2_GPIO_LED_WLAN58_GREEN 21 -+#define MR600V2_GPIO_LED_WLAN58_YELLOW 22 -+ -+#define MR600_GPIO_BTN_RESET 17 -+ -+#define MR600_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MR600_KEYS_DEBOUNCE_INTERVAL (3 * MR600_KEYS_POLL_INTERVAL) -+ -+#define MR600_MAC_OFFSET 0 -+#define MR600_WMAC_CALDATA_OFFSET 0x1000 -+#define MR600_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led mr600_leds_gpio[] __initdata = { -+ { -+ .name = "mr600:orange:power", -+ .gpio = MR600_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:blue:wps", -+ .gpio = MR600_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:green:wlan58", -+ .gpio = MR600_GPIO_LED_WLAN58, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led mr600v2_leds_gpio[] __initdata = { -+ { -+ .name = "mr600:blue:power", -+ .gpio = MR600V2_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:blue:wps", -+ .gpio = MR600V2_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:red:wlan24", -+ .gpio = MR600V2_GPIO_LED_WLAN24_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:yellow:wlan24", -+ .gpio = MR600V2_GPIO_LED_WLAN24_YELLOW, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:green:wlan24", -+ .gpio = MR600V2_GPIO_LED_WLAN24_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:red:wlan58", -+ .gpio = MR600V2_GPIO_LED_WLAN58_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:yellow:wlan58", -+ .gpio = MR600V2_GPIO_LED_WLAN58_YELLOW, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr600:green:wlan58", -+ .gpio = MR600V2_GPIO_LED_WLAN58_GREEN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mr600_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MR600_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MR600_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init mr600_base_setup(unsigned num_leds, struct gpio_led *leds) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); -+ u8 mac[6]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, num_leds, leds); -+ ath79_register_gpio_keys_polled(-1, MR600_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mr600_gpio_keys), -+ mr600_gpio_keys); -+ -+ ath79_init_mac(mac, art + MR600_MAC_OFFSET, 1); -+ ath79_register_wmac(art + MR600_WMAC_CALDATA_OFFSET, mac); -+ -+ ath79_init_mac(mac, art + MR600_MAC_OFFSET, 8); -+ ap91_pci_init(art + MR600_PCIE_CALDATA_OFFSET, mac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + MR600_MAC_OFFSET, 0); -+ -+ /* GMAC0 is connected to an external PHY */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+static void __init mr600_setup(void) -+{ -+ mr600_base_setup(ARRAY_SIZE(mr600_leds_gpio), mr600_leds_gpio); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MR600, "MR600", "OpenMesh MR600", mr600_setup); -+ -+static void __init mr600v2_setup(void) -+{ -+ mr600_base_setup(ARRAY_SIZE(mr600v2_leds_gpio), mr600v2_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MR600V2, "MR600v2", "OpenMesh MR600v2", mr600v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr900.c linux-4.1.13/arch/mips/ath79/mach-mr900.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mr900.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mr900.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,140 @@ -+/* -+ * MR900 board support -+ * -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012-2013 Marek Lindner -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define MR900_GPIO_LED_LAN 12 -+#define MR900_GPIO_LED_WLAN_2G 13 -+#define MR900_GPIO_LED_STATUS_GREEN 19 -+#define MR900_GPIO_LED_STATUS_RED 21 -+#define MR900_GPIO_LED_POWER 22 -+#define MR900_GPIO_LED_WLAN_5G 23 -+ -+#define MR900_GPIO_BTN_RESET 17 -+ -+#define MR900_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MR900_KEYS_DEBOUNCE_INTERVAL (3 * MR900_KEYS_POLL_INTERVAL) -+ -+#define MR900_MAC0_OFFSET 0 -+#define MR900_WMAC_CALDATA_OFFSET 0x1000 -+#define MR900_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led mr900_leds_gpio[] __initdata = { -+ { -+ .name = "mr900:blue:power", -+ .gpio = MR900_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr900:blue:wan", -+ .gpio = MR900_GPIO_LED_LAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr900:blue:wlan24", -+ .gpio = MR900_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr900:blue:wlan58", -+ .gpio = MR900_GPIO_LED_WLAN_5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr900:green:status", -+ .gpio = MR900_GPIO_LED_STATUS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "mr900:red:status", -+ .gpio = MR900_GPIO_LED_STATUS_RED, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mr900_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MR900_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MR900_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init mr900_setup(void) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); -+ u8 mac[6], pcie_mac[6]; -+ struct ath9k_platform_data *pdata; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xbe000101; -+ ath79_eth0_pll_data.pll_100 = 0x80000101; -+ ath79_eth0_pll_data.pll_10 = 0x80001313; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mr900_leds_gpio), -+ mr900_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, MR900_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mr900_gpio_keys), -+ mr900_gpio_keys); -+ -+ ath79_init_mac(mac, art + MR900_MAC0_OFFSET, 1); -+ ath79_register_wmac(art + MR900_WMAC_CALDATA_OFFSET, mac); -+ ath79_init_mac(pcie_mac, art + MR900_MAC0_OFFSET, 16); -+ ap91_pci_init(art + MR900_PCIE_CALDATA_OFFSET, pcie_mac); -+ pdata = ap9x_pci_get_wmac_data(0); -+ if (!pdata) { -+ pr_err("mr900: unable to get address of wlan data\n"); -+ return; -+ } -+ pdata->use_eeprom = true; -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + MR900_MAC0_OFFSET, 0); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(5); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MR900, "MR900", "OpenMesh MR900", mr900_setup); -+MIPS_MACHINE(ATH79_MACH_MR900v2, "MR900v2", "OpenMesh MR900v2", mr900_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n600.c linux-4.1.13/arch/mips/ath79/mach-mynet-n600.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n600.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mynet-n600.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,202 @@ -+/* -+ * WD My Net N600 board support -+ * -+ * Copyright (C) 2013 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define MYNET_N600_GPIO_LED_WIFI 0 -+#define MYNET_N600_GPIO_LED_POWER 11 -+#define MYNET_N600_GPIO_LED_INTERNET 12 -+#define MYNET_N600_GPIO_LED_WPS 13 -+ -+#define MYNET_N600_GPIO_LED_LAN1 4 -+#define MYNET_N600_GPIO_LED_LAN2 3 -+#define MYNET_N600_GPIO_LED_LAN3 2 -+#define MYNET_N600_GPIO_LED_LAN4 1 -+ -+#define MYNET_N600_GPIO_BTN_RESET 16 -+#define MYNET_N600_GPIO_BTN_WPS 17 -+ -+#define MYNET_N600_GPIO_EXTERNAL_LNA0 14 -+#define MYNET_N600_GPIO_EXTERNAL_LNA1 15 -+ -+#define MYNET_N600_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MYNET_N600_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N600_KEYS_POLL_INTERVAL) -+ -+#define MYNET_N600_MAC0_OFFSET 0 -+#define MYNET_N600_MAC1_OFFSET 6 -+#define MYNET_N600_WMAC_CALDATA_OFFSET 0x1000 -+#define MYNET_N600_PCIE_CALDATA_OFFSET 0x5000 -+ -+#define MYNET_N600_NVRAM_ADDR 0x1f058010 -+#define MYNET_N600_NVRAM_SIZE 0x7ff0 -+ -+static struct gpio_led mynet_n600_leds_gpio[] __initdata = { -+ { -+ .name = "wd:blue:power", -+ .gpio = MYNET_N600_GPIO_LED_POWER, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:wps", -+ .gpio = MYNET_N600_GPIO_LED_WPS, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:wireless", -+ .gpio = MYNET_N600_GPIO_LED_WIFI, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:internet", -+ .gpio = MYNET_N600_GPIO_LED_INTERNET, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:green:lan1", -+ .gpio = MYNET_N600_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:green:lan2", -+ .gpio = MYNET_N600_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:green:lan3", -+ .gpio = MYNET_N600_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:green:lan4", -+ .gpio = MYNET_N600_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mynet_n600_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MYNET_N600_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_N600_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = MYNET_N600_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_N600_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static void mynet_n600_get_mac(const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N600_NVRAM_ADDR); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, MYNET_N600_NVRAM_SIZE, -+ name, mac); -+ if (err) -+ pr_err("no MAC address found for %s\n", name); -+} -+ -+#define MYNET_N600_WAN_PHY_MASK BIT(0) -+ -+static void __init mynet_n600_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN1, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN2, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN3, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN4, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_N600_GPIO_LED_INTERNET, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n600_leds_gpio), -+ mynet_n600_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, MYNET_N600_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mynet_n600_gpio_keys), -+ mynet_n600_gpio_keys); -+ -+ /* -+ * Control signal for external LNAs 0 and 1 -+ * Taken from GPL bootloader source: -+ * board/ar7240/db12x/alpha_gpio.c -+ */ -+ ath79_wmac_set_ext_lna_gpio(0, MYNET_N600_GPIO_EXTERNAL_LNA0); -+ ath79_wmac_set_ext_lna_gpio(1, MYNET_N600_GPIO_EXTERNAL_LNA1); -+ -+ mynet_n600_get_mac("wlan24mac=", tmpmac); -+ ath79_register_wmac(art + MYNET_N600_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ mynet_n600_get_mac("wlan5mac=", tmpmac); -+ ap91_pci_init(art + MYNET_N600_PCIE_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE | -+ AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* LAN */ -+ mynet_n600_get_mac("lanmac=", ath79_eth1_data.mac_addr); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ mynet_n600_get_mac("wanmac=", ath79_eth0_data.mac_addr); -+ -+ /* GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = MYNET_N600_WAN_PHY_MASK; -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = MYNET_N600_WAN_PHY_MASK; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MYNET_N600, "MYNET-N600", "WD My Net N600", -+ mynet_n600_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n750.c linux-4.1.13/arch/mips/ath79/mach-mynet-n750.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n750.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mynet-n750.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,226 @@ -+/* -+ * WD My Net N750 board support -+ * -+ * Copyright (C) 2013 Felix Kaechele -+ * Copyright (C) 2013 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+ -+/* -+ * Taken from GPL bootloader source: -+ * board/ar7240/db12x/alpha_gpio.c -+ */ -+#define MYNET_N750_GPIO_LED_WIFI 11 -+#define MYNET_N750_GPIO_LED_INTERNET 12 -+#define MYNET_N750_GPIO_LED_WPS 13 -+#define MYNET_N750_GPIO_LED_POWER 14 -+ -+#define MYNET_N750_GPIO_BTN_RESET 17 -+#define MYNET_N750_GPIO_BTN_WPS 19 -+ -+#define MYNET_N750_GPIO_EXTERNAL_LNA0 15 -+#define MYNET_N750_GPIO_EXTERNAL_LNA1 18 -+ -+#define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL) -+ -+#define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000 -+#define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000 -+ -+#define MYNET_N750_NVRAM_ADDR 0x1f058010 -+#define MYNET_N750_NVRAM_SIZE 0x7ff0 -+ -+static struct gpio_led mynet_n750_leds_gpio[] __initdata = { -+ { -+ .name = "wd:blue:power", -+ .gpio = MYNET_N750_GPIO_LED_POWER, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:wps", -+ .gpio = MYNET_N750_GPIO_LED_WPS, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:wireless", -+ .gpio = MYNET_N750_GPIO_LED_WIFI, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:internet", -+ .gpio = MYNET_N750_GPIO_LED_INTERNET, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_N750_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_N750_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static const struct ar8327_led_info mynet_n750_leds_ar8327[] __initconst = { -+ AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"), -+ AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"), -+ AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"), -+ AR8327_LED_INFO(PHY3_0, HW, "wd:green:lan4"), -+ AR8327_LED_INFO(PHY4_0, HW, "wd:green:wan"), -+ AR8327_LED_INFO(PHY0_1, HW, "wd:yellow:lan1"), -+ AR8327_LED_INFO(PHY1_1, HW, "wd:yellow:lan2"), -+ AR8327_LED_INFO(PHY2_1, HW, "wd:yellow:lan3"), -+ AR8327_LED_INFO(PHY3_1, HW, "wd:yellow:lan4"), -+ AR8327_LED_INFO(PHY4_1, HW, "wd:yellow:wan"), -+}; -+ -+static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = { -+ .led_ctrl0 = 0xcc35cc35, -+ .led_ctrl1 = 0xca35ca35, -+ .led_ctrl2 = 0xc935c935, -+ .led_ctrl3 = 0x03ffff00, -+ .open_drain = false, -+}; -+ -+static struct ar8327_platform_data mynet_n750_ar8327_data = { -+ .pad0_cfg = &mynet_n750_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &mynet_n750_ar8327_led_cfg, -+ .num_leds = ARRAY_SIZE(mynet_n750_leds_ar8327), -+ .leds = mynet_n750_leds_ar8327, -+}; -+ -+static struct mdio_board_info mynet_n750_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &mynet_n750_ar8327_data, -+ }, -+}; -+ -+static void mynet_n750_get_mac(const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE, -+ name, mac); -+ if (err) -+ pr_err("no MAC address found for %s\n", name); -+} -+ -+/* -+ * The bootloader on this board powers down all PHYs on the switch -+ * before booting the kernel. We bring all PHYs back up so that they are -+ * discoverable by the mdio bus scan and the switch is detected -+ * correctly. -+ */ -+static void mynet_n750_mdio_fixup(struct mii_bus *bus) -+{ -+ int i; -+ -+ for (i = 0; i < 5; i++) -+ bus->write(bus, i, MII_BMCR, -+ (BMCR_RESET | BMCR_ANENABLE | BMCR_SPEED1000)); -+ -+ mdelay(1000); -+} -+ -+static void __init mynet_n750_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio), -+ mynet_n750_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mynet_n750_gpio_keys), -+ mynet_n750_gpio_keys); -+ /* -+ * Control signal for external LNAs 0 and 1 -+ * Taken from GPL bootloader source: -+ * board/ar7240/db12x/alpha_gpio.c -+ */ -+ ath79_wmac_set_ext_lna_gpio(0, MYNET_N750_GPIO_EXTERNAL_LNA0); -+ ath79_wmac_set_ext_lna_gpio(1, MYNET_N750_GPIO_EXTERNAL_LNA1); -+ -+ mynet_n750_get_mac("wlan24mac=", tmpmac); -+ ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ mynet_n750_get_mac("wlan5mac=", tmpmac); -+ ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ -+ mdiobus_register_board_info(mynet_n750_mdio0_info, -+ ARRAY_SIZE(mynet_n750_mdio0_info)); -+ -+ ath79_mdio0_data.reset = mynet_n750_mdio_fixup; -+ ath79_register_mdio(0, 0x0); -+ -+ mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr); -+ -+ /* GMAC0 is connected to an AR8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750", -+ mynet_n750_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mynet-rext.c linux-4.1.13/arch/mips/ath79/mach-mynet-rext.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mynet-rext.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mynet-rext.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,208 @@ -+/* -+ * WD My Net WI-FI Range Extender (Codename:Starfish db12x) board support -+ * -+ * Copyright (C) 2013 Christian Lamparter -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define MYNET_REXT_GPIO_LED_POWER 11 -+#define MYNET_REXT_GPIO_LED_ETHERNET 12 -+#define MYNET_REXT_GPIO_LED_WIFI 19 -+ -+#define MYNET_REXT_GPIO_LED_RF_QTY1 20 -+#define MYNET_REXT_GPIO_LED_RF_QTY2 21 -+#define MYNET_REXT_GPIO_LED_RF_QTY3 22 -+ -+#define MYNET_REXT_GPIO_BTN_RESET 13 -+#define MYNET_REXT_GPIO_BTN_WPS 15 -+#define MYNET_REXT_GPIO_SW_RF 14 -+ -+#define MYNET_REXT_GPIO_PHY_SWRST 16 /* disables Ethernet PHY */ -+#define MYNET_REXT_GPIO_PHY_INT 17 -+#define MYNET_REXT_GPIO_18 18 -+ -+#define MYNET_REXT_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MYNET_REXT_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_REXT_KEYS_POLL_INTERVAL) -+ -+#define MYNET_REXT_WMAC_CALDATA_OFFSET 0x1000 -+ -+#define MYNET_REXT_NVRAM_ADDR 0x1f7e0010 -+#define MYNET_REXT_NVRAM_SIZE 0xfff0 -+ -+#define MYNET_REXT_ART_ADDR 0x1f7f0000 -+ -+static const char *mynet_rext_part_probes[] = { -+ "cybertan", -+ NULL, -+}; -+ -+static struct flash_platform_data mynet_rext_flash_data = { -+ .type = "s25fl064k", -+ .part_probes = mynet_rext_part_probes, -+}; -+ -+static struct gpio_led mynet_rext_leds_gpio[] __initdata = { -+ { -+ .name = "wd:blue:power", -+ .gpio = MYNET_REXT_GPIO_LED_POWER, -+ .active_low = 0, -+ }, -+ { -+ .name = "wd:blue:wireless", -+ .gpio = MYNET_REXT_GPIO_LED_WIFI, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:blue:ethernet", -+ .gpio = MYNET_REXT_GPIO_LED_ETHERNET, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:blue:quality1", -+ .gpio = MYNET_REXT_GPIO_LED_RF_QTY1, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:blue:quality2", -+ .gpio = MYNET_REXT_GPIO_LED_RF_QTY2, -+ .active_low = 1, -+ }, -+ { -+ .name = "wd:blue:quality3", -+ .gpio = MYNET_REXT_GPIO_LED_RF_QTY3, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button mynet_rext_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_REXT_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_REXT_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RF Band switch", -+ .type = EV_SW, -+ .code = BTN_1, -+ .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MYNET_REXT_GPIO_SW_RF, -+ }, -+}; -+ -+static struct at803x_platform_data mynet_rext_at803x_data = { -+ .disable_smarteee = 0, -+ .enable_rgmii_rx_delay = 1, -+ .enable_rgmii_tx_delay = 0, -+ .fixup_rgmii_tx_delay = 1, -+}; -+ -+static struct mdio_board_info mynet_rext_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 4, -+ .platform_data = &mynet_rext_at803x_data, -+ }, -+}; -+ -+static void mynet_rext_get_mac(const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(MYNET_REXT_NVRAM_ADDR); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, MYNET_REXT_NVRAM_SIZE, -+ name, mac); -+ if (err) -+ pr_err("no MAC address found for %s\n", name); -+} -+ -+static void __init mynet_rext_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(MYNET_REXT_ART_ADDR); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&mynet_rext_flash_data); -+ -+ /* GPIO configuration from drivers/char/GPIO8.c */ -+ -+ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_POWER, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_WIFI, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY1, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY2, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY3, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_ETHERNET, -+ AR934X_GPIO_OUT_GPIO); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_rext_leds_gpio), -+ mynet_rext_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, MYNET_REXT_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mynet_rext_gpio_keys), -+ mynet_rext_gpio_keys); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_RXD_DELAY | -+ AR934X_ETH_CFG_RDV_DELAY); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(mynet_rext_mdio0_info, -+ ARRAY_SIZE(mynet_rext_mdio0_info)); -+ -+ /* LAN */ -+ mynet_rext_get_mac("et0macaddr=", ath79_eth0_data.mac_addr); -+ -+ /* GMAC0 is connected to an external PHY on Port 4 */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_pll_data.pll_10 = 0x00001313; /* athrs_mac.c */ -+ ath79_eth0_pll_data.pll_1000 = 0x0e000000; /* athrs_mac.c */ -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_register_eth(0); -+ -+ /* WLAN */ -+ mynet_rext_get_mac("wl0_hwaddr=", tmpmac); -+ ap91_pci_init(art + MYNET_REXT_WMAC_CALDATA_OFFSET, tmpmac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MYNET_REXT, "MYNET-REXT", -+ "WD My Net Wi-Fi Range Extender", mynet_rext_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w04nu.c linux-4.1.13/arch/mips/ath79/mach-mzk-w04nu.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w04nu.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mzk-w04nu.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,124 @@ -+/* -+ * Planex MZK-W04NU board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define MZK_W04NU_GPIO_LED_USB 0 -+#define MZK_W04NU_GPIO_LED_STATUS 1 -+#define MZK_W04NU_GPIO_LED_WPS 3 -+#define MZK_W04NU_GPIO_LED_WLAN 6 -+#define MZK_W04NU_GPIO_LED_AP 15 -+#define MZK_W04NU_GPIO_LED_ROUTER 16 -+ -+#define MZK_W04NU_GPIO_BTN_APROUTER 5 -+#define MZK_W04NU_GPIO_BTN_WPS 12 -+#define MZK_W04NU_GPIO_BTN_RESET 21 -+ -+#define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = { -+ { -+ .name = "planex:green:status", -+ .gpio = MZK_W04NU_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, { -+ .name = "planex:blue:wps", -+ .gpio = MZK_W04NU_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "planex:green:wlan", -+ .gpio = MZK_W04NU_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "planex:green:usb", -+ .gpio = MZK_W04NU_GPIO_LED_USB, -+ .active_low = 1, -+ }, { -+ .name = "planex:green:ap", -+ .gpio = MZK_W04NU_GPIO_LED_AP, -+ .active_low = 1, -+ }, { -+ .name = "planex:green:router", -+ .gpio = MZK_W04NU_GPIO_LED_ROUTER, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MZK_W04NU_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MZK_W04NU_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, { -+ .desc = "aprouter", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MZK_W04NU_GPIO_BTN_APROUTER, -+ .active_low = 0, -+ } -+}; -+ -+#define MZK_W04NU_WAN_PHYMASK BIT(4) -+#define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK) -+ -+static void __init mzk_w04nu_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_mdio(0, MZK_W04NU_MDIO_MASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.has_ar8216 = 1; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio), -+ mzk_w04nu_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mzk_w04nu_gpio_keys), -+ mzk_w04nu_gpio_keys); -+ ath79_register_usb(); -+ -+ ath79_register_wmac(eeprom, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU", -+ mzk_w04nu_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w300nh.c linux-4.1.13/arch/mips/ath79/mach-mzk-w300nh.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w300nh.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-mzk-w300nh.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,115 @@ -+/* -+ * Planex MZK-W300NH board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define MZK_W300NH_GPIO_LED_STATUS 1 -+#define MZK_W300NH_GPIO_LED_WPS 3 -+#define MZK_W300NH_GPIO_LED_WLAN 6 -+#define MZK_W300NH_GPIO_LED_AP_GREEN 15 -+#define MZK_W300NH_GPIO_LED_AP_AMBER 16 -+ -+#define MZK_W300NH_GPIO_BTN_APROUTER 5 -+#define MZK_W300NH_GPIO_BTN_WPS 12 -+#define MZK_W300NH_GPIO_BTN_RESET 21 -+ -+#define MZK_W300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led mzk_w300nh_leds_gpio[] __initdata = { -+ { -+ .name = "planex:green:status", -+ .gpio = MZK_W300NH_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, { -+ .name = "planex:blue:wps", -+ .gpio = MZK_W300NH_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "planex:green:wlan", -+ .gpio = MZK_W300NH_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "planex:green:aprouter", -+ .gpio = MZK_W300NH_GPIO_LED_AP_GREEN, -+ }, { -+ .name = "planex:amber:aprouter", -+ .gpio = MZK_W300NH_GPIO_LED_AP_AMBER, -+ } -+}; -+ -+static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MZK_W300NH_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MZK_W300NH_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, { -+ .desc = "aprouter", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = MZK_W300NH_GPIO_BTN_APROUTER, -+ .active_low = 0, -+ } -+}; -+ -+#define MZK_W300NH_WAN_PHYMASK BIT(4) -+#define MZK_W300NH_MDIO_MASK (~MZK_W300NH_WAN_PHYMASK) -+ -+static void __init mzk_w300nh_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_mdio(0, MZK_W300NH_MDIO_MASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.has_ar8216 = 1; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio), -+ mzk_w300nh_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(mzk_w300nh_gpio_keys), -+ mzk_w300nh_gpio_keys); -+ ath79_register_wmac(eeprom, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH", -+ mzk_w300nh_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-nbg460n.c linux-4.1.13/arch/mips/ath79/mach-nbg460n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-nbg460n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-nbg460n.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,220 @@ -+/* -+ * Zyxel NBG 460N/550N/550NH board support -+ * -+ * Copyright (C) 2010 Michael Kurz -+ * -+ * based on mach-tl-wr1043nd.c -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+/* LEDs */ -+#define NBG460N_GPIO_LED_WPS 3 -+#define NBG460N_GPIO_LED_WAN 6 -+#define NBG460N_GPIO_LED_POWER 14 -+#define NBG460N_GPIO_LED_WLAN 15 -+ -+/* Buttons */ -+#define NBG460N_GPIO_BTN_WPS 12 -+#define NBG460N_GPIO_BTN_RESET 21 -+ -+#define NBG460N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define NBG460N_KEYS_DEBOUNCE_INTERVAL (3 * NBG460N_KEYS_POLL_INTERVAL) -+ -+/* RTC chip PCF8563 I2C interface */ -+#define NBG460N_GPIO_PCF8563_SDA 8 -+#define NBG460N_GPIO_PCF8563_SCK 7 -+ -+/* Switch configuration I2C interface */ -+#define NBG460N_GPIO_RTL8366_SDA 16 -+#define NBG460N_GPIO_RTL8366_SCK 18 -+ -+static struct mtd_partition nbg460n_partitions[] = { -+ { -+ .name = "Bootbase", -+ .offset = 0, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "U-Boot Config", -+ .offset = 0x010000, -+ .size = 0x030000, -+ }, { -+ .name = "U-Boot", -+ .offset = 0x040000, -+ .size = 0x030000, -+ }, { -+ .name = "linux", -+ .offset = 0x070000, -+ .size = 0x0e0000, -+ }, { -+ .name = "rootfs", -+ .offset = 0x150000, -+ .size = 0x2a0000, -+ }, { -+ .name = "CalibData", -+ .offset = 0x3f0000, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x070000, -+ .size = 0x380000, -+ } -+}; -+ -+static struct flash_platform_data nbg460n_flash_data = { -+ .parts = nbg460n_partitions, -+ .nr_parts = ARRAY_SIZE(nbg460n_partitions), -+}; -+ -+static struct gpio_led nbg460n_leds_gpio[] __initdata = { -+ { -+ .name = "nbg460n:green:power", -+ .gpio = NBG460N_GPIO_LED_POWER, -+ .active_low = 0, -+ .default_trigger = "default-on", -+ }, { -+ .name = "nbg460n:green:wps", -+ .gpio = NBG460N_GPIO_LED_WPS, -+ .active_low = 0, -+ }, { -+ .name = "nbg460n:green:wlan", -+ .gpio = NBG460N_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, { -+ /* Not really for controlling the LED, -+ when set low the LED blinks uncontrollable */ -+ .name = "nbg460n:green:wan", -+ .gpio = NBG460N_GPIO_LED_WAN, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG460N_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG460N_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct i2c_gpio_platform_data nbg460n_i2c_device_platdata = { -+ .sda_pin = NBG460N_GPIO_PCF8563_SDA, -+ .scl_pin = NBG460N_GPIO_PCF8563_SCK, -+ .udelay = 10, -+}; -+ -+static struct platform_device nbg460n_i2c_device = { -+ .name = "i2c-gpio", -+ .id = -1, -+ .num_resources = 0, -+ .resource = NULL, -+ .dev = { -+ .platform_data = &nbg460n_i2c_device_platdata, -+ }, -+}; -+ -+static struct i2c_board_info nbg460n_i2c_devs[] __initdata = { -+ { -+ I2C_BOARD_INFO("pcf8563", 0x51), -+ }, -+}; -+ -+static void nbg460n_i2c_init(void) -+{ -+ /* The gpio interface */ -+ platform_device_register(&nbg460n_i2c_device); -+ /* I2C devices */ -+ i2c_register_board_info(0, nbg460n_i2c_devs, -+ ARRAY_SIZE(nbg460n_i2c_devs)); -+} -+ -+ -+static struct rtl8366_platform_data nbg460n_rtl8366s_data = { -+ .gpio_sda = NBG460N_GPIO_RTL8366_SDA, -+ .gpio_sck = NBG460N_GPIO_RTL8366_SCK, -+}; -+ -+static struct platform_device nbg460n_rtl8366s_device = { -+ .name = RTL8366S_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &nbg460n_rtl8366s_data, -+ } -+}; -+ -+static void __init nbg460n_setup(void) -+{ -+ /* end of bootloader sector contains mac address */ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8); -+ /* last sector contains wlan calib data */ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* LAN Port */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ /* WAN Port */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ ath79_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ /* register the switch phy */ -+ platform_device_register(&nbg460n_rtl8366s_device); -+ -+ /* register flash */ -+ ath79_register_m25p80(&nbg460n_flash_data); -+ -+ ath79_register_wmac(eeprom, mac); -+ -+ /* register RTC chip */ -+ nbg460n_i2c_init(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio), -+ nbg460n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(nbg460n_gpio_keys), -+ nbg460n_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", -+ nbg460n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-nbg6716.c linux-4.1.13/arch/mips/ath79/mach-nbg6716.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-nbg6716.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-nbg6716.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,381 @@ -+/* -+ * ZyXEL NBG6716/NBG6616 board support -+ * -+ * Based on the Qualcomm Atheros AP135/AP136 reference board support code -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012-2013 Gabor Juhos -+ * Copyright (c) 2013 Andre Valentin -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-nfc.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define NBG6716_GPIO_LED_INTERNET 18 -+#define NBG6716_GPIO_LED_POWER 15 -+#define NBG6716_GPIO_LED_USB1 4 -+#define NBG6716_GPIO_LED_USB2 13 -+#define NBG6716_GPIO_LED_WIFI2G 19 -+#define NBG6716_GPIO_LED_WIFI5G 17 -+#define NBG6716_GPIO_LED_WPS 21 -+ -+#define NBG6716_GPIO_BTN_RESET 23 -+#define NBG6716_GPIO_BTN_RFKILL 1 -+#define NBG6716_GPIO_BTN_USB1 0 -+#define NBG6716_GPIO_BTN_USB2 14 -+#define NBG6716_GPIO_BTN_WPS 22 -+ -+#define NBG6716_GPIO_USB_POWER 16 -+ -+#define NBG6716_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define NBG6716_KEYS_DEBOUNCE_INTERVAL (3 * NBG6716_KEYS_POLL_INTERVAL) -+ -+#define NBG6716_MAC0_OFFSET 0 -+#define NBG6716_MAC1_OFFSET 6 -+#define NBG6716_WMAC_CALDATA_OFFSET 0x1000 -+#define NBG6716_PCIE_CALDATA_OFFSET 0x5000 -+ -+/* NBG6616 has a different GPIO usage as it does not have USB Buttons */ -+#define NBG6616_GPIO_LED_USB0 14 -+#define NBG6616_GPIO_LED_USB1 21 -+#define NBG6616_GPIO_LED_WPS 0 -+ -+static struct gpio_led nbg6716_leds_gpio[] __initdata = { -+ { -+ .name = "nbg6716:white:internet", -+ .gpio = NBG6716_GPIO_LED_INTERNET, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6716:white:power", -+ .gpio = NBG6716_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6716:white:usb1", -+ .gpio = NBG6716_GPIO_LED_USB1, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6716:white:usb2", -+ .gpio = NBG6716_GPIO_LED_USB2, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6716:white:wifi2g", -+ .gpio = NBG6716_GPIO_LED_WIFI2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6716:white:wifi5g", -+ .gpio = NBG6716_GPIO_LED_WIFI5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6716:white:wps", -+ .gpio = NBG6716_GPIO_LED_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button nbg6716_gpio_keys[] __initdata = { -+ { -+ .desc = "RESET button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL button", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_RFKILL, -+ .active_low = 0, -+ }, -+ { -+ .desc = "USB1 eject button", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_USB1, -+ .active_low = 1, -+ }, -+ { -+ .desc = "USB2 eject button", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_USB2, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+ -+ -+static struct gpio_led nbg6616_leds_gpio[] __initdata = { -+ { -+ .name = "nbg6616:green:power", -+ .gpio = NBG6716_GPIO_LED_POWER, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6616:green:usb2", -+ .gpio = NBG6616_GPIO_LED_USB0, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6616:green:usb1", -+ .gpio = NBG6616_GPIO_LED_USB1, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6616:green:wifi2g", -+ .gpio = NBG6716_GPIO_LED_WIFI2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6616:green:wifi5g", -+ .gpio = NBG6716_GPIO_LED_WIFI5G, -+ .active_low = 1, -+ }, -+ { -+ .name = "nbg6616:green:wps", -+ .gpio = NBG6616_GPIO_LED_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button nbg6616_gpio_keys[] __initdata = { -+ { -+ .desc = "RESET button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_RFKILL, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = NBG6716_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+ -+static struct ar8327_pad_cfg nbg6716_ar8327_pad0_cfg; -+static struct ar8327_pad_cfg nbg6716_ar8327_pad6_cfg; -+static struct ar8327_led_cfg nbg6716_ar8327_led_cfg; -+ -+static struct ar8327_platform_data nbg6716_ar8327_data = { -+ .pad0_cfg = &nbg6716_ar8327_pad0_cfg, -+ .pad6_cfg = &nbg6716_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &nbg6716_ar8327_led_cfg -+}; -+ -+static struct mdio_board_info nbg6716_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &nbg6716_ar8327_data, -+ }, -+}; -+ -+static void nbg6716_get_mac(void* nvram_addr, const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(nvram_addr); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, 0x10000, -+ name, mac); -+ if (err) -+ pr_err("no MAC address found for %s\n", name); -+} -+ -+static void __init nbg6716_common_setup(u32 leds_num, struct gpio_led* leds, -+ u32 keys_num, -+ struct gpio_keys_button* keys, -+ void* art_addr, void* nvram) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(art_addr); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, leds_num, leds); -+ ath79_register_gpio_keys_polled(-1, NBG6716_KEYS_POLL_INTERVAL, -+ keys_num, keys); -+ -+ ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); -+ ath79_register_nfc(); -+ -+ gpio_request_one(NBG6716_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ -+ ath79_register_usb(); -+ -+ nbg6716_get_mac(nvram, "ethaddr=", tmpmac); -+ -+ ath79_register_pci(); -+ -+ ath79_register_wmac(art + NBG6716_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, tmpmac, 2); -+ ath79_init_mac(ath79_eth1_data.mac_addr, tmpmac, 3); -+ -+ mdiobus_register_board_info(nbg6716_mdio0_info, -+ ARRAY_SIZE(nbg6716_mdio0_info)); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+} -+ -+static void __init nbg6716_010_setup(void) -+{ -+ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ -+ nbg6716_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; -+ nbg6716_ar8327_pad0_cfg.txclk_delay_en = true; -+ nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true; -+ nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; -+ nbg6716_ar8327_pad0_cfg.mac06_exchange_en = true; -+ -+ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ -+ nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; -+ nbg6716_ar8327_pad6_cfg.rxclk_delay_en = true; -+ nbg6716_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ nbg6716_ar8327_led_cfg.open_drain = 0; -+ nbg6716_ar8327_led_cfg.led_ctrl0 = 0xffb7ffb7; -+ nbg6716_ar8327_led_cfg.led_ctrl1 = 0xffb7ffb7; -+ nbg6716_ar8327_led_cfg.led_ctrl2 = 0xffb7ffb7; -+ nbg6716_ar8327_led_cfg.led_ctrl3 = 0x03ffff00; -+ -+ nbg6716_common_setup(ARRAY_SIZE(nbg6716_leds_gpio), nbg6716_leds_gpio, -+ ARRAY_SIZE(nbg6716_gpio_keys), nbg6716_gpio_keys, -+ (void*) 0x1f050000, (void*) 0x1f040000); -+} -+ -+static void __init nbg6616_010_setup(void) -+{ -+ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ -+ nbg6716_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; -+ nbg6716_ar8327_pad0_cfg.txclk_delay_en = true; -+ nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true; -+ nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; -+ -+ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ -+ nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; -+ nbg6716_ar8327_pad6_cfg.rxclk_delay_en = true; -+ nbg6716_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ nbg6716_ar8327_led_cfg.open_drain = 0; -+ nbg6716_ar8327_led_cfg.led_ctrl0 = 0xffb7ffb7; -+ nbg6716_ar8327_led_cfg.led_ctrl1 = 0xffb7ffb7; -+ nbg6716_ar8327_led_cfg.led_ctrl2 = 0xffb7ffb7; -+ nbg6716_ar8327_led_cfg.led_ctrl3 = 0x03ffff00; -+ -+ -+ nbg6716_common_setup(ARRAY_SIZE(nbg6616_leds_gpio), nbg6616_leds_gpio, -+ ARRAY_SIZE(nbg6616_gpio_keys), nbg6616_gpio_keys, -+ (void*) 0x1f040000, (void*) 0x1f030000); -+} -+ -+ -+MIPS_MACHINE(ATH79_MACH_NBG6716, "NBG6716", -+ "Zyxel NBG6716", -+ nbg6716_010_setup); -+ -+MIPS_MACHINE(ATH79_MACH_NBG6616, "NBG6616", -+ "Zyxel NBG6616", -+ nbg6616_010_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-om2p.c linux-4.1.13/arch/mips/ath79/mach-om2p.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-om2p.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-om2p.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,225 @@ -+/* -+ * OpenMesh OM2P support -+ * -+ * Copyright (C) 2011 Marek Lindner -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define OM2P_GPIO_LED_POWER 0 -+#define OM2P_GPIO_LED_GREEN 13 -+#define OM2P_GPIO_LED_RED 14 -+#define OM2P_GPIO_LED_YELLOW 15 -+#define OM2P_GPIO_LED_LAN 16 -+#define OM2P_GPIO_LED_WAN 17 -+#define OM2P_GPIO_BTN_RESET 1 -+ -+#define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL) -+ -+#define OM2P_WAN_PHYMASK BIT(4) -+ -+#define OM2P_LC_GPIO_LED_POWER 1 -+#define OM2P_LC_GPIO_LED_GREEN 15 -+#define OM2P_LC_GPIO_LED_RED 16 -+#define OM2P_LC_GPIO_LED_YELLOW 0 -+#define OM2P_LC_GPIO_LED_LAN 13 -+#define OM2P_LC_GPIO_LED_WAN 17 -+#define OM2P_LC_GPIO_BTN_RESET 12 -+ -+static struct flash_platform_data om2p_flash_data = { -+ .type = "s25sl12800", -+ .name = "ar7240-nor0", -+}; -+ -+static struct gpio_led om2p_leds_gpio[] __initdata = { -+ { -+ .name = "om2p:blue:power", -+ .gpio = OM2P_GPIO_LED_POWER, -+ .active_low = 1, -+ }, { -+ .name = "om2p:red:wifi", -+ .gpio = OM2P_GPIO_LED_RED, -+ .active_low = 1, -+ }, { -+ .name = "om2p:yellow:wifi", -+ .gpio = OM2P_GPIO_LED_YELLOW, -+ .active_low = 1, -+ }, { -+ .name = "om2p:green:wifi", -+ .gpio = OM2P_GPIO_LED_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "om2p:blue:lan", -+ .gpio = OM2P_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "om2p:blue:wan", -+ .gpio = OM2P_GPIO_LED_WAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button om2p_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = OM2P_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init om2p_setup(void) -+{ -+ u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); -+ u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); -+ u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_m25p80(&om2p_flash_data); -+ -+ ath79_register_mdio(0, ~OM2P_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), -+ om2p_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(om2p_gpio_keys), -+ om2p_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup); -+ -+ -+static struct flash_platform_data om2p_lc_flash_data = { -+ .type = "s25sl12800", -+}; -+ -+static void __init om2p_lc_setup(void) -+{ -+ u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); -+ u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); -+ u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000); -+ u32 t; -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); -+ -+ ath79_register_m25p80(&om2p_lc_flash_data); -+ -+ om2p_leds_gpio[0].gpio = OM2P_LC_GPIO_LED_POWER; -+ om2p_leds_gpio[1].gpio = OM2P_LC_GPIO_LED_RED; -+ om2p_leds_gpio[2].gpio = OM2P_LC_GPIO_LED_YELLOW; -+ om2p_leds_gpio[3].gpio = OM2P_LC_GPIO_LED_GREEN; -+ om2p_leds_gpio[4].gpio = OM2P_LC_GPIO_LED_LAN; -+ om2p_leds_gpio[5].gpio = OM2P_LC_GPIO_LED_WAN; -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), -+ om2p_leds_gpio); -+ -+ om2p_gpio_keys[0].gpio = OM2P_LC_GPIO_BTN_RESET; -+ ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(om2p_gpio_keys), -+ om2p_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(art, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup); -+MIPS_MACHINE(ATH79_MACH_OM2Pv2, "OM2Pv2", "OpenMesh OM2Pv2", om2p_lc_setup); -+ -+static void __init om2p_hs_setup(void) -+{ -+ u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); -+ u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); -+ u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000); -+ -+ /* make lan / wan leds software controllable */ -+ ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); -+ -+ /* enable reset button */ -+ ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); -+ -+ om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN; -+ om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN; -+ -+ ath79_register_m25p80(&om2p_lc_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), -+ om2p_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(om2p_gpio_keys), -+ om2p_gpio_keys); -+ -+ ath79_register_wmac(art, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup); -+MIPS_MACHINE(ATH79_MACH_OM2P_HSv2, "OM2P-HSv2", "OpenMesh OM2P HSv2", om2p_hs_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-om5p.c linux-4.1.13/arch/mips/ath79/mach-om5p.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-om5p.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-om5p.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,218 @@ -+/* -+ * OpenMesh OM5P support -+ * -+ * Copyright (C) 2013 Marek Lindner -+ * Copyright (C) 2014 Sven Eckelmann -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define OM5P_GPIO_LED_POWER 13 -+#define OM5P_GPIO_LED_GREEN 16 -+#define OM5P_GPIO_LED_RED 19 -+#define OM5P_GPIO_LED_YELLOW 17 -+#define OM5P_GPIO_LED_LAN 14 -+#define OM5P_GPIO_LED_WAN 15 -+#define OM5P_GPIO_BTN_RESET 4 -+#define OM5P_GPIO_I2C_SCL 20 -+#define OM5P_GPIO_I2C_SDA 21 -+ -+#define OM5P_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define OM5P_KEYS_DEBOUNCE_INTERVAL (3 * OM5P_KEYS_POLL_INTERVAL) -+ -+#define OM5P_WMAC_CALDATA_OFFSET 0x1000 -+#define OM5P_PCI_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led om5p_leds_gpio[] __initdata = { -+ { -+ .name = "om5p:blue:power", -+ .gpio = OM5P_GPIO_LED_POWER, -+ .active_low = 1, -+ }, { -+ .name = "om5p:red:wifi", -+ .gpio = OM5P_GPIO_LED_RED, -+ .active_low = 1, -+ }, { -+ .name = "om5p:yellow:wifi", -+ .gpio = OM5P_GPIO_LED_YELLOW, -+ .active_low = 1, -+ }, { -+ .name = "om5p:green:wifi", -+ .gpio = OM5P_GPIO_LED_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "om5p:blue:lan", -+ .gpio = OM5P_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "om5p:blue:wan", -+ .gpio = OM5P_GPIO_LED_WAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button om5p_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = OM5P_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = OM5P_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct flash_platform_data om5p_flash_data = { -+ .type = "mx25l12805d", -+}; -+ -+static void __init om5p_setup(void) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); -+ u8 mac[6]; -+ -+ /* make lan / wan leds software controllable */ -+ ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_m25p80(&om5p_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), -+ om5p_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, OM5P_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(om5p_gpio_keys), -+ om5p_gpio_keys); -+ -+ ath79_init_mac(mac, art, 2); -+ ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup); -+ -+static struct i2c_gpio_platform_data om5pan_i2c_device_platdata = { -+ .sda_pin = OM5P_GPIO_I2C_SDA, -+ .scl_pin = OM5P_GPIO_I2C_SCL, -+ .udelay = 10, -+ .sda_is_open_drain = 1, -+ .scl_is_open_drain = 1, -+}; -+ -+static struct platform_device om5pan_i2c_device = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &om5pan_i2c_device_platdata, -+ }, -+}; -+ -+static struct i2c_board_info om5pan_i2c_devs[] __initdata = { -+ { -+ I2C_BOARD_INFO("tmp423", 0x4c), -+ }, -+}; -+ -+static struct at803x_platform_data om5p_an_at803x_data = { -+ .disable_smarteee = 1, -+ .enable_rgmii_rx_delay = 1, -+ .enable_rgmii_tx_delay = 1, -+}; -+ -+static struct mdio_board_info om5p_an_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 7, -+ .platform_data = &om5p_an_at803x_data, -+ }, -+}; -+ -+static void __init om5p_an_setup(void) -+{ -+ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); -+ u8 mac[6]; -+ -+ /* temperature sensor */ -+ platform_device_register(&om5pan_i2c_device); -+ i2c_register_board_info(0, om5pan_i2c_devs, -+ ARRAY_SIZE(om5pan_i2c_devs)); -+ -+ /* make lan / wan leds software controllable */ -+ ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); -+ ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_m25p80(&om5p_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), -+ om5p_leds_gpio); -+ -+ ath79_init_mac(mac, art, 0x02); -+ ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_setup_ar934x_eth_rx_delay(2, 2); -+ ath79_register_mdio(0, 0x0); -+ ath79_register_mdio(1, 0x0); -+ -+ mdiobus_register_board_info(om5p_an_mdio0_info, -+ ARRAY_SIZE(om5p_an_mdio0_info)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01); -+ -+ /* GMAC0 is connected to the PHY7 */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_data.phy_mask = BIT(7); -+ ath79_eth0_pll_data.pll_1000 = 0x02000000; -+ ath79_eth0_pll_data.pll_100 = 0x00000101; -+ ath79_eth0_pll_data.pll_10 = 0x00001313; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(1); -+ -+ ath79_init_mac(mac, art, 0x10); -+ ap91_pci_init(art + OM5P_PCI_CALDATA_OFFSET, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_OM5P_AN, "OM5P-AN", "OpenMesh OM5P AN", om5p_an_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-onion-omega.c linux-4.1.13/arch/mips/ath79/mach-onion-omega.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-onion-omega.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-onion-omega.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,84 @@ -+/* -+ * Onion Omega board support -+ * -+ * Copyright (C) 2015 Boken Lin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define OMEGA_GPIO_LED_SYSTEM 27 -+#define OMEGA_GPIO_BTN_RESET 11 -+ -+#define OMEGA_GPIO_USB_POWER 8 -+ -+#define OMEGA_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define OMEGA_KEYS_DEBOUNCE_INTERVAL (3 * OMEGA_KEYS_POLL_INTERVAL) -+ -+static const char *omega_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data omega_flash_data = { -+ .part_probes = omega_part_probes, -+}; -+ -+static struct gpio_led omega_leds_gpio[] __initdata = { -+ { -+ .name = "onion:amber:system", -+ .gpio = OMEGA_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button omega_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = OMEGA_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = OMEGA_GPIO_BTN_RESET, -+ .active_low = 0, -+ } -+}; -+ -+static void __init onion_omega_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&omega_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(omega_leds_gpio), -+ omega_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, OMEGA_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(omega_gpio_keys), -+ omega_gpio_keys); -+ -+ gpio_request_one(OMEGA_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ONION_OMEGA, "ONION-OMEGA", "Onion Omega", onion_omega_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-pb42.c linux-4.1.13/arch/mips/ath79/mach-pb42.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-pb42.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-pb42.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,83 @@ -+/* -+ * Atheros PB42 board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define PB42_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define PB42_KEYS_DEBOUNCE_INTERVAL (3 * PB42_KEYS_POLL_INTERVAL) -+ -+#define PB42_GPIO_BTN_SW4 8 -+#define PB42_GPIO_BTN_SW5 3 -+ -+static struct gpio_keys_button pb42_gpio_keys[] __initdata = { -+ { -+ .desc = "sw4", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = PB42_GPIO_BTN_SW4, -+ .active_low = 1, -+ }, { -+ .desc = "sw5", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = PB42_GPIO_BTN_SW5, -+ .active_low = 1, -+ } -+}; -+ -+static const char *pb42_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data pb42_flash_data = { -+ .part_probes = pb42_part_probes, -+}; -+ -+#define PB42_WAN_PHYMASK BIT(20) -+#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) -+#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) -+ -+static void __init pb42_init(void) -+{ -+ ath79_register_m25p80(&pb42_flash_data); -+ -+ ath79_register_mdio(0, ~PB42_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = PB42_WAN_PHYMASK; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.speed = SPEED_100; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(pb42_gpio_keys), -+ pb42_gpio_keys); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_PB42, "PB42", "Atheros PB42", pb42_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-pb44.c linux-4.1.13/arch/mips/ath79/mach-pb44.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-pb44.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-pb44.c 2015-12-04 19:57:04.334081334 +0100 -@@ -8,23 +8,48 @@ - * by the Free Software Foundation. - */ - -+#include - #include - #include - #include - #include - #include -+#include -+#include -+#include - --#include "machtypes.h" -+#include -+#include -+ -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-spi.h" - #include "dev-usb.h" -+#include "machtypes.h" - #include "pci.h" - - #define PB44_GPIO_I2C_SCL 0 - #define PB44_GPIO_I2C_SDA 1 - -+#define PB44_PCF8757_VSC7395_CS 0 -+#define PB44_PCF8757_STEREO_CS 1 -+#define PB44_PCF8757_SLIC_CS0 2 -+#define PB44_PCF8757_SLIC_TEST 3 -+#define PB44_PCF8757_SLIC_INT0 4 -+#define PB44_PCF8757_SLIC_INT1 5 -+#define PB44_PCF8757_SW_RESET 6 -+#define PB44_PCF8757_SW_JUMP 8 -+#define PB44_PCF8757_LED_JUMP1 9 -+#define PB44_PCF8757_LED_JUMP2 10 -+#define PB44_PCF8757_TP24 11 -+#define PB44_PCF8757_TP25 12 -+#define PB44_PCF8757_TP26 13 -+#define PB44_PCF8757_TP27 14 -+#define PB44_PCF8757_TP28 15 -+ - #define PB44_GPIO_EXP_BASE 16 -+#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) - #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) - #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) - #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) -@@ -87,20 +112,71 @@ - } - }; - -+static struct ath79_spi_controller_data pb44_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ -+static struct ath79_spi_controller_data pb44_spi1_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_GPIO, -+ .cs_line = PB44_GPIO_VSC7395_CS, -+}; -+ -+static void pb44_vsc7395_reset(void) -+{ -+ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); -+ udelay(10); -+ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); -+ mdelay(50); -+} -+ -+static struct vsc7385_platform_data pb44_vsc7395_data = { -+ .reset = pb44_vsc7395_reset, -+ .ucode_name = "vsc7395_ucode_pb44.bin", -+ .mac_cfg = { -+ .tx_ipg = 6, -+ .bit2 = 1, -+ .clk_sel = 0, -+ }, -+}; -+ -+static const char *pb44_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data pb44_flash_data = { -+ .part_probes = pb44_part_probes, -+}; -+ - static struct spi_board_info pb44_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p64", -+ .platform_data = &pb44_flash_data, -+ .controller_data = &pb44_spi0_data, - }, -+ { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 25000000, -+ .modalias = "spi-vsc7385", -+ .platform_data = &pb44_vsc7395_data, -+ .controller_data = &pb44_spi1_data, -+ } - }; - - static struct ath79_spi_platform_data pb44_spi_data = { - .bus_num = 0, -- .num_chipselect = 1, -+ .num_chipselect = 2, - }; - -+#define PB44_WAN_PHYMASK BIT(0) -+#define PB44_LAN_PHYMASK 0 -+#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) -+ - static void __init pb44_init(void) - { - i2c_register_board_info(0, pb44_i2c_board_info, -@@ -116,6 +192,22 @@ - ARRAY_SIZE(pb44_spi_info)); - ath79_register_usb(); - ath79_register_pci(); -+ -+ ath79_register_mdio(0, ~PB44_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x110000; -+ -+ ath79_register_eth(1); - } - - MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-pb92.c linux-4.1.13/arch/mips/ath79/mach-pb92.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-pb92.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-pb92.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,70 @@ -+/* -+ * Atheros PB92 board support -+ * -+ * Copyright (C) 2010 Felix Fietkau -+ * Copyright (C) 2008-2009 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL) -+ -+#define PB92_GPIO_BTN_SW4 8 -+#define PB92_GPIO_BTN_SW5 3 -+ -+static struct gpio_keys_button pb92_gpio_keys[] __initdata = { -+ { -+ .desc = "sw4", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = PB92_GPIO_BTN_SW4, -+ .active_low = 1, -+ }, { -+ .desc = "sw5", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = PB92_GPIO_BTN_SW5, -+ .active_low = 1, -+ } -+}; -+ -+static void __init pb92_init(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~BIT(0)); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_register_eth(0); -+ -+ ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(pb92_gpio_keys), -+ pb92_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-qihoo-c301.c linux-4.1.13/arch/mips/ath79/mach-qihoo-c301.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-qihoo-c301.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-qihoo-c301.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,166 @@ -+/* -+ * Qihoo 360 C301 board support -+ * -+ * Copyright (C) 2013 Gabor Juhos -+ * Copyright (C) 2014 Weijie Gao -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define QIHOO_C301_GPIO_LED_STATUS_GREEN 0 -+#define QIHOO_C301_GPIO_LED_STATUS_RED 11 -+ -+#define QIHOO_C301_GPIO_LED_WAN 1 -+#define QIHOO_C301_GPIO_LED_LAN1 2 -+#define QIHOO_C301_GPIO_LED_LAN2 3 -+#define QIHOO_C301_GPIO_ETH_LEN_EN 18 -+ -+#define QIHOO_C301_GPIO_BTN_RESET 16 -+ -+#define QIHOO_C301_GPIO_USB_POWER 19 -+ -+#define QIHOO_C301_GPIO_SPI_CS1 12 -+ -+#define QIHOO_C301_GPIO_EXTERNAL_LNA0 14 -+#define QIHOO_C301_GPIO_EXTERNAL_LNA1 15 -+ -+#define QIHOO_C301_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define QIHOO_C301_KEYS_DEBOUNCE_INTERVAL \ -+ (3 * QIHOO_C301_KEYS_POLL_INTERVAL) -+ -+#define QIHOO_C301_WMAC_CALDATA_OFFSET 0x1000 -+ -+#define QIHOO_C301_NVRAM_ADDR 0x1f058010 -+#define QIHOO_C301_NVRAM_SIZE 0x7ff0 -+ -+static struct gpio_led qihoo_c301_leds_gpio[] __initdata = { -+ { -+ .name = "qihoo:green:status", -+ .gpio = QIHOO_C301_GPIO_LED_STATUS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "qihoo:red:status", -+ .gpio = QIHOO_C301_GPIO_LED_STATUS_RED, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button qihoo_c301_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = QIHOO_C301_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = QIHOO_C301_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct flash_platform_data flash __initdata = {NULL, NULL, 0}; -+ -+static void qihoo_c301_get_mac(const char *name, char *mac) -+{ -+ u8 *nvram = (u8 *) KSEG1ADDR(QIHOO_C301_NVRAM_ADDR); -+ int err; -+ -+ err = ath79_nvram_parse_mac_addr(nvram, QIHOO_C301_NVRAM_SIZE, -+ name, mac); -+ if (err) -+ pr_err("no MAC address found for %s\n", name); -+} -+ -+static void __init qihoo_c301_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80_multi(&flash); -+ -+ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); -+ -+ ath79_gpio_output_select(QIHOO_C301_GPIO_LED_WAN, -+ AR934X_GPIO_OUT_LED_LINK4); -+ ath79_gpio_output_select(QIHOO_C301_GPIO_LED_LAN1, -+ AR934X_GPIO_OUT_LED_LINK1); -+ ath79_gpio_output_select(QIHOO_C301_GPIO_LED_LAN2, -+ AR934X_GPIO_OUT_LED_LINK2); -+ -+ ath79_gpio_output_select(QIHOO_C301_GPIO_SPI_CS1, -+ AR934X_GPIO_OUT_SPI_CS1); -+ -+ gpio_request_one(QIHOO_C301_GPIO_ETH_LEN_EN, -+ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, -+ "Ethernet LED enable"); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(qihoo_c301_leds_gpio), -+ qihoo_c301_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, QIHOO_C301_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(qihoo_c301_gpio_keys), -+ qihoo_c301_gpio_keys); -+ -+ ath79_wmac_set_ext_lna_gpio(0, QIHOO_C301_GPIO_EXTERNAL_LNA0); -+ ath79_wmac_set_ext_lna_gpio(1, QIHOO_C301_GPIO_EXTERNAL_LNA1); -+ -+ qihoo_c301_get_mac("wlan24mac=", tmpmac); -+ ath79_register_wmac(art + QIHOO_C301_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_register_pci(); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE | -+ AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* LAN */ -+ qihoo_c301_get_mac("lanmac=", ath79_eth1_data.mac_addr); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ qihoo_c301_get_mac("wanmac=", ath79_eth0_data.mac_addr); -+ -+ /* GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(0); -+ -+ gpio_request_one(QIHOO_C301_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_QIHOO_C301, "QIHOO-C301", "Qihoo 360 C301", -+ qihoo_c301_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-r6100.c linux-4.1.13/arch/mips/ath79/mach-r6100.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-r6100.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-r6100.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,146 @@ -+/* -+ * NETGEAR R6100 board support -+ * -+ * Copyright (C) 2014 Gabor Juhos -+ * Copyright (C) 2014 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-nfc.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define R6100_GPIO_LED_WLAN 0 -+#define R6100_GPIO_LED_USB 11 -+#define R6100_GPIO_LED_WAN_GREEN 13 -+#define R6100_GPIO_LED_POWER_AMBER 14 -+#define R6100_GPIO_LED_WAN_AMBER 15 -+#define R6100_GPIO_LED_POWER_GREEN 17 -+ -+#define R6100_GPIO_BTN_WIRELESS 1 -+#define R6100_GPIO_BTN_WPS 3 -+#define R6100_GPIO_BTN_RESET 12 -+ -+#define R6100_GPIO_USB_POWER 16 -+ -+#define R6100_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define R6100_KEYS_DEBOUNCE_INTERVAL (3 * R6100_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led r6100_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = R6100_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:power", -+ .gpio = R6100_GPIO_LED_POWER_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:wan", -+ .gpio = R6100_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:wan", -+ .gpio = R6100_GPIO_LED_WAN_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:blue:usb", -+ .gpio = R6100_GPIO_LED_USB, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:blue:wlan", -+ .gpio = R6100_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button r6100_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = R6100_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = R6100_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = R6100_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = R6100_GPIO_BTN_WPS, -+ .active_low = 0, -+ }, -+ { -+ .desc = "RFKILL switch", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = R6100_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = R6100_GPIO_BTN_WIRELESS, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init r6100_setup(void) -+{ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(r6100_leds_gpio), -+ r6100_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, R6100_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(r6100_gpio_keys), -+ r6100_gpio_keys); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ gpio_request_one(R6100_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ -+ ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); -+ ath79_register_nfc(); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac_simple(); -+ -+ ap91_pci_init_simple(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_R6100, "R6100", "NETGEAR R6100", -+ r6100_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb2011.c linux-4.1.13/arch/mips/ath79/mach-rb2011.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rb2011.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rb2011.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,338 @@ -+/* -+ * MikroTik RouterBOARD 2011 support -+ * -+ * Copyright (C) 2012 Stijn Tintel -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) "rb2011: " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "routerboot.h" -+ -+#define RB2011_GPIO_NAND_NCE 14 -+#define RB2011_GPIO_SFP_LOS 21 -+ -+#define RB_ROUTERBOOT_OFFSET 0x0000 -+#define RB_ROUTERBOOT_MIN_SIZE 0xb000 -+#define RB_HARD_CFG_SIZE 0x1000 -+#define RB_BIOS_OFFSET 0xd000 -+#define RB_BIOS_SIZE 0x1000 -+#define RB_SOFT_CFG_OFFSET 0xf000 -+#define RB_SOFT_CFG_SIZE 0x1000 -+ -+#define RB_ART_SIZE 0x10000 -+ -+#define RB2011_FLAG_SFP BIT(0) -+#define RB2011_FLAG_USB BIT(1) -+#define RB2011_FLAG_WLAN BIT(2) -+ -+static struct mtd_partition rb2011_spi_partitions[] = { -+ { -+ .name = "routerboot", -+ .offset = RB_ROUTERBOOT_OFFSET, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "hard_config", -+ .size = RB_HARD_CFG_SIZE, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "bios", -+ .offset = RB_BIOS_OFFSET, -+ .size = RB_BIOS_SIZE, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "soft_config", -+ .size = RB_SOFT_CFG_SIZE, -+ } -+}; -+ -+static void __init rb2011_init_partitions(const struct rb_info *info) -+{ -+ rb2011_spi_partitions[0].size = info->hard_cfg_offs; -+ rb2011_spi_partitions[1].offset = info->hard_cfg_offs; -+ rb2011_spi_partitions[3].offset = info->soft_cfg_offs; -+} -+ -+static struct mtd_partition rb2011_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, -+ { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct flash_platform_data rb2011_spi_flash_data = { -+ .parts = rb2011_spi_partitions, -+ .nr_parts = ARRAY_SIZE(rb2011_spi_partitions), -+}; -+ -+static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL3, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -+}; -+ -+static struct ar8327_pad_cfg rb2011_ar8327_pad6_cfg; -+static struct ar8327_sgmii_cfg rb2011_ar8327_sgmii_cfg; -+ -+static struct ar8327_led_cfg rb2011_ar8327_led_cfg = { -+ .led_ctrl0 = 0xc731c731, -+ .led_ctrl1 = 0x00000000, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x0030c300, -+ .open_drain = false, -+}; -+ -+static const struct ar8327_led_info rb2011_ar8327_leds[] __initconst = { -+ AR8327_LED_INFO(PHY0_0, HW, "rb:green:eth1"), -+ AR8327_LED_INFO(PHY1_0, HW, "rb:green:eth2"), -+ AR8327_LED_INFO(PHY2_0, HW, "rb:green:eth3"), -+ AR8327_LED_INFO(PHY3_0, HW, "rb:green:eth4"), -+ AR8327_LED_INFO(PHY4_0, HW, "rb:green:eth5"), -+ AR8327_LED_INFO(PHY0_1, SW, "rb:green:eth6"), -+ AR8327_LED_INFO(PHY1_1, SW, "rb:green:eth7"), -+ AR8327_LED_INFO(PHY2_1, SW, "rb:green:eth8"), -+ AR8327_LED_INFO(PHY3_1, SW, "rb:green:eth9"), -+ AR8327_LED_INFO(PHY4_1, SW, "rb:green:eth10"), -+ AR8327_LED_INFO(PHY4_2, SW, "rb:green:usr"), -+}; -+ -+static struct ar8327_platform_data rb2011_ar8327_data = { -+ .pad0_cfg = &rb2011_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &rb2011_ar8327_led_cfg, -+ .num_leds = ARRAY_SIZE(rb2011_ar8327_leds), -+ .leds = rb2011_ar8327_leds, -+}; -+ -+static struct mdio_board_info rb2011_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &rb2011_ar8327_data, -+ }, -+}; -+ -+static void __init rb2011_wlan_init(void) -+{ -+ char *art_buf; -+ u8 wlan_mac[ETH_ALEN]; -+ -+ art_buf = rb_get_wlan_data(); -+ if (art_buf == NULL) -+ return; -+ -+ ath79_init_mac(wlan_mac, ath79_mac_base, 11); -+ ath79_register_wmac(art_buf + 0x1000, wlan_mac); -+ -+ kfree(art_buf); -+} -+ -+static void rb2011_nand_select_chip(int chip_no) -+{ -+ switch (chip_no) { -+ case 0: -+ gpio_set_value(RB2011_GPIO_NAND_NCE, 0); -+ break; -+ default: -+ gpio_set_value(RB2011_GPIO_NAND_NCE, 1); -+ break; -+ } -+ ndelay(500); -+} -+ -+static struct nand_ecclayout rb2011_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static int rb2011_nand_scan_fixup(struct mtd_info *mtd) -+{ -+ struct nand_chip *chip = mtd->priv; -+ -+ if (mtd->writesize == 512) { -+ /* -+ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot -+ * will not be able to find the kernel that we load. -+ */ -+ chip->ecc.layout = &rb2011_nand_ecclayout; -+ } -+ -+ return 0; -+} -+ -+static void __init rb2011_nand_init(void) -+{ -+ gpio_request_one(RB2011_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); -+ -+ ath79_nfc_set_scan_fixup(rb2011_nand_scan_fixup); -+ ath79_nfc_set_parts(rb2011_nand_partitions, -+ ARRAY_SIZE(rb2011_nand_partitions)); -+ ath79_nfc_set_select_chip(rb2011_nand_select_chip); -+ ath79_nfc_set_swap_dma(true); -+ ath79_register_nfc(); -+} -+ -+static int rb2011_get_port_link(unsigned port) -+{ -+ if (port != 6) -+ return -EINVAL; -+ -+ /* The Loss of signal line is active low */ -+ return !gpio_get_value(RB2011_GPIO_SFP_LOS); -+} -+ -+static void __init rb2011_sfp_init(void) -+{ -+ gpio_request_one(RB2011_GPIO_SFP_LOS, GPIOF_IN, "SFP LOS"); -+ -+ rb2011_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; -+ -+ rb2011_ar8327_data.pad6_cfg = &rb2011_ar8327_pad6_cfg; -+ -+ rb2011_ar8327_sgmii_cfg.sgmii_ctrl = 0xc70167d0; -+ rb2011_ar8327_sgmii_cfg.serdes_aen = true; -+ -+ rb2011_ar8327_data.sgmii_cfg = &rb2011_ar8327_sgmii_cfg; -+ -+ rb2011_ar8327_data.port6_cfg.force_link = 1; -+ rb2011_ar8327_data.port6_cfg.speed = AR8327_PORT_SPEED_1000; -+ rb2011_ar8327_data.port6_cfg.duplex = 1; -+ -+ rb2011_ar8327_data.get_port_link = rb2011_get_port_link; -+} -+ -+static int __init rb2011_setup(u32 flags) -+{ -+ const struct rb_info *info; -+ char buf[64]; -+ -+ info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); -+ if (!info) -+ return -ENODEV; -+ -+ scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", -+ (info->board_name) ? info->board_name : ""); -+ mips_set_machine_name(buf); -+ -+ rb2011_init_partitions(info); -+ -+ ath79_register_m25p80(&rb2011_spi_flash_data); -+ rb2011_nand_init(); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(rb2011_mdio0_info, -+ ARRAY_SIZE(rb2011_mdio0_info)); -+ -+ /* GMAC0 is connected to an ar8327 switch */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+ -+ if (flags & RB2011_FLAG_SFP) -+ rb2011_sfp_init(); -+ -+ if (flags & RB2011_FLAG_WLAN) -+ rb2011_wlan_init(); -+ -+ if (flags & RB2011_FLAG_USB) -+ ath79_register_usb(); -+ -+ return 0; -+} -+ -+static void __init rb2011l_setup(void) -+{ -+ rb2011_setup(0); -+} -+ -+MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011L, "2011L", rb2011l_setup); -+ -+static void __init rb2011us_setup(void) -+{ -+ rb2011_setup(RB2011_FLAG_SFP | RB2011_FLAG_USB); -+} -+ -+MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011US, "2011US", rb2011us_setup); -+ -+static void __init rb2011r5_setup(void) -+{ -+ rb2011_setup(RB2011_FLAG_SFP | RB2011_FLAG_USB | RB2011_FLAG_WLAN); -+} -+ -+MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011R5, "2011r5", rb2011r5_setup); -+ -+static void __init rb2011g_setup(void) -+{ -+ rb2011_setup(RB2011_FLAG_SFP | -+ RB2011_FLAG_USB | -+ RB2011_FLAG_WLAN); -+} -+ -+MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011G, "2011G", rb2011g_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb4xx.c linux-4.1.13/arch/mips/ath79/mach-rb4xx.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rb4xx.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rb4xx.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,465 @@ -+/* -+ * MikroTik RouterBOARD 4xx series support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define RB4XX_GPIO_USER_LED 4 -+#define RB4XX_GPIO_RESET_SWITCH 7 -+ -+#define RB4XX_GPIO_CPLD_BASE 32 -+#define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) -+#define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) -+#define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) -+#define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) -+#define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) -+ -+#define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led rb4xx_leds_gpio[] __initdata = { -+ { -+ .name = "rb4xx:yellow:user", -+ .gpio = RB4XX_GPIO_USER_LED, -+ .active_low = 0, -+ }, { -+ .name = "rb4xx:green:led1", -+ .gpio = RB4XX_GPIO_CPLD_LED1, -+ .active_low = 1, -+ }, { -+ .name = "rb4xx:green:led2", -+ .gpio = RB4XX_GPIO_CPLD_LED2, -+ .active_low = 1, -+ }, { -+ .name = "rb4xx:green:led3", -+ .gpio = RB4XX_GPIO_CPLD_LED3, -+ .active_low = 1, -+ }, { -+ .name = "rb4xx:green:led4", -+ .gpio = RB4XX_GPIO_CPLD_LED4, -+ .active_low = 1, -+ }, { -+ .name = "rb4xx:green:led5", -+ .gpio = RB4XX_GPIO_CPLD_LED5, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { -+ { -+ .desc = "reset_switch", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = RB4XX_GPIO_RESET_SWITCH, -+ .active_low = 1, -+ } -+}; -+ -+static struct platform_device rb4xx_nand_device = { -+ .name = "rb4xx-nand", -+ .id = -1, -+}; -+ -+static struct ath79_pci_irq rb4xx_pci_irqs[] __initdata = { -+ { -+ .slot = 17, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(2), -+ }, { -+ .slot = 18, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, { -+ .slot = 18, -+ .pin = 2, -+ .irq = ATH79_PCI_IRQ(1), -+ }, { -+ .slot = 19, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(1), -+ }, { -+ .slot = 19, -+ .pin = 2, -+ .irq = ATH79_PCI_IRQ(2), -+ }, { -+ .slot = 20, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(2), -+ }, { -+ .slot = 20, -+ .pin = 2, -+ .irq = ATH79_PCI_IRQ(0), -+ }, { -+ .slot = 21, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, { -+ .slot = 22, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(1), -+ }, { -+ .slot = 22, -+ .pin = 2, -+ .irq = ATH79_PCI_IRQ(2), -+ }, { -+ .slot = 23, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(2), -+ }, { -+ .slot = 23, -+ .pin = 2, -+ .irq = ATH79_PCI_IRQ(0), -+ } -+}; -+ -+static struct mtd_partition rb4xx_partitions[] = { -+ { -+ .name = "routerboot", -+ .offset = 0, -+ .size = 0x0b000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "hard_config", -+ .offset = 0x0b000, -+ .size = 0x01000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "bios", -+ .offset = 0x0d000, -+ .size = 0x02000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "soft_config", -+ .offset = 0x0f000, -+ .size = 0x01000, -+ } -+}; -+ -+static struct flash_platform_data rb4xx_flash_data = { -+ .type = "pm25lv512", -+ .parts = rb4xx_partitions, -+ .nr_parts = ARRAY_SIZE(rb4xx_partitions), -+}; -+ -+static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { -+ .gpio_base = RB4XX_GPIO_CPLD_BASE, -+}; -+ -+static struct mmc_spi_platform_data rb4xx_mmc_data = { -+ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -+}; -+ -+static struct spi_board_info rb4xx_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "m25p80", -+ .platform_data = &rb4xx_flash_data, -+ }, { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 25000000, -+ .modalias = "spi-rb4xx-cpld", -+ .platform_data = &rb4xx_cpld_data, -+ } -+}; -+ -+static struct spi_board_info rb4xx_microsd_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 2, -+ .max_speed_hz = 25000000, -+ .modalias = "mmc_spi", -+ .platform_data = &rb4xx_mmc_data, -+ } -+}; -+ -+ -+static struct resource rb4xx_spi_resources[] = { -+ { -+ .start = AR71XX_SPI_BASE, -+ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct platform_device rb4xx_spi_device = { -+ .name = "rb4xx-spi", -+ .id = -1, -+ .resource = rb4xx_spi_resources, -+ .num_resources = ARRAY_SIZE(rb4xx_spi_resources), -+}; -+ -+static void __init rb4xx_generic_setup(void) -+{ -+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | -+ AR71XX_GPIO_FUNC_SPI_CS2_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), -+ rb4xx_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(rb4xx_gpio_keys), -+ rb4xx_gpio_keys); -+ -+ spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); -+ platform_device_register(&rb4xx_spi_device); -+ platform_device_register(&rb4xx_nand_device); -+} -+ -+static void __init rb411_setup(void) -+{ -+ rb4xx_generic_setup(); -+ spi_register_board_info(rb4xx_microsd_info, -+ ARRAY_SIZE(rb4xx_microsd_info)); -+ -+ ath79_register_mdio(0, 0xfffffffc); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = 0x00000003; -+ -+ ath79_register_eth(0); -+ -+ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", -+ rb411_setup); -+ -+static void __init rb411u_setup(void) -+{ -+ rb411_setup(); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", -+ rb411u_setup); -+ -+#define RB433_LAN_PHYMASK BIT(0) -+#define RB433_WAN_PHYMASK BIT(4) -+#define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) -+ -+static void __init rb433_setup(void) -+{ -+ rb4xx_generic_setup(); -+ spi_register_board_info(rb4xx_microsd_info, -+ ARRAY_SIZE(rb4xx_microsd_info)); -+ -+ ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", -+ rb433_setup); -+ -+static void __init rb433u_setup(void) -+{ -+ rb433_setup(); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", -+ rb433u_setup); -+ -+static void __init rb435g_setup(void) -+{ -+ rb4xx_generic_setup(); -+ -+ spi_register_board_info(rb4xx_microsd_info, -+ ARRAY_SIZE(rb4xx_microsd_info)); -+ -+ ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -+ ath79_register_pci(); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_435G, "435G", "MikroTik RouterBOARD 435G", -+ rb435g_setup); -+ -+#define RB450_LAN_PHYMASK BIT(0) -+#define RB450_WAN_PHYMASK BIT(4) -+#define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) -+ -+static void __init rb450_generic_setup(int gige) -+{ -+ rb4xx_generic_setup(); -+ ath79_register_mdio(0, ~RB450_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth0_data.phy_if_mode = (gige) ? -+ PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = RB450_LAN_PHYMASK; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth1_data.phy_if_mode = (gige) ? -+ PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = RB450_WAN_PHYMASK; -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+} -+ -+static void __init rb450_setup(void) -+{ -+ rb450_generic_setup(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_450, "450", "MikroTik RouterBOARD 450", -+ rb450_setup); -+ -+static void __init rb450g_setup(void) -+{ -+ rb450_generic_setup(1); -+ spi_register_board_info(rb4xx_microsd_info, -+ ARRAY_SIZE(rb4xx_microsd_info)); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", -+ rb450g_setup); -+ -+static void __init rb493_setup(void) -+{ -+ rb4xx_generic_setup(); -+ -+ ath79_register_mdio(0, 0x3fffff00); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x00000001; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", -+ rb493_setup); -+ -+#define RB493G_GPIO_MDIO_MDC 7 -+#define RB493G_GPIO_MDIO_DATA 8 -+ -+#define RB493G_MDIO_PHYMASK BIT(0) -+ -+static struct mdio_gpio_platform_data rb493g_mdio_data = { -+ .mdc = RB493G_GPIO_MDIO_MDC, -+ .mdio = RB493G_GPIO_MDIO_DATA, -+ -+ .phy_mask = ~RB493G_MDIO_PHYMASK, -+}; -+ -+static struct platform_device rb493g_mdio_device = { -+ .name = "mdio-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &rb493g_mdio_data, -+ }, -+}; -+ -+static void __init rb493g_setup(void) -+{ -+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | -+ AR71XX_GPIO_FUNC_SPI_CS2_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), -+ rb4xx_leds_gpio); -+ -+ spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); -+ spi_register_board_info(rb4xx_microsd_info, -+ ARRAY_SIZE(rb4xx_microsd_info)); -+ -+ platform_device_register(&rb4xx_spi_device); -+ platform_device_register(&rb4xx_nand_device); -+ -+ ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = RB493G_MDIO_PHYMASK; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev; -+ ath79_eth1_data.phy_mask = RB493G_MDIO_PHYMASK; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ platform_device_register(&rb493g_mdio_device); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+ -+ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G", -+ rb493g_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb750.c linux-4.1.13/arch/mips/ath79/mach-rb750.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rb750.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rb750.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,346 @@ -+/* -+ * MikroTik RouterBOARD 750/750GL support -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-usb.h" -+#include "dev-eth.h" -+#include "machtypes.h" -+#include "routerboot.h" -+ -+static struct rb750_led_data rb750_leds[] = { -+ { -+ .name = "rb750:green:act", -+ .mask = RB750_LED_ACT, -+ .active_low = 1, -+ }, { -+ .name = "rb750:green:port1", -+ .mask = RB750_LED_PORT5, -+ .active_low = 1, -+ }, { -+ .name = "rb750:green:port2", -+ .mask = RB750_LED_PORT4, -+ .active_low = 1, -+ }, { -+ .name = "rb750:green:port3", -+ .mask = RB750_LED_PORT3, -+ .active_low = 1, -+ }, { -+ .name = "rb750:green:port4", -+ .mask = RB750_LED_PORT2, -+ .active_low = 1, -+ }, { -+ .name = "rb750:green:port5", -+ .mask = RB750_LED_PORT1, -+ .active_low = 1, -+ } -+}; -+ -+static struct rb750_led_data rb750gr3_leds[] = { -+ { -+ .name = "rb750:green:act", -+ .mask = RB7XX_LED_ACT, -+ .active_low = 1, -+ }, -+}; -+ -+static struct rb750_led_platform_data rb750_leds_data; -+static struct platform_device rb750_leds_device = { -+ .name = "leds-rb750", -+ .dev = { -+ .platform_data = &rb750_leds_data, -+ } -+}; -+ -+static struct rb7xx_nand_platform_data rb750_nand_data; -+static struct platform_device rb750_nand_device = { -+ .name = "rb750-nand", -+ .id = -1, -+ .dev = { -+ .platform_data = &rb750_nand_data, -+ } -+}; -+ -+static void rb750_latch_change(u32 mask_clr, u32 mask_set) -+{ -+ static DEFINE_SPINLOCK(lock); -+ static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; -+ static u32 latch_oe; -+ static u32 latch_clr; -+ unsigned long flags; -+ u32 t; -+ -+ spin_lock_irqsave(&lock, flags); -+ -+ if ((mask_clr & BIT(31)) != 0 && -+ (latch_set & RB750_LVC573_LE) == 0) { -+ goto unlock; -+ } -+ -+ latch_set = (latch_set | mask_set) & ~mask_clr; -+ latch_clr = (latch_clr | mask_clr) & ~mask_set; -+ -+ if (latch_oe == 0) -+ latch_oe = __raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_OE); -+ -+ if (likely(latch_set & RB750_LVC573_LE)) { -+ void __iomem *base = ath79_gpio_base; -+ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ t |= mask_clr | latch_oe | mask_set; -+ -+ __raw_writel(t, base + AR71XX_GPIO_REG_OE); -+ __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR); -+ __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET); -+ } else if (mask_clr & RB750_LVC573_LE) { -+ void __iomem *base = ath79_gpio_base; -+ -+ latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_CLEAR); -+ } -+ -+unlock: -+ spin_unlock_irqrestore(&lock, flags); -+} -+ -+static void rb750_nand_enable_pins(void) -+{ -+ rb750_latch_change(RB750_LVC573_LE, 0); -+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, -+ AR724X_GPIO_FUNC_SPI_EN); -+} -+ -+static void rb750_nand_disable_pins(void) -+{ -+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN, -+ AR724X_GPIO_FUNC_JTAG_DISABLE); -+ rb750_latch_change(0, RB750_LVC573_LE); -+} -+ -+static void __init rb750_setup(void) -+{ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ rb750_leds_data.num_leds = ARRAY_SIZE(rb750_leds); -+ rb750_leds_data.leds = rb750_leds; -+ rb750_leds_data.latch_change = rb750_latch_change; -+ platform_device_register(&rb750_leds_device); -+ -+ rb750_nand_data.nce_line = RB750_NAND_NCE; -+ rb750_nand_data.enable_pins = rb750_nand_enable_pins; -+ rb750_nand_data.disable_pins = rb750_nand_disable_pins; -+ rb750_nand_data.latch_change = rb750_latch_change; -+ platform_device_register(&rb750_nand_device); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_750, "750i", "MikroTik RouterBOARD 750", -+ rb750_setup); -+ -+static struct ar8327_pad_cfg rb750gr3_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data rb750gr3_ar8327_data = { -+ .pad0_cfg = &rb750gr3_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ } -+}; -+ -+static struct mdio_board_info rb750g3_mdio_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &rb750gr3_ar8327_data, -+ }, -+}; -+ -+static void rb750gr3_nand_enable_pins(void) -+{ -+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, -+ AR724X_GPIO_FUNC_SPI_EN | -+ AR724X_GPIO_FUNC_SPI_CS_EN2); -+} -+ -+static void rb750gr3_nand_disable_pins(void) -+{ -+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN | -+ AR724X_GPIO_FUNC_SPI_CS_EN2, -+ AR724X_GPIO_FUNC_JTAG_DISABLE); -+} -+ -+static void rb750gr3_latch_change(u32 mask_clr, u32 mask_set) -+{ -+ static DEFINE_SPINLOCK(lock); -+ static u32 latch_set = RB7XX_LED_ACT; -+ static u32 latch_clr; -+ void __iomem *base = ath79_gpio_base; -+ unsigned long flags; -+ u32 t; -+ -+ spin_lock_irqsave(&lock, flags); -+ -+ latch_set = (latch_set | mask_set) & ~mask_clr; -+ latch_clr = (latch_clr | mask_clr) & ~mask_set; -+ -+ mask_set = latch_set & (RB7XX_USB_POWERON | RB7XX_MONITOR); -+ mask_clr = latch_clr & (RB7XX_USB_POWERON | RB7XX_MONITOR); -+ -+ if ((latch_set ^ RB7XX_LED_ACT) & RB7XX_LED_ACT) { -+ /* enable output mode */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ t |= RB7XX_LED_ACT; -+ __raw_writel(t, base + AR71XX_GPIO_REG_OE); -+ -+ mask_clr |= RB7XX_LED_ACT; -+ } else { -+ /* disable output mode */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ t &= ~RB7XX_LED_ACT; -+ __raw_writel(t, base + AR71XX_GPIO_REG_OE); -+ } -+ -+ __raw_writel(mask_set, base + AR71XX_GPIO_REG_SET); -+ __raw_writel(mask_clr, base + AR71XX_GPIO_REG_CLEAR); -+ -+ spin_unlock_irqrestore(&lock, flags); -+} -+ -+static void __init rb750gr3_setup(void) -+{ -+ ath79_register_mdio(0, 0x0); -+ mdiobus_register_board_info(rb750g3_mdio_info, -+ ARRAY_SIZE(rb750g3_mdio_info)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_pll_data.pll_1000 = 0x62000000; -+ -+ ath79_register_eth(0); -+ -+ rb750_leds_data.num_leds = ARRAY_SIZE(rb750gr3_leds); -+ rb750_leds_data.leds = rb750gr3_leds; -+ rb750_leds_data.latch_change = rb750gr3_latch_change; -+ platform_device_register(&rb750_leds_device); -+ -+ rb750_nand_data.nce_line = RB7XX_NAND_NCE; -+ rb750_nand_data.enable_pins = rb750gr3_nand_enable_pins; -+ rb750_nand_data.disable_pins = rb750gr3_nand_disable_pins; -+ rb750_nand_data.latch_change = rb750gr3_latch_change; -+ platform_device_register(&rb750_nand_device); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_750G_R3, "750Gr3", "MikroTik RouterBOARD 750GL", -+ rb750gr3_setup); -+ -+#define RB751_HARDCONFIG 0x1f00b000 -+#define RB751_HARDCONFIG_SIZE 0x1000 -+ -+static void __init rb751_wlan_setup(void) -+{ -+ u8 *hardconfig = (u8 *) KSEG1ADDR(RB751_HARDCONFIG); -+ struct ath9k_platform_data *wmac_data; -+ u16 tag_len; -+ u8 *tag; -+ u16 mac_len; -+ u8 *mac; -+ int err; -+ -+ wmac_data = ap9x_pci_get_wmac_data(0); -+ if (!wmac_data) { -+ pr_err("rb75x: unable to get address of wlan data\n"); -+ return; -+ } -+ -+ ap9x_pci_setup_wmac_led_pin(0, 9); -+ -+ err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE, -+ RB_ID_WLAN_DATA, &tag, &tag_len); -+ if (err) { -+ pr_err("rb75x: no calibration data found\n"); -+ return; -+ } -+ -+ err = rle_decode(tag, tag_len, (unsigned char *) wmac_data->eeprom_data, -+ sizeof(wmac_data->eeprom_data), NULL, NULL); -+ if (err) { -+ pr_err("rb75x: unable to decode wlan eeprom data\n"); -+ return; -+ } -+ -+ err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE, -+ RB_ID_MAC_ADDRESS_PACK, &mac, &mac_len); -+ if (err) { -+ pr_err("rb75x: no mac address found\n"); -+ return; -+ } -+ -+ ap91_pci_init(NULL, mac); -+} -+ -+static void __init rb751_setup(void) -+{ -+ rb750_setup(); -+ ath79_register_usb(); -+ rb751_wlan_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_751, "751", "MikroTik RouterBOARD 751", -+ rb751_setup); -+ -+static void __init rb751g_setup(void) -+{ -+ rb750gr3_setup(); -+ ath79_register_usb(); -+ rb751_wlan_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_751G, "751g", "MikroTik RouterBOARD 751G", -+ rb751g_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb91x.c linux-4.1.13/arch/mips/ath79/mach-rb91x.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rb91x.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rb91x.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,349 @@ -+/* -+ * MikroTik RouterBOARD 91X support -+ * -+ * Copyright (C) 2013 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) "rb91x: " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-nfc.h" -+#include "dev-usb.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+#include "routerboot.h" -+ -+#define RB_ROUTERBOOT_OFFSET 0x0000 -+#define RB_ROUTERBOOT_MIN_SIZE 0xb000 -+#define RB_HARD_CFG_SIZE 0x1000 -+#define RB_BIOS_OFFSET 0xd000 -+#define RB_BIOS_SIZE 0x1000 -+#define RB_SOFT_CFG_OFFSET 0xf000 -+#define RB_SOFT_CFG_SIZE 0x1000 -+ -+#define RB91X_FLAG_USB BIT(0) -+#define RB91X_FLAG_PCIE BIT(1) -+ -+#define RB91X_LATCH_GPIO_BASE AR934X_GPIO_COUNT -+#define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x)) -+ -+#define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT) -+#define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x)) -+ -+#define RB91X_SSR_BIT_LED1 0 -+#define RB91X_SSR_BIT_LED2 1 -+#define RB91X_SSR_BIT_LED3 2 -+#define RB91X_SSR_BIT_LED4 3 -+#define RB91X_SSR_BIT_LED5 4 -+#define RB91X_SSR_BIT_5 5 -+#define RB91X_SSR_BIT_USB_POWER 6 -+#define RB91X_SSR_BIT_PCIE_POWER 7 -+ -+#define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0) -+#define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1) -+#define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2) -+#define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3) -+#define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4) -+#define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11) -+#define RB91X_GPIO_NAND_NRW RB91X_LATCH_GPIO(12) -+#define RB91X_GPIO_NAND_NCE RB91X_LATCH_GPIO(13) -+#define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14) -+#define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15) -+ -+#define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1) -+#define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2) -+#define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3) -+#define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4) -+#define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5) -+#define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER) -+#define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER) -+ -+struct rb_board_info { -+ const char *name; -+ u32 flags; -+}; -+ -+static struct mtd_partition rb711gr100_spi_partitions[] = { -+ { -+ .name = "routerboot", -+ .offset = RB_ROUTERBOOT_OFFSET, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "hard_config", -+ .size = RB_HARD_CFG_SIZE, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "bios", -+ .offset = RB_BIOS_OFFSET, -+ .size = RB_BIOS_SIZE, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "soft_config", -+ .size = RB_SOFT_CFG_SIZE, -+ } -+}; -+ -+static struct flash_platform_data rb711gr100_spi_flash_data = { -+ .parts = rb711gr100_spi_partitions, -+ .nr_parts = ARRAY_SIZE(rb711gr100_spi_partitions), -+}; -+ -+static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = { -+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, -+ 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 -+}; -+ -+static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = { -+ .base = RB91X_LATCH_GPIO_BASE, -+ .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios), -+ .gpios = rb711gr100_gpio_latch_gpios, -+ .le_gpio_index = 11, -+ .le_active_low = true, -+}; -+ -+static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = { -+ .gpio_nce = RB91X_GPIO_NAND_NCE, -+ .gpio_ale = RB91X_GPIO_NAND_ALE, -+ .gpio_cle = RB91X_GPIO_NAND_CLE, -+ .gpio_rdy = RB91X_GPIO_NAND_RDY, -+ .gpio_read = RB91X_GPIO_NAND_READ, -+ .gpio_nrw = RB91X_GPIO_NAND_NRW, -+ .gpio_nle = RB91X_GPIO_NLE, -+}; -+ -+static u8 rb711gr100_ssr_initdata[] __initdata = { -+ BIT(RB91X_SSR_BIT_PCIE_POWER) | -+ BIT(RB91X_SSR_BIT_USB_POWER) | -+ BIT(RB91X_SSR_BIT_5) -+}; -+ -+static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = { -+ .base = RB91X_SSR_GPIO_BASE, -+ .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata), -+ .init_data = rb711gr100_ssr_initdata, -+}; -+ -+static struct ath79_spi_controller_data rb711gr100_spi0_cdata = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+ .is_flash = true, -+}; -+ -+static struct ath79_spi_controller_data rb711gr100_spi1_cdata = { -+ .cs_type = ATH79_SPI_CS_TYPE_GPIO, -+ .cs_line = RB91X_GPIO_SSR_STROBE, -+}; -+ -+static struct spi_board_info rb711gr100_spi_info[] = { -+ { -+ .bus_num = 0, -+ .chip_select = 0, -+ .max_speed_hz = 25000000, -+ .modalias = "m25p80", -+ .platform_data = &rb711gr100_spi_flash_data, -+ .controller_data = &rb711gr100_spi0_cdata -+ }, { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 10000000, -+ .modalias = "74x164", -+ .platform_data = &rb711gr100_ssr_data, -+ .controller_data = &rb711gr100_spi1_cdata -+ } -+}; -+ -+static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = { -+ .bus_num = 0, -+ .num_chipselect = 2, -+}; -+ -+static struct gpio_led rb711gr100_leds[] __initdata = { -+ { -+ .name = "rb:green:led1", -+ .gpio = RB91X_GPIO_LED_1, -+ .active_low = 0, -+ }, -+ { -+ .name = "rb:green:led2", -+ .gpio = RB91X_GPIO_LED_2, -+ .active_low = 0, -+ }, -+ { -+ .name = "rb:green:led3", -+ .gpio = RB91X_GPIO_LED_3, -+ .active_low = 0, -+ }, -+ { -+ .name = "rb:green:led4", -+ .gpio = RB91X_GPIO_LED_4, -+ .active_low = 0, -+ }, -+ { -+ .name = "rb:green:led5", -+ .gpio = RB91X_GPIO_LED_5, -+ .active_low = 0, -+ }, -+ { -+ .name = "rb:green:user", -+ .gpio = RB91X_GPIO_LED_USER, -+ .active_low = 0, -+ }, -+ { -+ .name = "rb:green:power", -+ .gpio = RB91X_GPIO_LED_POWER, -+ .active_low = 0, -+ }, -+}; -+ -+static struct at803x_platform_data rb91x_at803x_data = { -+ .disable_smarteee = 1, -+ .enable_rgmii_rx_delay = 1, -+ .enable_rgmii_tx_delay = 1, -+}; -+ -+static struct mdio_board_info rb91x_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &rb91x_at803x_data, -+ }, -+}; -+ -+static void __init rb711gr100_init_partitions(const struct rb_info *info) -+{ -+ rb711gr100_spi_partitions[0].size = info->hard_cfg_offs; -+ rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs; -+ -+ rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs; -+} -+ -+void __init rb711gr100_wlan_init(void) -+{ -+ char *caldata; -+ u8 wlan_mac[ETH_ALEN]; -+ -+ caldata = rb_get_wlan_data(); -+ if (caldata == NULL) -+ return; -+ -+ ath79_init_mac(wlan_mac, ath79_mac_base, 1); -+ ath79_register_wmac(caldata + 0x1000, wlan_mac); -+ -+ kfree(caldata); -+} -+ -+#define RB_BOARD_INFO(_name, _flags) \ -+ { \ -+ .name = (_name), \ -+ .flags = (_flags), \ -+ } -+ -+static const struct rb_board_info rb711gr100_boards[] __initconst = { -+ RB_BOARD_INFO("911G-2HPnD", 0), -+ RB_BOARD_INFO("911G-5HPnD", 0), -+ RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE), -+ RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE), -+}; -+ -+static u32 rb711gr100_get_flags(const struct rb_info *info) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) { -+ const struct rb_board_info *bi; -+ -+ bi = &rb711gr100_boards[i]; -+ if (strcmp(info->board_name, bi->name) == 0) -+ return bi->flags; -+ } -+ -+ return 0; -+} -+ -+static void __init rb711gr100_setup(void) -+{ -+ const struct rb_info *info; -+ char buf[64]; -+ u32 flags; -+ -+ info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); -+ if (!info) -+ return; -+ -+ scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", -+ (info->board_name) ? info->board_name : ""); -+ mips_set_machine_name(buf); -+ -+ rb711gr100_init_partitions(info); -+ ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info, -+ ARRAY_SIZE(rb711gr100_spi_info)); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_RXD_DELAY | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(rb91x_mdio0_info, -+ ARRAY_SIZE(rb91x_mdio0_info)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_pll_data.pll_1000 = 0x02000000; -+ -+ ath79_register_eth(0); -+ -+ rb711gr100_wlan_init(); -+ -+ platform_device_register_data(NULL, "rb91x-nand", -1, -+ &rb711gr100_nand_data, -+ sizeof(rb711gr100_nand_data)); -+ -+ platform_device_register_data(NULL, "gpio-latch", -1, -+ &rb711gr100_gpio_latch_data, -+ sizeof(rb711gr100_gpio_latch_data)); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds), -+ rb711gr100_leds); -+ -+ flags = rb711gr100_get_flags(info); -+ -+ if (flags & RB91X_FLAG_USB) -+ ath79_register_usb(); -+ -+ if (flags & RB91X_FLAG_PCIE) -+ ath79_register_pci(); -+ -+} -+ -+MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb922.c linux-4.1.13/arch/mips/ath79/mach-rb922.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rb922.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rb922.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,236 @@ -+/* -+ * MikroTik RouterBOARD 91X support -+ * -+ * Copyright (C) 2015 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" -+#include "dev-usb.h" -+#include "dev-spi.h" -+#include "machtypes.h" -+#include "pci.h" -+#include "routerboot.h" -+ -+#define RB922_GPIO_LED_USR 12 -+#define RB922_GPIO_USB_POWER 13 -+#define RB922_GPIO_FAN_CTRL 14 -+#define RB922_GPIO_BTN_RESET 20 -+#define RB922_GPIO_NAND_NCE 23 -+ -+#define RB922_PHY_ADDR 4 -+ -+#define RB922_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define RB922_KEYS_DEBOUNCE_INTERVAL (3 * RB922_KEYS_POLL_INTERVAL) -+ -+#define RB_ROUTERBOOT_OFFSET 0x0000 -+#define RB_ROUTERBOOT_MIN_SIZE 0xb000 -+#define RB_HARD_CFG_SIZE 0x1000 -+#define RB_BIOS_OFFSET 0xd000 -+#define RB_BIOS_SIZE 0x1000 -+#define RB_SOFT_CFG_OFFSET 0xf000 -+#define RB_SOFT_CFG_SIZE 0x1000 -+ -+static struct mtd_partition rb922gs_spi_partitions[] = { -+ { -+ .name = "routerboot", -+ .offset = RB_ROUTERBOOT_OFFSET, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "hard_config", -+ .size = RB_HARD_CFG_SIZE, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "bios", -+ .offset = RB_BIOS_OFFSET, -+ .size = RB_BIOS_SIZE, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "soft_config", -+ .size = RB_SOFT_CFG_SIZE, -+ } -+}; -+ -+static struct flash_platform_data rb922gs_spi_flash_data = { -+ .parts = rb922gs_spi_partitions, -+ .nr_parts = ARRAY_SIZE(rb922gs_spi_partitions), -+}; -+ -+static struct gpio_led rb922gs_leds[] __initdata = { -+ { -+ .name = "rb:green:user", -+ .gpio = RB922_GPIO_LED_USR, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button rb922gs_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = RB922_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = RB922_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct at803x_platform_data rb922gs_at803x_data = { -+ .disable_smarteee = 1, -+}; -+ -+static struct mdio_board_info rb922gs_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = RB922_PHY_ADDR, -+ .platform_data = &rb922gs_at803x_data, -+ }, -+}; -+ -+static void __init rb922gs_init_partitions(const struct rb_info *info) -+{ -+ rb922gs_spi_partitions[0].size = info->hard_cfg_offs; -+ rb922gs_spi_partitions[1].offset = info->hard_cfg_offs; -+ rb922gs_spi_partitions[3].offset = info->soft_cfg_offs; -+} -+ -+static void rb922gs_nand_select_chip(int chip_no) -+{ -+ switch (chip_no) { -+ case 0: -+ gpio_set_value(RB922_GPIO_NAND_NCE, 0); -+ break; -+ default: -+ gpio_set_value(RB922_GPIO_NAND_NCE, 1); -+ break; -+ } -+ ndelay(500); -+} -+ -+static struct nand_ecclayout rb922gs_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static int rb922gs_nand_scan_fixup(struct mtd_info *mtd) -+{ -+ struct nand_chip *chip = mtd->priv; -+ -+ if (mtd->writesize == 512) { -+ /* -+ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot -+ * will not be able to find the kernel that we load. -+ */ -+ chip->ecc.layout = &rb922gs_nand_ecclayout; -+ } -+ -+ return 0; -+} -+ -+static struct mtd_partition rb922gs_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, -+ { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static void __init rb922gs_nand_init(void) -+{ -+ gpio_request_one(RB922_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); -+ -+ ath79_nfc_set_scan_fixup(rb922gs_nand_scan_fixup); -+ ath79_nfc_set_parts(rb922gs_nand_partitions, -+ ARRAY_SIZE(rb922gs_nand_partitions)); -+ ath79_nfc_set_select_chip(rb922gs_nand_select_chip); -+ ath79_nfc_set_swap_dma(true); -+ ath79_register_nfc(); -+} -+ -+static void __init rb922gs_setup(void) -+{ -+ const struct rb_info *info; -+ char buf[64]; -+ -+ info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); -+ if (!info) -+ return; -+ -+ scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", -+ (info->board_name) ? info->board_name : ""); -+ mips_set_machine_name(buf); -+ -+ rb922gs_init_partitions(info); -+ ath79_register_m25p80(&rb922gs_spi_flash_data); -+ -+ rb922gs_nand_init(); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(rb922gs_mdio0_info, -+ ARRAY_SIZE(rb922gs_mdio0_info)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR); -+ ath79_eth0_pll_data.pll_10 = 0x81001313; -+ ath79_eth0_pll_data.pll_100 = 0x81000101; -+ ath79_eth0_pll_data.pll_1000 = 0x8f000000; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_pci(); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds); -+ ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(rb922gs_gpio_keys), -+ rb922gs_gpio_keys); -+ -+ /* NOTE: -+ * This only supports the RB911G-5HPacD board for now. For other boards -+ * more devices must be registered based on the hardware options which -+ * can be found in the hardware configuration of RouterBOOT. -+ */ -+} -+ -+MIPS_MACHINE_NONAME(ATH79_MACH_RB_922GS, "922gs", rb922gs_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb95x.c linux-4.1.13/arch/mips/ath79/mach-rb95x.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rb95x.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rb95x.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,258 @@ -+/* -+ * MikroTik RouterBOARD 95X support -+ * -+ * Copyright (C) 2012 Stijn Tintel -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2013 Kamil Trzcinski -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) "rb95x: " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "routerboot.h" -+#include "dev-leds-gpio.h" -+ -+#define RB95X_GPIO_NAND_NCE 14 -+ -+static struct mtd_partition rb95x_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, -+ { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct gpio_led rb951ui_leds_gpio[] __initdata = { -+ { -+ .name = "rb:green:wlan", -+ .gpio = 11, -+ .active_low = 1, -+ }, { -+ .name = "rb:green:act", -+ .gpio = 3, -+ .active_low = 1, -+ }, { -+ .name = "rb:green:port1", -+ .gpio = 13, -+ .active_low = 1, -+ }, { -+ .name = "rb:green:port2", -+ .gpio = 12, -+ .active_low = 1, -+ }, { -+ .name = "rb:green:port3", -+ .gpio = 4, -+ .active_low = 1, -+ }, { -+ .name = "rb:green:port4", -+ .gpio = 21, -+ .active_low = 1, -+ }, { -+ .name = "rb:green:port5", -+ .gpio = 16, -+ .active_low = 1, -+ } -+}; -+ -+static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data rb95x_ar8327_data = { -+ .pad0_cfg = &rb95x_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ } -+}; -+ -+static struct mdio_board_info rb95x_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &rb95x_ar8327_data, -+ }, -+}; -+ -+void __init rb95x_wlan_init(void) -+{ -+ char *art_buf; -+ u8 wlan_mac[ETH_ALEN]; -+ -+ art_buf = rb_get_wlan_data(); -+ if (art_buf == NULL) -+ return; -+ -+ ath79_init_mac(wlan_mac, ath79_mac_base, 11); -+ ath79_register_wmac(art_buf + 0x1000, wlan_mac); -+ -+ kfree(art_buf); -+} -+ -+static void rb95x_nand_select_chip(int chip_no) -+{ -+ switch (chip_no) { -+ case 0: -+ gpio_set_value(RB95X_GPIO_NAND_NCE, 0); -+ break; -+ default: -+ gpio_set_value(RB95X_GPIO_NAND_NCE, 1); -+ break; -+ } -+ ndelay(500); -+} -+ -+static struct nand_ecclayout rb95x_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static int rb95x_nand_scan_fixup(struct mtd_info *mtd) -+{ -+ struct nand_chip *chip = mtd->priv; -+ -+ if (mtd->writesize == 512) { -+ /* -+ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot -+ * will not be able to find the kernel that we load. -+ */ -+ chip->ecc.layout = &rb95x_nand_ecclayout; -+ } -+ -+ return 0; -+} -+ -+void __init rb95x_nand_init(void) -+{ -+ gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); -+ -+ ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup); -+ ath79_nfc_set_parts(rb95x_nand_partitions, -+ ARRAY_SIZE(rb95x_nand_partitions)); -+ ath79_nfc_set_select_chip(rb95x_nand_select_chip); -+ ath79_nfc_set_swap_dma(true); -+ ath79_register_nfc(); -+} -+ -+static int __init rb95x_setup(void) -+{ -+ const struct rb_info *info; -+ -+ info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); -+ if (!info) -+ return -EINVAL; -+ -+ rb95x_nand_init(); -+ -+ return 0; -+} -+ -+static void __init rb951g_setup(void) -+{ -+ if (rb95x_setup()) -+ return; -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ mdiobus_register_board_info(rb95x_mdio0_info, -+ ARRAY_SIZE(rb95x_mdio0_info)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_register_eth(0); -+ -+ rb95x_wlan_init(); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD", -+ rb951g_setup); -+ -+static void __init rb951ui_setup(void) -+{ -+ if (rb95x_setup()) -+ return; -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ gpio_request_one(20, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ -+ gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "POE power"); -+ -+ rb95x_wlan_init(); -+ ath79_register_usb(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb951ui_leds_gpio), -+ rb951ui_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RB_951U, "951HnD", "MikroTik RouterBOARD 951Ui-2HnD", -+ rb951ui_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rbsxtlite.c linux-4.1.13/arch/mips/ath79/mach-rbsxtlite.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rbsxtlite.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rbsxtlite.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,238 @@ -+/* -+ * MikroTik RouterBOARD SXT Lite support -+ * -+ * Copyright (C) 2012 Stijn Tintel -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2013 Vyacheslav Adamanov -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) "sxtlite: " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" -+#include "dev-wmac.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "routerboot.h" -+#include -+ -+#define SXTLITE_GPIO_NAND_NCE 14 -+#define SXTLITE_GPIO_LED_USER 3 -+#define SXTLITE_GPIO_LED_1 13 -+#define SXTLITE_GPIO_LED_2 12 -+#define SXTLITE_GPIO_LED_3 4 -+#define SXTLITE_GPIO_LED_4 21 -+#define SXTLITE_GPIO_LED_5 18 -+#define SXTLITE_GPIO_LED_POWER 11 -+ -+#define SXTLITE_GPIO_BUZZER 19 -+ -+#define SXTLITE_GPIO_BTN_RESET 15 -+ -+#define SXTLITE_KEYS_POLL_INTERVAL 20 -+#define SXTLITE_KEYS_DEBOUNCE_INTERVAL (3 * SXTLITE_KEYS_POLL_INTERVAL) -+ -+static struct mtd_partition rbsxtlite_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, -+ { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct gpio_led rbsxtlite_leds_gpio[] __initdata = { -+ { -+ .name = "rb:green:user", -+ .gpio = SXTLITE_GPIO_LED_USER, -+ .active_low = 1, -+ }, -+ { -+ .name = "rb:green:led1", -+ .gpio = SXTLITE_GPIO_LED_1, -+ .active_low = 1, -+ }, -+ { -+ .name = "rb:green:led2", -+ .gpio = SXTLITE_GPIO_LED_2, -+ .active_low = 1, -+ }, -+ { -+ .name = "rb:green:led3", -+ .gpio = SXTLITE_GPIO_LED_3, -+ .active_low = 1, -+ }, -+ { -+ .name = "rb:green:led4", -+ .gpio = SXTLITE_GPIO_LED_4, -+ .active_low = 1, -+ }, -+ { -+ .name = "rb:green:led5", -+ .gpio = SXTLITE_GPIO_LED_5, -+ .active_low = 1, -+ }, -+ { -+ .name = "rb:green:power", -+ .gpio = SXTLITE_GPIO_LED_POWER, -+ }, -+}; -+ -+static struct gpio_keys_button rbsxtlite_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = SXTLITE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = SXTLITE_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+}; -+ -+static int __init rbsxtlite_rbinfo_init(void) -+{ -+ const struct rb_info *info; -+ -+ info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); -+ if (!info) -+ return -EINVAL; -+ return 0; -+ -+} -+ -+void __init rbsxtlite_wlan_init(void) -+{ -+ char *art_buf; -+ u8 wlan_mac[ETH_ALEN]; -+ -+ art_buf = rb_get_wlan_data(); -+ if (art_buf == NULL) -+ return; -+ -+ ath79_init_mac(wlan_mac, ath79_mac_base, 1); -+ ath79_register_wmac(art_buf + 0x1000, wlan_mac); -+ -+ kfree(art_buf); -+} -+ -+static void rbsxtlite_nand_select_chip(int chip_no) -+{ -+ switch (chip_no) { -+ case 0: -+ gpio_set_value(SXTLITE_GPIO_NAND_NCE, 0); -+ break; -+ default: -+ gpio_set_value(SXTLITE_GPIO_NAND_NCE, 1); -+ break; -+ } -+ ndelay(500); -+} -+ -+static struct nand_ecclayout rbsxtlite_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static int rbsxtlite_nand_scan_fixup(struct mtd_info *mtd) -+{ -+ struct nand_chip *chip = mtd->priv; -+ -+ if (mtd->writesize == 512) { -+ /* -+ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot -+ * will not be able to find the kernel that we load. -+ */ -+ chip->ecc.layout = &rbsxtlite_nand_ecclayout; -+ } -+ -+ return 0; -+} -+ -+void __init rbsxtlite_gpio_init(void) -+{ -+ gpio_request_one(SXTLITE_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); -+} -+ -+void __init rbsxtlite_nand_init(void) -+{ -+ ath79_nfc_set_scan_fixup(rbsxtlite_nand_scan_fixup); -+ ath79_nfc_set_parts(rbsxtlite_nand_partitions, -+ ARRAY_SIZE(rbsxtlite_nand_partitions)); -+ ath79_nfc_set_select_chip(rbsxtlite_nand_select_chip); -+ ath79_nfc_set_swap_dma(true); -+ ath79_register_nfc(); -+} -+ -+ -+static void __init rbsxtlite_setup(void) -+{ -+ if(rbsxtlite_rbinfo_init()) -+ return; -+ rbsxtlite_nand_init(); -+ rbsxtlite_wlan_init(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rbsxtlite_leds_gpio), -+ rbsxtlite_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, SXTLITE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(rbsxtlite_gpio_keys), -+ rbsxtlite_gpio_keys); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* GMAC0 is left unused */ -+ -+ /* GMAC1 is connected to MAC0 on the internal switch */ -+ /* The ethernet port connects to PHY P0, which connects to MAC1 -+ on the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ -+} -+ -+ -+MIPS_MACHINE(ATH79_MACH_RB_SXTLITE2ND, "sxt2n", "Mikrotik RouterBOARD SXT Lite2", -+ rbsxtlite_setup); -+ -+MIPS_MACHINE(ATH79_MACH_RB_SXTLITE5ND, "sxt5n", "Mikrotik RouterBOARD SXT Lite5", -+ rbsxtlite_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rw2458n.c linux-4.1.13/arch/mips/ath79/mach-rw2458n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-rw2458n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-rw2458n.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,91 @@ -+/* -+ * Redwave RW2458N support -+ * -+ * Copyright (C) 2011-2013 Cezary Jackiewicz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define RW2458N_GPIO_LED_D3 1 -+#define RW2458N_GPIO_LED_D4 0 -+#define RW2458N_GPIO_LED_D5 11 -+#define RW2458N_GPIO_LED_D6 7 -+#define RW2458N_GPIO_BTN_RESET 12 -+ -+#define RW2458N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define RW2458N_KEYS_DEBOUNCE_INTERVAL (3 * RW2458N_KEYS_POLL_INTERVAL) -+ -+static struct gpio_keys_button rw2458n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = RW2458N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = RW2458N_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+#define RW2458N_WAN_PHYMASK BIT(4) -+ -+static struct gpio_led rw2458n_leds_gpio[] __initdata = { -+ { -+ .name = "rw2458n:green:d3", -+ .gpio = RW2458N_GPIO_LED_D3, -+ .active_low = 1, -+ }, { -+ .name = "rw2458n:green:d4", -+ .gpio = RW2458N_GPIO_LED_D4, -+ .active_low = 1, -+ }, { -+ .name = "rw2458n:green:d5", -+ .gpio = RW2458N_GPIO_LED_D5, -+ .active_low = 1, -+ }, { -+ .name = "rw2458n:green:d6", -+ .gpio = RW2458N_GPIO_LED_D6, -+ .active_low = 1, -+ } -+}; -+ -+static void __init rw2458n_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~RW2458N_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(rw2458n_leds_gpio), -+ rw2458n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, RW2458N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(rw2458n_gpio_keys), -+ rw2458n_gpio_keys); -+ ath79_register_usb(); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_RW2458N, "RW2458N", "Redwave RW2458N", -+ rw2458n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-smart-300.c linux-4.1.13/arch/mips/ath79/mach-smart-300.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-smart-300.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-smart-300.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,135 @@ -+/* -+ * NC-LINK SMART-300 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2014 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define SMART_300_GPIO_LED_WLAN 13 -+#define SMART_300_GPIO_LED_WAN 18 -+#define SMART_300_GPIO_LED_LAN4 19 -+#define SMART_300_GPIO_LED_LAN3 12 -+#define SMART_300_GPIO_LED_LAN2 21 -+#define SMART_300_GPIO_LED_LAN1 20 -+#define SMART_300_GPIO_LED_SYSTEM 15 -+#define SMART_300_GPIO_LED_POWER 14 -+ -+#define SMART_300_GPIO_BTN_RESET 17 -+#define SMART_300_GPIO_SW_RFKILL 16 -+ -+#define SMART_300_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define SMART_300_KEYS_DEBOUNCE_INTERVAL (3 * SMART_300_KEYS_POLL_INTERVAL) -+ -+#define SMART_300_GPIO_MASK 0x007fffff -+ -+static const char *smart_300_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data smart_300_flash_data = { -+ .part_probes = smart_300_part_probes, -+}; -+ -+static struct gpio_led smart_300_leds_gpio[] __initdata = { -+ { -+ .name = "nc-link:green:lan1", -+ .gpio = SMART_300_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "nc-link:green:lan2", -+ .gpio = SMART_300_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "nc-link:green:lan3", -+ .gpio = SMART_300_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "nc-link:green:lan4", -+ .gpio = SMART_300_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "nc-link:green:system", -+ .gpio = SMART_300_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "nc-link:green:wan", -+ .gpio = SMART_300_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "nc-link:green:wlan", -+ .gpio = SMART_300_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button smart_300_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = SMART_300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = SMART_300_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static void __init smart_300_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(smart_300_leds_gpio), -+ smart_300_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, SMART_300_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(smart_300_gpio_keys), -+ smart_300_gpio_keys); -+ -+ ath79_register_m25p80(&smart_300_flash_data); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+ -+ gpio_request(SMART_300_GPIO_LED_POWER, "power"); -+ gpio_direction_output(SMART_300_GPIO_LED_POWER, GPIOF_OUT_INIT_LOW); -+} -+ -+MIPS_MACHINE(ATH79_MACH_SMART_300, "SMART-300", "NC-LINK SMART-300", -+ smart_300_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-632brp.c linux-4.1.13/arch/mips/ath79/mach-tew-632brp.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tew-632brp.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tew-632brp.c 2015-09-13 20:04:35.068524086 +0200 -@@ -0,0 +1,111 @@ -+/* -+ * TrendNET TEW-632BRP board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "nvram.h" -+ -+#define TEW_632BRP_GPIO_LED_STATUS 1 -+#define TEW_632BRP_GPIO_LED_WPS 3 -+#define TEW_632BRP_GPIO_LED_WLAN 6 -+#define TEW_632BRP_GPIO_BTN_WPS 12 -+#define TEW_632BRP_GPIO_BTN_RESET 21 -+ -+#define TEW_632BRP_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL) -+ -+#define TEW_632BRP_CONFIG_ADDR 0x1f020000 -+#define TEW_632BRP_CONFIG_SIZE 0x10000 -+ -+static struct gpio_led tew_632brp_leds_gpio[] __initdata = { -+ { -+ .name = "tew-632brp:green:status", -+ .gpio = TEW_632BRP_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, { -+ .name = "tew-632brp:blue:wps", -+ .gpio = TEW_632BRP_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "tew-632brp:green:wlan", -+ .gpio = TEW_632BRP_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW_632BRP_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW_632BRP_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+#define TEW_632BRP_LAN_PHYMASK BIT(0) -+#define TEW_632BRP_WAN_PHYMASK BIT(4) -+#define TEW_632BRP_MDIO_MASK (~(TEW_632BRP_LAN_PHYMASK | \ -+ TEW_632BRP_WAN_PHYMASK)) -+ -+static void __init tew_632brp_setup(void) -+{ -+ const char *config = (char *) KSEG1ADDR(TEW_632BRP_CONFIG_ADDR); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 mac[6]; -+ u8 *wlan_mac = NULL; -+ -+ if (ath79_nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE, -+ "lan_mac=", mac) == 0) { -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ wlan_mac = mac; -+ } -+ -+ ath79_register_mdio(0, TEW_632BRP_MDIO_MASK); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.phy_mask = TEW_632BRP_LAN_PHYMASK; -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = TEW_632BRP_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio), -+ tew_632brp_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tew_632brp_gpio_keys), -+ tew_632brp_gpio_keys); -+ -+ ath79_register_wmac(eeprom, wlan_mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP", -+ tew_632brp_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-673gru.c linux-4.1.13/arch/mips/ath79/mach-tew-673gru.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tew-673gru.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tew-673gru.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,198 @@ -+/* -+ * TRENDnet TEW-673GRU board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define TEW673GRU_GPIO_LCD_SCK 0 -+#define TEW673GRU_GPIO_LCD_MOSI 1 -+#define TEW673GRU_GPIO_LCD_MISO 2 -+#define TEW673GRU_GPIO_LCD_CS 6 -+ -+#define TEW673GRU_GPIO_LED_WPS 9 -+ -+#define TEW673GRU_GPIO_BTN_RESET 3 -+#define TEW673GRU_GPIO_BTN_WPS 8 -+ -+#define TEW673GRU_GPIO_RTL8366_SDA 5 -+#define TEW673GRU_GPIO_RTL8366_SCK 7 -+ -+#define TEW673GRU_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TEW673GRU_KEYS_DEBOUNCE_INTERVAL (3 * TEW673GRU_KEYS_POLL_INTERVAL) -+ -+#define TEW673GRU_CAL0_OFFSET 0x1000 -+#define TEW673GRU_CAL1_OFFSET 0x5000 -+#define TEW673GRU_MAC0_OFFSET 0xffa0 -+#define TEW673GRU_MAC1_OFFSET 0xffb4 -+ -+#define TEW673GRU_CAL_LOCATION_0 0x1f660000 -+#define TEW673GRU_CAL_LOCATION_1 0x1f7f0000 -+ -+static struct gpio_led tew673gru_leds_gpio[] __initdata = { -+ { -+ .name = "trendnet:blue:wps", -+ .gpio = TEW673GRU_GPIO_LED_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tew673gru_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW673GRU_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW673GRU_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct rtl8366_initval tew673gru_rtl8366s_initvals[] = { -+ { .reg = 0x06, .val = 0x0108 }, -+}; -+ -+static struct rtl8366_platform_data tew673gru_rtl8366s_data = { -+ .gpio_sda = TEW673GRU_GPIO_RTL8366_SDA, -+ .gpio_sck = TEW673GRU_GPIO_RTL8366_SCK, -+ .num_initvals = ARRAY_SIZE(tew673gru_rtl8366s_initvals), -+ .initvals = tew673gru_rtl8366s_initvals, -+}; -+ -+static struct platform_device tew673gru_rtl8366s_device = { -+ .name = RTL8366S_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &tew673gru_rtl8366s_data, -+ } -+}; -+ -+static struct spi_board_info tew673gru_spi_info[] = { -+ { -+ .bus_num = 1, -+ .chip_select = 0, -+ .max_speed_hz = 400000, -+ .modalias = "spidev", -+ .mode = SPI_MODE_2, -+ .controller_data = (void *) TEW673GRU_GPIO_LCD_CS, -+ }, -+}; -+ -+static struct spi_gpio_platform_data tew673gru_spi_data = { -+ .sck = TEW673GRU_GPIO_LCD_SCK, -+ .miso = TEW673GRU_GPIO_LCD_MISO, -+ .mosi = TEW673GRU_GPIO_LCD_MOSI, -+ .num_chipselect = 1, -+}; -+ -+static struct platform_device tew673gru_spi_device = { -+ .name = "spi_gpio", -+ .id = 1, -+ .dev = { -+ .platform_data = &tew673gru_spi_data, -+ }, -+}; -+ -+static bool __init tew673gru_is_caldata_valid(u8 *p) -+{ -+ u16 *magic0, *magic1; -+ -+ magic0 = (u16 *)(p + TEW673GRU_CAL0_OFFSET); -+ magic1 = (u16 *)(p + TEW673GRU_CAL1_OFFSET); -+ -+ return (*magic0 == 0xa55a && *magic1 == 0xa55a); -+} -+ -+static void __init tew673gru_wlan_init(void) -+{ -+ u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; -+ u8 *caldata; -+ -+ caldata = (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0); -+ if (!tew673gru_is_caldata_valid(caldata)) { -+ caldata = (u8 *)KSEG1ADDR(TEW673GRU_CAL_LOCATION_1); -+ if (!tew673gru_is_caldata_valid(caldata)) { -+ pr_err("no calibration data found\n"); -+ return; -+ } -+ } -+ -+ ath79_parse_ascii_mac(caldata + TEW673GRU_MAC0_OFFSET, mac1); -+ ath79_parse_ascii_mac(caldata + TEW673GRU_MAC1_OFFSET, mac2); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 5); -+ ap9x_pci_setup_wmac_led_pin(1, 5); -+ -+ ap94_pci_init(caldata + TEW673GRU_CAL0_OFFSET, mac1, -+ caldata + TEW673GRU_CAL1_OFFSET, mac2); -+} -+ -+static void __init tew673gru_setup(void) -+{ -+ tew673gru_wlan_init(); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_eth0_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_pll_data.pll_1000 = 0x11110000; -+ -+ ath79_eth1_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ ath79_eth1_pll_data.pll_1000 = 0x11110000; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew673gru_leds_gpio), -+ tew673gru_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TEW673GRU_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tew673gru_gpio_keys), -+ tew673gru_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ platform_device_register(&tew673gru_rtl8366s_device); -+ -+ spi_register_board_info(tew673gru_spi_info, -+ ARRAY_SIZE(tew673gru_spi_info)); -+ platform_device_register(&tew673gru_spi_device); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TEW_673GRU, "TEW-673GRU", "TRENDnet TEW-673GRU", -+ tew673gru_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-712br.c linux-4.1.13/arch/mips/ath79/mach-tew-712br.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tew-712br.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tew-712br.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,153 @@ -+/* -+ * TRENDnet TEW-712BR board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TEW_712BR_GPIO_BTN_WPS 11 -+#define TEW_712BR_GPIO_BTN_RESET 12 -+ -+#define TEW_712BR_GPIO_LED_LAN1 13 -+#define TEW_712BR_GPIO_LED_LAN2 14 -+#define TEW_712BR_GPIO_LED_LAN3 15 -+#define TEW_712BR_GPIO_LED_LAN4 16 -+#define TEW_712BR_GPIO_LED_POWER_GREEN 20 -+#define TEW_712BR_GPIO_LED_POWER_ORANGE 27 -+#define TEW_712BR_GPIO_LED_WAN_GREEN 17 -+#define TEW_712BR_GPIO_LED_WAN_ORANGE 23 -+#define TEW_712BR_GPIO_LED_WLAN 0 -+#define TEW_712BR_GPIO_LED_WPS 26 -+ -+#define TEW_712BR_GPIO_WAN_LED_ENABLE 1 -+ -+#define TEW_712BR_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TEW_712BR_KEYS_DEBOUNCE_INTERVAL (3 * TEW_712BR_KEYS_POLL_INTERVAL) -+ -+#define TEW_712BR_ART_ADDRESS 0x1f010000 -+#define TEW_712BR_CALDATA_OFFSET 0x1000 -+ -+#define TEW_712BR_MAC_PART_ADDRESS 0x1f020000 -+#define TEW_712BR_LAN_MAC_OFFSET 0x04 -+#define TEW_712BR_WAN_MAC_OFFSET 0x16 -+ -+static struct gpio_led tew_712br_leds_gpio[] __initdata = { -+ { -+ .name = "trendnet:green:lan1", -+ .gpio = TEW_712BR_GPIO_LED_LAN1, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:green:lan2", -+ .gpio = TEW_712BR_GPIO_LED_LAN2, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:green:lan3", -+ .gpio = TEW_712BR_GPIO_LED_LAN3, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:green:lan4", -+ .gpio = TEW_712BR_GPIO_LED_LAN4, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:blue:wps", -+ .gpio = TEW_712BR_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "trendnet:green:power", -+ .gpio = TEW_712BR_GPIO_LED_POWER_GREEN, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:orange:power", -+ .gpio = TEW_712BR_GPIO_LED_POWER_ORANGE, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:green:wan", -+ .gpio = TEW_712BR_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "trendnet:orange:wan", -+ .gpio = TEW_712BR_GPIO_LED_WAN_ORANGE, -+ .active_low = 0, -+ }, { -+ .name = "trendnet:green:wlan", -+ .gpio = TEW_712BR_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tew_712br_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TEW_712BR_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW_712BR_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TEW_712BR_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW_712BR_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init tew_712br_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(TEW_712BR_ART_ADDRESS); -+ u8 *mac = (u8 *) KSEG1ADDR(TEW_712BR_MAC_PART_ADDRESS); -+ u8 lan_mac[ETH_ALEN]; -+ u8 wan_mac[ETH_ALEN]; -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ gpio_request_one(TEW_712BR_GPIO_WAN_LED_ENABLE, -+ GPIOF_OUT_INIT_LOW, "WAN LED enable"); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_712br_leds_gpio), -+ tew_712br_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TEW_712BR_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tew_712br_gpio_keys), -+ tew_712br_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_parse_ascii_mac(mac + TEW_712BR_LAN_MAC_OFFSET, lan_mac); -+ ath79_parse_ascii_mac(mac + TEW_712BR_WAN_MAC_OFFSET, wan_mac); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(art + TEW_712BR_CALDATA_OFFSET, wan_mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TEW_712BR, "TEW-712BR", -+ "TRENDnet TEW-712BR", tew_712br_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-732br.c linux-4.1.13/arch/mips/ath79/mach-tew-732br.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tew-732br.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tew-732br.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,127 @@ -+/* -+ * TRENDnet TEW-732BR board support -+ * -+ * Copyright (C) 2013 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TEW_732BR_GPIO_BTN_WPS 16 -+#define TEW_732BR_GPIO_BTN_RESET 17 -+ -+#define TEW_732BR_GPIO_LED_POWER_GREEN 4 -+#define TEW_732BR_GPIO_LED_POWER_AMBER 14 -+#define TEW_732BR_GPIO_LED_PLANET_GREEN 12 -+#define TEW_732BR_GPIO_LED_PLANET_AMBER 22 -+ -+#define TEW_732BR_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TEW_732BR_KEYS_DEBOUNCE_INTERVAL (3 * TEW_732BR_KEYS_POLL_INTERVAL) -+ -+#define TEW_732BR_ART_ADDRESS 0x1fff0000 -+#define TEW_732BR_CALDATA_OFFSET 0x1000 -+#define TEW_732BR_LAN_MAC_OFFSET 0xffa0 -+#define TEW_732BR_WAN_MAC_OFFSET 0xffb4 -+ -+static struct gpio_led tew_732br_leds_gpio[] __initdata = { -+ { -+ .name = "trendnet:green:power", -+ .gpio = TEW_732BR_GPIO_LED_POWER_GREEN, -+ .active_low = 0, -+ }, -+ { -+ .name = "trendnet:amber:power", -+ .gpio = TEW_732BR_GPIO_LED_POWER_AMBER, -+ .active_low = 0, -+ }, -+ { -+ .name = "trendnet:green:wan", -+ .gpio = TEW_732BR_GPIO_LED_PLANET_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "trendnet:amber:wan", -+ .gpio = TEW_732BR_GPIO_LED_PLANET_AMBER, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tew_732br_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TEW_732BR_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW_732BR_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TEW_732BR_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TEW_732BR_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init tew_732br_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(TEW_732BR_ART_ADDRESS); -+ u8 lan_mac[ETH_ALEN]; -+ u8 wan_mac[ETH_ALEN]; -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_732br_leds_gpio), -+ tew_732br_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TEW_732BR_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tew_732br_gpio_keys), -+ tew_732br_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_parse_ascii_mac(art + TEW_732BR_LAN_MAC_OFFSET, lan_mac); -+ ath79_parse_ascii_mac(art + TEW_732BR_WAN_MAC_OFFSET, wan_mac); -+ -+ ath79_register_wmac(art + TEW_732BR_CALDATA_OFFSET, lan_mac); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ /* LAN: GMAC1 is connected to the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(1); -+ -+ /* WAN: GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); -+ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TEW_732BR, "TEW-732BR", "TRENDnet TEW-732BR", -+ tew_732br_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr11u.c linux-4.1.13/arch/mips/ath79/mach-tl-mr11u.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr11u.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-mr11u.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,183 @@ -+/* -+ * TP-LINK TL-MR11U/TL-MR3040 board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_MR11U_GPIO_LED_3G 27 -+#define TL_MR11U_GPIO_LED_WLAN 26 -+#define TL_MR11U_GPIO_LED_LAN 17 -+ -+#define TL_MR11U_GPIO_BTN_WPS 20 -+#define TL_MR11U_GPIO_BTN_RESET 11 -+ -+#define TL_MR11U_GPIO_USB_POWER 8 -+#define TL_MR3040_GPIO_USB_POWER 18 -+ -+#define TL_MR3040_V2_GPIO_BTN_SW1 19 -+#define TL_MR3040_V2_GPIO_BTN_SW2 20 -+ -+#define TL_MR11U_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_MR11U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR11U_KEYS_POLL_INTERVAL) -+ -+static const char *tl_mr11u_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_mr11u_flash_data = { -+ .part_probes = tl_mr11u_part_probes, -+}; -+ -+static struct gpio_led tl_mr11u_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:3g", -+ .gpio = TL_MR11U_GPIO_LED_3G, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_MR11U_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:lan", -+ .gpio = TL_MR11U_GPIO_LED_LAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_mr11u_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR11U_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR11U_GPIO_BTN_WPS, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tl_mr3040_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR11U_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "sw1", -+ .type = EV_SW, -+ .code = BTN_0, -+ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3040_V2_GPIO_BTN_SW1, -+ .active_low = 0, -+ }, -+ { -+ .desc = "sw2", -+ .type = EV_SW, -+ .code = BTN_1, -+ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3040_V2_GPIO_BTN_SW2, -+ .active_low = 0, -+ } -+}; -+ -+static void __init common_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* Disable hardware control LAN1 and LAN2 LEDs, enabling GPIO14 and GPIO15 */ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_m25p80(&tl_mr11u_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), -+ tl_mr11u_leds_gpio); -+ -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+static void __init tl_mr11u_setup(void) -+{ -+ common_setup(); -+ -+ ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr11u_gpio_keys), -+ tl_mr11u_gpio_keys); -+ gpio_request_one(TL_MR11U_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR11U, "TL-MR11U", "TP-LINK TL-MR11U", -+ tl_mr11u_setup); -+ -+static void __init tl_mr3040_setup(void) -+{ -+ common_setup(); -+ -+ ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, -+ 1, tl_mr11u_gpio_keys); -+ gpio_request_one(TL_MR3040_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3040, "TL-MR3040", "TP-LINK TL-MR3040", -+ tl_mr3040_setup); -+ -+static void __init tl_mr3040_v2_setup(void) -+{ -+ common_setup(); -+ -+ ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr3040_v2_gpio_keys), -+ tl_mr3040_v2_gpio_keys); -+ gpio_request_one(TL_MR3040_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3040_V2, "TL-MR3040-v2", "TP-LINK TL-MR3040 v2", -+ tl_mr3040_v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr13u.c linux-4.1.13/arch/mips/ath79/mach-tl-mr13u.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr13u.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-mr13u.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,107 @@ -+/* -+ * TP-LINK TL-MR13U board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_MR13U_GPIO_LED_SYSTEM 27 -+ -+#define TL_MR13U_GPIO_BTN_RESET 11 -+#define TL_MR13U_GPIO_BTN_SW1 6 -+#define TL_MR13U_GPIO_BTN_SW2 7 -+ -+#define TL_MR13U_GPIO_USB_POWER 18 -+ -+#define TL_MR13U_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_MR13U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR13U_KEYS_POLL_INTERVAL) -+ -+static const char *tl_mr13u_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_mr13u_flash_data = { -+ .part_probes = tl_mr13u_part_probes, -+}; -+ -+static struct gpio_led tl_mr13u_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:system", -+ .gpio = TL_MR13U_GPIO_LED_SYSTEM, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tl_mr13u_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR13U_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+ { -+ .desc = "sw1", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR13U_GPIO_BTN_SW1, -+ .active_low = 0, -+ }, -+ { -+ .desc = "sw2", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR13U_GPIO_BTN_SW2, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init tl_mr13u_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_m25p80(&tl_mr13u_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr13u_leds_gpio), -+ tl_mr13u_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_MR13U_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr13u_gpio_keys), -+ tl_mr13u_gpio_keys); -+ -+ gpio_request_one(TL_MR13U_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR13U, "TL-MR13U", "TP-LINK TL-MR13U v1", -+ tl_mr13u_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3020.c linux-4.1.13/arch/mips/ath79/mach-tl-mr3020.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3020.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-mr3020.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,126 @@ -+/* -+ * TP-LINK TL-MR3020 board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_MR3020_GPIO_LED_3G 27 -+#define TL_MR3020_GPIO_LED_WLAN 0 -+#define TL_MR3020_GPIO_LED_LAN 17 -+#define TL_MR3020_GPIO_LED_WPS 26 -+ -+#define TL_MR3020_GPIO_BTN_WPS 11 -+#define TL_MR3020_GPIO_BTN_SW1 18 -+#define TL_MR3020_GPIO_BTN_SW2 20 -+ -+#define TL_MR3020_GPIO_USB_POWER 8 -+ -+#define TL_MR3020_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_MR3020_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3020_KEYS_POLL_INTERVAL) -+ -+static const char *tl_mr3020_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_mr3020_flash_data = { -+ .part_probes = tl_mr3020_part_probes, -+}; -+ -+static struct gpio_led tl_mr3020_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:3g", -+ .gpio = TL_MR3020_GPIO_LED_3G, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_MR3020_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, -+ { -+ .name = "tp-link:green:lan", -+ .gpio = TL_MR3020_GPIO_LED_LAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:wps", -+ .gpio = TL_MR3020_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_mr3020_gpio_keys[] __initdata = { -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3020_GPIO_BTN_WPS, -+ .active_low = 0, -+ }, -+ { -+ .desc = "sw1", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3020_GPIO_BTN_SW1, -+ .active_low = 0, -+ }, -+ { -+ .desc = "sw2", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3020_GPIO_BTN_SW2, -+ .active_low = 0, -+ } -+}; -+ -+static void __init tl_mr3020_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_m25p80(&tl_mr3020_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), -+ tl_mr3020_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_MR3020_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr3020_gpio_keys), -+ tl_mr3020_gpio_keys); -+ -+ gpio_request_one(TL_MR3020_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3020, "TL-MR3020", "TP-LINK TL-MR3020", -+ tl_mr3020_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3x20.c linux-4.1.13/arch/mips/ath79/mach-tl-mr3x20.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3x20.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-mr3x20.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,147 @@ -+/* -+ * TP-LINK TL-MR3220/3420 board support -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define TL_MR3X20_GPIO_LED_QSS 0 -+#define TL_MR3X20_GPIO_LED_SYSTEM 1 -+#define TL_MR3X20_GPIO_LED_3G 8 -+ -+#define TL_MR3X20_GPIO_BTN_RESET 11 -+#define TL_MR3X20_GPIO_BTN_QSS 12 -+ -+#define TL_MR3X20_GPIO_USB_POWER 6 -+ -+#define TL_MR3X20_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL) -+ -+static const char *tl_mr3x20_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_mr3x20_flash_data = { -+ .part_probes = tl_mr3x20_part_probes, -+}; -+ -+static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:system", -+ .gpio = TL_MR3X20_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_MR3X20_GPIO_LED_QSS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:3g", -+ .gpio = TL_MR3X20_GPIO_LED_3G, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3X20_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3X20_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init tl_ap99_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&tl_mr3x20_flash_data); -+ -+ ath79_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr3x20_gpio_keys), -+ tl_mr3x20_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ ap91_pci_init(ee, mac); -+} -+ -+static void __init tl_mr3x20_usb_setup(void) -+{ -+ /* enable power for the USB port */ -+ gpio_request_one(TL_MR3X20_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+} -+ -+static void __init tl_mr3220_setup(void) -+{ -+ tl_ap99_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), -+ tl_mr3x20_leds_gpio); -+ ap9x_pci_setup_wmac_led_pin(0, 1); -+ tl_mr3x20_usb_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220", -+ tl_mr3220_setup); -+ -+static void __init tl_mr3420_setup(void) -+{ -+ tl_ap99_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), -+ tl_mr3x20_leds_gpio); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+ tl_mr3x20_usb_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", -+ tl_mr3420_setup); -+ -+static void __init tl_wr841n_v7_setup(void) -+{ -+ tl_ap99_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1, -+ tl_mr3x20_leds_gpio); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR841N_V7, "TL-WR841N-v7", -+ "TP-LINK TL-WR841N/ND v7", tl_wr841n_v7_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa701nd-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa701nd-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa701nd-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wa701nd-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,116 @@ -+/* -+ * TP-LINK TL-WA701ND v2 board support -+ * -+ * Copyright (C) 2015 Luigi Tarenga -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WA701NDV2_GPIO_LED_WLAN 0 -+#define TL_WA701NDV2_GPIO_LED_QSS 1 -+#define TL_WA701NDV2_GPIO_LED_LAN 17 -+#define TL_WA701NDV2_GPIO_LED_SYSTEM 27 -+ -+#define TL_WA701NDV2_GPIO_BTN_RESET 11 -+#define TL_WA701NDV2_GPIO_BTN_QSS 26 -+ -+#define TL_WA701NDV2_GPIO_USB_POWER 8 -+ -+#define TL_WA701NDV2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WA701NDV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA701NDV2_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wa701ndv2_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wa701ndv2_flash_data = { -+ .part_probes = tl_wa701ndv2_part_probes, -+}; -+ -+static struct gpio_led tl_wa701ndv2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WA701NDV2_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WA701NDV2_GPIO_LED_QSS, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:lan", -+ .gpio = TL_WA701NDV2_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WA701NDV2_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_wa701ndv2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WA701NDV2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA701NDV2_GPIO_BTN_RESET, -+ .active_low = 0, -+ } , { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WA701NDV2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA701NDV2_GPIO_BTN_QSS, -+ .active_low = 0, -+ } -+ -+}; -+ -+static void __init tl_wa701ndv2_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa701ndv2_leds_gpio), -+ tl_wa701ndv2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WA701NDV2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wa701ndv2_gpio_keys), -+ tl_wa701ndv2_gpio_keys); -+ -+ gpio_request_one(TL_WA701NDV2_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&tl_wa701ndv2_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ /* ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); */ -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA701ND_V2, "TL-WA701ND-v2", -+ "TP-LINK TL-WA701ND v2", tl_wa701ndv2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa7210n-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa7210n-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa7210n-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wa7210n-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,125 @@ -+/* -+ * TP-LINK TL-WA7210N v2.1 board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2014 Nicolas Braud-Santoni -+ * Copyright (C) 2014 Alexander List -+ * Copyright (C) 2015 Hendrik Frenzel -+ * -+ * rebased on TL-WA7510Nv1 support, -+ * Copyright (C) 2012 Stefan Helmert -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "dev-dsa.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#include "common.h" -+ -+#define TL_WA7210N_V2_GPIO_BTN_RESET 11 -+#define TL_WA7210N_V2_KEYS_POLL_INT 20 -+#define TL_WA7210N_V2_KEYS_DEBOUNCE_INT (3 * TL_WA7210N_V2_KEYS_POLL_INT) -+ -+#define TL_WA7210N_V2_GPIO_LED_LAN 17 -+#define TL_WA7210N_V2_GPIO_LED_SIG1 0 -+#define TL_WA7210N_V2_GPIO_LED_SIG2 1 -+#define TL_WA7210N_V2_GPIO_LED_SIG3 27 -+#define TL_WA7210N_V2_GPIO_LED_SIG4 26 -+ -+#define TL_WA7210N_V2_GPIO_LNA_EN 28 -+ -+static const char *tl_wa7210n_v2_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct gpio_keys_button tl_wa7210n_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WA7210N_V2_KEYS_DEBOUNCE_INT, -+ .gpio = TL_WA7210N_V2_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_led tl_wa7210n_v2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan", -+ .gpio = TL_WA7210N_V2_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:signal1", -+ .gpio = TL_WA7210N_V2_GPIO_LED_SIG1, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:signal2", -+ .gpio = TL_WA7210N_V2_GPIO_LED_SIG2, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:signal3", -+ .gpio = TL_WA7210N_V2_GPIO_LED_SIG3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:signal4", -+ .gpio = TL_WA7210N_V2_GPIO_LED_SIG4, -+ .active_low = 1, -+ }, -+}; -+ -+static struct flash_platform_data tl_wa7210n_v2_flash_data = { -+ .part_probes = tl_wa7210n_v2_part_probes, -+}; -+ -+static void __init tl_wa7210n_v2_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WA7210N_V2_KEYS_POLL_INT, -+ ARRAY_SIZE(tl_wa7210n_v2_gpio_keys), -+ tl_wa7210n_v2_gpio_keys); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa7210n_v2_leds_gpio), -+ tl_wa7210n_v2_leds_gpio); -+ -+ ath79_gpio_function_enable(TL_WA7210N_V2_GPIO_LNA_EN); -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_wmac(ee, mac); -+ -+ ath79_register_m25p80(&tl_wa7210n_v2_flash_data); -+ -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA7210N_V2, "TL-WA7210N-v2", "TP-LINK TL-WA7210N v2", -+ tl_wa7210n_v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa830re-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa830re-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa830re-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wa830re-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,132 @@ -+/* -+ * TP-LINK TL-WA830RE v2 board support -+ * -+ * Copyright (C) 2014 Fredrik Jonson -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WA830REV2_GPIO_LED_WLAN 13 -+#define TL_WA830REV2_GPIO_LED_QSS 15 -+#define TL_WA830REV2_GPIO_LED_LAN 18 -+#define TL_WA830REV2_GPIO_LED_SYSTEM 14 -+ -+#define TL_WA830REV2_GPIO_BTN_RESET 17 -+#define TL_WA830REV2_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */ -+ -+#define TL_WA830REV2_GPIO_USB_POWER 4 -+ -+#define TL_WA830REV2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA830REV2_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wa830re_v2_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wa830re_v2_flash_data = { -+ .part_probes = tl_wa830re_v2_part_probes, -+}; -+ -+static struct gpio_led tl_wa830re_v2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WA830REV2_GPIO_LED_QSS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WA830REV2_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan", -+ .gpio = TL_WA830REV2_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WA830REV2_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wa830re_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA830REV2_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "RFKILL switch", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA830REV2_GPIO_SW_RFKILL, -+ .active_low = 0, -+ } -+}; -+ -+static void __init tl_ap123_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* Disable JTAG, enabling GPIOs 0-3 */ -+ /* Configure OBS4 line, for GPIO 4*/ -+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, -+ AR934X_GPIO_FUNC_CLK_OBS4_EN); -+ -+ /* config gpio4 as normal gpio function */ -+ ath79_gpio_output_select(TL_WA830REV2_GPIO_USB_POWER, -+ AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_m25p80(&tl_wa830re_v2_flash_data); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+static void __init tl_wa830re_v2_setup(void) -+{ -+ tl_ap123_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa830re_v2_leds_gpio) - 1, -+ tl_wa830re_v2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WA830REV2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wa830re_v2_gpio_keys), -+ tl_wa830re_v2_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA830RE_V2, "TL-WA830RE-v2", "TP-LINK TL-WA830RE v2", -+ tl_wa830re_v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,127 @@ -+/* -+ * TP-LINK TL-WA901N/ND v1, TL-WA7510N v1 board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2010 Pieter Hollants -+ * Copyright (C) 2012 Stefan Helmert -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define TL_WA901ND_GPIO_LED_QSS 0 -+#define TL_WA901ND_GPIO_LED_SYSTEM 1 -+#define TL_WA901ND_GPIO_LED_LAN 13 -+ -+#define TL_WA901ND_GPIO_BTN_RESET 11 -+#define TL_WA901ND_GPIO_BTN_QSS 12 -+ -+#define TL_WA901ND_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wa901nd_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wa901nd_flash_data = { -+ .part_probes = tl_wa901nd_part_probes, -+}; -+ -+static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan", -+ .gpio = TL_WA901ND_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WA901ND_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WA901ND_GPIO_LED_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA901ND_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA901ND_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init common_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ -+ /* -+ * ath79_eth0 would be the WAN port, but is not connected. -+ * ath79_eth1 connects to the internal switch chip, however -+ * we have a single LAN port only. -+ */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(&tl_wa901nd_flash_data); -+} -+ -+static void __init tl_wa901nd_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio), -+ tl_wa901nd_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wa901nd_gpio_keys), -+ tl_wa901nd_gpio_keys); -+ -+ ap91_pci_init(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND", -+ tl_wa901nd_setup); -+ -+static void __init tl_wa7510n_v1_setup(void) -+{ -+ common_setup(); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA7510N_V1, "TL-WA7510N", "TP-LINK TL-WA7510N v1", -+ tl_wa7510n_v1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,104 @@ -+/* -+ * TP-LINK TL-WA901N/ND v2 board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2010 Pieter Hollants -+ * Copyright (C) 2011 Jonathan Bennett -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WA901ND_V2_GPIO_LED_QSS 4 -+#define TL_WA901ND_V2_GPIO_LED_SYSTEM 2 -+#define TL_WA901ND_V2_GPIO_LED_WLAN 9 -+ -+#define TL_WA901ND_V2_GPIO_BTN_RESET 3 -+#define TL_WA901ND_V2_GPIO_BTN_QSS 7 -+ -+#define TL_WA901ND_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL \ -+ (3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wa901nd_v2_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wa901nd_v2_flash_data = { -+ .part_probes = tl_wa901nd_v2_part_probes, -+}; -+ -+static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:system", -+ .gpio = TL_WA901ND_V2_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WA901ND_V2_GPIO_LED_QSS, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WA901ND_V2_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA901ND_V2_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA901ND_V2_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init tl_wa901nd_v2_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = 0x00001000; -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | -+ AR71XX_RESET_GE0_PHY; -+ ath79_register_eth(0); -+ -+ ath79_register_m25p80(&tl_wa901nd_v2_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio), -+ tl_wa901nd_v2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wa901nd_v2_gpio_keys), -+ tl_wa901nd_v2_gpio_keys); -+ -+ ath79_register_wmac(eeprom, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V2, "TL-WA901ND-v2", -+ "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wax50re.c linux-4.1.13/arch/mips/ath79/mach-tl-wax50re.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wax50re.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wax50re.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,313 @@ -+/* -+ * TP-LINK TL-WA750RE v1/TL-WA801ND v2/TL-WA850RE v1/TL-WA901ND v3 -+ * board support -+ * -+ * Copyright (C) 2013 Martijn Zilverschoon -+ * Copyright (C) 2013 Jiri Pirko -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WAX50RE_GPIO_LED_LAN 20 -+#define TL_WAX50RE_GPIO_LED_WLAN 13 -+#define TL_WAX50RE_GPIO_LED_RE 15 -+#define TL_WAX50RE_GPIO_LED_SIGNAL1 0 -+#define TL_WAX50RE_GPIO_LED_SIGNAL2 1 -+#define TL_WAX50RE_GPIO_LED_SIGNAL3 2 -+#define TL_WAX50RE_GPIO_LED_SIGNAL4 3 -+#define TL_WAX50RE_GPIO_LED_SIGNAL5 4 -+ -+#define TL_WA860RE_GPIO_LED_WLAN_ORANGE 0 -+#define TL_WA860RE_GPIO_LED_WLAN_GREEN 2 -+#define TL_WA860RE_GPIO_LED_POWER_ORANGE 12 -+#define TL_WA860RE_GPIO_LED_POWER_GREEN 14 -+#define TL_WA860RE_GPIO_LED_LAN 20 -+ -+#define TL_WA801ND_V2_GPIO_LED_LAN 18 -+#define TL_WA801ND_V2_GPIO_LED_SYSTEM 14 -+ -+#define TL_WAX50RE_GPIO_BTN_RESET 17 -+#define TL_WAX50RE_GPIO_BTN_WPS 16 -+ -+#define TL_WA860RE_GPIO_BTN_RESET 17 -+#define TL_WA860RE_GPIO_BTN_WPS 16 -+#define TL_WA860RE_GPIO_BTN_ONOFF 11 -+ -+#define TL_WAX50RE_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL (3 * TL_WAX50RE_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wax50re_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wax50re_flash_data = { -+ .part_probes = tl_wax50re_part_probes, -+}; -+ -+static struct gpio_led tl_wa750re_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:orange:lan", -+ .gpio = TL_WAX50RE_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:wlan", -+ .gpio = TL_WAX50RE_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:re", -+ .gpio = TL_WAX50RE_GPIO_LED_RE, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:signal1", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:signal2", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:signal3", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:signal4", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:signal5", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL5, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led tl_wa850re_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:lan", -+ .gpio = TL_WAX50RE_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:wlan", -+ .gpio = TL_WAX50RE_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:re", -+ .gpio = TL_WAX50RE_GPIO_LED_RE, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:signal1", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:signal2", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:signal3", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:signal4", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:blue:signal5", -+ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL5, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led tl_wa860re_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan", -+ .gpio = TL_WA860RE_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:power", -+ .gpio = TL_WA860RE_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:power", -+ .gpio = TL_WA860RE_GPIO_LED_POWER_ORANGE, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WA860RE_GPIO_LED_WLAN_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:orange:wlan", -+ .gpio = TL_WA860RE_GPIO_LED_WLAN_ORANGE, -+ .active_low = 1, -+ }, -+}; -+ -+ -+static struct gpio_keys_button tl_wax50re_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WAX50RE_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "WPS", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WAX50RE_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wa860re_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA860RE_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "WPS", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA860RE_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, { -+ .desc = "ONOFF", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WA860RE_GPIO_BTN_ONOFF, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led tl_wa801nd_v2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan", -+ .gpio = TL_WA801ND_V2_GPIO_LED_LAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WAX50RE_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WAX50RE_GPIO_LED_RE, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WA801ND_V2_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init tl_ap123_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&tl_wax50re_flash_data); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+static void __init tl_wa750re_setup(void) -+{ -+ tl_ap123_setup(); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa750re_leds_gpio), -+ tl_wa750re_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wax50re_gpio_keys), -+ tl_wax50re_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA750RE, "TL-WA750RE", "TP-LINK TL-WA750RE", -+ tl_wa750re_setup); -+ -+static void __init tl_wa801nd_v2_setup(void) -+{ -+ tl_ap123_setup(); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa801nd_v2_leds_gpio), -+ tl_wa801nd_v2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wax50re_gpio_keys), -+ tl_wax50re_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA801ND_V2, "TL-WA801ND-v2", "TP-LINK TL-WA801ND v2", -+ tl_wa801nd_v2_setup); -+ -+static void __init tl_wa850re_setup(void) -+{ -+ tl_ap123_setup(); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa850re_leds_gpio), -+ tl_wa850re_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wax50re_gpio_keys), -+ tl_wax50re_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA850RE, "TL-WA850RE", "TP-LINK TL-WA850RE", -+ tl_wa850re_setup); -+ -+static void __init tl_wa860re_setup(void) -+{ -+ tl_ap123_setup(); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa860re_leds_gpio), -+ tl_wa860re_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wa860re_gpio_keys), -+ tl_wa860re_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA860RE, "TL-WA860RE", "TP-LINK TL-WA860RE", -+ tl_wa860re_setup); -+ -+static void __init tl_wa901nd_v3_setup(void) -+{ -+ tl_ap123_setup(); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa801nd_v2_leds_gpio), -+ tl_wa801nd_v2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wax50re_gpio_keys) - 1, -+ tl_wax50re_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V3, "TL-WA901ND-v3", "TP-LINK TL-WA901ND v3", -+ tl_wa901nd_v3_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3320-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr3320-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3320-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr3320-v2.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,146 @@ -+/* -+ * TP-LINK TL-WDR3320 v2 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2015 Weijie Gao -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WDR3320_GPIO_LED_WLAN5G 12 -+#define WDR3320_GPIO_LED_SYSTEM 14 -+#define WDR3320_GPIO_LED_QSS 15 -+#define WDR3320_GPIO_LED_WAN 4 -+#define WDR3320_GPIO_LED_LAN1 18 -+#define WDR3320_GPIO_LED_LAN2 20 -+#define WDR3320_GPIO_LED_LAN3 21 -+#define WDR3320_GPIO_LED_LAN4 22 -+ -+#define WDR3320_GPIO_BTN_RESET 16 -+ -+#define WDR3320_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WDR3320_KEYS_DEBOUNCE_INTERVAL (3 * WDR3320_KEYS_POLL_INTERVAL) -+ -+#define WDR3320_WMAC_CALDATA_OFFSET 0x1000 -+#define WDR3320_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *wdr3320_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data wdr3320_flash_data = { -+ .part_probes = wdr3320_part_probes, -+}; -+ -+static struct gpio_led wdr3320_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:qss", -+ .gpio = WDR3320_GPIO_LED_QSS, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:system", -+ .gpio = WDR3320_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:wlan5g", -+ .gpio = WDR3320_GPIO_LED_WLAN5G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wdr3320_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WDR3320_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WDR3320_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init wdr3320_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&wdr3320_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3320_leds_gpio), -+ wdr3320_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WDR3320_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wdr3320_gpio_keys), -+ wdr3320_gpio_keys); -+ -+ ath79_init_mac(tmpmac, mac, 0); -+ ath79_register_wmac(art + WDR3320_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_init_mac(tmpmac, mac, -1); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+ ap91_pci_init(art + WDR3320_PCIE_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* LAN */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ -+ /* GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+ -+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN1, -+ AR934X_GPIO_OUT_LED_LINK0); -+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN2, -+ AR934X_GPIO_OUT_LED_LINK1); -+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN3, -+ AR934X_GPIO_OUT_LED_LINK2); -+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN4, -+ AR934X_GPIO_OUT_LED_LINK3); -+ ath79_gpio_output_select(WDR3320_GPIO_LED_WAN, -+ AR934X_GPIO_OUT_LED_LINK4); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WDR3320_V2, "TL-WDR3320-v2", -+ "TP-LINK TL-WDR3320 v2", -+ wdr3320_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3500.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr3500.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3500.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr3500.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,169 @@ -+/* -+ * TP-LINK TL-WDR3500 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2013 Gui Iribarren -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WDR3500_GPIO_LED_USB 11 -+#define WDR3500_GPIO_LED_WLAN2G 13 -+#define WDR3500_GPIO_LED_SYSTEM 14 -+#define WDR3500_GPIO_LED_QSS 15 -+#define WDR3500_GPIO_LED_WAN 18 -+#define WDR3500_GPIO_LED_LAN1 19 -+#define WDR3500_GPIO_LED_LAN2 20 -+#define WDR3500_GPIO_LED_LAN3 21 -+#define WDR3500_GPIO_LED_LAN4 22 -+ -+#define WDR3500_GPIO_BTN_WPS 16 -+#define WDR3500_GPIO_BTN_RFKILL 17 -+ -+#define WDR3500_GPIO_USB_POWER 12 -+ -+#define WDR3500_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WDR3500_KEYS_DEBOUNCE_INTERVAL (3 * WDR3500_KEYS_POLL_INTERVAL) -+ -+#define WDR3500_MAC0_OFFSET 0 -+#define WDR3500_MAC1_OFFSET 6 -+#define WDR3500_WMAC_CALDATA_OFFSET 0x1000 -+#define WDR3500_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *wdr3500_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data wdr3500_flash_data = { -+ .part_probes = wdr3500_part_probes, -+}; -+ -+static struct gpio_led wdr3500_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:qss", -+ .gpio = WDR3500_GPIO_LED_QSS, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:system", -+ .gpio = WDR3500_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:usb", -+ .gpio = WDR3500_GPIO_LED_USB, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:wlan2g", -+ .gpio = WDR3500_GPIO_LED_WLAN2G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = { -+ { -+ .desc = "QSS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WDR3500_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL switch", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WDR3500_GPIO_BTN_RFKILL, -+ }, -+}; -+ -+ -+static void __init wdr3500_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&wdr3500_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio), -+ wdr3500_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wdr3500_gpio_keys), -+ wdr3500_gpio_keys); -+ -+ ath79_init_mac(tmpmac, mac, 0); -+ ath79_register_wmac(art + WDR3500_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_init_mac(tmpmac, mac, 1); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+ ap91_pci_init(art + WDR3500_PCIE_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* LAN */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2); -+ -+ /* GMAC0 is connected to the PHY4 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ ath79_register_eth(0); -+ -+ gpio_request_one(WDR3500_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1, -+ AR934X_GPIO_OUT_LED_LINK3); -+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2, -+ AR934X_GPIO_OUT_LED_LINK2); -+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3, -+ AR934X_GPIO_OUT_LED_LINK1); -+ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4, -+ AR934X_GPIO_OUT_LED_LINK0); -+ ath79_gpio_output_select(WDR3500_GPIO_LED_WAN, -+ AR934X_GPIO_OUT_LED_LINK4); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500", -+ "TP-LINK TL-WDR3500", -+ wdr3500_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr4300.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr4300.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr4300.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr4300.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,206 @@ -+/* -+ * TP-LINK TL-WDR4300 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WDR4300_GPIO_LED_USB1 11 -+#define WDR4300_GPIO_LED_USB2 12 -+#define WDR4300_GPIO_LED_WLAN2G 13 -+#define WDR4300_GPIO_LED_SYSTEM 14 -+#define WDR4300_GPIO_LED_QSS 15 -+ -+#define WDR4300_GPIO_BTN_WPS 16 -+#define WDR4300_GPIO_BTN_RFKILL 17 -+ -+#define WDR4300_GPIO_EXTERNAL_LNA0 18 -+#define WDR4300_GPIO_EXTERNAL_LNA1 19 -+ -+#define WDR4300_GPIO_USB1_POWER 22 -+#define WDR4300_GPIO_USB2_POWER 21 -+ -+#define WDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WDR4300_KEYS_POLL_INTERVAL) -+ -+#define WDR4300_MAC0_OFFSET 0 -+#define WDR4300_MAC1_OFFSET 6 -+#define WDR4300_WMAC_CALDATA_OFFSET 0x1000 -+#define WDR4300_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *wdr4300_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data wdr4300_flash_data = { -+ .part_probes = wdr4300_part_probes, -+}; -+ -+static struct gpio_led wdr4300_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:qss", -+ .gpio = WDR4300_GPIO_LED_QSS, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:system", -+ .gpio = WDR4300_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:usb1", -+ .gpio = WDR4300_GPIO_LED_USB1, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:usb2", -+ .gpio = WDR4300_GPIO_LED_USB2, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:wlan2g", -+ .gpio = WDR4300_GPIO_LED_WLAN2G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = { -+ { -+ .desc = "QSS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WDR4300_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL switch", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WDR4300_GPIO_BTN_RFKILL, -+ .active_low = 1, -+ }, -+}; -+ -+static const struct ar8327_led_info wdr4300_leds_ar8327[] __initconst = { -+ AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), -+ AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), -+ AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), -+ AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), -+ AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), -+}; -+ -+static struct ar8327_pad_cfg wdr4300_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg wdr4300_ar8327_led_cfg = { -+ .led_ctrl0 = 0xc737c737, -+ .led_ctrl1 = 0x00000000, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x0030c300, -+ .open_drain = false, -+}; -+ -+static struct ar8327_platform_data wdr4300_ar8327_data = { -+ .pad0_cfg = &wdr4300_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &wdr4300_ar8327_led_cfg, -+ .num_leds = ARRAY_SIZE(wdr4300_leds_ar8327), -+ .leds = wdr4300_leds_ar8327, -+}; -+ -+static struct mdio_board_info wdr4300_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wdr4300_ar8327_data, -+ }, -+}; -+ -+static void __init wdr4300_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&wdr4300_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio), -+ wdr4300_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wdr4300_gpio_keys), -+ wdr4300_gpio_keys); -+ -+ ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0); -+ ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1); -+ -+ ath79_init_mac(tmpmac, mac, -1); -+ ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_init_mac(tmpmac, mac, 0); -+ ap9x_pci_setup_wmac_led_pin(0, 0); -+ ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ -+ mdiobus_register_board_info(wdr4300_mdio0_info, -+ ARRAY_SIZE(wdr4300_mdio0_info)); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2); -+ -+ /* GMAC0 is connected to an AR8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ gpio_request_one(WDR4300_GPIO_USB1_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB1 power"); -+ gpio_request_one(WDR4300_GPIO_USB2_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB2 power"); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WDR4300, "TL-WDR4300", -+ "TP-LINK TL-WDR3600/4300/4310", -+ wdr4300_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr6500-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr6500-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr6500-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr6500-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,141 @@ -+/* -+ * TP-LINK TL-WDR6500 v2 -+ * -+ * Copyright (C) 2015 Weijie Gao -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define TL_WDR6500_V2_GPIO_LED_SYS 21 -+#define TL_WDR6500_V2_GPIO_LED_WAN 18 -+#define TL_WDR6500_V2_GPIO_LED_LAN1 17 -+#define TL_WDR6500_V2_GPIO_LED_LAN2 16 -+#define TL_WDR6500_V2_GPIO_LED_LAN3 15 -+#define TL_WDR6500_V2_GPIO_LED_LAN4 14 -+ -+#define TL_WDR6500_V2_GPIO_BTN_RESET 1 -+ -+#define TL_WDR6500_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WDR6500_V2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WDR6500_V2_KEYS_POLL_INTERVAL) -+ -+#define TL_WDR6500_V2_WMAC_CALDATA_OFFSET 0x1000 -+#define TL_WDR6500_V2_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *tl_wdr6500_v2_part_probes[] = { -+ "tp-link-64k", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wdr6500_v2_flash_data = { -+ .part_probes = tl_wdr6500_v2_part_probes, -+}; -+ -+static struct gpio_led tl_wdr6500_v2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan1", -+ .gpio = TL_WDR6500_V2_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan2", -+ .gpio = TL_WDR6500_V2_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan3", -+ .gpio = TL_WDR6500_V2_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan4", -+ .gpio = TL_WDR6500_V2_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wan", -+ .gpio = TL_WDR6500_V2_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:white:system", -+ .gpio = TL_WDR6500_V2_GPIO_LED_SYS, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wdr6500_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WDR6500_V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WDR6500_V2_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+ -+static void __init tl_ap151_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f00fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&tl_wdr6500_v2_flash_data); -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* WAN */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_register_eth(0); -+ -+ /* LAN */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_eth(1); -+ -+ ath79_init_mac(tmpmac, mac, -1); -+ ath79_register_wmac(ee + TL_WDR6500_V2_WMAC_CALDATA_OFFSET, tmpmac); -+ -+ ath79_register_pci(); -+ -+ ath79_register_usb(); -+} -+ -+static void __init tl_wdr6500_v2_setup(void) -+{ -+ tl_ap151_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wdr6500_v2_leds_gpio), -+ tl_wdr6500_v2_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WDR6500_V2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wdr6500_v2_gpio_keys), -+ tl_wdr6500_v2_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WDR6500_V2, "TL-WDR6500-v2", "TP-LINK TL-WDR6500 v2", -+ tl_wdr6500_v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1041n-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wr1041n-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1041n-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr1041n-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,138 @@ -+/* -+ * TP-LINK TL-WR1041 v2 board support -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * Copyright (C) 2011-2012 Anan Huang -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR1041NV2_GPIO_BTN_RESET 14 -+#define TL_WR1041NV2_GPIO_LED_WPS 13 -+#define TL_WR1041NV2_GPIO_LED_WLAN 11 -+ -+#define TL_WR1041NV2_GPIO_LED_SYSTEM 12 -+ -+#define TL_WR1041NV2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1041NV2_KEYS_POLL_INTERVAL) -+ -+#define TL_WR1041NV2_PCIE_CALDATA_OFFSET 0x5000 -+ -+static const char *tl_wr1041nv2_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr1041nv2_flash_data = { -+ .part_probes = tl_wr1041nv2_part_probes, -+}; -+ -+static struct gpio_led tl_wr1041nv2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR1041NV2_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wps", -+ .gpio = TL_WR1041NV2_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR1041NV2_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_wr1041nv2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR1041NV2_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data db120_ar8327_data = { -+ .pad0_cfg = &db120_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ } -+}; -+ -+static struct mdio_board_info db120_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &db120_ar8327_data, -+ }, -+}; -+ -+static void __init tl_wr1041nv2_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&tl_wr1041nv2_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio), -+ tl_wr1041nv2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr1041nv2_gpio_keys), -+ tl_wr1041nv2_gpio_keys); -+ ath79_register_wmac(ee, mac); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ -+ mdiobus_register_board_info(db120_mdio0_info, -+ ARRAY_SIZE(db120_mdio0_info)); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR1041N_V2, "TL-WR1041N-v2", -+ "TP-LINK TL-WR1041N v2", tl_wr1041nv2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,141 @@ -+/* -+ * TP-LINK TL-WR1043N/ND board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR1043ND_GPIO_LED_USB 1 -+#define TL_WR1043ND_GPIO_LED_SYSTEM 2 -+#define TL_WR1043ND_GPIO_LED_QSS 5 -+#define TL_WR1043ND_GPIO_LED_WLAN 9 -+ -+#define TL_WR1043ND_GPIO_BTN_RESET 3 -+#define TL_WR1043ND_GPIO_BTN_QSS 7 -+ -+#define TL_WR1043ND_GPIO_RTL8366_SDA 18 -+#define TL_WR1043ND_GPIO_RTL8366_SCK 19 -+ -+#define TL_WR1043ND_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr1043nd_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr1043nd_flash_data = { -+ .part_probes = tl_wr1043nd_part_probes, -+}; -+ -+static struct gpio_led tl_wr1043nd_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:usb", -+ .gpio = TL_WR1043ND_GPIO_LED_USB, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR1043ND_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR1043ND_GPIO_LED_QSS, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR1043ND_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR1043ND_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR1043ND_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static void tl_wr1043nd_rtl8366rb_hw_reset(bool active) -+{ -+ if (active) -+ ath79_device_reset_set(AR71XX_RESET_GE0_PHY); -+ else -+ ath79_device_reset_clear(AR71XX_RESET_GE0_PHY); -+} -+ -+static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = { -+ .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA, -+ .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK, -+ .hw_reset = tl_wr1043nd_rtl8366rb_hw_reset, -+}; -+ -+static struct platform_device tl_wr1043nd_rtl8366rb_device = { -+ .name = RTL8366RB_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &tl_wr1043nd_rtl8366rb_data, -+ } -+}; -+ -+static void __init tl_wr1043nd_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ tl_wr1043nd_rtl8366rb_hw_reset(true); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_pll_data.pll_1000 = 0x1a000000; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(&tl_wr1043nd_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio), -+ tl_wr1043nd_leds_gpio); -+ -+ platform_device_register(&tl_wr1043nd_rtl8366rb_device); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr1043nd_gpio_keys), -+ tl_wr1043nd_gpio_keys); -+ -+ ath79_register_wmac(eeprom, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND", -+ tl_wr1043nd_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd-v2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd-v2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd-v2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,215 @@ -+/* -+ * TP-LINK TL-WR1043ND v2 board support -+ * -+ * Copyright (c) 2013 Gabor Juhos -+ * -+ * Based on the Qualcomm Atheros AP135/AP136 reference board support code -+ * Copyright (c) 2012 Qualcomm Atheros -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR1043_V2_GPIO_LED_WLAN 12 -+#define TL_WR1043_V2_GPIO_LED_USB 15 -+#define TL_WR1043_V2_GPIO_LED_WPS 18 -+#define TL_WR1043_V2_GPIO_LED_SYSTEM 19 -+ -+#define TL_WR1043_V2_GPIO_BTN_RESET 16 -+#define TL_WR1043_V2_GPIO_BTN_RFKILL 17 -+ -+#define TL_WR1043_V2_GPIO_USB_POWER 21 -+ -+#define TL_WR1043_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043_V2_KEYS_POLL_INTERVAL) -+ -+#define TL_WR1043_V2_WMAC_CALDATA_OFFSET 0x1000 -+ -+static const char *wr1043nd_v2_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data wr1043nd_v2_flash_data = { -+ .part_probes = wr1043nd_v2_part_probes, -+}; -+ -+static struct gpio_led tl_wr1043_v2_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:wps", -+ .gpio = TL_WR1043_V2_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR1043_V2_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR1043_V2_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:green:usb", -+ .gpio = TL_WR1043_V2_GPIO_LED_USB, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr1043_v2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR1043_V2_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR1043_V2_GPIO_BTN_RFKILL, -+ .active_low = 1, -+ }, -+}; -+ -+static const struct ar8327_led_info tl_wr1043_leds_ar8327[] = { -+ AR8327_LED_INFO(PHY0_0, HW, "tp-link:green:lan4"), -+ AR8327_LED_INFO(PHY1_0, HW, "tp-link:green:lan3"), -+ AR8327_LED_INFO(PHY2_0, HW, "tp-link:green:lan2"), -+ AR8327_LED_INFO(PHY3_0, HW, "tp-link:green:lan1"), -+ AR8327_LED_INFO(PHY4_0, HW, "tp-link:green:wan"), -+}; -+ -+/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ -+static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_SGMII, -+ .sgmii_delay_en = true, -+}; -+ -+/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ -+static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad6_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg wr1043nd_v2_ar8327_led_cfg = { -+ .led_ctrl0 = 0xcc35cc35, -+ .led_ctrl1 = 0xca35ca35, -+ .led_ctrl2 = 0xc935c935, -+ .led_ctrl3 = 0x03ffff00, -+ .open_drain = true, -+}; -+ -+static struct ar8327_platform_data wr1043nd_v2_ar8327_data = { -+ .pad0_cfg = &wr1043nd_v2_ar8327_pad0_cfg, -+ .pad6_cfg = &wr1043nd_v2_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &wr1043nd_v2_ar8327_led_cfg, -+ .num_leds = ARRAY_SIZE(tl_wr1043_leds_ar8327), -+ .leds = tl_wr1043_leds_ar8327, -+}; -+ -+static struct mdio_board_info wr1043nd_v2_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wr1043nd_v2_ar8327_data, -+ }, -+}; -+ -+static void __init tl_wr1043nd_v2_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(&wr1043nd_v2_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043_v2_leds_gpio), -+ tl_wr1043_v2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_WR1043_V2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr1043_v2_gpio_keys), -+ tl_wr1043_v2_gpio_keys); -+ -+ ath79_register_wmac(art + TL_WR1043_V2_WMAC_CALDATA_OFFSET, mac); -+ -+ mdiobus_register_board_info(wr1043nd_v2_mdio0_info, -+ ARRAY_SIZE(wr1043nd_v2_mdio0_info)); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x56000000; -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ -+ gpio_request_one(TL_WR1043_V2_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR1043ND_V2, "TL-WR1043ND-v2", -+ "TP-LINK TL-WR1043ND v2", tl_wr1043nd_v2_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr2543n.c linux-4.1.13/arch/mips/ath79/mach-tl-wr2543n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr2543n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr2543n.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,156 @@ -+/* -+ * TP-LINK TL-WR2543N/ND board support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define TL_WR2543N_GPIO_LED_WPS 0 -+#define TL_WR2543N_GPIO_LED_USB 8 -+ -+/* The WLAN LEDs use GPIOs on the discrete AR9380 wmac */ -+#define TL_WR2543N_GPIO_WMAC_LED_WLAN2G 0 -+#define TL_WR2543N_GPIO_WMAC_LED_WLAN5G 1 -+ -+#define TL_WR2543N_GPIO_BTN_RESET 11 -+#define TL_WR2543N_GPIO_BTN_WPS 12 -+ -+#define TL_WR2543N_GPIO_RTL8367_SDA 1 -+#define TL_WR2543N_GPIO_RTL8367_SCK 6 -+ -+#define TL_WR2543N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR2543N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR2543N_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr2543n_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr2543n_flash_data = { -+ .part_probes = tl_wr2543n_part_probes, -+}; -+ -+static struct gpio_led tl_wr2543n_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:usb", -+ .gpio = TL_WR2543N_GPIO_LED_USB, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wps", -+ .gpio = TL_WR2543N_GPIO_LED_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led tl_wr2543n_wmac_leds_gpio[] = { -+ { -+ .name = "tp-link:green:wlan5g", -+ .gpio = TL_WR2543N_GPIO_WMAC_LED_WLAN5G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr2543n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR2543N_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR2543N_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static struct rtl8367_extif_config tl_wr2543n_rtl8367_extif0_cfg = { -+ .mode = RTL8367_EXTIF_MODE_RGMII, -+ .txdelay = 1, -+ .rxdelay = 0, -+ .ability = { -+ .force_mode = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ .link = 1, -+ .duplex = 1, -+ .speed = RTL8367_PORT_SPEED_1000, -+ }, -+}; -+ -+static struct rtl8367_platform_data tl_wr2543n_rtl8367_data = { -+ .gpio_sda = TL_WR2543N_GPIO_RTL8367_SDA, -+ .gpio_sck = TL_WR2543N_GPIO_RTL8367_SCK, -+ .extif0_cfg = &tl_wr2543n_rtl8367_extif0_cfg, -+}; -+ -+static struct platform_device tl_wr2543n_rtl8367_device = { -+ .name = RTL8367_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &tl_wr2543n_rtl8367_data, -+ } -+}; -+ -+static void __init tl_wr2543n_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&tl_wr2543n_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr2543n_leds_gpio), -+ tl_wr2543n_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_WR2543N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr2543n_gpio_keys), -+ tl_wr2543n_gpio_keys); -+ ath79_register_usb(); -+ -+ /* -+ * The ath9k driver uses this pin for its default led device, which is -+ * named ath9k-phy0, and reflects activity on either the 2 GHz or 5 GHz -+ * bands. This pin is connected to the WR2543's 2GHz WLAN LED. -+ */ -+ ap9x_pci_setup_wmac_led_pin(0, TL_WR2543N_GPIO_WMAC_LED_WLAN2G); -+ -+ /* -+ * We also have the driver set up an led device for the WR2543's -+ * separate 5 GHz WLAN LED in case the user wants it. -+ */ -+ ap9x_pci_setup_wmac_leds(0, tl_wr2543n_wmac_leds_gpio, -+ ARRAY_SIZE(tl_wr2543n_wmac_leds_gpio)); -+ ap91_pci_init(eeprom, mac); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); -+ ath79_eth0_data.mii_bus_dev = &tl_wr2543n_rtl8367_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_pll_data.pll_1000 = 0x1a000000; -+ -+ ath79_register_eth(0); -+ -+ platform_device_register(&tl_wr2543n_rtl8367_device); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR2543N, "TL-WR2543N", "TP-LINK TL-WR2543N/ND", -+ tl_wr2543n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr703n.c linux-4.1.13/arch/mips/ath79/mach-tl-wr703n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr703n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr703n.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,118 @@ -+/* -+ * TP-LINK TL-WR703N/TL-MR10U board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR703N_GPIO_LED_SYSTEM 27 -+#define TL_WR703N_GPIO_BTN_RESET 11 -+ -+#define TL_WR703N_GPIO_USB_POWER 8 -+ -+#define TL_MR10U_GPIO_USB_POWER 18 -+ -+#define TL_WR703N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR703N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR703N_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr703n_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr703n_flash_data = { -+ .part_probes = tl_wr703n_part_probes, -+}; -+ -+static struct gpio_led tl_wr703n_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:system", -+ .gpio = TL_WR703N_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr703n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR703N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR703N_GPIO_BTN_RESET, -+ .active_low = 0, -+ } -+}; -+ -+static void __init common_setup(unsigned usb_power_gpio, bool sec_ethernet) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_m25p80(&tl_wr703n_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), -+ tl_wr703n_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr703n_gpio_keys), -+ tl_wr703n_gpio_keys); -+ -+ gpio_request_one(usb_power_gpio, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ -+ if (sec_ethernet) -+ { -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ ath79_register_eth(1); -+ } -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+static void __init tl_mr10u_setup(void) -+{ -+ common_setup(TL_MR10U_GPIO_USB_POWER, false); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR10U, "TL-MR10U", "TP-LINK TL-MR10U", -+ tl_mr10u_setup); -+ -+static void __init tl_wr703n_setup(void) -+{ -+ common_setup(TL_WR703N_GPIO_USB_POWER, false); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR703N, "TL-WR703N", "TP-LINK TL-WR703N v1", -+ tl_wr703n_setup); -+ -+static void __init tl_wr710n_setup(void) -+{ -+ common_setup(TL_WR703N_GPIO_USB_POWER, true); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR710N, "TL-WR710N", "TP-LINK TL-WR710N v1", -+ tl_wr710n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr720n-v3.c linux-4.1.13/arch/mips/ath79/mach-tl-wr720n-v3.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr720n-v3.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr720n-v3.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,108 @@ -+/* -+ * TP-LINK TL-WR720N board support -+ * -+ * Copyright (C) 2011 dongyuqi <729650915@qq.com> -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * Copyright (C) 2013 yousong -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR720N_GPIO_LED_SYSTEM 27 -+#define TL_WR720N_GPIO_BTN_RESET 11 -+#define TL_WR720N_GPIO_BTN_SW1 18 -+#define TL_WR720N_GPIO_BTN_SW2 20 -+ -+#define TL_WR720N_GPIO_USB_POWER 8 -+ -+#define TL_WR720N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR720N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR720N_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr720n_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr720n_flash_data = { -+ .part_probes = tl_wr720n_part_probes, -+}; -+ -+static struct gpio_led tl_wr720n_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:system", -+ .gpio = TL_WR720N_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr720n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR720N_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, { -+ .desc = "sw1", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR720N_GPIO_BTN_SW1, -+ .active_low = 0, -+ }, { -+ .desc = "sw2", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR720N_GPIO_BTN_SW2, -+ .active_low = 0, -+ } -+}; -+ -+static void __init tl_wr720n_v3_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_m25p80(&tl_wr720n_flash_data); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr720n_leds_gpio), -+ tl_wr720n_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TL_WR720N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr720n_gpio_keys), -+ tl_wr720n_gpio_keys); -+ -+ gpio_request_one(TL_WR720N_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR720N_V3, "TL-WR720N-v3", "TP-LINK TL-WR720N v3/v4", -+ tl_wr720n_v3_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,130 @@ -+/* -+ * TP-LINK TL-WR741ND board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define TL_WR741ND_GPIO_LED_QSS 0 -+#define TL_WR741ND_GPIO_LED_SYSTEM 1 -+#define TL_WR741ND_GPIO_LED_LAN1 13 -+#define TL_WR741ND_GPIO_LED_LAN2 14 -+#define TL_WR741ND_GPIO_LED_LAN3 15 -+#define TL_WR741ND_GPIO_LED_LAN4 16 -+#define TL_WR741ND_GPIO_LED_WAN 17 -+ -+#define TL_WR741ND_GPIO_BTN_RESET 11 -+#define TL_WR741ND_GPIO_BTN_QSS 12 -+ -+#define TL_WR741ND_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr741nd_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr741nd_flash_data = { -+ .part_probes = tl_wr741nd_part_probes, -+}; -+ -+static struct gpio_led tl_wr741nd_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan1", -+ .gpio = TL_WR741ND_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan2", -+ .gpio = TL_WR741ND_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan3", -+ .gpio = TL_WR741ND_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan4", -+ .gpio = TL_WR741ND_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR741ND_GPIO_LED_QSS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR741ND_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wan", -+ .gpio = TL_WR741ND_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR741ND_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR741ND_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init tl_wr741nd_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&tl_wr741nd_flash_data); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio), -+ tl_wr741nd_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr741nd_gpio_keys), -+ tl_wr741nd_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 1); -+ ap91_pci_init(ee, mac); -+} -+MIPS_MACHINE(ATH79_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND", -+ tl_wr741nd_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd-v4.c linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd-v4.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd-v4.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd-v4.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,187 @@ -+/* -+ * TP-LINK TL-WR741ND v4/TL-MR3220 v2 board support -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR741NDV4_GPIO_BTN_RESET 11 -+#define TL_WR741NDV4_GPIO_BTN_WPS 26 -+ -+#define TL_WR741NDV4_GPIO_LED_WLAN 0 -+#define TL_WR741NDV4_GPIO_LED_QSS 1 -+#define TL_WR741NDV4_GPIO_LED_WAN 13 -+#define TL_WR741NDV4_GPIO_LED_LAN1 14 -+#define TL_WR741NDV4_GPIO_LED_LAN2 15 -+#define TL_WR741NDV4_GPIO_LED_LAN3 16 -+#define TL_WR741NDV4_GPIO_LED_LAN4 17 -+#define TL_WR741NDV4_GPIO_LED_SYSTEM 27 -+ -+#define TL_MR3220V2_GPIO_BTN_WPS 11 -+#define TL_MR3220V2_GPIO_BTN_WIFI 24 -+ -+#define TL_MR3220V2_GPIO_LED_3G 26 -+#define TL_MR3220V2_GPIO_USB_POWER 8 -+ -+#define TL_WR741NDV4_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741NDV4_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr741ndv4_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr741ndv4_flash_data = { -+ .part_probes = tl_wr741ndv4_part_probes, -+}; -+ -+static struct gpio_led tl_wr741ndv4_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan1", -+ .gpio = TL_WR741NDV4_GPIO_LED_LAN1, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:lan2", -+ .gpio = TL_WR741NDV4_GPIO_LED_LAN2, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:lan3", -+ .gpio = TL_WR741NDV4_GPIO_LED_LAN3, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:lan4", -+ .gpio = TL_WR741NDV4_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR741NDV4_GPIO_LED_QSS, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR741NDV4_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wan", -+ .gpio = TL_WR741NDV4_GPIO_LED_WAN, -+ .active_low = 0, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR741NDV4_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, { -+ /* the 3G LED is only present on the MR3220 v2 */ -+ .name = "tp-link:green:3g", -+ .gpio = TL_MR3220V2_GPIO_LED_3G, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr741ndv4_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR741NDV4_GPIO_BTN_RESET, -+ .active_low = 0, -+ }, { -+ .desc = "WPS", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR741NDV4_GPIO_BTN_WPS, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button tl_mr3220v2_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3220V2_GPIO_BTN_WPS, -+ .active_low = 0, -+ }, { -+ .desc = "WIFI button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_MR3220V2_GPIO_BTN_WIFI, -+ .active_low = 0, -+ } -+}; -+ -+static void __init tl_ap121_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_setup_ar933x_phy4_switch(true, true); -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_m25p80(&tl_wr741ndv4_flash_data); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+static void __init tl_wr741ndv4_setup(void) -+{ -+ tl_ap121_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio) - 1, -+ tl_wr741ndv4_leds_gpio); -+ ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr741ndv4_gpio_keys), -+ tl_wr741ndv4_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR741ND_V4, "TL-WR741ND-v4", -+ "TP-LINK TL-WR741ND v4", tl_wr741ndv4_setup); -+ -+static void __init tl_mr3220v2_setup(void) -+{ -+ tl_ap121_setup(); -+ -+ gpio_request_one(TL_MR3220V2_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio), -+ tl_wr741ndv4_leds_gpio); -+ ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr3220v2_gpio_keys), -+ tl_mr3220v2_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3220_V2, "TL-MR3220-v2", -+ "TP-LINK TL-MR3220 v2", tl_mr3220v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n.c linux-4.1.13/arch/mips/ath79/mach-tl-wr841n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr841n.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,140 @@ -+/* -+ * TP-LINK TL-WR841N/ND v1 board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-dsa.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2 -+#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4 -+#define TL_WR841ND_V1_GPIO_LED_QSS_RED 5 -+ -+#define TL_WR841ND_V1_GPIO_BTN_RESET 3 -+#define TL_WR841ND_V1_GPIO_BTN_QSS 7 -+ -+#define TL_WR841ND_V1_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \ -+ (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL) -+ -+static struct mtd_partition tl_wr841n_v1_partitions[] = { -+ { -+ .name = "redboot", -+ .offset = 0, -+ .size = 0x020000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "kernel", -+ .offset = 0x020000, -+ .size = 0x140000, -+ }, { -+ .name = "rootfs", -+ .offset = 0x160000, -+ .size = 0x280000, -+ }, { -+ .name = "config", -+ .offset = 0x3e0000, -+ .size = 0x020000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x020000, -+ .size = 0x3c0000, -+ } -+}; -+ -+static struct flash_platform_data tl_wr841n_v1_flash_data = { -+ .parts = tl_wr841n_v1_partitions, -+ .nr_parts = ARRAY_SIZE(tl_wr841n_v1_partitions), -+}; -+ -+static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR841ND_V1_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:red:qss", -+ .gpio = TL_WR841ND_V1_GPIO_LED_QSS_RED, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR841ND_V1_GPIO_LED_QSS_GREEN, -+ } -+}; -+ -+static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841ND_V1_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841ND_V1_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static struct dsa_chip_data tl_wr841n_v1_dsa_chip = { -+ .port_names[0] = "wan", -+ .port_names[1] = "lan1", -+ .port_names[2] = "lan2", -+ .port_names[3] = "lan3", -+ .port_names[4] = "lan4", -+ .port_names[5] = "cpu", -+}; -+ -+static struct dsa_platform_data tl_wr841n_v1_dsa_data = { -+ .nr_chips = 1, -+ .chip = &tl_wr841n_v1_dsa_chip, -+}; -+ -+static void __init tl_wr841n_v1_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, -+ &tl_wr841n_v1_dsa_data); -+ -+ ath79_register_m25p80(&tl_wr841n_v1_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio), -+ tl_wr841n_v1_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr841n_v1_gpio_keys), -+ tl_wr841n_v1_gpio_keys); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1", -+ tl_wr841n_v1_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v8.c linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v8.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v8.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v8.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,286 @@ -+/* -+ * TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR841NV8_GPIO_LED_WLAN 13 -+#define TL_WR841NV8_GPIO_LED_QSS 15 -+#define TL_WR841NV8_GPIO_LED_WAN 18 -+#define TL_WR841NV8_GPIO_LED_LAN1 19 -+#define TL_WR841NV8_GPIO_LED_LAN2 20 -+#define TL_WR841NV8_GPIO_LED_LAN3 21 -+#define TL_WR841NV8_GPIO_LED_LAN4 12 -+#define TL_WR841NV8_GPIO_LED_SYSTEM 14 -+ -+#define TL_WR841NV8_GPIO_BTN_RESET 17 -+#define TL_WR841NV8_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */ -+ -+#define TL_MR3420V2_GPIO_LED_3G 11 -+#define TL_MR3420V2_GPIO_USB_POWER 4 -+ -+#define TL_WR941NDV5_GPIO_LED_WLAN 13 -+#define TL_WR941NDV5_GPIO_LED_QSS 15 -+#define TL_WR941NDV5_GPIO_LED_WAN 18 -+#define TL_WR941NDV5_GPIO_LED_LAN1 19 -+#define TL_WR941NDV5_GPIO_LED_LAN2 20 -+#define TL_WR941NDV5_GPIO_LED_LAN3 2 -+#define TL_WR941NDV5_GPIO_LED_LAN4 3 -+#define TL_WR941NDV5_GPIO_LED_SYSTEM 14 -+ -+#define TL_WR841NV8_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV8_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr841n_v8_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr841n_v8_flash_data = { -+ .part_probes = tl_wr841n_v8_part_probes, -+}; -+ -+static struct gpio_led tl_wr841n_v8_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan1", -+ .gpio = TL_WR841NV8_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan2", -+ .gpio = TL_WR841NV8_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan3", -+ .gpio = TL_WR841NV8_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan4", -+ .gpio = TL_WR841NV8_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR841NV8_GPIO_LED_QSS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR841NV8_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wan", -+ .gpio = TL_WR841NV8_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR841NV8_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ /* the 3G LED is only present on the MR3420 v2 */ -+ .name = "tp-link:green:3g", -+ .gpio = TL_MR3420V2_GPIO_LED_3G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr841n_v8_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841NV8_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "RFKILL switch", -+ .type = EV_SW, -+ .code = KEY_RFKILL, -+ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841NV8_GPIO_SW_RFKILL, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button tl_mr3420v2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841NV8_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "WPS", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841NV8_GPIO_SW_RFKILL, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_led tl_wr941nd_v5_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan1", -+ .gpio = TL_WR941NDV5_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan2", -+ .gpio = TL_WR941NDV5_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan3", -+ .gpio = TL_WR941NDV5_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan4", -+ .gpio = TL_WR941NDV5_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR941NDV5_GPIO_LED_QSS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR941NDV5_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wan", -+ .gpio = TL_WR941NDV5_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR941NDV5_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init tl_ap123_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ /* Disable JTAG, enabling GPIOs 0-3 */ -+ /* Configure OBS4 line, for GPIO 4*/ -+ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, -+ AR934X_GPIO_FUNC_CLK_OBS4_EN); -+ -+ /* config gpio4 as normal gpio function */ -+ ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER, -+ AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_m25p80(&tl_wr841n_v8_flash_data); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+} -+ -+static void __init tl_wr841n_v8_setup(void) -+{ -+ tl_ap123_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio) - 1, -+ tl_wr841n_v8_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr841n_v8_gpio_keys), -+ tl_wr841n_v8_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR841N_V8, "TL-WR841N-v8", "TP-LINK TL-WR841N/ND v8", -+ tl_wr841n_v8_setup); -+ -+ -+static void __init tl_wr842n_v2_setup(void) -+{ -+ tl_ap123_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), -+ tl_wr841n_v8_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr841n_v8_gpio_keys), -+ tl_wr841n_v8_gpio_keys); -+ -+ gpio_request_one(TL_MR3420V2_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR842N_V2, "TL-WR842N-v2", "TP-LINK TL-WR842N/ND v2", -+ tl_wr842n_v2_setup); -+ -+static void __init tl_mr3420v2_setup(void) -+{ -+ tl_ap123_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), -+ tl_wr841n_v8_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_mr3420v2_gpio_keys), -+ tl_mr3420v2_gpio_keys); -+ -+ /* enable power for the USB port */ -+ gpio_request_one(TL_MR3420V2_GPIO_USB_POWER, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_MR3420_V2, "TL-MR3420-v2", "TP-LINK TL-MR3420 v2", -+ tl_mr3420v2_setup); -+ -+ -+static void __init tl_wr941nd_v5_setup(void) -+{ -+ tl_ap123_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_v5_leds_gpio), -+ tl_wr941nd_v5_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr841n_v8_gpio_keys), -+ tl_wr841n_v8_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR941ND_V5, "TL-WR941ND-v5", "TP-LINK TL-WR941N/ND v5", -+ tl_wr941nd_v5_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v9.c linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v9.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v9.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v9.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,144 @@ -+/* -+ * TP-LINK TL-WR841N/ND v9 -+ * -+ * Copyright (C) 2014 Matthias Schiffer -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR841NV9_GPIO_LED_WLAN 13 -+#define TL_WR841NV9_GPIO_LED_QSS 3 -+#define TL_WR841NV9_GPIO_LED_WAN 4 -+#define TL_WR841NV9_GPIO_LED_LAN1 16 -+#define TL_WR841NV9_GPIO_LED_LAN2 15 -+#define TL_WR841NV9_GPIO_LED_LAN3 14 -+#define TL_WR841NV9_GPIO_LED_LAN4 11 -+ -+#define TL_WR841NV9_GPIO_BTN_RESET 12 -+#define TL_WR841NV9_GPIO_BTN_WIFI 17 -+ -+#define TL_WR841NV9_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV9_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr841n_v9_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr841n_v9_flash_data = { -+ .part_probes = tl_wr841n_v9_part_probes, -+}; -+ -+static struct gpio_led tl_wr841n_v9_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:lan1", -+ .gpio = TL_WR841NV9_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan2", -+ .gpio = TL_WR841NV9_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan3", -+ .gpio = TL_WR841NV9_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:lan4", -+ .gpio = TL_WR841NV9_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR841NV9_GPIO_LED_QSS, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wan", -+ .gpio = TL_WR841NV9_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR841NV9_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr841n_v9_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841NV9_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "WIFI button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR841NV9_GPIO_BTN_WIFI, -+ .active_low = 1, -+ } -+}; -+ -+ -+static void __init tl_ap143_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 tmpmac[ETH_ALEN]; -+ -+ ath79_register_m25p80(&tl_wr841n_v9_flash_data); -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); -+ ath79_register_eth(1); -+ -+ /* WAN */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_register_eth(0); -+ -+ ath79_init_mac(tmpmac, mac, 0); -+ ath79_register_wmac(ee, tmpmac); -+} -+ -+static void __init tl_wr841n_v9_setup(void) -+{ -+ tl_ap143_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v9_leds_gpio), -+ tl_wr841n_v9_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(1, TL_WR841NV9_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr841n_v9_gpio_keys), -+ tl_wr841n_v9_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR841N_V9, "TL-WR841N-v9", "TP-LINK TL-WR841N/ND v9", -+ tl_wr841n_v9_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,121 @@ -+/* -+ * TP-LINK TL-WR941ND board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+ -+#include "dev-dsa.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TL_WR941ND_GPIO_LED_SYSTEM 2 -+#define TL_WR941ND_GPIO_LED_QSS_RED 4 -+#define TL_WR941ND_GPIO_LED_QSS_GREEN 5 -+#define TL_WR941ND_GPIO_LED_WLAN 9 -+ -+#define TL_WR941ND_GPIO_BTN_RESET 3 -+#define TL_WR941ND_GPIO_BTN_QSS 7 -+ -+#define TL_WR941ND_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL) -+ -+static const char *tl_wr941nd_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr941nd_flash_data = { -+ .part_probes = tl_wr941nd_part_probes, -+}; -+ -+static struct gpio_led tl_wr941nd_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:green:system", -+ .gpio = TL_WR941ND_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, { -+ .name = "tp-link:red:qss", -+ .gpio = TL_WR941ND_GPIO_LED_QSS_RED, -+ }, { -+ .name = "tp-link:green:qss", -+ .gpio = TL_WR941ND_GPIO_LED_QSS_GREEN, -+ }, { -+ .name = "tp-link:green:wlan", -+ .gpio = TL_WR941ND_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR941ND_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "qss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR941ND_GPIO_BTN_QSS, -+ .active_low = 1, -+ } -+}; -+ -+static struct dsa_chip_data tl_wr941nd_dsa_chip = { -+ .port_names[0] = "wan", -+ .port_names[1] = "lan1", -+ .port_names[2] = "lan2", -+ .port_names[3] = "lan3", -+ .port_names[4] = "lan4", -+ .port_names[5] = "cpu", -+}; -+ -+static struct dsa_platform_data tl_wr941nd_dsa_data = { -+ .nr_chips = 1, -+ .chip = &tl_wr941nd_dsa_chip, -+}; -+ -+static void __init tl_wr941nd_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, -+ &tl_wr941nd_dsa_data); -+ -+ ath79_register_m25p80(&tl_wr941nd_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio), -+ tl_wr941nd_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr941nd_gpio_keys), -+ tl_wr941nd_gpio_keys); -+ ath79_register_wmac(eeprom, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND", -+ tl_wr941nd_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd-v6.c linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd-v6.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd-v6.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd-v6.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,149 @@ -+/* -+ * TP-LINK TL-WR941N/ND v6 board support -+ * -+ * Copyright (C) 2015 Matthias Schiffer -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+ -+#define TL_WR941ND_V6_GPIO_LED_QSS 3 -+#define TL_WR941ND_V6_GPIO_LED_WAN 14 -+#define TL_WR941ND_V6_GPIO_LED_WAN_RED 15 -+#define TL_WR941ND_V6_GPIO_LED_LAN1 7 -+#define TL_WR941ND_V6_GPIO_LED_LAN2 6 -+#define TL_WR941ND_V6_GPIO_LED_LAN3 5 -+#define TL_WR941ND_V6_GPIO_LED_LAN4 4 -+#define TL_WR941ND_V6_GPIO_LED_WLAN 8 -+#define TL_WR941ND_V6_GPIO_LED_SYSTEM 18 -+ -+#define TL_WR941ND_V6_GPIO_BTN_RESET 1 -+#define TL_WR941ND_V6_GPIO_BTN_RFKILL 2 -+ -+#define TL_WR941ND_V6_KEYS_POLL_INTERVAL 20 -+#define TL_WR941ND_V6_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_V6_KEYS_POLL_INTERVAL) -+ -+ -+static struct gpio_led tl_wr941nd_v6_leds_gpio[] __initdata = { -+ { -+ .name = "tp-link:blue:qss", -+ .gpio = TL_WR941ND_V6_GPIO_LED_QSS, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:wan", -+ .gpio = TL_WR941ND_V6_GPIO_LED_WAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:red:wan", -+ .gpio = TL_WR941ND_V6_GPIO_LED_WAN_RED, -+ .active_low = 0, -+ }, -+ { -+ .name = "tp-link:blue:lan1", -+ .gpio = TL_WR941ND_V6_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:lan2", -+ .gpio = TL_WR941ND_V6_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:lan3", -+ .gpio = TL_WR941ND_V6_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:lan4", -+ .gpio = TL_WR941ND_V6_GPIO_LED_LAN4, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:wlan", -+ .gpio = TL_WR941ND_V6_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "tp-link:blue:system", -+ .gpio = TL_WR941ND_V6_GPIO_LED_SYSTEM, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button tl_wr941nd_v6_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TL_WR941ND_V6_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR941ND_V6_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "RFKILL button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = TL_WR941ND_V6_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TL_WR941ND_V6_GPIO_BTN_RFKILL, -+ .active_low = 1, -+ } -+}; -+ -+ -+static const char *tl_wr941n_v6_part_probes[] = { -+ "tp-link", -+ NULL, -+}; -+ -+static struct flash_platform_data tl_wr941n_v6_flash_data = { -+ .part_probes = tl_wr941n_v6_part_probes, -+}; -+ -+ -+static void __init tl_wr941nd_v6_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(&tl_wr941n_v6_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_v6_leds_gpio), -+ tl_wr941nd_v6_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, TL_WR941ND_V6_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tl_wr941nd_v6_gpio_keys), -+ tl_wr941nd_v6_gpio_keys); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); -+ -+ ath79_switch_data.phy4_mii_en = 1; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, mac); -+ -+} -+ -+MIPS_MACHINE(ATH79_MACH_TL_WR941ND_V6, "TL-WR941ND-v6", "TP-LINK TL-WR941N/ND v6", -+ tl_wr941nd_v6_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tube2h.c linux-4.1.13/arch/mips/ath79/mach-tube2h.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-tube2h.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-tube2h.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,118 @@ -+/* -+ * ALFA NETWORK Tube2H board support -+ * -+ * Copyright (C) 2014 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define TUBE2H_GPIO_LED_SIGNAL4 0 -+#define TUBE2H_GPIO_LED_SIGNAL3 1 -+#define TUBE2H_GPIO_LED_SIGNAL2 13 -+#define TUBE2H_GPIO_LED_LAN 17 -+#define TUBE2H_GPIO_LED_SIGNAL1 27 -+#define TUBE2H_GPIO_EXT_LNA 28 -+ -+#define TUBE2H_GPIO_BTN_RESET 12 -+ -+#define TUBE2H_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define TUBE2H_KEYS_DEBOUNCE_INTERVAL (3 * TUBE2H_KEYS_POLL_INTERVAL) -+ -+#define TUBE2H_ART_ADDRESS 0x1f7f0000 -+#define TUBE2H_LAN_MAC_OFFSET 0x06 -+#define TUBE2H_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led tube2h_leds_gpio[] __initdata = { -+ { -+ .name = "alfa:blue:lan", -+ .gpio = TUBE2H_GPIO_LED_LAN, -+ .active_low = 1, -+ }, -+ { -+ .name = "alfa:red:signal1", -+ .gpio = TUBE2H_GPIO_LED_SIGNAL1, -+ .active_low = 1, -+ }, -+ { -+ .name = "alfa:orange:signal2", -+ .gpio = TUBE2H_GPIO_LED_SIGNAL2, -+ .active_low = 0, -+ }, -+ { -+ .name = "alfa:green:signal3", -+ .gpio = TUBE2H_GPIO_LED_SIGNAL3, -+ .active_low = 0, -+ }, -+ { -+ .name = "alfa:green:signal4", -+ .gpio = TUBE2H_GPIO_LED_SIGNAL4, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_keys_button tube2h_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = TUBE2H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = TUBE2H_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init tube2h_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(TUBE2H_ART_ADDRESS); -+ u32 t; -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_JTAG_DISABLE | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ /* Ensure that GPIO26 and GPIO27 are controllable by software */ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); -+ -+ gpio_request_one(TUBE2H_GPIO_EXT_LNA, -+ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "external LNA0"); -+ -+ ath79_register_wmac(art + TUBE2H_CALDATA_OFFSET, NULL); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(tube2h_leds_gpio), -+ tube2h_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, TUBE2H_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(tube2h_gpio_keys), -+ tube2h_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + TUBE2H_LAN_MAC_OFFSET, 0); -+ ath79_register_mdio(0, 0x0); -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_TUBE2H, "TUBE2H", "ALFA NETWORK Tube2H", -+ tube2h_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/machtypes.h linux-4.1.13/arch/mips/ath79/machtypes.h ---- linux-4.1.13.orig/arch/mips/ath79/machtypes.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/machtypes.h 2015-12-04 19:57:05.957975089 +0100 -@@ -16,12 +16,224 @@ - - enum ath79_mach_type { - ATH79_MACH_GENERIC = 0, -+ ATH79_MACH_ALFA_AP96, /* ALFA Network AP96 board */ -+ ATH79_MACH_ALFA_NX, /* ALFA Network N2/N5 board */ -+ ATH79_MACH_ALL0258N, /* Allnet ALL0258N */ -+ ATH79_MACH_ALL0305, /* Allnet ALL0305 */ -+ ATH79_MACH_ALL0315N, /* Allnet ALL0315N */ -+ ATH79_MACH_ANTMINER_S1, /* Antminer S1 */ -+ ATH79_MACH_ANTMINER_S3, /* Antminer S3 */ -+ ATH79_MACH_ARDUINO_YUN, /* Yun */ -+ ATH79_MACH_AP113, /* Atheros AP113 reference board */ - ATH79_MACH_AP121, /* Atheros AP121 reference board */ -+ ATH79_MACH_AP121_MINI, /* Atheros AP121-MINI reference board */ -+ ATH79_MACH_AP132, /* Atheros AP132 reference board */ -+ ATH79_MACH_AP135_020, /* Atheros AP135-020 reference board */ - ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */ -+ ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */ -+ ATH79_MACH_AP143, /* Atheros AP143 reference board */ -+ ATH79_MACH_AP147_010, /* Atheros AP147-010 reference board */ -+ ATH79_MACH_AP152, /* Atheros AP152 reference board */ - ATH79_MACH_AP81, /* Atheros AP81 reference board */ -+ ATH79_MACH_AP83, /* Atheros AP83 */ -+ ATH79_MACH_AP96, /* Atheros AP96 */ -+ ATH79_MACH_ARCHER_C5, /* TP-LINK Archer C5 board */ -+ ATH79_MACH_ARCHER_C7, /* TP-LINK Archer C7 board */ -+ ATH79_MACH_AW_NR580, /* AzureWave AW-NR580 */ -+ ATH79_MACH_BHU_BXU2000N2_A1, /* BHU BXU2000n-2 A1 */ -+ ATH79_MACH_BSB, /* Smart Electronics Black Swift board */ -+ ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */ -+ ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */ -+ ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */ -+ ATH79_MACH_CPE510, /* TP-LINK CPE510 */ - ATH79_MACH_DB120, /* Atheros DB120 reference board */ - ATH79_MACH_PB44, /* Atheros PB44 reference board */ -+ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */ -+ ATH79_MACH_DHP_1565_A1, /* D-Link DHP-1565 rev. A1 */ -+ ATH79_MACH_DIR_505_A1, /* D-Link DIR-505 rev. A1 */ -+ ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */ -+ ATH79_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */ -+ ATH79_MACH_DIR_615_E1, /* D-Link DIR-615 rev. E1 */ -+ ATH79_MACH_DIR_615_E4, /* D-Link DIR-615 rev. E4 */ -+ ATH79_MACH_DIR_615_I1, /* D-Link DIR-615 rev. I1 */ -+ ATH79_MACH_DIR_825_B1, /* D-Link DIR-825 rev. B1 */ -+ ATH79_MACH_DIR_825_C1, /* D-Link DIR-825 rev. C1 */ -+ ATH79_MACH_DIR_835_A1, /* D-Link DIR-835 rev. A1 */ -+ ATH79_MACH_DLAN_HOTSPOT, /* devolo dLAN Hotspot */ -+ ATH79_MACH_DLAN_PRO_500_WP, /* devolo dLAN pro 500 Wireless+ */ -+ ATH79_MACH_DLAN_PRO_1200_AC, /* devolo dLAN pro 1200+ WiFi ac*/ -+ ATH79_MACH_DRAGINO2, /* Dragino Version 2 */ -+ ATH79_MACH_ESR900, /* EnGenius ESR900 */ -+ ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */ -+ ATH79_MACH_EW_DORIN_ROUTER, /* embedded wireless Dorin Router Platform */ -+ ATH79_MACH_EAP300V2, /* EnGenius EAP300 v2 */ -+ ATH79_MACH_EAP7660D, /* Senao EAP7660D */ -+ ATH79_MACH_EL_M150, /* EasyLink EL-M150 */ -+ ATH79_MACH_EL_MINI, /* EasyLink EL-MINI */ -+ ATH79_MACH_ESR1750, /* EnGenius ESR1750 */ -+ ATH79_MACH_EPG5000, /* EnGenius EPG5000 */ -+ ATH79_MACH_F9K1115V2, /* Belkin AC1750DB */ -+ ATH79_MACH_GL_AR150, /* GL-AR150 support */ -+ ATH79_MACH_GL_AR300, /* GL-AR300 */ -+ ATH79_MACH_GL_DOMINO, /* Domino */ -+ ATH79_MACH_GL_INET, /* GL-CONNECT GL-INET */ -+ ATH79_MACH_GS_MINIBOX_V1, /* Gainstrong MiniBox V1.0 */ -+ ATH79_MACH_GS_OOLITE, /* GS OOLITE V1.0 */ -+ ATH79_MACH_HIWIFI_HC6361, /* HiWiFi HC6361 */ -+ ATH79_MACH_JA76PF, /* jjPlus JA76PF */ -+ ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */ -+ ATH79_MACH_JWAP003, /* jjPlus JWAP003 */ -+ ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ -+ ATH79_MACH_MR12, /* Cisco Meraki MR12 */ -+ ATH79_MACH_MR16, /* Cisco Meraki MR16 */ -+ ATH79_MACH_MR1750, /* OpenMesh MR1750 */ -+ ATH79_MACH_MR600V2, /* OpenMesh MR600v2 */ -+ ATH79_MACH_MR600, /* OpenMesh MR600 */ -+ ATH79_MACH_MR900, /* OpenMesh MR900 */ -+ ATH79_MACH_MR900v2, /* OpenMesh MR900v2 */ -+ ATH79_MACH_MYNET_N600, /* WD My Net N600 */ -+ ATH79_MACH_MYNET_N750, /* WD My Net N750 */ -+ ATH79_MACH_MYNET_REXT, /* WD My Net Wi-Fi Range Extender */ -+ ATH79_MACH_MZK_W04NU, /* Planex MZK-W04NU */ -+ ATH79_MACH_MZK_W300NH, /* Planex MZK-W300NH */ -+ ATH79_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */ -+ ATH79_MACH_NBG6616, /* Zyxel NBG6616 */ -+ ATH79_MACH_NBG6716, /* Zyxel NBG6716 */ -+ ATH79_MACH_OM2P_HSv2, /* OpenMesh OM2P-HSv2 */ -+ ATH79_MACH_OM2P_HS, /* OpenMesh OM2P-HS */ -+ ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ -+ ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ -+ ATH79_MACH_OM2P, /* OpenMesh OM2P */ -+ ATH79_MACH_OM5P_AN, /* OpenMesh OM5P-AN */ -+ ATH79_MACH_OM5P, /* OpenMesh OM5P */ -+ ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */ -+ ATH79_MACH_PB42, /* Atheros PB42 */ -+ ATH79_MACH_PB92, /* Atheros PB92 */ -+ ATH79_MACH_QIHOO_C301, /* Qihoo 360 C301 */ -+ ATH79_MACH_R6100, /* NETGEAR R6100 */ -+ ATH79_MACH_RB_411, /* MikroTik RouterBOARD 411/411A/411AH */ -+ ATH79_MACH_RB_411U, /* MikroTik RouterBOARD 411U */ -+ ATH79_MACH_RB_433, /* MikroTik RouterBOARD 433/433AH */ -+ ATH79_MACH_RB_433U, /* MikroTik RouterBOARD 433UAH */ -+ ATH79_MACH_RB_435G, /* MikroTik RouterBOARD 435G */ -+ ATH79_MACH_RB_450G, /* MikroTik RouterBOARD 450G */ -+ ATH79_MACH_RB_450, /* MikroTik RouterBOARD 450 */ -+ ATH79_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */ -+ ATH79_MACH_RB_493G, /* Mikrotik RouterBOARD 493G */ -+ ATH79_MACH_RB_711GR100, /* Mikrotik RouterBOARD 911/912 boards */ -+ ATH79_MACH_RB_750, /* MikroTik RouterBOARD 750 */ -+ ATH79_MACH_RB_750G_R3, /* MikroTik RouterBOARD 750GL */ -+ ATH79_MACH_RB_751, /* MikroTik RouterBOARD 751 */ -+ ATH79_MACH_RB_751G, /* Mikrotik RouterBOARD 751G */ -+ ATH79_MACH_RB_922GS, /* Mikrotik RouterBOARD 911/922GS boards */ -+ ATH79_MACH_RB_951G, /* Mikrotik RouterBOARD 951G */ -+ ATH79_MACH_RB_951U, /* Mikrotik RouterBOARD 951Ui-2HnD */ -+ ATH79_MACH_RB_2011G, /* Mikrotik RouterBOARD 2011UAS-2HnD */ -+ ATH79_MACH_RB_2011L, /* Mikrotik RouterBOARD 2011L */ -+ ATH79_MACH_RB_2011US, /* Mikrotik RouterBOARD 2011UAS */ -+ ATH79_MACH_RB_2011R5, /* Mikrotik RouterBOARD 2011UiAS(-2Hnd) */ -+ ATH79_MACH_RB_SXTLITE2ND, /* Mikrotik RouterBOARD SXT Lite 2nD */ -+ ATH79_MACH_RB_SXTLITE5ND, /* Mikrotik RouterBOARD SXT Lite 5nD */ -+ ATH79_MACH_RW2458N, /* Redwave RW2458N */ -+ ATH79_MACH_SMART_300, /* NC-LINK SMART-300 */ -+ ATH79_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */ -+ ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */ -+ ATH79_MACH_TEW_712BR, /* TRENDnet TEW-712BR */ -+ ATH79_MACH_TEW_732BR, /* TRENDnet TEW-732BR */ -+ ATH79_MACH_MC_MAC1200R, /* MERCURY MAC1200R*/ -+ ATH79_MACH_TL_MR10U, /* TP-LINK TL-MR10U */ -+ ATH79_MACH_TL_MR11U, /* TP-LINK TL-MR11U */ -+ ATH79_MACH_TL_MR13U, /* TP-LINK TL-MR13U */ -+ ATH79_MACH_TL_MR3020, /* TP-LINK TL-MR3020 */ -+ ATH79_MACH_TL_MR3040, /* TP-LINK TL-MR3040 */ -+ ATH79_MACH_TL_MR3040_V2, /* TP-LINK TL-MR3040 v2 */ -+ ATH79_MACH_TL_MR3220, /* TP-LINK TL-MR3220 */ -+ ATH79_MACH_TL_MR3220_V2, /* TP-LINK TL-MR3220 v2 */ -+ ATH79_MACH_TL_MR3420, /* TP-LINK TL-MR3420 */ -+ ATH79_MACH_TL_MR3420_V2, /* TP-LINK TL-MR3420 v2 */ -+ ATH79_MACH_TL_WA701ND_V2, /* TP-LINK TL-WA701ND v2 */ -+ ATH79_MACH_TL_WA750RE, /* TP-LINK TL-WA750RE */ -+ ATH79_MACH_TL_WA7210N_V2, /* TP-LINK TL-WA7210N v2 */ -+ ATH79_MACH_TL_WA7510N_V1, /* TP-LINK TL-WA7510N v1*/ -+ ATH79_MACH_TL_WA850RE, /* TP-LINK TL-WA850RE */ -+ ATH79_MACH_TL_WA860RE, /* TP-LINK TL-WA860RE */ -+ ATH79_MACH_TL_WA801ND_V2, /* TP-LINK TL-WA801ND v2 */ -+ ATH79_MACH_TL_WA830RE_V2, /* TP-LINK TL-WA830RE v2 */ -+ ATH79_MACH_TL_WA901ND, /* TP-LINK TL-WA901ND */ -+ ATH79_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */ -+ ATH79_MACH_TL_WA901ND_V3, /* TP-LINK TL-WA901ND v3 */ -+ ATH79_MACH_TL_WDR3320_V2, /* TP-LINK TL-WDR3320 v2 */ -+ ATH79_MACH_TL_WDR3500, /* TP-LINK TL-WDR3500 */ -+ ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */ -+ ATH79_MACH_TL_WDR6500_V2, /* TP-LINK TL-WDR6500 v2 */ -+ ATH79_MACH_TL_WDR4900_V2, /* TP-LINK TL-WDR4900 v2 */ -+ ATH79_MACH_TL_WR1041N_V2, /* TP-LINK TL-WR1041N v2 */ -+ ATH79_MACH_TL_WR1043ND, /* TP-LINK TL-WR1043ND */ -+ ATH79_MACH_TL_WR1043ND_V2, /* TP-LINK TL-WR1043ND v2 */ -+ ATH79_MACH_TL_WR2543N, /* TP-LINK TL-WR2543N/ND */ -+ ATH79_MACH_TL_WR703N, /* TP-LINK TL-WR703N */ -+ ATH79_MACH_TL_WR710N, /* TP-LINK TL-WR710N */ -+ ATH79_MACH_TL_WR720N_V3, /* TP-LINK TL-WR720N v3/v4 */ -+ ATH79_MACH_TL_WR741ND, /* TP-LINK TL-WR741ND */ -+ ATH79_MACH_TL_WR741ND_V4, /* TP-LINK TL-WR741ND v4*/ -+ ATH79_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */ -+ ATH79_MACH_TL_WR841N_V7, /* TP-LINK TL-WR841N/ND v7 */ -+ ATH79_MACH_TL_WR841N_V8, /* TP-LINK TL-WR841N/ND v8 */ -+ ATH79_MACH_TL_WR841N_V9, /* TP-LINK TL-WR841N/ND v9 */ -+ ATH79_MACH_TL_WR842N_V2, /* TP-LINK TL-WR842N/ND v2 */ -+ ATH79_MACH_TL_WR941ND, /* TP-LINK TL-WR941ND */ -+ ATH79_MACH_TL_WR941ND_V5, /* TP-LINK TL-WR941ND v5 */ -+ ATH79_MACH_TL_WR941ND_V6, /* TP-LINK TL-WR941ND v6 */ -+ ATH79_MACH_TUBE2H, /* Alfa Network Tube2H */ -+ ATH79_MACH_UBNT_AIRGW, /* Ubiquiti AirGateway */ -+ ATH79_MACH_UBNT_AIRGWP, /* Ubiquiti AirGateway Pro */ -+ ATH79_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */ -+ ATH79_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */ -+ ATH79_MACH_UBNT_LOCO_M_XW, /* Ubiquiti Loco M XW */ -+ ATH79_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */ -+ ATH79_MACH_UBNT_LSX, /* Ubiquiti LSX */ -+ ATH79_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */ -+ ATH79_MACH_UBNT_NANO_M_XW, /* Ubiquiti NanoStation M XW */ -+ ATH79_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */ -+ ATH79_MACH_UBNT_ROCKET_M_XW, /* Ubiquiti Rocket M XW*/ -+ ATH79_MACH_UBNT_ROCKET_M_TI, /* Ubiquiti Rocket M TI*/ -+ ATH79_MACH_UBNT_RSPRO, /* Ubiquiti RouterStation Pro */ -+ ATH79_MACH_UBNT_RS, /* Ubiquiti RouterStation */ -+ ATH79_MACH_UBNT_UAP_PRO, /* Ubiquiti UniFi AP Pro */ -+ ATH79_MACH_UBNT_UNIFI, /* Ubiquiti Unifi */ -+ ATH79_MACH_UBNT_UNIFI_OUTDOOR, /* Ubiquiti UnifiAP Outdoor */ -+ ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, /* Ubiquiti UnifiAP Outdoor+ */ - ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ -+ ATH79_MACH_WEIO, /* WeIO board */ -+ ATH79_MACH_WHR_G301N, /* Buffalo WHR-G301N */ -+ ATH79_MACH_WHR_HP_G300N, /* Buffalo WHR-HP-G300N */ -+ ATH79_MACH_WHR_HP_GN, /* Buffalo WHR-HP-GN */ -+ ATH79_MACH_WLAE_AG300N, /* Buffalo WLAE-AG300N */ -+ ATH79_MACH_WLR8100, /* SITECOM WLR-8100 */ -+ ATH79_MACH_WNDAP360, /* NETGEAR WNDAP360 */ -+ ATH79_MACH_WNDR3700, /* NETGEAR WNDR3700/WNDR3800/WNDRMAC */ -+ ATH79_MACH_WNDR3700_V4, /* NETGEAR WNDR3700v4 */ -+ ATH79_MACH_WNDR4300, /* NETGEAR WNDR4300 */ -+ ATH79_MACH_WNR2000, /* NETGEAR WNR2000 */ -+ ATH79_MACH_WNR2000_V3, /* NETGEAR WNR2000 v3 */ -+ ATH79_MACH_WNR2000_V4, /* NETGEAR WNR2000 v4 */ -+ ATH79_MACH_WNR2200, /* NETGEAR WNR2200 */ -+ ATH79_MACH_WNR612_V2, /* NETGEAR WNR612 v2 */ -+ ATH79_MACH_WNR1000_V2, /* NETGEAR WNR1000 v2 */ -+ ATH79_MACH_WP543, /* Compex WP543 */ -+ ATH79_MACH_WPE72, /* Compex WPE72 */ -+ ATH79_MACH_WPJ344, /* Compex WPJ344 */ -+ ATH79_MACH_WPJ531, /* Compex WPJ531 */ -+ ATH79_MACH_WPJ558, /* Compex WPJ558 */ -+ ATH79_MACH_WRT160NL, /* Linksys WRT160NL */ -+ ATH79_MACH_WRT400N, /* Linksys WRT400N */ -+ ATH79_MACH_WZR_HP_AG300H, /* Buffalo WZR-HP-AG300H */ -+ ATH79_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */ -+ ATH79_MACH_WZR_HP_G300NH2, /* Buffalo WZR-HP-G300NH2 */ -+ ATH79_MACH_WZR_HP_G450H, /* Buffalo WZR-HP-G450H */ -+ ATH79_MACH_WZR_450HP2, /* Buffalo WZR-450HP2 */ -+ ATH79_MACH_ZCN_1523H_2, /* Zcomax ZCN-1523H-2-xx */ -+ ATH79_MACH_ZCN_1523H_5, /* Zcomax ZCN-1523H-5-xx */ - }; - - #endif /* _ATH79_MACHTYPE_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ubnt.c linux-4.1.13/arch/mips/ath79/mach-ubnt.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ubnt.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ubnt.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,205 @@ -+/* -+ * Ubiquiti RouterStation support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * Copyright (C) 2008 Ubiquiti -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define UBNT_RS_GPIO_LED_RF 2 -+#define UBNT_RS_GPIO_SW4 8 -+ -+#define UBNT_LS_SR71_GPIO_LED_D25 0 -+#define UBNT_LS_SR71_GPIO_LED_D26 1 -+#define UBNT_LS_SR71_GPIO_LED_D24 2 -+#define UBNT_LS_SR71_GPIO_LED_D23 4 -+#define UBNT_LS_SR71_GPIO_LED_D22 5 -+#define UBNT_LS_SR71_GPIO_LED_D27 6 -+#define UBNT_LS_SR71_GPIO_LED_D28 7 -+ -+#define UBNT_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define UBNT_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led ubnt_rs_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:green:rf", -+ .gpio = UBNT_RS_GPIO_LED_RF, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:green:d22", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D22, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:d23", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D23, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:d24", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D24, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:red:d25", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D25, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:red:d26", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D26, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:d27", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D27, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:d28", -+ .gpio = UBNT_LS_SR71_GPIO_LED_D28, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button ubnt_gpio_keys[] __initdata = { -+ { -+ .desc = "sw4", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = UBNT_RS_GPIO_SW4, -+ .active_low = 1, -+ } -+}; -+ -+static const char *ubnt_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data ubnt_flash_data = { -+ .part_probes = ubnt_part_probes, -+}; -+ -+static void __init ubnt_generic_setup(void) -+{ -+ ath79_register_m25p80(&ubnt_flash_data); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_gpio_keys), -+ ubnt_gpio_keys); -+ ath79_register_pci(); -+} -+ -+#define UBNT_RS_WAN_PHYMASK BIT(20) -+#define UBNT_RS_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) -+ -+static void __init ubnt_rs_setup(void) -+{ -+ ubnt_generic_setup(); -+ -+ ath79_register_mdio(0, ~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; -+ -+ /* -+ * There is Secondary MAC address duplicate problem with some -+ * UBNT HW batches. Do not increase Secondary MAC address by 1 -+ * but do workaround with 'Locally Administrated' bit. -+ */ -+ ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.speed = SPEED_100; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), -+ ubnt_rs_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation", -+ ubnt_rs_setup); -+ -+#define UBNT_RSPRO_WAN_PHYMASK BIT(4) -+#define UBNT_RSPRO_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -+ -+static void __init ubnt_rspro_setup(void) -+{ -+ ubnt_generic_setup(); -+ -+ ath79_register_mdio(0, ~(UBNT_RSPRO_WAN_PHYMASK | -+ UBNT_RSPRO_LAN_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; -+ -+ /* -+ * There is Secondary MAC address duplicate problem with some -+ * UBNT HW batches. Do not increase Secondary MAC address by 1 -+ * but do workaround with 'Locally Administrated' bit. -+ */ -+ ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), -+ ubnt_rs_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_RSPRO, "UBNT-RSPRO", "Ubiquiti RouterStation Pro", -+ ubnt_rspro_setup); -+ -+static void __init ubnt_lsx_setup(void) -+{ -+ ubnt_generic_setup(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup); -+ -+#define UBNT_LSSR71_PHY_MASK BIT(1) -+ -+static void __init ubnt_lssr71_setup(void) -+{ -+ ubnt_generic_setup(); -+ -+ ath79_register_mdio(0, ~UBNT_LSSR71_PHY_MASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_ls_sr71_leds_gpio), -+ ubnt_ls_sr71_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71", -+ ubnt_lssr71_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ubnt-xm.c linux-4.1.13/arch/mips/ath79/mach-ubnt-xm.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-ubnt-xm.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-ubnt-xm.c 2015-12-04 19:57:04.386077932 +0100 -@@ -12,15 +12,26 @@ - - #include - #include -+#include - #include -+#include -+#include - -+#include - #include -+#include - --#include "machtypes.h" -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" --#include "pci.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" - - #define UBNT_XM_GPIO_LED_L1 0 - #define UBNT_XM_GPIO_LED_L2 1 -@@ -32,23 +43,23 @@ - #define UBNT_XM_KEYS_POLL_INTERVAL 20 - #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) - --#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) -+#define UBNT_XM_EEPROM_ADDR 0x1fff1000 - - static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { - { -- .name = "ubnt-xm:red:link1", -+ .name = "ubnt:red:link1", - .gpio = UBNT_XM_GPIO_LED_L1, - .active_low = 0, - }, { -- .name = "ubnt-xm:orange:link2", -+ .name = "ubnt:orange:link2", - .gpio = UBNT_XM_GPIO_LED_L2, - .active_low = 0, - }, { -- .name = "ubnt-xm:green:link3", -+ .name = "ubnt:green:link3", - .gpio = UBNT_XM_GPIO_LED_L3, - .active_low = 0, - }, { -- .name = "ubnt-xm:green:link4", -+ .name = "ubnt:green:link4", - .gpio = UBNT_XM_GPIO_LED_L4, - .active_low = 0, - }, -@@ -65,62 +76,625 @@ - } - }; - --static struct spi_board_info ubnt_xm_spi_info[] = { -+#define UBNT_M_WAN_PHYMASK BIT(4) -+ -+static void __init ubnt_xm_init(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR); -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), -+ ubnt_xm_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ ap91_pci_init(eeprom, NULL); -+ -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_XM, -+ "UBNT-XM", -+ "Ubiquiti Networks XM (rev 1.0) board", -+ ubnt_xm_init); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_BULLET_M, "UBNT-BM", "Ubiquiti Bullet M", -+ ubnt_xm_init); -+ -+static void __init ubnt_rocket_m_setup(void) -+{ -+ ubnt_xm_init(); -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M, "UBNT-RM", "Ubiquiti Rocket M", -+ ubnt_rocket_m_setup); -+ -+static void __init ubnt_nano_m_setup(void) -+{ -+ ubnt_xm_init(); -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M", -+ ubnt_nano_m_setup); -+ -+static struct gpio_led ubnt_airrouter_leds_gpio[] __initdata = { - { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -+ .name = "ubnt:green:globe", -+ .gpio = 0, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:power", -+ .gpio = 11, -+ .active_low = 1, -+ .default_state = LEDS_GPIO_DEFSTATE_ON, - } - }; - --static struct ath79_spi_platform_data ubnt_xm_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static void __init ubnt_airrouter_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_local_mac(ath79_eth1_data.mac_addr, mac1); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ ath79_register_usb(); -+ -+ ap91_pci_init(ee, NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airrouter_leds_gpio), -+ ubnt_airrouter_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRROUTER, "UBNT-AR", "Ubiquiti AirRouter", -+ ubnt_airrouter_setup); -+ -+static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:orange:dome", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:dome", -+ .gpio = 0, -+ .active_low = 0, -+ } - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data ubnt_xm_eeprom_data; -+static struct gpio_led ubnt_unifi_outdoor_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:orange:front", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:front", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; - --static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) -+static struct gpio_led ubnt_unifi_outdoor_plus_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:white:front", -+ .gpio = 1, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:blue:front", -+ .gpio = 0, -+ .active_low = 0, -+ } -+}; -+ -+ -+static void __init ubnt_unifi_setup(void) - { -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &ubnt_xm_eeprom_data; -- break; -+ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_register_eth(0); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio), -+ ubnt_unifi_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI, "UBNT-UF", "Ubiquiti UniFi", -+ ubnt_unifi_setup); -+ -+ -+#define UBNT_UNIFIOD_PRI_PHYMASK BIT(4) -+#define UBNT_UNIFIOD_2ND_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) -+ -+static void __init ubnt_unifi_outdoor_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | -+ UBNT_UNIFIOD_2ND_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_leds_gpio), -+ ubnt_unifi_outdoor_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR, "UBNT-U20", -+ "Ubiquiti UniFiAP Outdoor", -+ ubnt_unifi_outdoor_setup); -+ -+ -+static void __init ubnt_unifi_outdoor_plus_setup(void) -+{ -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | -+ UBNT_UNIFIOD_2ND_PHYMASK)); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ap91_pci_init(ee, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_plus_leds_gpio), -+ ubnt_unifi_outdoor_plus_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, "UBNT-UOP", -+ "Ubiquiti UniFiAP Outdoor+", -+ ubnt_unifi_outdoor_plus_setup); -+ -+ -+static struct gpio_led ubnt_uap_pro_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:white:dome", -+ .gpio = 12, -+ }, { -+ .name = "ubnt:blue:dome", -+ .gpio = 13, -+ } -+}; -+ -+static struct gpio_keys_button uap_pro_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 17, -+ .active_low = 1, - } -+}; -+ -+static struct ar8327_pad_cfg uap_pro_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data uap_pro_ar8327_data = { -+ .pad0_cfg = &uap_pro_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info uap_pro_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &uap_pro_ar8327_data, -+ }, -+}; -+ -+#define UAP_PRO_MAC0_OFFSET 0x0000 -+#define UAP_PRO_MAC1_OFFSET 0x0006 -+#define UAP_PRO_WMAC_CALDATA_OFFSET 0x1000 -+#define UAP_PRO_PCI_CALDATA_OFFSET 0x5000 -+ -+static void __init ubnt_uap_pro_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds), -+ ubnt_uap_pro_gpio_leds); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(uap_pro_gpio_keys), -+ uap_pro_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ ath79_register_mdio(0, 0x0); -+ mdiobus_register_board_info(uap_pro_mdio0_info, -+ ARRAY_SIZE(uap_pro_mdio0_info)); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_UAP_PRO, "UAP-PRO", "Ubiquiti UniFi AP Pro", -+ ubnt_uap_pro_setup); -+ -+#define UBNT_XW_GPIO_LED_L1 11 -+#define UBNT_XW_GPIO_LED_L2 16 -+#define UBNT_XW_GPIO_LED_L3 13 -+#define UBNT_XW_GPIO_LED_L4 14 -+ -+static struct gpio_led ubnt_xw_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:red:link1", -+ .gpio = UBNT_XW_GPIO_LED_L1, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:orange:link2", -+ .gpio = UBNT_XW_GPIO_LED_L2, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link3", -+ .gpio = UBNT_XW_GPIO_LED_L3, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link4", -+ .gpio = UBNT_XW_GPIO_LED_L4, -+ .active_low = 1, -+ }, -+}; -+ -+#define UBNT_ROCKET_TI_GPIO_LED_L1 16 -+#define UBNT_ROCKET_TI_GPIO_LED_L2 17 -+#define UBNT_ROCKET_TI_GPIO_LED_L3 18 -+#define UBNT_ROCKET_TI_GPIO_LED_L4 19 -+#define UBNT_ROCKET_TI_GPIO_LED_L5 20 -+#define UBNT_ROCKET_TI_GPIO_LED_L6 21 -+static struct gpio_led ubnt_rocket_ti_leds_gpio[] __initdata = { -+ { -+ .name = "ubnt:green:link1", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L1, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link2", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L2, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link3", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L3, -+ .active_low = 1, -+ }, { -+ .name = "ubnt:green:link4", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L4, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:link5", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L5, -+ .active_low = 0, -+ }, { -+ .name = "ubnt:green:link6", -+ .gpio = UBNT_ROCKET_TI_GPIO_LED_L6, -+ .active_low = 0, -+ }, -+}; - -- return 0; -+static void __init ubnt_xw_init(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio), -+ ubnt_xw_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0_SLAVE); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - } - --static void __init ubnt_xm_pci_init(void) -+static void __init ubnt_nano_m_xw_setup(void) - { -- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, -- sizeof(ubnt_xm_eeprom_data.eeprom_data)); -+ ubnt_xw_init(); - -- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); -- ath79_register_pci(); -+ /* GMAC0 is connected to an AR8326 switch */ -+ ath79_register_mdio(0, ~(BIT(0) | BIT(1) | BIT(5))); -+ ath79_eth0_data.phy_mask = (BIT(0) | BIT(1) | BIT(5)); -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_register_eth(0); - } --#else --static inline void ubnt_xm_pci_init(void) {} --#endif /* CONFIG_PCI */ - --static void __init ubnt_xm_init(void) -+static void __init ubnt_loco_m_xw_setup(void) - { -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), -- ubnt_xm_leds_gpio); -+ ubnt_xw_init(); - -+ ath79_register_mdio(0, ~BIT(1)); -+ ath79_eth0_data.phy_mask = BIT(1); -+ ath79_register_eth(0); -+} -+ -+static void __init ubnt_rocket_m_xw_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio), -+ ubnt_xw_leds_gpio); - ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ubnt_xm_gpio_keys), -- ubnt_xm_gpio_keys); -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); - -- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, -- ARRAY_SIZE(ubnt_xm_spi_info)); -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); - -- ubnt_xm_pci_init(); -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_mdio(0, ~BIT(4)); -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); - } - --MIPS_MACHINE(ATH79_MACH_UBNT_XM, -- "UBNT-XM", -- "Ubiquiti Networks XM (rev 1.0) board", -- ubnt_xm_init); -+static struct at803x_platform_data ubnt_rocket_m_ti_at803_data = { -+ .disable_smarteee = 1, -+ .enable_rgmii_rx_delay = 1, -+ .enable_rgmii_tx_delay = 1, -+}; -+static struct mdio_board_info ubnt_rocket_m_ti_mdio_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 4, -+ .platform_data = &ubnt_rocket_m_ti_at803_data, -+ }, -+}; -+ -+static void __init ubnt_rocket_m_ti_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rocket_ti_leds_gpio), -+ ubnt_rocket_ti_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ubnt_xm_gpio_keys), -+ ubnt_xm_gpio_keys); -+ -+ ap91_pci_init(eeprom + 0x1000, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ ath79_setup_ar934x_eth_rx_delay(3, 3); -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ eeprom + UAP_PRO_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, -+ eeprom + UAP_PRO_MAC1_OFFSET, 0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ -+ mdiobus_register_board_info(ubnt_rocket_m_ti_mdio_info, -+ ARRAY_SIZE(ubnt_rocket_m_ti_mdio_info)); -+ ath79_register_mdio(0, 0x0); -+ -+ -+ ath79_eth0_data.phy_mask = BIT(4); -+ /* read out from vendor */ -+ ath79_eth0_pll_data.pll_1000 = 0x2000000; -+ ath79_eth0_pll_data.pll_10 = 0x1313; -+ ath79_register_eth(0); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_eth1_data.phy_mask = BIT(3); -+ ath79_register_eth(1); -+} -+ -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M_XW, "UBNT-NM-XW", "Ubiquiti Nanostation M XW", -+ ubnt_nano_m_xw_setup); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_LOCO_M_XW, "UBNT-LOCO-XW", "Ubiquiti Loco M XW", -+ ubnt_loco_m_xw_setup); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_XW, "UBNT-RM-XW", "Ubiquiti Rocket M XW", -+ ubnt_rocket_m_xw_setup); -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_TI, "UBNT-RM-TI", "Ubiquiti Rocket M TI", -+ ubnt_rocket_m_ti_setup); -+ -+static struct gpio_led ubnt_airgateway_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:blue:wlan", -+ .gpio = 0, -+ }, { -+ .name = "ubnt:white:status", -+ .gpio = 1, -+ }, -+}; -+ -+static struct gpio_keys_button airgateway_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 12, -+ .active_low = 1, -+ } -+}; -+ -+static void __init ubnt_airgateway_setup(void) -+{ -+ u32 t; -+ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; -+ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_gpio_leds), -+ ubnt_airgateway_gpio_leds); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(airgateway_gpio_keys), -+ airgateway_gpio_keys); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_register_eth(1); -+ ath79_register_eth(0); -+ -+ ath79_register_wmac(ee, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRGW, "UBNT-AGW", "Ubiquiti AirGateway", -+ ubnt_airgateway_setup); -+ -+static struct gpio_led ubnt_airgateway_pro_gpio_leds[] __initdata = { -+ { -+ .name = "ubnt:blue:wlan", -+ .gpio = 13, -+ }, { -+ .name = "ubnt:white:status", -+ .gpio = 17, -+ }, -+}; -+ -+ -+static struct gpio_keys_button airgateway_pro_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 12, -+ .active_low = 1, -+ } -+}; -+ -+static void __init ubnt_airgateway_pro_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_pro_gpio_leds), -+ ubnt_airgateway_pro_gpio_leds); -+ -+ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(airgateway_pro_gpio_keys), -+ airgateway_pro_gpio_keys); -+ -+ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); -+ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); -+ -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ /* GMAC0 is left unused in this configuration */ -+ -+ /* GMAC1 is connected to MAC0 on the internal switch */ -+ /* The PoE/WAN port connects to port 5 on the internal switch */ -+ /* The LAN port connects to port 4 on the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+} -+ -+MIPS_MACHINE(ATH79_MACH_UBNT_AIRGWP, "UBNT-AGWP", "Ubiquiti AirGateway Pro", -+ ubnt_airgateway_pro_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-weio.c linux-4.1.13/arch/mips/ath79/mach-weio.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-weio.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-weio.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,140 @@ -+/** -+ * WEIO Web Of Things Platform -+ * -+ * Copyright (C) 2013 Drasko DRASKOVIC and Uros PETREVSKI -+ * -+ * ## ## ######## #### ####### -+ * ## ## ## ## ## ## ## -+ * ## ## ## ## ## ## ## -+ * ## ## ## ###### ## ## ## -+ * ## ## ## ## ## ## ## -+ * ## ## ## ## ## ## ## -+ * ### ### ######## #### ####### -+ * -+ * Web Of Things Platform -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ * -+ * Authors : -+ * Drasko DRASKOVIC -+ * Uros PETREVSKI -+ */ -+ -+#include -+#include -+#include -+#include -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WEIO_GPIO_LED_STA 1 -+#define WEIO_GPIO_LED_AP 16 -+ -+#define WEIO_GPIO_BTN_AP 20 -+#define WEIO_GPIO_BTN_RESET 23 -+ -+#define WEIO_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WEIO_KEYS_DEBOUNCE_INTERVAL (3 * WEIO_KEYS_POLL_INTERVAL) -+ -+#define WEIO_MAC0_OFFSET 0x0000 -+#define WEIO_MAC1_OFFSET 0x0006 -+#define WEIO_CALDATA_OFFSET 0x1000 -+#define WEIO_WMAC_MAC_OFFSET 0x1002 -+ -+static struct gpio_led weio_leds_gpio[] __initdata = { -+ { -+ .name = "weio:green:sta", -+ .gpio = WEIO_GPIO_LED_STA, -+ .active_low = 1, -+ .default_state = LEDS_GPIO_DEFSTATE_ON, -+ }, -+ { -+ .name = "weio:green:ap", -+ .gpio = WEIO_GPIO_LED_AP, -+ .active_low = 1, -+ .default_state = LEDS_GPIO_DEFSTATE_ON, -+ } -+}; -+ -+static struct gpio_keys_button weio_gpio_keys[] __initdata = { -+ { -+ .desc = "ap button", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = WEIO_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WEIO_GPIO_BTN_AP, -+ .active_low = 1, -+ }, -+ { -+ .desc = "soft-reset button", -+ .type = EV_KEY, -+ .code = BTN_1, -+ .debounce_interval = WEIO_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WEIO_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct i2c_gpio_platform_data weio_i2c_gpio_data = { -+ .sda_pin = 18, -+ .scl_pin = 19, -+}; -+ -+static struct platform_device weio_i2c_gpio = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &weio_i2c_gpio_data, -+ }, -+}; -+ -+static void __init weio_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art + WEIO_CALDATA_OFFSET, art + WEIO_WMAC_MAC_OFFSET); -+} -+ -+static void __init weio_setup(void) -+{ -+ weio_common_setup(); -+ -+ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ platform_device_register(&weio_i2c_gpio); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(weio_leds_gpio), -+ weio_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WEIO_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(weio_gpio_keys), -+ weio_gpio_keys); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WEIO, "WEIO", "WeIO board", weio_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-whr-hp-g300n.c linux-4.1.13/arch/mips/ath79/mach-whr-hp-g300n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-whr-hp-g300n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-whr-hp-g300n.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,155 @@ -+/* -+ * Buffalo WHR-HP-G300N board support -+ * -+ * based on ... -+ * -+ * TP-LINK TL-WR741ND board support -+ * -+ * Copyright (C) 2009-2010 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define WHRHPG300N_GPIO_LED_SECURITY 0 -+#define WHRHPG300N_GPIO_LED_DIAG 1 -+#define WHRHPG300N_GPIO_LED_ROUTER 6 -+ -+#define WHRHPG300N_GPIO_BTN_ROUTER_ON 7 -+#define WHRHPG300N_GPIO_BTN_ROUTER_AUTO 8 -+#define WHRHPG300N_GPIO_BTN_RESET 11 -+#define WHRHPG300N_GPIO_BTN_AOSS 12 -+#define WHRHPG300N_GPIO_LED_LAN1 13 -+#define WHRHPG300N_GPIO_LED_LAN2 14 -+#define WHRHPG300N_GPIO_LED_LAN3 15 -+#define WHRHPG300N_GPIO_LED_LAN4 16 -+#define WHRHPG300N_GPIO_LED_WAN 17 -+ -+#define WHRHPG300N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WHRHPG300N_KEYS_DEBOUNCE_INTERVAL (3 * WHRHPG300N_KEYS_POLL_INTERVAL) -+ -+#define WHRHPG300N_MAC_OFFSET 0x20c -+ -+static struct gpio_led whrhpg300n_leds_gpio[] __initdata = { -+ { -+ .name = "buffalo:orange:security", -+ .gpio = WHRHPG300N_GPIO_LED_SECURITY, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:red:diag", -+ .gpio = WHRHPG300N_GPIO_LED_DIAG, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:router", -+ .gpio = WHRHPG300N_GPIO_LED_ROUTER, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:wan", -+ .gpio = WHRHPG300N_GPIO_LED_WAN, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:lan1", -+ .gpio = WHRHPG300N_GPIO_LED_LAN1, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:lan2", -+ .gpio = WHRHPG300N_GPIO_LED_LAN2, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:lan3", -+ .gpio = WHRHPG300N_GPIO_LED_LAN3, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:lan4", -+ .gpio = WHRHPG300N_GPIO_LED_LAN4, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button whrhpg300n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WHRHPG300N_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "aoss/wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .gpio = WHRHPG300N_GPIO_BTN_AOSS, -+ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, -+ .active_low = 1, -+ }, { -+ .desc = "router_on", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .gpio = WHRHPG300N_GPIO_BTN_ROUTER_ON, -+ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, -+ .active_low = 1, -+ }, { -+ .desc = "router_auto", -+ .type = EV_KEY, -+ .code = BTN_3, -+ .gpio = WHRHPG300N_GPIO_BTN_ROUTER_AUTO, -+ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, -+ .active_low = 1, -+ } -+}; -+ -+static void __init whrhpg300n_setup(void) -+{ -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio), -+ whrhpg300n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(whrhpg300n_gpio_keys), -+ whrhpg300n_gpio_keys); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ /* WAN port */ -+ ath79_register_eth(0); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 1); -+ -+ ap91_pci_init(ee, mac); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WHR_HP_G300N, "WHR-HP-G300N", "Buffalo WHR-HP-G300N", -+ whrhpg300n_setup); -+ -+MIPS_MACHINE(ATH79_MACH_WHR_G301N, "WHR-G301N", "Buffalo WHR-G301N", -+ whrhpg300n_setup); -+ -+MIPS_MACHINE(ATH79_MACH_WHR_HP_GN, "WHR-HP-GN", "Buffalo WHR-HP-GN", -+ whrhpg300n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wlae-ag300n.c linux-4.1.13/arch/mips/ath79/mach-wlae-ag300n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wlae-ag300n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wlae-ag300n.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,114 @@ -+/* -+ * Buffalo WLAE-AG300N board support -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define WLAEAG300N_MAC_OFFSET 0x20c -+#define WLAEAG300N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WLAEAG300N_KEYS_DEBOUNCE_INTERVAL (3 * WLAEAG300N_KEYS_POLL_INTERVAL) -+ -+ -+static struct gpio_led wlaeag300n_leds_gpio[] __initdata = { -+ /* -+ * Note: Writing 1 into GPIO 13 will power down the device. -+ */ -+ { -+ .name = "buffalo:green:wireless", -+ .gpio = 14, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:red:wireless", -+ .gpio = 15, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:status", -+ .gpio = 16, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:red:status", -+ .gpio = 17, -+ .active_low = 1, -+ } -+}; -+ -+ -+static struct gpio_keys_button wlaeag300n_gpio_keys[] __initdata = { -+ { -+ .desc = "function", -+ .type = EV_KEY, -+ .code = KEY_MODE, -+ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 0, -+ .active_low = 1, -+ }, { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 1, -+ .active_low = 1, -+ }, { -+ .desc = "power", -+ .type = EV_KEY, -+ .code = KEY_POWER, -+ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 11, -+ .active_low = 1, -+ }, { -+ .desc = "aoss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 12, -+ .active_low = 1, -+ } -+}; -+ -+static void __init wlaeag300n_setup(void) -+{ -+ u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 *mac1 = eeprom1 + WLAEAG300N_MAC_OFFSET; -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 1); -+ -+ ath79_register_mdio(0, ~(BIT(0) | BIT(4))); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = BIT(4); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wlaeag300n_leds_gpio), -+ wlaeag300n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WLAEAG300N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wlaeag300n_gpio_keys), -+ wlaeag300n_gpio_keys); -+ -+ ath79_register_m25p80(NULL); -+ -+ ap91_pci_init(eeprom1, mac1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WLAE_AG300N, "WLAE-AG300N", -+ "Buffalo WLAE-AG300N", wlaeag300n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wlr8100.c linux-4.1.13/arch/mips/ath79/mach-wlr8100.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wlr8100.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wlr8100.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,206 @@ -+/* -+ * Sitecom X8 AC1750 WLR-8100 board support -+ * -+ * Based on the Qualcomm Atheros AP135/AP136 reference board support code -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012-2013 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WLR8100_GPIO_LED_USB 4 -+#define WLR8100_GPIO_LED_WLAN_5G 12 -+#define WLR8100_GPIO_LED_WLAN_2G 13 -+#define WLR8100_GPIO_LED_STATUS_RED 14 -+#define WLR8100_GPIO_LED_WPS_RED 15 -+#define WLR8100_GPIO_LED_STATUS_AMBER 19 -+#define WLR8100_GPIO_LED_WPS_GREEN 20 -+ -+#define WLR8100_GPIO_BTN_WPS 16 -+#define WLR8100_GPIO_BTN_RFKILL 21 -+ -+#define WLR8100_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WLR8100_KEYS_DEBOUNCE_INTERVAL (3 * WLR8100_KEYS_POLL_INTERVAL) -+ -+#define WLR8100_MAC0_OFFSET 0 -+#define WLR8100_MAC1_OFFSET 6 -+#define WLR8100_WMAC_CALDATA_OFFSET 0x1000 -+#define WLR8100_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led wlr8100_leds_gpio[] __initdata = { -+ { -+ .name = "wlr8100:amber:status", -+ .gpio = WLR8100_GPIO_LED_STATUS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "wlr8100:red:status", -+ .gpio = WLR8100_GPIO_LED_STATUS_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "wlr8100:green:wps", -+ .gpio = WLR8100_GPIO_LED_WPS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "wlr8100:red:wps", -+ .gpio = WLR8100_GPIO_LED_WPS_RED, -+ .active_low = 1, -+ }, -+ { -+ .name = "wlr8100:red:wlan-2g", -+ .gpio = WLR8100_GPIO_LED_WLAN_2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "wlr8100:red:usb", -+ .gpio = WLR8100_GPIO_LED_USB, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wlr8100_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WLR8100_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WLR8100_GPIO_BTN_RFKILL, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg wlr8100_ar8327_pad0_cfg; -+static struct ar8327_pad_cfg wlr8100_ar8327_pad6_cfg; -+ -+static struct ar8327_platform_data wlr8100_ar8327_data = { -+ .pad0_cfg = &wlr8100_ar8327_pad0_cfg, -+ .pad6_cfg = &wlr8100_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info wlr8100_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wlr8100_ar8327_data, -+ }, -+}; -+ -+static void __init wlr8100_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wlr8100_leds_gpio), -+ wlr8100_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WLR8100_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wlr8100_gpio_keys), -+ wlr8100_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac(art + WLR8100_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + WLR8100_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(wlr8100_mdio0_info, -+ ARRAY_SIZE(wlr8100_mdio0_info)); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected tot eh SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+} -+ -+static void __init wlr8100_010_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ -+ wlr8100_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; -+ wlr8100_ar8327_pad0_cfg.txclk_delay_en = true; -+ wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true; -+ wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; -+ wlr8100_ar8327_pad0_cfg.mac06_exchange_en = true; -+ -+ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ -+ wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; -+ wlr8100_ar8327_pad6_cfg.rxclk_delay_en = true; -+ wlr8100_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ wlr8100_common_setup(); -+ ap91_pci_init(art + WLR8100_PCIE_CALDATA_OFFSET, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WLR8100, "WLR8100", -+ "Sitecom WLR-8100", -+ wlr8100_010_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wndap360.c linux-4.1.13/arch/mips/ath79/mach-wndap360.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wndap360.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wndap360.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,105 @@ -+/* -+ * Netgear WNDAP360 board support (proper leds / button support missing) -+ * -+ * Based on AP96 -+ * Copyright (C) 2013 Jacek Kikiewicz -+ * Copyright (C) 2009 Marco Porsch -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2010 Atheros Communications -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define WNDAP360_GPIO_LED_POWER_ORANGE 0 -+#define WNDAP360_GPIO_LED_POWER_GREEN 2 -+ -+/* Reset button - next to the power connector */ -+#define WNDAP360_GPIO_BTN_RESET 8 -+ -+#define WNDAP360_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNDAP360_KEYS_DEBOUNCE_INTERVAL (3 * WNDAP360_KEYS_POLL_INTERVAL) -+ -+#define WNDAP360_WMAC0_MAC_OFFSET 0x120c -+#define WNDAP360_WMAC1_MAC_OFFSET 0x520c -+#define WNDAP360_CALDATA0_OFFSET 0x1000 -+#define WNDAP360_CALDATA1_OFFSET 0x5000 -+ -+/* -+ * WNDAP360 this still uses leds definitions from AP96 -+ * -+ */ -+static struct gpio_led wndap360_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNDAP360_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:orange:power", -+ .gpio = WNDAP360_GPIO_LED_POWER_ORANGE, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wndap360_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WNDAP360_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDAP360_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+#define WNDAP360_LAN_PHYMASK 0x0f -+ -+static void __init wndap360_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_mdio(0, ~(WNDAP360_LAN_PHYMASK)); -+ -+ /* Reusing wifi MAC with offset of 1 as eth0 MAC */ -+ ath79_init_mac(ath79_eth0_data.mac_addr, -+ art + WNDAP360_WMAC0_MAC_OFFSET, 1); -+ ath79_eth0_pll_data.pll_1000 = 0x11110000; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = WNDAP360_LAN_PHYMASK; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wndap360_leds_gpio), -+ wndap360_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WNDAP360_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wndap360_gpio_keys), -+ wndap360_gpio_keys); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 5); -+ ap9x_pci_setup_wmac_led_pin(1, 5); -+ -+ ap94_pci_init(art + WNDAP360_CALDATA0_OFFSET, -+ art + WNDAP360_WMAC0_MAC_OFFSET, -+ art + WNDAP360_CALDATA1_OFFSET, -+ art + WNDAP360_WMAC1_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNDAP360, "WNDAP360", "Netgear WNDAP360", wndap360_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wndr3700.c linux-4.1.13/arch/mips/ath79/mach-wndr3700.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wndr3700.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wndr3700.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,172 @@ -+/* -+ * Netgear WNDR3700 board support -+ * -+ * Copyright (C) 2009 Marco Porsch -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define WNDR3700_GPIO_LED_WPS_ORANGE 0 -+#define WNDR3700_GPIO_LED_POWER_ORANGE 1 -+#define WNDR3700_GPIO_LED_POWER_GREEN 2 -+#define WNDR3700_GPIO_LED_WPS_GREEN 4 -+#define WNDR3700_GPIO_LED_WAN_GREEN 6 -+ -+#define WNDR3700_GPIO_BTN_WPS 3 -+#define WNDR3700_GPIO_BTN_RESET 8 -+#define WNDR3700_GPIO_BTN_WIFI 11 -+ -+#define WNDR3700_GPIO_RTL8366_SDA 5 -+#define WNDR3700_GPIO_RTL8366_SCK 7 -+ -+#define WNDR3700_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL) -+ -+#define WNDR3700_ETH0_MAC_OFFSET 0 -+#define WNDR3700_ETH1_MAC_OFFSET 0x6 -+ -+#define WNDR3700_WMAC0_MAC_OFFSET 0 -+#define WNDR3700_WMAC1_MAC_OFFSET 0xc -+#define WNDR3700_CALDATA0_OFFSET 0x1000 -+#define WNDR3700_CALDATA1_OFFSET 0x5000 -+ -+static struct gpio_led wndr3700_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNDR3700_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:orange:power", -+ .gpio = WNDR3700_GPIO_LED_POWER_ORANGE, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:wps", -+ .gpio = WNDR3700_GPIO_LED_WPS_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:orange:wps", -+ .gpio = WNDR3700_GPIO_LED_WPS_ORANGE, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:wan", -+ .gpio = WNDR3700_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDR3700_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDR3700_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, { -+ .desc = "wifi", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDR3700_GPIO_BTN_WIFI, -+ .active_low = 1, -+ } -+}; -+ -+static struct rtl8366_platform_data wndr3700_rtl8366s_data = { -+ .gpio_sda = WNDR3700_GPIO_RTL8366_SDA, -+ .gpio_sck = WNDR3700_GPIO_RTL8366_SCK, -+}; -+ -+static struct platform_device wndr3700_rtl8366s_device = { -+ .name = RTL8366S_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &wndr3700_rtl8366s_data, -+ } -+}; -+ -+static void __init wndr3700_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ /* -+ * The eth0 and wmac0 interfaces share the same MAC address which -+ * can lead to problems if operated unbridged. Set the locally -+ * administered bit on the eth0 MAC to make it unique. -+ */ -+ ath79_init_local_mac(ath79_eth0_data.mac_addr, -+ art + WNDR3700_ETH0_MAC_OFFSET); -+ ath79_eth0_pll_data.pll_1000 = 0x11110000; -+ ath79_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, -+ art + WNDR3700_ETH1_MAC_OFFSET, 0); -+ ath79_eth1_pll_data.pll_1000 = 0x11110000; -+ ath79_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio), -+ wndr3700_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wndr3700_gpio_keys), -+ wndr3700_gpio_keys); -+ -+ platform_device_register(&wndr3700_rtl8366s_device); -+ platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 5); -+ ap9x_pci_setup_wmac_led_pin(1, 5); -+ -+ /* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */ -+ ap9x_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6)); -+ -+ /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */ -+ ap9x_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6)); -+ -+ ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET, -+ art + WNDR3700_WMAC0_MAC_OFFSET, -+ art + WNDR3700_CALDATA1_OFFSET, -+ art + WNDR3700_WMAC1_MAC_OFFSET); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNDR3700, "WNDR3700", -+ "NETGEAR WNDR3700/WNDR3800/WNDRMAC", -+ wndr3700_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wndr4300.c linux-4.1.13/arch/mips/ath79/mach-wndr4300.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wndr4300.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wndr4300.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,210 @@ -+/* -+ * NETGEAR WNDR3700v4/WNDR4300 board support -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * Copyright (C) 2014 Ralph Perlich -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-nfc.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+/* AR9344 GPIOs */ -+#define WNDR4300_GPIO_LED_POWER_GREEN 0 -+#define WNDR4300_GPIO_LED_POWER_AMBER 2 -+#define WNDR4300_GPIO_LED_USB 13 -+#define WNDR4300_GPIO_LED_WAN_GREEN 1 -+#define WNDR4300_GPIO_LED_WAN_AMBER 3 -+#define WNDR4300_GPIO_LED_WLAN2G 11 -+#define WNDR4300_GPIO_LED_WLAN5G 14 -+#define WNDR4300_GPIO_LED_WPS_GREEN 16 -+#define WNDR4300_GPIO_LED_WPS_AMBER 17 -+ -+#define WNDR4300_GPIO_BTN_RESET 21 -+#define WNDR4300_GPIO_BTN_WIRELESS 15 -+#define WNDR4300_GPIO_BTN_WPS 12 -+ -+/* AR9580 GPIOs */ -+#define WNDR4300_GPIO_USB_5V 0 -+ -+#define WNDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WNDR4300_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led wndr4300_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNDR4300_GPIO_LED_POWER_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:power", -+ .gpio = WNDR4300_GPIO_LED_POWER_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:wan", -+ .gpio = WNDR4300_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:wan", -+ .gpio = WNDR4300_GPIO_LED_WAN_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:usb", -+ .gpio = WNDR4300_GPIO_LED_USB, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:wps", -+ .gpio = WNDR4300_GPIO_LED_WPS_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:wps", -+ .gpio = WNDR4300_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:wlan2g", -+ .gpio = WNDR4300_GPIO_LED_WLAN2G, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:blue:wlan5g", -+ .gpio = WNDR4300_GPIO_LED_WLAN5G, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wndr4300_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDR4300_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDR4300_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Wireless button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNDR4300_GPIO_BTN_WIRELESS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg wndr4300_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg wndr4300_ar8327_led_cfg = { -+ .led_ctrl0 = 0xc737c737, -+ .led_ctrl1 = 0x00000000, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x0030c300, -+ .open_drain = false, -+}; -+ -+static struct ar8327_platform_data wndr4300_ar8327_data = { -+ .pad0_cfg = &wndr4300_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &wndr4300_ar8327_led_cfg, -+}; -+ -+static struct mdio_board_info wndr4300_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wndr4300_ar8327_data, -+ }, -+}; -+ -+static void __init wndr4300_setup(void) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(wndr4300_leds_gpio); i++) -+ ath79_gpio_output_select(wndr4300_leds_gpio[i].gpio, -+ AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr4300_leds_gpio), -+ wndr4300_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WNDR4300_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wndr4300_gpio_keys), -+ wndr4300_gpio_keys); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); -+ -+ mdiobus_register_board_info(wndr4300_mdio0_info, -+ ARRAY_SIZE(wndr4300_mdio0_info)); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* GMAC0 is connected to an AR8327N switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); -+ ath79_register_nfc(); -+ ath79_register_usb(); -+ -+ ath79_register_wmac_simple(); -+ -+ /* enable power for the USB port */ -+ ap9x_pci_setup_wmac_gpio(0, BIT(WNDR4300_GPIO_USB_5V), -+ BIT(WNDR4300_GPIO_USB_5V)); -+ -+ ap91_pci_init_simple(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNDR3700_V4, "WNDR3700_V4", "NETGEAR WNDR3700v4", -+ wndr4300_setup); -+MIPS_MACHINE(ATH79_MACH_WNDR4300, "WNDR4300", "NETGEAR WNDR4300", -+ wndr4300_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000.c linux-4.1.13/arch/mips/ath79/mach-wnr2000.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wnr2000.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,145 @@ -+/* -+ * NETGEAR WNR2000 board support -+ * -+ * Copyright (C) 2008-2009 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * Copyright (C) 2008-2009 Andy Boyett -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WNR2000_GPIO_LED_PWR_GREEN 14 -+#define WNR2000_GPIO_LED_PWR_AMBER 7 -+#define WNR2000_GPIO_LED_WPS 4 -+#define WNR2000_GPIO_LED_WLAN 6 -+#define WNR2000_GPIO_BTN_RESET 21 -+#define WNR2000_GPIO_BTN_WPS 8 -+ -+#define WNR2000_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNR2000_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000_KEYS_POLL_INTERVAL) -+ -+static struct mtd_partition wnr2000_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x040000, -+ .size = 0x010000, -+ }, { -+ .name = "rootfs", -+ .offset = 0x050000, -+ .size = 0x240000, -+ }, { -+ .name = "user-config", -+ .offset = 0x290000, -+ .size = 0x010000, -+ }, { -+ .name = "uImage", -+ .offset = 0x2a0000, -+ .size = 0x120000, -+ }, { -+ .name = "language_table", -+ .offset = 0x3c0000, -+ .size = 0x020000, -+ }, { -+ .name = "rootfs_checksum", -+ .offset = 0x3e0000, -+ .size = 0x010000, -+ }, { -+ .name = "art", -+ .offset = 0x3f0000, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ } -+}; -+ -+static struct flash_platform_data wnr2000_flash_data = { -+ .parts = wnr2000_partitions, -+ .nr_parts = ARRAY_SIZE(wnr2000_partitions), -+}; -+ -+static struct gpio_led wnr2000_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNR2000_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:amber:power", -+ .gpio = WNR2000_GPIO_LED_PWR_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:wps", -+ .gpio = WNR2000_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "netgear:blue:wlan", -+ .gpio = WNR2000_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNR2000_GPIO_BTN_RESET, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNR2000_GPIO_BTN_WPS, -+ } -+}; -+ -+static void __init wnr2000_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.has_ar8216 = 1; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(&wnr2000_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio), -+ wnr2000_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wnr2000_gpio_keys), -+ wnr2000_gpio_keys); -+ -+ ath79_register_wmac(eeprom, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v3.c linux-4.1.13/arch/mips/ath79/mach-wnr2000-v3.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v3.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wnr2000-v3.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,140 @@ -+/* -+ * NETGEAR WNR2000v3/WNR612v2/WNR1000v2 board support -+ * -+ * Copytight (C) 2013 Mathieu Olivari -+ * Copyright (C) 2008-2009 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * Copyright (C) 2008-2009 Andy Boyett -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define WNR2000V3_GPIO_LED_WAN_GREEN 0 -+#define WNR2000V3_GPIO_LED_LAN1_AMBER 1 -+#define WNR2000V3_GPIO_LED_LAN4_AMBER 12 -+#define WNR2000V3_GPIO_LED_PWR_GREEN 14 -+#define WNR2000V3_GPIO_BTN_WPS 11 -+ -+#define WNR612V2_GPIO_LED_PWR_GREEN 11 -+ -+#define WNR1000V2_GPIO_LED_PWR_AMBER 1 -+#define WNR1000V2_GPIO_LED_PWR_GREEN 11 -+ -+#define WNR2000V3_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNR2000V3_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V3_KEYS_POLL_INTERVAL) -+ -+#define WNR2000V3_MAC0_OFFSET 0 -+#define WNR2000V3_MAC1_OFFSET 6 -+#define WNR2000V3_PCIE_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led wnr2000v3_leds_gpio[] __initdata = { -+ { -+ .name = "wnr2000v3:green:power", -+ .gpio = WNR2000V3_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "wnr2000v3:green:wan", -+ .gpio = WNR2000V3_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led wnr612v2_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNR612V2_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led wnr1000v2_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNR1000V2_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:amber:power", -+ .gpio = WNR1000V2_GPIO_LED_PWR_AMBER, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wnr2000v3_gpio_keys[] __initdata = { -+ { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WNR2000V3_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNR2000V3_GPIO_BTN_WPS, -+ } -+}; -+ -+static void __init wnr_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V3_MAC0_OFFSET, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V3_MAC1_OFFSET, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ ap91_pci_init(art + WNR2000V3_PCIE_CALDATA_OFFSET, NULL); -+} -+ -+static void __init wnr2000v3_setup(void) -+{ -+ wnr_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v3_leds_gpio), -+ wnr2000v3_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WNR2000V3_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wnr2000v3_gpio_keys), -+ wnr2000v3_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNR2000_V3, "WNR2000V3", "NETGEAR WNR2000 V3", wnr2000v3_setup); -+ -+static void __init wnr612v2_setup(void) -+{ -+ wnr_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr612v2_leds_gpio), -+ wnr612v2_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNR612_V2, "WNR612V2", "NETGEAR WNR612 V2", wnr612v2_setup); -+ -+static void __init wnr1000v2_setup(void) -+{ -+ wnr_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr1000v2_leds_gpio), -+ wnr1000v2_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNR1000_V2, "WNR1000V2", "NETGEAR WNR1000 V2", wnr1000v2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v4.c linux-4.1.13/arch/mips/ath79/mach-wnr2000-v4.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v4.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wnr2000-v4.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,214 @@ -+/* -+ * NETGEAR WNR2000v4 board support -+ * -+ * Copyright (C) 2015 Michael Bazzinotti -+ * Copyright (C) 2014 Michaël Burtin -+ * Copyright (C) 2013 Mathieu Olivari -+ * Copyright (C) 2008-2009 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * Copyright (C) 2008-2009 Andy Boyett -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+/* AR9341 GPIOs */ -+#define WNR2000V4_GPIO_LED_PWR_GREEN 0 -+#define WNR2000V4_GPIO_LED_PWR_AMBER 1 -+#define WNR2000V4_GPIO_LED_WPS 2 -+#define WNR2000V4_GPIO_LED_WLAN 12 -+#define WNR2000V4_GPIO_LED_LAN1_GREEN 13 -+#define WNR2000V4_GPIO_LED_LAN2_GREEN 14 -+#define WNR2000V4_GPIO_LED_LAN3_GREEN 15 -+#define WNR2000V4_GPIO_LED_LAN4_GREEN 16 -+#define WNR2000V4_GPIO_LED_LAN1_AMBER 18 -+#define WNR2000V4_GPIO_LED_LAN2_AMBER 19 -+#define WNR2000V4_GPIO_LED_LAN3_AMBER 20 -+#define WNR2000V4_GPIO_LED_LAN4_AMBER 21 -+#define WNR2000V4_GPIO_LED_WAN_GREEN 17 -+#define WNR2000V4_GPIO_LED_WAN_AMBER 22 -+/* Buttons */ -+#define WNR2000V4_GPIO_BTN_WPS 3 -+#define WNR2000V4_GPIO_BTN_RESET 4 -+#define WNR2000V4_GPIO_BTN_WLAN 11 -+#define WNR2000V4_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNR2000V4_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V4_KEYS_POLL_INTERVAL) -+ -+ -+/* ART offsets */ -+#define WNR2000V4_MAC0_OFFSET 0 /* WAN/WLAN0 MAC */ -+#define WNR2000V4_MAC1_OFFSET 6 /* Eth-switch0 MAC */ -+ -+static struct gpio_led wnr2000v4_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:green:power", -+ .gpio = WNR2000V4_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ .default_trigger = "default-on", -+ }, -+ { -+ .name = "netgear:amber:status", -+ .gpio = WNR2000V4_GPIO_LED_PWR_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:wan", -+ .gpio = WNR2000V4_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:wan", -+ .gpio = WNR2000V4_GPIO_LED_WAN_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:blue:wlan", -+ .gpio = WNR2000V4_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, -+ /* LAN LEDS */ -+ { -+ .name = "netgear:green:lan1", -+ .gpio = WNR2000V4_GPIO_LED_LAN1_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:lan2", -+ .gpio = WNR2000V4_GPIO_LED_LAN2_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:lan3", -+ .gpio = WNR2000V4_GPIO_LED_LAN3_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:lan4", -+ .gpio = WNR2000V4_GPIO_LED_LAN4_GREEN, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:lan1", -+ .gpio = WNR2000V4_GPIO_LED_LAN1_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:lan2", -+ .gpio = WNR2000V4_GPIO_LED_LAN2_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:lan3", -+ .gpio = WNR2000V4_GPIO_LED_LAN3_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:amber:lan4", -+ .gpio = WNR2000V4_GPIO_LED_LAN4_AMBER, -+ .active_low = 1, -+ }, -+ { -+ .name = "netgear:green:wps", -+ .gpio = WNR2000V4_GPIO_LED_WPS, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wnr2000v4_gpio_keys[] __initdata = { -+ { -+ .desc = "WPS button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNR2000V4_GPIO_BTN_WPS, -+ .active_low = 1, -+ }, -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNR2000V4_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+ { -+ .desc = "WLAN button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WNR2000V4_GPIO_BTN_WLAN, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init wnr_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_register_mdio(1, 0x0); -+ -+ ath79_register_usb(); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V4_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V4_MAC1_OFFSET, 0); -+ -+ /* GMAC0 is connected to the PHY0 of the internal switch, GE0 */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_switch_data.phy_poll_mask = BIT(4); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch, GE1 */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(ee, art); -+} -+ -+static void __init wnr2000v4_setup(void) -+{ -+ int i; -+ -+ wnr_common_setup(); -+ -+ /* Ensure no LED has an internal MUX signal, otherwise -+ control of LED could be lost... This is especially important -+ for most green LEDS (Eth,WAN).. who arrive in this function with -+ MUX signals set. */ -+ for (i = 0; i < ARRAY_SIZE(wnr2000v4_leds_gpio); i++) -+ ath79_gpio_output_select(wnr2000v4_leds_gpio[i].gpio, -+ AR934X_GPIO_OUT_GPIO); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v4_leds_gpio), -+ wnr2000v4_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WNR2000V4_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wnr2000v4_gpio_keys), -+ wnr2000v4_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNR2000_V4, "WNR2000V4", "NETGEAR WNR2000 V4", wnr2000v4_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2200.c linux-4.1.13/arch/mips/ath79/mach-wnr2200.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2200.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wnr2200.c 2015-11-21 17:22:11.759223549 +0100 -@@ -0,0 +1,137 @@ -+/* -+ * NETGEAR WNR2200 board support -+ * -+ * Copyright (C) 2013 Aidan Kissane -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define WNR2200_GPIO_LED_LAN2_AMBER 0 -+#define WNR2200_GPIO_LED_LAN4_AMBER 1 -+#define WNR2200_GPIO_LED_WPS 5 -+#define WNR2200_GPIO_LED_WAN_GREEN 7 -+#define WNR2200_GPIO_LED_USB 8 -+#define WNR2200_GPIO_LED_LAN3_AMBER 11 -+#define WNR2200_GPIO_LED_WAN_AMBER 12 -+#define WNR2200_GPIO_LED_LAN1_GREEN 13 -+#define WNR2200_GPIO_LED_LAN2_GREEN 14 -+#define WNR2200_GPIO_LED_LAN3_GREEN 15 -+#define WNR2200_GPIO_LED_LAN4_GREEN 16 -+#define WNR2200_GPIO_LED_PWR_AMBER 21 -+#define WNR2200_GPIO_LED_PWR_GREEN 22 -+#define WNR2200_GPIO_USB_5V 4 -+#define WNR2200_GPIO_USB_POWER 24 -+ -+#define WNR2200_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WNR2200_KEYS_DEBOUNCE_INTERVAL (3 * WNR2200_KEYS_POLL_INTERVAL) -+ -+#define WNR2200_MAC0_OFFSET 0 -+#define WNR2200_MAC1_OFFSET 6 -+#define WNR2200_PCIE_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led wnr2200_leds_gpio[] __initdata = { -+ { -+ .name = "netgear:amber:lan2", -+ .gpio = WNR2200_GPIO_LED_LAN2_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "netgear:amber:lan4", -+ .gpio = WNR2200_GPIO_LED_LAN4_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:wps", -+ .gpio = WNR2200_GPIO_LED_WPS, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:wan", -+ .gpio = WNR2200_GPIO_LED_WAN_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:usb", -+ .gpio = WNR2200_GPIO_LED_USB, -+ .active_low = 1, -+ }, { -+ .name = "netgear:amber:lan3", -+ .gpio = WNR2200_GPIO_LED_LAN3_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "netgear:amber:wan", -+ .gpio = WNR2200_GPIO_LED_WAN_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:lan1", -+ .gpio = WNR2200_GPIO_LED_LAN1_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:lan2", -+ .gpio = WNR2200_GPIO_LED_LAN2_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:lan3", -+ .gpio = WNR2200_GPIO_LED_LAN3_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:lan4", -+ .gpio = WNR2200_GPIO_LED_LAN4_GREEN, -+ .active_low = 1, -+ }, { -+ .name = "netgear:amber:power", -+ .gpio = WNR2200_GPIO_LED_PWR_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "netgear:green:power", -+ .gpio = WNR2200_GPIO_LED_PWR_GREEN, -+ .active_low = 1, -+ } -+}; -+ -+static void __init wnr2200_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2200_MAC0_OFFSET, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2200_MAC1_OFFSET, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(NULL); -+ ap91_pci_init(art + WNR2200_PCIE_CALDATA_OFFSET, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2200_leds_gpio), -+ wnr2200_leds_gpio); -+ -+ /* enable power for the USB port */ -+ ap9x_pci_setup_wmac_gpio(0, -+ BIT(WNR2200_GPIO_USB_5V), -+ BIT(WNR2200_GPIO_USB_5V)); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WNR2200, "WNR2200", "NETGEAR WNR2200", wnr2200_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wp543.c linux-4.1.13/arch/mips/ath79/mach-wp543.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wp543.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wp543.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,109 @@ -+/* -+ * Compex WP543/WPJ543 board support -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define WP543_GPIO_SW6 2 -+#define WP543_GPIO_LED_1 3 -+#define WP543_GPIO_LED_2 4 -+#define WP543_GPIO_LED_WLAN 5 -+#define WP543_GPIO_LED_CONN 6 -+#define WP543_GPIO_LED_DIAG 7 -+#define WP543_GPIO_SW4 8 -+ -+#define WP543_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WP543_KEYS_DEBOUNCE_INTERVAL (3 * WP543_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led wp543_leds_gpio[] __initdata = { -+ { -+ .name = "wp543:green:led1", -+ .gpio = WP543_GPIO_LED_1, -+ .active_low = 1, -+ }, { -+ .name = "wp543:green:led2", -+ .gpio = WP543_GPIO_LED_2, -+ .active_low = 1, -+ }, { -+ .name = "wp543:green:wlan", -+ .gpio = WP543_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "wp543:green:conn", -+ .gpio = WP543_GPIO_LED_CONN, -+ .active_low = 1, -+ }, { -+ .name = "wp543:green:diag", -+ .gpio = WP543_GPIO_LED_DIAG, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wp543_gpio_keys[] __initdata = { -+ { -+ .desc = "sw6", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WP543_GPIO_SW6, -+ .active_low = 1, -+ }, { -+ .desc = "sw4", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WP543_GPIO_SW4, -+ .active_low = 1, -+ } -+}; -+ -+static const char *wp543_part_probes[] = { -+ "MyLoader", -+ NULL, -+}; -+ -+static struct flash_platform_data wp543_flash_data = { -+ .part_probes = wp543_part_probes, -+}; -+ -+static void __init wp543_setup(void) -+{ -+ ath79_register_m25p80(&wp543_flash_data); -+ -+ ath79_register_mdio(0, 0xfffffff0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.phy_mask = 0x0f; -+ ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | -+ AR71XX_RESET_GE0_PHY; -+ ath79_register_eth(0); -+ -+ ath79_register_usb(); -+ ath79_register_pci(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio), -+ wp543_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wp543_gpio_keys), -+ wp543_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WP543, "WP543", "Compex WP543", wp543_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpe72.c linux-4.1.13/arch/mips/ath79/mach-wpe72.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wpe72.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wpe72.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,97 @@ -+/* -+ * Compex WPE72 board support -+ * -+ * Copyright (C) 2012 Johnathan Boyce -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+#include "pci.h" -+ -+#define WPE72_GPIO_RESET 12 -+#define WPE72_GPIO_LED_DIAG 13 -+#define WPE72_GPIO_LED_1 14 -+#define WPE72_GPIO_LED_2 15 -+#define WPE72_GPIO_LED_3 16 -+#define WPE72_GPIO_LED_4 17 -+ -+#define WPE72_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WPE72_KEYS_DEBOUNCE_INTERVAL (3 * WPE72_KEYS_POLL_INTERVAL) -+ -+static struct gpio_led wpe72_leds_gpio[] __initdata = { -+ { -+ .name = "wpe72:green:led1", -+ .gpio = WPE72_GPIO_LED_1, -+ .active_low = 1, -+ }, { -+ .name = "wpe72:green:led2", -+ .gpio = WPE72_GPIO_LED_2, -+ .active_low = 1, -+ }, { -+ .name = "wpe72:green:led3", -+ .gpio = WPE72_GPIO_LED_3, -+ .active_low = 1, -+ }, { -+ .name = "wpe72:green:led4", -+ .gpio = WPE72_GPIO_LED_4, -+ .active_low = 1, -+ }, { -+ .name = "wpe72:green:diag", -+ .gpio = WPE72_GPIO_LED_DIAG, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wpe72_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WPE72_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WPE72_GPIO_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static const char *wpe72_part_probes[] = { -+ "MyLoader", -+ NULL, -+}; -+ -+static struct flash_platform_data wpe72_flash_data = { -+ .part_probes = wpe72_part_probes, -+}; -+ -+static void __init wpe72_setup(void) -+{ -+ ath79_register_m25p80(&wpe72_flash_data); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ ath79_register_pci(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpe72_leds_gpio), -+ wpe72_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WPE72_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wpe72_gpio_keys), -+ wpe72_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WPE72, "WPE72", "Compex WPE72", wpe72_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpj344.c linux-4.1.13/arch/mips/ath79/mach-wpj344.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wpj344.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wpj344.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,175 @@ -+/* -+ * Compex WPJ344 board support -+ * -+ * Copyright (c) 2011 Qualcomm Atheros -+ * Copyright (c) 2011-2012 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-usb.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WPJ344_GPIO_LED_SIG1 15 -+#define WPJ344_GPIO_LED_SIG2 20 -+#define WPJ344_GPIO_LED_SIG3 21 -+#define WPJ344_GPIO_LED_SIG4 22 -+#define WPJ344_GPIO_LED_STATUS 14 -+ -+#define WPJ344_GPIO_BTN_RESET 12 -+ -+#define WPJ344_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WPJ344_KEYS_DEBOUNCE_INTERVAL (3 * WPJ344_KEYS_POLL_INTERVAL) -+ -+#define WPJ344_MAC0_OFFSET 0 -+#define WPJ344_MAC1_OFFSET 6 -+#define WPJ344_WMAC_CALDATA_OFFSET 0x1000 -+#define WPJ344_PCIE_CALDATA_OFFSET 0x5000 -+ -+static struct gpio_led wpj344_leds_gpio[] __initdata = { -+ { -+ .name = "wpj344:green:status", -+ .gpio = WPJ344_GPIO_LED_STATUS, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj344:red:sig1", -+ .gpio = WPJ344_GPIO_LED_SIG1, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj344:yellow:sig2", -+ .gpio = WPJ344_GPIO_LED_SIG2, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj344:green:sig3", -+ .gpio = WPJ344_GPIO_LED_SIG3, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj344:green:sig4", -+ .gpio = WPJ344_GPIO_LED_SIG4, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wpj344_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WPJ344_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WPJ344_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg wpj344_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg wpj344_ar8327_led_cfg = { -+ .led_ctrl0 = 0x00000000, -+ .led_ctrl1 = 0xc737c737, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x00c30c00, -+ .open_drain = true, -+}; -+ -+static struct ar8327_platform_data wpj344_ar8327_data = { -+ .pad0_cfg = &wpj344_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &wpj344_ar8327_led_cfg, -+}; -+ -+static struct mdio_board_info wpj344_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wpj344_ar8327_data, -+ }, -+}; -+ -+static void __init wpj344_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj344_leds_gpio), -+ wpj344_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WPJ344_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wpj344_gpio_keys), -+ wpj344_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac(art + WPJ344_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_register_pci(); -+ -+ mdiobus_register_board_info(wpj344_mdio0_info, -+ ARRAY_SIZE(wpj344_mdio0_info)); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ344_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ344_MAC1_OFFSET, 0); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WPJ344, "WPJ344", "Compex WPJ344", wpj344_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpj531.c linux-4.1.13/arch/mips/ath79/mach-wpj531.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wpj531.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wpj531.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,143 @@ -+/* -+ * Compex WPJ531 board support -+ * -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "pci.h" -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WPJ531_GPIO_LED_SIG1 14 -+#define WPJ531_GPIO_LED_SIG2 15 -+#define WPJ531_GPIO_LED_SIG3 22 -+#define WPJ531_GPIO_LED_SIG4 23 -+#define WPJ531_GPIO_BUZZER 4 -+ -+#define WPJ531_GPIO_BTN_RESET 17 -+ -+#define WPJ531_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WPJ531_KEYS_DEBOUNCE_INTERVAL (3 * WPJ531_KEYS_POLL_INTERVAL) -+ -+#define WPJ531_MAC0_OFFSET 0x10 -+#define WPJ531_MAC1_OFFSET 0x18 -+#define WPJ531_WMAC_CALDATA_OFFSET 0x1000 -+#define WPJ531_PCIE_CALDATA_OFFSET 0x5000 -+ -+#define WPJ531_ART_SIZE 0x8000 -+ -+static struct gpio_led wpj531_leds_gpio[] __initdata = { -+ { -+ .name = "wpj531:red:sig1", -+ .gpio = WPJ531_GPIO_LED_SIG1, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj531:yellow:sig2", -+ .gpio = WPJ531_GPIO_LED_SIG2, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj531:green:sig3", -+ .gpio = WPJ531_GPIO_LED_SIG3, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj531:green:sig4", -+ .gpio = WPJ531_GPIO_LED_SIG4, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj531:buzzer", -+ .gpio = WPJ531_GPIO_BUZZER, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button wpj531_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WPJ531_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WPJ531_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static void __init common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_setup_ar933x_phy4_switch(false, false); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN */ -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.phy_mask = BIT(4); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ531_MAC0_OFFSET, 0); -+ ath79_register_eth(0); -+ -+ /* WAN */ -+ ath79_switch_data.phy4_mii_en = 1; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_switch_data.phy_poll_mask |= BIT(4); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ531_MAC1_OFFSET, 0); -+ ath79_register_eth(1); -+ -+ ath79_register_wmac(art + WPJ531_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_register_pci(); -+ ath79_register_usb(); -+} -+ -+static void __init wpj531_setup(void) -+{ -+ common_setup(); -+ -+ ath79_register_leds_gpio(-1, -+ ARRAY_SIZE(wpj531_leds_gpio), -+ wpj531_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, -+ WPJ531_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wpj531_gpio_keys), -+ wpj531_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WPJ531, "WPJ531", "Compex WPJ531", wpj531_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpj558.c linux-4.1.13/arch/mips/ath79/mach-wpj558.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wpj558.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wpj558.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,177 @@ -+/* -+ * Compex WPJ558 board support -+ * -+ * Copyright (c) 2012 Qualcomm Atheros -+ * Copyright (c) 2012-2013 Gabor Juhos -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-eth.h" -+#include "dev-usb.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WPJ558_GPIO_LED_SIG1 14 -+#define WPJ558_GPIO_LED_SIG2 15 -+#define WPJ558_GPIO_LED_SIG3 22 -+#define WPJ558_GPIO_LED_SIG4 23 -+#define WPJ558_GPIO_BUZZER 4 -+ -+#define WPJ558_GPIO_BTN_RESET 17 -+ -+#define WPJ558_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WPJ558_KEYS_DEBOUNCE_INTERVAL (3 * WPJ558_KEYS_POLL_INTERVAL) -+ -+#define WPJ558_MAC_OFFSET 0x1002 -+#define WPJ558_WMAC_CALDATA_OFFSET 0x1000 -+ -+static struct gpio_led wpj558_leds_gpio[] __initdata = { -+ { -+ .name = "wpj558:red:sig1", -+ .gpio = WPJ558_GPIO_LED_SIG1, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj558:yellow:sig2", -+ .gpio = WPJ558_GPIO_LED_SIG2, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj558:green:sig3", -+ .gpio = WPJ558_GPIO_LED_SIG3, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj558:green:sig4", -+ .gpio = WPJ558_GPIO_LED_SIG4, -+ .active_low = 1, -+ }, -+ { -+ .name = "wpj558:buzzer", -+ .gpio = WPJ558_GPIO_BUZZER, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_keys_button wpj558_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WPJ558_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WPJ558_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, -+}; -+ -+static struct ar8327_pad_cfg wpj558_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_SGMII, -+ .sgmii_delay_en = true, -+}; -+ -+static struct ar8327_pad_cfg wpj558_ar8327_pad6_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_platform_data wpj558_ar8327_data = { -+ .pad0_cfg = &wpj558_ar8327_pad0_cfg, -+ .pad6_cfg = &wpj558_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+}; -+ -+static struct mdio_board_info wpj558_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wpj558_ar8327_data, -+ }, -+}; -+ -+static void __init wpj558_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj558_leds_gpio), -+ wpj558_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WPJ558_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wpj558_gpio_keys), -+ wpj558_gpio_keys); -+ -+ ath79_register_usb(); -+ -+ ath79_register_wmac(art + WPJ558_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_register_pci(); -+ -+ mdiobus_register_board_info(wpj558_mdio0_info, -+ ARRAY_SIZE(wpj558_mdio0_info)); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ558_MAC_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ558_MAC_OFFSET, 0); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x56000000; -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WPJ558, "WPJ558", "Compex WPJ558", wpj558_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wrt160nl.c linux-4.1.13/arch/mips/ath79/mach-wrt160nl.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wrt160nl.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wrt160nl.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,126 @@ -+/* -+ * Linksys WRT160NL board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "nvram.h" -+#include "machtypes.h" -+ -+#define WRT160NL_GPIO_LED_POWER 14 -+#define WRT160NL_GPIO_LED_WPS_AMBER 9 -+#define WRT160NL_GPIO_LED_WPS_BLUE 8 -+#define WRT160NL_GPIO_LED_WLAN 6 -+ -+#define WRT160NL_GPIO_BTN_WPS 7 -+#define WRT160NL_GPIO_BTN_RESET 21 -+ -+#define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) -+ -+#define WRT160NL_NVRAM_ADDR 0x1f7e0000 -+#define WRT160NL_NVRAM_SIZE 0x10000 -+ -+static const char *wrt160nl_part_probes[] = { -+ "cybertan", -+ NULL, -+}; -+ -+static struct flash_platform_data wrt160nl_flash_data = { -+ .part_probes = wrt160nl_part_probes, -+}; -+ -+static struct gpio_led wrt160nl_leds_gpio[] __initdata = { -+ { -+ .name = "wrt160nl:blue:power", -+ .gpio = WRT160NL_GPIO_LED_POWER, -+ .active_low = 1, -+ .default_trigger = "default-on", -+ }, { -+ .name = "wrt160nl:amber:wps", -+ .gpio = WRT160NL_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "wrt160nl:blue:wps", -+ .gpio = WRT160NL_GPIO_LED_WPS_BLUE, -+ .active_low = 1, -+ }, { -+ .name = "wrt160nl:blue:wlan", -+ .gpio = WRT160NL_GPIO_LED_WLAN, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WRT160NL_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wps", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WRT160NL_GPIO_BTN_WPS, -+ .active_low = 1, -+ } -+}; -+ -+static void __init wrt160nl_setup(void) -+{ -+ const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 mac[6]; -+ -+ if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, -+ "lan_hwaddr=", mac) == 0) { -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ } -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.phy_mask = 0x01; -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(&wrt160nl_flash_data); -+ -+ ath79_register_usb(); -+ -+ if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, -+ "wl0_hwaddr=", mac) == 0) -+ ath79_register_wmac(eeprom, mac); -+ else -+ ath79_register_wmac(eeprom, NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), -+ wrt160nl_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wrt160nl_gpio_keys), -+ wrt160nl_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", -+ wrt160nl_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wrt400n.c linux-4.1.13/arch/mips/ath79/mach-wrt400n.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wrt400n.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wrt400n.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,161 @@ -+/* -+ * Linksys WRT400N board support -+ * -+ * Copyright (C) 2009-2012 Gabor Juhos -+ * Copyright (C) 2009 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "machtypes.h" -+ -+#define WRT400N_GPIO_LED_POWER 1 -+#define WRT400N_GPIO_LED_WPS_BLUE 4 -+#define WRT400N_GPIO_LED_WPS_AMBER 5 -+#define WRT400N_GPIO_LED_WLAN 6 -+ -+#define WRT400N_GPIO_BTN_RESET 8 -+#define WRT400N_GPIO_BTN_WLSEC 3 -+ -+#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL) -+ -+#define WRT400N_MAC_ADDR_OFFSET 0x120c -+#define WRT400N_CALDATA0_OFFSET 0x1000 -+#define WRT400N_CALDATA1_OFFSET 0x5000 -+ -+static struct mtd_partition wrt400n_partitions[] = { -+ { -+ .name = "uboot", -+ .offset = 0, -+ .size = 0x030000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "env", -+ .offset = 0x030000, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "linux", -+ .offset = 0x040000, -+ .size = 0x140000, -+ }, { -+ .name = "rootfs", -+ .offset = 0x180000, -+ .size = 0x630000, -+ }, { -+ .name = "nvram", -+ .offset = 0x7b0000, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "factory", -+ .offset = 0x7c0000, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "language", -+ .offset = 0x7d0000, -+ .size = 0x020000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "caldata", -+ .offset = 0x7f0000, -+ .size = 0x010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x040000, -+ .size = 0x770000, -+ } -+}; -+ -+static struct flash_platform_data wrt400n_flash_data = { -+ .parts = wrt400n_partitions, -+ .nr_parts = ARRAY_SIZE(wrt400n_partitions), -+}; -+ -+static struct gpio_led wrt400n_leds_gpio[] __initdata = { -+ { -+ .name = "wrt400n:blue:wps", -+ .gpio = WRT400N_GPIO_LED_WPS_BLUE, -+ .active_low = 1, -+ }, { -+ .name = "wrt400n:amber:wps", -+ .gpio = WRT400N_GPIO_LED_WPS_AMBER, -+ .active_low = 1, -+ }, { -+ .name = "wrt400n:blue:wlan", -+ .gpio = WRT400N_GPIO_LED_WLAN, -+ .active_low = 1, -+ }, { -+ .name = "wrt400n:blue:power", -+ .gpio = WRT400N_GPIO_LED_POWER, -+ .active_low = 0, -+ .default_trigger = "default-on", -+ } -+}; -+ -+static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, -+ .gpio = WRT400N_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "wlsec", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, -+ .gpio = WRT400N_GPIO_BTN_WLSEC, -+ .active_low = 1, -+ } -+}; -+ -+static void __init wrt400n_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; -+ -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth0_data.speed = SPEED_100; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_m25p80(&wrt400n_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio), -+ wrt400n_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wrt400n_gpio_keys), -+ wrt400n_gpio_keys); -+ -+ ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL, -+ art + WRT400N_CALDATA1_OFFSET, NULL); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-450hp2.c linux-4.1.13/arch/mips/ath79/mach-wzr-450hp2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-450hp2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wzr-450hp2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,221 @@ -+/* -+ * Buffalo WZR-450HP2 board support -+ * -+ * Copyright (c) 2013 Gabor Juhos -+ * -+ * Based on the Qualcomm Atheros AP135/AP136 reference board support code -+ * Copyright (c) 2012 Qualcomm Atheros -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-spi.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WZR_450HP2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WZR_450HP2_KEYS_DEBOUNCE_INTERVAL (3 * WZR_450HP2_KEYS_POLL_INTERVAL) -+ -+#define WZR_450HP2_WMAC_CALDATA_OFFSET 0x1000 -+ -+static struct mtd_partition wzrhpg450h_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x0040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x0040000, -+ .size = 0x0010000, -+ }, { -+ .name = "ART", -+ .offset = 0x0ff0000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x0050000, -+ .size = 0x0f90000, -+ }, { -+ .name = "user_property", -+ .offset = 0x0fe0000, -+ .size = 0x0010000, -+ } -+}; -+ -+static struct flash_platform_data wzr_450hp2_flash_data = { -+ .parts = wzrhpg450h_partitions, -+ .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), -+}; -+ -+static struct gpio_led wzr_450hp2_leds_gpio[] __initdata = { -+ { -+ .name = "buffalo:green:wps", -+ .gpio = 3, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:system", -+ .gpio = 20, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:wlan", -+ .gpio = 18, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wzr_450hp2_gpio_keys[] __initdata = { -+ { -+ .desc = "Reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 17, -+ .active_low = 1, -+ }, -+ { -+ .desc = "RFKILL button", -+ .type = EV_KEY, -+ .code = KEY_RFKILL, -+ .debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 21, -+ .active_low = 1, -+ }, -+}; -+ -+static const struct ar8327_led_info wzr_450hp2_leds_ar8327[] = { -+ AR8327_LED_INFO(PHY0_0, HW, "buffalo:green:lan1"), -+ AR8327_LED_INFO(PHY1_0, HW, "buffalo:green:lan2"), -+ AR8327_LED_INFO(PHY2_0, HW, "buffalo:green:lan3"), -+ AR8327_LED_INFO(PHY3_0, HW, "buffalo:green:lan4"), -+ AR8327_LED_INFO(PHY4_0, HW, "buffalo:green:wan"), -+}; -+ -+/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ -+static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_SGMII, -+ .sgmii_delay_en = true, -+}; -+ -+/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ -+static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad6_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -+}; -+ -+static struct ar8327_led_cfg wzr_450hp2_ar8327_led_cfg = { -+ .led_ctrl0 = 0xcc35cc35, -+ .led_ctrl1 = 0xca35ca35, -+ .led_ctrl2 = 0xc935c935, -+ .led_ctrl3 = 0x03ffff00, -+ .open_drain = true, -+}; -+ -+static struct ar8327_platform_data wzr_450hp2_ar8327_data = { -+ .pad0_cfg = &wzr_450hp2_ar8327_pad0_cfg, -+ .pad6_cfg = &wzr_450hp2_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &wzr_450hp2_ar8327_led_cfg, -+ .num_leds = ARRAY_SIZE(wzr_450hp2_leds_ar8327), -+ .leds = wzr_450hp2_leds_ar8327, -+}; -+ -+static struct mdio_board_info wzr_450hp2_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &wzr_450hp2_ar8327_data, -+ }, -+}; -+ -+static void __init wzr_450hp2_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ u8 *mac_wan = art; -+ u8 *mac_lan = mac_wan + ETH_ALEN; -+ -+ ath79_register_m25p80(&wzr_450hp2_flash_data); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzr_450hp2_leds_gpio), -+ wzr_450hp2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WZR_450HP2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wzr_450hp2_gpio_keys), -+ wzr_450hp2_gpio_keys); -+ -+ ath79_register_wmac(art + WZR_450HP2_WMAC_CALDATA_OFFSET, mac_lan); -+ -+ mdiobus_register_board_info(wzr_450hp2_mdio0_info, -+ ARRAY_SIZE(wzr_450hp2_mdio0_info)); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x56000000; -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac_wan, 0); -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac_lan, 0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WZR_450HP2, "WZR-450HP2", -+ "Buffalo WZR-450HP2", wzr_450hp2_setup); -+ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-ag300h.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-ag300h.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-ag300h.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-ag300h.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,205 @@ -+/* -+ * Buffalo WZR-HP-AG300H board support -+ * -+ * Copyright (C) 2011 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define WZRHPAG300H_MAC_OFFSET 0x20c -+#define WZRHPAG300H_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL) -+ -+static struct mtd_partition wzrhpag300h_flash_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x0040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x0040000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "art", -+ .offset = 0x0050000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x0060000, -+ .size = 0x1f90000, -+ }, { -+ .name = "user_property", -+ .offset = 0x1ff0000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ } -+}; -+ -+static struct flash_platform_data wzrhpag300h_flash_data = { -+ .parts = wzrhpag300h_flash_partitions, -+ .nr_parts = ARRAY_SIZE(wzrhpag300h_flash_partitions), -+}; -+ -+static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = { -+ { -+ .name = "buffalo:red:diag", -+ .gpio = 1, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led wzrhpag300h_wmac0_leds_gpio[] = { -+ { -+ .name = "buffalo:amber:band2g", -+ .gpio = 1, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:usb", -+ .gpio = 3, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:band2g", -+ .gpio = 5, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led wzrhpag300h_wmac1_leds_gpio[] = { -+ { -+ .name = "buffalo:green:band5g", -+ .gpio = 1, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:router", -+ .gpio = 3, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:blue:movie_engine", -+ .gpio = 4, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:amber:band5g", -+ .gpio = 5, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 11, -+ .active_low = 1, -+ }, { -+ .desc = "usb", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 3, -+ .active_low = 1, -+ }, { -+ .desc = "aoss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 5, -+ .active_low = 1, -+ }, { -+ .desc = "router_auto", -+ .type = EV_SW, -+ .code = BTN_6, -+ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 6, -+ .active_low = 1, -+ }, { -+ .desc = "router_off", -+ .type = EV_SW, -+ .code = BTN_5, -+ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 7, -+ .active_low = 1, -+ }, { -+ .desc = "movie_engine", -+ .type = EV_SW, -+ .code = BTN_7, -+ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 8, -+ .active_low = 1, -+ } -+}; -+ -+static void __init wzrhpag300h_setup(void) -+{ -+ u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000); -+ u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000); -+ u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET; -+ u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET; -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 1); -+ -+ ath79_register_mdio(0, ~(BIT(0) | BIT(4))); -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = BIT(4); -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio), -+ wzrhpag300h_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wzrhpag300h_gpio_keys), -+ wzrhpag300h_gpio_keys); -+ -+ ath79_register_m25p80_multi(&wzrhpag300h_flash_data); -+ -+ ap94_pci_init(eeprom1, mac1, eeprom2, mac2); -+ -+ ap9x_pci_setup_wmac_led_pin(0, 1); -+ ap9x_pci_setup_wmac_led_pin(1, 5); -+ -+ ap9x_pci_setup_wmac_leds(0, wzrhpag300h_wmac0_leds_gpio, -+ ARRAY_SIZE(wzrhpag300h_wmac0_leds_gpio)); -+ ap9x_pci_setup_wmac_leds(1, wzrhpag300h_wmac1_leds_gpio, -+ ARRAY_SIZE(wzrhpag300h_wmac1_leds_gpio)); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WZR_HP_AG300H, "WZR-HP-AG300H", -+ "Buffalo WZR-HP-AG300H/WZR-600DHP", wzrhpag300h_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh2.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh2.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh2.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh2.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,170 @@ -+/* -+ * Buffalo WZR-HP-G300NH2 board support -+ * -+ * Copyright (C) 2011 Felix Fietkau -+ * Copyright (C) 2011 Mark Deneen -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define WZRHPG300NH2_MAC_OFFSET 0x20c -+#define WZRHPG300NH2_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH2_KEYS_POLL_INTERVAL) -+ -+static struct mtd_partition wzrhpg300nh2_flash_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x0040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x0040000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "art", -+ .offset = 0x0050000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x0060000, -+ .size = 0x1f90000, -+ }, { -+ .name = "user_property", -+ .offset = 0x1ff0000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ } -+}; -+ -+static struct flash_platform_data wzrhpg300nh2_flash_data = { -+ .parts = wzrhpg300nh2_flash_partitions, -+ .nr_parts = ARRAY_SIZE(wzrhpg300nh2_flash_partitions), -+}; -+ -+static struct gpio_led wzrhpg300nh2_leds_gpio[] __initdata = { -+ { -+ .name = "buffalo:red:diag", -+ .gpio = 16, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led wzrhpg300nh2_wmac_leds_gpio[] = { -+ { -+ .name = "buffalo:blue:usb", -+ .gpio = 4, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:orange:security", -+ .gpio = 6, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:router", -+ .gpio = 7, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:blue:movie_engine_on", -+ .gpio = 8, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:blue:movie_engine_off", -+ .gpio = 9, -+ .active_low = 1, -+ }, -+}; -+ -+/* The AOSS button is wmac gpio 12 */ -+static struct gpio_keys_button wzrhpg300nh2_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 1, -+ .active_low = 1, -+ }, { -+ .desc = "usb", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 7, -+ .active_low = 1, -+ }, { -+ .desc = "qos", -+ .type = EV_KEY, -+ .code = BTN_3, -+ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 11, -+ .active_low = 0, -+ }, { -+ .desc = "router_on", -+ .type = EV_KEY, -+ .code = BTN_5, -+ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 8, -+ .active_low = 0, -+ }, -+}; -+ -+static void __init wzrhpg300nh2_setup(void) -+{ -+ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000); -+ u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET; -+ /* There is an eth1 but it is not connected to the switch */ -+ -+ ath79_register_m25p80_multi(&wzrhpg300nh2_flash_data); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); -+ ath79_register_mdio(0, ~(BIT(0))); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_register_eth(0); -+ -+ /* gpio13 is usb power. Turn it on. */ -+ gpio_request_one(13, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio), -+ wzrhpg300nh2_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wzrhpg300nh2_gpio_keys), -+ wzrhpg300nh2_gpio_keys); -+ ap9x_pci_setup_wmac_led_pin(0, 5); -+ ap9x_pci_setup_wmac_leds(0, wzrhpg300nh2_wmac_leds_gpio, -+ ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio)); -+ -+ ap91_pci_init(eeprom, mac0); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH2, "WZR-HP-G300NH2", -+ "Buffalo WZR-HP-G300NH2", wzrhpg300nh2_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,279 @@ -+/* -+ * Buffalo WZR-HP-G300NH board support -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-usb.h" -+#include "dev-wmac.h" -+#include "machtypes.h" -+ -+#define WZRHPG300NH_GPIO_LED_USB 0 -+#define WZRHPG300NH_GPIO_LED_DIAG 1 -+#define WZRHPG300NH_GPIO_LED_WIRELESS 6 -+#define WZRHPG300NH_GPIO_LED_SECURITY 17 -+#define WZRHPG300NH_GPIO_LED_ROUTER 18 -+ -+#define WZRHPG300NH_GPIO_RTL8366_SDA 19 -+#define WZRHPG300NH_GPIO_RTL8366_SCK 20 -+ -+#define WZRHPG300NH_GPIO_74HC153_S0 9 -+#define WZRHPG300NH_GPIO_74HC153_S1 11 -+#define WZRHPG300NH_GPIO_74HC153_1Y 12 -+#define WZRHPG300NH_GPIO_74HC153_2Y 14 -+ -+#define WZRHPG300NH_GPIO_EXP_BASE 32 -+#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0) -+#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1) -+#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2) -+#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3) -+#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5) -+#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6) -+#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7) -+ -+#define WZRHPG300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL) -+ -+#define WZRHPG300NH_MAC_OFFSET 0x20c -+ -+static struct mtd_partition wzrhpg300nh_flash_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x0040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x0040000, -+ .size = 0x0020000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x0060000, -+ .size = 0x1f60000, -+ }, { -+ .name = "user_property", -+ .offset = 0x1fc0000, -+ .size = 0x0020000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "art", -+ .offset = 0x1fe0000, -+ .size = 0x0020000, -+ .mask_flags = MTD_WRITEABLE, -+ } -+}; -+ -+static struct physmap_flash_data wzrhpg300nh_flash_data = { -+ .width = 2, -+ .parts = wzrhpg300nh_flash_partitions, -+ .nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions), -+}; -+ -+#define WZRHPG300NH_FLASH_BASE 0x1e000000 -+#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024) -+ -+static struct resource wzrhpg300nh_flash_resources[] = { -+ [0] = { -+ .start = WZRHPG300NH_FLASH_BASE, -+ .end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct platform_device wzrhpg300nh_flash_device = { -+ .name = "physmap-flash", -+ .id = -1, -+ .resource = wzrhpg300nh_flash_resources, -+ .num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources), -+ .dev = { -+ .platform_data = &wzrhpg300nh_flash_data, -+ } -+}; -+ -+static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = { -+ { -+ .name = "buffalo:orange:security", -+ .gpio = WZRHPG300NH_GPIO_LED_SECURITY, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:wireless", -+ .gpio = WZRHPG300NH_GPIO_LED_WIRELESS, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:green:router", -+ .gpio = WZRHPG300NH_GPIO_LED_ROUTER, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:red:diag", -+ .gpio = WZRHPG300NH_GPIO_LED_DIAG, -+ .active_low = 1, -+ }, { -+ .name = "buffalo:blue:usb", -+ .gpio = WZRHPG300NH_GPIO_LED_USB, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_RESET, -+ .active_low = 1, -+ }, { -+ .desc = "aoss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_AOSS, -+ .active_low = 1, -+ }, { -+ .desc = "usb", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_USB, -+ .active_low = 1, -+ }, { -+ .desc = "qos_on", -+ .type = EV_KEY, -+ .code = BTN_3, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_QOS_ON, -+ .active_low = 0, -+ }, { -+ .desc = "qos_off", -+ .type = EV_KEY, -+ .code = BTN_4, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF, -+ .active_low = 0, -+ }, { -+ .desc = "router_on", -+ .type = EV_KEY, -+ .code = BTN_5, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON, -+ .active_low = 0, -+ }, { -+ .desc = "router_auto", -+ .type = EV_KEY, -+ .code = BTN_6, -+ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO, -+ .active_low = 0, -+ } -+}; -+ -+static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = { -+ .gpio_base = WZRHPG300NH_GPIO_EXP_BASE, -+ .gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0, -+ .gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1, -+ .gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y, -+ .gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y, -+}; -+ -+static struct platform_device wzrhpg300nh_74hc153_device = { -+ .name = NXP_74HC153_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &wzrhpg300nh_74hc153_data, -+ } -+}; -+ -+static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = { -+ .gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA, -+ .gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK, -+}; -+ -+static struct platform_device wzrhpg300nh_rtl8366s_device = { -+ .name = RTL8366S_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &wzrhpg300nh_rtl8366_data, -+ } -+}; -+ -+static struct platform_device wzrhpg300nh_rtl8366rb_device = { -+ .name = RTL8366RB_DRIVER_NAME, -+ .id = -1, -+ .dev = { -+ .platform_data = &wzrhpg300nh_rtl8366_data, -+ } -+}; -+ -+static void __init wzrhpg300nh_setup(void) -+{ -+ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); -+ u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; -+ bool hasrtl8366rb = false; -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB) -+ hasrtl8366rb = true; -+ -+ if (hasrtl8366rb) { -+ ath79_eth0_pll_data.pll_1000 = 0x1f000000; -+ ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; -+ ath79_eth1_pll_data.pll_1000 = 0x100; -+ ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; -+ } else { -+ ath79_eth0_pll_data.pll_1000 = 0x1e000100; -+ ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; -+ ath79_eth1_pll_data.pll_1000 = 0x1e000100; -+ ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; -+ } -+ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.phy_mask = 0x10; -+ -+ ath79_register_eth(0); -+ ath79_register_eth(1); -+ -+ ath79_register_usb(); -+ ath79_register_wmac(eeprom, NULL); -+ -+ platform_device_register(&wzrhpg300nh_74hc153_device); -+ platform_device_register(&wzrhpg300nh_flash_device); -+ -+ if (hasrtl8366rb) -+ platform_device_register(&wzrhpg300nh_rtl8366rb_device); -+ else -+ platform_device_register(&wzrhpg300nh_rtl8366s_device); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio), -+ wzrhpg300nh_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wzrhpg300nh_gpio_keys), -+ wzrhpg300nh_gpio_keys); -+ -+} -+ -+MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH, "WZR-HP-G300NH", -+ "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g450h.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g450h.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g450h.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g450h.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,165 @@ -+/* -+ * Buffalo WZR-HP-G450G board support -+ * -+ * Copyright (C) 2011 Felix Fietkau -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "dev-usb.h" -+#include "machtypes.h" -+ -+#define WZRHPG450H_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define WZRHPG450H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG450H_KEYS_POLL_INTERVAL) -+ -+static struct mtd_partition wzrhpg450h_partitions[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = 0x0040000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "u-boot-env", -+ .offset = 0x0040000, -+ .size = 0x0010000, -+ }, { -+ .name = "ART", -+ .offset = 0x0050000, -+ .size = 0x0010000, -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "firmware", -+ .offset = 0x0060000, -+ .size = 0x1f80000, -+ }, { -+ .name = "user_property", -+ .offset = 0x1fe0000, -+ .size = 0x0020000, -+ } -+}; -+ -+static struct flash_platform_data wzrhpg450h_flash_data = { -+ .parts = wzrhpg450h_partitions, -+ .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), -+}; -+ -+static struct gpio_led wzrhpg450h_leds_gpio[] __initdata = { -+ { -+ .name = "buffalo:red:diag", -+ .gpio = 14, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:orange:security", -+ .gpio = 13, -+ .active_low = 1, -+ }, -+}; -+ -+ -+static struct gpio_led wzrhpg450h_wmac_leds_gpio[] = { -+ { -+ .name = "buffalo:blue:movie_engine", -+ .gpio = 13, -+ .active_low = 1, -+ }, -+ { -+ .name = "buffalo:green:router", -+ .gpio = 14, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_button wzrhpg450h_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 6, -+ .active_low = 1, -+ }, { -+ .desc = "usb", -+ .type = EV_KEY, -+ .code = BTN_2, -+ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 1, -+ .active_low = 1, -+ }, { -+ .desc = "aoss", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 8, -+ .active_low = 1, -+ }, { -+ .desc = "movie_engine", -+ .type = EV_KEY, -+ .code = BTN_6, -+ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 7, -+ .active_low = 0, -+ }, { -+ .desc = "router_off", -+ .type = EV_KEY, -+ .code = BTN_5, -+ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = 12, -+ .active_low = 0, -+ } -+}; -+ -+ -+static void __init wzrhpg450h_init(void) -+{ -+ u8 *ee = (u8 *) KSEG1ADDR(0x1f051000); -+ u8 *mac = (u8 *) ee + 2; -+ -+ ath79_register_m25p80_multi(&wzrhpg450h_flash_data); -+ -+ ath79_register_mdio(0, ~BIT(0)); -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.speed = SPEED_1000; -+ ath79_eth0_data.duplex = DUPLEX_FULL; -+ ath79_eth0_data.phy_mask = BIT(0); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio), -+ wzrhpg450h_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(wzrhpg450h_gpio_keys), -+ wzrhpg450h_gpio_keys); -+ -+ ath79_register_eth(0); -+ -+ gpio_request_one(16, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, -+ "USB power"); -+ ath79_register_usb(); -+ -+ ap91_pci_init(ee, NULL); -+ ap9x_pci_get_wmac_data(0)->tx_gain_buffalo = true; -+ ap9x_pci_get_wmac_data(1)->tx_gain_buffalo = true; -+ ap9x_pci_setup_wmac_led_pin(0, 15); -+ ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio, -+ ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); -+} -+ -+MIPS_MACHINE(ATH79_MACH_WZR_HP_G450H, "WZR-HP-G450H", "Buffalo WZR-HP-G450H", -+ wzrhpg450h_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-zcn-1523h.c linux-4.1.13/arch/mips/ath79/mach-zcn-1523h.c ---- linux-4.1.13.orig/arch/mips/ath79/mach-zcn-1523h.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/mach-zcn-1523h.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,154 @@ -+/* -+ * Zcomax ZCN-1523H-2-8/5-16 board support -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include "common.h" -+#include "dev-eth.h" -+#include "dev-m25p80.h" -+#include "dev-ap9x-pci.h" -+#include "dev-gpio-buttons.h" -+#include "dev-leds-gpio.h" -+#include "machtypes.h" -+ -+#define ZCN_1523H_GPIO_BTN_RESET 0 -+#define ZCN_1523H_GPIO_LED_INIT 11 -+#define ZCN_1523H_GPIO_LED_LAN1 17 -+ -+#define ZCN_1523H_2_GPIO_LED_WEAK 13 -+#define ZCN_1523H_2_GPIO_LED_MEDIUM 14 -+#define ZCN_1523H_2_GPIO_LED_STRONG 15 -+ -+#define ZCN_1523H_5_GPIO_LAN2_POWER 1 -+#define ZCN_1523H_5_GPIO_LED_LAN2 13 -+#define ZCN_1523H_5_GPIO_LED_WEAK 14 -+#define ZCN_1523H_5_GPIO_LED_MEDIUM 15 -+#define ZCN_1523H_5_GPIO_LED_STRONG 16 -+ -+#define ZCN_1523H_KEYS_POLL_INTERVAL 20 /* msecs */ -+#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL) -+ -+static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = { -+ { -+ .desc = "reset", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = ZCN_1523H_GPIO_BTN_RESET, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led zcn_1523h_leds_gpio[] __initdata = { -+ { -+ .name = "zcn-1523h:amber:init", -+ .gpio = ZCN_1523H_GPIO_LED_INIT, -+ .active_low = 1, -+ }, { -+ .name = "zcn-1523h:green:lan1", -+ .gpio = ZCN_1523H_GPIO_LED_LAN1, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = { -+ { -+ .name = "zcn-1523h:red:weak", -+ .gpio = ZCN_1523H_2_GPIO_LED_WEAK, -+ .active_low = 1, -+ }, { -+ .name = "zcn-1523h:amber:medium", -+ .gpio = ZCN_1523H_2_GPIO_LED_MEDIUM, -+ .active_low = 1, -+ }, { -+ .name = "zcn-1523h:green:strong", -+ .gpio = ZCN_1523H_2_GPIO_LED_STRONG, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = { -+ { -+ .name = "zcn-1523h:red:weak", -+ .gpio = ZCN_1523H_5_GPIO_LED_WEAK, -+ .active_low = 1, -+ }, { -+ .name = "zcn-1523h:amber:medium", -+ .gpio = ZCN_1523H_5_GPIO_LED_MEDIUM, -+ .active_low = 1, -+ }, { -+ .name = "zcn-1523h:green:strong", -+ .gpio = ZCN_1523H_5_GPIO_LED_STRONG, -+ .active_low = 1, -+ }, { -+ .name = "zcn-1523h:green:lan2", -+ .gpio = ZCN_1523H_5_GPIO_LED_LAN2, -+ .active_low = 1, -+ } -+}; -+ -+static void __init zcn_1523h_generic_setup(void) -+{ -+ u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004); -+ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); -+ -+ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | -+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio), -+ zcn_1523h_leds_gpio); -+ -+ ath79_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(zcn_1523h_gpio_keys), -+ zcn_1523h_gpio_keys); -+ -+ ap91_pci_init(ee, mac); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN1 port */ -+ ath79_register_eth(0); -+} -+ -+static void __init zcn_1523h_2_setup(void) -+{ -+ zcn_1523h_generic_setup(); -+ ap9x_pci_setup_wmac_gpio(0, BIT(9), 0); -+ -+ ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio), -+ zcn_1523h_2_leds_gpio); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2", -+ zcn_1523h_2_setup); -+ -+static void __init zcn_1523h_5_setup(void) -+{ -+ zcn_1523h_generic_setup(); -+ ap9x_pci_setup_wmac_gpio(0, BIT(8), 0); -+ -+ ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio), -+ zcn_1523h_5_leds_gpio); -+ -+ /* LAN2 port */ -+ ath79_register_eth(1); -+} -+ -+MIPS_MACHINE(ATH79_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5", -+ zcn_1523h_5_setup); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/Makefile linux-4.1.13/arch/mips/ath79/Makefile ---- linux-4.1.13.orig/arch/mips/ath79/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/Makefile 2015-12-04 19:57:05.957975089 +0100 -@@ -17,18 +17,169 @@ - # Devices - # - obj-y += dev-common.o -+obj-$(CONFIG_ATH79_DEV_AP9X_PCI) += dev-ap9x-pci.o -+obj-$(CONFIG_ATH79_DEV_DSA) += dev-dsa.o -+obj-$(CONFIG_ATH79_DEV_ETH) += dev-eth.o - obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o - obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o -+obj-$(CONFIG_ATH79_DEV_M25P80) += dev-m25p80.o -+obj-$(CONFIG_ATH79_DEV_NFC) += dev-nfc.o - obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o - obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o - obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o - - # -+# Miscellaneous objects -+# -+obj-$(CONFIG_ATH79_NVRAM) += nvram.o -+obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += pci-ath9k-fixup.o -+obj-$(CONFIG_ATH79_ROUTERBOOT) += routerboot.o -+ -+# - # Machines - # -+obj-$(CONFIG_ATH79_MACH_ALFA_AP96) += mach-alfa-ap96.o -+obj-$(CONFIG_ATH79_MACH_ALFA_NX) += mach-alfa-nx.o -+obj-$(CONFIG_ATH79_MACH_ALL0258N) += mach-all0258n.o -+obj-$(CONFIG_ATH79_MACH_ALL0315N) += mach-all0315n.o -+obj-$(CONFIG_ATH79_MACH_ANTMINER_S1)+= mach-antminer-s1.o -+obj-$(CONFIG_ATH79_MACH_ANTMINER_S3)+= mach-antminer-s3.o -+obj-$(CONFIG_ATH79_MACH_ARDUINO_YUN) += mach-arduino-yun.o -+obj-$(CONFIG_ATH79_MACH_AP113) += mach-ap113.o - obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o -+obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o - obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o -+obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o -+obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o -+obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o - obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o -+obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o -+obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o -+obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o -+obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o -+obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)+= mach-bhu-bxu2000n2-a.o -+obj-$(CONFIG_ATH79_MACH_BSB) += mach-bsb.o -+obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o -+obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o -+obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o - obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o -+obj-$(CONFIG_ATH79_MACH_DLAN_HOTSPOT) += mach-dlan-hotspot.o -+obj-$(CONFIG_ATH79_MACH_DLAN_PRO_500_WP) += mach-dlan-pro-500-wp.o -+obj-$(CONFIG_ATH79_MACH_DLAN_PRO_1200_AC) += mach-dlan-pro-1200-ac.o -+obj-$(CONFIG_ATH79_MACH_DGL_5500_A1) += mach-dgl-5500-a1.o -+obj-$(CONFIG_ATH79_MACH_DHP_1565_A1) += mach-dhp-1565-a1.o -+obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o -+obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o -+obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o -+obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o -+obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o -+obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o -+obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o -+obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o -+obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o -+obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o -+obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o -+obj-$(CONFIG_ATH79_MACH_EL_M150) += mach-el-m150.o -+obj-$(CONFIG_ATH79_MACH_EL_MINI) += mach-el-mini.o -+obj-$(CONFIG_ATH79_MACH_EPG5000) += mach-epg5000.o -+obj-$(CONFIG_ATH79_MACH_ESR1750) += mach-esr1750.o -+obj-$(CONFIG_ATH79_MACH_F9K1115V2) += mach-f9k1115v2.o -+obj-$(CONFIG_ATH79_MACH_GL_AR150) += mach-gl-ar150.o -+obj-$(CONFIG_ATH79_MACH_GL_AR300) += mach-gl-ar300.o -+obj-$(CONFIG_ATH79_MACH_GL_DOMINO) += mach-gl-domino.o -+obj-$(CONFIG_ATH79_MACH_GL_INET) += mach-gl-inet.o -+obj-$(CONFIG_ATH79_MACH_GS_MINIBOX_V1) += mach-gs-minibox-v1.o -+obj-$(CONFIG_ATH79_MACH_GS_OOLITE) += mach-gs-oolite.o -+obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o -+obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o -+obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o -+obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o -+obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o -+obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o -+obj-$(CONFIG_ATH79_MACH_MR16) += mach-mr16.o -+obj-$(CONFIG_ATH79_MACH_MR1750) += mach-mr1750.o -+obj-$(CONFIG_ATH79_MACH_MR600) += mach-mr600.o -+obj-$(CONFIG_ATH79_MACH_MR900) += mach-mr900.o -+obj-$(CONFIG_ATH79_MACH_MYNET_N600) += mach-mynet-n600.o -+obj-$(CONFIG_ATH79_MACH_MYNET_N750) += mach-mynet-n750.o -+obj-$(CONFIG_ATH79_MACH_MYNET_REXT) += mach-mynet-rext.o -+obj-$(CONFIG_ATH79_MACH_MZK_W04NU) += mach-mzk-w04nu.o -+obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += mach-mzk-w300nh.o -+obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o -+obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o -+obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o -+obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o -+obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o - obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o -+obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o -+obj-$(CONFIG_ATH79_MACH_QIHOO_C301) += mach-qihoo-c301.o -+obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o -+obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o -+obj-$(CONFIG_ATH79_MACH_RB750) += mach-rb750.o -+obj-$(CONFIG_ATH79_MACH_RB91X) += mach-rb91x.o -+obj-$(CONFIG_ATH79_MACH_RB922) += mach-rb922.o -+obj-$(CONFIG_ATH79_MACH_RB95X) += mach-rb95x.o -+obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o -+obj-$(CONFIG_ATH79_MACH_RBSXTLITE) += mach-rbsxtlite.o -+obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o -+obj-$(CONFIG_ATH79_MACH_SMART_300) += mach-smart-300.o -+obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o -+obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o -+obj-$(CONFIG_ATH79_MACH_TEW_712BR) += mach-tew-712br.o -+obj-$(CONFIG_ATH79_MACH_TEW_732BR) += mach-tew-732br.o -+obj-$(CONFIG_ATH79_MACH_TL_MR11U) += mach-tl-mr11u.o -+obj-$(CONFIG_ATH79_MACH_TL_MR13U) += mach-tl-mr13u.o -+obj-$(CONFIG_ATH79_MACH_TL_MR3020) += mach-tl-mr3020.o -+obj-$(CONFIG_ATH79_MACH_TL_MR3X20) += mach-tl-mr3x20.o -+obj-$(CONFIG_ATH79_MACH_TL_WAX50RE) += mach-tl-wax50re.o -+obj-$(CONFIG_ATH79_MACH_TL_WA701ND_V2) += mach-tl-wa701nd-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WA7210N_V2) += mach-tl-wa7210n-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WA830RE_V2) += mach-tl-wa830re-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WA901ND) += mach-tl-wa901nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WDR3320_V2) += mach-tl-wdr3320-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WDR3500) += mach-tl-wdr3500.o -+obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o -+obj-$(CONFIG_ATH79_MACH_TL_WDR6500_V2) += mach-tl-wdr6500-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WR741ND) += mach-tl-wr741nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o -+obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1) += mach-tl-wr841n.o -+obj-$(CONFIG_ATH79_MACH_TL_WR841N_V8) += mach-tl-wr841n-v8.o -+obj-$(CONFIG_ATH79_MACH_TL_WR841N_V9) += mach-tl-wr841n-v9.o -+obj-$(CONFIG_ATH79_MACH_TL_WR941ND) += mach-tl-wr941nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WR941ND_V6) += mach-tl-wr941nd-v6.o -+obj-$(CONFIG_ATH79_MACH_TL_WR1041N_V2) += mach-tl-wr1041n-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WR1043ND) += mach-tl-wr1043nd.o -+obj-$(CONFIG_ATH79_MACH_TL_WR1043ND_V2) += mach-tl-wr1043nd-v2.o -+obj-$(CONFIG_ATH79_MACH_TL_WR2543N) += mach-tl-wr2543n.o -+obj-$(CONFIG_ATH79_MACH_TL_WR703N) += mach-tl-wr703n.o -+obj-$(CONFIG_ATH79_MACH_TL_WR720N_V3) += mach-tl-wr720n-v3.o -+obj-$(CONFIG_ATH79_MACH_TUBE2H) += mach-tube2h.o -+obj-$(CONFIG_ATH79_MACH_UBNT) += mach-ubnt.o - obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o -+obj-$(CONFIG_ATH79_MACH_WEIO) += mach-weio.o -+obj-$(CONFIG_ATH79_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o -+obj-$(CONFIG_ATH79_MACH_WLAE_AG300N) += mach-wlae-ag300n.o -+obj-$(CONFIG_ATH79_MACH_WLR8100) += mach-wlr8100.o -+obj-$(CONFIG_ATH79_MACH_WNDAP360) += mach-wndap360.o -+obj-$(CONFIG_ATH79_MACH_WNDR3700) += mach-wndr3700.o -+obj-$(CONFIG_ATH79_MACH_WNDR4300) += mach-wndr4300.o -+obj-$(CONFIG_ATH79_MACH_WNR2000) += mach-wnr2000.o -+obj-$(CONFIG_ATH79_MACH_WNR2000_V3) += mach-wnr2000-v3.o -+obj-$(CONFIG_ATH79_MACH_WNR2000_V4) += mach-wnr2000-v4.o -+obj-$(CONFIG_ATH79_MACH_WNR2200) += mach-wnr2200.o -+obj-$(CONFIG_ATH79_MACH_WP543) += mach-wp543.o -+obj-$(CONFIG_ATH79_MACH_WPE72) += mach-wpe72.o -+obj-$(CONFIG_ATH79_MACH_WPJ344) += mach-wpj344.o -+obj-$(CONFIG_ATH79_MACH_WPJ531) += mach-wpj531.o -+obj-$(CONFIG_ATH79_MACH_WPJ558) += mach-wpj558.o -+obj-$(CONFIG_ATH79_MACH_WRT160NL) += mach-wrt160nl.o -+obj-$(CONFIG_ATH79_MACH_WRT400N) += mach-wrt400n.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH2) += mach-wzr-hp-g300nh2.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_AG300H) += mach-wzr-hp-ag300h.o -+obj-$(CONFIG_ATH79_MACH_WZR_HP_G450H) += mach-wzr-hp-g450h.o -+obj-$(CONFIG_ATH79_MACH_WZR_450HP2) += mach-wzr-450hp2.o -+obj-$(CONFIG_ATH79_MACH_ZCN_1523H) += mach-zcn-1523h.o -+obj-$(CONFIG_ATH79_MACH_CARAMBOLA2) += mach-carambola2.o -+obj-$(CONFIG_ATH79_MACH_NBG6716) += mach-nbg6716.o -diff -Nur linux-4.1.13.orig/arch/mips/ath79/nvram.c linux-4.1.13/arch/mips/ath79/nvram.c ---- linux-4.1.13.orig/arch/mips/ath79/nvram.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/nvram.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,80 @@ -+/* -+ * Atheros AR71xx minimal nvram support -+ * -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "nvram.h" -+ -+char *ath79_nvram_find_var(const char *name, const char *buf, unsigned buf_len) -+{ -+ unsigned len = strlen(name); -+ char *cur, *last; -+ -+ if (buf_len == 0 || len == 0) -+ return NULL; -+ -+ if (buf_len < len) -+ return NULL; -+ -+ if (len == 1) -+ return memchr(buf, (int) *name, buf_len); -+ -+ last = (char *) buf + buf_len - len; -+ for (cur = (char *) buf; cur <= last; cur++) -+ if (cur[0] == name[0] && memcmp(cur, name, len) == 0) -+ return cur + len; -+ -+ return NULL; -+} -+ -+int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, -+ const char *name, char *mac) -+{ -+ char *buf; -+ char *mac_str; -+ int ret; -+ int t; -+ -+ buf = vmalloc(nvram_len); -+ if (!buf) -+ return -ENOMEM; -+ -+ memcpy(buf, nvram, nvram_len); -+ buf[nvram_len - 1] = '\0'; -+ -+ mac_str = ath79_nvram_find_var(name, buf, nvram_len); -+ if (!mac_str) { -+ ret = -EINVAL; -+ goto free; -+ } -+ -+ if (strlen(mac_str) == 19 && mac_str[0] == '"' && mac_str[18] == '"') { -+ mac_str[18] = 0; -+ mac_str++; -+ } -+ -+ t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", -+ &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); -+ -+ if (t != 6) { -+ ret = -EINVAL; -+ goto free; -+ } -+ -+ ret = 0; -+ -+free: -+ vfree(buf); -+ return ret; -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/nvram.h linux-4.1.13/arch/mips/ath79/nvram.h ---- linux-4.1.13.orig/arch/mips/ath79/nvram.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/nvram.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,19 @@ -+/* -+ * Atheros AR71xx minimal nvram support -+ * -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_NVRAM_H -+#define _ATH79_NVRAM_H -+ -+char *ath79_nvram_find_var(const char *name, const char *buf, -+ unsigned buf_len); -+int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, -+ const char *name, char *mac); -+ -+#endif /* _ATH79_NVRAM_H */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.c linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.c ---- linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,126 @@ -+/* -+ * Atheros AP94 reference board PCI initialization -+ * -+ * Copyright (C) 2009-2010 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+struct ath9k_fixup { -+ u16 *cal_data; -+ unsigned slot; -+}; -+ -+static int ath9k_num_fixups; -+static struct ath9k_fixup ath9k_fixups[2]; -+ -+static void ath9k_pci_fixup(struct pci_dev *dev) -+{ -+ void __iomem *mem; -+ u16 *cal_data = NULL; -+ u16 cmd; -+ u32 bar0; -+ u32 val; -+ unsigned i; -+ -+ for (i = 0; i < ath9k_num_fixups; i++) { -+ if (ath9k_fixups[i].cal_data == NULL) -+ continue; -+ -+ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) -+ continue; -+ -+ cal_data = ath9k_fixups[i].cal_data; -+ break; -+ } -+ -+ if (cal_data == NULL) -+ return; -+ -+ if (*cal_data != 0xa55a) { -+ pr_err("pci %s: invalid calibration data\n", pci_name(dev)); -+ return; -+ } -+ -+ pr_info("pci %s: fixup device configuration\n", pci_name(dev)); -+ -+ mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); -+ if (!mem) { -+ pr_err("pci %s: ioremap error\n", pci_name(dev)); -+ return; -+ } -+ -+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); -+ -+ switch (ath79_soc) { -+ case ATH79_SOC_AR7161: -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, -+ AR71XX_PCI_MEM_BASE); -+ break; -+ case ATH79_SOC_AR7240: -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); -+ break; -+ -+ case ATH79_SOC_AR7241: -+ case ATH79_SOC_AR7242: -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); -+ break; -+ case ATH79_SOC_AR9344: -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ pci_read_config_word(dev, PCI_COMMAND, &cmd); -+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; -+ pci_write_config_word(dev, PCI_COMMAND, cmd); -+ -+ /* set pointer to first reg address */ -+ cal_data += 3; -+ while (*cal_data != 0xffff) { -+ u32 reg; -+ reg = *cal_data++; -+ val = *cal_data++; -+ val |= (*cal_data++) << 16; -+ -+ __raw_writel(val, mem + reg); -+ udelay(100); -+ } -+ -+ pci_read_config_dword(dev, PCI_VENDOR_ID, &val); -+ dev->vendor = val & 0xffff; -+ dev->device = (val >> 16) & 0xffff; -+ -+ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); -+ dev->revision = val & 0xff; -+ dev->class = val >> 8; /* upper 3 bytes */ -+ -+ pci_read_config_word(dev, PCI_COMMAND, &cmd); -+ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); -+ pci_write_config_word(dev, PCI_COMMAND, cmd); -+ -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); -+ -+ iounmap(mem); -+} -+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); -+ -+void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) -+{ -+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) -+ return; -+ -+ ath9k_fixups[ath9k_num_fixups].slot = slot; -+ ath9k_fixups[ath9k_num_fixups].cal_data = cal_data; -+ ath9k_num_fixups++; -+} -diff -Nur linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.h linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.h ---- linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,6 @@ -+#ifndef _PCI_ATH9K_FIXUP -+#define _PCI_ATH9K_FIXUP -+ -+void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init; -+ -+#endif /* _PCI_ATH9K_FIXUP */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/pci.c linux-4.1.13/arch/mips/ath79/pci.c ---- linux-4.1.13.orig/arch/mips/ath79/pci.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/pci.c 2015-12-04 19:57:05.593998902 +0100 -@@ -13,6 +13,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -25,6 +26,9 @@ - static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; - static unsigned ath79_pci_nr_irqs __initdata; - -+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); -+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); -+ - static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { - { - .slot = 17, -@@ -49,6 +53,15 @@ - } - }; - -+static const struct ath79_pci_irq qca953x_pci_irq_map[] __initconst = { -+ { -+ .bus = 0, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, -+}; -+ - static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = { - { - .bus = 0, -@@ -64,6 +77,21 @@ - }, - }; - -+static const struct ath79_pci_irq qca956x_pci_irq_map[] __initconst = { -+ { -+ .bus = 0, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, -+ { -+ .bus = 1, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(1), -+ }, -+}; -+ - int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) - { - int irq = -1; -@@ -79,9 +107,15 @@ - soc_is_ar9344()) { - ath79_pci_irq_map = ar724x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); -+ } else if (soc_is_qca953x()) { -+ ath79_pci_irq_map = qca953x_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map); - } else if (soc_is_qca955x()) { - ath79_pci_irq_map = qca955x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); -+ } else if (soc_is_qca9561()) { -+ ath79_pci_irq_map = qca956x_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(qca956x_pci_irq_map); - } else { - pr_crit("pci %s: invalid irq map\n", - pci_name((struct pci_dev *) dev)); -@@ -212,12 +246,50 @@ - return pdev; - } - -+static inline bool ar71xx_is_pci_addr(unsigned long port) -+{ -+ unsigned long phys = CPHYSADDR(port); -+ -+ return (phys >= AR71XX_PCI_MEM_BASE && -+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); -+} -+ -+static unsigned long ar71xx_pci_swizzle_b(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; -+} -+ -+static unsigned long ar71xx_pci_swizzle_w(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; -+} -+ -+unsigned long ath79_pci_swizzle_b(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_b) -+ return __ath79_pci_swizzle_b(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_b); -+ -+unsigned long ath79_pci_swizzle_w(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_w) -+ return __ath79_pci_swizzle_w(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_w); -+ - int __init ath79_register_pci(void) - { - struct platform_device *pdev = NULL; - - if (soc_is_ar71xx()) { - pdev = ath79_register_pci_ar71xx(); -+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; -+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; - } else if (soc_is_ar724x()) { - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, -@@ -243,6 +315,15 @@ - AR724X_PCI_MEM_SIZE, - 0, - ATH79_IP2_IRQ(0)); -+ } else if (soc_is_qca9533()) { -+ pdev = ath79_register_pci_ar724x(0, -+ QCA953X_PCI_CFG_BASE0, -+ QCA953X_PCI_CTRL_BASE0, -+ QCA953X_PCI_CRP_BASE0, -+ QCA953X_PCI_MEM_BASE0, -+ QCA953X_PCI_MEM_SIZE, -+ 0, -+ ATH79_IP2_IRQ(0)); - } else if (soc_is_qca9558()) { - pdev = ath79_register_pci_ar724x(0, - QCA955X_PCI_CFG_BASE0, -@@ -261,6 +342,15 @@ - QCA955X_PCI_MEM_SIZE, - 1, - ATH79_IP3_IRQ(2)); -+ } else if (soc_is_qca9561()) { -+ pdev = ath79_register_pci_ar724x(0, -+ QCA956X_PCI_CFG_BASE1, -+ QCA956X_PCI_CTRL_BASE1, -+ QCA956X_PCI_CRP_BASE1, -+ QCA956X_PCI_MEM_BASE1, -+ QCA956X_PCI_MEM_SIZE, -+ 1, -+ ATH79_IP3_IRQ(2)); - } else { - /* No PCI support */ - return -ENODEV; -diff -Nur linux-4.1.13.orig/arch/mips/ath79/prom.c linux-4.1.13/arch/mips/ath79/prom.c ---- linux-4.1.13.orig/arch/mips/ath79/prom.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/prom.c 2015-12-04 19:57:05.482006229 +0100 -@@ -19,12 +19,114 @@ - #include - #include - #include -+#include - - #include "common.h" - -+static char ath79_cmdline_buf[COMMAND_LINE_SIZE] __initdata; -+ -+static void __init ath79_prom_append_cmdline(const char *name, -+ const char *value) -+{ -+ snprintf(ath79_cmdline_buf, sizeof(ath79_cmdline_buf), -+ " %s=%s", name, value); -+ strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); -+} -+ -+#ifdef CONFIG_IMAGE_CMDLINE_HACK -+extern char __image_cmdline[]; -+ -+static int __init ath79_use_image_cmdline(void) -+{ -+ char *p = __image_cmdline; -+ int replace = 0; -+ -+ if (*p == '-') { -+ replace = 1; -+ p++; -+ } -+ -+ if (*p == '\0') -+ return 0; -+ -+ if (replace) { -+ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } else { -+ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); -+ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } -+ -+ /* Validate and setup environment pointer */ -+ if (fw_arg2 < CKSEG0) -+ _fw_envp = NULL; -+ else -+ _fw_envp = (int *)fw_arg2; -+ -+ return 1; -+} -+#else -+static inline int ath79_use_image_cmdline(void) { return 0; } -+#endif -+ -+static int __init ath79_prom_init_myloader(void) -+{ -+ struct myloader_info *mylo; -+ char mac_buf[32]; -+ unsigned char *mac; -+ -+ mylo = myloader_get_info(); -+ if (!mylo) -+ return 0; -+ -+ switch (mylo->did) { -+ case DEVID_COMPEX_WP543: -+ ath79_prom_append_cmdline("board", "WP543"); -+ break; -+ case DEVID_COMPEX_WPE72: -+ ath79_prom_append_cmdline("board", "WPE72"); -+ break; -+ default: -+ pr_warn("prom: unknown device id: %x\n", mylo->did); -+ return 0; -+ } -+ -+ mac = mylo->macs[0]; -+ snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); -+ -+ ath79_prom_append_cmdline("ethaddr", mac_buf); -+ -+ ath79_use_image_cmdline(); -+ -+ return 1; -+} -+ - void __init prom_init(void) - { -- fw_init_cmdline(); -+ const char *env; -+ -+ if (ath79_prom_init_myloader()) -+ return; -+ -+ if (!ath79_use_image_cmdline()) -+ fw_init_cmdline(); -+ -+ env = fw_getenv("ethaddr"); -+ if (env) -+ ath79_prom_append_cmdline("ethaddr", env); -+ -+ env = fw_getenv("board"); -+ if (env) { -+ /* Workaround for buggy bootloaders */ -+ if (strcmp(env, "RouterStation") == 0 || -+ strcmp(env, "Ubiquiti AR71xx-based board") == 0) -+ env = "UBNT-RS"; -+ -+ if (strcmp(env, "RouterStation PRO") == 0) -+ env = "UBNT-RSPRO"; -+ -+ ath79_prom_append_cmdline("board", env); -+ } - - #ifdef CONFIG_BLK_DEV_INITRD - /* Read the initrd address from the firmware environment */ -@@ -34,6 +136,13 @@ - initrd_end = initrd_start + fw_getenvl("initrd_size"); - } - #endif -+ -+ if (strstr(arcs_cmdline, "board=750Gr3") || -+ strstr(arcs_cmdline, "board=951G") || -+ strstr(arcs_cmdline, "board=2011L") || -+ strstr(arcs_cmdline, "board=711Gr100") || -+ strstr(arcs_cmdline, "board=922gs")) -+ ath79_prom_append_cmdline("console", "ttyS0,115200"); - } - - void __init prom_free_prom_memory(void) -diff -Nur linux-4.1.13.orig/arch/mips/ath79/routerboot.c linux-4.1.13/arch/mips/ath79/routerboot.c ---- linux-4.1.13.orig/arch/mips/ath79/routerboot.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/routerboot.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,358 @@ -+/* -+ * RouterBoot helper routines -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define pr_fmt(fmt) "rb: " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "routerboot.h" -+ -+#define RB_BLOCK_SIZE 0x1000 -+#define RB_ART_SIZE 0x10000 -+#define RB_MAGIC_ERD 0x00455244 /* extended radio data */ -+ -+static struct rb_info rb_info; -+ -+static u32 get_u32(void *buf) -+{ -+ u8 *p = buf; -+ -+ return ((u32) p[3] + ((u32) p[2] << 8) + ((u32) p[1] << 16) + -+ ((u32) p[0] << 24)); -+} -+ -+static u16 get_u16(void *buf) -+{ -+ u8 *p = buf; -+ -+ return (u16) p[1] + ((u16) p[0] << 8); -+} -+ -+__init int -+routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard) -+{ -+ u32 magic_ref = hard ? RB_MAGIC_HARD : RB_MAGIC_SOFT; -+ u32 magic; -+ u32 cur = *offset; -+ -+ while (cur < buflen) { -+ magic = get_u32(buf + cur); -+ if (magic == magic_ref) { -+ *offset = cur; -+ return 0; -+ } -+ -+ cur += 0x1000; -+ } -+ -+ return -ENOENT; -+} -+ -+__init int -+routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, -+ u8 **tag_data, u16 *tag_len) -+{ -+ uint32_t magic; -+ bool align = false; -+ int ret; -+ -+ if (buflen < 4) -+ return -EINVAL; -+ -+ magic = get_u32(buf); -+ switch (magic) { -+ case RB_MAGIC_ERD: -+ align = true; -+ /* fall trough */ -+ case RB_MAGIC_HARD: -+ /* skip magic value */ -+ buf += 4; -+ buflen -= 4; -+ break; -+ -+ case RB_MAGIC_SOFT: -+ if (buflen < 8) -+ return -EINVAL; -+ -+ /* skip magic and CRC value */ -+ buf += 8; -+ buflen -= 8; -+ -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ ret = -ENOENT; -+ while (buflen > 2) { -+ u16 id; -+ u16 len; -+ -+ len = get_u16(buf); -+ buf += 2; -+ buflen -= 2; -+ -+ if (buflen < 2) -+ break; -+ -+ id = get_u16(buf); -+ buf += 2; -+ buflen -= 2; -+ -+ if (id == RB_ID_TERMINATOR) -+ break; -+ -+ if (buflen < len) -+ break; -+ -+ if (id == tag_id) { -+ if (tag_len) -+ *tag_len = len; -+ if (tag_data) -+ *tag_data = buf; -+ ret = 0; -+ break; -+ } -+ -+ if (align) -+ len = (len + 3) / 4; -+ -+ buf += len; -+ buflen -= len; -+ } -+ -+ return ret; -+} -+ -+static inline int -+rb_find_hard_cfg_tag(u16 tag_id, u8 **tag_data, u16 *tag_len) -+{ -+ if (!rb_info.hard_cfg_data || -+ !rb_info.hard_cfg_size) -+ return -ENOENT; -+ -+ return routerboot_find_tag(rb_info.hard_cfg_data, -+ rb_info.hard_cfg_size, -+ tag_id, tag_data, tag_len); -+} -+ -+__init const char * -+rb_get_board_name(void) -+{ -+ u16 tag_len; -+ u8 *tag; -+ int err; -+ -+ err = rb_find_hard_cfg_tag(RB_ID_BOARD_NAME, &tag, &tag_len); -+ if (err) -+ return NULL; -+ -+ return tag; -+} -+ -+__init u32 -+rb_get_hw_options(void) -+{ -+ u16 tag_len; -+ u8 *tag; -+ int err; -+ -+ err = rb_find_hard_cfg_tag(RB_ID_HW_OPTIONS, &tag, &tag_len); -+ if (err) -+ return 0; -+ -+ return get_u32(tag); -+} -+ -+static void * __init -+__rb_get_wlan_data(u16 id) -+{ -+ u16 tag_len; -+ u8 *tag; -+ void *buf; -+ int err; -+ u32 magic; -+ size_t src_done; -+ size_t dst_done; -+ -+ err = rb_find_hard_cfg_tag(RB_ID_WLAN_DATA, &tag, &tag_len); -+ if (err) { -+ pr_err("no calibration data found\n"); -+ goto err; -+ } -+ -+ buf = kmalloc(RB_ART_SIZE, GFP_KERNEL); -+ if (buf == NULL) { -+ pr_err("no memory for calibration data\n"); -+ goto err; -+ } -+ -+ magic = get_u32(tag); -+ if (magic == RB_MAGIC_ERD) { -+ u8 *erd_data; -+ u16 erd_len; -+ -+ if (id == 0) -+ goto err_free; -+ -+ err = routerboot_find_tag(tag, tag_len, id, -+ &erd_data, &erd_len); -+ if (err) { -+ pr_err("no ERD data found for id %u\n", id); -+ goto err_free; -+ } -+ -+ dst_done = RB_ART_SIZE; -+ err = lzo1x_decompress_safe(erd_data, erd_len, buf, &dst_done); -+ if (err) { -+ pr_err("unable to decompress calibration data %d\n", -+ err); -+ goto err_free; -+ } -+ } else { -+ if (id != 0) -+ goto err_free; -+ -+ err = rle_decode((char *) tag, tag_len, buf, RB_ART_SIZE, -+ &src_done, &dst_done); -+ if (err) { -+ pr_err("unable to decode calibration data\n"); -+ goto err_free; -+ } -+ } -+ -+ return buf; -+ -+err_free: -+ kfree(buf); -+err: -+ return NULL; -+} -+ -+__init void * -+rb_get_wlan_data(void) -+{ -+ return __rb_get_wlan_data(0); -+} -+ -+__init void * -+rb_get_ext_wlan_data(u16 id) -+{ -+ return __rb_get_wlan_data(id); -+} -+ -+__init const struct rb_info * -+rb_init_info(void *data, unsigned int size) -+{ -+ unsigned int offset; -+ -+ if (size == 0 || (size % RB_BLOCK_SIZE) != 0) -+ return NULL; -+ -+ for (offset = 0; offset < size; offset += RB_BLOCK_SIZE) { -+ u32 magic; -+ -+ magic = get_u32(data + offset); -+ switch (magic) { -+ case RB_MAGIC_HARD: -+ rb_info.hard_cfg_offs = offset; -+ break; -+ -+ case RB_MAGIC_SOFT: -+ rb_info.soft_cfg_offs = offset; -+ break; -+ } -+ } -+ -+ if (!rb_info.hard_cfg_offs) { -+ pr_err("could not find a valid RouterBOOT hard config\n"); -+ return NULL; -+ } -+ -+ if (!rb_info.soft_cfg_offs) { -+ pr_err("could not find a valid RouterBOOT soft config\n"); -+ return NULL; -+ } -+ -+ rb_info.hard_cfg_size = RB_BLOCK_SIZE; -+ rb_info.hard_cfg_data = kmemdup(data + rb_info.hard_cfg_offs, -+ RB_BLOCK_SIZE, GFP_KERNEL); -+ if (!rb_info.hard_cfg_data) -+ return NULL; -+ -+ rb_info.board_name = rb_get_board_name(); -+ rb_info.hw_options = rb_get_hw_options(); -+ -+ return &rb_info; -+} -+ -+static char *rb_ext_wlan_data; -+ -+static ssize_t -+rb_ext_wlan_data_read(struct file *filp, struct kobject *kobj, -+ struct bin_attribute *attr, char *buf, -+ loff_t off, size_t count) -+{ -+ if (off + count > attr->size) -+ return -EFBIG; -+ -+ memcpy(buf, &rb_ext_wlan_data[off], count); -+ -+ return count; -+} -+ -+static const struct bin_attribute rb_ext_wlan_data_attr = { -+ .attr = { -+ .name = "ext_wlan_data", -+ .mode = S_IRUSR | S_IWUSR, -+ }, -+ .read = rb_ext_wlan_data_read, -+ .size = RB_ART_SIZE, -+}; -+ -+static int __init rb_sysfs_init(void) -+{ -+ struct kobject *rb_kobj; -+ int ret; -+ -+ rb_ext_wlan_data = rb_get_ext_wlan_data(1); -+ if (rb_ext_wlan_data == NULL) -+ return -ENOENT; -+ -+ rb_kobj = kobject_create_and_add("routerboot", firmware_kobj); -+ if (rb_kobj == NULL) { -+ ret = -ENOMEM; -+ pr_err("unable to create sysfs entry\n"); -+ goto err_free_wlan_data; -+ } -+ -+ ret = sysfs_create_bin_file(rb_kobj, &rb_ext_wlan_data_attr); -+ if (ret) { -+ pr_err("unable to create sysfs file, %d\n", ret); -+ goto err_put_kobj; -+ } -+ -+ return 0; -+ -+err_put_kobj: -+ kobject_put(rb_kobj); -+err_free_wlan_data: -+ kfree(rb_ext_wlan_data); -+ return ret; -+} -+ -+late_initcall(rb_sysfs_init); -diff -Nur linux-4.1.13.orig/arch/mips/ath79/routerboot.h linux-4.1.13/arch/mips/ath79/routerboot.h ---- linux-4.1.13.orig/arch/mips/ath79/routerboot.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/routerboot.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,63 @@ -+/* -+ * RouterBoot definitions -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _ATH79_ROUTERBOOT_H_ -+#define _ATH79_ROUTERBOOT_H_ -+ -+struct rb_info { -+ unsigned int hard_cfg_offs; -+ unsigned int hard_cfg_size; -+ void *hard_cfg_data; -+ unsigned int soft_cfg_offs; -+ -+ const char *board_name; -+ u32 hw_options; -+}; -+ -+#ifdef CONFIG_ATH79_ROUTERBOOT -+const struct rb_info *rb_init_info(void *data, unsigned int size); -+void *rb_get_wlan_data(void); -+void *rb_get_ext_wlan_data(u16 id); -+ -+int routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, -+ u8 **tag_data, u16 *tag_len); -+int routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard); -+#else -+static inline const struct rb_info * -+rb_init_info(void *data, unsigned int size) -+{ -+ return NULL; -+} -+ -+static inline void *rb_get_wlan_data(void) -+{ -+ return NULL; -+} -+ -+static inline void *rb_get_wlan_data(u16 id) -+{ -+ return NULL; -+} -+ -+static inline int -+routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, -+ u8 **tag_data, u16 *tag_len) -+{ -+ return -ENOENT; -+} -+ -+static inline int -+routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard) -+{ -+ return -ENOENT; -+} -+#endif -+ -+#endif /* _ATH79_ROUTERBOOT_H_ */ -diff -Nur linux-4.1.13.orig/arch/mips/ath79/setup.c linux-4.1.13/arch/mips/ath79/setup.c ---- linux-4.1.13.orig/arch/mips/ath79/setup.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/ath79/setup.c 2015-12-04 19:57:04.482071652 +0100 -@@ -40,6 +40,7 @@ - - static void ath79_restart(char *command) - { -+ local_irq_disable(); - ath79_device_reset_set(AR71XX_RESET_FULL_CHIP); - for (;;) - if (cpu_wait) -@@ -59,6 +60,7 @@ - u32 major; - u32 minor; - u32 rev = 0; -+ u32 ver = 1; - - id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID); - major = id & REV_ID_MAJOR_MASK; -@@ -151,6 +153,17 @@ - rev = id & AR934X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_QCA9533_V2: -+ ver = 2; -+ ath79_soc_rev = 2; -+ /* drop through */ -+ -+ case REV_ID_MAJOR_QCA9533: -+ ath79_soc = ATH79_SOC_QCA9533; -+ chip = "9533"; -+ rev = id & QCA953X_REV_ID_REVISION_MASK; -+ break; -+ - case REV_ID_MAJOR_QCA9556: - ath79_soc = ATH79_SOC_QCA9556; - chip = "9556"; -@@ -163,14 +176,30 @@ - rev = id & QCA955X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_TP9343: -+ ath79_soc = ATH79_SOC_TP9343; -+ chip = "9343"; -+ rev = id & QCA956X_REV_ID_REVISION_MASK; -+ break; -+ -+ case REV_ID_MAJOR_QCA9561: -+ ath79_soc = ATH79_SOC_QCA9561; -+ chip = "9561"; -+ rev = id & QCA956X_REV_ID_REVISION_MASK; -+ break; -+ - default: - panic("ath79: unknown SoC, id:0x%08x", id); - } - -- ath79_soc_rev = rev; -+ if (ver == 1) -+ ath79_soc_rev = rev; - -- if (soc_is_qca955x()) -- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", -+ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561()) -+ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", -+ chip, ver, rev); -+ else if (soc_is_tp9343()) -+ sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u", - chip, rev); - else - sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); -@@ -235,6 +264,8 @@ - mips_hpt_frequency = cpu_clk_rate / 2; - } - -+__setup("board=", mips_machtype_setup); -+ - static int __init ath79_setup(void) - { - ath79_gpio_init(); -diff -Nur linux-4.1.13.orig/arch/mips/fw/lib/cmdline.c linux-4.1.13/arch/mips/fw/lib/cmdline.c ---- linux-4.1.13.orig/arch/mips/fw/lib/cmdline.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/fw/lib/cmdline.c 2015-12-04 19:57:04.014102269 +0100 -@@ -35,6 +35,7 @@ - else - _fw_envp = (int *)fw_arg2; - -+ arcs_cmdline[0] = '\0'; - for (i = 1; i < fw_argc; i++) { - strlcat(arcs_cmdline, fw_argv(i), COMMAND_LINE_SIZE); - if (i < (fw_argc - 1)) -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/checksum.h linux-4.1.13/arch/mips/include/asm/checksum.h ---- linux-4.1.13.orig/arch/mips/include/asm/checksum.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/checksum.h 2015-12-04 19:57:05.913977967 +0100 -@@ -134,26 +134,30 @@ - const unsigned int *stop = word + ihl; - unsigned int csum; - int carry; -+ unsigned int w; - -- csum = word[0]; -- csum += word[1]; -- carry = (csum < word[1]); -+ csum = net_hdr_word(word++); -+ -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[2]; -- carry = (csum < word[2]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[3]; -- carry = (csum < word[3]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- word += 4; - do { -- csum += *word; -- carry = (csum < *word); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; -- word++; - } while (word != stop); - - return csum_fold(csum); -@@ -212,73 +216,6 @@ - return csum_fold(csum_partial(buff, len, 0)); - } - --#define _HAVE_ARCH_IPV6_CSUM --static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, -- const struct in6_addr *daddr, -- __u32 len, unsigned short proto, -- __wsum sum) --{ -- __wsum tmp; -- -- __asm__( -- " .set push # csum_ipv6_magic\n" -- " .set noreorder \n" -- " .set noat \n" -- " addu %0, %5 # proto (long in network byte order)\n" -- " sltu $1, %0, %5 \n" -- " addu %0, $1 \n" -- -- " addu %0, %6 # csum\n" -- " sltu $1, %0, %6 \n" -- " lw %1, 0(%2) # four words source address\n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 0(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " addu %0, $1 # Add final carry\n" -- " .set pop" -- : "=&r" (sum), "=&r" (tmp) -- : "r" (saddr), "r" (daddr), -- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); -- -- return csum_fold(sum); --} -- - #include - #endif /* CONFIG_GENERIC_CSUM */ - -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/fw/myloader/myloader.h linux-4.1.13/arch/mips/include/asm/fw/myloader/myloader.h ---- linux-4.1.13.orig/arch/mips/include/asm/fw/myloader/myloader.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/fw/myloader/myloader.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,34 @@ -+/* -+ * Compex's MyLoader specific definitions -+ * -+ * Copyright (C) 2006-2008 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ * -+ */ -+ -+#ifndef _ASM_MIPS_FW_MYLOADER_H -+#define _ASM_MIPS_FW_MYLOADER_H -+ -+#include -+ -+struct myloader_info { -+ uint32_t vid; -+ uint32_t did; -+ uint32_t svid; -+ uint32_t sdid; -+ uint8_t macs[MYLO_ETHADDR_COUNT][6]; -+}; -+ -+#ifdef CONFIG_MYLOADER -+extern struct myloader_info *myloader_get_info(void) __init; -+#else -+static inline struct myloader_info *myloader_get_info(void) -+{ -+ return NULL; -+} -+#endif /* CONFIG_MYLOADER */ -+ -+#endif /* _ASM_MIPS_FW_MYLOADER_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ag71xx_platform.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ag71xx_platform.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ag71xx_platform.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ag71xx_platform.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,65 @@ -+/* -+ * Atheros AR71xx SoC specific platform data definitions -+ * -+ * Copyright (C) 2008-2012 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_PLATFORM_H -+#define __ASM_MACH_ATH79_PLATFORM_H -+ -+#include -+#include -+#include -+#include -+ -+struct ag71xx_switch_platform_data { -+ u8 phy4_mii_en:1; -+ u8 phy_poll_mask; -+}; -+ -+struct ag71xx_platform_data { -+ phy_interface_t phy_if_mode; -+ u32 phy_mask; -+ int speed; -+ int duplex; -+ u32 reset_bit; -+ u8 mac_addr[ETH_ALEN]; -+ struct device *mii_bus_dev; -+ -+ u8 has_gbit:1; -+ u8 is_ar91xx:1; -+ u8 is_ar7240:1; -+ u8 is_ar724x:1; -+ u8 has_ar8216:1; -+ -+ struct ag71xx_switch_platform_data *switch_data; -+ -+ void (*ddr_flush)(void); -+ void (*set_speed)(int speed); -+ -+ u32 fifo_cfg1; -+ u32 fifo_cfg2; -+ u32 fifo_cfg3; -+ -+ unsigned int max_frame_len; -+ unsigned int desc_pktlen_mask; -+}; -+ -+struct ag71xx_mdio_platform_data { -+ u32 phy_mask; -+ u8 builtin_switch:1; -+ u8 is_ar7240:1; -+ u8 is_ar9330:1; -+ u8 is_ar934x:1; -+ unsigned long mdio_clock; -+ unsigned long ref_clock; -+ -+ void (*reset)(struct mii_bus *bus); -+}; -+ -+#endif /* __ASM_MACH_ATH79_PLATFORM_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-12-04 19:57:05.893979276 +0100 -@@ -20,6 +20,10 @@ - #include - - #define AR71XX_APB_BASE 0x18000000 -+#define AR71XX_GE0_BASE 0x19000000 -+#define AR71XX_GE0_SIZE 0x10000 -+#define AR71XX_GE1_BASE 0x1a000000 -+#define AR71XX_GE1_SIZE 0x10000 - #define AR71XX_EHCI_BASE 0x1b000000 - #define AR71XX_EHCI_SIZE 0x1000 - #define AR71XX_OHCI_BASE 0x1c000000 -@@ -39,6 +43,8 @@ - #define AR71XX_PLL_SIZE 0x100 - #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) - #define AR71XX_RESET_SIZE 0x100 -+#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR71XX_MII_SIZE 0x100 - - #define AR71XX_PCI_MEM_BASE 0x10000000 - #define AR71XX_PCI_MEM_SIZE 0x07000000 -@@ -81,18 +87,39 @@ - - #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) - #define AR933X_UART_SIZE 0x14 -+#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR933X_GMAC_SIZE 0x04 - #define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR933X_WMAC_SIZE 0x20000 - #define AR933X_EHCI_BASE 0x1b000000 - #define AR933X_EHCI_SIZE 0x1000 - -+#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR934X_GMAC_SIZE 0x14 - #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR934X_WMAC_SIZE 0x20000 - #define AR934X_EHCI_BASE 0x1b000000 - #define AR934X_EHCI_SIZE 0x200 -+#define AR934X_NFC_BASE 0x1b000200 -+#define AR934X_NFC_SIZE 0xb8 - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 - -+#define QCA953X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA953X_GMAC_SIZE 0x14 -+#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -+#define QCA953X_WMAC_SIZE 0x20000 -+#define QCA953X_EHCI_BASE 0x1b000000 -+#define QCA953X_EHCI_SIZE 0x200 -+#define QCA953X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) -+#define QCA953X_SRIF_SIZE 0x1000 -+ -+#define QCA953X_PCI_CFG_BASE0 0x14000000 -+#define QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) -+#define QCA953X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) -+#define QCA953X_PCI_MEM_BASE0 0x10000000 -+#define QCA953X_PCI_MEM_SIZE 0x02000000 -+ - #define QCA955X_PCI_MEM_BASE0 0x10000000 - #define QCA955X_PCI_MEM_BASE1 0x12000000 - #define QCA955X_PCI_MEM_SIZE 0x02000000 -@@ -106,11 +133,40 @@ - #define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) - #define QCA955X_PCI_CTRL_SIZE 0x100 - -+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA955X_GMAC_SIZE 0x40 - #define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define QCA955X_WMAC_SIZE 0x20000 - #define QCA955X_EHCI0_BASE 0x1b000000 - #define QCA955X_EHCI1_BASE 0x1b400000 - #define QCA955X_EHCI_SIZE 0x1000 -+#define QCA955X_NFC_BASE 0x1b800200 -+#define QCA955X_NFC_SIZE 0xb8 -+ -+#define QCA956X_PCI_MEM_BASE1 0x12000000 -+#define QCA956X_PCI_MEM_SIZE 0x02000000 -+#define QCA956X_PCI_CFG_BASE1 0x16000000 -+#define QCA956X_PCI_CFG_SIZE 0x1000 -+#define QCA956X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000) -+#define QCA956X_PCI_CRP_SIZE 0x1000 -+#define QCA956X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) -+#define QCA956X_PCI_CTRL_SIZE 0x100 -+ -+#define QCA956X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -+#define QCA956X_WMAC_SIZE 0x20000 -+#define QCA956X_EHCI0_BASE 0x1b000000 -+#define QCA956X_EHCI1_BASE 0x1b400000 -+#define QCA956X_EHCI_SIZE 0x200 -+#define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA956X_GMAC_SIZE 0x64 -+ -+#define AR9300_OTP_BASE 0x14000 -+#define AR9300_OTP_STATUS 0x15f18 -+#define AR9300_OTP_STATUS_TYPE 0x7 -+#define AR9300_OTP_STATUS_VALID 0x4 -+#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 -+#define AR9300_OTP_STATUS_SM_BUSY 0x1 -+#define AR9300_OTP_READ_DATA 0x15f1c - - /* - * DDR_CTRL block -@@ -149,6 +205,12 @@ - #define AR934X_DDR_REG_FLUSH_PCIE 0xa8 - #define AR934X_DDR_REG_FLUSH_WMAC 0xac - -+#define QCA953X_DDR_REG_FLUSH_GE0 0x9c -+#define QCA953X_DDR_REG_FLUSH_GE1 0xa0 -+#define QCA953X_DDR_REG_FLUSH_USB 0xa4 -+#define QCA953X_DDR_REG_FLUSH_PCIE 0xa8 -+#define QCA953X_DDR_REG_FLUSH_WMAC 0xac -+ - /* - * PLL block - */ -@@ -166,6 +228,9 @@ - #define AR71XX_AHB_DIV_SHIFT 20 - #define AR71XX_AHB_DIV_MASK 0x7 - -+#define AR71XX_ETH0_PLL_SHIFT 17 -+#define AR71XX_ETH1_PLL_SHIFT 19 -+ - #define AR724X_PLL_REG_CPU_CONFIG 0x00 - #define AR724X_PLL_REG_PCIE_CONFIG 0x18 - -@@ -178,6 +243,8 @@ - #define AR724X_DDR_DIV_SHIFT 22 - #define AR724X_DDR_DIV_MASK 0x3 - -+#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c -+ - #define AR913X_PLL_REG_CPU_CONFIG 0x00 - #define AR913X_PLL_REG_ETH_CONFIG 0x04 - #define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14 -@@ -190,6 +257,9 @@ - #define AR913X_AHB_DIV_SHIFT 19 - #define AR913X_AHB_DIV_MASK 0x1 - -+#define AR913X_ETH0_PLL_SHIFT 20 -+#define AR913X_ETH1_PLL_SHIFT 22 -+ - #define AR933X_PLL_CPU_CONFIG_REG 0x00 - #define AR933X_PLL_CLOCK_CTRL_REG 0x08 - -@@ -211,6 +281,8 @@ - #define AR934X_PLL_CPU_CONFIG_REG 0x00 - #define AR934X_PLL_DDR_CONFIG_REG 0x04 - #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 -+#define AR934X_PLL_ETH_XMII_CONTROL_REG 0x2c - - #define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 - #define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -@@ -243,9 +315,51 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) -+ -+#define QCA953X_PLL_CPU_CONFIG_REG 0x00 -+#define QCA953X_PLL_DDR_CONFIG_REG 0x04 -+#define QCA953X_PLL_CLK_CTRL_REG 0x08 -+#define QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 -+#define QCA953X_PLL_ETH_XMII_CONTROL_REG 0x2c -+#define QCA953X_PLL_ETH_SGMII_CONTROL_REG 0x48 -+ -+#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -+#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -+#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT 6 -+#define QCA953X_PLL_CPU_CONFIG_NINT_MASK 0x3f -+#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -+#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -+#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -+#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -+#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -+#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT 10 -+#define QCA953X_PLL_DDR_CONFIG_NINT_MASK 0x3f -+#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -+#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -+#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -+#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -+#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -+#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -+#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -+#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -+#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -+#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -+#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -+#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -+#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -+#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -+#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) -+ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -+#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 -+#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 - - #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 - #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -@@ -278,6 +392,49 @@ - #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) - #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define QCA956X_PLL_CPU_CONFIG_REG 0x00 -+#define QCA956X_PLL_CPU_CONFIG1_REG 0x04 -+#define QCA956X_PLL_DDR_CONFIG_REG 0x08 -+#define QCA956X_PLL_DDR_CONFIG1_REG 0x0c -+#define QCA956X_PLL_CLK_CTRL_REG 0x10 -+ -+#define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -+#define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -+#define QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -+#define QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT 0 -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK 0x1f -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT 5 -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x1fff -+#define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT 18 -+#define QCA956X_PLL_CPU_CONFIG1_NINT_MASK 0x1ff -+ -+#define QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -+#define QCA956X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -+#define QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -+#define QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT 0 -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK 0x1f -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT 5 -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x1fff -+#define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT 18 -+#define QCA956X_PLL_DDR_CONFIG1_NINT_MASK 0x1ff -+ -+#define QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -+#define QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -+#define QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -+#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -+#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -+#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -+#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -+#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -+#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -+#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL BIT(20) -+#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) -+#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) -+ - /* - * USB_CONFIG block - */ -@@ -317,10 +474,19 @@ - #define AR934X_RESET_REG_BOOTSTRAP 0xb0 - #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac - -+#define QCA953X_RESET_REG_RESET_MODULE 0x1c -+#define QCA953X_RESET_REG_BOOTSTRAP 0xb0 -+#define QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac -+ - #define QCA955X_RESET_REG_RESET_MODULE 0x1c - #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 - #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac - -+#define QCA956X_RESET_REG_RESET_MODULE 0x1c -+#define QCA956X_RESET_REG_BOOTSTRAP 0xb0 -+#define QCA956X_RESET_REG_EXT_INT_STATUS 0xac -+ -+#define MISC_INT_MIPS_SI_TIMERINT_MASK BIT(28) - #define MISC_INT_ETHSW BIT(12) - #define MISC_INT_TIMER4 BIT(10) - #define MISC_INT_TIMER3 BIT(9) -@@ -370,16 +536,104 @@ - #define AR913X_RESET_USB_HOST BIT(5) - #define AR913X_RESET_USB_PHY BIT(4) - -+#define AR933X_RESET_GE1_MDIO BIT(23) -+#define AR933X_RESET_GE0_MDIO BIT(22) -+#define AR933X_RESET_GE1_MAC BIT(13) - #define AR933X_RESET_WMAC BIT(11) -+#define AR933X_RESET_GE0_MAC BIT(9) - #define AR933X_RESET_USB_HOST BIT(5) - #define AR933X_RESET_USB_PHY BIT(4) - #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) - -+#define AR934X_RESET_HOST BIT(31) -+#define AR934X_RESET_SLIC BIT(30) -+#define AR934X_RESET_HDMA BIT(29) -+#define AR934X_RESET_EXTERNAL BIT(28) -+#define AR934X_RESET_RTC BIT(27) -+#define AR934X_RESET_PCIE_EP_INT BIT(26) -+#define AR934X_RESET_CHKSUM_ACC BIT(25) -+#define AR934X_RESET_FULL_CHIP BIT(24) -+#define AR934X_RESET_GE1_MDIO BIT(23) -+#define AR934X_RESET_GE0_MDIO BIT(22) -+#define AR934X_RESET_CPU_NMI BIT(21) -+#define AR934X_RESET_CPU_COLD BIT(20) -+#define AR934X_RESET_HOST_RESET_INT BIT(19) -+#define AR934X_RESET_PCIE_EP BIT(18) -+#define AR934X_RESET_UART1 BIT(17) -+#define AR934X_RESET_DDR BIT(16) -+#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define AR934X_RESET_NANDF BIT(14) -+#define AR934X_RESET_GE1_MAC BIT(13) -+#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) - #define AR934X_RESET_USB_PHY_ANALOG BIT(11) -+#define AR934X_RESET_HOST_DMA_INT BIT(10) -+#define AR934X_RESET_GE0_MAC BIT(9) -+#define AR934X_RESET_ETH_SWITCH BIT(8) -+#define AR934X_RESET_PCIE_PHY BIT(7) -+#define AR934X_RESET_PCIE BIT(6) - #define AR934X_RESET_USB_HOST BIT(5) - #define AR934X_RESET_USB_PHY BIT(4) - #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) -+#define AR934X_RESET_LUT BIT(2) -+#define AR934X_RESET_MBOX BIT(1) -+#define AR934X_RESET_I2S BIT(0) -+ -+#define QCA953X_RESET_USB_EXT_PWR BIT(29) -+#define QCA953X_RESET_EXTERNAL BIT(28) -+#define QCA953X_RESET_RTC BIT(27) -+#define QCA953X_RESET_FULL_CHIP BIT(24) -+#define QCA953X_RESET_GE1_MDIO BIT(23) -+#define QCA953X_RESET_GE0_MDIO BIT(22) -+#define QCA953X_RESET_CPU_NMI BIT(21) -+#define QCA953X_RESET_CPU_COLD BIT(20) -+#define QCA953X_RESET_DDR BIT(16) -+#define QCA953X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define QCA953X_RESET_GE1_MAC BIT(13) -+#define QCA953X_RESET_ETH_SWITCH_ANALOG BIT(12) -+#define QCA953X_RESET_USB_PHY_ANALOG BIT(11) -+#define QCA953X_RESET_GE0_MAC BIT(9) -+#define QCA953X_RESET_ETH_SWITCH BIT(8) -+#define QCA953X_RESET_PCIE_PHY BIT(7) -+#define QCA953X_RESET_PCIE BIT(6) -+#define QCA953X_RESET_USB_HOST BIT(5) -+#define QCA953X_RESET_USB_PHY BIT(4) -+#define QCA953X_RESET_USBSUS_OVERRIDE BIT(3) -+ -+#define QCA955X_RESET_HOST BIT(31) -+#define QCA955X_RESET_SLIC BIT(30) -+#define QCA955X_RESET_HDMA BIT(29) -+#define QCA955X_RESET_EXTERNAL BIT(28) -+#define QCA955X_RESET_RTC BIT(27) -+#define QCA955X_RESET_PCIE_EP_INT BIT(26) -+#define QCA955X_RESET_CHKSUM_ACC BIT(25) -+#define QCA955X_RESET_FULL_CHIP BIT(24) -+#define QCA955X_RESET_GE1_MDIO BIT(23) -+#define QCA955X_RESET_GE0_MDIO BIT(22) -+#define QCA955X_RESET_CPU_NMI BIT(21) -+#define QCA955X_RESET_CPU_COLD BIT(20) -+#define QCA955X_RESET_HOST_RESET_INT BIT(19) -+#define QCA955X_RESET_PCIE_EP BIT(18) -+#define QCA955X_RESET_UART1 BIT(17) -+#define QCA955X_RESET_DDR BIT(16) -+#define QCA955X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define QCA955X_RESET_NANDF BIT(14) -+#define QCA955X_RESET_GE1_MAC BIT(13) -+#define QCA955X_RESET_SGMII_ANALOG BIT(12) -+#define QCA955X_RESET_USB_PHY_ANALOG BIT(11) -+#define QCA955X_RESET_HOST_DMA_INT BIT(10) -+#define QCA955X_RESET_GE0_MAC BIT(9) -+#define QCA955X_RESET_SGMII BIT(8) -+#define QCA955X_RESET_PCIE_PHY BIT(7) -+#define QCA955X_RESET_PCIE BIT(6) -+#define QCA955X_RESET_USB_HOST BIT(5) -+#define QCA955X_RESET_USB_PHY BIT(4) -+#define QCA955X_RESET_USBSUS_OVERRIDE BIT(3) -+#define QCA955X_RESET_LUT BIT(2) -+#define QCA955X_RESET_MBOX BIT(1) -+#define QCA955X_RESET_I2S BIT(0) - -+#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) -+#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) - #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - - #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -398,8 +652,17 @@ - #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) - #define AR934X_BOOTSTRAP_DDR1 BIT(0) - -+#define QCA953X_BOOTSTRAP_SW_OPTION2 BIT(12) -+#define QCA953X_BOOTSTRAP_SW_OPTION1 BIT(11) -+#define QCA953X_BOOTSTRAP_EJTAG_MODE BIT(5) -+#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4) -+#define QCA953X_BOOTSTRAP_SDRAM_DISABLED BIT(1) -+#define QCA953X_BOOTSTRAP_DDR1 BIT(0) -+ - #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) - -+#define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) -+ - #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) - #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) - #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -@@ -418,6 +681,24 @@ - AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC3) - -+#define QCA953X_PCIE_WMAC_INT_WMAC_MISC BIT(0) -+#define QCA953X_PCIE_WMAC_INT_WMAC_TX BIT(1) -+#define QCA953X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -+#define QCA953X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC BIT(4) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) -+#define QCA953X_PCIE_WMAC_INT_WMAC_ALL \ -+ (QCA953X_PCIE_WMAC_INT_WMAC_MISC | QCA953X_PCIE_WMAC_INT_WMAC_TX | \ -+ QCA953X_PCIE_WMAC_INT_WMAC_RXLP | QCA953X_PCIE_WMAC_INT_WMAC_RXHP) -+ -+#define QCA953X_PCIE_WMAC_INT_PCIE_ALL \ -+ (QCA953X_PCIE_WMAC_INT_PCIE_RC | QCA953X_PCIE_WMAC_INT_PCIE_RC0 | \ -+ QCA953X_PCIE_WMAC_INT_PCIE_RC1 | QCA953X_PCIE_WMAC_INT_PCIE_RC2 | \ -+ QCA953X_PCIE_WMAC_INT_PCIE_RC3) -+ - #define QCA955X_EXT_INT_WMAC_MISC BIT(0) - #define QCA955X_EXT_INT_WMAC_TX BIT(1) - #define QCA955X_EXT_INT_WMAC_RXLP BIT(2) -@@ -449,6 +730,37 @@ - QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ - QCA955X_EXT_INT_PCIE_RC2_INT3) - -+#define QCA956X_EXT_INT_WMAC_MISC BIT(0) -+#define QCA956X_EXT_INT_WMAC_TX BIT(1) -+#define QCA956X_EXT_INT_WMAC_RXLP BIT(2) -+#define QCA956X_EXT_INT_WMAC_RXHP BIT(3) -+#define QCA956X_EXT_INT_PCIE_RC1 BIT(4) -+#define QCA956X_EXT_INT_PCIE_RC1_INT0 BIT(5) -+#define QCA956X_EXT_INT_PCIE_RC1_INT1 BIT(6) -+#define QCA956X_EXT_INT_PCIE_RC1_INT2 BIT(7) -+#define QCA956X_EXT_INT_PCIE_RC1_INT3 BIT(8) -+#define QCA956X_EXT_INT_PCIE_RC2 BIT(12) -+#define QCA956X_EXT_INT_PCIE_RC2_INT0 BIT(13) -+#define QCA956X_EXT_INT_PCIE_RC2_INT1 BIT(14) -+#define QCA956X_EXT_INT_PCIE_RC2_INT2 BIT(15) -+#define QCA956X_EXT_INT_PCIE_RC2_INT3 BIT(16) -+#define QCA956X_EXT_INT_USB1 BIT(24) -+#define QCA956X_EXT_INT_USB2 BIT(28) -+ -+#define QCA956X_EXT_INT_WMAC_ALL \ -+ (QCA956X_EXT_INT_WMAC_MISC | QCA956X_EXT_INT_WMAC_TX | \ -+ QCA956X_EXT_INT_WMAC_RXLP | QCA956X_EXT_INT_WMAC_RXHP) -+ -+#define QCA956X_EXT_INT_PCIE_RC1_ALL \ -+ (QCA956X_EXT_INT_PCIE_RC1 | QCA956X_EXT_INT_PCIE_RC1_INT0 | \ -+ QCA956X_EXT_INT_PCIE_RC1_INT1 | QCA956X_EXT_INT_PCIE_RC1_INT2 | \ -+ QCA956X_EXT_INT_PCIE_RC1_INT3) -+ -+#define QCA956X_EXT_INT_PCIE_RC2_ALL \ -+ (QCA956X_EXT_INT_PCIE_RC2 | QCA956X_EXT_INT_PCIE_RC2_INT0 | \ -+ QCA956X_EXT_INT_PCIE_RC2_INT1 | QCA956X_EXT_INT_PCIE_RC2_INT2 | \ -+ QCA956X_EXT_INT_PCIE_RC2_INT3) -+ - #define REV_ID_MAJOR_MASK 0xfff0 - #define REV_ID_MAJOR_AR71XX 0x00a0 - #define REV_ID_MAJOR_AR913X 0x00b0 -@@ -460,8 +772,12 @@ - #define REV_ID_MAJOR_AR9341 0x0120 - #define REV_ID_MAJOR_AR9342 0x1120 - #define REV_ID_MAJOR_AR9344 0x2120 -+#define REV_ID_MAJOR_QCA9533 0x0140 -+#define REV_ID_MAJOR_QCA9533_V2 0x0160 - #define REV_ID_MAJOR_QCA9556 0x0130 - #define REV_ID_MAJOR_QCA9558 0x1130 -+#define REV_ID_MAJOR_TP9343 0x0150 -+#define REV_ID_MAJOR_QCA9561 0x1150 - - #define AR71XX_REV_ID_MINOR_MASK 0x3 - #define AR71XX_REV_ID_MINOR_AR7130 0x0 -@@ -482,8 +798,12 @@ - - #define AR934X_REV_ID_REVISION_MASK 0xf - -+#define QCA953X_REV_ID_REVISION_MASK 0xf -+ - #define QCA955X_REV_ID_REVISION_MASK 0xf - -+#define QCA956X_REV_ID_REVISION_MASK 0xf -+ - /* - * SPI block - */ -@@ -520,16 +840,65 @@ - #define AR71XX_GPIO_REG_INT_PENDING 0x20 - #define AR71XX_GPIO_REG_INT_ENABLE 0x24 - #define AR71XX_GPIO_REG_FUNC 0x28 -+#define AR71XX_GPIO_REG_FUNC_2 0x30 - -+#define AR934X_GPIO_REG_OUT_FUNC0 0x2c -+#define AR934X_GPIO_REG_OUT_FUNC1 0x30 -+#define AR934X_GPIO_REG_OUT_FUNC2 0x34 -+#define AR934X_GPIO_REG_OUT_FUNC3 0x38 -+#define AR934X_GPIO_REG_OUT_FUNC4 0x3c -+#define AR934X_GPIO_REG_OUT_FUNC5 0x40 - #define AR934X_GPIO_REG_FUNC 0x6c - -+#define QCA953X_GPIO_REG_OUT_FUNC0 0x2c -+#define QCA953X_GPIO_REG_OUT_FUNC1 0x30 -+#define QCA953X_GPIO_REG_OUT_FUNC2 0x34 -+#define QCA953X_GPIO_REG_OUT_FUNC3 0x38 -+#define QCA953X_GPIO_REG_OUT_FUNC4 0x3c -+#define QCA953X_GPIO_REG_IN_ENABLE0 0x44 -+#define QCA953X_GPIO_REG_FUNC 0x6c -+ -+#define QCA953X_GPIO_OUT_MUX_SPI_CS1 10 -+#define QCA953X_GPIO_OUT_MUX_SPI_CS2 11 -+#define QCA953X_GPIO_OUT_MUX_SPI_CS0 9 -+#define QCA953X_GPIO_OUT_MUX_SPI_CLK 8 -+#define QCA953X_GPIO_OUT_MUX_SPI_MOSI 12 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK1 41 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK2 42 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK3 43 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK4 44 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK5 45 -+ -+#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c -+#define QCA955X_GPIO_REG_OUT_FUNC1 0x30 -+#define QCA955X_GPIO_REG_OUT_FUNC2 0x34 -+#define QCA955X_GPIO_REG_OUT_FUNC3 0x38 -+#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c -+#define QCA955X_GPIO_REG_OUT_FUNC5 0x40 -+#define QCA955X_GPIO_REG_FUNC 0x6c -+ -+#define QCA956X_GPIO_REG_OUT_FUNC0 0x2c -+#define QCA956X_GPIO_REG_OUT_FUNC1 0x30 -+#define QCA956X_GPIO_REG_OUT_FUNC2 0x34 -+#define QCA956X_GPIO_REG_OUT_FUNC3 0x38 -+#define QCA956X_GPIO_REG_OUT_FUNC4 0x3c -+#define QCA956X_GPIO_REG_OUT_FUNC5 0x40 -+#define QCA956X_GPIO_REG_IN_ENABLE0 0x44 -+#define QCA956X_GPIO_REG_IN_ENABLE3 0x50 -+#define QCA956X_GPIO_REG_FUNC 0x6c -+ -+#define QCA956X_GPIO_OUT_MUX_GE0_MDO 32 -+#define QCA956X_GPIO_OUT_MUX_GE0_MDC 33 -+ - #define AR71XX_GPIO_COUNT 16 - #define AR7240_GPIO_COUNT 18 - #define AR7241_GPIO_COUNT 20 - #define AR913X_GPIO_COUNT 22 - #define AR933X_GPIO_COUNT 30 - #define AR934X_GPIO_COUNT 23 -+#define QCA953X_GPIO_COUNT 18 - #define QCA955X_GPIO_COUNT 24 -+#define QCA956X_GPIO_COUNT 23 - - /* - * SRIF block -@@ -552,4 +921,185 @@ - #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 - #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 - -+#define QCA953X_SRIF_CPU_DPLL1_REG 0x1c0 -+#define QCA953X_SRIF_CPU_DPLL2_REG 0x1c4 -+#define QCA953X_SRIF_CPU_DPLL3_REG 0x1c8 -+ -+#define QCA953X_SRIF_DDR_DPLL1_REG 0x240 -+#define QCA953X_SRIF_DDR_DPLL2_REG 0x244 -+#define QCA953X_SRIF_DDR_DPLL3_REG 0x248 -+ -+#define QCA953X_SRIF_DPLL1_REFDIV_SHIFT 27 -+#define QCA953X_SRIF_DPLL1_REFDIV_MASK 0x1f -+#define QCA953X_SRIF_DPLL1_NINT_SHIFT 18 -+#define QCA953X_SRIF_DPLL1_NINT_MASK 0x1ff -+#define QCA953X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff -+ -+#define QCA953X_SRIF_DPLL2_LOCAL_PLL BIT(30) -+#define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT 13 -+#define QCA953X_SRIF_DPLL2_OUTDIV_MASK 0x7 -+ -+#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) -+#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) -+#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) -+#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12) -+#define AR71XX_GPIO_FUNC_UART_EN BIT(8) -+#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4) -+#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0) -+ -+#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19) -+#define AR724X_GPIO_FUNC_SPI_EN BIT(18) -+#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -+#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -+#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12) -+#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11) -+#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10) -+#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9) -+#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -+#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -+#define AR724X_GPIO_FUNC_UART_EN BIT(1) -+#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) -+ -+#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9) -+ -+#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) -+#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) -+#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) -+#define AR913X_GPIO_FUNC_I2S_MCKEN BIT(19) -+#define AR913X_GPIO_FUNC_I2S1_EN BIT(18) -+#define AR913X_GPIO_FUNC_I2S0_EN BIT(17) -+#define AR913X_GPIO_FUNC_SLIC_EN BIT(16) -+#define AR913X_GPIO_FUNC_UART_RTSCTS_EN BIT(9) -+#define AR913X_GPIO_FUNC_UART_EN BIT(8) -+#define AR913X_GPIO_FUNC_USB_CLK_EN BIT(4) -+ -+#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) -+#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) -+#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) -+#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) -+#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) -+#define AR933X_GPIO_FUNC_SPI_EN BIT(18) -+#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -+#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -+#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -+#define AR933X_GPIO_FUNC_UART_EN BIT(1) -+#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) -+ -+#define AR934X_GPIO_FUNC_CLK_OBS7_EN BIT(9) -+#define AR934X_GPIO_FUNC_CLK_OBS6_EN BIT(8) -+#define AR934X_GPIO_FUNC_CLK_OBS5_EN BIT(7) -+#define AR934X_GPIO_FUNC_CLK_OBS4_EN BIT(6) -+#define AR934X_GPIO_FUNC_CLK_OBS3_EN BIT(5) -+#define AR934X_GPIO_FUNC_CLK_OBS2_EN BIT(4) -+#define AR934X_GPIO_FUNC_CLK_OBS1_EN BIT(3) -+#define AR934X_GPIO_FUNC_CLK_OBS0_EN BIT(2) -+#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1) -+ -+#define AR934X_GPIO_OUT_GPIO 0 -+#define AR934X_GPIO_OUT_SPI_CS1 7 -+#define AR934X_GPIO_OUT_LED_LINK0 41 -+#define AR934X_GPIO_OUT_LED_LINK1 42 -+#define AR934X_GPIO_OUT_LED_LINK2 43 -+#define AR934X_GPIO_OUT_LED_LINK3 44 -+#define AR934X_GPIO_OUT_LED_LINK4 45 -+#define AR934X_GPIO_OUT_EXT_LNA0 46 -+#define AR934X_GPIO_OUT_EXT_LNA1 47 -+ -+#define QCA955X_GPIO_OUT_GPIO 0 -+ -+/* -+ * MII_CTRL block -+ */ -+#define AR71XX_MII_REG_MII0_CTRL 0x00 -+#define AR71XX_MII_REG_MII1_CTRL 0x04 -+ -+#define AR71XX_MII_CTRL_IF_MASK 3 -+#define AR71XX_MII_CTRL_SPEED_SHIFT 4 -+#define AR71XX_MII_CTRL_SPEED_MASK 3 -+#define AR71XX_MII_CTRL_SPEED_10 0 -+#define AR71XX_MII_CTRL_SPEED_100 1 -+#define AR71XX_MII_CTRL_SPEED_1000 2 -+ -+#define AR71XX_MII0_CTRL_IF_GMII 0 -+#define AR71XX_MII0_CTRL_IF_MII 1 -+#define AR71XX_MII0_CTRL_IF_RGMII 2 -+#define AR71XX_MII0_CTRL_IF_RMII 3 -+ -+#define AR71XX_MII1_CTRL_IF_RGMII 0 -+#define AR71XX_MII1_CTRL_IF_RMII 1 -+ -+/* -+ * AR933X GMAC interface -+ */ -+#define AR933X_GMAC_REG_ETH_CFG 0x00 -+ -+#define AR933X_ETH_CFG_RGMII_GE0 BIT(0) -+#define AR933X_ETH_CFG_MII_GE0 BIT(1) -+#define AR933X_ETH_CFG_GMII_GE0 BIT(2) -+#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3) -+#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4) -+#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5) -+#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8) -+#define AR933X_ETH_CFG_RMII_GE0 BIT(9) -+#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 -+#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10) -+ -+/* -+ * AR934X GMAC Interface -+ */ -+#define AR934X_GMAC_REG_ETH_CFG 0x00 -+ -+#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0) -+#define AR934X_ETH_CFG_MII_GMAC0 BIT(1) -+#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2) -+#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3) -+#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4) -+#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5) -+#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6) -+#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9) -+#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10) -+#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11) -+#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12) -+#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) -+#define AR934X_ETH_CFG_RXD_DELAY BIT(14) -+#define AR934X_ETH_CFG_RXD_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_RXD_DELAY_SHIFT 14 -+#define AR934X_ETH_CFG_RDV_DELAY BIT(16) -+#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 -+ -+/* -+ * QCA953X GMAC Interface -+ */ -+#define QCA953X_GMAC_REG_ETH_CFG 0x00 -+ -+#define QCA953X_ETH_CFG_SW_ONLY_MODE BIT(6) -+#define QCA953X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define QCA953X_ETH_CFG_SW_APB_ACCESS BIT(9) -+#define QCA953X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) -+ -+/* -+ * QCA955X GMAC Interface -+ */ -+ -+#define QCA955X_GMAC_REG_ETH_CFG 0x00 -+ -+#define QCA955X_ETH_CFG_RGMII_EN BIT(0) -+#define QCA955X_ETH_CFG_GE0_SGMII BIT(6) -+ - #endif /* __ASM_MACH_AR71XX_REGS_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79.h 2015-12-04 19:57:04.482071652 +0100 -@@ -32,8 +32,11 @@ - ATH79_SOC_AR9341, - ATH79_SOC_AR9342, - ATH79_SOC_AR9344, -+ ATH79_SOC_QCA9533, - ATH79_SOC_QCA9556, - ATH79_SOC_QCA9558, -+ ATH79_SOC_TP9343, -+ ATH79_SOC_QCA9561, - }; - - extern enum ath79_soc_type ath79_soc; -@@ -100,6 +103,16 @@ - return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); - } - -+static inline int soc_is_qca9533(void) -+{ -+ return ath79_soc == ATH79_SOC_QCA9533; -+} -+ -+static inline int soc_is_qca953x(void) -+{ -+ return soc_is_qca9533(); -+} -+ - static inline int soc_is_qca9556(void) - { - return ath79_soc == ATH79_SOC_QCA9556; -@@ -115,7 +128,23 @@ - return soc_is_qca9556() || soc_is_qca9558(); - } - -+static inline int soc_is_tp9343(void) -+{ -+ return ath79_soc == ATH79_SOC_TP9343; -+} -+ -+static inline int soc_is_qca9561(void) -+{ -+ return ath79_soc == ATH79_SOC_QCA9561; -+} -+ -+static inline int soc_is_qca956x(void) -+{ -+ return soc_is_tp9343() || soc_is_qca9561(); -+} -+ - extern void __iomem *ath79_ddr_base; -+extern void __iomem *ath79_gpio_base; - extern void __iomem *ath79_pll_base; - extern void __iomem *ath79_reset_base; - -@@ -132,6 +161,7 @@ - static inline void ath79_reset_wr(unsigned reg, u32 val) - { - __raw_writel(val, ath79_reset_base + reg); -+ (void) __raw_readl(ath79_reset_base + reg); /* flush */ - } - - static inline u32 ath79_reset_rr(unsigned reg) -@@ -141,5 +171,9 @@ - - void ath79_device_reset_set(u32 mask); - void ath79_device_reset_clear(u32 mask); -+u32 ath79_device_reset_get(u32 mask); -+ -+void ath79_flash_acquire(void); -+void ath79_flash_release(void); - - #endif /* __ASM_MACH_ATH79_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h 2015-12-04 19:57:03.962105671 +0100 -@@ -16,8 +16,15 @@ - unsigned num_chipselect; - }; - -+enum ath79_spi_cs_type { -+ ATH79_SPI_CS_TYPE_INTERNAL, -+ ATH79_SPI_CS_TYPE_GPIO, -+}; -+ - struct ath79_spi_controller_data { -- unsigned gpio; -+ enum ath79_spi_cs_type cs_type; -+ unsigned cs_line; -+ bool is_flash; - }; - - #endif /* _ATH79_SPI_PLATFORM_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h linux-4.1.13/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h 2015-12-04 19:57:03.826114569 +0100 -@@ -36,6 +36,7 @@ - #define cpu_has_mdmx 0 - #define cpu_has_mips3d 0 - #define cpu_has_smartmips 0 -+#define cpu_has_rixi 0 - - #define cpu_has_mips32r1 1 - #define cpu_has_mips32r2 1 -@@ -43,6 +44,7 @@ - #define cpu_has_mips64r2 0 - - #define cpu_has_mipsmt 0 -+#define cpu_has_userlocal 0 - - #define cpu_has_64bits 0 - #define cpu_has_64bit_zero_reg 0 -@@ -51,5 +53,9 @@ - - #define cpu_dcache_line_size() 32 - #define cpu_icache_line_size() 32 -+#define cpu_has_vtag_icache 0 -+#define cpu_has_dc_aliases 1 -+#define cpu_has_ic_fills_f_dc 0 -+#define cpu_has_pindexed_dcache 0 - - #endif /* __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/irq.h linux-4.1.13/arch/mips/include/asm/mach-ath79/irq.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/irq.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/irq.h 2015-12-04 19:57:05.370013557 +0100 -@@ -10,7 +10,7 @@ - #define __ASM_MACH_ATH79_IRQ_H - - #define MIPS_CPU_IRQ_BASE 0 --#define NR_IRQS 51 -+#define NR_IRQS 83 - - #define ATH79_CPU_IRQ(_x) (MIPS_CPU_IRQ_BASE + (_x)) - -@@ -30,6 +30,10 @@ - #define ATH79_IP3_IRQ_COUNT 3 - #define ATH79_IP3_IRQ(_x) (ATH79_IP3_IRQ_BASE + (_x)) - -+#define ATH79_GPIO_IRQ_BASE (ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT) -+#define ATH79_GPIO_IRQ_COUNT 32 -+#define ATH79_GPIO_IRQ(_x) (ATH79_GPIO_IRQ_BASE + (_x)) -+ - #include_next - - #endif /* __ASM_MACH_ATH79_IRQ_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mach-rb750.h linux-4.1.13/arch/mips/include/asm/mach-ath79/mach-rb750.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mach-rb750.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/mach-rb750.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,84 @@ -+/* -+ * MikroTik RouterBOARD 750 definitions -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+#ifndef _MACH_RB750_H -+#define _MACH_RB750_H -+ -+#include -+ -+#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ -+#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ -+#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ -+#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ -+#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ -+#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ -+#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ -+#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ -+#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ -+#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ -+#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ -+#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ -+#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ -+#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ -+#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ -+ -+#define RB750_GPIO_BTN_RESET 1 -+#define RB750_GPIO_SPI_CS0 2 -+#define RB750_GPIO_LED_ACT 12 -+#define RB750_GPIO_LED_PORT1 13 -+#define RB750_GPIO_LED_PORT2 14 -+#define RB750_GPIO_LED_PORT3 15 -+#define RB750_GPIO_LED_PORT4 16 -+#define RB750_GPIO_LED_PORT5 17 -+ -+#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) -+#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) -+#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) -+#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) -+#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) -+#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) -+#define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE) -+ -+#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) -+ -+#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ -+ RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) -+ -+#define RB7XX_GPIO_NAND_NCE 0 -+#define RB7XX_GPIO_MON 9 -+#define RB7XX_GPIO_LED_ACT 11 -+#define RB7XX_GPIO_USB_POWERON 13 -+ -+#define RB7XX_NAND_NCE BIT(RB7XX_GPIO_NAND_NCE) -+#define RB7XX_LED_ACT BIT(RB7XX_GPIO_LED_ACT) -+#define RB7XX_MONITOR BIT(RB7XX_GPIO_MON) -+#define RB7XX_USB_POWERON BIT(RB7XX_GPIO_USB_POWERON) -+ -+struct rb750_led_data { -+ char *name; -+ char *default_trigger; -+ u32 mask; -+ int active_low; -+}; -+ -+struct rb750_led_platform_data { -+ int num_leds; -+ struct rb750_led_data *leds; -+ void (*latch_change)(u32 clear, u32 set); -+}; -+ -+struct rb7xx_nand_platform_data { -+ u32 nce_line; -+ -+ void (*enable_pins)(void); -+ void (*disable_pins)(void); -+ void (*latch_change)(u32, u32); -+}; -+ -+#endif /* _MACH_RB750_H */ -\ No newline at end of file -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mangle-port.h linux-4.1.13/arch/mips/include/asm/mach-ath79/mangle-port.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mangle-port.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/mangle-port.h 2015-12-04 19:57:03.970105148 +0100 -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H -+#define __ASM_MACH_ATH79_MANGLE_PORT_H -+ -+#ifdef CONFIG_PCI -+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); -+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); -+#else -+#define ath79_pci_swizzle_b(port) (port) -+#define ath79_pci_swizzle_w(port) (port) -+#endif -+ -+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) -+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) -+#define __swizzle_addr_l(port) (port) -+#define __swizzle_addr_q(port) (port) -+ -+# define ioswabb(a, x) (x) -+# define __mem_ioswabb(a, x) (x) -+# define ioswabw(a, x) (x) -+# define __mem_ioswabw(a, x) cpu_to_le16(x) -+# define ioswabl(a, x) (x) -+# define __mem_ioswabl(a, x) cpu_to_le32(x) -+# define ioswabq(a, x) (x) -+# define __mem_ioswabq(a, x) cpu_to_le64(x) -+ -+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h linux-4.1.13/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h ---- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,48 @@ -+/* -+ * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * This file was based on the patches for Linux 2.6.27.39 published by -+ * MikroTik for their RouterBoard 4xx series devices. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#define CPLD_GPIO_nLED1 0 -+#define CPLD_GPIO_nLED2 1 -+#define CPLD_GPIO_nLED3 2 -+#define CPLD_GPIO_nLED4 3 -+#define CPLD_GPIO_FAN 4 -+#define CPLD_GPIO_ALE 5 -+#define CPLD_GPIO_CLE 6 -+#define CPLD_GPIO_nCE 7 -+#define CPLD_GPIO_nLED5 8 -+ -+#define CPLD_NUM_GPIOS 9 -+ -+#define CPLD_CFG_nLED1 BIT(CPLD_GPIO_nLED1) -+#define CPLD_CFG_nLED2 BIT(CPLD_GPIO_nLED2) -+#define CPLD_CFG_nLED3 BIT(CPLD_GPIO_nLED3) -+#define CPLD_CFG_nLED4 BIT(CPLD_GPIO_nLED4) -+#define CPLD_CFG_FAN BIT(CPLD_GPIO_FAN) -+#define CPLD_CFG_ALE BIT(CPLD_GPIO_ALE) -+#define CPLD_CFG_CLE BIT(CPLD_GPIO_CLE) -+#define CPLD_CFG_nCE BIT(CPLD_GPIO_nCE) -+#define CPLD_CFG_nLED5 BIT(CPLD_GPIO_nLED5) -+ -+struct rb4xx_cpld_platform_data { -+ unsigned gpio_base; -+}; -+ -+extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value); -+extern int rb4xx_cpld_read(unsigned char *rx_buf, -+ const unsigned char *verify_buf, -+ unsigned cnt); -+extern int rb4xx_cpld_read_from(unsigned addr, -+ unsigned char *rx_buf, -+ const unsigned char *verify_buf, -+ unsigned cnt); -+extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count); -diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mips_machine.h linux-4.1.13/arch/mips/include/asm/mips_machine.h ---- linux-4.1.13.orig/arch/mips/include/asm/mips_machine.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/include/asm/mips_machine.h 2015-12-04 19:57:03.826114569 +0100 -@@ -36,6 +36,18 @@ - .mach_setup = _setup, \ - }; - -+#define MIPS_MACHINE_NONAME(_type, _id, _setup) \ -+static const char machine_id_##_type[] __initconst \ -+ __aligned(1) = _id; \ -+static struct mips_machine machine_##_type \ -+ __used __section(.mips.machines.init) = \ -+{ \ -+ .mach_type = _type, \ -+ .mach_id = machine_id_##_type, \ -+ .mach_name = NULL, \ -+ .mach_setup = _setup, \ -+}; -+ - extern long __mips_machines_start; - extern long __mips_machines_end; - -diff -Nur linux-4.1.13.orig/arch/mips/Kconfig linux-4.1.13/arch/mips/Kconfig ---- linux-4.1.13.orig/arch/mips/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/Kconfig 2015-12-04 19:57:03.986104101 +0100 -@@ -1070,6 +1070,9 @@ - config MIPS_NILE4 - bool - -+config MYLOADER -+ bool -+ - config SYNC_R4K - bool - -diff -Nur linux-4.1.13.orig/arch/mips/Makefile linux-4.1.13/arch/mips/Makefile ---- linux-4.1.13.orig/arch/mips/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/arch/mips/Makefile 2015-12-04 19:57:03.982104363 +0100 -@@ -216,6 +216,7 @@ - # - libs-$(CONFIG_FW_ARC) += arch/mips/fw/arc/ - libs-$(CONFIG_FW_CFE) += arch/mips/fw/cfe/ -+libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/ - libs-$(CONFIG_FW_SNIPROM) += arch/mips/fw/sni/ - libs-y += arch/mips/fw/lib/ - -diff -Nur linux-4.1.13.orig/drivers/gpio/gpio-74x164.c linux-4.1.13/drivers/gpio/gpio-74x164.c ---- linux-4.1.13.orig/drivers/gpio/gpio-74x164.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/gpio/gpio-74x164.c 2015-12-04 19:57:03.930107765 +0100 -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -107,8 +108,18 @@ - static int gen_74x164_probe(struct spi_device *spi) - { - struct gen_74x164_chip *chip; -+ struct gen_74x164_chip_platform_data *pdata; -+ struct device_node *np; - int ret; - -+ pdata = spi->dev.platform_data; -+ np = spi->dev.of_node; -+ -+ if (!np && !pdata) { -+ dev_err(&spi->dev, "No configuration data available.\n"); -+ return -EINVAL; -+ } -+ - /* - * bits_per_word cannot be configured in platform data - */ -@@ -130,18 +141,28 @@ - chip->gpio_chip.set = gen_74x164_set_value; - chip->gpio_chip.base = -1; - -- if (of_property_read_u32(spi->dev.of_node, "registers-number", -- &chip->registers)) { -- dev_err(&spi->dev, -- "Missing registers-number property in the DT.\n"); -- return -EINVAL; -+ if (np) { -+ if (of_property_read_u32(spi->dev.of_node, "registers-number", &chip->registers)) { -+ dev_err(&spi->dev, "Missing registers-number property in the DT.\n"); -+ ret = -EINVAL; -+ goto exit_destroy; -+ } -+ } else if (pdata) { -+ chip->gpio_chip.base = pdata->base; -+ chip->registers = pdata->num_registers; - } - -+ if (!chip->registers) -+ chip->registers = 1; -+ - chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; - chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL); - if (!chip->buffer) - return -ENOMEM; - -+ if (pdata && pdata->init_data) -+ memcpy(chip->buffer, pdata->init_data, chip->registers); -+ - chip->gpio_chip.can_sleep = true; - chip->gpio_chip.dev = &spi->dev; - chip->gpio_chip.owner = THIS_MODULE; -@@ -174,17 +195,19 @@ - return 0; - } - -+#ifdef CONFIG_OF - static const struct of_device_id gen_74x164_dt_ids[] = { - { .compatible = "fairchild,74hc595" }, - {}, - }; - MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); -+#endif /* CONFIG_OF */ - - static struct spi_driver gen_74x164_driver = { - .driver = { - .name = "74x164", - .owner = THIS_MODULE, -- .of_match_table = gen_74x164_dt_ids, -+ .of_match_table = of_match_ptr(gen_74x164_dt_ids), - }, - .probe = gen_74x164_probe, - .remove = gen_74x164_remove, -diff -Nur linux-4.1.13.orig/drivers/gpio/gpio-latch.c linux-4.1.13/drivers/gpio/gpio-latch.c ---- linux-4.1.13.orig/drivers/gpio/gpio-latch.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/gpio/gpio-latch.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,220 @@ -+/* -+ * GPIO latch driver -+ * -+ * Copyright (C) 2014 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+struct gpio_latch_chip { -+ struct gpio_chip gc; -+ -+ struct mutex mutex; -+ struct mutex latch_mutex; -+ bool latch_enabled; -+ int le_gpio; -+ bool le_active_low; -+ int *gpios; -+}; -+ -+static inline struct gpio_latch_chip *to_gpio_latch_chip(struct gpio_chip *gc) -+{ -+ return container_of(gc, struct gpio_latch_chip, gc); -+} -+ -+static void gpio_latch_lock(struct gpio_latch_chip *glc, bool enable) -+{ -+ mutex_lock(&glc->mutex); -+ -+ if (enable) -+ glc->latch_enabled = true; -+ -+ if (glc->latch_enabled) -+ mutex_lock(&glc->latch_mutex); -+} -+ -+static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable) -+{ -+ if (glc->latch_enabled) -+ mutex_unlock(&glc->latch_mutex); -+ -+ if (disable) -+ glc->latch_enabled = true; -+ -+ mutex_unlock(&glc->mutex); -+} -+ -+static int -+gpio_latch_get(struct gpio_chip *gc, unsigned offset) -+{ -+ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); -+ int ret; -+ -+ gpio_latch_lock(glc, false); -+ ret = gpio_get_value(glc->gpios[offset]); -+ gpio_latch_unlock(glc, false); -+ -+ return ret; -+} -+ -+static void -+gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value) -+{ -+ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); -+ bool enable_latch = false; -+ bool disable_latch = false; -+ int gpio; -+ -+ gpio = glc->gpios[offset]; -+ -+ if (gpio == glc->le_gpio) { -+ enable_latch = value ^ glc->le_active_low; -+ disable_latch = !enable_latch; -+ } -+ -+ gpio_latch_lock(glc, enable_latch); -+ gpio_set_value(gpio, value); -+ gpio_latch_unlock(glc, disable_latch); -+} -+ -+static int -+gpio_latch_direction_input(struct gpio_chip *gc, unsigned offset) -+{ -+ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); -+ int ret; -+ -+ gpio_latch_lock(glc, false); -+ ret = gpio_direction_input(glc->gpios[offset]); -+ gpio_latch_unlock(glc, false); -+ -+ return ret; -+} -+ -+static int -+gpio_latch_direction_output(struct gpio_chip *gc, unsigned offset, int value) -+{ -+ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); -+ bool enable_latch = false; -+ bool disable_latch = false; -+ int gpio; -+ int ret; -+ -+ gpio = glc->gpios[offset]; -+ -+ if (gpio == glc->le_gpio) { -+ enable_latch = value ^ glc->le_active_low; -+ disable_latch = !enable_latch; -+ } -+ -+ gpio_latch_lock(glc, enable_latch); -+ ret = gpio_direction_output(gpio, value); -+ gpio_latch_unlock(glc, disable_latch); -+ -+ return ret; -+} -+ -+static int gpio_latch_probe(struct platform_device *pdev) -+{ -+ struct gpio_latch_chip *glc; -+ struct gpio_latch_platform_data *pdata; -+ struct gpio_chip *gc; -+ int size; -+ int ret; -+ int i; -+ -+ pdata = dev_get_platdata(&pdev->dev); -+ if (!pdata) -+ return -EINVAL; -+ -+ if (pdata->le_gpio_index >= pdata->num_gpios || -+ !pdata->num_gpios || -+ !pdata->gpios) -+ return -EINVAL; -+ -+ for (i = 0; i < pdata->num_gpios; i++) { -+ int gpio = pdata->gpios[i]; -+ -+ ret = devm_gpio_request(&pdev->dev, gpio, -+ GPIO_LATCH_DRIVER_NAME); -+ if (ret) -+ return ret; -+ } -+ -+ glc = devm_kzalloc(&pdev->dev, sizeof(*glc), GFP_KERNEL); -+ if (!glc) -+ return -ENOMEM; -+ -+ mutex_init(&glc->mutex); -+ mutex_init(&glc->latch_mutex); -+ -+ size = pdata->num_gpios * sizeof(glc->gpios[0]); -+ glc->gpios = devm_kzalloc(&pdev->dev, size , GFP_KERNEL); -+ if (!glc->gpios) -+ return -ENOMEM; -+ -+ memcpy(glc->gpios, pdata->gpios, size); -+ -+ glc->le_gpio = glc->gpios[pdata->le_gpio_index]; -+ glc->le_active_low = pdata->le_active_low; -+ -+ gc = &glc->gc; -+ -+ gc->label = GPIO_LATCH_DRIVER_NAME; -+ gc->base = pdata->base; -+ gc->can_sleep = true; -+ gc->ngpio = pdata->num_gpios; -+ gc->get = gpio_latch_get; -+ gc->set = gpio_latch_set; -+ gc->direction_input = gpio_latch_direction_input, -+ gc->direction_output = gpio_latch_direction_output; -+ -+ platform_set_drvdata(pdev, glc); -+ -+ ret = gpiochip_add(&glc->gc); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int gpio_latch_remove(struct platform_device *pdev) -+{ -+ struct gpio_latch_chip *glc = platform_get_drvdata(pdev); -+ -+ gpiochip_remove(&glc->gc); -+ return 0; -+} -+ -+ -+static struct platform_driver gpio_latch_driver = { -+ .probe = gpio_latch_probe, -+ .remove = gpio_latch_remove, -+ .driver = { -+ .name = GPIO_LATCH_DRIVER_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init gpio_latch_init(void) -+{ -+ return platform_driver_register(&gpio_latch_driver); -+} -+ -+postcore_initcall(gpio_latch_init); -+ -+MODULE_DESCRIPTION("GPIO latch driver"); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" GPIO_LATCH_DRIVER_NAME); -diff -Nur linux-4.1.13.orig/drivers/gpio/gpio-nxp-74hc153.c linux-4.1.13/drivers/gpio/gpio-nxp-74hc153.c ---- linux-4.1.13.orig/drivers/gpio/gpio-nxp-74hc153.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/gpio/gpio-nxp-74hc153.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,251 @@ -+/* -+ * NXP 74HC153 - Dual 4-input multiplexer GPIO driver -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define NXP_74HC153_NUM_GPIOS 8 -+#define NXP_74HC153_S0_MASK 0x1 -+#define NXP_74HC153_S1_MASK 0x2 -+#define NXP_74HC153_BANK_MASK 0x4 -+ -+struct nxp_74hc153_chip { -+ struct device *parent; -+ struct gpio_chip gpio_chip; -+ struct mutex lock; -+}; -+ -+static struct nxp_74hc153_chip *gpio_to_nxp(struct gpio_chip *gc) -+{ -+ return container_of(gc, struct nxp_74hc153_chip, gpio_chip); -+} -+ -+static int nxp_74hc153_direction_input(struct gpio_chip *gc, unsigned offset) -+{ -+ return 0; -+} -+ -+static int nxp_74hc153_direction_output(struct gpio_chip *gc, -+ unsigned offset, int val) -+{ -+ return -EINVAL; -+} -+ -+static int nxp_74hc153_get_value(struct gpio_chip *gc, unsigned offset) -+{ -+ struct nxp_74hc153_chip *nxp; -+ struct nxp_74hc153_platform_data *pdata; -+ unsigned s0; -+ unsigned s1; -+ unsigned pin; -+ int ret; -+ -+ nxp = gpio_to_nxp(gc); -+ pdata = nxp->parent->platform_data; -+ -+ s0 = !!(offset & NXP_74HC153_S0_MASK); -+ s1 = !!(offset & NXP_74HC153_S1_MASK); -+ pin = (offset & NXP_74HC153_BANK_MASK) ? pdata->gpio_pin_2y -+ : pdata->gpio_pin_1y; -+ -+ mutex_lock(&nxp->lock); -+ gpio_set_value(pdata->gpio_pin_s0, s0); -+ gpio_set_value(pdata->gpio_pin_s1, s1); -+ ret = gpio_get_value(pin); -+ mutex_unlock(&nxp->lock); -+ -+ return ret; -+} -+ -+static void nxp_74hc153_set_value(struct gpio_chip *gc, -+ unsigned offset, int val) -+{ -+ /* not supported */ -+} -+ -+static int nxp_74hc153_probe(struct platform_device *pdev) -+{ -+ struct nxp_74hc153_platform_data *pdata; -+ struct nxp_74hc153_chip *nxp; -+ struct gpio_chip *gc; -+ int err; -+ -+ pdata = pdev->dev.platform_data; -+ if (pdata == NULL) { -+ dev_dbg(&pdev->dev, "no platform data specified\n"); -+ return -EINVAL; -+ } -+ -+ nxp = kzalloc(sizeof(struct nxp_74hc153_chip), GFP_KERNEL); -+ if (nxp == NULL) { -+ dev_err(&pdev->dev, "no memory for private data\n"); -+ return -ENOMEM; -+ } -+ -+ err = gpio_request(pdata->gpio_pin_s0, dev_name(&pdev->dev)); -+ if (err) { -+ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", -+ pdata->gpio_pin_s0, err); -+ goto err_free_nxp; -+ } -+ -+ err = gpio_request(pdata->gpio_pin_s1, dev_name(&pdev->dev)); -+ if (err) { -+ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", -+ pdata->gpio_pin_s1, err); -+ goto err_free_s0; -+ } -+ -+ err = gpio_request(pdata->gpio_pin_1y, dev_name(&pdev->dev)); -+ if (err) { -+ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", -+ pdata->gpio_pin_1y, err); -+ goto err_free_s1; -+ } -+ -+ err = gpio_request(pdata->gpio_pin_2y, dev_name(&pdev->dev)); -+ if (err) { -+ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", -+ pdata->gpio_pin_2y, err); -+ goto err_free_1y; -+ } -+ -+ err = gpio_direction_output(pdata->gpio_pin_s0, 0); -+ if (err) { -+ dev_err(&pdev->dev, -+ "unable to set direction of gpio %u, err=%d\n", -+ pdata->gpio_pin_s0, err); -+ goto err_free_2y; -+ } -+ -+ err = gpio_direction_output(pdata->gpio_pin_s1, 0); -+ if (err) { -+ dev_err(&pdev->dev, -+ "unable to set direction of gpio %u, err=%d\n", -+ pdata->gpio_pin_s1, err); -+ goto err_free_2y; -+ } -+ -+ err = gpio_direction_input(pdata->gpio_pin_1y); -+ if (err) { -+ dev_err(&pdev->dev, -+ "unable to set direction of gpio %u, err=%d\n", -+ pdata->gpio_pin_1y, err); -+ goto err_free_2y; -+ } -+ -+ err = gpio_direction_input(pdata->gpio_pin_2y); -+ if (err) { -+ dev_err(&pdev->dev, -+ "unable to set direction of gpio %u, err=%d\n", -+ pdata->gpio_pin_2y, err); -+ goto err_free_2y; -+ } -+ -+ nxp->parent = &pdev->dev; -+ mutex_init(&nxp->lock); -+ -+ gc = &nxp->gpio_chip; -+ -+ gc->direction_input = nxp_74hc153_direction_input; -+ gc->direction_output = nxp_74hc153_direction_output; -+ gc->get = nxp_74hc153_get_value; -+ gc->set = nxp_74hc153_set_value; -+ gc->can_sleep = 1; -+ -+ gc->base = pdata->gpio_base; -+ gc->ngpio = NXP_74HC153_NUM_GPIOS; -+ gc->label = dev_name(nxp->parent); -+ gc->dev = nxp->parent; -+ gc->owner = THIS_MODULE; -+ -+ err = gpiochip_add(&nxp->gpio_chip); -+ if (err) { -+ dev_err(&pdev->dev, "unable to add gpio chip, err=%d\n", err); -+ goto err_free_2y; -+ } -+ -+ platform_set_drvdata(pdev, nxp); -+ return 0; -+ -+err_free_2y: -+ gpio_free(pdata->gpio_pin_2y); -+err_free_1y: -+ gpio_free(pdata->gpio_pin_1y); -+err_free_s1: -+ gpio_free(pdata->gpio_pin_s1); -+err_free_s0: -+ gpio_free(pdata->gpio_pin_s0); -+err_free_nxp: -+ kfree(nxp); -+ return err; -+} -+ -+static int nxp_74hc153_remove(struct platform_device *pdev) -+{ -+ struct nxp_74hc153_chip *nxp = platform_get_drvdata(pdev); -+ struct nxp_74hc153_platform_data *pdata = pdev->dev.platform_data; -+ -+ if (nxp) { -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) -+ int err; -+ -+ err = gpiochip_remove(&nxp->gpio_chip); -+ if (err) { -+ dev_err(&pdev->dev, -+ "unable to remove gpio chip, err=%d\n", -+ err); -+ return err; -+ } -+#else -+ gpiochip_remove(&nxp->gpio_chip); -+#endif -+ gpio_free(pdata->gpio_pin_2y); -+ gpio_free(pdata->gpio_pin_1y); -+ gpio_free(pdata->gpio_pin_s1); -+ gpio_free(pdata->gpio_pin_s0); -+ -+ kfree(nxp); -+ platform_set_drvdata(pdev, NULL); -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver nxp_74hc153_driver = { -+ .probe = nxp_74hc153_probe, -+ .remove = nxp_74hc153_remove, -+ .driver = { -+ .name = NXP_74HC153_DRIVER_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init nxp_74hc153_init(void) -+{ -+ return platform_driver_register(&nxp_74hc153_driver); -+} -+subsys_initcall(nxp_74hc153_init); -+ -+static void __exit nxp_74hc153_exit(void) -+{ -+ platform_driver_unregister(&nxp_74hc153_driver); -+} -+module_exit(nxp_74hc153_exit); -+ -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC153"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" NXP_74HC153_DRIVER_NAME); -diff -Nur linux-4.1.13.orig/drivers/gpio/Kconfig linux-4.1.13/drivers/gpio/Kconfig ---- linux-4.1.13.orig/drivers/gpio/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/gpio/Kconfig 2015-12-04 19:57:03.934107503 +0100 -@@ -941,7 +941,7 @@ - - config GPIO_74X164 - tristate "74x164 serial-in/parallel-out 8-bits shift register" -- depends on SPI_MASTER && OF -+ depends on SPI_MASTER - help - Driver for 74x164 compatible serial-in/parallel-out 8-outputs - shift registers. This driver can be used to provide access -@@ -988,4 +988,17 @@ - - endmenu - -+comment "Other GPIO expanders" -+ -+config GPIO_NXP_74HC153 -+ tristate "NXP 74HC153 Dual 4-input multiplexer" -+ help -+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This -+ provides a GPIO interface supporting input mode only. -+ -+config GPIO_LATCH -+ tristate "GPIO latch driver" -+ help -+ Say yes here to enable a GPIO latch driver. -+ - endif -diff -Nur linux-4.1.13.orig/drivers/gpio/Makefile linux-4.1.13/drivers/gpio/Makefile ---- linux-4.1.13.orig/drivers/gpio/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/gpio/Makefile 2015-12-04 19:57:03.934107503 +0100 -@@ -42,6 +42,7 @@ - obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o - obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o - obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o -+obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o - obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o - obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o - obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o -@@ -64,6 +65,7 @@ - obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o - obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o - obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o -+obj-$(CONFIG_GPIO_NXP_74HC153) += gpio-nxp-74hc153.o - obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o - obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o - obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o -diff -Nur linux-4.1.13.orig/drivers/leds/Kconfig linux-4.1.13/drivers/leds/Kconfig ---- linux-4.1.13.orig/drivers/leds/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/leds/Kconfig 2015-12-04 19:57:03.926108026 +0100 -@@ -534,6 +534,17 @@ - This option enables support for the 'White' LED block - on Qualcomm PM8941 PMICs. - -+config LEDS_WNDR3700_USB -+ tristate "NETGEAR WNDR3700 USB LED driver" -+ depends on LEDS_CLASS && ATH79_MACH_WNDR3700 -+ help -+ This option enables support for the USB LED found on the -+ NETGEAR WNDR3700 board. -+ -+config LEDS_RB750 -+ tristate "LED driver for the Mikrotik RouterBOARD 750" -+ depends on LEDS_CLASS && ATH79_MACH_RB750 -+ - comment "LED Triggers" - source "drivers/leds/trigger/Kconfig" - -diff -Nur linux-4.1.13.orig/drivers/leds/leds-rb750.c linux-4.1.13/drivers/leds/leds-rb750.c ---- linux-4.1.13.orig/drivers/leds/leds-rb750.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/leds/leds-rb750.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,144 @@ -+/* -+ * LED driver for the RouterBOARD 750 -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#define DRV_NAME "leds-rb750" -+ -+struct rb750_led_dev { -+ struct led_classdev cdev; -+ u32 mask; -+ int active_low; -+ void (*latch_change)(u32 clear, u32 set); -+}; -+ -+struct rb750_led_drvdata { -+ struct rb750_led_dev *led_devs; -+ int num_leds; -+}; -+ -+static inline struct rb750_led_dev *to_rbled(struct led_classdev *led_cdev) -+{ -+ return (struct rb750_led_dev *)container_of(led_cdev, -+ struct rb750_led_dev, cdev); -+} -+ -+static void rb750_led_brightness_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct rb750_led_dev *rbled = to_rbled(led_cdev); -+ int level; -+ -+ level = (value == LED_OFF) ? 0 : 1; -+ level ^= rbled->active_low; -+ -+ if (level) -+ rbled->latch_change(0, rbled->mask); -+ else -+ rbled->latch_change(rbled->mask, 0); -+} -+ -+static int rb750_led_probe(struct platform_device *pdev) -+{ -+ struct rb750_led_platform_data *pdata; -+ struct rb750_led_drvdata *drvdata; -+ int ret = 0; -+ int i; -+ -+ pdata = pdev->dev.platform_data; -+ if (!pdata) -+ return -EINVAL; -+ -+ drvdata = kzalloc(sizeof(struct rb750_led_drvdata) + -+ sizeof(struct rb750_led_dev) * pdata->num_leds, -+ GFP_KERNEL); -+ if (!drvdata) -+ return -ENOMEM; -+ -+ drvdata->num_leds = pdata->num_leds; -+ drvdata->led_devs = (struct rb750_led_dev *) &drvdata[1]; -+ -+ for (i = 0; i < drvdata->num_leds; i++) { -+ struct rb750_led_dev *rbled = &drvdata->led_devs[i]; -+ struct rb750_led_data *led_data = &pdata->leds[i]; -+ -+ rbled->cdev.name = led_data->name; -+ rbled->cdev.default_trigger = led_data->default_trigger; -+ rbled->cdev.brightness_set = rb750_led_brightness_set; -+ rbled->cdev.brightness = LED_OFF; -+ -+ rbled->mask = led_data->mask; -+ rbled->active_low = !!led_data->active_low; -+ rbled->latch_change = pdata->latch_change; -+ -+ ret = led_classdev_register(&pdev->dev, &rbled->cdev); -+ if (ret) -+ goto err; -+ } -+ -+ platform_set_drvdata(pdev, drvdata); -+ return 0; -+ -+err: -+ for (i = i - 1; i >= 0; i--) -+ led_classdev_unregister(&drvdata->led_devs[i].cdev); -+ -+ kfree(drvdata); -+ return ret; -+} -+ -+static int rb750_led_remove(struct platform_device *pdev) -+{ -+ struct rb750_led_drvdata *drvdata; -+ int i; -+ -+ drvdata = platform_get_drvdata(pdev); -+ for (i = 0; i < drvdata->num_leds; i++) -+ led_classdev_unregister(&drvdata->led_devs[i].cdev); -+ -+ kfree(drvdata); -+ return 0; -+} -+ -+static struct platform_driver rb750_led_driver = { -+ .probe = rb750_led_probe, -+ .remove = rb750_led_remove, -+ .driver = { -+ .name = DRV_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+MODULE_ALIAS("platform:leds-rb750"); -+ -+static int __init rb750_led_init(void) -+{ -+ return platform_driver_register(&rb750_led_driver); -+} -+ -+static void __exit rb750_led_exit(void) -+{ -+ platform_driver_unregister(&rb750_led_driver); -+} -+ -+module_init(rb750_led_init); -+module_exit(rb750_led_exit); -+ -+MODULE_DESCRIPTION(DRV_NAME); -+MODULE_DESCRIPTION("LED driver for the RouterBOARD 750"); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/leds/leds-wndr3700-usb.c linux-4.1.13/drivers/leds/leds-wndr3700-usb.c ---- linux-4.1.13.orig/drivers/leds/leds-wndr3700-usb.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/leds/leds-wndr3700-usb.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,76 @@ -+/* -+ * USB LED driver for the NETGEAR WNDR3700 -+ * -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define DRIVER_NAME "wndr3700-led-usb" -+ -+static void wndr3700_usb_led_set(struct led_classdev *cdev, -+ enum led_brightness brightness) -+{ -+ if (brightness) -+ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); -+ else -+ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); -+} -+ -+static enum led_brightness wndr3700_usb_led_get(struct led_classdev *cdev) -+{ -+ return ath79_device_reset_get(AR71XX_RESET_GE1_PHY) ? LED_OFF : LED_FULL; -+} -+ -+static struct led_classdev wndr3700_usb_led = { -+ .name = "netgear:green:usb", -+ .brightness_set = wndr3700_usb_led_set, -+ .brightness_get = wndr3700_usb_led_get, -+}; -+ -+static int wndr3700_usb_led_probe(struct platform_device *pdev) -+{ -+ return led_classdev_register(&pdev->dev, &wndr3700_usb_led); -+} -+ -+static int wndr3700_usb_led_remove(struct platform_device *pdev) -+{ -+ led_classdev_unregister(&wndr3700_usb_led); -+ return 0; -+} -+ -+static struct platform_driver wndr3700_usb_led_driver = { -+ .probe = wndr3700_usb_led_probe, -+ .remove = wndr3700_usb_led_remove, -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init wndr3700_usb_led_init(void) -+{ -+ return platform_driver_register(&wndr3700_usb_led_driver); -+} -+ -+static void __exit wndr3700_usb_led_exit(void) -+{ -+ platform_driver_unregister(&wndr3700_usb_led_driver); -+} -+ -+module_init(wndr3700_usb_led_init); -+module_exit(wndr3700_usb_led_exit); -+ -+MODULE_DESCRIPTION("USB LED driver for the NETGEAR WNDR3700"); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" DRIVER_NAME); -diff -Nur linux-4.1.13.orig/drivers/leds/Makefile linux-4.1.13/drivers/leds/Makefile ---- linux-4.1.13.orig/drivers/leds/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/leds/Makefile 2015-12-04 19:57:03.926108026 +0100 -@@ -43,12 +43,14 @@ - obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o - obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o - obj-$(CONFIG_LEDS_PWM) += leds-pwm.o -+obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o - obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o - obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o - obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o - obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o - obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o - obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o -+obj-$(CONFIG_LEDS_RB750) += leds-rb750.o - obj-$(CONFIG_LEDS_NS2) += leds-ns2.o - obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o - obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o -diff -Nur linux-4.1.13.orig/drivers/Makefile linux-4.1.13/drivers/Makefile ---- linux-4.1.13.orig/drivers/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/Makefile 2015-12-04 19:57:03.890110382 +0100 -@@ -71,8 +71,8 @@ - obj-$(CONFIG_SCSI) += scsi/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPMI) += spmi/ - obj-y += hsi/ - obj-y += net/ -diff -Nur linux-4.1.13.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-4.1.13/drivers/mtd/chips/cfi_cmdset_0002.c ---- linux-4.1.13.orig/drivers/mtd/chips/cfi_cmdset_0002.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/chips/cfi_cmdset_0002.c 2015-12-04 19:57:03.878111167 +0100 -@@ -40,7 +40,7 @@ - #include - - #define AMD_BOOTLOC_BUG --#define FORCE_WORD_WRITE 0 -+#define FORCE_WORD_WRITE 1 - - #define MAX_WORD_RETRIES 3 - -@@ -51,7 +51,9 @@ - - static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -+#if !FORCE_WORD_WRITE - static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -+#endif - static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *); - static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *); - static void cfi_amdstd_sync (struct mtd_info *); -@@ -202,6 +204,7 @@ - } - #endif - -+#if !FORCE_WORD_WRITE - static void fixup_use_write_buffers(struct mtd_info *mtd) - { - struct map_info *map = mtd->priv; -@@ -211,6 +214,7 @@ - mtd->_write = cfi_amdstd_write_buffers; - } - } -+#endif /* !FORCE_WORD_WRITE */ - - /* Atmel chips don't use the same PRI format as AMD chips */ - static void fixup_convert_atmel_pri(struct mtd_info *mtd) -@@ -1632,8 +1636,8 @@ - break; - } - -- if (chip_ready(map, adr)) -- break; -+ if (chip_good(map, adr, datum)) -+ goto enable_xip; - - /* Latency issues. Drop the lock, wait a while and retry */ - UDELAY(map, chip, adr, 1); -@@ -1649,6 +1653,8 @@ - - ret = -EIO; - } -+ -+ enable_xip: - xip_enable(map, chip, adr); - op_done: - if (mode == FL_OTP_WRITE) -@@ -1789,6 +1795,7 @@ - /* - * FIXME: interleaved mode not tested, and probably not supported! - */ -+#if !FORCE_WORD_WRITE - static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, - unsigned long adr, const u_char *buf, - int len) -@@ -1916,7 +1923,6 @@ - return ret; - } - -- - static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) - { -@@ -1991,6 +1997,7 @@ - - return 0; - } -+#endif /* !FORCE_WORD_WRITE */ - - /* - * Wait for the flash chip to become ready to write data -@@ -2226,7 +2233,6 @@ - return 0; - } - -- - /* - * Handle devices with one erase region, that only implement - * the chip erase command. -@@ -2290,8 +2296,8 @@ - chip->erase_suspended = 0; - } - -- if (chip_ready(map, adr)) -- break; -+ if (chip_good(map, adr, map_word_ff(map))) -+ goto op_done; - - if (time_after(jiffies, timeo)) { - printk(KERN_WARNING "MTD %s(): software timeout\n", -@@ -2311,6 +2317,7 @@ - ret = -EIO; - } - -+ op_done: - chip->state = FL_READY; - xip_enable(map, chip, adr); - DISABLE_VPP(map); -@@ -2379,9 +2386,9 @@ - chip->erase_suspended = 0; - } - -- if (chip_ready(map, adr)) { -+ if (chip_good(map, adr, map_word_ff(map))) { - xip_enable(map, chip, adr); -- break; -+ goto op_done; - } - - if (time_after(jiffies, timeo)) { -@@ -2403,6 +2410,7 @@ - ret = -EIO; - } - -+ op_done: - chip->state = FL_READY; - DISABLE_VPP(map); - put_chip(map, chip, adr); -diff -Nur linux-4.1.13.orig/drivers/mtd/chips/jedec_probe.c linux-4.1.13/drivers/mtd/chips/jedec_probe.c ---- linux-4.1.13.orig/drivers/mtd/chips/jedec_probe.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/chips/jedec_probe.c 2015-12-04 19:57:03.834114045 +0100 -@@ -148,6 +148,7 @@ - #define SST39LF160 0x2782 - #define SST39VF1601 0x234b - #define SST39VF3201 0x235b -+#define SST39VF6401B 0x236d - #define SST39WF1601 0x274b - #define SST39WF1602 0x274a - #define SST39LF512 0x00D4 -@@ -1569,6 +1570,18 @@ - ERASEINFO(0x10000,64), - } - }, { -+ .mfr_id = CFI_MFR_SST, -+ .dev_id = SST39VF6401B, -+ .name = "SST 39VF6401B", -+ .devtypes = CFI_DEVICETYPE_X16, -+ .uaddr = MTD_UADDR_0xAAAA_0x5555, -+ .dev_size = SIZE_8MiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x10000,128) -+ } -+ }, { - .mfr_id = CFI_MFR_ST, - .dev_id = M29F800AB, - .name = "ST M29F800AB", -diff -Nur linux-4.1.13.orig/drivers/mtd/cybertan_part.c linux-4.1.13/drivers/mtd/cybertan_part.c ---- linux-4.1.13.orig/drivers/mtd/cybertan_part.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/cybertan_part.c 2015-09-13 20:04:35.072523889 +0200 -@@ -0,0 +1,201 @@ -+/* -+ * Copyright (C) 2009 Christian Daniel -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ * -+ * TRX flash partition table. -+ * Based on ar7 map by Felix Fietkau -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+struct cybertan_header { -+ char magic[4]; -+ u8 res1[4]; -+ char fw_date[3]; -+ char fw_ver[3]; -+ char id[4]; -+ char hw_ver; -+ char unused; -+ u8 flags[2]; -+ u8 res2[10]; -+}; -+ -+#define TRX_PARTS 6 -+#define TRX_MAGIC 0x30524448 -+#define TRX_MAX_OFFSET 3 -+ -+struct trx_header { -+ uint32_t magic; /* "HDR0" */ -+ uint32_t len; /* Length of file including header */ -+ uint32_t crc32; /* 32-bit CRC from flag_version to end of file */ -+ uint32_t flag_version; /* 0:15 flags, 16:31 version */ -+ uint32_t offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */ -+}; -+ -+#define IH_MAGIC 0x27051956 /* Image Magic Number */ -+#define IH_NMLEN 32 /* Image Name Length */ -+ -+struct uimage_header { -+ uint32_t ih_magic; /* Image Header Magic Number */ -+ uint32_t ih_hcrc; /* Image Header CRC Checksum */ -+ uint32_t ih_time; /* Image Creation Timestamp */ -+ uint32_t ih_size; /* Image Data Size */ -+ uint32_t ih_load; /* Data» Load Address */ -+ uint32_t ih_ep; /* Entry Point Address */ -+ uint32_t ih_dcrc; /* Image Data CRC Checksum */ -+ uint8_t ih_os; /* Operating System */ -+ uint8_t ih_arch; /* CPU architecture */ -+ uint8_t ih_type; /* Image Type */ -+ uint8_t ih_comp; /* Compression Type */ -+ uint8_t ih_name[IH_NMLEN]; /* Image Name */ -+}; -+ -+struct firmware_header { -+ struct cybertan_header cybertan; -+ struct trx_header trx; -+ struct uimage_header uimage; -+} __packed; -+ -+#define UBOOT_LEN 0x40000 -+#define ART_LEN 0x10000 -+#define NVRAM_LEN 0x10000 -+ -+static int cybertan_parse_partitions(struct mtd_info *master, -+ struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct firmware_header *header; -+ struct trx_header *theader; -+ struct uimage_header *uheader; -+ struct mtd_partition *trx_parts; -+ size_t retlen; -+ unsigned int kernel_len; -+ unsigned int uboot_len; -+ unsigned int nvram_len; -+ unsigned int art_len; -+ int ret; -+ -+ uboot_len = max_t(unsigned int, master->erasesize, UBOOT_LEN); -+ nvram_len = max_t(unsigned int, master->erasesize, NVRAM_LEN); -+ art_len = max_t(unsigned int, master->erasesize, ART_LEN); -+ -+ trx_parts = kzalloc(TRX_PARTS * sizeof(struct mtd_partition), -+ GFP_KERNEL); -+ if (!trx_parts) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ header = vmalloc(sizeof(*header)); -+ if (!header) { -+ return -ENOMEM; -+ goto free_parts; -+ } -+ -+ ret = mtd_read(master, uboot_len, sizeof(*header), -+ &retlen, (void *) header); -+ if (ret) -+ goto free_hdr; -+ -+ if (retlen != sizeof(*header)) { -+ ret = -EIO; -+ goto free_hdr; -+ } -+ -+ theader = &header->trx; -+ if (le32_to_cpu(theader->magic) != TRX_MAGIC) { -+ printk(KERN_NOTICE "%s: no TRX header found\n", master->name); -+ goto free_hdr; -+ } -+ -+ uheader = &header->uimage; -+ if (uheader->ih_magic != IH_MAGIC) { -+ printk(KERN_NOTICE "%s: no uImage found\n", master->name); -+ goto free_hdr; -+ } -+ -+ kernel_len = le32_to_cpu(theader->offsets[1]) + -+ sizeof(struct cybertan_header); -+ -+ trx_parts[0].name = "u-boot"; -+ trx_parts[0].offset = 0; -+ trx_parts[0].size = uboot_len; -+ trx_parts[0].mask_flags = MTD_WRITEABLE; -+ -+ trx_parts[1].name = "kernel"; -+ trx_parts[1].offset = trx_parts[0].offset + trx_parts[0].size; -+ trx_parts[1].size = kernel_len; -+ trx_parts[1].mask_flags = 0; -+ -+ trx_parts[2].name = "rootfs"; -+ trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size; -+ trx_parts[2].size = master->size - uboot_len - nvram_len - art_len - -+ trx_parts[1].size; -+ trx_parts[2].mask_flags = 0; -+ -+ trx_parts[3].name = "nvram"; -+ trx_parts[3].offset = master->size - nvram_len - art_len; -+ trx_parts[3].size = nvram_len; -+ trx_parts[3].mask_flags = MTD_WRITEABLE; -+ -+ trx_parts[4].name = "art"; -+ trx_parts[4].offset = master->size - art_len; -+ trx_parts[4].size = art_len; -+ trx_parts[4].mask_flags = MTD_WRITEABLE; -+ -+ trx_parts[5].name = "firmware"; -+ trx_parts[5].offset = uboot_len; -+ trx_parts[5].size = master->size - uboot_len - nvram_len - art_len; -+ trx_parts[5].mask_flags = 0; -+ -+ vfree(header); -+ -+ *pparts = trx_parts; -+ return TRX_PARTS; -+ -+free_hdr: -+ vfree(header); -+free_parts: -+ kfree(trx_parts); -+out: -+ return ret; -+} -+ -+static struct mtd_part_parser cybertan_parser = { -+ .owner = THIS_MODULE, -+ .parse_fn = cybertan_parse_partitions, -+ .name = "cybertan", -+}; -+ -+static int __init cybertan_parser_init(void) -+{ -+ register_mtd_parser(&cybertan_parser); -+ -+ return 0; -+} -+ -+module_init(cybertan_parser_init); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Christian Daniel "); -diff -Nur linux-4.1.13.orig/drivers/mtd/devices/m25p80.c linux-4.1.13/drivers/mtd/devices/m25p80.c ---- linux-4.1.13.orig/drivers/mtd/devices/m25p80.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/devices/m25p80.c 2015-12-04 19:57:03.966105410 +0100 -@@ -139,10 +139,15 @@ - flash->command[0] = nor->read_opcode; - m25p_addr2cmd(nor, from, flash->command); - -+ if (dummy == 1) -+ t[0].dummy = true; -+ -+ t[0].type = SPI_TRANSFER_FLASH_READ_CMD; - t[0].tx_buf = flash->command; - t[0].len = m25p_cmdsz(nor) + dummy; - spi_message_add_tail(&t[0], &m); - -+ t[1].type = SPI_TRANSFER_FLASH_READ_DATA; - t[1].rx_buf = buf; - t[1].rx_nbits = m25p80_rx_nbits(nor); - t[1].len = len; -@@ -232,6 +237,7 @@ - if (ret) - return ret; - -+ memset(&ppdata, '\0', sizeof(ppdata)); - ppdata.of_node = spi->dev.of_node; - - return mtd_device_parse_register(&flash->mtd, NULL, &ppdata, -diff -Nur linux-4.1.13.orig/drivers/mtd/Kconfig linux-4.1.13/drivers/mtd/Kconfig ---- linux-4.1.13.orig/drivers/mtd/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/Kconfig 2015-12-04 19:57:03.850112998 +0100 -@@ -155,6 +155,12 @@ - This provides partitions parser for devices based on BCM47xx - boards. - -+config MTD_TPLINK_PARTS -+ tristate "TP-Link AR7XXX/AR9XXX partitioning support" -+ depends on ATH79 -+ ---help--- -+ TBD. -+ - comment "User Modules And Translation Layers" - - # -diff -Nur linux-4.1.13.orig/drivers/mtd/maps/physmap.c linux-4.1.13/drivers/mtd/maps/physmap.c ---- linux-4.1.13.orig/drivers/mtd/maps/physmap.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/maps/physmap.c 2015-12-04 19:57:03.830114307 +0100 -@@ -31,6 +31,66 @@ - int vpp_refcnt; - }; - -+static struct platform_device *physmap_map2pdev(struct map_info *map) -+{ -+ return (struct platform_device *) map->map_priv_1; -+} -+ -+static void physmap_lock(struct map_info *map) -+{ -+ struct platform_device *pdev; -+ struct physmap_flash_data *physmap_data; -+ -+ pdev = physmap_map2pdev(map); -+ physmap_data = pdev->dev.platform_data; -+ physmap_data->lock(pdev); -+} -+ -+static void physmap_unlock(struct map_info *map) -+{ -+ struct platform_device *pdev; -+ struct physmap_flash_data *physmap_data; -+ -+ pdev = physmap_map2pdev(map); -+ physmap_data = pdev->dev.platform_data; -+ physmap_data->unlock(pdev); -+} -+ -+static map_word physmap_flash_read_lock(struct map_info *map, unsigned long ofs) -+{ -+ map_word ret; -+ -+ physmap_lock(map); -+ ret = inline_map_read(map, ofs); -+ physmap_unlock(map); -+ -+ return ret; -+} -+ -+static void physmap_flash_write_lock(struct map_info *map, map_word d, -+ unsigned long ofs) -+{ -+ physmap_lock(map); -+ inline_map_write(map, d, ofs); -+ physmap_unlock(map); -+} -+ -+static void physmap_flash_copy_from_lock(struct map_info *map, void *to, -+ unsigned long from, ssize_t len) -+{ -+ physmap_lock(map); -+ inline_map_copy_from(map, to, from, len); -+ physmap_unlock(map); -+} -+ -+static void physmap_flash_copy_to_lock(struct map_info *map, unsigned long to, -+ const void *from, ssize_t len) -+{ -+ physmap_lock(map); -+ inline_map_copy_to(map, to, from, len); -+ physmap_unlock(map); -+} -+ - static int physmap_flash_remove(struct platform_device *dev) - { - struct physmap_flash_info *info; -@@ -153,6 +213,13 @@ - - simple_map_init(&info->map[i]); - -+ if (physmap_data->lock && physmap_data->unlock) { -+ info->map[i].read = physmap_flash_read_lock; -+ info->map[i].write = physmap_flash_write_lock; -+ info->map[i].copy_from = physmap_flash_copy_from_lock; -+ info->map[i].copy_to = physmap_flash_copy_to_lock; -+ } -+ - probe_type = rom_probe_types; - if (physmap_data->probe_type == NULL) { - for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) -diff -Nur linux-4.1.13.orig/drivers/mtd/nand/ar934x_nfc.c linux-4.1.13/drivers/mtd/nand/ar934x_nfc.c ---- linux-4.1.13.orig/drivers/mtd/nand/ar934x_nfc.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/nand/ar934x_nfc.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,1508 @@ -+/* -+ * Driver for the built-in NAND controller of the Atheros AR934x SoCs -+ * -+ * Copyright (C) 2011-2013 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#define AR934X_NFC_REG_CMD 0x00 -+#define AR934X_NFC_REG_CTRL 0x04 -+#define AR934X_NFC_REG_STATUS 0x08 -+#define AR934X_NFC_REG_INT_MASK 0x0c -+#define AR934X_NFC_REG_INT_STATUS 0x10 -+#define AR934X_NFC_REG_ECC_CTRL 0x14 -+#define AR934X_NFC_REG_ECC_OFFSET 0x18 -+#define AR934X_NFC_REG_ADDR0_0 0x1c -+#define AR934X_NFC_REG_ADDR0_1 0x24 -+#define AR934X_NFC_REG_ADDR1_0 0x20 -+#define AR934X_NFC_REG_ADDR1_1 0x28 -+#define AR934X_NFC_REG_SPARE_SIZE 0x30 -+#define AR934X_NFC_REG_PROTECT 0x38 -+#define AR934X_NFC_REG_LOOKUP_EN 0x40 -+#define AR934X_NFC_REG_LOOKUP(_x) (0x44 + (_i) * 4) -+#define AR934X_NFC_REG_DMA_ADDR 0x64 -+#define AR934X_NFC_REG_DMA_COUNT 0x68 -+#define AR934X_NFC_REG_DMA_CTRL 0x6c -+#define AR934X_NFC_REG_MEM_CTRL 0x80 -+#define AR934X_NFC_REG_DATA_SIZE 0x84 -+#define AR934X_NFC_REG_READ_STATUS 0x88 -+#define AR934X_NFC_REG_TIME_SEQ 0x8c -+#define AR934X_NFC_REG_TIMINGS_ASYN 0x90 -+#define AR934X_NFC_REG_TIMINGS_SYN 0x94 -+#define AR934X_NFC_REG_FIFO_DATA 0x98 -+#define AR934X_NFC_REG_TIME_MODE 0x9c -+#define AR934X_NFC_REG_DMA_ADDR_OFFS 0xa0 -+#define AR934X_NFC_REG_FIFO_INIT 0xb0 -+#define AR934X_NFC_REG_GEN_SEQ_CTRL 0xb4 -+ -+#define AR934X_NFC_CMD_CMD_SEQ_S 0 -+#define AR934X_NFC_CMD_CMD_SEQ_M 0x3f -+#define AR934X_NFC_CMD_SEQ_1C 0x00 -+#define AR934X_NFC_CMD_SEQ_ERASE 0x0e -+#define AR934X_NFC_CMD_SEQ_12 0x0c -+#define AR934X_NFC_CMD_SEQ_1C1AXR 0x21 -+#define AR934X_NFC_CMD_SEQ_S 0x24 -+#define AR934X_NFC_CMD_SEQ_1C3AXR 0x27 -+#define AR934X_NFC_CMD_SEQ_1C5A1CXR 0x2a -+#define AR934X_NFC_CMD_SEQ_18 0x32 -+#define AR934X_NFC_CMD_INPUT_SEL_SIU 0 -+#define AR934X_NFC_CMD_INPUT_SEL_DMA BIT(6) -+#define AR934X_NFC_CMD_ADDR_SEL_0 0 -+#define AR934X_NFC_CMD_ADDR_SEL_1 BIT(7) -+#define AR934X_NFC_CMD_CMD0_S 8 -+#define AR934X_NFC_CMD_CMD0_M 0xff -+#define AR934X_NFC_CMD_CMD1_S 16 -+#define AR934X_NFC_CMD_CMD1_M 0xff -+#define AR934X_NFC_CMD_CMD2_S 24 -+#define AR934X_NFC_CMD_CMD2_M 0xff -+ -+#define AR934X_NFC_CTRL_ADDR_CYCLE0_M 0x7 -+#define AR934X_NFC_CTRL_ADDR_CYCLE0_S 0 -+#define AR934X_NFC_CTRL_SPARE_EN BIT(3) -+#define AR934X_NFC_CTRL_INT_EN BIT(4) -+#define AR934X_NFC_CTRL_ECC_EN BIT(5) -+#define AR934X_NFC_CTRL_BLOCK_SIZE_S 6 -+#define AR934X_NFC_CTRL_BLOCK_SIZE_M 0x3 -+#define AR934X_NFC_CTRL_BLOCK_SIZE_32 0 -+#define AR934X_NFC_CTRL_BLOCK_SIZE_64 1 -+#define AR934X_NFC_CTRL_BLOCK_SIZE_128 2 -+#define AR934X_NFC_CTRL_BLOCK_SIZE_256 3 -+#define AR934X_NFC_CTRL_PAGE_SIZE_S 8 -+#define AR934X_NFC_CTRL_PAGE_SIZE_M 0x7 -+#define AR934X_NFC_CTRL_PAGE_SIZE_256 0 -+#define AR934X_NFC_CTRL_PAGE_SIZE_512 1 -+#define AR934X_NFC_CTRL_PAGE_SIZE_1024 2 -+#define AR934X_NFC_CTRL_PAGE_SIZE_2048 3 -+#define AR934X_NFC_CTRL_PAGE_SIZE_4096 4 -+#define AR934X_NFC_CTRL_PAGE_SIZE_8192 5 -+#define AR934X_NFC_CTRL_PAGE_SIZE_16384 6 -+#define AR934X_NFC_CTRL_CUSTOM_SIZE_EN BIT(11) -+#define AR934X_NFC_CTRL_IO_WIDTH_8BITS 0 -+#define AR934X_NFC_CTRL_IO_WIDTH_16BITS BIT(12) -+#define AR934X_NFC_CTRL_LOOKUP_EN BIT(13) -+#define AR934X_NFC_CTRL_PROT_EN BIT(14) -+#define AR934X_NFC_CTRL_WORK_MODE_ASYNC 0 -+#define AR934X_NFC_CTRL_WORK_MODE_SYNC BIT(15) -+#define AR934X_NFC_CTRL_ADDR0_AUTO_INC BIT(16) -+#define AR934X_NFC_CTRL_ADDR1_AUTO_INC BIT(17) -+#define AR934X_NFC_CTRL_ADDR_CYCLE1_M 0x7 -+#define AR934X_NFC_CTRL_ADDR_CYCLE1_S 18 -+#define AR934X_NFC_CTRL_SMALL_PAGE BIT(21) -+ -+#define AR934X_NFC_DMA_CTRL_DMA_START BIT(7) -+#define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE 0 -+#define AR934X_NFC_DMA_CTRL_DMA_DIR_READ BIT(6) -+#define AR934X_NFC_DMA_CTRL_DMA_MODE_SG BIT(5) -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_S 2 -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_0 0 -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_1 1 -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_2 2 -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_3 3 -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_4 4 -+#define AR934X_NFC_DMA_CTRL_DMA_BURST_5 5 -+#define AR934X_NFC_DMA_CTRL_ERR_FLAG BIT(1) -+#define AR934X_NFC_DMA_CTRL_DMA_READY BIT(0) -+ -+#define AR934X_NFC_INT_DEV_RDY(_x) BIT(4 + (_x)) -+#define AR934X_NFC_INT_CMD_END BIT(1) -+ -+#define AR934X_NFC_ECC_CTRL_ERR_THRES_S 8 -+#define AR934X_NFC_ECC_CTRL_ERR_THRES_M 0x1f -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_S 5 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_M 0x7 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_2 0 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_4 1 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_6 2 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_8 3 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_10 4 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_12 5 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_14 6 -+#define AR934X_NFC_ECC_CTRL_ECC_CAP_16 7 -+#define AR934X_NFC_ECC_CTRL_ERR_OVER BIT(2) -+#define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT BIT(1) -+#define AR934X_NFC_ECC_CTRL_ERR_CORRECT BIT(0) -+ -+#define AR934X_NFC_ECC_OFFS_OFSET_M 0xffff -+ -+/* default timing values */ -+#define AR934X_NFC_TIME_SEQ_DEFAULT 0x7fff -+#define AR934X_NFC_TIMINGS_ASYN_DEFAULT 0x22 -+#define AR934X_NFC_TIMINGS_SYN_DEFAULT 0xf -+ -+#define AR934X_NFC_ID_BUF_SIZE 8 -+#define AR934X_NFC_DEV_READY_TIMEOUT 25 /* msecs */ -+#define AR934X_NFC_DMA_READY_TIMEOUT 25 /* msecs */ -+#define AR934X_NFC_DONE_TIMEOUT 1000 -+#define AR934X_NFC_DMA_RETRIES 20 -+ -+#define AR934X_NFC_USE_IRQ true -+#define AR934X_NFC_IRQ_MASK AR934X_NFC_INT_DEV_RDY(0) -+ -+#define AR934X_NFC_GENSEQ_SMALL_PAGE_READ 0x30043 -+ -+#undef AR934X_NFC_DEBUG_DATA -+#undef AR934X_NFC_DEBUG -+ -+struct ar934x_nfc; -+ -+static inline __attribute__ ((format (printf, 2, 3))) -+void _nfc_dbg(struct ar934x_nfc *nfc, const char *fmt, ...) -+{ -+} -+ -+#ifdef AR934X_NFC_DEBUG -+#define nfc_dbg(_nfc, fmt, ...) \ -+ dev_info((_nfc)->parent, fmt, ##__VA_ARGS__) -+#else -+#define nfc_dbg(_nfc, fmt, ...) \ -+ _nfc_dbg((_nfc), fmt, ##__VA_ARGS__) -+#endif /* AR934X_NFC_DEBUG */ -+ -+#ifdef AR934X_NFC_DEBUG_DATA -+static void -+nfc_debug_data(const char *label, void *data, int len) -+{ -+ print_hex_dump(KERN_WARNING, label, DUMP_PREFIX_OFFSET, 16, 1, -+ data, len, 0); -+} -+#else -+static inline void -+nfc_debug_data(const char *label, void *data, int len) {} -+#endif /* AR934X_NFC_DEBUG_DATA */ -+ -+struct ar934x_nfc { -+ struct mtd_info mtd; -+ struct nand_chip nand_chip; -+ struct device *parent; -+ void __iomem *base; -+ void (*select_chip)(int chip_no); -+ bool swap_dma; -+ int irq; -+ wait_queue_head_t irq_waitq; -+ -+ bool spurious_irq_expected; -+ u32 irq_status; -+ -+ u32 ctrl_reg; -+ u32 ecc_ctrl_reg; -+ u32 ecc_offset_reg; -+ u32 ecc_thres; -+ u32 ecc_oob_pos; -+ -+ bool small_page; -+ unsigned int addr_count0; -+ unsigned int addr_count1; -+ -+ u8 *buf; -+ dma_addr_t buf_dma; -+ unsigned int buf_size; -+ int buf_index; -+ -+ bool read_id; -+ -+ int erase1_page_addr; -+ -+ int rndout_page_addr; -+ int rndout_read_cmd; -+ -+ int seqin_page_addr; -+ int seqin_column; -+ int seqin_read_cmd; -+}; -+ -+static void ar934x_nfc_restart(struct ar934x_nfc *nfc); -+ -+static inline bool -+is_all_ff(u8 *buf, int len) -+{ -+ while (len--) -+ if (buf[len] != 0xff) -+ return false; -+ -+ return true; -+} -+ -+static inline void -+ar934x_nfc_wr(struct ar934x_nfc *nfc, unsigned reg, u32 val) -+{ -+ __raw_writel(val, nfc->base + reg); -+} -+ -+static inline u32 -+ar934x_nfc_rr(struct ar934x_nfc *nfc, unsigned reg) -+{ -+ return __raw_readl(nfc->base + reg); -+} -+ -+static inline struct ar934x_nfc_platform_data * -+ar934x_nfc_get_platform_data(struct ar934x_nfc *nfc) -+{ -+ return nfc->parent->platform_data; -+} -+ -+static inline struct -+ar934x_nfc *mtd_to_ar934x_nfc(struct mtd_info *mtd) -+{ -+ return container_of(mtd, struct ar934x_nfc, mtd); -+} -+ -+static inline bool ar934x_nfc_use_irq(struct ar934x_nfc *nfc) -+{ -+ return AR934X_NFC_USE_IRQ; -+} -+ -+static inline void ar934x_nfc_write_cmd_reg(struct ar934x_nfc *nfc, u32 cmd_reg) -+{ -+ wmb(); -+ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CMD, cmd_reg); -+ /* flush write */ -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_CMD); -+} -+ -+static bool -+__ar934x_nfc_dev_ready(struct ar934x_nfc *nfc) -+{ -+ u32 status; -+ -+ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_STATUS); -+ return (status & 0xff) == 0xff; -+} -+ -+static inline bool -+__ar934x_nfc_is_dma_ready(struct ar934x_nfc *nfc) -+{ -+ u32 status; -+ -+ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_DMA_CTRL); -+ return (status & AR934X_NFC_DMA_CTRL_DMA_READY) != 0; -+} -+ -+static int -+ar934x_nfc_wait_dev_ready(struct ar934x_nfc *nfc) -+{ -+ unsigned long timeout; -+ -+ timeout = jiffies + msecs_to_jiffies(AR934X_NFC_DEV_READY_TIMEOUT); -+ do { -+ if (__ar934x_nfc_dev_ready(nfc)) -+ return 0; -+ } while time_before(jiffies, timeout); -+ -+ nfc_dbg(nfc, "timeout waiting for device ready, status:%08x int:%08x\n", -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_STATUS), -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS)); -+ return -ETIMEDOUT; -+} -+ -+static int -+ar934x_nfc_wait_dma_ready(struct ar934x_nfc *nfc) -+{ -+ unsigned long timeout; -+ -+ timeout = jiffies + msecs_to_jiffies(AR934X_NFC_DMA_READY_TIMEOUT); -+ do { -+ if (__ar934x_nfc_is_dma_ready(nfc)) -+ return 0; -+ } while time_before(jiffies, timeout); -+ -+ nfc_dbg(nfc, "timeout waiting for DMA ready, dma_ctrl:%08x\n", -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_DMA_CTRL)); -+ return -ETIMEDOUT; -+} -+ -+static int -+ar934x_nfc_wait_irq(struct ar934x_nfc *nfc) -+{ -+ long timeout; -+ int ret; -+ -+ timeout = wait_event_timeout(nfc->irq_waitq, -+ (nfc->irq_status & AR934X_NFC_IRQ_MASK) != 0, -+ msecs_to_jiffies(AR934X_NFC_DEV_READY_TIMEOUT)); -+ -+ ret = 0; -+ if (!timeout) { -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_MASK, 0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); -+ /* flush write */ -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); -+ -+ nfc_dbg(nfc, -+ "timeout waiting for interrupt, status:%08x\n", -+ nfc->irq_status); -+ ret = -ETIMEDOUT; -+ } -+ -+ nfc->irq_status = 0; -+ return ret; -+} -+ -+static int -+ar934x_nfc_wait_done(struct ar934x_nfc *nfc) -+{ -+ int ret; -+ -+ if (ar934x_nfc_use_irq(nfc)) -+ ret = ar934x_nfc_wait_irq(nfc); -+ else -+ ret = ar934x_nfc_wait_dev_ready(nfc); -+ -+ if (ret) -+ return ret; -+ -+ return ar934x_nfc_wait_dma_ready(nfc); -+} -+ -+static int -+ar934x_nfc_alloc_buf(struct ar934x_nfc *nfc, unsigned size) -+{ -+ nfc->buf = dma_alloc_coherent(nfc->parent, size, -+ &nfc->buf_dma, GFP_KERNEL); -+ if (nfc->buf == NULL) { -+ dev_err(nfc->parent, "no memory for DMA buffer\n"); -+ return -ENOMEM; -+ } -+ -+ nfc->buf_size = size; -+ nfc_dbg(nfc, "buf:%p size:%u\n", nfc->buf, nfc->buf_size); -+ -+ return 0; -+} -+ -+static void -+ar934x_nfc_free_buf(struct ar934x_nfc *nfc) -+{ -+ dma_free_coherent(nfc->parent, nfc->buf_size, nfc->buf, nfc->buf_dma); -+} -+ -+static void -+ar934x_nfc_get_addr(struct ar934x_nfc *nfc, int column, int page_addr, -+ u32 *addr0, u32 *addr1) -+{ -+ u32 a0, a1; -+ -+ a0 = 0; -+ a1 = 0; -+ -+ if (column == -1) { -+ /* ERASE1 */ -+ a0 = (page_addr & 0xffff) << 16; -+ a1 = (page_addr >> 16) & 0xf; -+ } else if (page_addr != -1) { -+ /* SEQIN, READ0, etc.. */ -+ -+ /* TODO: handle 16bit bus width */ -+ if (nfc->small_page) { -+ a0 = column & 0xff; -+ a0 |= (page_addr & 0xff) << 8; -+ a0 |= ((page_addr >> 8) & 0xff) << 16; -+ a0 |= ((page_addr >> 16) & 0xff) << 24; -+ } else { -+ a0 = column & 0x0FFF; -+ a0 |= (page_addr & 0xffff) << 16; -+ -+ if (nfc->addr_count0 > 4) -+ a1 = (page_addr >> 16) & 0xf; -+ } -+ } -+ -+ *addr0 = a0; -+ *addr1 = a1; -+} -+ -+static void -+ar934x_nfc_send_cmd(struct ar934x_nfc *nfc, unsigned command) -+{ -+ u32 cmd_reg; -+ -+ cmd_reg = AR934X_NFC_CMD_INPUT_SEL_SIU | AR934X_NFC_CMD_ADDR_SEL_0 | -+ AR934X_NFC_CMD_SEQ_1C; -+ cmd_reg |= (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; -+ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); -+ -+ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); -+ ar934x_nfc_wait_dev_ready(nfc); -+} -+ -+static int -+ar934x_nfc_do_rw_command(struct ar934x_nfc *nfc, int column, int page_addr, -+ int len, u32 cmd_reg, u32 ctrl_reg, bool write) -+{ -+ u32 addr0, addr1; -+ u32 dma_ctrl; -+ int dir; -+ int err; -+ int retries = 0; -+ -+ WARN_ON(len & 3); -+ -+ if (WARN_ON(len > nfc->buf_size)) -+ dev_err(nfc->parent, "len=%d > buf_size=%d", len, nfc->buf_size); -+ -+ if (write) { -+ dma_ctrl = AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE; -+ dir = DMA_TO_DEVICE; -+ } else { -+ dma_ctrl = AR934X_NFC_DMA_CTRL_DMA_DIR_READ; -+ dir = DMA_FROM_DEVICE; -+ } -+ -+ ar934x_nfc_get_addr(nfc, column, page_addr, &addr0, &addr1); -+ -+ dma_ctrl |= AR934X_NFC_DMA_CTRL_DMA_START | -+ (AR934X_NFC_DMA_CTRL_DMA_BURST_3 << -+ AR934X_NFC_DMA_CTRL_DMA_BURST_S); -+ -+ cmd_reg |= AR934X_NFC_CMD_INPUT_SEL_DMA | AR934X_NFC_CMD_ADDR_SEL_0; -+ ctrl_reg |= AR934X_NFC_CTRL_INT_EN; -+ -+ nfc_dbg(nfc, "%s a0:%08x a1:%08x len:%x cmd:%08x dma:%08x ctrl:%08x\n", -+ (write) ? "write" : "read", -+ addr0, addr1, len, cmd_reg, dma_ctrl, ctrl_reg); -+ -+retry: -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_0, addr0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_1, addr1); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_ADDR, nfc->buf_dma); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_COUNT, len); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DATA_SIZE, len); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, ctrl_reg); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_CTRL, dma_ctrl); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ECC_CTRL, nfc->ecc_ctrl_reg); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ECC_OFFSET, nfc->ecc_offset_reg); -+ -+ if (ar934x_nfc_use_irq(nfc)) { -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_MASK, AR934X_NFC_IRQ_MASK); -+ /* flush write */ -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_MASK); -+ } -+ -+ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); -+ err = ar934x_nfc_wait_done(nfc); -+ if (err) { -+ dev_dbg(nfc->parent, "%s operation stuck at page %d\n", -+ (write) ? "write" : "read", page_addr); -+ -+ ar934x_nfc_restart(nfc); -+ if (retries++ < AR934X_NFC_DMA_RETRIES) -+ goto retry; -+ -+ dev_err(nfc->parent, "%s operation failed on page %d\n", -+ (write) ? "write" : "read", page_addr); -+ } -+ -+ return err; -+} -+ -+static int -+ar934x_nfc_send_readid(struct ar934x_nfc *nfc, unsigned command) -+{ -+ u32 cmd_reg; -+ int err; -+ -+ nfc_dbg(nfc, "readid, cmd:%02x\n", command); -+ -+ cmd_reg = AR934X_NFC_CMD_SEQ_1C1AXR; -+ cmd_reg |= (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; -+ -+ err = ar934x_nfc_do_rw_command(nfc, -1, -1, AR934X_NFC_ID_BUF_SIZE, -+ cmd_reg, nfc->ctrl_reg, false); -+ -+ nfc_debug_data("[id] ", nfc->buf, AR934X_NFC_ID_BUF_SIZE); -+ -+ return err; -+} -+ -+static int -+ar934x_nfc_send_read(struct ar934x_nfc *nfc, unsigned command, int column, -+ int page_addr, int len) -+{ -+ u32 cmd_reg; -+ int err; -+ -+ nfc_dbg(nfc, "read, column=%d page=%d len=%d\n", -+ column, page_addr, len); -+ -+ cmd_reg = (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; -+ -+ if (nfc->small_page) { -+ cmd_reg |= AR934X_NFC_CMD_SEQ_18; -+ } else { -+ cmd_reg |= NAND_CMD_READSTART << AR934X_NFC_CMD_CMD1_S; -+ cmd_reg |= AR934X_NFC_CMD_SEQ_1C5A1CXR; -+ } -+ -+ err = ar934x_nfc_do_rw_command(nfc, column, page_addr, len, -+ cmd_reg, nfc->ctrl_reg, false); -+ -+ nfc_debug_data("[data] ", nfc->buf, len); -+ -+ return err; -+} -+ -+static void -+ar934x_nfc_send_erase(struct ar934x_nfc *nfc, unsigned command, int column, -+ int page_addr) -+{ -+ u32 addr0, addr1; -+ u32 ctrl_reg; -+ u32 cmd_reg; -+ -+ ar934x_nfc_get_addr(nfc, column, page_addr, &addr0, &addr1); -+ -+ ctrl_reg = nfc->ctrl_reg; -+ if (nfc->small_page) { -+ /* override number of address cycles for the erase command */ -+ ctrl_reg &= ~(AR934X_NFC_CTRL_ADDR_CYCLE0_M << -+ AR934X_NFC_CTRL_ADDR_CYCLE0_S); -+ ctrl_reg &= ~(AR934X_NFC_CTRL_ADDR_CYCLE1_M << -+ AR934X_NFC_CTRL_ADDR_CYCLE1_S); -+ ctrl_reg &= ~(AR934X_NFC_CTRL_SMALL_PAGE); -+ ctrl_reg |= (nfc->addr_count0 + 1) << -+ AR934X_NFC_CTRL_ADDR_CYCLE0_S; -+ } -+ -+ cmd_reg = NAND_CMD_ERASE1 << AR934X_NFC_CMD_CMD0_S; -+ cmd_reg |= command << AR934X_NFC_CMD_CMD1_S; -+ cmd_reg |= AR934X_NFC_CMD_SEQ_ERASE; -+ -+ nfc_dbg(nfc, "erase page %d, a0:%08x a1:%08x cmd:%08x ctrl:%08x\n", -+ page_addr, addr0, addr1, cmd_reg, ctrl_reg); -+ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, ctrl_reg); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_0, addr0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_1, addr1); -+ -+ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); -+ ar934x_nfc_wait_dev_ready(nfc); -+} -+ -+static int -+ar934x_nfc_send_write(struct ar934x_nfc *nfc, unsigned command, int column, -+ int page_addr, int len) -+{ -+ u32 cmd_reg; -+ -+ nfc_dbg(nfc, "write, column=%d page=%d len=%d\n", -+ column, page_addr, len); -+ -+ nfc_debug_data("[data] ", nfc->buf, len); -+ -+ cmd_reg = NAND_CMD_SEQIN << AR934X_NFC_CMD_CMD0_S; -+ cmd_reg |= command << AR934X_NFC_CMD_CMD1_S; -+ cmd_reg |= AR934X_NFC_CMD_SEQ_12; -+ -+ return ar934x_nfc_do_rw_command(nfc, column, page_addr, len, -+ cmd_reg, nfc->ctrl_reg, true); -+} -+ -+static void -+ar934x_nfc_read_status(struct ar934x_nfc *nfc) -+{ -+ u32 cmd_reg; -+ u32 status; -+ -+ cmd_reg = NAND_CMD_STATUS << AR934X_NFC_CMD_CMD0_S; -+ cmd_reg |= AR934X_NFC_CMD_SEQ_S; -+ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); -+ -+ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); -+ ar934x_nfc_wait_dev_ready(nfc); -+ -+ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_READ_STATUS); -+ -+ nfc_dbg(nfc, "read status, cmd:%08x status:%02x\n", -+ cmd_reg, (status & 0xff)); -+ -+ if (nfc->swap_dma) -+ nfc->buf[0 ^ 3] = status; -+ else -+ nfc->buf[0] = status; -+} -+ -+static void -+ar934x_nfc_cmdfunc(struct mtd_info *mtd, unsigned int command, int column, -+ int page_addr) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ struct nand_chip *nand = mtd->priv; -+ -+ nfc->read_id = false; -+ if (command != NAND_CMD_PAGEPROG) -+ nfc->buf_index = 0; -+ -+ switch (command) { -+ case NAND_CMD_RESET: -+ ar934x_nfc_send_cmd(nfc, command); -+ break; -+ -+ case NAND_CMD_READID: -+ nfc->read_id = true; -+ ar934x_nfc_send_readid(nfc, command); -+ break; -+ -+ case NAND_CMD_READ0: -+ case NAND_CMD_READ1: -+ if (nfc->small_page) { -+ ar934x_nfc_send_read(nfc, command, column, page_addr, -+ mtd->writesize + mtd->oobsize); -+ } else { -+ ar934x_nfc_send_read(nfc, command, 0, page_addr, -+ mtd->writesize + mtd->oobsize); -+ nfc->buf_index = column; -+ nfc->rndout_page_addr = page_addr; -+ nfc->rndout_read_cmd = command; -+ } -+ break; -+ -+ case NAND_CMD_READOOB: -+ if (nfc->small_page) -+ ar934x_nfc_send_read(nfc, NAND_CMD_READOOB, -+ column, page_addr, -+ mtd->oobsize); -+ else -+ ar934x_nfc_send_read(nfc, NAND_CMD_READ0, -+ mtd->writesize, page_addr, -+ mtd->oobsize); -+ break; -+ -+ case NAND_CMD_RNDOUT: -+ if (WARN_ON(nfc->small_page)) -+ break; -+ -+ /* emulate subpage read */ -+ ar934x_nfc_send_read(nfc, nfc->rndout_read_cmd, 0, -+ nfc->rndout_page_addr, -+ mtd->writesize + mtd->oobsize); -+ nfc->buf_index = column; -+ break; -+ -+ case NAND_CMD_ERASE1: -+ nfc->erase1_page_addr = page_addr; -+ break; -+ -+ case NAND_CMD_ERASE2: -+ ar934x_nfc_send_erase(nfc, command, -1, nfc->erase1_page_addr); -+ break; -+ -+ case NAND_CMD_STATUS: -+ ar934x_nfc_read_status(nfc); -+ break; -+ -+ case NAND_CMD_SEQIN: -+ if (nfc->small_page) { -+ /* output read command */ -+ if (column >= mtd->writesize) { -+ column -= mtd->writesize; -+ nfc->seqin_read_cmd = NAND_CMD_READOOB; -+ } else if (column < 256) { -+ nfc->seqin_read_cmd = NAND_CMD_READ0; -+ } else { -+ column -= 256; -+ nfc->seqin_read_cmd = NAND_CMD_READ1; -+ } -+ } else { -+ nfc->seqin_read_cmd = NAND_CMD_READ0; -+ } -+ nfc->seqin_column = column; -+ nfc->seqin_page_addr = page_addr; -+ break; -+ -+ case NAND_CMD_PAGEPROG: -+ if (nand->ecc.mode == NAND_ECC_HW) { -+ /* the data is already written */ -+ break; -+ } -+ -+ if (nfc->small_page) -+ ar934x_nfc_send_cmd(nfc, nfc->seqin_read_cmd); -+ -+ ar934x_nfc_send_write(nfc, command, nfc->seqin_column, -+ nfc->seqin_page_addr, -+ nfc->buf_index); -+ break; -+ -+ default: -+ dev_err(nfc->parent, -+ "unsupported command: %x, column:%d page_addr=%d\n", -+ command, column, page_addr); -+ break; -+ } -+} -+ -+static int -+ar934x_nfc_dev_ready(struct mtd_info *mtd) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ -+ return __ar934x_nfc_dev_ready(nfc); -+} -+ -+static void -+ar934x_nfc_select_chip(struct mtd_info *mtd, int chip_no) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ -+ if (nfc->select_chip) -+ nfc->select_chip(chip_no); -+} -+ -+static u8 -+ar934x_nfc_read_byte(struct mtd_info *mtd) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ u8 data; -+ -+ WARN_ON(nfc->buf_index >= nfc->buf_size); -+ -+ if (nfc->swap_dma || nfc->read_id) -+ data = nfc->buf[nfc->buf_index ^ 3]; -+ else -+ data = nfc->buf[nfc->buf_index]; -+ -+ nfc->buf_index++; -+ -+ return data; -+} -+ -+static void -+ar934x_nfc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ int i; -+ -+ WARN_ON(nfc->buf_index + len > nfc->buf_size); -+ -+ if (nfc->swap_dma) { -+ for (i = 0; i < len; i++) { -+ nfc->buf[nfc->buf_index ^ 3] = buf[i]; -+ nfc->buf_index++; -+ } -+ } else { -+ for (i = 0; i < len; i++) { -+ nfc->buf[nfc->buf_index] = buf[i]; -+ nfc->buf_index++; -+ } -+ } -+} -+ -+static void -+ar934x_nfc_read_buf(struct mtd_info *mtd, u8 *buf, int len) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ int buf_index; -+ int i; -+ -+ WARN_ON(nfc->buf_index + len > nfc->buf_size); -+ -+ buf_index = nfc->buf_index; -+ -+ if (nfc->swap_dma || nfc->read_id) { -+ for (i = 0; i < len; i++) { -+ buf[i] = nfc->buf[buf_index ^ 3]; -+ buf_index++; -+ } -+ } else { -+ for (i = 0; i < len; i++) { -+ buf[i] = nfc->buf[buf_index]; -+ buf_index++; -+ } -+ } -+ -+ nfc->buf_index = buf_index; -+} -+ -+static inline void -+ar934x_nfc_enable_hwecc(struct ar934x_nfc *nfc) -+{ -+ nfc->ctrl_reg |= AR934X_NFC_CTRL_ECC_EN; -+ nfc->ctrl_reg &= ~AR934X_NFC_CTRL_CUSTOM_SIZE_EN; -+} -+ -+static inline void -+ar934x_nfc_disable_hwecc(struct ar934x_nfc *nfc) -+{ -+ nfc->ctrl_reg &= ~AR934X_NFC_CTRL_ECC_EN; -+ nfc->ctrl_reg |= AR934X_NFC_CTRL_CUSTOM_SIZE_EN; -+} -+ -+static int -+ar934x_nfc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, -+ int page) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ int err; -+ -+ nfc_dbg(nfc, "read_oob: page:%d\n", page); -+ -+ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, mtd->writesize, page, -+ mtd->oobsize); -+ if (err) -+ return err; -+ -+ memcpy(chip->oob_poi, nfc->buf, mtd->oobsize); -+ -+ return 0; -+} -+ -+static int -+ar934x_nfc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, -+ int page) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ -+ nfc_dbg(nfc, "write_oob: page:%d\n", page); -+ -+ memcpy(nfc->buf, chip->oob_poi, mtd->oobsize); -+ -+ return ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, mtd->writesize, -+ page, mtd->oobsize); -+} -+ -+static int -+ar934x_nfc_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, -+ u8 *buf, int oob_required, int page) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ int len; -+ int err; -+ -+ nfc_dbg(nfc, "read_page_raw: page:%d oob:%d\n", page, oob_required); -+ -+ len = mtd->writesize; -+ if (oob_required) -+ len += mtd->oobsize; -+ -+ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, 0, page, len); -+ if (err) -+ return err; -+ -+ memcpy(buf, nfc->buf, mtd->writesize); -+ -+ if (oob_required) -+ memcpy(chip->oob_poi, &nfc->buf[mtd->writesize], mtd->oobsize); -+ -+ return 0; -+} -+ -+static int -+ar934x_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip, -+ u8 *buf, int oob_required, int page) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ u32 ecc_ctrl; -+ int max_bitflips = 0; -+ bool ecc_failed; -+ bool ecc_corrected; -+ int err; -+ -+ nfc_dbg(nfc, "read_page: page:%d oob:%d\n", page, oob_required); -+ -+ ar934x_nfc_enable_hwecc(nfc); -+ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, 0, page, -+ mtd->writesize); -+ ar934x_nfc_disable_hwecc(nfc); -+ -+ if (err) -+ return err; -+ -+ /* TODO: optimize to avoid memcpy */ -+ memcpy(buf, nfc->buf, mtd->writesize); -+ -+ /* read the ECC status */ -+ ecc_ctrl = ar934x_nfc_rr(nfc, AR934X_NFC_REG_ECC_CTRL); -+ ecc_failed = ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_UNCORRECT; -+ ecc_corrected = ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_CORRECT; -+ -+ if (oob_required || ecc_failed) { -+ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, mtd->writesize, -+ page, mtd->oobsize); -+ if (err) -+ return err; -+ -+ if (oob_required) -+ memcpy(chip->oob_poi, nfc->buf, mtd->oobsize); -+ } -+ -+ if (ecc_failed) { -+ /* -+ * The hardware ECC engine reports uncorrectable errors -+ * on empty pages. Check the ECC bytes and the data. If -+ * both contains 0xff bytes only, dont report a failure. -+ * -+ * TODO: prebuild a buffer with 0xff bytes and use memcmp -+ * for better performance? -+ */ -+ if (!is_all_ff(&nfc->buf[nfc->ecc_oob_pos], chip->ecc.total) || -+ !is_all_ff(buf, mtd->writesize)) -+ mtd->ecc_stats.failed++; -+ } else if (ecc_corrected) { -+ /* -+ * The hardware does not report the exact count of the -+ * corrected bitflips, use assumptions based on the -+ * threshold. -+ */ -+ if (ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_OVER) { -+ /* -+ * The number of corrected bitflips exceeds the -+ * threshold. Assume the maximum. -+ */ -+ max_bitflips = chip->ecc.strength * chip->ecc.steps; -+ } else { -+ max_bitflips = nfc->ecc_thres * chip->ecc.steps; -+ } -+ -+ mtd->ecc_stats.corrected += max_bitflips; -+ } -+ -+ return max_bitflips; -+} -+ -+static int -+ar934x_nfc_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, -+ const u8 *buf, int oob_required) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ int page; -+ int len; -+ -+ page = nfc->seqin_page_addr; -+ -+ nfc_dbg(nfc, "write_page_raw: page:%d oob:%d\n", page, oob_required); -+ -+ memcpy(nfc->buf, buf, mtd->writesize); -+ len = mtd->writesize; -+ -+ if (oob_required) { -+ memcpy(&nfc->buf[mtd->writesize], chip->oob_poi, mtd->oobsize); -+ len += mtd->oobsize; -+ } -+ -+ return ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, 0, page, len); -+} -+ -+static int -+ar934x_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip, -+ const u8 *buf, int oob_required) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ int page; -+ int err; -+ -+ page = nfc->seqin_page_addr; -+ -+ nfc_dbg(nfc, "write_page: page:%d oob:%d\n", page, oob_required); -+ -+ /* write OOB first */ -+ if (oob_required && -+ !is_all_ff(chip->oob_poi, mtd->oobsize)) { -+ err = ar934x_nfc_write_oob(mtd, chip, page); -+ if (err) -+ return err; -+ } -+ -+ /* TODO: optimize to avoid memcopy */ -+ memcpy(nfc->buf, buf, mtd->writesize); -+ -+ ar934x_nfc_enable_hwecc(nfc); -+ err = ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, 0, page, -+ mtd->writesize); -+ ar934x_nfc_disable_hwecc(nfc); -+ -+ return err; -+} -+ -+static void -+ar934x_nfc_hw_init(struct ar934x_nfc *nfc) -+{ -+ struct ar934x_nfc_platform_data *pdata; -+ -+ pdata = ar934x_nfc_get_platform_data(nfc); -+ if (pdata->hw_reset) { -+ pdata->hw_reset(true); -+ pdata->hw_reset(false); -+ } -+ -+ /* -+ * setup timings -+ * TODO: make it configurable via platform data -+ */ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIME_SEQ, -+ AR934X_NFC_TIME_SEQ_DEFAULT); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIMINGS_ASYN, -+ AR934X_NFC_TIMINGS_ASYN_DEFAULT); -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIMINGS_SYN, -+ AR934X_NFC_TIMINGS_SYN_DEFAULT); -+ -+ /* disable WP on all chips, and select chip 0 */ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_MEM_CTRL, 0xff00); -+ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_ADDR_OFFS, 0); -+ -+ /* initialize Control register */ -+ nfc->ctrl_reg = AR934X_NFC_CTRL_CUSTOM_SIZE_EN; -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); -+ -+ if (nfc->small_page) { -+ /* Setup generic sequence register for small page reads. */ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_GEN_SEQ_CTRL, -+ AR934X_NFC_GENSEQ_SMALL_PAGE_READ); -+ } -+} -+ -+static void -+ar934x_nfc_restart(struct ar934x_nfc *nfc) -+{ -+ u32 ctrl_reg; -+ -+ if (nfc->select_chip) -+ nfc->select_chip(-1); -+ -+ ctrl_reg = nfc->ctrl_reg; -+ ar934x_nfc_hw_init(nfc); -+ nfc->ctrl_reg = ctrl_reg; -+ -+ if (nfc->select_chip) -+ nfc->select_chip(0); -+ -+ ar934x_nfc_send_cmd(nfc, NAND_CMD_RESET); -+} -+ -+static irqreturn_t -+ar934x_nfc_irq_handler(int irq, void *data) -+{ -+ struct ar934x_nfc *nfc = data; -+ u32 status; -+ -+ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); -+ -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); -+ /* flush write */ -+ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); -+ -+ status &= ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_MASK); -+ if (status) { -+ nfc_dbg(nfc, "got IRQ, status:%08x\n", status); -+ -+ nfc->irq_status = status; -+ nfc->spurious_irq_expected = true; -+ wake_up(&nfc->irq_waitq); -+ } else { -+ if (nfc->spurious_irq_expected) { -+ nfc->spurious_irq_expected = false; -+ } else { -+ dev_warn(nfc->parent, "spurious interrupt\n"); -+ } -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int -+ar934x_nfc_init_tail(struct mtd_info *mtd) -+{ -+ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); -+ struct nand_chip *chip = &nfc->nand_chip; -+ u32 ctrl; -+ u32 t; -+ int err; -+ -+ switch (mtd->oobsize) { -+ case 16: -+ case 64: -+ case 128: -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_SPARE_SIZE, mtd->oobsize); -+ break; -+ -+ default: -+ dev_err(nfc->parent, "unsupported OOB size: %d bytes\n", -+ mtd->oobsize); -+ return -ENXIO; -+ } -+ -+ ctrl = AR934X_NFC_CTRL_CUSTOM_SIZE_EN; -+ -+ switch (mtd->erasesize / mtd->writesize) { -+ case 32: -+ t = AR934X_NFC_CTRL_BLOCK_SIZE_32; -+ break; -+ -+ case 64: -+ t = AR934X_NFC_CTRL_BLOCK_SIZE_64; -+ break; -+ -+ case 128: -+ t = AR934X_NFC_CTRL_BLOCK_SIZE_128; -+ break; -+ -+ case 256: -+ t = AR934X_NFC_CTRL_BLOCK_SIZE_256; -+ break; -+ -+ default: -+ dev_err(nfc->parent, "unsupported block size: %u\n", -+ mtd->erasesize / mtd->writesize); -+ return -ENXIO; -+ } -+ -+ ctrl |= t << AR934X_NFC_CTRL_BLOCK_SIZE_S; -+ -+ switch (mtd->writesize) { -+ case 256: -+ nfc->small_page = 1; -+ t = AR934X_NFC_CTRL_PAGE_SIZE_256; -+ break; -+ -+ case 512: -+ nfc->small_page = 1; -+ t = AR934X_NFC_CTRL_PAGE_SIZE_512; -+ break; -+ -+ case 1024: -+ t = AR934X_NFC_CTRL_PAGE_SIZE_1024; -+ break; -+ -+ case 2048: -+ t = AR934X_NFC_CTRL_PAGE_SIZE_2048; -+ break; -+ -+ case 4096: -+ t = AR934X_NFC_CTRL_PAGE_SIZE_4096; -+ break; -+ -+ case 8192: -+ t = AR934X_NFC_CTRL_PAGE_SIZE_8192; -+ break; -+ -+ case 16384: -+ t = AR934X_NFC_CTRL_PAGE_SIZE_16384; -+ break; -+ -+ default: -+ dev_err(nfc->parent, "unsupported write size: %d bytes\n", -+ mtd->writesize); -+ return -ENXIO; -+ } -+ -+ ctrl |= t << AR934X_NFC_CTRL_PAGE_SIZE_S; -+ -+ if (nfc->small_page) { -+ ctrl |= AR934X_NFC_CTRL_SMALL_PAGE; -+ -+ if (chip->chipsize > (32 << 20)) { -+ nfc->addr_count0 = 4; -+ nfc->addr_count1 = 3; -+ } else if (chip->chipsize > (2 << 16)) { -+ nfc->addr_count0 = 3; -+ nfc->addr_count1 = 2; -+ } else { -+ nfc->addr_count0 = 2; -+ nfc->addr_count1 = 1; -+ } -+ } else { -+ if (chip->chipsize > (128 << 20)) { -+ nfc->addr_count0 = 5; -+ nfc->addr_count1 = 3; -+ } else if (chip->chipsize > (8 << 16)) { -+ nfc->addr_count0 = 4; -+ nfc->addr_count1 = 2; -+ } else { -+ nfc->addr_count0 = 3; -+ nfc->addr_count1 = 1; -+ } -+ } -+ -+ ctrl |= nfc->addr_count0 << AR934X_NFC_CTRL_ADDR_CYCLE0_S; -+ ctrl |= nfc->addr_count1 << AR934X_NFC_CTRL_ADDR_CYCLE1_S; -+ -+ nfc->ctrl_reg = ctrl; -+ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); -+ -+ ar934x_nfc_free_buf(nfc); -+ err = ar934x_nfc_alloc_buf(nfc, mtd->writesize + mtd->oobsize); -+ -+ return err; -+} -+ -+static struct nand_ecclayout ar934x_nfc_oob_64_hwecc = { -+ .eccbytes = 28, -+ .eccpos = { -+ 20, 21, 22, 23, 24, 25, 26, -+ 27, 28, 29, 30, 31, 32, 33, -+ 34, 35, 36, 37, 38, 39, 40, -+ 41, 42, 43, 44, 45, 46, 47, -+ }, -+ .oobfree = { -+ { -+ .offset = 4, -+ .length = 16, -+ }, -+ { -+ .offset = 48, -+ .length = 16, -+ }, -+ }, -+}; -+ -+static int -+ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc) -+{ -+ struct nand_chip *nand = &nfc->nand_chip; -+ u32 ecc_cap; -+ u32 ecc_thres; -+ -+ if (!config_enabled(CONFIG_MTD_NAND_AR934X_HW_ECC)) { -+ dev_err(nfc->parent, "hardware ECC support is disabled\n"); -+ return -EINVAL; -+ } -+ -+ switch (nfc->mtd.writesize) { -+ case 2048: -+ /* -+ * Writing a subpage separately is not supported, because -+ * the controller only does ECC on full-page accesses. -+ */ -+ nand->options = NAND_NO_SUBPAGE_WRITE; -+ -+ nand->ecc.size = 512; -+ nand->ecc.bytes = 7; -+ nand->ecc.strength = 4; -+ nand->ecc.layout = &ar934x_nfc_oob_64_hwecc; -+ break; -+ -+ default: -+ dev_err(nfc->parent, -+ "hardware ECC is not available for %d byte pages\n", -+ nfc->mtd.writesize); -+ return -EINVAL; -+ } -+ -+ BUG_ON(!nand->ecc.layout); -+ -+ switch (nand->ecc.strength) { -+ case 4: -+ ecc_cap = AR934X_NFC_ECC_CTRL_ECC_CAP_4; -+ ecc_thres = 4; -+ break; -+ -+ default: -+ dev_err(nfc->parent, "unsupported ECC strength %u\n", -+ nand->ecc.strength); -+ return -EINVAL; -+ } -+ -+ nfc->ecc_thres = ecc_thres; -+ nfc->ecc_oob_pos = nand->ecc.layout->eccpos[0]; -+ -+ nfc->ecc_ctrl_reg = ecc_cap << AR934X_NFC_ECC_CTRL_ECC_CAP_S; -+ nfc->ecc_ctrl_reg |= ecc_thres << AR934X_NFC_ECC_CTRL_ERR_THRES_S; -+ -+ nfc->ecc_offset_reg = nfc->mtd.writesize + nfc->ecc_oob_pos; -+ -+ nand->ecc.mode = NAND_ECC_HW; -+ nand->ecc.read_page = ar934x_nfc_read_page; -+ nand->ecc.read_page_raw = ar934x_nfc_read_page_raw; -+ nand->ecc.write_page = ar934x_nfc_write_page; -+ nand->ecc.write_page_raw = ar934x_nfc_write_page_raw; -+ nand->ecc.read_oob = ar934x_nfc_read_oob; -+ nand->ecc.write_oob = ar934x_nfc_write_oob; -+ -+ return 0; -+} -+ -+static int -+ar934x_nfc_probe(struct platform_device *pdev) -+{ -+ static const char *part_probes[] = { "cmdlinepart", NULL, }; -+ struct ar934x_nfc_platform_data *pdata; -+ struct ar934x_nfc *nfc; -+ struct resource *res; -+ struct mtd_info *mtd; -+ struct nand_chip *nand; -+ struct mtd_part_parser_data ppdata; -+ int ret; -+ -+ pdata = pdev->dev.platform_data; -+ if (pdata == NULL) { -+ dev_err(&pdev->dev, "no platform data defined\n"); -+ return -EINVAL; -+ } -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ dev_err(&pdev->dev, "failed to get I/O memory\n"); -+ return -EINVAL; -+ } -+ -+ nfc = devm_kzalloc(&pdev->dev, sizeof(struct ar934x_nfc), GFP_KERNEL); -+ if (!nfc) { -+ dev_err(&pdev->dev, "failed to allocate driver data\n"); -+ return -ENOMEM; -+ } -+ -+ nfc->base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(nfc->base)) { -+ dev_err(&pdev->dev, "failed to remap I/O memory\n"); -+ return PTR_ERR(nfc->base); -+ } -+ -+ nfc->irq = platform_get_irq(pdev, 0); -+ if (nfc->irq < 0) { -+ dev_err(&pdev->dev, "no IRQ resource specified\n"); -+ return -EINVAL; -+ } -+ -+ init_waitqueue_head(&nfc->irq_waitq); -+ ret = request_irq(nfc->irq, ar934x_nfc_irq_handler, 0, -+ dev_name(&pdev->dev), nfc); -+ if (ret) { -+ dev_err(&pdev->dev, "requast_irq failed, err:%d\n", ret); -+ return ret; -+ } -+ -+ nfc->parent = &pdev->dev; -+ nfc->select_chip = pdata->select_chip; -+ nfc->swap_dma = pdata->swap_dma; -+ -+ nand = &nfc->nand_chip; -+ mtd = &nfc->mtd; -+ -+ mtd->priv = nand; -+ mtd->owner = THIS_MODULE; -+ if (pdata->name) -+ mtd->name = pdata->name; -+ else -+ mtd->name = dev_name(&pdev->dev); -+ -+ nand->chip_delay = 25; -+ -+ nand->dev_ready = ar934x_nfc_dev_ready; -+ nand->cmdfunc = ar934x_nfc_cmdfunc; -+ nand->read_byte = ar934x_nfc_read_byte; -+ nand->write_buf = ar934x_nfc_write_buf; -+ nand->read_buf = ar934x_nfc_read_buf; -+ nand->select_chip = ar934x_nfc_select_chip; -+ -+ ret = ar934x_nfc_alloc_buf(nfc, AR934X_NFC_ID_BUF_SIZE); -+ if (ret) -+ goto err_free_irq; -+ -+ platform_set_drvdata(pdev, nfc); -+ -+ ar934x_nfc_hw_init(nfc); -+ -+ ret = nand_scan_ident(mtd, 1, NULL); -+ if (ret) { -+ dev_err(&pdev->dev, "nand_scan_ident failed, err:%d\n", ret); -+ goto err_free_buf; -+ } -+ -+ ret = ar934x_nfc_init_tail(mtd); -+ if (ret) { -+ dev_err(&pdev->dev, "init tail failed, err:%d\n", ret); -+ goto err_free_buf; -+ } -+ -+ if (pdata->scan_fixup) { -+ ret = pdata->scan_fixup(mtd); -+ if (ret) -+ goto err_free_buf; -+ } -+ -+ switch (pdata->ecc_mode) { -+ case AR934X_NFC_ECC_SOFT: -+ nand->ecc.mode = NAND_ECC_SOFT; -+ break; -+ -+ case AR934X_NFC_ECC_SOFT_BCH: -+ nand->ecc.mode = NAND_ECC_SOFT_BCH; -+ break; -+ -+ case AR934X_NFC_ECC_HW: -+ ret = ar934x_nfc_setup_hwecc(nfc); -+ if (ret) -+ goto err_free_buf; -+ -+ break; -+ -+ default: -+ dev_err(nfc->parent, "unknown ECC mode %d\n", pdata->ecc_mode); -+ return -EINVAL; -+ } -+ -+ ret = nand_scan_tail(mtd); -+ if (ret) { -+ dev_err(&pdev->dev, "scan tail failed, err:%d\n", ret); -+ goto err_free_buf; -+ } -+ -+ memset(&ppdata, '\0', sizeof(ppdata)); -+ ret = mtd_device_parse_register(mtd, part_probes, &ppdata, -+ pdata->parts, pdata->nr_parts); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to register mtd, err:%d\n", ret); -+ goto err_free_buf; -+ } -+ -+ return 0; -+ -+err_free_buf: -+ ar934x_nfc_free_buf(nfc); -+err_free_irq: -+ free_irq(nfc->irq, nfc); -+ return ret; -+} -+ -+static int -+ar934x_nfc_remove(struct platform_device *pdev) -+{ -+ struct ar934x_nfc *nfc; -+ -+ nfc = platform_get_drvdata(pdev); -+ if (nfc) { -+ nand_release(&nfc->mtd); -+ ar934x_nfc_free_buf(nfc); -+ free_irq(nfc->irq, nfc); -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver ar934x_nfc_driver = { -+ .probe = ar934x_nfc_probe, -+ .remove = ar934x_nfc_remove, -+ .driver = { -+ .name = AR934X_NFC_DRIVER_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+module_platform_driver(ar934x_nfc_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_DESCRIPTION("Atheros AR934x NAND Flash Controller driver"); -+MODULE_ALIAS("platform:" AR934X_NFC_DRIVER_NAME); -diff -Nur linux-4.1.13.orig/drivers/mtd/nand/Kconfig linux-4.1.13/drivers/mtd/nand/Kconfig ---- linux-4.1.13.orig/drivers/mtd/nand/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/nand/Kconfig 2015-12-04 19:57:03.882110905 +0100 -@@ -530,4 +530,24 @@ - help - Enables support for NAND controller on Hisilicon SoC Hip04. - -+config MTD_NAND_RB4XX -+ tristate "NAND flash driver for RouterBoard 4xx series" -+ depends on MTD_NAND && ATH79_MACH_RB4XX -+ -+config MTD_NAND_RB750 -+ tristate "NAND flash driver for the RouterBoard 750" -+ depends on MTD_NAND && ATH79_MACH_RB750 -+ -+config MTD_NAND_RB91X -+ tristate "NAND flash driver for the RouterBOARD 91x series" -+ depends on MTD_NAND && ATH79_MACH_RB91X -+ -+config MTD_NAND_AR934X -+ tristate "NAND flash driver for the Qualcomm Atheros AR934x/QCA955x SoCs" -+ depends on (SOC_AR934X || SOC_QCA955X) -+ -+config MTD_NAND_AR934X_HW_ECC -+ bool "Hardware ECC support for the AR934X NAND Controller (EXPERIMENTAL)" -+ depends on MTD_NAND_AR934X -+ - endif # MTD_NAND -diff -Nur linux-4.1.13.orig/drivers/mtd/nand/Makefile linux-4.1.13/drivers/mtd/nand/Makefile ---- linux-4.1.13.orig/drivers/mtd/nand/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/nand/Makefile 2015-12-04 19:57:03.882110905 +0100 -@@ -13,6 +13,7 @@ - obj-$(CONFIG_MTD_NAND_DENALI) += denali.o - obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o - obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o -+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nfc.o - obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o - obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o - obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o -@@ -32,6 +33,9 @@ - obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o - obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o - obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o -+obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o -+obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o -+obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o - obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o - obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o - obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o -diff -Nur linux-4.1.13.orig/drivers/mtd/nand/rb4xx_nand.c linux-4.1.13/drivers/mtd/nand/rb4xx_nand.c ---- linux-4.1.13.orig/drivers/mtd/nand/rb4xx_nand.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/nand/rb4xx_nand.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,305 @@ -+/* -+ * NAND flash driver for the MikroTik RouterBoard 4xx series -+ * -+ * Copyright (C) 2008-2011 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * This file was based on the driver for Linux 2.6.22 published by -+ * MikroTik for their RouterBoard 4xx series devices. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define DRV_NAME "rb4xx-nand" -+#define DRV_VERSION "0.2.0" -+#define DRV_DESC "NAND flash driver for RouterBoard 4xx series" -+ -+#define RB4XX_NAND_GPIO_READY 5 -+#define RB4XX_NAND_GPIO_ALE 37 -+#define RB4XX_NAND_GPIO_CLE 38 -+#define RB4XX_NAND_GPIO_NCE 39 -+ -+struct rb4xx_nand_info { -+ struct nand_chip chip; -+ struct mtd_info mtd; -+}; -+ -+/* -+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader -+ * will not be able to find the kernel that we load. -+ */ -+static struct nand_ecclayout rb4xx_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static struct mtd_partition rb4xx_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, -+ { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, -+ { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static int rb4xx_nand_dev_ready(struct mtd_info *mtd) -+{ -+ return gpio_get_value_cansleep(RB4XX_NAND_GPIO_READY); -+} -+ -+static void rb4xx_nand_write_cmd(unsigned char cmd) -+{ -+ unsigned char data = cmd; -+ int err; -+ -+ err = rb4xx_cpld_write(&data, 1); -+ if (err) -+ pr_err("rb4xx_nand: write cmd failed, err=%d\n", err); -+} -+ -+static void rb4xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, -+ unsigned int ctrl) -+{ -+ if (ctrl & NAND_CTRL_CHANGE) { -+ gpio_set_value_cansleep(RB4XX_NAND_GPIO_CLE, -+ (ctrl & NAND_CLE) ? 1 : 0); -+ gpio_set_value_cansleep(RB4XX_NAND_GPIO_ALE, -+ (ctrl & NAND_ALE) ? 1 : 0); -+ gpio_set_value_cansleep(RB4XX_NAND_GPIO_NCE, -+ (ctrl & NAND_NCE) ? 0 : 1); -+ } -+ -+ if (cmd != NAND_CMD_NONE) -+ rb4xx_nand_write_cmd(cmd); -+} -+ -+static unsigned char rb4xx_nand_read_byte(struct mtd_info *mtd) -+{ -+ unsigned char data = 0; -+ int err; -+ -+ err = rb4xx_cpld_read(&data, NULL, 1); -+ if (err) { -+ pr_err("rb4xx_nand: read data failed, err=%d\n", err); -+ data = 0xff; -+ } -+ -+ return data; -+} -+ -+static void rb4xx_nand_write_buf(struct mtd_info *mtd, const unsigned char *buf, -+ int len) -+{ -+ int err; -+ -+ err = rb4xx_cpld_write(buf, len); -+ if (err) -+ pr_err("rb4xx_nand: write buf failed, err=%d\n", err); -+} -+ -+static void rb4xx_nand_read_buf(struct mtd_info *mtd, unsigned char *buf, -+ int len) -+{ -+ int err; -+ -+ err = rb4xx_cpld_read(buf, NULL, len); -+ if (err) -+ pr_err("rb4xx_nand: read buf failed, err=%d\n", err); -+} -+ -+static int rb4xx_nand_probe(struct platform_device *pdev) -+{ -+ struct rb4xx_nand_info *info; -+ int ret; -+ -+ printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); -+ -+ ret = gpio_request(RB4XX_NAND_GPIO_READY, "NAND RDY"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to request gpio %d\n", -+ RB4XX_NAND_GPIO_READY); -+ goto err; -+ } -+ -+ ret = gpio_direction_input(RB4XX_NAND_GPIO_READY); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to set input mode on gpio %d\n", -+ RB4XX_NAND_GPIO_READY); -+ goto err_free_gpio_ready; -+ } -+ -+ ret = gpio_request(RB4XX_NAND_GPIO_ALE, "NAND ALE"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to request gpio %d\n", -+ RB4XX_NAND_GPIO_ALE); -+ goto err_free_gpio_ready; -+ } -+ -+ ret = gpio_direction_output(RB4XX_NAND_GPIO_ALE, 0); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", -+ RB4XX_NAND_GPIO_ALE); -+ goto err_free_gpio_ale; -+ } -+ -+ ret = gpio_request(RB4XX_NAND_GPIO_CLE, "NAND CLE"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to request gpio %d\n", -+ RB4XX_NAND_GPIO_CLE); -+ goto err_free_gpio_ale; -+ } -+ -+ ret = gpio_direction_output(RB4XX_NAND_GPIO_CLE, 0); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", -+ RB4XX_NAND_GPIO_CLE); -+ goto err_free_gpio_cle; -+ } -+ -+ ret = gpio_request(RB4XX_NAND_GPIO_NCE, "NAND NCE"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to request gpio %d\n", -+ RB4XX_NAND_GPIO_NCE); -+ goto err_free_gpio_cle; -+ } -+ -+ ret = gpio_direction_output(RB4XX_NAND_GPIO_NCE, 1); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", -+ RB4XX_NAND_GPIO_ALE); -+ goto err_free_gpio_nce; -+ } -+ -+ info = kzalloc(sizeof(*info), GFP_KERNEL); -+ if (!info) { -+ dev_err(&pdev->dev, "rb4xx-nand: no memory for private data\n"); -+ ret = -ENOMEM; -+ goto err_free_gpio_nce; -+ } -+ -+ info->chip.priv = &info; -+ info->mtd.priv = &info->chip; -+ info->mtd.owner = THIS_MODULE; -+ -+ info->chip.cmd_ctrl = rb4xx_nand_cmd_ctrl; -+ info->chip.dev_ready = rb4xx_nand_dev_ready; -+ info->chip.read_byte = rb4xx_nand_read_byte; -+ info->chip.write_buf = rb4xx_nand_write_buf; -+ info->chip.read_buf = rb4xx_nand_read_buf; -+ -+ info->chip.chip_delay = 25; -+ info->chip.ecc.mode = NAND_ECC_SOFT; -+ -+ platform_set_drvdata(pdev, info); -+ -+ ret = nand_scan_ident(&info->mtd, 1, NULL); -+ if (ret) { -+ ret = -ENXIO; -+ goto err_free_info; -+ } -+ -+ if (info->mtd.writesize == 512) -+ info->chip.ecc.layout = &rb4xx_nand_ecclayout; -+ -+ ret = nand_scan_tail(&info->mtd); -+ if (ret) { -+ return -ENXIO; -+ goto err_set_drvdata; -+ } -+ -+ mtd_device_register(&info->mtd, rb4xx_nand_partitions, -+ ARRAY_SIZE(rb4xx_nand_partitions)); -+ if (ret) -+ goto err_release_nand; -+ -+ return 0; -+ -+err_release_nand: -+ nand_release(&info->mtd); -+err_set_drvdata: -+ platform_set_drvdata(pdev, NULL); -+err_free_info: -+ kfree(info); -+err_free_gpio_nce: -+ gpio_free(RB4XX_NAND_GPIO_NCE); -+err_free_gpio_cle: -+ gpio_free(RB4XX_NAND_GPIO_CLE); -+err_free_gpio_ale: -+ gpio_free(RB4XX_NAND_GPIO_ALE); -+err_free_gpio_ready: -+ gpio_free(RB4XX_NAND_GPIO_READY); -+err: -+ return ret; -+} -+ -+static int rb4xx_nand_remove(struct platform_device *pdev) -+{ -+ struct rb4xx_nand_info *info = platform_get_drvdata(pdev); -+ -+ nand_release(&info->mtd); -+ platform_set_drvdata(pdev, NULL); -+ kfree(info); -+ gpio_free(RB4XX_NAND_GPIO_NCE); -+ gpio_free(RB4XX_NAND_GPIO_CLE); -+ gpio_free(RB4XX_NAND_GPIO_ALE); -+ gpio_free(RB4XX_NAND_GPIO_READY); -+ -+ return 0; -+} -+ -+static struct platform_driver rb4xx_nand_driver = { -+ .probe = rb4xx_nand_probe, -+ .remove = rb4xx_nand_remove, -+ .driver = { -+ .name = DRV_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init rb4xx_nand_init(void) -+{ -+ return platform_driver_register(&rb4xx_nand_driver); -+} -+ -+static void __exit rb4xx_nand_exit(void) -+{ -+ platform_driver_unregister(&rb4xx_nand_driver); -+} -+ -+module_init(rb4xx_nand_init); -+module_exit(rb4xx_nand_exit); -+ -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_AUTHOR("Imre Kaloz "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/mtd/nand/rb750_nand.c linux-4.1.13/drivers/mtd/nand/rb750_nand.c ---- linux-4.1.13.orig/drivers/mtd/nand/rb750_nand.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/nand/rb750_nand.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,354 @@ -+/* -+ * NAND flash driver for the MikroTik RouterBOARD 750 -+ * -+ * Copyright (C) 2010-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define DRV_NAME "rb750-nand" -+#define DRV_VERSION "0.1.0" -+#define DRV_DESC "NAND flash driver for the RouterBOARD 750" -+ -+#define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0) -+#define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE) -+#define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE) -+#define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE) -+#define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE) -+#define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY) -+ -+#define RB750_NAND_DATA_SHIFT 1 -+#define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT) -+#define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY) -+#define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \ -+ RB750_NAND_NRE | RB750_NAND_NWE) -+ -+struct rb750_nand_info { -+ struct nand_chip chip; -+ struct mtd_info mtd; -+ struct rb7xx_nand_platform_data *pdata; -+}; -+ -+static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) -+{ -+ return container_of(mtd, struct rb750_nand_info, mtd); -+} -+ -+/* -+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader -+ * will not be able to find the kernel that we load. -+ */ -+static struct nand_ecclayout rb750_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static struct mtd_partition rb750_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static void rb750_nand_write(const u8 *buf, unsigned len) -+{ -+ void __iomem *base = ath79_gpio_base; -+ u32 out; -+ u32 t; -+ unsigned i; -+ -+ /* set data lines to output mode */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); -+ -+ out = __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE); -+ for (i = 0; i != len; i++) { -+ u32 data; -+ -+ data = buf[i]; -+ data <<= RB750_NAND_DATA_SHIFT; -+ data |= out; -+ __raw_writel(data, base + AR71XX_GPIO_REG_OUT); -+ -+ __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ } -+ -+ /* set data lines to input mode */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_OE); -+} -+ -+static void rb750_nand_read(u8 *read_buf, unsigned len) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned i; -+ -+ for (i = 0; i < len; i++) { -+ u8 data; -+ -+ /* activate RE line */ -+ __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_CLEAR); -+ -+ /* read input lines */ -+ data = __raw_readl(base + AR71XX_GPIO_REG_IN) >> -+ RB750_NAND_DATA_SHIFT; -+ -+ /* deactivate RE line */ -+ __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET); -+ -+ read_buf[i] = data; -+ } -+} -+ -+static void rb750_nand_select_chip(struct mtd_info *mtd, int chip) -+{ -+ struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd); -+ void __iomem *base = ath79_gpio_base; -+ u32 t; -+ -+ if (chip >= 0) { -+ rbinfo->pdata->enable_pins(); -+ -+ /* set input mode for data lines */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ __raw_writel(t & ~RB750_NAND_INPUT_BITS, -+ base + AR71XX_GPIO_REG_OE); -+ -+ /* deactivate RE and WE lines */ -+ __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE, -+ base + AR71XX_GPIO_REG_SET); -+ /* flush write */ -+ (void) __raw_readl(base + AR71XX_GPIO_REG_SET); -+ -+ /* activate CE line */ -+ __raw_writel(rbinfo->pdata->nce_line, -+ base + AR71XX_GPIO_REG_CLEAR); -+ } else { -+ /* deactivate CE line */ -+ __raw_writel(rbinfo->pdata->nce_line, -+ base + AR71XX_GPIO_REG_SET); -+ /* flush write */ -+ (void) __raw_readl(base + AR71XX_GPIO_REG_SET); -+ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY, -+ base + AR71XX_GPIO_REG_OE); -+ -+ rbinfo->pdata->disable_pins(); -+ } -+} -+ -+static int rb750_nand_dev_ready(struct mtd_info *mtd) -+{ -+ void __iomem *base = ath79_gpio_base; -+ -+ return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY); -+} -+ -+static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, -+ unsigned int ctrl) -+{ -+ if (ctrl & NAND_CTRL_CHANGE) { -+ void __iomem *base = ath79_gpio_base; -+ u32 t; -+ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ -+ t &= ~(RB750_NAND_CLE | RB750_NAND_ALE); -+ t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0; -+ t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0; -+ -+ __raw_writel(t, base + AR71XX_GPIO_REG_OUT); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ } -+ -+ if (cmd != NAND_CMD_NONE) { -+ u8 t = cmd; -+ rb750_nand_write(&t, 1); -+ } -+} -+ -+static u8 rb750_nand_read_byte(struct mtd_info *mtd) -+{ -+ u8 data = 0; -+ rb750_nand_read(&data, 1); -+ return data; -+} -+ -+static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) -+{ -+ rb750_nand_read(buf, len); -+} -+ -+static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -+{ -+ rb750_nand_write(buf, len); -+} -+ -+static void __init rb750_nand_gpio_init(struct rb750_nand_info *info) -+{ -+ void __iomem *base = ath79_gpio_base; -+ u32 out; -+ u32 t; -+ -+ out = __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ -+ /* setup output levels */ -+ __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE, -+ base + AR71XX_GPIO_REG_SET); -+ -+ __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE, -+ base + AR71XX_GPIO_REG_CLEAR); -+ -+ /* setup input lines */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE); -+ -+ /* setup output lines */ -+ t = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ t |= RB750_NAND_OUTPUT_BITS; -+ t |= info->pdata->nce_line; -+ __raw_writel(t, base + AR71XX_GPIO_REG_OE); -+ -+ info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0); -+} -+ -+static int rb750_nand_probe(struct platform_device *pdev) -+{ -+ struct rb750_nand_info *info; -+ struct rb7xx_nand_platform_data *pdata; -+ int ret; -+ -+ printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); -+ -+ pdata = pdev->dev.platform_data; -+ if (!pdata) -+ return -EINVAL; -+ -+ info = kzalloc(sizeof(*info), GFP_KERNEL); -+ if (!info) -+ return -ENOMEM; -+ -+ info->chip.priv = &info; -+ info->mtd.priv = &info->chip; -+ info->mtd.owner = THIS_MODULE; -+ -+ info->chip.select_chip = rb750_nand_select_chip; -+ info->chip.cmd_ctrl = rb750_nand_cmd_ctrl; -+ info->chip.dev_ready = rb750_nand_dev_ready; -+ info->chip.read_byte = rb750_nand_read_byte; -+ info->chip.write_buf = rb750_nand_write_buf; -+ info->chip.read_buf = rb750_nand_read_buf; -+ -+ info->chip.chip_delay = 25; -+ info->chip.ecc.mode = NAND_ECC_SOFT; -+ -+ info->pdata = pdata; -+ -+ platform_set_drvdata(pdev, info); -+ -+ rb750_nand_gpio_init(info); -+ -+ ret = nand_scan_ident(&info->mtd, 1, NULL); -+ if (ret) { -+ ret = -ENXIO; -+ goto err_free_info; -+ } -+ -+ if (info->mtd.writesize == 512) -+ info->chip.ecc.layout = &rb750_nand_ecclayout; -+ -+ ret = nand_scan_tail(&info->mtd); -+ if (ret) { -+ return -ENXIO; -+ goto err_set_drvdata; -+ } -+ -+ ret = mtd_device_register(&info->mtd, rb750_nand_partitions, -+ ARRAY_SIZE(rb750_nand_partitions)); -+ if (ret) -+ goto err_release_nand; -+ -+ return 0; -+ -+err_release_nand: -+ nand_release(&info->mtd); -+err_set_drvdata: -+ platform_set_drvdata(pdev, NULL); -+err_free_info: -+ kfree(info); -+ return ret; -+} -+ -+static int rb750_nand_remove(struct platform_device *pdev) -+{ -+ struct rb750_nand_info *info = platform_get_drvdata(pdev); -+ -+ nand_release(&info->mtd); -+ platform_set_drvdata(pdev, NULL); -+ kfree(info); -+ -+ return 0; -+} -+ -+static struct platform_driver rb750_nand_driver = { -+ .probe = rb750_nand_probe, -+ .remove = rb750_nand_remove, -+ .driver = { -+ .name = DRV_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init rb750_nand_init(void) -+{ -+ return platform_driver_register(&rb750_nand_driver); -+} -+ -+static void __exit rb750_nand_exit(void) -+{ -+ platform_driver_unregister(&rb750_nand_driver); -+} -+ -+module_init(rb750_nand_init); -+module_exit(rb750_nand_exit); -+ -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/mtd/nand/rb91x_nand.c linux-4.1.13/drivers/mtd/nand/rb91x_nand.c ---- linux-4.1.13.orig/drivers/mtd/nand/rb91x_nand.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/nand/rb91x_nand.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,377 @@ -+/* -+ * NAND flash driver for the MikroTik RouterBOARD 91x series -+ * -+ * Copyright (C) 2013-2014 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define DRV_DESC "NAND flash driver for the RouterBOARD 91x series" -+ -+#define RB91X_NAND_NRWE BIT(12) -+ -+#define RB91X_NAND_DATA_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) |\ -+ BIT(13) | BIT(14) | BIT(15)) -+ -+#define RB91X_NAND_INPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_RDY) -+#define RB91X_NAND_OUTPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE) -+ -+#define RB91X_NAND_LOW_DATA_MASK 0x1f -+#define RB91X_NAND_HIGH_DATA_MASK 0xe0 -+#define RB91X_NAND_HIGH_DATA_SHIFT 8 -+ -+struct rb91x_nand_info { -+ struct nand_chip chip; -+ struct mtd_info mtd; -+ struct device *dev; -+ -+ int gpio_nce; -+ int gpio_ale; -+ int gpio_cle; -+ int gpio_rdy; -+ int gpio_read; -+ int gpio_nrw; -+ int gpio_nle; -+}; -+ -+static inline struct rb91x_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) -+{ -+ return container_of(mtd, struct rb91x_nand_info, mtd); -+} -+ -+/* -+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader -+ * will not be able to find the kernel that we load. -+ */ -+static struct nand_ecclayout rb91x_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ -+static struct mtd_partition rb91x_nand_partitions[] = { -+ { -+ .name = "booter", -+ .offset = 0, -+ .size = (256 * 1024), -+ .mask_flags = MTD_WRITEABLE, -+ }, { -+ .name = "kernel", -+ .offset = (256 * 1024), -+ .size = (4 * 1024 * 1024) - (256 * 1024), -+ }, { -+ .name = "rootfs", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static void rb91x_nand_write(struct rb91x_nand_info *rbni, -+ const u8 *buf, -+ unsigned len) -+{ -+ void __iomem *base = ath79_gpio_base; -+ u32 oe_reg; -+ u32 out_reg; -+ u32 out; -+ unsigned i; -+ -+ /* enable the latch */ -+ gpio_set_value_cansleep(rbni->gpio_nle, 0); -+ -+ oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ -+ /* set data lines to output mode */ -+ __raw_writel(oe_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE), -+ base + AR71XX_GPIO_REG_OE); -+ -+ out = out_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE); -+ for (i = 0; i != len; i++) { -+ u32 data; -+ -+ data = (buf[i] & RB91X_NAND_HIGH_DATA_MASK) << -+ RB91X_NAND_HIGH_DATA_SHIFT; -+ data |= buf[i] & RB91X_NAND_LOW_DATA_MASK; -+ data |= out; -+ __raw_writel(data, base + AR71XX_GPIO_REG_OUT); -+ -+ /* deactivate WE line */ -+ data |= RB91X_NAND_NRWE; -+ __raw_writel(data, base + AR71XX_GPIO_REG_OUT); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ } -+ -+ /* restore registers */ -+ __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); -+ __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ -+ /* disable the latch */ -+ gpio_set_value_cansleep(rbni->gpio_nle, 1); -+} -+ -+static void rb91x_nand_read(struct rb91x_nand_info *rbni, -+ u8 *read_buf, -+ unsigned len) -+{ -+ void __iomem *base = ath79_gpio_base; -+ u32 oe_reg; -+ u32 out_reg; -+ unsigned i; -+ -+ /* enable read mode */ -+ gpio_set_value_cansleep(rbni->gpio_read, 1); -+ -+ /* enable latch */ -+ gpio_set_value_cansleep(rbni->gpio_nle, 0); -+ -+ /* save registers */ -+ oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); -+ out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ -+ /* set data lines to input mode */ -+ __raw_writel(oe_reg | RB91X_NAND_DATA_BITS, -+ base + AR71XX_GPIO_REG_OE); -+ -+ for (i = 0; i < len; i++) { -+ u32 in; -+ u8 data; -+ -+ /* activate RE line */ -+ __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_CLEAR); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_CLEAR); -+ -+ /* read input lines */ -+ in = __raw_readl(base + AR71XX_GPIO_REG_IN); -+ -+ /* deactivate RE line */ -+ __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_SET); -+ -+ data = (in & RB91X_NAND_LOW_DATA_MASK); -+ data |= (in >> RB91X_NAND_HIGH_DATA_SHIFT) & -+ RB91X_NAND_HIGH_DATA_MASK; -+ -+ read_buf[i] = data; -+ } -+ -+ /* restore registers */ -+ __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); -+ __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); -+ /* flush write */ -+ __raw_readl(base + AR71XX_GPIO_REG_OUT); -+ -+ /* disable latch */ -+ gpio_set_value_cansleep(rbni->gpio_nle, 1); -+ -+ /* disable read mode */ -+ gpio_set_value_cansleep(rbni->gpio_read, 0); -+} -+ -+static int rb91x_nand_dev_ready(struct mtd_info *mtd) -+{ -+ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); -+ -+ return gpio_get_value_cansleep(rbni->gpio_rdy); -+} -+ -+static void rb91x_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, -+ unsigned int ctrl) -+{ -+ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); -+ -+ if (ctrl & NAND_CTRL_CHANGE) { -+ gpio_set_value_cansleep(rbni->gpio_cle, -+ (ctrl & NAND_CLE) ? 1 : 0); -+ gpio_set_value_cansleep(rbni->gpio_ale, -+ (ctrl & NAND_ALE) ? 1 : 0); -+ gpio_set_value_cansleep(rbni->gpio_nce, -+ (ctrl & NAND_NCE) ? 0 : 1); -+ } -+ -+ if (cmd != NAND_CMD_NONE) { -+ u8 t = cmd; -+ -+ rb91x_nand_write(rbni, &t, 1); -+ } -+} -+ -+static u8 rb91x_nand_read_byte(struct mtd_info *mtd) -+{ -+ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); -+ u8 data = 0xff; -+ -+ rb91x_nand_read(rbni, &data, 1); -+ -+ return data; -+} -+ -+static void rb91x_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) -+{ -+ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); -+ -+ rb91x_nand_read(rbni, buf, len); -+} -+ -+static void rb91x_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -+{ -+ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); -+ -+ rb91x_nand_write(rbni, buf, len); -+} -+ -+static int rb91x_nand_gpio_init(struct rb91x_nand_info *info) -+{ -+ int ret; -+ -+ /* -+ * Ensure that the LATCH is disabled before initializing -+ * control lines. -+ */ -+ ret = devm_gpio_request_one(info->dev, info->gpio_nle, -+ GPIOF_OUT_INIT_HIGH, "LATCH enable"); -+ if (ret) -+ return ret; -+ -+ ret = devm_gpio_request_one(info->dev, info->gpio_nce, -+ GPIOF_OUT_INIT_HIGH, "NAND nCE"); -+ if (ret) -+ return ret; -+ -+ ret = devm_gpio_request_one(info->dev, info->gpio_nrw, -+ GPIOF_OUT_INIT_HIGH, "NAND nRW"); -+ if (ret) -+ return ret; -+ -+ ret = devm_gpio_request_one(info->dev, info->gpio_cle, -+ GPIOF_OUT_INIT_LOW, "NAND CLE"); -+ if (ret) -+ return ret; -+ -+ ret = devm_gpio_request_one(info->dev, info->gpio_ale, -+ GPIOF_OUT_INIT_LOW, "NAND ALE"); -+ if (ret) -+ return ret; -+ -+ ret = devm_gpio_request_one(info->dev, info->gpio_read, -+ GPIOF_OUT_INIT_LOW, "NAND READ"); -+ if (ret) -+ return ret; -+ -+ ret = devm_gpio_request_one(info->dev, info->gpio_rdy, -+ GPIOF_IN, "NAND RDY"); -+ return ret; -+} -+ -+static int rb91x_nand_probe(struct platform_device *pdev) -+{ -+ struct rb91x_nand_info *rbni; -+ struct rb91x_nand_platform_data *pdata; -+ int ret; -+ -+ pr_info(DRV_DESC "\n"); -+ -+ pdata = dev_get_platdata(&pdev->dev); -+ if (!pdata) -+ return -EINVAL; -+ -+ rbni = devm_kzalloc(&pdev->dev, sizeof(*rbni), GFP_KERNEL); -+ if (!rbni) -+ return -ENOMEM; -+ -+ rbni->dev = &pdev->dev; -+ rbni->gpio_nce = pdata->gpio_nce; -+ rbni->gpio_ale = pdata->gpio_ale; -+ rbni->gpio_cle = pdata->gpio_cle; -+ rbni->gpio_read = pdata->gpio_read; -+ rbni->gpio_nrw = pdata->gpio_nrw; -+ rbni->gpio_rdy = pdata->gpio_rdy; -+ rbni->gpio_nle = pdata->gpio_nle; -+ -+ rbni->chip.priv = &rbni; -+ rbni->mtd.priv = &rbni->chip; -+ rbni->mtd.owner = THIS_MODULE; -+ -+ rbni->chip.cmd_ctrl = rb91x_nand_cmd_ctrl; -+ rbni->chip.dev_ready = rb91x_nand_dev_ready; -+ rbni->chip.read_byte = rb91x_nand_read_byte; -+ rbni->chip.write_buf = rb91x_nand_write_buf; -+ rbni->chip.read_buf = rb91x_nand_read_buf; -+ -+ rbni->chip.chip_delay = 25; -+ rbni->chip.ecc.mode = NAND_ECC_SOFT; -+ -+ platform_set_drvdata(pdev, rbni); -+ -+ ret = rb91x_nand_gpio_init(rbni); -+ if (ret) -+ return ret; -+ -+ ret = nand_scan_ident(&rbni->mtd, 1, NULL); -+ if (ret) -+ return ret; -+ -+ if (rbni->mtd.writesize == 512) -+ rbni->chip.ecc.layout = &rb91x_nand_ecclayout; -+ -+ ret = nand_scan_tail(&rbni->mtd); -+ if (ret) -+ return ret; -+ -+ ret = mtd_device_register(&rbni->mtd, rb91x_nand_partitions, -+ ARRAY_SIZE(rb91x_nand_partitions)); -+ if (ret) -+ goto err_release_nand; -+ -+ return 0; -+ -+err_release_nand: -+ nand_release(&rbni->mtd); -+ return ret; -+} -+ -+static int rb91x_nand_remove(struct platform_device *pdev) -+{ -+ struct rb91x_nand_info *info = platform_get_drvdata(pdev); -+ -+ nand_release(&info->mtd); -+ -+ return 0; -+} -+ -+static struct platform_driver rb91x_nand_driver = { -+ .probe = rb91x_nand_probe, -+ .remove = rb91x_nand_remove, -+ .driver = { -+ .name = RB91X_NAND_DRIVER_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+module_platform_driver(rb91x_nand_driver); -+ -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/mtd/redboot.c linux-4.1.13/drivers/mtd/redboot.c ---- linux-4.1.13.orig/drivers/mtd/redboot.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/redboot.c 2015-12-04 19:57:03.870111690 +0100 -@@ -76,12 +76,18 @@ - static char nullstring[] = "unallocated"; - #endif - -+ buf = vmalloc(master->erasesize); -+ if (!buf) -+ return -ENOMEM; -+ -+ restart: - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; - while (mtd_block_isbad(master, offset)) { - if (!offset) { - nogood: - printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); -+ vfree(buf); - return -EIO; - } - offset -= master->erasesize; -@@ -94,10 +100,6 @@ - goto nogood; - } - } -- buf = vmalloc(master->erasesize); -- -- if (!buf) -- return -ENOMEM; - - printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", - master->name, offset); -@@ -170,6 +172,11 @@ - } - if (i == numslots) { - /* Didn't find it */ -+ if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ -+ directory++; -+ goto restart; -+ } - printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", - master->name); - ret = 0; -diff -Nur linux-4.1.13.orig/drivers/mtd/tplinkpart.c linux-4.1.13/drivers/mtd/tplinkpart.c ---- linux-4.1.13.orig/drivers/mtd/tplinkpart.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/mtd/tplinkpart.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,222 @@ -+/* -+ * Copyright (C) 2011 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define TPLINK_NUM_PARTS 5 -+#define TPLINK_HEADER_V1 0x01000000 -+#define TPLINK_HEADER_V2 0x02000000 -+#define MD5SUM_LEN 16 -+ -+#define TPLINK_ART_LEN 0x10000 -+#define TPLINK_KERNEL_OFFS 0x20000 -+#define TPLINK_64K_KERNEL_OFFS 0x10000 -+ -+struct tplink_fw_header { -+ uint32_t version; /* header version */ -+ char vendor_name[24]; -+ char fw_version[36]; -+ uint32_t hw_id; /* hardware id */ -+ uint32_t hw_rev; /* hardware revision */ -+ uint32_t unk1; -+ uint8_t md5sum1[MD5SUM_LEN]; -+ uint32_t unk2; -+ uint8_t md5sum2[MD5SUM_LEN]; -+ uint32_t unk3; -+ uint32_t kernel_la; /* kernel load address */ -+ uint32_t kernel_ep; /* kernel entry point */ -+ uint32_t fw_length; /* total length of the firmware */ -+ uint32_t kernel_ofs; /* kernel data offset */ -+ uint32_t kernel_len; /* kernel data length */ -+ uint32_t rootfs_ofs; /* rootfs data offset */ -+ uint32_t rootfs_len; /* rootfs data length */ -+ uint32_t boot_ofs; /* bootloader data offset */ -+ uint32_t boot_len; /* bootloader data length */ -+ uint8_t pad[360]; -+} __attribute__ ((packed)); -+ -+static struct tplink_fw_header * -+tplink_read_header(struct mtd_info *mtd, size_t offset) -+{ -+ struct tplink_fw_header *header; -+ size_t header_len; -+ size_t retlen; -+ int ret; -+ u32 t; -+ -+ header = vmalloc(sizeof(*header)); -+ if (!header) -+ goto err; -+ -+ header_len = sizeof(struct tplink_fw_header); -+ ret = mtd_read(mtd, offset, header_len, &retlen, -+ (unsigned char *) header); -+ if (ret) -+ goto err_free_header; -+ -+ if (retlen != header_len) -+ goto err_free_header; -+ -+ /* sanity checks */ -+ t = be32_to_cpu(header->version); -+ if ((t != TPLINK_HEADER_V1) && (t != TPLINK_HEADER_V2)) -+ goto err_free_header; -+ -+ t = be32_to_cpu(header->kernel_ofs); -+ if (t != header_len) -+ goto err_free_header; -+ -+ return header; -+ -+err_free_header: -+ vfree(header); -+err: -+ return NULL; -+} -+ -+static int tplink_check_rootfs_magic(struct mtd_info *mtd, size_t offset) -+{ -+ u32 magic; -+ size_t retlen; -+ int ret; -+ -+ ret = mtd_read(mtd, offset, sizeof(magic), &retlen, -+ (unsigned char *) &magic); -+ if (ret) -+ return ret; -+ -+ if (retlen != sizeof(magic)) -+ return -EIO; -+ -+ if (le32_to_cpu(magic) != SQUASHFS_MAGIC && -+ magic != 0x19852003) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static int tplink_parse_partitions_offset(struct mtd_info *master, -+ struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data, -+ size_t offset) -+{ -+ struct mtd_partition *parts; -+ struct tplink_fw_header *header; -+ int nr_parts; -+ size_t art_offset; -+ size_t rootfs_offset; -+ size_t squashfs_offset; -+ int ret; -+ -+ nr_parts = TPLINK_NUM_PARTS; -+ parts = kzalloc(nr_parts * sizeof(struct mtd_partition), GFP_KERNEL); -+ if (!parts) { -+ ret = -ENOMEM; -+ goto err; -+ } -+ -+ header = tplink_read_header(master, offset); -+ if (!header) { -+ pr_notice("%s: no TP-Link header found\n", master->name); -+ ret = -ENODEV; -+ goto err_free_parts; -+ } -+ -+ squashfs_offset = offset + sizeof(struct tplink_fw_header) + -+ be32_to_cpu(header->kernel_len); -+ -+ ret = tplink_check_rootfs_magic(master, squashfs_offset); -+ if (ret == 0) -+ rootfs_offset = squashfs_offset; -+ else -+ rootfs_offset = offset + be32_to_cpu(header->rootfs_ofs); -+ -+ art_offset = master->size - TPLINK_ART_LEN; -+ -+ parts[0].name = "u-boot"; -+ parts[0].offset = 0; -+ parts[0].size = offset; -+ parts[0].mask_flags = MTD_WRITEABLE; -+ -+ parts[1].name = "kernel"; -+ parts[1].offset = offset; -+ parts[1].size = rootfs_offset - offset; -+ -+ parts[2].name = "rootfs"; -+ parts[2].offset = rootfs_offset; -+ parts[2].size = art_offset - rootfs_offset; -+ -+ parts[3].name = "art"; -+ parts[3].offset = art_offset; -+ parts[3].size = TPLINK_ART_LEN; -+ parts[3].mask_flags = MTD_WRITEABLE; -+ -+ parts[4].name = "firmware"; -+ parts[4].offset = offset; -+ parts[4].size = art_offset - offset; -+ -+ vfree(header); -+ -+ *pparts = parts; -+ return nr_parts; -+ -+err_free_parts: -+ kfree(parts); -+err: -+ *pparts = NULL; -+ return ret; -+} -+ -+static int tplink_parse_partitions(struct mtd_info *master, -+ struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ return tplink_parse_partitions_offset(master, pparts, data, -+ TPLINK_KERNEL_OFFS); -+} -+ -+static int tplink_parse_64k_partitions(struct mtd_info *master, -+ struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ return tplink_parse_partitions_offset(master, pparts, data, -+ TPLINK_64K_KERNEL_OFFS); -+} -+ -+static struct mtd_part_parser tplink_parser = { -+ .owner = THIS_MODULE, -+ .parse_fn = tplink_parse_partitions, -+ .name = "tp-link", -+}; -+ -+static struct mtd_part_parser tplink_64k_parser = { -+ .owner = THIS_MODULE, -+ .parse_fn = tplink_parse_64k_partitions, -+ .name = "tp-link-64k", -+}; -+ -+static int __init tplink_parser_init(void) -+{ -+ register_mtd_parser(&tplink_parser); -+ register_mtd_parser(&tplink_64k_parser); -+ -+ return 0; -+} -+ -+module_init(tplink_parser_init); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Gabor Juhos "); -diff -Nur linux-4.1.13.orig/drivers/net/dsa/Kconfig linux-4.1.13/drivers/net/dsa/Kconfig ---- linux-4.1.13.orig/drivers/net/dsa/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/dsa/Kconfig 2015-12-04 19:57:03.886110643 +0100 -@@ -13,6 +13,13 @@ - This enables support for the Marvell 88E6060 ethernet switch - chip. - -+config NET_DSA_MV88E6063 -+ bool "Marvell 88E6063 ethernet switch chip support" -+ select NET_DSA_TAG_TRAILER -+ ---help--- -+ This enables support for the Marvell 88E6063 ethernet switch -+ chip -+ - config NET_DSA_MV88E6XXX_NEED_PPU - bool - default n -diff -Nur linux-4.1.13.orig/drivers/net/dsa/Makefile linux-4.1.13/drivers/net/dsa/Makefile ---- linux-4.1.13.orig/drivers/net/dsa/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/dsa/Makefile 2015-12-04 19:57:03.886110643 +0100 -@@ -1,4 +1,5 @@ - obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o -+obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o - obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o - mv88e6xxx_drv-y += mv88e6xxx.o - ifdef CONFIG_NET_DSA_MV88E6123_61_65 -diff -Nur linux-4.1.13.orig/drivers/net/dsa/mv88e6063.c linux-4.1.13/drivers/net/dsa/mv88e6063.c ---- linux-4.1.13.orig/drivers/net/dsa/mv88e6063.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/dsa/mv88e6063.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,311 @@ -+/* -+ * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips -+ * Copyright (c) 2009 Gabor Juhos -+ * -+ * This driver was base on: net/dsa/mv88e6060.c -+ * net/dsa/mv88e6063.c - Driver for Marvell 88e6060 switch chips -+ * Copyright (c) 2008-2009 Marvell Semiconductor -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define REG_BASE 0x10 -+#define REG_PHY(p) (REG_BASE + (p)) -+#define REG_PORT(p) (REG_BASE + 8 + (p)) -+#define REG_GLOBAL (REG_BASE + 0x0f) -+#define NUM_PORTS 7 -+ -+static int reg_read(struct dsa_switch *ds, int addr, int reg) -+{ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) -+ return mdiobus_read(ds->master_mii_bus, addr, reg); -+#else -+ struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); -+ return mdiobus_read(bus, addr, reg); -+#endif -+} -+ -+#define REG_READ(addr, reg) \ -+ ({ \ -+ int __ret; \ -+ \ -+ __ret = reg_read(ds, addr, reg); \ -+ if (__ret < 0) \ -+ return __ret; \ -+ __ret; \ -+ }) -+ -+ -+static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) -+{ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) -+ return mdiobus_write(ds->master_mii_bus, addr, reg, val); -+#else -+ struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); -+ return mdiobus_write(bus, addr, reg, val); -+#endif -+} -+ -+#define REG_WRITE(addr, reg, val) \ -+ ({ \ -+ int __ret; \ -+ \ -+ __ret = reg_write(ds, addr, reg, val); \ -+ if (__ret < 0) \ -+ return __ret; \ -+ }) -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) -+static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) -+{ -+#else -+static char *mv88e6063_probe(struct device *host_dev, int sw_addr) -+{ -+ struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev); -+#endif -+ int ret; -+ -+ ret = mdiobus_read(bus, REG_PORT(0), 0x03); -+ if (ret >= 0) { -+ ret &= 0xfff0; -+ if (ret == 0x1530) -+ return "Marvell 88E6063"; -+ } -+ -+ return NULL; -+} -+ -+static int mv88e6063_switch_reset(struct dsa_switch *ds) -+{ -+ int i; -+ int ret; -+ -+ /* -+ * Set all ports to the disabled state. -+ */ -+ for (i = 0; i < NUM_PORTS; i++) { -+ ret = REG_READ(REG_PORT(i), 0x04); -+ REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc); -+ } -+ -+ /* -+ * Wait for transmit queues to drain. -+ */ -+ msleep(2); -+ -+ /* -+ * Reset the switch. -+ */ -+ REG_WRITE(REG_GLOBAL, 0x0a, 0xa130); -+ -+ /* -+ * Wait up to one second for reset to complete. -+ */ -+ for (i = 0; i < 1000; i++) { -+ ret = REG_READ(REG_GLOBAL, 0x00); -+ if ((ret & 0x8000) == 0x0000) -+ break; -+ -+ msleep(1); -+ } -+ if (i == 1000) -+ return -ETIMEDOUT; -+ -+ return 0; -+} -+ -+static int mv88e6063_setup_global(struct dsa_switch *ds) -+{ -+ /* -+ * Disable discarding of frames with excessive collisions, -+ * set the maximum frame size to 1536 bytes, and mask all -+ * interrupt sources. -+ */ -+ REG_WRITE(REG_GLOBAL, 0x04, 0x0800); -+ -+ /* -+ * Enable automatic address learning, set the address -+ * database size to 1024 entries, and set the default aging -+ * time to 5 minutes. -+ */ -+ REG_WRITE(REG_GLOBAL, 0x0a, 0x2130); -+ -+ return 0; -+} -+ -+static int mv88e6063_setup_port(struct dsa_switch *ds, int p) -+{ -+ int addr = REG_PORT(p); -+ -+ /* -+ * Do not force flow control, disable Ingress and Egress -+ * Header tagging, disable VLAN tunneling, and set the port -+ * state to Forwarding. Additionally, if this is the CPU -+ * port, enable Ingress and Egress Trailer tagging mode. -+ */ -+ REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003); -+ -+ /* -+ * Port based VLAN map: give each port its own address -+ * database, allow the CPU port to talk to each of the 'real' -+ * ports, and allow each of the 'real' ports to only talk to -+ * the CPU port. -+ */ -+ REG_WRITE(addr, 0x06, -+ ((p & 0xf) << 12) | -+ (dsa_is_cpu_port(ds, p) ? -+ ds->phys_port_mask : -+ (1 << ds->dst->cpu_port))); -+ -+ /* -+ * Port Association Vector: when learning source addresses -+ * of packets, add the address to the address database using -+ * a port bitmap that has only the bit for this port set and -+ * the other bits clear. -+ */ -+ REG_WRITE(addr, 0x0b, 1 << p); -+ -+ return 0; -+} -+ -+static int mv88e6063_setup(struct dsa_switch *ds) -+{ -+ int i; -+ int ret; -+ -+ ret = mv88e6063_switch_reset(ds); -+ if (ret < 0) -+ return ret; -+ -+ /* @@@ initialise atu */ -+ -+ ret = mv88e6063_setup_global(ds); -+ if (ret < 0) -+ return ret; -+ -+ for (i = 0; i < NUM_PORTS; i++) { -+ ret = mv88e6063_setup_port(ds, i); -+ if (ret < 0) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int mv88e6063_set_addr(struct dsa_switch *ds, u8 *addr) -+{ -+ REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]); -+ REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]); -+ REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]); -+ -+ return 0; -+} -+ -+static int mv88e6063_port_to_phy_addr(int port) -+{ -+ if (port >= 0 && port <= NUM_PORTS) -+ return REG_PHY(port); -+ return -1; -+} -+ -+static int mv88e6063_phy_read(struct dsa_switch *ds, int port, int regnum) -+{ -+ int addr; -+ -+ addr = mv88e6063_port_to_phy_addr(port); -+ if (addr == -1) -+ return 0xffff; -+ -+ return reg_read(ds, addr, regnum); -+} -+ -+static int -+mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) -+{ -+ int addr; -+ -+ addr = mv88e6063_port_to_phy_addr(port); -+ if (addr == -1) -+ return 0xffff; -+ -+ return reg_write(ds, addr, regnum, val); -+} -+ -+static void mv88e6063_poll_link(struct dsa_switch *ds) -+{ -+ int i; -+ -+ for (i = 0; i < DSA_MAX_PORTS; i++) { -+ struct net_device *dev; -+ int uninitialized_var(port_status); -+ int link; -+ int speed; -+ int duplex; -+ int fc; -+ -+ dev = ds->ports[i]; -+ if (dev == NULL) -+ continue; -+ -+ link = 0; -+ if (dev->flags & IFF_UP) { -+ port_status = reg_read(ds, REG_PORT(i), 0x00); -+ if (port_status < 0) -+ continue; -+ -+ link = !!(port_status & 0x1000); -+ } -+ -+ if (!link) { -+ if (netif_carrier_ok(dev)) { -+ printk(KERN_INFO "%s: link down\n", dev->name); -+ netif_carrier_off(dev); -+ } -+ continue; -+ } -+ -+ speed = (port_status & 0x0100) ? 100 : 10; -+ duplex = (port_status & 0x0200) ? 1 : 0; -+ fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; -+ -+ if (!netif_carrier_ok(dev)) { -+ printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " -+ "flow control %sabled\n", dev->name, -+ speed, duplex ? "full" : "half", -+ fc ? "en" : "dis"); -+ netif_carrier_on(dev); -+ } -+ } -+} -+ -+static struct dsa_switch_driver mv88e6063_switch_driver = { -+ .tag_protocol = htons(ETH_P_TRAILER), -+ .probe = mv88e6063_probe, -+ .setup = mv88e6063_setup, -+ .set_addr = mv88e6063_set_addr, -+ .phy_read = mv88e6063_phy_read, -+ .phy_write = mv88e6063_phy_write, -+ .poll_link = mv88e6063_poll_link, -+}; -+ -+static int __init mv88e6063_init(void) -+{ -+ register_switch_driver(&mv88e6063_switch_driver); -+ return 0; -+} -+module_init(mv88e6063_init); -+ -+static void __exit mv88e6063_cleanup(void) -+{ -+ unregister_switch_driver(&mv88e6063_switch_driver); -+} -+module_exit(mv88e6063_cleanup); -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,1229 @@ -+/* -+ * Driver for the built-in ethernet switch of the Atheros AR7240 SoC -+ * Copyright (c) 2010 Gabor Juhos -+ * Copyright (c) 2010 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "ag71xx.h" -+ -+#define BITM(_count) (BIT(_count) - 1) -+#define BITS(_shift, _count) (BITM(_count) << _shift) -+ -+#define AR7240_REG_MASK_CTRL 0x00 -+#define AR7240_MASK_CTRL_REVISION_M BITM(8) -+#define AR7240_MASK_CTRL_VERSION_M BITM(8) -+#define AR7240_MASK_CTRL_VERSION_S 8 -+#define AR7240_MASK_CTRL_VERSION_AR7240 0x01 -+#define AR7240_MASK_CTRL_VERSION_AR934X 0x02 -+#define AR7240_MASK_CTRL_SOFT_RESET BIT(31) -+ -+#define AR7240_REG_MAC_ADDR0 0x20 -+#define AR7240_REG_MAC_ADDR1 0x24 -+ -+#define AR7240_REG_FLOOD_MASK 0x2c -+#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) -+ -+#define AR7240_REG_GLOBAL_CTRL 0x30 -+#define AR7240_GLOBAL_CTRL_MTU_M BITM(11) -+#define AR9340_GLOBAL_CTRL_MTU_M BITM(14) -+ -+#define AR7240_REG_VTU 0x0040 -+#define AR7240_VTU_OP BITM(3) -+#define AR7240_VTU_OP_NOOP 0x0 -+#define AR7240_VTU_OP_FLUSH 0x1 -+#define AR7240_VTU_OP_LOAD 0x2 -+#define AR7240_VTU_OP_PURGE 0x3 -+#define AR7240_VTU_OP_REMOVE_PORT 0x4 -+#define AR7240_VTU_ACTIVE BIT(3) -+#define AR7240_VTU_FULL BIT(4) -+#define AR7240_VTU_PORT BITS(8, 4) -+#define AR7240_VTU_PORT_S 8 -+#define AR7240_VTU_VID BITS(16, 12) -+#define AR7240_VTU_VID_S 16 -+#define AR7240_VTU_PRIO BITS(28, 3) -+#define AR7240_VTU_PRIO_S 28 -+#define AR7240_VTU_PRIO_EN BIT(31) -+ -+#define AR7240_REG_VTU_DATA 0x0044 -+#define AR7240_VTUDATA_MEMBER BITS(0, 10) -+#define AR7240_VTUDATA_VALID BIT(11) -+ -+#define AR7240_REG_ATU 0x50 -+#define AR7240_ATU_FLUSH_ALL 0x1 -+ -+#define AR7240_REG_AT_CTRL 0x5c -+#define AR7240_AT_CTRL_AGE_TIME BITS(0, 15) -+#define AR7240_AT_CTRL_AGE_EN BIT(17) -+#define AR7240_AT_CTRL_LEARN_CHANGE BIT(18) -+#define AR7240_AT_CTRL_RESERVED BIT(19) -+#define AR7240_AT_CTRL_ARP_EN BIT(20) -+ -+#define AR7240_REG_TAG_PRIORITY 0x70 -+ -+#define AR7240_REG_SERVICE_TAG 0x74 -+#define AR7240_SERVICE_TAG_M BITM(16) -+ -+#define AR7240_REG_CPU_PORT 0x78 -+#define AR7240_MIRROR_PORT_S 4 -+#define AR7240_CPU_PORT_EN BIT(8) -+ -+#define AR7240_REG_MIB_FUNCTION0 0x80 -+#define AR7240_MIB_TIMER_M BITM(16) -+#define AR7240_MIB_AT_HALF_EN BIT(16) -+#define AR7240_MIB_BUSY BIT(17) -+#define AR7240_MIB_FUNC_S 24 -+#define AR7240_MIB_FUNC_M BITM(3) -+#define AR7240_MIB_FUNC_NO_OP 0x0 -+#define AR7240_MIB_FUNC_FLUSH 0x1 -+#define AR7240_MIB_FUNC_CAPTURE 0x3 -+ -+#define AR7240_REG_MDIO_CTRL 0x98 -+#define AR7240_MDIO_CTRL_DATA_M BITM(16) -+#define AR7240_MDIO_CTRL_REG_ADDR_S 16 -+#define AR7240_MDIO_CTRL_PHY_ADDR_S 21 -+#define AR7240_MDIO_CTRL_CMD_WRITE 0 -+#define AR7240_MDIO_CTRL_CMD_READ BIT(27) -+#define AR7240_MDIO_CTRL_MASTER_EN BIT(30) -+#define AR7240_MDIO_CTRL_BUSY BIT(31) -+ -+#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) -+ -+#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00) -+#define AR7240_PORT_STATUS_SPEED_S 0 -+#define AR7240_PORT_STATUS_SPEED_M BITM(2) -+#define AR7240_PORT_STATUS_SPEED_10 0 -+#define AR7240_PORT_STATUS_SPEED_100 1 -+#define AR7240_PORT_STATUS_SPEED_1000 2 -+#define AR7240_PORT_STATUS_TXMAC BIT(2) -+#define AR7240_PORT_STATUS_RXMAC BIT(3) -+#define AR7240_PORT_STATUS_TXFLOW BIT(4) -+#define AR7240_PORT_STATUS_RXFLOW BIT(5) -+#define AR7240_PORT_STATUS_DUPLEX BIT(6) -+#define AR7240_PORT_STATUS_LINK_UP BIT(8) -+#define AR7240_PORT_STATUS_LINK_AUTO BIT(9) -+#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10) -+ -+#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04) -+#define AR7240_PORT_CTRL_STATE_M BITM(3) -+#define AR7240_PORT_CTRL_STATE_DISABLED 0 -+#define AR7240_PORT_CTRL_STATE_BLOCK 1 -+#define AR7240_PORT_CTRL_STATE_LISTEN 2 -+#define AR7240_PORT_CTRL_STATE_LEARN 3 -+#define AR7240_PORT_CTRL_STATE_FORWARD 4 -+#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7) -+#define AR7240_PORT_CTRL_VLAN_MODE_S 8 -+#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0 -+#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1 -+#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2 -+#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3 -+#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10) -+#define AR7240_PORT_CTRL_HEADER BIT(11) -+#define AR7240_PORT_CTRL_MAC_LOOP BIT(12) -+#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13) -+#define AR7240_PORT_CTRL_LEARN BIT(14) -+#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15) -+#define AR7240_PORT_CTRL_MIRROR_TX BIT(16) -+#define AR7240_PORT_CTRL_MIRROR_RX BIT(17) -+ -+#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08) -+ -+#define AR7240_PORT_VLAN_DEFAULT_ID_S 0 -+#define AR7240_PORT_VLAN_DEST_PORTS_S 16 -+#define AR7240_PORT_VLAN_MODE_S 30 -+#define AR7240_PORT_VLAN_MODE_PORT_ONLY 0 -+#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK 1 -+#define AR7240_PORT_VLAN_MODE_VLAN_ONLY 2 -+#define AR7240_PORT_VLAN_MODE_SECURE 3 -+ -+ -+#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100) -+ -+#define AR7240_STATS_RXBROAD 0x00 -+#define AR7240_STATS_RXPAUSE 0x04 -+#define AR7240_STATS_RXMULTI 0x08 -+#define AR7240_STATS_RXFCSERR 0x0c -+#define AR7240_STATS_RXALIGNERR 0x10 -+#define AR7240_STATS_RXRUNT 0x14 -+#define AR7240_STATS_RXFRAGMENT 0x18 -+#define AR7240_STATS_RX64BYTE 0x1c -+#define AR7240_STATS_RX128BYTE 0x20 -+#define AR7240_STATS_RX256BYTE 0x24 -+#define AR7240_STATS_RX512BYTE 0x28 -+#define AR7240_STATS_RX1024BYTE 0x2c -+#define AR7240_STATS_RX1518BYTE 0x30 -+#define AR7240_STATS_RXMAXBYTE 0x34 -+#define AR7240_STATS_RXTOOLONG 0x38 -+#define AR7240_STATS_RXGOODBYTE 0x3c -+#define AR7240_STATS_RXBADBYTE 0x44 -+#define AR7240_STATS_RXOVERFLOW 0x4c -+#define AR7240_STATS_FILTERED 0x50 -+#define AR7240_STATS_TXBROAD 0x54 -+#define AR7240_STATS_TXPAUSE 0x58 -+#define AR7240_STATS_TXMULTI 0x5c -+#define AR7240_STATS_TXUNDERRUN 0x60 -+#define AR7240_STATS_TX64BYTE 0x64 -+#define AR7240_STATS_TX128BYTE 0x68 -+#define AR7240_STATS_TX256BYTE 0x6c -+#define AR7240_STATS_TX512BYTE 0x70 -+#define AR7240_STATS_TX1024BYTE 0x74 -+#define AR7240_STATS_TX1518BYTE 0x78 -+#define AR7240_STATS_TXMAXBYTE 0x7c -+#define AR7240_STATS_TXOVERSIZE 0x80 -+#define AR7240_STATS_TXBYTE 0x84 -+#define AR7240_STATS_TXCOLLISION 0x8c -+#define AR7240_STATS_TXABORTCOL 0x90 -+#define AR7240_STATS_TXMULTICOL 0x94 -+#define AR7240_STATS_TXSINGLECOL 0x98 -+#define AR7240_STATS_TXEXCDEFER 0x9c -+#define AR7240_STATS_TXDEFER 0xa0 -+#define AR7240_STATS_TXLATECOL 0xa4 -+ -+#define AR7240_PORT_CPU 0 -+#define AR7240_NUM_PORTS 6 -+#define AR7240_NUM_PHYS 5 -+ -+#define AR7240_PHY_ID1 0x004d -+#define AR7240_PHY_ID2 0xd041 -+ -+#define AR934X_PHY_ID1 0x004d -+#define AR934X_PHY_ID2 0xd042 -+ -+#define AR7240_MAX_VLANS 16 -+ -+#define AR934X_REG_OPER_MODE0 0x04 -+#define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) -+#define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) -+ -+#define AR934X_REG_OPER_MODE1 0x08 -+#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) -+ -+#define AR934X_REG_FLOOD_MASK 0x2c -+#define AR934X_FLOOD_MASK_MC_DP(_p) BIT(16 + (_p)) -+#define AR934X_FLOOD_MASK_BC_DP(_p) BIT(25 + (_p)) -+ -+#define AR934X_REG_QM_CTRL 0x3c -+#define AR934X_QM_CTRL_ARP_EN BIT(15) -+ -+#define AR934X_REG_AT_CTRL 0x5c -+#define AR934X_AT_CTRL_AGE_TIME BITS(0, 15) -+#define AR934X_AT_CTRL_AGE_EN BIT(17) -+#define AR934X_AT_CTRL_LEARN_CHANGE BIT(18) -+ -+#define AR934X_MIB_ENABLE BIT(30) -+ -+#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) -+ -+#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08) -+#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0 -+#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN BIT(12) -+#define AR934X_PORT_VLAN1_PORT_TLS_MODE BIT(13) -+#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN BIT(14) -+#define AR934X_PORT_VLAN1_PORT_CLONE_EN BIT(15) -+#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16 -+#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN BIT(28) -+#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29 -+ -+#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c) -+#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16 -+#define AR934X_PORT_VLAN2_8021Q_MODE_S 30 -+#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0 -+#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1 -+#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2 -+#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3 -+ -+#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) -+ -+struct ar7240sw_port_stat { -+ unsigned long rx_broadcast; -+ unsigned long rx_pause; -+ unsigned long rx_multicast; -+ unsigned long rx_fcs_error; -+ unsigned long rx_align_error; -+ unsigned long rx_runt; -+ unsigned long rx_fragments; -+ unsigned long rx_64byte; -+ unsigned long rx_128byte; -+ unsigned long rx_256byte; -+ unsigned long rx_512byte; -+ unsigned long rx_1024byte; -+ unsigned long rx_1518byte; -+ unsigned long rx_maxbyte; -+ unsigned long rx_toolong; -+ unsigned long rx_good_byte; -+ unsigned long rx_bad_byte; -+ unsigned long rx_overflow; -+ unsigned long filtered; -+ -+ unsigned long tx_broadcast; -+ unsigned long tx_pause; -+ unsigned long tx_multicast; -+ unsigned long tx_underrun; -+ unsigned long tx_64byte; -+ unsigned long tx_128byte; -+ unsigned long tx_256byte; -+ unsigned long tx_512byte; -+ unsigned long tx_1024byte; -+ unsigned long tx_1518byte; -+ unsigned long tx_maxbyte; -+ unsigned long tx_oversize; -+ unsigned long tx_byte; -+ unsigned long tx_collision; -+ unsigned long tx_abortcol; -+ unsigned long tx_multicol; -+ unsigned long tx_singlecol; -+ unsigned long tx_excdefer; -+ unsigned long tx_defer; -+ unsigned long tx_xlatecol; -+}; -+ -+struct ar7240sw { -+ struct mii_bus *mii_bus; -+ struct ag71xx_switch_platform_data *swdata; -+ struct switch_dev swdev; -+ int num_ports; -+ u8 ver; -+ bool vlan; -+ u16 vlan_id[AR7240_MAX_VLANS]; -+ u8 vlan_table[AR7240_MAX_VLANS]; -+ u8 vlan_tagged; -+ u16 pvid[AR7240_NUM_PORTS]; -+ char buf[80]; -+ -+ rwlock_t stats_lock; -+ struct ar7240sw_port_stat port_stats[AR7240_NUM_PORTS]; -+}; -+ -+struct ar7240sw_hw_stat { -+ char string[ETH_GSTRING_LEN]; -+ int sizeof_stat; -+ int reg; -+}; -+ -+static DEFINE_MUTEX(reg_mutex); -+ -+static inline int sw_is_ar7240(struct ar7240sw *as) -+{ -+ return as->ver == AR7240_MASK_CTRL_VERSION_AR7240; -+} -+ -+static inline int sw_is_ar934x(struct ar7240sw *as) -+{ -+ return as->ver == AR7240_MASK_CTRL_VERSION_AR934X; -+} -+ -+static inline u32 ar7240sw_port_mask(struct ar7240sw *as, int port) -+{ -+ return BIT(port); -+} -+ -+static inline u32 ar7240sw_port_mask_all(struct ar7240sw *as) -+{ -+ return BIT(as->swdev.ports) - 1; -+} -+ -+static inline u32 ar7240sw_port_mask_but(struct ar7240sw *as, int port) -+{ -+ return ar7240sw_port_mask_all(as) & ~BIT(port); -+} -+ -+static inline u16 mk_phy_addr(u32 reg) -+{ -+ return 0x17 & ((reg >> 4) | 0x10); -+} -+ -+static inline u16 mk_phy_reg(u32 reg) -+{ -+ return (reg << 1) & 0x1e; -+} -+ -+static inline u16 mk_high_addr(u32 reg) -+{ -+ return (reg >> 7) & 0x1ff; -+} -+ -+static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg) -+{ -+ unsigned long flags; -+ u16 phy_addr; -+ u16 phy_reg; -+ u32 hi, lo; -+ -+ reg = (reg & 0xfffffffc) >> 2; -+ phy_addr = mk_phy_addr(reg); -+ phy_reg = mk_phy_reg(reg); -+ -+ local_irq_save(flags); -+ ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); -+ lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg); -+ hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1); -+ local_irq_restore(flags); -+ -+ return (hi << 16) | lo; -+} -+ -+static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val) -+{ -+ unsigned long flags; -+ u16 phy_addr; -+ u16 phy_reg; -+ -+ reg = (reg & 0xfffffffc) >> 2; -+ phy_addr = mk_phy_addr(reg); -+ phy_reg = mk_phy_reg(reg); -+ -+ local_irq_save(flags); -+ ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); -+ ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16)); -+ ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff)); -+ local_irq_restore(flags); -+} -+ -+static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr) -+{ -+ u32 ret; -+ -+ mutex_lock(®_mutex); -+ ret = __ar7240sw_reg_read(mii, reg_addr); -+ mutex_unlock(®_mutex); -+ -+ return ret; -+} -+ -+static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val) -+{ -+ mutex_lock(®_mutex); -+ __ar7240sw_reg_write(mii, reg_addr, reg_val); -+ mutex_unlock(®_mutex); -+} -+ -+static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val) -+{ -+ u32 t; -+ -+ mutex_lock(®_mutex); -+ t = __ar7240sw_reg_read(mii, reg); -+ t &= ~mask; -+ t |= val; -+ __ar7240sw_reg_write(mii, reg, t); -+ mutex_unlock(®_mutex); -+ -+ return t; -+} -+ -+static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val) -+{ -+ u32 t; -+ -+ mutex_lock(®_mutex); -+ t = __ar7240sw_reg_read(mii, reg); -+ t |= val; -+ __ar7240sw_reg_write(mii, reg, t); -+ mutex_unlock(®_mutex); -+} -+ -+static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, -+ unsigned timeout) -+{ -+ int i; -+ -+ for (i = 0; i < timeout; i++) { -+ u32 t; -+ -+ t = __ar7240sw_reg_read(mii, reg); -+ if ((t & mask) == val) -+ return 0; -+ -+ usleep_range(1000, 2000); -+ } -+ -+ return -ETIMEDOUT; -+} -+ -+static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, -+ unsigned timeout) -+{ -+ int ret; -+ -+ mutex_lock(®_mutex); -+ ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout); -+ mutex_unlock(®_mutex); -+ return ret; -+} -+ -+u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, -+ unsigned reg_addr) -+{ -+ u32 t, val = 0xffff; -+ int err; -+ -+ if (phy_addr >= AR7240_NUM_PHYS) -+ return 0xffff; -+ -+ mutex_lock(®_mutex); -+ t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | -+ (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | -+ AR7240_MDIO_CTRL_MASTER_EN | -+ AR7240_MDIO_CTRL_BUSY | -+ AR7240_MDIO_CTRL_CMD_READ; -+ -+ __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); -+ err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, -+ AR7240_MDIO_CTRL_BUSY, 0, 5); -+ if (!err) -+ val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL); -+ mutex_unlock(®_mutex); -+ -+ return val & AR7240_MDIO_CTRL_DATA_M; -+} -+ -+int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, -+ unsigned reg_addr, u16 reg_val) -+{ -+ u32 t; -+ int ret; -+ -+ if (phy_addr >= AR7240_NUM_PHYS) -+ return -EINVAL; -+ -+ mutex_lock(®_mutex); -+ t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | -+ (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | -+ AR7240_MDIO_CTRL_MASTER_EN | -+ AR7240_MDIO_CTRL_BUSY | -+ AR7240_MDIO_CTRL_CMD_WRITE | -+ reg_val; -+ -+ __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); -+ ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, -+ AR7240_MDIO_CTRL_BUSY, 0, 5); -+ mutex_unlock(®_mutex); -+ -+ return ret; -+} -+ -+static int ar7240sw_capture_stats(struct ar7240sw *as) -+{ -+ struct mii_bus *mii = as->mii_bus; -+ int port; -+ int ret; -+ -+ write_lock(&as->stats_lock); -+ -+ /* Capture the hardware statistics for all ports */ -+ ar7240sw_reg_rmw(mii, AR7240_REG_MIB_FUNCTION0, -+ (AR7240_MIB_FUNC_M << AR7240_MIB_FUNC_S), -+ (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S)); -+ -+ /* Wait for the capturing to complete. */ -+ ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0, -+ AR7240_MIB_BUSY, 0, 10); -+ -+ if (ret) -+ goto unlock; -+ -+ for (port = 0; port < AR7240_NUM_PORTS; port++) { -+ unsigned int base; -+ struct ar7240sw_port_stat *stats; -+ -+ base = AR7240_REG_STATS_BASE(port); -+ stats = &as->port_stats[port]; -+ -+#define READ_STAT(_r) ar7240sw_reg_read(mii, base + AR7240_STATS_ ## _r) -+ -+ stats->rx_good_byte += READ_STAT(RXGOODBYTE); -+ stats->tx_byte += READ_STAT(TXBYTE); -+ -+#undef READ_STAT -+ } -+ -+ ret = 0; -+ -+unlock: -+ write_unlock(&as->stats_lock); -+ return ret; -+} -+ -+static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port) -+{ -+ ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port), -+ AR7240_PORT_CTRL_STATE_DISABLED); -+} -+ -+static void ar7240sw_setup(struct ar7240sw *as) -+{ -+ struct mii_bus *mii = as->mii_bus; -+ -+ /* Enable CPU port, and disable mirror port */ -+ ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT, -+ AR7240_CPU_PORT_EN | -+ (15 << AR7240_MIRROR_PORT_S)); -+ -+ /* Setup TAG priority mapping */ -+ ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50); -+ -+ if (sw_is_ar934x(as)) { -+ /* Enable aging, MAC replacing */ -+ ar7240sw_reg_write(mii, AR934X_REG_AT_CTRL, -+ 0x2b /* 5 min age time */ | -+ AR934X_AT_CTRL_AGE_EN | -+ AR934X_AT_CTRL_LEARN_CHANGE); -+ /* Enable ARP frame acknowledge */ -+ ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL, -+ AR934X_QM_CTRL_ARP_EN); -+ /* Enable Broadcast/Multicast frames transmitted to the CPU */ -+ ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK, -+ AR934X_FLOOD_MASK_BC_DP(0) | -+ AR934X_FLOOD_MASK_MC_DP(0)); -+ -+ /* setup MTU */ -+ ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, -+ AR9340_GLOBAL_CTRL_MTU_M, -+ AR9340_GLOBAL_CTRL_MTU_M); -+ -+ /* Enable MIB counters */ -+ ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0, -+ AR934X_MIB_ENABLE); -+ -+ } else { -+ /* Enable ARP frame acknowledge, aging, MAC replacing */ -+ ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL, -+ AR7240_AT_CTRL_RESERVED | -+ 0x2b /* 5 min age time */ | -+ AR7240_AT_CTRL_AGE_EN | -+ AR7240_AT_CTRL_ARP_EN | -+ AR7240_AT_CTRL_LEARN_CHANGE); -+ /* Enable Broadcast frames transmitted to the CPU */ -+ ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, -+ AR7240_FLOOD_MASK_BROAD_TO_CPU); -+ -+ /* setup MTU */ -+ ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, -+ AR7240_GLOBAL_CTRL_MTU_M, -+ AR7240_GLOBAL_CTRL_MTU_M); -+ } -+ -+ /* setup Service TAG */ -+ ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); -+} -+ -+/* inspired by phy_poll_reset in drivers/net/phy/phy_device.c */ -+static int -+ar7240sw_phy_poll_reset(struct mii_bus *bus) -+{ -+ const unsigned int sleep_msecs = 20; -+ int ret, elapsed, i; -+ -+ for (elapsed = sleep_msecs; elapsed <= 600; -+ elapsed += sleep_msecs) { -+ msleep(sleep_msecs); -+ for (i = 0; i < AR7240_NUM_PHYS; i++) { -+ ret = ar7240sw_phy_read(bus, i, MII_BMCR); -+ if (ret < 0) -+ return ret; -+ if (ret & BMCR_RESET) -+ break; -+ if (i == AR7240_NUM_PHYS - 1) { -+ usleep_range(1000, 2000); -+ return 0; -+ } -+ } -+ } -+ return -ETIMEDOUT; -+} -+ -+static int ar7240sw_reset(struct ar7240sw *as) -+{ -+ struct mii_bus *mii = as->mii_bus; -+ int ret; -+ int i; -+ -+ /* Set all ports to disabled state. */ -+ for (i = 0; i < AR7240_NUM_PORTS; i++) -+ ar7240sw_disable_port(as, i); -+ -+ /* Wait for transmit queues to drain. */ -+ usleep_range(2000, 3000); -+ -+ /* Reset the switch. */ -+ ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL, -+ AR7240_MASK_CTRL_SOFT_RESET); -+ -+ ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, -+ AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); -+ -+ /* setup PHYs */ -+ for (i = 0; i < AR7240_NUM_PHYS; i++) { -+ ar7240sw_phy_write(mii, i, MII_ADVERTISE, -+ ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | -+ ADVERTISE_PAUSE_ASYM); -+ ar7240sw_phy_write(mii, i, MII_BMCR, -+ BMCR_RESET | BMCR_ANENABLE); -+ } -+ ret = ar7240sw_phy_poll_reset(mii); -+ if (ret) -+ return ret; -+ -+ ar7240sw_setup(as); -+ return ret; -+} -+ -+static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask) -+{ -+ struct mii_bus *mii = as->mii_bus; -+ u32 ctrl; -+ u32 vid, mode; -+ -+ ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN | -+ AR7240_PORT_CTRL_SINGLE_VLAN; -+ -+ if (port == AR7240_PORT_CPU) { -+ ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), -+ AR7240_PORT_STATUS_SPEED_1000 | -+ AR7240_PORT_STATUS_TXFLOW | -+ AR7240_PORT_STATUS_RXFLOW | -+ AR7240_PORT_STATUS_TXMAC | -+ AR7240_PORT_STATUS_RXMAC | -+ AR7240_PORT_STATUS_DUPLEX); -+ } else { -+ ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), -+ AR7240_PORT_STATUS_LINK_AUTO); -+ } -+ -+ /* Set the default VID for this port */ -+ if (as->vlan) { -+ vid = as->vlan_id[as->pvid[port]]; -+ mode = AR7240_PORT_VLAN_MODE_SECURE; -+ } else { -+ vid = port; -+ mode = AR7240_PORT_VLAN_MODE_PORT_ONLY; -+ } -+ -+ if (as->vlan) { -+ if (as->vlan_tagged & BIT(port)) -+ ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD << -+ AR7240_PORT_CTRL_VLAN_MODE_S; -+ else -+ ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP << -+ AR7240_PORT_CTRL_VLAN_MODE_S; -+ } else { -+ ctrl |= AR7240_PORT_CTRL_VLAN_MODE_KEEP << -+ AR7240_PORT_CTRL_VLAN_MODE_S; -+ } -+ -+ if (!portmask) { -+ if (port == AR7240_PORT_CPU) -+ portmask = ar7240sw_port_mask_but(as, AR7240_PORT_CPU); -+ else -+ portmask = ar7240sw_port_mask(as, AR7240_PORT_CPU); -+ } -+ -+ /* allow the port to talk to all other ports, but exclude its -+ * own ID to prevent frames from being reflected back to the -+ * port that they came from */ -+ portmask &= ar7240sw_port_mask_but(as, port); -+ -+ ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl); -+ if (sw_is_ar934x(as)) { -+ u32 vlan1, vlan2; -+ -+ vlan1 = (vid << AR934X_PORT_VLAN1_DEFAULT_CVID_S); -+ vlan2 = (portmask << AR934X_PORT_VLAN2_PORT_VID_MEM_S) | -+ (mode << AR934X_PORT_VLAN2_8021Q_MODE_S); -+ ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN1(port), vlan1); -+ ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN2(port), vlan2); -+ } else { -+ u32 vlan; -+ -+ vlan = vid | (mode << AR7240_PORT_VLAN_MODE_S) | -+ (portmask << AR7240_PORT_VLAN_DEST_PORTS_S); -+ -+ ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan); -+ } -+} -+ -+static int ar7240_set_addr(struct ar7240sw *as, u8 *addr) -+{ -+ struct mii_bus *mii = as->mii_bus; -+ u32 t; -+ -+ t = (addr[4] << 8) | addr[5]; -+ ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t); -+ -+ t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; -+ ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t); -+ -+ return 0; -+} -+ -+static int -+ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ as->vlan_id[val->port_vlan] = val->value.i; -+ return 0; -+} -+ -+static int -+ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ val->value.i = as->vlan_id[val->port_vlan]; -+ return 0; -+} -+ -+static int -+ar7240_set_pvid(struct switch_dev *dev, int port, int vlan) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ -+ /* make sure no invalid PVIDs get set */ -+ -+ if (vlan >= dev->vlans) -+ return -EINVAL; -+ -+ as->pvid[port] = vlan; -+ return 0; -+} -+ -+static int -+ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ *vlan = as->pvid[port]; -+ return 0; -+} -+ -+static int -+ar7240_get_ports(struct switch_dev *dev, struct switch_val *val) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ u8 ports = as->vlan_table[val->port_vlan]; -+ int i; -+ -+ val->len = 0; -+ for (i = 0; i < as->swdev.ports; i++) { -+ struct switch_port *p; -+ -+ if (!(ports & (1 << i))) -+ continue; -+ -+ p = &val->value.ports[val->len++]; -+ p->id = i; -+ if (as->vlan_tagged & (1 << i)) -+ p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); -+ else -+ p->flags = 0; -+ } -+ return 0; -+} -+ -+static int -+ar7240_set_ports(struct switch_dev *dev, struct switch_val *val) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ u8 *vt = &as->vlan_table[val->port_vlan]; -+ int i, j; -+ -+ *vt = 0; -+ for (i = 0; i < val->len; i++) { -+ struct switch_port *p = &val->value.ports[i]; -+ -+ if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) -+ as->vlan_tagged |= (1 << p->id); -+ else { -+ as->vlan_tagged &= ~(1 << p->id); -+ as->pvid[p->id] = val->port_vlan; -+ -+ /* make sure that an untagged port does not -+ * appear in other vlans */ -+ for (j = 0; j < AR7240_MAX_VLANS; j++) { -+ if (j == val->port_vlan) -+ continue; -+ as->vlan_table[j] &= ~(1 << p->id); -+ } -+ } -+ -+ *vt |= 1 << p->id; -+ } -+ return 0; -+} -+ -+static int -+ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ as->vlan = !!val->value.i; -+ return 0; -+} -+ -+static int -+ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ val->value.i = as->vlan; -+ return 0; -+} -+ -+static void -+ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val) -+{ -+ struct mii_bus *mii = as->mii_bus; -+ -+ if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5)) -+ return; -+ -+ if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) { -+ val &= AR7240_VTUDATA_MEMBER; -+ val |= AR7240_VTUDATA_VALID; -+ ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val); -+ } -+ op |= AR7240_VTU_ACTIVE; -+ ar7240sw_reg_write(mii, AR7240_REG_VTU, op); -+} -+ -+static int -+ar7240_hw_apply(struct switch_dev *dev) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ u8 portmask[AR7240_NUM_PORTS]; -+ int i, j; -+ -+ /* flush all vlan translation unit entries */ -+ ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0); -+ -+ memset(portmask, 0, sizeof(portmask)); -+ if (as->vlan) { -+ /* calculate the port destination masks and load vlans -+ * into the vlan translation unit */ -+ for (j = 0; j < AR7240_MAX_VLANS; j++) { -+ u8 vp = as->vlan_table[j]; -+ -+ if (!vp) -+ continue; -+ -+ for (i = 0; i < as->swdev.ports; i++) { -+ u8 mask = (1 << i); -+ if (vp & mask) -+ portmask[i] |= vp & ~mask; -+ } -+ -+ ar7240_vtu_op(as, -+ AR7240_VTU_OP_LOAD | -+ (as->vlan_id[j] << AR7240_VTU_VID_S), -+ as->vlan_table[j]); -+ } -+ } else { -+ /* vlan disabled: -+ * isolate all ports, but connect them to the cpu port */ -+ for (i = 0; i < as->swdev.ports; i++) { -+ if (i == AR7240_PORT_CPU) -+ continue; -+ -+ portmask[i] = 1 << AR7240_PORT_CPU; -+ portmask[AR7240_PORT_CPU] |= (1 << i); -+ } -+ } -+ -+ /* update the port destination mask registers and tag settings */ -+ for (i = 0; i < as->swdev.ports; i++) -+ ar7240sw_setup_port(as, i, portmask[i]); -+ -+ return 0; -+} -+ -+static int -+ar7240_reset_switch(struct switch_dev *dev) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ ar7240sw_reset(as); -+ return 0; -+} -+ -+static int -+ar7240_get_port_link(struct switch_dev *dev, int port, -+ struct switch_port_link *link) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ struct mii_bus *mii = as->mii_bus; -+ u32 status; -+ -+ if (port > AR7240_NUM_PORTS) -+ return -EINVAL; -+ -+ status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); -+ link->aneg = !!(status & AR7240_PORT_STATUS_LINK_AUTO); -+ if (link->aneg) { -+ link->link = !!(status & AR7240_PORT_STATUS_LINK_UP); -+ if (!link->link) -+ return 0; -+ } else { -+ link->link = true; -+ } -+ -+ link->duplex = !!(status & AR7240_PORT_STATUS_DUPLEX); -+ link->tx_flow = !!(status & AR7240_PORT_STATUS_TXFLOW); -+ link->rx_flow = !!(status & AR7240_PORT_STATUS_RXFLOW); -+ switch (status & AR7240_PORT_STATUS_SPEED_M) { -+ case AR7240_PORT_STATUS_SPEED_10: -+ link->speed = SWITCH_PORT_SPEED_10; -+ break; -+ case AR7240_PORT_STATUS_SPEED_100: -+ link->speed = SWITCH_PORT_SPEED_100; -+ break; -+ case AR7240_PORT_STATUS_SPEED_1000: -+ link->speed = SWITCH_PORT_SPEED_1000; -+ break; -+ } -+ -+ return 0; -+} -+ -+static int -+ar7240_get_port_stats(struct switch_dev *dev, int port, -+ struct switch_port_stats *stats) -+{ -+ struct ar7240sw *as = sw_to_ar7240(dev); -+ -+ if (port > AR7240_NUM_PORTS) -+ return -EINVAL; -+ -+ ar7240sw_capture_stats(as); -+ -+ read_lock(&as->stats_lock); -+ stats->rx_bytes = as->port_stats[port].rx_good_byte; -+ stats->tx_bytes = as->port_stats[port].tx_byte; -+ read_unlock(&as->stats_lock); -+ -+ return 0; -+} -+ -+static struct switch_attr ar7240_globals[] = { -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "enable_vlan", -+ .description = "Enable VLAN mode", -+ .set = ar7240_set_vlan, -+ .get = ar7240_get_vlan, -+ .max = 1 -+ }, -+}; -+ -+static struct switch_attr ar7240_port[] = { -+}; -+ -+static struct switch_attr ar7240_vlan[] = { -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "vid", -+ .description = "VLAN ID", -+ .set = ar7240_set_vid, -+ .get = ar7240_get_vid, -+ .max = 4094, -+ }, -+}; -+ -+static const struct switch_dev_ops ar7240_ops = { -+ .attr_global = { -+ .attr = ar7240_globals, -+ .n_attr = ARRAY_SIZE(ar7240_globals), -+ }, -+ .attr_port = { -+ .attr = ar7240_port, -+ .n_attr = ARRAY_SIZE(ar7240_port), -+ }, -+ .attr_vlan = { -+ .attr = ar7240_vlan, -+ .n_attr = ARRAY_SIZE(ar7240_vlan), -+ }, -+ .get_port_pvid = ar7240_get_pvid, -+ .set_port_pvid = ar7240_set_pvid, -+ .get_vlan_ports = ar7240_get_ports, -+ .set_vlan_ports = ar7240_set_ports, -+ .apply_config = ar7240_hw_apply, -+ .reset_switch = ar7240_reset_switch, -+ .get_port_link = ar7240_get_port_link, -+ .get_port_stats = ar7240_get_port_stats, -+}; -+ -+static struct ar7240sw *ar7240_probe(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ struct mii_bus *mii = ag->mii_bus; -+ struct ar7240sw *as; -+ struct switch_dev *swdev; -+ u32 ctrl; -+ u16 phy_id1; -+ u16 phy_id2; -+ int i; -+ -+ phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1); -+ phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2); -+ if ((phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) && -+ (phy_id1 != AR934X_PHY_ID1 || phy_id2 != AR934X_PHY_ID2)) { -+ pr_err("%s: unknown phy id '%04x:%04x'\n", -+ dev_name(&mii->dev), phy_id1, phy_id2); -+ return NULL; -+ } -+ -+ as = kzalloc(sizeof(*as), GFP_KERNEL); -+ if (!as) -+ return NULL; -+ -+ as->mii_bus = mii; -+ as->swdata = pdata->switch_data; -+ -+ swdev = &as->swdev; -+ -+ ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL); -+ as->ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & -+ AR7240_MASK_CTRL_VERSION_M; -+ -+ if (sw_is_ar7240(as)) { -+ swdev->name = "AR7240/AR9330 built-in switch"; -+ swdev->ports = AR7240_NUM_PORTS - 1; -+ } else if (sw_is_ar934x(as)) { -+ swdev->name = "AR934X built-in switch"; -+ -+ if (pdata->phy_if_mode == PHY_INTERFACE_MODE_GMII) { -+ ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, -+ AR934X_OPER_MODE0_MAC_GMII_EN); -+ } else if (pdata->phy_if_mode == PHY_INTERFACE_MODE_MII) { -+ ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, -+ AR934X_OPER_MODE0_PHY_MII_EN); -+ } else { -+ pr_err("%s: invalid PHY interface mode\n", -+ dev_name(&mii->dev)); -+ goto err_free; -+ } -+ -+ if (as->swdata->phy4_mii_en) { -+ ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, -+ AR934X_REG_OPER_MODE1_PHY4_MII_EN); -+ swdev->ports = AR7240_NUM_PORTS - 1; -+ } else { -+ swdev->ports = AR7240_NUM_PORTS; -+ } -+ } else { -+ pr_err("%s: unsupported chip, ctrl=%08x\n", -+ dev_name(&mii->dev), ctrl); -+ goto err_free; -+ } -+ -+ swdev->cpu_port = AR7240_PORT_CPU; -+ swdev->vlans = AR7240_MAX_VLANS; -+ swdev->ops = &ar7240_ops; -+ -+ if (register_switch(&as->swdev, ag->dev) < 0) -+ goto err_free; -+ -+ pr_info("%s: Found an %s\n", dev_name(&mii->dev), swdev->name); -+ -+ /* initialize defaults */ -+ for (i = 0; i < AR7240_MAX_VLANS; i++) -+ as->vlan_id[i] = i; -+ -+ as->vlan_table[0] = ar7240sw_port_mask_all(as); -+ -+ return as; -+ -+err_free: -+ kfree(as); -+ return NULL; -+} -+ -+static void link_function(struct work_struct *work) { -+ struct ag71xx *ag = container_of(work, struct ag71xx, link_work.work); -+ struct ar7240sw *as = ag->phy_priv; -+ unsigned long flags; -+ u8 mask; -+ int i; -+ int status = 0; -+ -+ mask = ~as->swdata->phy_poll_mask; -+ for (i = 0; i < AR7240_NUM_PHYS; i++) { -+ int link; -+ -+ if (!(mask & BIT(i))) -+ continue; -+ -+ link = ar7240sw_phy_read(ag->mii_bus, i, MII_BMSR); -+ if (link & BMSR_LSTATUS) { -+ status = 1; -+ break; -+ } -+ } -+ -+ spin_lock_irqsave(&ag->lock, flags); -+ if (status != ag->link) { -+ ag->link = status; -+ ag71xx_link_adjust(ag); -+ } -+ spin_unlock_irqrestore(&ag->lock, flags); -+ -+ schedule_delayed_work(&ag->link_work, HZ / 2); -+} -+ -+void ag71xx_ar7240_start(struct ag71xx *ag) -+{ -+ struct ar7240sw *as = ag->phy_priv; -+ -+ ar7240sw_reset(as); -+ -+ ag->speed = SPEED_1000; -+ ag->duplex = 1; -+ -+ ar7240_set_addr(as, ag->dev->dev_addr); -+ ar7240_hw_apply(&as->swdev); -+ -+ schedule_delayed_work(&ag->link_work, HZ / 10); -+} -+ -+void ag71xx_ar7240_stop(struct ag71xx *ag) -+{ -+ cancel_delayed_work_sync(&ag->link_work); -+} -+ -+int ag71xx_ar7240_init(struct ag71xx *ag) -+{ -+ struct ar7240sw *as; -+ -+ as = ar7240_probe(ag); -+ if (!as) -+ return -ENODEV; -+ -+ ag->phy_priv = as; -+ ar7240sw_reset(as); -+ -+ rwlock_init(&as->stats_lock); -+ INIT_DELAYED_WORK(&ag->link_work, link_function); -+ -+ return 0; -+} -+ -+void ag71xx_ar7240_cleanup(struct ag71xx *ag) -+{ -+ struct ar7240sw *as = ag->phy_priv; -+ -+ if (!as) -+ return; -+ -+ unregister_switch(&as->swdev); -+ kfree(as); -+ ag->phy_priv = NULL; -+} -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,44 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * Special support for the Atheros ar8216 switch chip -+ * -+ * Copyright (C) 2009-2010 Gabor Juhos -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "ag71xx.h" -+ -+#define AR8216_PACKET_TYPE_MASK 0xf -+#define AR8216_PACKET_TYPE_NORMAL 0 -+ -+#define AR8216_HEADER_LEN 2 -+ -+void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) -+{ -+ skb_push(skb, AR8216_HEADER_LEN); -+ skb->data[0] = 0x10; -+ skb->data[1] = 0x80; -+} -+ -+int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, -+ int pktlen) -+{ -+ u8 type; -+ -+ type = skb->data[1] & AR8216_PACKET_TYPE_MASK; -+ switch (type) { -+ case AR8216_PACKET_TYPE_NORMAL: -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ -+ skb_pull(skb, AR8216_HEADER_LEN); -+ return 0; -+} -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,285 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * -+ * Copyright (C) 2008-2010 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+ -+#include "ag71xx.h" -+ -+static struct dentry *ag71xx_debugfs_root; -+ -+static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file) -+{ -+ file->private_data = inode->i_private; -+ return 0; -+} -+ -+void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) -+{ -+ if (status) -+ ag->debug.int_stats.total++; -+ if (status & AG71XX_INT_TX_PS) -+ ag->debug.int_stats.tx_ps++; -+ if (status & AG71XX_INT_TX_UR) -+ ag->debug.int_stats.tx_ur++; -+ if (status & AG71XX_INT_TX_BE) -+ ag->debug.int_stats.tx_be++; -+ if (status & AG71XX_INT_RX_PR) -+ ag->debug.int_stats.rx_pr++; -+ if (status & AG71XX_INT_RX_OF) -+ ag->debug.int_stats.rx_of++; -+ if (status & AG71XX_INT_RX_BE) -+ ag->debug.int_stats.rx_be++; -+} -+ -+static ssize_t read_file_int_stats(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+#define PR_INT_STAT(_label, _field) \ -+ len += snprintf(buf + len, sizeof(buf) - len, \ -+ "%20s: %10lu\n", _label, ag->debug.int_stats._field); -+ -+ struct ag71xx *ag = file->private_data; -+ char buf[256]; -+ unsigned int len = 0; -+ -+ PR_INT_STAT("TX Packet Sent", tx_ps); -+ PR_INT_STAT("TX Underrun", tx_ur); -+ PR_INT_STAT("TX Bus Error", tx_be); -+ PR_INT_STAT("RX Packet Received", rx_pr); -+ PR_INT_STAT("RX Overflow", rx_of); -+ PR_INT_STAT("RX Bus Error", rx_be); -+ len += snprintf(buf + len, sizeof(buf) - len, "\n"); -+ PR_INT_STAT("Total", total); -+ -+ return simple_read_from_buffer(user_buf, count, ppos, buf, len); -+#undef PR_INT_STAT -+} -+ -+static const struct file_operations ag71xx_fops_int_stats = { -+ .open = ag71xx_debugfs_generic_open, -+ .read = read_file_int_stats, -+ .owner = THIS_MODULE -+}; -+ -+void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) -+{ -+ struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; -+ -+ if (rx) { -+ stats->rx_count++; -+ stats->rx_packets += rx; -+ if (rx <= AG71XX_NAPI_WEIGHT) -+ stats->rx[rx]++; -+ if (rx > stats->rx_packets_max) -+ stats->rx_packets_max = rx; -+ } -+ -+ if (tx) { -+ stats->tx_count++; -+ stats->tx_packets += tx; -+ if (tx <= AG71XX_NAPI_WEIGHT) -+ stats->tx[tx]++; -+ if (tx > stats->tx_packets_max) -+ stats->tx_packets_max = tx; -+ } -+} -+ -+static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ag71xx *ag = file->private_data; -+ struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; -+ char *buf; -+ unsigned int buflen; -+ unsigned int len = 0; -+ unsigned long rx_avg = 0; -+ unsigned long tx_avg = 0; -+ int ret; -+ int i; -+ -+ buflen = 2048; -+ buf = kmalloc(buflen, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ if (stats->rx_count) -+ rx_avg = stats->rx_packets / stats->rx_count; -+ -+ if (stats->tx_count) -+ tx_avg = stats->tx_packets / stats->tx_count; -+ -+ len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n", -+ "len", "rx", "tx"); -+ -+ for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++) -+ len += snprintf(buf + len, buflen - len, -+ "%3d: %10lu %10lu\n", -+ i, stats->rx[i], stats->tx[i]); -+ -+ len += snprintf(buf + len, buflen - len, "\n"); -+ -+ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", -+ "sum", stats->rx_count, stats->tx_count); -+ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", -+ "avg", rx_avg, tx_avg); -+ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", -+ "max", stats->rx_packets_max, stats->tx_packets_max); -+ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", -+ "pkt", stats->rx_packets, stats->tx_packets); -+ -+ ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); -+ kfree(buf); -+ -+ return ret; -+} -+ -+static const struct file_operations ag71xx_fops_napi_stats = { -+ .open = ag71xx_debugfs_generic_open, -+ .read = read_file_napi_stats, -+ .owner = THIS_MODULE -+}; -+ -+#define DESC_PRINT_LEN 64 -+ -+static ssize_t read_file_ring(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos, -+ struct ag71xx *ag, -+ struct ag71xx_ring *ring, -+ unsigned desc_reg) -+{ -+ char *buf; -+ unsigned int buflen; -+ unsigned int len = 0; -+ unsigned long flags; -+ ssize_t ret; -+ int curr; -+ int dirty; -+ u32 desc_hw; -+ int i; -+ -+ buflen = (ring->size * DESC_PRINT_LEN); -+ buf = kmalloc(buflen, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ len += snprintf(buf + len, buflen - len, -+ "Idx ... %-8s %-8s %-8s %-8s . %-10s\n", -+ "desc", "next", "data", "ctrl", "timestamp"); -+ -+ spin_lock_irqsave(&ag->lock, flags); -+ -+ curr = (ring->curr % ring->size); -+ dirty = (ring->dirty % ring->size); -+ desc_hw = ag71xx_rr(ag, desc_reg); -+ for (i = 0; i < ring->size; i++) { -+ struct ag71xx_buf *ab = &ring->buf[i]; -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); -+ u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size; -+ -+ len += snprintf(buf + len, buflen - len, -+ "%3d %c%c%c %08x %08x %08x %08x %c %10lu\n", -+ i, -+ (i == curr) ? 'C' : ' ', -+ (i == dirty) ? 'D' : ' ', -+ (desc_hw == desc_dma) ? 'H' : ' ', -+ desc_dma, -+ desc->next, -+ desc->data, -+ desc->ctrl, -+ (desc->ctrl & DESC_EMPTY) ? 'E' : '*', -+ ab->timestamp); -+ } -+ -+ spin_unlock_irqrestore(&ag->lock, flags); -+ -+ ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); -+ kfree(buf); -+ -+ return ret; -+} -+ -+static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ag71xx *ag = file->private_data; -+ -+ return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring, -+ AG71XX_REG_TX_DESC); -+} -+ -+static const struct file_operations ag71xx_fops_tx_ring = { -+ .open = ag71xx_debugfs_generic_open, -+ .read = read_file_tx_ring, -+ .owner = THIS_MODULE -+}; -+ -+static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ struct ag71xx *ag = file->private_data; -+ -+ return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring, -+ AG71XX_REG_RX_DESC); -+} -+ -+static const struct file_operations ag71xx_fops_rx_ring = { -+ .open = ag71xx_debugfs_generic_open, -+ .read = read_file_rx_ring, -+ .owner = THIS_MODULE -+}; -+ -+void ag71xx_debugfs_exit(struct ag71xx *ag) -+{ -+ debugfs_remove_recursive(ag->debug.debugfs_dir); -+} -+ -+int ag71xx_debugfs_init(struct ag71xx *ag) -+{ -+ struct device *dev = &ag->pdev->dev; -+ -+ ag->debug.debugfs_dir = debugfs_create_dir(dev_name(dev), -+ ag71xx_debugfs_root); -+ if (!ag->debug.debugfs_dir) { -+ dev_err(dev, "unable to create debugfs directory\n"); -+ return -ENOENT; -+ } -+ -+ debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir, -+ ag, &ag71xx_fops_int_stats); -+ debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir, -+ ag, &ag71xx_fops_napi_stats); -+ debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir, -+ ag, &ag71xx_fops_tx_ring); -+ debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir, -+ ag, &ag71xx_fops_rx_ring); -+ -+ return 0; -+} -+ -+int ag71xx_debugfs_root_init(void) -+{ -+ if (ag71xx_debugfs_root) -+ return -EBUSY; -+ -+ ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); -+ if (!ag71xx_debugfs_root) -+ return -ENOENT; -+ -+ return 0; -+} -+ -+void ag71xx_debugfs_root_exit(void) -+{ -+ debugfs_remove(ag71xx_debugfs_root); -+ ag71xx_debugfs_root = NULL; -+} -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,130 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * -+ * Copyright (C) 2008-2010 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "ag71xx.h" -+ -+static int ag71xx_ethtool_get_settings(struct net_device *dev, -+ struct ethtool_cmd *cmd) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ struct phy_device *phydev = ag->phy_dev; -+ -+ if (!phydev) -+ return -ENODEV; -+ -+ return phy_ethtool_gset(phydev, cmd); -+} -+ -+static int ag71xx_ethtool_set_settings(struct net_device *dev, -+ struct ethtool_cmd *cmd) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ struct phy_device *phydev = ag->phy_dev; -+ -+ if (!phydev) -+ return -ENODEV; -+ -+ return phy_ethtool_sset(phydev, cmd); -+} -+ -+static void ag71xx_ethtool_get_drvinfo(struct net_device *dev, -+ struct ethtool_drvinfo *info) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ strcpy(info->driver, ag->pdev->dev.driver->name); -+ strcpy(info->version, AG71XX_DRV_VERSION); -+ strcpy(info->bus_info, dev_name(&ag->pdev->dev)); -+} -+ -+static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ return ag->msg_enable; -+} -+ -+static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ ag->msg_enable = msg_level; -+} -+ -+static void ag71xx_ethtool_get_ringparam(struct net_device *dev, -+ struct ethtool_ringparam *er) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX; -+ er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX; -+ er->rx_mini_max_pending = 0; -+ er->rx_jumbo_max_pending = 0; -+ -+ er->tx_pending = ag->tx_ring.size; -+ er->rx_pending = ag->rx_ring.size; -+ er->rx_mini_pending = 0; -+ er->rx_jumbo_pending = 0; -+ -+ if (ag->tx_ring.desc_split) -+ er->tx_pending /= AG71XX_TX_RING_DS_PER_PKT; -+} -+ -+static int ag71xx_ethtool_set_ringparam(struct net_device *dev, -+ struct ethtool_ringparam *er) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ unsigned tx_size; -+ unsigned rx_size; -+ int err; -+ -+ if (er->rx_mini_pending != 0|| -+ er->rx_jumbo_pending != 0 || -+ er->rx_pending == 0 || -+ er->tx_pending == 0) -+ return -EINVAL; -+ -+ tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ? -+ er->tx_pending : AG71XX_TX_RING_SIZE_MAX; -+ -+ rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ? -+ er->rx_pending : AG71XX_RX_RING_SIZE_MAX; -+ -+ if (netif_running(dev)) { -+ err = dev->netdev_ops->ndo_stop(dev); -+ if (err) -+ return err; -+ } -+ -+ if (ag->tx_ring.desc_split) -+ tx_size *= AG71XX_TX_RING_DS_PER_PKT; -+ -+ ag->tx_ring.size = tx_size; -+ ag->rx_ring.size = rx_size; -+ -+ if (netif_running(dev)) -+ err = dev->netdev_ops->ndo_open(dev); -+ -+ return err; -+} -+ -+struct ethtool_ops ag71xx_ethtool_ops = { -+ .set_settings = ag71xx_ethtool_set_settings, -+ .get_settings = ag71xx_ethtool_get_settings, -+ .get_drvinfo = ag71xx_ethtool_get_drvinfo, -+ .get_msglevel = ag71xx_ethtool_get_msglevel, -+ .set_msglevel = ag71xx_ethtool_set_msglevel, -+ .get_ringparam = ag71xx_ethtool_get_ringparam, -+ .set_ringparam = ag71xx_ethtool_set_ringparam, -+ .get_link = ethtool_op_get_link, -+}; -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx.h linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx.h ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx.h 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,485 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * -+ * Copyright (C) 2008-2010 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __AG71XX_H -+#define __AG71XX_H -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include -+#include -+#include -+ -+#define AG71XX_DRV_NAME "ag71xx" -+#define AG71XX_DRV_VERSION "0.5.35" -+ -+#define AG71XX_NAPI_WEIGHT 64 -+#define AG71XX_OOM_REFILL (1 + HZ/10) -+ -+#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE) -+#define AG71XX_INT_TX (AG71XX_INT_TX_PS) -+#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF) -+ -+#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX) -+#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL) -+ -+#define AG71XX_TX_MTU_LEN 1540 -+ -+#define AG71XX_TX_RING_SPLIT 512 -+#define AG71XX_TX_RING_DS_PER_PKT DIV_ROUND_UP(AG71XX_TX_MTU_LEN, \ -+ AG71XX_TX_RING_SPLIT) -+#define AG71XX_TX_RING_SIZE_DEFAULT 48 -+#define AG71XX_RX_RING_SIZE_DEFAULT 128 -+ -+#define AG71XX_TX_RING_SIZE_MAX 48 -+#define AG71XX_RX_RING_SIZE_MAX 128 -+ -+#ifdef CONFIG_AG71XX_DEBUG -+#define DBG(fmt, args...) pr_debug(fmt, ## args) -+#else -+#define DBG(fmt, args...) do {} while (0) -+#endif -+ -+#define ag71xx_assert(_cond) \ -+do { \ -+ if (_cond) \ -+ break; \ -+ printk("%s,%d: assertion failed\n", __FILE__, __LINE__); \ -+ BUG(); \ -+} while (0) -+ -+struct ag71xx_desc { -+ u32 data; -+ u32 ctrl; -+#define DESC_EMPTY BIT(31) -+#define DESC_MORE BIT(24) -+#define DESC_PKTLEN_M 0xfff -+ u32 next; -+ u32 pad; -+} __attribute__((aligned(4))); -+ -+struct ag71xx_buf { -+ union { -+ struct sk_buff *skb; -+ void *rx_buf; -+ }; -+ union { -+ dma_addr_t dma_addr; -+ unsigned long timestamp; -+ }; -+ unsigned int len; -+}; -+ -+struct ag71xx_ring { -+ struct ag71xx_buf *buf; -+ u8 *descs_cpu; -+ dma_addr_t descs_dma; -+ u16 desc_split; -+ u16 desc_size; -+ unsigned int curr; -+ unsigned int dirty; -+ unsigned int size; -+}; -+ -+struct ag71xx_mdio { -+ struct mii_bus *mii_bus; -+ int mii_irq[PHY_MAX_ADDR]; -+ void __iomem *mdio_base; -+ struct ag71xx_mdio_platform_data *pdata; -+}; -+ -+struct ag71xx_int_stats { -+ unsigned long rx_pr; -+ unsigned long rx_be; -+ unsigned long rx_of; -+ unsigned long tx_ps; -+ unsigned long tx_be; -+ unsigned long tx_ur; -+ unsigned long total; -+}; -+ -+struct ag71xx_napi_stats { -+ unsigned long napi_calls; -+ unsigned long rx_count; -+ unsigned long rx_packets; -+ unsigned long rx_packets_max; -+ unsigned long tx_count; -+ unsigned long tx_packets; -+ unsigned long tx_packets_max; -+ -+ unsigned long rx[AG71XX_NAPI_WEIGHT + 1]; -+ unsigned long tx[AG71XX_NAPI_WEIGHT + 1]; -+}; -+ -+struct ag71xx_debug { -+ struct dentry *debugfs_dir; -+ -+ struct ag71xx_int_stats int_stats; -+ struct ag71xx_napi_stats napi_stats; -+}; -+ -+struct ag71xx { -+ void __iomem *mac_base; -+ -+ spinlock_t lock; -+ struct platform_device *pdev; -+ struct net_device *dev; -+ struct napi_struct napi; -+ u32 msg_enable; -+ -+ struct ag71xx_desc *stop_desc; -+ dma_addr_t stop_desc_dma; -+ -+ struct ag71xx_ring rx_ring; -+ struct ag71xx_ring tx_ring; -+ -+ struct mii_bus *mii_bus; -+ struct phy_device *phy_dev; -+ void *phy_priv; -+ -+ unsigned int link; -+ unsigned int speed; -+ int duplex; -+ -+ unsigned int max_frame_len; -+ unsigned int desc_pktlen_mask; -+ unsigned int rx_buf_size; -+ -+ struct work_struct restart_work; -+ struct delayed_work link_work; -+ struct timer_list oom_timer; -+ -+#ifdef CONFIG_AG71XX_DEBUG_FS -+ struct ag71xx_debug debug; -+#endif -+}; -+ -+extern struct ethtool_ops ag71xx_ethtool_ops; -+void ag71xx_link_adjust(struct ag71xx *ag); -+ -+int ag71xx_mdio_driver_init(void) __init; -+void ag71xx_mdio_driver_exit(void); -+ -+int ag71xx_phy_connect(struct ag71xx *ag); -+void ag71xx_phy_disconnect(struct ag71xx *ag); -+void ag71xx_phy_start(struct ag71xx *ag); -+void ag71xx_phy_stop(struct ag71xx *ag); -+ -+static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag) -+{ -+ return ag->pdev->dev.platform_data; -+} -+ -+static inline int ag71xx_desc_empty(struct ag71xx_desc *desc) -+{ -+ return (desc->ctrl & DESC_EMPTY) != 0; -+} -+ -+static inline struct ag71xx_desc * -+ag71xx_ring_desc(struct ag71xx_ring *ring, int idx) -+{ -+ return (struct ag71xx_desc *) &ring->descs_cpu[idx * ring->desc_size]; -+} -+ -+/* Register offsets */ -+#define AG71XX_REG_MAC_CFG1 0x0000 -+#define AG71XX_REG_MAC_CFG2 0x0004 -+#define AG71XX_REG_MAC_IPG 0x0008 -+#define AG71XX_REG_MAC_HDX 0x000c -+#define AG71XX_REG_MAC_MFL 0x0010 -+#define AG71XX_REG_MII_CFG 0x0020 -+#define AG71XX_REG_MII_CMD 0x0024 -+#define AG71XX_REG_MII_ADDR 0x0028 -+#define AG71XX_REG_MII_CTRL 0x002c -+#define AG71XX_REG_MII_STATUS 0x0030 -+#define AG71XX_REG_MII_IND 0x0034 -+#define AG71XX_REG_MAC_IFCTL 0x0038 -+#define AG71XX_REG_MAC_ADDR1 0x0040 -+#define AG71XX_REG_MAC_ADDR2 0x0044 -+#define AG71XX_REG_FIFO_CFG0 0x0048 -+#define AG71XX_REG_FIFO_CFG1 0x004c -+#define AG71XX_REG_FIFO_CFG2 0x0050 -+#define AG71XX_REG_FIFO_CFG3 0x0054 -+#define AG71XX_REG_FIFO_CFG4 0x0058 -+#define AG71XX_REG_FIFO_CFG5 0x005c -+#define AG71XX_REG_FIFO_RAM0 0x0060 -+#define AG71XX_REG_FIFO_RAM1 0x0064 -+#define AG71XX_REG_FIFO_RAM2 0x0068 -+#define AG71XX_REG_FIFO_RAM3 0x006c -+#define AG71XX_REG_FIFO_RAM4 0x0070 -+#define AG71XX_REG_FIFO_RAM5 0x0074 -+#define AG71XX_REG_FIFO_RAM6 0x0078 -+#define AG71XX_REG_FIFO_RAM7 0x007c -+ -+#define AG71XX_REG_TX_CTRL 0x0180 -+#define AG71XX_REG_TX_DESC 0x0184 -+#define AG71XX_REG_TX_STATUS 0x0188 -+#define AG71XX_REG_RX_CTRL 0x018c -+#define AG71XX_REG_RX_DESC 0x0190 -+#define AG71XX_REG_RX_STATUS 0x0194 -+#define AG71XX_REG_INT_ENABLE 0x0198 -+#define AG71XX_REG_INT_STATUS 0x019c -+ -+#define AG71XX_REG_FIFO_DEPTH 0x01a8 -+#define AG71XX_REG_RX_SM 0x01b0 -+#define AG71XX_REG_TX_SM 0x01b4 -+ -+#define MAC_CFG1_TXE BIT(0) /* Tx Enable */ -+#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */ -+#define MAC_CFG1_RXE BIT(2) /* Rx Enable */ -+#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */ -+#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */ -+#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */ -+#define MAC_CFG1_LB BIT(8) /* Loopback mode */ -+#define MAC_CFG1_SR BIT(31) /* Soft Reset */ -+ -+#define MAC_CFG2_FDX BIT(0) -+#define MAC_CFG2_CRC_EN BIT(1) -+#define MAC_CFG2_PAD_CRC_EN BIT(2) -+#define MAC_CFG2_LEN_CHECK BIT(4) -+#define MAC_CFG2_HUGE_FRAME_EN BIT(5) -+#define MAC_CFG2_IF_1000 BIT(9) -+#define MAC_CFG2_IF_10_100 BIT(8) -+ -+#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */ -+#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */ -+#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */ -+#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */ -+#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */ -+#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \ -+ | FIFO_CFG0_TXS | FIFO_CFG0_TXF) -+ -+#define FIFO_CFG0_ENABLE_SHIFT 8 -+ -+#define FIFO_CFG4_DE BIT(0) /* Drop Event */ -+#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */ -+#define FIFO_CFG4_FC BIT(2) /* False Carrier */ -+#define FIFO_CFG4_CE BIT(3) /* Code Error */ -+#define FIFO_CFG4_CR BIT(4) /* CRC error */ -+#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */ -+#define FIFO_CFG4_LO BIT(6) /* Length out of range */ -+#define FIFO_CFG4_OK BIT(7) /* Packet is OK */ -+#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */ -+#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */ -+#define FIFO_CFG4_DR BIT(10) /* Dribble */ -+#define FIFO_CFG4_LE BIT(11) /* Long Event */ -+#define FIFO_CFG4_CF BIT(12) /* Control Frame */ -+#define FIFO_CFG4_PF BIT(13) /* Pause Frame */ -+#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */ -+#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */ -+#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */ -+#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */ -+ -+#define FIFO_CFG5_DE BIT(0) /* Drop Event */ -+#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */ -+#define FIFO_CFG5_FC BIT(2) /* False Carrier */ -+#define FIFO_CFG5_CE BIT(3) /* Code Error */ -+#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */ -+#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */ -+#define FIFO_CFG5_OK BIT(6) /* Packet is OK */ -+#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */ -+#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */ -+#define FIFO_CFG5_DR BIT(9) /* Dribble */ -+#define FIFO_CFG5_CF BIT(10) /* Control Frame */ -+#define FIFO_CFG5_PF BIT(11) /* Pause Frame */ -+#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */ -+#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */ -+#define FIFO_CFG5_LE BIT(14) /* Long Event */ -+#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */ -+#define FIFO_CFG5_16 BIT(16) /* unknown */ -+#define FIFO_CFG5_17 BIT(17) /* unknown */ -+#define FIFO_CFG5_SF BIT(18) /* Short Frame */ -+#define FIFO_CFG5_BM BIT(19) /* Byte Mode */ -+ -+#define AG71XX_INT_TX_PS BIT(0) -+#define AG71XX_INT_TX_UR BIT(1) -+#define AG71XX_INT_TX_BE BIT(3) -+#define AG71XX_INT_RX_PR BIT(4) -+#define AG71XX_INT_RX_OF BIT(6) -+#define AG71XX_INT_RX_BE BIT(7) -+ -+#define MAC_IFCTL_SPEED BIT(16) -+ -+#define MII_CFG_CLK_DIV_4 0 -+#define MII_CFG_CLK_DIV_6 2 -+#define MII_CFG_CLK_DIV_8 3 -+#define MII_CFG_CLK_DIV_10 4 -+#define MII_CFG_CLK_DIV_14 5 -+#define MII_CFG_CLK_DIV_20 6 -+#define MII_CFG_CLK_DIV_28 7 -+#define MII_CFG_CLK_DIV_34 8 -+#define MII_CFG_CLK_DIV_42 9 -+#define MII_CFG_CLK_DIV_50 10 -+#define MII_CFG_CLK_DIV_58 11 -+#define MII_CFG_CLK_DIV_66 12 -+#define MII_CFG_CLK_DIV_74 13 -+#define MII_CFG_CLK_DIV_82 14 -+#define MII_CFG_CLK_DIV_98 15 -+#define MII_CFG_RESET BIT(31) -+ -+#define MII_CMD_WRITE 0x0 -+#define MII_CMD_READ 0x1 -+#define MII_ADDR_SHIFT 8 -+#define MII_IND_BUSY BIT(0) -+#define MII_IND_INVALID BIT(2) -+ -+#define TX_CTRL_TXE BIT(0) /* Tx Enable */ -+ -+#define TX_STATUS_PS BIT(0) /* Packet Sent */ -+#define TX_STATUS_UR BIT(1) /* Tx Underrun */ -+#define TX_STATUS_BE BIT(3) /* Bus Error */ -+ -+#define RX_CTRL_RXE BIT(0) /* Rx Enable */ -+ -+#define RX_STATUS_PR BIT(0) /* Packet Received */ -+#define RX_STATUS_OF BIT(2) /* Rx Overflow */ -+#define RX_STATUS_BE BIT(3) /* Bus Error */ -+ -+static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg) -+{ -+ switch (reg) { -+ case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: -+ case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_TX_SM: -+ case AG71XX_REG_MII_CFG: -+ break; -+ -+ default: -+ BUG(); -+ } -+} -+ -+static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) -+{ -+ ag71xx_check_reg_offset(ag, reg); -+ -+ __raw_writel(value, ag->mac_base + reg); -+ /* flush write */ -+ (void) __raw_readl(ag->mac_base + reg); -+} -+ -+static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) -+{ -+ ag71xx_check_reg_offset(ag, reg); -+ -+ return __raw_readl(ag->mac_base + reg); -+} -+ -+static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) -+{ -+ void __iomem *r; -+ -+ ag71xx_check_reg_offset(ag, reg); -+ -+ r = ag->mac_base + reg; -+ __raw_writel(__raw_readl(r) | mask, r); -+ /* flush write */ -+ (void)__raw_readl(r); -+} -+ -+static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) -+{ -+ void __iomem *r; -+ -+ ag71xx_check_reg_offset(ag, reg); -+ -+ r = ag->mac_base + reg; -+ __raw_writel(__raw_readl(r) & ~mask, r); -+ /* flush write */ -+ (void) __raw_readl(r); -+} -+ -+static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints) -+{ -+ ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); -+} -+ -+static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) -+{ -+ ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); -+} -+ -+#ifdef CONFIG_AG71XX_AR8216_SUPPORT -+void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); -+int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, -+ int pktlen); -+static inline int ag71xx_has_ar8216(struct ag71xx *ag) -+{ -+ return ag71xx_get_pdata(ag)->has_ar8216; -+} -+#else -+static inline void ag71xx_add_ar8216_header(struct ag71xx *ag, -+ struct sk_buff *skb) -+{ -+} -+ -+static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag, -+ struct sk_buff *skb, -+ int pktlen) -+{ -+ return 0; -+} -+static inline int ag71xx_has_ar8216(struct ag71xx *ag) -+{ -+ return 0; -+} -+#endif -+ -+#ifdef CONFIG_AG71XX_DEBUG_FS -+int ag71xx_debugfs_root_init(void); -+void ag71xx_debugfs_root_exit(void); -+int ag71xx_debugfs_init(struct ag71xx *ag); -+void ag71xx_debugfs_exit(struct ag71xx *ag); -+void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status); -+void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx); -+#else -+static inline int ag71xx_debugfs_root_init(void) { return 0; } -+static inline void ag71xx_debugfs_root_exit(void) {} -+static inline int ag71xx_debugfs_init(struct ag71xx *ag) { return 0; } -+static inline void ag71xx_debugfs_exit(struct ag71xx *ag) {} -+static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, -+ u32 status) {} -+static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, -+ int rx, int tx) {} -+#endif /* CONFIG_AG71XX_DEBUG_FS */ -+ -+void ag71xx_ar7240_start(struct ag71xx *ag); -+void ag71xx_ar7240_stop(struct ag71xx *ag); -+int ag71xx_ar7240_init(struct ag71xx *ag); -+void ag71xx_ar7240_cleanup(struct ag71xx *ag); -+ -+int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg); -+void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val); -+ -+u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, -+ unsigned reg_addr); -+int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, -+ unsigned reg_addr, u16 reg_val); -+ -+#endif /* _AG71XX_H */ -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,1406 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * -+ * Copyright (C) 2008-2010 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "ag71xx.h" -+ -+#define AG71XX_DEFAULT_MSG_ENABLE \ -+ (NETIF_MSG_DRV \ -+ | NETIF_MSG_PROBE \ -+ | NETIF_MSG_LINK \ -+ | NETIF_MSG_TIMER \ -+ | NETIF_MSG_IFDOWN \ -+ | NETIF_MSG_IFUP \ -+ | NETIF_MSG_RX_ERR \ -+ | NETIF_MSG_TX_ERR) -+ -+static int ag71xx_msg_level = -1; -+ -+module_param_named(msg_level, ag71xx_msg_level, int, 0); -+MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); -+ -+#define ETH_SWITCH_HEADER_LEN 2 -+ -+static inline unsigned int ag71xx_max_frame_len(unsigned int mtu) -+{ -+ return ETH_SWITCH_HEADER_LEN + ETH_HLEN + VLAN_HLEN + mtu + ETH_FCS_LEN; -+} -+ -+static void ag71xx_dump_dma_regs(struct ag71xx *ag) -+{ -+ DBG("%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_TX_CTRL), -+ ag71xx_rr(ag, AG71XX_REG_TX_DESC), -+ ag71xx_rr(ag, AG71XX_REG_TX_STATUS)); -+ -+ DBG("%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_RX_CTRL), -+ ag71xx_rr(ag, AG71XX_REG_RX_DESC), -+ ag71xx_rr(ag, AG71XX_REG_RX_STATUS)); -+} -+ -+static void ag71xx_dump_regs(struct ag71xx *ag) -+{ -+ DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_MAC_CFG1), -+ ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), -+ ag71xx_rr(ag, AG71XX_REG_MAC_IPG), -+ ag71xx_rr(ag, AG71XX_REG_MAC_HDX), -+ ag71xx_rr(ag, AG71XX_REG_MAC_MFL)); -+ DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), -+ ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1), -+ ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2)); -+ DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); -+ DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); -+} -+ -+static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr) -+{ -+ DBG("%s: %s intr=%08x %s%s%s%s%s%s\n", -+ ag->dev->name, label, intr, -+ (intr & AG71XX_INT_TX_PS) ? "TXPS " : "", -+ (intr & AG71XX_INT_TX_UR) ? "TXUR " : "", -+ (intr & AG71XX_INT_TX_BE) ? "TXBE " : "", -+ (intr & AG71XX_INT_RX_PR) ? "RXPR " : "", -+ (intr & AG71XX_INT_RX_OF) ? "RXOF " : "", -+ (intr & AG71XX_INT_RX_BE) ? "RXBE " : ""); -+} -+ -+static void ag71xx_ring_free(struct ag71xx_ring *ring) -+{ -+ kfree(ring->buf); -+ -+ if (ring->descs_cpu) -+ dma_free_coherent(NULL, ring->size * ring->desc_size, -+ ring->descs_cpu, ring->descs_dma); -+} -+ -+static int ag71xx_ring_alloc(struct ag71xx_ring *ring) -+{ -+ int err; -+ -+ ring->desc_size = sizeof(struct ag71xx_desc); -+ if (ring->desc_size % cache_line_size()) { -+ DBG("ag71xx: ring %p, desc size %u rounded to %u\n", -+ ring, ring->desc_size, -+ roundup(ring->desc_size, cache_line_size())); -+ ring->desc_size = roundup(ring->desc_size, cache_line_size()); -+ } -+ -+ ring->descs_cpu = dma_alloc_coherent(NULL, ring->size * ring->desc_size, -+ &ring->descs_dma, GFP_ATOMIC); -+ if (!ring->descs_cpu) { -+ err = -ENOMEM; -+ goto err; -+ } -+ -+ -+ ring->buf = kzalloc(ring->size * sizeof(*ring->buf), GFP_KERNEL); -+ if (!ring->buf) { -+ err = -ENOMEM; -+ goto err; -+ } -+ -+ return 0; -+ -+err: -+ return err; -+} -+ -+static void ag71xx_ring_tx_clean(struct ag71xx *ag) -+{ -+ struct ag71xx_ring *ring = &ag->tx_ring; -+ struct net_device *dev = ag->dev; -+ u32 bytes_compl = 0, pkts_compl = 0; -+ -+ while (ring->curr != ring->dirty) { -+ struct ag71xx_desc *desc; -+ u32 i = ring->dirty % ring->size; -+ -+ desc = ag71xx_ring_desc(ring, i); -+ if (!ag71xx_desc_empty(desc)) { -+ desc->ctrl = 0; -+ dev->stats.tx_errors++; -+ } -+ -+ if (ring->buf[i].skb) { -+ bytes_compl += ring->buf[i].len; -+ pkts_compl++; -+ dev_kfree_skb_any(ring->buf[i].skb); -+ } -+ ring->buf[i].skb = NULL; -+ ring->dirty++; -+ } -+ -+ /* flush descriptors */ -+ wmb(); -+ -+ netdev_completed_queue(dev, pkts_compl, bytes_compl); -+} -+ -+static void ag71xx_ring_tx_init(struct ag71xx *ag) -+{ -+ struct ag71xx_ring *ring = &ag->tx_ring; -+ int i; -+ -+ for (i = 0; i < ring->size; i++) { -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); -+ -+ desc->next = (u32) (ring->descs_dma + -+ ring->desc_size * ((i + 1) % ring->size)); -+ -+ desc->ctrl = DESC_EMPTY; -+ ring->buf[i].skb = NULL; -+ } -+ -+ /* flush descriptors */ -+ wmb(); -+ -+ ring->curr = 0; -+ ring->dirty = 0; -+ netdev_reset_queue(ag->dev); -+} -+ -+static void ag71xx_ring_rx_clean(struct ag71xx *ag) -+{ -+ struct ag71xx_ring *ring = &ag->rx_ring; -+ int i; -+ -+ if (!ring->buf) -+ return; -+ -+ for (i = 0; i < ring->size; i++) -+ if (ring->buf[i].rx_buf) { -+ dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr, -+ ag->rx_buf_size, DMA_FROM_DEVICE); -+ kfree(ring->buf[i].rx_buf); -+ } -+} -+ -+static int ag71xx_buffer_offset(struct ag71xx *ag) -+{ -+ int offset = NET_SKB_PAD; -+ -+ /* -+ * On AR71xx/AR91xx packets must be 4-byte aligned. -+ * -+ * When using builtin AR8216 support, hardware adds a 2-byte header, -+ * so we don't need any extra alignment in that case. -+ */ -+ if (!ag71xx_get_pdata(ag)->is_ar724x || ag71xx_has_ar8216(ag)) -+ return offset; -+ -+ return offset + NET_IP_ALIGN; -+} -+ -+static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf, -+ int offset) -+{ -+ struct ag71xx_ring *ring = &ag->rx_ring; -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, buf - &ring->buf[0]); -+ void *data; -+ -+ data = kmalloc(ag->rx_buf_size + -+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)), -+ GFP_ATOMIC); -+ if (!data) -+ return false; -+ -+ buf->rx_buf = data; -+ buf->dma_addr = dma_map_single(&ag->dev->dev, data, ag->rx_buf_size, -+ DMA_FROM_DEVICE); -+ desc->data = (u32) buf->dma_addr + offset; -+ return true; -+} -+ -+static int ag71xx_ring_rx_init(struct ag71xx *ag) -+{ -+ struct ag71xx_ring *ring = &ag->rx_ring; -+ unsigned int i; -+ int ret; -+ int offset = ag71xx_buffer_offset(ag); -+ -+ ret = 0; -+ for (i = 0; i < ring->size; i++) { -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); -+ -+ desc->next = (u32) (ring->descs_dma + -+ ring->desc_size * ((i + 1) % ring->size)); -+ -+ DBG("ag71xx: RX desc at %p, next is %08x\n", -+ desc, desc->next); -+ } -+ -+ for (i = 0; i < ring->size; i++) { -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); -+ -+ if (!ag71xx_fill_rx_buf(ag, &ring->buf[i], offset)) { -+ ret = -ENOMEM; -+ break; -+ } -+ -+ desc->ctrl = DESC_EMPTY; -+ } -+ -+ /* flush descriptors */ -+ wmb(); -+ -+ ring->curr = 0; -+ ring->dirty = 0; -+ -+ return ret; -+} -+ -+static int ag71xx_ring_rx_refill(struct ag71xx *ag) -+{ -+ struct ag71xx_ring *ring = &ag->rx_ring; -+ unsigned int count; -+ int offset = ag71xx_buffer_offset(ag); -+ -+ count = 0; -+ for (; ring->curr - ring->dirty > 0; ring->dirty++) { -+ struct ag71xx_desc *desc; -+ unsigned int i; -+ -+ i = ring->dirty % ring->size; -+ desc = ag71xx_ring_desc(ring, i); -+ -+ if (!ring->buf[i].rx_buf && -+ !ag71xx_fill_rx_buf(ag, &ring->buf[i], offset)) -+ break; -+ -+ desc->ctrl = DESC_EMPTY; -+ count++; -+ } -+ -+ /* flush descriptors */ -+ wmb(); -+ -+ DBG("%s: %u rx descriptors refilled\n", ag->dev->name, count); -+ -+ return count; -+} -+ -+static int ag71xx_rings_init(struct ag71xx *ag) -+{ -+ int ret; -+ -+ ret = ag71xx_ring_alloc(&ag->tx_ring); -+ if (ret) -+ return ret; -+ -+ ag71xx_ring_tx_init(ag); -+ -+ ret = ag71xx_ring_alloc(&ag->rx_ring); -+ if (ret) -+ return ret; -+ -+ ret = ag71xx_ring_rx_init(ag); -+ return ret; -+} -+ -+static void ag71xx_rings_cleanup(struct ag71xx *ag) -+{ -+ ag71xx_ring_rx_clean(ag); -+ ag71xx_ring_free(&ag->rx_ring); -+ -+ ag71xx_ring_tx_clean(ag); -+ netdev_reset_queue(ag->dev); -+ ag71xx_ring_free(&ag->tx_ring); -+} -+ -+static unsigned char *ag71xx_speed_str(struct ag71xx *ag) -+{ -+ switch (ag->speed) { -+ case SPEED_1000: -+ return "1000"; -+ case SPEED_100: -+ return "100"; -+ case SPEED_10: -+ return "10"; -+ } -+ -+ return "?"; -+} -+ -+static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) -+{ -+ u32 t; -+ -+ t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16) -+ | (((u32) mac[3]) << 8) | ((u32) mac[2]); -+ -+ ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); -+ -+ t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16); -+ ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); -+} -+ -+static void ag71xx_dma_reset(struct ag71xx *ag) -+{ -+ u32 val; -+ int i; -+ -+ ag71xx_dump_dma_regs(ag); -+ -+ /* stop RX and TX */ -+ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); -+ ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); -+ -+ /* -+ * give the hardware some time to really stop all rx/tx activity -+ * clearing the descriptors too early causes random memory corruption -+ */ -+ mdelay(1); -+ -+ /* clear descriptor addresses */ -+ ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); -+ ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); -+ -+ /* clear pending RX/TX interrupts */ -+ for (i = 0; i < 256; i++) { -+ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); -+ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); -+ } -+ -+ /* clear pending errors */ -+ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); -+ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); -+ -+ val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); -+ if (val) -+ pr_alert("%s: unable to clear DMA Rx status: %08x\n", -+ ag->dev->name, val); -+ -+ val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); -+ -+ /* mask out reserved bits */ -+ val &= ~0xff000000; -+ -+ if (val) -+ pr_alert("%s: unable to clear DMA Tx status: %08x\n", -+ ag->dev->name, val); -+ -+ ag71xx_dump_dma_regs(ag); -+} -+ -+#define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \ -+ MAC_CFG1_SRX | MAC_CFG1_STX) -+ -+#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT) -+ -+#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \ -+ FIFO_CFG4_CE | FIFO_CFG4_CR | FIFO_CFG4_LM | \ -+ FIFO_CFG4_LO | FIFO_CFG4_OK | FIFO_CFG4_MC | \ -+ FIFO_CFG4_BC | FIFO_CFG4_DR | FIFO_CFG4_LE | \ -+ FIFO_CFG4_CF | FIFO_CFG4_PF | FIFO_CFG4_UO | \ -+ FIFO_CFG4_VT) -+ -+#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \ -+ FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \ -+ FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \ -+ FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \ -+ FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \ -+ FIFO_CFG5_17 | FIFO_CFG5_SF) -+ -+static void ag71xx_hw_stop(struct ag71xx *ag) -+{ -+ /* disable all interrupts and stop the rx/tx engine */ -+ ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); -+ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); -+ ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); -+} -+ -+static void ag71xx_hw_setup(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ -+ /* setup MAC configuration registers */ -+ ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT); -+ -+ ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, -+ MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK); -+ -+ /* setup max frame length to zero */ -+ ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0); -+ -+ /* setup FIFO configuration registers */ -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); -+ if (pdata->is_ar724x) { -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1); -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2); -+ } else { -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000); -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff); -+ } -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); -+} -+ -+static void ag71xx_hw_init(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ u32 reset_mask = pdata->reset_bit; -+ -+ ag71xx_hw_stop(ag); -+ -+ if (pdata->is_ar724x) { -+ u32 reset_phy = reset_mask; -+ -+ reset_phy &= AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY; -+ reset_mask &= ~(AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY); -+ -+ ath79_device_reset_set(reset_phy); -+ msleep(50); -+ ath79_device_reset_clear(reset_phy); -+ msleep(200); -+ } -+ -+ ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); -+ udelay(20); -+ -+ ath79_device_reset_set(reset_mask); -+ msleep(100); -+ ath79_device_reset_clear(reset_mask); -+ msleep(200); -+ -+ ag71xx_hw_setup(ag); -+ -+ ag71xx_dma_reset(ag); -+} -+ -+static void ag71xx_fast_reset(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ struct net_device *dev = ag->dev; -+ u32 reset_mask = pdata->reset_bit; -+ u32 rx_ds, tx_ds; -+ u32 mii_reg; -+ -+ reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC; -+ -+ mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); -+ rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); -+ tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC); -+ -+ ath79_device_reset_set(reset_mask); -+ udelay(10); -+ ath79_device_reset_clear(reset_mask); -+ udelay(10); -+ -+ ag71xx_dma_reset(ag); -+ ag71xx_hw_setup(ag); -+ -+ /* setup max frame length */ -+ ag71xx_wr(ag, AG71XX_REG_MAC_MFL, -+ ag71xx_max_frame_len(ag->dev->mtu)); -+ -+ ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); -+ ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds); -+ ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); -+ -+ ag71xx_hw_set_macaddr(ag, dev->dev_addr); -+} -+ -+static void ag71xx_hw_start(struct ag71xx *ag) -+{ -+ /* start RX engine */ -+ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); -+ -+ /* enable interrupts */ -+ ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); -+} -+ -+void ag71xx_link_adjust(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ u32 cfg2; -+ u32 ifctl; -+ u32 fifo5; -+ u32 fifo3; -+ -+ if (!ag->link) { -+ ag71xx_hw_stop(ag); -+ netif_carrier_off(ag->dev); -+ if (netif_msg_link(ag)) -+ pr_info("%s: link down\n", ag->dev->name); -+ return; -+ } -+ -+ if (pdata->is_ar724x) -+ ag71xx_fast_reset(ag); -+ -+ cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); -+ cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX); -+ cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0; -+ -+ ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); -+ ifctl &= ~(MAC_IFCTL_SPEED); -+ -+ fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); -+ fifo5 &= ~FIFO_CFG5_BM; -+ -+ switch (ag->speed) { -+ case SPEED_1000: -+ cfg2 |= MAC_CFG2_IF_1000; -+ fifo5 |= FIFO_CFG5_BM; -+ break; -+ case SPEED_100: -+ cfg2 |= MAC_CFG2_IF_10_100; -+ ifctl |= MAC_IFCTL_SPEED; -+ break; -+ case SPEED_10: -+ cfg2 |= MAC_CFG2_IF_10_100; -+ break; -+ default: -+ BUG(); -+ return; -+ } -+ -+ if (pdata->is_ar91xx) -+ fifo3 = 0x00780fff; -+ else if (pdata->is_ar724x) -+ fifo3 = pdata->fifo_cfg3; -+ else -+ fifo3 = 0x008001ff; -+ -+ if (ag->tx_ring.desc_split) { -+ fifo3 &= 0xffff; -+ fifo3 |= ((2048 - ag->tx_ring.desc_split) / 4) << 16; -+ } -+ -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, fifo3); -+ -+ if (pdata->set_speed) -+ pdata->set_speed(ag->speed); -+ -+ ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); -+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); -+ ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); -+ ag71xx_hw_start(ag); -+ -+ netif_carrier_on(ag->dev); -+ if (netif_msg_link(ag)) -+ pr_info("%s: link up (%sMbps/%s duplex)\n", -+ ag->dev->name, -+ ag71xx_speed_str(ag), -+ (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); -+ -+ DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); -+ -+ DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), -+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); -+ -+ DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x\n", -+ ag->dev->name, -+ ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), -+ ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL)); -+} -+ -+static int ag71xx_open(struct net_device *dev) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ unsigned int max_frame_len; -+ int ret; -+ -+ max_frame_len = ag71xx_max_frame_len(dev->mtu); -+ ag->rx_buf_size = max_frame_len + NET_SKB_PAD + NET_IP_ALIGN; -+ -+ /* setup max frame length */ -+ ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len); -+ -+ ret = ag71xx_rings_init(ag); -+ if (ret) -+ goto err; -+ -+ napi_enable(&ag->napi); -+ -+ netif_carrier_off(dev); -+ ag71xx_phy_start(ag); -+ -+ ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); -+ ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); -+ -+ ag71xx_hw_set_macaddr(ag, dev->dev_addr); -+ -+ netif_start_queue(dev); -+ -+ return 0; -+ -+err: -+ ag71xx_rings_cleanup(ag); -+ return ret; -+} -+ -+static int ag71xx_stop(struct net_device *dev) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ unsigned long flags; -+ -+ netif_carrier_off(dev); -+ ag71xx_phy_stop(ag); -+ -+ spin_lock_irqsave(&ag->lock, flags); -+ -+ netif_stop_queue(dev); -+ -+ ag71xx_hw_stop(ag); -+ ag71xx_dma_reset(ag); -+ -+ napi_disable(&ag->napi); -+ del_timer_sync(&ag->oom_timer); -+ -+ spin_unlock_irqrestore(&ag->lock, flags); -+ -+ ag71xx_rings_cleanup(ag); -+ -+ return 0; -+} -+ -+static int ag71xx_fill_dma_desc(struct ag71xx_ring *ring, u32 addr, int len) -+{ -+ int i; -+ struct ag71xx_desc *desc; -+ int ndesc = 0; -+ int split = ring->desc_split; -+ -+ if (!split) -+ split = len; -+ -+ while (len > 0) { -+ unsigned int cur_len = len; -+ -+ i = (ring->curr + ndesc) % ring->size; -+ desc = ag71xx_ring_desc(ring, i); -+ -+ if (!ag71xx_desc_empty(desc)) -+ return -1; -+ -+ if (cur_len > split) { -+ cur_len = split; -+ -+ /* -+ * TX will hang if DMA transfers <= 4 bytes, -+ * make sure next segment is more than 4 bytes long. -+ */ -+ if (len <= split + 4) -+ cur_len -= 4; -+ } -+ -+ desc->data = addr; -+ addr += cur_len; -+ len -= cur_len; -+ -+ if (len > 0) -+ cur_len |= DESC_MORE; -+ -+ /* prevent early tx attempt of this descriptor */ -+ if (!ndesc) -+ cur_len |= DESC_EMPTY; -+ -+ desc->ctrl = cur_len; -+ ndesc++; -+ } -+ -+ return ndesc; -+} -+ -+static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, -+ struct net_device *dev) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ struct ag71xx_ring *ring = &ag->tx_ring; -+ struct ag71xx_desc *desc; -+ dma_addr_t dma_addr; -+ int i, n, ring_min; -+ -+ if (ag71xx_has_ar8216(ag)) -+ ag71xx_add_ar8216_header(ag, skb); -+ -+ if (skb->len <= 4) { -+ DBG("%s: packet len is too small\n", ag->dev->name); -+ goto err_drop; -+ } -+ -+ dma_addr = dma_map_single(&dev->dev, skb->data, skb->len, -+ DMA_TO_DEVICE); -+ -+ i = ring->curr % ring->size; -+ desc = ag71xx_ring_desc(ring, i); -+ -+ /* setup descriptor fields */ -+ n = ag71xx_fill_dma_desc(ring, (u32) dma_addr, skb->len & ag->desc_pktlen_mask); -+ if (n < 0) -+ goto err_drop_unmap; -+ -+ i = (ring->curr + n - 1) % ring->size; -+ ring->buf[i].len = skb->len; -+ ring->buf[i].skb = skb; -+ ring->buf[i].timestamp = jiffies; -+ -+ netdev_sent_queue(dev, skb->len); -+ -+ desc->ctrl &= ~DESC_EMPTY; -+ ring->curr += n; -+ -+ /* flush descriptor */ -+ wmb(); -+ -+ ring_min = 2; -+ if (ring->desc_split) -+ ring_min *= AG71XX_TX_RING_DS_PER_PKT; -+ -+ if (ring->curr - ring->dirty >= ring->size - ring_min) { -+ DBG("%s: tx queue full\n", dev->name); -+ netif_stop_queue(dev); -+ } -+ -+ DBG("%s: packet injected into TX queue\n", ag->dev->name); -+ -+ /* enable TX engine */ -+ ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); -+ -+ return NETDEV_TX_OK; -+ -+err_drop_unmap: -+ dma_unmap_single(&dev->dev, dma_addr, skb->len, DMA_TO_DEVICE); -+ -+err_drop: -+ dev->stats.tx_dropped++; -+ -+ dev_kfree_skb(skb); -+ return NETDEV_TX_OK; -+} -+ -+static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ int ret; -+ -+ switch (cmd) { -+ case SIOCETHTOOL: -+ if (ag->phy_dev == NULL) -+ break; -+ -+ spin_lock_irq(&ag->lock); -+ ret = phy_ethtool_ioctl(ag->phy_dev, (void *) ifr->ifr_data); -+ spin_unlock_irq(&ag->lock); -+ return ret; -+ -+ case SIOCSIFHWADDR: -+ if (copy_from_user -+ (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) -+ return -EFAULT; -+ return 0; -+ -+ case SIOCGIFHWADDR: -+ if (copy_to_user -+ (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) -+ return -EFAULT; -+ return 0; -+ -+ case SIOCGMIIPHY: -+ case SIOCGMIIREG: -+ case SIOCSMIIREG: -+ if (ag->phy_dev == NULL) -+ break; -+ -+ return phy_mii_ioctl(ag->phy_dev, ifr, cmd); -+ -+ default: -+ break; -+ } -+ -+ return -EOPNOTSUPP; -+} -+ -+static void ag71xx_oom_timer_handler(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *) data; -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ napi_schedule(&ag->napi); -+} -+ -+static void ag71xx_tx_timeout(struct net_device *dev) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ if (netif_msg_tx_err(ag)) -+ pr_info("%s: tx timeout\n", ag->dev->name); -+ -+ schedule_work(&ag->restart_work); -+} -+ -+static void ag71xx_restart_work_func(struct work_struct *work) -+{ -+ struct ag71xx *ag = container_of(work, struct ag71xx, restart_work); -+ -+ if (ag71xx_get_pdata(ag)->is_ar724x) { -+ ag->link = 0; -+ ag71xx_link_adjust(ag); -+ return; -+ } -+ -+ ag71xx_stop(ag->dev); -+ ag71xx_open(ag->dev); -+} -+ -+static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp) -+{ -+ u32 rx_sm, tx_sm, rx_fd; -+ -+ if (likely(time_before(jiffies, timestamp + HZ/10))) -+ return false; -+ -+ if (!netif_carrier_ok(ag->dev)) -+ return false; -+ -+ rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); -+ if ((rx_sm & 0x7) == 0x3 && ((rx_sm >> 4) & 0x7) == 0x6) -+ return true; -+ -+ tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); -+ rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); -+ if (((tx_sm >> 4) & 0x7) == 0 && ((rx_sm & 0x7) == 0) && -+ ((rx_sm >> 4) & 0x7) == 0 && rx_fd == 0) -+ return true; -+ -+ return false; -+} -+ -+static int ag71xx_tx_packets(struct ag71xx *ag) -+{ -+ struct ag71xx_ring *ring = &ag->tx_ring; -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ int sent = 0; -+ int bytes_compl = 0; -+ int n = 0; -+ -+ DBG("%s: processing TX ring\n", ag->dev->name); -+ -+ while (ring->dirty + n != ring->curr) { -+ unsigned int i = (ring->dirty + n) % ring->size; -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); -+ struct sk_buff *skb = ring->buf[i].skb; -+ -+ if (!ag71xx_desc_empty(desc)) { -+ if (pdata->is_ar7240 && -+ ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp)) -+ schedule_work(&ag->restart_work); -+ break; -+ } -+ -+ n++; -+ if (!skb) -+ continue; -+ -+ dev_kfree_skb_any(skb); -+ ring->buf[i].skb = NULL; -+ -+ bytes_compl += ring->buf[i].len; -+ -+ sent++; -+ ring->dirty += n; -+ -+ while (n > 0) { -+ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); -+ n--; -+ } -+ } -+ -+ DBG("%s: %d packets sent out\n", ag->dev->name, sent); -+ -+ ag->dev->stats.tx_bytes += bytes_compl; -+ ag->dev->stats.tx_packets += sent; -+ -+ if (!sent) -+ return 0; -+ -+ netdev_completed_queue(ag->dev, sent, bytes_compl); -+ if ((ring->curr - ring->dirty) < (ring->size * 3) / 4) -+ netif_wake_queue(ag->dev); -+ -+ return sent; -+} -+ -+static int ag71xx_rx_packets(struct ag71xx *ag, int limit) -+{ -+ struct net_device *dev = ag->dev; -+ struct ag71xx_ring *ring = &ag->rx_ring; -+ int offset = ag71xx_buffer_offset(ag); -+ unsigned int pktlen_mask = ag->desc_pktlen_mask; -+ int done = 0; -+ -+ DBG("%s: rx packets, limit=%d, curr=%u, dirty=%u\n", -+ dev->name, limit, ring->curr, ring->dirty); -+ -+ while (done < limit) { -+ unsigned int i = ring->curr % ring->size; -+ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); -+ struct sk_buff *skb; -+ int pktlen; -+ int err = 0; -+ -+ if (ag71xx_desc_empty(desc)) -+ break; -+ -+ if ((ring->dirty + ring->size) == ring->curr) { -+ ag71xx_assert(0); -+ break; -+ } -+ -+ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); -+ -+ pktlen = desc->ctrl & pktlen_mask; -+ pktlen -= ETH_FCS_LEN; -+ -+ dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, -+ ag->rx_buf_size, DMA_FROM_DEVICE); -+ -+ dev->stats.rx_packets++; -+ dev->stats.rx_bytes += pktlen; -+ -+ skb = build_skb(ring->buf[i].rx_buf, 0); -+ if (!skb) { -+ kfree(ring->buf[i].rx_buf); -+ goto next; -+ } -+ -+ skb_reserve(skb, offset); -+ skb_put(skb, pktlen); -+ -+ if (ag71xx_has_ar8216(ag)) -+ err = ag71xx_remove_ar8216_header(ag, skb, pktlen); -+ -+ if (err) { -+ dev->stats.rx_dropped++; -+ kfree_skb(skb); -+ } else { -+ skb->dev = dev; -+ skb->ip_summed = CHECKSUM_NONE; -+ skb->protocol = eth_type_trans(skb, dev); -+ netif_receive_skb(skb); -+ } -+ -+next: -+ ring->buf[i].rx_buf = NULL; -+ done++; -+ -+ ring->curr++; -+ } -+ -+ ag71xx_ring_rx_refill(ag); -+ -+ DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n", -+ dev->name, ring->curr, ring->dirty, done); -+ -+ return done; -+} -+ -+static int ag71xx_poll(struct napi_struct *napi, int limit) -+{ -+ struct ag71xx *ag = container_of(napi, struct ag71xx, napi); -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ struct net_device *dev = ag->dev; -+ struct ag71xx_ring *rx_ring; -+ unsigned long flags; -+ u32 status; -+ int tx_done; -+ int rx_done; -+ -+ pdata->ddr_flush(); -+ tx_done = ag71xx_tx_packets(ag); -+ -+ DBG("%s: processing RX ring\n", dev->name); -+ rx_done = ag71xx_rx_packets(ag, limit); -+ -+ ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done); -+ -+ rx_ring = &ag->rx_ring; -+ if (rx_ring->buf[rx_ring->dirty % rx_ring->size].rx_buf == NULL) -+ goto oom; -+ -+ status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); -+ if (unlikely(status & RX_STATUS_OF)) { -+ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); -+ dev->stats.rx_fifo_errors++; -+ -+ /* restart RX */ -+ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); -+ } -+ -+ if (rx_done < limit) { -+ if (status & RX_STATUS_PR) -+ goto more; -+ -+ status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); -+ if (status & TX_STATUS_PS) -+ goto more; -+ -+ DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n", -+ dev->name, rx_done, tx_done, limit); -+ -+ napi_complete(napi); -+ -+ /* enable interrupts */ -+ spin_lock_irqsave(&ag->lock, flags); -+ ag71xx_int_enable(ag, AG71XX_INT_POLL); -+ spin_unlock_irqrestore(&ag->lock, flags); -+ return rx_done; -+ } -+ -+more: -+ DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n", -+ dev->name, rx_done, tx_done, limit); -+ return limit; -+ -+oom: -+ if (netif_msg_rx_err(ag)) -+ pr_info("%s: out of memory\n", dev->name); -+ -+ mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); -+ napi_complete(napi); -+ return 0; -+} -+ -+static irqreturn_t ag71xx_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = dev_id; -+ struct ag71xx *ag = netdev_priv(dev); -+ u32 status; -+ -+ status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); -+ ag71xx_dump_intr(ag, "raw", status); -+ -+ if (unlikely(!status)) -+ return IRQ_NONE; -+ -+ if (unlikely(status & AG71XX_INT_ERR)) { -+ if (status & AG71XX_INT_TX_BE) { -+ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); -+ dev_err(&dev->dev, "TX BUS error\n"); -+ } -+ if (status & AG71XX_INT_RX_BE) { -+ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); -+ dev_err(&dev->dev, "RX BUS error\n"); -+ } -+ } -+ -+ if (likely(status & AG71XX_INT_POLL)) { -+ ag71xx_int_disable(ag, AG71XX_INT_POLL); -+ DBG("%s: enable polling mode\n", dev->name); -+ napi_schedule(&ag->napi); -+ } -+ -+ ag71xx_debugfs_update_int_stats(ag, status); -+ -+ return IRQ_HANDLED; -+} -+ -+#ifdef CONFIG_NET_POLL_CONTROLLER -+/* -+ * Polling 'interrupt' - used by things like netconsole to send skbs -+ * without having to re-enable interrupts. It's not called while -+ * the interrupt routine is executing. -+ */ -+static void ag71xx_netpoll(struct net_device *dev) -+{ -+ disable_irq(dev->irq); -+ ag71xx_interrupt(dev->irq, dev); -+ enable_irq(dev->irq); -+} -+#endif -+ -+static int ag71xx_change_mtu(struct net_device *dev, int new_mtu) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ unsigned int max_frame_len; -+ -+ max_frame_len = ag71xx_max_frame_len(new_mtu); -+ if (new_mtu < 68 || max_frame_len > ag->max_frame_len) -+ return -EINVAL; -+ -+ if (netif_running(dev)) -+ return -EBUSY; -+ -+ dev->mtu = new_mtu; -+ return 0; -+} -+ -+static const struct net_device_ops ag71xx_netdev_ops = { -+ .ndo_open = ag71xx_open, -+ .ndo_stop = ag71xx_stop, -+ .ndo_start_xmit = ag71xx_hard_start_xmit, -+ .ndo_do_ioctl = ag71xx_do_ioctl, -+ .ndo_tx_timeout = ag71xx_tx_timeout, -+ .ndo_change_mtu = ag71xx_change_mtu, -+ .ndo_set_mac_address = eth_mac_addr, -+ .ndo_validate_addr = eth_validate_addr, -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ .ndo_poll_controller = ag71xx_netpoll, -+#endif -+}; -+ -+static const char *ag71xx_get_phy_if_mode_name(phy_interface_t mode) -+{ -+ switch (mode) { -+ case PHY_INTERFACE_MODE_MII: -+ return "MII"; -+ case PHY_INTERFACE_MODE_GMII: -+ return "GMII"; -+ case PHY_INTERFACE_MODE_RMII: -+ return "RMII"; -+ case PHY_INTERFACE_MODE_RGMII: -+ return "RGMII"; -+ case PHY_INTERFACE_MODE_SGMII: -+ return "SGMII"; -+ default: -+ break; -+ } -+ -+ return "unknown"; -+} -+ -+ -+static int ag71xx_probe(struct platform_device *pdev) -+{ -+ struct net_device *dev; -+ struct resource *res; -+ struct ag71xx *ag; -+ struct ag71xx_platform_data *pdata; -+ int err; -+ -+ pdata = pdev->dev.platform_data; -+ if (!pdata) { -+ dev_err(&pdev->dev, "no platform data specified\n"); -+ err = -ENXIO; -+ goto err_out; -+ } -+ -+ if (pdata->mii_bus_dev == NULL && pdata->phy_mask) { -+ dev_err(&pdev->dev, "no MII bus device specified\n"); -+ err = -EINVAL; -+ goto err_out; -+ } -+ -+ dev = alloc_etherdev(sizeof(*ag)); -+ if (!dev) { -+ dev_err(&pdev->dev, "alloc_etherdev failed\n"); -+ err = -ENOMEM; -+ goto err_out; -+ } -+ -+ if (!pdata->max_frame_len || !pdata->desc_pktlen_mask) -+ return -EINVAL; -+ -+ SET_NETDEV_DEV(dev, &pdev->dev); -+ -+ ag = netdev_priv(dev); -+ ag->pdev = pdev; -+ ag->dev = dev; -+ ag->msg_enable = netif_msg_init(ag71xx_msg_level, -+ AG71XX_DEFAULT_MSG_ENABLE); -+ spin_lock_init(&ag->lock); -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base"); -+ if (!res) { -+ dev_err(&pdev->dev, "no mac_base resource found\n"); -+ err = -ENXIO; -+ goto err_out; -+ } -+ -+ ag->mac_base = ioremap_nocache(res->start, res->end - res->start + 1); -+ if (!ag->mac_base) { -+ dev_err(&pdev->dev, "unable to ioremap mac_base\n"); -+ err = -ENOMEM; -+ goto err_free_dev; -+ } -+ -+ dev->irq = platform_get_irq(pdev, 0); -+ err = request_irq(dev->irq, ag71xx_interrupt, -+ 0x0, -+ dev->name, dev); -+ if (err) { -+ dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq); -+ goto err_unmap_base; -+ } -+ -+ dev->base_addr = (unsigned long)ag->mac_base; -+ dev->netdev_ops = &ag71xx_netdev_ops; -+ dev->ethtool_ops = &ag71xx_ethtool_ops; -+ -+ INIT_WORK(&ag->restart_work, ag71xx_restart_work_func); -+ -+ init_timer(&ag->oom_timer); -+ ag->oom_timer.data = (unsigned long) dev; -+ ag->oom_timer.function = ag71xx_oom_timer_handler; -+ -+ ag->tx_ring.size = AG71XX_TX_RING_SIZE_DEFAULT; -+ ag->rx_ring.size = AG71XX_RX_RING_SIZE_DEFAULT; -+ -+ ag->max_frame_len = pdata->max_frame_len; -+ ag->desc_pktlen_mask = pdata->desc_pktlen_mask; -+ -+ if (!pdata->is_ar724x && !pdata->is_ar91xx) { -+ ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT; -+ ag->tx_ring.size *= AG71XX_TX_RING_DS_PER_PKT; -+ } -+ -+ ag->stop_desc = dma_alloc_coherent(NULL, -+ sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL); -+ -+ if (!ag->stop_desc) -+ goto err_free_irq; -+ -+ ag->stop_desc->data = 0; -+ ag->stop_desc->ctrl = 0; -+ ag->stop_desc->next = (u32) ag->stop_desc_dma; -+ -+ memcpy(dev->dev_addr, pdata->mac_addr, ETH_ALEN); -+ -+ netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); -+ -+ ag71xx_dump_regs(ag); -+ -+ ag71xx_hw_init(ag); -+ -+ ag71xx_dump_regs(ag); -+ -+ err = ag71xx_phy_connect(ag); -+ if (err) -+ goto err_free_desc; -+ -+ err = ag71xx_debugfs_init(ag); -+ if (err) -+ goto err_phy_disconnect; -+ -+ platform_set_drvdata(pdev, dev); -+ -+ err = register_netdev(dev); -+ if (err) { -+ dev_err(&pdev->dev, "unable to register net device\n"); -+ goto err_debugfs_exit; -+ } -+ -+ pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n", -+ dev->name, dev->base_addr, dev->irq, -+ ag71xx_get_phy_if_mode_name(pdata->phy_if_mode)); -+ -+ return 0; -+ -+err_debugfs_exit: -+ ag71xx_debugfs_exit(ag); -+err_phy_disconnect: -+ ag71xx_phy_disconnect(ag); -+err_free_desc: -+ dma_free_coherent(NULL, sizeof(struct ag71xx_desc), ag->stop_desc, -+ ag->stop_desc_dma); -+err_free_irq: -+ free_irq(dev->irq, dev); -+err_unmap_base: -+ iounmap(ag->mac_base); -+err_free_dev: -+ kfree(dev); -+err_out: -+ platform_set_drvdata(pdev, NULL); -+ return err; -+} -+ -+static int ag71xx_remove(struct platform_device *pdev) -+{ -+ struct net_device *dev = platform_get_drvdata(pdev); -+ -+ if (dev) { -+ struct ag71xx *ag = netdev_priv(dev); -+ -+ ag71xx_debugfs_exit(ag); -+ ag71xx_phy_disconnect(ag); -+ unregister_netdev(dev); -+ free_irq(dev->irq, dev); -+ iounmap(ag->mac_base); -+ kfree(dev); -+ platform_set_drvdata(pdev, NULL); -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver ag71xx_driver = { -+ .probe = ag71xx_probe, -+ .remove = ag71xx_remove, -+ .driver = { -+ .name = AG71XX_DRV_NAME, -+ } -+}; -+ -+static int __init ag71xx_module_init(void) -+{ -+ int ret; -+ -+ ret = ag71xx_debugfs_root_init(); -+ if (ret) -+ goto err_out; -+ -+ ret = ag71xx_mdio_driver_init(); -+ if (ret) -+ goto err_debugfs_exit; -+ -+ ret = platform_driver_register(&ag71xx_driver); -+ if (ret) -+ goto err_mdio_exit; -+ -+ return 0; -+ -+err_mdio_exit: -+ ag71xx_mdio_driver_exit(); -+err_debugfs_exit: -+ ag71xx_debugfs_root_exit(); -+err_out: -+ return ret; -+} -+ -+static void __exit ag71xx_module_exit(void) -+{ -+ platform_driver_unregister(&ag71xx_driver); -+ ag71xx_mdio_driver_exit(); -+ ag71xx_debugfs_root_exit(); -+} -+ -+module_init(ag71xx_module_init); -+module_exit(ag71xx_module_exit); -+ -+MODULE_VERSION(AG71XX_DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_AUTHOR("Imre Kaloz "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" AG71XX_DRV_NAME); -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,318 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * -+ * Copyright (C) 2008-2010 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "ag71xx.h" -+ -+#define AG71XX_MDIO_RETRY 1000 -+#define AG71XX_MDIO_DELAY 5 -+ -+static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg, -+ u32 value) -+{ -+ void __iomem *r; -+ -+ r = am->mdio_base + reg; -+ __raw_writel(value, r); -+ -+ /* flush write */ -+ (void) __raw_readl(r); -+} -+ -+static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg) -+{ -+ return __raw_readl(am->mdio_base + reg); -+} -+ -+static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am) -+{ -+ DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n", -+ am->mii_bus->name, -+ ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG), -+ ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD), -+ ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR)); -+ DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n", -+ am->mii_bus->name, -+ ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL), -+ ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS), -+ ag71xx_mdio_rr(am, AG71XX_REG_MII_IND)); -+} -+ -+static int ag71xx_mdio_wait_busy(struct ag71xx_mdio *am) -+{ -+ int i; -+ -+ for (i = 0; i < AG71XX_MDIO_RETRY; i++) { -+ u32 busy; -+ -+ udelay(AG71XX_MDIO_DELAY); -+ -+ busy = ag71xx_mdio_rr(am, AG71XX_REG_MII_IND); -+ if (!busy) -+ return 0; -+ -+ udelay(AG71XX_MDIO_DELAY); -+ } -+ -+ pr_err("%s: MDIO operation timed out\n", am->mii_bus->name); -+ -+ return -ETIMEDOUT; -+} -+ -+int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg) -+{ -+ int err; -+ int ret; -+ -+ err = ag71xx_mdio_wait_busy(am); -+ if (err) -+ return 0xffff; -+ -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, -+ ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ); -+ -+ err = ag71xx_mdio_wait_busy(am); -+ if (err) -+ return 0xffff; -+ -+ ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff; -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); -+ -+ DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret); -+ -+ return ret; -+} -+ -+void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val) -+{ -+ DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val); -+ -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, -+ ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val); -+ -+ ag71xx_mdio_wait_busy(am); -+} -+ -+static const u32 ar71xx_mdio_div_table[] = { -+ 4, 4, 6, 8, 10, 14, 20, 28, -+}; -+ -+static const u32 ar7240_mdio_div_table[] = { -+ 2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96, -+}; -+ -+static const u32 ar933x_mdio_div_table[] = { -+ 4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98, -+}; -+ -+static int ag71xx_mdio_get_divider(struct ag71xx_mdio *am, u32 *div) -+{ -+ unsigned long ref_clock, mdio_clock; -+ const u32 *table; -+ int ndivs; -+ int i; -+ -+ ref_clock = am->pdata->ref_clock; -+ mdio_clock = am->pdata->mdio_clock; -+ -+ if (!ref_clock || !mdio_clock) -+ return -EINVAL; -+ -+ if (am->pdata->is_ar9330 || am->pdata->is_ar934x) { -+ table = ar933x_mdio_div_table; -+ ndivs = ARRAY_SIZE(ar933x_mdio_div_table); -+ } else if (am->pdata->is_ar7240) { -+ table = ar7240_mdio_div_table; -+ ndivs = ARRAY_SIZE(ar7240_mdio_div_table); -+ } else { -+ table = ar71xx_mdio_div_table; -+ ndivs = ARRAY_SIZE(ar71xx_mdio_div_table); -+ } -+ -+ for (i = 0; i < ndivs; i++) { -+ unsigned long t; -+ -+ t = ref_clock / table[i]; -+ if (t <= mdio_clock) { -+ *div = i; -+ return 0; -+ } -+ } -+ -+ dev_err(&am->mii_bus->dev, "no divider found for %lu/%lu\n", -+ ref_clock, mdio_clock); -+ return -ENOENT; -+} -+ -+static int ag71xx_mdio_reset(struct mii_bus *bus) -+{ -+ struct ag71xx_mdio *am = bus->priv; -+ u32 t; -+ int err; -+ -+ err = ag71xx_mdio_get_divider(am, &t); -+ if (err) { -+ /* fallback */ -+ if (am->pdata->is_ar7240) -+ t = MII_CFG_CLK_DIV_6; -+ else if (am->pdata->builtin_switch && !am->pdata->is_ar934x) -+ t = MII_CFG_CLK_DIV_10; -+ else if (!am->pdata->builtin_switch && am->pdata->is_ar934x) -+ t = MII_CFG_CLK_DIV_58; -+ else -+ t = MII_CFG_CLK_DIV_28; -+ } -+ -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); -+ udelay(100); -+ -+ ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t); -+ udelay(100); -+ -+ if (am->pdata->reset) -+ am->pdata->reset(bus); -+ -+ return 0; -+} -+ -+static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg) -+{ -+ struct ag71xx_mdio *am = bus->priv; -+ -+ if (am->pdata->builtin_switch) -+ return ar7240sw_phy_read(bus, addr, reg); -+ else -+ return ag71xx_mdio_mii_read(am, addr, reg); -+} -+ -+static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val) -+{ -+ struct ag71xx_mdio *am = bus->priv; -+ -+ if (am->pdata->builtin_switch) -+ ar7240sw_phy_write(bus, addr, reg, val); -+ else -+ ag71xx_mdio_mii_write(am, addr, reg, val); -+ return 0; -+} -+ -+static int ag71xx_mdio_probe(struct platform_device *pdev) -+{ -+ struct ag71xx_mdio_platform_data *pdata; -+ struct ag71xx_mdio *am; -+ struct resource *res; -+ int i; -+ int err; -+ -+ pdata = pdev->dev.platform_data; -+ if (!pdata) { -+ dev_err(&pdev->dev, "no platform data specified\n"); -+ return -EINVAL; -+ } -+ -+ am = kzalloc(sizeof(*am), GFP_KERNEL); -+ if (!am) { -+ err = -ENOMEM; -+ goto err_out; -+ } -+ -+ am->pdata = pdata; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ dev_err(&pdev->dev, "no iomem resource found\n"); -+ err = -ENXIO; -+ goto err_out; -+ } -+ -+ am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1); -+ if (!am->mdio_base) { -+ dev_err(&pdev->dev, "unable to ioremap registers\n"); -+ err = -ENOMEM; -+ goto err_free_mdio; -+ } -+ -+ am->mii_bus = mdiobus_alloc(); -+ if (am->mii_bus == NULL) { -+ err = -ENOMEM; -+ goto err_iounmap; -+ } -+ -+ am->mii_bus->name = "ag71xx_mdio"; -+ am->mii_bus->read = ag71xx_mdio_read; -+ am->mii_bus->write = ag71xx_mdio_write; -+ am->mii_bus->reset = ag71xx_mdio_reset; -+ am->mii_bus->irq = am->mii_irq; -+ am->mii_bus->priv = am; -+ am->mii_bus->parent = &pdev->dev; -+ snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); -+ am->mii_bus->phy_mask = pdata->phy_mask; -+ -+ for (i = 0; i < PHY_MAX_ADDR; i++) -+ am->mii_irq[i] = PHY_POLL; -+ -+ ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0); -+ -+ err = mdiobus_register(am->mii_bus); -+ if (err) -+ goto err_free_bus; -+ -+ ag71xx_mdio_dump_regs(am); -+ -+ platform_set_drvdata(pdev, am); -+ return 0; -+ -+err_free_bus: -+ mdiobus_free(am->mii_bus); -+err_iounmap: -+ iounmap(am->mdio_base); -+err_free_mdio: -+ kfree(am); -+err_out: -+ return err; -+} -+ -+static int ag71xx_mdio_remove(struct platform_device *pdev) -+{ -+ struct ag71xx_mdio *am = platform_get_drvdata(pdev); -+ -+ if (am) { -+ mdiobus_unregister(am->mii_bus); -+ mdiobus_free(am->mii_bus); -+ iounmap(am->mdio_base); -+ kfree(am); -+ platform_set_drvdata(pdev, NULL); -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver ag71xx_mdio_driver = { -+ .probe = ag71xx_mdio_probe, -+ .remove = ag71xx_mdio_remove, -+ .driver = { -+ .name = "ag71xx-mdio", -+ } -+}; -+ -+int __init ag71xx_mdio_driver_init(void) -+{ -+ return platform_driver_register(&ag71xx_mdio_driver); -+} -+ -+void ag71xx_mdio_driver_exit(void) -+{ -+ platform_driver_unregister(&ag71xx_mdio_driver); -+} -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,235 @@ -+/* -+ * Atheros AR71xx built-in ethernet mac driver -+ * -+ * Copyright (C) 2008-2010 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Based on Atheros' AG7100 driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include "ag71xx.h" -+ -+static void ag71xx_phy_link_adjust(struct net_device *dev) -+{ -+ struct ag71xx *ag = netdev_priv(dev); -+ struct phy_device *phydev = ag->phy_dev; -+ unsigned long flags; -+ int status_change = 0; -+ -+ spin_lock_irqsave(&ag->lock, flags); -+ -+ if (phydev->link) { -+ if (ag->duplex != phydev->duplex -+ || ag->speed != phydev->speed) { -+ status_change = 1; -+ } -+ } -+ -+ if (phydev->link != ag->link) -+ status_change = 1; -+ -+ ag->link = phydev->link; -+ ag->duplex = phydev->duplex; -+ ag->speed = phydev->speed; -+ -+ if (status_change) -+ ag71xx_link_adjust(ag); -+ -+ spin_unlock_irqrestore(&ag->lock, flags); -+} -+ -+void ag71xx_phy_start(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ -+ if (ag->phy_dev) { -+ phy_start(ag->phy_dev); -+ } else if (pdata->mii_bus_dev && pdata->switch_data) { -+ ag71xx_ar7240_start(ag); -+ } else { -+ ag->link = 1; -+ ag71xx_link_adjust(ag); -+ } -+} -+ -+void ag71xx_phy_stop(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ unsigned long flags; -+ -+ if (ag->phy_dev) -+ phy_stop(ag->phy_dev); -+ else if (pdata->mii_bus_dev && pdata->switch_data) -+ ag71xx_ar7240_stop(ag); -+ -+ spin_lock_irqsave(&ag->lock, flags); -+ if (ag->link) { -+ ag->link = 0; -+ ag71xx_link_adjust(ag); -+ } -+ spin_unlock_irqrestore(&ag->lock, flags); -+} -+ -+static int ag71xx_phy_connect_fixed(struct ag71xx *ag) -+{ -+ struct device *dev = &ag->pdev->dev; -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ int ret = 0; -+ -+ /* use fixed settings */ -+ switch (pdata->speed) { -+ case SPEED_10: -+ case SPEED_100: -+ case SPEED_1000: -+ break; -+ default: -+ dev_err(dev, "invalid speed specified\n"); -+ ret = -EINVAL; -+ break; -+ } -+ -+ dev_dbg(dev, "using fixed link parameters\n"); -+ -+ ag->duplex = pdata->duplex; -+ ag->speed = pdata->speed; -+ -+ return ret; -+} -+ -+static int ag71xx_phy_connect_multi(struct ag71xx *ag) -+{ -+ struct device *dev = &ag->pdev->dev; -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ struct phy_device *phydev = NULL; -+ int phy_addr; -+ int ret = 0; -+ -+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { -+ if (!(pdata->phy_mask & (1 << phy_addr))) -+ continue; -+ -+ if (ag->mii_bus->phy_map[phy_addr] == NULL) -+ continue; -+ -+ DBG("%s: PHY found at %s, uid=%08x\n", -+ dev_name(dev), -+ dev_name(&ag->mii_bus->phy_map[phy_addr]->dev), -+ ag->mii_bus->phy_map[phy_addr]->phy_id); -+ -+ if (phydev == NULL) -+ phydev = ag->mii_bus->phy_map[phy_addr]; -+ } -+ -+ if (!phydev) { -+ dev_err(dev, "no PHY found with phy_mask=%08x\n", -+ pdata->phy_mask); -+ return -ENODEV; -+ } -+ -+ ag->phy_dev = phy_connect(ag->dev, dev_name(&phydev->dev), -+ &ag71xx_phy_link_adjust, -+ pdata->phy_if_mode); -+ -+ if (IS_ERR(ag->phy_dev)) { -+ dev_err(dev, "could not connect to PHY at %s\n", -+ dev_name(&phydev->dev)); -+ return PTR_ERR(ag->phy_dev); -+ } -+ -+ /* mask with MAC supported features */ -+ if (pdata->has_gbit) -+ phydev->supported &= PHY_GBIT_FEATURES; -+ else -+ phydev->supported &= PHY_BASIC_FEATURES; -+ -+ phydev->advertising = phydev->supported; -+ -+ dev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n", -+ dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); -+ -+ ag->link = 0; -+ ag->speed = 0; -+ ag->duplex = -1; -+ -+ return ret; -+} -+ -+static int dev_is_class(struct device *dev, void *class) -+{ -+ if (dev->class != NULL && !strcmp(dev->class->name, class)) -+ return 1; -+ -+ return 0; -+} -+ -+static struct device *dev_find_class(struct device *parent, char *class) -+{ -+ if (dev_is_class(parent, class)) { -+ get_device(parent); -+ return parent; -+ } -+ -+ return device_find_child(parent, class, dev_is_class); -+} -+ -+static struct mii_bus *dev_to_mii_bus(struct device *dev) -+{ -+ struct device *d; -+ -+ d = dev_find_class(dev, "mdio_bus"); -+ if (d != NULL) { -+ struct mii_bus *bus; -+ -+ bus = to_mii_bus(d); -+ put_device(d); -+ -+ return bus; -+ } -+ -+ return NULL; -+} -+ -+int ag71xx_phy_connect(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ -+ if (pdata->mii_bus_dev == NULL || -+ pdata->mii_bus_dev->bus == NULL ) -+ return ag71xx_phy_connect_fixed(ag); -+ -+ ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev); -+ if (ag->mii_bus == NULL) { -+ dev_err(&ag->pdev->dev, "unable to find MII bus on device '%s'\n", -+ dev_name(pdata->mii_bus_dev)); -+ return -ENODEV; -+ } -+ -+ /* Reset the mdio bus explicitly */ -+ if (ag->mii_bus->reset) { -+ mutex_lock(&ag->mii_bus->mdio_lock); -+ ag->mii_bus->reset(ag->mii_bus); -+ mutex_unlock(&ag->mii_bus->mdio_lock); -+ } -+ -+ if (pdata->switch_data) -+ return ag71xx_ar7240_init(ag); -+ -+ if (pdata->phy_mask) -+ return ag71xx_phy_connect_multi(ag); -+ -+ return ag71xx_phy_connect_fixed(ag); -+} -+ -+void ag71xx_phy_disconnect(struct ag71xx *ag) -+{ -+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); -+ -+ if (pdata->switch_data) -+ ag71xx_ar7240_cleanup(ag); -+ else if (ag->phy_dev) -+ phy_disconnect(ag->phy_dev); -+} -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Kconfig linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Kconfig ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Kconfig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Kconfig 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,33 @@ -+config AG71XX -+ tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" -+ depends on ATH79 -+ select PHYLIB -+ help -+ If you wish to compile a kernel for AR7XXX/91XXX and enable -+ ethernet support, then you should always answer Y to this. -+ -+if AG71XX -+ -+config AG71XX_DEBUG -+ bool "Atheros AR71xx built-in ethernet driver debugging" -+ default n -+ help -+ Atheros AR71xx built-in ethernet driver debugging messages. -+ -+config AG71XX_DEBUG_FS -+ bool "Atheros AR71xx built-in ethernet driver debugfs support" -+ depends on DEBUG_FS -+ default n -+ help -+ Say Y, if you need access to various statistics provided by -+ the ag71xx driver. -+ -+config AG71XX_AR8216_SUPPORT -+ bool "special support for the Atheros AR8216 switch" -+ default n -+ default y if ATH79_MACH_WNR2000 || ATH79_MACH_MZK_W04NU -+ help -+ Say 'y' here if you want to enable special support for the -+ Atheros AR8216 switch found on some boards. -+ -+endif -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Makefile linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Makefile ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Makefile 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,15 @@ -+# -+# Makefile for the Atheros AR71xx built-in ethernet macs -+# -+ -+ag71xx-y += ag71xx_main.o -+ag71xx-y += ag71xx_ethtool.o -+ag71xx-y += ag71xx_phy.o -+ag71xx-y += ag71xx_mdio.o -+ag71xx-y += ag71xx_ar7240.o -+ -+ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o -+ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT) += ag71xx_ar8216.o -+ -+obj-$(CONFIG_AG71XX) += ag71xx.o -+ -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/Kconfig linux-4.1.13/drivers/net/ethernet/atheros/Kconfig ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/Kconfig 2015-12-04 19:57:03.882110905 +0100 -@@ -5,7 +5,7 @@ - config NET_VENDOR_ATHEROS - bool "Atheros devices" - default y -- depends on PCI -+ depends on (PCI || ATH79) - ---help--- - If you have a network (Ethernet) card belonging to this class, say Y - and read the Ethernet-HOWTO, available from -@@ -80,4 +80,6 @@ - To compile this driver as a module, choose M here. The module - will be called alx. - -+source drivers/net/ethernet/atheros/ag71xx/Kconfig -+ - endif # NET_VENDOR_ATHEROS -diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/Makefile linux-4.1.13/drivers/net/ethernet/atheros/Makefile ---- linux-4.1.13.orig/drivers/net/ethernet/atheros/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/ethernet/atheros/Makefile 2015-12-04 19:57:03.882110905 +0100 -@@ -2,6 +2,7 @@ - # Makefile for the Atheros network device drivers. - # - -+obj-$(CONFIG_AG71XX) += ag71xx/ - obj-$(CONFIG_ATL1) += atlx/ - obj-$(CONFIG_ATL2) += atlx/ - obj-$(CONFIG_ATL1E) += atl1e/ -diff -Nur linux-4.1.13.orig/drivers/net/phy/at803x.c linux-4.1.13/drivers/net/phy/at803x.c ---- linux-4.1.13.orig/drivers/net/phy/at803x.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/at803x.c 2015-12-04 19:57:03.890110382 +0100 -@@ -12,12 +12,14 @@ - */ - - #include -+#include - #include - #include - #include - #include - #include - #include -+#include - - #define AT803X_INTR_ENABLE 0x12 - #define AT803X_INTR_STATUS 0x13 -@@ -34,8 +36,16 @@ - #define AT803X_INER 0x0012 - #define AT803X_INER_INIT 0xec00 - #define AT803X_INSR 0x0013 -+ -+#define AT803X_PCS_SMART_EEE_CTRL3 0x805D -+#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_MASK 0x3 -+#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT 12 -+#define AT803X_SMART_EEE_CTRL3_LPI_EN BIT(8) -+ - #define AT803X_DEBUG_ADDR 0x1D - #define AT803X_DEBUG_DATA 0x1E -+#define AT803X_DBG0_REG 0x00 -+#define AT803X_DEBUG_RGMII_RX_CLK_DLY BIT(8) - #define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05 - #define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8) - -@@ -50,6 +60,7 @@ - struct at803x_priv { - bool phy_reset:1; - struct gpio_desc *gpiod_reset; -+ int prev_speed; - }; - - struct at803x_context { -@@ -61,6 +72,43 @@ - u16 led_control; - }; - -+static u16 -+at803x_dbg_reg_rmw(struct phy_device *phydev, u16 reg, u16 clear, u16 set) -+{ -+ struct mii_bus *bus = phydev->bus; -+ int val; -+ -+ mutex_lock(&bus->mdio_lock); -+ -+ bus->write(bus, phydev->addr, AT803X_DEBUG_ADDR, reg); -+ val = bus->read(bus, phydev->addr, AT803X_DEBUG_DATA); -+ if (val < 0) { -+ val = 0xffff; -+ goto out; -+ } -+ -+ val &= ~clear; -+ val |= set; -+ bus->write(bus, phydev->addr, AT803X_DEBUG_DATA, val); -+ -+out: -+ mutex_unlock(&bus->mdio_lock); -+ return val; -+} -+ -+static inline void -+at803x_dbg_reg_set(struct phy_device *phydev, u16 reg, u16 set) -+{ -+ at803x_dbg_reg_rmw(phydev, reg, 0, set); -+} -+ -+static inline void -+at803x_dbg_reg_clr(struct phy_device *phydev, u16 reg, u16 clear) -+{ -+ at803x_dbg_reg_rmw(phydev, reg, clear, 0); -+} -+ -+ - /* save relevant PHY registers to private copy */ - static void at803x_context_save(struct phy_device *phydev, - struct at803x_context *context) -@@ -209,8 +257,16 @@ - return 0; - } - -+static void at803x_disable_smarteee(struct phy_device *phydev) -+{ -+ phy_write_mmd(phydev, MDIO_MMD_PCS, AT803X_PCS_SMART_EEE_CTRL3, -+ 1 << AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT); -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); -+} -+ - static int at803x_config_init(struct phy_device *phydev) - { -+ struct at803x_platform_data *pdata; - int ret; - - ret = genphy_config_init(phydev); -@@ -228,6 +284,26 @@ - return ret; - } - -+ pdata = dev_get_platdata(&phydev->dev); -+ if (pdata) { -+ if (pdata->disable_smarteee) -+ at803x_disable_smarteee(phydev); -+ -+ if (pdata->enable_rgmii_rx_delay) -+ at803x_dbg_reg_set(phydev, AT803X_DBG0_REG, -+ AT803X_DEBUG_RGMII_RX_CLK_DLY); -+ else -+ at803x_dbg_reg_clr(phydev, AT803X_DBG0_REG, -+ AT803X_DEBUG_RGMII_RX_CLK_DLY); -+ -+ if (pdata->enable_rgmii_tx_delay) -+ at803x_dbg_reg_set(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ else -+ at803x_dbg_reg_clr(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ } -+ - return 0; - } - -@@ -259,6 +335,8 @@ - static void at803x_link_change_notify(struct phy_device *phydev) - { - struct at803x_priv *priv = phydev->priv; -+ struct at803x_platform_data *pdata; -+ pdata = dev_get_platdata(&phydev->dev); - - /* - * Conduct a hardware reset for AT8030 every time a link loss is -@@ -289,6 +367,26 @@ - priv->phy_reset = false; - } - } -+ if (pdata && pdata->fixup_rgmii_tx_delay && -+ phydev->speed != priv->prev_speed) { -+ switch (phydev->speed) { -+ case SPEED_10: -+ case SPEED_100: -+ at803x_dbg_reg_set(phydev, -+ AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ break; -+ case SPEED_1000: -+ at803x_dbg_reg_clr(phydev, -+ AT803X_DEBUG_SYSTEM_MODE_CTRL, -+ AT803X_DEBUG_RGMII_TX_CLK_DLY); -+ break; -+ default: -+ break; -+ } -+ -+ priv->prev_speed = phydev->speed; -+ } - } - - static struct phy_driver at803x_driver[] = { -diff -Nur linux-4.1.13.orig/drivers/net/phy/Kconfig linux-4.1.13/drivers/net/phy/Kconfig ---- linux-4.1.13.orig/drivers/net/phy/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/Kconfig 2015-12-04 21:33:39.755626859 +0100 -@@ -12,6 +12,16 @@ - - if PHYLIB - -+config SWCONFIG -+ tristate "Switch configuration API" -+ ---help--- -+ Switch configuration API using netlink. This allows -+ you to configure the VLAN features of certain switches. -+ -+config SWCONFIG_LEDS -+ bool "Switch LED trigger support" -+ depends on (SWCONFIG && LEDS_TRIGGERS) -+ - comment "MII PHY device drivers" - - config AT803X_PHY -diff -Nur linux-4.1.13.orig/drivers/net/phy/Makefile linux-4.1.13/drivers/net/phy/Makefile ---- linux-4.1.13.orig/drivers/net/phy/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/Makefile 2015-12-04 21:33:39.775625531 +0100 -@@ -3,6 +3,7 @@ - libphy-objs := phy.o phy_device.o mdio_bus.o - - obj-$(CONFIG_PHYLIB) += libphy.o -+obj-$(CONFIG_SWCONFIG) += swconfig.o - obj-$(CONFIG_MARVELL_PHY) += marvell.o - obj-$(CONFIG_DAVICOM_PHY) += davicom.o - obj-$(CONFIG_CICADA_PHY) += cicada.o -diff -Nur linux-4.1.13.orig/drivers/net/phy/mdio-bitbang.c linux-4.1.13/drivers/net/phy/mdio-bitbang.c ---- linux-4.1.13.orig/drivers/net/phy/mdio-bitbang.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/mdio-bitbang.c 2015-12-04 19:57:05.909978229 +0100 -@@ -17,6 +17,7 @@ - * kind, whether express or implied. - */ - -+#include - #include - #include - #include -@@ -156,7 +157,9 @@ - { - struct mdiobb_ctrl *ctrl = bus->priv; - int ret, i; -+ long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); -@@ -165,26 +168,21 @@ - - ctrl->ops->set_mdio_dir(ctrl, 0); - -- /* check the turnaround bit: the PHY should be driving it to zero */ -- if (mdiobb_get_bit(ctrl) != 0) { -- /* PHY didn't drive TA low -- flush any bits it -- * may be trying to send. -- */ -- for (i = 0; i < 32; i++) -- mdiobb_get_bit(ctrl); -- -- return 0xffff; -- } -+ mdiobb_get_bit(ctrl); - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return ret; - } - - static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) - { - struct mdiobb_ctrl *ctrl = bus->priv; -+ long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); -@@ -199,6 +197,8 @@ - - ctrl->ops->set_mdio_dir(ctrl, 0); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return 0; - } - -diff -Nur linux-4.1.13.orig/drivers/net/phy/phy.c linux-4.1.13/drivers/net/phy/phy.c ---- linux-4.1.13.orig/drivers/net/phy/phy.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/phy.c 2015-12-04 20:31:10.856994541 +0100 -@@ -357,6 +357,50 @@ - } - EXPORT_SYMBOL(phy_ethtool_gset); - -+int phy_ethtool_ioctl(struct phy_device *phydev, void *useraddr) -+{ -+ u32 cmd; -+ int tmp; -+ struct ethtool_cmd ecmd = { ETHTOOL_GSET }; -+ struct ethtool_value edata = { ETHTOOL_GLINK }; -+ -+ if (get_user(cmd, (u32 *) useraddr)) -+ return -EFAULT; -+ -+ switch (cmd) { -+ case ETHTOOL_GSET: -+ phy_ethtool_gset(phydev, &ecmd); -+ if (copy_to_user(useraddr, &ecmd, sizeof(ecmd))) -+ return -EFAULT; -+ return 0; -+ -+ case ETHTOOL_SSET: -+ if (copy_from_user(&ecmd, useraddr, sizeof(ecmd))) -+ return -EFAULT; -+ return phy_ethtool_sset(phydev, &ecmd); -+ -+ case ETHTOOL_NWAY_RST: -+ /* if autoneg is off, it's an error */ -+ tmp = phy_read(phydev, MII_BMCR); -+ if (tmp & BMCR_ANENABLE) { -+ tmp |= (BMCR_ANRESTART); -+ phy_write(phydev, MII_BMCR, tmp); -+ return 0; -+ } -+ return -EINVAL; -+ -+ case ETHTOOL_GLINK: -+ edata.data = (phy_read(phydev, -+ MII_BMSR) & BMSR_LSTATUS) ? 1 : 0; -+ if (copy_to_user(useraddr, &edata, sizeof(edata))) -+ return -EFAULT; -+ return 0; -+ } -+ -+ return -EOPNOTSUPP; -+} -+EXPORT_SYMBOL(phy_ethtool_ioctl); -+ - /** - * phy_mii_ioctl - generic PHY MII ioctl interface - * @phydev: the phy_device struct -diff -Nur linux-4.1.13.orig/drivers/net/phy/swconfig.c linux-4.1.13/drivers/net/phy/swconfig.c ---- linux-4.1.13.orig/drivers/net/phy/swconfig.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/swconfig.c 2015-12-04 21:18:34.855186030 +0100 -@@ -0,0 +1,1153 @@ -+/* -+ * swconfig.c: Switch configuration API -+ * -+ * Copyright (C) 2008 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define SWCONFIG_DEVNAME "switch%d" -+ -+#include "swconfig_leds.c" -+ -+MODULE_AUTHOR("Felix Fietkau "); -+MODULE_LICENSE("GPL"); -+ -+static int swdev_id; -+static struct list_head swdevs; -+static DEFINE_SPINLOCK(swdevs_lock); -+struct swconfig_callback; -+ -+struct swconfig_callback { -+ struct sk_buff *msg; -+ struct genlmsghdr *hdr; -+ struct genl_info *info; -+ int cmd; -+ -+ /* callback for filling in the message data */ -+ int (*fill)(struct swconfig_callback *cb, void *arg); -+ -+ /* callback for closing the message before sending it */ -+ int (*close)(struct swconfig_callback *cb, void *arg); -+ -+ struct nlattr *nest[4]; -+ int args[4]; -+}; -+ -+/* defaults */ -+ -+static int -+swconfig_get_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ int ret; -+ if (val->port_vlan >= dev->vlans) -+ return -EINVAL; -+ -+ if (!dev->ops->get_vlan_ports) -+ return -EOPNOTSUPP; -+ -+ ret = dev->ops->get_vlan_ports(dev, val); -+ return ret; -+} -+ -+static int -+swconfig_set_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct switch_port *ports = val->value.ports; -+ const struct switch_dev_ops *ops = dev->ops; -+ int i; -+ -+ if (val->port_vlan >= dev->vlans) -+ return -EINVAL; -+ -+ /* validate ports */ -+ if (val->len > dev->ports) -+ return -EINVAL; -+ -+ if (!ops->set_vlan_ports) -+ return -EOPNOTSUPP; -+ -+ for (i = 0; i < val->len; i++) { -+ if (ports[i].id >= dev->ports) -+ return -EINVAL; -+ -+ if (ops->set_port_pvid && -+ !(ports[i].flags & (1 << SWITCH_PORT_FLAG_TAGGED))) -+ ops->set_port_pvid(dev, ports[i].id, val->port_vlan); -+ } -+ -+ return ops->set_vlan_ports(dev, val); -+} -+ -+static int -+swconfig_set_pvid(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ if (val->port_vlan >= dev->ports) -+ return -EINVAL; -+ -+ if (!dev->ops->set_port_pvid) -+ return -EOPNOTSUPP; -+ -+ return dev->ops->set_port_pvid(dev, val->port_vlan, val->value.i); -+} -+ -+static int -+swconfig_get_pvid(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ if (val->port_vlan >= dev->ports) -+ return -EINVAL; -+ -+ if (!dev->ops->get_port_pvid) -+ return -EOPNOTSUPP; -+ -+ return dev->ops->get_port_pvid(dev, val->port_vlan, &val->value.i); -+} -+ -+static const char * -+swconfig_speed_str(enum switch_port_speed speed) -+{ -+ switch (speed) { -+ case SWITCH_PORT_SPEED_10: -+ return "10baseT"; -+ case SWITCH_PORT_SPEED_100: -+ return "100baseT"; -+ case SWITCH_PORT_SPEED_1000: -+ return "1000baseT"; -+ default: -+ break; -+ } -+ -+ return "unknown"; -+} -+ -+static int -+swconfig_get_link(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct switch_port_link link; -+ int len; -+ int ret; -+ -+ if (val->port_vlan >= dev->ports) -+ return -EINVAL; -+ -+ if (!dev->ops->get_port_link) -+ return -EOPNOTSUPP; -+ -+ memset(&link, 0, sizeof(link)); -+ ret = dev->ops->get_port_link(dev, val->port_vlan, &link); -+ if (ret) -+ return ret; -+ -+ memset(dev->buf, 0, sizeof(dev->buf)); -+ -+ if (link.link) -+ len = snprintf(dev->buf, sizeof(dev->buf), -+ "port:%d link:up speed:%s %s-duplex %s%s%s%s%s", -+ val->port_vlan, -+ swconfig_speed_str(link.speed), -+ link.duplex ? "full" : "half", -+ link.tx_flow ? "txflow " : "", -+ link.rx_flow ? "rxflow " : "", -+ link.eee & ADVERTISED_100baseT_Full ? "eee100 " : "", -+ link.eee & ADVERTISED_1000baseT_Full ? "eee1000 " : "", -+ link.aneg ? "auto" : ""); -+ else -+ len = snprintf(dev->buf, sizeof(dev->buf), "port:%d link:down", -+ val->port_vlan); -+ -+ val->value.s = dev->buf; -+ val->len = len; -+ -+ return 0; -+} -+ -+static int -+swconfig_apply_config(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ /* don't complain if not supported by the switch driver */ -+ if (!dev->ops->apply_config) -+ return 0; -+ -+ return dev->ops->apply_config(dev); -+} -+ -+static int -+swconfig_reset_switch(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ /* don't complain if not supported by the switch driver */ -+ if (!dev->ops->reset_switch) -+ return 0; -+ -+ return dev->ops->reset_switch(dev); -+} -+ -+enum global_defaults { -+ GLOBAL_APPLY, -+ GLOBAL_RESET, -+}; -+ -+enum vlan_defaults { -+ VLAN_PORTS, -+}; -+ -+enum port_defaults { -+ PORT_PVID, -+ PORT_LINK, -+}; -+ -+static struct switch_attr default_global[] = { -+ [GLOBAL_APPLY] = { -+ .type = SWITCH_TYPE_NOVAL, -+ .name = "apply", -+ .description = "Activate changes in the hardware", -+ .set = swconfig_apply_config, -+ }, -+ [GLOBAL_RESET] = { -+ .type = SWITCH_TYPE_NOVAL, -+ .name = "reset", -+ .description = "Reset the switch", -+ .set = swconfig_reset_switch, -+ } -+}; -+ -+static struct switch_attr default_port[] = { -+ [PORT_PVID] = { -+ .type = SWITCH_TYPE_INT, -+ .name = "pvid", -+ .description = "Primary VLAN ID", -+ .set = swconfig_set_pvid, -+ .get = swconfig_get_pvid, -+ }, -+ [PORT_LINK] = { -+ .type = SWITCH_TYPE_STRING, -+ .name = "link", -+ .description = "Get port link information", -+ .set = NULL, -+ .get = swconfig_get_link, -+ } -+}; -+ -+static struct switch_attr default_vlan[] = { -+ [VLAN_PORTS] = { -+ .type = SWITCH_TYPE_PORTS, -+ .name = "ports", -+ .description = "VLAN port mapping", -+ .set = swconfig_set_vlan_ports, -+ .get = swconfig_get_vlan_ports, -+ }, -+}; -+ -+static const struct switch_attr * -+swconfig_find_attr_by_name(const struct switch_attrlist *alist, -+ const char *name) -+{ -+ int i; -+ -+ for (i = 0; i < alist->n_attr; i++) -+ if (strcmp(name, alist->attr[i].name) == 0) -+ return &alist->attr[i]; -+ -+ return NULL; -+} -+ -+static void swconfig_defaults_init(struct switch_dev *dev) -+{ -+ const struct switch_dev_ops *ops = dev->ops; -+ -+ dev->def_global = 0; -+ dev->def_vlan = 0; -+ dev->def_port = 0; -+ -+ if (ops->get_vlan_ports || ops->set_vlan_ports) -+ set_bit(VLAN_PORTS, &dev->def_vlan); -+ -+ if (ops->get_port_pvid || ops->set_port_pvid) -+ set_bit(PORT_PVID, &dev->def_port); -+ -+ if (ops->get_port_link && -+ !swconfig_find_attr_by_name(&ops->attr_port, "link")) -+ set_bit(PORT_LINK, &dev->def_port); -+ -+ /* always present, can be no-op */ -+ set_bit(GLOBAL_APPLY, &dev->def_global); -+ set_bit(GLOBAL_RESET, &dev->def_global); -+} -+ -+ -+static struct genl_family switch_fam = { -+ .id = GENL_ID_GENERATE, -+ .name = "switch", -+ .hdrsize = 0, -+ .version = 1, -+ .maxattr = SWITCH_ATTR_MAX, -+}; -+ -+static const struct nla_policy switch_policy[SWITCH_ATTR_MAX+1] = { -+ [SWITCH_ATTR_ID] = { .type = NLA_U32 }, -+ [SWITCH_ATTR_OP_ID] = { .type = NLA_U32 }, -+ [SWITCH_ATTR_OP_PORT] = { .type = NLA_U32 }, -+ [SWITCH_ATTR_OP_VLAN] = { .type = NLA_U32 }, -+ [SWITCH_ATTR_OP_VALUE_INT] = { .type = NLA_U32 }, -+ [SWITCH_ATTR_OP_VALUE_STR] = { .type = NLA_NUL_STRING }, -+ [SWITCH_ATTR_OP_VALUE_PORTS] = { .type = NLA_NESTED }, -+ [SWITCH_ATTR_TYPE] = { .type = NLA_U32 }, -+}; -+ -+static const struct nla_policy port_policy[SWITCH_PORT_ATTR_MAX+1] = { -+ [SWITCH_PORT_ID] = { .type = NLA_U32 }, -+ [SWITCH_PORT_FLAG_TAGGED] = { .type = NLA_FLAG }, -+}; -+ -+static inline void -+swconfig_lock(void) -+{ -+ spin_lock(&swdevs_lock); -+} -+ -+static inline void -+swconfig_unlock(void) -+{ -+ spin_unlock(&swdevs_lock); -+} -+ -+static struct switch_dev * -+swconfig_get_dev(struct genl_info *info) -+{ -+ struct switch_dev *dev = NULL; -+ struct switch_dev *p; -+ int id; -+ -+ if (!info->attrs[SWITCH_ATTR_ID]) -+ goto done; -+ -+ id = nla_get_u32(info->attrs[SWITCH_ATTR_ID]); -+ swconfig_lock(); -+ list_for_each_entry(p, &swdevs, dev_list) { -+ if (id != p->id) -+ continue; -+ -+ dev = p; -+ break; -+ } -+ if (dev) -+ mutex_lock(&dev->sw_mutex); -+ else -+ pr_debug("device %d not found\n", id); -+ swconfig_unlock(); -+done: -+ return dev; -+} -+ -+static inline void -+swconfig_put_dev(struct switch_dev *dev) -+{ -+ mutex_unlock(&dev->sw_mutex); -+} -+ -+static int -+swconfig_dump_attr(struct swconfig_callback *cb, void *arg) -+{ -+ struct switch_attr *op = arg; -+ struct genl_info *info = cb->info; -+ struct sk_buff *msg = cb->msg; -+ int id = cb->args[0]; -+ void *hdr; -+ -+ hdr = genlmsg_put(msg, info->snd_portid, info->snd_seq, &switch_fam, -+ NLM_F_MULTI, SWITCH_CMD_NEW_ATTR); -+ if (IS_ERR(hdr)) -+ return -1; -+ -+ if (nla_put_u32(msg, SWITCH_ATTR_OP_ID, id)) -+ goto nla_put_failure; -+ if (nla_put_u32(msg, SWITCH_ATTR_OP_TYPE, op->type)) -+ goto nla_put_failure; -+ if (nla_put_string(msg, SWITCH_ATTR_OP_NAME, op->name)) -+ goto nla_put_failure; -+ if (op->description) -+ if (nla_put_string(msg, SWITCH_ATTR_OP_DESCRIPTION, -+ op->description)) -+ goto nla_put_failure; -+ -+ genlmsg_end(msg, hdr); -+ return msg->len; -+nla_put_failure: -+ genlmsg_cancel(msg, hdr); -+ return -EMSGSIZE; -+} -+ -+/* spread multipart messages across multiple message buffers */ -+static int -+swconfig_send_multipart(struct swconfig_callback *cb, void *arg) -+{ -+ struct genl_info *info = cb->info; -+ int restart = 0; -+ int err; -+ -+ do { -+ if (!cb->msg) { -+ cb->msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (cb->msg == NULL) -+ goto error; -+ } -+ -+ if (!(cb->fill(cb, arg) < 0)) -+ break; -+ -+ /* fill failed, check if this was already the second attempt */ -+ if (restart) -+ goto error; -+ -+ /* try again in a new message, send the current one */ -+ restart = 1; -+ if (cb->close) { -+ if (cb->close(cb, arg) < 0) -+ goto error; -+ } -+ err = genlmsg_reply(cb->msg, info); -+ cb->msg = NULL; -+ if (err < 0) -+ goto error; -+ -+ } while (restart); -+ -+ return 0; -+ -+error: -+ if (cb->msg) -+ nlmsg_free(cb->msg); -+ return -1; -+} -+ -+static int -+swconfig_list_attrs(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); -+ const struct switch_attrlist *alist; -+ struct switch_dev *dev; -+ struct swconfig_callback cb; -+ int err = -EINVAL; -+ int i; -+ -+ /* defaults */ -+ struct switch_attr *def_list; -+ unsigned long *def_active; -+ int n_def; -+ -+ dev = swconfig_get_dev(info); -+ if (!dev) -+ return -EINVAL; -+ -+ switch (hdr->cmd) { -+ case SWITCH_CMD_LIST_GLOBAL: -+ alist = &dev->ops->attr_global; -+ def_list = default_global; -+ def_active = &dev->def_global; -+ n_def = ARRAY_SIZE(default_global); -+ break; -+ case SWITCH_CMD_LIST_VLAN: -+ alist = &dev->ops->attr_vlan; -+ def_list = default_vlan; -+ def_active = &dev->def_vlan; -+ n_def = ARRAY_SIZE(default_vlan); -+ break; -+ case SWITCH_CMD_LIST_PORT: -+ alist = &dev->ops->attr_port; -+ def_list = default_port; -+ def_active = &dev->def_port; -+ n_def = ARRAY_SIZE(default_port); -+ break; -+ default: -+ WARN_ON(1); -+ goto out; -+ } -+ -+ memset(&cb, 0, sizeof(cb)); -+ cb.info = info; -+ cb.fill = swconfig_dump_attr; -+ for (i = 0; i < alist->n_attr; i++) { -+ if (alist->attr[i].disabled) -+ continue; -+ cb.args[0] = i; -+ err = swconfig_send_multipart(&cb, (void *) &alist->attr[i]); -+ if (err < 0) -+ goto error; -+ } -+ -+ /* defaults */ -+ for (i = 0; i < n_def; i++) { -+ if (!test_bit(i, def_active)) -+ continue; -+ cb.args[0] = SWITCH_ATTR_DEFAULTS_OFFSET + i; -+ err = swconfig_send_multipart(&cb, (void *) &def_list[i]); -+ if (err < 0) -+ goto error; -+ } -+ swconfig_put_dev(dev); -+ -+ if (!cb.msg) -+ return 0; -+ -+ return genlmsg_reply(cb.msg, info); -+ -+error: -+ if (cb.msg) -+ nlmsg_free(cb.msg); -+out: -+ swconfig_put_dev(dev); -+ return err; -+} -+ -+static const struct switch_attr * -+swconfig_lookup_attr(struct switch_dev *dev, struct genl_info *info, -+ struct switch_val *val) -+{ -+ struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); -+ const struct switch_attrlist *alist; -+ const struct switch_attr *attr = NULL; -+ int attr_id; -+ -+ /* defaults */ -+ struct switch_attr *def_list; -+ unsigned long *def_active; -+ int n_def; -+ -+ if (!info->attrs[SWITCH_ATTR_OP_ID]) -+ goto done; -+ -+ switch (hdr->cmd) { -+ case SWITCH_CMD_SET_GLOBAL: -+ case SWITCH_CMD_GET_GLOBAL: -+ alist = &dev->ops->attr_global; -+ def_list = default_global; -+ def_active = &dev->def_global; -+ n_def = ARRAY_SIZE(default_global); -+ break; -+ case SWITCH_CMD_SET_VLAN: -+ case SWITCH_CMD_GET_VLAN: -+ alist = &dev->ops->attr_vlan; -+ def_list = default_vlan; -+ def_active = &dev->def_vlan; -+ n_def = ARRAY_SIZE(default_vlan); -+ if (!info->attrs[SWITCH_ATTR_OP_VLAN]) -+ goto done; -+ val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_VLAN]); -+ if (val->port_vlan >= dev->vlans) -+ goto done; -+ break; -+ case SWITCH_CMD_SET_PORT: -+ case SWITCH_CMD_GET_PORT: -+ alist = &dev->ops->attr_port; -+ def_list = default_port; -+ def_active = &dev->def_port; -+ n_def = ARRAY_SIZE(default_port); -+ if (!info->attrs[SWITCH_ATTR_OP_PORT]) -+ goto done; -+ val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_PORT]); -+ if (val->port_vlan >= dev->ports) -+ goto done; -+ break; -+ default: -+ WARN_ON(1); -+ goto done; -+ } -+ -+ if (!alist) -+ goto done; -+ -+ attr_id = nla_get_u32(info->attrs[SWITCH_ATTR_OP_ID]); -+ if (attr_id >= SWITCH_ATTR_DEFAULTS_OFFSET) { -+ attr_id -= SWITCH_ATTR_DEFAULTS_OFFSET; -+ if (attr_id >= n_def) -+ goto done; -+ if (!test_bit(attr_id, def_active)) -+ goto done; -+ attr = &def_list[attr_id]; -+ } else { -+ if (attr_id >= alist->n_attr) -+ goto done; -+ attr = &alist->attr[attr_id]; -+ } -+ -+ if (attr->disabled) -+ attr = NULL; -+ -+done: -+ if (!attr) -+ pr_debug("attribute lookup failed\n"); -+ val->attr = attr; -+ return attr; -+} -+ -+static int -+swconfig_parse_ports(struct sk_buff *msg, struct nlattr *head, -+ struct switch_val *val, int max) -+{ -+ struct nlattr *nla; -+ int rem; -+ -+ val->len = 0; -+ nla_for_each_nested(nla, head, rem) { -+ struct nlattr *tb[SWITCH_PORT_ATTR_MAX+1]; -+ struct switch_port *port = &val->value.ports[val->len]; -+ -+ if (val->len >= max) -+ return -EINVAL; -+ -+ if (nla_parse_nested(tb, SWITCH_PORT_ATTR_MAX, nla, -+ port_policy)) -+ return -EINVAL; -+ -+ if (!tb[SWITCH_PORT_ID]) -+ return -EINVAL; -+ -+ port->id = nla_get_u32(tb[SWITCH_PORT_ID]); -+ if (tb[SWITCH_PORT_FLAG_TAGGED]) -+ port->flags |= (1 << SWITCH_PORT_FLAG_TAGGED); -+ val->len++; -+ } -+ -+ return 0; -+} -+ -+static int -+swconfig_set_attr(struct sk_buff *skb, struct genl_info *info) -+{ -+ const struct switch_attr *attr; -+ struct switch_dev *dev; -+ struct switch_val val; -+ int err = -EINVAL; -+ -+ dev = swconfig_get_dev(info); -+ if (!dev) -+ return -EINVAL; -+ -+ memset(&val, 0, sizeof(val)); -+ attr = swconfig_lookup_attr(dev, info, &val); -+ if (!attr || !attr->set) -+ goto error; -+ -+ val.attr = attr; -+ switch (attr->type) { -+ case SWITCH_TYPE_NOVAL: -+ break; -+ case SWITCH_TYPE_INT: -+ if (!info->attrs[SWITCH_ATTR_OP_VALUE_INT]) -+ goto error; -+ val.value.i = -+ nla_get_u32(info->attrs[SWITCH_ATTR_OP_VALUE_INT]); -+ break; -+ case SWITCH_TYPE_STRING: -+ if (!info->attrs[SWITCH_ATTR_OP_VALUE_STR]) -+ goto error; -+ val.value.s = -+ nla_data(info->attrs[SWITCH_ATTR_OP_VALUE_STR]); -+ break; -+ case SWITCH_TYPE_PORTS: -+ val.value.ports = dev->portbuf; -+ memset(dev->portbuf, 0, -+ sizeof(struct switch_port) * dev->ports); -+ -+ /* TODO: implement multipart? */ -+ if (info->attrs[SWITCH_ATTR_OP_VALUE_PORTS]) { -+ err = swconfig_parse_ports(skb, -+ info->attrs[SWITCH_ATTR_OP_VALUE_PORTS], -+ &val, dev->ports); -+ if (err < 0) -+ goto error; -+ } else { -+ val.len = 0; -+ err = 0; -+ } -+ break; -+ default: -+ goto error; -+ } -+ -+ err = attr->set(dev, attr, &val); -+error: -+ swconfig_put_dev(dev); -+ return err; -+} -+ -+static int -+swconfig_close_portlist(struct swconfig_callback *cb, void *arg) -+{ -+ if (cb->nest[0]) -+ nla_nest_end(cb->msg, cb->nest[0]); -+ return 0; -+} -+ -+static int -+swconfig_send_port(struct swconfig_callback *cb, void *arg) -+{ -+ const struct switch_port *port = arg; -+ struct nlattr *p = NULL; -+ -+ if (!cb->nest[0]) { -+ cb->nest[0] = nla_nest_start(cb->msg, cb->cmd); -+ if (!cb->nest[0]) -+ return -1; -+ } -+ -+ p = nla_nest_start(cb->msg, SWITCH_ATTR_PORT); -+ if (!p) -+ goto error; -+ -+ if (nla_put_u32(cb->msg, SWITCH_PORT_ID, port->id)) -+ goto nla_put_failure; -+ if (port->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) { -+ if (nla_put_flag(cb->msg, SWITCH_PORT_FLAG_TAGGED)) -+ goto nla_put_failure; -+ } -+ -+ nla_nest_end(cb->msg, p); -+ return 0; -+ -+nla_put_failure: -+ nla_nest_cancel(cb->msg, p); -+error: -+ nla_nest_cancel(cb->msg, cb->nest[0]); -+ return -1; -+} -+ -+static int -+swconfig_send_ports(struct sk_buff **msg, struct genl_info *info, int attr, -+ const struct switch_val *val) -+{ -+ struct swconfig_callback cb; -+ int err = 0; -+ int i; -+ -+ if (!val->value.ports) -+ return -EINVAL; -+ -+ memset(&cb, 0, sizeof(cb)); -+ cb.cmd = attr; -+ cb.msg = *msg; -+ cb.info = info; -+ cb.fill = swconfig_send_port; -+ cb.close = swconfig_close_portlist; -+ -+ cb.nest[0] = nla_nest_start(cb.msg, cb.cmd); -+ for (i = 0; i < val->len; i++) { -+ err = swconfig_send_multipart(&cb, &val->value.ports[i]); -+ if (err) -+ goto done; -+ } -+ err = val->len; -+ swconfig_close_portlist(&cb, NULL); -+ *msg = cb.msg; -+ -+done: -+ return err; -+} -+ -+static int -+swconfig_get_attr(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); -+ const struct switch_attr *attr; -+ struct switch_dev *dev; -+ struct sk_buff *msg = NULL; -+ struct switch_val val; -+ int err = -EINVAL; -+ int cmd = hdr->cmd; -+ -+ dev = swconfig_get_dev(info); -+ if (!dev) -+ return -EINVAL; -+ -+ memset(&val, 0, sizeof(val)); -+ attr = swconfig_lookup_attr(dev, info, &val); -+ if (!attr || !attr->get) -+ goto error; -+ -+ if (attr->type == SWITCH_TYPE_PORTS) { -+ val.value.ports = dev->portbuf; -+ memset(dev->portbuf, 0, -+ sizeof(struct switch_port) * dev->ports); -+ } -+ -+ err = attr->get(dev, attr, &val); -+ if (err) -+ goto error; -+ -+ msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!msg) -+ goto error; -+ -+ hdr = genlmsg_put(msg, info->snd_portid, info->snd_seq, &switch_fam, -+ 0, cmd); -+ if (IS_ERR(hdr)) -+ goto nla_put_failure; -+ -+ switch (attr->type) { -+ case SWITCH_TYPE_INT: -+ if (nla_put_u32(msg, SWITCH_ATTR_OP_VALUE_INT, val.value.i)) -+ goto nla_put_failure; -+ break; -+ case SWITCH_TYPE_STRING: -+ if (nla_put_string(msg, SWITCH_ATTR_OP_VALUE_STR, val.value.s)) -+ goto nla_put_failure; -+ break; -+ case SWITCH_TYPE_PORTS: -+ err = swconfig_send_ports(&msg, info, -+ SWITCH_ATTR_OP_VALUE_PORTS, &val); -+ if (err < 0) -+ goto nla_put_failure; -+ break; -+ default: -+ pr_debug("invalid type in attribute\n"); -+ err = -EINVAL; -+ goto error; -+ } -+ genlmsg_end(msg, hdr); -+ err = msg->len; -+ if (err < 0) -+ goto nla_put_failure; -+ -+ swconfig_put_dev(dev); -+ return genlmsg_reply(msg, info); -+ -+nla_put_failure: -+ if (msg) -+ nlmsg_free(msg); -+error: -+ swconfig_put_dev(dev); -+ if (!err) -+ err = -ENOMEM; -+ return err; -+} -+ -+static int -+swconfig_send_switch(struct sk_buff *msg, u32 pid, u32 seq, int flags, -+ const struct switch_dev *dev) -+{ -+ struct nlattr *p = NULL, *m = NULL; -+ void *hdr; -+ int i; -+ -+ hdr = genlmsg_put(msg, pid, seq, &switch_fam, flags, -+ SWITCH_CMD_NEW_ATTR); -+ if (IS_ERR(hdr)) -+ return -1; -+ -+ if (nla_put_u32(msg, SWITCH_ATTR_ID, dev->id)) -+ goto nla_put_failure; -+ if (nla_put_string(msg, SWITCH_ATTR_DEV_NAME, dev->devname)) -+ goto nla_put_failure; -+ if (nla_put_string(msg, SWITCH_ATTR_ALIAS, dev->alias)) -+ goto nla_put_failure; -+ if (nla_put_string(msg, SWITCH_ATTR_NAME, dev->name)) -+ goto nla_put_failure; -+ if (nla_put_u32(msg, SWITCH_ATTR_VLANS, dev->vlans)) -+ goto nla_put_failure; -+ if (nla_put_u32(msg, SWITCH_ATTR_PORTS, dev->ports)) -+ goto nla_put_failure; -+ if (nla_put_u32(msg, SWITCH_ATTR_CPU_PORT, dev->cpu_port)) -+ goto nla_put_failure; -+ -+ m = nla_nest_start(msg, SWITCH_ATTR_PORTMAP); -+ if (!m) -+ goto nla_put_failure; -+ for (i = 0; i < dev->ports; i++) { -+ p = nla_nest_start(msg, SWITCH_ATTR_PORTS); -+ if (!p) -+ continue; -+ if (dev->portmap[i].s) { -+ if (nla_put_string(msg, SWITCH_PORTMAP_SEGMENT, -+ dev->portmap[i].s)) -+ goto nla_put_failure; -+ if (nla_put_u32(msg, SWITCH_PORTMAP_VIRT, -+ dev->portmap[i].virt)) -+ goto nla_put_failure; -+ } -+ nla_nest_end(msg, p); -+ } -+ nla_nest_end(msg, m); -+ genlmsg_end(msg, hdr); -+ return msg->len; -+nla_put_failure: -+ genlmsg_cancel(msg, hdr); -+ return -EMSGSIZE; -+} -+ -+static int swconfig_dump_switches(struct sk_buff *skb, -+ struct netlink_callback *cb) -+{ -+ struct switch_dev *dev; -+ int start = cb->args[0]; -+ int idx = 0; -+ -+ swconfig_lock(); -+ list_for_each_entry(dev, &swdevs, dev_list) { -+ if (++idx <= start) -+ continue; -+ if (swconfig_send_switch(skb, NETLINK_CB(cb->skb).portid, -+ cb->nlh->nlmsg_seq, NLM_F_MULTI, -+ dev) < 0) -+ break; -+ } -+ swconfig_unlock(); -+ cb->args[0] = idx; -+ -+ return skb->len; -+} -+ -+static int -+swconfig_done(struct netlink_callback *cb) -+{ -+ return 0; -+} -+ -+static struct genl_ops swconfig_ops[] = { -+ { -+ .cmd = SWITCH_CMD_LIST_GLOBAL, -+ .doit = swconfig_list_attrs, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_LIST_VLAN, -+ .doit = swconfig_list_attrs, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_LIST_PORT, -+ .doit = swconfig_list_attrs, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_GET_GLOBAL, -+ .doit = swconfig_get_attr, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_GET_VLAN, -+ .doit = swconfig_get_attr, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_GET_PORT, -+ .doit = swconfig_get_attr, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_SET_GLOBAL, -+ .doit = swconfig_set_attr, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_SET_VLAN, -+ .doit = swconfig_set_attr, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_SET_PORT, -+ .doit = swconfig_set_attr, -+ .policy = switch_policy, -+ }, -+ { -+ .cmd = SWITCH_CMD_GET_SWITCH, -+ .dumpit = swconfig_dump_switches, -+ .policy = switch_policy, -+ .done = swconfig_done, -+ } -+}; -+ -+#ifdef CONFIG_OF -+void -+of_switch_load_portmap(struct switch_dev *dev) -+{ -+ struct device_node *port; -+ -+ if (!dev->of_node) -+ return; -+ -+ for_each_child_of_node(dev->of_node, port) { -+ const __be32 *prop; -+ const char *segment; -+ int size, phys; -+ -+ if (!of_device_is_compatible(port, "swconfig,port")) -+ continue; -+ -+ if (of_property_read_string(port, "swconfig,segment", &segment)) -+ continue; -+ -+ prop = of_get_property(port, "swconfig,portmap", &size); -+ if (!prop) -+ continue; -+ -+ if (size != (2 * sizeof(*prop))) { -+ pr_err("%s: failed to parse port mapping\n", -+ port->name); -+ continue; -+ } -+ -+ phys = be32_to_cpup(prop++); -+ if ((phys < 0) | (phys >= dev->ports)) { -+ pr_err("%s: physical port index out of range\n", -+ port->name); -+ continue; -+ } -+ -+ dev->portmap[phys].s = kstrdup(segment, GFP_KERNEL); -+ dev->portmap[phys].virt = be32_to_cpup(prop); -+ pr_debug("Found port: %s, physical: %d, virtual: %d\n", -+ segment, phys, dev->portmap[phys].virt); -+ } -+} -+#endif -+ -+int -+register_switch(struct switch_dev *dev, struct net_device *netdev) -+{ -+ struct switch_dev *sdev; -+ const int max_switches = 8 * sizeof(unsigned long); -+ unsigned long in_use = 0; -+ int err; -+ int i; -+ -+ INIT_LIST_HEAD(&dev->dev_list); -+ if (netdev) { -+ dev->netdev = netdev; -+ if (!dev->alias) -+ dev->alias = netdev->name; -+ } -+ BUG_ON(!dev->alias); -+ -+ if (dev->ports > 0) { -+ dev->portbuf = kzalloc(sizeof(struct switch_port) * -+ dev->ports, GFP_KERNEL); -+ if (!dev->portbuf) -+ return -ENOMEM; -+ dev->portmap = kzalloc(sizeof(struct switch_portmap) * -+ dev->ports, GFP_KERNEL); -+ if (!dev->portmap) { -+ kfree(dev->portbuf); -+ return -ENOMEM; -+ } -+ } -+ swconfig_defaults_init(dev); -+ mutex_init(&dev->sw_mutex); -+ swconfig_lock(); -+ dev->id = ++swdev_id; -+ -+ list_for_each_entry(sdev, &swdevs, dev_list) { -+ if (!sscanf(sdev->devname, SWCONFIG_DEVNAME, &i)) -+ continue; -+ if (i < 0 || i > max_switches) -+ continue; -+ -+ set_bit(i, &in_use); -+ } -+ i = find_first_zero_bit(&in_use, max_switches); -+ -+ if (i == max_switches) { -+ swconfig_unlock(); -+ return -ENFILE; -+ } -+ -+#ifdef CONFIG_OF -+ if (dev->ports) -+ of_switch_load_portmap(dev); -+#endif -+ -+ /* fill device name */ -+ snprintf(dev->devname, IFNAMSIZ, SWCONFIG_DEVNAME, i); -+ -+ list_add_tail(&dev->dev_list, &swdevs); -+ swconfig_unlock(); -+ -+ err = swconfig_create_led_trigger(dev); -+ if (err) -+ return err; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(register_switch); -+ -+void -+unregister_switch(struct switch_dev *dev) -+{ -+ swconfig_destroy_led_trigger(dev); -+ kfree(dev->portbuf); -+ mutex_lock(&dev->sw_mutex); -+ swconfig_lock(); -+ list_del(&dev->dev_list); -+ swconfig_unlock(); -+ mutex_unlock(&dev->sw_mutex); -+} -+EXPORT_SYMBOL_GPL(unregister_switch); -+ -+ -+static int __init -+swconfig_init(void) -+{ -+ int err; -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)) -+ int i; -+#endif -+ -+ INIT_LIST_HEAD(&swdevs); -+ -+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)) -+ err = genl_register_family(&switch_fam); -+ if (err) -+ return err; -+ -+ for (i = 0; i < ARRAY_SIZE(swconfig_ops); i++) { -+ err = genl_register_ops(&switch_fam, &swconfig_ops[i]); -+ if (err) -+ goto unregister; -+ } -+ return 0; -+ -+unregister: -+ genl_unregister_family(&switch_fam); -+ return err; -+#else -+ err = genl_register_family_with_ops(&switch_fam, swconfig_ops); -+ if (err) -+ return err; -+ return 0; -+#endif -+} -+ -+static void __exit -+swconfig_exit(void) -+{ -+ genl_unregister_family(&switch_fam); -+} -+ -+module_init(swconfig_init); -+module_exit(swconfig_exit); -+ -diff -Nur linux-4.1.13.orig/drivers/net/phy/swconfig_leds.c linux-4.1.13/drivers/net/phy/swconfig_leds.c ---- linux-4.1.13.orig/drivers/net/phy/swconfig_leds.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/net/phy/swconfig_leds.c 2015-12-04 21:45:30.824406773 +0100 -@@ -0,0 +1,354 @@ -+/* -+ * swconfig_led.c: LED trigger support for the switch configuration API -+ * -+ * Copyright (C) 2011 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ */ -+ -+#ifdef CONFIG_SWCONFIG_LEDS -+ -+#include -+#include -+#include -+#include -+ -+#define SWCONFIG_LED_TIMER_INTERVAL (HZ / 10) -+#define SWCONFIG_LED_NUM_PORTS 32 -+ -+struct switch_led_trigger { -+ struct led_trigger trig; -+ struct switch_dev *swdev; -+ -+ struct delayed_work sw_led_work; -+ u32 port_mask; -+ u32 port_link; -+ unsigned long port_traffic[SWCONFIG_LED_NUM_PORTS]; -+}; -+ -+struct swconfig_trig_data { -+ struct led_classdev *led_cdev; -+ struct switch_dev *swdev; -+ -+ rwlock_t lock; -+ u32 port_mask; -+ -+ bool prev_link; -+ unsigned long prev_traffic; -+ enum led_brightness prev_brightness; -+}; -+ -+static void -+swconfig_trig_set_brightness(struct swconfig_trig_data *trig_data, -+ enum led_brightness brightness) -+{ -+ led_set_brightness(trig_data->led_cdev, brightness); -+ trig_data->prev_brightness = brightness; -+} -+ -+static void -+swconfig_trig_update_port_mask(struct led_trigger *trigger) -+{ -+ struct list_head *entry; -+ struct switch_led_trigger *sw_trig; -+ u32 port_mask; -+ -+ if (!trigger) -+ return; -+ -+ sw_trig = (void *) trigger; -+ -+ port_mask = 0; -+ read_lock(&trigger->leddev_list_lock); -+ list_for_each(entry, &trigger->led_cdevs) { -+ struct led_classdev *led_cdev; -+ struct swconfig_trig_data *trig_data; -+ -+ led_cdev = list_entry(entry, struct led_classdev, trig_list); -+ trig_data = led_cdev->trigger_data; -+ if (trig_data) { -+ read_lock(&trig_data->lock); -+ port_mask |= trig_data->port_mask; -+ read_unlock(&trig_data->lock); -+ } -+ } -+ read_unlock(&trigger->leddev_list_lock); -+ -+ sw_trig->port_mask = port_mask; -+ -+ if (port_mask) -+ schedule_delayed_work(&sw_trig->sw_led_work, -+ SWCONFIG_LED_TIMER_INTERVAL); -+ else -+ cancel_delayed_work_sync(&sw_trig->sw_led_work); -+} -+ -+static ssize_t -+swconfig_trig_port_mask_store(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct swconfig_trig_data *trig_data = led_cdev->trigger_data; -+ unsigned long port_mask; -+ ssize_t ret = -EINVAL; -+ char *after; -+ size_t count; -+ -+ port_mask = simple_strtoul(buf, &after, 16); -+ count = after - buf; -+ -+ if (*after && isspace(*after)) -+ count++; -+ -+ if (count == size) { -+ bool changed; -+ -+ write_lock(&trig_data->lock); -+ -+ changed = (trig_data->port_mask != port_mask); -+ if (changed) { -+ trig_data->port_mask = port_mask; -+ if (port_mask == 0) -+ swconfig_trig_set_brightness(trig_data, LED_OFF); -+ } -+ -+ write_unlock(&trig_data->lock); -+ -+ if (changed) -+ swconfig_trig_update_port_mask(led_cdev->trigger); -+ -+ ret = count; -+ } -+ -+ return ret; -+} -+ -+static ssize_t -+swconfig_trig_port_mask_show(struct device *dev, struct device_attribute *attr, -+ char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct swconfig_trig_data *trig_data = led_cdev->trigger_data; -+ -+ read_lock(&trig_data->lock); -+ sprintf(buf, "%#x\n", trig_data->port_mask); -+ read_unlock(&trig_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+static DEVICE_ATTR(port_mask, 0644, swconfig_trig_port_mask_show, -+ swconfig_trig_port_mask_store); -+ -+static void -+swconfig_trig_activate(struct led_classdev *led_cdev) -+{ -+ struct switch_led_trigger *sw_trig; -+ struct swconfig_trig_data *trig_data; -+ int err; -+ -+ if (led_cdev->trigger->activate != swconfig_trig_activate) -+ return; -+ -+ trig_data = kzalloc(sizeof(struct swconfig_trig_data), GFP_KERNEL); -+ if (!trig_data) -+ return; -+ -+ sw_trig = (void *) led_cdev->trigger; -+ -+ rwlock_init(&trig_data->lock); -+ trig_data->led_cdev = led_cdev; -+ trig_data->swdev = sw_trig->swdev; -+ led_cdev->trigger_data = trig_data; -+ -+ err = device_create_file(led_cdev->dev, &dev_attr_port_mask); -+ if (err) -+ goto err_free; -+ -+ return; -+ -+err_free: -+ led_cdev->trigger_data = NULL; -+ kfree(trig_data); -+} -+ -+static void -+swconfig_trig_deactivate(struct led_classdev *led_cdev) -+{ -+ struct swconfig_trig_data *trig_data; -+ -+ swconfig_trig_update_port_mask(led_cdev->trigger); -+ -+ trig_data = (void *) led_cdev->trigger_data; -+ if (trig_data) { -+ device_remove_file(led_cdev->dev, &dev_attr_port_mask); -+ kfree(trig_data); -+ } -+} -+ -+static void -+swconfig_trig_led_event(struct switch_led_trigger *sw_trig, -+ struct led_classdev *led_cdev) -+{ -+ struct swconfig_trig_data *trig_data; -+ u32 port_mask; -+ bool link; -+ -+ trig_data = led_cdev->trigger_data; -+ if (!trig_data) -+ return; -+ -+ read_lock(&trig_data->lock); -+ port_mask = trig_data->port_mask; -+ read_unlock(&trig_data->lock); -+ -+ link = !!(sw_trig->port_link & port_mask); -+ if (!link) { -+ if (link != trig_data->prev_link) -+ swconfig_trig_set_brightness(trig_data, LED_OFF); -+ } else { -+ unsigned long traffic; -+ int i; -+ -+ traffic = 0; -+ for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) { -+ if (port_mask & (1 << i)) -+ traffic += sw_trig->port_traffic[i]; -+ } -+ -+ if (trig_data->prev_brightness != LED_FULL) -+ swconfig_trig_set_brightness(trig_data, LED_FULL); -+ else if (traffic != trig_data->prev_traffic) -+ swconfig_trig_set_brightness(trig_data, LED_OFF); -+ -+ trig_data->prev_traffic = traffic; -+ } -+ -+ trig_data->prev_link = link; -+} -+ -+static void -+swconfig_trig_update_leds(struct switch_led_trigger *sw_trig) -+{ -+ struct list_head *entry; -+ struct led_trigger *trigger; -+ -+ trigger = &sw_trig->trig; -+ read_lock(&trigger->leddev_list_lock); -+ list_for_each(entry, &trigger->led_cdevs) { -+ struct led_classdev *led_cdev; -+ -+ led_cdev = list_entry(entry, struct led_classdev, trig_list); -+ swconfig_trig_led_event(sw_trig, led_cdev); -+ } -+ read_unlock(&trigger->leddev_list_lock); -+} -+ -+static void -+swconfig_led_work_func(struct work_struct *work) -+{ -+ struct switch_led_trigger *sw_trig; -+ struct switch_dev *swdev; -+ u32 port_mask; -+ u32 link; -+ int i; -+ -+ sw_trig = container_of(work, struct switch_led_trigger, -+ sw_led_work.work); -+ -+ port_mask = sw_trig->port_mask; -+ swdev = sw_trig->swdev; -+ -+ link = 0; -+ for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) { -+ u32 port_bit; -+ -+ port_bit = BIT(i); -+ if ((port_mask & port_bit) == 0) -+ continue; -+ -+ if (swdev->ops->get_port_link) { -+ struct switch_port_link port_link; -+ -+ memset(&port_link, '\0', sizeof(port_link)); -+ swdev->ops->get_port_link(swdev, i, &port_link); -+ -+ if (port_link.link) -+ link |= port_bit; -+ } -+ -+ if (swdev->ops->get_port_stats) { -+ struct switch_port_stats port_stats; -+ -+ memset(&port_stats, '\0', sizeof(port_stats)); -+ swdev->ops->get_port_stats(swdev, i, &port_stats); -+ sw_trig->port_traffic[i] = port_stats.tx_bytes + -+ port_stats.rx_bytes; -+ } -+ } -+ -+ sw_trig->port_link = link; -+ -+ swconfig_trig_update_leds(sw_trig); -+ -+ schedule_delayed_work(&sw_trig->sw_led_work, -+ SWCONFIG_LED_TIMER_INTERVAL); -+} -+ -+static int -+swconfig_create_led_trigger(struct switch_dev *swdev) -+{ -+ struct switch_led_trigger *sw_trig; -+ int err; -+ -+ if (!swdev->ops->get_port_link) -+ return 0; -+ -+ sw_trig = kzalloc(sizeof(struct switch_led_trigger), GFP_KERNEL); -+ if (!sw_trig) -+ return -ENOMEM; -+ -+ sw_trig->swdev = swdev; -+ sw_trig->trig.name = swdev->devname; -+ sw_trig->trig.activate = swconfig_trig_activate; -+ sw_trig->trig.deactivate = swconfig_trig_deactivate; -+ -+ INIT_DELAYED_WORK(&sw_trig->sw_led_work, swconfig_led_work_func); -+ -+ err = led_trigger_register(&sw_trig->trig); -+ if (err) -+ goto err_free; -+ -+ swdev->led_trigger = sw_trig; -+ -+ return 0; -+ -+err_free: -+ kfree(sw_trig); -+ return err; -+} -+ -+static void -+swconfig_destroy_led_trigger(struct switch_dev *swdev) -+{ -+ struct switch_led_trigger *sw_trig; -+ -+ sw_trig = swdev->led_trigger; -+ if (sw_trig) { -+ cancel_delayed_work_sync(&sw_trig->sw_led_work); -+ led_trigger_unregister(&sw_trig->trig); -+ kfree(sw_trig); -+ } -+} -+ -+#else /* SWCONFIG_LEDS */ -+static inline int -+swconfig_create_led_trigger(struct switch_dev *swdev) { return 0; } -+ -+static inline void -+swconfig_destroy_led_trigger(struct switch_dev *swdev) { } -+#endif /* CONFIG_SWCONFIG_LEDS */ -diff -Nur linux-4.1.13.orig/drivers/spi/Kconfig linux-4.1.13/drivers/spi/Kconfig ---- linux-4.1.13.orig/drivers/spi/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/spi/Kconfig 2015-12-04 19:57:03.922108288 +0100 -@@ -59,6 +59,14 @@ - help - This is the driver for the Altera SPI Controller. - -+config SPI_AP83 -+ tristate "Atheros AP83 specific SPI Controller" -+ depends on SPI_MASTER && ATH79_MACH_AP83 -+ select SPI_BITBANG -+ help -+ This is a specific SPI controller driver for the Atheros AP83 -+ reference board. -+ - config SPI_ATH79 - tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" - depends on ATH79 && GPIOLIB -@@ -448,6 +456,12 @@ - This driver can also be built as a module. If so, the module - will be called spi_qup. - -+config SPI_RB4XX -+ tristate "Mikrotik RB4XX SPI master" -+ depends on SPI_MASTER && ATH79_MACH_RB4XX -+ help -+ SPI controller driver for the Mikrotik RB4xx series boards. -+ - config SPI_S3C24XX - tristate "Samsung S3C24XX series SPI" - depends on ARCH_S3C24XX -@@ -661,6 +675,18 @@ - sysfs interface, with each line presented as a kind of GPIO - exposing both switch control and diagnostic feedback. - -+config SPI_RB4XX_CPLD -+ tristate "MikroTik RB4XX CPLD driver" -+ depends on ATH79_MACH_RB4XX -+ help -+ SPI driver for the Xilinx CPLD chip present on the -+ MikroTik RB4xx boards. -+ -+config SPI_VSC7385 -+ tristate "Vitesse VSC7385 ethernet switch driver" -+ help -+ SPI driver for the Vitesse VSC7385 ethernet switch. -+ - # - # Add new SPI protocol masters in alphabetical order above this line - # -diff -Nur linux-4.1.13.orig/drivers/spi/Makefile linux-4.1.13/drivers/spi/Makefile ---- linux-4.1.13.orig/drivers/spi/Makefile 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/spi/Makefile 2015-12-04 19:57:03.922108288 +0100 -@@ -12,6 +12,7 @@ - # SPI master controller drivers (bus) - obj-$(CONFIG_SPI_ALTERA) += spi-altera.o - obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o -+obj-$(CONFIG_SPI_AP83) += spi-ap83.o - obj-$(CONFIG_SPI_ATH79) += spi-ath79.o - obj-$(CONFIG_SPI_AU1550) += spi-au1550.o - obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o -@@ -64,6 +65,8 @@ - spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_DMA) += spi-pxa2xx-dma.o - obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o - obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o -+obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o -+obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o - obj-$(CONFIG_SPI_QUP) += spi-qup.o - obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o - obj-$(CONFIG_SPI_RSPI) += spi-rspi.o -@@ -86,6 +89,7 @@ - obj-$(CONFIG_SPI_TLE62X0) += spi-tle62x0.o - obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o - obj-$(CONFIG_SPI_TXX9) += spi-txx9.o -+obj-$(CONFIG_SPI_VSC7385) += spi-vsc7385.o - obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o - obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o - obj-$(CONFIG_SPI_XTENSA_XTFPGA) += spi-xtensa-xtfpga.o -diff -Nur linux-4.1.13.orig/drivers/spi/spi-ap83.c linux-4.1.13/drivers/spi/spi-ap83.c ---- linux-4.1.13.orig/drivers/spi/spi-ap83.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/spi/spi-ap83.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,283 @@ -+/* -+ * Atheros AP83 board specific SPI Controller driver -+ * -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#define DRV_DESC "Atheros AP83 board SPI Controller driver" -+#define DRV_VERSION "0.1.0" -+#define DRV_NAME "ap83-spi" -+ -+#define AP83_SPI_CLK_HIGH (1 << 23) -+#define AP83_SPI_CLK_LOW 0 -+#define AP83_SPI_MOSI_HIGH (1 << 22) -+#define AP83_SPI_MOSI_LOW 0 -+ -+#define AP83_SPI_GPIO_CS 1 -+#define AP83_SPI_GPIO_MISO 3 -+ -+struct ap83_spi { -+ struct spi_bitbang bitbang; -+ void __iomem *base; -+ u32 addr; -+ -+ struct platform_device *pdev; -+}; -+ -+static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg) -+{ -+ return __raw_readl(sp->base + reg); -+} -+ -+static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi) -+{ -+ return spi_master_get_devdata(spi->master); -+} -+ -+static inline void setsck(struct spi_device *spi, int val) -+{ -+ struct ap83_spi *sp = spidev_to_sp(spi); -+ -+ if (val) -+ sp->addr |= AP83_SPI_CLK_HIGH; -+ else -+ sp->addr &= ~AP83_SPI_CLK_HIGH; -+ -+ dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n", -+ sp->addr, (val) ? "HIGH" : "LOW"); -+ -+ ap83_spi_rr(sp, sp->addr); -+} -+ -+static inline void setmosi(struct spi_device *spi, int val) -+{ -+ struct ap83_spi *sp = spidev_to_sp(spi); -+ -+ if (val) -+ sp->addr |= AP83_SPI_MOSI_HIGH; -+ else -+ sp->addr &= ~AP83_SPI_MOSI_HIGH; -+ -+ dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n", -+ sp->addr, (val) ? "HIGH" : "LOW"); -+ -+ ap83_spi_rr(sp, sp->addr); -+} -+ -+static inline u32 getmiso(struct spi_device *spi) -+{ -+ u32 ret; -+ -+ ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0; -+ dev_dbg(&spi->dev, "get MISO: %d\n", ret); -+ -+ return ret; -+} -+ -+static inline void do_spidelay(struct spi_device *spi, unsigned nsecs) -+{ -+ ndelay(nsecs); -+} -+ -+static void ap83_spi_chipselect(struct spi_device *spi, int on) -+{ -+ struct ap83_spi *sp = spidev_to_sp(spi); -+ -+ dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1); -+ -+ if (on) { -+ ath79_flash_acquire(); -+ -+ sp->addr = 0; -+ ap83_spi_rr(sp, sp->addr); -+ -+ gpio_set_value(AP83_SPI_GPIO_CS, 0); -+ } else { -+ gpio_set_value(AP83_SPI_GPIO_CS, 1); -+ ath79_flash_release(); -+ } -+} -+ -+#define spidelay(nsecs) \ -+ do { \ -+ /* Steal the spi_device pointer from our caller. \ -+ * The bitbang-API should probably get fixed here... */ \ -+ do_spidelay(spi, nsecs); \ -+ } while (0) -+ -+#define EXPAND_BITBANG_TXRX -+#include -+#include "spi-bitbang-txrx.h" -+ -+static u32 ap83_spi_txrx_mode0(struct spi_device *spi, -+ unsigned nsecs, u32 word, u8 bits) -+{ -+ dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits); -+ return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); -+} -+ -+static u32 ap83_spi_txrx_mode1(struct spi_device *spi, -+ unsigned nsecs, u32 word, u8 bits) -+{ -+ dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits); -+ return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); -+} -+ -+static u32 ap83_spi_txrx_mode2(struct spi_device *spi, -+ unsigned nsecs, u32 word, u8 bits) -+{ -+ dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits); -+ return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); -+} -+ -+static u32 ap83_spi_txrx_mode3(struct spi_device *spi, -+ unsigned nsecs, u32 word, u8 bits) -+{ -+ dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits); -+ return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); -+} -+ -+static int ap83_spi_probe(struct platform_device *pdev) -+{ -+ struct spi_master *master; -+ struct ap83_spi *sp; -+ struct ap83_spi_platform_data *pdata; -+ struct resource *r; -+ int ret; -+ -+ ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso"); -+ if (ret) { -+ dev_err(&pdev->dev, "gpio request failed for MISO\n"); -+ return ret; -+ } -+ -+ ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs"); -+ if (ret) { -+ dev_err(&pdev->dev, "gpio request failed for CS\n"); -+ goto err_free_miso; -+ } -+ -+ ret = gpio_direction_input(AP83_SPI_GPIO_MISO); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to set direction of MISO\n"); -+ goto err_free_cs; -+ } -+ -+ ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to set direction of CS\n"); -+ goto err_free_cs; -+ } -+ -+ master = spi_alloc_master(&pdev->dev, sizeof(*sp)); -+ if (master == NULL) { -+ dev_err(&pdev->dev, "failed to allocate spi master\n"); -+ return -ENOMEM; -+ } -+ -+ sp = spi_master_get_devdata(master); -+ platform_set_drvdata(pdev, sp); -+ -+ pdata = pdev->dev.platform_data; -+ -+ sp->bitbang.master = spi_master_get(master); -+ sp->bitbang.chipselect = ap83_spi_chipselect; -+ sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0; -+ sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1; -+ sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2; -+ sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3; -+ -+ sp->bitbang.master->bus_num = pdev->id; -+ sp->bitbang.master->num_chipselect = 1; -+ -+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (r == NULL) { -+ ret = -ENOENT; -+ goto err_spi_put; -+ } -+ -+ sp->base = ioremap_nocache(r->start, r->end - r->start + 1); -+ if (!sp->base) { -+ ret = -ENXIO; -+ goto err_spi_put; -+ } -+ -+ ret = spi_bitbang_start(&sp->bitbang); -+ if (!ret) -+ goto err_unmap; -+ -+ dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start); -+ -+ return 0; -+ -+err_unmap: -+ iounmap(sp->base); -+err_spi_put: -+ platform_set_drvdata(pdev, NULL); -+ spi_master_put(sp->bitbang.master); -+ -+err_free_cs: -+ gpio_free(AP83_SPI_GPIO_CS); -+err_free_miso: -+ gpio_free(AP83_SPI_GPIO_MISO); -+ return ret; -+} -+ -+static int ap83_spi_remove(struct platform_device *pdev) -+{ -+ struct ap83_spi *sp = platform_get_drvdata(pdev); -+ -+ spi_bitbang_stop(&sp->bitbang); -+ iounmap(sp->base); -+ platform_set_drvdata(pdev, NULL); -+ spi_master_put(sp->bitbang.master); -+ -+ return 0; -+} -+ -+static struct platform_driver ap83_spi_drv = { -+ .probe = ap83_spi_probe, -+ .remove = ap83_spi_remove, -+ .driver = { -+ .name = DRV_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init ap83_spi_init(void) -+{ -+ return platform_driver_register(&ap83_spi_drv); -+} -+module_init(ap83_spi_init); -+ -+static void __exit ap83_spi_exit(void) -+{ -+ platform_driver_unregister(&ap83_spi_drv); -+} -+module_exit(ap83_spi_exit); -+ -+MODULE_ALIAS("platform:" DRV_NAME); -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/spi/spi-ath79.c linux-4.1.13/drivers/spi/spi-ath79.c ---- linux-4.1.13.orig/drivers/spi/spi-ath79.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/spi/spi-ath79.c 2015-12-04 19:57:03.966105410 +0100 -@@ -33,6 +33,13 @@ - #define ATH79_SPI_RRW_DELAY_FACTOR 12000 - #define MHZ (1000 * 1000) - -+#define ATH79_SPI_CS_LINE_MAX 2 -+ -+enum ath79_spi_state { -+ ATH79_SPI_STATE_WAIT_CMD = 0, -+ ATH79_SPI_STATE_WAIT_READ, -+}; -+ - struct ath79_spi { - struct spi_bitbang bitbang; - u32 ioc_base; -@@ -40,6 +47,11 @@ - void __iomem *base; - struct clk *clk; - unsigned rrw_delay; -+ -+ enum ath79_spi_state state; -+ u32 clk_div; -+ unsigned long read_addr; -+ unsigned long ahb_rate; - }; - - static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg) -@@ -67,6 +79,7 @@ - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active; -+ struct ath79_spi_controller_data *cdata = spi->controller_data; - - if (is_active) { - /* set initial clock polarity */ -@@ -78,20 +91,24 @@ - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } - -- if (spi->chip_select) { -- struct ath79_spi_controller_data *cdata = spi->controller_data; -- -- /* SPI is normally active-low */ -- gpio_set_value(cdata->gpio, cs_high); -- } else { -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: - if (cs_high) -- sp->ioc_base |= AR71XX_SPI_IOC_CS0; -+ sp->ioc_base |= AR71XX_SPI_IOC_CS(cdata->cs_line); - else -- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; -+ sp->ioc_base &= ~AR71XX_SPI_IOC_CS(cdata->cs_line); - - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -- } -+ break; - -+ case ATH79_SPI_CS_TYPE_GPIO: -+ /* SPI is normally active-low */ -+ if (gpio_cansleep(cdata->cs_line)) -+ gpio_set_value_cansleep(cdata->cs_line, cs_high); -+ else -+ gpio_set_value(cdata->cs_line, cs_high); -+ break; -+ } - } - - static void ath79_spi_enable(struct ath79_spi *sp) -@@ -102,9 +119,6 @@ - /* save CTRL register */ - sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); - sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); -- -- /* TODO: setup speed? */ -- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); - } - - static void ath79_spi_disable(struct ath79_spi *sp) -@@ -118,24 +132,30 @@ - static int ath79_spi_setup_cs(struct spi_device *spi) - { - struct ath79_spi_controller_data *cdata; -+ unsigned long flags; - int status; - - cdata = spi->controller_data; -- if (spi->chip_select && !cdata) -+ if (!cdata) - return -EINVAL; - - status = 0; -- if (spi->chip_select) { -- unsigned long flags; -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: -+ if (cdata->cs_line > ATH79_SPI_CS_LINE_MAX) -+ status = -EINVAL; -+ break; - -+ case ATH79_SPI_CS_TYPE_GPIO: - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) - flags |= GPIOF_INIT_LOW; - else - flags |= GPIOF_INIT_HIGH; - -- status = gpio_request_one(cdata->gpio, flags, -+ status = gpio_request_one(cdata->cs_line, flags, - dev_name(&spi->dev)); -+ break; - } - - return status; -@@ -143,9 +163,19 @@ - - static void ath79_spi_cleanup_cs(struct spi_device *spi) - { -- if (spi->chip_select) { -- struct ath79_spi_controller_data *cdata = spi->controller_data; -- gpio_free(cdata->gpio); -+ struct ath79_spi_controller_data *cdata; -+ -+ cdata = spi->controller_data; -+ if (!cdata) -+ return; -+ -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: -+ /* nothing to do */ -+ break; -+ case ATH79_SPI_CS_TYPE_GPIO: -+ gpio_free(cdata->cs_line); -+ break; - } - } - -@@ -201,6 +231,114 @@ - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_spi_do_read_flash_data(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(t->rx_buf, sp->base + sp->read_addr, t->len); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return t->len; -+} -+ -+static int ath79_spi_do_read_flash_cmd(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ int len; -+ const u8 *p; -+ -+ sp->read_addr = 0; -+ -+ len = t->len - 1; -+ -+ if (t->dummy) -+ len -= 1; -+ -+ p = t->tx_buf; -+ -+ while (len--) { -+ p++; -+ sp->read_addr <<= 8; -+ sp->read_addr |= *p; -+ } -+ -+ return t->len; -+} -+ -+static bool ath79_spi_is_read_cmd(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ return t->type == SPI_TRANSFER_FLASH_READ_CMD; -+} -+ -+static bool ath79_spi_is_data_read(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ return t->type == SPI_TRANSFER_FLASH_READ_DATA; -+} -+ -+static int ath79_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ int ret; -+ -+ switch (sp->state) { -+ case ATH79_SPI_STATE_WAIT_CMD: -+ if (ath79_spi_is_read_cmd(spi, t)) { -+ ret = ath79_spi_do_read_flash_cmd(spi, t); -+ sp->state = ATH79_SPI_STATE_WAIT_READ; -+ } else { -+ ret = spi_bitbang_bufs(spi, t); -+ } -+ break; -+ -+ case ATH79_SPI_STATE_WAIT_READ: -+ if (ath79_spi_is_data_read(spi, t)) { -+ ret = ath79_spi_do_read_flash_data(spi, t); -+ } else { -+ dev_warn(&spi->dev, "flash data read expected\n"); -+ ret = -EIO; -+ } -+ sp->state = ATH79_SPI_STATE_WAIT_CMD; -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ return ret; -+} -+ -+static int ath79_spi_setup_transfer(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ struct ath79_spi_controller_data *cdata; -+ int ret; -+ -+ ret = spi_bitbang_setup_transfer(spi, t); -+ if (ret) -+ return ret; -+ -+ cdata = spi->controller_data; -+ if (cdata->is_flash) -+ sp->bitbang.txrx_bufs = ath79_spi_txrx_bufs; -+ else -+ sp->bitbang.txrx_bufs = spi_bitbang_bufs; -+ -+ return ret; -+} -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -210,6 +348,10 @@ - unsigned long rate; - int ret; - -+ pdata = pdev->dev.platform_data; -+ if (!pdata) -+ return -EINVAL; -+ - master = spi_alloc_master(&pdev->dev, sizeof(*sp)); - if (master == NULL) { - dev_err(&pdev->dev, "failed to allocate spi master\n"); -@@ -219,20 +361,18 @@ - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - -- pdata = dev_get_platdata(&pdev->dev); -+ sp->state = ATH79_SPI_STATE_WAIT_CMD; - - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->setup = ath79_spi_setup; - master->cleanup = ath79_spi_cleanup; -- if (pdata) { -- master->bus_num = pdata->bus_num; -- master->num_chipselect = pdata->num_chipselect; -- } -+ master->bus_num = pdata->bus_num; -+ master->num_chipselect = pdata->num_chipselect; - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; - sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0; -- sp->bitbang.setup_transfer = spi_bitbang_setup_transfer; -+ sp->bitbang.setup_transfer = ath79_spi_setup_transfer; - sp->bitbang.flags = SPI_CS_HIGH; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -@@ -257,7 +397,8 @@ - if (ret) - goto err_put_master; - -- rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); -+ sp->ahb_rate = clk_get_rate(sp->clk); -+ rate = DIV_ROUND_UP(sp->ahb_rate, MHZ); - if (!rate) { - ret = -EINVAL; - goto err_clk_disable; -diff -Nur linux-4.1.13.orig/drivers/spi/spi-bitbang.c linux-4.1.13/drivers/spi/spi-bitbang.c ---- linux-4.1.13.orig/drivers/spi/spi-bitbang.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/spi/spi-bitbang.c 2015-12-04 19:57:03.934107503 +0100 -@@ -230,13 +230,14 @@ - } - EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); - --static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) -+int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) - { - struct spi_bitbang_cs *cs = spi->controller_state; - unsigned nsecs = cs->nsecs; - - return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); - } -+EXPORT_SYMBOL_GPL(spi_bitbang_bufs); - - /*----------------------------------------------------------------------*/ - -diff -Nur linux-4.1.13.orig/drivers/spi/spi-rb4xx.c linux-4.1.13/drivers/spi/spi-rb4xx.c ---- linux-4.1.13.orig/drivers/spi/spi-rb4xx.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/spi/spi-rb4xx.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,507 @@ -+/* -+ * SPI controller driver for the Mikrotik RB4xx boards -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * This file was based on the patches for Linux 2.6.27.39 published by -+ * MikroTik for their RouterBoard 4xx series devices. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define DRV_NAME "rb4xx-spi" -+#define DRV_DESC "Mikrotik RB4xx SPI controller driver" -+#define DRV_VERSION "0.1.0" -+ -+#define SPI_CTRL_FASTEST 0x40 -+#define SPI_FLASH_HZ 33333334 -+#define SPI_CPLD_HZ 33333334 -+ -+#define CPLD_CMD_READ_FAST 0x0b -+ -+#undef RB4XX_SPI_DEBUG -+ -+struct rb4xx_spi { -+ void __iomem *base; -+ struct spi_master *master; -+ -+ unsigned spi_ctrl_flash; -+ unsigned spi_ctrl_fread; -+ -+ struct clk *ahb_clk; -+ unsigned long ahb_freq; -+ -+ spinlock_t lock; -+ struct list_head queue; -+ int busy:1; -+ int cs_wait; -+}; -+ -+static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1; -+ -+#ifdef RB4XX_SPI_DEBUG -+static inline void do_spi_delay(void) -+{ -+ ndelay(20000); -+} -+#else -+static inline void do_spi_delay(void) { } -+#endif -+ -+static inline void do_spi_init(struct spi_device *spi) -+{ -+ unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1; -+ -+ if (!(spi->mode & SPI_CS_HIGH)) -+ cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 : -+ AR71XX_SPI_IOC_CS0; -+ -+ spi_clk_low = cs; -+} -+ -+static inline void do_spi_finish(void __iomem *base) -+{ -+ do_spi_delay(); -+ __raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1, -+ base + AR71XX_SPI_REG_IOC); -+} -+ -+static inline void do_spi_clk(void __iomem *base, int bit) -+{ -+ unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0); -+ -+ do_spi_delay(); -+ __raw_writel(bval, base + AR71XX_SPI_REG_IOC); -+ do_spi_delay(); -+ __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); -+} -+ -+static void do_spi_byte(void __iomem *base, unsigned char byte) -+{ -+ do_spi_clk(base, byte >> 7); -+ do_spi_clk(base, byte >> 6); -+ do_spi_clk(base, byte >> 5); -+ do_spi_clk(base, byte >> 4); -+ do_spi_clk(base, byte >> 3); -+ do_spi_clk(base, byte >> 2); -+ do_spi_clk(base, byte >> 1); -+ do_spi_clk(base, byte); -+ -+ pr_debug("spi_byte sent 0x%02x got 0x%02x\n", -+ (unsigned)byte, -+ (unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS)); -+} -+ -+static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1, -+ unsigned bit2) -+{ -+ unsigned bval = (spi_clk_low | -+ ((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) | -+ ((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0)); -+ do_spi_delay(); -+ __raw_writel(bval, base + AR71XX_SPI_REG_IOC); -+ do_spi_delay(); -+ __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); -+} -+ -+static void do_spi_byte_fast(void __iomem *base, unsigned char byte) -+{ -+ do_spi_clk_fast(base, byte >> 7, byte >> 6); -+ do_spi_clk_fast(base, byte >> 5, byte >> 4); -+ do_spi_clk_fast(base, byte >> 3, byte >> 2); -+ do_spi_clk_fast(base, byte >> 1, byte >> 0); -+ -+ pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n", -+ (unsigned)byte, -+ (unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS)); -+} -+ -+static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t) -+{ -+ const unsigned char *rxv_ptr = NULL; -+ const unsigned char *tx_ptr = t->tx_buf; -+ unsigned char *rx_ptr = t->rx_buf; -+ unsigned i; -+ -+ pr_debug("spi_txrx len %u tx %u rx %u\n", -+ t->len, -+ (t->tx_buf ? 1 : 0), -+ (t->rx_buf ? 1 : 0)); -+ -+ if (t->verify) { -+ rxv_ptr = tx_ptr; -+ tx_ptr = NULL; -+ } -+ -+ for (i = 0; i < t->len; ++i) { -+ unsigned char sdata = tx_ptr ? tx_ptr[i] : 0; -+ -+ if (t->fast_write) -+ do_spi_byte_fast(base, sdata); -+ else -+ do_spi_byte(base, sdata); -+ -+ if (rx_ptr) { -+ rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff; -+ } else if (rxv_ptr) { -+ unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS); -+ if (rxv_ptr[i] != c) -+ return i; -+ } -+ } -+ -+ return i; -+} -+ -+static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi, -+ struct spi_message *m) -+{ -+ struct spi_transfer *t; -+ const unsigned char *tx_ptr; -+ unsigned addr; -+ void __iomem *base = rbspi->base; -+ -+ /* check for exactly two transfers */ -+ if (list_empty(&m->transfers) || -+ list_is_last(m->transfers.next, &m->transfers) || -+ !list_is_last(m->transfers.next->next, &m->transfers)) { -+ return -1; -+ } -+ -+ /* first transfer contains command and address */ -+ t = list_entry(m->transfers.next, -+ struct spi_transfer, transfer_list); -+ -+ if (t->len != 5 || t->tx_buf == NULL) -+ return -1; -+ -+ tx_ptr = t->tx_buf; -+ if (tx_ptr[0] != CPLD_CMD_READ_FAST) -+ return -1; -+ -+ addr = tx_ptr[1]; -+ addr = tx_ptr[2] | (addr << 8); -+ addr = tx_ptr[3] | (addr << 8); -+ addr += (unsigned) base; -+ -+ m->actual_length += t->len; -+ -+ /* second transfer contains data itself */ -+ t = list_entry(m->transfers.next->next, -+ struct spi_transfer, transfer_list); -+ -+ if (t->tx_buf && !t->verify) -+ return -1; -+ -+ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); -+ __raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL); -+ __raw_writel(0, base + AR71XX_SPI_REG_FS); -+ -+ if (t->rx_buf) { -+ memcpy(t->rx_buf, (const void *)addr, t->len); -+ } else if (t->tx_buf) { -+ unsigned char buf[t->len]; -+ memcpy(buf, (const void *)addr, t->len); -+ if (memcmp(t->tx_buf, buf, t->len) != 0) -+ m->status = -EMSGSIZE; -+ } -+ m->actual_length += t->len; -+ -+ if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) { -+ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); -+ __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); -+ __raw_writel(0, base + AR71XX_SPI_REG_FS); -+ } -+ -+ return 0; -+} -+ -+static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m) -+{ -+ struct spi_transfer *t = NULL; -+ void __iomem *base = rbspi->base; -+ -+ m->status = 0; -+ if (list_empty(&m->transfers)) -+ return -1; -+ -+ if (m->fast_read) -+ if (rb4xx_spi_read_fast(rbspi, m) == 0) -+ return -1; -+ -+ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); -+ __raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL); -+ do_spi_init(m->spi); -+ -+ list_for_each_entry(t, &m->transfers, transfer_list) { -+ int len; -+ -+ len = rb4xx_spi_txrx(base, t); -+ if (len != t->len) { -+ m->status = -EMSGSIZE; -+ break; -+ } -+ m->actual_length += len; -+ -+ if (t->cs_change) { -+ if (list_is_last(&t->transfer_list, &m->transfers)) { -+ /* wait for continuation */ -+ return m->spi->chip_select; -+ } -+ do_spi_finish(base); -+ ndelay(100); -+ } -+ } -+ -+ do_spi_finish(base); -+ __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); -+ __raw_writel(0, base + AR71XX_SPI_REG_FS); -+ return -1; -+} -+ -+static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi, -+ unsigned long *flags) -+{ -+ int cs = rbspi->cs_wait; -+ -+ rbspi->busy = 1; -+ while (!list_empty(&rbspi->queue)) { -+ struct spi_message *m; -+ -+ list_for_each_entry(m, &rbspi->queue, queue) -+ if (cs < 0 || cs == m->spi->chip_select) -+ break; -+ -+ if (&m->queue == &rbspi->queue) -+ break; -+ -+ list_del_init(&m->queue); -+ spin_unlock_irqrestore(&rbspi->lock, *flags); -+ -+ cs = rb4xx_spi_msg(rbspi, m); -+ m->complete(m->context); -+ -+ spin_lock_irqsave(&rbspi->lock, *flags); -+ } -+ -+ rbspi->cs_wait = cs; -+ rbspi->busy = 0; -+ -+ if (cs >= 0) { -+ /* TODO: add timer to unlock cs after 1s inactivity */ -+ } -+} -+ -+static int rb4xx_spi_transfer(struct spi_device *spi, -+ struct spi_message *m) -+{ -+ struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); -+ unsigned long flags; -+ -+ m->actual_length = 0; -+ m->status = -EINPROGRESS; -+ -+ spin_lock_irqsave(&rbspi->lock, flags); -+ list_add_tail(&m->queue, &rbspi->queue); -+ if (rbspi->busy || -+ (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) { -+ /* job will be done later */ -+ spin_unlock_irqrestore(&rbspi->lock, flags); -+ return 0; -+ } -+ -+ /* process job in current context */ -+ rb4xx_spi_process_queue_locked(rbspi, &flags); -+ spin_unlock_irqrestore(&rbspi->lock, flags); -+ -+ return 0; -+} -+ -+static int rb4xx_spi_setup(struct spi_device *spi) -+{ -+ struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); -+ unsigned long flags; -+ -+ if (spi->mode & ~(SPI_CS_HIGH)) { -+ dev_err(&spi->dev, "mode %x not supported\n", -+ (unsigned) spi->mode); -+ return -EINVAL; -+ } -+ -+ if (spi->bits_per_word != 8 && spi->bits_per_word != 0) { -+ dev_err(&spi->dev, "bits_per_word %u not supported\n", -+ (unsigned) spi->bits_per_word); -+ return -EINVAL; -+ } -+ -+ spin_lock_irqsave(&rbspi->lock, flags); -+ if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) { -+ rbspi->cs_wait = -1; -+ rb4xx_spi_process_queue_locked(rbspi, &flags); -+ } -+ spin_unlock_irqrestore(&rbspi->lock, flags); -+ -+ return 0; -+} -+ -+static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max, -+ const char *name) -+{ -+ unsigned div; -+ -+ div = (rbspi->ahb_freq - 1) / (2 * hz_max); -+ -+ /* -+ * CPU has a bug at (div == 0) - first bit read is random -+ */ -+ if (div == 0) -+ ++div; -+ -+ if (name) { -+ unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000; -+ unsigned div_real = 2 * (div + 1); -+ pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n", -+ name, -+ ahb_khz / div_real, -+ ahb_khz, div_real); -+ } -+ -+ return SPI_CTRL_FASTEST + div; -+} -+ -+static int rb4xx_spi_probe(struct platform_device *pdev) -+{ -+ struct spi_master *master; -+ struct rb4xx_spi *rbspi; -+ struct resource *r; -+ int err = 0; -+ -+ master = spi_alloc_master(&pdev->dev, sizeof(*rbspi)); -+ if (master == NULL) { -+ dev_err(&pdev->dev, "no memory for spi_master\n"); -+ err = -ENOMEM; -+ goto err_out; -+ } -+ -+ master->bus_num = 0; -+ master->num_chipselect = 3; -+ master->setup = rb4xx_spi_setup; -+ master->transfer = rb4xx_spi_transfer; -+ -+ rbspi = spi_master_get_devdata(master); -+ -+ rbspi->ahb_clk = clk_get(&pdev->dev, "ahb"); -+ if (IS_ERR(rbspi->ahb_clk)) { -+ err = PTR_ERR(rbspi->ahb_clk); -+ goto err_put_master; -+ } -+ -+ err = clk_enable(rbspi->ahb_clk); -+ if (err) -+ goto err_clk_put; -+ -+ rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk); -+ if (!rbspi->ahb_freq) { -+ err = -EINVAL; -+ goto err_clk_disable; -+ } -+ -+ platform_set_drvdata(pdev, rbspi); -+ -+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (r == NULL) { -+ err = -ENOENT; -+ goto err_clk_disable; -+ } -+ -+ rbspi->base = ioremap(r->start, r->end - r->start + 1); -+ if (!rbspi->base) { -+ err = -ENXIO; -+ goto err_clk_disable; -+ } -+ -+ rbspi->master = master; -+ rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH"); -+ rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD"); -+ rbspi->cs_wait = -1; -+ -+ spin_lock_init(&rbspi->lock); -+ INIT_LIST_HEAD(&rbspi->queue); -+ -+ err = spi_register_master(master); -+ if (err) { -+ dev_err(&pdev->dev, "failed to register SPI master\n"); -+ goto err_iounmap; -+ } -+ -+ return 0; -+ -+err_iounmap: -+ iounmap(rbspi->base); -+err_clk_disable: -+ clk_disable(rbspi->ahb_clk); -+err_clk_put: -+ clk_put(rbspi->ahb_clk); -+err_put_master: -+ platform_set_drvdata(pdev, NULL); -+ spi_master_put(master); -+err_out: -+ return err; -+} -+ -+static int rb4xx_spi_remove(struct platform_device *pdev) -+{ -+ struct rb4xx_spi *rbspi = platform_get_drvdata(pdev); -+ -+ iounmap(rbspi->base); -+ clk_disable(rbspi->ahb_clk); -+ clk_put(rbspi->ahb_clk); -+ platform_set_drvdata(pdev, NULL); -+ spi_master_put(rbspi->master); -+ -+ return 0; -+} -+ -+static struct platform_driver rb4xx_spi_drv = { -+ .probe = rb4xx_spi_probe, -+ .remove = rb4xx_spi_remove, -+ .driver = { -+ .name = DRV_NAME, -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init rb4xx_spi_init(void) -+{ -+ return platform_driver_register(&rb4xx_spi_drv); -+} -+subsys_initcall(rb4xx_spi_init); -+ -+static void __exit rb4xx_spi_exit(void) -+{ -+ platform_driver_unregister(&rb4xx_spi_drv); -+} -+ -+module_exit(rb4xx_spi_exit); -+ -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/spi/spi-rb4xx-cpld.c linux-4.1.13/drivers/spi/spi-rb4xx-cpld.c ---- linux-4.1.13.orig/drivers/spi/spi-rb4xx-cpld.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/spi/spi-rb4xx-cpld.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,441 @@ -+/* -+ * SPI driver for the CPLD chip on the Mikrotik RB4xx boards -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * This file was based on the patches for Linux 2.6.27.39 published by -+ * MikroTik for their RouterBoard 4xx series devices. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#define DRV_NAME "spi-rb4xx-cpld" -+#define DRV_DESC "RB4xx CPLD driver" -+#define DRV_VERSION "0.1.0" -+ -+#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */ -+#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */ -+#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */ -+#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */ -+#define CPLD_CMD_LED5_ON 0x0c /* send cmd */ -+#define CPLD_CMD_LED5_OFF 0x0d /* send cmd */ -+ -+struct rb4xx_cpld { -+ struct spi_device *spi; -+ struct mutex lock; -+ struct gpio_chip chip; -+ unsigned int config; -+}; -+ -+static struct rb4xx_cpld *rb4xx_cpld; -+ -+static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip) -+{ -+ return container_of(chip, struct rb4xx_cpld, chip); -+} -+ -+static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd) -+{ -+ struct spi_transfer t[1]; -+ struct spi_message m; -+ unsigned char tx_buf[1]; -+ int err; -+ -+ spi_message_init(&m); -+ memset(&t, 0, sizeof(t)); -+ -+ t[0].tx_buf = tx_buf; -+ t[0].len = sizeof(tx_buf); -+ spi_message_add_tail(&t[0], &m); -+ -+ tx_buf[0] = cmd; -+ -+ err = spi_sync(cpld->spi, &m); -+ return err; -+} -+ -+static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config) -+{ -+ struct spi_transfer t[1]; -+ struct spi_message m; -+ unsigned char cmd[2]; -+ int err; -+ -+ spi_message_init(&m); -+ memset(&t, 0, sizeof(t)); -+ -+ t[0].tx_buf = cmd; -+ t[0].len = sizeof(cmd); -+ spi_message_add_tail(&t[0], &m); -+ -+ cmd[0] = CPLD_CMD_WRITE_CFG; -+ cmd[1] = config; -+ -+ err = spi_sync(cpld->spi, &m); -+ return err; -+} -+ -+static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask, -+ unsigned value) -+{ -+ unsigned int config; -+ int err; -+ -+ config = cpld->config & ~mask; -+ config |= value; -+ -+ if ((cpld->config ^ config) & 0xff) { -+ err = rb4xx_cpld_write_cfg(cpld, config); -+ if (err) -+ return err; -+ } -+ -+ if ((cpld->config ^ config) & CPLD_CFG_nLED5) { -+ err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON : -+ CPLD_CMD_LED5_OFF); -+ if (err) -+ return err; -+ } -+ -+ cpld->config = config; -+ return 0; -+} -+ -+int rb4xx_cpld_change_cfg(unsigned mask, unsigned value) -+{ -+ int ret; -+ -+ if (rb4xx_cpld == NULL) -+ return -ENODEV; -+ -+ mutex_lock(&rb4xx_cpld->lock); -+ ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value); -+ mutex_unlock(&rb4xx_cpld->lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg); -+ -+int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf, -+ const unsigned char *verify_buf, unsigned count) -+{ -+ const unsigned char cmd[5] = { -+ CPLD_CMD_READ_FAST, -+ (addr >> 16) & 0xff, -+ (addr >> 8) & 0xff, -+ addr & 0xff, -+ 0 -+ }; -+ struct spi_transfer t[2] = { -+ { -+ .tx_buf = &cmd, -+ .len = 5, -+ }, -+ { -+ .tx_buf = verify_buf, -+ .rx_buf = rx_buf, -+ .len = count, -+ .verify = (verify_buf != NULL), -+ }, -+ }; -+ struct spi_message m; -+ -+ if (rb4xx_cpld == NULL) -+ return -ENODEV; -+ -+ spi_message_init(&m); -+ m.fast_read = 1; -+ spi_message_add_tail(&t[0], &m); -+ spi_message_add_tail(&t[1], &m); -+ return spi_sync(rb4xx_cpld->spi, &m); -+} -+EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from); -+ -+#if 0 -+int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf, -+ unsigned count) -+{ -+ struct spi_transfer t[2]; -+ struct spi_message m; -+ unsigned char cmd[2]; -+ -+ if (rb4xx_cpld == NULL) -+ return -ENODEV; -+ -+ spi_message_init(&m); -+ memset(&t, 0, sizeof(t)); -+ -+ /* send command */ -+ t[0].tx_buf = cmd; -+ t[0].len = sizeof(cmd); -+ spi_message_add_tail(&t[0], &m); -+ -+ cmd[0] = CPLD_CMD_READ_NAND; -+ cmd[1] = 0; -+ -+ /* read data */ -+ t[1].rx_buf = buf; -+ t[1].len = count; -+ spi_message_add_tail(&t[1], &m); -+ -+ return spi_sync(rb4xx_cpld->spi, &m); -+} -+#else -+int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf, -+ unsigned count) -+{ -+ static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 }; -+ struct spi_transfer t[2] = { -+ { -+ .tx_buf = &cmd, -+ .len = 2, -+ }, { -+ .tx_buf = verify_buf, -+ .rx_buf = rx_buf, -+ .len = count, -+ .verify = (verify_buf != NULL), -+ }, -+ }; -+ struct spi_message m; -+ -+ if (rb4xx_cpld == NULL) -+ return -ENODEV; -+ -+ spi_message_init(&m); -+ spi_message_add_tail(&t[0], &m); -+ spi_message_add_tail(&t[1], &m); -+ return spi_sync(rb4xx_cpld->spi, &m); -+} -+#endif -+EXPORT_SYMBOL_GPL(rb4xx_cpld_read); -+ -+int rb4xx_cpld_write(const unsigned char *buf, unsigned count) -+{ -+#if 0 -+ struct spi_transfer t[3]; -+ struct spi_message m; -+ unsigned char cmd[1]; -+ -+ if (rb4xx_cpld == NULL) -+ return -ENODEV; -+ -+ memset(&t, 0, sizeof(t)); -+ spi_message_init(&m); -+ -+ /* send command */ -+ t[0].tx_buf = cmd; -+ t[0].len = sizeof(cmd); -+ spi_message_add_tail(&t[0], &m); -+ -+ cmd[0] = CPLD_CMD_WRITE_NAND; -+ -+ /* write data */ -+ t[1].tx_buf = buf; -+ t[1].len = count; -+ spi_message_add_tail(&t[1], &m); -+ -+ /* send idle */ -+ t[2].len = 1; -+ spi_message_add_tail(&t[2], &m); -+ -+ return spi_sync(rb4xx_cpld->spi, &m); -+#else -+ static const unsigned char cmd = CPLD_CMD_WRITE_NAND; -+ struct spi_transfer t[3] = { -+ { -+ .tx_buf = &cmd, -+ .len = 1, -+ }, { -+ .tx_buf = buf, -+ .len = count, -+ .fast_write = 1, -+ }, { -+ .len = 1, -+ .fast_write = 1, -+ }, -+ }; -+ struct spi_message m; -+ -+ if (rb4xx_cpld == NULL) -+ return -ENODEV; -+ -+ spi_message_init(&m); -+ spi_message_add_tail(&t[0], &m); -+ spi_message_add_tail(&t[1], &m); -+ spi_message_add_tail(&t[2], &m); -+ return spi_sync(rb4xx_cpld->spi, &m); -+#endif -+} -+EXPORT_SYMBOL_GPL(rb4xx_cpld_write); -+ -+static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset) -+{ -+ struct rb4xx_cpld *cpld = gpio_to_cpld(chip); -+ int ret; -+ -+ mutex_lock(&cpld->lock); -+ ret = (cpld->config >> offset) & 1; -+ mutex_unlock(&cpld->lock); -+ -+ return ret; -+} -+ -+static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset, -+ int value) -+{ -+ struct rb4xx_cpld *cpld = gpio_to_cpld(chip); -+ -+ mutex_lock(&cpld->lock); -+ __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); -+ mutex_unlock(&cpld->lock); -+} -+ -+static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip, -+ unsigned offset) -+{ -+ return -EOPNOTSUPP; -+} -+ -+static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip, -+ unsigned offset, -+ int value) -+{ -+ struct rb4xx_cpld *cpld = gpio_to_cpld(chip); -+ int ret; -+ -+ mutex_lock(&cpld->lock); -+ ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); -+ mutex_unlock(&cpld->lock); -+ -+ return ret; -+} -+ -+static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base) -+{ -+ int err; -+ -+ /* init config */ -+ cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 | -+ CPLD_CFG_nLED4 | CPLD_CFG_nCE; -+ rb4xx_cpld_write_cfg(cpld, cpld->config); -+ -+ /* setup GPIO chip */ -+ cpld->chip.label = DRV_NAME; -+ -+ cpld->chip.get = rb4xx_cpld_gpio_get; -+ cpld->chip.set = rb4xx_cpld_gpio_set; -+ cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input; -+ cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output; -+ -+ cpld->chip.base = base; -+ cpld->chip.ngpio = CPLD_NUM_GPIOS; -+ cpld->chip.can_sleep = 1; -+ cpld->chip.dev = &cpld->spi->dev; -+ cpld->chip.owner = THIS_MODULE; -+ -+ err = gpiochip_add(&cpld->chip); -+ if (err) -+ dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n", -+ err); -+ -+ return err; -+} -+ -+static int rb4xx_cpld_probe(struct spi_device *spi) -+{ -+ struct rb4xx_cpld *cpld; -+ struct rb4xx_cpld_platform_data *pdata; -+ int err; -+ -+ pdata = spi->dev.platform_data; -+ if (!pdata) { -+ dev_dbg(&spi->dev, "no platform data\n"); -+ return -EINVAL; -+ } -+ -+ cpld = kzalloc(sizeof(*cpld), GFP_KERNEL); -+ if (!cpld) { -+ dev_err(&spi->dev, "no memory for private data\n"); -+ return -ENOMEM; -+ } -+ -+ mutex_init(&cpld->lock); -+ cpld->spi = spi_dev_get(spi); -+ dev_set_drvdata(&spi->dev, cpld); -+ -+ spi->mode = SPI_MODE_0; -+ spi->bits_per_word = 8; -+ err = spi_setup(spi); -+ if (err) { -+ dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); -+ goto err_drvdata; -+ } -+ -+ err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base); -+ if (err) -+ goto err_drvdata; -+ -+ rb4xx_cpld = cpld; -+ -+ return 0; -+ -+err_drvdata: -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(cpld); -+ -+ return err; -+} -+ -+static int rb4xx_cpld_remove(struct spi_device *spi) -+{ -+ struct rb4xx_cpld *cpld; -+ -+ rb4xx_cpld = NULL; -+ cpld = dev_get_drvdata(&spi->dev); -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(cpld); -+ -+ return 0; -+} -+ -+static struct spi_driver rb4xx_cpld_driver = { -+ .driver = { -+ .name = DRV_NAME, -+ .bus = &spi_bus_type, -+ .owner = THIS_MODULE, -+ }, -+ .probe = rb4xx_cpld_probe, -+ .remove = rb4xx_cpld_remove, -+}; -+ -+static int __init rb4xx_cpld_init(void) -+{ -+ return spi_register_driver(&rb4xx_cpld_driver); -+} -+module_init(rb4xx_cpld_init); -+ -+static void __exit rb4xx_cpld_exit(void) -+{ -+ spi_unregister_driver(&rb4xx_cpld_driver); -+} -+module_exit(rb4xx_cpld_exit); -+ -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -diff -Nur linux-4.1.13.orig/drivers/spi/spi-vsc7385.c linux-4.1.13/drivers/spi/spi-vsc7385.c ---- linux-4.1.13.orig/drivers/spi/spi-vsc7385.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/drivers/spi/spi-vsc7385.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,621 @@ -+/* -+ * SPI driver for the Vitesse VSC7385 ethernet switch -+ * -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * Parts of this file are based on Atheros' 2.6.15 BSP -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRV_NAME "spi-vsc7385" -+#define DRV_DESC "Vitesse VSC7385 Gbit ethernet switch driver" -+#define DRV_VERSION "0.1.0" -+ -+#define VSC73XX_BLOCK_MAC 0x1 -+#define VSC73XX_BLOCK_2 0x2 -+#define VSC73XX_BLOCK_MII 0x3 -+#define VSC73XX_BLOCK_4 0x4 -+#define VSC73XX_BLOCK_5 0x5 -+#define VSC73XX_BLOCK_SYSTEM 0x7 -+ -+#define VSC73XX_SUBBLOCK_PORT_0 0 -+#define VSC73XX_SUBBLOCK_PORT_1 1 -+#define VSC73XX_SUBBLOCK_PORT_2 2 -+#define VSC73XX_SUBBLOCK_PORT_3 3 -+#define VSC73XX_SUBBLOCK_PORT_4 4 -+#define VSC73XX_SUBBLOCK_PORT_MAC 6 -+ -+/* MAC Block registers */ -+#define VSC73XX_MAC_CFG 0x0 -+#define VSC73XX_ADVPORTM 0x19 -+#define VSC73XX_RXOCT 0x50 -+#define VSC73XX_TXOCT 0x51 -+#define VSC73XX_C_RX0 0x52 -+#define VSC73XX_C_RX1 0x53 -+#define VSC73XX_C_RX2 0x54 -+#define VSC73XX_C_TX0 0x55 -+#define VSC73XX_C_TX1 0x56 -+#define VSC73XX_C_TX2 0x57 -+#define VSC73XX_C_CFG 0x58 -+ -+/* MAC_CFG register bits */ -+#define VSC73XX_MAC_CFG_WEXC_DIS (1 << 31) -+#define VSC73XX_MAC_CFG_PORT_RST (1 << 29) -+#define VSC73XX_MAC_CFG_TX_EN (1 << 28) -+#define VSC73XX_MAC_CFG_SEED_LOAD (1 << 27) -+#define VSC73XX_MAC_CFG_FDX (1 << 18) -+#define VSC73XX_MAC_CFG_GIGE (1 << 17) -+#define VSC73XX_MAC_CFG_RX_EN (1 << 16) -+#define VSC73XX_MAC_CFG_VLAN_DBLAWR (1 << 15) -+#define VSC73XX_MAC_CFG_VLAN_AWR (1 << 14) -+#define VSC73XX_MAC_CFG_100_BASE_T (1 << 13) -+#define VSC73XX_MAC_CFG_TX_IPG(x) (((x) & 0x1f) << 6) -+#define VSC73XX_MAC_CFG_MAC_RX_RST (1 << 5) -+#define VSC73XX_MAC_CFG_MAC_TX_RST (1 << 4) -+#define VSC73XX_MAC_CFG_BIT2 (1 << 2) -+#define VSC73XX_MAC_CFG_CLK_SEL(x) ((x) & 0x3) -+ -+/* ADVPORTM register bits */ -+#define VSC73XX_ADVPORTM_IFG_PPM (1 << 7) -+#define VSC73XX_ADVPORTM_EXC_COL_CONT (1 << 6) -+#define VSC73XX_ADVPORTM_EXT_PORT (1 << 5) -+#define VSC73XX_ADVPORTM_INV_GTX (1 << 4) -+#define VSC73XX_ADVPORTM_ENA_GTX (1 << 3) -+#define VSC73XX_ADVPORTM_DDR_MODE (1 << 2) -+#define VSC73XX_ADVPORTM_IO_LOOPBACK (1 << 1) -+#define VSC73XX_ADVPORTM_HOST_LOOPBACK (1 << 0) -+ -+/* MII Block registers */ -+#define VSC73XX_MII_STAT 0x0 -+#define VSC73XX_MII_CMD 0x1 -+#define VSC73XX_MII_DATA 0x2 -+ -+/* System Block registers */ -+#define VSC73XX_ICPU_SIPAD 0x01 -+#define VSC73XX_ICPU_CLOCK_DELAY 0x05 -+#define VSC73XX_ICPU_CTRL 0x10 -+#define VSC73XX_ICPU_ADDR 0x11 -+#define VSC73XX_ICPU_SRAM 0x12 -+#define VSC73XX_ICPU_MBOX_VAL 0x15 -+#define VSC73XX_ICPU_MBOX_SET 0x16 -+#define VSC73XX_ICPU_MBOX_CLR 0x17 -+#define VSC73XX_ICPU_CHIPID 0x18 -+#define VSC73XX_ICPU_GPIO 0x34 -+ -+#define VSC73XX_ICPU_CTRL_CLK_DIV (1 << 8) -+#define VSC73XX_ICPU_CTRL_SRST_HOLD (1 << 7) -+#define VSC73XX_ICPU_CTRL_BOOT_EN (1 << 3) -+#define VSC73XX_ICPU_CTRL_EXT_ACC_EN (1 << 2) -+#define VSC73XX_ICPU_CTRL_CLK_EN (1 << 1) -+#define VSC73XX_ICPU_CTRL_SRST (1 << 0) -+ -+#define VSC73XX_ICPU_CHIPID_ID_SHIFT 12 -+#define VSC73XX_ICPU_CHIPID_ID_MASK 0xffff -+#define VSC73XX_ICPU_CHIPID_REV_SHIFT 28 -+#define VSC73XX_ICPU_CHIPID_REV_MASK 0xf -+#define VSC73XX_ICPU_CHIPID_ID_7385 0x7385 -+#define VSC73XX_ICPU_CHIPID_ID_7395 0x7395 -+ -+#define VSC73XX_CMD_MODE_READ 0 -+#define VSC73XX_CMD_MODE_WRITE 1 -+#define VSC73XX_CMD_MODE_SHIFT 4 -+#define VSC73XX_CMD_BLOCK_SHIFT 5 -+#define VSC73XX_CMD_BLOCK_MASK 0x7 -+#define VSC73XX_CMD_SUBBLOCK_MASK 0xf -+ -+#define VSC7385_CLOCK_DELAY ((3 << 4) | 3) -+#define VSC7385_CLOCK_DELAY_MASK ((3 << 4) | 3) -+ -+#define VSC73XX_ICPU_CTRL_STOP (VSC73XX_ICPU_CTRL_SRST_HOLD | \ -+ VSC73XX_ICPU_CTRL_BOOT_EN | \ -+ VSC73XX_ICPU_CTRL_EXT_ACC_EN) -+ -+#define VSC73XX_ICPU_CTRL_START (VSC73XX_ICPU_CTRL_CLK_DIV | \ -+ VSC73XX_ICPU_CTRL_BOOT_EN | \ -+ VSC73XX_ICPU_CTRL_CLK_EN | \ -+ VSC73XX_ICPU_CTRL_SRST) -+ -+#define VSC7385_ADVPORTM_MASK (VSC73XX_ADVPORTM_IFG_PPM | \ -+ VSC73XX_ADVPORTM_EXC_COL_CONT | \ -+ VSC73XX_ADVPORTM_EXT_PORT | \ -+ VSC73XX_ADVPORTM_INV_GTX | \ -+ VSC73XX_ADVPORTM_ENA_GTX | \ -+ VSC73XX_ADVPORTM_DDR_MODE | \ -+ VSC73XX_ADVPORTM_IO_LOOPBACK | \ -+ VSC73XX_ADVPORTM_HOST_LOOPBACK) -+ -+#define VSC7385_ADVPORTM_INIT (VSC73XX_ADVPORTM_EXT_PORT | \ -+ VSC73XX_ADVPORTM_ENA_GTX | \ -+ VSC73XX_ADVPORTM_DDR_MODE) -+ -+#define VSC7385_MAC_CFG_RESET (VSC73XX_MAC_CFG_PORT_RST | \ -+ VSC73XX_MAC_CFG_MAC_RX_RST | \ -+ VSC73XX_MAC_CFG_MAC_TX_RST) -+ -+#define VSC73XX_MAC_CFG_INIT (VSC73XX_MAC_CFG_TX_EN | \ -+ VSC73XX_MAC_CFG_FDX | \ -+ VSC73XX_MAC_CFG_GIGE | \ -+ VSC73XX_MAC_CFG_RX_EN) -+ -+#define VSC73XX_RESET_DELAY 100 -+ -+struct vsc7385 { -+ struct spi_device *spi; -+ struct mutex lock; -+ struct vsc7385_platform_data *pdata; -+}; -+ -+static int vsc7385_is_addr_valid(u8 block, u8 subblock) -+{ -+ switch (block) { -+ case VSC73XX_BLOCK_MAC: -+ switch (subblock) { -+ case 0 ... 4: -+ case 6: -+ return 1; -+ } -+ break; -+ -+ case VSC73XX_BLOCK_2: -+ case VSC73XX_BLOCK_SYSTEM: -+ switch (subblock) { -+ case 0: -+ return 1; -+ } -+ break; -+ -+ case VSC73XX_BLOCK_MII: -+ case VSC73XX_BLOCK_4: -+ case VSC73XX_BLOCK_5: -+ switch (subblock) { -+ case 0 ... 1: -+ return 1; -+ } -+ break; -+ } -+ -+ return 0; -+} -+ -+static inline u8 vsc7385_make_addr(u8 mode, u8 block, u8 subblock) -+{ -+ u8 ret; -+ -+ ret = (block & VSC73XX_CMD_BLOCK_MASK) << VSC73XX_CMD_BLOCK_SHIFT; -+ ret |= (mode & 1) << VSC73XX_CMD_MODE_SHIFT; -+ ret |= subblock & VSC73XX_CMD_SUBBLOCK_MASK; -+ -+ return ret; -+} -+ -+static int vsc7385_read(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, -+ u32 *value) -+{ -+ u8 cmd[4]; -+ u8 buf[4]; -+ struct spi_transfer t[2]; -+ struct spi_message m; -+ int err; -+ -+ if (!vsc7385_is_addr_valid(block, subblock)) -+ return -EINVAL; -+ -+ spi_message_init(&m); -+ -+ memset(&t, 0, sizeof(t)); -+ -+ t[0].tx_buf = cmd; -+ t[0].len = sizeof(cmd); -+ spi_message_add_tail(&t[0], &m); -+ -+ t[1].rx_buf = buf; -+ t[1].len = sizeof(buf); -+ spi_message_add_tail(&t[1], &m); -+ -+ cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_READ, block, subblock); -+ cmd[1] = reg; -+ cmd[2] = 0; -+ cmd[3] = 0; -+ -+ mutex_lock(&vsc->lock); -+ err = spi_sync(vsc->spi, &m); -+ mutex_unlock(&vsc->lock); -+ -+ if (err) -+ return err; -+ -+ *value = (((u32) buf[0]) << 24) | (((u32) buf[1]) << 16) | -+ (((u32) buf[2]) << 8) | ((u32) buf[3]); -+ -+ return 0; -+} -+ -+ -+static int vsc7385_write(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, -+ u32 value) -+{ -+ u8 cmd[2]; -+ u8 buf[4]; -+ struct spi_transfer t[2]; -+ struct spi_message m; -+ int err; -+ -+ if (!vsc7385_is_addr_valid(block, subblock)) -+ return -EINVAL; -+ -+ spi_message_init(&m); -+ -+ memset(&t, 0, sizeof(t)); -+ -+ t[0].tx_buf = cmd; -+ t[0].len = sizeof(cmd); -+ spi_message_add_tail(&t[0], &m); -+ -+ t[1].tx_buf = buf; -+ t[1].len = sizeof(buf); -+ spi_message_add_tail(&t[1], &m); -+ -+ cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_WRITE, block, subblock); -+ cmd[1] = reg; -+ -+ buf[0] = (value >> 24) & 0xff; -+ buf[1] = (value >> 16) & 0xff; -+ buf[2] = (value >> 8) & 0xff; -+ buf[3] = value & 0xff; -+ -+ mutex_lock(&vsc->lock); -+ err = spi_sync(vsc->spi, &m); -+ mutex_unlock(&vsc->lock); -+ -+ return err; -+} -+ -+static inline int vsc7385_write_verify(struct vsc7385 *vsc, u8 block, -+ u8 subblock, u8 reg, u32 value, -+ u32 read_mask, u32 read_val) -+{ -+ struct spi_device *spi = vsc->spi; -+ u32 t; -+ int err; -+ -+ err = vsc7385_write(vsc, block, subblock, reg, value); -+ if (err) -+ return err; -+ -+ err = vsc7385_read(vsc, block, subblock, reg, &t); -+ if (err) -+ return err; -+ -+ if ((t & read_mask) != read_val) { -+ dev_err(&spi->dev, "register write error\n"); -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+static inline int vsc7385_set_clock_delay(struct vsc7385 *vsc, u32 val) -+{ -+ return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_CLOCK_DELAY, val); -+} -+ -+static inline int vsc7385_get_clock_delay(struct vsc7385 *vsc, u32 *val) -+{ -+ return vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_CLOCK_DELAY, val); -+} -+ -+static inline int vsc7385_icpu_stop(struct vsc7385 *vsc) -+{ -+ return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, -+ VSC73XX_ICPU_CTRL_STOP); -+} -+ -+static inline int vsc7385_icpu_start(struct vsc7385 *vsc) -+{ -+ return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, -+ VSC73XX_ICPU_CTRL_START); -+} -+ -+static inline int vsc7385_icpu_reset(struct vsc7385 *vsc) -+{ -+ int rc; -+ -+ rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_ADDR, -+ 0x0000); -+ if (rc) -+ dev_err(&vsc->spi->dev, -+ "could not reset microcode, err=%d\n", rc); -+ -+ return rc; -+} -+ -+static int vsc7385_upload_ucode(struct vsc7385 *vsc) -+{ -+ struct spi_device *spi = vsc->spi; -+ const struct firmware *firmware; -+ char *ucode_name; -+ unsigned char *dp; -+ unsigned int curVal; -+ int i; -+ int diffs; -+ int rc; -+ -+ ucode_name = (vsc->pdata->ucode_name) ? vsc->pdata->ucode_name -+ : "vsc7385_ucode.bin"; -+ rc = request_firmware(&firmware, ucode_name, &spi->dev); -+ if (rc) { -+ dev_err(&spi->dev, "request_firmware failed, err=%d\n", -+ rc); -+ return rc; -+ } -+ -+ rc = vsc7385_icpu_stop(vsc); -+ if (rc) -+ goto out; -+ -+ rc = vsc7385_icpu_reset(vsc); -+ if (rc) -+ goto out; -+ -+ dev_info(&spi->dev, "uploading microcode...\n"); -+ -+ dp = (unsigned char *) firmware->data; -+ for (i = 0; i < firmware->size; i++) { -+ rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_SRAM, *dp++); -+ if (rc) { -+ dev_err(&spi->dev, "could not load microcode, err=%d\n", -+ rc); -+ goto out; -+ } -+ } -+ -+ rc = vsc7385_icpu_reset(vsc); -+ if (rc) -+ goto out; -+ -+ dev_info(&spi->dev, "verifying microcode...\n"); -+ -+ dp = (unsigned char *) firmware->data; -+ diffs = 0; -+ for (i = 0; i < firmware->size; i++) { -+ rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_SRAM, &curVal); -+ if (rc) { -+ dev_err(&spi->dev, "could not read microcode %d\n", -+ rc); -+ goto out; -+ } -+ -+ if (curVal > 0xff) { -+ dev_err(&spi->dev, "bad val read: %04x : %02x %02x\n", -+ i, *dp, curVal); -+ rc = -EIO; -+ goto out; -+ } -+ -+ if ((curVal & 0xff) != *dp) { -+ diffs++; -+ dev_err(&spi->dev, "verify error: %04x : %02x %02x\n", -+ i, *dp, curVal); -+ -+ if (diffs > 4) -+ break; -+ } -+ dp++; -+ } -+ -+ if (diffs) { -+ dev_err(&spi->dev, "microcode verification failed\n"); -+ rc = -EIO; -+ goto out; -+ } -+ -+ dev_info(&spi->dev, "microcode uploaded\n"); -+ -+ rc = vsc7385_icpu_start(vsc); -+ -+out: -+ release_firmware(firmware); -+ return rc; -+} -+ -+static int vsc7385_setup(struct vsc7385 *vsc) -+{ -+ struct vsc7385_platform_data *pdata = vsc->pdata; -+ u32 t; -+ int err; -+ -+ err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_CLOCK_DELAY, -+ VSC7385_CLOCK_DELAY, -+ VSC7385_CLOCK_DELAY_MASK, -+ VSC7385_CLOCK_DELAY); -+ if (err) -+ goto err; -+ -+ err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_MAC, -+ VSC73XX_SUBBLOCK_PORT_MAC, VSC73XX_ADVPORTM, -+ VSC7385_ADVPORTM_INIT, -+ VSC7385_ADVPORTM_MASK, -+ VSC7385_ADVPORTM_INIT); -+ if (err) -+ goto err; -+ -+ err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, -+ VSC73XX_MAC_CFG, VSC7385_MAC_CFG_RESET); -+ if (err) -+ goto err; -+ -+ t = VSC73XX_MAC_CFG_INIT; -+ t |= VSC73XX_MAC_CFG_TX_IPG(pdata->mac_cfg.tx_ipg); -+ t |= VSC73XX_MAC_CFG_CLK_SEL(pdata->mac_cfg.clk_sel); -+ if (pdata->mac_cfg.bit2) -+ t |= VSC73XX_MAC_CFG_BIT2; -+ -+ err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, -+ VSC73XX_MAC_CFG, t); -+ if (err) -+ goto err; -+ -+ return 0; -+ -+err: -+ return err; -+} -+ -+static int vsc7385_detect(struct vsc7385 *vsc) -+{ -+ struct spi_device *spi = vsc->spi; -+ u32 t; -+ u32 id; -+ u32 rev; -+ int err; -+ -+ err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_MBOX_VAL, &t); -+ if (err) { -+ dev_err(&spi->dev, "unable to read mailbox, err=%d\n", err); -+ return err; -+ } -+ -+ if (t == 0xffffffff) { -+ dev_dbg(&spi->dev, "assert chip reset\n"); -+ if (vsc->pdata->reset) -+ vsc->pdata->reset(); -+ -+ } -+ -+ err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, -+ VSC73XX_ICPU_CHIPID, &t); -+ if (err) { -+ dev_err(&spi->dev, "unable to read chip id, err=%d\n", err); -+ return err; -+ } -+ -+ id = (t >> VSC73XX_ICPU_CHIPID_ID_SHIFT) & VSC73XX_ICPU_CHIPID_ID_MASK; -+ switch (id) { -+ case VSC73XX_ICPU_CHIPID_ID_7385: -+ case VSC73XX_ICPU_CHIPID_ID_7395: -+ break; -+ default: -+ dev_err(&spi->dev, "unsupported chip, id=%04x\n", id); -+ return -ENODEV; -+ } -+ -+ rev = (t >> VSC73XX_ICPU_CHIPID_REV_SHIFT) & -+ VSC73XX_ICPU_CHIPID_REV_MASK; -+ dev_info(&spi->dev, "VSC%04X (rev. %d) switch found\n", id, rev); -+ -+ return 0; -+} -+ -+static int vsc7385_probe(struct spi_device *spi) -+{ -+ struct vsc7385 *vsc; -+ struct vsc7385_platform_data *pdata; -+ int err; -+ -+ printk(KERN_INFO DRV_DESC " version " DRV_VERSION"\n"); -+ -+ pdata = spi->dev.platform_data; -+ if (!pdata) { -+ dev_err(&spi->dev, "no platform data specified\n"); -+ return -ENODEV; -+ } -+ -+ vsc = kzalloc(sizeof(*vsc), GFP_KERNEL); -+ if (!vsc) { -+ dev_err(&spi->dev, "no memory for private data\n"); -+ return -ENOMEM; -+ } -+ -+ mutex_init(&vsc->lock); -+ vsc->pdata = pdata; -+ vsc->spi = spi_dev_get(spi); -+ dev_set_drvdata(&spi->dev, vsc); -+ -+ spi->mode = SPI_MODE_0; -+ spi->bits_per_word = 8; -+ err = spi_setup(spi); -+ if (err) { -+ dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); -+ goto err_drvdata; -+ } -+ -+ err = vsc7385_detect(vsc); -+ if (err) { -+ dev_err(&spi->dev, "no chip found, err=%d\n", err); -+ goto err_drvdata; -+ } -+ -+ err = vsc7385_upload_ucode(vsc); -+ if (err) -+ goto err_drvdata; -+ -+ err = vsc7385_setup(vsc); -+ if (err) -+ goto err_drvdata; -+ -+ return 0; -+ -+err_drvdata: -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(vsc); -+ return err; -+} -+ -+static int vsc7385_remove(struct spi_device *spi) -+{ -+ struct vsc7385_data *vsc; -+ -+ vsc = dev_get_drvdata(&spi->dev); -+ dev_set_drvdata(&spi->dev, NULL); -+ kfree(vsc); -+ -+ return 0; -+} -+ -+static struct spi_driver vsc7385_driver = { -+ .driver = { -+ .name = DRV_NAME, -+ .bus = &spi_bus_type, -+ .owner = THIS_MODULE, -+ }, -+ .probe = vsc7385_probe, -+ .remove = vsc7385_remove, -+}; -+ -+static int __init vsc7385_init(void) -+{ -+ return spi_register_driver(&vsc7385_driver); -+} -+module_init(vsc7385_init); -+ -+static void __exit vsc7385_exit(void) -+{ -+ spi_unregister_driver(&vsc7385_driver); -+} -+module_exit(vsc7385_exit); -+ -+MODULE_DESCRIPTION(DRV_DESC); -+MODULE_VERSION(DRV_VERSION); -+MODULE_AUTHOR("Gabor Juhos "); -+MODULE_LICENSE("GPL v2"); -+ -diff -Nur linux-4.1.13.orig/drivers/tty/serial/serial_core.c linux-4.1.13/drivers/tty/serial/serial_core.c ---- linux-4.1.13.orig/drivers/tty/serial/serial_core.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/tty/serial/serial_core.c 2015-12-04 19:57:05.897979014 +0100 -@@ -164,6 +164,8 @@ - if (retval == 0) { - if (uart_console(uport) && uport->cons->cflag) { - tty->termios.c_cflag = uport->cons->cflag; -+ tty->termios.c_ospeed = uport->cons->baud; -+ tty->termios.c_ispeed = uport->cons->baud; - uport->cons->cflag = 0; - } - /* -@@ -1901,7 +1903,7 @@ - { 4800, B4800 }, - { 2400, B2400 }, - { 1200, B1200 }, -- { 0, B38400 } -+ { 0, BOTHER } - }; - - /** -@@ -1940,10 +1942,13 @@ - * Construct a cflag setting. - */ - for (i = 0; baud_rates[i].rate; i++) -- if (baud_rates[i].rate <= baud) -+ if (baud_rates[i].rate == baud) - break; - - termios.c_cflag |= baud_rates[i].cflag; -+ if (!baud_rates[i].rate) { -+ termios.c_ospeed = baud; -+ } - - if (bits == 7) - termios.c_cflag |= CS7; -@@ -1973,8 +1978,10 @@ - * Allow the setting of the UART parameters with a NULL console - * too: - */ -- if (co) -+ if (co) { - co->cflag = termios.c_cflag; -+ co->baud = baud; -+ } - - return 0; - } -diff -Nur linux-4.1.13.orig/drivers/usb/host/ehci-hcd.c linux-4.1.13/drivers/usb/host/ehci-hcd.c ---- linux-4.1.13.orig/drivers/usb/host/ehci-hcd.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/usb/host/ehci-hcd.c 2015-12-04 19:57:03.974104886 +0100 -@@ -252,6 +252,37 @@ - command |= CMD_RESET; - dbg_cmd (ehci, "reset", command); - ehci_writel(ehci, command, &ehci->regs->command); -+ -+ if (ehci->qca_force_host_mode) { -+ u32 usbmode; -+ -+ udelay(1000); -+ -+ usbmode = ehci_readl(ehci, &ehci->regs->usbmode); -+ usbmode |= USBMODE_CM_HC | (1 << 4); -+ ehci_writel(ehci, usbmode, &ehci->regs->usbmode); -+ -+ ehci_dbg(ehci, "forced host mode, usbmode: %08x\n", -+ ehci_readl(ehci, &ehci->regs->usbmode)); -+ } -+ -+ if (ehci->qca_force_16bit_ptw) { -+ u32 port_status; -+ -+ udelay(1000); -+ -+ /* enable 16-bit UTMI interface */ -+ port_status = ehci_readl(ehci, &ehci->regs->port_status[0]); -+ port_status |= BIT(28); -+ ehci_writel(ehci, port_status, &ehci->regs->port_status[0]); -+ -+ ehci_dbg(ehci, "16-bit UTMI interface enabled, status: %08x\n", -+ ehci_readl(ehci, &ehci->regs->port_status[0])); -+ } -+ -+ if (ehci->reset_notifier) -+ ehci->reset_notifier(ehci_to_hcd(ehci)); -+ - ehci->rh_state = EHCI_RH_HALTED; - ehci->next_statechange = jiffies; - retval = ehci_handshake(ehci, &ehci->regs->command, -diff -Nur linux-4.1.13.orig/drivers/usb/host/ehci-platform.c linux-4.1.13/drivers/usb/host/ehci-platform.c ---- linux-4.1.13.orig/drivers/usb/host/ehci-platform.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/usb/host/ehci-platform.c 2015-12-04 19:57:03.978104624 +0100 -@@ -49,6 +49,14 @@ - - static const char hcd_name[] = "ehci-platform"; - -+static void ehci_platform_reset_notifier(struct usb_hcd *hcd) -+{ -+ struct platform_device *pdev = to_platform_device(hcd->self.controller); -+ struct usb_ehci_pdata *pdata = pdev->dev.platform_data; -+ -+ pdata->reset_notifier(pdev); -+} -+ - static int ehci_platform_reset(struct usb_hcd *hcd) - { - struct platform_device *pdev = to_platform_device(hcd->self.controller); -diff -Nur linux-4.1.13.orig/drivers/watchdog/ath79_wdt.c linux-4.1.13/drivers/watchdog/ath79_wdt.c ---- linux-4.1.13.orig/drivers/watchdog/ath79_wdt.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/drivers/watchdog/ath79_wdt.c 2015-12-04 19:57:04.398077147 +0100 -@@ -114,10 +114,14 @@ - - static int ath79_wdt_set_timeout(int val) - { -- if (val < 1 || val > max_timeout) -+ if (val < 1) - return -EINVAL; - -- timeout = val; -+ if (val > max_timeout) -+ timeout = max_timeout; -+ else -+ timeout = val; -+ - ath79_wdt_keepalive(); - - return 0; -diff -Nur linux-4.1.13.orig/include/linux/console.h linux-4.1.13/include/linux/console.h ---- linux-4.1.13.orig/include/linux/console.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/console.h 2015-12-04 19:57:05.901978752 +0100 -@@ -127,6 +127,7 @@ - short flags; - short index; - int cflag; -+ int baud; - void *data; - struct console *next; - }; -diff -Nur linux-4.1.13.orig/include/linux/ipv6.h linux-4.1.13/include/linux/ipv6.h ---- linux-4.1.13.orig/include/linux/ipv6.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/ipv6.h 2015-12-04 19:57:05.917977705 +0100 -@@ -5,6 +5,7 @@ - - #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) - #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) -+ - /* - * This structure contains configuration options per IPv6 link. - */ -diff -Nur linux-4.1.13.orig/include/linux/mtd/physmap.h linux-4.1.13/include/linux/mtd/physmap.h ---- linux-4.1.13.orig/include/linux/mtd/physmap.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/mtd/physmap.h 2015-12-04 19:57:03.830114307 +0100 -@@ -25,6 +25,8 @@ - unsigned int width; - int (*init)(struct platform_device *); - void (*exit)(struct platform_device *); -+ void (*lock)(struct platform_device *); -+ void (*unlock)(struct platform_device *); - void (*set_vpp)(struct platform_device *, int); - unsigned int nr_parts; - unsigned int pfow_base; -diff -Nur linux-4.1.13.orig/include/linux/myloader.h linux-4.1.13/include/linux/myloader.h ---- linux-4.1.13.orig/include/linux/myloader.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/myloader.h 2015-12-04 20:10:00.684874021 +0100 -@@ -0,0 +1,121 @@ -+/* -+ * Compex's MyLoader specific definitions -+ * -+ * Copyright (C) 2006-2008 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ * -+ */ -+ -+#ifndef _MYLOADER_H_ -+#define _MYLOADER_H_ -+ -+/* Myloader specific magic numbers */ -+#define MYLO_MAGIC_SYS_PARAMS 0x20021107 -+#define MYLO_MAGIC_PARTITIONS 0x20021103 -+#define MYLO_MAGIC_BOARD_PARAMS 0x20021103 -+ -+/* Vendor ID's (seems to be same as the PCI vendor ID's) */ -+#define VENID_COMPEX 0x11F6 -+ -+/* Devices based on the ADM5120 */ -+#define DEVID_COMPEX_NP27G 0x0078 -+#define DEVID_COMPEX_NP28G 0x044C -+#define DEVID_COMPEX_NP28GHS 0x044E -+#define DEVID_COMPEX_WP54Gv1C 0x0514 -+#define DEVID_COMPEX_WP54G 0x0515 -+#define DEVID_COMPEX_WP54AG 0x0546 -+#define DEVID_COMPEX_WPP54AG 0x0550 -+#define DEVID_COMPEX_WPP54G 0x0555 -+ -+/* Devices based on the Atheros AR2317 */ -+#define DEVID_COMPEX_NP25G 0x05E6 -+#define DEVID_COMPEX_WPE53G 0x05DC -+ -+/* Devices based on the Atheros AR71xx */ -+#define DEVID_COMPEX_WP543 0x0640 -+#define DEVID_COMPEX_WPE72 0x0672 -+ -+/* Devices based on the IXP422 */ -+#define DEVID_COMPEX_WP18 0x047E -+#define DEVID_COMPEX_NP18A 0x0489 -+ -+/* Other devices */ -+#define DEVID_COMPEX_NP26G8M 0x03E8 -+#define DEVID_COMPEX_NP26G16M 0x03E9 -+ -+struct mylo_partition { -+ uint16_t flags; /* partition flags */ -+ uint16_t type; /* type of the partition */ -+ uint32_t addr; /* relative address of the partition from the -+ flash start */ -+ uint32_t size; /* size of the partition in bytes */ -+ uint32_t param; /* if this is the active partition, the -+ MyLoader load code to this address */ -+}; -+ -+#define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition, -+ * MyLoader loads firmware from here */ -+#define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */ -+#define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */ -+#define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM -+ * before decompression */ -+#define PARTITION_FLAG_LZMA 0x0100 /* partition data compressed by LZMA */ -+#define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */ -+ -+#define PARTITION_TYPE_FREE 0 -+#define PARTITION_TYPE_USED 1 -+ -+#define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the -+ partition table */ -+ -+struct mylo_partition_table { -+ uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */ -+ uint32_t res0; /* unknown/unused */ -+ uint32_t res1; /* unknown/unused */ -+ uint32_t res2; /* unknown/unused */ -+ struct mylo_partition partitions[MYLO_MAX_PARTITIONS]; -+}; -+ -+struct mylo_partition_header { -+ uint32_t len; /* length of the partition data */ -+ uint32_t crc; /* CRC value of the partition data */ -+}; -+ -+struct mylo_system_params { -+ uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */ -+ uint32_t res0; -+ uint32_t res1; -+ uint32_t mylo_ver; -+ uint16_t vid; /* Vendor ID */ -+ uint16_t did; /* Device ID */ -+ uint16_t svid; /* Sub Vendor ID */ -+ uint16_t sdid; /* Sub Device ID */ -+ uint32_t rev; /* device revision */ -+ uint32_t fwhi; -+ uint32_t fwlo; -+ uint32_t tftp_addr; -+ uint32_t prog_start; -+ uint32_t flash_size; /* size of boot FLASH in bytes */ -+ uint32_t dram_size; /* size of onboard RAM in bytes */ -+}; -+ -+struct mylo_eth_addr { -+ uint8_t mac[6]; -+ uint8_t csum[2]; -+}; -+ -+#define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address -+ in the board parameters */ -+ -+struct mylo_board_params { -+ uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */ -+ uint32_t res0; -+ uint32_t res1; -+ uint32_t res2; -+ struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT]; -+}; -+ -+#endif /* _MYLOADER_H_*/ -diff -Nur linux-4.1.13.orig/include/linux/nxp_74hc153.h linux-4.1.13/include/linux/nxp_74hc153.h ---- linux-4.1.13.orig/include/linux/nxp_74hc153.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/nxp_74hc153.h 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,24 @@ -+/* -+ * NXP 74HC153 - Dual 4-input multiplexer defines -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _NXP_74HC153_H -+#define _NXP_74HC153_H -+ -+#define NXP_74HC153_DRIVER_NAME "nxp-74hc153" -+ -+struct nxp_74hc153_platform_data { -+ unsigned gpio_base; -+ unsigned gpio_pin_s0; -+ unsigned gpio_pin_s1; -+ unsigned gpio_pin_1y; -+ unsigned gpio_pin_2y; -+}; -+ -+#endif /* _NXP_74HC153_H */ -diff -Nur linux-4.1.13.orig/include/linux/phy.h linux-4.1.13/include/linux/phy.h ---- linux-4.1.13.orig/include/linux/phy.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/phy.h 2015-12-04 20:31:10.916990579 +0100 -@@ -762,6 +762,7 @@ - void phy_stop_machine(struct phy_device *phydev); - int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); - int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); -+int phy_ethtool_ioctl(struct phy_device *phydev, void *useraddr); - int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); - int phy_start_interrupts(struct phy_device *phydev); - void phy_print_status(struct phy_device *phydev); -diff -Nur linux-4.1.13.orig/include/linux/platform/ar934x_nfc.h linux-4.1.13/include/linux/platform/ar934x_nfc.h ---- linux-4.1.13.orig/include/linux/platform/ar934x_nfc.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/platform/ar934x_nfc.h 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,39 @@ -+/* -+ * Platform data definition for the built-in NAND controller of the -+ * Atheros AR934x SoCs -+ * -+ * Copyright (C) 2011-2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef _AR934X_NFC_PLATFORM_H -+#define _AR934X_NFC_PLATFORM_H -+ -+#define AR934X_NFC_DRIVER_NAME "ar934x-nfc" -+ -+struct mtd_info; -+struct mtd_partition; -+ -+enum ar934x_nfc_ecc_mode { -+ AR934X_NFC_ECC_SOFT = 0, -+ AR934X_NFC_ECC_HW, -+ AR934X_NFC_ECC_SOFT_BCH, -+}; -+ -+struct ar934x_nfc_platform_data { -+ const char *name; -+ struct mtd_partition *parts; -+ int nr_parts; -+ -+ bool swap_dma; -+ enum ar934x_nfc_ecc_mode ecc_mode; -+ -+ void (*hw_reset)(bool active); -+ void (*select_chip)(int chip_no); -+ int (*scan_fixup)(struct mtd_info *mtd); -+}; -+ -+#endif /* _AR934X_NFC_PLATFORM_H */ -diff -Nur linux-4.1.13.orig/include/linux/platform_data/gpio-latch.h linux-4.1.13/include/linux/platform_data/gpio-latch.h ---- linux-4.1.13.orig/include/linux/platform_data/gpio-latch.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/platform_data/gpio-latch.h 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,14 @@ -+#ifndef _GPIO_LATCH_H_ -+#define _GPIO_LATCH_H_ -+ -+#define GPIO_LATCH_DRIVER_NAME "gpio-latch" -+ -+struct gpio_latch_platform_data { -+ int base; -+ int num_gpios; -+ int *gpios; -+ int le_gpio_index; -+ bool le_active_low; -+}; -+ -+#endif /* _GPIO_LATCH_H_ */ -diff -Nur linux-4.1.13.orig/include/linux/platform_data/phy-at803x.h linux-4.1.13/include/linux/platform_data/phy-at803x.h ---- linux-4.1.13.orig/include/linux/platform_data/phy-at803x.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/platform_data/phy-at803x.h 2015-12-04 19:57:03.890110382 +0100 -@@ -0,0 +1,11 @@ -+#ifndef _PHY_AT803X_PDATA_H -+#define _PHY_AT803X_PDATA_H -+ -+struct at803x_platform_data { -+ int disable_smarteee:1; -+ int enable_rgmii_tx_delay:1; -+ int enable_rgmii_rx_delay:1; -+ int fixup_rgmii_tx_delay:1; -+}; -+ -+#endif /* _PHY_AT803X_PDATA_H */ -diff -Nur linux-4.1.13.orig/include/linux/platform_data/rb91x_nand.h linux-4.1.13/include/linux/platform_data/rb91x_nand.h ---- linux-4.1.13.orig/include/linux/platform_data/rb91x_nand.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/platform_data/rb91x_nand.h 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,16 @@ -+#ifndef _RB91X_NAND_H_ -+#define _RB91X_NAND_H_ -+ -+#define RB91X_NAND_DRIVER_NAME "rb91x-nand" -+ -+struct rb91x_nand_platform_data { -+ int gpio_nce; /* chip enable, active low */ -+ int gpio_ale; /* address latch enable */ -+ int gpio_cle; /* command latch enable */ -+ int gpio_rdy; -+ int gpio_read; -+ int gpio_nrw; /* read/write enable, active low */ -+ int gpio_nle; /* latch enable, active low */ -+}; -+ -+#endif /* _RB91X_NAND_H_ */ -\ No newline at end of file -diff -Nur linux-4.1.13.orig/include/linux/rle.h linux-4.1.13/include/linux/rle.h ---- linux-4.1.13.orig/include/linux/rle.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/rle.h 2015-12-04 19:57:03.830114307 +0100 -@@ -0,0 +1,18 @@ -+#ifndef _RLE_H_ -+#define _RLE_H_ -+ -+#ifdef CONFIG_RLE_DECOMPRESS -+int rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done); -+#else -+static inline int -+rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done) -+{ -+ return -ENOTSUPP; -+} -+#endif /* CONFIG_RLE_DECOMPRESS */ -+ -+#endif /* _RLE_H_ */ -diff -Nur linux-4.1.13.orig/include/linux/spi/74x164.h linux-4.1.13/include/linux/spi/74x164.h ---- linux-4.1.13.orig/include/linux/spi/74x164.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/spi/74x164.h 2015-12-04 19:57:03.930107765 +0100 -@@ -0,0 +1,13 @@ -+#ifndef LINUX_SPI_74X164_H -+#define LINUX_SPI_74X164_H -+ -+struct gen_74x164_chip_platform_data { -+ /* number assigned to the first GPIO */ -+ unsigned base; -+ /* number of chained registers */ -+ unsigned num_registers; -+ /* address of a buffer containing initial data */ -+ u8 *init_data; -+}; -+ -+#endif -diff -Nur linux-4.1.13.orig/include/linux/spi/flash.h linux-4.1.13/include/linux/spi/flash.h ---- linux-4.1.13.orig/include/linux/spi/flash.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/spi/flash.h 2015-12-04 19:57:03.854112737 +0100 -@@ -24,6 +24,7 @@ - unsigned int nr_parts; - - char *type; -+ const char **part_probes; - - /* we'll likely add more ... use JEDEC IDs, etc */ - }; -diff -Nur linux-4.1.13.orig/include/linux/spi/spi_bitbang.h linux-4.1.13/include/linux/spi/spi_bitbang.h ---- linux-4.1.13.orig/include/linux/spi/spi_bitbang.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/spi/spi_bitbang.h 2015-12-04 19:57:03.934107503 +0100 -@@ -39,6 +39,7 @@ - extern void spi_bitbang_cleanup(struct spi_device *spi); - extern int spi_bitbang_setup_transfer(struct spi_device *spi, - struct spi_transfer *t); -+extern int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t); - - /* start or stop queue processing */ - extern int spi_bitbang_start(struct spi_bitbang *spi); -diff -Nur linux-4.1.13.orig/include/linux/spi/spi.h linux-4.1.13/include/linux/spi/spi.h ---- linux-4.1.13.orig/include/linux/spi/spi.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/spi/spi.h 2015-12-04 19:57:03.966105410 +0100 -@@ -506,6 +506,12 @@ - - /*---------------------------------------------------------------------------*/ - -+enum spi_transfer_type { -+ SPI_TRANSFER_GENERIC = 0, -+ SPI_TRANSFER_FLASH_READ_CMD, -+ SPI_TRANSFER_FLASH_READ_DATA, -+}; -+ - /* - * I/O INTERFACE between SPI controller and protocol drivers - * -@@ -618,12 +624,16 @@ - unsigned cs_change:1; - unsigned tx_nbits:3; - unsigned rx_nbits:3; -+ unsigned verify:1; -+ unsigned fast_write:1; - #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ - #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ - #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ - u8 bits_per_word; - u16 delay_usecs; - u32 speed_hz; -+ enum spi_transfer_type type; -+ bool dummy; - - struct list_head transfer_list; - }; -@@ -663,6 +673,7 @@ - struct spi_device *spi; - - unsigned is_dma_mapped:1; -+ unsigned fast_read:1; - - /* REVISIT: we might want a flag affecting the behavior of the - * last transfer ... allowing things like "read 16 bit length L" -diff -Nur linux-4.1.13.orig/include/linux/spi/vsc7385.h linux-4.1.13/include/linux/spi/vsc7385.h ---- linux-4.1.13.orig/include/linux/spi/vsc7385.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/spi/vsc7385.h 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,19 @@ -+/* -+ * Platform data definition for the Vitesse VSC7385 ethernet switch driver -+ * -+ * Copyright (C) 2009 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+struct vsc7385_platform_data { -+ void (*reset)(void); -+ char *ucode_name; -+ struct { -+ u32 tx_ipg:5; -+ u32 bit2:1; -+ u32 clk_sel:3; -+ } mac_cfg; -+}; -diff -Nur linux-4.1.13.orig/include/linux/switch.h linux-4.1.13/include/linux/switch.h ---- linux-4.1.13.orig/include/linux/switch.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/linux/switch.h 2015-12-04 20:52:15.735681740 +0100 -@@ -0,0 +1,169 @@ -+/* -+ * switch.h: Switch configuration API -+ * -+ * Copyright (C) 2008 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#ifndef _LINUX_SWITCH_H -+#define _LINUX_SWITCH_H -+ -+#include -+#include -+ -+struct switch_dev; -+struct switch_op; -+struct switch_val; -+struct switch_attr; -+struct switch_attrlist; -+struct switch_led_trigger; -+ -+int register_switch(struct switch_dev *dev, struct net_device *netdev); -+void unregister_switch(struct switch_dev *dev); -+ -+/** -+ * struct switch_attrlist - attribute list -+ * -+ * @n_attr: number of attributes -+ * @attr: pointer to the attributes array -+ */ -+struct switch_attrlist { -+ int n_attr; -+ const struct switch_attr *attr; -+}; -+ -+enum switch_port_speed { -+ SWITCH_PORT_SPEED_UNKNOWN = 0, -+ SWITCH_PORT_SPEED_10 = 10, -+ SWITCH_PORT_SPEED_100 = 100, -+ SWITCH_PORT_SPEED_1000 = 1000, -+}; -+ -+struct switch_port_link { -+ bool link; -+ bool duplex; -+ bool aneg; -+ bool tx_flow; -+ bool rx_flow; -+ enum switch_port_speed speed; -+ /* in ethtool adv_t format */ -+ u32 eee; -+}; -+ -+struct switch_port_stats { -+ unsigned long tx_bytes; -+ unsigned long rx_bytes; -+}; -+ -+/** -+ * struct switch_dev_ops - switch driver operations -+ * -+ * @attr_global: global switch attribute list -+ * @attr_port: port attribute list -+ * @attr_vlan: vlan attribute list -+ * -+ * Callbacks: -+ * -+ * @get_vlan_ports: read the port list of a VLAN -+ * @set_vlan_ports: set the port list of a VLAN -+ * -+ * @get_port_pvid: get the primary VLAN ID of a port -+ * @set_port_pvid: set the primary VLAN ID of a port -+ * -+ * @apply_config: apply all changed settings to the switch -+ * @reset_switch: resetting the switch -+ */ -+struct switch_dev_ops { -+ struct switch_attrlist attr_global, attr_port, attr_vlan; -+ -+ int (*get_vlan_ports)(struct switch_dev *dev, struct switch_val *val); -+ int (*set_vlan_ports)(struct switch_dev *dev, struct switch_val *val); -+ -+ int (*get_port_pvid)(struct switch_dev *dev, int port, int *val); -+ int (*set_port_pvid)(struct switch_dev *dev, int port, int val); -+ -+ int (*apply_config)(struct switch_dev *dev); -+ int (*reset_switch)(struct switch_dev *dev); -+ -+ int (*get_port_link)(struct switch_dev *dev, int port, -+ struct switch_port_link *link); -+ int (*get_port_stats)(struct switch_dev *dev, int port, -+ struct switch_port_stats *stats); -+}; -+ -+struct switch_dev { -+ struct device_node *of_node; -+ const struct switch_dev_ops *ops; -+ /* will be automatically filled */ -+ char devname[IFNAMSIZ]; -+ -+ const char *name; -+ /* NB: either alias or netdev must be set */ -+ const char *alias; -+ struct net_device *netdev; -+ -+ int ports; -+ int vlans; -+ int cpu_port; -+ -+ /* the following fields are internal for swconfig */ -+ int id; -+ struct list_head dev_list; -+ unsigned long def_global, def_port, def_vlan; -+ -+ struct mutex sw_mutex; -+ struct switch_port *portbuf; -+ struct switch_portmap *portmap; -+ -+ char buf[128]; -+ -+#ifdef CONFIG_SWCONFIG_LEDS -+ struct switch_led_trigger *led_trigger; -+#endif -+}; -+ -+struct switch_port { -+ u32 id; -+ u32 flags; -+}; -+ -+struct switch_portmap { -+ u32 virt; -+ const char *s; -+}; -+ -+struct switch_val { -+ const struct switch_attr *attr; -+ int port_vlan; -+ int len; -+ union { -+ const char *s; -+ u32 i; -+ struct switch_port *ports; -+ } value; -+}; -+ -+struct switch_attr { -+ int disabled; -+ int type; -+ const char *name; -+ const char *description; -+ -+ int (*set)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val); -+ int (*get)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val); -+ -+ /* for driver internal use */ -+ int id; -+ int ofs; -+ int max; -+}; -+ -+#endif /* _LINUX_SWITCH_H */ -diff -Nur linux-4.1.13.orig/include/linux/types.h linux-4.1.13/include/linux/types.h ---- linux-4.1.13.orig/include/linux/types.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/types.h 2015-12-04 19:57:05.925977182 +0100 -@@ -215,5 +215,11 @@ - /* clocksource cycle base type */ - typedef u64 cycle_t; - -+struct net_hdr_word { -+ u32 words[1]; -+} __attribute__((packed, aligned(2))); -+ -+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) -+ - #endif /* __ASSEMBLY__ */ - #endif /* _LINUX_TYPES_H */ -diff -Nur linux-4.1.13.orig/include/linux/usb/ehci_pdriver.h linux-4.1.13/include/linux/usb/ehci_pdriver.h ---- linux-4.1.13.orig/include/linux/usb/ehci_pdriver.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/linux/usb/ehci_pdriver.h 2015-12-04 20:18:56.085517295 +0100 -@@ -49,6 +49,8 @@ - unsigned no_io_watchdog:1; - unsigned reset_on_resume:1; - unsigned dma_mask_64:1; -+ unsigned qca_force_host_mode:1; -+ unsigned qca_force_16bit_ptw:1; - - /* Turn on all power and clocks */ - int (*power_on)(struct platform_device *pdev); -@@ -58,6 +60,7 @@ - * turn off everything else */ - void (*power_suspend)(struct platform_device *pdev); - int (*pre_setup)(struct usb_hcd *hcd); -+ void (*reset_notifier)(struct platform_device *pdev); - }; - - #endif /* __USB_CORE_EHCI_PDRIVER_H */ -diff -Nur linux-4.1.13.orig/include/net/addrconf.h linux-4.1.13/include/net/addrconf.h ---- linux-4.1.13.orig/include/net/addrconf.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/net/addrconf.h 2015-12-04 19:57:05.929976920 +0100 -@@ -43,7 +43,7 @@ - __be32 reserved2; - - struct in6_addr prefix; --}; -+} __attribute__((packed, aligned(2))); - - - #include -diff -Nur linux-4.1.13.orig/include/net/inet_ecn.h linux-4.1.13/include/net/inet_ecn.h ---- linux-4.1.13.orig/include/net/inet_ecn.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/net/inet_ecn.h 2015-12-04 19:57:05.929976920 +0100 -@@ -115,13 +115,13 @@ - { - if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) - return 0; -- *(__be32*)iph |= htonl(INET_ECN_CE << 20); -+ net_hdr_word(iph) |= htonl(INET_ECN_CE << 20); - return 1; - } - - static inline void IP6_ECN_clear(struct ipv6hdr *iph) - { -- *(__be32*)iph &= ~htonl(INET_ECN_MASK << 20); -+ net_hdr_word(iph) &= ~htonl(INET_ECN_MASK << 20); - } - - static inline void ipv6_copy_dscp(unsigned int dscp, struct ipv6hdr *inner) -diff -Nur linux-4.1.13.orig/include/net/ipv6.h linux-4.1.13/include/net/ipv6.h ---- linux-4.1.13.orig/include/net/ipv6.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/net/ipv6.h 2015-12-04 19:57:05.929976920 +0100 -@@ -107,7 +107,7 @@ - __u8 reserved; - __be16 frag_off; - __be32 identification; --}; -+} __attribute__((packed, aligned(2))); - - #define IP6_MF 0x0001 - #define IP6_OFFSET 0xFFF8 -@@ -396,8 +396,8 @@ - } - #endif - #endif -- addr[0] = wh; -- addr[1] = wl; -+ net_hdr_word(&addr[0]) = wh; -+ net_hdr_word(&addr[1]) = wl; - } - - static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -456,6 +456,8 @@ - const __be32 *a1 = addr1->s6_addr32; - const __be32 *a2 = addr2->s6_addr32; - unsigned int pdw, pbi; -+ /* Used for last <32-bit fraction of prefix */ -+ u32 pbia1, pbia2; - - /* check complete u32 in prefix */ - pdw = prefixlen >> 5; -@@ -464,7 +466,9 @@ - - /* check incomplete u32 in prefix */ - pbi = prefixlen & 0x1f; -- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) -+ pbia1 = net_hdr_word(&a1[pdw]); -+ pbia2 = net_hdr_word(&a2[pdw]); -+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) - return false; - - return true; -@@ -607,13 +611,13 @@ - */ - static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) - { -- const __be32 *a1 = token1, *a2 = token2; -+ const struct in6_addr *a1 = token1, *a2 = token2; - int i; - - addrlen >>= 2; - - for (i = 0; i < addrlen; i++) { -- __be32 xb = a1[i] ^ a2[i]; -+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; - if (xb) - return i * 32 + 31 - __fls(ntohl(xb)); - } -@@ -739,17 +743,18 @@ - static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, - __be32 flowlabel) - { -- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; -+ net_hdr_word((__be32 *)hdr) = -+ htonl(0x60000000 | (tclass << 20)) | flowlabel; - } - - static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; - } - - static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; - } - - static inline u8 ip6_tclass(__be32 flowinfo) -diff -Nur linux-4.1.13.orig/include/net/ndisc.h linux-4.1.13/include/net/ndisc.h ---- linux-4.1.13.orig/include/net/ndisc.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/net/ndisc.h 2015-12-04 19:57:05.929976920 +0100 -@@ -76,7 +76,7 @@ - struct icmp6hdr icmph; - __be32 reachable_time; - __be32 retrans_timer; --}; -+} __attribute__((packed, aligned(2))); - - struct rd_msg { - struct icmp6hdr icmph; -@@ -148,10 +148,10 @@ - { - const u32 *p32 = pkey; - -- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + -- (p32[1] * hash_rnd[1]) + -- (p32[2] * hash_rnd[2]) + -- (p32[3] * hash_rnd[3])); -+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + -+ (net_hdr_word(&p32[1]) * hash_rnd[1]) + -+ (net_hdr_word(&p32[2]) * hash_rnd[2]) + -+ (net_hdr_word(&p32[3]) * hash_rnd[3])); - } - - static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) -diff -Nur linux-4.1.13.orig/include/net/neighbour.h linux-4.1.13/include/net/neighbour.h ---- linux-4.1.13.orig/include/net/neighbour.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/net/neighbour.h 2015-12-04 19:57:05.933976659 +0100 -@@ -262,8 +262,10 @@ - const u32 *n32 = (const u32 *)n->primary_key; - const u32 *p32 = pkey; - -- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | -- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; -+ return ((n32[0] ^ net_hdr_word(&p32[0])) | -+ (n32[1] ^ net_hdr_word(&p32[1])) | -+ (n32[2] ^ net_hdr_word(&p32[2])) | -+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; - } - - static inline struct neighbour *___neigh_lookup_noref( -diff -Nur linux-4.1.13.orig/include/net/secure_seq.h linux-4.1.13/include/net/secure_seq.h ---- linux-4.1.13.orig/include/net/secure_seq.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/net/secure_seq.h 2015-12-04 19:57:05.929976920 +0100 -@@ -2,6 +2,7 @@ - #define _NET_SECURE_SEQ - - #include -+#include - - u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); - u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, -diff -Nur linux-4.1.13.orig/include/uapi/linux/icmp.h linux-4.1.13/include/uapi/linux/icmp.h ---- linux-4.1.13.orig/include/uapi/linux/icmp.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/icmp.h 2015-12-04 19:57:05.917977705 +0100 -@@ -80,7 +80,7 @@ - __be16 mtu; - } frag; - } un; --}; -+} __attribute__((packed, aligned(2))); - - - /* -diff -Nur linux-4.1.13.orig/include/uapi/linux/icmpv6.h linux-4.1.13/include/uapi/linux/icmpv6.h ---- linux-4.1.13.orig/include/uapi/linux/icmpv6.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/icmpv6.h 2015-12-04 19:57:05.929976920 +0100 -@@ -76,7 +76,7 @@ - #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other - #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime - #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref --}; -+} __attribute__((packed, aligned(2))); - - - #define ICMPV6_ROUTER_PREF_LOW 0x3 -diff -Nur linux-4.1.13.orig/include/uapi/linux/if_pppox.h linux-4.1.13/include/uapi/linux/if_pppox.h ---- linux-4.1.13.orig/include/uapi/linux/if_pppox.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/if_pppox.h 2015-12-04 19:57:05.933976659 +0100 -@@ -47,6 +47,7 @@ - */ - struct pptp_addr { - __u16 call_id; -+ __u16 pad; - struct in_addr sin_addr; - }; - -diff -Nur linux-4.1.13.orig/include/uapi/linux/igmp.h linux-4.1.13/include/uapi/linux/igmp.h ---- linux-4.1.13.orig/include/uapi/linux/igmp.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/igmp.h 2015-12-04 19:57:05.929976920 +0100 -@@ -32,7 +32,7 @@ - __u8 code; /* For newer IGMP */ - __sum16 csum; - __be32 group; --}; -+} __attribute__((packed, aligned(2))); - - /* V3 group record types [grec_type] */ - #define IGMPV3_MODE_IS_INCLUDE 1 -@@ -48,7 +48,7 @@ - __be16 grec_nsrcs; - __be32 grec_mca; - __be32 grec_src[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_report { - __u8 type; -@@ -57,7 +57,7 @@ - __be16 resv2; - __be16 ngrec; - struct igmpv3_grec grec[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_query { - __u8 type; -@@ -78,7 +78,7 @@ - __u8 qqic; - __be16 nsrcs; - __be32 srcs[0]; --}; -+} __attribute__((packed, aligned(2))); - - #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ - #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ -diff -Nur linux-4.1.13.orig/include/uapi/linux/in6.h linux-4.1.13/include/uapi/linux/in6.h ---- linux-4.1.13.orig/include/uapi/linux/in6.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/in6.h 2015-12-04 19:57:05.917977705 +0100 -@@ -42,7 +42,7 @@ - #define s6_addr16 in6_u.u6_addr16 - #define s6_addr32 in6_u.u6_addr32 - #endif --}; -+} __attribute__((packed, aligned(2))); - #endif /* __UAPI_DEF_IN6_ADDR */ - - #if __UAPI_DEF_SOCKADDR_IN6 -diff -Nur linux-4.1.13.orig/include/uapi/linux/in.h linux-4.1.13/include/uapi/linux/in.h ---- linux-4.1.13.orig/include/uapi/linux/in.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/in.h 2015-12-04 19:57:57.978571564 +0100 -@@ -78,7 +78,7 @@ - /* Internet address. */ - struct in_addr { - __be32 s_addr; --}; -+} __attribute__((packed, aligned(2))); - - #define IP_TOS 1 - #define IP_TTL 2 -diff -Nur linux-4.1.13.orig/include/uapi/linux/ip.h linux-4.1.13/include/uapi/linux/ip.h ---- linux-4.1.13.orig/include/uapi/linux/ip.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/ip.h 2015-12-04 19:57:05.913977967 +0100 -@@ -102,7 +102,7 @@ - __be32 saddr; - __be32 daddr; - /*The options start here. */ --}; -+} __attribute__((packed, aligned(2))); - - - struct ip_auth_hdr { -diff -Nur linux-4.1.13.orig/include/uapi/linux/ipv6.h linux-4.1.13/include/uapi/linux/ipv6.h ---- linux-4.1.13.orig/include/uapi/linux/ipv6.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/ipv6.h 2015-12-04 19:57:05.913977967 +0100 -@@ -129,7 +129,7 @@ - - struct in6_addr saddr; - struct in6_addr daddr; --}; -+} __attribute__((packed, aligned(2))); - - - /* index values for the variables in ipv6_devconf */ -diff -Nur linux-4.1.13.orig/include/uapi/linux/Kbuild linux-4.1.13/include/uapi/linux/Kbuild ---- linux-4.1.13.orig/include/uapi/linux/Kbuild 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/Kbuild 2015-12-04 21:33:39.775625531 +0100 -@@ -380,6 +380,7 @@ - header-y += string.h - header-y += suspend_ioctls.h - header-y += swab.h -+header-y += switch.h - header-y += synclink.h - header-y += sysctl.h - header-y += sysinfo.h -diff -Nur linux-4.1.13.orig/include/uapi/linux/netfilter_arp/arp_tables.h linux-4.1.13/include/uapi/linux/netfilter_arp/arp_tables.h ---- linux-4.1.13.orig/include/uapi/linux/netfilter_arp/arp_tables.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/netfilter_arp/arp_tables.h 2015-12-04 19:57:05.933976659 +0100 -@@ -68,7 +68,7 @@ - __u8 flags; - /* Inverse flags */ - __u16 invflags; --}; -+} __attribute__((aligned(4))); - - /* Values for "flag" field in struct arpt_ip (general arp structure). - * No flags defined yet. -diff -Nur linux-4.1.13.orig/include/uapi/linux/switch.h linux-4.1.13/include/uapi/linux/switch.h ---- linux-4.1.13.orig/include/uapi/linux/switch.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/switch.h 2015-12-04 20:52:30.298718052 +0100 -@@ -0,0 +1,103 @@ -+/* -+ * switch.h: Switch configuration API -+ * -+ * Copyright (C) 2008 Felix Fietkau -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _UAPI_LINUX_SWITCH_H -+#define _UAPI_LINUX_SWITCH_H -+ -+#include -+#include -+#include -+#include -+#ifndef __KERNEL__ -+#include -+#include -+#include -+#endif -+ -+/* main attributes */ -+enum { -+ SWITCH_ATTR_UNSPEC, -+ /* global */ -+ SWITCH_ATTR_TYPE, -+ /* device */ -+ SWITCH_ATTR_ID, -+ SWITCH_ATTR_DEV_NAME, -+ SWITCH_ATTR_ALIAS, -+ SWITCH_ATTR_NAME, -+ SWITCH_ATTR_VLANS, -+ SWITCH_ATTR_PORTS, -+ SWITCH_ATTR_PORTMAP, -+ SWITCH_ATTR_CPU_PORT, -+ /* attributes */ -+ SWITCH_ATTR_OP_ID, -+ SWITCH_ATTR_OP_TYPE, -+ SWITCH_ATTR_OP_NAME, -+ SWITCH_ATTR_OP_PORT, -+ SWITCH_ATTR_OP_VLAN, -+ SWITCH_ATTR_OP_VALUE_INT, -+ SWITCH_ATTR_OP_VALUE_STR, -+ SWITCH_ATTR_OP_VALUE_PORTS, -+ SWITCH_ATTR_OP_DESCRIPTION, -+ /* port lists */ -+ SWITCH_ATTR_PORT, -+ SWITCH_ATTR_MAX -+}; -+ -+enum { -+ /* port map */ -+ SWITCH_PORTMAP_PORTS, -+ SWITCH_PORTMAP_SEGMENT, -+ SWITCH_PORTMAP_VIRT, -+ SWITCH_PORTMAP_MAX -+}; -+ -+/* commands */ -+enum { -+ SWITCH_CMD_UNSPEC, -+ SWITCH_CMD_GET_SWITCH, -+ SWITCH_CMD_NEW_ATTR, -+ SWITCH_CMD_LIST_GLOBAL, -+ SWITCH_CMD_GET_GLOBAL, -+ SWITCH_CMD_SET_GLOBAL, -+ SWITCH_CMD_LIST_PORT, -+ SWITCH_CMD_GET_PORT, -+ SWITCH_CMD_SET_PORT, -+ SWITCH_CMD_LIST_VLAN, -+ SWITCH_CMD_GET_VLAN, -+ SWITCH_CMD_SET_VLAN -+}; -+ -+/* data types */ -+enum switch_val_type { -+ SWITCH_TYPE_UNSPEC, -+ SWITCH_TYPE_INT, -+ SWITCH_TYPE_STRING, -+ SWITCH_TYPE_PORTS, -+ SWITCH_TYPE_NOVAL, -+}; -+ -+/* port nested attributes */ -+enum { -+ SWITCH_PORT_UNSPEC, -+ SWITCH_PORT_ID, -+ SWITCH_PORT_FLAG_TAGGED, -+ SWITCH_PORT_ATTR_MAX -+}; -+ -+#define SWITCH_ATTR_DEFAULTS_OFFSET 0x1000 -+ -+ -+#endif /* _UAPI_LINUX_SWITCH_H */ -diff -Nur linux-4.1.13.orig/include/uapi/linux/tcp.h linux-4.1.13/include/uapi/linux/tcp.h ---- linux-4.1.13.orig/include/uapi/linux/tcp.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/tcp.h 2015-12-04 19:57:05.913977967 +0100 -@@ -54,7 +54,7 @@ - __be16 window; - __sum16 check; - __be16 urg_ptr; --}; -+} __attribute__((packed, aligned(2))); - - /* - * The union cast uses a gcc extension to avoid aliasing problems -@@ -64,7 +64,7 @@ - union tcp_word_hdr { - struct tcphdr hdr; - __be32 words[5]; --}; -+} __attribute__((packed, aligned(2))); - - #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) - -diff -Nur linux-4.1.13.orig/include/uapi/linux/udp.h linux-4.1.13/include/uapi/linux/udp.h ---- linux-4.1.13.orig/include/uapi/linux/udp.h 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/include/uapi/linux/udp.h 2015-12-04 19:57:05.917977705 +0100 -@@ -24,7 +24,7 @@ - __be16 dest; - __be16 len; - __sum16 check; --}; -+} __attribute__((packed, aligned(2))); - - /* UDP socket options */ - #define UDP_CORK 1 /* Never send partially complete segments */ -diff -Nur linux-4.1.13.orig/lib/Kconfig linux-4.1.13/lib/Kconfig ---- linux-4.1.13.orig/lib/Kconfig 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/lib/Kconfig 2015-12-04 19:57:03.826114569 +0100 -@@ -235,6 +235,9 @@ - - source "lib/xz/Kconfig" - -+config RLE_DECOMPRESS -+ tristate -+ - # - # These all provide a common interface (hence the apparent duplication with - # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) -diff -Nur linux-4.1.13.orig/lib/rle.c linux-4.1.13/lib/rle.c ---- linux-4.1.13.orig/lib/rle.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/lib/rle.c 2015-12-04 19:57:03.830114307 +0100 -@@ -0,0 +1,78 @@ -+/* -+ * RLE decoding routine -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+int rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done) -+{ -+ size_t srcpos, dstpos; -+ int ret; -+ -+ srcpos = 0; -+ dstpos = 0; -+ ret = -EINVAL; -+ -+ /* sanity checks */ -+ if (!src || !srclen || !dst || !dstlen) -+ goto out; -+ -+ while (1) { -+ char count; -+ -+ if (srcpos >= srclen) -+ break; -+ -+ count = (char) src[srcpos++]; -+ if (count == 0) { -+ ret = 0; -+ break; -+ } -+ -+ if (count > 0) { -+ unsigned char c; -+ -+ if (srcpos >= srclen) -+ break; -+ -+ c = src[srcpos++]; -+ -+ while (count--) { -+ if (dstpos >= dstlen) -+ break; -+ -+ dst[dstpos++] = c; -+ } -+ } else { -+ count *= -1; -+ -+ while (count--) { -+ if (srcpos >= srclen) -+ break; -+ if (dstpos >= dstlen) -+ break; -+ dst[dstpos++] = src[srcpos++]; -+ } -+ } -+ } -+ -+out: -+ if (src_done) -+ *src_done = srcpos; -+ if (dst_done) -+ *dst_done = dstpos; -+ -+ return ret; -+} -+ -+EXPORT_SYMBOL_GPL(rle_decode); -diff -Nur linux-4.1.13.orig/net/core/flow_dissector.c linux-4.1.13/net/core/flow_dissector.c ---- linux-4.1.13.orig/net/core/flow_dissector.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/core/flow_dissector.c 2015-12-04 19:57:05.929976920 +0100 -@@ -53,7 +53,7 @@ - ports = __skb_header_pointer(skb, thoff + poff, - sizeof(_ports), data, hlen, &_ports); - if (ports) -- return *ports; -+ return (__be32)net_hdr_word(ports); - } - - return 0; -diff -Nur linux-4.1.13.orig/net/core/secure_seq.c linux-4.1.13/net/core/secure_seq.c ---- linux-4.1.13.orig/net/core/secure_seq.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/core/secure_seq.c 2015-12-04 19:57:05.929976920 +0100 -@@ -46,11 +46,12 @@ - u32 secret[MD5_MESSAGE_BYTES / 4]; - u32 hash[MD5_DIGEST_WORDS]; - u32 i; -+ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; - - net_secret_init(); - memcpy(hash, saddr, 16); - for (i = 0; i < 4; i++) -- secret[i] = net_secret[i] + (__force u32)daddr[i]; -+ secret[i] = net_secret[i] + (__force u32)daddr6->s6_addr32[i]; - secret[4] = net_secret[4] + - (((__force u16)sport << 16) + (__force u16)dport); - for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) -@@ -68,11 +69,12 @@ - u32 secret[MD5_MESSAGE_BYTES / 4]; - u32 hash[MD5_DIGEST_WORDS]; - u32 i; -+ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; - - net_secret_init(); - memcpy(hash, saddr, 16); - for (i = 0; i < 4; i++) -- secret[i] = net_secret[i] + (__force u32) daddr[i]; -+ secret[i] = net_secret[i] + (__force u32) daddr6->s6_addr32[i]; - secret[4] = net_secret[4] + (__force u32)dport; - for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) - secret[i] = net_secret[i]; -@@ -150,11 +152,12 @@ - u32 hash[MD5_DIGEST_WORDS]; - u64 seq; - u32 i; -+ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; - - net_secret_init(); - memcpy(hash, saddr, 16); - for (i = 0; i < 4; i++) -- secret[i] = net_secret[i] + daddr[i]; -+ secret[i] = net_secret[i] + daddr6->s6_addr32[i]; - secret[4] = net_secret[4] + - (((__force u16)sport << 16) + (__force u16)dport); - for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) -diff -Nur linux-4.1.13.orig/net/dsa/mv88e6063.c linux-4.1.13/net/dsa/mv88e6063.c ---- linux-4.1.13.orig/net/dsa/mv88e6063.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-4.1.13/net/dsa/mv88e6063.c 2015-09-13 20:04:35.076523692 +0200 -@@ -0,0 +1,294 @@ -+/* -+ * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips -+ * Copyright (c) 2009 Gabor Juhos -+ * -+ * This driver was base on: net/dsa/mv88e6060.c -+ * net/dsa/mv88e6063.c - Driver for Marvell 88e6060 switch chips -+ * Copyright (c) 2008-2009 Marvell Semiconductor -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include "dsa_priv.h" -+ -+#define REG_BASE 0x10 -+#define REG_PHY(p) (REG_BASE + (p)) -+#define REG_PORT(p) (REG_BASE + 8 + (p)) -+#define REG_GLOBAL (REG_BASE + 0x0f) -+#define NUM_PORTS 7 -+ -+static int reg_read(struct dsa_switch *ds, int addr, int reg) -+{ -+ return mdiobus_read(ds->master_mii_bus, addr, reg); -+} -+ -+#define REG_READ(addr, reg) \ -+ ({ \ -+ int __ret; \ -+ \ -+ __ret = reg_read(ds, addr, reg); \ -+ if (__ret < 0) \ -+ return __ret; \ -+ __ret; \ -+ }) -+ -+ -+static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) -+{ -+ return mdiobus_write(ds->master_mii_bus, addr, reg, val); -+} -+ -+#define REG_WRITE(addr, reg, val) \ -+ ({ \ -+ int __ret; \ -+ \ -+ __ret = reg_write(ds, addr, reg, val); \ -+ if (__ret < 0) \ -+ return __ret; \ -+ }) -+ -+static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) -+{ -+ int ret; -+ -+ ret = mdiobus_read(bus, REG_PORT(0), 0x03); -+ if (ret >= 0) { -+ ret &= 0xfff0; -+ if (ret == 0x1530) -+ return "Marvell 88E6063"; -+ } -+ -+ return NULL; -+} -+ -+static int mv88e6063_switch_reset(struct dsa_switch *ds) -+{ -+ int i; -+ int ret; -+ -+ /* -+ * Set all ports to the disabled state. -+ */ -+ for (i = 0; i < NUM_PORTS; i++) { -+ ret = REG_READ(REG_PORT(i), 0x04); -+ REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc); -+ } -+ -+ /* -+ * Wait for transmit queues to drain. -+ */ -+ msleep(2); -+ -+ /* -+ * Reset the switch. -+ */ -+ REG_WRITE(REG_GLOBAL, 0x0a, 0xa130); -+ -+ /* -+ * Wait up to one second for reset to complete. -+ */ -+ for (i = 0; i < 1000; i++) { -+ ret = REG_READ(REG_GLOBAL, 0x00); -+ if ((ret & 0x8000) == 0x0000) -+ break; -+ -+ msleep(1); -+ } -+ if (i == 1000) -+ return -ETIMEDOUT; -+ -+ return 0; -+} -+ -+static int mv88e6063_setup_global(struct dsa_switch *ds) -+{ -+ /* -+ * Disable discarding of frames with excessive collisions, -+ * set the maximum frame size to 1536 bytes, and mask all -+ * interrupt sources. -+ */ -+ REG_WRITE(REG_GLOBAL, 0x04, 0x0800); -+ -+ /* -+ * Enable automatic address learning, set the address -+ * database size to 1024 entries, and set the default aging -+ * time to 5 minutes. -+ */ -+ REG_WRITE(REG_GLOBAL, 0x0a, 0x2130); -+ -+ return 0; -+} -+ -+static int mv88e6063_setup_port(struct dsa_switch *ds, int p) -+{ -+ int addr = REG_PORT(p); -+ -+ /* -+ * Do not force flow control, disable Ingress and Egress -+ * Header tagging, disable VLAN tunneling, and set the port -+ * state to Forwarding. Additionally, if this is the CPU -+ * port, enable Ingress and Egress Trailer tagging mode. -+ */ -+ REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003); -+ -+ /* -+ * Port based VLAN map: give each port its own address -+ * database, allow the CPU port to talk to each of the 'real' -+ * ports, and allow each of the 'real' ports to only talk to -+ * the CPU port. -+ */ -+ REG_WRITE(addr, 0x06, -+ ((p & 0xf) << 12) | -+ (dsa_is_cpu_port(ds, p) ? -+ ds->phys_port_mask : -+ (1 << ds->dst->cpu_port))); -+ -+ /* -+ * Port Association Vector: when learning source addresses -+ * of packets, add the address to the address database using -+ * a port bitmap that has only the bit for this port set and -+ * the other bits clear. -+ */ -+ REG_WRITE(addr, 0x0b, 1 << p); -+ -+ return 0; -+} -+ -+static int mv88e6063_setup(struct dsa_switch *ds) -+{ -+ int i; -+ int ret; -+ -+ ret = mv88e6063_switch_reset(ds); -+ if (ret < 0) -+ return ret; -+ -+ /* @@@ initialise atu */ -+ -+ ret = mv88e6063_setup_global(ds); -+ if (ret < 0) -+ return ret; -+ -+ for (i = 0; i < NUM_PORTS; i++) { -+ ret = mv88e6063_setup_port(ds, i); -+ if (ret < 0) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int mv88e6063_set_addr(struct dsa_switch *ds, u8 *addr) -+{ -+ REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]); -+ REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]); -+ REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]); -+ -+ return 0; -+} -+ -+static int mv88e6063_port_to_phy_addr(int port) -+{ -+ if (port >= 0 && port <= NUM_PORTS) -+ return REG_PHY(port); -+ return -1; -+} -+ -+static int mv88e6063_phy_read(struct dsa_switch *ds, int port, int regnum) -+{ -+ int addr; -+ -+ addr = mv88e6063_port_to_phy_addr(port); -+ if (addr == -1) -+ return 0xffff; -+ -+ return reg_read(ds, addr, regnum); -+} -+ -+static int -+mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) -+{ -+ int addr; -+ -+ addr = mv88e6063_port_to_phy_addr(port); -+ if (addr == -1) -+ return 0xffff; -+ -+ return reg_write(ds, addr, regnum, val); -+} -+ -+static void mv88e6063_poll_link(struct dsa_switch *ds) -+{ -+ int i; -+ -+ for (i = 0; i < DSA_MAX_PORTS; i++) { -+ struct net_device *dev; -+ int uninitialized_var(port_status); -+ int link; -+ int speed; -+ int duplex; -+ int fc; -+ -+ dev = ds->ports[i]; -+ if (dev == NULL) -+ continue; -+ -+ link = 0; -+ if (dev->flags & IFF_UP) { -+ port_status = reg_read(ds, REG_PORT(i), 0x00); -+ if (port_status < 0) -+ continue; -+ -+ link = !!(port_status & 0x1000); -+ } -+ -+ if (!link) { -+ if (netif_carrier_ok(dev)) { -+ printk(KERN_INFO "%s: link down\n", dev->name); -+ netif_carrier_off(dev); -+ } -+ continue; -+ } -+ -+ speed = (port_status & 0x0100) ? 100 : 10; -+ duplex = (port_status & 0x0200) ? 1 : 0; -+ fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; -+ -+ if (!netif_carrier_ok(dev)) { -+ printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " -+ "flow control %sabled\n", dev->name, -+ speed, duplex ? "full" : "half", -+ fc ? "en" : "dis"); -+ netif_carrier_on(dev); -+ } -+ } -+} -+ -+static struct dsa_switch_driver mv88e6063_switch_driver = { -+ .tag_protocol = htons(ETH_P_TRAILER), -+ .probe = mv88e6063_probe, -+ .setup = mv88e6063_setup, -+ .set_addr = mv88e6063_set_addr, -+ .phy_read = mv88e6063_phy_read, -+ .phy_write = mv88e6063_phy_write, -+ .poll_link = mv88e6063_poll_link, -+}; -+ -+static int __init mv88e6063_init(void) -+{ -+ register_switch_driver(&mv88e6063_switch_driver); -+ return 0; -+} -+module_init(mv88e6063_init); -+ -+static void __exit mv88e6063_cleanup(void) -+{ -+ unregister_switch_driver(&mv88e6063_switch_driver); -+} -+module_exit(mv88e6063_cleanup); -diff -Nur linux-4.1.13.orig/net/dsa/tag_trailer.c linux-4.1.13/net/dsa/tag_trailer.c ---- linux-4.1.13.orig/net/dsa/tag_trailer.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/dsa/tag_trailer.c 2015-12-04 19:57:03.886110643 +0100 -@@ -84,7 +84,7 @@ - - trailer = skb_tail_pointer(skb) - 4; - if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 || -- (trailer[3] & 0xef) != 0x00 || trailer[3] != 0x00) -+ (trailer[2] & 0xef) != 0x00 || (trailer[3] & 0xfe) != 0x00) - goto out_drop; - - source_port = trailer[1] & 7; -diff -Nur linux-4.1.13.orig/net/ipv4/af_inet.c linux-4.1.13/net/ipv4/af_inet.c ---- linux-4.1.13.orig/net/ipv4/af_inet.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv4/af_inet.c 2015-12-04 19:57:05.925977182 +0100 -@@ -1323,8 +1323,8 @@ - if (unlikely(ip_fast_csum((u8 *)iph, 5))) - goto out_unlock; - -- id = ntohl(*(__be32 *)&iph->id); -- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); -+ id = ntohl(net_hdr_word(&iph->id)); -+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); - id >>= 16; - - for (p = *head; p; p = p->next) { -diff -Nur linux-4.1.13.orig/net/ipv4/igmp.c linux-4.1.13/net/ipv4/igmp.c ---- linux-4.1.13.orig/net/ipv4/igmp.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv4/igmp.c 2015-12-04 19:57:05.929976920 +0100 -@@ -496,7 +496,7 @@ - if (!skb) - return NULL; - psrc = (__be32 *)skb_put(skb, sizeof(__be32)); -- *psrc = psf->sf_inaddr; -+ net_hdr_word(psrc) = psf->sf_inaddr; - scount++; stotal++; - if ((type == IGMPV3_ALLOW_NEW_SOURCES || - type == IGMPV3_BLOCK_OLD_SOURCES) && psf->sf_crcount) { -diff -Nur linux-4.1.13.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c linux-4.1.13/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c ---- linux-4.1.13.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c 2015-12-04 19:57:05.917977705 +0100 -@@ -41,8 +41,8 @@ - if (ap == NULL) - return false; - -- tuple->src.u3.ip = ap[0]; -- tuple->dst.u3.ip = ap[1]; -+ tuple->src.u3.ip = net_hdr_word(ap++); -+ tuple->dst.u3.ip = net_hdr_word(ap); - - return true; - } -diff -Nur linux-4.1.13.orig/net/ipv4/route.c linux-4.1.13/net/ipv4/route.c ---- linux-4.1.13.orig/net/ipv4/route.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv4/route.c 2015-12-04 19:57:05.925977182 +0100 -@@ -450,7 +450,7 @@ - else if (skb) - pkey = &ip_hdr(skb)->daddr; - -- n = __ipv4_neigh_lookup(dev, *(__force u32 *)pkey); -+ n = __ipv4_neigh_lookup(dev, net_hdr_word(pkey)); - if (n) - return n; - return neigh_create(&arp_tbl, pkey, dev); -diff -Nur linux-4.1.13.orig/net/ipv4/tcp_input.c linux-4.1.13/net/ipv4/tcp_input.c ---- linux-4.1.13.orig/net/ipv4/tcp_input.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv4/tcp_input.c 2015-12-04 19:57:05.933976659 +0100 -@@ -3760,14 +3760,16 @@ - { - const __be32 *ptr = (const __be32 *)(th + 1); - -- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) -- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { -+ if (net_hdr_word(ptr) == -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { - tp->rx_opt.saw_tstamp = 1; - ++ptr; -- tp->rx_opt.rcv_tsval = ntohl(*ptr); -+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); - ++ptr; -- if (*ptr) -- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; -+ if (net_hdr_word(ptr)) -+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - -+ tp->tsoffset; - else - tp->rx_opt.rcv_tsecr = 0; - return true; -diff -Nur linux-4.1.13.orig/net/ipv4/tcp_output.c linux-4.1.13/net/ipv4/tcp_output.c ---- linux-4.1.13.orig/net/ipv4/tcp_output.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv4/tcp_output.c 2015-12-04 19:57:05.929976920 +0100 -@@ -452,48 +452,53 @@ - u16 options = opts->options; /* mungable copy */ - - if (unlikely(OPTION_MD5 & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); - /* overload cookie hash location */ - opts->hash_location = (__u8 *)ptr; - ptr += 4; - } - - if (unlikely(opts->mss)) { -- *ptr++ = htonl((TCPOPT_MSS << 24) | -- (TCPOLEN_MSS << 16) | -- opts->mss); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | -+ opts->mss); - } - - if (likely(OPTION_TS & options)) { - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | -- (TCPOLEN_SACK_PERM << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_SACK_PERM << 24) | -+ (TCPOLEN_SACK_PERM << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - options &= ~OPTION_SACK_ADVERTISE; - } else { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - } -- *ptr++ = htonl(opts->tsval); -- *ptr++ = htonl(opts->tsecr); -+ net_hdr_word(ptr++) = htonl(opts->tsval); -+ net_hdr_word(ptr++) = htonl(opts->tsecr); - } - - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK_PERM << 8) | -- TCPOLEN_SACK_PERM); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK_PERM << 8) | -+ TCPOLEN_SACK_PERM); - } - - if (unlikely(OPTION_WSCALE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_WINDOW << 16) | -- (TCPOLEN_WINDOW << 8) | -- opts->ws); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_WINDOW << 16) | -+ (TCPOLEN_WINDOW << 8) | -+ opts->ws); - } - - if (unlikely(opts->num_sack_blocks)) { -@@ -501,16 +506,17 @@ - tp->duplicate_sack : tp->selective_acks; - int this_sack; - -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK << 8) | -- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK << 8) | -+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * - TCPOLEN_SACK_PERBLOCK))); - - for (this_sack = 0; this_sack < opts->num_sack_blocks; - ++this_sack) { -- *ptr++ = htonl(sp[this_sack].start_seq); -- *ptr++ = htonl(sp[this_sack].end_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); - } - - tp->rx_opt.dsack = 0; -@@ -523,13 +529,14 @@ - - if (foc->exp) { - len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; -- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | -+ net_hdr_word(ptr) = -+ htonl((TCPOPT_EXP << 24) | (len << 16) | - TCPOPT_FASTOPEN_MAGIC); - p += TCPOLEN_EXP_FASTOPEN_BASE; - } else { - len = TCPOLEN_FASTOPEN_BASE + foc->len; -- *p++ = TCPOPT_FASTOPEN; -- *p++ = len; -+ net_hdr_word(p++) = TCPOPT_FASTOPEN; -+ net_hdr_word(p++) = len; - } - - memcpy(p, foc->val, foc->len); -diff -Nur linux-4.1.13.orig/net/ipv6/datagram.c linux-4.1.13/net/ipv6/datagram.c ---- linux-4.1.13.orig/net/ipv6/datagram.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/datagram.c 2015-12-04 19:57:05.921977444 +0100 -@@ -424,7 +424,7 @@ - ipv6_iface_scope_id(&sin->sin6_addr, - IP6CB(skb)->iif); - } else { -- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), -+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), - &sin->sin6_addr); - sin->sin6_scope_id = 0; - } -@@ -761,12 +761,12 @@ - } - - if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { -- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { -+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { - err = -EINVAL; - goto exit_f; - } - } -- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); -+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); - break; - - case IPV6_2292HOPOPTS: -diff -Nur linux-4.1.13.orig/net/ipv6/exthdrs.c linux-4.1.13/net/ipv6/exthdrs.c ---- linux-4.1.13.orig/net/ipv6/exthdrs.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/exthdrs.c 2015-12-04 19:57:05.921977444 +0100 -@@ -573,7 +573,7 @@ - goto drop; - } - -- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); -+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); - if (pkt_len <= IPV6_MAXPLEN) { - IP6_INC_STATS_BH(net, ipv6_skb_idev(skb), - IPSTATS_MIB_INHDRERRORS); -diff -Nur linux-4.1.13.orig/net/ipv6/ip6_fib.c linux-4.1.13/net/ipv6/ip6_fib.c ---- linux-4.1.13.orig/net/ipv6/ip6_fib.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/ip6_fib.c 2015-12-04 19:57:05.929976920 +0100 -@@ -137,7 +137,7 @@ - * See include/asm-generic/bitops/le.h. - */ - return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & -- addr[fn_bit >> 5]; -+ net_hdr_word(&addr[fn_bit >> 5]); - } - - static struct fib6_node *node_alloc(void) -diff -Nur linux-4.1.13.orig/net/ipv6/ip6_gre.c linux-4.1.13/net/ipv6/ip6_gre.c ---- linux-4.1.13.orig/net/ipv6/ip6_gre.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/ip6_gre.c 2015-12-04 19:57:05.921977444 +0100 -@@ -394,7 +394,7 @@ - - t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr, - flags & GRE_KEY ? -- *(((__be32 *)p) + (grehlen / 4) - 1) : 0, -+ net_hdr_word(((__be32 *)p) + (grehlen / 4) - 1) : 0, - p[1]); - if (!t) - return; -@@ -476,11 +476,11 @@ - offset += 4; - } - if (flags&GRE_KEY) { -- key = *(__be32 *)(h + offset); -+ key = net_hdr_word(h + offset); - offset += 4; - } - if (flags&GRE_SEQ) { -- seqno = ntohl(*(__be32 *)(h + offset)); -+ seqno = ntohl(net_hdr_word(h + offset)); - offset += 4; - } - } -@@ -745,7 +745,7 @@ - - if (tunnel->parms.o_flags&GRE_SEQ) { - ++tunnel->o_seqno; -- *ptr = htonl(tunnel->o_seqno); -+ net_hdr_word(ptr) = htonl(tunnel->o_seqno); - ptr--; - } - if (tunnel->parms.o_flags&GRE_KEY) { -@@ -841,7 +841,7 @@ - - dsfield = ipv6_get_dsfield(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) -- fl6.flowlabel |= (*(__be32 *) ipv6h & IPV6_TCLASS_MASK); -+ fl6.flowlabel |= net_hdr_word(ipv6h) & IPV6_TCLASS_MASK; - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FLOWLABEL) - fl6.flowlabel |= ip6_flowlabel(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) -diff -Nur linux-4.1.13.orig/net/ipv6/ip6_offload.c linux-4.1.13/net/ipv6/ip6_offload.c ---- linux-4.1.13.orig/net/ipv6/ip6_offload.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/ip6_offload.c 2015-12-04 19:57:05.929976920 +0100 -@@ -221,7 +221,7 @@ - continue; - - iph2 = (struct ipv6hdr *)(p->data + off); -- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; -+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); - - /* All fields must match except length and Traffic Class. - * XXX skbs on the gro_list have all been parsed and pulled -diff -Nur linux-4.1.13.orig/net/ipv6/ip6_tunnel.c linux-4.1.13/net/ipv6/ip6_tunnel.c ---- linux-4.1.13.orig/net/ipv6/ip6_tunnel.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/ip6_tunnel.c 2015-12-04 19:57:05.921977444 +0100 -@@ -1190,7 +1190,7 @@ - - dsfield = ipv6_get_dsfield(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) -- fl6.flowlabel |= (*(__be32 *) ipv6h & IPV6_TCLASS_MASK); -+ fl6.flowlabel |= net_hdr_word(ipv6h) & IPV6_TCLASS_MASK; - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FLOWLABEL) - fl6.flowlabel |= ip6_flowlabel(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) -diff -Nur linux-4.1.13.orig/net/ipv6/netfilter/nf_log_ipv6.c linux-4.1.13/net/ipv6/netfilter/nf_log_ipv6.c ---- linux-4.1.13.orig/net/ipv6/netfilter/nf_log_ipv6.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/netfilter/nf_log_ipv6.c 2015-12-04 19:57:05.933976659 +0100 -@@ -66,9 +66,9 @@ - /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ - nf_log_buf_add(m, "LEN=%Zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", - ntohs(ih->payload_len) + sizeof(struct ipv6hdr), -- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, -+ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, - ih->hop_limit, -- (ntohl(*(__be32 *)ih) & 0x000fffff)); -+ (ntohl(net_hdr_word(ih)) & 0x000fffff)); - - fragment = 0; - ptr = ip6hoff + sizeof(struct ipv6hdr); -diff -Nur linux-4.1.13.orig/net/ipv6/tcp_ipv6.c linux-4.1.13/net/ipv6/tcp_ipv6.c ---- linux-4.1.13.orig/net/ipv6/tcp_ipv6.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/ipv6/tcp_ipv6.c 2015-12-04 19:57:05.917977705 +0100 -@@ -39,6 +39,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -772,10 +773,10 @@ - topt = (__be32 *)(t1 + 1); - - if (tsecr) { -- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); -- *topt++ = htonl(tsval); -- *topt++ = htonl(tsecr); -+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); -+ put_unaligned_be32(tsval, topt++); -+ put_unaligned_be32(tsecr, topt++); - } - - #ifdef CONFIG_TCP_MD5SIG -diff -Nur linux-4.1.13.orig/net/netfilter/nf_conntrack_proto_tcp.c linux-4.1.13/net/netfilter/nf_conntrack_proto_tcp.c ---- linux-4.1.13.orig/net/netfilter/nf_conntrack_proto_tcp.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/netfilter/nf_conntrack_proto_tcp.c 2015-12-04 19:57:05.929976920 +0100 -@@ -453,7 +453,7 @@ - - /* Fast path for timestamp-only option */ - if (length == TCPOLEN_TSTAMP_ALIGNED -- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) -+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) - | (TCPOPT_NOP << 16) - | (TCPOPT_TIMESTAMP << 8) - | TCPOLEN_TIMESTAMP)) -diff -Nur linux-4.1.13.orig/net/sched/cls_u32.c linux-4.1.13/net/sched/cls_u32.c ---- linux-4.1.13.orig/net/sched/cls_u32.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/sched/cls_u32.c 2015-12-04 19:57:05.929976920 +0100 -@@ -151,7 +151,7 @@ - data = skb_header_pointer(skb, toff, 4, &hdata); - if (!data) - goto out; -- if ((*data ^ key->val) & key->mask) { -+ if ((net_hdr_word(data) ^ key->val) & key->mask) { - n = rcu_dereference_bh(n->next); - goto next_knode; - } -@@ -204,8 +204,8 @@ - &hdata); - if (!data) - goto out; -- sel = ht->divisor & u32_hash_fold(*data, &n->sel, -- n->fshift); -+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), -+ &n->sel, n->fshift); - } - if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) - goto next_ht; -diff -Nur linux-4.1.13.orig/net/xfrm/xfrm_input.c linux-4.1.13/net/xfrm/xfrm_input.c ---- linux-4.1.13.orig/net/xfrm/xfrm_input.c 2015-11-09 23:34:10.000000000 +0100 -+++ linux-4.1.13/net/xfrm/xfrm_input.c 2015-12-04 19:57:05.929976920 +0100 -@@ -154,8 +154,8 @@ - if (!pskb_may_pull(skb, hlen)) - return -EINVAL; - -- *spi = *(__be32 *)(skb_transport_header(skb) + offset); -- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); -+ *spi = net_hdr_word(skb_transport_header(skb) + offset); -+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); - return 0; - } - diff --git a/target/mips/ath79/patches/4.1.35/0001-openwrt-ath79.patch b/target/mips/ath79/patches/4.1.35/0001-openwrt-ath79.patch new file mode 100644 index 000000000..4178f20cb --- /dev/null +++ b/target/mips/ath79/patches/4.1.35/0001-openwrt-ath79.patch @@ -0,0 +1,47200 @@ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/clock.c linux-4.1.13/arch/mips/ath79/clock.c +--- linux-4.1.13.orig/arch/mips/ath79/clock.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/clock.c 2015-12-04 19:57:05.422010155 +0100 +@@ -25,7 +25,7 @@ + #include "common.h" + + #define AR71XX_BASE_FREQ 40000000 +-#define AR724X_BASE_FREQ 5000000 ++#define AR724X_BASE_FREQ 40000000 + #define AR913X_BASE_FREQ 5000000 + + struct clk { +@@ -99,8 +99,8 @@ + div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK); + freq = div * ref_rate; + +- div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK); +- freq *= div; ++ div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK) * 2; ++ freq /= div; + + cpu_rate = freq; + +@@ -350,6 +350,91 @@ + iounmap(dpll_base); + } + ++static void __init qca953x_clocks_init(void) ++{ ++ unsigned long ref_rate; ++ unsigned long cpu_rate; ++ unsigned long ddr_rate; ++ unsigned long ahb_rate; ++ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; ++ u32 cpu_pll, ddr_pll; ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); ++ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40) ++ ref_rate = 40 * 1000 * 1000; ++ else ++ ref_rate = 25 * 1000 * 1000; ++ ++ pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); ++ out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_REFDIV_MASK; ++ nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_NINT_MASK; ++ frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) & ++ QCA953X_PLL_CPU_CONFIG_NFRAC_MASK; ++ ++ cpu_pll = nint * ref_rate / ref_div; ++ cpu_pll += frac * (ref_rate >> 6) / ref_div; ++ cpu_pll /= (1 << out_div); ++ ++ pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); ++ out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_REFDIV_MASK; ++ nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_NINT_MASK; ++ frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) & ++ QCA953X_PLL_DDR_CONFIG_NFRAC_MASK; ++ ++ ddr_pll = nint * ref_rate / ref_div; ++ ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); ++ ddr_pll /= (1 << out_div); ++ ++ clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); ++ ++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & ++ QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) ++ cpu_rate = ref_rate; ++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) ++ cpu_rate = cpu_pll / (postdiv + 1); ++ else ++ cpu_rate = ddr_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & ++ QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) ++ ddr_rate = ref_rate; ++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) ++ ddr_rate = ddr_pll / (postdiv + 1); ++ else ++ ddr_rate = cpu_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & ++ QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) ++ ahb_rate = ref_rate; ++ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) ++ ahb_rate = ddr_pll / (postdiv + 1); ++ else ++ ahb_rate = cpu_pll / (postdiv + 1); ++ ++ ath79_add_sys_clkdev("ref", ref_rate); ++ ath79_add_sys_clkdev("cpu", cpu_rate); ++ ath79_add_sys_clkdev("ddr", ddr_rate); ++ ath79_add_sys_clkdev("ahb", ahb_rate); ++ ++ clk_add_alias("wdt", NULL, "ref", NULL); ++ clk_add_alias("uart", NULL, "ref", NULL); ++} ++ + static void __init qca955x_clocks_init(void) + { + unsigned long ref_rate; +@@ -435,6 +520,100 @@ + clk_add_alias("uart", NULL, "ref", NULL); + } + ++static void __init qca956x_clocks_init(void) ++{ ++ unsigned long ref_rate; ++ unsigned long cpu_rate; ++ unsigned long ddr_rate; ++ unsigned long ahb_rate; ++ u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; ++ u32 cpu_pll, ddr_pll; ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); ++ if (bootstrap & QCA956X_BOOTSTRAP_REF_CLK_40) ++ ref_rate = 40 * 1000 * 1000; ++ else ++ ref_rate = 25 * 1000 * 1000; ++ ++ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG); ++ out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG_REFDIV_MASK; ++ ++ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG); ++ nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG1_NINT_MASK; ++ hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK; ++ lfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT) & ++ QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK; ++ ++ cpu_pll = nint * ref_rate / ref_div; ++ cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); ++ cpu_pll += (hfrac >> 13) * ref_rate / ref_div; ++ cpu_pll /= (1 << out_div); ++ ++ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); ++ out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK; ++ ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG_REFDIV_MASK; ++ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); ++ nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG1_NINT_MASK; ++ hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK; ++ lfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT) & ++ QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK; ++ ++ ddr_pll = nint * ref_rate / ref_div; ++ ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); ++ ddr_pll += (hfrac >> 13) * ref_rate / ref_div; ++ ddr_pll /= (1 << out_div); ++ ++ clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); ++ ++ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & ++ QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS) ++ cpu_rate = ref_rate; ++ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL) ++ cpu_rate = ddr_pll / (postdiv + 1); ++ else ++ cpu_rate = cpu_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & ++ QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS) ++ ddr_rate = ref_rate; ++ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL) ++ ddr_rate = cpu_pll / (postdiv + 1); ++ else ++ ddr_rate = ddr_pll / (postdiv + 1); ++ ++ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & ++ QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; ++ ++ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS) ++ ahb_rate = ref_rate; ++ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) ++ ahb_rate = ddr_pll / (postdiv + 1); ++ else ++ ahb_rate = cpu_pll / (postdiv + 1); ++ ++ ath79_add_sys_clkdev("ref", ref_rate); ++ ath79_add_sys_clkdev("cpu", cpu_rate); ++ ath79_add_sys_clkdev("ddr", ddr_rate); ++ ath79_add_sys_clkdev("ahb", ahb_rate); ++ ++ clk_add_alias("wdt", NULL, "ref", NULL); ++ clk_add_alias("uart", NULL, "ref", NULL); ++} ++ + void __init ath79_clocks_init(void) + { + if (soc_is_ar71xx()) +@@ -447,8 +626,12 @@ + ar933x_clocks_init(); + else if (soc_is_ar934x()) + ar934x_clocks_init(); ++ else if (soc_is_qca953x()) ++ qca953x_clocks_init(); + else if (soc_is_qca955x()) + qca955x_clocks_init(); ++ else if (soc_is_qca956x()) ++ qca956x_clocks_init(); + else + BUG(); + } +@@ -488,3 +671,15 @@ + return clk->rate; + } + EXPORT_SYMBOL(clk_get_rate); ++ ++int clk_set_rate(struct clk *clk, unsigned long rate) ++{ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(clk_set_rate); ++ ++long clk_round_rate(struct clk *clk, unsigned long rate) ++{ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(clk_round_rate); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/common.c linux-4.1.13/arch/mips/ath79/common.c +--- linux-4.1.13.orig/arch/mips/ath79/common.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/common.c 2015-12-04 19:57:04.474072175 +0100 +@@ -22,6 +22,7 @@ + #include "common.h" + + static DEFINE_SPINLOCK(ath79_device_reset_lock); ++static DEFINE_MUTEX(ath79_flash_mutex); + + u32 ath79_cpu_freq; + EXPORT_SYMBOL_GPL(ath79_cpu_freq); +@@ -72,10 +73,14 @@ + reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca953x()) ++ reg = QCA953X_RESET_REG_RESET_MODULE; + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca956x()) ++ reg = QCA956X_RESET_REG_RESET_MODULE; + else +- BUG(); ++ panic("Reset register not defined for this SOC"); + + spin_lock_irqsave(&ath79_device_reset_lock, flags); + t = ath79_reset_rr(reg); +@@ -100,10 +105,14 @@ + reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca953x()) ++ reg = QCA953X_RESET_REG_RESET_MODULE; + else if (soc_is_qca955x()) + reg = QCA955X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca956x()) ++ reg = QCA956X_RESET_REG_RESET_MODULE; + else +- BUG(); ++ panic("Reset register not defined for this SOC"); + + spin_lock_irqsave(&ath79_device_reset_lock, flags); + t = ath79_reset_rr(reg); +@@ -111,3 +120,42 @@ + spin_unlock_irqrestore(&ath79_device_reset_lock, flags); + } + EXPORT_SYMBOL_GPL(ath79_device_reset_clear); ++ ++u32 ath79_device_reset_get(u32 mask) ++{ ++ unsigned long flags; ++ u32 reg; ++ u32 ret; ++ ++ if (soc_is_ar71xx()) ++ reg = AR71XX_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar724x()) ++ reg = AR724X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar913x()) ++ reg = AR913X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar933x()) ++ reg = AR933X_RESET_REG_RESET_MODULE; ++ else if (soc_is_ar934x()) ++ reg = AR934X_RESET_REG_RESET_MODULE; ++ else ++ BUG(); ++ ++ spin_lock_irqsave(&ath79_device_reset_lock, flags); ++ ret = ath79_reset_rr(reg); ++ spin_unlock_irqrestore(&ath79_device_reset_lock, flags); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(ath79_device_reset_get); ++ ++void ath79_flash_acquire(void) ++{ ++ mutex_lock(&ath79_flash_mutex); ++} ++EXPORT_SYMBOL_GPL(ath79_flash_acquire); ++ ++void ath79_flash_release(void) ++{ ++ mutex_unlock(&ath79_flash_mutex); ++} ++EXPORT_SYMBOL_GPL(ath79_flash_release); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/common.h linux-4.1.13/arch/mips/ath79/common.h +--- linux-4.1.13.orig/arch/mips/ath79/common.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/common.h 2015-12-04 19:57:05.893979276 +0100 +@@ -27,6 +27,9 @@ + void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); ++void ath79_gpio_function2_setup(u32 set, u32 clear); ++void ath79_gpio_output_select(unsigned gpio, u8 val); ++int ath79_gpio_direction_select(unsigned gpio, bool oe); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.c linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,159 @@ ++/* ++ * Atheros AP9X reference board PCI initialization ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "pci-ath9k-fixup.h" ++#include "pci.h" ++ ++static struct ath9k_platform_data ap9x_wmac0_data = { ++ .led_pin = -1, ++}; ++static struct ath9k_platform_data ap9x_wmac1_data = { ++ .led_pin = -1, ++}; ++static char ap9x_wmac0_mac[6]; ++static char ap9x_wmac1_mac[6]; ++ ++__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) ++{ ++ switch (wmac) { ++ case 0: ++ ap9x_wmac0_data.led_pin = pin; ++ break; ++ case 1: ++ ap9x_wmac1_data.led_pin = pin; ++ break; ++ } ++} ++ ++__init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac) ++{ ++ switch (wmac) { ++ case 0: ++ return &ap9x_wmac0_data; ++ ++ case 1: ++ return &ap9x_wmac1_data; ++ } ++ ++ return NULL; ++} ++ ++__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) ++{ ++ switch (wmac) { ++ case 0: ++ ap9x_wmac0_data.gpio_mask = mask; ++ ap9x_wmac0_data.gpio_val = val; ++ break; ++ case 1: ++ ap9x_wmac1_data.gpio_mask = mask; ++ ap9x_wmac1_data.gpio_val = val; ++ break; ++ } ++} ++ ++__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, ++ int num_leds) ++{ ++ switch (wmac) { ++ case 0: ++ ap9x_wmac0_data.leds = leds; ++ ap9x_wmac0_data.num_leds = num_leds; ++ break; ++ case 1: ++ ap9x_wmac1_data.leds = leds; ++ ap9x_wmac1_data.num_leds = num_leds; ++ break; ++ } ++} ++ ++static int ap91_pci_plat_dev_init(struct pci_dev *dev) ++{ ++ switch (PCI_SLOT(dev->devfn)) { ++ case 0: ++ dev->dev.platform_data = &ap9x_wmac0_data; ++ break; ++ } ++ ++ return 0; ++} ++ ++__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr) ++{ ++ if (cal_data) ++ memcpy(ap9x_wmac0_data.eeprom_data, cal_data, ++ sizeof(ap9x_wmac0_data.eeprom_data)); ++ ++ if (mac_addr) { ++ memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac)); ++ ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; ++ } ++ ++ ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init); ++ ath79_register_pci(); ++ ++ pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data); ++} ++ ++__init void ap91_pci_init_simple(void) ++{ ++ ap91_pci_init(NULL, NULL); ++ ap9x_wmac0_data.eeprom_name = "pci_wmac0.eeprom"; ++} ++ ++static int ap94_pci_plat_dev_init(struct pci_dev *dev) ++{ ++ switch (PCI_SLOT(dev->devfn)) { ++ case 17: ++ dev->dev.platform_data = &ap9x_wmac0_data; ++ break; ++ ++ case 18: ++ dev->dev.platform_data = &ap9x_wmac1_data; ++ break; ++ } ++ ++ return 0; ++} ++ ++__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, ++ u8 *cal_data1, u8 *mac_addr1) ++{ ++ if (cal_data0) ++ memcpy(ap9x_wmac0_data.eeprom_data, cal_data0, ++ sizeof(ap9x_wmac0_data.eeprom_data)); ++ ++ if (cal_data1) ++ memcpy(ap9x_wmac1_data.eeprom_data, cal_data1, ++ sizeof(ap9x_wmac1_data.eeprom_data)); ++ ++ if (mac_addr0) { ++ memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac)); ++ ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; ++ } ++ ++ if (mac_addr1) { ++ memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac)); ++ ap9x_wmac1_data.macaddr = ap9x_wmac1_mac; ++ } ++ ++ ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init); ++ ath79_register_pci(); ++ ++ pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data); ++ pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data); ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.h linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.h +--- linux-4.1.13.orig/arch/mips/ath79/dev-ap9x-pci.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-ap9x-pci.h 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,48 @@ ++/* ++ * Atheros AP9X reference board PCI initialization ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_DEV_AP9X_PCI_H ++#define _ATH79_DEV_AP9X_PCI_H ++ ++struct gpio_led; ++struct ath9k_platform_data; ++ ++#if defined(CONFIG_ATH79_DEV_AP9X_PCI) ++void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin); ++void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val); ++void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, ++ int num_leds); ++struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac); ++ ++void ap91_pci_init(u8 *cal_data, u8 *mac_addr); ++void ap91_pci_init_simple(void); ++void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, ++ u8 *cal_data1, u8 *mac_addr1); ++ ++#else ++static inline void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) {} ++static inline void ap9x_pci_setup_wmac_gpio(unsigned wmac, ++ u32 mask, u32 val) {} ++static inline void ap9x_pci_setup_wmac_leds(unsigned wmac, ++ struct gpio_led *leds, ++ int num_leds) {} ++static inline struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac) ++{ ++ return NULL; ++} ++ ++static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) {} ++static inline void ap91_pci_init_simple(void) {} ++static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, ++ u8 *cal_data1, u8 *mac_addr1) {} ++#endif ++ ++#endif /* _ATH79_DEV_AP9X_PCI_H */ ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-common.c linux-4.1.13/arch/mips/ath79/dev-common.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-common.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-common.c 2015-12-04 19:57:04.474072175 +0100 +@@ -80,11 +80,22 @@ + + uart_clk_rate = ath79_get_sys_clk_rate("uart"); + ++ if (soc_is_ar71xx()) ++ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN); ++ else if (soc_is_ar724x()) ++ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN); ++ else if (soc_is_ar913x()) ++ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN); ++ else if (soc_is_ar933x()) ++ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN); ++ + if (soc_is_ar71xx() || + soc_is_ar724x() || + soc_is_ar913x() || + soc_is_ar934x() || +- soc_is_qca955x()) { ++ soc_is_qca953x() || ++ soc_is_qca955x() || ++ soc_is_qca956x()) { + ath79_uart_data[0].uartclk = uart_clk_rate; + platform_device_register(&ath79_uart_device); + } else if (soc_is_ar933x()) { +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-dsa.c linux-4.1.13/arch/mips/ath79/dev-dsa.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-dsa.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-dsa.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,41 @@ ++/* ++ * Atheros AR71xx DSA switch device support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-dsa.h" ++ ++static struct platform_device ar71xx_dsa_switch_device = { ++ .name = "dsa", ++ .id = 0, ++}; ++ ++void __init ath79_register_dsa(struct device *netdev, ++ struct device *miidev, ++ struct dsa_platform_data *d) ++{ ++ int i; ++ ++ d->netdev = netdev; ++ for (i = 0; i < d->nr_chips; i++) ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) ++ d->chip[i].mii_bus = miidev; ++#else ++ d->chip[i].host_dev = miidev; ++#endif ++ ++ ar71xx_dsa_switch_device.dev.platform_data = d; ++ platform_device_register(&ar71xx_dsa_switch_device); ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-dsa.h linux-4.1.13/arch/mips/ath79/dev-dsa.h +--- linux-4.1.13.orig/arch/mips/ath79/dev-dsa.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-dsa.h 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,21 @@ ++/* ++ * Atheros AR71xx DSA switch device support ++ * ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_DEV_DSA_H ++#define _ATH79_DEV_DSA_H ++ ++#include ++ ++void ath79_register_dsa(struct device *netdev, ++ struct device *miidev, ++ struct dsa_platform_data *d); ++ ++#endif /* _ATH79_DEV_DSA_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-eth.c linux-4.1.13/arch/mips/ath79/dev-eth.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-eth.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-eth.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,1254 @@ ++/* ++ * Atheros AR71xx SoC platform devices ++ * ++ * Copyright (C) 2010-2011 Jaiganesh Narayanan ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Parts of this file are based on Atheros 2.6.15 BSP ++ * Parts of this file are based on Atheros 2.6.31 BSP ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++ ++unsigned char ath79_mac_base[ETH_ALEN] __initdata; ++ ++static struct resource ath79_mdio0_resources[] = { ++ { ++ .name = "mdio_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE0_BASE, ++ .end = AR71XX_GE0_BASE + 0x200 - 1, ++ } ++}; ++ ++struct ag71xx_mdio_platform_data ath79_mdio0_data; ++ ++struct platform_device ath79_mdio0_device = { ++ .name = "ag71xx-mdio", ++ .id = 0, ++ .resource = ath79_mdio0_resources, ++ .num_resources = ARRAY_SIZE(ath79_mdio0_resources), ++ .dev = { ++ .platform_data = &ath79_mdio0_data, ++ }, ++}; ++ ++static struct resource ath79_mdio1_resources[] = { ++ { ++ .name = "mdio_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE1_BASE, ++ .end = AR71XX_GE1_BASE + 0x200 - 1, ++ } ++}; ++ ++struct ag71xx_mdio_platform_data ath79_mdio1_data; ++ ++struct platform_device ath79_mdio1_device = { ++ .name = "ag71xx-mdio", ++ .id = 1, ++ .resource = ath79_mdio1_resources, ++ .num_resources = ARRAY_SIZE(ath79_mdio1_resources), ++ .dev = { ++ .platform_data = &ath79_mdio1_data, ++ }, ++}; ++ ++static void ath79_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ ++ t = __raw_readl(base + cfg_reg); ++ t &= ~(3 << shift); ++ t |= (2 << shift); ++ __raw_writel(t, base + cfg_reg); ++ udelay(100); ++ ++ __raw_writel(pll_val, base + pll_reg); ++ ++ t |= (3 << shift); ++ __raw_writel(t, base + cfg_reg); ++ udelay(100); ++ ++ t &= ~(3 << shift); ++ __raw_writel(t, base + cfg_reg); ++ udelay(100); ++ ++ printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", ++ (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); ++ ++ iounmap(base); ++} ++ ++static void __init ath79_mii_ctrl_set_if(unsigned int reg, ++ unsigned int mii_if) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(AR71XX_MII_CTRL_IF_MASK); ++ t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); ++ __raw_writel(t, base + reg); ++ ++ iounmap(base); ++} ++ ++static void ath79_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) ++{ ++ void __iomem *base; ++ unsigned int mii_speed; ++ u32 t; ++ ++ switch (speed) { ++ case SPEED_10: ++ mii_speed = AR71XX_MII_CTRL_SPEED_10; ++ break; ++ case SPEED_100: ++ mii_speed = AR71XX_MII_CTRL_SPEED_100; ++ break; ++ case SPEED_1000: ++ mii_speed = AR71XX_MII_CTRL_SPEED_1000; ++ break; ++ default: ++ BUG(); ++ } ++ ++ base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(AR71XX_MII_CTRL_SPEED_MASK << AR71XX_MII_CTRL_SPEED_SHIFT); ++ t |= mii_speed << AR71XX_MII_CTRL_SPEED_SHIFT; ++ __raw_writel(t, base + reg); ++ ++ iounmap(base); ++} ++ ++static unsigned long ar934x_get_mdio_ref_clock(void) ++{ ++ void __iomem *base; ++ unsigned long ret; ++ u32 t; ++ ++ base = ioremap(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ ++ ret = 0; ++ t = __raw_readl(base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); ++ if (t & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) { ++ ret = 100 * 1000 * 1000; ++ } else { ++ struct clk *clk; ++ ++ clk = clk_get(NULL, "ref"); ++ if (!IS_ERR(clk)) ++ ret = clk_get_rate(clk); ++ } ++ ++ iounmap(base); ++ ++ return ret; ++} ++ ++void __init ath79_register_mdio(unsigned int id, u32 phy_mask) ++{ ++ struct platform_device *mdio_dev; ++ struct ag71xx_mdio_platform_data *mdio_data; ++ unsigned int max_id; ++ ++ if (ath79_soc == ATH79_SOC_AR9341 || ++ ath79_soc == ATH79_SOC_AR9342 || ++ ath79_soc == ATH79_SOC_AR9344 || ++ ath79_soc == ATH79_SOC_QCA9556 || ++ ath79_soc == ATH79_SOC_QCA9558) ++ max_id = 1; ++ else ++ max_id = 0; ++ ++ if (id > max_id) { ++ printk(KERN_ERR "ar71xx: invalid MDIO id %u\n", id); ++ return; ++ } ++ ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7241: ++ case ATH79_SOC_AR9330: ++ case ATH79_SOC_AR9331: ++ case ATH79_SOC_QCA9533: ++ case ATH79_SOC_QCA9561: ++ case ATH79_SOC_TP9343: ++ mdio_dev = &ath79_mdio1_device; ++ mdio_data = &ath79_mdio1_data; ++ break; ++ ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ if (id == 0) { ++ mdio_dev = &ath79_mdio0_device; ++ mdio_data = &ath79_mdio0_data; ++ } else { ++ mdio_dev = &ath79_mdio1_device; ++ mdio_data = &ath79_mdio1_data; ++ } ++ break; ++ ++ case ATH79_SOC_AR7242: ++ ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, ++ AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000, ++ AR71XX_ETH0_PLL_SHIFT); ++ /* fall through */ ++ default: ++ mdio_dev = &ath79_mdio0_device; ++ mdio_data = &ath79_mdio0_data; ++ break; ++ } ++ ++ mdio_data->phy_mask = phy_mask; ++ ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7240: ++ mdio_data->is_ar7240 = 1; ++ /* fall through */ ++ case ATH79_SOC_AR7241: ++ mdio_data->builtin_switch = 1; ++ break; ++ ++ case ATH79_SOC_AR9330: ++ mdio_data->is_ar9330 = 1; ++ /* fall through */ ++ case ATH79_SOC_AR9331: ++ mdio_data->builtin_switch = 1; ++ break; ++ ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ if (id == 1) { ++ mdio_data->builtin_switch = 1; ++ mdio_data->ref_clock = ar934x_get_mdio_ref_clock(); ++ mdio_data->mdio_clock = 6250000; ++ } ++ mdio_data->is_ar934x = 1; ++ break; ++ ++ case ATH79_SOC_QCA9533: ++ case ATH79_SOC_QCA9561: ++ case ATH79_SOC_TP9343: ++ mdio_data->builtin_switch = 1; ++ break; ++ ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ mdio_data->is_ar934x = 1; ++ break; ++ ++ default: ++ break; ++ } ++ ++ platform_device_register(mdio_dev); ++} ++ ++struct ath79_eth_pll_data ath79_eth0_pll_data; ++struct ath79_eth_pll_data ath79_eth1_pll_data; ++ ++static u32 ath79_get_eth_pll(unsigned int mac, int speed) ++{ ++ struct ath79_eth_pll_data *pll_data; ++ u32 pll_val; ++ ++ switch (mac) { ++ case 0: ++ pll_data = &ath79_eth0_pll_data; ++ break; ++ case 1: ++ pll_data = &ath79_eth1_pll_data; ++ break; ++ default: ++ BUG(); ++ } ++ ++ switch (speed) { ++ case SPEED_10: ++ pll_val = pll_data->pll_10; ++ break; ++ case SPEED_100: ++ pll_val = pll_data->pll_100; ++ break; ++ case SPEED_1000: ++ pll_val = pll_data->pll_1000; ++ break; ++ default: ++ BUG(); ++ } ++ ++ return pll_val; ++} ++ ++static void ath79_set_speed_ge0(int speed) ++{ ++ u32 val = ath79_get_eth_pll(0, speed); ++ ++ ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, ++ val, AR71XX_ETH0_PLL_SHIFT); ++ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); ++} ++ ++static void ath79_set_speed_ge1(int speed) ++{ ++ u32 val = ath79_get_eth_pll(1, speed); ++ ++ ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, ++ val, AR71XX_ETH1_PLL_SHIFT); ++ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); ++} ++ ++static void ar7242_set_speed_ge0(int speed) ++{ ++ u32 val = ath79_get_eth_pll(0, speed); ++ void __iomem *base; ++ ++ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK); ++ iounmap(base); ++} ++ ++static void ar91xx_set_speed_ge0(int speed) ++{ ++ u32 val = ath79_get_eth_pll(0, speed); ++ ++ ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH0_INT_CLOCK, ++ val, AR913X_ETH0_PLL_SHIFT); ++ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); ++} ++ ++static void ar91xx_set_speed_ge1(int speed) ++{ ++ u32 val = ath79_get_eth_pll(1, speed); ++ ++ ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH1_INT_CLOCK, ++ val, AR913X_ETH1_PLL_SHIFT); ++ ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); ++} ++ ++static void ar934x_set_speed_ge0(int speed) ++{ ++ void __iomem *base; ++ u32 val = ath79_get_eth_pll(0, speed); ++ ++ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ __raw_writel(val, base + AR934X_PLL_ETH_XMII_CONTROL_REG); ++ iounmap(base); ++} ++ ++static void qca955x_set_speed_xmii(int speed) ++{ ++ void __iomem *base; ++ u32 val = ath79_get_eth_pll(0, speed); ++ ++ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ __raw_writel(val, base + QCA955X_PLL_ETH_XMII_CONTROL_REG); ++ iounmap(base); ++} ++ ++static void qca955x_set_speed_sgmii(int speed) ++{ ++ void __iomem *base; ++ u32 val = ath79_get_eth_pll(1, speed); ++ ++ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ __raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG); ++ iounmap(base); ++} ++ ++static void ath79_set_speed_dummy(int speed) ++{ ++} ++ ++static void ath79_ddr_no_flush(void) ++{ ++} ++ ++static void ath79_ddr_flush_ge0(void) ++{ ++ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); ++} ++ ++static void ath79_ddr_flush_ge1(void) ++{ ++ ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE1); ++} ++ ++static void ar724x_ddr_flush_ge0(void) ++{ ++ ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE0); ++} ++ ++static void ar724x_ddr_flush_ge1(void) ++{ ++ ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE1); ++} ++ ++static void ar91xx_ddr_flush_ge0(void) ++{ ++ ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE0); ++} ++ ++static void ar91xx_ddr_flush_ge1(void) ++{ ++ ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE1); ++} ++ ++static void ar933x_ddr_flush_ge0(void) ++{ ++ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE0); ++} ++ ++static void ar933x_ddr_flush_ge1(void) ++{ ++ ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); ++} ++ ++static struct resource ath79_eth0_resources[] = { ++ { ++ .name = "mac_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE0_BASE, ++ .end = AR71XX_GE0_BASE + 0x200 - 1, ++ }, { ++ .name = "mac_irq", ++ .flags = IORESOURCE_IRQ, ++ .start = ATH79_CPU_IRQ(4), ++ .end = ATH79_CPU_IRQ(4), ++ }, ++}; ++ ++struct ag71xx_platform_data ath79_eth0_data = { ++ .reset_bit = AR71XX_RESET_GE0_MAC, ++}; ++ ++struct platform_device ath79_eth0_device = { ++ .name = "ag71xx", ++ .id = 0, ++ .resource = ath79_eth0_resources, ++ .num_resources = ARRAY_SIZE(ath79_eth0_resources), ++ .dev = { ++ .platform_data = &ath79_eth0_data, ++ }, ++}; ++ ++static struct resource ath79_eth1_resources[] = { ++ { ++ .name = "mac_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE1_BASE, ++ .end = AR71XX_GE1_BASE + 0x200 - 1, ++ }, { ++ .name = "mac_irq", ++ .flags = IORESOURCE_IRQ, ++ .start = ATH79_CPU_IRQ(5), ++ .end = ATH79_CPU_IRQ(5), ++ }, ++}; ++ ++struct ag71xx_platform_data ath79_eth1_data = { ++ .reset_bit = AR71XX_RESET_GE1_MAC, ++}; ++ ++struct platform_device ath79_eth1_device = { ++ .name = "ag71xx", ++ .id = 1, ++ .resource = ath79_eth1_resources, ++ .num_resources = ARRAY_SIZE(ath79_eth1_resources), ++ .dev = { ++ .platform_data = &ath79_eth1_data, ++ }, ++}; ++ ++struct ag71xx_switch_platform_data ath79_switch_data; ++ ++#define AR71XX_PLL_VAL_1000 0x00110000 ++#define AR71XX_PLL_VAL_100 0x00001099 ++#define AR71XX_PLL_VAL_10 0x00991099 ++ ++#define AR724X_PLL_VAL_1000 0x00110000 ++#define AR724X_PLL_VAL_100 0x00001099 ++#define AR724X_PLL_VAL_10 0x00991099 ++ ++#define AR7242_PLL_VAL_1000 0x16000000 ++#define AR7242_PLL_VAL_100 0x00000101 ++#define AR7242_PLL_VAL_10 0x00001616 ++ ++#define AR913X_PLL_VAL_1000 0x1a000000 ++#define AR913X_PLL_VAL_100 0x13000a44 ++#define AR913X_PLL_VAL_10 0x00441099 ++ ++#define AR933X_PLL_VAL_1000 0x00110000 ++#define AR933X_PLL_VAL_100 0x00001099 ++#define AR933X_PLL_VAL_10 0x00991099 ++ ++#define AR934X_PLL_VAL_1000 0x16000000 ++#define AR934X_PLL_VAL_100 0x00000101 ++#define AR934X_PLL_VAL_10 0x00001616 ++ ++static void __init ath79_init_eth_pll_data(unsigned int id) ++{ ++ struct ath79_eth_pll_data *pll_data; ++ u32 pll_10, pll_100, pll_1000; ++ ++ switch (id) { ++ case 0: ++ pll_data = &ath79_eth0_pll_data; ++ break; ++ case 1: ++ pll_data = &ath79_eth1_pll_data; ++ break; ++ default: ++ BUG(); ++ } ++ ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7130: ++ case ATH79_SOC_AR7141: ++ case ATH79_SOC_AR7161: ++ pll_10 = AR71XX_PLL_VAL_10; ++ pll_100 = AR71XX_PLL_VAL_100; ++ pll_1000 = AR71XX_PLL_VAL_1000; ++ break; ++ ++ case ATH79_SOC_AR7240: ++ case ATH79_SOC_AR7241: ++ pll_10 = AR724X_PLL_VAL_10; ++ pll_100 = AR724X_PLL_VAL_100; ++ pll_1000 = AR724X_PLL_VAL_1000; ++ break; ++ ++ case ATH79_SOC_AR7242: ++ pll_10 = AR7242_PLL_VAL_10; ++ pll_100 = AR7242_PLL_VAL_100; ++ pll_1000 = AR7242_PLL_VAL_1000; ++ break; ++ ++ case ATH79_SOC_AR9130: ++ case ATH79_SOC_AR9132: ++ pll_10 = AR913X_PLL_VAL_10; ++ pll_100 = AR913X_PLL_VAL_100; ++ pll_1000 = AR913X_PLL_VAL_1000; ++ break; ++ ++ case ATH79_SOC_AR9330: ++ case ATH79_SOC_AR9331: ++ pll_10 = AR933X_PLL_VAL_10; ++ pll_100 = AR933X_PLL_VAL_100; ++ pll_1000 = AR933X_PLL_VAL_1000; ++ break; ++ ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ case ATH79_SOC_QCA9533: ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ case ATH79_SOC_QCA9561: ++ case ATH79_SOC_TP9343: ++ pll_10 = AR934X_PLL_VAL_10; ++ pll_100 = AR934X_PLL_VAL_100; ++ pll_1000 = AR934X_PLL_VAL_1000; ++ break; ++ ++ default: ++ BUG(); ++ } ++ ++ if (!pll_data->pll_10) ++ pll_data->pll_10 = pll_10; ++ ++ if (!pll_data->pll_100) ++ pll_data->pll_100 = pll_100; ++ ++ if (!pll_data->pll_1000) ++ pll_data->pll_1000 = pll_1000; ++} ++ ++static int __init ath79_setup_phy_if_mode(unsigned int id, ++ struct ag71xx_platform_data *pdata) ++{ ++ unsigned int mii_if; ++ ++ switch (id) { ++ case 0: ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7130: ++ case ATH79_SOC_AR7141: ++ case ATH79_SOC_AR7161: ++ case ATH79_SOC_AR9130: ++ case ATH79_SOC_AR9132: ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_MII: ++ mii_if = AR71XX_MII0_CTRL_IF_MII; ++ break; ++ case PHY_INTERFACE_MODE_GMII: ++ mii_if = AR71XX_MII0_CTRL_IF_GMII; ++ break; ++ case PHY_INTERFACE_MODE_RGMII: ++ mii_if = AR71XX_MII0_CTRL_IF_RGMII; ++ break; ++ case PHY_INTERFACE_MODE_RMII: ++ mii_if = AR71XX_MII0_CTRL_IF_RMII; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII0_CTRL, mii_if); ++ break; ++ ++ case ATH79_SOC_AR7240: ++ case ATH79_SOC_AR7241: ++ case ATH79_SOC_AR9330: ++ case ATH79_SOC_AR9331: ++ case ATH79_SOC_QCA9533: ++ case ATH79_SOC_TP9343: ++ pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; ++ break; ++ ++ case ATH79_SOC_AR7242: ++ /* FIXME */ ++ ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_MII: ++ case PHY_INTERFACE_MODE_GMII: ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RMII: ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_MII: ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_SGMII: ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ case ATH79_SOC_QCA9561: ++ if (!pdata->phy_if_mode) ++ pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; ++ break; ++ ++ default: ++ BUG(); ++ } ++ break; ++ case 1: ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7130: ++ case ATH79_SOC_AR7141: ++ case ATH79_SOC_AR7161: ++ case ATH79_SOC_AR9130: ++ case ATH79_SOC_AR9132: ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_RMII: ++ mii_if = AR71XX_MII1_CTRL_IF_RMII; ++ break; ++ case PHY_INTERFACE_MODE_RGMII: ++ mii_if = AR71XX_MII1_CTRL_IF_RGMII; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII1_CTRL, mii_if); ++ break; ++ ++ case ATH79_SOC_AR7240: ++ case ATH79_SOC_AR7241: ++ case ATH79_SOC_AR9330: ++ case ATH79_SOC_AR9331: ++ case ATH79_SOC_QCA9561: ++ case ATH79_SOC_TP9343: ++ pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ break; ++ ++ case ATH79_SOC_AR7242: ++ /* FIXME */ ++ ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ case ATH79_SOC_QCA9533: ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_MII: ++ case PHY_INTERFACE_MODE_GMII: ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_MII: ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_SGMII: ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ default: ++ BUG(); ++ } ++ break; ++ } ++ ++ return 0; ++} ++ ++void __init ath79_setup_ar933x_phy4_switch(bool mac, bool mdio) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ base = ioremap(AR933X_GMAC_BASE, AR933X_GMAC_SIZE); ++ ++ t = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG); ++ t &= ~(AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); ++ if (mac) ++ t |= AR933X_ETH_CFG_SW_PHY_SWAP; ++ if (mdio) ++ t |= AR933X_ETH_CFG_SW_PHY_ADDR_SWAP; ++ __raw_writel(t, base + AR933X_GMAC_REG_ETH_CFG); ++ ++ iounmap(base); ++} ++ ++void __init ath79_setup_ar934x_eth_cfg(u32 mask) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); ++ ++ t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); ++ ++ t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_MII_GMAC0 | ++ AR934X_ETH_CFG_GMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE | ++ AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ t |= mask; ++ ++ __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); ++ /* flush write */ ++ __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); ++ ++ iounmap(base); ++} ++ ++void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, ++ unsigned int rxdv) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ rxd &= AR934X_ETH_CFG_RXD_DELAY_MASK; ++ rxdv &= AR934X_ETH_CFG_RDV_DELAY_MASK; ++ ++ base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); ++ ++ t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); ++ ++ t &= ~(AR934X_ETH_CFG_RXD_DELAY_MASK << AR934X_ETH_CFG_RXD_DELAY_SHIFT | ++ AR934X_ETH_CFG_RDV_DELAY_MASK << AR934X_ETH_CFG_RDV_DELAY_SHIFT); ++ ++ t |= (rxd << AR934X_ETH_CFG_RXD_DELAY_SHIFT | ++ rxdv << AR934X_ETH_CFG_RDV_DELAY_SHIFT); ++ ++ __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); ++ /* flush write */ ++ __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); ++ ++ iounmap(base); ++} ++ ++void __init ath79_setup_qca955x_eth_cfg(u32 mask) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); ++ ++ t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); ++ ++ t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); ++ ++ t |= mask; ++ ++ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); ++ ++ iounmap(base); ++} ++ ++static int ath79_eth_instance __initdata; ++void __init ath79_register_eth(unsigned int id) ++{ ++ struct platform_device *pdev; ++ struct ag71xx_platform_data *pdata; ++ int err; ++ ++ if (id > 1) { ++ printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); ++ return; ++ } ++ ++ ath79_init_eth_pll_data(id); ++ ++ if (id == 0) ++ pdev = &ath79_eth0_device; ++ else ++ pdev = &ath79_eth1_device; ++ ++ pdata = pdev->dev.platform_data; ++ ++ pdata->max_frame_len = 1540; ++ pdata->desc_pktlen_mask = 0xfff; ++ ++ err = ath79_setup_phy_if_mode(id, pdata); ++ if (err) { ++ printk(KERN_ERR ++ "ar71xx: invalid PHY interface mode for GE%u\n", id); ++ return; ++ } ++ ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7130: ++ if (id == 0) { ++ pdata->ddr_flush = ath79_ddr_flush_ge0; ++ pdata->set_speed = ath79_set_speed_ge0; ++ } else { ++ pdata->ddr_flush = ath79_ddr_flush_ge1; ++ pdata->set_speed = ath79_set_speed_ge1; ++ } ++ break; ++ ++ case ATH79_SOC_AR7141: ++ case ATH79_SOC_AR7161: ++ if (id == 0) { ++ pdata->ddr_flush = ath79_ddr_flush_ge0; ++ pdata->set_speed = ath79_set_speed_ge0; ++ } else { ++ pdata->ddr_flush = ath79_ddr_flush_ge1; ++ pdata->set_speed = ath79_set_speed_ge1; ++ } ++ pdata->has_gbit = 1; ++ break; ++ ++ case ATH79_SOC_AR7242: ++ if (id == 0) { ++ pdata->reset_bit |= AR724X_RESET_GE0_MDIO | ++ AR71XX_RESET_GE0_PHY; ++ pdata->ddr_flush = ar724x_ddr_flush_ge0; ++ pdata->set_speed = ar7242_set_speed_ge0; ++ } else { ++ pdata->reset_bit |= AR724X_RESET_GE1_MDIO | ++ AR71XX_RESET_GE1_PHY; ++ pdata->ddr_flush = ar724x_ddr_flush_ge1; ++ pdata->set_speed = ath79_set_speed_dummy; ++ } ++ pdata->has_gbit = 1; ++ pdata->is_ar724x = 1; ++ ++ if (!pdata->fifo_cfg1) ++ pdata->fifo_cfg1 = 0x0010ffff; ++ if (!pdata->fifo_cfg2) ++ pdata->fifo_cfg2 = 0x015500aa; ++ if (!pdata->fifo_cfg3) ++ pdata->fifo_cfg3 = 0x01f00140; ++ break; ++ ++ case ATH79_SOC_AR7241: ++ if (id == 0) ++ pdata->reset_bit |= AR724X_RESET_GE0_MDIO; ++ else ++ pdata->reset_bit |= AR724X_RESET_GE1_MDIO; ++ /* fall through */ ++ case ATH79_SOC_AR7240: ++ if (id == 0) { ++ pdata->reset_bit |= AR71XX_RESET_GE0_PHY; ++ pdata->ddr_flush = ar724x_ddr_flush_ge0; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ pdata->phy_mask = BIT(4); ++ } else { ++ pdata->reset_bit |= AR71XX_RESET_GE1_PHY; ++ pdata->ddr_flush = ar724x_ddr_flush_ge1; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ pdata->speed = SPEED_1000; ++ pdata->duplex = DUPLEX_FULL; ++ pdata->switch_data = &ath79_switch_data; ++ ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ } ++ pdata->has_gbit = 1; ++ pdata->is_ar724x = 1; ++ if (ath79_soc == ATH79_SOC_AR7240) ++ pdata->is_ar7240 = 1; ++ ++ if (!pdata->fifo_cfg1) ++ pdata->fifo_cfg1 = 0x0010ffff; ++ if (!pdata->fifo_cfg2) ++ pdata->fifo_cfg2 = 0x015500aa; ++ if (!pdata->fifo_cfg3) ++ pdata->fifo_cfg3 = 0x01f00140; ++ break; ++ ++ case ATH79_SOC_AR9130: ++ if (id == 0) { ++ pdata->ddr_flush = ar91xx_ddr_flush_ge0; ++ pdata->set_speed = ar91xx_set_speed_ge0; ++ } else { ++ pdata->ddr_flush = ar91xx_ddr_flush_ge1; ++ pdata->set_speed = ar91xx_set_speed_ge1; ++ } ++ pdata->is_ar91xx = 1; ++ break; ++ ++ case ATH79_SOC_AR9132: ++ if (id == 0) { ++ pdata->ddr_flush = ar91xx_ddr_flush_ge0; ++ pdata->set_speed = ar91xx_set_speed_ge0; ++ } else { ++ pdata->ddr_flush = ar91xx_ddr_flush_ge1; ++ pdata->set_speed = ar91xx_set_speed_ge1; ++ } ++ pdata->is_ar91xx = 1; ++ pdata->has_gbit = 1; ++ break; ++ ++ case ATH79_SOC_AR9330: ++ case ATH79_SOC_AR9331: ++ if (id == 0) { ++ pdata->reset_bit = AR933X_RESET_GE0_MAC | ++ AR933X_RESET_GE0_MDIO; ++ pdata->ddr_flush = ar933x_ddr_flush_ge0; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ pdata->phy_mask = BIT(4); ++ } else { ++ pdata->reset_bit = AR933X_RESET_GE1_MAC | ++ AR933X_RESET_GE1_MDIO; ++ pdata->ddr_flush = ar933x_ddr_flush_ge1; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ pdata->speed = SPEED_1000; ++ pdata->has_gbit = 1; ++ pdata->duplex = DUPLEX_FULL; ++ pdata->switch_data = &ath79_switch_data; ++ ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ } ++ ++ pdata->is_ar724x = 1; ++ ++ if (!pdata->fifo_cfg1) ++ pdata->fifo_cfg1 = 0x0010ffff; ++ if (!pdata->fifo_cfg2) ++ pdata->fifo_cfg2 = 0x015500aa; ++ if (!pdata->fifo_cfg3) ++ pdata->fifo_cfg3 = 0x01f00140; ++ break; ++ ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ case ATH79_SOC_QCA9533: ++ if (id == 0) { ++ pdata->reset_bit = AR934X_RESET_GE0_MAC | ++ AR934X_RESET_GE0_MDIO; ++ pdata->set_speed = ar934x_set_speed_ge0; ++ } else { ++ pdata->reset_bit = AR934X_RESET_GE1_MAC | ++ AR934X_RESET_GE1_MDIO; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ pdata->switch_data = &ath79_switch_data; ++ ++ /* reset the built-in switch */ ++ ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); ++ ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); ++ } ++ ++ pdata->ddr_flush = ath79_ddr_no_flush; ++ pdata->has_gbit = 1; ++ pdata->is_ar724x = 1; ++ ++ pdata->max_frame_len = SZ_16K - 1; ++ pdata->desc_pktlen_mask = SZ_16K - 1; ++ ++ if (!pdata->fifo_cfg1) ++ pdata->fifo_cfg1 = 0x0010ffff; ++ if (!pdata->fifo_cfg2) ++ pdata->fifo_cfg2 = 0x015500aa; ++ if (!pdata->fifo_cfg3) ++ pdata->fifo_cfg3 = 0x01f00140; ++ break; ++ ++ case ATH79_SOC_QCA9561: ++ case ATH79_SOC_TP9343: ++ if (id == 0) { ++ pdata->reset_bit = AR933X_RESET_GE0_MAC | ++ AR933X_RESET_GE0_MDIO; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ if (!pdata->phy_mask) ++ pdata->phy_mask = BIT(4); ++ } else { ++ pdata->reset_bit = AR933X_RESET_GE1_MAC | ++ AR933X_RESET_GE1_MDIO; ++ pdata->set_speed = ath79_set_speed_dummy; ++ ++ pdata->speed = SPEED_1000; ++ pdata->duplex = DUPLEX_FULL; ++ pdata->switch_data = &ath79_switch_data; ++ ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ } ++ ++ pdata->ddr_flush = ath79_ddr_no_flush; ++ pdata->has_gbit = 1; ++ pdata->is_ar724x = 1; ++ ++ if (!pdata->fifo_cfg1) ++ pdata->fifo_cfg1 = 0x0010ffff; ++ if (!pdata->fifo_cfg2) ++ pdata->fifo_cfg2 = 0x015500aa; ++ if (!pdata->fifo_cfg3) ++ pdata->fifo_cfg3 = 0x01f00140; ++ break; ++ ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ if (id == 0) { ++ pdata->reset_bit = QCA955X_RESET_GE0_MAC | ++ QCA955X_RESET_GE0_MDIO; ++ pdata->set_speed = qca955x_set_speed_xmii; ++ } else { ++ pdata->reset_bit = QCA955X_RESET_GE1_MAC | ++ QCA955X_RESET_GE1_MDIO; ++ pdata->set_speed = qca955x_set_speed_sgmii; ++ } ++ ++ pdata->ddr_flush = ath79_ddr_no_flush; ++ pdata->has_gbit = 1; ++ pdata->is_ar724x = 1; ++ ++ /* ++ * Limit the maximum frame length to 4095 bytes. ++ * Although the documentation says that the hardware ++ * limit is 16383 bytes but that does not work in ++ * practice. It seems that the hardware only updates ++ * the lowest 12 bits of the packet length field ++ * in the RX descriptor. ++ */ ++ pdata->max_frame_len = SZ_4K - 1; ++ pdata->desc_pktlen_mask = SZ_16K - 1; ++ ++ if (!pdata->fifo_cfg1) ++ pdata->fifo_cfg1 = 0x0010ffff; ++ if (!pdata->fifo_cfg2) ++ pdata->fifo_cfg2 = 0x015500aa; ++ if (!pdata->fifo_cfg3) ++ pdata->fifo_cfg3 = 0x01f00140; ++ break; ++ ++ default: ++ BUG(); ++ } ++ ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_GMII: ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_SGMII: ++ if (!pdata->has_gbit) { ++ printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", ++ id); ++ return; ++ } ++ /* fallthrough */ ++ default: ++ break; ++ } ++ ++ if (!is_valid_ether_addr(pdata->mac_addr)) { ++ random_ether_addr(pdata->mac_addr); ++ printk(KERN_DEBUG ++ "ar71xx: using random MAC address for eth%d\n", ++ ath79_eth_instance); ++ } ++ ++ if (pdata->mii_bus_dev == NULL) { ++ switch (ath79_soc) { ++ case ATH79_SOC_AR9341: ++ case ATH79_SOC_AR9342: ++ case ATH79_SOC_AR9344: ++ if (id == 0) ++ pdata->mii_bus_dev = &ath79_mdio0_device.dev; ++ else ++ pdata->mii_bus_dev = &ath79_mdio1_device.dev; ++ break; ++ ++ case ATH79_SOC_AR7241: ++ case ATH79_SOC_AR9330: ++ case ATH79_SOC_AR9331: ++ case ATH79_SOC_QCA9533: ++ case ATH79_SOC_QCA9561: ++ case ATH79_SOC_TP9343: ++ pdata->mii_bus_dev = &ath79_mdio1_device.dev; ++ break; ++ ++ case ATH79_SOC_QCA9556: ++ case ATH79_SOC_QCA9558: ++ /* don't assign any MDIO device by default */ ++ break; ++ ++ default: ++ pdata->mii_bus_dev = &ath79_mdio0_device.dev; ++ break; ++ } ++ } ++ ++ /* Reset the device */ ++ ath79_device_reset_set(pdata->reset_bit); ++ msleep(100); ++ ++ ath79_device_reset_clear(pdata->reset_bit); ++ msleep(100); ++ ++ platform_device_register(pdev); ++ ath79_eth_instance++; ++} ++ ++void __init ath79_set_mac_base(unsigned char *mac) ++{ ++ memcpy(ath79_mac_base, mac, ETH_ALEN); ++} ++ ++void __init ath79_parse_ascii_mac(char *mac_str, u8 *mac) ++{ ++ int t; ++ ++ t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", ++ &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); ++ ++ if (t != ETH_ALEN) ++ t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", ++ &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); ++ ++ if (t != ETH_ALEN || !is_valid_ether_addr(mac)) { ++ memset(mac, 0, ETH_ALEN); ++ printk(KERN_DEBUG "ar71xx: invalid mac address \"%s\"\n", ++ mac_str); ++ } ++} ++ ++static void __init ath79_set_mac_base_ascii(char *str) ++{ ++ u8 mac[ETH_ALEN]; ++ ++ ath79_parse_ascii_mac(str, mac); ++ ath79_set_mac_base(mac); ++} ++ ++static int __init ath79_ethaddr_setup(char *str) ++{ ++ ath79_set_mac_base_ascii(str); ++ return 1; ++} ++__setup("ethaddr=", ath79_ethaddr_setup); ++ ++static int __init ath79_kmac_setup(char *str) ++{ ++ ath79_set_mac_base_ascii(str); ++ return 1; ++} ++__setup("kmac=", ath79_kmac_setup); ++ ++void __init ath79_init_mac(unsigned char *dst, const unsigned char *src, ++ int offset) ++{ ++ int t; ++ ++ if (!dst) ++ return; ++ ++ if (!src || !is_valid_ether_addr(src)) { ++ memset(dst, '\0', ETH_ALEN); ++ return; ++ } ++ ++ t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); ++ t += offset; ++ ++ dst[0] = src[0]; ++ dst[1] = src[1]; ++ dst[2] = src[2]; ++ dst[3] = (t >> 16) & 0xff; ++ dst[4] = (t >> 8) & 0xff; ++ dst[5] = t & 0xff; ++} ++ ++void __init ath79_init_local_mac(unsigned char *dst, const unsigned char *src) ++{ ++ int i; ++ ++ if (!dst) ++ return; ++ ++ if (!src || !is_valid_ether_addr(src)) { ++ memset(dst, '\0', ETH_ALEN); ++ return; ++ } ++ ++ for (i = 0; i < ETH_ALEN; i++) ++ dst[i] = src[i]; ++ dst[0] |= 0x02; ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-eth.h linux-4.1.13/arch/mips/ath79/dev-eth.h +--- linux-4.1.13.orig/arch/mips/ath79/dev-eth.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-eth.h 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,53 @@ ++/* ++ * Atheros AR71xx SoC device definitions ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_DEV_ETH_H ++#define _ATH79_DEV_ETH_H ++ ++#include ++ ++struct platform_device; ++ ++extern unsigned char ath79_mac_base[] __initdata; ++void ath79_parse_ascii_mac(char *mac_str, u8 *mac); ++void ath79_init_mac(unsigned char *dst, const unsigned char *src, ++ int offset); ++void ath79_init_local_mac(unsigned char *dst, const unsigned char *src); ++ ++struct ath79_eth_pll_data { ++ u32 pll_10; ++ u32 pll_100; ++ u32 pll_1000; ++}; ++ ++extern struct ath79_eth_pll_data ath79_eth0_pll_data; ++extern struct ath79_eth_pll_data ath79_eth1_pll_data; ++ ++extern struct ag71xx_platform_data ath79_eth0_data; ++extern struct ag71xx_platform_data ath79_eth1_data; ++extern struct platform_device ath79_eth0_device; ++extern struct platform_device ath79_eth1_device; ++void ath79_register_eth(unsigned int id); ++ ++extern struct ag71xx_switch_platform_data ath79_switch_data; ++ ++extern struct ag71xx_mdio_platform_data ath79_mdio0_data; ++extern struct ag71xx_mdio_platform_data ath79_mdio1_data; ++extern struct platform_device ath79_mdio0_device; ++extern struct platform_device ath79_mdio1_device; ++void ath79_register_mdio(unsigned int id, u32 phy_mask); ++ ++void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); ++void ath79_setup_ar934x_eth_cfg(u32 mask); ++void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); ++void ath79_setup_qca955x_eth_cfg(u32 mask); ++ ++#endif /* _ATH79_DEV_ETH_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.c linux-4.1.13/arch/mips/ath79/dev-m25p80.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-m25p80.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,118 @@ ++/* ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "dev-spi.h" ++#include "dev-m25p80.h" ++ ++static struct ath79_spi_controller_data ath79_spi0_cdata = ++{ ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 0, ++}; ++ ++static struct ath79_spi_controller_data ath79_spi1_cdata = ++{ ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 1, ++}; ++ ++static struct spi_board_info ath79_spi_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .max_speed_hz = 25000000, ++ .modalias = "m25p80", ++ .controller_data = &ath79_spi0_cdata, ++ }, ++ { ++ .bus_num = 0, ++ .chip_select = 1, ++ .max_speed_hz = 25000000, ++ .modalias = "m25p80", ++ .controller_data = &ath79_spi1_cdata, ++ } ++}; ++ ++static struct ath79_spi_platform_data ath79_spi_data; ++ ++void __init ath79_register_m25p80(struct flash_platform_data *pdata) ++{ ++ ath79_spi_data.bus_num = 0; ++ ath79_spi_data.num_chipselect = 1; ++ ath79_spi0_cdata.is_flash = true; ++ ath79_spi_info[0].platform_data = pdata; ++ ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); ++} ++ ++static struct flash_platform_data *multi_pdata; ++ ++static struct mtd_info *concat_devs[2] = { NULL, NULL }; ++static struct work_struct mtd_concat_work; ++ ++static void mtd_concat_add_work(struct work_struct *work) ++{ ++ struct mtd_info *mtd; ++ ++ mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash"); ++ ++ mtd_device_register(mtd, multi_pdata->parts, multi_pdata->nr_parts); ++} ++ ++static void mtd_concat_add(struct mtd_info *mtd) ++{ ++ static bool registered = false; ++ ++ if (registered) ++ return; ++ ++ if (!strcmp(mtd->name, "spi0.0")) ++ concat_devs[0] = mtd; ++ else if (!strcmp(mtd->name, "spi0.1")) ++ concat_devs[1] = mtd; ++ else ++ return; ++ ++ if (!concat_devs[0] || !concat_devs[1]) ++ return; ++ ++ registered = true; ++ INIT_WORK(&mtd_concat_work, mtd_concat_add_work); ++ schedule_work(&mtd_concat_work); ++} ++ ++static void mtd_concat_remove(struct mtd_info *mtd) ++{ ++} ++ ++static void add_mtd_concat_notifier(void) ++{ ++ static struct mtd_notifier not = { ++ .add = mtd_concat_add, ++ .remove = mtd_concat_remove, ++ }; ++ ++ register_mtd_user(¬); ++} ++ ++ ++void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) ++{ ++ multi_pdata = pdata; ++ add_mtd_concat_notifier(); ++ ath79_spi_data.bus_num = 0; ++ ath79_spi_data.num_chipselect = 2; ++ ath79_spi0_cdata.is_flash = true; ++ ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.h linux-4.1.13/arch/mips/ath79/dev-m25p80.h +--- linux-4.1.13.orig/arch/mips/ath79/dev-m25p80.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-m25p80.h 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,17 @@ ++/* ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_DEV_M25P80_H ++#define _ATH79_DEV_M25P80_H ++ ++#include ++ ++void ath79_register_m25p80(struct flash_platform_data *pdata) __init; ++void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; ++ ++#endif /* _ATH79_DEV_M25P80_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-nfc.c linux-4.1.13/arch/mips/ath79/dev-nfc.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-nfc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-nfc.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,141 @@ ++/* ++ * Atheros AR934X SoCs built-in NAND flash controller support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "dev-nfc.h" ++ ++static struct resource ath79_nfc_resources[2]; ++static u64 ar934x_nfc_dmamask = DMA_BIT_MASK(32); ++static struct ar934x_nfc_platform_data ath79_nfc_data; ++ ++static struct platform_device ath79_nfc_device = { ++ .name = AR934X_NFC_DRIVER_NAME, ++ .id = -1, ++ .resource = ath79_nfc_resources, ++ .num_resources = ARRAY_SIZE(ath79_nfc_resources), ++ .dev = { ++ .dma_mask = &ar934x_nfc_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ .platform_data = &ath79_nfc_data, ++ }, ++}; ++ ++static void __init ath79_nfc_init_resource(struct resource res[2], ++ unsigned long base, ++ unsigned long size, ++ int irq) ++{ ++ memset(res, 0, sizeof(struct resource) * 2); ++ ++ res[0].flags = IORESOURCE_MEM; ++ res[0].start = base; ++ res[0].end = base + size - 1; ++ ++ res[1].flags = IORESOURCE_IRQ; ++ res[1].start = irq; ++ res[1].end = irq; ++} ++ ++static void ar934x_nfc_hw_reset(bool active) ++{ ++ if (active) { ++ ath79_device_reset_set(AR934X_RESET_NANDF); ++ udelay(100); ++ ++ ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG); ++ udelay(250); ++ } else { ++ ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG); ++ udelay(250); ++ ++ ath79_device_reset_clear(AR934X_RESET_NANDF); ++ udelay(100); ++ } ++} ++ ++static void ar934x_nfc_setup(void) ++{ ++ ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset; ++ ++ ath79_nfc_init_resource(ath79_nfc_resources, ++ AR934X_NFC_BASE, AR934X_NFC_SIZE, ++ ATH79_MISC_IRQ(21)); ++ ++ platform_device_register(&ath79_nfc_device); ++} ++ ++static void qca955x_nfc_hw_reset(bool active) ++{ ++ if (active) { ++ ath79_device_reset_set(QCA955X_RESET_NANDF); ++ udelay(250); ++ } else { ++ ath79_device_reset_clear(QCA955X_RESET_NANDF); ++ udelay(100); ++ } ++} ++ ++static void qca955x_nfc_setup(void) ++{ ++ ath79_nfc_data.hw_reset = qca955x_nfc_hw_reset; ++ ++ ath79_nfc_init_resource(ath79_nfc_resources, ++ QCA955X_NFC_BASE, QCA955X_NFC_SIZE, ++ ATH79_MISC_IRQ(21)); ++ ++ platform_device_register(&ath79_nfc_device); ++} ++ ++void __init ath79_nfc_set_select_chip(void (*f)(int chip_no)) ++{ ++ ath79_nfc_data.select_chip = f; ++} ++ ++void __init ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) ++{ ++ ath79_nfc_data.scan_fixup = f; ++} ++ ++void __init ath79_nfc_set_swap_dma(bool enable) ++{ ++ ath79_nfc_data.swap_dma = enable; ++} ++ ++void __init ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) ++{ ++ ath79_nfc_data.ecc_mode = mode; ++} ++ ++void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts) ++{ ++ ath79_nfc_data.parts = parts; ++ ath79_nfc_data.nr_parts = nr_parts; ++} ++ ++void __init ath79_register_nfc(void) ++{ ++ if (soc_is_ar934x()) ++ ar934x_nfc_setup(); ++ else if (soc_is_qca955x()) ++ qca955x_nfc_setup(); ++ else ++ BUG(); ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-nfc.h linux-4.1.13/arch/mips/ath79/dev-nfc.h +--- linux-4.1.13.orig/arch/mips/ath79/dev-nfc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-nfc.h 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,34 @@ ++/* ++ * Atheros AR934X SoCs built-in NAND Flash Controller support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_DEV_NFC_H ++#define _ATH79_DEV_NFC_H ++ ++struct mtd_partition; ++enum ar934x_nfc_ecc_mode; ++ ++#ifdef CONFIG_ATH79_DEV_NFC ++void ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts); ++void ath79_nfc_set_select_chip(void (*f)(int chip_no)); ++void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)); ++void ath79_nfc_set_swap_dma(bool enable); ++void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode); ++void ath79_register_nfc(void); ++#else ++static inline void ath79_nfc_set_parts(struct mtd_partition *parts, ++ int nr_parts) {} ++static inline void ath79_nfc_set_select_chip(void (*f)(int chip_no)) {} ++static inline void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) {} ++static inline void ath79_nfc_set_swap_dma(bool enable) {} ++static inline void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) {} ++static inline void ath79_register_nfc(void) {} ++#endif ++ ++#endif /* _ATH79_DEV_NFC_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-usb.c linux-4.1.13/arch/mips/ath79/dev-usb.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-usb.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-usb.c 2015-12-04 19:57:04.478071913 +0100 +@@ -37,6 +37,8 @@ + static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { + .caps_offset = 0x100, + .has_tt = 1, ++ .qca_force_host_mode = 1, ++ .qca_force_16bit_ptw = 1, + }; + + static void __init ath79_usb_register(const char *name, int id, +@@ -159,6 +161,9 @@ + ath79_device_reset_clear(AR913X_RESET_USB_PHY); + mdelay(10); + ++ ath79_ehci_pdata_v2.qca_force_host_mode = 0; ++ ath79_ehci_pdata_v2.qca_force_16bit_ptw = 0; ++ + ath79_usb_register("ehci-platform", -1, + AR913X_EHCI_BASE, AR913X_EHCI_SIZE, + ATH79_CPU_IRQ(3), +@@ -182,14 +187,34 @@ + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + +-static void __init ar934x_usb_setup(void) ++static void enable_tx_tx_idp_violation_fix(unsigned base) + { +- u32 bootstrap; ++ void __iomem *phy_reg; ++ u32 t; + +- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); +- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) ++ phy_reg = ioremap(base, 4); ++ if (!phy_reg) + return; + ++ t = ioread32(phy_reg); ++ t &= ~0xff; ++ t |= 0x58; ++ iowrite32(t, phy_reg); ++ ++ iounmap(phy_reg); ++} ++ ++static void ar934x_usb_reset_notifier(struct platform_device *pdev) ++{ ++ if (pdev->id != -1) ++ return; ++ ++ enable_tx_tx_idp_violation_fix(0x18116c94); ++ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); ++} ++ ++static void __init ar934x_usb_setup(void) ++{ + ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); + udelay(1000); + +@@ -202,14 +227,64 @@ + ath79_device_reset_clear(AR934X_RESET_USB_HOST); + udelay(1000); + ++ if (ath79_soc_rev >= 3) ++ ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; ++ + ath79_usb_register("ehci-platform", -1, + AR934X_EHCI_BASE, AR934X_EHCI_SIZE, + ATH79_CPU_IRQ(3), + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + ++static void __init qca953x_usb_setup(void) ++{ ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); ++ ++ ath79_device_reset_set(QCA953X_RESET_USBSUS_OVERRIDE); ++ udelay(1000); ++ ++ ath79_device_reset_clear(QCA953X_RESET_USB_PHY); ++ udelay(1000); ++ ++ ath79_device_reset_clear(QCA953X_RESET_USB_PHY_ANALOG); ++ udelay(1000); ++ ++ ath79_device_reset_clear(QCA953X_RESET_USB_HOST); ++ udelay(1000); ++ ++ ath79_usb_register("ehci-platform", -1, ++ QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE, ++ ATH79_CPU_IRQ(3), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++} ++ ++static void qca955x_usb_reset_notifier(struct platform_device *pdev) ++{ ++ u32 base; ++ ++ switch (pdev->id) { ++ case 0: ++ base = 0x18116c94; ++ break; ++ ++ case 1: ++ base = 0x18116e54; ++ break; ++ ++ default: ++ return; ++ } ++ ++ enable_tx_tx_idp_violation_fix(base); ++ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); ++} ++ + static void __init qca955x_usb_setup(void) + { ++ ath79_ehci_pdata_v2.reset_notifier = qca955x_usb_reset_notifier; ++ + ath79_usb_register("ehci-platform", 0, + QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, + ATH79_IP3_IRQ(0), +@@ -221,6 +296,19 @@ + &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); + } + ++static void __init qca956x_usb_setup(void) ++{ ++ ath79_usb_register("ehci-platform", 0, ++ QCA956X_EHCI0_BASE, QCA956X_EHCI_SIZE, ++ ATH79_IP3_IRQ(0), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ++ ath79_usb_register("ehci-platform", 1, ++ QCA956X_EHCI1_BASE, QCA956X_EHCI_SIZE, ++ ATH79_IP3_IRQ(1), ++ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++} ++ + void __init ath79_register_usb(void) + { + if (soc_is_ar71xx()) +@@ -235,8 +323,12 @@ + ar933x_usb_setup(); + else if (soc_is_ar934x()) + ar934x_usb_setup(); ++ else if (soc_is_qca953x()) ++ qca953x_usb_setup(); + else if (soc_is_qca955x()) + qca955x_usb_setup(); ++ else if (soc_is_qca9561()) ++ qca956x_usb_setup(); + else + BUG(); + } +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-wmac.c linux-4.1.13/arch/mips/ath79/dev-wmac.c +--- linux-4.1.13.orig/arch/mips/ath79/dev-wmac.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-wmac.c 2015-12-04 19:57:04.506070082 +0100 +@@ -15,14 +15,21 @@ + #include + #include + #include ++#include + #include + #include ++#include + + #include + #include ++#include "common.h" + #include "dev-wmac.h" + +-static struct ath9k_platform_data ath79_wmac_data; ++static u8 ath79_wmac_mac[ETH_ALEN]; ++ ++static struct ath9k_platform_data ath79_wmac_data = { ++ .led_pin = -1, ++}; + + static struct resource ath79_wmac_resources[] = { + { +@@ -44,7 +51,7 @@ + }, + }; + +-static void __init ar913x_wmac_setup(void) ++static int ar913x_wmac_reset(void) + { + /* reset the WMAC */ + ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); +@@ -53,22 +60,48 @@ + ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); + mdelay(10); + ++ return 0; ++} ++ ++static void __init ar913x_wmac_setup(void) ++{ ++ ar913x_wmac_reset(); ++ + ath79_wmac_resources[0].start = AR913X_WMAC_BASE; + ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; + ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); + ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); ++ ++ ath79_wmac_data.external_reset = ar913x_wmac_reset; + } + + + static int ar933x_wmac_reset(void) + { ++ int retries = 20; ++ + ath79_device_reset_set(AR933X_RESET_WMAC); + ath79_device_reset_clear(AR933X_RESET_WMAC); + +- return 0; ++ while (1) { ++ u32 bootstrap; ++ ++ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0) ++ return 0; ++ ++ if (retries-- == 0) ++ break; ++ ++ udelay(10000); ++ retries++; ++ } ++ ++ pr_err("ar933x: WMAC reset timed out"); ++ return -ETIMEDOUT; + } + +-static int ar933x_r1_get_wmac_revision(void) ++static int ar93xx_get_soc_revision(void) + { + return ath79_soc_rev; + } +@@ -93,7 +126,7 @@ + ath79_wmac_data.is_clk_25mhz = true; + + if (ath79_soc_rev == 1) +- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; + + ath79_wmac_data.external_reset = ar933x_wmac_reset; + } +@@ -114,6 +147,28 @@ + ath79_wmac_data.is_clk_25mhz = false; + else + ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; ++} ++ ++static void qca953x_wmac_setup(void) ++{ ++ u32 t; ++ ++ ath79_wmac_device.name = "qca953x_wmac"; ++ ++ ath79_wmac_resources[0].start = QCA953X_WMAC_BASE; ++ ath79_wmac_resources[0].end = QCA953X_WMAC_BASE + QCA953X_WMAC_SIZE - 1; ++ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); ++ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); ++ ++ t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); ++ if (t & QCA953X_BOOTSTRAP_REF_CLK_40) ++ ath79_wmac_data.is_clk_25mhz = false; ++ else ++ ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; + } + + static void qca955x_wmac_setup(void) +@@ -134,7 +189,221 @@ + ath79_wmac_data.is_clk_25mhz = true; + } + +-void __init ath79_register_wmac(u8 *cal_data) ++static void qca956x_wmac_setup(void) ++{ ++ u32 t; ++ ++ ath79_wmac_device.name = "qca956x_wmac"; ++ ++ ath79_wmac_resources[0].start = QCA956X_WMAC_BASE; ++ ath79_wmac_resources[0].end = QCA956X_WMAC_BASE + QCA956X_WMAC_SIZE - 1; ++ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); ++ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); ++ ++ t = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); ++ if (t & QCA956X_BOOTSTRAP_REF_CLK_40) ++ ath79_wmac_data.is_clk_25mhz = false; ++ else ++ ath79_wmac_data.is_clk_25mhz = true; ++} ++ ++static bool __init ++ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) ++{ ++ int timeout = 1000; ++ u32 val; ++ ++ __raw_readl(base + AR9300_OTP_BASE + (4 * addr)); ++ while (timeout--) { ++ val = __raw_readl(base + AR9300_OTP_STATUS); ++ if ((val & AR9300_OTP_STATUS_TYPE) == AR9300_OTP_STATUS_VALID) ++ break; ++ ++ udelay(10); ++ } ++ ++ if (!timeout) ++ return false; ++ ++ *data = __raw_readl(base + AR9300_OTP_READ_DATA); ++ return true; ++} ++ ++static bool __init ++ar93xx_wmac_otp_read(void __iomem *base, int addr, u8 *dest, int len) ++{ ++ u32 data; ++ int i; ++ ++ for (i = 0; i < len; i++) { ++ int offset = 8 * ((addr - i) % 4); ++ ++ if (!ar93xx_wmac_otp_read_word(base, (addr - i) / 4, &data)) ++ return false; ++ ++ dest[i] = (data >> offset) & 0xff; ++ } ++ ++ return true; ++} ++ ++static bool __init ++ar93xx_wmac_otp_uncompress(void __iomem *base, int addr, int len, u8 *dest, ++ int dest_start, int dest_len) ++{ ++ int dest_bytes = 0; ++ int offset = 0; ++ int end = addr - len; ++ u8 hdr[2]; ++ ++ while (addr > end) { ++ if (!ar93xx_wmac_otp_read(base, addr, hdr, 2)) ++ return false; ++ ++ addr -= 2; ++ offset += hdr[0]; ++ ++ if (offset <= dest_start + dest_len && ++ offset + len >= dest_start) { ++ int data_offset = 0; ++ int dest_offset = 0; ++ int copy_len; ++ ++ if (offset < dest_start) ++ data_offset = dest_start - offset; ++ else ++ dest_offset = offset - dest_start; ++ ++ copy_len = len - data_offset; ++ if (copy_len > dest_len - dest_offset) ++ copy_len = dest_len - dest_offset; ++ ++ ar93xx_wmac_otp_read(base, addr - data_offset, ++ dest + dest_offset, ++ copy_len); ++ ++ dest_bytes += copy_len; ++ } ++ addr -= hdr[1]; ++ } ++ return !!dest_bytes; ++} ++ ++bool __init ar93xx_wmac_read_mac_address(u8 *dest) ++{ ++ void __iomem *base; ++ bool ret = false; ++ int addr = 0x1ff; ++ unsigned int len; ++ u32 hdr_u32; ++ u8 *hdr = (u8 *) &hdr_u32; ++ u8 mac[6] = { 0x00, 0x02, 0x03, 0x04, 0x05, 0x06 }; ++ int mac_start = 2, mac_end = 8; ++ ++ BUG_ON(!soc_is_ar933x() && !soc_is_ar934x()); ++ base = ioremap_nocache(AR933X_WMAC_BASE, AR933X_WMAC_SIZE); ++ while (addr > sizeof(hdr)) { ++ if (!ar93xx_wmac_otp_read(base, addr, hdr, sizeof(hdr))) ++ break; ++ ++ if (hdr_u32 == 0 || hdr_u32 == ~0) ++ break; ++ ++ len = (hdr[1] << 4) | (hdr[2] >> 4); ++ addr -= 4; ++ ++ switch (hdr[0] >> 5) { ++ case 0: ++ if (len < mac_end) ++ break; ++ ++ ar93xx_wmac_otp_read(base, addr - mac_start, mac, 6); ++ ret = true; ++ break; ++ case 3: ++ ret |= ar93xx_wmac_otp_uncompress(base, addr, len, mac, ++ mac_start, 6); ++ break; ++ default: ++ break; ++ } ++ ++ addr -= len + 2; ++ } ++ ++ iounmap(base); ++ if (ret) ++ memcpy(dest, mac, 6); ++ ++ return ret; ++} ++ ++void __init ath79_wmac_disable_2ghz(void) ++{ ++ ath79_wmac_data.disable_2ghz = true; ++} ++ ++void __init ath79_wmac_disable_5ghz(void) ++{ ++ ath79_wmac_data.disable_5ghz = true; ++} ++ ++void __init ath79_wmac_set_tx_gain_buffalo(void) ++{ ++ ath79_wmac_data.tx_gain_buffalo = true; ++} ++ ++static int ath79_request_ext_lna_gpio(unsigned chain, int gpio) ++{ ++ char buf[32]; ++ char *label; ++ int err; ++ ++ scnprintf(buf, sizeof(buf), "external LNA%u", chain); ++ label = kstrdup(buf, GFP_KERNEL); ++ ++ err = gpio_request_one(gpio, GPIOF_DIR_OUT | GPIOF_INIT_LOW, label); ++ if (err) { ++ pr_err("unable to request GPIO%d for external LNA%u\n", ++ gpio, chain); ++ kfree(label); ++ } ++ ++ return err; ++} ++ ++static void ar934x_set_ext_lna_gpio(unsigned chain, int gpio) ++{ ++ unsigned int sel; ++ int err; ++ ++ if (WARN_ON(chain > 1)) ++ return; ++ ++ err = ath79_request_ext_lna_gpio(chain, gpio); ++ if (err) ++ return; ++ ++ if (chain == 0) ++ sel = AR934X_GPIO_OUT_EXT_LNA0; ++ else ++ sel = AR934X_GPIO_OUT_EXT_LNA1; ++ ++ ath79_gpio_output_select(gpio, sel); ++} ++ ++void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio) ++{ ++ if (soc_is_ar934x()) ++ ar934x_set_ext_lna_gpio(chain, gpio); ++} ++ ++void __init ath79_wmac_set_led_pin(int gpio) ++{ ++ ath79_wmac_data.led_pin = gpio; ++} ++ ++void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) + { + if (soc_is_ar913x()) + ar913x_wmac_setup(); +@@ -142,8 +411,12 @@ + ar933x_wmac_setup(); + else if (soc_is_ar934x()) + ar934x_wmac_setup(); ++ else if (soc_is_qca953x()) ++ qca953x_wmac_setup(); + else if (soc_is_qca955x()) + qca955x_wmac_setup(); ++ else if (soc_is_qca956x()) ++ qca956x_wmac_setup(); + else + BUG(); + +@@ -151,5 +424,16 @@ + memcpy(ath79_wmac_data.eeprom_data, cal_data, + sizeof(ath79_wmac_data.eeprom_data)); + ++ if (mac_addr) { ++ memcpy(ath79_wmac_mac, mac_addr, sizeof(ath79_wmac_mac)); ++ ath79_wmac_data.macaddr = ath79_wmac_mac; ++ } ++ + platform_device_register(&ath79_wmac_device); + } ++ ++void __init ath79_register_wmac_simple(void) ++{ ++ ath79_register_wmac(NULL, NULL); ++ ath79_wmac_data.eeprom_name = "soc_wmac.eeprom"; ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/dev-wmac.h linux-4.1.13/arch/mips/ath79/dev-wmac.h +--- linux-4.1.13.orig/arch/mips/ath79/dev-wmac.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/dev-wmac.h 2015-12-04 19:57:04.510069820 +0100 +@@ -12,6 +12,14 @@ + #ifndef _ATH79_DEV_WMAC_H + #define _ATH79_DEV_WMAC_H + +-void ath79_register_wmac(u8 *cal_data); ++void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); ++void ath79_register_wmac_simple(void); ++void ath79_wmac_disable_2ghz(void); ++void ath79_wmac_disable_5ghz(void); ++void ath79_wmac_set_tx_gain_buffalo(void); ++void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); ++void ath79_wmac_set_led_pin(int gpio); ++ ++bool ar93xx_wmac_read_mac_address(u8 *dest); + + #endif /* _ATH79_DEV_WMAC_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/early_printk.c linux-4.1.13/arch/mips/ath79/early_printk.c +--- linux-4.1.13.orig/arch/mips/ath79/early_printk.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/early_printk.c 2015-12-04 19:57:04.478071913 +0100 +@@ -56,6 +56,46 @@ + /* nothing to do */ + } + ++static void prom_enable_uart(u32 id) ++{ ++ void __iomem *gpio_base; ++ u32 uart_en; ++ u32 t; ++ ++ switch (id) { ++ case REV_ID_MAJOR_AR71XX: ++ uart_en = AR71XX_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR7240: ++ case REV_ID_MAJOR_AR7241: ++ case REV_ID_MAJOR_AR7242: ++ uart_en = AR724X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR913X: ++ uart_en = AR913X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR9330: ++ case REV_ID_MAJOR_AR9331: ++ uart_en = AR933X_GPIO_FUNC_UART_EN; ++ break; ++ ++ case REV_ID_MAJOR_AR9341: ++ case REV_ID_MAJOR_AR9342: ++ case REV_ID_MAJOR_AR9344: ++ /* TODO */ ++ default: ++ return; ++ } ++ ++ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE)); ++ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC); ++ t |= uart_en; ++ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); ++} ++ + static void prom_putchar_init(void) + { + void __iomem *base; +@@ -74,8 +114,12 @@ + case REV_ID_MAJOR_AR9341: + case REV_ID_MAJOR_AR9342: + case REV_ID_MAJOR_AR9344: ++ case REV_ID_MAJOR_QCA9533: ++ case REV_ID_MAJOR_QCA9533_V2: + case REV_ID_MAJOR_QCA9556: + case REV_ID_MAJOR_QCA9558: ++ case REV_ID_MAJOR_TP9343: ++ case REV_ID_MAJOR_QCA9561: + _prom_putchar = prom_putchar_ar71xx; + break; + +@@ -86,8 +130,10 @@ + + default: + _prom_putchar = prom_putchar_dummy; +- break; ++ return; + } ++ ++ prom_enable_uart(id); + } + + void prom_putchar(unsigned char ch) +diff -Nur linux-4.1.13.orig/arch/mips/ath79/gpio.c linux-4.1.13/arch/mips/ath79/gpio.c +--- linux-4.1.13.orig/arch/mips/ath79/gpio.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/gpio.c 2015-12-04 19:57:05.893979276 +0100 +@@ -20,15 +20,29 @@ + #include + #include + #include ++#include ++#include ++ ++#include + + #include + #include ++#include + #include "common.h" + +-static void __iomem *ath79_gpio_base; ++void __iomem *ath79_gpio_base; ++EXPORT_SYMBOL_GPL(ath79_gpio_base); ++ + static unsigned long ath79_gpio_count; + static DEFINE_SPINLOCK(ath79_gpio_lock); + ++/* ++ * gpio_both_edge is a bitmask of which gpio pins need to have ++ * the detect priority flipped from the interrupt handler to ++ * emulate IRQ_TYPE_EDGE_BOTH. ++ */ ++static unsigned long gpio_both_edge = 0; ++ + static void __ath79_gpio_set_value(unsigned gpio, int value) + { + void __iomem *base = ath79_gpio_base; +@@ -128,6 +142,30 @@ + return 0; + } + ++int ath79_gpio_direction_select(unsigned gpio, bool oe) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ bool ieq_1 = (soc_is_ar934x() || ++ soc_is_qca953x()); ++ ++ if (gpio >= ath79_gpio_count) ++ return -1; ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ if ((ieq_1 && oe) || (!ieq_1 && !oe)) ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ else ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), ++ base + AR71XX_GPIO_REG_OE); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++ ++ return 0; ++} ++ + static struct gpio_chip ath79_gpio_chip = { + .label = "ath79", + .get = ath79_gpio_get_value, +@@ -146,7 +184,8 @@ + soc_is_ar913x() || + soc_is_ar933x()) + reg = AR71XX_GPIO_REG_FUNC; +- else if (soc_is_ar934x()) ++ else if (soc_is_ar934x() || ++ soc_is_qca953x() || soc_is_qca956x()) + reg = AR934X_GPIO_REG_FUNC; + else + BUG(); +@@ -154,6 +193,36 @@ + return ath79_gpio_base + reg; + } + ++static void __iomem *ath79_gpio_get_function2_reg(void) ++{ ++ u32 reg = 0; ++ ++ if (soc_is_ar71xx() || ++ soc_is_ar724x() || ++ soc_is_ar913x() || ++ soc_is_ar933x()) ++ reg = AR71XX_GPIO_REG_FUNC_2; ++ else ++ BUG(); ++ ++ return ath79_gpio_base + reg; ++} ++ ++ ++void ath79_gpio_function2_setup(u32 set, u32 clear) ++{ ++ void __iomem *reg = ath79_gpio_get_function2_reg(); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); ++ /* flush write */ ++ __raw_readl(reg); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++} ++ + void ath79_gpio_function_setup(u32 set, u32 clear) + { + void __iomem *reg = ath79_gpio_get_function_reg(); +@@ -178,6 +247,172 @@ + ath79_gpio_function_setup(0, mask); + } + ++void __init ath79_gpio_output_select(unsigned gpio, u8 val) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ unsigned int reg, reg_base; ++ unsigned long gpio_count; ++ u32 t, s; ++ ++ if (soc_is_ar934x()) { ++ gpio_count = AR934X_GPIO_COUNT; ++ reg_base = AR934X_GPIO_REG_OUT_FUNC0; ++ } else if (soc_is_qca953x()) { ++ gpio_count = QCA953X_GPIO_COUNT; ++ reg_base = QCA953X_GPIO_REG_OUT_FUNC0; ++ } else if (soc_is_qca955x()) { ++ gpio_count = QCA955X_GPIO_COUNT; ++ reg_base = QCA955X_GPIO_REG_OUT_FUNC0; ++ } else { ++ BUG(); ++ } ++ ++ if (gpio >= gpio_count) ++ return; ++ ++ reg = reg_base + 4 * (gpio / 4); ++ s = 8 * (gpio % 4); ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(0xff << s); ++ t |= val << s; ++ __raw_writel(t, base + reg); ++ ++ /* flush write */ ++ (void) __raw_readl(base + reg); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++} ++ ++static int ath79_gpio_irq_type(struct irq_data *d, unsigned type) ++{ ++ int offset = d->irq - ATH79_GPIO_IRQ_BASE; ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ unsigned long int_type; ++ unsigned long int_polarity; ++ unsigned long bit = (1 << offset); ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ int_type = __raw_readl(base + AR71XX_GPIO_REG_INT_TYPE); ++ int_polarity = __raw_readl(base + AR71XX_GPIO_REG_INT_POLARITY); ++ ++ gpio_both_edge &= ~bit; ++ ++ switch (type) { ++ case IRQ_TYPE_EDGE_RISING: ++ int_type &= ~bit; ++ int_polarity |= bit; ++ break; ++ ++ case IRQ_TYPE_EDGE_FALLING: ++ int_type &= ~bit; ++ int_polarity &= ~bit; ++ break; ++ ++ case IRQ_TYPE_LEVEL_HIGH: ++ int_type |= bit; ++ int_polarity |= bit; ++ break; ++ ++ case IRQ_TYPE_LEVEL_LOW: ++ int_type |= bit; ++ int_polarity &= ~bit; ++ break; ++ ++ case IRQ_TYPE_EDGE_BOTH: ++ int_type |= bit; ++ /* set polarity based on current value */ ++ if (gpio_get_value(offset)) { ++ int_polarity &= ~bit; ++ } else { ++ int_polarity |= bit; ++ } ++ /* flip this gpio in the interrupt handler */ ++ gpio_both_edge |= bit; ++ break; ++ ++ default: ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++ return -EINVAL; ++ } ++ ++ __raw_writel(int_type, base + AR71XX_GPIO_REG_INT_TYPE); ++ __raw_writel(int_polarity, base + AR71XX_GPIO_REG_INT_POLARITY); ++ ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_MODE) | (1 << offset), ++ base + AR71XX_GPIO_REG_INT_MODE); ++ ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE) & ~(1 << offset), ++ base + AR71XX_GPIO_REG_INT_ENABLE); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++ return 0; ++} ++ ++static void ath79_gpio_irq_enable(struct irq_data *d) ++{ ++ int offset = d->irq - ATH79_GPIO_IRQ_BASE; ++ void __iomem *base = ath79_gpio_base; ++ ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE) | (1 << offset), ++ base + AR71XX_GPIO_REG_INT_ENABLE); ++} ++ ++static void ath79_gpio_irq_disable(struct irq_data *d) ++{ ++ int offset = d->irq - ATH79_GPIO_IRQ_BASE; ++ void __iomem *base = ath79_gpio_base; ++ ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_ENABLE) & ~(1 << offset), ++ base + AR71XX_GPIO_REG_INT_ENABLE); ++} ++ ++static struct irq_chip ath79_gpio_irqchip = { ++ .name = "GPIO", ++ .irq_enable = ath79_gpio_irq_enable, ++ .irq_disable = ath79_gpio_irq_disable, ++ .irq_set_type = ath79_gpio_irq_type, ++}; ++ ++static irqreturn_t ath79_gpio_irq(int irq, void *dev) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long stat = __raw_readl(base + AR71XX_GPIO_REG_INT_PENDING); ++ int bit_num; ++ ++ for_each_set_bit(bit_num, &stat, sizeof(stat) * BITS_PER_BYTE) { ++ unsigned long bit = BIT(bit_num); ++ ++ if (bit & gpio_both_edge) { ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_INT_POLARITY) ^ bit, ++ base + AR71XX_GPIO_REG_INT_POLARITY); ++ } ++ ++ generic_handle_irq(ATH79_GPIO_IRQ(bit_num)); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int __init ath79_gpio_irq_init(struct gpio_chip *chip) ++{ ++ int irq; ++ int irq_base = ATH79_GPIO_IRQ_BASE; ++ ++ for (irq = irq_base; irq < irq_base + chip->ngpio; irq++) { ++ irq_set_chip_data(irq, chip); ++ irq_set_chip_and_handler(irq, &ath79_gpio_irqchip, handle_simple_irq); ++ irq_set_noprobe(irq); ++ } ++ ++ return 0; ++} ++ + void __init ath79_gpio_init(void) + { + int err; +@@ -194,14 +429,19 @@ + ath79_gpio_count = AR933X_GPIO_COUNT; + else if (soc_is_ar934x()) + ath79_gpio_count = AR934X_GPIO_COUNT; ++ else if (soc_is_qca953x()) ++ ath79_gpio_count = QCA953X_GPIO_COUNT; + else if (soc_is_qca955x()) + ath79_gpio_count = QCA955X_GPIO_COUNT; ++ else if (soc_is_qca956x()) ++ ath79_gpio_count = QCA956X_GPIO_COUNT; + else + BUG(); + + ath79_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); + ath79_gpio_chip.ngpio = ath79_gpio_count; +- if (soc_is_ar934x() || soc_is_qca955x()) { ++ if (soc_is_ar934x() || soc_is_qca953x() || soc_is_qca955x() || ++ soc_is_qca956x()) { + ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; + ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; + } +@@ -209,6 +449,10 @@ + err = gpiochip_add(&ath79_gpio_chip); + if (err) + panic("cannot add AR71xx GPIO chip, error=%d", err); ++ ++ ath79_gpio_irq_init(&ath79_gpio_chip); ++ ++ request_irq(ATH79_MISC_IRQ(2), ath79_gpio_irq, 0, "ath79-gpio", NULL); + } + + int gpio_get_value(unsigned gpio) +@@ -231,14 +475,22 @@ + + int gpio_to_irq(unsigned gpio) + { +- /* FIXME */ +- return -EINVAL; ++ if (gpio > ath79_gpio_count) { ++ return -EINVAL; ++ } ++ ++ return ATH79_GPIO_IRQ_BASE + gpio; + } + EXPORT_SYMBOL(gpio_to_irq); + + int irq_to_gpio(unsigned irq) + { +- /* FIXME */ +- return -EINVAL; ++ unsigned gpio = irq - ATH79_GPIO_IRQ_BASE; ++ ++ if (gpio > ath79_gpio_count) { ++ return -EINVAL; ++ } ++ ++ return gpio; + } + EXPORT_SYMBOL(irq_to_gpio); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/irq.c linux-4.1.13/arch/mips/ath79/irq.c +--- linux-4.1.13.orig/arch/mips/ath79/irq.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/irq.c 2015-12-04 19:57:04.498070605 +0100 +@@ -26,6 +26,8 @@ + + static void (*ath79_ip2_handler)(void); + static void (*ath79_ip3_handler)(void); ++static struct irq_chip ip2_chip; ++static struct irq_chip ip3_chip; + + static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) + { +@@ -106,7 +108,9 @@ + else if (soc_is_ar724x() || + soc_is_ar933x() || + soc_is_ar934x() || +- soc_is_qca955x()) ++ soc_is_qca953x() || ++ soc_is_qca955x() || ++ soc_is_qca956x()) + ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; + else + BUG(); +@@ -147,12 +151,43 @@ + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); + } + ++static void qca953x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) ++{ ++ u32 status; ++ ++ disable_irq_nosync(irq); ++ ++ status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS); ++ ++ if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) { ++ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_PCIE); ++ generic_handle_irq(ATH79_IP2_IRQ(0)); ++ } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) { ++ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_WMAC); ++ generic_handle_irq(ATH79_IP2_IRQ(1)); ++ } else { ++ spurious_interrupt(); ++ } ++ ++ enable_irq(irq); ++} ++ ++static void qca953x_irq_init(void) ++{ ++ int i; ++ ++ for (i = ATH79_IP2_IRQ_BASE; ++ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); ++ ++ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); ++} ++ + static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) + { + u32 status; +@@ -222,19 +257,108 @@ + + for (i = ATH79_IP2_IRQ_BASE; + i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); + + for (i = ATH79_IP3_IRQ_BASE; + i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); + + irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); + } + ++static void qca956x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc) ++{ ++ u32 status; ++ ++ disable_irq_nosync(irq); ++ ++ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); ++ status &= QCA956X_EXT_INT_PCIE_RC1_ALL | QCA956X_EXT_INT_WMAC_ALL; ++ ++ if (status == 0) { ++ spurious_interrupt(); ++ goto enable; ++ } ++ ++ if (status & QCA956X_EXT_INT_PCIE_RC1_ALL) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP2_IRQ(0)); ++ } ++ ++ if (status & QCA956X_EXT_INT_WMAC_ALL) { ++ /* TODO: flsuh DDR? */ ++ generic_handle_irq(ATH79_IP2_IRQ(1)); ++ } ++ ++enable: ++ enable_irq(irq); ++} ++ ++static void qca956x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc) ++{ ++ u32 status; ++ ++ disable_irq_nosync(irq); ++ ++ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); ++ status &= QCA956X_EXT_INT_PCIE_RC2_ALL | ++ QCA956X_EXT_INT_USB1 | QCA956X_EXT_INT_USB2; ++ ++ if (status == 0) { ++ spurious_interrupt(); ++ goto enable; ++ } ++ ++ if (status & QCA956X_EXT_INT_USB1) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP3_IRQ(0)); ++ } ++ ++ if (status & QCA956X_EXT_INT_USB2) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP3_IRQ(1)); ++ } ++ ++ if (status & QCA956X_EXT_INT_PCIE_RC2_ALL) { ++ /* TODO: flush DDR? */ ++ generic_handle_irq(ATH79_IP3_IRQ(2)); ++ } ++ ++enable: ++ enable_irq(irq); ++} ++ ++static void qca956x_enable_timer_cb(void) { ++ u32 misc; ++ ++ misc = ath79_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); ++ misc |= MISC_INT_MIPS_SI_TIMERINT_MASK; ++ ath79_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, misc); ++} ++ ++static void qca956x_irq_init(void) ++{ ++ int i; ++ ++ for (i = ATH79_IP2_IRQ_BASE; ++ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) ++ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); ++ ++ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch); ++ ++ for (i = ATH79_IP3_IRQ_BASE; ++ i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) ++ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); ++ ++ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); ++ ++ /* QCA956x timer init workaround has to be applied right before setting ++ * up the clock. Else, there will be no jiffies */ ++ late_time_init = &qca956x_enable_timer_cb; ++} ++ + asmlinkage void plat_irq_dispatch(void) + { + unsigned long pending; +@@ -335,8 +459,41 @@ + do_IRQ(ATH79_CPU_IRQ(3)); + } + ++static void qca953x_ip3_handler(void) ++{ ++ ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_USB); ++ do_IRQ(ATH79_CPU_IRQ(3)); ++} ++ ++static void ath79_ip2_disable(struct irq_data *data) ++{ ++ disable_irq(ATH79_CPU_IRQ(2)); ++} ++ ++static void ath79_ip2_enable(struct irq_data *data) ++{ ++ enable_irq(ATH79_CPU_IRQ(2)); ++} ++ ++static void ath79_ip3_disable(struct irq_data *data) ++{ ++ disable_irq(ATH79_CPU_IRQ(3)); ++} ++ ++static void ath79_ip3_enable(struct irq_data *data) ++{ ++ enable_irq(ATH79_CPU_IRQ(3)); ++} ++ + void __init arch_init_irq(void) + { ++ ip2_chip = dummy_irq_chip; ++ ip3_chip = dummy_irq_chip; ++ ip2_chip.irq_disable = ath79_ip2_disable; ++ ip2_chip.irq_enable = ath79_ip2_enable; ++ ip3_chip.irq_disable = ath79_ip3_disable; ++ ip3_chip.irq_enable = ath79_ip3_enable; ++ + if (soc_is_ar71xx()) { + ath79_ip2_handler = ar71xx_ip2_handler; + ath79_ip3_handler = ar71xx_ip3_handler; +@@ -352,9 +509,15 @@ + } else if (soc_is_ar934x()) { + ath79_ip2_handler = ath79_default_ip2_handler; + ath79_ip3_handler = ar934x_ip3_handler; ++ } else if (soc_is_qca953x()) { ++ ath79_ip2_handler = ath79_default_ip2_handler; ++ ath79_ip3_handler = qca953x_ip3_handler; + } else if (soc_is_qca955x()) { + ath79_ip2_handler = ath79_default_ip2_handler; + ath79_ip3_handler = ath79_default_ip3_handler; ++ } else if (soc_is_qca956x()) { ++ ath79_ip2_handler = ath79_default_ip2_handler; ++ ath79_ip3_handler = ath79_default_ip3_handler; + } else { + BUG(); + } +@@ -364,6 +527,10 @@ + + if (soc_is_ar934x()) + ar934x_ip2_irq_init(); ++ else if (soc_is_qca953x()) ++ qca953x_irq_init(); + else if (soc_is_qca955x()) + qca955x_irq_init(); ++ else if (soc_is_qca956x()) ++ qca956x_irq_init(); + } +diff -Nur linux-4.1.13.orig/arch/mips/ath79/Kconfig linux-4.1.13/arch/mips/ath79/Kconfig +--- linux-4.1.13.orig/arch/mips/ath79/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/Kconfig 2015-12-04 19:57:05.957975089 +0100 +@@ -2,75 +2,1466 @@ + + menu "Atheros AR71XX/AR724X/AR913X machine selection" + ++config ATH79_MACH_ALFA_AP96 ++ bool "ALFA Network AP96 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_HORNET_UB ++ bool "ALFA Network Hornet-UB board support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_ALFA_NX ++ bool "ALFA Network N2/N5 board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_TUBE2H ++ bool "ALFA Network Tube2H board support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_ALL0258N ++ bool "Allnet ALL0258N support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_ALL0315N ++ bool "Allnet ALL0315N support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_ANTMINER_S1 ++ bool "Bitmain Antminer S1 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_ANTMINER_S3 ++ bool "Bitmain Antminer S3 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_ARDUINO_YUN ++ bool "Arduino Yun" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ help ++ Say 'Y' here if you want your kernel to support the ++ Arduino Yun. ++ ++config ATH79_MACH_AP113 ++ bool "Atheros AP113 board support" ++ select SOC_AR724X ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_PB9X_PCI if PCI ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_USB ++ select ATH79_DEV_ETH ++ + config ATH79_MACH_AP121 + bool "Atheros AP121 reference board" + select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros AP121 reference board. ++ ++config ATH79_MACH_AP132 ++ bool "Atheros AP132 reference board" ++ select SOC_QCA955X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros AP132 reference boards. ++ ++config ATH79_MACH_AP136 ++ bool "Atheros AP136/AP135 reference board" ++ select SOC_QCA955X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_NFC ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros AP136 or AP135 reference boards. ++ ++config ATH79_MACH_AP143 ++ bool "Atheros AP143 reference board" ++ select SOC_QCA953X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_SPI ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_ETH ++ select ATH79_DEV_M25P80 ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros AP143 reference board. ++ ++config ATH79_MACH_AP147 ++ bool "Atheros AP147 reference board" ++ select SOC_QCA953X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_AP9X_PCI if PCI ++ help ++ Say 'Y' here if you want your kernel to support the ++ QCA AP147 reference boards. ++ ++config ATH79_MACH_AP152 ++ bool "Atheros AP152 reference board" ++ select SOC_QCA956X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_AP9X_PCI if PCI ++ help ++ Say 'Y' here if you want your kernel to support the ++ QCA AP152 reference boards. ++ ++ ++config ATH79_MACH_AP81 ++ bool "Atheros AP81 reference board" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros AP81 reference board. ++ ++config ATH79_MACH_AP83 ++ bool "Atheros AP83 board support" ++ select SOC_AR913X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_AP96 ++ bool "Atheros AP96 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_DB120 ++ bool "Atheros DB120 reference board" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros DB120 reference board. ++ ++config ATH79_MACH_PB42 ++ bool "Atheros PB42 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_PB44 ++ bool "Atheros PB44 reference board" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_SPI ++ select ATH79_DEV_USB ++ help ++ Say 'Y' here if you want your kernel to support the ++ Atheros PB44 reference board. ++ ++config ATH79_MACH_PB92 ++ bool "Atheros PB92 board support" ++ select SOC_AR724X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_PB9X_PCI if PCI ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_AW_NR580 ++ bool "AzureWave AW-NR580 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_F9K1115V2 ++ bool "Belkin AC1750DB board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_EPG5000 ++ bool "EnGenius EPG5000 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_ESR1750 ++ bool "EnGenius ESR1750 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WHR_HP_G300N ++ bool "Buffalo WHR-HP-G300N board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_WLAE_AG300N ++ bool "Buffalo WLAE-AG300N board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_WLR8100 ++ bool "Sitecom WLR-8100 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WZR_HP_AG300H ++ bool "Buffalo WZR-HP-AG300H board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_WZR_HP_G300NH ++ bool "Buffalo WZR-HP-G300NH board support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select RTL8366_SMI ++ ++config ATH79_MACH_WZR_HP_G300NH2 ++ bool "Buffalo WZR-HP-G300NH2 board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_WZR_HP_G450H ++ bool "Buffalo WZR-HP-G450H board support" ++ select SOC_AR724X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_WZR_450HP2 ++ bool "Buffalo WZR-450HP2 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WP543 ++ bool "Compex WP543/WPJ543 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select MYLOADER ++ ++config ATH79_MACH_WPE72 ++ bool "Compex WPE72/WPE72NX board support" ++ select SOC_AR724X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select MYLOADER ++ ++config ATH79_MACH_WPJ344 ++ bool "Compex WPJ344 board support" ++ select SOC_AS934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WPJ531 ++ bool "Compex WPJ531 board support" ++ select SOC_QCA953X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WPJ558 ++ bool "Compex WPJ558 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_DGL_5500_A1 ++ bool "D-Link DGL-5500 A1 support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_DHP_1565_A1 ++ bool "D-Link DHP-1565 rev. A1 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_DIR_505_A1 ++ bool "D-Link DIR-505-A1 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_DIR_600_A1 ++ bool "D-Link DIR-600 A1/DIR-615 E1/DIR-615 E4 support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_NVRAM ++ ++config ATH79_MACH_DIR_615_C1 ++ bool "D-Link DIR-615 rev. C1 support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_DIR_615_I1 ++ bool "D-Link DIR-615 rev. I1 support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_DIR_825_B1 ++ bool "D-Link DIR-825 rev. B1 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_DIR_825_C1 ++ bool "D-Link DIR-825 rev. C1/DIR-835 rev. A1 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_DLAN_HOTSPOT ++ bool "devolo dLAN Hotspot support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_DLAN_PRO_500_WP ++ bool "devolo dLAN pro 500 Wireless+ support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_DLAN_PRO_1200_AC ++ bool "devolo dLAN pro 1200+ WiFi ac support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_DRAGINO2 ++ bool "DRAGINO V2 support" ++ select SOC_AR933X ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_ETH ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_ESR900 ++ bool "EnGenius ESR900 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_EW_DORIN ++ bool "embedded wireless Dorin Platform support" ++ select SOC_AR933X ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_ETH ++ help ++ Say 'Y' here if you want your kernel to support the ++ Dorin Platform from www.80211.de . ++ ++config ATH79_MACH_EL_M150 ++ bool "EasyLink EL-M150 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_EL_MINI ++ bool "EasyLink EL-MINI support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_GL_AR150 ++ bool "GL AR150 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_GL_AR300 ++ bool "GL_AR300 support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_GL_DOMINO ++ bool "DOMINO support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_GL_INET ++ bool "GL-INET support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_EAP300V2 ++ bool "EnGenius EAP300 v2 support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_GS_MINIBOX_V1 ++ bool "Gainstrong MiniBox V1.0 support" ++ select SOC_AR933X ++ select ARH79_DEV_ETH ++ select ARH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_GS_OOLITE ++ bool "GS Oolite V1 support" ++ select SOC_AR933X ++ select ARH79_DEV_ETH ++ select ARH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_HIWIFI_HC6361 ++ bool "HiWiFi HC6361 board support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_JA76PF ++ bool "jjPlus JA76PF board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_JWAP003 ++ bool "jjPlus JWAP003 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_WRT160NL ++ bool "Linksys WRT160NL board support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_WRT400N ++ bool "Linksys WRT400N board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_R6100 ++ bool "NETGEAR R6100 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MC_MAC1200R ++ bool "MERCURY MAC1200R board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_RB4XX ++ bool "MikroTik RouterBOARD 4xx series support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_RB750 ++ bool "MikroTik RouterBOARD 750 support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_USB ++ select ATH79_ROUTERBOOT ++ ++config ATH79_MACH_RB91X ++ bool "MikroTik RouterBOARD 91X support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_SPI ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_USB ++ select ATH79_ROUTERBOOT ++ ++config ATH79_MACH_RB922 ++ bool "MikroTik RouterBOARD 922 support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ select ATH79_ROUTERBOOT ++ select RLE_DECOMPRESS ++ ++config ATH79_MACH_RB95X ++ bool "MikroTik RouterBOARD 95X support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_NFC ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_USB ++ select ATH79_ROUTERBOOT ++ ++config ATH79_MACH_RB2011 ++ bool "MikroTik RouterBOARD 2011 support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ select ATH79_ROUTERBOOT ++ ++config ATH79_MACH_RBSXTLITE ++ bool "MikroTik RouterBOARD SXT Lite" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_NFC ++ select ATH79_DEV_WMAC ++ select ATH79_ROUTERBOOT ++ ++config ATH79_MACH_SMART_300 ++ bool "NC-LINK SMART-300 board support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WNDAP360 ++ bool "NETGEAR WNDAP360 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_WNDR3700 ++ bool "NETGEAR WNDR3700 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_WNDR4300 ++ bool "NETGEAR WNDR3700v4/WNDR4300 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WNR2000 ++ bool "NETGEAR WNR2000 board support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_WNR2000_V3 ++ bool "NETGEAR WNR2000 V3/WNR612 v2/WNR1000 v2 board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++ config ATH79_MACH_WNR2200 ++ bool "NETGEAR WNR2200 board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_WNR2000_V4 ++ bool "NETGEAR WNR2000 V4" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_OM2P ++ bool "OpenMesh OM2P board support" ++ select SOC_AR724X ++ select SOC_AR933X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_OM5P ++ bool "OpenMesh OM5P board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_ONION_OMEGA ++ bool "ONION OMEGA support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MR12 ++ bool "Meraki MR12 board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MR16 ++ bool "Meraki MR16 board support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MR600 ++ bool "OpenMesh MR600 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MZK_W04NU ++ bool "Planex MZK-W04NU board support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MZK_W300NH ++ bool "Planex MZK-W300NH board support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_RW2458N ++ bool "Redwave RW2458N board support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_CAP4200AG ++ bool "Senao CAP4200AG support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MR1750 ++ bool "OpenMesh MR1750 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MR900 ++ bool "OpenMesh MR900 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_EAP7660D ++ bool "Senao EAP7660D support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_BSB ++ bool "Smart Electronics Black Swift board" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_ARCHER_C7 ++ bool "TP-LINK Archer C5/C7/TL-WDR4900 v2 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_CPE510 ++ bool "TP-LINK CPE510 support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_MR11U ++ bool "TP-LINK TL-MR11U/TL-MR3040 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros AP121 reference board. + +-config ATH79_MACH_AP136 +- bool "Atheros AP136 reference board" +- select SOC_QCA955X ++config ATH79_MACH_TL_MR13U ++ bool "TP-LINK TL-MR13U support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros AP136 reference board. + +-config ATH79_MACH_AP81 +- bool "Atheros AP81 reference board" ++config ATH79_MACH_TL_MR3020 ++ bool "TP-LINK TL-MR3020 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_MR3X20 ++ bool "TP-LINK TL-MR3220/3420 support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_TL_WAX50RE ++ bool "TP-LINK TL-WA750/850RE support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WA701ND_V2 ++ bool "TP-LINK TL-WA701ND v2 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WA7210N_V2 ++ bool "TP-LINK TL-WA7210N v2 support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WA830RE_V2 ++ bool "TP-LINK TL-WA830RE v2 support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WA901ND ++ bool "TP-LINK TL-WA901ND/TL-WA7510N support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_TL_WA901ND_V2 ++ bool "TP-LINK TL-WA901ND v2 support" + select SOC_AR913X ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WDR3320_V2 ++ bool "TP-LINK TL-WDR3320 v2 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros AP81 reference board. + +-config ATH79_MACH_DB120 +- bool "Atheros DB120 reference board" ++config ATH79_MACH_TL_WDR3500 ++ bool "TP-LINK TL-WDR3500 board support" + select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros DB120 reference board. + +-config ATH79_MACH_PB44 +- bool "Atheros PB44 reference board" ++config ATH79_MACH_TL_WDR4300 ++ bool "TP-LINK TL-WDR3600/4300/4310 board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WDR6500_V2 ++ bool "TP-LINK TL-WDR6500 v2 board support" ++ select SOC_QCA956X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR703N ++ bool "TP-LINK TL-WR703N/TL-WR710N/TL-MR10U support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR720N_V3 ++ bool "TP-LINK TL-WR720N v3/v4 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR741ND ++ bool "TP-LINK TL-WR741ND support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_TL_WR741ND_V4 ++ bool "TP-LINK TL-WR741ND v4/TL-MR3220 v2 support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR841N_V1 ++ bool "TP-LINK TL-WR841N v1 support" + select SOC_AR71XX ++ select ATH79_DEV_DSA ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_TL_WR841N_V8 ++ bool "TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR841N_V9 ++ bool "TP-LINK TL-WR841N/ND v9 support" ++ select SOC_QCA953X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR941ND ++ bool "TP-LINK TL-WR941ND support" ++ select SOC_AR913X ++ select ATH79_DEV_DSA ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR941ND_V6 ++ bool "TP-LINK TL-WR941ND v6 support" ++ select SOC_QCA956X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR1041N_V2 ++ bool "TP-LINK TL-WR1041N v2 support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR1043ND ++ bool "TP-LINK TL-WR1043ND support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR1043ND_V2 ++ bool "TP-LINK TL-WR1043ND v2 support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_TL_WR2543N ++ bool "TP-LINK TL-WR2543N/ND support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ ++config ATH79_MACH_TEW_632BRP ++ bool "TRENDnet TEW-632BRP support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_TEW_673GRU ++ bool "TRENDnet TEW-673GRU support" ++ select SOC_AR71XX ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_NVRAM ++ ++config ATH79_MACH_TEW_712BR ++ bool "TRENDnet TEW-712BR support" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_TEW_732BR ++ bool "TRENDnet TEW-732BR support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_UBNT ++ bool "Ubiquiti AR71xx based boards support" ++ select SOC_AR71XX ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 + select ATH79_DEV_USB +- help +- Say 'Y' here if you want your kernel to support the +- Atheros PB44 reference board. + + config ATH79_MACH_UBNT_XM +- bool "Ubiquiti Networks XM (rev 1.0) board" ++ bool "Ubiquiti Networks XM/UniFi boards" + select SOC_AR724X ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC + help + Say 'Y' here if you want your kernel to support the + Ubiquiti Networks XM (rev 1.0) board. + ++config ATH79_MACH_WEIO ++ bool "WeIO board" ++ select SOC_AR933X ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_MYNET_N600 ++ bool "WD My Net N600 board support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_MYNET_N750 ++ bool "WD My Net N750 board support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_MYNET_REXT ++ bool "WD My Net Wi-Fi Range Extender board support" ++ select SOC_AR934X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_NVRAM ++ ++config ATH79_MACH_ZCN_1523H ++ bool "Zcomax ZCN-1523H support" ++ select SOC_AR724X ++ select ATH79_DEV_AP9X_PCI if PCI ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ ++config ATH79_MACH_NBG460N ++ bool "Zyxel NBG460N/550N/550NH board support" ++ select SOC_AR913X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_NBG6716 ++ bool "Zyxel NBG6616/NBG6716 board support" ++ select SOC_QCA955X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_NFC ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_CARAMBOLA2 ++ bool "8devices Carambola2 board" ++ select SOC_AR933X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_CF_E316N_V2 ++ bool "COMFAST CF-E316N v2 board" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_BHU_BXU2000N2_A ++ bool "BHU BXU2000n-2 rev. A support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_USB ++ select ATH79_DEV_WMAC ++ ++config ATH79_MACH_QIHOO_C301 ++ bool "Qihoo 360 C301 board support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ select ATH79_DEV_USB ++ select ATH79_NVRAM ++ + endmenu + + config SOC_AR71XX +@@ -93,12 +1484,39 @@ + select PCI_AR724X if PCI + def_bool n + ++config SOC_QCA953X ++ select USB_ARCH_HAS_EHCI ++ def_bool n ++ + config SOC_QCA955X + select HW_HAS_PCI + select PCI_AR724X if PCI + def_bool n + +-config PCI_AR724X ++config SOC_QCA956X ++ select USB_ARCH_HAS_EHCI ++ select HW_HAS_PCI ++ select PCI_AR724X if PCI ++ def_bool n ++ ++config ATH79_DEV_M25P80 ++ select ATH79_DEV_SPI ++ def_bool n ++ ++config ATH79_DEV_AP9X_PCI ++ select ATH79_PCI_ATH9K_FIXUP ++ def_bool n ++ ++config ATH79_DEV_DSA ++ def_bool n ++ ++config ATH79_DEV_ETH ++ def_bool n ++ ++config ATH79_DEV_DSA ++ def_bool n ++ ++config ATH79_DEV_ETH + def_bool n + + config ATH79_DEV_GPIO_BUTTONS +@@ -107,6 +1525,10 @@ + config ATH79_DEV_LEDS_GPIO + def_bool n + ++config ATH79_DEV_NFC ++ depends on (SOC_AR934X || SOC_QCA955X) ++ def_bool n ++ + config ATH79_DEV_SPI + def_bool n + +@@ -114,7 +1536,21 @@ + def_bool n + + config ATH79_DEV_WMAC +- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) ++ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X || SOC_QCA956X) ++ def_bool n ++ ++config ATH79_NVRAM ++ def_bool n ++ ++config ATH79_PCI_ATH9K_FIXUP ++ def_bool n ++ ++config ATH79_ROUTERBOOT ++ select RLE_DECOMPRESS ++ select LZO_DECOMPRESS ++ def_bool n ++ ++config PCI_AR724X + def_bool n + + endif +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-alfa-ap96.c linux-4.1.13/arch/mips/ath79/mach-alfa-ap96.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-alfa-ap96.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-alfa-ap96.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,151 @@ ++/* ++ * ALFA Network AP96 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define ALFA_AP96_GPIO_PCIE_RESET 2 ++#define ALFA_AP96_GPIO_SIM_DETECT 3 ++#define ALFA_AP96_GPIO_MICROSD_CD 4 ++#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 ++ ++#define ALFA_AP96_GPIO_BUTTON_RESET 11 ++ ++#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) ++ ++static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ALFA_AP96_GPIO_BUTTON_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct mmc_spi_platform_data alfa_ap96_mmc_data = { ++ .flags = MMC_SPI_USE_CD_GPIO, ++ .cd_gpio = ALFA_AP96_GPIO_MICROSD_CD, ++ .cd_debounce = 1, ++ .caps = MMC_CAP_NEEDS_POLL, ++ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, ++}; ++ ++static struct ath79_spi_controller_data ap96_spi0_cdata = { ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 0, ++ .is_flash = true, ++}; ++ ++static struct ath79_spi_controller_data ap96_spi1_cdata = { ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 1, ++}; ++ ++static struct ath79_spi_controller_data ap96_spi2_cdata = { ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 2, ++}; ++ ++static struct spi_board_info alfa_ap96_spi_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .max_speed_hz = 25000000, ++ .modalias = "m25p80", ++ .controller_data = &ap96_spi0_cdata ++ }, { ++ .bus_num = 0, ++ .chip_select = 1, ++ .max_speed_hz = 25000000, ++ .modalias = "mmc_spi", ++ .platform_data = &alfa_ap96_mmc_data, ++ .controller_data = &ap96_spi1_cdata ++ }, { ++ .bus_num = 0, ++ .chip_select = 2, ++ .max_speed_hz = 6250000, ++ .modalias = "rtc-pcf2123", ++ .controller_data = &ap96_spi2_cdata ++ }, ++}; ++ ++static struct ath79_spi_platform_data alfa_ap96_spi_data = { ++ .bus_num = 0, ++ .num_chipselect = 3, ++}; ++ ++static void __init alfa_ap96_gpio_setup(void) ++{ ++ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | ++ AR71XX_GPIO_FUNC_SPI_CS2_EN); ++ ++ gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); ++ gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); ++ gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); ++ gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); ++ gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); ++ gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); ++} ++ ++#define ALFA_AP96_WAN_PHYMASK BIT(4) ++#define ALFA_AP96_LAN_PHYMASK BIT(5) ++#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) ++ ++static void __init alfa_ap96_init(void) ++{ ++ alfa_ap96_gpio_setup(); ++ ++ ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; ++ ath79_eth1_pll_data.pll_1000 = 0x110000; ++ ++ ath79_register_eth(0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; ++ ath79_eth1_pll_data.pll_1000 = 0x110000; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_pci(); ++ ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, ++ ARRAY_SIZE(alfa_ap96_spi_info)); ++ ++ ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(alfa_ap96_gpio_keys), ++ alfa_ap96_gpio_keys); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", ++ alfa_ap96_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-alfa-nx.c linux-4.1.13/arch/mips/ath79/mach-alfa-nx.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-alfa-nx.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-alfa-nx.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,113 @@ ++/* ++ * ALFA Network N2/N5 board support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define ALFA_NX_GPIO_LED_2 17 ++#define ALFA_NX_GPIO_LED_3 16 ++#define ALFA_NX_GPIO_LED_5 12 ++#define ALFA_NX_GPIO_LED_6 8 ++#define ALFA_NX_GPIO_LED_7 6 ++#define ALFA_NX_GPIO_LED_8 7 ++ ++#define ALFA_NX_GPIO_BTN_RESET 11 ++ ++#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) ++ ++#define ALFA_NX_MAC0_OFFSET 0 ++#define ALFA_NX_MAC1_OFFSET 6 ++#define ALFA_NX_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ALFA_NX_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led alfa_nx_leds_gpio[] __initdata = { ++ { ++ .name = "alfa:green:led_2", ++ .gpio = ALFA_NX_GPIO_LED_2, ++ .active_low = 1, ++ }, { ++ .name = "alfa:green:led_3", ++ .gpio = ALFA_NX_GPIO_LED_3, ++ .active_low = 1, ++ }, { ++ .name = "alfa:red:led_5", ++ .gpio = ALFA_NX_GPIO_LED_5, ++ .active_low = 1, ++ }, { ++ .name = "alfa:amber:led_6", ++ .gpio = ALFA_NX_GPIO_LED_6, ++ .active_low = 1, ++ }, { ++ .name = "alfa:green:led_7", ++ .gpio = ALFA_NX_GPIO_LED_7, ++ .active_low = 1, ++ }, { ++ .name = "alfa:green:led_8", ++ .gpio = ALFA_NX_GPIO_LED_8, ++ .active_low = 1, ++ } ++}; ++ ++static void __init alfa_nx_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), ++ alfa_nx_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(alfa_nx_gpio_keys), ++ alfa_nx_gpio_keys); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + ALFA_NX_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, ++ art + ALFA_NX_MAC1_OFFSET, 0); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++ /* LAN port */ ++ ath79_register_eth(1); ++ ++ ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", ++ alfa_nx_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-all0258n.c linux-4.1.13/arch/mips/ath79/mach-all0258n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-all0258n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-all0258n.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,88 @@ ++/* ++ * Allnet ALL0258N support ++ * ++ * Copyright (C) 2011 Daniel Golle ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++/* found via /sys/gpio/... try and error */ ++#define ALL0258N_GPIO_BTN_RESET 1 ++#define ALL0258N_GPIO_LED_RSSIHIGH 13 ++#define ALL0258N_GPIO_LED_RSSIMEDIUM 15 ++#define ALL0258N_GPIO_LED_RSSILOW 14 ++ ++/* defaults taken from others machs */ ++#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL) ++ ++/* showed up in the original firmware's bootlog */ ++#define ALL0258N_SEC_PHYMASK BIT(3) ++ ++static struct gpio_led all0258n_leds_gpio[] __initdata = { ++ { ++ .name = "all0258n:green:rssihigh", ++ .gpio = ALL0258N_GPIO_LED_RSSIHIGH, ++ .active_low = 1, ++ }, { ++ .name = "all0258n:yellow:rssimedium", ++ .gpio = ALL0258N_GPIO_LED_RSSIMEDIUM, ++ .active_low = 1, ++ }, { ++ .name = "all0258n:red:rssilow", ++ .gpio = ALL0258N_GPIO_LED_RSSILOW, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button all0258n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ALL0258N_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init all0258n_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio), ++ all0258n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(all0258n_gpio_keys), ++ all0258n_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ++ ath79_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK; ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ap91_pci_init(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N", ++ all0258n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-all0315n.c linux-4.1.13/arch/mips/ath79/mach-all0315n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-all0315n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-all0315n.c 2015-09-13 20:04:35.064524285 +0200 +@@ -0,0 +1,85 @@ ++/* ++ * Allnet ALL0315N support ++ * ++ * Copyright (C) 2012 Daniel Golle ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-m25p80.h" ++#include "dev-leds-gpio.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define ALL0315N_GPIO_BTN_RESET 0 ++#define ALL0315N_GPIO_LED_RSSIHIGH 14 ++#define ALL0315N_GPIO_LED_RSSIMEDIUM 15 ++#define ALL0315N_GPIO_LED_RSSILOW 16 ++ ++#define ALL0315N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ALL0315N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0315N_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led all0315n_leds_gpio[] __initdata = { ++ { ++ .name = "all0315n:green:rssihigh", ++ .gpio = ALL0315N_GPIO_LED_RSSIHIGH, ++ .active_low = 1, ++ }, { ++ .name = "all0315n:yellow:rssimedium", ++ .gpio = ALL0315N_GPIO_LED_RSSIMEDIUM, ++ .active_low = 1, ++ }, { ++ .name = "all0315n:red:rssilow", ++ .gpio = ALL0315N_GPIO_LED_RSSILOW, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button all0315n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ALL0315N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ALL0315N_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init all0315n_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1ffc0000); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1ffc1000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(all0315n_leds_gpio), ++ all0315n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ALL0315N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(all0315n_gpio_keys), ++ all0315n_gpio_keys); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 1); ++ ap91_pci_init(ee, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ALL0315N, "ALL0315N", "Allnet ALL0315N", ++ all0315n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s1.c linux-4.1.13/arch/mips/ath79/mach-antminer-s1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-antminer-s1.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,98 @@ ++/* ++ * Bitmain Antminer S1 board support ++ * ++ * Copyright (C) 2015 L. D. Pinney ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "dev-usb.h" ++ ++#define ANTMINER_S1_GPIO_BTN_RESET 11 ++ ++#define ANTMINER_S1_GPIO_LED_SYSTEM 23 ++#define ANTMINER_S1_GPIO_LED_WLAN 0 ++#define ANTMINER_S1_GPIO_USB_POWER 26 ++ ++#define ANTMINER_S1_KEYSPOLL_INTERVAL 20 /* msecs */ ++#define ANTMINER_S1_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S1_KEYSPOLL_INTERVAL) ++ ++static const char *ANTMINER_S1_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data ANTMINER_S1_flash_data = { ++ .part_probes = ANTMINER_S1_part_probes, ++}; ++ ++static struct gpio_led ANTMINER_S1_leds_gpio[] __initdata = { ++ { ++ .name = "antminer-s1:green:system", ++ .gpio = ANTMINER_S1_GPIO_LED_SYSTEM, ++ .active_low = 0, ++ },{ ++ .name = "antminer-s1:green:wlan", ++ .gpio = ANTMINER_S1_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button ANTMINER_S1_GPIO_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ANTMINER_S1_KEYSDEBOUNCE_INTERVAL, ++ .gpio = ANTMINER_S1_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init antminer_s1_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio), ++ ANTMINER_S1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL, ++ ARRAY_SIZE(ANTMINER_S1_GPIO_keys), ++ ANTMINER_S1_GPIO_keys); ++ ++ gpio_request_one(ANTMINER_S1_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&ANTMINER_S1_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ANTMINER_S1, "ANTMINER-S1", ++ "Antminer-S1", antminer_s1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s3.c linux-4.1.13/arch/mips/ath79/mach-antminer-s3.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-antminer-s3.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-antminer-s3.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,103 @@ ++/* ++ * Bitmain Antminer S3 board support ++ * ++ * Copyright (C) 2015 L. D. Pinney ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "dev-usb.h" ++ ++#define ANTMINER_S3_GPIO_LED_WLAN 0 ++#define ANTMINER_S3_GPIO_LED_SYSTEM 17 ++#define ANTMINER_S3_GPIO_LED_LAN 22 ++#define ANTMINER_S3_GPIO_USB_POWER 26 ++ ++#define ANTMINER_S3_GPIO_BTN_RESET 11 ++ ++#define ANTMINER_S3_KEYSPOLL_INTERVAL 88 /* msecs */ ++#define ANTMINER_S3_KEYSDEBOUNCE_INTERVAL (3 * ANTMINER_S3_KEYSPOLL_INTERVAL) ++ ++static const char *ANTMINER_S3_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data ANTMINER_S3_flash_data = { ++ .part_probes = ANTMINER_S3_part_probes, ++}; ++ ++static struct gpio_led ANTMINER_S3_leds_gpio[] __initdata = { ++ { ++ .name = "antminer-s3:green:wlan", ++ .gpio = ANTMINER_S3_GPIO_LED_WLAN, ++ .active_low = 0, ++ },{ ++ .name = "antminer-s3:green:system", ++ .gpio = ANTMINER_S3_GPIO_LED_SYSTEM, ++ .active_low = 0, ++ },{ ++ .name = "antminer-s3:yellow:lan", ++ .gpio = ANTMINER_S3_GPIO_LED_LAN, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button ANTMINER_S3_GPIO_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ANTMINER_S3_KEYSDEBOUNCE_INTERVAL, ++ .gpio = ANTMINER_S3_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init antminer_s3_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S3_leds_gpio), ++ ANTMINER_S3_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ANTMINER_S3_KEYSPOLL_INTERVAL, ++ ARRAY_SIZE(ANTMINER_S3_GPIO_keys), ++ ANTMINER_S3_GPIO_keys); ++ ++ gpio_request_one(ANTMINER_S3_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&ANTMINER_S3_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ANTMINER_S3, "ANTMINER-S3", ++ "Antminer-S3", antminer_s3_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap113.c linux-4.1.13/arch/mips/ath79/mach-ap113.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap113.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap113.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,84 @@ ++/* ++ * Atheros AP113 board support ++ * ++ * Copyright (C) 2011 Florian Fainelli ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "pci.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define AP113_GPIO_LED_USB 0 ++#define AP113_GPIO_LED_STATUS 1 ++#define AP113_GPIO_LED_ST 11 ++ ++#define AP113_GPIO_BTN_JUMPSTART 12 ++ ++#define AP113_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP113_KEYS_DEBOUNCE_INTERVAL (3 * AP113_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led ap113_leds_gpio[] __initdata = { ++ { ++ .name = "ap113:green:usb", ++ .gpio = AP113_GPIO_LED_USB, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap113:green:status", ++ .gpio = AP113_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap113:green:st", ++ .gpio = AP113_GPIO_LED_ST, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button ap113_gpio_keys[] __initdata = { ++ { ++ .desc = "jumpstart button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP113_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP113_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init ap113_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(0, ~BIT(0)); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_register_eth(0); ++ ++ ath79_register_gpio_keys_polled(-1, AP113_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap113_gpio_keys), ++ ap113_gpio_keys); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap113_leds_gpio), ++ ap113_leds_gpio); ++ ++ ath79_register_pci(); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP113, "AP113", "Atheros AP113", ++ ap113_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap121.c linux-4.1.13/arch/mips/ath79/mach-ap121.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap121.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap121.c 2015-12-04 19:57:04.298083689 +0100 +@@ -1,19 +1,21 @@ + /* + * Atheros AP121 board support + * +- * Copyright (C) 2011 Gabor Juhos ++ * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +-#include "machtypes.h" ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" ++#include "dev-m25p80.h" + #include "dev-spi.h" + #include "dev-usb.h" + #include "dev-wmac.h" ++#include "machtypes.h" + + #define AP121_GPIO_LED_WLAN 0 + #define AP121_GPIO_LED_USB 1 +@@ -24,7 +26,14 @@ + #define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ + #define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) + +-#define AP121_CAL_DATA_ADDR 0x1fff1000 ++#define AP121_MAC0_OFFSET 0x0000 ++#define AP121_MAC1_OFFSET 0x0006 ++#define AP121_CALDATA_OFFSET 0x1000 ++#define AP121_WMAC_MAC_OFFSET 0x1002 ++ ++#define AP121_MINI_GPIO_LED_WLAN 0 ++#define AP121_MINI_GPIO_BTN_JUMPSTART 12 ++#define AP121_MINI_GPIO_BTN_RESET 11 + + static struct gpio_led ap121_leds_gpio[] __initdata = { + { +@@ -58,35 +67,78 @@ + } + }; + +-static struct spi_board_info ap121_spi_info[] = { ++static struct gpio_led ap121_mini_leds_gpio[] __initdata = { + { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l1606e", +- } ++ .name = "ap121:green:wlan", ++ .gpio = AP121_MINI_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, + }; + +-static struct ath79_spi_platform_data ap121_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = { ++ { ++ .desc = "jumpstart button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP121_MINI_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ }, ++ { ++ .desc = "reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP121_MINI_GPIO_BTN_RESET, ++ .active_low = 1, ++ } + }; + ++static void __init ap121_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(art + AP121_CALDATA_OFFSET, ++ art + AP121_WMAC_MAC_OFFSET); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++} ++ + static void __init ap121_setup(void) + { +- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); ++ ap121_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), + ap121_leds_gpio); + ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap121_gpio_keys), + ap121_gpio_keys); +- +- ath79_register_spi(&ap121_spi_data, ap121_spi_info, +- ARRAY_SIZE(ap121_spi_info)); + ath79_register_usb(); +- ath79_register_wmac(cal_data); + } + + MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", + ap121_setup); ++ ++static void __init ap121_mini_setup(void) ++{ ++ ap121_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio), ++ ap121_mini_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap121_mini_gpio_keys), ++ ap121_mini_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI", ++ ap121_mini_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap132.c linux-4.1.13/arch/mips/ath79/mach-ap132.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap132.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap132.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,189 @@ ++/* ++ * Atheros AP132 reference board support ++ * ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012 Gabor Juhos ++ * Copyright (c) 2013 Embedded Wireless GmbH ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define AP132_GPIO_LED_USB 4 ++#define AP132_GPIO_LED_WLAN_5G 12 ++#define AP132_GPIO_LED_WLAN_2G 13 ++#define AP132_GPIO_LED_STATUS_RED 14 ++#define AP132_GPIO_LED_WPS_RED 15 ++ ++#define AP132_GPIO_BTN_WPS 16 ++ ++#define AP132_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL) ++ ++#define AP132_MAC0_OFFSET 0 ++#define AP132_WMAC_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led ap132_leds_gpio[] __initdata = { ++ { ++ .name = "ap132:red:status", ++ .gpio = AP132_GPIO_LED_STATUS_RED, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap132:red:wps", ++ .gpio = AP132_GPIO_LED_WPS_RED, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap132:red:wlan-2g", ++ .gpio = AP132_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap132:red:usb", ++ .gpio = AP132_GPIO_LED_USB, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button ap132_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP132_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg; ++ ++static struct ar8327_platform_data ap132_ar8327_data = { ++ .pad0_cfg = &ap132_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info ap132_mdio1_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.1", ++ .phy_addr = 0, ++ .platform_data = &ap132_ar8327_data, ++ }, ++}; ++ ++static void __init ap132_mdio_setup(void) ++{ ++ void __iomem *base; ++ u32 t; ++ ++#define GPIO_IN_ENABLE3_ADDRESS 0x0050 ++#define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff0000 ++#define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16 ++#define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK) ++#define GPIO_OUT_FUNCTION4_ADDRESS 0x003c ++#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff000000 ++#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB 24 ++#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK) ++#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0x0000ff00 ++#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB 8 ++#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK) ++ ++ base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); ++ ++ t = __raw_readl(base + GPIO_IN_ENABLE3_ADDRESS); ++ t &= ~GPIO_IN_ENABLE3_MII_GE1_MDI_MASK; ++ t |= GPIO_IN_ENABLE3_MII_GE1_MDI_SET(19); ++ __raw_writel(t, base + GPIO_IN_ENABLE3_ADDRESS); ++ ++ ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 19), base + AR71XX_GPIO_REG_OE); ++ ++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 17), base + AR71XX_GPIO_REG_OE); ++ ++ ++ t = __raw_readl(base + GPIO_OUT_FUNCTION4_ADDRESS); ++ t &= ~(GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK); ++ t |= GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(0x20) | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(0x21); ++ __raw_writel(t, base + GPIO_OUT_FUNCTION4_ADDRESS); ++ ++ iounmap(base); ++ ++} ++ ++static void __init ap132_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap132_leds_gpio), ++ ap132_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP132_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap132_gpio_keys), ++ ap132_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac(art + AP132_WMAC_CALDATA_OFFSET, NULL); ++ ++ /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ ++ ap132_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; ++ ap132_ar8327_pad0_cfg.sgmii_delay_en = true; ++ ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ap132_mdio_setup(); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP132_MAC0_OFFSET, 0); ++ ++ mdiobus_register_board_info(ap132_mdio1_info, ++ ARRAY_SIZE(ap132_mdio1_info)); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_data.phy_mask = BIT(0); ++ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP132, "AP132", ++ "Atheros AP132 reference board", ++ ap132_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap136.c linux-4.1.13/arch/mips/ath79/mach-ap136.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap136.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap136.c 2015-12-04 19:57:04.370078979 +0100 +@@ -18,23 +18,29 @@ + * + */ + +-#include +-#include ++#include ++#include + +-#include "machtypes.h" ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" + #include "dev-gpio-buttons.h" ++#include "dev-eth.h" + #include "dev-leds-gpio.h" +-#include "dev-spi.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" + #include "dev-usb.h" + #include "dev-wmac.h" +-#include "pci.h" ++#include "machtypes.h" + +-#define AP136_GPIO_LED_STATUS_RED 14 +-#define AP136_GPIO_LED_STATUS_GREEN 19 + #define AP136_GPIO_LED_USB 4 +-#define AP136_GPIO_LED_WLAN_2G 13 + #define AP136_GPIO_LED_WLAN_5G 12 ++#define AP136_GPIO_LED_WLAN_2G 13 ++#define AP136_GPIO_LED_STATUS_RED 14 + #define AP136_GPIO_LED_WPS_RED 15 ++#define AP136_GPIO_LED_STATUS_GREEN 19 + #define AP136_GPIO_LED_WPS_GREEN 20 + + #define AP136_GPIO_BTN_WPS 16 +@@ -43,37 +49,39 @@ + #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ + #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) + +-#define AP136_WMAC_CALDATA_OFFSET 0x1000 +-#define AP136_PCIE_CALDATA_OFFSET 0x5000 ++#define AP136_MAC0_OFFSET 0 ++#define AP136_MAC1_OFFSET 6 ++#define AP136_WMAC_CALDATA_OFFSET 0x1000 ++#define AP136_PCIE_CALDATA_OFFSET 0x5000 + + static struct gpio_led ap136_leds_gpio[] __initdata = { + { +- .name = "qca:green:status", ++ .name = "ap136:green:status", + .gpio = AP136_GPIO_LED_STATUS_GREEN, + .active_low = 1, + }, + { +- .name = "qca:red:status", ++ .name = "ap136:red:status", + .gpio = AP136_GPIO_LED_STATUS_RED, + .active_low = 1, + }, + { +- .name = "qca:green:wps", ++ .name = "ap136:green:wps", + .gpio = AP136_GPIO_LED_WPS_GREEN, + .active_low = 1, + }, + { +- .name = "qca:red:wps", ++ .name = "ap136:red:wps", + .gpio = AP136_GPIO_LED_WPS_RED, + .active_low = 1, + }, + { +- .name = "qca:red:wlan-2g", ++ .name = "ap136:red:wlan-2g", + .gpio = AP136_GPIO_LED_WLAN_2G, + .active_low = 1, + }, + { +- .name = "qca:red:usb", ++ .name = "ap136:red:usb", + .gpio = AP136_GPIO_LED_USB, + .active_low = 1, + } +@@ -98,59 +106,151 @@ + }, + }; + +-static struct spi_board_info ap136_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l6405d", +- } ++static struct ar8327_pad_cfg ap136_ar8327_pad0_cfg; ++static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg; ++ ++static struct ar8327_platform_data ap136_ar8327_data = { ++ .pad0_cfg = &ap136_ar8327_pad0_cfg, ++ .pad6_cfg = &ap136_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, + }; + +-static struct ath79_spi_platform_data ap136_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static struct mdio_board_info ap136_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &ap136_ar8327_data, ++ }, + }; + +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data ap136_ath9k_data; ++static void __init ap136_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), ++ ap136_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap136_gpio_keys), ++ ap136_gpio_keys); ++ ++ ath79_register_usb(); ++ ath79_register_nfc(); ++ ++ ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); + +-static int ap136_pci_plat_dev_init(struct pci_dev *dev) ++ ath79_register_mdio(0, 0x0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0); ++ ++ mdiobus_register_board_info(ap136_mdio0_info, ++ ARRAY_SIZE(ap136_mdio0_info)); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected tot eh SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++} ++ ++static void __init ap136_010_setup(void) + { +- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) +- dev->dev.platform_data = &ap136_ath9k_data; ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + +- return 0; ++ /* GMAC0 of the AR8327 switch is connected to GMAC0 via RGMII */ ++ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; ++ ap136_ar8327_pad0_cfg.txclk_delay_en = true; ++ ap136_ar8327_pad0_cfg.rxclk_delay_en = true; ++ ap136_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ ap136_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; ++ ++ /* GMAC6 of the AR8327 switch is connected to GMAC1 via SGMII */ ++ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; ++ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; ++ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ap136_common_setup(); ++ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); + } + +-static void __init ap136_pci_init(u8 *eeprom) ++MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", ++ "Atheros AP136-010 reference board", ++ ap136_010_setup); ++ ++static void __init ap136_020_common_setup(void) + { +- memcpy(ap136_ath9k_data.eeprom_data, eeprom, +- sizeof(ap136_ath9k_data.eeprom_data)); ++ /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ ++ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; ++ ap136_ar8327_pad0_cfg.sgmii_delay_en = true; ++ ++ /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */ ++ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII; ++ ap136_ar8327_pad6_cfg.txclk_delay_en = true; ++ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; ++ ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; + +- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); +- ath79_register_pci(); ++ ath79_eth0_pll_data.pll_1000 = 0x56000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ap136_common_setup(); + } +-#else +-static inline void ap136_pci_init(u8 *eeprom) {} +-#endif /* CONFIG_PCI */ + +-static void __init ap136_setup(void) ++static void __init ap136_020_setup(void) + { + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), +- ap136_leds_gpio); +- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ap136_gpio_keys), +- ap136_gpio_keys); +- ath79_register_spi(&ap136_spi_data, ap136_spi_info, +- ARRAY_SIZE(ap136_spi_info)); +- ath79_register_usb(); +- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); +- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); ++ ap136_020_common_setup(); ++ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); + } + +-MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", +- "Atheros AP136-010 reference board", +- ap136_setup); ++MIPS_MACHINE(ATH79_MACH_AP136_020, "AP136-020", ++ "Atheros AP136-020 reference board", ++ ap136_020_setup); ++ ++/* ++ * AP135-020 is similar to AP136-020, any future AP135 specific init ++ * code can be added here. ++ */ ++static void __init ap135_020_setup(void) ++{ ++ ap136_leds_gpio[0].name = "ap135:green:status"; ++ ap136_leds_gpio[1].name = "ap135:red:status"; ++ ap136_leds_gpio[2].name = "ap135:green:wps"; ++ ap136_leds_gpio[3].name = "ap135:red:wps"; ++ ap136_leds_gpio[4].name = "ap135:red:wlan-2g"; ++ ap136_leds_gpio[5].name = "ap135:red:usb"; ++ ++ ap136_020_common_setup(); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP135_020, "AP135-020", ++ "Atheros AP135-020 reference board", ++ ap135_020_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap143.c linux-4.1.13/arch/mips/ath79/mach-ap143.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap143.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap143.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,142 @@ ++/* ++ * Atheros AP143 reference board support ++ * ++ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2012 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define AP143_GPIO_LED_WLAN 12 ++#define AP143_GPIO_LED_WPS 13 ++#define AP143_GPIO_LED_STATUS 13 ++ ++#define AP143_GPIO_LED_WAN 4 ++#define AP143_GPIO_LED_LAN1 16 ++#define AP143_GPIO_LED_LAN2 15 ++#define AP143_GPIO_LED_LAN3 14 ++#define AP143_GPIO_LED_LAN4 11 ++ ++#define AP143_GPIO_BTN_WPS 17 ++ ++#define AP143_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL) ++ ++#define AP143_MAC0_OFFSET 0 ++#define AP143_MAC1_OFFSET 6 ++#define AP143_WMAC_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led ap143_leds_gpio[] __initdata = { ++ { ++ .name = "ap143:green:status", ++ .gpio = AP143_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap143:green:wlan", ++ .gpio = AP143_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button ap143_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP143_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init ap143_gpio_led_setup(void) ++{ ++ ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true); ++ ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true); ++ ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true); ++ ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true); ++ ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true); ++ ++ ath79_gpio_output_select(AP143_GPIO_LED_WAN, ++ QCA953X_GPIO_OUT_MUX_LED_LINK5); ++ ath79_gpio_output_select(AP143_GPIO_LED_LAN1, ++ QCA953X_GPIO_OUT_MUX_LED_LINK1); ++ ath79_gpio_output_select(AP143_GPIO_LED_LAN2, ++ QCA953X_GPIO_OUT_MUX_LED_LINK2); ++ ath79_gpio_output_select(AP143_GPIO_LED_LAN3, ++ QCA953X_GPIO_OUT_MUX_LED_LINK3); ++ ath79_gpio_output_select(AP143_GPIO_LED_LAN4, ++ QCA953X_GPIO_OUT_MUX_LED_LINK4); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio), ++ ap143_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap143_gpio_keys), ++ ap143_gpio_keys); ++} ++ ++static void __init ap143_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ap143_gpio_led_setup(); ++ ++ ath79_register_usb(); ++ ++ ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN); ++ ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0); ++ ++ /* WAN port */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_register_eth(0); ++ ++ /* LAN ports */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board", ++ ap143_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap147.c linux-4.1.13/arch/mips/ath79/mach-ap147.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap147.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap147.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,125 @@ ++/* ++ * Atheros AP147 reference board support ++ * ++ * Copyright (C) 2014 Matthias Schiffer ++ * Copyright (C) 2015 Sven Eckelmann ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define AP147_GPIO_LED_WAN 4 ++#define AP147_GPIO_LED_LAN1 16 ++#define AP147_GPIO_LED_LAN2 15 ++#define AP147_GPIO_LED_LAN3 14 ++#define AP147_GPIO_LED_LAN4 11 ++#define AP147_GPIO_LED_STATUS 13 ++#define AP147_GPIO_LED_WLAN_2G 12 ++ ++#define AP147_GPIO_BTN_WPS 17 ++ ++#define AP147_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP147_KEYS_DEBOUNCE_INTERVAL (3 * AP147_KEYS_POLL_INTERVAL) ++ ++#define AP147_MAC0_OFFSET 0x1000 ++ ++static struct gpio_led ap147_leds_gpio[] __initdata = { ++ { ++ .name = "ap147:green:status", ++ .gpio = AP147_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, { ++ .name = "ap147:green:wlan-2g", ++ .gpio = AP147_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, { ++ .name = "ap147:green:lan1", ++ .gpio = AP147_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "ap147:green:lan2", ++ .gpio = AP147_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "ap147:green:lan3", ++ .gpio = AP147_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "ap147:green:lan4", ++ .gpio = AP147_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "ap147:green:wan", ++ .gpio = AP147_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button ap147_gpio_keys[] __initdata = { ++ { ++ .desc = "wps button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP147_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP147_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init ap147_setup(void) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap147_leds_gpio), ++ ap147_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP147_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap147_gpio_keys), ++ ap147_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_pci(); ++ ++ ath79_register_wmac(art + AP147_MAC0_OFFSET, NULL); ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art, 0); ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_init_mac(ath79_eth0_data.mac_addr, art, 1); ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP147_010, "AP147-010", "Atheros AP147-010 reference board", ap147_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap152.c linux-4.1.13/arch/mips/ath79/mach-ap152.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap152.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap152.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,141 @@ ++ ++/* ++ * Qualcomm Atheros AP152 reference board support ++ * ++ * Copyright (c) 2015 Qualcomm Atheros ++ * Copyright (c) 2012 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++#include "pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++ ++#define AP152_GPIO_LED_USB0 7 ++#define AP152_GPIO_LED_USB1 8 ++ ++#define AP152_GPIO_BTN_RESET 2 ++#define AP152_GPIO_BTN_WPS 1 ++#define AP152_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP152_KEYS_DEBOUNCE_INTERVAL (3 * AP152_KEYS_POLL_INTERVAL) ++ ++#define AP152_MAC0_OFFSET 0 ++#define AP152_WMAC_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led ap152_leds_gpio[] __initdata = { ++ { ++ .name = "ap152:green:usb0", ++ .gpio = AP152_GPIO_LED_USB0, ++ .active_low = 1, ++ }, ++ { ++ .name = "ap152:green:usb1", ++ .gpio = AP152_GPIO_LED_USB1, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button ap152_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP152_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP152_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg ap152_ar8337_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_SGMII, ++ .sgmii_delay_en = true, ++}; ++ ++static struct ar8327_platform_data ap152_ar8337_data = { ++ .pad0_cfg = &ap152_ar8337_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info ap152_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &ap152_ar8337_data, ++ }, ++}; ++ ++static void __init ap152_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap152_leds_gpio), ++ ap152_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, AP152_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap152_gpio_keys), ++ ap152_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ platform_device_register(&ath79_mdio0_device); ++ ++ mdiobus_register_board_info(ap152_mdio0_info, ++ ARRAY_SIZE(ap152_mdio0_info)); ++ ++ ath79_register_wmac(art + AP152_WMAC_CALDATA_OFFSET, NULL); ++ ath79_register_pci(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP152_MAC0_OFFSET, 0); ++ ++ /* GMAC0 is connected to an AR8337 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP152, "AP152", "Qualcomm Atheros AP152 reference board", ++ ap152_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap81.c linux-4.1.13/arch/mips/ath79/mach-ap81.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap81.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap81.c 2015-12-04 19:57:04.310082904 +0100 +@@ -9,12 +9,16 @@ + * by the Free Software Foundation. + */ + +-#include "machtypes.h" +-#include "dev-wmac.h" ++#include ++#include ++ ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" +-#include "dev-spi.h" ++#include "dev-m25p80.h" + #include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" + + #define AP81_GPIO_LED_STATUS 1 + #define AP81_GPIO_LED_AOSS 3 +@@ -67,20 +71,6 @@ + } + }; + +-static struct spi_board_info ap81_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "m25p64", +- } +-}; +- +-static struct ath79_spi_platform_data ap81_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- + static void __init ap81_setup(void) + { + u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR); +@@ -90,10 +80,24 @@ + ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap81_gpio_keys), + ap81_gpio_keys); +- ath79_register_spi(&ap81_spi_data, ap81_spi_info, +- ARRAY_SIZE(ap81_spi_info)); +- ath79_register_wmac(cal_data); ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(cal_data, NULL); + ath79_register_usb(); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, cal_data, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.has_ar8216 = 1; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, cal_data, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); + } + + MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap83.c linux-4.1.13/arch/mips/ath79/mach-ap83.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap83.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap83.c 2015-12-04 19:57:04.438074530 +0100 +@@ -0,0 +1,242 @@ ++/* ++ * Atheros AP83 board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define AP83_GPIO_LED_WLAN 6 ++#define AP83_GPIO_LED_POWER 14 ++#define AP83_GPIO_LED_JUMPSTART 15 ++#define AP83_GPIO_BTN_JUMPSTART 12 ++#define AP83_GPIO_BTN_RESET 21 ++ ++#define AP83_050_GPIO_VSC7385_CS 1 ++#define AP83_050_GPIO_VSC7385_MISO 3 ++#define AP83_050_GPIO_VSC7385_MOSI 16 ++#define AP83_050_GPIO_VSC7385_SCK 17 ++ ++#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) ++ ++static struct physmap_flash_data ap83_flash_data = { ++ .width = 2, ++}; ++ ++static struct resource ap83_flash_resources[] = { ++ [0] = { ++ .start = AR71XX_SPI_BASE, ++ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device ap83_flash_device = { ++ .name = "ar91xx-flash", ++ .id = -1, ++ .resource = ap83_flash_resources, ++ .num_resources = ARRAY_SIZE(ap83_flash_resources), ++ .dev = { ++ .platform_data = &ap83_flash_data, ++ } ++}; ++ ++static struct gpio_led ap83_leds_gpio[] __initdata = { ++ { ++ .name = "ap83:green:jumpstart", ++ .gpio = AP83_GPIO_LED_JUMPSTART, ++ .active_low = 0, ++ }, { ++ .name = "ap83:green:power", ++ .gpio = AP83_GPIO_LED_POWER, ++ .active_low = 0, ++ }, { ++ .name = "ap83:green:wlan", ++ .gpio = AP83_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button ap83_gpio_keys[] __initdata = { ++ { ++ .desc = "soft_reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP83_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "jumpstart", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP83_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ } ++}; ++ ++static struct resource ap83_040_spi_resources[] = { ++ [0] = { ++ .start = AR71XX_SPI_BASE, ++ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device ap83_040_spi_device = { ++ .name = "ap83-spi", ++ .id = 0, ++ .resource = ap83_040_spi_resources, ++ .num_resources = ARRAY_SIZE(ap83_040_spi_resources), ++}; ++ ++static struct spi_gpio_platform_data ap83_050_spi_data = { ++ .miso = AP83_050_GPIO_VSC7385_MISO, ++ .mosi = AP83_050_GPIO_VSC7385_MOSI, ++ .sck = AP83_050_GPIO_VSC7385_SCK, ++ .num_chipselect = 1, ++}; ++ ++static struct platform_device ap83_050_spi_device = { ++ .name = "spi_gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &ap83_050_spi_data, ++ } ++}; ++ ++static void ap83_vsc7385_reset(void) ++{ ++ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); ++ udelay(10); ++ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); ++ mdelay(50); ++} ++ ++static struct vsc7385_platform_data ap83_vsc7385_data = { ++ .reset = ap83_vsc7385_reset, ++ .ucode_name = "vsc7385_ucode_ap83.bin", ++ .mac_cfg = { ++ .tx_ipg = 6, ++ .bit2 = 0, ++ .clk_sel = 3, ++ }, ++}; ++ ++static struct spi_board_info ap83_spi_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .max_speed_hz = 25000000, ++ .modalias = "spi-vsc7385", ++ .platform_data = &ap83_vsc7385_data, ++ .controller_data = (void *) AP83_050_GPIO_VSC7385_CS, ++ } ++}; ++ ++static void __init ap83_generic_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_mdio(0, 0xfffffffe); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = 0x1; ++ ++ ath79_register_eth(0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_eth1_pll_data.pll_1000 = 0x1f000000; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), ++ ap83_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap83_gpio_keys), ++ ap83_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac(eeprom, NULL); ++ ++ platform_device_register(&ap83_flash_device); ++ ++ spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); ++} ++ ++static void ap83_040_flash_lock(struct platform_device *pdev) ++{ ++ ath79_flash_acquire(); ++} ++ ++static void ap83_040_flash_unlock(struct platform_device *pdev) ++{ ++ ath79_flash_release(); ++} ++ ++static void __init ap83_040_setup(void) ++{ ++ ap83_flash_data.lock = ap83_040_flash_lock; ++ ap83_flash_data.unlock = ap83_040_flash_unlock; ++ ap83_generic_setup(); ++ platform_device_register(&ap83_040_spi_device); ++} ++ ++static void __init ap83_050_setup(void) ++{ ++ ap83_generic_setup(); ++ platform_device_register(&ap83_050_spi_device); ++} ++ ++static void __init ap83_setup(void) ++{ ++ u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); ++ unsigned int board_version; ++ ++ board_version = (unsigned int)(board_id[0] - '0'); ++ board_version += ((unsigned int)(board_id[1] - '0')) * 10; ++ ++ switch (board_version) { ++ case 40: ++ ap83_040_setup(); ++ break; ++ case 50: ++ ap83_050_setup(); ++ break; ++ default: ++ printk(KERN_WARNING "AP83-%03u board is not yet supported\n", ++ board_version); ++ } ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ap96.c linux-4.1.13/arch/mips/ath79/mach-ap96.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ap96.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ap96.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,142 @@ ++/* ++ * Atheros AP96 board support ++ * ++ * Copyright (C) 2009 Marco Porsch ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2010 Atheros Communications ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define AP96_GPIO_LED_12_GREEN 0 ++#define AP96_GPIO_LED_3_GREEN 1 ++#define AP96_GPIO_LED_2_GREEN 2 ++#define AP96_GPIO_LED_WPS_GREEN 4 ++#define AP96_GPIO_LED_5_GREEN 5 ++#define AP96_GPIO_LED_4_ORANGE 6 ++ ++/* Reset button - next to the power connector */ ++#define AP96_GPIO_BTN_RESET 3 ++/* WPS button - next to a led on right */ ++#define AP96_GPIO_BTN_WPS 8 ++ ++#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) ++ ++#define AP96_WMAC0_MAC_OFFSET 0x120c ++#define AP96_WMAC1_MAC_OFFSET 0x520c ++#define AP96_CALDATA0_OFFSET 0x1000 ++#define AP96_CALDATA1_OFFSET 0x5000 ++ ++/* ++ * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 ++ * below (from left to right on the board). Led 1 seems to be on whenever the ++ * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; ++ * others are green. ++ * ++ * In addition, there is one led next to a button on the right side for WPS. ++ */ ++static struct gpio_led ap96_leds_gpio[] __initdata = { ++ { ++ .name = "ap96:green:led2", ++ .gpio = AP96_GPIO_LED_2_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "ap96:green:led3", ++ .gpio = AP96_GPIO_LED_3_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "ap96:orange:led4", ++ .gpio = AP96_GPIO_LED_4_ORANGE, ++ .active_low = 1, ++ }, { ++ .name = "ap96:green:led5", ++ .gpio = AP96_GPIO_LED_5_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "ap96:green:led12", ++ .gpio = AP96_GPIO_LED_12_GREEN, ++ .active_low = 1, ++ }, { /* next to a button on right */ ++ .name = "ap96:green:wps", ++ .gpio = AP96_GPIO_LED_WPS_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button ap96_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP96_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AP96_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++#define AP96_WAN_PHYMASK 0x10 ++#define AP96_LAN_PHYMASK 0x0f ++ ++static void __init ap96_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK; ++ ++ ath79_eth1_pll_data.pll_1000 = 0x1f000000; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), ++ ap96_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ap96_gpio_keys), ++ ap96_gpio_keys); ++ ++ ap94_pci_init(art + AP96_CALDATA0_OFFSET, ++ art + AP96_WMAC0_MAC_OFFSET, ++ art + AP96_CALDATA1_OFFSET, ++ art + AP96_WMAC1_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-archer-c7.c linux-4.1.13/arch/mips/ath79/mach-archer-c7.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-archer-c7.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-archer-c7.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,266 @@ ++/* ++ * TP-LINK Archer C5/C7/TL-WDR4900 v2 board support ++ * ++ * Copyright (c) 2013 Gabor Juhos ++ * Copyright (c) 2014 施康成 ++ * Copyright (c) 2014 Imre Kaloz ++ * ++ * Based on the Qualcomm Atheros AP135/AP136 reference board support code ++ * Copyright (c) 2012 Qualcomm Atheros ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define ARCHER_C7_GPIO_LED_WLAN2G 12 ++#define ARCHER_C7_GPIO_LED_SYSTEM 14 ++#define ARCHER_C7_GPIO_LED_QSS 15 ++#define ARCHER_C7_GPIO_LED_WLAN5G 17 ++#define ARCHER_C7_GPIO_LED_USB1 18 ++#define ARCHER_C7_GPIO_LED_USB2 19 ++ ++#define ARCHER_C7_GPIO_BTN_RFKILL 13 ++#define ARCHER_C7_GPIO_BTN_RESET 16 ++ ++#define ARCHER_C7_GPIO_USB1_POWER 22 ++#define ARCHER_C7_GPIO_USB2_POWER 21 ++ ++#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL) ++ ++#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000 ++#define ARCHER_C7_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *archer_c7_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data archer_c7_flash_data = { ++ .part_probes = archer_c7_part_probes, ++}; ++ ++static struct gpio_led archer_c7_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:qss", ++ .gpio = ARCHER_C7_GPIO_LED_QSS, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:system", ++ .gpio = ARCHER_C7_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:wlan2g", ++ .gpio = ARCHER_C7_GPIO_LED_WLAN2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:wlan5g", ++ .gpio = ARCHER_C7_GPIO_LED_WLAN5G, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:usb1", ++ .gpio = ARCHER_C7_GPIO_LED_USB1, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:usb2", ++ .gpio = ARCHER_C7_GPIO_LED_USB2, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ARCHER_C7_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL switch", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ARCHER_C7_GPIO_BTN_RFKILL, ++ }, ++}; ++ ++static const struct ar8327_led_info archer_c7_leds_ar8327[] __initconst = { ++ AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), ++ AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), ++ AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), ++ AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), ++ AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), ++}; ++ ++/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ ++static struct ar8327_pad_cfg archer_c7_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_SGMII, ++ .sgmii_delay_en = true, ++}; ++ ++/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ ++static struct ar8327_pad_cfg archer_c7_ar8327_pad6_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg archer_c7_ar8327_led_cfg = { ++ .led_ctrl0 = 0xc737c737, ++ .led_ctrl1 = 0x00000000, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x0030c300, ++ .open_drain = false, ++}; ++ ++static struct ar8327_platform_data archer_c7_ar8327_data = { ++ .pad0_cfg = &archer_c7_ar8327_pad0_cfg, ++ .pad6_cfg = &archer_c7_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &archer_c7_ar8327_led_cfg, ++ .num_leds = ARRAY_SIZE(archer_c7_leds_ar8327), ++ .leds = archer_c7_leds_ar8327, ++}; ++ ++static struct mdio_board_info archer_c7_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &archer_c7_ar8327_data, ++ }, ++}; ++ ++static void __init common_setup(bool pcie_slot) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&archer_c7_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio), ++ archer_c7_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(archer_c7_gpio_keys), ++ archer_c7_gpio_keys); ++ ++ ath79_init_mac(tmpmac, mac, -1); ++ ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ if (pcie_slot) { ++ ath79_register_pci(); ++ } else { ++ ath79_init_mac(tmpmac, mac, -1); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++ ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac); ++ } ++ ++ mdiobus_register_board_info(archer_c7_mdio0_info, ++ ARRAY_SIZE(archer_c7_mdio0_info)); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x56000000; ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_eth(1); ++ ++ gpio_request_one(ARCHER_C7_GPIO_USB1_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB1 power"); ++ gpio_request_one(ARCHER_C7_GPIO_USB2_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB2 power"); ++ ath79_register_usb(); ++} ++ ++static void __init archer_c5_setup(void) ++{ ++ common_setup(true); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ARCHER_C5, "ARCHER-C5", "TP-LINK Archer C5", ++ archer_c5_setup); ++ ++static void __init archer_c7_setup(void) ++{ ++ common_setup(true); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7", ++ archer_c7_setup); ++ ++static void __init tl_wdr4900_v2_setup(void) ++{ ++ common_setup(false); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WDR4900_V2, "TL-WDR4900-v2", "TP-LINK TL-WDR4900 v2", ++ tl_wdr4900_v2_setup) ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-arduino-yun.c linux-4.1.13/arch/mips/ath79/mach-arduino-yun.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-arduino-yun.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-arduino-yun.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,137 @@ ++/* ++ * Arduino Yun support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2015 Hauke Mehrtens ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include ++#include ++#include "common.h" ++#include "gpio.h" ++#include "linux/gpio.h" ++ ++// Uncomment to have reset on gpio18 instead of gipo7 ++#define DS2_B ++ ++#define DS_GPIO_LED_WLAN 0 ++#define DS_GPIO_LED_USB 1 ++ ++#define DS_GPIO_OE 21 ++#define DS_GPIO_AVR_RESET 18 ++ ++// Maintained to have the console in the previous version of DS2 working ++#define DS_GPIO_AVR_RESET_DS2 7 ++ ++#define DS_GPIO_OE2 22 ++#define DS_GPIO_UART_ENA 23 ++#define DS_GPIO_CONF_BTN 20 ++ ++#define DS_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DS_KEYS_DEBOUNCE_INTERVAL (3 * DS_KEYS_POLL_INTERVAL) ++ ++#define DS_MAC0_OFFSET 0x0000 ++#define DS_MAC1_OFFSET 0x0006 ++#define DS_CALDATA_OFFSET 0x1000 ++#define DS_WMAC_MAC_OFFSET 0x1002 ++ ++ ++static struct gpio_led ds_leds_gpio[] __initdata = { ++ { ++ .name = "arduino:white:usb", ++ .gpio = DS_GPIO_LED_USB, ++ .active_low = 0, ++ }, ++ { ++ .name = "arduino:blue:wlan", ++ .gpio = DS_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init ds_common_setup(void) ++{ ++ static u8 mac[6]; ++ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ath79_register_m25p80(NULL); ++ ++ if (ar93xx_wmac_read_mac_address(mac)) { ++ ath79_register_wmac(NULL, NULL); ++ } else { ++ ath79_register_wmac(art + DS_CALDATA_OFFSET, ++ art + DS_WMAC_MAC_OFFSET); ++ memcpy(mac, art + DS_WMAC_MAC_OFFSET, sizeof(mac)); ++ } ++ ++ mac[3] |= 0x08; ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ mac[3] &= 0xF7; ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++} ++ ++static void __init ds_setup(void) ++{ ++ u32 t; ++ ++ ds_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio), ++ ds_leds_gpio); ++ ath79_register_usb(); ++ ++ //Disable the Function for some pins to have GPIO functionality active ++ // GPIO6-7-8 and GPIO11 ++ ath79_gpio_function_setup(AR933X_GPIO_FUNC_JTAG_DISABLE | AR933X_GPIO_FUNC_I2S_MCK_EN, 0); ++ ++ ath79_gpio_function2_setup(AR933X_GPIO_FUNC2_JUMPSTART_DISABLE, 0); ++ ++ printk("Setting DogStick2 GPIO\n"); ++ ++ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; ++ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); ++ ++ // Put the avr reset to high ++ if (gpio_request_one(DS_GPIO_AVR_RESET_DS2, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-1") != 0) ++ printk("Error setting GPIO OE\n"); ++ gpio_unexport(DS_GPIO_AVR_RESET_DS2); ++ gpio_free(DS_GPIO_AVR_RESET_DS2); ++ ++ // enable OE of level shifter ++ if (gpio_request_one(DS_GPIO_OE, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-1") != 0) ++ printk("Error setting GPIO OE\n"); ++ ++ if (gpio_request_one(DS_GPIO_UART_ENA, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "UART-ENA") != 0) ++ printk("Error setting GPIO Uart Enable\n"); ++ ++ // enable OE of level shifter ++ if (gpio_request_one(DS_GPIO_OE2, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, "OE-2") != 0) ++ printk("Error setting GPIO OE2\n"); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ARDUINO_YUN, "Yun", "Arduino Yun", ds_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-aw-nr580.c linux-4.1.13/arch/mips/ath79/mach-aw-nr580.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-aw-nr580.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-aw-nr580.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,107 @@ ++/* ++ * AzureWave AW-NR580 board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define AW_NR580_GPIO_LED_READY_RED 0 ++#define AW_NR580_GPIO_LED_WLAN 1 ++#define AW_NR580_GPIO_LED_READY_GREEN 2 ++#define AW_NR580_GPIO_LED_WPS_GREEN 4 ++#define AW_NR580_GPIO_LED_WPS_AMBER 5 ++ ++#define AW_NR580_GPIO_BTN_WPS 3 ++#define AW_NR580_GPIO_BTN_RESET 11 ++ ++#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led aw_nr580_leds_gpio[] __initdata = { ++ { ++ .name = "aw-nr580:red:ready", ++ .gpio = AW_NR580_GPIO_LED_READY_RED, ++ .active_low = 0, ++ }, { ++ .name = "aw-nr580:green:ready", ++ .gpio = AW_NR580_GPIO_LED_READY_GREEN, ++ .active_low = 0, ++ }, { ++ .name = "aw-nr580:green:wps", ++ .gpio = AW_NR580_GPIO_LED_WPS_GREEN, ++ .active_low = 0, ++ }, { ++ .name = "aw-nr580:amber:wps", ++ .gpio = AW_NR580_GPIO_LED_WPS_AMBER, ++ .active_low = 0, ++ }, { ++ .name = "aw-nr580:green:wlan", ++ .gpio = AW_NR580_GPIO_LED_WLAN, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AW_NR580_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = AW_NR580_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static const char *aw_nr580_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data aw_nr580_flash_data = { ++ .part_probes = aw_nr580_part_probes, ++}; ++ ++static void __init aw_nr580_setup(void) ++{ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_pci(); ++ ++ ath79_register_m25p80(&aw_nr580_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio), ++ aw_nr580_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(aw_nr580_gpio_keys), ++ aw_nr580_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580", ++ aw_nr580_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-bhu-bxu2000n2-a.c linux-4.1.13/arch/mips/ath79/mach-bhu-bxu2000n2-a.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-bhu-bxu2000n2-a.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-bhu-bxu2000n2-a.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,120 @@ ++/* ++ * BHU BXU2000n-2 A1 board support ++ * ++ * Copyright (C) 2013 Terry Yang ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define BHU_BXU2000N2_A1_GPIO_LED_WLAN 13 ++#define BHU_BXU2000N2_A1_GPIO_LED_WAN 19 ++#define BHU_BXU2000N2_A1_GPIO_LED_LAN 21 ++#define BHU_BXU2000N2_A1_GPIO_LED_SYSTEM 14 ++ ++#define BHU_BXU2000N2_A1_GPIO_BTN_RESET 17 ++ ++#define BHU_BXU2000N2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL \ ++ (3 * BHU_BXU2000N2_KEYS_POLL_INTERVAL) ++ ++static const char *bhu_bxu2000n2_part_probes[] = { ++ "cmdlinepart", ++ NULL, ++}; ++ ++static struct flash_platform_data bhu_bxu2000n2_flash_data = { ++ .part_probes = bhu_bxu2000n2_part_probes, ++}; ++ ++static struct gpio_led bhu_bxu2000n2_a1_leds_gpio[] __initdata = { ++ { ++ .name = "bhu:green:status", ++ .gpio = BHU_BXU2000N2_A1_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "bhu:green:lan", ++ .gpio = BHU_BXU2000N2_A1_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "bhu:green:wan", ++ .gpio = BHU_BXU2000N2_A1_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "bhu:green:wlan", ++ .gpio = BHU_BXU2000N2_A1_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button bhu_bxu2000n2_a1_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = BHU_BXU2000N2_A1_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init bhu_ap123_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&bhu_bxu2000n2_flash_data); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ /* GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch. Only use PHY3 */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.phy_mask = BIT(3); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, ee+2); ++} ++ ++static void __init bhu_bxu2000n2_a1_setup(void) ++{ ++ bhu_ap123_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(bhu_bxu2000n2_a1_leds_gpio), ++ bhu_bxu2000n2_a1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, BHU_BXU2000N2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(bhu_bxu2000n2_a1_gpio_keys), ++ bhu_bxu2000n2_a1_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_BHU_BXU2000N2_A1, "BXU2000n-2-A1", ++ "BHU BXU2000n-2 rev. A1", ++ bhu_bxu2000n2_a1_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-bsb.c linux-4.1.13/arch/mips/ath79/mach-bsb.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-bsb.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-bsb.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,83 @@ ++/* ++ * Smart Electronics Black Swift board support ++ * ++ * Copyright (C) 2014 Dmitriy Zherebkov dzh@black-swift.com ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define BSB_GPIO_LED_SYS 27 ++ ++#define BSB_GPIO_BTN_RESET 11 ++ ++#define BSB_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define BSB_KEYS_DEBOUNCE_INTERVAL (3 * BSB_KEYS_POLL_INTERVAL) ++ ++#define BSB_MAC_OFFSET 0x0000 ++#define BSB_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led bsb_leds_gpio[] __initdata = { ++ { ++ .name = "bsb:red:sys", ++ .gpio = BSB_GPIO_LED_SYS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button bsb_gpio_keys[] __initdata = { ++ { ++ .desc = "reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = BSB_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = BSB_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init bsb_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false,false); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(bsb_leds_gpio), ++ bsb_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, BSB_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(bsb_gpio_keys), ++ bsb_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + BSB_MAC_OFFSET, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + BSB_MAC_OFFSET, 2); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(art + BSB_CALDATA_OFFSET, ++ art + BSB_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_BSB, "BSB", "Smart Electronics Black Swift board", ++ bsb_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-cap4200ag.c linux-4.1.13/arch/mips/ath79/mach-cap4200ag.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-cap4200ag.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-cap4200ag.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,131 @@ ++/* ++ * Senao CAP4200AG board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define CAP4200AG_GPIO_LED_PWR_GREEN 12 ++#define CAP4200AG_GPIO_LED_PWR_AMBER 13 ++#define CAP4200AG_GPIO_LED_LAN_GREEN 14 ++#define CAP4200AG_GPIO_LED_LAN_AMBER 15 ++#define CAP4200AG_GPIO_LED_WLAN_GREEN 18 ++#define CAP4200AG_GPIO_LED_WLAN_AMBER 19 ++ ++#define CAP4200AG_GPIO_BTN_RESET 17 ++ ++#define CAP4200AG_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define CAP4200AG_KEYS_DEBOUNCE_INTERVAL (3 * CAP4200AG_KEYS_POLL_INTERVAL) ++ ++#define CAP4200AG_MAC_OFFSET 0 ++#define CAP4200AG_WMAC_CALDATA_OFFSET 0x1000 ++#define CAP4200AG_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led cap4200ag_leds_gpio[] __initdata = { ++ { ++ .name = "senao:green:pwr", ++ .gpio = CAP4200AG_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "senao:amber:pwr", ++ .gpio = CAP4200AG_GPIO_LED_PWR_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "senao:green:lan", ++ .gpio = CAP4200AG_GPIO_LED_LAN_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "senao:amber:lan", ++ .gpio = CAP4200AG_GPIO_LED_LAN_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "senao:green:wlan", ++ .gpio = CAP4200AG_GPIO_LED_WLAN_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "senao:amber:wlan", ++ .gpio = CAP4200AG_GPIO_LED_WLAN_AMBER, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button cap4200ag_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = CAP4200AG_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = CAP4200AG_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init cap4200ag_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 mac[6]; ++ ++ ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_GREEN, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_AMBER, ++ AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(cap4200ag_leds_gpio), ++ cap4200ag_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, CAP4200AG_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(cap4200ag_gpio_keys), ++ cap4200ag_gpio_keys); ++ ++ ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -1); ++ ath79_wmac_disable_2ghz(); ++ ath79_register_wmac(art + CAP4200AG_WMAC_CALDATA_OFFSET, mac); ++ ++ ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -2); ++ ap91_pci_init(art + CAP4200AG_PCIE_CALDATA_OFFSET, mac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + CAP4200AG_MAC_OFFSET, -2); ++ ++ /* GMAC0 is connected to an external PHY */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_CAP4200AG, "CAP4200AG", "Senao CAP4200AG", ++ cap4200ag_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-carambola2.c linux-4.1.13/arch/mips/ath79/mach-carambola2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-carambola2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-carambola2.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,105 @@ ++/* ++ * 8devices Carambola2 board support ++ * ++ * Copyright (C) 2013 Darius Augulis ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define CARAMBOLA2_GPIO_LED_WLAN 0 ++#define CARAMBOLA2_GPIO_LED_ETH0 14 ++#define CARAMBOLA2_GPIO_LED_ETH1 13 ++ ++#define CARAMBOLA2_GPIO_BTN_JUMPSTART 11 ++ ++#define CARAMBOLA2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL (3 * CARAMBOLA2_KEYS_POLL_INTERVAL) ++ ++#define CARAMBOLA2_MAC0_OFFSET 0x0000 ++#define CARAMBOLA2_MAC1_OFFSET 0x0006 ++#define CARAMBOLA2_CALDATA_OFFSET 0x1000 ++#define CARAMBOLA2_WMAC_MAC_OFFSET 0x1002 ++ ++static struct gpio_led carambola2_leds_gpio[] __initdata = { ++ { ++ .name = "carambola2:green:wlan", ++ .gpio = CARAMBOLA2_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "carambola2:orange:eth0", ++ .gpio = CARAMBOLA2_GPIO_LED_ETH0, ++ .active_low = 0, ++ }, { ++ .name = "carambola2:orange:eth1", ++ .gpio = CARAMBOLA2_GPIO_LED_ETH1, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button carambola2_gpio_keys[] __initdata = { ++ { ++ .desc = "jumpstart button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = CARAMBOLA2_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init carambola2_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(art + CARAMBOLA2_CALDATA_OFFSET, ++ art + CARAMBOLA2_WMAC_MAC_OFFSET); ++ ++ ath79_setup_ar933x_phy4_switch(true, true); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + CARAMBOLA2_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + CARAMBOLA2_MAC1_OFFSET, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++} ++ ++static void __init carambola2_setup(void) ++{ ++ carambola2_common_setup(); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(carambola2_leds_gpio), ++ carambola2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, CARAMBOLA2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(carambola2_gpio_keys), ++ carambola2_gpio_keys); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_CARAMBOLA2, "CARAMBOLA2", "8devices Carambola2 board", ++ carambola2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-cf-e316n-v2.c linux-4.1.13/arch/mips/ath79/mach-cf-e316n-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-cf-e316n-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-cf-e316n-v2.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,132 @@ ++/* ++ * COMFAST CF-E316N v2 ++ * by Shenzhen Four Seas Global Link Network Technology Co., Ltd ++ * ++ * aka CF-E316V2, CF-E316N-V2 and CF-E316Nv2.0 (no FCC ID) ++ * ++ * Copyright (C) 2015 Paul Fertser ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++static struct gpio_led cf_e316n_v2_leds_gpio[] __initdata = { ++ { ++ .name = "cf-e316n-v2:blue:diag", ++ .gpio = 0, ++ .active_low = 0, ++ }, { ++ .name = "cf-e316n-v2:red:diag", ++ .gpio = 2, ++ .active_low = 0, ++ }, { ++ .name = "cf-e316n-v2:green:diag", ++ .gpio = 3, ++ .active_low = 0, ++ }, { ++ .name = "cf-e316n-v2:blue:wlan", ++ .gpio = 12, ++ .active_low = 1, ++ }, { ++ .name = "cf-e316n-v2:blue:wan", ++ .gpio = 17, ++ .active_low = 1, ++ }, { ++ .name = "cf-e316n-v2:blue:lan", ++ .gpio = 19, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button cf_e316n_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = 60, ++ .gpio = 20, ++ .active_low = 1, ++ }, ++}; ++ ++/* There's a Pericon Technology PT7A7514 connected to GPIO 16 */ ++#define EXT_WATCHDOG_GPIO 16 ++static struct timer_list gpio_wdt_timer; ++ ++static void gpio_wdt_toggle(unsigned long period) ++{ ++ static int state; ++ state = !state; ++ gpio_set_value(EXT_WATCHDOG_GPIO, state); ++ mod_timer(&gpio_wdt_timer, jiffies + period); ++} ++ ++static void __init cf_e316n_v2_setup(void) ++{ ++ u8 *maclan = (u8 *) KSEG1ADDR(0x1f010000); ++ u8 *macwlan = (u8 *) KSEG1ADDR(0x1f011002); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1f011000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ gpio_request(EXT_WATCHDOG_GPIO, "PT7A7514 watchdog"); ++ gpio_direction_output(EXT_WATCHDOG_GPIO, 0); ++ setup_timer(&gpio_wdt_timer, gpio_wdt_toggle, msecs_to_jiffies(500)); ++ gpio_wdt_toggle(msecs_to_jiffies(1)); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ath79_register_mdio(1, 0x0); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_init_mac(ath79_eth0_data.mac_addr, maclan, 0); ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_init_mac(ath79_eth1_data.mac_addr, maclan, 2); ++ ath79_register_eth(1); ++ ++ /* Enable 2x Skyworks SE2576L WLAN power amplifiers */ ++ gpio_request(13, "RF Amp 1"); ++ gpio_direction_output(13, 1); ++ gpio_request(14, "RF Amp 2"); ++ gpio_direction_output(14, 1); ++ ath79_init_mac(tmpmac, macwlan, 0); ++ ath79_register_wmac(ee, tmpmac); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e316n_v2_leds_gpio), ++ cf_e316n_v2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, 20, ++ ARRAY_SIZE(cf_e316n_v2_gpio_keys), ++ cf_e316n_v2_gpio_keys); ++ ++ /* J1 is a High-Speed USB port, pin 1 is Vcc */ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_CF_E316N_V2, "CF-E316N-V2", "COMFAST CF-E316N v2", ++ cf_e316n_v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-cpe510.c linux-4.1.13/arch/mips/ath79/mach-cpe510.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-cpe510.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-cpe510.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,107 @@ ++/* ++ * TP-LINK CPE210/220/510/520 board support ++ * ++ * Copyright (C) 2014 Matthias Schiffer ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++ ++#define CPE510_GPIO_LED_LAN0 11 ++#define CPE510_GPIO_LED_LAN1 12 ++#define CPE510_GPIO_LED_L1 13 ++#define CPE510_GPIO_LED_L2 14 ++#define CPE510_GPIO_LED_L3 15 ++#define CPE510_GPIO_LED_L4 16 ++ ++#define CPE510_GPIO_BTN_RESET 4 ++ ++#define CPE510_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define CPE510_KEYS_DEBOUNCE_INTERVAL (3 * CPE510_KEYS_POLL_INTERVAL) ++ ++ ++static struct gpio_led cpe510_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan0", ++ .gpio = CPE510_GPIO_LED_LAN0, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan1", ++ .gpio = CPE510_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:link1", ++ .gpio = CPE510_GPIO_LED_L1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:link2", ++ .gpio = CPE510_GPIO_LED_L2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:link3", ++ .gpio = CPE510_GPIO_LED_L3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:link4", ++ .gpio = CPE510_GPIO_LED_L4, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button cpe510_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = CPE510_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = CPE510_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++ ++static void __init cpe510_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f830008); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* Disable JTAG, enabling GPIOs 0-3 */ ++ /* Configure OBS4 line, for GPIO 4*/ ++ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, ++ AR934X_GPIO_FUNC_CLK_OBS4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio), ++ cpe510_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, CPE510_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(cpe510_gpio_keys), ++ cpe510_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_CPE510, "CPE510", "TP-LINK CPE210/220/510/520", ++ cpe510_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-db120.c linux-4.1.13/arch/mips/ath79/mach-db120.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-db120.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-db120.c 2015-12-04 19:57:04.322082119 +0100 +@@ -2,7 +2,7 @@ + * Atheros DB120 reference board support + * + * Copyright (c) 2011 Qualcomm Atheros +- * Copyright (c) 2011 Gabor Juhos ++ * Copyright (c) 2011-2012 Gabor Juhos + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above +@@ -19,16 +19,26 @@ + */ + + #include ++#include ++#include + #include ++#include + +-#include "machtypes.h" ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" + #include "dev-spi.h" + #include "dev-usb.h" + #include "dev-wmac.h" +-#include "pci.h" ++#include "machtypes.h" + ++#define DB120_GPIO_LED_USB 11 + #define DB120_GPIO_LED_WLAN_5G 12 + #define DB120_GPIO_LED_WLAN_2G 13 + #define DB120_GPIO_LED_STATUS 14 +@@ -39,8 +49,10 @@ + #define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ + #define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) + +-#define DB120_WMAC_CALDATA_OFFSET 0x1000 +-#define DB120_PCIE_CALDATA_OFFSET 0x5000 ++#define DB120_MAC0_OFFSET 0 ++#define DB120_MAC1_OFFSET 6 ++#define DB120_WMAC_CALDATA_OFFSET 0x1000 ++#define DB120_PCIE_CALDATA_OFFSET 0x5000 + + static struct gpio_led db120_leds_gpio[] __initdata = { + { +@@ -63,6 +75,11 @@ + .gpio = DB120_GPIO_LED_WLAN_2G, + .active_low = 1, + }, ++ { ++ .name = "db120:green:usb", ++ .gpio = DB120_GPIO_LED_USB, ++ .active_low = 1, ++ } + }; + + static struct gpio_keys_button db120_gpio_keys[] __initdata = { +@@ -76,60 +93,85 @@ + }, + }; + +-static struct spi_board_info db120_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "s25sl064a", +- } ++static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, + }; + +-static struct ath79_spi_platform_data db120_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static struct ar8327_led_cfg db120_ar8327_led_cfg = { ++ .led_ctrl0 = 0x00000000, ++ .led_ctrl1 = 0xc737c737, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x00c30c00, ++ .open_drain = true, + }; + +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data db120_ath9k_data; +- +-static int db120_pci_plat_dev_init(struct pci_dev *dev) +-{ +- switch (PCI_SLOT(dev->devfn)) { +- case 0: +- dev->dev.platform_data = &db120_ath9k_data; +- break; +- } +- +- return 0; +-} +- +-static void __init db120_pci_init(u8 *eeprom) +-{ +- memcpy(db120_ath9k_data.eeprom_data, eeprom, +- sizeof(db120_ath9k_data.eeprom_data)); ++static struct ar8327_platform_data db120_ar8327_data = { ++ .pad0_cfg = &db120_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &db120_ar8327_led_cfg, ++}; + +- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); +- ath79_register_pci(); +-} +-#else +-static inline void db120_pci_init(u8 *eeprom) {} +-#endif /* CONFIG_PCI */ ++static struct mdio_board_info db120_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &db120_ar8327_data, ++ }, ++}; + + static void __init db120_setup(void) + { + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + ++ ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO); ++ ath79_register_m25p80(NULL); ++ + ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), + db120_leds_gpio); + ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, + ARRAY_SIZE(db120_gpio_keys), + db120_gpio_keys); +- ath79_register_spi(&db120_spi_data, db120_spi_info, +- ARRAY_SIZE(db120_spi_info)); + ath79_register_usb(); +- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); +- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); ++ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); ++ ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0); ++ ++ mdiobus_register_board_info(db120_mdio0_info, ++ ARRAY_SIZE(db120_mdio0_info)); ++ ++ /* GMAC0 is connected to an AR8327 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_nfc(); + } + + MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dgl-5500-a1.c linux-4.1.13/arch/mips/ath79/mach-dgl-5500-a1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dgl-5500-a1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dgl-5500-a1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,150 @@ ++/* ++ * D-Link DGL-5500 board support ++ * ++ * Copyright (C) 2014 Gabor Juhos ++ * Copyright (C) 2014 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DGL_5500_A1_GPIO_LED_POWER_ORANGE 14 ++#define DGL_5500_A1_GPIO_LED_POWER_GREEN 19 ++#define DGL_5500_A1_GPIO_LED_PLANET_GREEN 22 ++#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE 23 ++ ++#define DGL_5500_A1_GPIO_BTN_WPS 16 ++#define DGL_5500_A1_GPIO_BTN_RESET 17 ++ ++#define DGL_5500_A1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL \ ++ (3 * DGL_5500_A1_KEYS_POLL_INTERVAL) ++ ++#define DGL_5500_A1_WMAC_CALDATA_OFFSET 0x1000 ++ ++#define DGL_5500_A1_LAN_MAC_OFFSET 0x04 ++#define DGL_5500_A1_WAN_MAC_OFFSET 0x16 ++ ++static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:green:power", ++ .gpio = DGL_5500_A1_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:orange:power", ++ .gpio = DGL_5500_A1_GPIO_LED_POWER_ORANGE, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:green:planet", ++ .gpio = DGL_5500_A1_GPIO_LED_PLANET_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:orange:planet", ++ .gpio = DGL_5500_A1_GPIO_LED_PLANET_ORANGE, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DGL_5500_A1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DGL_5500_A1_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = { ++ /* Use the SGMII interface for the GMAC0 of the AR8327 switch */ ++ .mode = AR8327_PAD_MAC_SGMII, ++ .sgmii_delay_en = true, ++}; ++ ++static struct ar8327_platform_data dgl_5500_a1_ar8327_data = { ++ .pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info dgl_5500_a1_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &dgl_5500_a1_ar8327_data, ++ }, ++}; ++ ++static void __init dgl_5500_a1_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 lan_mac[ETH_ALEN]; ++ ++ ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio), ++ dgl_5500_a1_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dgl_5500_a1_gpio_keys), ++ dgl_5500_a1_gpio_keys); ++ ++ ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac); ++ ++ ath79_register_mdio(0, 0x0); ++ mdiobus_register_board_info(dgl_5500_a1_mdio0_info, ++ ARRAY_SIZE(dgl_5500_a1_mdio0_info)); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); ++ ++ /* GMAC1 is connected to an AR8327N switch via the SMGII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.phy_mask = BIT(0); ++ ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1", ++ dgl_5500_a1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dhp-1565-a1.c linux-4.1.13/arch/mips/ath79/mach-dhp-1565-a1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dhp-1565-a1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dhp-1565-a1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,170 @@ ++/* ++ * D-Link DHP-1565 rev. A1 board support ++ * ++ * Copyright (C) 2014 Jacek Kikiewicz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DHP1565A1_GPIO_LED_BLUE_USB 11 ++#define DHP1565A1_GPIO_LED_AMBER_POWER 14 ++#define DHP1565A1_GPIO_LED_BLUE_POWER 22 ++#define DHP1565A1_GPIO_LED_BLUE_WPS 15 ++#define DHP1565A1_GPIO_LED_AMBER_PLANET 19 ++#define DHP1565A1_GPIO_LED_BLUE_PLANET 18 ++#define DHP1565A1_GPIO_LED_WLAN_2G 13 ++ ++#define DHP1565A1_GPIO_WAN_LED_ENABLE 20 ++ ++#define DHP1565A1_GPIO_BTN_RESET 17 ++#define DHP1565A1_GPIO_BTN_WPS 16 ++ ++#define DHP1565A1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DHP1565A1_KEYS_DEBOUNCE_INTERVAL (3 * DHP1565A1_KEYS_POLL_INTERVAL) ++ ++#define DHP1565A1_MAC0_OFFSET 0xFFA0 ++#define DHP1565A1_MAC1_OFFSET 0xFFB4 ++#define DHP1565A1_WMAC0_OFFSET 0x5 ++#define DHP1565A1_WMAC_CALDATA_OFFSET 0x1000 ++#define DHP1565A1_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led dhp1565a1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:amber:power", ++ .gpio = DHP1565A1_GPIO_LED_AMBER_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:green:power", ++ .gpio = DHP1565A1_GPIO_LED_BLUE_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:amber:planet", ++ .gpio = DHP1565A1_GPIO_LED_AMBER_PLANET, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:green:planet", ++ .gpio = DHP1565A1_GPIO_LED_BLUE_PLANET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button dhp1565a1_gpio_keys[] __initdata = { ++ { ++ .desc = "Soft reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DHP1565A1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DHP1565A1_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg dhp1565a1_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_platform_data dhp1565a1_ar8327_data = { ++ .pad0_cfg = &dhp1565a1_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info dhp1565a1_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &dhp1565a1_ar8327_data, ++ }, ++}; ++ ++static void __init dhp1565a1_generic_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; ++ u8 wmac0[ETH_ALEN]; ++ ++ ath79_parse_ascii_mac(mac + DHP1565A1_MAC0_OFFSET, mac0); ++ ath79_parse_ascii_mac(mac + DHP1565A1_MAC1_OFFSET, mac1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_gpio_keys_polled(-1, DHP1565A1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dhp1565a1_gpio_keys), ++ dhp1565a1_gpio_keys); ++ ++ ath79_init_mac(wmac0, mac0, 0); ++ ath79_register_wmac(art + DHP1565A1_WMAC_CALDATA_OFFSET, wmac0); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ++ mdiobus_register_board_info(dhp1565a1_mdio0_info, ++ ARRAY_SIZE(dhp1565a1_mdio0_info)); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 1); ++ ++ /* GMAC0 is connected to an AR8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++} ++ ++static void __init dhp1565a1_setup(void) ++{ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dhp1565a1_leds_gpio), ++ dhp1565a1_leds_gpio); ++ ++ dhp1565a1_generic_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DHP_1565_A1, "DHP-1565-A1", ++ "D-Link DHP-1565 rev. A1", ++ dhp1565a1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-505-a1.c linux-4.1.13/arch/mips/ath79/mach-dir-505-a1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dir-505-a1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dir-505-a1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,116 @@ ++/* ++ * DLink DIR-505 A1 board support ++ * ++ * Copyright (C) 2013 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define DIR_505A1_GPIO_BTN_WPS 11 /* verify */ ++#define DIR_505A1_GPIO_BTN_RESET 12 /* verify */ ++ ++#define DIR_505A1_GPIO_LED_RED 26 /* unused, fyi */ ++#define DIR_505A1_GPIO_LED_GREEN 27 ++ ++#define DIR_505A1_GPIO_WAN_LED_ENABLE 1 ++ ++#define DIR_505A1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DIR_505A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_505A1_KEYS_POLL_INTERVAL) ++ ++#define DIR_505A1_ART_ADDRESS 0x1f010000 ++#define DIR_505A1_CALDATA_OFFSET 0x1000 ++ ++#define DIR_505A1_MAC_PART_ADDRESS 0x1f020000 ++#define DIR_505A1_LAN_MAC_OFFSET 0x04 ++#define DIR_505A1_WAN_MAC_OFFSET 0x16 ++ ++static struct gpio_led dir_505_a1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:green:power", ++ .gpio = DIR_505A1_GPIO_LED_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "d-link:red:status", ++ .gpio = DIR_505A1_GPIO_LED_RED, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button dir_505_a1_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_505A1_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_505A1_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init dir_505_a1_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(DIR_505A1_ART_ADDRESS); ++ u8 *mac = (u8 *) KSEG1ADDR(DIR_505A1_MAC_PART_ADDRESS); ++ u8 lan_mac[ETH_ALEN]; ++ u8 wan_mac[ETH_ALEN]; ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ gpio_request_one(DIR_505A1_GPIO_WAN_LED_ENABLE, ++ GPIOF_OUT_INIT_LOW, "WAN LED enable"); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_505_a1_leds_gpio), ++ dir_505_a1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, DIR_505A1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dir_505_a1_gpio_keys), ++ dir_505_a1_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_usb(); ++ ++ ath79_parse_ascii_mac(mac + DIR_505A1_LAN_MAC_OFFSET, lan_mac); ++ ath79_parse_ascii_mac(mac + DIR_505A1_WAN_MAC_OFFSET, wan_mac); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(art + DIR_505A1_CALDATA_OFFSET, lan_mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_505_A1, "DIR-505-A1", ++ "D-Link DIR-505 rev. A1", dir_505_a1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-600-a1.c linux-4.1.13/arch/mips/ath79/mach-dir-600-a1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dir-600-a1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dir-600-a1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,159 @@ ++/* ++ * D-Link DIR-600 rev. A1 board support ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * Copyright (C) 2012 Vadim Girlin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define DIR_600_A1_GPIO_LED_WPS 0 ++#define DIR_600_A1_GPIO_LED_POWER_AMBER 1 ++#define DIR_600_A1_GPIO_LED_POWER_GREEN 6 ++#define DIR_600_A1_GPIO_LED_LAN1 13 ++#define DIR_600_A1_GPIO_LED_LAN2 14 ++#define DIR_600_A1_GPIO_LED_LAN3 15 ++#define DIR_600_A1_GPIO_LED_LAN4 16 ++#define DIR_600_A1_GPIO_LED_WAN_AMBER 7 ++#define DIR_600_A1_GPIO_LED_WAN_GREEN 17 ++ ++#define DIR_600_A1_GPIO_BTN_RESET 8 ++#define DIR_600_A1_GPIO_BTN_WPS 12 ++ ++#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL) ++ ++#define DIR_600_A1_NVRAM_ADDR 0x1f030000 ++#define DIR_600_A1_NVRAM_SIZE 0x10000 ++ ++static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:green:power", ++ .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, ++ }, { ++ .name = "d-link:amber:power", ++ .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, ++ }, { ++ .name = "d-link:amber:wan", ++ .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER, ++ }, { ++ .name = "d-link:green:wan", ++ .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:lan1", ++ .gpio = DIR_600_A1_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:lan2", ++ .gpio = DIR_600_A1_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:lan3", ++ .gpio = DIR_600_A1_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:lan4", ++ .gpio = DIR_600_A1_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "d-link:blue:wps", ++ .gpio = DIR_600_A1_GPIO_LED_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_600_A1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_600_A1_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init dir_600_a1_setup(void) ++{ ++ const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 mac_buff[6]; ++ u8 *mac = NULL; ++ ++ if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, ++ "lan_mac=", mac_buff) == 0) { ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1); ++ mac = mac_buff; ++ } ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), ++ dir_600_a1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dir_600_a1_gpio_keys), ++ dir_600_a1_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ ap91_pci_init(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", ++ dir_600_a1_setup); ++ ++static void __init dir_615_e1_setup(void) ++{ ++ dir_600_a1_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_615_E1, "DIR-615-E1", "D-Link DIR-615 rev. E1", ++ dir_615_e1_setup); ++ ++static void __init dir_615_e4_setup(void) ++{ ++ dir_600_a1_setup(); ++ ap9x_pci_setup_wmac_led_pin(0, 1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4", ++ dir_615_e4_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-c1.c linux-4.1.13/arch/mips/ath79/mach-dir-615-c1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-c1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dir-615-c1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,135 @@ ++/* ++ * D-Link DIR-615 rev C1 board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */ ++#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */ ++#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */ ++#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */ ++#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */ ++#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */ ++#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */ ++ ++/* buttons may need refinement */ ++ ++#define DIR_615C1_GPIO_BTN_WPS 12 ++#define DIR_615C1_GPIO_BTN_RESET 21 ++ ++#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL) ++ ++#define DIR_615C1_CONFIG_ADDR 0x1f020000 ++#define DIR_615C1_CONFIG_SIZE 0x10000 ++ ++#define DIR_615C1_WLAN_MAC_ADDR 0x1f3fffb4 ++ ++static struct gpio_led dir_615c1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:orange:status", ++ .gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS, ++ .active_low = 1, ++ }, { ++ .name = "d-link:blue:wps", ++ .gpio = DIR_615C1_GPIO_LED_BLUE_WPS, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:wan", ++ .gpio = DIR_615C1_GPIO_LED_GREEN_WAN, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:wancpu", ++ .gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:wlan", ++ .gpio = DIR_615C1_GPIO_LED_GREEN_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:status", ++ .gpio = DIR_615C1_GPIO_LED_GREEN_STATUS, ++ .active_low = 1, ++ }, { ++ .name = "d-link:orange:wan", ++ .gpio = DIR_615C1_GPIO_LED_ORANGE_WAN, ++ .active_low = 1, ++ } ++ ++}; ++ ++static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_615C1_GPIO_BTN_RESET, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_615C1_GPIO_BTN_WPS, ++ } ++}; ++ ++#define DIR_615C1_LAN_PHYMASK BIT(0) ++#define DIR_615C1_WAN_PHYMASK BIT(4) ++#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \ ++ DIR_615C1_WAN_PHYMASK)) ++ ++static void __init dir_615c1_setup(void) ++{ ++ const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 mac[ETH_ALEN], wlan_mac[ETH_ALEN]; ++ ++ if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE, ++ "lan_mac=", mac) == 0) { ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ } ++ ++ ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615C1_WLAN_MAC_ADDR), wlan_mac); ++ ++ ath79_register_mdio(0, DIR_615C1_MDIO_MASK); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK; ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio), ++ dir_615c1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dir_615c1_gpio_keys), ++ dir_615c1_gpio_keys); ++ ++ ath79_register_wmac(eeprom, wlan_mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1", ++ dir_615c1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-i1.c linux-4.1.13/arch/mips/ath79/mach-dir-615-i1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dir-615-i1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dir-615-i1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,133 @@ ++/* ++ * D-Link DIR-615 rev. I1 board support ++ * Copyright (C) 2013-2015 Jaehoon You ++ * ++ * based on the DIR-600 rev. A1 board support code ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * Copyright (C) 2012 Vadim Girlin ++ * ++ * based on the TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support code ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DIR_615_I1_GPIO_LED_WPS 15 ++#define DIR_615_I1_GPIO_LED_POWER_AMBER 14 ++#define DIR_615_I1_GPIO_LED_POWER_GREEN 4 ++#define DIR_615_I1_GPIO_LED_WAN_AMBER 22 ++#define DIR_615_I1_GPIO_LED_WAN_GREEN 12 ++#define DIR_615_I1_GPIO_LED_WLAN_GREEN 13 ++ ++#define DIR_615_I1_GPIO_BTN_WPS 16 ++#define DIR_615_I1_GPIO_BTN_RESET 17 ++ ++#define DIR_615_I1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DIR_615_I1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_I1_KEYS_POLL_INTERVAL) ++ ++#define DIR_615_I1_LAN_PHYMASK BIT(0) ++#define DIR_615_I1_WAN_PHYMASK BIT(4) ++#define DIR_615_I1_WLAN_MAC_ADDR 0x1fffffb4 ++ ++static struct gpio_led dir_615_i1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:green:power", ++ .gpio = DIR_615_I1_GPIO_LED_POWER_GREEN, ++ }, { ++ .name = "d-link:amber:power", ++ .gpio = DIR_615_I1_GPIO_LED_POWER_AMBER, ++ }, { ++ .name = "d-link:amber:wan", ++ .gpio = DIR_615_I1_GPIO_LED_WAN_AMBER, ++ }, { ++ .name = "d-link:green:wan", ++ .gpio = DIR_615_I1_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "d-link:green:wlan", ++ .gpio = DIR_615_I1_GPIO_LED_WLAN_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "d-link:blue:wps", ++ .gpio = DIR_615_I1_GPIO_LED_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button dir_615_i1_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_615_I1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DIR_615_I1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR_615_I1_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init dir_615_i1_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 mac[ETH_ALEN]; ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_mdio(1, ~(DIR_615_I1_WAN_PHYMASK)); ++ ++ ath79_parse_ascii_mac((char *) KSEG1ADDR(DIR_615_I1_WLAN_MAC_ADDR), mac); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = DIR_615_I1_WAN_PHYMASK; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_mask = DIR_615_I1_LAN_PHYMASK; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ /* Disable JTAG, enabling GPIOs 0-3 */ ++ /* Configure OBS4 line, for GPIO 4*/ ++ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, ++ AR934X_GPIO_FUNC_CLK_OBS4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615_i1_leds_gpio), ++ dir_615_i1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DIR_615_I1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dir_615_i1_gpio_keys), ++ dir_615_i1_gpio_keys); ++ ++ ath79_register_wmac(eeprom, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_615_I1, "DIR-615-I1", "D-Link DIR-615 rev. I1", ++ dir_615_i1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-b1.c linux-4.1.13/arch/mips/ath79/mach-dir-825-b1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-b1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dir-825-b1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,191 @@ ++/* ++ * D-Link DIR-825 rev. B1 board support ++ * ++ * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o. ++ * ++ * based on mach-wndr3700.c ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define DIR825B1_GPIO_LED_BLUE_USB 0 ++#define DIR825B1_GPIO_LED_ORANGE_POWER 1 ++#define DIR825B1_GPIO_LED_BLUE_POWER 2 ++#define DIR825B1_GPIO_LED_BLUE_WPS 4 ++#define DIR825B1_GPIO_LED_ORANGE_PLANET 6 ++#define DIR825B1_GPIO_LED_BLUE_PLANET 11 ++ ++#define DIR825B1_GPIO_BTN_RESET 3 ++#define DIR825B1_GPIO_BTN_WPS 8 ++ ++#define DIR825B1_GPIO_RTL8366_SDA 5 ++#define DIR825B1_GPIO_RTL8366_SCK 7 ++ ++#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL) ++ ++#define DIR825B1_CAL0_OFFSET 0x1000 ++#define DIR825B1_CAL1_OFFSET 0x5000 ++#define DIR825B1_MAC0_OFFSET 0xffa0 ++#define DIR825B1_MAC1_OFFSET 0xffb4 ++ ++#define DIR825B1_CAL_LOCATION_0 0x1f660000 ++#define DIR825B1_CAL_LOCATION_1 0x1f7f0000 ++ ++static struct gpio_led dir825b1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:blue:usb", ++ .gpio = DIR825B1_GPIO_LED_BLUE_USB, ++ .active_low = 1, ++ }, { ++ .name = "d-link:orange:power", ++ .gpio = DIR825B1_GPIO_LED_ORANGE_POWER, ++ .active_low = 1, ++ }, { ++ .name = "d-link:blue:power", ++ .gpio = DIR825B1_GPIO_LED_BLUE_POWER, ++ .active_low = 1, ++ }, { ++ .name = "d-link:blue:wps", ++ .gpio = DIR825B1_GPIO_LED_BLUE_WPS, ++ .active_low = 1, ++ }, { ++ .name = "d-link:orange:planet", ++ .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET, ++ .active_low = 1, ++ }, { ++ .name = "d-link:blue:planet", ++ .gpio = DIR825B1_GPIO_LED_BLUE_PLANET, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR825B1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR825B1_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = { ++ { .reg = 0x06, .val = 0x0108 }, ++}; ++ ++static struct rtl8366_platform_data dir825b1_rtl8366s_data = { ++ .gpio_sda = DIR825B1_GPIO_RTL8366_SDA, ++ .gpio_sck = DIR825B1_GPIO_RTL8366_SCK, ++ .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals), ++ .initvals = dir825b1_rtl8366s_initvals, ++}; ++ ++static struct platform_device dir825b1_rtl8366s_device = { ++ .name = RTL8366S_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &dir825b1_rtl8366s_data, ++ } ++}; ++ ++static bool __init dir825b1_is_caldata_valid(u8 *p) ++{ ++ u16 *magic0, *magic1; ++ ++ magic0 = (u16 *)(p + DIR825B1_CAL0_OFFSET); ++ magic1 = (u16 *)(p + DIR825B1_CAL1_OFFSET); ++ ++ return (*magic0 == 0xa55a && *magic1 == 0xa55a); ++} ++ ++static void __init dir825b1_wlan_init(void) ++{ ++ u8 *caldata; ++ u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; ++ u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; ++ ++ caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0); ++ if (!dir825b1_is_caldata_valid(caldata)) { ++ caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1); ++ if (!dir825b1_is_caldata_valid(caldata)) { ++ pr_err("no calibration data found\n"); ++ return; ++ } ++ } ++ ++ ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0); ++ ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0); ++ ath79_init_mac(wmac0, mac0, 0); ++ ath79_init_mac(wmac1, mac1, 1); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 5); ++ ap9x_pci_setup_wmac_led_pin(1, 5); ++ ++ ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0, ++ caldata + DIR825B1_CAL1_OFFSET, wmac1); ++} ++ ++static void __init dir825b1_setup(void) ++{ ++ dir825b1_wlan_init(); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_pll_data.pll_1000 = 0x11110000; ++ ++ ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ath79_eth1_pll_data.pll_1000 = 0x11110000; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio), ++ dir825b1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dir825b1_gpio_keys), ++ dir825b1_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ platform_device_register(&dir825b1_rtl8366s_device); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1", ++ dir825b1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-c1.c linux-4.1.13/arch/mips/ath79/mach-dir-825-c1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dir-825-c1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dir-825-c1.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,241 @@ ++/* ++ * D-Link DIR-825 rev. C1 board support ++ * ++ * Copyright (C) 2013 Alexander Stadler ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DIR825C1_GPIO_LED_BLUE_USB 11 ++#define DIR825C1_GPIO_LED_AMBER_POWER 14 ++#define DIR825C1_GPIO_LED_BLUE_POWER 22 ++#define DIR825C1_GPIO_LED_BLUE_WPS 15 ++#define DIR825C1_GPIO_LED_AMBER_PLANET 19 ++#define DIR825C1_GPIO_LED_BLUE_PLANET 18 ++#define DIR825C1_GPIO_LED_WLAN_2G 13 ++ ++#define DIR825C1_GPIO_WAN_LED_ENABLE 20 ++ ++#define DIR825C1_GPIO_BTN_RESET 17 ++#define DIR825C1_GPIO_BTN_WPS 16 ++ ++#define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL) ++ ++#define DIR825C1_MAC0_OFFSET 0x4 ++#define DIR825C1_MAC1_OFFSET 0x18 ++#define DIR825C1_WMAC_CALDATA_OFFSET 0x1000 ++#define DIR825C1_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led dir825c1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:blue:usb", ++ .gpio = DIR825C1_GPIO_LED_BLUE_USB, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:amber:power", ++ .gpio = DIR825C1_GPIO_LED_AMBER_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:blue:power", ++ .gpio = DIR825C1_GPIO_LED_BLUE_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:blue:wps", ++ .gpio = DIR825C1_GPIO_LED_BLUE_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:amber:planet", ++ .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:blue:wlan2g", ++ .gpio = DIR825C1_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led dir835a1_leds_gpio[] __initdata = { ++ { ++ .name = "d-link:amber:power", ++ .gpio = DIR825C1_GPIO_LED_AMBER_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:green:power", ++ .gpio = DIR825C1_GPIO_LED_BLUE_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:blue:wps", ++ .gpio = DIR825C1_GPIO_LED_BLUE_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:amber:planet", ++ .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, ++ .active_low = 1, ++ }, ++ { ++ .name = "d-link:green:planet", ++ .gpio = DIR825C1_GPIO_LED_BLUE_PLANET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = { ++ { ++ .desc = "Soft reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR825C1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DIR825C1_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = { ++ .led_ctrl0 = 0x00000000, ++ .led_ctrl1 = 0xc737c737, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x00c30c00, ++ .open_drain = true, ++}; ++ ++static struct ar8327_platform_data dir825c1_ar8327_data = { ++ .pad0_cfg = &dir825c1_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &dir825c1_ar8327_led_cfg, ++}; ++ ++static struct mdio_board_info dir825c1_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &dir825c1_ar8327_data, ++ }, ++}; ++ ++static void __init dir825c1_generic_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; ++ u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; ++ ++ ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0); ++ ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dir825c1_gpio_keys), ++ dir825c1_gpio_keys); ++ ++ ath79_init_mac(wmac0, mac0, 0); ++ ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0); ++ ++ ath79_init_mac(wmac1, mac1, 1); ++ ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ++ mdiobus_register_board_info(dir825c1_mdio0_info, ++ ARRAY_SIZE(dir825c1_mdio0_info)); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); ++ ++ /* GMAC0 is connected to an AR8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++} ++ ++static void __init dir825c1_setup(void) ++{ ++ ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB, ++ AR934X_GPIO_OUT_GPIO); ++ ++ gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE, ++ GPIOF_OUT_INIT_LOW, "WAN LED enable"); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio), ++ dir825c1_leds_gpio); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++ ++ dir825c1_generic_setup(); ++} ++ ++static void __init dir835a1_setup(void) ++{ ++ dir825c1_ar8327_data.led_cfg = NULL; ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio), ++ dir835a1_leds_gpio); ++ ++ dir825c1_generic_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1", ++ "D-Link DIR-825 rev. C1", ++ dir825c1_setup); ++ ++MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1", ++ "D-Link DIR-835 rev. A1", ++ dir835a1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dlan-hotspot.c linux-4.1.13/arch/mips/ath79/mach-dlan-hotspot.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dlan-hotspot.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dlan-hotspot.c 2015-12-04 18:27:35.457807850 +0100 +@@ -0,0 +1,117 @@ ++/* ++ * devolo dLAN Hotspot board support ++ * ++ * Copyright (C) 2015 Torsten Schnuis ++ * Copyright (C) 2015 devolo AG ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DLAN_HOTSPOT_GPIO_LED_WIFI 0 ++ ++#define DLAN_HOTSPOT_GPIO_BTN_RESET 11 ++#define DLAN_HOTSPOT_GPIO_BTN_PLC_PAIRING 12 ++#define DLAN_HOTSPOT_GPIO_BTN_WIFI 21 ++ ++#define DLAN_HOTSPOT_GPIO_PLC_POWER 22 ++#define DLAN_HOTSPOT_GPIO_PLC_RESET 20 ++#define DLAN_HOTSPOT_GPIO_PLC_DISABLE_LEDS 18 ++ ++#define DLAN_HOTSPOT_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_HOTSPOT_KEYS_POLL_INTERVAL) ++ ++#define DLAN_HOTSPOT_ART_ADDRESS 0x1fff0000 ++#define DLAN_HOTSPOT_CALDATA_OFFSET 0x00001000 ++#define DLAN_HOTSPOT_MAC_ADDRESS_OFFSET 0x00001002 ++ ++static struct gpio_led dlan_hotspot_leds_gpio[] __initdata = { ++ { ++ .name = "devolo:green:wifi", ++ .gpio = DLAN_HOTSPOT_GPIO_LED_WIFI, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button dlan_hotspot_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_HOTSPOT_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "Pairing button", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_HOTSPOT_GPIO_BTN_PLC_PAIRING, ++ .active_low = 0, ++ }, ++ { ++ .desc = "WLAN button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DLAN_HOTSPOT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_HOTSPOT_GPIO_BTN_WIFI, ++ .active_low = 0, ++ } ++}; ++ ++static void __init dlan_hotspot_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(DLAN_HOTSPOT_ART_ADDRESS); ++ u8 *cal = art + DLAN_HOTSPOT_CALDATA_OFFSET; ++ u8 *wifi_mac = art + DLAN_HOTSPOT_MAC_ADDRESS_OFFSET; ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_hotspot_leds_gpio), ++ dlan_hotspot_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DLAN_HOTSPOT_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dlan_hotspot_gpio_keys), ++ dlan_hotspot_gpio_keys); ++ ++ gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "PLC power"); ++ gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_RESET, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, ++ "PLC reset"); ++ gpio_request_one(DLAN_HOTSPOT_GPIO_PLC_DISABLE_LEDS, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, ++ "PLC LEDs"); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 2); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(cal, wifi_mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DLAN_HOTSPOT, "dLAN-Hotspot", ++ "dLAN Hotspot", dlan_hotspot_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-1200-ac.c linux-4.1.13/arch/mips/ath79/mach-dlan-pro-1200-ac.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-1200-ac.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dlan-pro-1200-ac.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,189 @@ ++/* ++ * devolo dLAN pro 500 Wireless+ support ++ * ++ * Copyright (c) 2013-2015 devolo AG ++ * Copyright (c) 2011-2012 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE 13 ++#define DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE 21 ++#define DLAN_PRO_1200_AC_GPIO_LED_WLAN 12 ++#define DLAN_PRO_1200_AC_GPIO_LED_DLAN 14 ++#define DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR 15 ++ ++#define DLAN_PRO_1200_AC_GPIO_BTN_WLAN 20 ++#define DLAN_PRO_1200_AC_GPIO_BTN_DLAN 22 ++#define DLAN_PRO_1200_AC_GPIO_BTN_RESET 4 ++#define DLAN_PRO_1200_AC_GPIO_DLAN_IND 17 ++#define DLAN_PRO_1200_AC_GPIO_DLAN_ERR_IND 16 ++ ++#define DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL) ++ ++#define DLAN_PRO_1200_AC_ART_ADDRESS 0x1fff0000 ++#define DLAN_PRO_1200_AC_CALDATA_OFFSET 0x1000 ++#define DLAN_PRO_1200_AC_WIFIMAC_OFFSET 0x1002 ++#define DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led dlan_pro_1200_ac_leds_gpio[] __initdata = { ++ { ++ .name = "devolo:status:wlan", ++ .gpio = DLAN_PRO_1200_AC_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "devolo:status:dlan", ++ .gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "devolo:error:dlan", ++ .gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button dlan_pro_1200_ac_gpio_keys[] __initdata = { ++ { ++ .desc = "dLAN button", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_DLAN, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WLAN button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_1200_AC_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = false, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, ++}; ++ ++static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad5_cfg = { ++ .mode = 0, ++ .txclk_delay_en = 0, ++ .rxclk_delay_en = 0, ++ .txclk_delay_sel = 0, ++ .rxclk_delay_sel = 0, ++}; ++ ++static struct ar8327_platform_data dlan_pro_1200_ac_ar8327_data = { ++ .pad0_cfg = &dlan_pro_1200_ac_ar8327_pad0_cfg, ++ .pad5_cfg = &dlan_pro_1200_ac_ar8327_pad5_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info dlan_pro_1200_ac_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &dlan_pro_1200_ac_ar8327_data, ++ }, ++}; ++ ++static void __init dlan_pro_1200_ac_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_1200_AC_ART_ADDRESS); ++ u8 *cal = art + DLAN_PRO_1200_AC_CALDATA_OFFSET; ++ u8 *wifi_mac = art + DLAN_PRO_1200_AC_WIFIMAC_OFFSET; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_1200_ac_leds_gpio), ++ dlan_pro_1200_ac_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dlan_pro_1200_ac_gpio_keys), ++ dlan_pro_1200_ac_gpio_keys); ++ ++ /* dLAN power must be enabled from user-space as soon as the boot-from-host daemon is running */ ++ gpio_request_one(DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, ++ "dLAN power"); ++ ++ /* WLAN power is turned on initially to allow the PCI bus scan to succeed */ ++ gpio_request_one(DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "WLAN power"); ++ ++ ath79_register_wmac(cal, wifi_mac); ++ ap91_pci_init(art + DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET, NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2); ++ ++ mdiobus_register_board_info(dlan_pro_1200_ac_mdio0_info, ++ ARRAY_SIZE(dlan_pro_1200_ac_mdio0_info)); ++ ++ /* GMAC0 is connected to an AR8337 */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x02000000; ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DLAN_PRO_1200_AC, "dLAN-pro-1200-ac", "devolo dLAN pro 1200+ WiFi ac", ++ dlan_pro_1200_ac_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-500-wp.c linux-4.1.13/arch/mips/ath79/mach-dlan-pro-500-wp.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dlan-pro-500-wp.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dlan-pro-500-wp.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,203 @@ ++/* ++ * devolo dLAN pro 500 Wireless+ support ++ * ++ * Copyright (c) 2013-2015 devolo AG ++ * Copyright (c) 2011-2012 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE 13 ++#define DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE 17 ++#define DLAN_PRO_500_WP_GPIO_LED_WLAN_5G 11 ++#define DLAN_PRO_500_WP_GPIO_LED_WLAN_2G 12 ++#define DLAN_PRO_500_WP_GPIO_LED_STATUS 16 ++#define DLAN_PRO_500_WP_GPIO_LED_ETH 14 ++ ++#define DLAN_PRO_500_WP_GPIO_BTN_WPS 20 ++#define DLAN_PRO_500_WP_GPIO_BTN_WLAN 22 ++#define DLAN_PRO_500_WP_GPIO_BTN_DLAN 21 ++#define DLAN_PRO_500_WP_GPIO_BTN_RESET 4 ++ ++#define DLAN_PRO_500_WP_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_500_WP_KEYS_POLL_INTERVAL) ++ ++#define DLAN_PRO_500_WP_ART_ADDRESS 0x1fff0000 ++#define DLAN_PRO_500_WP_CALDATA_OFFSET 0x1000 ++#define DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET 0x1002 ++#define DLAN_PRO_500_WP_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led dlan_pro_500_wp_leds_gpio[] __initdata = { ++ { ++ .name = "devolo:green:status", ++ .gpio = DLAN_PRO_500_WP_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, ++ { ++ .name = "devolo:green:eth", ++ .gpio = DLAN_PRO_500_WP_GPIO_LED_ETH, ++ .active_low = 1, ++ }, ++ { ++ .name = "devolo:blue:wlan-5g", ++ .gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_5G, ++ .active_low = 1, ++ }, ++ { ++ .name = "devolo:green:wlan-2g", ++ .gpio = DLAN_PRO_500_WP_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button dlan_pro_500_wp_gpio_keys[] __initdata = { ++ { ++ .desc = "dLAN button", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_500_WP_GPIO_BTN_DLAN, ++ .active_low = 0, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_500_WP_GPIO_BTN_WPS, ++ .active_low = 0, ++ }, ++ { ++ .desc = "WLAN button", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_500_WP_GPIO_BTN_WLAN, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DLAN_PRO_500_WP_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DLAN_PRO_500_WP_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct ar8327_pad_cfg dlan_pro_500_wp_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_PHY_RGMII, ++ .txclk_delay_en = false, ++ .rxclk_delay_en = false, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL0, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, ++}; ++ ++static struct ar8327_led_cfg dlan_pro_500_wp_ar8327_led_cfg = { ++ .led_ctrl0 = 0x00000000, ++ .led_ctrl1 = 0xc737c737, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x00c30c00, ++ .open_drain = true, ++}; ++ ++static struct ar8327_platform_data dlan_pro_500_wp_ar8327_data = { ++ .pad0_cfg = &dlan_pro_500_wp_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 0, ++ .rxpause = 0, ++ }, ++ .led_cfg = &dlan_pro_500_wp_ar8327_led_cfg, ++}; ++ ++static struct mdio_board_info dlan_pro_500_wp_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &dlan_pro_500_wp_ar8327_data, ++ }, ++}; ++ ++static void __init dlan_pro_500_wp_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_500_WP_ART_ADDRESS); ++ u8 *cal = art + DLAN_PRO_500_WP_CALDATA_OFFSET; ++ u8 *wifi_mac = art + DLAN_PRO_500_WP_MAC_ADDRESS_OFFSET; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_500_wp_leds_gpio), ++ dlan_pro_500_wp_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, DLAN_PRO_500_WP_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dlan_pro_500_wp_gpio_keys), ++ dlan_pro_500_wp_gpio_keys); ++ ++ gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_POWER_ENABLE, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, ++ "PLC power"); ++ gpio_request_one(DLAN_PRO_500_WP_GPIO_DLAN_LED_ENABLE, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, ++ "PLC LEDs"); ++ ++ ath79_register_wmac(cal, wifi_mac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(dlan_pro_500_wp_mdio0_info, ++ ARRAY_SIZE(dlan_pro_500_wp_mdio0_info)); ++ ++ /* GMAC0 is connected to a AR7400 PLC in PHY mode */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_pll_data.pll_1000 = 0x0e000000; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, wifi_mac, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DLAN_PRO_500_WP, "dLAN-pro-500-wp", "devolo dLAN pro 500 Wireless+", ++ dlan_pro_500_wp_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-dragino2.c linux-4.1.13/arch/mips/ath79/mach-dragino2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-dragino2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-dragino2.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,136 @@ ++/* ++ * DRAGINO V2 board support, based on Atheros AP121 board support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2012 Elektra Wagenrad ++ * Copyright (C) 2014 Vittorio Gambaletta ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DRAGINO2_GPIO_LED_WLAN 0 ++#define DRAGINO2_GPIO_LED_LAN 13 ++#define DRAGINO2_GPIO_LED_WAN 17 ++ ++/* ++ * The following GPIO is named "SYS" on newer revisions of the the board. ++ * It was previously used to indicate USB activity, even though it was ++ * named "Router". ++ */ ++ ++#define DRAGINO2_GPIO_LED_SYS 28 ++#define DRAGINO2_GPIO_BTN_JUMPSTART 11 ++#define DRAGINO2_GPIO_BTN_RESET 12 ++ ++#define DRAGINO2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DRAGINO2_KEYS_DEBOUNCE_INTERVAL (3 * DRAGINO2_KEYS_POLL_INTERVAL) ++ ++#define DRAGINO2_MAC0_OFFSET 0x0000 ++#define DRAGINO2_MAC1_OFFSET 0x0006 ++#define DRAGINO2_CALDATA_OFFSET 0x1000 ++#define DRAGINO2_WMAC_MAC_OFFSET 0x1002 ++ ++static struct gpio_led dragino2_leds_gpio[] __initdata = { ++ { ++ .name = "dragino2:red:wlan", ++ .gpio = DRAGINO2_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "dragino2:red:wan", ++ .gpio = DRAGINO2_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "dragino2:red:lan", ++ .gpio = DRAGINO2_GPIO_LED_LAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "dragino2:red:system", ++ .gpio = DRAGINO2_GPIO_LED_SYS, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button dragino2_gpio_keys[] __initdata = { ++ { ++ .desc = "jumpstart button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DRAGINO2_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ }, ++ { ++ .desc = "reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DRAGINO2_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init dragino2_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(art + DRAGINO2_CALDATA_OFFSET, ++ art + DRAGINO2_WMAC_MAC_OFFSET); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + DRAGINO2_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + DRAGINO2_MAC1_OFFSET, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* Enable GPIO13, GPIO14, GPIO15, GPIO16 and GPIO17 */ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ /* LAN port */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ /* Enable GPIO26 and GPIO27 */ ++ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, ++ ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) | ++ AR933X_BOOTSTRAP_MDIO_GPIO_EN); ++} ++ ++static void __init dragino2_setup(void) ++{ ++ dragino2_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dragino2_leds_gpio), ++ dragino2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, DRAGINO2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dragino2_gpio_keys), ++ dragino2_gpio_keys); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_DRAGINO2, "DRAGINO2", "Dragino Dragino v2", ++ dragino2_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-eap300v2.c linux-4.1.13/arch/mips/ath79/mach-eap300v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-eap300v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-eap300v2.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,101 @@ ++/* ++ * EnGenius EAP300 v2 board support ++ * ++ * Copyright (C) 2014 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define EAP300V2_GPIO_LED_POWER 0 ++#define EAP300V2_GPIO_LED_LAN 16 ++#define EAP300V2_GPIO_LED_WLAN 17 ++ ++#define EAP300V2_GPIO_BTN_RESET 1 ++ ++#define EAP300V2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define EAP300V2_KEYS_DEBOUNCE_INTERVAL (3 * EAP300V2_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led eap300v2_leds_gpio[] __initdata = { ++ { ++ .name = "engenius:blue:power", ++ .gpio = EAP300V2_GPIO_LED_POWER, ++ .active_low = 1, ++ }, { ++ .name = "engenius:blue:lan", ++ .gpio = EAP300V2_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "engenius:blue:wlan", ++ .gpio = EAP300V2_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button eap300v2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = EAP300V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EAP300V2_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++#define EAP300V2_ART_MAC_OFFSET 2 ++ ++#define EAP300V2_LAN_PHYMASK BIT(0) ++ ++static void __init eap300v2_setup(void) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff1000); ++ ++ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); ++ ++ ath79_gpio_output_select(EAP300V2_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(EAP300V2_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(EAP300V2_GPIO_LED_WLAN, AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(eap300v2_leds_gpio), ++ eap300v2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, EAP300V2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(eap300v2_gpio_keys), ++ eap300v2_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(art, NULL); ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + EAP300V2_ART_MAC_OFFSET, 0); ++ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = EAP300V2_LAN_PHYMASK; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = EAP300V2_LAN_PHYMASK; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_EAP300V2, "EAP300V2", "EnGenius EAP300 v2", ++ eap300v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-eap7660d.c linux-4.1.13/arch/mips/ath79/mach-eap7660d.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-eap7660d.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-eap7660d.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,181 @@ ++/* ++ * Senao EAP7660D board support ++ * ++ * Copyright (C) 2010 Daniel Golle ++ * Copyright (C) 2008 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL) ++ ++#define EAP7660D_GPIO_DS4 7 ++#define EAP7660D_GPIO_DS5 2 ++#define EAP7660D_GPIO_DS7 0 ++#define EAP7660D_GPIO_DS8 4 ++#define EAP7660D_GPIO_SW1 3 ++#define EAP7660D_GPIO_SW3 8 ++#define EAP7660D_PHYMASK BIT(20) ++#define EAP7660D_BOARDCONFIG 0x1F7F0000 ++#define EAP7660D_GBIC_MAC_OFFSET 0x1000 ++#define EAP7660D_WMAC0_MAC_OFFSET 0x1010 ++#define EAP7660D_WMAC1_MAC_OFFSET 0x1016 ++#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000 ++#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000 ++ ++#ifdef CONFIG_PCI ++static struct ath5k_platform_data eap7660d_wmac0_data; ++static struct ath5k_platform_data eap7660d_wmac1_data; ++static char eap7660d_wmac0_mac[6]; ++static char eap7660d_wmac1_mac[6]; ++static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; ++static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; ++ ++static int eap7660d_pci_plat_dev_init(struct pci_dev *dev) ++{ ++ switch (PCI_SLOT(dev->devfn)) { ++ case 17: ++ dev->dev.platform_data = &eap7660d_wmac0_data; ++ break; ++ ++ case 18: ++ dev->dev.platform_data = &eap7660d_wmac1_data; ++ break; ++ } ++ ++ return 0; ++} ++ ++void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, ++ u8 *cal_data1, u8 *mac_addr1) ++{ ++ if (cal_data0 && *cal_data0 == 0xa55a) { ++ memcpy(eap7660d_wmac0_eeprom, cal_data0, ++ ATH5K_PLAT_EEP_MAX_WORDS); ++ eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom; ++ } ++ ++ if (cal_data1 && *cal_data1 == 0xa55a) { ++ memcpy(eap7660d_wmac1_eeprom, cal_data1, ++ ATH5K_PLAT_EEP_MAX_WORDS); ++ eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom; ++ } ++ ++ if (mac_addr0) { ++ memcpy(eap7660d_wmac0_mac, mac_addr0, ++ sizeof(eap7660d_wmac0_mac)); ++ eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; ++ } ++ ++ if (mac_addr1) { ++ memcpy(eap7660d_wmac1_mac, mac_addr1, ++ sizeof(eap7660d_wmac1_mac)); ++ eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; ++ } ++ ++ ath79_pci_set_plat_dev_init(eap7660d_pci_plat_dev_init); ++ ath79_register_pci(); ++} ++#else ++static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, ++ u8 *cal_data1, u8 *mac_addr1) ++{ ++} ++#endif /* CONFIG_PCI */ ++ ++static struct gpio_led eap7660d_leds_gpio[] __initdata = { ++ { ++ .name = "eap7660d:green:ds8", ++ .gpio = EAP7660D_GPIO_DS8, ++ .active_low = 0, ++ }, ++ { ++ .name = "eap7660d:green:ds5", ++ .gpio = EAP7660D_GPIO_DS5, ++ .active_low = 0, ++ }, ++ { ++ .name = "eap7660d:green:ds7", ++ .gpio = EAP7660D_GPIO_DS7, ++ .active_low = 0, ++ }, ++ { ++ .name = "eap7660d:green:ds4", ++ .gpio = EAP7660D_GPIO_DS4, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EAP7660D_GPIO_SW1, ++ .active_low = 1, ++ }, ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EAP7660D_GPIO_SW3, ++ .active_low = 1, ++ } ++}; ++ ++static const char *eap7660d_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data eap7660d_flash_data = { ++ .part_probes = eap7660d_part_probes, ++}; ++ ++static void __init eap7660d_setup(void) ++{ ++ u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); ++ ++ ath79_register_mdio(0, ~EAP7660D_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = EAP7660D_PHYMASK; ++ ath79_register_eth(0); ++ ath79_register_m25p80(&eap7660d_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio), ++ eap7660d_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(eap7660d_gpio_keys), ++ eap7660d_gpio_keys); ++ eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET, ++ boardconfig + EAP7660D_WMAC0_MAC_OFFSET, ++ boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET, ++ boardconfig + EAP7660D_WMAC1_MAC_OFFSET); ++}; ++ ++MIPS_MACHINE(ATH79_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D", ++ eap7660d_setup); ++ ++MIPS_MACHINE(ATH79_MACH_ALL0305, "ALL0305", "Allnet ALL0305", ++ eap7660d_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-el-m150.c linux-4.1.13/arch/mips/ath79/mach-el-m150.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-el-m150.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-el-m150.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,112 @@ ++/* ++ * Easy-Link EL-M150 board support ++ * ++ * Copyright (C) 2012 huangfc ++ * Copyright (C) 2012 HYS <550663898@qq.com> ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "dev-usb.h" ++ ++#define EL_M150_GPIO_BTN6 6 ++#define EL_M150_GPIO_BTN7 7 ++#define EL_M150_GPIO_BTN_RESET 11 ++ ++#define EL_M150_GPIO_LED_SYSTEM 27 ++#define EL_M150_GPIO_USB_POWER 8 ++ ++#define EL_M150_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define EL_M150_KEYS_DEBOUNCE_INTERVAL (3 * EL_M150_KEYS_POLL_INTERVAL) ++ ++static const char *EL_M150_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data EL_M150_flash_data = { ++ .part_probes = EL_M150_part_probes, ++}; ++ ++static struct gpio_led EL_M150_leds_gpio[] __initdata = { ++ { ++ .name = "easylink:green:system", ++ .gpio = EL_M150_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button EL_M150_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EL_M150_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "BTN_6", ++ .type = EV_KEY, ++ .code = BTN_6, ++ .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EL_M150_GPIO_BTN6, ++ .active_low = 1, ++ }, ++ { ++ .desc = "BTN_7", ++ .type = EV_KEY, ++ .code = BTN_7, ++ .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EL_M150_GPIO_BTN7, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init el_m150_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(EL_M150_leds_gpio), ++ EL_M150_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, EL_M150_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(EL_M150_gpio_keys), ++ EL_M150_gpio_keys); ++ ++ gpio_request_one(EL_M150_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&EL_M150_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_EL_M150, "EL-M150", ++ "EasyLink EL-M150", el_m150_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-el-mini.c linux-4.1.13/arch/mips/ath79/mach-el-mini.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-el-mini.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-el-mini.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,86 @@ ++/* ++ * Easy-Link EL-MINI board support ++ * ++ * Copyright (C) 2012 huangfc ++ * Copyright (C) 2011 hys <550663898@qq.com> ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define MINI_GPIO_LED_SYSTEM 27 ++#define MINI_GPIO_BTN_RESET 11 ++ ++#define MINI_GPIO_USB_POWER 8 ++ ++#define MINI_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MINI_KEYS_DEBOUNCE_INTERVAL (3 * MINI_KEYS_POLL_INTERVAL) ++ ++static const char *mini_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data mini_flash_data = { ++ .part_probes = mini_part_probes, ++}; ++ ++static struct gpio_led mini_leds_gpio[] __initdata = { ++ { ++ .name = "easylink:green:system", ++ .gpio = MINI_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mini_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MINI_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MINI_GPIO_BTN_RESET, ++ .active_low = 0, ++ } ++}; ++ ++static void __init el_mini_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&mini_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mini_leds_gpio), ++ mini_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, MINI_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mini_gpio_keys), ++ mini_gpio_keys); ++ ++ gpio_request_one(MINI_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_EL_MINI, "EL-MINI", "EasyLink EL-MINI", ++ el_mini_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-epg5000.c linux-4.1.13/arch/mips/ath79/mach-epg5000.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-epg5000.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-epg5000.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,178 @@ ++/* ++ * EnGenius EPG5000 board support ++ * ++ * Copyright (c) 2014 Jon Suphammer ++ * Copyright (c) 2015 Christian Beier ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define EPG5000_GPIO_LED_WLAN_5G 23 ++#define EPG5000_GPIO_LED_WLAN_2G 13 ++#define EPG5000_GPIO_LED_POWER_AMBER 2 ++#define EPG5000_GPIO_LED_WPS_AMBER 22 ++#define EPG5000_GPIO_LED_WPS_BLUE 19 ++ ++#define EPG5000_GPIO_BTN_WPS 16 ++#define EPG5000_GPIO_BTN_RESET 17 ++ ++#define EPG5000_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define EPG5000_KEYS_DEBOUNCE_INTERVAL (3 * EPG5000_KEYS_POLL_INTERVAL) ++ ++#define EPG5000_CALDATA_ADDR 0x1fff0000 ++#define EPG5000_WMAC_CALDATA_OFFSET 0x1000 ++#define EPG5000_PCIE_CALDATA_OFFSET 0x5000 ++ ++#define EPG5000_NVRAM_ADDR 0x1f030000 ++#define EPG5000_NVRAM_SIZE 0x10000 ++ ++static struct gpio_led epg5000_leds_gpio[] __initdata = { ++ { ++ .name = "epg5000:amber:power", ++ .gpio = EPG5000_GPIO_LED_POWER_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "epg5000:blue:wps", ++ .gpio = EPG5000_GPIO_LED_WPS_BLUE, ++ .active_low = 1, ++ }, ++ { ++ .name = "epg5000:amber:wps", ++ .gpio = EPG5000_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "epg5000:blue:wlan-2g", ++ .gpio = EPG5000_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "epg5000:blue:wlan-5g", ++ .gpio = EPG5000_GPIO_LED_WLAN_5G, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button epg5000_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EPG5000_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = EPG5000_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = EPG5000_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg epg5000_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++ .mac06_exchange_en = true, ++}; ++ ++static struct ar8327_platform_data epg5000_ar8327_data = { ++ .pad0_cfg = &epg5000_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info epg5000_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &epg5000_ar8327_data, ++ }, ++}; ++ ++static int epg5000_get_mac(const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(EPG5000_NVRAM_ADDR); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, EPG5000_NVRAM_SIZE, ++ name, mac); ++ if (err) { ++ pr_err("no MAC address found for %s\n", name); ++ return false; ++ } ++ ++ return true; ++} ++ ++static void __init epg5000_setup(void) ++{ ++ u8 *caldata = (u8 *) KSEG1ADDR(EPG5000_CALDATA_ADDR); ++ u8 mac1[ETH_ALEN]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(epg5000_leds_gpio), ++ epg5000_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, EPG5000_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(epg5000_gpio_keys), ++ epg5000_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(epg5000_mdio0_info, ++ ARRAY_SIZE(epg5000_mdio0_info)); ++ ++ /* GMAC0 is connected to an QCA8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ if (epg5000_get_mac("ethaddr=", mac1)) ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(caldata + EPG5000_WMAC_CALDATA_OFFSET, mac1); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_EPG5000, "EPG5000", ++ "EnGenius EPG5000", ++ epg5000_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-esr1750.c linux-4.1.13/arch/mips/ath79/mach-esr1750.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-esr1750.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-esr1750.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,177 @@ ++/* ++ * EnGenius ESR1750 board support ++ * ++ * Copyright (c) 2014 Jon Suphammer ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define ESR1750_GPIO_LED_WLAN_5G 23 ++#define ESR1750_GPIO_LED_WLAN_2G 13 ++#define ESR1750_GPIO_LED_POWER_AMBER 2 ++#define ESR1750_GPIO_LED_WPS_AMBER 22 ++#define ESR1750_GPIO_LED_WPS_BLUE 19 ++ ++#define ESR1750_GPIO_BTN_WPS 16 ++#define ESR1750_GPIO_BTN_RESET 17 ++ ++#define ESR1750_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ESR1750_KEYS_DEBOUNCE_INTERVAL (3 * ESR1750_KEYS_POLL_INTERVAL) ++ ++#define ESR1750_CALDATA_ADDR 0x1fff0000 ++#define ESR1750_WMAC_CALDATA_OFFSET 0x1000 ++#define ESR1750_PCIE_CALDATA_OFFSET 0x5000 ++ ++#define ESR1750_NVRAM_ADDR 0x1f030000 ++#define ESR1750_NVRAM_SIZE 0x10000 ++ ++static struct gpio_led esr1750_leds_gpio[] __initdata = { ++ { ++ .name = "esr1750:amber:power", ++ .gpio = ESR1750_GPIO_LED_POWER_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "esr1750:blue:wps", ++ .gpio = ESR1750_GPIO_LED_WPS_BLUE, ++ .active_low = 1, ++ }, ++ { ++ .name = "esr1750:amber:wps", ++ .gpio = ESR1750_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "esr1750:blue:wlan-2g", ++ .gpio = ESR1750_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "esr1750:blue:wlan-5g", ++ .gpio = ESR1750_GPIO_LED_WLAN_5G, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button esr1750_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ESR1750_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ESR1750_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++ .mac06_exchange_en = true, ++}; ++ ++static struct ar8327_platform_data esr1750_ar8327_data = { ++ .pad0_cfg = &esr1750_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info esr1750_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &esr1750_ar8327_data, ++ }, ++}; ++ ++static int esr1750_get_mac(const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(ESR1750_NVRAM_ADDR); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, ESR1750_NVRAM_SIZE, ++ name, mac); ++ if (err) { ++ pr_err("no MAC address found for %s\n", name); ++ return false; ++ } ++ ++ return true; ++} ++ ++static void __init esr1750_setup(void) ++{ ++ u8 *caldata = (u8 *) KSEG1ADDR(ESR1750_CALDATA_ADDR); ++ u8 mac1[ETH_ALEN]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(esr1750_leds_gpio), ++ esr1750_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, ESR1750_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(esr1750_gpio_keys), ++ esr1750_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(esr1750_mdio0_info, ++ ARRAY_SIZE(esr1750_mdio0_info)); ++ ++ /* GMAC0 is connected to an QCA8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ if (esr1750_get_mac("ethaddr=", mac1)) ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(caldata + ESR1750_WMAC_CALDATA_OFFSET, mac1); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ESR1750, "ESR1750", ++ "EnGenius ESR1750", ++ esr1750_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-esr900.c linux-4.1.13/arch/mips/ath79/mach-esr900.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-esr900.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-esr900.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,200 @@ ++/* ++ * EnGenius ESR900 board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) "esr900: " fmt ++ ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define ESR900_GPIO_LED_POWER 2 ++#define ESR900_GPIO_LED_WLAN_2G 13 ++#define ESR900_GPIO_LED_WPS_BLUE 19 ++#define ESR900_GPIO_LED_WPS_AMBER 22 ++#define ESR900_GPIO_LED_WLAN_5G 23 ++ ++#define ESR900_GPIO_BTN_WPS 16 ++#define ESR900_GPIO_BTN_RESET 17 ++ ++#define ESR900_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ESR900_KEYS_DEBOUNCE_INTERVAL (3 * ESR900_KEYS_POLL_INTERVAL) ++ ++#define ESR900_CALDATA_ADDR 0x1fff0000 ++#define ESR900_WMAC_CALDATA_OFFSET 0x1000 ++#define ESR900_PCIE_CALDATA_OFFSET 0x5000 ++ ++#define ESR900_CONFIG_ADDR 0x1f030000 ++#define ESR900_CONFIG_SIZE 0x10000 ++ ++#define ESR900_LAN_PHYMASK BIT(0) ++#define ESR900_WAN_PHYMASK BIT(5) ++#define ESR900_MDIO_MASK (~(ESR900_LAN_PHYMASK | ESR900_WAN_PHYMASK)) ++ ++static struct gpio_led esr900_leds_gpio[] __initdata = { ++ { ++ .name = "engenius:amber:power", ++ .gpio = ESR900_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "engenius:blue:wlan-2g", ++ .gpio = ESR900_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "engenius:blue:wps", ++ .gpio = ESR900_GPIO_LED_WPS_BLUE, ++ .active_low = 1, ++ }, ++ { ++ .name = "engenius:amber:wps", ++ .gpio = ESR900_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "engenius:blue:wlan-5g", ++ .gpio = ESR900_GPIO_LED_WLAN_5G, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button esr900_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ESR900_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ESR900_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg esr900_ar8327_pad0_cfg = { ++ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_pad_cfg esr900_ar8327_pad6_cfg = { ++ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ ++ .mode = AR8327_PAD_MAC_SGMII, ++ .rxclk_delay_en = true, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, ++}; ++ ++static struct ar8327_platform_data esr900_ar8327_data = { ++ .pad0_cfg = &esr900_ar8327_pad0_cfg, ++ .pad6_cfg = &esr900_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info esr900_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &esr900_ar8327_data, ++ }, ++}; ++ ++static void __init esr900_setup(void) ++{ ++ const char *config = (char *) KSEG1ADDR(ESR900_CONFIG_ADDR); ++ u8 *art = (u8 *) KSEG1ADDR(ESR900_CALDATA_ADDR); ++ u8 lan_mac[ETH_ALEN]; ++ u8 wlan0_mac[ETH_ALEN]; ++ u8 wlan1_mac[ETH_ALEN]; ++ ++ if (ath79_nvram_parse_mac_addr(config, ESR900_CONFIG_SIZE, ++ "ethaddr=", lan_mac) == 0) { ++ ath79_init_local_mac(ath79_eth0_data.mac_addr, lan_mac); ++ ath79_init_mac(wlan0_mac, lan_mac, 0); ++ ath79_init_mac(wlan1_mac, lan_mac, 1); ++ } else { ++ pr_err("could not find ethaddr in u-boot environment\n"); ++ } ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(esr900_leds_gpio), ++ esr900_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, ESR900_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(esr900_gpio_keys), ++ esr900_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(esr900_mdio0_info, ++ ARRAY_SIZE(esr900_mdio0_info)); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = ESR900_LAN_PHYMASK; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ath79_register_eth(1); ++ ++ ap91_pci_init(art + ESR900_PCIE_CALDATA_OFFSET, wlan1_mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ESR900, "ESR900", "EnGenius ESR900", esr900_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ew-dorin.c linux-4.1.13/arch/mips/ath79/mach-ew-dorin.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ew-dorin.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ew-dorin.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,150 @@ ++/* ++ * EW Dorin board support ++ * (based on Atheros Ref. Design AP121) ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2012-2015 Embedded Wireless GmbH www.80211.de ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DORIN_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DORIN_KEYS_DEBOUNCE_INTERVAL (3 * DORIN_KEYS_POLL_INTERVAL) ++ ++#define DORIN_CALDATA_OFFSET 0x1000 ++#define DORIN_WMAC_MAC_OFFSET 0x1002 ++ ++#define DORIN_GPIO_LED_21 21 ++#define DORIN_GPIO_LED_22 22 ++#define DORIN_GPIO_LED_STATUS 23 ++ ++#define DORIN_GPIO_BTN_JUMPSTART 11 ++#define DORIN_GPIO_BTN_RESET 6 ++ ++static struct gpio_led dorin_leds_gpio[] __initdata = { ++ { ++ .name = "dorin:green:led21", ++ .gpio = DORIN_GPIO_LED_21, ++ .active_low = 1, ++ }, ++ { ++ .name = "dorin:green:led22", ++ .gpio = DORIN_GPIO_LED_22, ++ .active_low = 1, ++ }, ++ { ++ .name = "dorin:green:status", ++ .gpio = DORIN_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button dorin_gpio_keys[] __initdata = { ++ { ++ .desc = "jumpstart button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DORIN_GPIO_BTN_JUMPSTART, ++ .active_low = 1, ++ }, ++ { ++ .desc = "reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DORIN_GPIO_BTN_RESET, ++ .active_low = 0, ++ } ++}; ++ ++static void __init ew_dorin_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ static u8 mac[6]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_usb(); ++ ++ if (ar93xx_wmac_read_mac_address(mac)) { ++ ath79_register_wmac(NULL, NULL); ++ } else { ++ ath79_register_wmac(art + DORIN_CALDATA_OFFSET, ++ art + DORIN_WMAC_MAC_OFFSET); ++ memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac)); ++ } ++ ++ mac[3] |= 0x40; ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio), ++ dorin_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dorin_gpio_keys), ++ dorin_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_EW_DORIN, "EW-DORIN", "EmbWir-Dorin", ++ ew_dorin_setup); ++ ++ ++static void __init ew_dorin_router_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ static u8 mac[6]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_usb(); ++ ++ if (ar93xx_wmac_read_mac_address(mac)) { ++ ath79_register_wmac(NULL, NULL); ++ } else { ++ ath79_register_wmac(art + DORIN_CALDATA_OFFSET, ++ art + DORIN_WMAC_MAC_OFFSET); ++ memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac)); ++ } ++ ++ mac[3] |= 0x40; ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ++ mac[3] &= 0x3F; ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_setup_ar933x_phy4_switch(true, true); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio), ++ dorin_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(dorin_gpio_keys), ++ dorin_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_EW_DORIN_ROUTER, "EW-DORIN-ROUTER", ++ "EmbWir-Dorin-Router", ew_dorin_router_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-f9k1115v2.c linux-4.1.13/arch/mips/ath79/mach-f9k1115v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-f9k1115v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-f9k1115v2.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,190 @@ ++/* ++ * Belkin AC1750DB (F9K1115V2) board support ++ * ++ * Copyright (C) 2014 Gabor Juhos ++ * Copyright (C) 2014 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define F9K1115V2_GPIO_LED_USB2 4 ++#define F9K1115V2_GPIO_LED_WPS_AMBER 14 ++#define F9K1115V2_GPIO_LED_STATUS_AMBER 15 ++#define F9K1115V2_GPIO_LED_WPS_BLUE 19 ++#define F9K1115V2_GPIO_LED_STATUS_BLUE 20 ++ ++#define F9K1115V2_GPIO_BTN_WPS 16 ++#define F9K1115V2_GPIO_BTN_RESET 17 ++ ++#define F9K1115V2_GPIO_USB2_POWER 21 ++ ++#define F9K1115V2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define F9K1115V2_KEYS_DEBOUNCE_INTERVAL (3 * F9K1115V2_KEYS_POLL_INTERVAL) ++ ++#define F9K1115V2_WAN_MAC_OFFSET 0 ++#define F9K1115V2_LAN_MAC_OFFSET 6 ++#define F9K1115V2_WMAC_CALDATA_OFFSET 0x1000 ++#define F9K1115V2_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led f9k1115v2_leds_gpio[] __initdata = { ++ { ++ .name = "belkin:amber:status", ++ .gpio = F9K1115V2_GPIO_LED_STATUS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "belkin:blue:status", ++ .gpio = F9K1115V2_GPIO_LED_STATUS_BLUE, ++ .active_low = 1, ++ }, ++ { ++ .name = "belkin:blue:wps", ++ .gpio = F9K1115V2_GPIO_LED_WPS_BLUE, ++ .active_low = 1, ++ }, ++ { ++ .name = "belkin:amber:wps", ++ .gpio = F9K1115V2_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "belkin:green:usb2", ++ .gpio = F9K1115V2_GPIO_LED_USB2, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button f9k1115v2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = F9K1115V2_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = F9K1115V2_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg f9k1115v2_ar8327_pad0_cfg = { ++ /* Use the RGMII interface for the GMAC0 of the AR8337 switch */ ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++ .mac06_exchange_en = true, ++}; ++ ++static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = { ++ /* Use the SGMII interface for the GMAC6 of the AR8337 switch */ ++ .mode = AR8327_PAD_MAC_SGMII, ++ .rxclk_delay_en = true, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, ++}; ++ ++static struct ar8327_platform_data f9k1115v2_ar8327_data = { ++ .pad0_cfg = &f9k1115v2_ar8327_pad0_cfg, ++ .pad6_cfg = &f9k1115v2_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info f9k1115v2_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &f9k1115v2_ar8327_data, ++ }, ++}; ++ ++static void __init f9k1115v2_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(f9k1115v2_leds_gpio), ++ f9k1115v2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, F9K1115V2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(f9k1115v2_gpio_keys), ++ f9k1115v2_gpio_keys); ++ ++ ath79_register_wmac(art + F9K1115V2_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_register_mdio(0, 0x0); ++ mdiobus_register_board_info(f9k1115v2_mdio0_info, ++ ARRAY_SIZE(f9k1115v2_mdio0_info)); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + F9K1115V2_WAN_MAC_OFFSET, 0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ++ art + F9K1115V2_LAN_MAC_OFFSET, 0); ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++ ++ ath79_register_pci(); ++ ++ ath79_register_usb(); ++ gpio_request_one(F9K1115V2_GPIO_USB2_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB2 power"); ++} ++ ++MIPS_MACHINE(ATH79_MACH_F9K1115V2, "F9K1115V2", "Belkin AC1750DB", ++ f9k1115v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar150.c linux-4.1.13/arch/mips/ath79/mach-gl-ar150.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar150.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-gl-ar150.c 2015-12-04 18:27:35.461807609 +0100 +@@ -0,0 +1,125 @@ ++/* ++ * GL_ar150 board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2013 alzhao ++ * Copyright (C) 2014 Michel Stempin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++*/ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define GL_AR150_GPIO_LED_WLAN 0 ++#define GL_AR150_GPIO_LED_LAN 13 ++#define GL_AR150_GPIO_LED_WAN 15 ++ ++#define GL_AR150_GPIO_BIN_USB 6 ++#define GL_AR150_GPIO_BTN_MANUAL 7 ++#define GL_AR150_GPIO_BTN_AUTO 8 ++#define GL_AR150_GPIO_BTN_RESET 11 ++ ++#define GL_AR150_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define GL_AR150_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR150_KEYS_POLL_INTERVAL) ++ ++#define GL_AR150_MAC0_OFFSET 0x0000 ++#define GL_AR150_MAC1_OFFSET 0x0000 ++#define GL_AR150_CALDATA_OFFSET 0x1000 ++#define GL_AR150_WMAC_MAC_OFFSET 0x0000 ++ ++static struct gpio_led gl_ar150_leds_gpio[] __initdata = { ++ { ++ .name = "gl_ar150:wlan", ++ .gpio = GL_AR150_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "gl_ar150:lan", ++ .gpio = GL_AR150_GPIO_LED_LAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "gl_ar150:wan", ++ .gpio = GL_AR150_GPIO_LED_WAN, ++ .active_low = 0, ++ .default_state = 1, ++ }, ++}; ++ ++static struct gpio_keys_button gl_ar150_gpio_keys[] __initdata = { ++ { ++ .desc = "BTN_7", ++ .type = EV_KEY, ++ .code = BTN_7, ++ .debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GL_AR150_GPIO_BTN_MANUAL, ++ .active_low = 0, ++ }, ++ { ++ .desc = "BTN_8", ++ .type = EV_KEY, ++ .code = BTN_8, ++ .debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GL_AR150_GPIO_BTN_AUTO, ++ .active_low = 0, ++ }, ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = GL_AR150_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GL_AR150_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init gl_ar150_setup(void) ++{ ++ ++ /* ART base address */ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ /* register flash. */ ++ ath79_register_m25p80(NULL); ++ ++ /* register gpio LEDs and keys */ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar150_leds_gpio), ++ gl_ar150_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, GL_AR150_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(gl_ar150_gpio_keys), ++ gl_ar150_gpio_keys); ++ ++ /* enable usb */ ++ gpio_request_one(GL_AR150_GPIO_BIN_USB, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ /* register eth0 as WAN, eth1 as LAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_AR150_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_AR150_MAC1_OFFSET, 0); ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ /* register wireless mac with cal data */ ++ ath79_register_wmac(art + GL_AR150_CALDATA_OFFSET, art + GL_AR150_WMAC_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_GL_AR150, "GL-AR150", "GL AR150",gl_ar150_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar300.c linux-4.1.13/arch/mips/ath79/mach-gl-ar300.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-gl-ar300.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-gl-ar300.c 2015-12-04 18:27:35.461807609 +0100 +@@ -0,0 +1,103 @@ ++/* ++ * Domino board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2013 alzhao ++ * Copyright (C) 2014 Michel Stempin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++*/ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define GL_AR300_GPIO_LED_WLAN 13 ++#define GL_AR300_GPIO_LED_WAN 14 ++#define GL_AR300_GPIO_BTN_RESET 16 ++ ++ ++#define GL_AR300_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define GL_AR300_KEYS_DEBOUNCE_INTERVAL (3 * GL_AR300_KEYS_POLL_INTERVAL) ++ ++#define GL_AR300_MAC0_OFFSET 0x0000 ++#define GL_AR300_MAC1_OFFSET 0x0000 ++#define GL_AR300_CALDATA_OFFSET 0x1000 ++#define GL_AR300_WMAC_MAC_OFFSET 0x0000 ++ ++static struct gpio_led gl_ar300_leds_gpio[] __initdata = { ++ { ++ .name = "gl_ar300:wlan", ++ .gpio = GL_AR300_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "gl_ar300:wan", ++ .gpio = GL_AR300_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button gl_ar300_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = GL_AR300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GL_AR300_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init gl_ar300_setup(void) ++{ ++ ++ /* ART base address */ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ /* register flash. */ ++ ath79_register_m25p80(NULL); ++ ++ /* register gpio LEDs and keys */ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300_leds_gpio), ++ gl_ar300_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, GL_AR300_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(gl_ar300_gpio_keys), ++ gl_ar300_gpio_keys); ++ ++ /* enable usb */ ++ ath79_register_usb(); ++ ath79_register_mdio(1, 0x0); ++ ++ /* register eth0 as WAN, eth1 as LAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_AR300_MAC0_OFFSET, 0); ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_AR300_MAC1_OFFSET, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ /* register wireless mac with cal data */ ++ ath79_register_wmac(art + GL_AR300_CALDATA_OFFSET, art + GL_AR300_WMAC_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_GL_AR300, "GL-AR300", "GL AR300",gl_ar300_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-domino.c linux-4.1.13/arch/mips/ath79/mach-gl-domino.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-gl-domino.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-gl-domino.c 2015-12-04 18:27:35.461807609 +0100 +@@ -0,0 +1,136 @@ ++/* ++ * Domino board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2013 alzhao ++ * Copyright (C) 2014 Michel Stempin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++*/ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define DOMINO_GPIO_LED_WLAN 0 ++#define DOMINO_GPIO_LED_WAN 17 ++#define DOMINO_GPIO_LED_USB 1 ++#define DOMINO_GPIO_LED_LAN1 13 ++#define DOMINO_GPIO_LED_LAN2 14 ++#define DOMINO_GPIO_LED_LAN3 15 ++#define DOMINO_GPIO_LED_LAN4 16 ++#define DOMINO_GPIO_LED_SYS 27 ++#define DOMINO_GPIO_LED_WPS 26 ++#define DOMINO_GPIO_USB_POWER 6 ++ ++#define DOMINO_GPIO_BTN_RESET 11 ++#define DOMINO_GPIO_BTN_WPS 20 ++ ++#define DOMINO_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define DOMINO_KEYS_DEBOUNCE_INTERVAL (3 * DOMINO_KEYS_POLL_INTERVAL) ++ ++#define DOMINO_MAC0_OFFSET 0x0000 ++#define DOMINO_MAC1_OFFSET 0x0000 ++#define DOMINO_CALDATA_OFFSET 0x1000 ++#define DOMINO_WMAC_MAC_OFFSET 0x0000 ++ ++static struct gpio_led domino_leds_gpio[] __initdata = { ++ { ++ .name = "domino:blue:wlan", ++ .gpio = DOMINO_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "domino:red:wan", ++ .gpio = DOMINO_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "domino:white:usb", ++ .gpio = DOMINO_GPIO_LED_USB, ++ .active_low = 0, ++ }, ++ { ++ .name = "domino:green:lan1", ++ .gpio = DOMINO_GPIO_LED_LAN1, ++ .active_low = 0, ++ }, ++ { ++ .name = "domino:yellow:wps", ++ .gpio = DOMINO_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "domino:orange:sys", ++ .gpio = DOMINO_GPIO_LED_SYS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button domino_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = DOMINO_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DOMINO_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = DOMINO_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = DOMINO_GPIO_BTN_WPS, ++ .active_low = 0, ++ } ++}; ++ ++static void __init domino_setup(void) ++{ ++ ++ /* ART base address */ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ /* register flash. */ ++ ath79_register_m25p80(NULL); ++ ++ /* register gpio LEDs and keys */ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(domino_leds_gpio), ++ domino_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, DOMINO_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(domino_gpio_keys), ++ domino_gpio_keys); ++ ++ gpio_request_one(DOMINO_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ /* enable usb */ ++ ath79_register_usb(); ++ ++ /* register eth0 as WAN, eth1 as LAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art+DOMINO_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art+DOMINO_MAC1_OFFSET, 0); ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ /* register wireless mac with cal data */ ++ ath79_register_wmac(art + DOMINO_CALDATA_OFFSET, art + DOMINO_WMAC_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_GL_DOMINO, "DOMINO", "Domino Pi", domino_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gl-inet.c linux-4.1.13/arch/mips/ath79/mach-gl-inet.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-gl-inet.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-gl-inet.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,104 @@ ++/* ++ * GL-CONNECT iNet board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2013 alzhao ++ * Copyright (C) 2014 Michel Stempin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define GL_INET_GPIO_LED_WLAN 0 ++#define GL_INET_GPIO_LED_LAN 13 ++#define GL_INET_GPIO_BTN_RESET 11 ++ ++#define GL_INET_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define GL_INET_KEYS_DEBOUNCE_INTERVAL (3 * GL_INET_KEYS_POLL_INTERVAL) ++ ++static const char * gl_inet_part_probes[] = { ++ "tp-link", /* dont change, this will use tplink parser */ ++ NULL , ++}; ++ ++static struct flash_platform_data gl_inet_flash_data = { ++ .part_probes = gl_inet_part_probes, ++}; ++ ++static struct gpio_led gl_inet_leds_gpio[] __initdata = { ++ { ++ .name = "gl-connect:red:wlan", ++ .gpio = GL_INET_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "gl-connect:green:lan", ++ .gpio = GL_INET_GPIO_LED_LAN, ++ .active_low = 0, ++ .default_state = 1, ++ }, ++}; ++ ++static struct gpio_keys_button gl_inet_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = GL_INET_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GL_INET_GPIO_BTN_RESET, ++ .active_low = 0, ++ } ++}; ++ ++static void __init gl_inet_setup(void) ++{ ++ /* get the mac address which is stored in the 1st 64k uboot MTD */ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ ++ /* get the art address, which is the last 64K. By using ++ 0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */ ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ /* register flash. MTD will use tp-link parser to parser MTD */ ++ ath79_register_m25p80(&gl_inet_flash_data); ++ ++ /* register gpio LEDs and keys */ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio), ++ gl_inet_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(gl_inet_gpio_keys), ++ gl_inet_gpio_keys); ++ ++ /* enable usb */ ++ ath79_register_usb(); ++ ++ /* register eth0 as WAN, eth1 as LAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_eth(1); ++ ++ /* register wireless mac with cal data */ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_GL_INET, "GL-INET", "GL-CONNECT INET v1", ++ gl_inet_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gs-minibox-v1.c linux-4.1.13/arch/mips/ath79/mach-gs-minibox-v1.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-gs-minibox-v1.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-gs-minibox-v1.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,85 @@ ++/* ++ * Gainstrong MiniBox V1.0 board support ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define GS_MINIBOX_V1_GPIO_BTN_RESET 11 ++ ++#define GS_MINIBOX_V1_GPIO_LED_SYSTEM 1 ++ ++#define GS_MINIBOX_V1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define GS_MINIBOX_V1_KEYS_DEBOUNCE_INTERVAL (3 * GS_MINIBOX_V1_KEYS_POLL_INTERVAL) ++ ++static const char *gs_minibox_v1_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data gs_minibox_v1_flash_data = { ++ .part_probes = gs_minibox_v1_part_probes, ++}; ++ ++static struct gpio_led gs_minibox_v1_leds_gpio[] __initdata = { ++ { ++ .name = "minibox-v1:green:system", ++ .gpio = GS_MINIBOX_V1_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button gs_minibox_v1_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = GS_MINIBOX_V1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GS_MINIBOX_V1_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init gs_minibox_v1_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_minibox_v1_leds_gpio), ++ gs_minibox_v1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, GS_MINIBOX_V1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(gs_minibox_v1_gpio_keys), ++ gs_minibox_v1_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&gs_minibox_v1_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_GS_MINIBOX_V1, "MINIBOX-V1", ++ "MiniBox V1.0", gs_minibox_v1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-gs-oolite.c linux-4.1.13/arch/mips/ath79/mach-gs-oolite.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-gs-oolite.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-gs-oolite.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,103 @@ ++/* ++ * Oolite board support ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "dev-usb.h" ++ ++#define GS_OOLITE_GPIO_BTN6 6 ++#define GS_OOLITE_GPIO_BTN7 7 ++#define GS_OOLITE_GPIO_BTN_RESET 11 ++ ++#define GS_OOLITE_GPIO_LED_SYSTEM 27 ++ ++#define GS_OOLITE_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define GS_OOLITE_KEYS_DEBOUNCE_INTERVAL (3 * GS_OOLITE_KEYS_POLL_INTERVAL) ++ ++static const char *gs_oolite_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data gs_oolite_flash_data = { ++ .part_probes = gs_oolite_part_probes, ++}; ++ ++static struct gpio_led gs_oolite_leds_gpio[] __initdata = { ++ { ++ .name = "oolite:red:system", ++ .gpio = GS_OOLITE_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button gs_oolite_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GS_OOLITE_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "BTN_6", ++ .type = EV_KEY, ++ .code = BTN_6, ++ .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GS_OOLITE_GPIO_BTN6, ++ .active_low = 0, ++ }, ++ { ++ .desc = "BTN_7", ++ .type = EV_KEY, ++ .code = BTN_7, ++ .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = GS_OOLITE_GPIO_BTN7, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init gs_oolite_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_leds_gpio), ++ gs_oolite_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, GS_OOLITE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(gs_oolite_gpio_keys), ++ gs_oolite_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&gs_oolite_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_GS_OOLITE, "GS-OOLITE", ++ "Oolite V1.0", gs_oolite_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-hiwifi-hc6361.c linux-4.1.13/arch/mips/ath79/mach-hiwifi-hc6361.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-hiwifi-hc6361.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-hiwifi-hc6361.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,115 @@ ++/* ++ * HiWiFi HC6361 board support ++ * ++ * Copyright (C) 2012-2013 eric ++ * Copyright (C) 2014 Yousong Zhou ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define HIWIFI_HC6361_GPIO_LED_WLAN_2P4 0 /* 2.4G WLAN LED */ ++#define HIWIFI_HC6361_GPIO_LED_SYSTEM 1 /* System LED */ ++#define HIWIFI_HC6361_GPIO_LED_INTERNET 27 /* Internet LED */ ++ ++#define HIWIFI_HC6361_GPIO_USBPOWER 20 /* USB power control */ ++#define HIWIFI_HC6361_GPIO_BTN_RST 11 /* Reset button */ ++ ++#define HIWIFI_HC6361_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define HIWIFI_HC6361_KEYS_DEBOUNCE_INTERVAL \ ++ (3 * HIWIFI_HC6361_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led hiwifi_leds_gpio[] __initdata = { ++ { ++ .name = "hiwifi:blue:wlan-2p4", ++ .gpio = HIWIFI_HC6361_GPIO_LED_WLAN_2P4, ++ .active_low = 1, ++ }, { ++ .name = "hiwifi:blue:system", ++ .gpio = HIWIFI_HC6361_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "hiwifi:blue:internet", ++ .gpio = HIWIFI_HC6361_GPIO_LED_INTERNET, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button hiwifi_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = HIWIFI_HC6361_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = HIWIFI_HC6361_GPIO_BTN_RST, ++ .active_low = 1, ++ } ++}; ++ ++static void __init get_mac_from_bdinfo(u8 *mac, void *bdinfo) ++{ ++ if (sscanf(bdinfo, "fac_mac = %2hhx:%2hhx:%2hhx:%2hhx:%2hhx:%2hhx", ++ &mac[0], &mac[1], &mac[2], &mac[3], ++ &mac[4], &mac[5]) == 6) { ++ return; ++ } ++ ++ printk(KERN_WARNING "Parsing MAC address failed.\n"); ++ memcpy(mac, "\x00\xba\xbe\x00\x00\x00", 6); ++} ++ ++static void __init hiwifi_hc6361_setup(void) ++{ ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 mac[6]; ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_m25p80(NULL); ++ ath79_gpio_function_enable( ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(hiwifi_leds_gpio), ++ hiwifi_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, HIWIFI_HC6361_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(hiwifi_gpio_keys), ++ hiwifi_gpio_keys); ++ gpio_request_one(HIWIFI_HC6361_GPIO_USBPOWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ get_mac_from_bdinfo(mac, (void *) KSEG1ADDR(0x1f010180)); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_HIWIFI_HC6361, "HiWiFi-HC6361", ++ "HiWiFi HC6361", hiwifi_hc6361_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-hornet-ub.c linux-4.1.13/arch/mips/ath79/mach-hornet-ub.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-hornet-ub.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-hornet-ub.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,142 @@ ++/* ++ * ALFA NETWORK Hornet-UB board support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define HORNET_UB_GPIO_LED_WLAN 0 ++#define HORNET_UB_GPIO_LED_USB 1 ++#define HORNET_UB_GPIO_LED_LAN 13 ++#define HORNET_UB_GPIO_LED_WAN 17 ++#define HORNET_UB_GPIO_LED_WPS 27 ++#define HORNET_UB_GPIO_EXT_LNA 28 ++ ++#define HORNET_UB_GPIO_BTN_RESET 12 ++#define HORNET_UB_GPIO_BTN_WPS 11 ++ ++#define HORNET_UB_GPIO_USB_POWER 26 ++ ++#define HORNET_UB_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define HORNET_UB_KEYS_DEBOUNCE_INTERVAL (3 * HORNET_UB_KEYS_POLL_INTERVAL) ++ ++#define HORNET_UB_MAC0_OFFSET 0x0000 ++#define HORNET_UB_MAC1_OFFSET 0x0006 ++#define HORNET_UB_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led hornet_ub_leds_gpio[] __initdata = { ++ { ++ .name = "alfa:blue:lan", ++ .gpio = HORNET_UB_GPIO_LED_LAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "alfa:blue:usb", ++ .gpio = HORNET_UB_GPIO_LED_USB, ++ .active_low = 0, ++ }, ++ { ++ .name = "alfa:blue:wan", ++ .gpio = HORNET_UB_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "alfa:blue:wlan", ++ .gpio = HORNET_UB_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "alfa:blue:wps", ++ .gpio = HORNET_UB_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button hornet_ub_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = HORNET_UB_GPIO_BTN_WPS, ++ .active_low = 0, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = HORNET_UB_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init hornet_ub_gpio_setup(void) ++{ ++ u32 t; ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; ++ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); ++ ++ gpio_request_one(HORNET_UB_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ gpio_request_one(HORNET_UB_GPIO_EXT_LNA, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "external LNA0"); ++ ++} ++ ++static void __init hornet_ub_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ hornet_ub_gpio_setup(); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio), ++ hornet_ub_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(hornet_ub_gpio_keys), ++ hornet_ub_gpio_keys); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ++ art + HORNET_UB_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + HORNET_UB_MAC1_OFFSET, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_HORNET_UB, "HORNET-UB", "ALFA NETWORK Hornet-UB", ++ hornet_ub_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ja76pf.c linux-4.1.13/arch/mips/ath79/mach-ja76pf.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ja76pf.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ja76pf.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,190 @@ ++/* ++ * jjPlus JA76PF board support ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define JA76PF_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define JA76PF_KEYS_DEBOUNCE_INTERVAL (3 * JA76PF_KEYS_POLL_INTERVAL) ++ ++#define JA76PF_GPIO_I2C_SCL 0 ++#define JA76PF_GPIO_I2C_SDA 1 ++#define JA76PF_GPIO_LED_1 5 ++#define JA76PF_GPIO_LED_2 4 ++#define JA76PF_GPIO_LED_3 3 ++#define JA76PF_GPIO_BTN_RESET 11 ++ ++static struct gpio_led ja76pf_leds_gpio[] __initdata = { ++ { ++ .name = "jjplus:green:led1", ++ .gpio = JA76PF_GPIO_LED_1, ++ .active_low = 1, ++ }, { ++ .name = "jjplus:green:led2", ++ .gpio = JA76PF_GPIO_LED_2, ++ .active_low = 1, ++ }, { ++ .name = "jjplus:green:led3", ++ .gpio = JA76PF_GPIO_LED_3, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = JA76PF_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = { ++ .sda_pin = JA76PF_GPIO_I2C_SDA, ++ .scl_pin = JA76PF_GPIO_I2C_SCL, ++}; ++ ++static struct platform_device ja76pf_i2c_gpio_device = { ++ .name = "i2c-gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &ja76pf_i2c_gpio_data, ++ } ++}; ++ ++static const char *ja76pf_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data ja76pf_flash_data = { ++ .part_probes = ja76pf_part_probes, ++}; ++ ++#define JA76PF_WAN_PHYMASK (1 << 4) ++#define JA76PF_LAN_PHYMASK ((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3)) ++#define JA76PF_MDIO_PHYMASK (JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK) ++ ++static void __init ja76pf_init(void) ++{ ++ ath79_register_m25p80(&ja76pf_flash_data); ++ ++ ath79_register_mdio(0, ~JA76PF_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = JA76PF_LAN_PHYMASK; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = JA76PF_WAN_PHYMASK; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ platform_device_register(&ja76pf_i2c_gpio_device); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio), ++ ja76pf_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ja76pf_gpio_keys), ++ ja76pf_gpio_keys); ++ ++ ath79_register_usb(); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init); ++ ++#define JA76PF2_GPIO_LED_D2 5 ++#define JA76PF2_GPIO_LED_D3 4 ++#define JA76PF2_GPIO_LED_D4 3 ++#define JA76PF2_GPIO_BTN_RESET 7 ++#define JA76PF2_GPIO_BTN_WPS 8 ++ ++static struct gpio_led ja76pf2_leds_gpio[] __initdata = { ++ { ++ .name = "jjplus:green:led1", ++ .gpio = JA76PF2_GPIO_LED_D2, ++ .active_low = 1, ++ }, { ++ .name = "jjplus:green:led2", ++ .gpio = JA76PF2_GPIO_LED_D3, ++ .active_low = 0, ++ }, { ++ .name = "jjplus:green:led3", ++ .gpio = JA76PF2_GPIO_LED_D4, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button ja76pf2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = JA76PF2_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = JA76PF2_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++#define JA76PF2_LAN_PHYMASK BIT(0) ++#define JA76PF2_WAN_PHYMASK BIT(4) ++#define JA76PF2_MDIO_PHYMASK (JA76PF2_LAN_PHYMASK | JA76PF2_WAN_PHYMASK) ++ ++static void __init ja76pf2_init(void) ++{ ++ ath79_register_m25p80(&ja76pf_flash_data); ++ ++ ath79_register_mdio(0, ~JA76PF2_MDIO_PHYMASK); ++ ++ /* MAC0 is connected to the CPU port of the AR8316 switch */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ /* MAC1 is connected to the PHY4 of the AR8316 switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = BIT(4); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf2_leds_gpio), ++ ja76pf2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ja76pf2_gpio_keys), ++ ja76pf2_gpio_keys); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_JA76PF2, "JA76PF2", "jjPlus JA76PF2", ja76pf2_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-jwap003.c linux-4.1.13/arch/mips/ath79/mach-jwap003.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-jwap003.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-jwap003.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,95 @@ ++/* ++ * jjPlus JWAP003 board support ++ * ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-gpio-buttons.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define JWAP003_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define JWAP003_KEYS_DEBOUNCE_INTERVAL (3 * JWAP003_KEYS_POLL_INTERVAL) ++ ++#define JWAP003_GPIO_WPS 11 ++#define JWAP003_GPIO_I2C_SCL 0 ++#define JWAP003_GPIO_I2C_SDA 1 ++ ++static struct gpio_keys_button jwap003_gpio_keys[] __initdata = { ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = JWAP003_GPIO_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = { ++ .sda_pin = JWAP003_GPIO_I2C_SDA, ++ .scl_pin = JWAP003_GPIO_I2C_SCL, ++}; ++ ++static struct platform_device jwap003_i2c_gpio_device = { ++ .name = "i2c-gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &jwap003_i2c_gpio_data, ++ } ++}; ++ ++static const char *jwap003_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data jwap003_flash_data = { ++ .part_probes = jwap003_part_probes, ++}; ++ ++#define JWAP003_WAN_PHYMASK BIT(0) ++#define JWAP003_LAN_PHYMASK BIT(4) ++ ++static void __init jwap003_init(void) ++{ ++ ath79_register_m25p80(&jwap003_flash_data); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.phy_mask = JWAP003_WAN_PHYMASK; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.has_ar8216 = 1; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = JWAP003_LAN_PHYMASK; ++ ath79_eth1_data.speed = SPEED_100; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ platform_device_register(&jwap003_i2c_gpio_device); ++ ++ ath79_register_usb(); ++ ++ ath79_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(jwap003_gpio_keys), ++ jwap003_gpio_keys); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mc-mac1200r.c linux-4.1.13/arch/mips/ath79/mach-mc-mac1200r.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mc-mac1200r.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mc-mac1200r.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,155 @@ ++/* ++ * MERCURY MAC1200R board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2013 Gui Iribarren ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define MAC1200R_GPIO_LED_WLAN2G 13 ++#define MAC1200R_GPIO_LED_WLAN5G 17 ++#define MAC1200R_GPIO_LED_SYSTEM 14 ++#define MAC1200R_GPIO_LED_WPS 11 ++#define MAC1200R_GPIO_LED_WAN 12 ++#define MAC1200R_GPIO_LED_LAN1 15 ++#define MAC1200R_GPIO_LED_LAN2 21 ++#define MAC1200R_GPIO_LED_LAN3 22 ++#define MAC1200R_GPIO_LED_LAN4 20 ++ ++#define MAC1200R_GPIO_BTN_WPS 16 ++ ++#define MAC1200R_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MAC1200R_KEYS_DEBOUNCE_INTERVAL (3 * MAC1200R_KEYS_POLL_INTERVAL) ++ ++#define MAC1200R_MAC0_OFFSET 0 ++#define MAC1200R_MAC1_OFFSET 6 ++#define MAC1200R_WMAC_CALDATA_OFFSET 0x1000 ++#define MAC1200R_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *mac1200r_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data mac1200r_flash_data = { ++ .part_probes = mac1200r_part_probes, ++}; ++ ++static struct gpio_led mac1200r_leds_gpio[] __initdata = { ++ { ++ .name = "mercury:green:wps", ++ .gpio = MAC1200R_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "mercury:green:system", ++ .gpio = MAC1200R_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++ { ++ .name = "mercury:green:wlan2g", ++ .gpio = MAC1200R_GPIO_LED_WLAN2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "mercury:green:wlan5g", ++ .gpio = MAC1200R_GPIO_LED_WLAN5G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mac1200r_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MAC1200R_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MAC1200R_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++ ++static void __init mac1200r_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&mac1200r_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mac1200r_leds_gpio), ++ mac1200r_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, MAC1200R_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mac1200r_gpio_keys), ++ mac1200r_gpio_keys); ++ ++ ath79_init_mac(tmpmac, mac, 0); ++ ath79_wmac_disable_5ghz(); ++ ath79_register_wmac(art + MAC1200R_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_init_mac(tmpmac, mac, 1); ++ ap91_pci_init(art + MAC1200R_PCIE_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* LAN */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2); ++ ++ /* GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(0); ++ ++ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN1, ++ AR934X_GPIO_OUT_LED_LINK3); ++ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN2, ++ AR934X_GPIO_OUT_LED_LINK2); ++ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN3, ++ AR934X_GPIO_OUT_LED_LINK1); ++ ath79_gpio_output_select(MAC1200R_GPIO_LED_LAN4, ++ AR934X_GPIO_OUT_LED_LINK0); ++ ath79_gpio_output_select(MAC1200R_GPIO_LED_WAN, ++ AR934X_GPIO_OUT_LED_LINK4); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MC_MAC1200R, "MC-MAC1200R", ++ "MERCURY MAC1200R", ++ mac1200r_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr12.c linux-4.1.13/arch/mips/ath79/mach-mr12.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mr12.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mr12.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,115 @@ ++/* ++ * Cisco Meraki MR12 board support ++ * ++ * Copyright (C) 2014-2015 Chris Blake ++ * ++ * Based on Atheros AP96 board support configuration ++ * ++ * Copyright (C) 2009 Marco Porsch ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2010 Atheros Communications ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define MR12_GPIO_LED_W4_GREEN 14 ++#define MR12_GPIO_LED_W3_GREEN 13 ++#define MR12_GPIO_LED_W2_GREEN 12 ++#define MR12_GPIO_LED_W1_GREEN 11 ++ ++#define MR12_GPIO_LED_WAN 15 ++ ++#define MR12_GPIO_LED_POWER_ORANGE 16 ++#define MR12_GPIO_LED_POWER_GREEN 17 ++ ++#define MR12_GPIO_BTN_RESET 8 ++#define MR12_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MR12_KEYS_DEBOUNCE_INTERVAL (3 * MR12_KEYS_POLL_INTERVAL) ++ ++#define MR12_WAN_PHYMASK BIT(4) ++ ++#define MR12_WMAC0_MAC_OFFSET 0x120c ++#define MR12_CALDATA0_OFFSET 0x1000 ++ ++static struct gpio_led MR12_leds_gpio[] __initdata = { ++ { ++ .name = "mr12:green:wan", ++ .gpio = MR12_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "mr12:orange:power", ++ .gpio = MR12_GPIO_LED_POWER_ORANGE, ++ .active_low = 1, ++ }, { ++ .name = "mr12:green:power", ++ .gpio = MR12_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr12:green:wifi4", ++ .gpio = MR12_GPIO_LED_W4_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr12:green:wifi3", ++ .gpio = MR12_GPIO_LED_W3_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr12:green:wifi2", ++ .gpio = MR12_GPIO_LED_W2_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr12:green:wifi1", ++ .gpio = MR12_GPIO_LED_W1_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button MR12_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MR12_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MR12_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init MR12_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0xbfff0000); ++ ++ ath79_register_mdio(0,0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = MR12_WAN_PHYMASK; ++ ath79_register_eth(0); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(MR12_leds_gpio), ++ MR12_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, MR12_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(MR12_gpio_keys), ++ MR12_gpio_keys); ++ ++ ap91_pci_init(mac + MR12_CALDATA0_OFFSET, ++ mac + MR12_WMAC0_MAC_OFFSET); ++ ++} ++ ++MIPS_MACHINE(ATH79_MACH_MR12, "MR12", "Meraki MR12", MR12_setup); +\ No newline at end of file +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr16.c linux-4.1.13/arch/mips/ath79/mach-mr16.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mr16.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mr16.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,118 @@ ++/* ++ * Cisco Meraki MR16 board support ++ * ++ * Copyright (C) 2015 Chris Blake ++ * ++ * Based on Atheros AP96 board support configuration ++ * ++ * Copyright (C) 2009 Marco Porsch ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2010 Atheros Communications ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define MR16_GPIO_LED_W4_GREEN 3 ++#define MR16_GPIO_LED_W3_GREEN 2 ++#define MR16_GPIO_LED_W2_GREEN 1 ++#define MR16_GPIO_LED_W1_GREEN 0 ++ ++#define MR16_GPIO_LED_WAN 4 ++ ++#define MR16_GPIO_LED_POWER_ORANGE 5 ++#define MR16_GPIO_LED_POWER_GREEN 6 ++ ++#define MR16_GPIO_BTN_RESET 7 ++#define MR16_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MR16_KEYS_DEBOUNCE_INTERVAL (3 * MR16_KEYS_POLL_INTERVAL) ++ ++#define MR16_WAN_PHYMASK BIT(0) ++ ++#define MR16_WMAC0_MAC_OFFSET 0x120c ++#define MR16_WMAC1_MAC_OFFSET 0x520c ++#define MR16_CALDATA0_OFFSET 0x1000 ++#define MR16_CALDATA1_OFFSET 0x5000 ++ ++static struct gpio_led MR16_leds_gpio[] __initdata = { ++ { ++ .name = "mr16:green:wan", ++ .gpio = MR16_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "mr16:orange:power", ++ .gpio = MR16_GPIO_LED_POWER_ORANGE, ++ .active_low = 1, ++ }, { ++ .name = "mr16:green:power", ++ .gpio = MR16_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr16:green:wifi4", ++ .gpio = MR16_GPIO_LED_W4_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr16:green:wifi3", ++ .gpio = MR16_GPIO_LED_W3_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr16:green:wifi2", ++ .gpio = MR16_GPIO_LED_W2_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "mr16:green:wifi1", ++ .gpio = MR16_GPIO_LED_W1_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button MR16_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MR16_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MR16_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init MR16_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0xbfff0000); ++ ++ ath79_register_mdio(0,0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = MR16_WAN_PHYMASK; ++ ath79_register_eth(0); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(MR16_leds_gpio), ++ MR16_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, MR16_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(MR16_gpio_keys), ++ MR16_gpio_keys); ++ ++ ap94_pci_init(mac + MR16_CALDATA0_OFFSET, ++ mac + MR16_WMAC0_MAC_OFFSET, ++ mac + MR16_CALDATA1_OFFSET, ++ mac + MR16_WMAC1_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MR16, "MR16", "Meraki MR16", MR16_setup); +\ No newline at end of file +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr1750.c linux-4.1.13/arch/mips/ath79/mach-mr1750.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mr1750.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mr1750.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,129 @@ ++/* ++ * MR1750 board support ++ * ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012-2013 Marek Lindner ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define MR1750_GPIO_LED_LAN 12 ++#define MR1750_GPIO_LED_WLAN_2G 13 ++#define MR1750_GPIO_LED_STATUS_GREEN 19 ++#define MR1750_GPIO_LED_STATUS_RED 21 ++#define MR1750_GPIO_LED_POWER 22 ++#define MR1750_GPIO_LED_WLAN_5G 23 ++ ++#define MR1750_GPIO_BTN_RESET 17 ++ ++#define MR1750_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MR1750_KEYS_DEBOUNCE_INTERVAL (3 * MR1750_KEYS_POLL_INTERVAL) ++ ++#define MR1750_MAC0_OFFSET 0 ++#define MR1750_WMAC_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led mr1750_leds_gpio[] __initdata = { ++ { ++ .name = "mr1750:blue:power", ++ .gpio = MR1750_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr1750:blue:wan", ++ .gpio = MR1750_GPIO_LED_LAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr1750:blue:wlan24", ++ .gpio = MR1750_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr1750:blue:wlan58", ++ .gpio = MR1750_GPIO_LED_WLAN_5G, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr1750:green:status", ++ .gpio = MR1750_GPIO_LED_STATUS_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr1750:red:status", ++ .gpio = MR1750_GPIO_LED_STATUS_RED, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mr1750_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MR1750_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MR1750_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init mr1750_setup(void) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); ++ u8 mac[6]; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xbe000101; ++ ath79_eth0_pll_data.pll_100 = 0x80000101; ++ ath79_eth0_pll_data.pll_10 = 0x80001313; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mr1750_leds_gpio), ++ mr1750_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, MR1750_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mr1750_gpio_keys), ++ mr1750_gpio_keys); ++ ++ ath79_init_mac(mac, art + MR1750_MAC0_OFFSET, 1); ++ ath79_register_wmac(art + MR1750_WMAC_CALDATA_OFFSET, mac); ++ ath79_register_pci(); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + MR1750_MAC0_OFFSET, 0); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(5); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MR1750, "MR1750", "OpenMesh MR1750", mr1750_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr600.c linux-4.1.13/arch/mips/ath79/mach-mr600.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mr600.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mr600.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,177 @@ ++/* ++ * OpenMesh OM2P board support ++ * ++ * Copyright (C) 2012 Marek Lindner ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define MR600_GPIO_LED_WLAN58 12 ++#define MR600_GPIO_LED_WPS 13 ++#define MR600_GPIO_LED_POWER 14 ++ ++#define MR600V2_GPIO_LED_WLAN58_RED 12 ++#define MR600V2_GPIO_LED_WPS 13 ++#define MR600V2_GPIO_LED_POWER 14 ++#define MR600V2_GPIO_LED_WLAN24_GREEN 18 ++#define MR600V2_GPIO_LED_WLAN24_YELLOW 19 ++#define MR600V2_GPIO_LED_WLAN24_RED 20 ++#define MR600V2_GPIO_LED_WLAN58_GREEN 21 ++#define MR600V2_GPIO_LED_WLAN58_YELLOW 22 ++ ++#define MR600_GPIO_BTN_RESET 17 ++ ++#define MR600_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MR600_KEYS_DEBOUNCE_INTERVAL (3 * MR600_KEYS_POLL_INTERVAL) ++ ++#define MR600_MAC_OFFSET 0 ++#define MR600_WMAC_CALDATA_OFFSET 0x1000 ++#define MR600_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led mr600_leds_gpio[] __initdata = { ++ { ++ .name = "mr600:orange:power", ++ .gpio = MR600_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:blue:wps", ++ .gpio = MR600_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:green:wlan58", ++ .gpio = MR600_GPIO_LED_WLAN58, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led mr600v2_leds_gpio[] __initdata = { ++ { ++ .name = "mr600:blue:power", ++ .gpio = MR600V2_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:blue:wps", ++ .gpio = MR600V2_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:red:wlan24", ++ .gpio = MR600V2_GPIO_LED_WLAN24_RED, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:yellow:wlan24", ++ .gpio = MR600V2_GPIO_LED_WLAN24_YELLOW, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:green:wlan24", ++ .gpio = MR600V2_GPIO_LED_WLAN24_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:red:wlan58", ++ .gpio = MR600V2_GPIO_LED_WLAN58_RED, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:yellow:wlan58", ++ .gpio = MR600V2_GPIO_LED_WLAN58_YELLOW, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr600:green:wlan58", ++ .gpio = MR600V2_GPIO_LED_WLAN58_GREEN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mr600_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MR600_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MR600_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init mr600_base_setup(unsigned num_leds, struct gpio_led *leds) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); ++ u8 mac[6]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, num_leds, leds); ++ ath79_register_gpio_keys_polled(-1, MR600_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mr600_gpio_keys), ++ mr600_gpio_keys); ++ ++ ath79_init_mac(mac, art + MR600_MAC_OFFSET, 1); ++ ath79_register_wmac(art + MR600_WMAC_CALDATA_OFFSET, mac); ++ ++ ath79_init_mac(mac, art + MR600_MAC_OFFSET, 8); ++ ap91_pci_init(art + MR600_PCIE_CALDATA_OFFSET, mac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + MR600_MAC_OFFSET, 0); ++ ++ /* GMAC0 is connected to an external PHY */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++} ++ ++static void __init mr600_setup(void) ++{ ++ mr600_base_setup(ARRAY_SIZE(mr600_leds_gpio), mr600_leds_gpio); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MR600, "MR600", "OpenMesh MR600", mr600_setup); ++ ++static void __init mr600v2_setup(void) ++{ ++ mr600_base_setup(ARRAY_SIZE(mr600v2_leds_gpio), mr600v2_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MR600V2, "MR600v2", "OpenMesh MR600v2", mr600v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mr900.c linux-4.1.13/arch/mips/ath79/mach-mr900.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mr900.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mr900.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,140 @@ ++/* ++ * MR900 board support ++ * ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012-2013 Marek Lindner ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define MR900_GPIO_LED_LAN 12 ++#define MR900_GPIO_LED_WLAN_2G 13 ++#define MR900_GPIO_LED_STATUS_GREEN 19 ++#define MR900_GPIO_LED_STATUS_RED 21 ++#define MR900_GPIO_LED_POWER 22 ++#define MR900_GPIO_LED_WLAN_5G 23 ++ ++#define MR900_GPIO_BTN_RESET 17 ++ ++#define MR900_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MR900_KEYS_DEBOUNCE_INTERVAL (3 * MR900_KEYS_POLL_INTERVAL) ++ ++#define MR900_MAC0_OFFSET 0 ++#define MR900_WMAC_CALDATA_OFFSET 0x1000 ++#define MR900_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led mr900_leds_gpio[] __initdata = { ++ { ++ .name = "mr900:blue:power", ++ .gpio = MR900_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr900:blue:wan", ++ .gpio = MR900_GPIO_LED_LAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr900:blue:wlan24", ++ .gpio = MR900_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr900:blue:wlan58", ++ .gpio = MR900_GPIO_LED_WLAN_5G, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr900:green:status", ++ .gpio = MR900_GPIO_LED_STATUS_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "mr900:red:status", ++ .gpio = MR900_GPIO_LED_STATUS_RED, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mr900_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MR900_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MR900_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init mr900_setup(void) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); ++ u8 mac[6], pcie_mac[6]; ++ struct ath9k_platform_data *pdata; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xbe000101; ++ ath79_eth0_pll_data.pll_100 = 0x80000101; ++ ath79_eth0_pll_data.pll_10 = 0x80001313; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mr900_leds_gpio), ++ mr900_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, MR900_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mr900_gpio_keys), ++ mr900_gpio_keys); ++ ++ ath79_init_mac(mac, art + MR900_MAC0_OFFSET, 1); ++ ath79_register_wmac(art + MR900_WMAC_CALDATA_OFFSET, mac); ++ ath79_init_mac(pcie_mac, art + MR900_MAC0_OFFSET, 16); ++ ap91_pci_init(art + MR900_PCIE_CALDATA_OFFSET, pcie_mac); ++ pdata = ap9x_pci_get_wmac_data(0); ++ if (!pdata) { ++ pr_err("mr900: unable to get address of wlan data\n"); ++ return; ++ } ++ pdata->use_eeprom = true; ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + MR900_MAC0_OFFSET, 0); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(5); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MR900, "MR900", "OpenMesh MR900", mr900_setup); ++MIPS_MACHINE(ATH79_MACH_MR900v2, "MR900v2", "OpenMesh MR900v2", mr900_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n600.c linux-4.1.13/arch/mips/ath79/mach-mynet-n600.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n600.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mynet-n600.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,202 @@ ++/* ++ * WD My Net N600 board support ++ * ++ * Copyright (C) 2013 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define MYNET_N600_GPIO_LED_WIFI 0 ++#define MYNET_N600_GPIO_LED_POWER 11 ++#define MYNET_N600_GPIO_LED_INTERNET 12 ++#define MYNET_N600_GPIO_LED_WPS 13 ++ ++#define MYNET_N600_GPIO_LED_LAN1 4 ++#define MYNET_N600_GPIO_LED_LAN2 3 ++#define MYNET_N600_GPIO_LED_LAN3 2 ++#define MYNET_N600_GPIO_LED_LAN4 1 ++ ++#define MYNET_N600_GPIO_BTN_RESET 16 ++#define MYNET_N600_GPIO_BTN_WPS 17 ++ ++#define MYNET_N600_GPIO_EXTERNAL_LNA0 14 ++#define MYNET_N600_GPIO_EXTERNAL_LNA1 15 ++ ++#define MYNET_N600_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MYNET_N600_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N600_KEYS_POLL_INTERVAL) ++ ++#define MYNET_N600_MAC0_OFFSET 0 ++#define MYNET_N600_MAC1_OFFSET 6 ++#define MYNET_N600_WMAC_CALDATA_OFFSET 0x1000 ++#define MYNET_N600_PCIE_CALDATA_OFFSET 0x5000 ++ ++#define MYNET_N600_NVRAM_ADDR 0x1f058010 ++#define MYNET_N600_NVRAM_SIZE 0x7ff0 ++ ++static struct gpio_led mynet_n600_leds_gpio[] __initdata = { ++ { ++ .name = "wd:blue:power", ++ .gpio = MYNET_N600_GPIO_LED_POWER, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:wps", ++ .gpio = MYNET_N600_GPIO_LED_WPS, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:wireless", ++ .gpio = MYNET_N600_GPIO_LED_WIFI, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:internet", ++ .gpio = MYNET_N600_GPIO_LED_INTERNET, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:green:lan1", ++ .gpio = MYNET_N600_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:green:lan2", ++ .gpio = MYNET_N600_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:green:lan3", ++ .gpio = MYNET_N600_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:green:lan4", ++ .gpio = MYNET_N600_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mynet_n600_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MYNET_N600_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_N600_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = MYNET_N600_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_N600_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static void mynet_n600_get_mac(const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N600_NVRAM_ADDR); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, MYNET_N600_NVRAM_SIZE, ++ name, mac); ++ if (err) ++ pr_err("no MAC address found for %s\n", name); ++} ++ ++#define MYNET_N600_WAN_PHY_MASK BIT(0) ++ ++static void __init mynet_n600_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN1, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN2, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN3, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN4, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_N600_GPIO_LED_INTERNET, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n600_leds_gpio), ++ mynet_n600_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, MYNET_N600_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mynet_n600_gpio_keys), ++ mynet_n600_gpio_keys); ++ ++ /* ++ * Control signal for external LNAs 0 and 1 ++ * Taken from GPL bootloader source: ++ * board/ar7240/db12x/alpha_gpio.c ++ */ ++ ath79_wmac_set_ext_lna_gpio(0, MYNET_N600_GPIO_EXTERNAL_LNA0); ++ ath79_wmac_set_ext_lna_gpio(1, MYNET_N600_GPIO_EXTERNAL_LNA1); ++ ++ mynet_n600_get_mac("wlan24mac=", tmpmac); ++ ath79_register_wmac(art + MYNET_N600_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ mynet_n600_get_mac("wlan5mac=", tmpmac); ++ ap91_pci_init(art + MYNET_N600_PCIE_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE | ++ AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* LAN */ ++ mynet_n600_get_mac("lanmac=", ath79_eth1_data.mac_addr); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ mynet_n600_get_mac("wanmac=", ath79_eth0_data.mac_addr); ++ ++ /* GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = MYNET_N600_WAN_PHY_MASK; ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = MYNET_N600_WAN_PHY_MASK; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MYNET_N600, "MYNET-N600", "WD My Net N600", ++ mynet_n600_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n750.c linux-4.1.13/arch/mips/ath79/mach-mynet-n750.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mynet-n750.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mynet-n750.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,226 @@ ++/* ++ * WD My Net N750 board support ++ * ++ * Copyright (C) 2013 Felix Kaechele ++ * Copyright (C) 2013 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++ ++/* ++ * Taken from GPL bootloader source: ++ * board/ar7240/db12x/alpha_gpio.c ++ */ ++#define MYNET_N750_GPIO_LED_WIFI 11 ++#define MYNET_N750_GPIO_LED_INTERNET 12 ++#define MYNET_N750_GPIO_LED_WPS 13 ++#define MYNET_N750_GPIO_LED_POWER 14 ++ ++#define MYNET_N750_GPIO_BTN_RESET 17 ++#define MYNET_N750_GPIO_BTN_WPS 19 ++ ++#define MYNET_N750_GPIO_EXTERNAL_LNA0 15 ++#define MYNET_N750_GPIO_EXTERNAL_LNA1 18 ++ ++#define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL) ++ ++#define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000 ++#define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000 ++ ++#define MYNET_N750_NVRAM_ADDR 0x1f058010 ++#define MYNET_N750_NVRAM_SIZE 0x7ff0 ++ ++static struct gpio_led mynet_n750_leds_gpio[] __initdata = { ++ { ++ .name = "wd:blue:power", ++ .gpio = MYNET_N750_GPIO_LED_POWER, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:wps", ++ .gpio = MYNET_N750_GPIO_LED_WPS, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:wireless", ++ .gpio = MYNET_N750_GPIO_LED_WIFI, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:internet", ++ .gpio = MYNET_N750_GPIO_LED_INTERNET, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_N750_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_N750_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static const struct ar8327_led_info mynet_n750_leds_ar8327[] __initconst = { ++ AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"), ++ AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"), ++ AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"), ++ AR8327_LED_INFO(PHY3_0, HW, "wd:green:lan4"), ++ AR8327_LED_INFO(PHY4_0, HW, "wd:green:wan"), ++ AR8327_LED_INFO(PHY0_1, HW, "wd:yellow:lan1"), ++ AR8327_LED_INFO(PHY1_1, HW, "wd:yellow:lan2"), ++ AR8327_LED_INFO(PHY2_1, HW, "wd:yellow:lan3"), ++ AR8327_LED_INFO(PHY3_1, HW, "wd:yellow:lan4"), ++ AR8327_LED_INFO(PHY4_1, HW, "wd:yellow:wan"), ++}; ++ ++static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = { ++ .led_ctrl0 = 0xcc35cc35, ++ .led_ctrl1 = 0xca35ca35, ++ .led_ctrl2 = 0xc935c935, ++ .led_ctrl3 = 0x03ffff00, ++ .open_drain = false, ++}; ++ ++static struct ar8327_platform_data mynet_n750_ar8327_data = { ++ .pad0_cfg = &mynet_n750_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &mynet_n750_ar8327_led_cfg, ++ .num_leds = ARRAY_SIZE(mynet_n750_leds_ar8327), ++ .leds = mynet_n750_leds_ar8327, ++}; ++ ++static struct mdio_board_info mynet_n750_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &mynet_n750_ar8327_data, ++ }, ++}; ++ ++static void mynet_n750_get_mac(const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE, ++ name, mac); ++ if (err) ++ pr_err("no MAC address found for %s\n", name); ++} ++ ++/* ++ * The bootloader on this board powers down all PHYs on the switch ++ * before booting the kernel. We bring all PHYs back up so that they are ++ * discoverable by the mdio bus scan and the switch is detected ++ * correctly. ++ */ ++static void mynet_n750_mdio_fixup(struct mii_bus *bus) ++{ ++ int i; ++ ++ for (i = 0; i < 5; i++) ++ bus->write(bus, i, MII_BMCR, ++ (BMCR_RESET | BMCR_ANENABLE | BMCR_SPEED1000)); ++ ++ mdelay(1000); ++} ++ ++static void __init mynet_n750_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio), ++ mynet_n750_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mynet_n750_gpio_keys), ++ mynet_n750_gpio_keys); ++ /* ++ * Control signal for external LNAs 0 and 1 ++ * Taken from GPL bootloader source: ++ * board/ar7240/db12x/alpha_gpio.c ++ */ ++ ath79_wmac_set_ext_lna_gpio(0, MYNET_N750_GPIO_EXTERNAL_LNA0); ++ ath79_wmac_set_ext_lna_gpio(1, MYNET_N750_GPIO_EXTERNAL_LNA1); ++ ++ mynet_n750_get_mac("wlan24mac=", tmpmac); ++ ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ mynet_n750_get_mac("wlan5mac=", tmpmac); ++ ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ++ mdiobus_register_board_info(mynet_n750_mdio0_info, ++ ARRAY_SIZE(mynet_n750_mdio0_info)); ++ ++ ath79_mdio0_data.reset = mynet_n750_mdio_fixup; ++ ath79_register_mdio(0, 0x0); ++ ++ mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr); ++ ++ /* GMAC0 is connected to an AR8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750", ++ mynet_n750_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mynet-rext.c linux-4.1.13/arch/mips/ath79/mach-mynet-rext.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mynet-rext.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mynet-rext.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,208 @@ ++/* ++ * WD My Net WI-FI Range Extender (Codename:Starfish db12x) board support ++ * ++ * Copyright (C) 2013 Christian Lamparter ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define MYNET_REXT_GPIO_LED_POWER 11 ++#define MYNET_REXT_GPIO_LED_ETHERNET 12 ++#define MYNET_REXT_GPIO_LED_WIFI 19 ++ ++#define MYNET_REXT_GPIO_LED_RF_QTY1 20 ++#define MYNET_REXT_GPIO_LED_RF_QTY2 21 ++#define MYNET_REXT_GPIO_LED_RF_QTY3 22 ++ ++#define MYNET_REXT_GPIO_BTN_RESET 13 ++#define MYNET_REXT_GPIO_BTN_WPS 15 ++#define MYNET_REXT_GPIO_SW_RF 14 ++ ++#define MYNET_REXT_GPIO_PHY_SWRST 16 /* disables Ethernet PHY */ ++#define MYNET_REXT_GPIO_PHY_INT 17 ++#define MYNET_REXT_GPIO_18 18 ++ ++#define MYNET_REXT_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MYNET_REXT_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_REXT_KEYS_POLL_INTERVAL) ++ ++#define MYNET_REXT_WMAC_CALDATA_OFFSET 0x1000 ++ ++#define MYNET_REXT_NVRAM_ADDR 0x1f7e0010 ++#define MYNET_REXT_NVRAM_SIZE 0xfff0 ++ ++#define MYNET_REXT_ART_ADDR 0x1f7f0000 ++ ++static const char *mynet_rext_part_probes[] = { ++ "cybertan", ++ NULL, ++}; ++ ++static struct flash_platform_data mynet_rext_flash_data = { ++ .type = "s25fl064k", ++ .part_probes = mynet_rext_part_probes, ++}; ++ ++static struct gpio_led mynet_rext_leds_gpio[] __initdata = { ++ { ++ .name = "wd:blue:power", ++ .gpio = MYNET_REXT_GPIO_LED_POWER, ++ .active_low = 0, ++ }, ++ { ++ .name = "wd:blue:wireless", ++ .gpio = MYNET_REXT_GPIO_LED_WIFI, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:blue:ethernet", ++ .gpio = MYNET_REXT_GPIO_LED_ETHERNET, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:blue:quality1", ++ .gpio = MYNET_REXT_GPIO_LED_RF_QTY1, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:blue:quality2", ++ .gpio = MYNET_REXT_GPIO_LED_RF_QTY2, ++ .active_low = 1, ++ }, ++ { ++ .name = "wd:blue:quality3", ++ .gpio = MYNET_REXT_GPIO_LED_RF_QTY3, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button mynet_rext_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_REXT_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_REXT_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RF Band switch", ++ .type = EV_SW, ++ .code = BTN_1, ++ .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MYNET_REXT_GPIO_SW_RF, ++ }, ++}; ++ ++static struct at803x_platform_data mynet_rext_at803x_data = { ++ .disable_smarteee = 0, ++ .enable_rgmii_rx_delay = 1, ++ .enable_rgmii_tx_delay = 0, ++ .fixup_rgmii_tx_delay = 1, ++}; ++ ++static struct mdio_board_info mynet_rext_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 4, ++ .platform_data = &mynet_rext_at803x_data, ++ }, ++}; ++ ++static void mynet_rext_get_mac(const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(MYNET_REXT_NVRAM_ADDR); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, MYNET_REXT_NVRAM_SIZE, ++ name, mac); ++ if (err) ++ pr_err("no MAC address found for %s\n", name); ++} ++ ++static void __init mynet_rext_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(MYNET_REXT_ART_ADDR); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&mynet_rext_flash_data); ++ ++ /* GPIO configuration from drivers/char/GPIO8.c */ ++ ++ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_POWER, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_WIFI, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY1, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY2, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY3, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(MYNET_REXT_GPIO_LED_ETHERNET, ++ AR934X_GPIO_OUT_GPIO); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_rext_leds_gpio), ++ mynet_rext_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, MYNET_REXT_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mynet_rext_gpio_keys), ++ mynet_rext_gpio_keys); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_RXD_DELAY | ++ AR934X_ETH_CFG_RDV_DELAY); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(mynet_rext_mdio0_info, ++ ARRAY_SIZE(mynet_rext_mdio0_info)); ++ ++ /* LAN */ ++ mynet_rext_get_mac("et0macaddr=", ath79_eth0_data.mac_addr); ++ ++ /* GMAC0 is connected to an external PHY on Port 4 */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_pll_data.pll_10 = 0x00001313; /* athrs_mac.c */ ++ ath79_eth0_pll_data.pll_1000 = 0x0e000000; /* athrs_mac.c */ ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_register_eth(0); ++ ++ /* WLAN */ ++ mynet_rext_get_mac("wl0_hwaddr=", tmpmac); ++ ap91_pci_init(art + MYNET_REXT_WMAC_CALDATA_OFFSET, tmpmac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MYNET_REXT, "MYNET-REXT", ++ "WD My Net Wi-Fi Range Extender", mynet_rext_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w04nu.c linux-4.1.13/arch/mips/ath79/mach-mzk-w04nu.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w04nu.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mzk-w04nu.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,124 @@ ++/* ++ * Planex MZK-W04NU board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define MZK_W04NU_GPIO_LED_USB 0 ++#define MZK_W04NU_GPIO_LED_STATUS 1 ++#define MZK_W04NU_GPIO_LED_WPS 3 ++#define MZK_W04NU_GPIO_LED_WLAN 6 ++#define MZK_W04NU_GPIO_LED_AP 15 ++#define MZK_W04NU_GPIO_LED_ROUTER 16 ++ ++#define MZK_W04NU_GPIO_BTN_APROUTER 5 ++#define MZK_W04NU_GPIO_BTN_WPS 12 ++#define MZK_W04NU_GPIO_BTN_RESET 21 ++ ++#define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = { ++ { ++ .name = "planex:green:status", ++ .gpio = MZK_W04NU_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, { ++ .name = "planex:blue:wps", ++ .gpio = MZK_W04NU_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "planex:green:wlan", ++ .gpio = MZK_W04NU_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "planex:green:usb", ++ .gpio = MZK_W04NU_GPIO_LED_USB, ++ .active_low = 1, ++ }, { ++ .name = "planex:green:ap", ++ .gpio = MZK_W04NU_GPIO_LED_AP, ++ .active_low = 1, ++ }, { ++ .name = "planex:green:router", ++ .gpio = MZK_W04NU_GPIO_LED_ROUTER, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MZK_W04NU_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MZK_W04NU_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, { ++ .desc = "aprouter", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MZK_W04NU_GPIO_BTN_APROUTER, ++ .active_low = 0, ++ } ++}; ++ ++#define MZK_W04NU_WAN_PHYMASK BIT(4) ++#define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK) ++ ++static void __init mzk_w04nu_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_mdio(0, MZK_W04NU_MDIO_MASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.has_ar8216 = 1; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio), ++ mzk_w04nu_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mzk_w04nu_gpio_keys), ++ mzk_w04nu_gpio_keys); ++ ath79_register_usb(); ++ ++ ath79_register_wmac(eeprom, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU", ++ mzk_w04nu_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w300nh.c linux-4.1.13/arch/mips/ath79/mach-mzk-w300nh.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-mzk-w300nh.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-mzk-w300nh.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,115 @@ ++/* ++ * Planex MZK-W300NH board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define MZK_W300NH_GPIO_LED_STATUS 1 ++#define MZK_W300NH_GPIO_LED_WPS 3 ++#define MZK_W300NH_GPIO_LED_WLAN 6 ++#define MZK_W300NH_GPIO_LED_AP_GREEN 15 ++#define MZK_W300NH_GPIO_LED_AP_AMBER 16 ++ ++#define MZK_W300NH_GPIO_BTN_APROUTER 5 ++#define MZK_W300NH_GPIO_BTN_WPS 12 ++#define MZK_W300NH_GPIO_BTN_RESET 21 ++ ++#define MZK_W300NH_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led mzk_w300nh_leds_gpio[] __initdata = { ++ { ++ .name = "planex:green:status", ++ .gpio = MZK_W300NH_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, { ++ .name = "planex:blue:wps", ++ .gpio = MZK_W300NH_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "planex:green:wlan", ++ .gpio = MZK_W300NH_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "planex:green:aprouter", ++ .gpio = MZK_W300NH_GPIO_LED_AP_GREEN, ++ }, { ++ .name = "planex:amber:aprouter", ++ .gpio = MZK_W300NH_GPIO_LED_AP_AMBER, ++ } ++}; ++ ++static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MZK_W300NH_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MZK_W300NH_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, { ++ .desc = "aprouter", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = MZK_W300NH_GPIO_BTN_APROUTER, ++ .active_low = 0, ++ } ++}; ++ ++#define MZK_W300NH_WAN_PHYMASK BIT(4) ++#define MZK_W300NH_MDIO_MASK (~MZK_W300NH_WAN_PHYMASK) ++ ++static void __init mzk_w300nh_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_mdio(0, MZK_W300NH_MDIO_MASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.has_ar8216 = 1; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio), ++ mzk_w300nh_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(mzk_w300nh_gpio_keys), ++ mzk_w300nh_gpio_keys); ++ ath79_register_wmac(eeprom, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH", ++ mzk_w300nh_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-nbg460n.c linux-4.1.13/arch/mips/ath79/mach-nbg460n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-nbg460n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-nbg460n.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,220 @@ ++/* ++ * Zyxel NBG 460N/550N/550NH board support ++ * ++ * Copyright (C) 2010 Michael Kurz ++ * ++ * based on mach-tl-wr1043nd.c ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++/* LEDs */ ++#define NBG460N_GPIO_LED_WPS 3 ++#define NBG460N_GPIO_LED_WAN 6 ++#define NBG460N_GPIO_LED_POWER 14 ++#define NBG460N_GPIO_LED_WLAN 15 ++ ++/* Buttons */ ++#define NBG460N_GPIO_BTN_WPS 12 ++#define NBG460N_GPIO_BTN_RESET 21 ++ ++#define NBG460N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define NBG460N_KEYS_DEBOUNCE_INTERVAL (3 * NBG460N_KEYS_POLL_INTERVAL) ++ ++/* RTC chip PCF8563 I2C interface */ ++#define NBG460N_GPIO_PCF8563_SDA 8 ++#define NBG460N_GPIO_PCF8563_SCK 7 ++ ++/* Switch configuration I2C interface */ ++#define NBG460N_GPIO_RTL8366_SDA 16 ++#define NBG460N_GPIO_RTL8366_SCK 18 ++ ++static struct mtd_partition nbg460n_partitions[] = { ++ { ++ .name = "Bootbase", ++ .offset = 0, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "U-Boot Config", ++ .offset = 0x010000, ++ .size = 0x030000, ++ }, { ++ .name = "U-Boot", ++ .offset = 0x040000, ++ .size = 0x030000, ++ }, { ++ .name = "linux", ++ .offset = 0x070000, ++ .size = 0x0e0000, ++ }, { ++ .name = "rootfs", ++ .offset = 0x150000, ++ .size = 0x2a0000, ++ }, { ++ .name = "CalibData", ++ .offset = 0x3f0000, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x070000, ++ .size = 0x380000, ++ } ++}; ++ ++static struct flash_platform_data nbg460n_flash_data = { ++ .parts = nbg460n_partitions, ++ .nr_parts = ARRAY_SIZE(nbg460n_partitions), ++}; ++ ++static struct gpio_led nbg460n_leds_gpio[] __initdata = { ++ { ++ .name = "nbg460n:green:power", ++ .gpio = NBG460N_GPIO_LED_POWER, ++ .active_low = 0, ++ .default_trigger = "default-on", ++ }, { ++ .name = "nbg460n:green:wps", ++ .gpio = NBG460N_GPIO_LED_WPS, ++ .active_low = 0, ++ }, { ++ .name = "nbg460n:green:wlan", ++ .gpio = NBG460N_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, { ++ /* Not really for controlling the LED, ++ when set low the LED blinks uncontrollable */ ++ .name = "nbg460n:green:wan", ++ .gpio = NBG460N_GPIO_LED_WAN, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG460N_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG460N_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct i2c_gpio_platform_data nbg460n_i2c_device_platdata = { ++ .sda_pin = NBG460N_GPIO_PCF8563_SDA, ++ .scl_pin = NBG460N_GPIO_PCF8563_SCK, ++ .udelay = 10, ++}; ++ ++static struct platform_device nbg460n_i2c_device = { ++ .name = "i2c-gpio", ++ .id = -1, ++ .num_resources = 0, ++ .resource = NULL, ++ .dev = { ++ .platform_data = &nbg460n_i2c_device_platdata, ++ }, ++}; ++ ++static struct i2c_board_info nbg460n_i2c_devs[] __initdata = { ++ { ++ I2C_BOARD_INFO("pcf8563", 0x51), ++ }, ++}; ++ ++static void nbg460n_i2c_init(void) ++{ ++ /* The gpio interface */ ++ platform_device_register(&nbg460n_i2c_device); ++ /* I2C devices */ ++ i2c_register_board_info(0, nbg460n_i2c_devs, ++ ARRAY_SIZE(nbg460n_i2c_devs)); ++} ++ ++ ++static struct rtl8366_platform_data nbg460n_rtl8366s_data = { ++ .gpio_sda = NBG460N_GPIO_RTL8366_SDA, ++ .gpio_sck = NBG460N_GPIO_RTL8366_SCK, ++}; ++ ++static struct platform_device nbg460n_rtl8366s_device = { ++ .name = RTL8366S_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &nbg460n_rtl8366s_data, ++ } ++}; ++ ++static void __init nbg460n_setup(void) ++{ ++ /* end of bootloader sector contains mac address */ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8); ++ /* last sector contains wlan calib data */ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* LAN Port */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ /* WAN Port */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ath79_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ /* register the switch phy */ ++ platform_device_register(&nbg460n_rtl8366s_device); ++ ++ /* register flash */ ++ ath79_register_m25p80(&nbg460n_flash_data); ++ ++ ath79_register_wmac(eeprom, mac); ++ ++ /* register RTC chip */ ++ nbg460n_i2c_init(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio), ++ nbg460n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(nbg460n_gpio_keys), ++ nbg460n_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", ++ nbg460n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-nbg6716.c linux-4.1.13/arch/mips/ath79/mach-nbg6716.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-nbg6716.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-nbg6716.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,381 @@ ++/* ++ * ZyXEL NBG6716/NBG6616 board support ++ * ++ * Based on the Qualcomm Atheros AP135/AP136 reference board support code ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012-2013 Gabor Juhos ++ * Copyright (c) 2013 Andre Valentin ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-nfc.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define NBG6716_GPIO_LED_INTERNET 18 ++#define NBG6716_GPIO_LED_POWER 15 ++#define NBG6716_GPIO_LED_USB1 4 ++#define NBG6716_GPIO_LED_USB2 13 ++#define NBG6716_GPIO_LED_WIFI2G 19 ++#define NBG6716_GPIO_LED_WIFI5G 17 ++#define NBG6716_GPIO_LED_WPS 21 ++ ++#define NBG6716_GPIO_BTN_RESET 23 ++#define NBG6716_GPIO_BTN_RFKILL 1 ++#define NBG6716_GPIO_BTN_USB1 0 ++#define NBG6716_GPIO_BTN_USB2 14 ++#define NBG6716_GPIO_BTN_WPS 22 ++ ++#define NBG6716_GPIO_USB_POWER 16 ++ ++#define NBG6716_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define NBG6716_KEYS_DEBOUNCE_INTERVAL (3 * NBG6716_KEYS_POLL_INTERVAL) ++ ++#define NBG6716_MAC0_OFFSET 0 ++#define NBG6716_MAC1_OFFSET 6 ++#define NBG6716_WMAC_CALDATA_OFFSET 0x1000 ++#define NBG6716_PCIE_CALDATA_OFFSET 0x5000 ++ ++/* NBG6616 has a different GPIO usage as it does not have USB Buttons */ ++#define NBG6616_GPIO_LED_USB0 14 ++#define NBG6616_GPIO_LED_USB1 21 ++#define NBG6616_GPIO_LED_WPS 0 ++ ++static struct gpio_led nbg6716_leds_gpio[] __initdata = { ++ { ++ .name = "nbg6716:white:internet", ++ .gpio = NBG6716_GPIO_LED_INTERNET, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6716:white:power", ++ .gpio = NBG6716_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6716:white:usb1", ++ .gpio = NBG6716_GPIO_LED_USB1, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6716:white:usb2", ++ .gpio = NBG6716_GPIO_LED_USB2, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6716:white:wifi2g", ++ .gpio = NBG6716_GPIO_LED_WIFI2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6716:white:wifi5g", ++ .gpio = NBG6716_GPIO_LED_WIFI5G, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6716:white:wps", ++ .gpio = NBG6716_GPIO_LED_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button nbg6716_gpio_keys[] __initdata = { ++ { ++ .desc = "RESET button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL button", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_RFKILL, ++ .active_low = 0, ++ }, ++ { ++ .desc = "USB1 eject button", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_USB1, ++ .active_low = 1, ++ }, ++ { ++ .desc = "USB2 eject button", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_USB2, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++ ++ ++static struct gpio_led nbg6616_leds_gpio[] __initdata = { ++ { ++ .name = "nbg6616:green:power", ++ .gpio = NBG6716_GPIO_LED_POWER, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6616:green:usb2", ++ .gpio = NBG6616_GPIO_LED_USB0, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6616:green:usb1", ++ .gpio = NBG6616_GPIO_LED_USB1, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6616:green:wifi2g", ++ .gpio = NBG6716_GPIO_LED_WIFI2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6616:green:wifi5g", ++ .gpio = NBG6716_GPIO_LED_WIFI5G, ++ .active_low = 1, ++ }, ++ { ++ .name = "nbg6616:green:wps", ++ .gpio = NBG6616_GPIO_LED_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button nbg6616_gpio_keys[] __initdata = { ++ { ++ .desc = "RESET button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_RFKILL, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = NBG6716_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++ ++static struct ar8327_pad_cfg nbg6716_ar8327_pad0_cfg; ++static struct ar8327_pad_cfg nbg6716_ar8327_pad6_cfg; ++static struct ar8327_led_cfg nbg6716_ar8327_led_cfg; ++ ++static struct ar8327_platform_data nbg6716_ar8327_data = { ++ .pad0_cfg = &nbg6716_ar8327_pad0_cfg, ++ .pad6_cfg = &nbg6716_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &nbg6716_ar8327_led_cfg ++}; ++ ++static struct mdio_board_info nbg6716_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &nbg6716_ar8327_data, ++ }, ++}; ++ ++static void nbg6716_get_mac(void* nvram_addr, const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(nvram_addr); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, 0x10000, ++ name, mac); ++ if (err) ++ pr_err("no MAC address found for %s\n", name); ++} ++ ++static void __init nbg6716_common_setup(u32 leds_num, struct gpio_led* leds, ++ u32 keys_num, ++ struct gpio_keys_button* keys, ++ void* art_addr, void* nvram) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(art_addr); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, leds_num, leds); ++ ath79_register_gpio_keys_polled(-1, NBG6716_KEYS_POLL_INTERVAL, ++ keys_num, keys); ++ ++ ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); ++ ath79_register_nfc(); ++ ++ gpio_request_one(NBG6716_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ++ ath79_register_usb(); ++ ++ nbg6716_get_mac(nvram, "ethaddr=", tmpmac); ++ ++ ath79_register_pci(); ++ ++ ath79_register_wmac(art + NBG6716_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, tmpmac, 2); ++ ath79_init_mac(ath79_eth1_data.mac_addr, tmpmac, 3); ++ ++ mdiobus_register_board_info(nbg6716_mdio0_info, ++ ARRAY_SIZE(nbg6716_mdio0_info)); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++} ++ ++static void __init nbg6716_010_setup(void) ++{ ++ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ ++ nbg6716_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; ++ nbg6716_ar8327_pad0_cfg.txclk_delay_en = true; ++ nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true; ++ nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; ++ nbg6716_ar8327_pad0_cfg.mac06_exchange_en = true; ++ ++ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ ++ nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; ++ nbg6716_ar8327_pad6_cfg.rxclk_delay_en = true; ++ nbg6716_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ nbg6716_ar8327_led_cfg.open_drain = 0; ++ nbg6716_ar8327_led_cfg.led_ctrl0 = 0xffb7ffb7; ++ nbg6716_ar8327_led_cfg.led_ctrl1 = 0xffb7ffb7; ++ nbg6716_ar8327_led_cfg.led_ctrl2 = 0xffb7ffb7; ++ nbg6716_ar8327_led_cfg.led_ctrl3 = 0x03ffff00; ++ ++ nbg6716_common_setup(ARRAY_SIZE(nbg6716_leds_gpio), nbg6716_leds_gpio, ++ ARRAY_SIZE(nbg6716_gpio_keys), nbg6716_gpio_keys, ++ (void*) 0x1f050000, (void*) 0x1f040000); ++} ++ ++static void __init nbg6616_010_setup(void) ++{ ++ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ ++ nbg6716_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; ++ nbg6716_ar8327_pad0_cfg.txclk_delay_en = true; ++ nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true; ++ nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; ++ ++ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ ++ nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; ++ nbg6716_ar8327_pad6_cfg.rxclk_delay_en = true; ++ nbg6716_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ nbg6716_ar8327_led_cfg.open_drain = 0; ++ nbg6716_ar8327_led_cfg.led_ctrl0 = 0xffb7ffb7; ++ nbg6716_ar8327_led_cfg.led_ctrl1 = 0xffb7ffb7; ++ nbg6716_ar8327_led_cfg.led_ctrl2 = 0xffb7ffb7; ++ nbg6716_ar8327_led_cfg.led_ctrl3 = 0x03ffff00; ++ ++ ++ nbg6716_common_setup(ARRAY_SIZE(nbg6616_leds_gpio), nbg6616_leds_gpio, ++ ARRAY_SIZE(nbg6616_gpio_keys), nbg6616_gpio_keys, ++ (void*) 0x1f040000, (void*) 0x1f030000); ++} ++ ++ ++MIPS_MACHINE(ATH79_MACH_NBG6716, "NBG6716", ++ "Zyxel NBG6716", ++ nbg6716_010_setup); ++ ++MIPS_MACHINE(ATH79_MACH_NBG6616, "NBG6616", ++ "Zyxel NBG6616", ++ nbg6616_010_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-om2p.c linux-4.1.13/arch/mips/ath79/mach-om2p.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-om2p.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-om2p.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,225 @@ ++/* ++ * OpenMesh OM2P support ++ * ++ * Copyright (C) 2011 Marek Lindner ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define OM2P_GPIO_LED_POWER 0 ++#define OM2P_GPIO_LED_GREEN 13 ++#define OM2P_GPIO_LED_RED 14 ++#define OM2P_GPIO_LED_YELLOW 15 ++#define OM2P_GPIO_LED_LAN 16 ++#define OM2P_GPIO_LED_WAN 17 ++#define OM2P_GPIO_BTN_RESET 1 ++ ++#define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL) ++ ++#define OM2P_WAN_PHYMASK BIT(4) ++ ++#define OM2P_LC_GPIO_LED_POWER 1 ++#define OM2P_LC_GPIO_LED_GREEN 15 ++#define OM2P_LC_GPIO_LED_RED 16 ++#define OM2P_LC_GPIO_LED_YELLOW 0 ++#define OM2P_LC_GPIO_LED_LAN 13 ++#define OM2P_LC_GPIO_LED_WAN 17 ++#define OM2P_LC_GPIO_BTN_RESET 12 ++ ++static struct flash_platform_data om2p_flash_data = { ++ .type = "s25sl12800", ++ .name = "ar7240-nor0", ++}; ++ ++static struct gpio_led om2p_leds_gpio[] __initdata = { ++ { ++ .name = "om2p:blue:power", ++ .gpio = OM2P_GPIO_LED_POWER, ++ .active_low = 1, ++ }, { ++ .name = "om2p:red:wifi", ++ .gpio = OM2P_GPIO_LED_RED, ++ .active_low = 1, ++ }, { ++ .name = "om2p:yellow:wifi", ++ .gpio = OM2P_GPIO_LED_YELLOW, ++ .active_low = 1, ++ }, { ++ .name = "om2p:green:wifi", ++ .gpio = OM2P_GPIO_LED_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "om2p:blue:lan", ++ .gpio = OM2P_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "om2p:blue:wan", ++ .gpio = OM2P_GPIO_LED_WAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button om2p_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = OM2P_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init om2p_setup(void) ++{ ++ u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); ++ u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); ++ u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_m25p80(&om2p_flash_data); ++ ++ ath79_register_mdio(0, ~OM2P_WAN_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ap91_pci_init(ee, NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), ++ om2p_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(om2p_gpio_keys), ++ om2p_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup); ++ ++ ++static struct flash_platform_data om2p_lc_flash_data = { ++ .type = "s25sl12800", ++}; ++ ++static void __init om2p_lc_setup(void) ++{ ++ u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); ++ u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); ++ u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000); ++ u32 t; ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; ++ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); ++ ++ ath79_register_m25p80(&om2p_lc_flash_data); ++ ++ om2p_leds_gpio[0].gpio = OM2P_LC_GPIO_LED_POWER; ++ om2p_leds_gpio[1].gpio = OM2P_LC_GPIO_LED_RED; ++ om2p_leds_gpio[2].gpio = OM2P_LC_GPIO_LED_YELLOW; ++ om2p_leds_gpio[3].gpio = OM2P_LC_GPIO_LED_GREEN; ++ om2p_leds_gpio[4].gpio = OM2P_LC_GPIO_LED_LAN; ++ om2p_leds_gpio[5].gpio = OM2P_LC_GPIO_LED_WAN; ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), ++ om2p_leds_gpio); ++ ++ om2p_gpio_keys[0].gpio = OM2P_LC_GPIO_BTN_RESET; ++ ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(om2p_gpio_keys), ++ om2p_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(art, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup); ++MIPS_MACHINE(ATH79_MACH_OM2Pv2, "OM2Pv2", "OpenMesh OM2Pv2", om2p_lc_setup); ++ ++static void __init om2p_hs_setup(void) ++{ ++ u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); ++ u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); ++ u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000); ++ ++ /* make lan / wan leds software controllable */ ++ ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); ++ ++ /* enable reset button */ ++ ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); ++ ++ om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN; ++ om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN; ++ ++ ath79_register_m25p80(&om2p_lc_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), ++ om2p_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(om2p_gpio_keys), ++ om2p_gpio_keys); ++ ++ ath79_register_wmac(art, NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup); ++MIPS_MACHINE(ATH79_MACH_OM2P_HSv2, "OM2P-HSv2", "OpenMesh OM2P HSv2", om2p_hs_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-om5p.c linux-4.1.13/arch/mips/ath79/mach-om5p.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-om5p.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-om5p.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,218 @@ ++/* ++ * OpenMesh OM5P support ++ * ++ * Copyright (C) 2013 Marek Lindner ++ * Copyright (C) 2014 Sven Eckelmann ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define OM5P_GPIO_LED_POWER 13 ++#define OM5P_GPIO_LED_GREEN 16 ++#define OM5P_GPIO_LED_RED 19 ++#define OM5P_GPIO_LED_YELLOW 17 ++#define OM5P_GPIO_LED_LAN 14 ++#define OM5P_GPIO_LED_WAN 15 ++#define OM5P_GPIO_BTN_RESET 4 ++#define OM5P_GPIO_I2C_SCL 20 ++#define OM5P_GPIO_I2C_SDA 21 ++ ++#define OM5P_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define OM5P_KEYS_DEBOUNCE_INTERVAL (3 * OM5P_KEYS_POLL_INTERVAL) ++ ++#define OM5P_WMAC_CALDATA_OFFSET 0x1000 ++#define OM5P_PCI_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led om5p_leds_gpio[] __initdata = { ++ { ++ .name = "om5p:blue:power", ++ .gpio = OM5P_GPIO_LED_POWER, ++ .active_low = 1, ++ }, { ++ .name = "om5p:red:wifi", ++ .gpio = OM5P_GPIO_LED_RED, ++ .active_low = 1, ++ }, { ++ .name = "om5p:yellow:wifi", ++ .gpio = OM5P_GPIO_LED_YELLOW, ++ .active_low = 1, ++ }, { ++ .name = "om5p:green:wifi", ++ .gpio = OM5P_GPIO_LED_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "om5p:blue:lan", ++ .gpio = OM5P_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "om5p:blue:wan", ++ .gpio = OM5P_GPIO_LED_WAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button om5p_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = OM5P_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = OM5P_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct flash_platform_data om5p_flash_data = { ++ .type = "mx25l12805d", ++}; ++ ++static void __init om5p_setup(void) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); ++ u8 mac[6]; ++ ++ /* make lan / wan leds software controllable */ ++ ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_m25p80(&om5p_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), ++ om5p_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, OM5P_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(om5p_gpio_keys), ++ om5p_gpio_keys); ++ ++ ath79_init_mac(mac, art, 2); ++ ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup); ++ ++static struct i2c_gpio_platform_data om5pan_i2c_device_platdata = { ++ .sda_pin = OM5P_GPIO_I2C_SDA, ++ .scl_pin = OM5P_GPIO_I2C_SCL, ++ .udelay = 10, ++ .sda_is_open_drain = 1, ++ .scl_is_open_drain = 1, ++}; ++ ++static struct platform_device om5pan_i2c_device = { ++ .name = "i2c-gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &om5pan_i2c_device_platdata, ++ }, ++}; ++ ++static struct i2c_board_info om5pan_i2c_devs[] __initdata = { ++ { ++ I2C_BOARD_INFO("tmp423", 0x4c), ++ }, ++}; ++ ++static struct at803x_platform_data om5p_an_at803x_data = { ++ .disable_smarteee = 1, ++ .enable_rgmii_rx_delay = 1, ++ .enable_rgmii_tx_delay = 1, ++}; ++ ++static struct mdio_board_info om5p_an_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 7, ++ .platform_data = &om5p_an_at803x_data, ++ }, ++}; ++ ++static void __init om5p_an_setup(void) ++{ ++ u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); ++ u8 mac[6]; ++ ++ /* temperature sensor */ ++ platform_device_register(&om5pan_i2c_device); ++ i2c_register_board_info(0, om5pan_i2c_devs, ++ ARRAY_SIZE(om5pan_i2c_devs)); ++ ++ /* make lan / wan leds software controllable */ ++ ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); ++ ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_m25p80(&om5p_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), ++ om5p_leds_gpio); ++ ++ ath79_init_mac(mac, art, 0x02); ++ ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ath79_setup_ar934x_eth_rx_delay(2, 2); ++ ath79_register_mdio(0, 0x0); ++ ath79_register_mdio(1, 0x0); ++ ++ mdiobus_register_board_info(om5p_an_mdio0_info, ++ ARRAY_SIZE(om5p_an_mdio0_info)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01); ++ ++ /* GMAC0 is connected to the PHY7 */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_data.phy_mask = BIT(7); ++ ath79_eth0_pll_data.pll_1000 = 0x02000000; ++ ath79_eth0_pll_data.pll_100 = 0x00000101; ++ ath79_eth0_pll_data.pll_10 = 0x00001313; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(1); ++ ++ ath79_init_mac(mac, art, 0x10); ++ ap91_pci_init(art + OM5P_PCI_CALDATA_OFFSET, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_OM5P_AN, "OM5P-AN", "OpenMesh OM5P AN", om5p_an_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-onion-omega.c linux-4.1.13/arch/mips/ath79/mach-onion-omega.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-onion-omega.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-onion-omega.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,84 @@ ++/* ++ * Onion Omega board support ++ * ++ * Copyright (C) 2015 Boken Lin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define OMEGA_GPIO_LED_SYSTEM 27 ++#define OMEGA_GPIO_BTN_RESET 11 ++ ++#define OMEGA_GPIO_USB_POWER 8 ++ ++#define OMEGA_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define OMEGA_KEYS_DEBOUNCE_INTERVAL (3 * OMEGA_KEYS_POLL_INTERVAL) ++ ++static const char *omega_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data omega_flash_data = { ++ .part_probes = omega_part_probes, ++}; ++ ++static struct gpio_led omega_leds_gpio[] __initdata = { ++ { ++ .name = "onion:amber:system", ++ .gpio = OMEGA_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button omega_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = OMEGA_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = OMEGA_GPIO_BTN_RESET, ++ .active_low = 0, ++ } ++}; ++ ++static void __init onion_omega_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&omega_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(omega_leds_gpio), ++ omega_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, OMEGA_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(omega_gpio_keys), ++ omega_gpio_keys); ++ ++ gpio_request_one(OMEGA_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ONION_OMEGA, "ONION-OMEGA", "Onion Omega", onion_omega_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-pb42.c linux-4.1.13/arch/mips/ath79/mach-pb42.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-pb42.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-pb42.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,83 @@ ++/* ++ * Atheros PB42 board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define PB42_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define PB42_KEYS_DEBOUNCE_INTERVAL (3 * PB42_KEYS_POLL_INTERVAL) ++ ++#define PB42_GPIO_BTN_SW4 8 ++#define PB42_GPIO_BTN_SW5 3 ++ ++static struct gpio_keys_button pb42_gpio_keys[] __initdata = { ++ { ++ .desc = "sw4", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = PB42_GPIO_BTN_SW4, ++ .active_low = 1, ++ }, { ++ .desc = "sw5", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = PB42_GPIO_BTN_SW5, ++ .active_low = 1, ++ } ++}; ++ ++static const char *pb42_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data pb42_flash_data = { ++ .part_probes = pb42_part_probes, ++}; ++ ++#define PB42_WAN_PHYMASK BIT(20) ++#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) ++#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) ++ ++static void __init pb42_init(void) ++{ ++ ath79_register_m25p80(&pb42_flash_data); ++ ++ ath79_register_mdio(0, ~PB42_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = PB42_WAN_PHYMASK; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.speed = SPEED_100; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(pb42_gpio_keys), ++ pb42_gpio_keys); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_PB42, "PB42", "Atheros PB42", pb42_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-pb44.c linux-4.1.13/arch/mips/ath79/mach-pb44.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-pb44.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-pb44.c 2015-12-04 19:57:04.334081334 +0100 +@@ -8,23 +8,48 @@ + * by the Free Software Foundation. + */ + ++#include + #include + #include + #include + #include + #include ++#include ++#include ++#include + +-#include "machtypes.h" ++#include ++#include ++ ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" + #include "dev-spi.h" + #include "dev-usb.h" ++#include "machtypes.h" + #include "pci.h" + + #define PB44_GPIO_I2C_SCL 0 + #define PB44_GPIO_I2C_SDA 1 + ++#define PB44_PCF8757_VSC7395_CS 0 ++#define PB44_PCF8757_STEREO_CS 1 ++#define PB44_PCF8757_SLIC_CS0 2 ++#define PB44_PCF8757_SLIC_TEST 3 ++#define PB44_PCF8757_SLIC_INT0 4 ++#define PB44_PCF8757_SLIC_INT1 5 ++#define PB44_PCF8757_SW_RESET 6 ++#define PB44_PCF8757_SW_JUMP 8 ++#define PB44_PCF8757_LED_JUMP1 9 ++#define PB44_PCF8757_LED_JUMP2 10 ++#define PB44_PCF8757_TP24 11 ++#define PB44_PCF8757_TP25 12 ++#define PB44_PCF8757_TP26 13 ++#define PB44_PCF8757_TP27 14 ++#define PB44_PCF8757_TP28 15 ++ + #define PB44_GPIO_EXP_BASE 16 ++#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) + #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) + #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) + #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) +@@ -87,20 +112,71 @@ + } + }; + ++static struct ath79_spi_controller_data pb44_spi0_data = { ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 0, ++}; ++ ++static struct ath79_spi_controller_data pb44_spi1_data = { ++ .cs_type = ATH79_SPI_CS_TYPE_GPIO, ++ .cs_line = PB44_GPIO_VSC7395_CS, ++}; ++ ++static void pb44_vsc7395_reset(void) ++{ ++ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); ++ udelay(10); ++ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); ++ mdelay(50); ++} ++ ++static struct vsc7385_platform_data pb44_vsc7395_data = { ++ .reset = pb44_vsc7395_reset, ++ .ucode_name = "vsc7395_ucode_pb44.bin", ++ .mac_cfg = { ++ .tx_ipg = 6, ++ .bit2 = 1, ++ .clk_sel = 0, ++ }, ++}; ++ ++static const char *pb44_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data pb44_flash_data = { ++ .part_probes = pb44_part_probes, ++}; ++ + static struct spi_board_info pb44_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p64", ++ .platform_data = &pb44_flash_data, ++ .controller_data = &pb44_spi0_data, + }, ++ { ++ .bus_num = 0, ++ .chip_select = 1, ++ .max_speed_hz = 25000000, ++ .modalias = "spi-vsc7385", ++ .platform_data = &pb44_vsc7395_data, ++ .controller_data = &pb44_spi1_data, ++ } + }; + + static struct ath79_spi_platform_data pb44_spi_data = { + .bus_num = 0, +- .num_chipselect = 1, ++ .num_chipselect = 2, + }; + ++#define PB44_WAN_PHYMASK BIT(0) ++#define PB44_LAN_PHYMASK 0 ++#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) ++ + static void __init pb44_init(void) + { + i2c_register_board_info(0, pb44_i2c_board_info, +@@ -116,6 +192,22 @@ + ARRAY_SIZE(pb44_spi_info)); + ath79_register_usb(); + ath79_register_pci(); ++ ++ ath79_register_mdio(0, ~PB44_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK; ++ ++ ath79_register_eth(0); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_pll_data.pll_1000 = 0x110000; ++ ++ ath79_register_eth(1); + } + + MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-pb92.c linux-4.1.13/arch/mips/ath79/mach-pb92.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-pb92.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-pb92.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,70 @@ ++/* ++ * Atheros PB92 board support ++ * ++ * Copyright (C) 2010 Felix Fietkau ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL) ++ ++#define PB92_GPIO_BTN_SW4 8 ++#define PB92_GPIO_BTN_SW5 3 ++ ++static struct gpio_keys_button pb92_gpio_keys[] __initdata = { ++ { ++ .desc = "sw4", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = PB92_GPIO_BTN_SW4, ++ .active_low = 1, ++ }, { ++ .desc = "sw5", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = PB92_GPIO_BTN_SW5, ++ .active_low = 1, ++ } ++}; ++ ++static void __init pb92_init(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(0, ~BIT(0)); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_register_eth(0); ++ ++ ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(pb92_gpio_keys), ++ pb92_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-qihoo-c301.c linux-4.1.13/arch/mips/ath79/mach-qihoo-c301.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-qihoo-c301.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-qihoo-c301.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,166 @@ ++/* ++ * Qihoo 360 C301 board support ++ * ++ * Copyright (C) 2013 Gabor Juhos ++ * Copyright (C) 2014 Weijie Gao ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define QIHOO_C301_GPIO_LED_STATUS_GREEN 0 ++#define QIHOO_C301_GPIO_LED_STATUS_RED 11 ++ ++#define QIHOO_C301_GPIO_LED_WAN 1 ++#define QIHOO_C301_GPIO_LED_LAN1 2 ++#define QIHOO_C301_GPIO_LED_LAN2 3 ++#define QIHOO_C301_GPIO_ETH_LEN_EN 18 ++ ++#define QIHOO_C301_GPIO_BTN_RESET 16 ++ ++#define QIHOO_C301_GPIO_USB_POWER 19 ++ ++#define QIHOO_C301_GPIO_SPI_CS1 12 ++ ++#define QIHOO_C301_GPIO_EXTERNAL_LNA0 14 ++#define QIHOO_C301_GPIO_EXTERNAL_LNA1 15 ++ ++#define QIHOO_C301_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define QIHOO_C301_KEYS_DEBOUNCE_INTERVAL \ ++ (3 * QIHOO_C301_KEYS_POLL_INTERVAL) ++ ++#define QIHOO_C301_WMAC_CALDATA_OFFSET 0x1000 ++ ++#define QIHOO_C301_NVRAM_ADDR 0x1f058010 ++#define QIHOO_C301_NVRAM_SIZE 0x7ff0 ++ ++static struct gpio_led qihoo_c301_leds_gpio[] __initdata = { ++ { ++ .name = "qihoo:green:status", ++ .gpio = QIHOO_C301_GPIO_LED_STATUS_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "qihoo:red:status", ++ .gpio = QIHOO_C301_GPIO_LED_STATUS_RED, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button qihoo_c301_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = QIHOO_C301_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = QIHOO_C301_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct flash_platform_data flash __initdata = {NULL, NULL, 0}; ++ ++static void qihoo_c301_get_mac(const char *name, char *mac) ++{ ++ u8 *nvram = (u8 *) KSEG1ADDR(QIHOO_C301_NVRAM_ADDR); ++ int err; ++ ++ err = ath79_nvram_parse_mac_addr(nvram, QIHOO_C301_NVRAM_SIZE, ++ name, mac); ++ if (err) ++ pr_err("no MAC address found for %s\n", name); ++} ++ ++static void __init qihoo_c301_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80_multi(&flash); ++ ++ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); ++ ++ ath79_gpio_output_select(QIHOO_C301_GPIO_LED_WAN, ++ AR934X_GPIO_OUT_LED_LINK4); ++ ath79_gpio_output_select(QIHOO_C301_GPIO_LED_LAN1, ++ AR934X_GPIO_OUT_LED_LINK1); ++ ath79_gpio_output_select(QIHOO_C301_GPIO_LED_LAN2, ++ AR934X_GPIO_OUT_LED_LINK2); ++ ++ ath79_gpio_output_select(QIHOO_C301_GPIO_SPI_CS1, ++ AR934X_GPIO_OUT_SPI_CS1); ++ ++ gpio_request_one(QIHOO_C301_GPIO_ETH_LEN_EN, ++ GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED, ++ "Ethernet LED enable"); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(qihoo_c301_leds_gpio), ++ qihoo_c301_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, QIHOO_C301_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(qihoo_c301_gpio_keys), ++ qihoo_c301_gpio_keys); ++ ++ ath79_wmac_set_ext_lna_gpio(0, QIHOO_C301_GPIO_EXTERNAL_LNA0); ++ ath79_wmac_set_ext_lna_gpio(1, QIHOO_C301_GPIO_EXTERNAL_LNA1); ++ ++ qihoo_c301_get_mac("wlan24mac=", tmpmac); ++ ath79_register_wmac(art + QIHOO_C301_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_register_pci(); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE | ++ AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* LAN */ ++ qihoo_c301_get_mac("lanmac=", ath79_eth1_data.mac_addr); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ qihoo_c301_get_mac("wanmac=", ath79_eth0_data.mac_addr); ++ ++ /* GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(0); ++ ++ gpio_request_one(QIHOO_C301_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_QIHOO_C301, "QIHOO-C301", "Qihoo 360 C301", ++ qihoo_c301_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-r6100.c linux-4.1.13/arch/mips/ath79/mach-r6100.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-r6100.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-r6100.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,146 @@ ++/* ++ * NETGEAR R6100 board support ++ * ++ * Copyright (C) 2014 Gabor Juhos ++ * Copyright (C) 2014 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-nfc.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define R6100_GPIO_LED_WLAN 0 ++#define R6100_GPIO_LED_USB 11 ++#define R6100_GPIO_LED_WAN_GREEN 13 ++#define R6100_GPIO_LED_POWER_AMBER 14 ++#define R6100_GPIO_LED_WAN_AMBER 15 ++#define R6100_GPIO_LED_POWER_GREEN 17 ++ ++#define R6100_GPIO_BTN_WIRELESS 1 ++#define R6100_GPIO_BTN_WPS 3 ++#define R6100_GPIO_BTN_RESET 12 ++ ++#define R6100_GPIO_USB_POWER 16 ++ ++#define R6100_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define R6100_KEYS_DEBOUNCE_INTERVAL (3 * R6100_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led r6100_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = R6100_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:power", ++ .gpio = R6100_GPIO_LED_POWER_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:wan", ++ .gpio = R6100_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:wan", ++ .gpio = R6100_GPIO_LED_WAN_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:blue:usb", ++ .gpio = R6100_GPIO_LED_USB, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:blue:wlan", ++ .gpio = R6100_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button r6100_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = R6100_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = R6100_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = R6100_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = R6100_GPIO_BTN_WPS, ++ .active_low = 0, ++ }, ++ { ++ .desc = "RFKILL switch", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = R6100_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = R6100_GPIO_BTN_WIRELESS, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init r6100_setup(void) ++{ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(r6100_leds_gpio), ++ r6100_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, R6100_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(r6100_gpio_keys), ++ r6100_gpio_keys); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ gpio_request_one(R6100_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ++ ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); ++ ath79_register_nfc(); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac_simple(); ++ ++ ap91_pci_init_simple(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_R6100, "R6100", "NETGEAR R6100", ++ r6100_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb2011.c linux-4.1.13/arch/mips/ath79/mach-rb2011.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rb2011.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rb2011.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,338 @@ ++/* ++ * MikroTik RouterBOARD 2011 support ++ * ++ * Copyright (C) 2012 Stijn Tintel ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) "rb2011: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "routerboot.h" ++ ++#define RB2011_GPIO_NAND_NCE 14 ++#define RB2011_GPIO_SFP_LOS 21 ++ ++#define RB_ROUTERBOOT_OFFSET 0x0000 ++#define RB_ROUTERBOOT_MIN_SIZE 0xb000 ++#define RB_HARD_CFG_SIZE 0x1000 ++#define RB_BIOS_OFFSET 0xd000 ++#define RB_BIOS_SIZE 0x1000 ++#define RB_SOFT_CFG_OFFSET 0xf000 ++#define RB_SOFT_CFG_SIZE 0x1000 ++ ++#define RB_ART_SIZE 0x10000 ++ ++#define RB2011_FLAG_SFP BIT(0) ++#define RB2011_FLAG_USB BIT(1) ++#define RB2011_FLAG_WLAN BIT(2) ++ ++static struct mtd_partition rb2011_spi_partitions[] = { ++ { ++ .name = "routerboot", ++ .offset = RB_ROUTERBOOT_OFFSET, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "hard_config", ++ .size = RB_HARD_CFG_SIZE, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "bios", ++ .offset = RB_BIOS_OFFSET, ++ .size = RB_BIOS_SIZE, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "soft_config", ++ .size = RB_SOFT_CFG_SIZE, ++ } ++}; ++ ++static void __init rb2011_init_partitions(const struct rb_info *info) ++{ ++ rb2011_spi_partitions[0].size = info->hard_cfg_offs; ++ rb2011_spi_partitions[1].offset = info->hard_cfg_offs; ++ rb2011_spi_partitions[3].offset = info->soft_cfg_offs; ++} ++ ++static struct mtd_partition rb2011_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, ++ { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, ++ { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static struct flash_platform_data rb2011_spi_flash_data = { ++ .parts = rb2011_spi_partitions, ++ .nr_parts = ARRAY_SIZE(rb2011_spi_partitions), ++}; ++ ++static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL3, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, ++}; ++ ++static struct ar8327_pad_cfg rb2011_ar8327_pad6_cfg; ++static struct ar8327_sgmii_cfg rb2011_ar8327_sgmii_cfg; ++ ++static struct ar8327_led_cfg rb2011_ar8327_led_cfg = { ++ .led_ctrl0 = 0xc731c731, ++ .led_ctrl1 = 0x00000000, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x0030c300, ++ .open_drain = false, ++}; ++ ++static const struct ar8327_led_info rb2011_ar8327_leds[] __initconst = { ++ AR8327_LED_INFO(PHY0_0, HW, "rb:green:eth1"), ++ AR8327_LED_INFO(PHY1_0, HW, "rb:green:eth2"), ++ AR8327_LED_INFO(PHY2_0, HW, "rb:green:eth3"), ++ AR8327_LED_INFO(PHY3_0, HW, "rb:green:eth4"), ++ AR8327_LED_INFO(PHY4_0, HW, "rb:green:eth5"), ++ AR8327_LED_INFO(PHY0_1, SW, "rb:green:eth6"), ++ AR8327_LED_INFO(PHY1_1, SW, "rb:green:eth7"), ++ AR8327_LED_INFO(PHY2_1, SW, "rb:green:eth8"), ++ AR8327_LED_INFO(PHY3_1, SW, "rb:green:eth9"), ++ AR8327_LED_INFO(PHY4_1, SW, "rb:green:eth10"), ++ AR8327_LED_INFO(PHY4_2, SW, "rb:green:usr"), ++}; ++ ++static struct ar8327_platform_data rb2011_ar8327_data = { ++ .pad0_cfg = &rb2011_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &rb2011_ar8327_led_cfg, ++ .num_leds = ARRAY_SIZE(rb2011_ar8327_leds), ++ .leds = rb2011_ar8327_leds, ++}; ++ ++static struct mdio_board_info rb2011_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &rb2011_ar8327_data, ++ }, ++}; ++ ++static void __init rb2011_wlan_init(void) ++{ ++ char *art_buf; ++ u8 wlan_mac[ETH_ALEN]; ++ ++ art_buf = rb_get_wlan_data(); ++ if (art_buf == NULL) ++ return; ++ ++ ath79_init_mac(wlan_mac, ath79_mac_base, 11); ++ ath79_register_wmac(art_buf + 0x1000, wlan_mac); ++ ++ kfree(art_buf); ++} ++ ++static void rb2011_nand_select_chip(int chip_no) ++{ ++ switch (chip_no) { ++ case 0: ++ gpio_set_value(RB2011_GPIO_NAND_NCE, 0); ++ break; ++ default: ++ gpio_set_value(RB2011_GPIO_NAND_NCE, 1); ++ break; ++ } ++ ndelay(500); ++} ++ ++static struct nand_ecclayout rb2011_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static int rb2011_nand_scan_fixup(struct mtd_info *mtd) ++{ ++ struct nand_chip *chip = mtd->priv; ++ ++ if (mtd->writesize == 512) { ++ /* ++ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot ++ * will not be able to find the kernel that we load. ++ */ ++ chip->ecc.layout = &rb2011_nand_ecclayout; ++ } ++ ++ return 0; ++} ++ ++static void __init rb2011_nand_init(void) ++{ ++ gpio_request_one(RB2011_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); ++ ++ ath79_nfc_set_scan_fixup(rb2011_nand_scan_fixup); ++ ath79_nfc_set_parts(rb2011_nand_partitions, ++ ARRAY_SIZE(rb2011_nand_partitions)); ++ ath79_nfc_set_select_chip(rb2011_nand_select_chip); ++ ath79_nfc_set_swap_dma(true); ++ ath79_register_nfc(); ++} ++ ++static int rb2011_get_port_link(unsigned port) ++{ ++ if (port != 6) ++ return -EINVAL; ++ ++ /* The Loss of signal line is active low */ ++ return !gpio_get_value(RB2011_GPIO_SFP_LOS); ++} ++ ++static void __init rb2011_sfp_init(void) ++{ ++ gpio_request_one(RB2011_GPIO_SFP_LOS, GPIOF_IN, "SFP LOS"); ++ ++ rb2011_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; ++ ++ rb2011_ar8327_data.pad6_cfg = &rb2011_ar8327_pad6_cfg; ++ ++ rb2011_ar8327_sgmii_cfg.sgmii_ctrl = 0xc70167d0; ++ rb2011_ar8327_sgmii_cfg.serdes_aen = true; ++ ++ rb2011_ar8327_data.sgmii_cfg = &rb2011_ar8327_sgmii_cfg; ++ ++ rb2011_ar8327_data.port6_cfg.force_link = 1; ++ rb2011_ar8327_data.port6_cfg.speed = AR8327_PORT_SPEED_1000; ++ rb2011_ar8327_data.port6_cfg.duplex = 1; ++ ++ rb2011_ar8327_data.get_port_link = rb2011_get_port_link; ++} ++ ++static int __init rb2011_setup(u32 flags) ++{ ++ const struct rb_info *info; ++ char buf[64]; ++ ++ info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); ++ if (!info) ++ return -ENODEV; ++ ++ scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", ++ (info->board_name) ? info->board_name : ""); ++ mips_set_machine_name(buf); ++ ++ rb2011_init_partitions(info); ++ ++ ath79_register_m25p80(&rb2011_spi_flash_data); ++ rb2011_nand_init(); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(rb2011_mdio0_info, ++ ARRAY_SIZE(rb2011_mdio0_info)); ++ ++ /* GMAC0 is connected to an ar8327 switch */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++ ++ if (flags & RB2011_FLAG_SFP) ++ rb2011_sfp_init(); ++ ++ if (flags & RB2011_FLAG_WLAN) ++ rb2011_wlan_init(); ++ ++ if (flags & RB2011_FLAG_USB) ++ ath79_register_usb(); ++ ++ return 0; ++} ++ ++static void __init rb2011l_setup(void) ++{ ++ rb2011_setup(0); ++} ++ ++MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011L, "2011L", rb2011l_setup); ++ ++static void __init rb2011us_setup(void) ++{ ++ rb2011_setup(RB2011_FLAG_SFP | RB2011_FLAG_USB); ++} ++ ++MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011US, "2011US", rb2011us_setup); ++ ++static void __init rb2011r5_setup(void) ++{ ++ rb2011_setup(RB2011_FLAG_SFP | RB2011_FLAG_USB | RB2011_FLAG_WLAN); ++} ++ ++MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011R5, "2011r5", rb2011r5_setup); ++ ++static void __init rb2011g_setup(void) ++{ ++ rb2011_setup(RB2011_FLAG_SFP | ++ RB2011_FLAG_USB | ++ RB2011_FLAG_WLAN); ++} ++ ++MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011G, "2011G", rb2011g_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb4xx.c linux-4.1.13/arch/mips/ath79/mach-rb4xx.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rb4xx.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rb4xx.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,465 @@ ++/* ++ * MikroTik RouterBOARD 4xx series support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define RB4XX_GPIO_USER_LED 4 ++#define RB4XX_GPIO_RESET_SWITCH 7 ++ ++#define RB4XX_GPIO_CPLD_BASE 32 ++#define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) ++#define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) ++#define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) ++#define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) ++#define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) ++ ++#define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led rb4xx_leds_gpio[] __initdata = { ++ { ++ .name = "rb4xx:yellow:user", ++ .gpio = RB4XX_GPIO_USER_LED, ++ .active_low = 0, ++ }, { ++ .name = "rb4xx:green:led1", ++ .gpio = RB4XX_GPIO_CPLD_LED1, ++ .active_low = 1, ++ }, { ++ .name = "rb4xx:green:led2", ++ .gpio = RB4XX_GPIO_CPLD_LED2, ++ .active_low = 1, ++ }, { ++ .name = "rb4xx:green:led3", ++ .gpio = RB4XX_GPIO_CPLD_LED3, ++ .active_low = 1, ++ }, { ++ .name = "rb4xx:green:led4", ++ .gpio = RB4XX_GPIO_CPLD_LED4, ++ .active_low = 1, ++ }, { ++ .name = "rb4xx:green:led5", ++ .gpio = RB4XX_GPIO_CPLD_LED5, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { ++ { ++ .desc = "reset_switch", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = RB4XX_GPIO_RESET_SWITCH, ++ .active_low = 1, ++ } ++}; ++ ++static struct platform_device rb4xx_nand_device = { ++ .name = "rb4xx-nand", ++ .id = -1, ++}; ++ ++static struct ath79_pci_irq rb4xx_pci_irqs[] __initdata = { ++ { ++ .slot = 17, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(2), ++ }, { ++ .slot = 18, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(0), ++ }, { ++ .slot = 18, ++ .pin = 2, ++ .irq = ATH79_PCI_IRQ(1), ++ }, { ++ .slot = 19, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(1), ++ }, { ++ .slot = 19, ++ .pin = 2, ++ .irq = ATH79_PCI_IRQ(2), ++ }, { ++ .slot = 20, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(2), ++ }, { ++ .slot = 20, ++ .pin = 2, ++ .irq = ATH79_PCI_IRQ(0), ++ }, { ++ .slot = 21, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(0), ++ }, { ++ .slot = 22, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(1), ++ }, { ++ .slot = 22, ++ .pin = 2, ++ .irq = ATH79_PCI_IRQ(2), ++ }, { ++ .slot = 23, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(2), ++ }, { ++ .slot = 23, ++ .pin = 2, ++ .irq = ATH79_PCI_IRQ(0), ++ } ++}; ++ ++static struct mtd_partition rb4xx_partitions[] = { ++ { ++ .name = "routerboot", ++ .offset = 0, ++ .size = 0x0b000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "hard_config", ++ .offset = 0x0b000, ++ .size = 0x01000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "bios", ++ .offset = 0x0d000, ++ .size = 0x02000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "soft_config", ++ .offset = 0x0f000, ++ .size = 0x01000, ++ } ++}; ++ ++static struct flash_platform_data rb4xx_flash_data = { ++ .type = "pm25lv512", ++ .parts = rb4xx_partitions, ++ .nr_parts = ARRAY_SIZE(rb4xx_partitions), ++}; ++ ++static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { ++ .gpio_base = RB4XX_GPIO_CPLD_BASE, ++}; ++ ++static struct mmc_spi_platform_data rb4xx_mmc_data = { ++ .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, ++}; ++ ++static struct spi_board_info rb4xx_spi_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .max_speed_hz = 25000000, ++ .modalias = "m25p80", ++ .platform_data = &rb4xx_flash_data, ++ }, { ++ .bus_num = 0, ++ .chip_select = 1, ++ .max_speed_hz = 25000000, ++ .modalias = "spi-rb4xx-cpld", ++ .platform_data = &rb4xx_cpld_data, ++ } ++}; ++ ++static struct spi_board_info rb4xx_microsd_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 2, ++ .max_speed_hz = 25000000, ++ .modalias = "mmc_spi", ++ .platform_data = &rb4xx_mmc_data, ++ } ++}; ++ ++ ++static struct resource rb4xx_spi_resources[] = { ++ { ++ .start = AR71XX_SPI_BASE, ++ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device rb4xx_spi_device = { ++ .name = "rb4xx-spi", ++ .id = -1, ++ .resource = rb4xx_spi_resources, ++ .num_resources = ARRAY_SIZE(rb4xx_spi_resources), ++}; ++ ++static void __init rb4xx_generic_setup(void) ++{ ++ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | ++ AR71XX_GPIO_FUNC_SPI_CS2_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), ++ rb4xx_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(rb4xx_gpio_keys), ++ rb4xx_gpio_keys); ++ ++ spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); ++ platform_device_register(&rb4xx_spi_device); ++ platform_device_register(&rb4xx_nand_device); ++} ++ ++static void __init rb411_setup(void) ++{ ++ rb4xx_generic_setup(); ++ spi_register_board_info(rb4xx_microsd_info, ++ ARRAY_SIZE(rb4xx_microsd_info)); ++ ++ ath79_register_mdio(0, 0xfffffffc); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = 0x00000003; ++ ++ ath79_register_eth(0); ++ ++ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", ++ rb411_setup); ++ ++static void __init rb411u_setup(void) ++{ ++ rb411_setup(); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", ++ rb411u_setup); ++ ++#define RB433_LAN_PHYMASK BIT(0) ++#define RB433_WAN_PHYMASK BIT(4) ++#define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) ++ ++static void __init rb433_setup(void) ++{ ++ rb4xx_generic_setup(); ++ spi_register_board_info(rb4xx_microsd_info, ++ ARRAY_SIZE(rb4xx_microsd_info)); ++ ++ ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", ++ rb433_setup); ++ ++static void __init rb433u_setup(void) ++{ ++ rb433_setup(); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", ++ rb433u_setup); ++ ++static void __init rb435g_setup(void) ++{ ++ rb4xx_generic_setup(); ++ ++ spi_register_board_info(rb4xx_microsd_info, ++ ARRAY_SIZE(rb4xx_microsd_info)); ++ ++ ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); ++ ath79_register_pci(); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_435G, "435G", "MikroTik RouterBOARD 435G", ++ rb435g_setup); ++ ++#define RB450_LAN_PHYMASK BIT(0) ++#define RB450_WAN_PHYMASK BIT(4) ++#define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) ++ ++static void __init rb450_generic_setup(int gige) ++{ ++ rb4xx_generic_setup(); ++ ath79_register_mdio(0, ~RB450_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth0_data.phy_if_mode = (gige) ? ++ PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = RB450_LAN_PHYMASK; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth1_data.phy_if_mode = (gige) ? ++ PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = RB450_WAN_PHYMASK; ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++} ++ ++static void __init rb450_setup(void) ++{ ++ rb450_generic_setup(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_450, "450", "MikroTik RouterBOARD 450", ++ rb450_setup); ++ ++static void __init rb450g_setup(void) ++{ ++ rb450_generic_setup(1); ++ spi_register_board_info(rb4xx_microsd_info, ++ ARRAY_SIZE(rb4xx_microsd_info)); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", ++ rb450g_setup); ++ ++static void __init rb493_setup(void) ++{ ++ rb4xx_generic_setup(); ++ ++ ath79_register_mdio(0, 0x3fffff00); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x00000001; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", ++ rb493_setup); ++ ++#define RB493G_GPIO_MDIO_MDC 7 ++#define RB493G_GPIO_MDIO_DATA 8 ++ ++#define RB493G_MDIO_PHYMASK BIT(0) ++ ++static struct mdio_gpio_platform_data rb493g_mdio_data = { ++ .mdc = RB493G_GPIO_MDIO_MDC, ++ .mdio = RB493G_GPIO_MDIO_DATA, ++ ++ .phy_mask = ~RB493G_MDIO_PHYMASK, ++}; ++ ++static struct platform_device rb493g_mdio_device = { ++ .name = "mdio-gpio", ++ .id = -1, ++ .dev = { ++ .platform_data = &rb493g_mdio_data, ++ }, ++}; ++ ++static void __init rb493g_setup(void) ++{ ++ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | ++ AR71XX_GPIO_FUNC_SPI_CS2_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), ++ rb4xx_leds_gpio); ++ ++ spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); ++ spi_register_board_info(rb4xx_microsd_info, ++ ARRAY_SIZE(rb4xx_microsd_info)); ++ ++ platform_device_register(&rb4xx_spi_device); ++ platform_device_register(&rb4xx_nand_device); ++ ++ ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = RB493G_MDIO_PHYMASK; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev; ++ ath79_eth1_data.phy_mask = RB493G_MDIO_PHYMASK; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ platform_device_register(&rb493g_mdio_device); ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++ ++ ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G", ++ rb493g_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb750.c linux-4.1.13/arch/mips/ath79/mach-rb750.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rb750.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rb750.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,346 @@ ++/* ++ * MikroTik RouterBOARD 750/750GL support ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-usb.h" ++#include "dev-eth.h" ++#include "machtypes.h" ++#include "routerboot.h" ++ ++static struct rb750_led_data rb750_leds[] = { ++ { ++ .name = "rb750:green:act", ++ .mask = RB750_LED_ACT, ++ .active_low = 1, ++ }, { ++ .name = "rb750:green:port1", ++ .mask = RB750_LED_PORT5, ++ .active_low = 1, ++ }, { ++ .name = "rb750:green:port2", ++ .mask = RB750_LED_PORT4, ++ .active_low = 1, ++ }, { ++ .name = "rb750:green:port3", ++ .mask = RB750_LED_PORT3, ++ .active_low = 1, ++ }, { ++ .name = "rb750:green:port4", ++ .mask = RB750_LED_PORT2, ++ .active_low = 1, ++ }, { ++ .name = "rb750:green:port5", ++ .mask = RB750_LED_PORT1, ++ .active_low = 1, ++ } ++}; ++ ++static struct rb750_led_data rb750gr3_leds[] = { ++ { ++ .name = "rb750:green:act", ++ .mask = RB7XX_LED_ACT, ++ .active_low = 1, ++ }, ++}; ++ ++static struct rb750_led_platform_data rb750_leds_data; ++static struct platform_device rb750_leds_device = { ++ .name = "leds-rb750", ++ .dev = { ++ .platform_data = &rb750_leds_data, ++ } ++}; ++ ++static struct rb7xx_nand_platform_data rb750_nand_data; ++static struct platform_device rb750_nand_device = { ++ .name = "rb750-nand", ++ .id = -1, ++ .dev = { ++ .platform_data = &rb750_nand_data, ++ } ++}; ++ ++static void rb750_latch_change(u32 mask_clr, u32 mask_set) ++{ ++ static DEFINE_SPINLOCK(lock); ++ static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; ++ static u32 latch_oe; ++ static u32 latch_clr; ++ unsigned long flags; ++ u32 t; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ if ((mask_clr & BIT(31)) != 0 && ++ (latch_set & RB750_LVC573_LE) == 0) { ++ goto unlock; ++ } ++ ++ latch_set = (latch_set | mask_set) & ~mask_clr; ++ latch_clr = (latch_clr | mask_clr) & ~mask_set; ++ ++ if (latch_oe == 0) ++ latch_oe = __raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_OE); ++ ++ if (likely(latch_set & RB750_LVC573_LE)) { ++ void __iomem *base = ath79_gpio_base; ++ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ t |= mask_clr | latch_oe | mask_set; ++ ++ __raw_writel(t, base + AR71XX_GPIO_REG_OE); ++ __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR); ++ __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET); ++ } else if (mask_clr & RB750_LVC573_LE) { ++ void __iomem *base = ath79_gpio_base; ++ ++ latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_CLEAR); ++ } ++ ++unlock: ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++static void rb750_nand_enable_pins(void) ++{ ++ rb750_latch_change(RB750_LVC573_LE, 0); ++ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, ++ AR724X_GPIO_FUNC_SPI_EN); ++} ++ ++static void rb750_nand_disable_pins(void) ++{ ++ ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN, ++ AR724X_GPIO_FUNC_JTAG_DISABLE); ++ rb750_latch_change(0, RB750_LVC573_LE); ++} ++ ++static void __init rb750_setup(void) ++{ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ rb750_leds_data.num_leds = ARRAY_SIZE(rb750_leds); ++ rb750_leds_data.leds = rb750_leds; ++ rb750_leds_data.latch_change = rb750_latch_change; ++ platform_device_register(&rb750_leds_device); ++ ++ rb750_nand_data.nce_line = RB750_NAND_NCE; ++ rb750_nand_data.enable_pins = rb750_nand_enable_pins; ++ rb750_nand_data.disable_pins = rb750_nand_disable_pins; ++ rb750_nand_data.latch_change = rb750_latch_change; ++ platform_device_register(&rb750_nand_device); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_750, "750i", "MikroTik RouterBOARD 750", ++ rb750_setup); ++ ++static struct ar8327_pad_cfg rb750gr3_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_platform_data rb750gr3_ar8327_data = { ++ .pad0_cfg = &rb750gr3_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ } ++}; ++ ++static struct mdio_board_info rb750g3_mdio_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &rb750gr3_ar8327_data, ++ }, ++}; ++ ++static void rb750gr3_nand_enable_pins(void) ++{ ++ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, ++ AR724X_GPIO_FUNC_SPI_EN | ++ AR724X_GPIO_FUNC_SPI_CS_EN2); ++} ++ ++static void rb750gr3_nand_disable_pins(void) ++{ ++ ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN | ++ AR724X_GPIO_FUNC_SPI_CS_EN2, ++ AR724X_GPIO_FUNC_JTAG_DISABLE); ++} ++ ++static void rb750gr3_latch_change(u32 mask_clr, u32 mask_set) ++{ ++ static DEFINE_SPINLOCK(lock); ++ static u32 latch_set = RB7XX_LED_ACT; ++ static u32 latch_clr; ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ u32 t; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ latch_set = (latch_set | mask_set) & ~mask_clr; ++ latch_clr = (latch_clr | mask_clr) & ~mask_set; ++ ++ mask_set = latch_set & (RB7XX_USB_POWERON | RB7XX_MONITOR); ++ mask_clr = latch_clr & (RB7XX_USB_POWERON | RB7XX_MONITOR); ++ ++ if ((latch_set ^ RB7XX_LED_ACT) & RB7XX_LED_ACT) { ++ /* enable output mode */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ t |= RB7XX_LED_ACT; ++ __raw_writel(t, base + AR71XX_GPIO_REG_OE); ++ ++ mask_clr |= RB7XX_LED_ACT; ++ } else { ++ /* disable output mode */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ t &= ~RB7XX_LED_ACT; ++ __raw_writel(t, base + AR71XX_GPIO_REG_OE); ++ } ++ ++ __raw_writel(mask_set, base + AR71XX_GPIO_REG_SET); ++ __raw_writel(mask_clr, base + AR71XX_GPIO_REG_CLEAR); ++ ++ spin_unlock_irqrestore(&lock, flags); ++} ++ ++static void __init rb750gr3_setup(void) ++{ ++ ath79_register_mdio(0, 0x0); ++ mdiobus_register_board_info(rb750g3_mdio_info, ++ ARRAY_SIZE(rb750g3_mdio_info)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_pll_data.pll_1000 = 0x62000000; ++ ++ ath79_register_eth(0); ++ ++ rb750_leds_data.num_leds = ARRAY_SIZE(rb750gr3_leds); ++ rb750_leds_data.leds = rb750gr3_leds; ++ rb750_leds_data.latch_change = rb750gr3_latch_change; ++ platform_device_register(&rb750_leds_device); ++ ++ rb750_nand_data.nce_line = RB7XX_NAND_NCE; ++ rb750_nand_data.enable_pins = rb750gr3_nand_enable_pins; ++ rb750_nand_data.disable_pins = rb750gr3_nand_disable_pins; ++ rb750_nand_data.latch_change = rb750gr3_latch_change; ++ platform_device_register(&rb750_nand_device); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_750G_R3, "750Gr3", "MikroTik RouterBOARD 750GL", ++ rb750gr3_setup); ++ ++#define RB751_HARDCONFIG 0x1f00b000 ++#define RB751_HARDCONFIG_SIZE 0x1000 ++ ++static void __init rb751_wlan_setup(void) ++{ ++ u8 *hardconfig = (u8 *) KSEG1ADDR(RB751_HARDCONFIG); ++ struct ath9k_platform_data *wmac_data; ++ u16 tag_len; ++ u8 *tag; ++ u16 mac_len; ++ u8 *mac; ++ int err; ++ ++ wmac_data = ap9x_pci_get_wmac_data(0); ++ if (!wmac_data) { ++ pr_err("rb75x: unable to get address of wlan data\n"); ++ return; ++ } ++ ++ ap9x_pci_setup_wmac_led_pin(0, 9); ++ ++ err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE, ++ RB_ID_WLAN_DATA, &tag, &tag_len); ++ if (err) { ++ pr_err("rb75x: no calibration data found\n"); ++ return; ++ } ++ ++ err = rle_decode(tag, tag_len, (unsigned char *) wmac_data->eeprom_data, ++ sizeof(wmac_data->eeprom_data), NULL, NULL); ++ if (err) { ++ pr_err("rb75x: unable to decode wlan eeprom data\n"); ++ return; ++ } ++ ++ err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE, ++ RB_ID_MAC_ADDRESS_PACK, &mac, &mac_len); ++ if (err) { ++ pr_err("rb75x: no mac address found\n"); ++ return; ++ } ++ ++ ap91_pci_init(NULL, mac); ++} ++ ++static void __init rb751_setup(void) ++{ ++ rb750_setup(); ++ ath79_register_usb(); ++ rb751_wlan_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_751, "751", "MikroTik RouterBOARD 751", ++ rb751_setup); ++ ++static void __init rb751g_setup(void) ++{ ++ rb750gr3_setup(); ++ ath79_register_usb(); ++ rb751_wlan_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_751G, "751g", "MikroTik RouterBOARD 751G", ++ rb751g_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb91x.c linux-4.1.13/arch/mips/ath79/mach-rb91x.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rb91x.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rb91x.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,349 @@ ++/* ++ * MikroTik RouterBOARD 91X support ++ * ++ * Copyright (C) 2013 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) "rb91x: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-nfc.h" ++#include "dev-usb.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++#include "routerboot.h" ++ ++#define RB_ROUTERBOOT_OFFSET 0x0000 ++#define RB_ROUTERBOOT_MIN_SIZE 0xb000 ++#define RB_HARD_CFG_SIZE 0x1000 ++#define RB_BIOS_OFFSET 0xd000 ++#define RB_BIOS_SIZE 0x1000 ++#define RB_SOFT_CFG_OFFSET 0xf000 ++#define RB_SOFT_CFG_SIZE 0x1000 ++ ++#define RB91X_FLAG_USB BIT(0) ++#define RB91X_FLAG_PCIE BIT(1) ++ ++#define RB91X_LATCH_GPIO_BASE AR934X_GPIO_COUNT ++#define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x)) ++ ++#define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT) ++#define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x)) ++ ++#define RB91X_SSR_BIT_LED1 0 ++#define RB91X_SSR_BIT_LED2 1 ++#define RB91X_SSR_BIT_LED3 2 ++#define RB91X_SSR_BIT_LED4 3 ++#define RB91X_SSR_BIT_LED5 4 ++#define RB91X_SSR_BIT_5 5 ++#define RB91X_SSR_BIT_USB_POWER 6 ++#define RB91X_SSR_BIT_PCIE_POWER 7 ++ ++#define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0) ++#define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1) ++#define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2) ++#define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3) ++#define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4) ++#define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11) ++#define RB91X_GPIO_NAND_NRW RB91X_LATCH_GPIO(12) ++#define RB91X_GPIO_NAND_NCE RB91X_LATCH_GPIO(13) ++#define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14) ++#define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15) ++ ++#define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1) ++#define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2) ++#define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3) ++#define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4) ++#define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5) ++#define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER) ++#define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER) ++ ++struct rb_board_info { ++ const char *name; ++ u32 flags; ++}; ++ ++static struct mtd_partition rb711gr100_spi_partitions[] = { ++ { ++ .name = "routerboot", ++ .offset = RB_ROUTERBOOT_OFFSET, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "hard_config", ++ .size = RB_HARD_CFG_SIZE, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "bios", ++ .offset = RB_BIOS_OFFSET, ++ .size = RB_BIOS_SIZE, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "soft_config", ++ .size = RB_SOFT_CFG_SIZE, ++ } ++}; ++ ++static struct flash_platform_data rb711gr100_spi_flash_data = { ++ .parts = rb711gr100_spi_partitions, ++ .nr_parts = ARRAY_SIZE(rb711gr100_spi_partitions), ++}; ++ ++static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = { ++ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 ++}; ++ ++static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = { ++ .base = RB91X_LATCH_GPIO_BASE, ++ .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios), ++ .gpios = rb711gr100_gpio_latch_gpios, ++ .le_gpio_index = 11, ++ .le_active_low = true, ++}; ++ ++static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = { ++ .gpio_nce = RB91X_GPIO_NAND_NCE, ++ .gpio_ale = RB91X_GPIO_NAND_ALE, ++ .gpio_cle = RB91X_GPIO_NAND_CLE, ++ .gpio_rdy = RB91X_GPIO_NAND_RDY, ++ .gpio_read = RB91X_GPIO_NAND_READ, ++ .gpio_nrw = RB91X_GPIO_NAND_NRW, ++ .gpio_nle = RB91X_GPIO_NLE, ++}; ++ ++static u8 rb711gr100_ssr_initdata[] __initdata = { ++ BIT(RB91X_SSR_BIT_PCIE_POWER) | ++ BIT(RB91X_SSR_BIT_USB_POWER) | ++ BIT(RB91X_SSR_BIT_5) ++}; ++ ++static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = { ++ .base = RB91X_SSR_GPIO_BASE, ++ .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata), ++ .init_data = rb711gr100_ssr_initdata, ++}; ++ ++static struct ath79_spi_controller_data rb711gr100_spi0_cdata = { ++ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, ++ .cs_line = 0, ++ .is_flash = true, ++}; ++ ++static struct ath79_spi_controller_data rb711gr100_spi1_cdata = { ++ .cs_type = ATH79_SPI_CS_TYPE_GPIO, ++ .cs_line = RB91X_GPIO_SSR_STROBE, ++}; ++ ++static struct spi_board_info rb711gr100_spi_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .max_speed_hz = 25000000, ++ .modalias = "m25p80", ++ .platform_data = &rb711gr100_spi_flash_data, ++ .controller_data = &rb711gr100_spi0_cdata ++ }, { ++ .bus_num = 0, ++ .chip_select = 1, ++ .max_speed_hz = 10000000, ++ .modalias = "74x164", ++ .platform_data = &rb711gr100_ssr_data, ++ .controller_data = &rb711gr100_spi1_cdata ++ } ++}; ++ ++static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = { ++ .bus_num = 0, ++ .num_chipselect = 2, ++}; ++ ++static struct gpio_led rb711gr100_leds[] __initdata = { ++ { ++ .name = "rb:green:led1", ++ .gpio = RB91X_GPIO_LED_1, ++ .active_low = 0, ++ }, ++ { ++ .name = "rb:green:led2", ++ .gpio = RB91X_GPIO_LED_2, ++ .active_low = 0, ++ }, ++ { ++ .name = "rb:green:led3", ++ .gpio = RB91X_GPIO_LED_3, ++ .active_low = 0, ++ }, ++ { ++ .name = "rb:green:led4", ++ .gpio = RB91X_GPIO_LED_4, ++ .active_low = 0, ++ }, ++ { ++ .name = "rb:green:led5", ++ .gpio = RB91X_GPIO_LED_5, ++ .active_low = 0, ++ }, ++ { ++ .name = "rb:green:user", ++ .gpio = RB91X_GPIO_LED_USER, ++ .active_low = 0, ++ }, ++ { ++ .name = "rb:green:power", ++ .gpio = RB91X_GPIO_LED_POWER, ++ .active_low = 0, ++ }, ++}; ++ ++static struct at803x_platform_data rb91x_at803x_data = { ++ .disable_smarteee = 1, ++ .enable_rgmii_rx_delay = 1, ++ .enable_rgmii_tx_delay = 1, ++}; ++ ++static struct mdio_board_info rb91x_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &rb91x_at803x_data, ++ }, ++}; ++ ++static void __init rb711gr100_init_partitions(const struct rb_info *info) ++{ ++ rb711gr100_spi_partitions[0].size = info->hard_cfg_offs; ++ rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs; ++ ++ rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs; ++} ++ ++void __init rb711gr100_wlan_init(void) ++{ ++ char *caldata; ++ u8 wlan_mac[ETH_ALEN]; ++ ++ caldata = rb_get_wlan_data(); ++ if (caldata == NULL) ++ return; ++ ++ ath79_init_mac(wlan_mac, ath79_mac_base, 1); ++ ath79_register_wmac(caldata + 0x1000, wlan_mac); ++ ++ kfree(caldata); ++} ++ ++#define RB_BOARD_INFO(_name, _flags) \ ++ { \ ++ .name = (_name), \ ++ .flags = (_flags), \ ++ } ++ ++static const struct rb_board_info rb711gr100_boards[] __initconst = { ++ RB_BOARD_INFO("911G-2HPnD", 0), ++ RB_BOARD_INFO("911G-5HPnD", 0), ++ RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE), ++ RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE), ++}; ++ ++static u32 rb711gr100_get_flags(const struct rb_info *info) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) { ++ const struct rb_board_info *bi; ++ ++ bi = &rb711gr100_boards[i]; ++ if (strcmp(info->board_name, bi->name) == 0) ++ return bi->flags; ++ } ++ ++ return 0; ++} ++ ++static void __init rb711gr100_setup(void) ++{ ++ const struct rb_info *info; ++ char buf[64]; ++ u32 flags; ++ ++ info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); ++ if (!info) ++ return; ++ ++ scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", ++ (info->board_name) ? info->board_name : ""); ++ mips_set_machine_name(buf); ++ ++ rb711gr100_init_partitions(info); ++ ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info, ++ ARRAY_SIZE(rb711gr100_spi_info)); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_RXD_DELAY | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(rb91x_mdio0_info, ++ ARRAY_SIZE(rb91x_mdio0_info)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_pll_data.pll_1000 = 0x02000000; ++ ++ ath79_register_eth(0); ++ ++ rb711gr100_wlan_init(); ++ ++ platform_device_register_data(NULL, "rb91x-nand", -1, ++ &rb711gr100_nand_data, ++ sizeof(rb711gr100_nand_data)); ++ ++ platform_device_register_data(NULL, "gpio-latch", -1, ++ &rb711gr100_gpio_latch_data, ++ sizeof(rb711gr100_gpio_latch_data)); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds), ++ rb711gr100_leds); ++ ++ flags = rb711gr100_get_flags(info); ++ ++ if (flags & RB91X_FLAG_USB) ++ ath79_register_usb(); ++ ++ if (flags & RB91X_FLAG_PCIE) ++ ath79_register_pci(); ++ ++} ++ ++MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb922.c linux-4.1.13/arch/mips/ath79/mach-rb922.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rb922.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rb922.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,236 @@ ++/* ++ * MikroTik RouterBOARD 91X support ++ * ++ * Copyright (C) 2015 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" ++#include "dev-usb.h" ++#include "dev-spi.h" ++#include "machtypes.h" ++#include "pci.h" ++#include "routerboot.h" ++ ++#define RB922_GPIO_LED_USR 12 ++#define RB922_GPIO_USB_POWER 13 ++#define RB922_GPIO_FAN_CTRL 14 ++#define RB922_GPIO_BTN_RESET 20 ++#define RB922_GPIO_NAND_NCE 23 ++ ++#define RB922_PHY_ADDR 4 ++ ++#define RB922_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define RB922_KEYS_DEBOUNCE_INTERVAL (3 * RB922_KEYS_POLL_INTERVAL) ++ ++#define RB_ROUTERBOOT_OFFSET 0x0000 ++#define RB_ROUTERBOOT_MIN_SIZE 0xb000 ++#define RB_HARD_CFG_SIZE 0x1000 ++#define RB_BIOS_OFFSET 0xd000 ++#define RB_BIOS_SIZE 0x1000 ++#define RB_SOFT_CFG_OFFSET 0xf000 ++#define RB_SOFT_CFG_SIZE 0x1000 ++ ++static struct mtd_partition rb922gs_spi_partitions[] = { ++ { ++ .name = "routerboot", ++ .offset = RB_ROUTERBOOT_OFFSET, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "hard_config", ++ .size = RB_HARD_CFG_SIZE, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "bios", ++ .offset = RB_BIOS_OFFSET, ++ .size = RB_BIOS_SIZE, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "soft_config", ++ .size = RB_SOFT_CFG_SIZE, ++ } ++}; ++ ++static struct flash_platform_data rb922gs_spi_flash_data = { ++ .parts = rb922gs_spi_partitions, ++ .nr_parts = ARRAY_SIZE(rb922gs_spi_partitions), ++}; ++ ++static struct gpio_led rb922gs_leds[] __initdata = { ++ { ++ .name = "rb:green:user", ++ .gpio = RB922_GPIO_LED_USR, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button rb922gs_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = RB922_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = RB922_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct at803x_platform_data rb922gs_at803x_data = { ++ .disable_smarteee = 1, ++}; ++ ++static struct mdio_board_info rb922gs_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = RB922_PHY_ADDR, ++ .platform_data = &rb922gs_at803x_data, ++ }, ++}; ++ ++static void __init rb922gs_init_partitions(const struct rb_info *info) ++{ ++ rb922gs_spi_partitions[0].size = info->hard_cfg_offs; ++ rb922gs_spi_partitions[1].offset = info->hard_cfg_offs; ++ rb922gs_spi_partitions[3].offset = info->soft_cfg_offs; ++} ++ ++static void rb922gs_nand_select_chip(int chip_no) ++{ ++ switch (chip_no) { ++ case 0: ++ gpio_set_value(RB922_GPIO_NAND_NCE, 0); ++ break; ++ default: ++ gpio_set_value(RB922_GPIO_NAND_NCE, 1); ++ break; ++ } ++ ndelay(500); ++} ++ ++static struct nand_ecclayout rb922gs_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static int rb922gs_nand_scan_fixup(struct mtd_info *mtd) ++{ ++ struct nand_chip *chip = mtd->priv; ++ ++ if (mtd->writesize == 512) { ++ /* ++ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot ++ * will not be able to find the kernel that we load. ++ */ ++ chip->ecc.layout = &rb922gs_nand_ecclayout; ++ } ++ ++ return 0; ++} ++ ++static struct mtd_partition rb922gs_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, ++ { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, ++ { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static void __init rb922gs_nand_init(void) ++{ ++ gpio_request_one(RB922_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); ++ ++ ath79_nfc_set_scan_fixup(rb922gs_nand_scan_fixup); ++ ath79_nfc_set_parts(rb922gs_nand_partitions, ++ ARRAY_SIZE(rb922gs_nand_partitions)); ++ ath79_nfc_set_select_chip(rb922gs_nand_select_chip); ++ ath79_nfc_set_swap_dma(true); ++ ath79_register_nfc(); ++} ++ ++static void __init rb922gs_setup(void) ++{ ++ const struct rb_info *info; ++ char buf[64]; ++ ++ info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); ++ if (!info) ++ return; ++ ++ scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", ++ (info->board_name) ? info->board_name : ""); ++ mips_set_machine_name(buf); ++ ++ rb922gs_init_partitions(info); ++ ath79_register_m25p80(&rb922gs_spi_flash_data); ++ ++ rb922gs_nand_init(); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(rb922gs_mdio0_info, ++ ARRAY_SIZE(rb922gs_mdio0_info)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR); ++ ath79_eth0_pll_data.pll_10 = 0x81001313; ++ ath79_eth0_pll_data.pll_100 = 0x81000101; ++ ath79_eth0_pll_data.pll_1000 = 0x8f000000; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_pci(); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds); ++ ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(rb922gs_gpio_keys), ++ rb922gs_gpio_keys); ++ ++ /* NOTE: ++ * This only supports the RB911G-5HPacD board for now. For other boards ++ * more devices must be registered based on the hardware options which ++ * can be found in the hardware configuration of RouterBOOT. ++ */ ++} ++ ++MIPS_MACHINE_NONAME(ATH79_MACH_RB_922GS, "922gs", rb922gs_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rb95x.c linux-4.1.13/arch/mips/ath79/mach-rb95x.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rb95x.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rb95x.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,258 @@ ++/* ++ * MikroTik RouterBOARD 95X support ++ * ++ * Copyright (C) 2012 Stijn Tintel ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2013 Kamil Trzcinski ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) "rb95x: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "routerboot.h" ++#include "dev-leds-gpio.h" ++ ++#define RB95X_GPIO_NAND_NCE 14 ++ ++static struct mtd_partition rb95x_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, ++ { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, ++ { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static struct gpio_led rb951ui_leds_gpio[] __initdata = { ++ { ++ .name = "rb:green:wlan", ++ .gpio = 11, ++ .active_low = 1, ++ }, { ++ .name = "rb:green:act", ++ .gpio = 3, ++ .active_low = 1, ++ }, { ++ .name = "rb:green:port1", ++ .gpio = 13, ++ .active_low = 1, ++ }, { ++ .name = "rb:green:port2", ++ .gpio = 12, ++ .active_low = 1, ++ }, { ++ .name = "rb:green:port3", ++ .gpio = 4, ++ .active_low = 1, ++ }, { ++ .name = "rb:green:port4", ++ .gpio = 21, ++ .active_low = 1, ++ }, { ++ .name = "rb:green:port5", ++ .gpio = 16, ++ .active_low = 1, ++ } ++}; ++ ++static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_platform_data rb95x_ar8327_data = { ++ .pad0_cfg = &rb95x_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ } ++}; ++ ++static struct mdio_board_info rb95x_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &rb95x_ar8327_data, ++ }, ++}; ++ ++void __init rb95x_wlan_init(void) ++{ ++ char *art_buf; ++ u8 wlan_mac[ETH_ALEN]; ++ ++ art_buf = rb_get_wlan_data(); ++ if (art_buf == NULL) ++ return; ++ ++ ath79_init_mac(wlan_mac, ath79_mac_base, 11); ++ ath79_register_wmac(art_buf + 0x1000, wlan_mac); ++ ++ kfree(art_buf); ++} ++ ++static void rb95x_nand_select_chip(int chip_no) ++{ ++ switch (chip_no) { ++ case 0: ++ gpio_set_value(RB95X_GPIO_NAND_NCE, 0); ++ break; ++ default: ++ gpio_set_value(RB95X_GPIO_NAND_NCE, 1); ++ break; ++ } ++ ndelay(500); ++} ++ ++static struct nand_ecclayout rb95x_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static int rb95x_nand_scan_fixup(struct mtd_info *mtd) ++{ ++ struct nand_chip *chip = mtd->priv; ++ ++ if (mtd->writesize == 512) { ++ /* ++ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot ++ * will not be able to find the kernel that we load. ++ */ ++ chip->ecc.layout = &rb95x_nand_ecclayout; ++ } ++ ++ return 0; ++} ++ ++void __init rb95x_nand_init(void) ++{ ++ gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); ++ ++ ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup); ++ ath79_nfc_set_parts(rb95x_nand_partitions, ++ ARRAY_SIZE(rb95x_nand_partitions)); ++ ath79_nfc_set_select_chip(rb95x_nand_select_chip); ++ ath79_nfc_set_swap_dma(true); ++ ath79_register_nfc(); ++} ++ ++static int __init rb95x_setup(void) ++{ ++ const struct rb_info *info; ++ ++ info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); ++ if (!info) ++ return -EINVAL; ++ ++ rb95x_nand_init(); ++ ++ return 0; ++} ++ ++static void __init rb951g_setup(void) ++{ ++ if (rb95x_setup()) ++ return; ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ mdiobus_register_board_info(rb95x_mdio0_info, ++ ARRAY_SIZE(rb95x_mdio0_info)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_register_eth(0); ++ ++ rb95x_wlan_init(); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD", ++ rb951g_setup); ++ ++static void __init rb951ui_setup(void) ++{ ++ if (rb95x_setup()) ++ return; ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ gpio_request_one(20, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ++ gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "POE power"); ++ ++ rb95x_wlan_init(); ++ ath79_register_usb(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rb951ui_leds_gpio), ++ rb951ui_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RB_951U, "951HnD", "MikroTik RouterBOARD 951Ui-2HnD", ++ rb951ui_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rbsxtlite.c linux-4.1.13/arch/mips/ath79/mach-rbsxtlite.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rbsxtlite.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rbsxtlite.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,238 @@ ++/* ++ * MikroTik RouterBOARD SXT Lite support ++ * ++ * Copyright (C) 2012 Stijn Tintel ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2013 Vyacheslav Adamanov ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) "sxtlite: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-nfc.h" ++#include "dev-wmac.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "routerboot.h" ++#include ++ ++#define SXTLITE_GPIO_NAND_NCE 14 ++#define SXTLITE_GPIO_LED_USER 3 ++#define SXTLITE_GPIO_LED_1 13 ++#define SXTLITE_GPIO_LED_2 12 ++#define SXTLITE_GPIO_LED_3 4 ++#define SXTLITE_GPIO_LED_4 21 ++#define SXTLITE_GPIO_LED_5 18 ++#define SXTLITE_GPIO_LED_POWER 11 ++ ++#define SXTLITE_GPIO_BUZZER 19 ++ ++#define SXTLITE_GPIO_BTN_RESET 15 ++ ++#define SXTLITE_KEYS_POLL_INTERVAL 20 ++#define SXTLITE_KEYS_DEBOUNCE_INTERVAL (3 * SXTLITE_KEYS_POLL_INTERVAL) ++ ++static struct mtd_partition rbsxtlite_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, ++ { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, ++ { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static struct gpio_led rbsxtlite_leds_gpio[] __initdata = { ++ { ++ .name = "rb:green:user", ++ .gpio = SXTLITE_GPIO_LED_USER, ++ .active_low = 1, ++ }, ++ { ++ .name = "rb:green:led1", ++ .gpio = SXTLITE_GPIO_LED_1, ++ .active_low = 1, ++ }, ++ { ++ .name = "rb:green:led2", ++ .gpio = SXTLITE_GPIO_LED_2, ++ .active_low = 1, ++ }, ++ { ++ .name = "rb:green:led3", ++ .gpio = SXTLITE_GPIO_LED_3, ++ .active_low = 1, ++ }, ++ { ++ .name = "rb:green:led4", ++ .gpio = SXTLITE_GPIO_LED_4, ++ .active_low = 1, ++ }, ++ { ++ .name = "rb:green:led5", ++ .gpio = SXTLITE_GPIO_LED_5, ++ .active_low = 1, ++ }, ++ { ++ .name = "rb:green:power", ++ .gpio = SXTLITE_GPIO_LED_POWER, ++ }, ++}; ++ ++static struct gpio_keys_button rbsxtlite_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = SXTLITE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = SXTLITE_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++}; ++ ++static int __init rbsxtlite_rbinfo_init(void) ++{ ++ const struct rb_info *info; ++ ++ info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); ++ if (!info) ++ return -EINVAL; ++ return 0; ++ ++} ++ ++void __init rbsxtlite_wlan_init(void) ++{ ++ char *art_buf; ++ u8 wlan_mac[ETH_ALEN]; ++ ++ art_buf = rb_get_wlan_data(); ++ if (art_buf == NULL) ++ return; ++ ++ ath79_init_mac(wlan_mac, ath79_mac_base, 1); ++ ath79_register_wmac(art_buf + 0x1000, wlan_mac); ++ ++ kfree(art_buf); ++} ++ ++static void rbsxtlite_nand_select_chip(int chip_no) ++{ ++ switch (chip_no) { ++ case 0: ++ gpio_set_value(SXTLITE_GPIO_NAND_NCE, 0); ++ break; ++ default: ++ gpio_set_value(SXTLITE_GPIO_NAND_NCE, 1); ++ break; ++ } ++ ndelay(500); ++} ++ ++static struct nand_ecclayout rbsxtlite_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static int rbsxtlite_nand_scan_fixup(struct mtd_info *mtd) ++{ ++ struct nand_chip *chip = mtd->priv; ++ ++ if (mtd->writesize == 512) { ++ /* ++ * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot ++ * will not be able to find the kernel that we load. ++ */ ++ chip->ecc.layout = &rbsxtlite_nand_ecclayout; ++ } ++ ++ return 0; ++} ++ ++void __init rbsxtlite_gpio_init(void) ++{ ++ gpio_request_one(SXTLITE_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); ++} ++ ++void __init rbsxtlite_nand_init(void) ++{ ++ ath79_nfc_set_scan_fixup(rbsxtlite_nand_scan_fixup); ++ ath79_nfc_set_parts(rbsxtlite_nand_partitions, ++ ARRAY_SIZE(rbsxtlite_nand_partitions)); ++ ath79_nfc_set_select_chip(rbsxtlite_nand_select_chip); ++ ath79_nfc_set_swap_dma(true); ++ ath79_register_nfc(); ++} ++ ++ ++static void __init rbsxtlite_setup(void) ++{ ++ if(rbsxtlite_rbinfo_init()) ++ return; ++ rbsxtlite_nand_init(); ++ rbsxtlite_wlan_init(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rbsxtlite_leds_gpio), ++ rbsxtlite_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, SXTLITE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(rbsxtlite_gpio_keys), ++ rbsxtlite_gpio_keys); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* GMAC0 is left unused */ ++ ++ /* GMAC1 is connected to MAC0 on the internal switch */ ++ /* The ethernet port connects to PHY P0, which connects to MAC1 ++ on the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ ++} ++ ++ ++MIPS_MACHINE(ATH79_MACH_RB_SXTLITE2ND, "sxt2n", "Mikrotik RouterBOARD SXT Lite2", ++ rbsxtlite_setup); ++ ++MIPS_MACHINE(ATH79_MACH_RB_SXTLITE5ND, "sxt5n", "Mikrotik RouterBOARD SXT Lite5", ++ rbsxtlite_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-rw2458n.c linux-4.1.13/arch/mips/ath79/mach-rw2458n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-rw2458n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-rw2458n.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,91 @@ ++/* ++ * Redwave RW2458N support ++ * ++ * Copyright (C) 2011-2013 Cezary Jackiewicz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define RW2458N_GPIO_LED_D3 1 ++#define RW2458N_GPIO_LED_D4 0 ++#define RW2458N_GPIO_LED_D5 11 ++#define RW2458N_GPIO_LED_D6 7 ++#define RW2458N_GPIO_BTN_RESET 12 ++ ++#define RW2458N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define RW2458N_KEYS_DEBOUNCE_INTERVAL (3 * RW2458N_KEYS_POLL_INTERVAL) ++ ++static struct gpio_keys_button rw2458n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = RW2458N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = RW2458N_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++#define RW2458N_WAN_PHYMASK BIT(4) ++ ++static struct gpio_led rw2458n_leds_gpio[] __initdata = { ++ { ++ .name = "rw2458n:green:d3", ++ .gpio = RW2458N_GPIO_LED_D3, ++ .active_low = 1, ++ }, { ++ .name = "rw2458n:green:d4", ++ .gpio = RW2458N_GPIO_LED_D4, ++ .active_low = 1, ++ }, { ++ .name = "rw2458n:green:d5", ++ .gpio = RW2458N_GPIO_LED_D5, ++ .active_low = 1, ++ }, { ++ .name = "rw2458n:green:d6", ++ .gpio = RW2458N_GPIO_LED_D6, ++ .active_low = 1, ++ } ++}; ++ ++static void __init rw2458n_setup(void) ++{ ++ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(0, ~RW2458N_WAN_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(rw2458n_leds_gpio), ++ rw2458n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, RW2458N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(rw2458n_gpio_keys), ++ rw2458n_gpio_keys); ++ ath79_register_usb(); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_RW2458N, "RW2458N", "Redwave RW2458N", ++ rw2458n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-smart-300.c linux-4.1.13/arch/mips/ath79/mach-smart-300.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-smart-300.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-smart-300.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,135 @@ ++/* ++ * NC-LINK SMART-300 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2014 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define SMART_300_GPIO_LED_WLAN 13 ++#define SMART_300_GPIO_LED_WAN 18 ++#define SMART_300_GPIO_LED_LAN4 19 ++#define SMART_300_GPIO_LED_LAN3 12 ++#define SMART_300_GPIO_LED_LAN2 21 ++#define SMART_300_GPIO_LED_LAN1 20 ++#define SMART_300_GPIO_LED_SYSTEM 15 ++#define SMART_300_GPIO_LED_POWER 14 ++ ++#define SMART_300_GPIO_BTN_RESET 17 ++#define SMART_300_GPIO_SW_RFKILL 16 ++ ++#define SMART_300_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define SMART_300_KEYS_DEBOUNCE_INTERVAL (3 * SMART_300_KEYS_POLL_INTERVAL) ++ ++#define SMART_300_GPIO_MASK 0x007fffff ++ ++static const char *smart_300_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data smart_300_flash_data = { ++ .part_probes = smart_300_part_probes, ++}; ++ ++static struct gpio_led smart_300_leds_gpio[] __initdata = { ++ { ++ .name = "nc-link:green:lan1", ++ .gpio = SMART_300_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "nc-link:green:lan2", ++ .gpio = SMART_300_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "nc-link:green:lan3", ++ .gpio = SMART_300_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "nc-link:green:lan4", ++ .gpio = SMART_300_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "nc-link:green:system", ++ .gpio = SMART_300_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "nc-link:green:wan", ++ .gpio = SMART_300_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "nc-link:green:wlan", ++ .gpio = SMART_300_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button smart_300_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = SMART_300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = SMART_300_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static void __init smart_300_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(smart_300_leds_gpio), ++ smart_300_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, SMART_300_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(smart_300_gpio_keys), ++ smart_300_gpio_keys); ++ ++ ath79_register_m25p80(&smart_300_flash_data); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++ ++ gpio_request(SMART_300_GPIO_LED_POWER, "power"); ++ gpio_direction_output(SMART_300_GPIO_LED_POWER, GPIOF_OUT_INIT_LOW); ++} ++ ++MIPS_MACHINE(ATH79_MACH_SMART_300, "SMART-300", "NC-LINK SMART-300", ++ smart_300_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-632brp.c linux-4.1.13/arch/mips/ath79/mach-tew-632brp.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tew-632brp.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tew-632brp.c 2015-09-13 20:04:35.068524086 +0200 +@@ -0,0 +1,111 @@ ++/* ++ * TrendNET TEW-632BRP board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "nvram.h" ++ ++#define TEW_632BRP_GPIO_LED_STATUS 1 ++#define TEW_632BRP_GPIO_LED_WPS 3 ++#define TEW_632BRP_GPIO_LED_WLAN 6 ++#define TEW_632BRP_GPIO_BTN_WPS 12 ++#define TEW_632BRP_GPIO_BTN_RESET 21 ++ ++#define TEW_632BRP_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL) ++ ++#define TEW_632BRP_CONFIG_ADDR 0x1f020000 ++#define TEW_632BRP_CONFIG_SIZE 0x10000 ++ ++static struct gpio_led tew_632brp_leds_gpio[] __initdata = { ++ { ++ .name = "tew-632brp:green:status", ++ .gpio = TEW_632BRP_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, { ++ .name = "tew-632brp:blue:wps", ++ .gpio = TEW_632BRP_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "tew-632brp:green:wlan", ++ .gpio = TEW_632BRP_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW_632BRP_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW_632BRP_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++#define TEW_632BRP_LAN_PHYMASK BIT(0) ++#define TEW_632BRP_WAN_PHYMASK BIT(4) ++#define TEW_632BRP_MDIO_MASK (~(TEW_632BRP_LAN_PHYMASK | \ ++ TEW_632BRP_WAN_PHYMASK)) ++ ++static void __init tew_632brp_setup(void) ++{ ++ const char *config = (char *) KSEG1ADDR(TEW_632BRP_CONFIG_ADDR); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 mac[6]; ++ u8 *wlan_mac = NULL; ++ ++ if (ath79_nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE, ++ "lan_mac=", mac) == 0) { ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ wlan_mac = mac; ++ } ++ ++ ath79_register_mdio(0, TEW_632BRP_MDIO_MASK); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.phy_mask = TEW_632BRP_LAN_PHYMASK; ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = TEW_632BRP_WAN_PHYMASK; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio), ++ tew_632brp_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tew_632brp_gpio_keys), ++ tew_632brp_gpio_keys); ++ ++ ath79_register_wmac(eeprom, wlan_mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP", ++ tew_632brp_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-673gru.c linux-4.1.13/arch/mips/ath79/mach-tew-673gru.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tew-673gru.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tew-673gru.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,198 @@ ++/* ++ * TRENDnet TEW-673GRU board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define TEW673GRU_GPIO_LCD_SCK 0 ++#define TEW673GRU_GPIO_LCD_MOSI 1 ++#define TEW673GRU_GPIO_LCD_MISO 2 ++#define TEW673GRU_GPIO_LCD_CS 6 ++ ++#define TEW673GRU_GPIO_LED_WPS 9 ++ ++#define TEW673GRU_GPIO_BTN_RESET 3 ++#define TEW673GRU_GPIO_BTN_WPS 8 ++ ++#define TEW673GRU_GPIO_RTL8366_SDA 5 ++#define TEW673GRU_GPIO_RTL8366_SCK 7 ++ ++#define TEW673GRU_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TEW673GRU_KEYS_DEBOUNCE_INTERVAL (3 * TEW673GRU_KEYS_POLL_INTERVAL) ++ ++#define TEW673GRU_CAL0_OFFSET 0x1000 ++#define TEW673GRU_CAL1_OFFSET 0x5000 ++#define TEW673GRU_MAC0_OFFSET 0xffa0 ++#define TEW673GRU_MAC1_OFFSET 0xffb4 ++ ++#define TEW673GRU_CAL_LOCATION_0 0x1f660000 ++#define TEW673GRU_CAL_LOCATION_1 0x1f7f0000 ++ ++static struct gpio_led tew673gru_leds_gpio[] __initdata = { ++ { ++ .name = "trendnet:blue:wps", ++ .gpio = TEW673GRU_GPIO_LED_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tew673gru_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW673GRU_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW673GRU_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct rtl8366_initval tew673gru_rtl8366s_initvals[] = { ++ { .reg = 0x06, .val = 0x0108 }, ++}; ++ ++static struct rtl8366_platform_data tew673gru_rtl8366s_data = { ++ .gpio_sda = TEW673GRU_GPIO_RTL8366_SDA, ++ .gpio_sck = TEW673GRU_GPIO_RTL8366_SCK, ++ .num_initvals = ARRAY_SIZE(tew673gru_rtl8366s_initvals), ++ .initvals = tew673gru_rtl8366s_initvals, ++}; ++ ++static struct platform_device tew673gru_rtl8366s_device = { ++ .name = RTL8366S_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &tew673gru_rtl8366s_data, ++ } ++}; ++ ++static struct spi_board_info tew673gru_spi_info[] = { ++ { ++ .bus_num = 1, ++ .chip_select = 0, ++ .max_speed_hz = 400000, ++ .modalias = "spidev", ++ .mode = SPI_MODE_2, ++ .controller_data = (void *) TEW673GRU_GPIO_LCD_CS, ++ }, ++}; ++ ++static struct spi_gpio_platform_data tew673gru_spi_data = { ++ .sck = TEW673GRU_GPIO_LCD_SCK, ++ .miso = TEW673GRU_GPIO_LCD_MISO, ++ .mosi = TEW673GRU_GPIO_LCD_MOSI, ++ .num_chipselect = 1, ++}; ++ ++static struct platform_device tew673gru_spi_device = { ++ .name = "spi_gpio", ++ .id = 1, ++ .dev = { ++ .platform_data = &tew673gru_spi_data, ++ }, ++}; ++ ++static bool __init tew673gru_is_caldata_valid(u8 *p) ++{ ++ u16 *magic0, *magic1; ++ ++ magic0 = (u16 *)(p + TEW673GRU_CAL0_OFFSET); ++ magic1 = (u16 *)(p + TEW673GRU_CAL1_OFFSET); ++ ++ return (*magic0 == 0xa55a && *magic1 == 0xa55a); ++} ++ ++static void __init tew673gru_wlan_init(void) ++{ ++ u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; ++ u8 *caldata; ++ ++ caldata = (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0); ++ if (!tew673gru_is_caldata_valid(caldata)) { ++ caldata = (u8 *)KSEG1ADDR(TEW673GRU_CAL_LOCATION_1); ++ if (!tew673gru_is_caldata_valid(caldata)) { ++ pr_err("no calibration data found\n"); ++ return; ++ } ++ } ++ ++ ath79_parse_ascii_mac(caldata + TEW673GRU_MAC0_OFFSET, mac1); ++ ath79_parse_ascii_mac(caldata + TEW673GRU_MAC1_OFFSET, mac2); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 5); ++ ap9x_pci_setup_wmac_led_pin(1, 5); ++ ++ ap94_pci_init(caldata + TEW673GRU_CAL0_OFFSET, mac1, ++ caldata + TEW673GRU_CAL1_OFFSET, mac2); ++} ++ ++static void __init tew673gru_setup(void) ++{ ++ tew673gru_wlan_init(); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_eth0_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_pll_data.pll_1000 = 0x11110000; ++ ++ ath79_eth1_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ath79_eth1_pll_data.pll_1000 = 0x11110000; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew673gru_leds_gpio), ++ tew673gru_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TEW673GRU_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tew673gru_gpio_keys), ++ tew673gru_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ platform_device_register(&tew673gru_rtl8366s_device); ++ ++ spi_register_board_info(tew673gru_spi_info, ++ ARRAY_SIZE(tew673gru_spi_info)); ++ platform_device_register(&tew673gru_spi_device); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TEW_673GRU, "TEW-673GRU", "TRENDnet TEW-673GRU", ++ tew673gru_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-712br.c linux-4.1.13/arch/mips/ath79/mach-tew-712br.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tew-712br.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tew-712br.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,153 @@ ++/* ++ * TRENDnet TEW-712BR board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TEW_712BR_GPIO_BTN_WPS 11 ++#define TEW_712BR_GPIO_BTN_RESET 12 ++ ++#define TEW_712BR_GPIO_LED_LAN1 13 ++#define TEW_712BR_GPIO_LED_LAN2 14 ++#define TEW_712BR_GPIO_LED_LAN3 15 ++#define TEW_712BR_GPIO_LED_LAN4 16 ++#define TEW_712BR_GPIO_LED_POWER_GREEN 20 ++#define TEW_712BR_GPIO_LED_POWER_ORANGE 27 ++#define TEW_712BR_GPIO_LED_WAN_GREEN 17 ++#define TEW_712BR_GPIO_LED_WAN_ORANGE 23 ++#define TEW_712BR_GPIO_LED_WLAN 0 ++#define TEW_712BR_GPIO_LED_WPS 26 ++ ++#define TEW_712BR_GPIO_WAN_LED_ENABLE 1 ++ ++#define TEW_712BR_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TEW_712BR_KEYS_DEBOUNCE_INTERVAL (3 * TEW_712BR_KEYS_POLL_INTERVAL) ++ ++#define TEW_712BR_ART_ADDRESS 0x1f010000 ++#define TEW_712BR_CALDATA_OFFSET 0x1000 ++ ++#define TEW_712BR_MAC_PART_ADDRESS 0x1f020000 ++#define TEW_712BR_LAN_MAC_OFFSET 0x04 ++#define TEW_712BR_WAN_MAC_OFFSET 0x16 ++ ++static struct gpio_led tew_712br_leds_gpio[] __initdata = { ++ { ++ .name = "trendnet:green:lan1", ++ .gpio = TEW_712BR_GPIO_LED_LAN1, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:green:lan2", ++ .gpio = TEW_712BR_GPIO_LED_LAN2, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:green:lan3", ++ .gpio = TEW_712BR_GPIO_LED_LAN3, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:green:lan4", ++ .gpio = TEW_712BR_GPIO_LED_LAN4, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:blue:wps", ++ .gpio = TEW_712BR_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "trendnet:green:power", ++ .gpio = TEW_712BR_GPIO_LED_POWER_GREEN, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:orange:power", ++ .gpio = TEW_712BR_GPIO_LED_POWER_ORANGE, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:green:wan", ++ .gpio = TEW_712BR_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "trendnet:orange:wan", ++ .gpio = TEW_712BR_GPIO_LED_WAN_ORANGE, ++ .active_low = 0, ++ }, { ++ .name = "trendnet:green:wlan", ++ .gpio = TEW_712BR_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tew_712br_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TEW_712BR_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW_712BR_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TEW_712BR_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW_712BR_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init tew_712br_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(TEW_712BR_ART_ADDRESS); ++ u8 *mac = (u8 *) KSEG1ADDR(TEW_712BR_MAC_PART_ADDRESS); ++ u8 lan_mac[ETH_ALEN]; ++ u8 wan_mac[ETH_ALEN]; ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ gpio_request_one(TEW_712BR_GPIO_WAN_LED_ENABLE, ++ GPIOF_OUT_INIT_LOW, "WAN LED enable"); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_712br_leds_gpio), ++ tew_712br_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TEW_712BR_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tew_712br_gpio_keys), ++ tew_712br_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_parse_ascii_mac(mac + TEW_712BR_LAN_MAC_OFFSET, lan_mac); ++ ath79_parse_ascii_mac(mac + TEW_712BR_WAN_MAC_OFFSET, wan_mac); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(art + TEW_712BR_CALDATA_OFFSET, wan_mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TEW_712BR, "TEW-712BR", ++ "TRENDnet TEW-712BR", tew_712br_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tew-732br.c linux-4.1.13/arch/mips/ath79/mach-tew-732br.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tew-732br.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tew-732br.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,127 @@ ++/* ++ * TRENDnet TEW-732BR board support ++ * ++ * Copyright (C) 2013 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TEW_732BR_GPIO_BTN_WPS 16 ++#define TEW_732BR_GPIO_BTN_RESET 17 ++ ++#define TEW_732BR_GPIO_LED_POWER_GREEN 4 ++#define TEW_732BR_GPIO_LED_POWER_AMBER 14 ++#define TEW_732BR_GPIO_LED_PLANET_GREEN 12 ++#define TEW_732BR_GPIO_LED_PLANET_AMBER 22 ++ ++#define TEW_732BR_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TEW_732BR_KEYS_DEBOUNCE_INTERVAL (3 * TEW_732BR_KEYS_POLL_INTERVAL) ++ ++#define TEW_732BR_ART_ADDRESS 0x1fff0000 ++#define TEW_732BR_CALDATA_OFFSET 0x1000 ++#define TEW_732BR_LAN_MAC_OFFSET 0xffa0 ++#define TEW_732BR_WAN_MAC_OFFSET 0xffb4 ++ ++static struct gpio_led tew_732br_leds_gpio[] __initdata = { ++ { ++ .name = "trendnet:green:power", ++ .gpio = TEW_732BR_GPIO_LED_POWER_GREEN, ++ .active_low = 0, ++ }, ++ { ++ .name = "trendnet:amber:power", ++ .gpio = TEW_732BR_GPIO_LED_POWER_AMBER, ++ .active_low = 0, ++ }, ++ { ++ .name = "trendnet:green:wan", ++ .gpio = TEW_732BR_GPIO_LED_PLANET_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "trendnet:amber:wan", ++ .gpio = TEW_732BR_GPIO_LED_PLANET_AMBER, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tew_732br_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TEW_732BR_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW_732BR_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TEW_732BR_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TEW_732BR_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init tew_732br_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(TEW_732BR_ART_ADDRESS); ++ u8 lan_mac[ETH_ALEN]; ++ u8 wan_mac[ETH_ALEN]; ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_732br_leds_gpio), ++ tew_732br_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TEW_732BR_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tew_732br_gpio_keys), ++ tew_732br_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_parse_ascii_mac(art + TEW_732BR_LAN_MAC_OFFSET, lan_mac); ++ ath79_parse_ascii_mac(art + TEW_732BR_WAN_MAC_OFFSET, wan_mac); ++ ++ ath79_register_wmac(art + TEW_732BR_CALDATA_OFFSET, lan_mac); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ /* LAN: GMAC1 is connected to the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(1); ++ ++ /* WAN: GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); ++ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TEW_732BR, "TEW-732BR", "TRENDnet TEW-732BR", ++ tew_732br_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr11u.c linux-4.1.13/arch/mips/ath79/mach-tl-mr11u.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr11u.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-mr11u.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,183 @@ ++/* ++ * TP-LINK TL-MR11U/TL-MR3040 board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_MR11U_GPIO_LED_3G 27 ++#define TL_MR11U_GPIO_LED_WLAN 26 ++#define TL_MR11U_GPIO_LED_LAN 17 ++ ++#define TL_MR11U_GPIO_BTN_WPS 20 ++#define TL_MR11U_GPIO_BTN_RESET 11 ++ ++#define TL_MR11U_GPIO_USB_POWER 8 ++#define TL_MR3040_GPIO_USB_POWER 18 ++ ++#define TL_MR3040_V2_GPIO_BTN_SW1 19 ++#define TL_MR3040_V2_GPIO_BTN_SW2 20 ++ ++#define TL_MR11U_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_MR11U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR11U_KEYS_POLL_INTERVAL) ++ ++static const char *tl_mr11u_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_mr11u_flash_data = { ++ .part_probes = tl_mr11u_part_probes, ++}; ++ ++static struct gpio_led tl_mr11u_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:3g", ++ .gpio = TL_MR11U_GPIO_LED_3G, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_MR11U_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:lan", ++ .gpio = TL_MR11U_GPIO_LED_LAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_mr11u_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR11U_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR11U_GPIO_BTN_WPS, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tl_mr3040_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR11U_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "sw1", ++ .type = EV_SW, ++ .code = BTN_0, ++ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3040_V2_GPIO_BTN_SW1, ++ .active_low = 0, ++ }, ++ { ++ .desc = "sw2", ++ .type = EV_SW, ++ .code = BTN_1, ++ .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3040_V2_GPIO_BTN_SW2, ++ .active_low = 0, ++ } ++}; ++ ++static void __init common_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* Disable hardware control LAN1 and LAN2 LEDs, enabling GPIO14 and GPIO15 */ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_m25p80(&tl_mr11u_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), ++ tl_mr11u_leds_gpio); ++ ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++static void __init tl_mr11u_setup(void) ++{ ++ common_setup(); ++ ++ ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr11u_gpio_keys), ++ tl_mr11u_gpio_keys); ++ gpio_request_one(TL_MR11U_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR11U, "TL-MR11U", "TP-LINK TL-MR11U", ++ tl_mr11u_setup); ++ ++static void __init tl_mr3040_setup(void) ++{ ++ common_setup(); ++ ++ ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, ++ 1, tl_mr11u_gpio_keys); ++ gpio_request_one(TL_MR3040_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3040, "TL-MR3040", "TP-LINK TL-MR3040", ++ tl_mr3040_setup); ++ ++static void __init tl_mr3040_v2_setup(void) ++{ ++ common_setup(); ++ ++ ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr3040_v2_gpio_keys), ++ tl_mr3040_v2_gpio_keys); ++ gpio_request_one(TL_MR3040_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3040_V2, "TL-MR3040-v2", "TP-LINK TL-MR3040 v2", ++ tl_mr3040_v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr13u.c linux-4.1.13/arch/mips/ath79/mach-tl-mr13u.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr13u.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-mr13u.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,107 @@ ++/* ++ * TP-LINK TL-MR13U board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_MR13U_GPIO_LED_SYSTEM 27 ++ ++#define TL_MR13U_GPIO_BTN_RESET 11 ++#define TL_MR13U_GPIO_BTN_SW1 6 ++#define TL_MR13U_GPIO_BTN_SW2 7 ++ ++#define TL_MR13U_GPIO_USB_POWER 18 ++ ++#define TL_MR13U_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_MR13U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR13U_KEYS_POLL_INTERVAL) ++ ++static const char *tl_mr13u_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_mr13u_flash_data = { ++ .part_probes = tl_mr13u_part_probes, ++}; ++ ++static struct gpio_led tl_mr13u_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:system", ++ .gpio = TL_MR13U_GPIO_LED_SYSTEM, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tl_mr13u_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR13U_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++ { ++ .desc = "sw1", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR13U_GPIO_BTN_SW1, ++ .active_low = 0, ++ }, ++ { ++ .desc = "sw2", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR13U_GPIO_BTN_SW2, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init tl_mr13u_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_m25p80(&tl_mr13u_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr13u_leds_gpio), ++ tl_mr13u_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_MR13U_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr13u_gpio_keys), ++ tl_mr13u_gpio_keys); ++ ++ gpio_request_one(TL_MR13U_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR13U, "TL-MR13U", "TP-LINK TL-MR13U v1", ++ tl_mr13u_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3020.c linux-4.1.13/arch/mips/ath79/mach-tl-mr3020.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3020.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-mr3020.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,126 @@ ++/* ++ * TP-LINK TL-MR3020 board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_MR3020_GPIO_LED_3G 27 ++#define TL_MR3020_GPIO_LED_WLAN 0 ++#define TL_MR3020_GPIO_LED_LAN 17 ++#define TL_MR3020_GPIO_LED_WPS 26 ++ ++#define TL_MR3020_GPIO_BTN_WPS 11 ++#define TL_MR3020_GPIO_BTN_SW1 18 ++#define TL_MR3020_GPIO_BTN_SW2 20 ++ ++#define TL_MR3020_GPIO_USB_POWER 8 ++ ++#define TL_MR3020_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_MR3020_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3020_KEYS_POLL_INTERVAL) ++ ++static const char *tl_mr3020_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_mr3020_flash_data = { ++ .part_probes = tl_mr3020_part_probes, ++}; ++ ++static struct gpio_led tl_mr3020_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:3g", ++ .gpio = TL_MR3020_GPIO_LED_3G, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_MR3020_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, ++ { ++ .name = "tp-link:green:lan", ++ .gpio = TL_MR3020_GPIO_LED_LAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:wps", ++ .gpio = TL_MR3020_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_mr3020_gpio_keys[] __initdata = { ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3020_GPIO_BTN_WPS, ++ .active_low = 0, ++ }, ++ { ++ .desc = "sw1", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3020_GPIO_BTN_SW1, ++ .active_low = 0, ++ }, ++ { ++ .desc = "sw2", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3020_GPIO_BTN_SW2, ++ .active_low = 0, ++ } ++}; ++ ++static void __init tl_mr3020_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_m25p80(&tl_mr3020_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), ++ tl_mr3020_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_MR3020_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr3020_gpio_keys), ++ tl_mr3020_gpio_keys); ++ ++ gpio_request_one(TL_MR3020_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3020, "TL-MR3020", "TP-LINK TL-MR3020", ++ tl_mr3020_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3x20.c linux-4.1.13/arch/mips/ath79/mach-tl-mr3x20.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-mr3x20.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-mr3x20.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,147 @@ ++/* ++ * TP-LINK TL-MR3220/3420 board support ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define TL_MR3X20_GPIO_LED_QSS 0 ++#define TL_MR3X20_GPIO_LED_SYSTEM 1 ++#define TL_MR3X20_GPIO_LED_3G 8 ++ ++#define TL_MR3X20_GPIO_BTN_RESET 11 ++#define TL_MR3X20_GPIO_BTN_QSS 12 ++ ++#define TL_MR3X20_GPIO_USB_POWER 6 ++ ++#define TL_MR3X20_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL) ++ ++static const char *tl_mr3x20_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_mr3x20_flash_data = { ++ .part_probes = tl_mr3x20_part_probes, ++}; ++ ++static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:system", ++ .gpio = TL_MR3X20_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_MR3X20_GPIO_LED_QSS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:3g", ++ .gpio = TL_MR3X20_GPIO_LED_3G, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3X20_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3X20_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init tl_ap99_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&tl_mr3x20_flash_data); ++ ++ ath79_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr3x20_gpio_keys), ++ tl_mr3x20_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ ap91_pci_init(ee, mac); ++} ++ ++static void __init tl_mr3x20_usb_setup(void) ++{ ++ /* enable power for the USB port */ ++ gpio_request_one(TL_MR3X20_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++} ++ ++static void __init tl_mr3220_setup(void) ++{ ++ tl_ap99_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), ++ tl_mr3x20_leds_gpio); ++ ap9x_pci_setup_wmac_led_pin(0, 1); ++ tl_mr3x20_usb_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220", ++ tl_mr3220_setup); ++ ++static void __init tl_mr3420_setup(void) ++{ ++ tl_ap99_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), ++ tl_mr3x20_leds_gpio); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++ tl_mr3x20_usb_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", ++ tl_mr3420_setup); ++ ++static void __init tl_wr841n_v7_setup(void) ++{ ++ tl_ap99_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1, ++ tl_mr3x20_leds_gpio); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR841N_V7, "TL-WR841N-v7", ++ "TP-LINK TL-WR841N/ND v7", tl_wr841n_v7_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa701nd-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa701nd-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa701nd-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wa701nd-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,116 @@ ++/* ++ * TP-LINK TL-WA701ND v2 board support ++ * ++ * Copyright (C) 2015 Luigi Tarenga ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WA701NDV2_GPIO_LED_WLAN 0 ++#define TL_WA701NDV2_GPIO_LED_QSS 1 ++#define TL_WA701NDV2_GPIO_LED_LAN 17 ++#define TL_WA701NDV2_GPIO_LED_SYSTEM 27 ++ ++#define TL_WA701NDV2_GPIO_BTN_RESET 11 ++#define TL_WA701NDV2_GPIO_BTN_QSS 26 ++ ++#define TL_WA701NDV2_GPIO_USB_POWER 8 ++ ++#define TL_WA701NDV2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WA701NDV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA701NDV2_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wa701ndv2_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wa701ndv2_flash_data = { ++ .part_probes = tl_wa701ndv2_part_probes, ++}; ++ ++static struct gpio_led tl_wa701ndv2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WA701NDV2_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WA701NDV2_GPIO_LED_QSS, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:lan", ++ .gpio = TL_WA701NDV2_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WA701NDV2_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_wa701ndv2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WA701NDV2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA701NDV2_GPIO_BTN_RESET, ++ .active_low = 0, ++ } , { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WA701NDV2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA701NDV2_GPIO_BTN_QSS, ++ .active_low = 0, ++ } ++ ++}; ++ ++static void __init tl_wa701ndv2_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa701ndv2_leds_gpio), ++ tl_wa701ndv2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WA701NDV2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wa701ndv2_gpio_keys), ++ tl_wa701ndv2_gpio_keys); ++ ++ gpio_request_one(TL_WA701NDV2_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&tl_wa701ndv2_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ /* ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); */ ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA701ND_V2, "TL-WA701ND-v2", ++ "TP-LINK TL-WA701ND v2", tl_wa701ndv2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa7210n-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa7210n-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa7210n-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wa7210n-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,125 @@ ++/* ++ * TP-LINK TL-WA7210N v2.1 board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2014 Nicolas Braud-Santoni ++ * Copyright (C) 2014 Alexander List ++ * Copyright (C) 2015 Hendrik Frenzel ++ * ++ * rebased on TL-WA7510Nv1 support, ++ * Copyright (C) 2012 Stefan Helmert ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "dev-dsa.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#include "common.h" ++ ++#define TL_WA7210N_V2_GPIO_BTN_RESET 11 ++#define TL_WA7210N_V2_KEYS_POLL_INT 20 ++#define TL_WA7210N_V2_KEYS_DEBOUNCE_INT (3 * TL_WA7210N_V2_KEYS_POLL_INT) ++ ++#define TL_WA7210N_V2_GPIO_LED_LAN 17 ++#define TL_WA7210N_V2_GPIO_LED_SIG1 0 ++#define TL_WA7210N_V2_GPIO_LED_SIG2 1 ++#define TL_WA7210N_V2_GPIO_LED_SIG3 27 ++#define TL_WA7210N_V2_GPIO_LED_SIG4 26 ++ ++#define TL_WA7210N_V2_GPIO_LNA_EN 28 ++ ++static const char *tl_wa7210n_v2_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct gpio_keys_button tl_wa7210n_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WA7210N_V2_KEYS_DEBOUNCE_INT, ++ .gpio = TL_WA7210N_V2_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_led tl_wa7210n_v2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan", ++ .gpio = TL_WA7210N_V2_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:signal1", ++ .gpio = TL_WA7210N_V2_GPIO_LED_SIG1, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:signal2", ++ .gpio = TL_WA7210N_V2_GPIO_LED_SIG2, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:signal3", ++ .gpio = TL_WA7210N_V2_GPIO_LED_SIG3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:signal4", ++ .gpio = TL_WA7210N_V2_GPIO_LED_SIG4, ++ .active_low = 1, ++ }, ++}; ++ ++static struct flash_platform_data tl_wa7210n_v2_flash_data = { ++ .part_probes = tl_wa7210n_v2_part_probes, ++}; ++ ++static void __init tl_wa7210n_v2_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WA7210N_V2_KEYS_POLL_INT, ++ ARRAY_SIZE(tl_wa7210n_v2_gpio_keys), ++ tl_wa7210n_v2_gpio_keys); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa7210n_v2_leds_gpio), ++ tl_wa7210n_v2_leds_gpio); ++ ++ ath79_gpio_function_enable(TL_WA7210N_V2_GPIO_LNA_EN); ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_wmac(ee, mac); ++ ++ ath79_register_m25p80(&tl_wa7210n_v2_flash_data); ++ ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA7210N_V2, "TL-WA7210N-v2", "TP-LINK TL-WA7210N v2", ++ tl_wa7210n_v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa830re-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa830re-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa830re-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wa830re-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,132 @@ ++/* ++ * TP-LINK TL-WA830RE v2 board support ++ * ++ * Copyright (C) 2014 Fredrik Jonson ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WA830REV2_GPIO_LED_WLAN 13 ++#define TL_WA830REV2_GPIO_LED_QSS 15 ++#define TL_WA830REV2_GPIO_LED_LAN 18 ++#define TL_WA830REV2_GPIO_LED_SYSTEM 14 ++ ++#define TL_WA830REV2_GPIO_BTN_RESET 17 ++#define TL_WA830REV2_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */ ++ ++#define TL_WA830REV2_GPIO_USB_POWER 4 ++ ++#define TL_WA830REV2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA830REV2_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wa830re_v2_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wa830re_v2_flash_data = { ++ .part_probes = tl_wa830re_v2_part_probes, ++}; ++ ++static struct gpio_led tl_wa830re_v2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WA830REV2_GPIO_LED_QSS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WA830REV2_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan", ++ .gpio = TL_WA830REV2_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WA830REV2_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wa830re_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA830REV2_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "RFKILL switch", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA830REV2_GPIO_SW_RFKILL, ++ .active_low = 0, ++ } ++}; ++ ++static void __init tl_ap123_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* Disable JTAG, enabling GPIOs 0-3 */ ++ /* Configure OBS4 line, for GPIO 4*/ ++ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, ++ AR934X_GPIO_FUNC_CLK_OBS4_EN); ++ ++ /* config gpio4 as normal gpio function */ ++ ath79_gpio_output_select(TL_WA830REV2_GPIO_USB_POWER, ++ AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_m25p80(&tl_wa830re_v2_flash_data); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++static void __init tl_wa830re_v2_setup(void) ++{ ++ tl_ap123_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa830re_v2_leds_gpio) - 1, ++ tl_wa830re_v2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WA830REV2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wa830re_v2_gpio_keys), ++ tl_wa830re_v2_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA830RE_V2, "TL-WA830RE-v2", "TP-LINK TL-WA830RE v2", ++ tl_wa830re_v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,127 @@ ++/* ++ * TP-LINK TL-WA901N/ND v1, TL-WA7510N v1 board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2010 Pieter Hollants ++ * Copyright (C) 2012 Stefan Helmert ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define TL_WA901ND_GPIO_LED_QSS 0 ++#define TL_WA901ND_GPIO_LED_SYSTEM 1 ++#define TL_WA901ND_GPIO_LED_LAN 13 ++ ++#define TL_WA901ND_GPIO_BTN_RESET 11 ++#define TL_WA901ND_GPIO_BTN_QSS 12 ++ ++#define TL_WA901ND_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wa901nd_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wa901nd_flash_data = { ++ .part_probes = tl_wa901nd_part_probes, ++}; ++ ++static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan", ++ .gpio = TL_WA901ND_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WA901ND_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WA901ND_GPIO_LED_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA901ND_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA901ND_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init common_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ ++ /* ++ * ath79_eth0 would be the WAN port, but is not connected. ++ * ath79_eth1 connects to the internal switch chip, however ++ * we have a single LAN port only. ++ */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(&tl_wa901nd_flash_data); ++} ++ ++static void __init tl_wa901nd_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio), ++ tl_wa901nd_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wa901nd_gpio_keys), ++ tl_wa901nd_gpio_keys); ++ ++ ap91_pci_init(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND", ++ tl_wa901nd_setup); ++ ++static void __init tl_wa7510n_v1_setup(void) ++{ ++ common_setup(); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA7510N_V1, "TL-WA7510N", "TP-LINK TL-WA7510N v1", ++ tl_wa7510n_v1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wa901nd-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wa901nd-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,104 @@ ++/* ++ * TP-LINK TL-WA901N/ND v2 board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2010 Pieter Hollants ++ * Copyright (C) 2011 Jonathan Bennett ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WA901ND_V2_GPIO_LED_QSS 4 ++#define TL_WA901ND_V2_GPIO_LED_SYSTEM 2 ++#define TL_WA901ND_V2_GPIO_LED_WLAN 9 ++ ++#define TL_WA901ND_V2_GPIO_BTN_RESET 3 ++#define TL_WA901ND_V2_GPIO_BTN_QSS 7 ++ ++#define TL_WA901ND_V2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL \ ++ (3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wa901nd_v2_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wa901nd_v2_flash_data = { ++ .part_probes = tl_wa901nd_v2_part_probes, ++}; ++ ++static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:system", ++ .gpio = TL_WA901ND_V2_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WA901ND_V2_GPIO_LED_QSS, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WA901ND_V2_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA901ND_V2_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA901ND_V2_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init tl_wa901nd_v2_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = 0x00001000; ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | ++ AR71XX_RESET_GE0_PHY; ++ ath79_register_eth(0); ++ ++ ath79_register_m25p80(&tl_wa901nd_v2_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio), ++ tl_wa901nd_v2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wa901nd_v2_gpio_keys), ++ tl_wa901nd_v2_gpio_keys); ++ ++ ath79_register_wmac(eeprom, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V2, "TL-WA901ND-v2", ++ "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wax50re.c linux-4.1.13/arch/mips/ath79/mach-tl-wax50re.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wax50re.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wax50re.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,313 @@ ++/* ++ * TP-LINK TL-WA750RE v1/TL-WA801ND v2/TL-WA850RE v1/TL-WA901ND v3 ++ * board support ++ * ++ * Copyright (C) 2013 Martijn Zilverschoon ++ * Copyright (C) 2013 Jiri Pirko ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WAX50RE_GPIO_LED_LAN 20 ++#define TL_WAX50RE_GPIO_LED_WLAN 13 ++#define TL_WAX50RE_GPIO_LED_RE 15 ++#define TL_WAX50RE_GPIO_LED_SIGNAL1 0 ++#define TL_WAX50RE_GPIO_LED_SIGNAL2 1 ++#define TL_WAX50RE_GPIO_LED_SIGNAL3 2 ++#define TL_WAX50RE_GPIO_LED_SIGNAL4 3 ++#define TL_WAX50RE_GPIO_LED_SIGNAL5 4 ++ ++#define TL_WA860RE_GPIO_LED_WLAN_ORANGE 0 ++#define TL_WA860RE_GPIO_LED_WLAN_GREEN 2 ++#define TL_WA860RE_GPIO_LED_POWER_ORANGE 12 ++#define TL_WA860RE_GPIO_LED_POWER_GREEN 14 ++#define TL_WA860RE_GPIO_LED_LAN 20 ++ ++#define TL_WA801ND_V2_GPIO_LED_LAN 18 ++#define TL_WA801ND_V2_GPIO_LED_SYSTEM 14 ++ ++#define TL_WAX50RE_GPIO_BTN_RESET 17 ++#define TL_WAX50RE_GPIO_BTN_WPS 16 ++ ++#define TL_WA860RE_GPIO_BTN_RESET 17 ++#define TL_WA860RE_GPIO_BTN_WPS 16 ++#define TL_WA860RE_GPIO_BTN_ONOFF 11 ++ ++#define TL_WAX50RE_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL (3 * TL_WAX50RE_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wax50re_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wax50re_flash_data = { ++ .part_probes = tl_wax50re_part_probes, ++}; ++ ++static struct gpio_led tl_wa750re_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:orange:lan", ++ .gpio = TL_WAX50RE_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:wlan", ++ .gpio = TL_WAX50RE_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:re", ++ .gpio = TL_WAX50RE_GPIO_LED_RE, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:signal1", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:signal2", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:signal3", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:signal4", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:signal5", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL5, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led tl_wa850re_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:lan", ++ .gpio = TL_WAX50RE_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:wlan", ++ .gpio = TL_WAX50RE_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:re", ++ .gpio = TL_WAX50RE_GPIO_LED_RE, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:signal1", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:signal2", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:signal3", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:signal4", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:blue:signal5", ++ .gpio = TL_WAX50RE_GPIO_LED_SIGNAL5, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led tl_wa860re_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan", ++ .gpio = TL_WA860RE_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:power", ++ .gpio = TL_WA860RE_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:power", ++ .gpio = TL_WA860RE_GPIO_LED_POWER_ORANGE, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WA860RE_GPIO_LED_WLAN_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:orange:wlan", ++ .gpio = TL_WA860RE_GPIO_LED_WLAN_ORANGE, ++ .active_low = 1, ++ }, ++}; ++ ++ ++static struct gpio_keys_button tl_wax50re_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WAX50RE_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "WPS", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WAX50RE_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wa860re_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA860RE_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "WPS", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA860RE_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, { ++ .desc = "ONOFF", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WA860RE_GPIO_BTN_ONOFF, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led tl_wa801nd_v2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan", ++ .gpio = TL_WA801ND_V2_GPIO_LED_LAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WAX50RE_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WAX50RE_GPIO_LED_RE, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WA801ND_V2_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init tl_ap123_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&tl_wax50re_flash_data); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++static void __init tl_wa750re_setup(void) ++{ ++ tl_ap123_setup(); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa750re_leds_gpio), ++ tl_wa750re_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wax50re_gpio_keys), ++ tl_wax50re_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA750RE, "TL-WA750RE", "TP-LINK TL-WA750RE", ++ tl_wa750re_setup); ++ ++static void __init tl_wa801nd_v2_setup(void) ++{ ++ tl_ap123_setup(); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa801nd_v2_leds_gpio), ++ tl_wa801nd_v2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wax50re_gpio_keys), ++ tl_wax50re_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA801ND_V2, "TL-WA801ND-v2", "TP-LINK TL-WA801ND v2", ++ tl_wa801nd_v2_setup); ++ ++static void __init tl_wa850re_setup(void) ++{ ++ tl_ap123_setup(); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa850re_leds_gpio), ++ tl_wa850re_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wax50re_gpio_keys), ++ tl_wax50re_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA850RE, "TL-WA850RE", "TP-LINK TL-WA850RE", ++ tl_wa850re_setup); ++ ++static void __init tl_wa860re_setup(void) ++{ ++ tl_ap123_setup(); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa860re_leds_gpio), ++ tl_wa860re_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wa860re_gpio_keys), ++ tl_wa860re_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA860RE, "TL-WA860RE", "TP-LINK TL-WA860RE", ++ tl_wa860re_setup); ++ ++static void __init tl_wa901nd_v3_setup(void) ++{ ++ tl_ap123_setup(); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa801nd_v2_leds_gpio), ++ tl_wa801nd_v2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wax50re_gpio_keys) - 1, ++ tl_wax50re_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V3, "TL-WA901ND-v3", "TP-LINK TL-WA901ND v3", ++ tl_wa901nd_v3_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3320-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr3320-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3320-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr3320-v2.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,146 @@ ++/* ++ * TP-LINK TL-WDR3320 v2 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2015 Weijie Gao ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WDR3320_GPIO_LED_WLAN5G 12 ++#define WDR3320_GPIO_LED_SYSTEM 14 ++#define WDR3320_GPIO_LED_QSS 15 ++#define WDR3320_GPIO_LED_WAN 4 ++#define WDR3320_GPIO_LED_LAN1 18 ++#define WDR3320_GPIO_LED_LAN2 20 ++#define WDR3320_GPIO_LED_LAN3 21 ++#define WDR3320_GPIO_LED_LAN4 22 ++ ++#define WDR3320_GPIO_BTN_RESET 16 ++ ++#define WDR3320_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WDR3320_KEYS_DEBOUNCE_INTERVAL (3 * WDR3320_KEYS_POLL_INTERVAL) ++ ++#define WDR3320_WMAC_CALDATA_OFFSET 0x1000 ++#define WDR3320_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *wdr3320_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data wdr3320_flash_data = { ++ .part_probes = wdr3320_part_probes, ++}; ++ ++static struct gpio_led wdr3320_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:qss", ++ .gpio = WDR3320_GPIO_LED_QSS, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:system", ++ .gpio = WDR3320_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:wlan5g", ++ .gpio = WDR3320_GPIO_LED_WLAN5G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wdr3320_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WDR3320_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WDR3320_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init wdr3320_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&wdr3320_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3320_leds_gpio), ++ wdr3320_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WDR3320_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wdr3320_gpio_keys), ++ wdr3320_gpio_keys); ++ ++ ath79_init_mac(tmpmac, mac, 0); ++ ath79_register_wmac(art + WDR3320_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_init_mac(tmpmac, mac, -1); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++ ap91_pci_init(art + WDR3320_PCIE_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* LAN */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ++ /* GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++ ++ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN1, ++ AR934X_GPIO_OUT_LED_LINK0); ++ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN2, ++ AR934X_GPIO_OUT_LED_LINK1); ++ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN3, ++ AR934X_GPIO_OUT_LED_LINK2); ++ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN4, ++ AR934X_GPIO_OUT_LED_LINK3); ++ ath79_gpio_output_select(WDR3320_GPIO_LED_WAN, ++ AR934X_GPIO_OUT_LED_LINK4); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WDR3320_V2, "TL-WDR3320-v2", ++ "TP-LINK TL-WDR3320 v2", ++ wdr3320_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3500.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr3500.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr3500.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr3500.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,169 @@ ++/* ++ * TP-LINK TL-WDR3500 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2013 Gui Iribarren ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WDR3500_GPIO_LED_USB 11 ++#define WDR3500_GPIO_LED_WLAN2G 13 ++#define WDR3500_GPIO_LED_SYSTEM 14 ++#define WDR3500_GPIO_LED_QSS 15 ++#define WDR3500_GPIO_LED_WAN 18 ++#define WDR3500_GPIO_LED_LAN1 19 ++#define WDR3500_GPIO_LED_LAN2 20 ++#define WDR3500_GPIO_LED_LAN3 21 ++#define WDR3500_GPIO_LED_LAN4 22 ++ ++#define WDR3500_GPIO_BTN_WPS 16 ++#define WDR3500_GPIO_BTN_RFKILL 17 ++ ++#define WDR3500_GPIO_USB_POWER 12 ++ ++#define WDR3500_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WDR3500_KEYS_DEBOUNCE_INTERVAL (3 * WDR3500_KEYS_POLL_INTERVAL) ++ ++#define WDR3500_MAC0_OFFSET 0 ++#define WDR3500_MAC1_OFFSET 6 ++#define WDR3500_WMAC_CALDATA_OFFSET 0x1000 ++#define WDR3500_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *wdr3500_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data wdr3500_flash_data = { ++ .part_probes = wdr3500_part_probes, ++}; ++ ++static struct gpio_led wdr3500_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:qss", ++ .gpio = WDR3500_GPIO_LED_QSS, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:system", ++ .gpio = WDR3500_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:usb", ++ .gpio = WDR3500_GPIO_LED_USB, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:wlan2g", ++ .gpio = WDR3500_GPIO_LED_WLAN2G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = { ++ { ++ .desc = "QSS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WDR3500_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL switch", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WDR3500_GPIO_BTN_RFKILL, ++ }, ++}; ++ ++ ++static void __init wdr3500_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&wdr3500_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio), ++ wdr3500_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wdr3500_gpio_keys), ++ wdr3500_gpio_keys); ++ ++ ath79_init_mac(tmpmac, mac, 0); ++ ath79_register_wmac(art + WDR3500_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_init_mac(tmpmac, mac, 1); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++ ap91_pci_init(art + WDR3500_PCIE_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* LAN */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2); ++ ++ /* GMAC0 is connected to the PHY4 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ ath79_register_eth(0); ++ ++ gpio_request_one(WDR3500_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1, ++ AR934X_GPIO_OUT_LED_LINK3); ++ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2, ++ AR934X_GPIO_OUT_LED_LINK2); ++ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3, ++ AR934X_GPIO_OUT_LED_LINK1); ++ ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4, ++ AR934X_GPIO_OUT_LED_LINK0); ++ ath79_gpio_output_select(WDR3500_GPIO_LED_WAN, ++ AR934X_GPIO_OUT_LED_LINK4); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500", ++ "TP-LINK TL-WDR3500", ++ wdr3500_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr4300.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr4300.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr4300.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr4300.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,206 @@ ++/* ++ * TP-LINK TL-WDR4300 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WDR4300_GPIO_LED_USB1 11 ++#define WDR4300_GPIO_LED_USB2 12 ++#define WDR4300_GPIO_LED_WLAN2G 13 ++#define WDR4300_GPIO_LED_SYSTEM 14 ++#define WDR4300_GPIO_LED_QSS 15 ++ ++#define WDR4300_GPIO_BTN_WPS 16 ++#define WDR4300_GPIO_BTN_RFKILL 17 ++ ++#define WDR4300_GPIO_EXTERNAL_LNA0 18 ++#define WDR4300_GPIO_EXTERNAL_LNA1 19 ++ ++#define WDR4300_GPIO_USB1_POWER 22 ++#define WDR4300_GPIO_USB2_POWER 21 ++ ++#define WDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WDR4300_KEYS_POLL_INTERVAL) ++ ++#define WDR4300_MAC0_OFFSET 0 ++#define WDR4300_MAC1_OFFSET 6 ++#define WDR4300_WMAC_CALDATA_OFFSET 0x1000 ++#define WDR4300_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *wdr4300_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data wdr4300_flash_data = { ++ .part_probes = wdr4300_part_probes, ++}; ++ ++static struct gpio_led wdr4300_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:qss", ++ .gpio = WDR4300_GPIO_LED_QSS, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:system", ++ .gpio = WDR4300_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:usb1", ++ .gpio = WDR4300_GPIO_LED_USB1, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:usb2", ++ .gpio = WDR4300_GPIO_LED_USB2, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:wlan2g", ++ .gpio = WDR4300_GPIO_LED_WLAN2G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = { ++ { ++ .desc = "QSS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WDR4300_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL switch", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WDR4300_GPIO_BTN_RFKILL, ++ .active_low = 1, ++ }, ++}; ++ ++static const struct ar8327_led_info wdr4300_leds_ar8327[] __initconst = { ++ AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), ++ AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), ++ AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), ++ AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), ++ AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), ++}; ++ ++static struct ar8327_pad_cfg wdr4300_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg wdr4300_ar8327_led_cfg = { ++ .led_ctrl0 = 0xc737c737, ++ .led_ctrl1 = 0x00000000, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x0030c300, ++ .open_drain = false, ++}; ++ ++static struct ar8327_platform_data wdr4300_ar8327_data = { ++ .pad0_cfg = &wdr4300_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &wdr4300_ar8327_led_cfg, ++ .num_leds = ARRAY_SIZE(wdr4300_leds_ar8327), ++ .leds = wdr4300_leds_ar8327, ++}; ++ ++static struct mdio_board_info wdr4300_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wdr4300_ar8327_data, ++ }, ++}; ++ ++static void __init wdr4300_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&wdr4300_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio), ++ wdr4300_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wdr4300_gpio_keys), ++ wdr4300_gpio_keys); ++ ++ ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0); ++ ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1); ++ ++ ath79_init_mac(tmpmac, mac, -1); ++ ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_init_mac(tmpmac, mac, 0); ++ ap9x_pci_setup_wmac_led_pin(0, 0); ++ ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ++ mdiobus_register_board_info(wdr4300_mdio0_info, ++ ARRAY_SIZE(wdr4300_mdio0_info)); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2); ++ ++ /* GMAC0 is connected to an AR8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ gpio_request_one(WDR4300_GPIO_USB1_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB1 power"); ++ gpio_request_one(WDR4300_GPIO_USB2_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB2 power"); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WDR4300, "TL-WDR4300", ++ "TP-LINK TL-WDR3600/4300/4310", ++ wdr4300_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr6500-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wdr6500-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wdr6500-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wdr6500-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,141 @@ ++/* ++ * TP-LINK TL-WDR6500 v2 ++ * ++ * Copyright (C) 2015 Weijie Gao ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define TL_WDR6500_V2_GPIO_LED_SYS 21 ++#define TL_WDR6500_V2_GPIO_LED_WAN 18 ++#define TL_WDR6500_V2_GPIO_LED_LAN1 17 ++#define TL_WDR6500_V2_GPIO_LED_LAN2 16 ++#define TL_WDR6500_V2_GPIO_LED_LAN3 15 ++#define TL_WDR6500_V2_GPIO_LED_LAN4 14 ++ ++#define TL_WDR6500_V2_GPIO_BTN_RESET 1 ++ ++#define TL_WDR6500_V2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WDR6500_V2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WDR6500_V2_KEYS_POLL_INTERVAL) ++ ++#define TL_WDR6500_V2_WMAC_CALDATA_OFFSET 0x1000 ++#define TL_WDR6500_V2_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *tl_wdr6500_v2_part_probes[] = { ++ "tp-link-64k", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wdr6500_v2_flash_data = { ++ .part_probes = tl_wdr6500_v2_part_probes, ++}; ++ ++static struct gpio_led tl_wdr6500_v2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan1", ++ .gpio = TL_WDR6500_V2_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan2", ++ .gpio = TL_WDR6500_V2_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan3", ++ .gpio = TL_WDR6500_V2_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan4", ++ .gpio = TL_WDR6500_V2_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wan", ++ .gpio = TL_WDR6500_V2_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:white:system", ++ .gpio = TL_WDR6500_V2_GPIO_LED_SYS, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wdr6500_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WDR6500_V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WDR6500_V2_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++ ++static void __init tl_ap151_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f00fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&tl_wdr6500_v2_flash_data); ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* WAN */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_register_eth(0); ++ ++ /* LAN */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_eth(1); ++ ++ ath79_init_mac(tmpmac, mac, -1); ++ ath79_register_wmac(ee + TL_WDR6500_V2_WMAC_CALDATA_OFFSET, tmpmac); ++ ++ ath79_register_pci(); ++ ++ ath79_register_usb(); ++} ++ ++static void __init tl_wdr6500_v2_setup(void) ++{ ++ tl_ap151_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wdr6500_v2_leds_gpio), ++ tl_wdr6500_v2_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WDR6500_V2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wdr6500_v2_gpio_keys), ++ tl_wdr6500_v2_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WDR6500_V2, "TL-WDR6500-v2", "TP-LINK TL-WDR6500 v2", ++ tl_wdr6500_v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1041n-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wr1041n-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1041n-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr1041n-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,138 @@ ++/* ++ * TP-LINK TL-WR1041 v2 board support ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * Copyright (C) 2011-2012 Anan Huang ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR1041NV2_GPIO_BTN_RESET 14 ++#define TL_WR1041NV2_GPIO_LED_WPS 13 ++#define TL_WR1041NV2_GPIO_LED_WLAN 11 ++ ++#define TL_WR1041NV2_GPIO_LED_SYSTEM 12 ++ ++#define TL_WR1041NV2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1041NV2_KEYS_POLL_INTERVAL) ++ ++#define TL_WR1041NV2_PCIE_CALDATA_OFFSET 0x5000 ++ ++static const char *tl_wr1041nv2_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr1041nv2_flash_data = { ++ .part_probes = tl_wr1041nv2_part_probes, ++}; ++ ++static struct gpio_led tl_wr1041nv2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR1041NV2_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wps", ++ .gpio = TL_WR1041NV2_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR1041NV2_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_wr1041nv2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR1041NV2_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_platform_data db120_ar8327_data = { ++ .pad0_cfg = &db120_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ } ++}; ++ ++static struct mdio_board_info db120_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &db120_ar8327_data, ++ }, ++}; ++ ++static void __init tl_wr1041nv2_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&tl_wr1041nv2_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio), ++ tl_wr1041nv2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr1041nv2_gpio_keys), ++ tl_wr1041nv2_gpio_keys); ++ ath79_register_wmac(ee, mac); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ++ mdiobus_register_board_info(db120_mdio0_info, ++ ARRAY_SIZE(db120_mdio0_info)); ++ ++ /* GMAC0 is connected to an AR8327 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR1041N_V2, "TL-WR1041N-v2", ++ "TP-LINK TL-WR1041N v2", tl_wr1041nv2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,141 @@ ++/* ++ * TP-LINK TL-WR1043N/ND board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR1043ND_GPIO_LED_USB 1 ++#define TL_WR1043ND_GPIO_LED_SYSTEM 2 ++#define TL_WR1043ND_GPIO_LED_QSS 5 ++#define TL_WR1043ND_GPIO_LED_WLAN 9 ++ ++#define TL_WR1043ND_GPIO_BTN_RESET 3 ++#define TL_WR1043ND_GPIO_BTN_QSS 7 ++ ++#define TL_WR1043ND_GPIO_RTL8366_SDA 18 ++#define TL_WR1043ND_GPIO_RTL8366_SCK 19 ++ ++#define TL_WR1043ND_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr1043nd_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr1043nd_flash_data = { ++ .part_probes = tl_wr1043nd_part_probes, ++}; ++ ++static struct gpio_led tl_wr1043nd_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:usb", ++ .gpio = TL_WR1043ND_GPIO_LED_USB, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR1043ND_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR1043ND_GPIO_LED_QSS, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR1043ND_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR1043ND_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR1043ND_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static void tl_wr1043nd_rtl8366rb_hw_reset(bool active) ++{ ++ if (active) ++ ath79_device_reset_set(AR71XX_RESET_GE0_PHY); ++ else ++ ath79_device_reset_clear(AR71XX_RESET_GE0_PHY); ++} ++ ++static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = { ++ .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA, ++ .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK, ++ .hw_reset = tl_wr1043nd_rtl8366rb_hw_reset, ++}; ++ ++static struct platform_device tl_wr1043nd_rtl8366rb_device = { ++ .name = RTL8366RB_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &tl_wr1043nd_rtl8366rb_data, ++ } ++}; ++ ++static void __init tl_wr1043nd_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ tl_wr1043nd_rtl8366rb_hw_reset(true); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_pll_data.pll_1000 = 0x1a000000; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(&tl_wr1043nd_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio), ++ tl_wr1043nd_leds_gpio); ++ ++ platform_device_register(&tl_wr1043nd_rtl8366rb_device); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr1043nd_gpio_keys), ++ tl_wr1043nd_gpio_keys); ++ ++ ath79_register_wmac(eeprom, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND", ++ tl_wr1043nd_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd-v2.c linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd-v2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr1043nd-v2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr1043nd-v2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,215 @@ ++/* ++ * TP-LINK TL-WR1043ND v2 board support ++ * ++ * Copyright (c) 2013 Gabor Juhos ++ * ++ * Based on the Qualcomm Atheros AP135/AP136 reference board support code ++ * Copyright (c) 2012 Qualcomm Atheros ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR1043_V2_GPIO_LED_WLAN 12 ++#define TL_WR1043_V2_GPIO_LED_USB 15 ++#define TL_WR1043_V2_GPIO_LED_WPS 18 ++#define TL_WR1043_V2_GPIO_LED_SYSTEM 19 ++ ++#define TL_WR1043_V2_GPIO_BTN_RESET 16 ++#define TL_WR1043_V2_GPIO_BTN_RFKILL 17 ++ ++#define TL_WR1043_V2_GPIO_USB_POWER 21 ++ ++#define TL_WR1043_V2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043_V2_KEYS_POLL_INTERVAL) ++ ++#define TL_WR1043_V2_WMAC_CALDATA_OFFSET 0x1000 ++ ++static const char *wr1043nd_v2_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data wr1043nd_v2_flash_data = { ++ .part_probes = wr1043nd_v2_part_probes, ++}; ++ ++static struct gpio_led tl_wr1043_v2_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:wps", ++ .gpio = TL_WR1043_V2_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR1043_V2_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR1043_V2_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:green:usb", ++ .gpio = TL_WR1043_V2_GPIO_LED_USB, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr1043_v2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR1043_V2_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR1043_V2_GPIO_BTN_RFKILL, ++ .active_low = 1, ++ }, ++}; ++ ++static const struct ar8327_led_info tl_wr1043_leds_ar8327[] = { ++ AR8327_LED_INFO(PHY0_0, HW, "tp-link:green:lan4"), ++ AR8327_LED_INFO(PHY1_0, HW, "tp-link:green:lan3"), ++ AR8327_LED_INFO(PHY2_0, HW, "tp-link:green:lan2"), ++ AR8327_LED_INFO(PHY3_0, HW, "tp-link:green:lan1"), ++ AR8327_LED_INFO(PHY4_0, HW, "tp-link:green:wan"), ++}; ++ ++/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ ++static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_SGMII, ++ .sgmii_delay_en = true, ++}; ++ ++/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ ++static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad6_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg wr1043nd_v2_ar8327_led_cfg = { ++ .led_ctrl0 = 0xcc35cc35, ++ .led_ctrl1 = 0xca35ca35, ++ .led_ctrl2 = 0xc935c935, ++ .led_ctrl3 = 0x03ffff00, ++ .open_drain = true, ++}; ++ ++static struct ar8327_platform_data wr1043nd_v2_ar8327_data = { ++ .pad0_cfg = &wr1043nd_v2_ar8327_pad0_cfg, ++ .pad6_cfg = &wr1043nd_v2_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &wr1043nd_v2_ar8327_led_cfg, ++ .num_leds = ARRAY_SIZE(tl_wr1043_leds_ar8327), ++ .leds = tl_wr1043_leds_ar8327, ++}; ++ ++static struct mdio_board_info wr1043nd_v2_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wr1043nd_v2_ar8327_data, ++ }, ++}; ++ ++static void __init tl_wr1043nd_v2_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(&wr1043nd_v2_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043_v2_leds_gpio), ++ tl_wr1043_v2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_WR1043_V2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr1043_v2_gpio_keys), ++ tl_wr1043_v2_gpio_keys); ++ ++ ath79_register_wmac(art + TL_WR1043_V2_WMAC_CALDATA_OFFSET, mac); ++ ++ mdiobus_register_board_info(wr1043nd_v2_mdio0_info, ++ ARRAY_SIZE(wr1043nd_v2_mdio0_info)); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x56000000; ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ++ gpio_request_one(TL_WR1043_V2_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR1043ND_V2, "TL-WR1043ND-v2", ++ "TP-LINK TL-WR1043ND v2", tl_wr1043nd_v2_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr2543n.c linux-4.1.13/arch/mips/ath79/mach-tl-wr2543n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr2543n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr2543n.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,156 @@ ++/* ++ * TP-LINK TL-WR2543N/ND board support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define TL_WR2543N_GPIO_LED_WPS 0 ++#define TL_WR2543N_GPIO_LED_USB 8 ++ ++/* The WLAN LEDs use GPIOs on the discrete AR9380 wmac */ ++#define TL_WR2543N_GPIO_WMAC_LED_WLAN2G 0 ++#define TL_WR2543N_GPIO_WMAC_LED_WLAN5G 1 ++ ++#define TL_WR2543N_GPIO_BTN_RESET 11 ++#define TL_WR2543N_GPIO_BTN_WPS 12 ++ ++#define TL_WR2543N_GPIO_RTL8367_SDA 1 ++#define TL_WR2543N_GPIO_RTL8367_SCK 6 ++ ++#define TL_WR2543N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR2543N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR2543N_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr2543n_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr2543n_flash_data = { ++ .part_probes = tl_wr2543n_part_probes, ++}; ++ ++static struct gpio_led tl_wr2543n_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:usb", ++ .gpio = TL_WR2543N_GPIO_LED_USB, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wps", ++ .gpio = TL_WR2543N_GPIO_LED_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led tl_wr2543n_wmac_leds_gpio[] = { ++ { ++ .name = "tp-link:green:wlan5g", ++ .gpio = TL_WR2543N_GPIO_WMAC_LED_WLAN5G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr2543n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR2543N_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR2543N_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static struct rtl8367_extif_config tl_wr2543n_rtl8367_extif0_cfg = { ++ .mode = RTL8367_EXTIF_MODE_RGMII, ++ .txdelay = 1, ++ .rxdelay = 0, ++ .ability = { ++ .force_mode = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ .link = 1, ++ .duplex = 1, ++ .speed = RTL8367_PORT_SPEED_1000, ++ }, ++}; ++ ++static struct rtl8367_platform_data tl_wr2543n_rtl8367_data = { ++ .gpio_sda = TL_WR2543N_GPIO_RTL8367_SDA, ++ .gpio_sck = TL_WR2543N_GPIO_RTL8367_SCK, ++ .extif0_cfg = &tl_wr2543n_rtl8367_extif0_cfg, ++}; ++ ++static struct platform_device tl_wr2543n_rtl8367_device = { ++ .name = RTL8367_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &tl_wr2543n_rtl8367_data, ++ } ++}; ++ ++static void __init tl_wr2543n_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&tl_wr2543n_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr2543n_leds_gpio), ++ tl_wr2543n_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_WR2543N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr2543n_gpio_keys), ++ tl_wr2543n_gpio_keys); ++ ath79_register_usb(); ++ ++ /* ++ * The ath9k driver uses this pin for its default led device, which is ++ * named ath9k-phy0, and reflects activity on either the 2 GHz or 5 GHz ++ * bands. This pin is connected to the WR2543's 2GHz WLAN LED. ++ */ ++ ap9x_pci_setup_wmac_led_pin(0, TL_WR2543N_GPIO_WMAC_LED_WLAN2G); ++ ++ /* ++ * We also have the driver set up an led device for the WR2543's ++ * separate 5 GHz WLAN LED in case the user wants it. ++ */ ++ ap9x_pci_setup_wmac_leds(0, tl_wr2543n_wmac_leds_gpio, ++ ARRAY_SIZE(tl_wr2543n_wmac_leds_gpio)); ++ ap91_pci_init(eeprom, mac); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); ++ ath79_eth0_data.mii_bus_dev = &tl_wr2543n_rtl8367_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_pll_data.pll_1000 = 0x1a000000; ++ ++ ath79_register_eth(0); ++ ++ platform_device_register(&tl_wr2543n_rtl8367_device); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR2543N, "TL-WR2543N", "TP-LINK TL-WR2543N/ND", ++ tl_wr2543n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr703n.c linux-4.1.13/arch/mips/ath79/mach-tl-wr703n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr703n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr703n.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,118 @@ ++/* ++ * TP-LINK TL-WR703N/TL-MR10U board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR703N_GPIO_LED_SYSTEM 27 ++#define TL_WR703N_GPIO_BTN_RESET 11 ++ ++#define TL_WR703N_GPIO_USB_POWER 8 ++ ++#define TL_MR10U_GPIO_USB_POWER 18 ++ ++#define TL_WR703N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR703N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR703N_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr703n_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr703n_flash_data = { ++ .part_probes = tl_wr703n_part_probes, ++}; ++ ++static struct gpio_led tl_wr703n_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:system", ++ .gpio = TL_WR703N_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr703n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR703N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR703N_GPIO_BTN_RESET, ++ .active_low = 0, ++ } ++}; ++ ++static void __init common_setup(unsigned usb_power_gpio, bool sec_ethernet) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_m25p80(&tl_wr703n_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), ++ tl_wr703n_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr703n_gpio_keys), ++ tl_wr703n_gpio_keys); ++ ++ gpio_request_one(usb_power_gpio, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ++ if (sec_ethernet) ++ { ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ath79_register_eth(1); ++ } ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++static void __init tl_mr10u_setup(void) ++{ ++ common_setup(TL_MR10U_GPIO_USB_POWER, false); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR10U, "TL-MR10U", "TP-LINK TL-MR10U", ++ tl_mr10u_setup); ++ ++static void __init tl_wr703n_setup(void) ++{ ++ common_setup(TL_WR703N_GPIO_USB_POWER, false); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR703N, "TL-WR703N", "TP-LINK TL-WR703N v1", ++ tl_wr703n_setup); ++ ++static void __init tl_wr710n_setup(void) ++{ ++ common_setup(TL_WR703N_GPIO_USB_POWER, true); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR710N, "TL-WR710N", "TP-LINK TL-WR710N v1", ++ tl_wr710n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr720n-v3.c linux-4.1.13/arch/mips/ath79/mach-tl-wr720n-v3.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr720n-v3.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr720n-v3.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,108 @@ ++/* ++ * TP-LINK TL-WR720N board support ++ * ++ * Copyright (C) 2011 dongyuqi <729650915@qq.com> ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (C) 2013 yousong ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR720N_GPIO_LED_SYSTEM 27 ++#define TL_WR720N_GPIO_BTN_RESET 11 ++#define TL_WR720N_GPIO_BTN_SW1 18 ++#define TL_WR720N_GPIO_BTN_SW2 20 ++ ++#define TL_WR720N_GPIO_USB_POWER 8 ++ ++#define TL_WR720N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR720N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR720N_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr720n_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr720n_flash_data = { ++ .part_probes = tl_wr720n_part_probes, ++}; ++ ++static struct gpio_led tl_wr720n_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:system", ++ .gpio = TL_WR720N_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr720n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR720N_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, { ++ .desc = "sw1", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR720N_GPIO_BTN_SW1, ++ .active_low = 0, ++ }, { ++ .desc = "sw2", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR720N_GPIO_BTN_SW2, ++ .active_low = 0, ++ } ++}; ++ ++static void __init tl_wr720n_v3_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_m25p80(&tl_wr720n_flash_data); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr720n_leds_gpio), ++ tl_wr720n_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TL_WR720N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr720n_gpio_keys), ++ tl_wr720n_gpio_keys); ++ ++ gpio_request_one(TL_WR720N_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR720N_V3, "TL-WR720N-v3", "TP-LINK TL-WR720N v3/v4", ++ tl_wr720n_v3_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,130 @@ ++/* ++ * TP-LINK TL-WR741ND board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define TL_WR741ND_GPIO_LED_QSS 0 ++#define TL_WR741ND_GPIO_LED_SYSTEM 1 ++#define TL_WR741ND_GPIO_LED_LAN1 13 ++#define TL_WR741ND_GPIO_LED_LAN2 14 ++#define TL_WR741ND_GPIO_LED_LAN3 15 ++#define TL_WR741ND_GPIO_LED_LAN4 16 ++#define TL_WR741ND_GPIO_LED_WAN 17 ++ ++#define TL_WR741ND_GPIO_BTN_RESET 11 ++#define TL_WR741ND_GPIO_BTN_QSS 12 ++ ++#define TL_WR741ND_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr741nd_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr741nd_flash_data = { ++ .part_probes = tl_wr741nd_part_probes, ++}; ++ ++static struct gpio_led tl_wr741nd_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan1", ++ .gpio = TL_WR741ND_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan2", ++ .gpio = TL_WR741ND_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan3", ++ .gpio = TL_WR741ND_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan4", ++ .gpio = TL_WR741ND_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR741ND_GPIO_LED_QSS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR741ND_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wan", ++ .gpio = TL_WR741ND_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR741ND_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR741ND_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init tl_wr741nd_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&tl_wr741nd_flash_data); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio), ++ tl_wr741nd_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr741nd_gpio_keys), ++ tl_wr741nd_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 1); ++ ap91_pci_init(ee, mac); ++} ++MIPS_MACHINE(ATH79_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND", ++ tl_wr741nd_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd-v4.c linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd-v4.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr741nd-v4.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr741nd-v4.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,187 @@ ++/* ++ * TP-LINK TL-WR741ND v4/TL-MR3220 v2 board support ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR741NDV4_GPIO_BTN_RESET 11 ++#define TL_WR741NDV4_GPIO_BTN_WPS 26 ++ ++#define TL_WR741NDV4_GPIO_LED_WLAN 0 ++#define TL_WR741NDV4_GPIO_LED_QSS 1 ++#define TL_WR741NDV4_GPIO_LED_WAN 13 ++#define TL_WR741NDV4_GPIO_LED_LAN1 14 ++#define TL_WR741NDV4_GPIO_LED_LAN2 15 ++#define TL_WR741NDV4_GPIO_LED_LAN3 16 ++#define TL_WR741NDV4_GPIO_LED_LAN4 17 ++#define TL_WR741NDV4_GPIO_LED_SYSTEM 27 ++ ++#define TL_MR3220V2_GPIO_BTN_WPS 11 ++#define TL_MR3220V2_GPIO_BTN_WIFI 24 ++ ++#define TL_MR3220V2_GPIO_LED_3G 26 ++#define TL_MR3220V2_GPIO_USB_POWER 8 ++ ++#define TL_WR741NDV4_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741NDV4_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr741ndv4_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr741ndv4_flash_data = { ++ .part_probes = tl_wr741ndv4_part_probes, ++}; ++ ++static struct gpio_led tl_wr741ndv4_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan1", ++ .gpio = TL_WR741NDV4_GPIO_LED_LAN1, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:lan2", ++ .gpio = TL_WR741NDV4_GPIO_LED_LAN2, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:lan3", ++ .gpio = TL_WR741NDV4_GPIO_LED_LAN3, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:lan4", ++ .gpio = TL_WR741NDV4_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR741NDV4_GPIO_LED_QSS, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR741NDV4_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wan", ++ .gpio = TL_WR741NDV4_GPIO_LED_WAN, ++ .active_low = 0, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR741NDV4_GPIO_LED_WLAN, ++ .active_low = 0, ++ }, { ++ /* the 3G LED is only present on the MR3220 v2 */ ++ .name = "tp-link:green:3g", ++ .gpio = TL_MR3220V2_GPIO_LED_3G, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr741ndv4_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR741NDV4_GPIO_BTN_RESET, ++ .active_low = 0, ++ }, { ++ .desc = "WPS", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR741NDV4_GPIO_BTN_WPS, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button tl_mr3220v2_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3220V2_GPIO_BTN_WPS, ++ .active_low = 0, ++ }, { ++ .desc = "WIFI button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_MR3220V2_GPIO_BTN_WIFI, ++ .active_low = 0, ++ } ++}; ++ ++static void __init tl_ap121_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_setup_ar933x_phy4_switch(true, true); ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_m25p80(&tl_wr741ndv4_flash_data); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++static void __init tl_wr741ndv4_setup(void) ++{ ++ tl_ap121_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio) - 1, ++ tl_wr741ndv4_leds_gpio); ++ ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr741ndv4_gpio_keys), ++ tl_wr741ndv4_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR741ND_V4, "TL-WR741ND-v4", ++ "TP-LINK TL-WR741ND v4", tl_wr741ndv4_setup); ++ ++static void __init tl_mr3220v2_setup(void) ++{ ++ tl_ap121_setup(); ++ ++ gpio_request_one(TL_MR3220V2_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio), ++ tl_wr741ndv4_leds_gpio); ++ ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr3220v2_gpio_keys), ++ tl_mr3220v2_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3220_V2, "TL-MR3220-v2", ++ "TP-LINK TL-MR3220 v2", tl_mr3220v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n.c linux-4.1.13/arch/mips/ath79/mach-tl-wr841n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr841n.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,140 @@ ++/* ++ * TP-LINK TL-WR841N/ND v1 board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-dsa.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2 ++#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4 ++#define TL_WR841ND_V1_GPIO_LED_QSS_RED 5 ++ ++#define TL_WR841ND_V1_GPIO_BTN_RESET 3 ++#define TL_WR841ND_V1_GPIO_BTN_QSS 7 ++ ++#define TL_WR841ND_V1_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \ ++ (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL) ++ ++static struct mtd_partition tl_wr841n_v1_partitions[] = { ++ { ++ .name = "redboot", ++ .offset = 0, ++ .size = 0x020000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "kernel", ++ .offset = 0x020000, ++ .size = 0x140000, ++ }, { ++ .name = "rootfs", ++ .offset = 0x160000, ++ .size = 0x280000, ++ }, { ++ .name = "config", ++ .offset = 0x3e0000, ++ .size = 0x020000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x020000, ++ .size = 0x3c0000, ++ } ++}; ++ ++static struct flash_platform_data tl_wr841n_v1_flash_data = { ++ .parts = tl_wr841n_v1_partitions, ++ .nr_parts = ARRAY_SIZE(tl_wr841n_v1_partitions), ++}; ++ ++static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR841ND_V1_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:red:qss", ++ .gpio = TL_WR841ND_V1_GPIO_LED_QSS_RED, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR841ND_V1_GPIO_LED_QSS_GREEN, ++ } ++}; ++ ++static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841ND_V1_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841ND_V1_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static struct dsa_chip_data tl_wr841n_v1_dsa_chip = { ++ .port_names[0] = "wan", ++ .port_names[1] = "lan1", ++ .port_names[2] = "lan2", ++ .port_names[3] = "lan3", ++ .port_names[4] = "lan4", ++ .port_names[5] = "cpu", ++}; ++ ++static struct dsa_platform_data tl_wr841n_v1_dsa_data = { ++ .nr_chips = 1, ++ .chip = &tl_wr841n_v1_dsa_chip, ++}; ++ ++static void __init tl_wr841n_v1_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, ++ &tl_wr841n_v1_dsa_data); ++ ++ ath79_register_m25p80(&tl_wr841n_v1_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio), ++ tl_wr841n_v1_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr841n_v1_gpio_keys), ++ tl_wr841n_v1_gpio_keys); ++ ath79_register_pci(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1", ++ tl_wr841n_v1_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v8.c linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v8.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v8.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v8.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,286 @@ ++/* ++ * TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR841NV8_GPIO_LED_WLAN 13 ++#define TL_WR841NV8_GPIO_LED_QSS 15 ++#define TL_WR841NV8_GPIO_LED_WAN 18 ++#define TL_WR841NV8_GPIO_LED_LAN1 19 ++#define TL_WR841NV8_GPIO_LED_LAN2 20 ++#define TL_WR841NV8_GPIO_LED_LAN3 21 ++#define TL_WR841NV8_GPIO_LED_LAN4 12 ++#define TL_WR841NV8_GPIO_LED_SYSTEM 14 ++ ++#define TL_WR841NV8_GPIO_BTN_RESET 17 ++#define TL_WR841NV8_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */ ++ ++#define TL_MR3420V2_GPIO_LED_3G 11 ++#define TL_MR3420V2_GPIO_USB_POWER 4 ++ ++#define TL_WR941NDV5_GPIO_LED_WLAN 13 ++#define TL_WR941NDV5_GPIO_LED_QSS 15 ++#define TL_WR941NDV5_GPIO_LED_WAN 18 ++#define TL_WR941NDV5_GPIO_LED_LAN1 19 ++#define TL_WR941NDV5_GPIO_LED_LAN2 20 ++#define TL_WR941NDV5_GPIO_LED_LAN3 2 ++#define TL_WR941NDV5_GPIO_LED_LAN4 3 ++#define TL_WR941NDV5_GPIO_LED_SYSTEM 14 ++ ++#define TL_WR841NV8_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV8_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr841n_v8_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr841n_v8_flash_data = { ++ .part_probes = tl_wr841n_v8_part_probes, ++}; ++ ++static struct gpio_led tl_wr841n_v8_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan1", ++ .gpio = TL_WR841NV8_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan2", ++ .gpio = TL_WR841NV8_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan3", ++ .gpio = TL_WR841NV8_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan4", ++ .gpio = TL_WR841NV8_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR841NV8_GPIO_LED_QSS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR841NV8_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wan", ++ .gpio = TL_WR841NV8_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR841NV8_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ /* the 3G LED is only present on the MR3420 v2 */ ++ .name = "tp-link:green:3g", ++ .gpio = TL_MR3420V2_GPIO_LED_3G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr841n_v8_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841NV8_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "RFKILL switch", ++ .type = EV_SW, ++ .code = KEY_RFKILL, ++ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841NV8_GPIO_SW_RFKILL, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button tl_mr3420v2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841NV8_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "WPS", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841NV8_GPIO_SW_RFKILL, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_led tl_wr941nd_v5_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan1", ++ .gpio = TL_WR941NDV5_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan2", ++ .gpio = TL_WR941NDV5_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan3", ++ .gpio = TL_WR941NDV5_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan4", ++ .gpio = TL_WR941NDV5_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR941NDV5_GPIO_LED_QSS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR941NDV5_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wan", ++ .gpio = TL_WR941NDV5_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR941NDV5_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init tl_ap123_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ /* Disable JTAG, enabling GPIOs 0-3 */ ++ /* Configure OBS4 line, for GPIO 4*/ ++ ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, ++ AR934X_GPIO_FUNC_CLK_OBS4_EN); ++ ++ /* config gpio4 as normal gpio function */ ++ ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER, ++ AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_m25p80(&tl_wr841n_v8_flash_data); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++} ++ ++static void __init tl_wr841n_v8_setup(void) ++{ ++ tl_ap123_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio) - 1, ++ tl_wr841n_v8_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr841n_v8_gpio_keys), ++ tl_wr841n_v8_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR841N_V8, "TL-WR841N-v8", "TP-LINK TL-WR841N/ND v8", ++ tl_wr841n_v8_setup); ++ ++ ++static void __init tl_wr842n_v2_setup(void) ++{ ++ tl_ap123_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), ++ tl_wr841n_v8_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr841n_v8_gpio_keys), ++ tl_wr841n_v8_gpio_keys); ++ ++ gpio_request_one(TL_MR3420V2_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR842N_V2, "TL-WR842N-v2", "TP-LINK TL-WR842N/ND v2", ++ tl_wr842n_v2_setup); ++ ++static void __init tl_mr3420v2_setup(void) ++{ ++ tl_ap123_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), ++ tl_wr841n_v8_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_mr3420v2_gpio_keys), ++ tl_mr3420v2_gpio_keys); ++ ++ /* enable power for the USB port */ ++ gpio_request_one(TL_MR3420V2_GPIO_USB_POWER, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_MR3420_V2, "TL-MR3420-v2", "TP-LINK TL-MR3420 v2", ++ tl_mr3420v2_setup); ++ ++ ++static void __init tl_wr941nd_v5_setup(void) ++{ ++ tl_ap123_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_v5_leds_gpio), ++ tl_wr941nd_v5_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr841n_v8_gpio_keys), ++ tl_wr841n_v8_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR941ND_V5, "TL-WR941ND-v5", "TP-LINK TL-WR941N/ND v5", ++ tl_wr941nd_v5_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v9.c linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v9.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr841n-v9.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr841n-v9.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,144 @@ ++/* ++ * TP-LINK TL-WR841N/ND v9 ++ * ++ * Copyright (C) 2014 Matthias Schiffer ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR841NV9_GPIO_LED_WLAN 13 ++#define TL_WR841NV9_GPIO_LED_QSS 3 ++#define TL_WR841NV9_GPIO_LED_WAN 4 ++#define TL_WR841NV9_GPIO_LED_LAN1 16 ++#define TL_WR841NV9_GPIO_LED_LAN2 15 ++#define TL_WR841NV9_GPIO_LED_LAN3 14 ++#define TL_WR841NV9_GPIO_LED_LAN4 11 ++ ++#define TL_WR841NV9_GPIO_BTN_RESET 12 ++#define TL_WR841NV9_GPIO_BTN_WIFI 17 ++ ++#define TL_WR841NV9_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV9_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr841n_v9_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr841n_v9_flash_data = { ++ .part_probes = tl_wr841n_v9_part_probes, ++}; ++ ++static struct gpio_led tl_wr841n_v9_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:lan1", ++ .gpio = TL_WR841NV9_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan2", ++ .gpio = TL_WR841NV9_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan3", ++ .gpio = TL_WR841NV9_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:lan4", ++ .gpio = TL_WR841NV9_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR841NV9_GPIO_LED_QSS, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wan", ++ .gpio = TL_WR841NV9_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR841NV9_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr841n_v9_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841NV9_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "WIFI button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR841NV9_GPIO_BTN_WIFI, ++ .active_low = 1, ++ } ++}; ++ ++ ++static void __init tl_ap143_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 tmpmac[ETH_ALEN]; ++ ++ ath79_register_m25p80(&tl_wr841n_v9_flash_data); ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); ++ ath79_register_eth(1); ++ ++ /* WAN */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_register_eth(0); ++ ++ ath79_init_mac(tmpmac, mac, 0); ++ ath79_register_wmac(ee, tmpmac); ++} ++ ++static void __init tl_wr841n_v9_setup(void) ++{ ++ tl_ap143_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v9_leds_gpio), ++ tl_wr841n_v9_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(1, TL_WR841NV9_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr841n_v9_gpio_keys), ++ tl_wr841n_v9_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR841N_V9, "TL-WR841N-v9", "TP-LINK TL-WR841N/ND v9", ++ tl_wr841n_v9_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd.c linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,121 @@ ++/* ++ * TP-LINK TL-WR941ND board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++ ++#include "dev-dsa.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TL_WR941ND_GPIO_LED_SYSTEM 2 ++#define TL_WR941ND_GPIO_LED_QSS_RED 4 ++#define TL_WR941ND_GPIO_LED_QSS_GREEN 5 ++#define TL_WR941ND_GPIO_LED_WLAN 9 ++ ++#define TL_WR941ND_GPIO_BTN_RESET 3 ++#define TL_WR941ND_GPIO_BTN_QSS 7 ++ ++#define TL_WR941ND_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL) ++ ++static const char *tl_wr941nd_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr941nd_flash_data = { ++ .part_probes = tl_wr941nd_part_probes, ++}; ++ ++static struct gpio_led tl_wr941nd_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:green:system", ++ .gpio = TL_WR941ND_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, { ++ .name = "tp-link:red:qss", ++ .gpio = TL_WR941ND_GPIO_LED_QSS_RED, ++ }, { ++ .name = "tp-link:green:qss", ++ .gpio = TL_WR941ND_GPIO_LED_QSS_GREEN, ++ }, { ++ .name = "tp-link:green:wlan", ++ .gpio = TL_WR941ND_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR941ND_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "qss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR941ND_GPIO_BTN_QSS, ++ .active_low = 1, ++ } ++}; ++ ++static struct dsa_chip_data tl_wr941nd_dsa_chip = { ++ .port_names[0] = "wan", ++ .port_names[1] = "lan1", ++ .port_names[2] = "lan2", ++ .port_names[3] = "lan3", ++ .port_names[4] = "lan4", ++ .port_names[5] = "cpu", ++}; ++ ++static struct dsa_platform_data tl_wr941nd_dsa_data = { ++ .nr_chips = 1, ++ .chip = &tl_wr941nd_dsa_chip, ++}; ++ ++static void __init tl_wr941nd_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, ++ &tl_wr941nd_dsa_data); ++ ++ ath79_register_m25p80(&tl_wr941nd_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio), ++ tl_wr941nd_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr941nd_gpio_keys), ++ tl_wr941nd_gpio_keys); ++ ath79_register_wmac(eeprom, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND", ++ tl_wr941nd_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd-v6.c linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd-v6.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tl-wr941nd-v6.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tl-wr941nd-v6.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,149 @@ ++/* ++ * TP-LINK TL-WR941N/ND v6 board support ++ * ++ * Copyright (C) 2015 Matthias Schiffer ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++ ++#define TL_WR941ND_V6_GPIO_LED_QSS 3 ++#define TL_WR941ND_V6_GPIO_LED_WAN 14 ++#define TL_WR941ND_V6_GPIO_LED_WAN_RED 15 ++#define TL_WR941ND_V6_GPIO_LED_LAN1 7 ++#define TL_WR941ND_V6_GPIO_LED_LAN2 6 ++#define TL_WR941ND_V6_GPIO_LED_LAN3 5 ++#define TL_WR941ND_V6_GPIO_LED_LAN4 4 ++#define TL_WR941ND_V6_GPIO_LED_WLAN 8 ++#define TL_WR941ND_V6_GPIO_LED_SYSTEM 18 ++ ++#define TL_WR941ND_V6_GPIO_BTN_RESET 1 ++#define TL_WR941ND_V6_GPIO_BTN_RFKILL 2 ++ ++#define TL_WR941ND_V6_KEYS_POLL_INTERVAL 20 ++#define TL_WR941ND_V6_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_V6_KEYS_POLL_INTERVAL) ++ ++ ++static struct gpio_led tl_wr941nd_v6_leds_gpio[] __initdata = { ++ { ++ .name = "tp-link:blue:qss", ++ .gpio = TL_WR941ND_V6_GPIO_LED_QSS, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:wan", ++ .gpio = TL_WR941ND_V6_GPIO_LED_WAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:red:wan", ++ .gpio = TL_WR941ND_V6_GPIO_LED_WAN_RED, ++ .active_low = 0, ++ }, ++ { ++ .name = "tp-link:blue:lan1", ++ .gpio = TL_WR941ND_V6_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:lan2", ++ .gpio = TL_WR941ND_V6_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:lan3", ++ .gpio = TL_WR941ND_V6_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:lan4", ++ .gpio = TL_WR941ND_V6_GPIO_LED_LAN4, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:wlan", ++ .gpio = TL_WR941ND_V6_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "tp-link:blue:system", ++ .gpio = TL_WR941ND_V6_GPIO_LED_SYSTEM, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button tl_wr941nd_v6_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TL_WR941ND_V6_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR941ND_V6_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "RFKILL button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = TL_WR941ND_V6_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TL_WR941ND_V6_GPIO_BTN_RFKILL, ++ .active_low = 1, ++ } ++}; ++ ++ ++static const char *tl_wr941n_v6_part_probes[] = { ++ "tp-link", ++ NULL, ++}; ++ ++static struct flash_platform_data tl_wr941n_v6_flash_data = { ++ .part_probes = tl_wr941n_v6_part_probes, ++}; ++ ++ ++static void __init tl_wr941nd_v6_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(&tl_wr941n_v6_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_v6_leds_gpio), ++ tl_wr941nd_v6_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, TL_WR941ND_V6_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tl_wr941nd_v6_gpio_keys), ++ tl_wr941nd_v6_gpio_keys); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); ++ ++ ath79_switch_data.phy4_mii_en = 1; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, mac); ++ ++} ++ ++MIPS_MACHINE(ATH79_MACH_TL_WR941ND_V6, "TL-WR941ND-v6", "TP-LINK TL-WR941N/ND v6", ++ tl_wr941nd_v6_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-tube2h.c linux-4.1.13/arch/mips/ath79/mach-tube2h.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-tube2h.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-tube2h.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,118 @@ ++/* ++ * ALFA NETWORK Tube2H board support ++ * ++ * Copyright (C) 2014 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define TUBE2H_GPIO_LED_SIGNAL4 0 ++#define TUBE2H_GPIO_LED_SIGNAL3 1 ++#define TUBE2H_GPIO_LED_SIGNAL2 13 ++#define TUBE2H_GPIO_LED_LAN 17 ++#define TUBE2H_GPIO_LED_SIGNAL1 27 ++#define TUBE2H_GPIO_EXT_LNA 28 ++ ++#define TUBE2H_GPIO_BTN_RESET 12 ++ ++#define TUBE2H_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define TUBE2H_KEYS_DEBOUNCE_INTERVAL (3 * TUBE2H_KEYS_POLL_INTERVAL) ++ ++#define TUBE2H_ART_ADDRESS 0x1f7f0000 ++#define TUBE2H_LAN_MAC_OFFSET 0x06 ++#define TUBE2H_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led tube2h_leds_gpio[] __initdata = { ++ { ++ .name = "alfa:blue:lan", ++ .gpio = TUBE2H_GPIO_LED_LAN, ++ .active_low = 1, ++ }, ++ { ++ .name = "alfa:red:signal1", ++ .gpio = TUBE2H_GPIO_LED_SIGNAL1, ++ .active_low = 1, ++ }, ++ { ++ .name = "alfa:orange:signal2", ++ .gpio = TUBE2H_GPIO_LED_SIGNAL2, ++ .active_low = 0, ++ }, ++ { ++ .name = "alfa:green:signal3", ++ .gpio = TUBE2H_GPIO_LED_SIGNAL3, ++ .active_low = 0, ++ }, ++ { ++ .name = "alfa:green:signal4", ++ .gpio = TUBE2H_GPIO_LED_SIGNAL4, ++ .active_low = 0, ++ }, ++}; ++ ++static struct gpio_keys_button tube2h_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = TUBE2H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = TUBE2H_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init tube2h_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(TUBE2H_ART_ADDRESS); ++ u32 t; ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_JTAG_DISABLE | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ /* Ensure that GPIO26 and GPIO27 are controllable by software */ ++ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; ++ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); ++ ++ gpio_request_one(TUBE2H_GPIO_EXT_LNA, ++ GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "external LNA0"); ++ ++ ath79_register_wmac(art + TUBE2H_CALDATA_OFFSET, NULL); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(tube2h_leds_gpio), ++ tube2h_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, TUBE2H_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(tube2h_gpio_keys), ++ tube2h_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + TUBE2H_LAN_MAC_OFFSET, 0); ++ ath79_register_mdio(0, 0x0); ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_TUBE2H, "TUBE2H", "ALFA NETWORK Tube2H", ++ tube2h_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/machtypes.h linux-4.1.13/arch/mips/ath79/machtypes.h +--- linux-4.1.13.orig/arch/mips/ath79/machtypes.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/machtypes.h 2015-12-04 19:57:05.957975089 +0100 +@@ -16,12 +16,224 @@ + + enum ath79_mach_type { + ATH79_MACH_GENERIC = 0, ++ ATH79_MACH_ALFA_AP96, /* ALFA Network AP96 board */ ++ ATH79_MACH_ALFA_NX, /* ALFA Network N2/N5 board */ ++ ATH79_MACH_ALL0258N, /* Allnet ALL0258N */ ++ ATH79_MACH_ALL0305, /* Allnet ALL0305 */ ++ ATH79_MACH_ALL0315N, /* Allnet ALL0315N */ ++ ATH79_MACH_ANTMINER_S1, /* Antminer S1 */ ++ ATH79_MACH_ANTMINER_S3, /* Antminer S3 */ ++ ATH79_MACH_ARDUINO_YUN, /* Yun */ ++ ATH79_MACH_AP113, /* Atheros AP113 reference board */ + ATH79_MACH_AP121, /* Atheros AP121 reference board */ ++ ATH79_MACH_AP121_MINI, /* Atheros AP121-MINI reference board */ ++ ATH79_MACH_AP132, /* Atheros AP132 reference board */ ++ ATH79_MACH_AP135_020, /* Atheros AP135-020 reference board */ + ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */ ++ ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */ ++ ATH79_MACH_AP143, /* Atheros AP143 reference board */ ++ ATH79_MACH_AP147_010, /* Atheros AP147-010 reference board */ ++ ATH79_MACH_AP152, /* Atheros AP152 reference board */ + ATH79_MACH_AP81, /* Atheros AP81 reference board */ ++ ATH79_MACH_AP83, /* Atheros AP83 */ ++ ATH79_MACH_AP96, /* Atheros AP96 */ ++ ATH79_MACH_ARCHER_C5, /* TP-LINK Archer C5 board */ ++ ATH79_MACH_ARCHER_C7, /* TP-LINK Archer C7 board */ ++ ATH79_MACH_AW_NR580, /* AzureWave AW-NR580 */ ++ ATH79_MACH_BHU_BXU2000N2_A1, /* BHU BXU2000n-2 A1 */ ++ ATH79_MACH_BSB, /* Smart Electronics Black Swift board */ ++ ATH79_MACH_CAP4200AG, /* Senao CAP4200AG */ ++ ATH79_MACH_CARAMBOLA2, /* 8devices Carambola2 */ ++ ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */ ++ ATH79_MACH_CPE510, /* TP-LINK CPE510 */ + ATH79_MACH_DB120, /* Atheros DB120 reference board */ + ATH79_MACH_PB44, /* Atheros PB44 reference board */ ++ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */ ++ ATH79_MACH_DHP_1565_A1, /* D-Link DHP-1565 rev. A1 */ ++ ATH79_MACH_DIR_505_A1, /* D-Link DIR-505 rev. A1 */ ++ ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */ ++ ATH79_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */ ++ ATH79_MACH_DIR_615_E1, /* D-Link DIR-615 rev. E1 */ ++ ATH79_MACH_DIR_615_E4, /* D-Link DIR-615 rev. E4 */ ++ ATH79_MACH_DIR_615_I1, /* D-Link DIR-615 rev. I1 */ ++ ATH79_MACH_DIR_825_B1, /* D-Link DIR-825 rev. B1 */ ++ ATH79_MACH_DIR_825_C1, /* D-Link DIR-825 rev. C1 */ ++ ATH79_MACH_DIR_835_A1, /* D-Link DIR-835 rev. A1 */ ++ ATH79_MACH_DLAN_HOTSPOT, /* devolo dLAN Hotspot */ ++ ATH79_MACH_DLAN_PRO_500_WP, /* devolo dLAN pro 500 Wireless+ */ ++ ATH79_MACH_DLAN_PRO_1200_AC, /* devolo dLAN pro 1200+ WiFi ac*/ ++ ATH79_MACH_DRAGINO2, /* Dragino Version 2 */ ++ ATH79_MACH_ESR900, /* EnGenius ESR900 */ ++ ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */ ++ ATH79_MACH_EW_DORIN_ROUTER, /* embedded wireless Dorin Router Platform */ ++ ATH79_MACH_EAP300V2, /* EnGenius EAP300 v2 */ ++ ATH79_MACH_EAP7660D, /* Senao EAP7660D */ ++ ATH79_MACH_EL_M150, /* EasyLink EL-M150 */ ++ ATH79_MACH_EL_MINI, /* EasyLink EL-MINI */ ++ ATH79_MACH_ESR1750, /* EnGenius ESR1750 */ ++ ATH79_MACH_EPG5000, /* EnGenius EPG5000 */ ++ ATH79_MACH_F9K1115V2, /* Belkin AC1750DB */ ++ ATH79_MACH_GL_AR150, /* GL-AR150 support */ ++ ATH79_MACH_GL_AR300, /* GL-AR300 */ ++ ATH79_MACH_GL_DOMINO, /* Domino */ ++ ATH79_MACH_GL_INET, /* GL-CONNECT GL-INET */ ++ ATH79_MACH_GS_MINIBOX_V1, /* Gainstrong MiniBox V1.0 */ ++ ATH79_MACH_GS_OOLITE, /* GS OOLITE V1.0 */ ++ ATH79_MACH_HIWIFI_HC6361, /* HiWiFi HC6361 */ ++ ATH79_MACH_JA76PF, /* jjPlus JA76PF */ ++ ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */ ++ ATH79_MACH_JWAP003, /* jjPlus JWAP003 */ ++ ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ ++ ATH79_MACH_MR12, /* Cisco Meraki MR12 */ ++ ATH79_MACH_MR16, /* Cisco Meraki MR16 */ ++ ATH79_MACH_MR1750, /* OpenMesh MR1750 */ ++ ATH79_MACH_MR600V2, /* OpenMesh MR600v2 */ ++ ATH79_MACH_MR600, /* OpenMesh MR600 */ ++ ATH79_MACH_MR900, /* OpenMesh MR900 */ ++ ATH79_MACH_MR900v2, /* OpenMesh MR900v2 */ ++ ATH79_MACH_MYNET_N600, /* WD My Net N600 */ ++ ATH79_MACH_MYNET_N750, /* WD My Net N750 */ ++ ATH79_MACH_MYNET_REXT, /* WD My Net Wi-Fi Range Extender */ ++ ATH79_MACH_MZK_W04NU, /* Planex MZK-W04NU */ ++ ATH79_MACH_MZK_W300NH, /* Planex MZK-W300NH */ ++ ATH79_MACH_NBG460N, /* Zyxel NBG460N/550N/550NH */ ++ ATH79_MACH_NBG6616, /* Zyxel NBG6616 */ ++ ATH79_MACH_NBG6716, /* Zyxel NBG6716 */ ++ ATH79_MACH_OM2P_HSv2, /* OpenMesh OM2P-HSv2 */ ++ ATH79_MACH_OM2P_HS, /* OpenMesh OM2P-HS */ ++ ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ ++ ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ ++ ATH79_MACH_OM2P, /* OpenMesh OM2P */ ++ ATH79_MACH_OM5P_AN, /* OpenMesh OM5P-AN */ ++ ATH79_MACH_OM5P, /* OpenMesh OM5P */ ++ ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */ ++ ATH79_MACH_PB42, /* Atheros PB42 */ ++ ATH79_MACH_PB92, /* Atheros PB92 */ ++ ATH79_MACH_QIHOO_C301, /* Qihoo 360 C301 */ ++ ATH79_MACH_R6100, /* NETGEAR R6100 */ ++ ATH79_MACH_RB_411, /* MikroTik RouterBOARD 411/411A/411AH */ ++ ATH79_MACH_RB_411U, /* MikroTik RouterBOARD 411U */ ++ ATH79_MACH_RB_433, /* MikroTik RouterBOARD 433/433AH */ ++ ATH79_MACH_RB_433U, /* MikroTik RouterBOARD 433UAH */ ++ ATH79_MACH_RB_435G, /* MikroTik RouterBOARD 435G */ ++ ATH79_MACH_RB_450G, /* MikroTik RouterBOARD 450G */ ++ ATH79_MACH_RB_450, /* MikroTik RouterBOARD 450 */ ++ ATH79_MACH_RB_493, /* Mikrotik RouterBOARD 493/493AH */ ++ ATH79_MACH_RB_493G, /* Mikrotik RouterBOARD 493G */ ++ ATH79_MACH_RB_711GR100, /* Mikrotik RouterBOARD 911/912 boards */ ++ ATH79_MACH_RB_750, /* MikroTik RouterBOARD 750 */ ++ ATH79_MACH_RB_750G_R3, /* MikroTik RouterBOARD 750GL */ ++ ATH79_MACH_RB_751, /* MikroTik RouterBOARD 751 */ ++ ATH79_MACH_RB_751G, /* Mikrotik RouterBOARD 751G */ ++ ATH79_MACH_RB_922GS, /* Mikrotik RouterBOARD 911/922GS boards */ ++ ATH79_MACH_RB_951G, /* Mikrotik RouterBOARD 951G */ ++ ATH79_MACH_RB_951U, /* Mikrotik RouterBOARD 951Ui-2HnD */ ++ ATH79_MACH_RB_2011G, /* Mikrotik RouterBOARD 2011UAS-2HnD */ ++ ATH79_MACH_RB_2011L, /* Mikrotik RouterBOARD 2011L */ ++ ATH79_MACH_RB_2011US, /* Mikrotik RouterBOARD 2011UAS */ ++ ATH79_MACH_RB_2011R5, /* Mikrotik RouterBOARD 2011UiAS(-2Hnd) */ ++ ATH79_MACH_RB_SXTLITE2ND, /* Mikrotik RouterBOARD SXT Lite 2nD */ ++ ATH79_MACH_RB_SXTLITE5ND, /* Mikrotik RouterBOARD SXT Lite 5nD */ ++ ATH79_MACH_RW2458N, /* Redwave RW2458N */ ++ ATH79_MACH_SMART_300, /* NC-LINK SMART-300 */ ++ ATH79_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */ ++ ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */ ++ ATH79_MACH_TEW_712BR, /* TRENDnet TEW-712BR */ ++ ATH79_MACH_TEW_732BR, /* TRENDnet TEW-732BR */ ++ ATH79_MACH_MC_MAC1200R, /* MERCURY MAC1200R*/ ++ ATH79_MACH_TL_MR10U, /* TP-LINK TL-MR10U */ ++ ATH79_MACH_TL_MR11U, /* TP-LINK TL-MR11U */ ++ ATH79_MACH_TL_MR13U, /* TP-LINK TL-MR13U */ ++ ATH79_MACH_TL_MR3020, /* TP-LINK TL-MR3020 */ ++ ATH79_MACH_TL_MR3040, /* TP-LINK TL-MR3040 */ ++ ATH79_MACH_TL_MR3040_V2, /* TP-LINK TL-MR3040 v2 */ ++ ATH79_MACH_TL_MR3220, /* TP-LINK TL-MR3220 */ ++ ATH79_MACH_TL_MR3220_V2, /* TP-LINK TL-MR3220 v2 */ ++ ATH79_MACH_TL_MR3420, /* TP-LINK TL-MR3420 */ ++ ATH79_MACH_TL_MR3420_V2, /* TP-LINK TL-MR3420 v2 */ ++ ATH79_MACH_TL_WA701ND_V2, /* TP-LINK TL-WA701ND v2 */ ++ ATH79_MACH_TL_WA750RE, /* TP-LINK TL-WA750RE */ ++ ATH79_MACH_TL_WA7210N_V2, /* TP-LINK TL-WA7210N v2 */ ++ ATH79_MACH_TL_WA7510N_V1, /* TP-LINK TL-WA7510N v1*/ ++ ATH79_MACH_TL_WA850RE, /* TP-LINK TL-WA850RE */ ++ ATH79_MACH_TL_WA860RE, /* TP-LINK TL-WA860RE */ ++ ATH79_MACH_TL_WA801ND_V2, /* TP-LINK TL-WA801ND v2 */ ++ ATH79_MACH_TL_WA830RE_V2, /* TP-LINK TL-WA830RE v2 */ ++ ATH79_MACH_TL_WA901ND, /* TP-LINK TL-WA901ND */ ++ ATH79_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */ ++ ATH79_MACH_TL_WA901ND_V3, /* TP-LINK TL-WA901ND v3 */ ++ ATH79_MACH_TL_WDR3320_V2, /* TP-LINK TL-WDR3320 v2 */ ++ ATH79_MACH_TL_WDR3500, /* TP-LINK TL-WDR3500 */ ++ ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */ ++ ATH79_MACH_TL_WDR6500_V2, /* TP-LINK TL-WDR6500 v2 */ ++ ATH79_MACH_TL_WDR4900_V2, /* TP-LINK TL-WDR4900 v2 */ ++ ATH79_MACH_TL_WR1041N_V2, /* TP-LINK TL-WR1041N v2 */ ++ ATH79_MACH_TL_WR1043ND, /* TP-LINK TL-WR1043ND */ ++ ATH79_MACH_TL_WR1043ND_V2, /* TP-LINK TL-WR1043ND v2 */ ++ ATH79_MACH_TL_WR2543N, /* TP-LINK TL-WR2543N/ND */ ++ ATH79_MACH_TL_WR703N, /* TP-LINK TL-WR703N */ ++ ATH79_MACH_TL_WR710N, /* TP-LINK TL-WR710N */ ++ ATH79_MACH_TL_WR720N_V3, /* TP-LINK TL-WR720N v3/v4 */ ++ ATH79_MACH_TL_WR741ND, /* TP-LINK TL-WR741ND */ ++ ATH79_MACH_TL_WR741ND_V4, /* TP-LINK TL-WR741ND v4*/ ++ ATH79_MACH_TL_WR841N_V1, /* TP-LINK TL-WR841N v1 */ ++ ATH79_MACH_TL_WR841N_V7, /* TP-LINK TL-WR841N/ND v7 */ ++ ATH79_MACH_TL_WR841N_V8, /* TP-LINK TL-WR841N/ND v8 */ ++ ATH79_MACH_TL_WR841N_V9, /* TP-LINK TL-WR841N/ND v9 */ ++ ATH79_MACH_TL_WR842N_V2, /* TP-LINK TL-WR842N/ND v2 */ ++ ATH79_MACH_TL_WR941ND, /* TP-LINK TL-WR941ND */ ++ ATH79_MACH_TL_WR941ND_V5, /* TP-LINK TL-WR941ND v5 */ ++ ATH79_MACH_TL_WR941ND_V6, /* TP-LINK TL-WR941ND v6 */ ++ ATH79_MACH_TUBE2H, /* Alfa Network Tube2H */ ++ ATH79_MACH_UBNT_AIRGW, /* Ubiquiti AirGateway */ ++ ATH79_MACH_UBNT_AIRGWP, /* Ubiquiti AirGateway Pro */ ++ ATH79_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */ ++ ATH79_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */ ++ ATH79_MACH_UBNT_LOCO_M_XW, /* Ubiquiti Loco M XW */ ++ ATH79_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */ ++ ATH79_MACH_UBNT_LSX, /* Ubiquiti LSX */ ++ ATH79_MACH_UBNT_NANO_M, /* Ubiquiti NanoStation M */ ++ ATH79_MACH_UBNT_NANO_M_XW, /* Ubiquiti NanoStation M XW */ ++ ATH79_MACH_UBNT_ROCKET_M, /* Ubiquiti Rocket M */ ++ ATH79_MACH_UBNT_ROCKET_M_XW, /* Ubiquiti Rocket M XW*/ ++ ATH79_MACH_UBNT_ROCKET_M_TI, /* Ubiquiti Rocket M TI*/ ++ ATH79_MACH_UBNT_RSPRO, /* Ubiquiti RouterStation Pro */ ++ ATH79_MACH_UBNT_RS, /* Ubiquiti RouterStation */ ++ ATH79_MACH_UBNT_UAP_PRO, /* Ubiquiti UniFi AP Pro */ ++ ATH79_MACH_UBNT_UNIFI, /* Ubiquiti Unifi */ ++ ATH79_MACH_UBNT_UNIFI_OUTDOOR, /* Ubiquiti UnifiAP Outdoor */ ++ ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, /* Ubiquiti UnifiAP Outdoor+ */ + ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ ++ ATH79_MACH_WEIO, /* WeIO board */ ++ ATH79_MACH_WHR_G301N, /* Buffalo WHR-G301N */ ++ ATH79_MACH_WHR_HP_G300N, /* Buffalo WHR-HP-G300N */ ++ ATH79_MACH_WHR_HP_GN, /* Buffalo WHR-HP-GN */ ++ ATH79_MACH_WLAE_AG300N, /* Buffalo WLAE-AG300N */ ++ ATH79_MACH_WLR8100, /* SITECOM WLR-8100 */ ++ ATH79_MACH_WNDAP360, /* NETGEAR WNDAP360 */ ++ ATH79_MACH_WNDR3700, /* NETGEAR WNDR3700/WNDR3800/WNDRMAC */ ++ ATH79_MACH_WNDR3700_V4, /* NETGEAR WNDR3700v4 */ ++ ATH79_MACH_WNDR4300, /* NETGEAR WNDR4300 */ ++ ATH79_MACH_WNR2000, /* NETGEAR WNR2000 */ ++ ATH79_MACH_WNR2000_V3, /* NETGEAR WNR2000 v3 */ ++ ATH79_MACH_WNR2000_V4, /* NETGEAR WNR2000 v4 */ ++ ATH79_MACH_WNR2200, /* NETGEAR WNR2200 */ ++ ATH79_MACH_WNR612_V2, /* NETGEAR WNR612 v2 */ ++ ATH79_MACH_WNR1000_V2, /* NETGEAR WNR1000 v2 */ ++ ATH79_MACH_WP543, /* Compex WP543 */ ++ ATH79_MACH_WPE72, /* Compex WPE72 */ ++ ATH79_MACH_WPJ344, /* Compex WPJ344 */ ++ ATH79_MACH_WPJ531, /* Compex WPJ531 */ ++ ATH79_MACH_WPJ558, /* Compex WPJ558 */ ++ ATH79_MACH_WRT160NL, /* Linksys WRT160NL */ ++ ATH79_MACH_WRT400N, /* Linksys WRT400N */ ++ ATH79_MACH_WZR_HP_AG300H, /* Buffalo WZR-HP-AG300H */ ++ ATH79_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */ ++ ATH79_MACH_WZR_HP_G300NH2, /* Buffalo WZR-HP-G300NH2 */ ++ ATH79_MACH_WZR_HP_G450H, /* Buffalo WZR-HP-G450H */ ++ ATH79_MACH_WZR_450HP2, /* Buffalo WZR-450HP2 */ ++ ATH79_MACH_ZCN_1523H_2, /* Zcomax ZCN-1523H-2-xx */ ++ ATH79_MACH_ZCN_1523H_5, /* Zcomax ZCN-1523H-5-xx */ + }; + + #endif /* _ATH79_MACHTYPE_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ubnt.c linux-4.1.13/arch/mips/ath79/mach-ubnt.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ubnt.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ubnt.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,205 @@ ++/* ++ * Ubiquiti RouterStation support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * Copyright (C) 2008 Ubiquiti ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define UBNT_RS_GPIO_LED_RF 2 ++#define UBNT_RS_GPIO_SW4 8 ++ ++#define UBNT_LS_SR71_GPIO_LED_D25 0 ++#define UBNT_LS_SR71_GPIO_LED_D26 1 ++#define UBNT_LS_SR71_GPIO_LED_D24 2 ++#define UBNT_LS_SR71_GPIO_LED_D23 4 ++#define UBNT_LS_SR71_GPIO_LED_D22 5 ++#define UBNT_LS_SR71_GPIO_LED_D27 6 ++#define UBNT_LS_SR71_GPIO_LED_D28 7 ++ ++#define UBNT_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define UBNT_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led ubnt_rs_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:green:rf", ++ .gpio = UBNT_RS_GPIO_LED_RF, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:green:d22", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D22, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:d23", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D23, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:d24", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D24, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:red:d25", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D25, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:red:d26", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D26, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:d27", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D27, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:d28", ++ .gpio = UBNT_LS_SR71_GPIO_LED_D28, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button ubnt_gpio_keys[] __initdata = { ++ { ++ .desc = "sw4", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = UBNT_RS_GPIO_SW4, ++ .active_low = 1, ++ } ++}; ++ ++static const char *ubnt_part_probes[] = { ++ "RedBoot", ++ NULL, ++}; ++ ++static struct flash_platform_data ubnt_flash_data = { ++ .part_probes = ubnt_part_probes, ++}; ++ ++static void __init ubnt_generic_setup(void) ++{ ++ ath79_register_m25p80(&ubnt_flash_data); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_gpio_keys), ++ ubnt_gpio_keys); ++ ath79_register_pci(); ++} ++ ++#define UBNT_RS_WAN_PHYMASK BIT(20) ++#define UBNT_RS_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) ++ ++static void __init ubnt_rs_setup(void) ++{ ++ ubnt_generic_setup(); ++ ++ ath79_register_mdio(0, ~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; ++ ++ /* ++ * There is Secondary MAC address duplicate problem with some ++ * UBNT HW batches. Do not increase Secondary MAC address by 1 ++ * but do workaround with 'Locally Administrated' bit. ++ */ ++ ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.speed = SPEED_100; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), ++ ubnt_rs_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation", ++ ubnt_rs_setup); ++ ++#define UBNT_RSPRO_WAN_PHYMASK BIT(4) ++#define UBNT_RSPRO_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) ++ ++static void __init ubnt_rspro_setup(void) ++{ ++ ubnt_generic_setup(); ++ ++ ath79_register_mdio(0, ~(UBNT_RSPRO_WAN_PHYMASK | ++ UBNT_RSPRO_LAN_PHYMASK)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; ++ ++ /* ++ * There is Secondary MAC address duplicate problem with some ++ * UBNT HW batches. Do not increase Secondary MAC address by 1 ++ * but do workaround with 'Locally Administrated' bit. ++ */ ++ ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), ++ ubnt_rs_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_RSPRO, "UBNT-RSPRO", "Ubiquiti RouterStation Pro", ++ ubnt_rspro_setup); ++ ++static void __init ubnt_lsx_setup(void) ++{ ++ ubnt_generic_setup(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup); ++ ++#define UBNT_LSSR71_PHY_MASK BIT(1) ++ ++static void __init ubnt_lssr71_setup(void) ++{ ++ ubnt_generic_setup(); ++ ++ ath79_register_mdio(0, ~UBNT_LSSR71_PHY_MASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_ls_sr71_leds_gpio), ++ ubnt_ls_sr71_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71", ++ ubnt_lssr71_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-ubnt-xm.c linux-4.1.13/arch/mips/ath79/mach-ubnt-xm.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-ubnt-xm.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-ubnt-xm.c 2015-12-04 19:57:04.386077932 +0100 +@@ -12,15 +12,26 @@ + + #include + #include ++#include + #include ++#include ++#include + ++#include + #include ++#include + +-#include "machtypes.h" ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" + #include "dev-gpio-buttons.h" + #include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "pci.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" + + #define UBNT_XM_GPIO_LED_L1 0 + #define UBNT_XM_GPIO_LED_L2 1 +@@ -32,23 +43,23 @@ + #define UBNT_XM_KEYS_POLL_INTERVAL 20 + #define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) + +-#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) ++#define UBNT_XM_EEPROM_ADDR 0x1fff1000 + + static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { + { +- .name = "ubnt-xm:red:link1", ++ .name = "ubnt:red:link1", + .gpio = UBNT_XM_GPIO_LED_L1, + .active_low = 0, + }, { +- .name = "ubnt-xm:orange:link2", ++ .name = "ubnt:orange:link2", + .gpio = UBNT_XM_GPIO_LED_L2, + .active_low = 0, + }, { +- .name = "ubnt-xm:green:link3", ++ .name = "ubnt:green:link3", + .gpio = UBNT_XM_GPIO_LED_L3, + .active_low = 0, + }, { +- .name = "ubnt-xm:green:link4", ++ .name = "ubnt:green:link4", + .gpio = UBNT_XM_GPIO_LED_L4, + .active_low = 0, + }, +@@ -65,62 +76,625 @@ + } + }; + +-static struct spi_board_info ubnt_xm_spi_info[] = { ++#define UBNT_M_WAN_PHYMASK BIT(4) ++ ++static void __init ubnt_xm_init(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(UBNT_XM_EEPROM_ADDR); ++ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), ++ ubnt_xm_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ap91_pci_init(eeprom, NULL); ++ ++ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_XM, ++ "UBNT-XM", ++ "Ubiquiti Networks XM (rev 1.0) board", ++ ubnt_xm_init); ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_BULLET_M, "UBNT-BM", "Ubiquiti Bullet M", ++ ubnt_xm_init); ++ ++static void __init ubnt_rocket_m_setup(void) ++{ ++ ubnt_xm_init(); ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M, "UBNT-RM", "Ubiquiti Rocket M", ++ ubnt_rocket_m_setup); ++ ++static void __init ubnt_nano_m_setup(void) ++{ ++ ubnt_xm_init(); ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M, "UBNT-NM", "Ubiquiti Nanostation M", ++ ubnt_nano_m_setup); ++ ++static struct gpio_led ubnt_airrouter_leds_gpio[] __initdata = { + { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l6405d", ++ .name = "ubnt:green:globe", ++ .gpio = 0, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:green:power", ++ .gpio = 11, ++ .active_low = 1, ++ .default_state = LEDS_GPIO_DEFSTATE_ON, + } + }; + +-static struct ath79_spi_platform_data ubnt_xm_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, ++static void __init ubnt_airrouter_setup(void) ++{ ++ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_local_mac(ath79_eth1_data.mac_addr, mac1); ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ath79_register_usb(); ++ ++ ap91_pci_init(ee, NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airrouter_leds_gpio), ++ ubnt_airrouter_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_AIRROUTER, "UBNT-AR", "Ubiquiti AirRouter", ++ ubnt_airrouter_setup); ++ ++static struct gpio_led ubnt_unifi_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:orange:dome", ++ .gpio = 1, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:dome", ++ .gpio = 0, ++ .active_low = 0, ++ } + }; + +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data ubnt_xm_eeprom_data; ++static struct gpio_led ubnt_unifi_outdoor_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:orange:front", ++ .gpio = 1, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:front", ++ .gpio = 0, ++ .active_low = 0, ++ } ++}; + +-static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) ++static struct gpio_led ubnt_unifi_outdoor_plus_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:white:front", ++ .gpio = 1, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:blue:front", ++ .gpio = 0, ++ .active_low = 0, ++ } ++}; ++ ++ ++static void __init ubnt_unifi_setup(void) + { +- switch (PCI_SLOT(dev->devfn)) { +- case 0: +- dev->dev.platform_data = &ubnt_xm_eeprom_data; +- break; ++ u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_register_eth(0); ++ ++ ap91_pci_init(ee, NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_leds_gpio), ++ ubnt_unifi_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI, "UBNT-UF", "Ubiquiti UniFi", ++ ubnt_unifi_setup); ++ ++ ++#define UBNT_UNIFIOD_PRI_PHYMASK BIT(4) ++#define UBNT_UNIFIOD_2ND_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) ++ ++static void __init ubnt_unifi_outdoor_setup(void) ++{ ++ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | ++ UBNT_UNIFIOD_2ND_PHYMASK)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ap91_pci_init(ee, NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_leds_gpio), ++ ubnt_unifi_outdoor_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR, "UBNT-U20", ++ "Ubiquiti UniFiAP Outdoor", ++ ubnt_unifi_outdoor_setup); ++ ++ ++static void __init ubnt_unifi_outdoor_plus_setup(void) ++{ ++ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK | ++ UBNT_UNIFIOD_2ND_PHYMASK)); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ap91_pci_init(ee, NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_plus_leds_gpio), ++ ubnt_unifi_outdoor_plus_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, "UBNT-UOP", ++ "Ubiquiti UniFiAP Outdoor+", ++ ubnt_unifi_outdoor_plus_setup); ++ ++ ++static struct gpio_led ubnt_uap_pro_gpio_leds[] __initdata = { ++ { ++ .name = "ubnt:white:dome", ++ .gpio = 12, ++ }, { ++ .name = "ubnt:blue:dome", ++ .gpio = 13, ++ } ++}; ++ ++static struct gpio_keys_button uap_pro_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 17, ++ .active_low = 1, + } ++}; ++ ++static struct ar8327_pad_cfg uap_pro_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_platform_data uap_pro_ar8327_data = { ++ .pad0_cfg = &uap_pro_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info uap_pro_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &uap_pro_ar8327_data, ++ }, ++}; ++ ++#define UAP_PRO_MAC0_OFFSET 0x0000 ++#define UAP_PRO_MAC1_OFFSET 0x0006 ++#define UAP_PRO_WMAC_CALDATA_OFFSET 0x1000 ++#define UAP_PRO_PCI_CALDATA_OFFSET 0x5000 ++ ++static void __init ubnt_uap_pro_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds), ++ ubnt_uap_pro_gpio_leds); ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(uap_pro_gpio_keys), ++ uap_pro_gpio_keys); ++ ++ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); ++ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); ++ ++ ath79_register_mdio(0, 0x0); ++ mdiobus_register_board_info(uap_pro_mdio0_info, ++ ARRAY_SIZE(uap_pro_mdio0_info)); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ eeprom + UAP_PRO_MAC0_OFFSET, 0); ++ ++ /* GMAC0 is connected to an AR8327 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_UAP_PRO, "UAP-PRO", "Ubiquiti UniFi AP Pro", ++ ubnt_uap_pro_setup); ++ ++#define UBNT_XW_GPIO_LED_L1 11 ++#define UBNT_XW_GPIO_LED_L2 16 ++#define UBNT_XW_GPIO_LED_L3 13 ++#define UBNT_XW_GPIO_LED_L4 14 ++ ++static struct gpio_led ubnt_xw_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:red:link1", ++ .gpio = UBNT_XW_GPIO_LED_L1, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:orange:link2", ++ .gpio = UBNT_XW_GPIO_LED_L2, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:green:link3", ++ .gpio = UBNT_XW_GPIO_LED_L3, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:green:link4", ++ .gpio = UBNT_XW_GPIO_LED_L4, ++ .active_low = 1, ++ }, ++}; ++ ++#define UBNT_ROCKET_TI_GPIO_LED_L1 16 ++#define UBNT_ROCKET_TI_GPIO_LED_L2 17 ++#define UBNT_ROCKET_TI_GPIO_LED_L3 18 ++#define UBNT_ROCKET_TI_GPIO_LED_L4 19 ++#define UBNT_ROCKET_TI_GPIO_LED_L5 20 ++#define UBNT_ROCKET_TI_GPIO_LED_L6 21 ++static struct gpio_led ubnt_rocket_ti_leds_gpio[] __initdata = { ++ { ++ .name = "ubnt:green:link1", ++ .gpio = UBNT_ROCKET_TI_GPIO_LED_L1, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:green:link2", ++ .gpio = UBNT_ROCKET_TI_GPIO_LED_L2, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:green:link3", ++ .gpio = UBNT_ROCKET_TI_GPIO_LED_L3, ++ .active_low = 1, ++ }, { ++ .name = "ubnt:green:link4", ++ .gpio = UBNT_ROCKET_TI_GPIO_LED_L4, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:link5", ++ .gpio = UBNT_ROCKET_TI_GPIO_LED_L5, ++ .active_low = 0, ++ }, { ++ .name = "ubnt:green:link6", ++ .gpio = UBNT_ROCKET_TI_GPIO_LED_L6, ++ .active_low = 0, ++ }, ++}; + +- return 0; ++static void __init ubnt_xw_init(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio), ++ ubnt_xw_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++ ++ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); ++ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); ++ ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0_SLAVE); ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ eeprom + UAP_PRO_MAC0_OFFSET, 0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + } + +-static void __init ubnt_xm_pci_init(void) ++static void __init ubnt_nano_m_xw_setup(void) + { +- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, +- sizeof(ubnt_xm_eeprom_data.eeprom_data)); ++ ubnt_xw_init(); + +- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); +- ath79_register_pci(); ++ /* GMAC0 is connected to an AR8326 switch */ ++ ath79_register_mdio(0, ~(BIT(0) | BIT(1) | BIT(5))); ++ ath79_eth0_data.phy_mask = (BIT(0) | BIT(1) | BIT(5)); ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_register_eth(0); + } +-#else +-static inline void ubnt_xm_pci_init(void) {} +-#endif /* CONFIG_PCI */ + +-static void __init ubnt_xm_init(void) ++static void __init ubnt_loco_m_xw_setup(void) + { +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), +- ubnt_xm_leds_gpio); ++ ubnt_xw_init(); + ++ ath79_register_mdio(0, ~BIT(1)); ++ ath79_eth0_data.phy_mask = BIT(1); ++ ath79_register_eth(0); ++} ++ ++static void __init ubnt_rocket_m_xw_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio), ++ ubnt_xw_leds_gpio); + ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ubnt_xm_gpio_keys), +- ubnt_xm_gpio_keys); ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); + +- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, +- ARRAY_SIZE(ubnt_xm_spi_info)); ++ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); ++ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); + +- ubnt_xm_pci_init(); ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ eeprom + UAP_PRO_MAC0_OFFSET, 0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_mdio(0, ~BIT(4)); ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); + } + +-MIPS_MACHINE(ATH79_MACH_UBNT_XM, +- "UBNT-XM", +- "Ubiquiti Networks XM (rev 1.0) board", +- ubnt_xm_init); ++static struct at803x_platform_data ubnt_rocket_m_ti_at803_data = { ++ .disable_smarteee = 1, ++ .enable_rgmii_rx_delay = 1, ++ .enable_rgmii_tx_delay = 1, ++}; ++static struct mdio_board_info ubnt_rocket_m_ti_mdio_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 4, ++ .platform_data = &ubnt_rocket_m_ti_at803_data, ++ }, ++}; ++ ++static void __init ubnt_rocket_m_ti_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rocket_ti_leds_gpio), ++ ubnt_rocket_ti_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(ubnt_xm_gpio_keys), ++ ubnt_xm_gpio_keys); ++ ++ ap91_pci_init(eeprom + 0x1000, NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ath79_setup_ar934x_eth_rx_delay(3, 3); ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ eeprom + UAP_PRO_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, ++ eeprom + UAP_PRO_MAC1_OFFSET, 0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ++ mdiobus_register_board_info(ubnt_rocket_m_ti_mdio_info, ++ ARRAY_SIZE(ubnt_rocket_m_ti_mdio_info)); ++ ath79_register_mdio(0, 0x0); ++ ++ ++ ath79_eth0_data.phy_mask = BIT(4); ++ /* read out from vendor */ ++ ath79_eth0_pll_data.pll_1000 = 0x2000000; ++ ath79_eth0_pll_data.pll_10 = 0x1313; ++ ath79_register_eth(0); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_eth1_data.phy_mask = BIT(3); ++ ath79_register_eth(1); ++} ++ ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M_XW, "UBNT-NM-XW", "Ubiquiti Nanostation M XW", ++ ubnt_nano_m_xw_setup); ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_LOCO_M_XW, "UBNT-LOCO-XW", "Ubiquiti Loco M XW", ++ ubnt_loco_m_xw_setup); ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_XW, "UBNT-RM-XW", "Ubiquiti Rocket M XW", ++ ubnt_rocket_m_xw_setup); ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_ROCKET_M_TI, "UBNT-RM-TI", "Ubiquiti Rocket M TI", ++ ubnt_rocket_m_ti_setup); ++ ++static struct gpio_led ubnt_airgateway_gpio_leds[] __initdata = { ++ { ++ .name = "ubnt:blue:wlan", ++ .gpio = 0, ++ }, { ++ .name = "ubnt:white:status", ++ .gpio = 1, ++ }, ++}; ++ ++static struct gpio_keys_button airgateway_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 12, ++ .active_low = 1, ++ } ++}; ++ ++static void __init ubnt_airgateway_setup(void) ++{ ++ u32 t; ++ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; ++ ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_gpio_leds), ++ ubnt_airgateway_gpio_leds); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(airgateway_gpio_keys), ++ airgateway_gpio_keys); ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_register_eth(1); ++ ath79_register_eth(0); ++ ++ ath79_register_wmac(ee, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_AIRGW, "UBNT-AGW", "Ubiquiti AirGateway", ++ ubnt_airgateway_setup); ++ ++static struct gpio_led ubnt_airgateway_pro_gpio_leds[] __initdata = { ++ { ++ .name = "ubnt:blue:wlan", ++ .gpio = 13, ++ }, { ++ .name = "ubnt:white:status", ++ .gpio = 17, ++ }, ++}; ++ ++ ++static struct gpio_keys_button airgateway_pro_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 12, ++ .active_low = 1, ++ } ++}; ++ ++static void __init ubnt_airgateway_pro_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac0 = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_airgateway_pro_gpio_leds), ++ ubnt_airgateway_pro_gpio_leds); ++ ++ ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(airgateway_pro_gpio_keys), ++ airgateway_pro_gpio_keys); ++ ++ ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); ++ ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); ++ ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ /* GMAC0 is left unused in this configuration */ ++ ++ /* GMAC1 is connected to MAC0 on the internal switch */ ++ /* The PoE/WAN port connects to port 5 on the internal switch */ ++ /* The LAN port connects to port 4 on the internal switch */ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac0, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++} ++ ++MIPS_MACHINE(ATH79_MACH_UBNT_AIRGWP, "UBNT-AGWP", "Ubiquiti AirGateway Pro", ++ ubnt_airgateway_pro_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-weio.c linux-4.1.13/arch/mips/ath79/mach-weio.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-weio.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-weio.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,140 @@ ++/** ++ * WEIO Web Of Things Platform ++ * ++ * Copyright (C) 2013 Drasko DRASKOVIC and Uros PETREVSKI ++ * ++ * ## ## ######## #### ####### ++ * ## ## ## ## ## ## ## ++ * ## ## ## ## ## ## ## ++ * ## ## ## ###### ## ## ## ++ * ## ## ## ## ## ## ## ++ * ## ## ## ## ## ## ## ++ * ### ### ######## #### ####### ++ * ++ * Web Of Things Platform ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Authors : ++ * Drasko DRASKOVIC ++ * Uros PETREVSKI ++ */ ++ ++#include ++#include ++#include ++#include ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WEIO_GPIO_LED_STA 1 ++#define WEIO_GPIO_LED_AP 16 ++ ++#define WEIO_GPIO_BTN_AP 20 ++#define WEIO_GPIO_BTN_RESET 23 ++ ++#define WEIO_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WEIO_KEYS_DEBOUNCE_INTERVAL (3 * WEIO_KEYS_POLL_INTERVAL) ++ ++#define WEIO_MAC0_OFFSET 0x0000 ++#define WEIO_MAC1_OFFSET 0x0006 ++#define WEIO_CALDATA_OFFSET 0x1000 ++#define WEIO_WMAC_MAC_OFFSET 0x1002 ++ ++static struct gpio_led weio_leds_gpio[] __initdata = { ++ { ++ .name = "weio:green:sta", ++ .gpio = WEIO_GPIO_LED_STA, ++ .active_low = 1, ++ .default_state = LEDS_GPIO_DEFSTATE_ON, ++ }, ++ { ++ .name = "weio:green:ap", ++ .gpio = WEIO_GPIO_LED_AP, ++ .active_low = 1, ++ .default_state = LEDS_GPIO_DEFSTATE_ON, ++ } ++}; ++ ++static struct gpio_keys_button weio_gpio_keys[] __initdata = { ++ { ++ .desc = "ap button", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = WEIO_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WEIO_GPIO_BTN_AP, ++ .active_low = 1, ++ }, ++ { ++ .desc = "soft-reset button", ++ .type = EV_KEY, ++ .code = BTN_1, ++ .debounce_interval = WEIO_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WEIO_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct i2c_gpio_platform_data weio_i2c_gpio_data = { ++ .sda_pin = 18, ++ .scl_pin = 19, ++}; ++ ++static struct platform_device weio_i2c_gpio = { ++ .name = "i2c-gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &weio_i2c_gpio_data, ++ }, ++}; ++ ++static void __init weio_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_wmac(art + WEIO_CALDATA_OFFSET, art + WEIO_WMAC_MAC_OFFSET); ++} ++ ++static void __init weio_setup(void) ++{ ++ weio_common_setup(); ++ ++ ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ platform_device_register(&weio_i2c_gpio); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(weio_leds_gpio), ++ weio_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WEIO_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(weio_gpio_keys), ++ weio_gpio_keys); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WEIO, "WEIO", "WeIO board", weio_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-whr-hp-g300n.c linux-4.1.13/arch/mips/ath79/mach-whr-hp-g300n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-whr-hp-g300n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-whr-hp-g300n.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,155 @@ ++/* ++ * Buffalo WHR-HP-G300N board support ++ * ++ * based on ... ++ * ++ * TP-LINK TL-WR741ND board support ++ * ++ * Copyright (C) 2009-2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define WHRHPG300N_GPIO_LED_SECURITY 0 ++#define WHRHPG300N_GPIO_LED_DIAG 1 ++#define WHRHPG300N_GPIO_LED_ROUTER 6 ++ ++#define WHRHPG300N_GPIO_BTN_ROUTER_ON 7 ++#define WHRHPG300N_GPIO_BTN_ROUTER_AUTO 8 ++#define WHRHPG300N_GPIO_BTN_RESET 11 ++#define WHRHPG300N_GPIO_BTN_AOSS 12 ++#define WHRHPG300N_GPIO_LED_LAN1 13 ++#define WHRHPG300N_GPIO_LED_LAN2 14 ++#define WHRHPG300N_GPIO_LED_LAN3 15 ++#define WHRHPG300N_GPIO_LED_LAN4 16 ++#define WHRHPG300N_GPIO_LED_WAN 17 ++ ++#define WHRHPG300N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WHRHPG300N_KEYS_DEBOUNCE_INTERVAL (3 * WHRHPG300N_KEYS_POLL_INTERVAL) ++ ++#define WHRHPG300N_MAC_OFFSET 0x20c ++ ++static struct gpio_led whrhpg300n_leds_gpio[] __initdata = { ++ { ++ .name = "buffalo:orange:security", ++ .gpio = WHRHPG300N_GPIO_LED_SECURITY, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:red:diag", ++ .gpio = WHRHPG300N_GPIO_LED_DIAG, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:router", ++ .gpio = WHRHPG300N_GPIO_LED_ROUTER, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:wan", ++ .gpio = WHRHPG300N_GPIO_LED_WAN, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:lan1", ++ .gpio = WHRHPG300N_GPIO_LED_LAN1, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:lan2", ++ .gpio = WHRHPG300N_GPIO_LED_LAN2, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:lan3", ++ .gpio = WHRHPG300N_GPIO_LED_LAN3, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:lan4", ++ .gpio = WHRHPG300N_GPIO_LED_LAN4, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button whrhpg300n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WHRHPG300N_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "aoss/wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .gpio = WHRHPG300N_GPIO_BTN_AOSS, ++ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, ++ .active_low = 1, ++ }, { ++ .desc = "router_on", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .gpio = WHRHPG300N_GPIO_BTN_ROUTER_ON, ++ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, ++ .active_low = 1, ++ }, { ++ .desc = "router_auto", ++ .type = EV_KEY, ++ .code = BTN_3, ++ .gpio = WHRHPG300N_GPIO_BTN_ROUTER_AUTO, ++ .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, ++ .active_low = 1, ++ } ++}; ++ ++static void __init whrhpg300n_setup(void) ++{ ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio), ++ whrhpg300n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(whrhpg300n_gpio_keys), ++ whrhpg300n_gpio_keys); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN ports */ ++ ath79_register_eth(1); ++ /* WAN port */ ++ ath79_register_eth(0); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 1); ++ ++ ap91_pci_init(ee, mac); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WHR_HP_G300N, "WHR-HP-G300N", "Buffalo WHR-HP-G300N", ++ whrhpg300n_setup); ++ ++MIPS_MACHINE(ATH79_MACH_WHR_G301N, "WHR-G301N", "Buffalo WHR-G301N", ++ whrhpg300n_setup); ++ ++MIPS_MACHINE(ATH79_MACH_WHR_HP_GN, "WHR-HP-GN", "Buffalo WHR-HP-GN", ++ whrhpg300n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wlae-ag300n.c linux-4.1.13/arch/mips/ath79/mach-wlae-ag300n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wlae-ag300n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wlae-ag300n.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,114 @@ ++/* ++ * Buffalo WLAE-AG300N board support ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define WLAEAG300N_MAC_OFFSET 0x20c ++#define WLAEAG300N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WLAEAG300N_KEYS_DEBOUNCE_INTERVAL (3 * WLAEAG300N_KEYS_POLL_INTERVAL) ++ ++ ++static struct gpio_led wlaeag300n_leds_gpio[] __initdata = { ++ /* ++ * Note: Writing 1 into GPIO 13 will power down the device. ++ */ ++ { ++ .name = "buffalo:green:wireless", ++ .gpio = 14, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:red:wireless", ++ .gpio = 15, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:status", ++ .gpio = 16, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:red:status", ++ .gpio = 17, ++ .active_low = 1, ++ } ++}; ++ ++ ++static struct gpio_keys_button wlaeag300n_gpio_keys[] __initdata = { ++ { ++ .desc = "function", ++ .type = EV_KEY, ++ .code = KEY_MODE, ++ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 0, ++ .active_low = 1, ++ }, { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 1, ++ .active_low = 1, ++ }, { ++ .desc = "power", ++ .type = EV_KEY, ++ .code = KEY_POWER, ++ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 11, ++ .active_low = 1, ++ }, { ++ .desc = "aoss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 12, ++ .active_low = 1, ++ } ++}; ++ ++static void __init wlaeag300n_setup(void) ++{ ++ u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 *mac1 = eeprom1 + WLAEAG300N_MAC_OFFSET; ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 1); ++ ++ ath79_register_mdio(0, ~(BIT(0) | BIT(4))); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = BIT(4); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wlaeag300n_leds_gpio), ++ wlaeag300n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WLAEAG300N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wlaeag300n_gpio_keys), ++ wlaeag300n_gpio_keys); ++ ++ ath79_register_m25p80(NULL); ++ ++ ap91_pci_init(eeprom1, mac1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WLAE_AG300N, "WLAE-AG300N", ++ "Buffalo WLAE-AG300N", wlaeag300n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wlr8100.c linux-4.1.13/arch/mips/ath79/mach-wlr8100.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wlr8100.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wlr8100.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,206 @@ ++/* ++ * Sitecom X8 AC1750 WLR-8100 board support ++ * ++ * Based on the Qualcomm Atheros AP135/AP136 reference board support code ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012-2013 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WLR8100_GPIO_LED_USB 4 ++#define WLR8100_GPIO_LED_WLAN_5G 12 ++#define WLR8100_GPIO_LED_WLAN_2G 13 ++#define WLR8100_GPIO_LED_STATUS_RED 14 ++#define WLR8100_GPIO_LED_WPS_RED 15 ++#define WLR8100_GPIO_LED_STATUS_AMBER 19 ++#define WLR8100_GPIO_LED_WPS_GREEN 20 ++ ++#define WLR8100_GPIO_BTN_WPS 16 ++#define WLR8100_GPIO_BTN_RFKILL 21 ++ ++#define WLR8100_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WLR8100_KEYS_DEBOUNCE_INTERVAL (3 * WLR8100_KEYS_POLL_INTERVAL) ++ ++#define WLR8100_MAC0_OFFSET 0 ++#define WLR8100_MAC1_OFFSET 6 ++#define WLR8100_WMAC_CALDATA_OFFSET 0x1000 ++#define WLR8100_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led wlr8100_leds_gpio[] __initdata = { ++ { ++ .name = "wlr8100:amber:status", ++ .gpio = WLR8100_GPIO_LED_STATUS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "wlr8100:red:status", ++ .gpio = WLR8100_GPIO_LED_STATUS_RED, ++ .active_low = 1, ++ }, ++ { ++ .name = "wlr8100:green:wps", ++ .gpio = WLR8100_GPIO_LED_WPS_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "wlr8100:red:wps", ++ .gpio = WLR8100_GPIO_LED_WPS_RED, ++ .active_low = 1, ++ }, ++ { ++ .name = "wlr8100:red:wlan-2g", ++ .gpio = WLR8100_GPIO_LED_WLAN_2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "wlr8100:red:usb", ++ .gpio = WLR8100_GPIO_LED_USB, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wlr8100_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WLR8100_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WLR8100_GPIO_BTN_RFKILL, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg wlr8100_ar8327_pad0_cfg; ++static struct ar8327_pad_cfg wlr8100_ar8327_pad6_cfg; ++ ++static struct ar8327_platform_data wlr8100_ar8327_data = { ++ .pad0_cfg = &wlr8100_ar8327_pad0_cfg, ++ .pad6_cfg = &wlr8100_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info wlr8100_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wlr8100_ar8327_data, ++ }, ++}; ++ ++static void __init wlr8100_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wlr8100_leds_gpio), ++ wlr8100_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WLR8100_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wlr8100_gpio_keys), ++ wlr8100_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac(art + WLR8100_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + WLR8100_MAC0_OFFSET, 0); ++ ++ mdiobus_register_board_info(wlr8100_mdio0_info, ++ ARRAY_SIZE(wlr8100_mdio0_info)); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected tot eh SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(1); ++} ++ ++static void __init wlr8100_010_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ ++ wlr8100_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; ++ wlr8100_ar8327_pad0_cfg.txclk_delay_en = true; ++ wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true; ++ wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; ++ wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; ++ wlr8100_ar8327_pad0_cfg.mac06_exchange_en = true; ++ ++ /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ ++ wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; ++ wlr8100_ar8327_pad6_cfg.rxclk_delay_en = true; ++ wlr8100_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; ++ ++ ath79_eth0_pll_data.pll_1000 = 0xa6000000; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ wlr8100_common_setup(); ++ ap91_pci_init(art + WLR8100_PCIE_CALDATA_OFFSET, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WLR8100, "WLR8100", ++ "Sitecom WLR-8100", ++ wlr8100_010_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wndap360.c linux-4.1.13/arch/mips/ath79/mach-wndap360.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wndap360.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wndap360.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,105 @@ ++/* ++ * Netgear WNDAP360 board support (proper leds / button support missing) ++ * ++ * Based on AP96 ++ * Copyright (C) 2013 Jacek Kikiewicz ++ * Copyright (C) 2009 Marco Porsch ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2010 Atheros Communications ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define WNDAP360_GPIO_LED_POWER_ORANGE 0 ++#define WNDAP360_GPIO_LED_POWER_GREEN 2 ++ ++/* Reset button - next to the power connector */ ++#define WNDAP360_GPIO_BTN_RESET 8 ++ ++#define WNDAP360_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNDAP360_KEYS_DEBOUNCE_INTERVAL (3 * WNDAP360_KEYS_POLL_INTERVAL) ++ ++#define WNDAP360_WMAC0_MAC_OFFSET 0x120c ++#define WNDAP360_WMAC1_MAC_OFFSET 0x520c ++#define WNDAP360_CALDATA0_OFFSET 0x1000 ++#define WNDAP360_CALDATA1_OFFSET 0x5000 ++ ++/* ++ * WNDAP360 this still uses leds definitions from AP96 ++ * ++ */ ++static struct gpio_led wndap360_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNDAP360_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:orange:power", ++ .gpio = WNDAP360_GPIO_LED_POWER_ORANGE, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wndap360_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WNDAP360_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDAP360_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++#define WNDAP360_LAN_PHYMASK 0x0f ++ ++static void __init wndap360_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_mdio(0, ~(WNDAP360_LAN_PHYMASK)); ++ ++ /* Reusing wifi MAC with offset of 1 as eth0 MAC */ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ++ art + WNDAP360_WMAC0_MAC_OFFSET, 1); ++ ath79_eth0_pll_data.pll_1000 = 0x11110000; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = WNDAP360_LAN_PHYMASK; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wndap360_leds_gpio), ++ wndap360_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WNDAP360_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wndap360_gpio_keys), ++ wndap360_gpio_keys); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 5); ++ ap9x_pci_setup_wmac_led_pin(1, 5); ++ ++ ap94_pci_init(art + WNDAP360_CALDATA0_OFFSET, ++ art + WNDAP360_WMAC0_MAC_OFFSET, ++ art + WNDAP360_CALDATA1_OFFSET, ++ art + WNDAP360_WMAC1_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNDAP360, "WNDAP360", "Netgear WNDAP360", wndap360_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wndr3700.c linux-4.1.13/arch/mips/ath79/mach-wndr3700.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wndr3700.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wndr3700.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,172 @@ ++/* ++ * Netgear WNDR3700 board support ++ * ++ * Copyright (C) 2009 Marco Porsch ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define WNDR3700_GPIO_LED_WPS_ORANGE 0 ++#define WNDR3700_GPIO_LED_POWER_ORANGE 1 ++#define WNDR3700_GPIO_LED_POWER_GREEN 2 ++#define WNDR3700_GPIO_LED_WPS_GREEN 4 ++#define WNDR3700_GPIO_LED_WAN_GREEN 6 ++ ++#define WNDR3700_GPIO_BTN_WPS 3 ++#define WNDR3700_GPIO_BTN_RESET 8 ++#define WNDR3700_GPIO_BTN_WIFI 11 ++ ++#define WNDR3700_GPIO_RTL8366_SDA 5 ++#define WNDR3700_GPIO_RTL8366_SCK 7 ++ ++#define WNDR3700_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL) ++ ++#define WNDR3700_ETH0_MAC_OFFSET 0 ++#define WNDR3700_ETH1_MAC_OFFSET 0x6 ++ ++#define WNDR3700_WMAC0_MAC_OFFSET 0 ++#define WNDR3700_WMAC1_MAC_OFFSET 0xc ++#define WNDR3700_CALDATA0_OFFSET 0x1000 ++#define WNDR3700_CALDATA1_OFFSET 0x5000 ++ ++static struct gpio_led wndr3700_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNDR3700_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:orange:power", ++ .gpio = WNDR3700_GPIO_LED_POWER_ORANGE, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:wps", ++ .gpio = WNDR3700_GPIO_LED_WPS_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:orange:wps", ++ .gpio = WNDR3700_GPIO_LED_WPS_ORANGE, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:wan", ++ .gpio = WNDR3700_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDR3700_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDR3700_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, { ++ .desc = "wifi", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDR3700_GPIO_BTN_WIFI, ++ .active_low = 1, ++ } ++}; ++ ++static struct rtl8366_platform_data wndr3700_rtl8366s_data = { ++ .gpio_sda = WNDR3700_GPIO_RTL8366_SDA, ++ .gpio_sck = WNDR3700_GPIO_RTL8366_SCK, ++}; ++ ++static struct platform_device wndr3700_rtl8366s_device = { ++ .name = RTL8366S_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &wndr3700_rtl8366s_data, ++ } ++}; ++ ++static void __init wndr3700_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ /* ++ * The eth0 and wmac0 interfaces share the same MAC address which ++ * can lead to problems if operated unbridged. Set the locally ++ * administered bit on the eth0 MAC to make it unique. ++ */ ++ ath79_init_local_mac(ath79_eth0_data.mac_addr, ++ art + WNDR3700_ETH0_MAC_OFFSET); ++ ath79_eth0_pll_data.pll_1000 = 0x11110000; ++ ath79_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, ++ art + WNDR3700_ETH1_MAC_OFFSET, 0); ++ ath79_eth1_pll_data.pll_1000 = 0x11110000; ++ ath79_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio), ++ wndr3700_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wndr3700_gpio_keys), ++ wndr3700_gpio_keys); ++ ++ platform_device_register(&wndr3700_rtl8366s_device); ++ platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 5); ++ ap9x_pci_setup_wmac_led_pin(1, 5); ++ ++ /* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */ ++ ap9x_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6)); ++ ++ /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */ ++ ap9x_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6)); ++ ++ ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET, ++ art + WNDR3700_WMAC0_MAC_OFFSET, ++ art + WNDR3700_CALDATA1_OFFSET, ++ art + WNDR3700_WMAC1_MAC_OFFSET); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNDR3700, "WNDR3700", ++ "NETGEAR WNDR3700/WNDR3800/WNDRMAC", ++ wndr3700_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wndr4300.c linux-4.1.13/arch/mips/ath79/mach-wndr4300.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wndr4300.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wndr4300.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,210 @@ ++/* ++ * NETGEAR WNDR3700v4/WNDR4300 board support ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * Copyright (C) 2014 Ralph Perlich ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-nfc.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++/* AR9344 GPIOs */ ++#define WNDR4300_GPIO_LED_POWER_GREEN 0 ++#define WNDR4300_GPIO_LED_POWER_AMBER 2 ++#define WNDR4300_GPIO_LED_USB 13 ++#define WNDR4300_GPIO_LED_WAN_GREEN 1 ++#define WNDR4300_GPIO_LED_WAN_AMBER 3 ++#define WNDR4300_GPIO_LED_WLAN2G 11 ++#define WNDR4300_GPIO_LED_WLAN5G 14 ++#define WNDR4300_GPIO_LED_WPS_GREEN 16 ++#define WNDR4300_GPIO_LED_WPS_AMBER 17 ++ ++#define WNDR4300_GPIO_BTN_RESET 21 ++#define WNDR4300_GPIO_BTN_WIRELESS 15 ++#define WNDR4300_GPIO_BTN_WPS 12 ++ ++/* AR9580 GPIOs */ ++#define WNDR4300_GPIO_USB_5V 0 ++ ++#define WNDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WNDR4300_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led wndr4300_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNDR4300_GPIO_LED_POWER_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:power", ++ .gpio = WNDR4300_GPIO_LED_POWER_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:wan", ++ .gpio = WNDR4300_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:wan", ++ .gpio = WNDR4300_GPIO_LED_WAN_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:usb", ++ .gpio = WNDR4300_GPIO_LED_USB, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:wps", ++ .gpio = WNDR4300_GPIO_LED_WPS_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:wps", ++ .gpio = WNDR4300_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:wlan2g", ++ .gpio = WNDR4300_GPIO_LED_WLAN2G, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:blue:wlan5g", ++ .gpio = WNDR4300_GPIO_LED_WLAN5G, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wndr4300_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDR4300_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDR4300_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Wireless button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNDR4300_GPIO_BTN_WIRELESS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg wndr4300_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg wndr4300_ar8327_led_cfg = { ++ .led_ctrl0 = 0xc737c737, ++ .led_ctrl1 = 0x00000000, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x0030c300, ++ .open_drain = false, ++}; ++ ++static struct ar8327_platform_data wndr4300_ar8327_data = { ++ .pad0_cfg = &wndr4300_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &wndr4300_ar8327_led_cfg, ++}; ++ ++static struct mdio_board_info wndr4300_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wndr4300_ar8327_data, ++ }, ++}; ++ ++static void __init wndr4300_setup(void) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(wndr4300_leds_gpio); i++) ++ ath79_gpio_output_select(wndr4300_leds_gpio[i].gpio, ++ AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr4300_leds_gpio), ++ wndr4300_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WNDR4300_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wndr4300_gpio_keys), ++ wndr4300_gpio_keys); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); ++ ++ mdiobus_register_board_info(wndr4300_mdio0_info, ++ ARRAY_SIZE(wndr4300_mdio0_info)); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* GMAC0 is connected to an AR8327N switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ath79_register_eth(0); ++ ++ ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); ++ ath79_register_nfc(); ++ ath79_register_usb(); ++ ++ ath79_register_wmac_simple(); ++ ++ /* enable power for the USB port */ ++ ap9x_pci_setup_wmac_gpio(0, BIT(WNDR4300_GPIO_USB_5V), ++ BIT(WNDR4300_GPIO_USB_5V)); ++ ++ ap91_pci_init_simple(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNDR3700_V4, "WNDR3700_V4", "NETGEAR WNDR3700v4", ++ wndr4300_setup); ++MIPS_MACHINE(ATH79_MACH_WNDR4300, "WNDR4300", "NETGEAR WNDR4300", ++ wndr4300_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000.c linux-4.1.13/arch/mips/ath79/mach-wnr2000.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wnr2000.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,145 @@ ++/* ++ * NETGEAR WNR2000 board support ++ * ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * Copyright (C) 2008-2009 Andy Boyett ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WNR2000_GPIO_LED_PWR_GREEN 14 ++#define WNR2000_GPIO_LED_PWR_AMBER 7 ++#define WNR2000_GPIO_LED_WPS 4 ++#define WNR2000_GPIO_LED_WLAN 6 ++#define WNR2000_GPIO_BTN_RESET 21 ++#define WNR2000_GPIO_BTN_WPS 8 ++ ++#define WNR2000_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNR2000_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000_KEYS_POLL_INTERVAL) ++ ++static struct mtd_partition wnr2000_partitions[] = { ++ { ++ .name = "u-boot", ++ .offset = 0, ++ .size = 0x040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "u-boot-env", ++ .offset = 0x040000, ++ .size = 0x010000, ++ }, { ++ .name = "rootfs", ++ .offset = 0x050000, ++ .size = 0x240000, ++ }, { ++ .name = "user-config", ++ .offset = 0x290000, ++ .size = 0x010000, ++ }, { ++ .name = "uImage", ++ .offset = 0x2a0000, ++ .size = 0x120000, ++ }, { ++ .name = "language_table", ++ .offset = 0x3c0000, ++ .size = 0x020000, ++ }, { ++ .name = "rootfs_checksum", ++ .offset = 0x3e0000, ++ .size = 0x010000, ++ }, { ++ .name = "art", ++ .offset = 0x3f0000, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ } ++}; ++ ++static struct flash_platform_data wnr2000_flash_data = { ++ .parts = wnr2000_partitions, ++ .nr_parts = ARRAY_SIZE(wnr2000_partitions), ++}; ++ ++static struct gpio_led wnr2000_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNR2000_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:amber:power", ++ .gpio = WNR2000_GPIO_LED_PWR_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:wps", ++ .gpio = WNR2000_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "netgear:blue:wlan", ++ .gpio = WNR2000_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNR2000_GPIO_BTN_RESET, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNR2000_GPIO_BTN_WPS, ++ } ++}; ++ ++static void __init wnr2000_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.has_ar8216 = 1; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(&wnr2000_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio), ++ wnr2000_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wnr2000_gpio_keys), ++ wnr2000_gpio_keys); ++ ++ ath79_register_wmac(eeprom, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v3.c linux-4.1.13/arch/mips/ath79/mach-wnr2000-v3.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v3.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wnr2000-v3.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,140 @@ ++/* ++ * NETGEAR WNR2000v3/WNR612v2/WNR1000v2 board support ++ * ++ * Copytight (C) 2013 Mathieu Olivari ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * Copyright (C) 2008-2009 Andy Boyett ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define WNR2000V3_GPIO_LED_WAN_GREEN 0 ++#define WNR2000V3_GPIO_LED_LAN1_AMBER 1 ++#define WNR2000V3_GPIO_LED_LAN4_AMBER 12 ++#define WNR2000V3_GPIO_LED_PWR_GREEN 14 ++#define WNR2000V3_GPIO_BTN_WPS 11 ++ ++#define WNR612V2_GPIO_LED_PWR_GREEN 11 ++ ++#define WNR1000V2_GPIO_LED_PWR_AMBER 1 ++#define WNR1000V2_GPIO_LED_PWR_GREEN 11 ++ ++#define WNR2000V3_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNR2000V3_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V3_KEYS_POLL_INTERVAL) ++ ++#define WNR2000V3_MAC0_OFFSET 0 ++#define WNR2000V3_MAC1_OFFSET 6 ++#define WNR2000V3_PCIE_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led wnr2000v3_leds_gpio[] __initdata = { ++ { ++ .name = "wnr2000v3:green:power", ++ .gpio = WNR2000V3_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "wnr2000v3:green:wan", ++ .gpio = WNR2000V3_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led wnr612v2_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNR612V2_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led wnr1000v2_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNR1000V2_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:amber:power", ++ .gpio = WNR1000V2_GPIO_LED_PWR_AMBER, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wnr2000v3_gpio_keys[] __initdata = { ++ { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WNR2000V3_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNR2000V3_GPIO_BTN_WPS, ++ } ++}; ++ ++static void __init wnr_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V3_MAC0_OFFSET, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V3_MAC1_OFFSET, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ap91_pci_init(art + WNR2000V3_PCIE_CALDATA_OFFSET, NULL); ++} ++ ++static void __init wnr2000v3_setup(void) ++{ ++ wnr_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v3_leds_gpio), ++ wnr2000v3_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WNR2000V3_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wnr2000v3_gpio_keys), ++ wnr2000v3_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNR2000_V3, "WNR2000V3", "NETGEAR WNR2000 V3", wnr2000v3_setup); ++ ++static void __init wnr612v2_setup(void) ++{ ++ wnr_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr612v2_leds_gpio), ++ wnr612v2_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNR612_V2, "WNR612V2", "NETGEAR WNR612 V2", wnr612v2_setup); ++ ++static void __init wnr1000v2_setup(void) ++{ ++ wnr_common_setup(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr1000v2_leds_gpio), ++ wnr1000v2_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNR1000_V2, "WNR1000V2", "NETGEAR WNR1000 V2", wnr1000v2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v4.c linux-4.1.13/arch/mips/ath79/mach-wnr2000-v4.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2000-v4.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wnr2000-v4.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,214 @@ ++/* ++ * NETGEAR WNR2000v4 board support ++ * ++ * Copyright (C) 2015 Michael Bazzinotti ++ * Copyright (C) 2014 Michaël Burtin ++ * Copyright (C) 2013 Mathieu Olivari ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * Copyright (C) 2008-2009 Andy Boyett ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++/* AR9341 GPIOs */ ++#define WNR2000V4_GPIO_LED_PWR_GREEN 0 ++#define WNR2000V4_GPIO_LED_PWR_AMBER 1 ++#define WNR2000V4_GPIO_LED_WPS 2 ++#define WNR2000V4_GPIO_LED_WLAN 12 ++#define WNR2000V4_GPIO_LED_LAN1_GREEN 13 ++#define WNR2000V4_GPIO_LED_LAN2_GREEN 14 ++#define WNR2000V4_GPIO_LED_LAN3_GREEN 15 ++#define WNR2000V4_GPIO_LED_LAN4_GREEN 16 ++#define WNR2000V4_GPIO_LED_LAN1_AMBER 18 ++#define WNR2000V4_GPIO_LED_LAN2_AMBER 19 ++#define WNR2000V4_GPIO_LED_LAN3_AMBER 20 ++#define WNR2000V4_GPIO_LED_LAN4_AMBER 21 ++#define WNR2000V4_GPIO_LED_WAN_GREEN 17 ++#define WNR2000V4_GPIO_LED_WAN_AMBER 22 ++/* Buttons */ ++#define WNR2000V4_GPIO_BTN_WPS 3 ++#define WNR2000V4_GPIO_BTN_RESET 4 ++#define WNR2000V4_GPIO_BTN_WLAN 11 ++#define WNR2000V4_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNR2000V4_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V4_KEYS_POLL_INTERVAL) ++ ++ ++/* ART offsets */ ++#define WNR2000V4_MAC0_OFFSET 0 /* WAN/WLAN0 MAC */ ++#define WNR2000V4_MAC1_OFFSET 6 /* Eth-switch0 MAC */ ++ ++static struct gpio_led wnr2000v4_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:green:power", ++ .gpio = WNR2000V4_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ .default_trigger = "default-on", ++ }, ++ { ++ .name = "netgear:amber:status", ++ .gpio = WNR2000V4_GPIO_LED_PWR_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:wan", ++ .gpio = WNR2000V4_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:wan", ++ .gpio = WNR2000V4_GPIO_LED_WAN_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:blue:wlan", ++ .gpio = WNR2000V4_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, ++ /* LAN LEDS */ ++ { ++ .name = "netgear:green:lan1", ++ .gpio = WNR2000V4_GPIO_LED_LAN1_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:lan2", ++ .gpio = WNR2000V4_GPIO_LED_LAN2_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:lan3", ++ .gpio = WNR2000V4_GPIO_LED_LAN3_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:lan4", ++ .gpio = WNR2000V4_GPIO_LED_LAN4_GREEN, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:lan1", ++ .gpio = WNR2000V4_GPIO_LED_LAN1_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:lan2", ++ .gpio = WNR2000V4_GPIO_LED_LAN2_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:lan3", ++ .gpio = WNR2000V4_GPIO_LED_LAN3_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:amber:lan4", ++ .gpio = WNR2000V4_GPIO_LED_LAN4_AMBER, ++ .active_low = 1, ++ }, ++ { ++ .name = "netgear:green:wps", ++ .gpio = WNR2000V4_GPIO_LED_WPS, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wnr2000v4_gpio_keys[] __initdata = { ++ { ++ .desc = "WPS button", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNR2000V4_GPIO_BTN_WPS, ++ .active_low = 1, ++ }, ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNR2000V4_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++ { ++ .desc = "WLAN button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = WNR2000V4_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WNR2000V4_GPIO_BTN_WLAN, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init wnr_common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_register_mdio(1, 0x0); ++ ++ ath79_register_usb(); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V4_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V4_MAC1_OFFSET, 0); ++ ++ /* GMAC0 is connected to the PHY0 of the internal switch, GE0 */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_switch_data.phy_poll_mask = BIT(4); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the internal switch, GE1 */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(ee, art); ++} ++ ++static void __init wnr2000v4_setup(void) ++{ ++ int i; ++ ++ wnr_common_setup(); ++ ++ /* Ensure no LED has an internal MUX signal, otherwise ++ control of LED could be lost... This is especially important ++ for most green LEDS (Eth,WAN).. who arrive in this function with ++ MUX signals set. */ ++ for (i = 0; i < ARRAY_SIZE(wnr2000v4_leds_gpio); i++) ++ ath79_gpio_output_select(wnr2000v4_leds_gpio[i].gpio, ++ AR934X_GPIO_OUT_GPIO); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v4_leds_gpio), ++ wnr2000v4_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WNR2000V4_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wnr2000v4_gpio_keys), ++ wnr2000v4_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNR2000_V4, "WNR2000V4", "NETGEAR WNR2000 V4", wnr2000v4_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wnr2200.c linux-4.1.13/arch/mips/ath79/mach-wnr2200.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wnr2200.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wnr2200.c 2015-11-21 17:22:11.759223549 +0100 +@@ -0,0 +1,137 @@ ++/* ++ * NETGEAR WNR2200 board support ++ * ++ * Copyright (C) 2013 Aidan Kissane ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define WNR2200_GPIO_LED_LAN2_AMBER 0 ++#define WNR2200_GPIO_LED_LAN4_AMBER 1 ++#define WNR2200_GPIO_LED_WPS 5 ++#define WNR2200_GPIO_LED_WAN_GREEN 7 ++#define WNR2200_GPIO_LED_USB 8 ++#define WNR2200_GPIO_LED_LAN3_AMBER 11 ++#define WNR2200_GPIO_LED_WAN_AMBER 12 ++#define WNR2200_GPIO_LED_LAN1_GREEN 13 ++#define WNR2200_GPIO_LED_LAN2_GREEN 14 ++#define WNR2200_GPIO_LED_LAN3_GREEN 15 ++#define WNR2200_GPIO_LED_LAN4_GREEN 16 ++#define WNR2200_GPIO_LED_PWR_AMBER 21 ++#define WNR2200_GPIO_LED_PWR_GREEN 22 ++#define WNR2200_GPIO_USB_5V 4 ++#define WNR2200_GPIO_USB_POWER 24 ++ ++#define WNR2200_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WNR2200_KEYS_DEBOUNCE_INTERVAL (3 * WNR2200_KEYS_POLL_INTERVAL) ++ ++#define WNR2200_MAC0_OFFSET 0 ++#define WNR2200_MAC1_OFFSET 6 ++#define WNR2200_PCIE_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led wnr2200_leds_gpio[] __initdata = { ++ { ++ .name = "netgear:amber:lan2", ++ .gpio = WNR2200_GPIO_LED_LAN2_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "netgear:amber:lan4", ++ .gpio = WNR2200_GPIO_LED_LAN4_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:wps", ++ .gpio = WNR2200_GPIO_LED_WPS, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:wan", ++ .gpio = WNR2200_GPIO_LED_WAN_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:usb", ++ .gpio = WNR2200_GPIO_LED_USB, ++ .active_low = 1, ++ }, { ++ .name = "netgear:amber:lan3", ++ .gpio = WNR2200_GPIO_LED_LAN3_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "netgear:amber:wan", ++ .gpio = WNR2200_GPIO_LED_WAN_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:lan1", ++ .gpio = WNR2200_GPIO_LED_LAN1_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:lan2", ++ .gpio = WNR2200_GPIO_LED_LAN2_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:lan3", ++ .gpio = WNR2200_GPIO_LED_LAN3_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:lan4", ++ .gpio = WNR2200_GPIO_LED_LAN4_GREEN, ++ .active_low = 1, ++ }, { ++ .name = "netgear:amber:power", ++ .gpio = WNR2200_GPIO_LED_PWR_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "netgear:green:power", ++ .gpio = WNR2200_GPIO_LED_PWR_GREEN, ++ .active_low = 1, ++ } ++}; ++ ++static void __init wnr2200_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2200_MAC0_OFFSET, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2200_MAC1_OFFSET, 0); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(NULL); ++ ap91_pci_init(art + WNR2200_PCIE_CALDATA_OFFSET, NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2200_leds_gpio), ++ wnr2200_leds_gpio); ++ ++ /* enable power for the USB port */ ++ ap9x_pci_setup_wmac_gpio(0, ++ BIT(WNR2200_GPIO_USB_5V), ++ BIT(WNR2200_GPIO_USB_5V)); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WNR2200, "WNR2200", "NETGEAR WNR2200", wnr2200_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wp543.c linux-4.1.13/arch/mips/ath79/mach-wp543.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wp543.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wp543.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,109 @@ ++/* ++ * Compex WP543/WPJ543 board support ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define WP543_GPIO_SW6 2 ++#define WP543_GPIO_LED_1 3 ++#define WP543_GPIO_LED_2 4 ++#define WP543_GPIO_LED_WLAN 5 ++#define WP543_GPIO_LED_CONN 6 ++#define WP543_GPIO_LED_DIAG 7 ++#define WP543_GPIO_SW4 8 ++ ++#define WP543_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WP543_KEYS_DEBOUNCE_INTERVAL (3 * WP543_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led wp543_leds_gpio[] __initdata = { ++ { ++ .name = "wp543:green:led1", ++ .gpio = WP543_GPIO_LED_1, ++ .active_low = 1, ++ }, { ++ .name = "wp543:green:led2", ++ .gpio = WP543_GPIO_LED_2, ++ .active_low = 1, ++ }, { ++ .name = "wp543:green:wlan", ++ .gpio = WP543_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "wp543:green:conn", ++ .gpio = WP543_GPIO_LED_CONN, ++ .active_low = 1, ++ }, { ++ .name = "wp543:green:diag", ++ .gpio = WP543_GPIO_LED_DIAG, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wp543_gpio_keys[] __initdata = { ++ { ++ .desc = "sw6", ++ .type = EV_KEY, ++ .code = BTN_0, ++ .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WP543_GPIO_SW6, ++ .active_low = 1, ++ }, { ++ .desc = "sw4", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WP543_GPIO_SW4, ++ .active_low = 1, ++ } ++}; ++ ++static const char *wp543_part_probes[] = { ++ "MyLoader", ++ NULL, ++}; ++ ++static struct flash_platform_data wp543_flash_data = { ++ .part_probes = wp543_part_probes, ++}; ++ ++static void __init wp543_setup(void) ++{ ++ ath79_register_m25p80(&wp543_flash_data); ++ ++ ath79_register_mdio(0, 0xfffffff0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.phy_mask = 0x0f; ++ ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | ++ AR71XX_RESET_GE0_PHY; ++ ath79_register_eth(0); ++ ++ ath79_register_usb(); ++ ath79_register_pci(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio), ++ wp543_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wp543_gpio_keys), ++ wp543_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WP543, "WP543", "Compex WP543", wp543_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpe72.c linux-4.1.13/arch/mips/ath79/mach-wpe72.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wpe72.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wpe72.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,97 @@ ++/* ++ * Compex WPE72 board support ++ * ++ * Copyright (C) 2012 Johnathan Boyce ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++#include "pci.h" ++ ++#define WPE72_GPIO_RESET 12 ++#define WPE72_GPIO_LED_DIAG 13 ++#define WPE72_GPIO_LED_1 14 ++#define WPE72_GPIO_LED_2 15 ++#define WPE72_GPIO_LED_3 16 ++#define WPE72_GPIO_LED_4 17 ++ ++#define WPE72_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WPE72_KEYS_DEBOUNCE_INTERVAL (3 * WPE72_KEYS_POLL_INTERVAL) ++ ++static struct gpio_led wpe72_leds_gpio[] __initdata = { ++ { ++ .name = "wpe72:green:led1", ++ .gpio = WPE72_GPIO_LED_1, ++ .active_low = 1, ++ }, { ++ .name = "wpe72:green:led2", ++ .gpio = WPE72_GPIO_LED_2, ++ .active_low = 1, ++ }, { ++ .name = "wpe72:green:led3", ++ .gpio = WPE72_GPIO_LED_3, ++ .active_low = 1, ++ }, { ++ .name = "wpe72:green:led4", ++ .gpio = WPE72_GPIO_LED_4, ++ .active_low = 1, ++ }, { ++ .name = "wpe72:green:diag", ++ .gpio = WPE72_GPIO_LED_DIAG, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wpe72_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WPE72_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WPE72_GPIO_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static const char *wpe72_part_probes[] = { ++ "MyLoader", ++ NULL, ++}; ++ ++static struct flash_platform_data wpe72_flash_data = { ++ .part_probes = wpe72_part_probes, ++}; ++ ++static void __init wpe72_setup(void) ++{ ++ ath79_register_m25p80(&wpe72_flash_data); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ath79_register_pci(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpe72_leds_gpio), ++ wpe72_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WPE72_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wpe72_gpio_keys), ++ wpe72_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WPE72, "WPE72", "Compex WPE72", wpe72_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpj344.c linux-4.1.13/arch/mips/ath79/mach-wpj344.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wpj344.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wpj344.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,175 @@ ++/* ++ * Compex WPJ344 board support ++ * ++ * Copyright (c) 2011 Qualcomm Atheros ++ * Copyright (c) 2011-2012 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-usb.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WPJ344_GPIO_LED_SIG1 15 ++#define WPJ344_GPIO_LED_SIG2 20 ++#define WPJ344_GPIO_LED_SIG3 21 ++#define WPJ344_GPIO_LED_SIG4 22 ++#define WPJ344_GPIO_LED_STATUS 14 ++ ++#define WPJ344_GPIO_BTN_RESET 12 ++ ++#define WPJ344_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WPJ344_KEYS_DEBOUNCE_INTERVAL (3 * WPJ344_KEYS_POLL_INTERVAL) ++ ++#define WPJ344_MAC0_OFFSET 0 ++#define WPJ344_MAC1_OFFSET 6 ++#define WPJ344_WMAC_CALDATA_OFFSET 0x1000 ++#define WPJ344_PCIE_CALDATA_OFFSET 0x5000 ++ ++static struct gpio_led wpj344_leds_gpio[] __initdata = { ++ { ++ .name = "wpj344:green:status", ++ .gpio = WPJ344_GPIO_LED_STATUS, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj344:red:sig1", ++ .gpio = WPJ344_GPIO_LED_SIG1, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj344:yellow:sig2", ++ .gpio = WPJ344_GPIO_LED_SIG2, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj344:green:sig3", ++ .gpio = WPJ344_GPIO_LED_SIG3, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj344:green:sig4", ++ .gpio = WPJ344_GPIO_LED_SIG4, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wpj344_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WPJ344_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WPJ344_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg wpj344_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg wpj344_ar8327_led_cfg = { ++ .led_ctrl0 = 0x00000000, ++ .led_ctrl1 = 0xc737c737, ++ .led_ctrl2 = 0x00000000, ++ .led_ctrl3 = 0x00c30c00, ++ .open_drain = true, ++}; ++ ++static struct ar8327_platform_data wpj344_ar8327_data = { ++ .pad0_cfg = &wpj344_ar8327_pad0_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &wpj344_ar8327_led_cfg, ++}; ++ ++static struct mdio_board_info wpj344_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wpj344_ar8327_data, ++ }, ++}; ++ ++static void __init wpj344_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj344_leds_gpio), ++ wpj344_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WPJ344_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wpj344_gpio_keys), ++ wpj344_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac(art + WPJ344_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_register_pci(); ++ ++ mdiobus_register_board_info(wpj344_mdio0_info, ++ ARRAY_SIZE(wpj344_mdio0_info)); ++ ++ ath79_register_mdio(1, 0x0); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ344_MAC0_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ344_MAC1_OFFSET, 0); ++ ++ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | ++ AR934X_ETH_CFG_SW_ONLY_MODE); ++ ++ /* GMAC0 is connected to an AR8327 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x06000000; ++ ++ /* GMAC1 is connected to the internal switch */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WPJ344, "WPJ344", "Compex WPJ344", wpj344_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpj531.c linux-4.1.13/arch/mips/ath79/mach-wpj531.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wpj531.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wpj531.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,143 @@ ++/* ++ * Compex WPJ531 board support ++ * ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "pci.h" ++#include "common.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WPJ531_GPIO_LED_SIG1 14 ++#define WPJ531_GPIO_LED_SIG2 15 ++#define WPJ531_GPIO_LED_SIG3 22 ++#define WPJ531_GPIO_LED_SIG4 23 ++#define WPJ531_GPIO_BUZZER 4 ++ ++#define WPJ531_GPIO_BTN_RESET 17 ++ ++#define WPJ531_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WPJ531_KEYS_DEBOUNCE_INTERVAL (3 * WPJ531_KEYS_POLL_INTERVAL) ++ ++#define WPJ531_MAC0_OFFSET 0x10 ++#define WPJ531_MAC1_OFFSET 0x18 ++#define WPJ531_WMAC_CALDATA_OFFSET 0x1000 ++#define WPJ531_PCIE_CALDATA_OFFSET 0x5000 ++ ++#define WPJ531_ART_SIZE 0x8000 ++ ++static struct gpio_led wpj531_leds_gpio[] __initdata = { ++ { ++ .name = "wpj531:red:sig1", ++ .gpio = WPJ531_GPIO_LED_SIG1, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj531:yellow:sig2", ++ .gpio = WPJ531_GPIO_LED_SIG2, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj531:green:sig3", ++ .gpio = WPJ531_GPIO_LED_SIG3, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj531:green:sig4", ++ .gpio = WPJ531_GPIO_LED_SIG4, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj531:buzzer", ++ .gpio = WPJ531_GPIO_BUZZER, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button wpj531_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WPJ531_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WPJ531_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static void __init common_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_setup_ar933x_phy4_switch(false, false); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN */ ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.phy_mask = BIT(4); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ531_MAC0_OFFSET, 0); ++ ath79_register_eth(0); ++ ++ /* WAN */ ++ ath79_switch_data.phy4_mii_en = 1; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_switch_data.phy_poll_mask |= BIT(4); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ531_MAC1_OFFSET, 0); ++ ath79_register_eth(1); ++ ++ ath79_register_wmac(art + WPJ531_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_register_pci(); ++ ath79_register_usb(); ++} ++ ++static void __init wpj531_setup(void) ++{ ++ common_setup(); ++ ++ ath79_register_leds_gpio(-1, ++ ARRAY_SIZE(wpj531_leds_gpio), ++ wpj531_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ++ WPJ531_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wpj531_gpio_keys), ++ wpj531_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WPJ531, "WPJ531", "Compex WPJ531", wpj531_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wpj558.c linux-4.1.13/arch/mips/ath79/mach-wpj558.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wpj558.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wpj558.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,177 @@ ++/* ++ * Compex WPJ558 board support ++ * ++ * Copyright (c) 2012 Qualcomm Atheros ++ * Copyright (c) 2012-2013 Gabor Juhos ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "pci.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-eth.h" ++#include "dev-usb.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WPJ558_GPIO_LED_SIG1 14 ++#define WPJ558_GPIO_LED_SIG2 15 ++#define WPJ558_GPIO_LED_SIG3 22 ++#define WPJ558_GPIO_LED_SIG4 23 ++#define WPJ558_GPIO_BUZZER 4 ++ ++#define WPJ558_GPIO_BTN_RESET 17 ++ ++#define WPJ558_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WPJ558_KEYS_DEBOUNCE_INTERVAL (3 * WPJ558_KEYS_POLL_INTERVAL) ++ ++#define WPJ558_MAC_OFFSET 0x1002 ++#define WPJ558_WMAC_CALDATA_OFFSET 0x1000 ++ ++static struct gpio_led wpj558_leds_gpio[] __initdata = { ++ { ++ .name = "wpj558:red:sig1", ++ .gpio = WPJ558_GPIO_LED_SIG1, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj558:yellow:sig2", ++ .gpio = WPJ558_GPIO_LED_SIG2, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj558:green:sig3", ++ .gpio = WPJ558_GPIO_LED_SIG3, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj558:green:sig4", ++ .gpio = WPJ558_GPIO_LED_SIG4, ++ .active_low = 1, ++ }, ++ { ++ .name = "wpj558:buzzer", ++ .gpio = WPJ558_GPIO_BUZZER, ++ .active_low = 0, ++ } ++}; ++ ++static struct gpio_keys_button wpj558_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WPJ558_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WPJ558_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, ++}; ++ ++static struct ar8327_pad_cfg wpj558_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_SGMII, ++ .sgmii_delay_en = true, ++}; ++ ++static struct ar8327_pad_cfg wpj558_ar8327_pad6_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_platform_data wpj558_ar8327_data = { ++ .pad0_cfg = &wpj558_ar8327_pad0_cfg, ++ .pad6_cfg = &wpj558_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++}; ++ ++static struct mdio_board_info wpj558_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wpj558_ar8327_data, ++ }, ++}; ++ ++static void __init wpj558_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ ++ ath79_register_m25p80(NULL); ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj558_leds_gpio), ++ wpj558_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WPJ558_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wpj558_gpio_keys), ++ wpj558_gpio_keys); ++ ++ ath79_register_usb(); ++ ++ ath79_register_wmac(art + WPJ558_WMAC_CALDATA_OFFSET, NULL); ++ ++ ath79_register_pci(); ++ ++ mdiobus_register_board_info(wpj558_mdio0_info, ++ ARRAY_SIZE(wpj558_mdio0_info)); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ558_MAC_OFFSET, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ558_MAC_OFFSET, 0); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ /* GMAC0 is connected to an AR8327 switch */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x56000000; ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WPJ558, "WPJ558", "Compex WPJ558", wpj558_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wrt160nl.c linux-4.1.13/arch/mips/ath79/mach-wrt160nl.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wrt160nl.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wrt160nl.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,126 @@ ++/* ++ * Linksys WRT160NL board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "nvram.h" ++#include "machtypes.h" ++ ++#define WRT160NL_GPIO_LED_POWER 14 ++#define WRT160NL_GPIO_LED_WPS_AMBER 9 ++#define WRT160NL_GPIO_LED_WPS_BLUE 8 ++#define WRT160NL_GPIO_LED_WLAN 6 ++ ++#define WRT160NL_GPIO_BTN_WPS 7 ++#define WRT160NL_GPIO_BTN_RESET 21 ++ ++#define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) ++ ++#define WRT160NL_NVRAM_ADDR 0x1f7e0000 ++#define WRT160NL_NVRAM_SIZE 0x10000 ++ ++static const char *wrt160nl_part_probes[] = { ++ "cybertan", ++ NULL, ++}; ++ ++static struct flash_platform_data wrt160nl_flash_data = { ++ .part_probes = wrt160nl_part_probes, ++}; ++ ++static struct gpio_led wrt160nl_leds_gpio[] __initdata = { ++ { ++ .name = "wrt160nl:blue:power", ++ .gpio = WRT160NL_GPIO_LED_POWER, ++ .active_low = 1, ++ .default_trigger = "default-on", ++ }, { ++ .name = "wrt160nl:amber:wps", ++ .gpio = WRT160NL_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "wrt160nl:blue:wps", ++ .gpio = WRT160NL_GPIO_LED_WPS_BLUE, ++ .active_low = 1, ++ }, { ++ .name = "wrt160nl:blue:wlan", ++ .gpio = WRT160NL_GPIO_LED_WLAN, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WRT160NL_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wps", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WRT160NL_GPIO_BTN_WPS, ++ .active_low = 1, ++ } ++}; ++ ++static void __init wrt160nl_setup(void) ++{ ++ const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 mac[6]; ++ ++ if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, ++ "lan_hwaddr=", mac) == 0) { ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ } ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.phy_mask = 0x01; ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(&wrt160nl_flash_data); ++ ++ ath79_register_usb(); ++ ++ if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, ++ "wl0_hwaddr=", mac) == 0) ++ ath79_register_wmac(eeprom, mac); ++ else ++ ath79_register_wmac(eeprom, NULL); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), ++ wrt160nl_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wrt160nl_gpio_keys), ++ wrt160nl_gpio_keys); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", ++ wrt160nl_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wrt400n.c linux-4.1.13/arch/mips/ath79/mach-wrt400n.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wrt400n.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wrt400n.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,161 @@ ++/* ++ * Linksys WRT400N board support ++ * ++ * Copyright (C) 2009-2012 Gabor Juhos ++ * Copyright (C) 2009 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "machtypes.h" ++ ++#define WRT400N_GPIO_LED_POWER 1 ++#define WRT400N_GPIO_LED_WPS_BLUE 4 ++#define WRT400N_GPIO_LED_WPS_AMBER 5 ++#define WRT400N_GPIO_LED_WLAN 6 ++ ++#define WRT400N_GPIO_BTN_RESET 8 ++#define WRT400N_GPIO_BTN_WLSEC 3 ++ ++#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL) ++ ++#define WRT400N_MAC_ADDR_OFFSET 0x120c ++#define WRT400N_CALDATA0_OFFSET 0x1000 ++#define WRT400N_CALDATA1_OFFSET 0x5000 ++ ++static struct mtd_partition wrt400n_partitions[] = { ++ { ++ .name = "uboot", ++ .offset = 0, ++ .size = 0x030000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "env", ++ .offset = 0x030000, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "linux", ++ .offset = 0x040000, ++ .size = 0x140000, ++ }, { ++ .name = "rootfs", ++ .offset = 0x180000, ++ .size = 0x630000, ++ }, { ++ .name = "nvram", ++ .offset = 0x7b0000, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "factory", ++ .offset = 0x7c0000, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "language", ++ .offset = 0x7d0000, ++ .size = 0x020000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "caldata", ++ .offset = 0x7f0000, ++ .size = 0x010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x040000, ++ .size = 0x770000, ++ } ++}; ++ ++static struct flash_platform_data wrt400n_flash_data = { ++ .parts = wrt400n_partitions, ++ .nr_parts = ARRAY_SIZE(wrt400n_partitions), ++}; ++ ++static struct gpio_led wrt400n_leds_gpio[] __initdata = { ++ { ++ .name = "wrt400n:blue:wps", ++ .gpio = WRT400N_GPIO_LED_WPS_BLUE, ++ .active_low = 1, ++ }, { ++ .name = "wrt400n:amber:wps", ++ .gpio = WRT400N_GPIO_LED_WPS_AMBER, ++ .active_low = 1, ++ }, { ++ .name = "wrt400n:blue:wlan", ++ .gpio = WRT400N_GPIO_LED_WLAN, ++ .active_low = 1, ++ }, { ++ .name = "wrt400n:blue:power", ++ .gpio = WRT400N_GPIO_LED_POWER, ++ .active_low = 0, ++ .default_trigger = "default-on", ++ } ++}; ++ ++static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, ++ .gpio = WRT400N_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "wlsec", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, ++ .gpio = WRT400N_GPIO_BTN_WLSEC, ++ .active_low = 1, ++ } ++}; ++ ++static void __init wrt400n_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; ++ ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth0_data.speed = SPEED_100; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_m25p80(&wrt400n_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio), ++ wrt400n_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wrt400n_gpio_keys), ++ wrt400n_gpio_keys); ++ ++ ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL, ++ art + WRT400N_CALDATA1_OFFSET, NULL); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-450hp2.c linux-4.1.13/arch/mips/ath79/mach-wzr-450hp2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-450hp2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wzr-450hp2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,221 @@ ++/* ++ * Buffalo WZR-450HP2 board support ++ * ++ * Copyright (c) 2013 Gabor Juhos ++ * ++ * Based on the Qualcomm Atheros AP135/AP136 reference board support code ++ * Copyright (c) 2012 Qualcomm Atheros ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-spi.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WZR_450HP2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WZR_450HP2_KEYS_DEBOUNCE_INTERVAL (3 * WZR_450HP2_KEYS_POLL_INTERVAL) ++ ++#define WZR_450HP2_WMAC_CALDATA_OFFSET 0x1000 ++ ++static struct mtd_partition wzrhpg450h_partitions[] = { ++ { ++ .name = "u-boot", ++ .offset = 0, ++ .size = 0x0040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "u-boot-env", ++ .offset = 0x0040000, ++ .size = 0x0010000, ++ }, { ++ .name = "ART", ++ .offset = 0x0ff0000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x0050000, ++ .size = 0x0f90000, ++ }, { ++ .name = "user_property", ++ .offset = 0x0fe0000, ++ .size = 0x0010000, ++ } ++}; ++ ++static struct flash_platform_data wzr_450hp2_flash_data = { ++ .parts = wzrhpg450h_partitions, ++ .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), ++}; ++ ++static struct gpio_led wzr_450hp2_leds_gpio[] __initdata = { ++ { ++ .name = "buffalo:green:wps", ++ .gpio = 3, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:system", ++ .gpio = 20, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:wlan", ++ .gpio = 18, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wzr_450hp2_gpio_keys[] __initdata = { ++ { ++ .desc = "Reset button", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 17, ++ .active_low = 1, ++ }, ++ { ++ .desc = "RFKILL button", ++ .type = EV_KEY, ++ .code = KEY_RFKILL, ++ .debounce_interval = WZR_450HP2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 21, ++ .active_low = 1, ++ }, ++}; ++ ++static const struct ar8327_led_info wzr_450hp2_leds_ar8327[] = { ++ AR8327_LED_INFO(PHY0_0, HW, "buffalo:green:lan1"), ++ AR8327_LED_INFO(PHY1_0, HW, "buffalo:green:lan2"), ++ AR8327_LED_INFO(PHY2_0, HW, "buffalo:green:lan3"), ++ AR8327_LED_INFO(PHY3_0, HW, "buffalo:green:lan4"), ++ AR8327_LED_INFO(PHY4_0, HW, "buffalo:green:wan"), ++}; ++ ++/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ ++static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad0_cfg = { ++ .mode = AR8327_PAD_MAC_SGMII, ++ .sgmii_delay_en = true, ++}; ++ ++/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ ++static struct ar8327_pad_cfg wzr_450hp2_ar8327_pad6_cfg = { ++ .mode = AR8327_PAD_MAC_RGMII, ++ .txclk_delay_en = true, ++ .rxclk_delay_en = true, ++ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, ++ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, ++}; ++ ++static struct ar8327_led_cfg wzr_450hp2_ar8327_led_cfg = { ++ .led_ctrl0 = 0xcc35cc35, ++ .led_ctrl1 = 0xca35ca35, ++ .led_ctrl2 = 0xc935c935, ++ .led_ctrl3 = 0x03ffff00, ++ .open_drain = true, ++}; ++ ++static struct ar8327_platform_data wzr_450hp2_ar8327_data = { ++ .pad0_cfg = &wzr_450hp2_ar8327_pad0_cfg, ++ .pad6_cfg = &wzr_450hp2_ar8327_pad6_cfg, ++ .port0_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .port6_cfg = { ++ .force_link = 1, ++ .speed = AR8327_PORT_SPEED_1000, ++ .duplex = 1, ++ .txpause = 1, ++ .rxpause = 1, ++ }, ++ .led_cfg = &wzr_450hp2_ar8327_led_cfg, ++ .num_leds = ARRAY_SIZE(wzr_450hp2_leds_ar8327), ++ .leds = wzr_450hp2_leds_ar8327, ++}; ++ ++static struct mdio_board_info wzr_450hp2_mdio0_info[] = { ++ { ++ .bus_id = "ag71xx-mdio.0", ++ .phy_addr = 0, ++ .platform_data = &wzr_450hp2_ar8327_data, ++ }, ++}; ++ ++static void __init wzr_450hp2_setup(void) ++{ ++ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); ++ u8 *mac_wan = art; ++ u8 *mac_lan = mac_wan + ETH_ALEN; ++ ++ ath79_register_m25p80(&wzr_450hp2_flash_data); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzr_450hp2_leds_gpio), ++ wzr_450hp2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WZR_450HP2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wzr_450hp2_gpio_keys), ++ wzr_450hp2_gpio_keys); ++ ++ ath79_register_wmac(art + WZR_450HP2_WMAC_CALDATA_OFFSET, mac_lan); ++ ++ mdiobus_register_board_info(wzr_450hp2_mdio0_info, ++ ARRAY_SIZE(wzr_450hp2_mdio0_info)); ++ ath79_register_mdio(0, 0x0); ++ ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ++ ++ /* GMAC0 is connected to the RMGII interface */ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; ++ ath79_eth0_pll_data.pll_1000 = 0x56000000; ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac_wan, 0); ++ ath79_register_eth(0); ++ ++ /* GMAC1 is connected to the SGMII interface */ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; ++ ath79_eth1_data.speed = SPEED_1000; ++ ath79_eth1_data.duplex = DUPLEX_FULL; ++ ath79_eth1_pll_data.pll_1000 = 0x03000101; ++ ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac_lan, 0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WZR_450HP2, "WZR-450HP2", ++ "Buffalo WZR-450HP2", wzr_450hp2_setup); ++ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-ag300h.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-ag300h.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-ag300h.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-ag300h.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,205 @@ ++/* ++ * Buffalo WZR-HP-AG300H board support ++ * ++ * Copyright (C) 2011 Felix Fietkau ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define WZRHPAG300H_MAC_OFFSET 0x20c ++#define WZRHPAG300H_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL) ++ ++static struct mtd_partition wzrhpag300h_flash_partitions[] = { ++ { ++ .name = "u-boot", ++ .offset = 0, ++ .size = 0x0040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "u-boot-env", ++ .offset = 0x0040000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "art", ++ .offset = 0x0050000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x0060000, ++ .size = 0x1f90000, ++ }, { ++ .name = "user_property", ++ .offset = 0x1ff0000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ } ++}; ++ ++static struct flash_platform_data wzrhpag300h_flash_data = { ++ .parts = wzrhpag300h_flash_partitions, ++ .nr_parts = ARRAY_SIZE(wzrhpag300h_flash_partitions), ++}; ++ ++static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = { ++ { ++ .name = "buffalo:red:diag", ++ .gpio = 1, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led wzrhpag300h_wmac0_leds_gpio[] = { ++ { ++ .name = "buffalo:amber:band2g", ++ .gpio = 1, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:usb", ++ .gpio = 3, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:band2g", ++ .gpio = 5, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led wzrhpag300h_wmac1_leds_gpio[] = { ++ { ++ .name = "buffalo:green:band5g", ++ .gpio = 1, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:router", ++ .gpio = 3, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:blue:movie_engine", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:amber:band5g", ++ .gpio = 5, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 11, ++ .active_low = 1, ++ }, { ++ .desc = "usb", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 3, ++ .active_low = 1, ++ }, { ++ .desc = "aoss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 5, ++ .active_low = 1, ++ }, { ++ .desc = "router_auto", ++ .type = EV_SW, ++ .code = BTN_6, ++ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 6, ++ .active_low = 1, ++ }, { ++ .desc = "router_off", ++ .type = EV_SW, ++ .code = BTN_5, ++ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 7, ++ .active_low = 1, ++ }, { ++ .desc = "movie_engine", ++ .type = EV_SW, ++ .code = BTN_7, ++ .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 8, ++ .active_low = 1, ++ } ++}; ++ ++static void __init wzrhpag300h_setup(void) ++{ ++ u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000); ++ u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000); ++ u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET; ++ u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET; ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 1); ++ ++ ath79_register_mdio(0, ~(BIT(0) | BIT(4))); ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = BIT(4); ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio), ++ wzrhpag300h_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wzrhpag300h_gpio_keys), ++ wzrhpag300h_gpio_keys); ++ ++ ath79_register_m25p80_multi(&wzrhpag300h_flash_data); ++ ++ ap94_pci_init(eeprom1, mac1, eeprom2, mac2); ++ ++ ap9x_pci_setup_wmac_led_pin(0, 1); ++ ap9x_pci_setup_wmac_led_pin(1, 5); ++ ++ ap9x_pci_setup_wmac_leds(0, wzrhpag300h_wmac0_leds_gpio, ++ ARRAY_SIZE(wzrhpag300h_wmac0_leds_gpio)); ++ ap9x_pci_setup_wmac_leds(1, wzrhpag300h_wmac1_leds_gpio, ++ ARRAY_SIZE(wzrhpag300h_wmac1_leds_gpio)); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WZR_HP_AG300H, "WZR-HP-AG300H", ++ "Buffalo WZR-HP-AG300H/WZR-600DHP", wzrhpag300h_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh2.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh2.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh2.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh2.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,170 @@ ++/* ++ * Buffalo WZR-HP-G300NH2 board support ++ * ++ * Copyright (C) 2011 Felix Fietkau ++ * Copyright (C) 2011 Mark Deneen ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-ap9x-pci.h" ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-m25p80.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define WZRHPG300NH2_MAC_OFFSET 0x20c ++#define WZRHPG300NH2_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH2_KEYS_POLL_INTERVAL) ++ ++static struct mtd_partition wzrhpg300nh2_flash_partitions[] = { ++ { ++ .name = "u-boot", ++ .offset = 0, ++ .size = 0x0040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "u-boot-env", ++ .offset = 0x0040000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "art", ++ .offset = 0x0050000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x0060000, ++ .size = 0x1f90000, ++ }, { ++ .name = "user_property", ++ .offset = 0x1ff0000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ } ++}; ++ ++static struct flash_platform_data wzrhpg300nh2_flash_data = { ++ .parts = wzrhpg300nh2_flash_partitions, ++ .nr_parts = ARRAY_SIZE(wzrhpg300nh2_flash_partitions), ++}; ++ ++static struct gpio_led wzrhpg300nh2_leds_gpio[] __initdata = { ++ { ++ .name = "buffalo:red:diag", ++ .gpio = 16, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led wzrhpg300nh2_wmac_leds_gpio[] = { ++ { ++ .name = "buffalo:blue:usb", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:orange:security", ++ .gpio = 6, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:router", ++ .gpio = 7, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:blue:movie_engine_on", ++ .gpio = 8, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:blue:movie_engine_off", ++ .gpio = 9, ++ .active_low = 1, ++ }, ++}; ++ ++/* The AOSS button is wmac gpio 12 */ ++static struct gpio_keys_button wzrhpg300nh2_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 1, ++ .active_low = 1, ++ }, { ++ .desc = "usb", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 7, ++ .active_low = 1, ++ }, { ++ .desc = "qos", ++ .type = EV_KEY, ++ .code = BTN_3, ++ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 11, ++ .active_low = 0, ++ }, { ++ .desc = "router_on", ++ .type = EV_KEY, ++ .code = BTN_5, ++ .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 8, ++ .active_low = 0, ++ }, ++}; ++ ++static void __init wzrhpg300nh2_setup(void) ++{ ++ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000); ++ u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET; ++ /* There is an eth1 but it is not connected to the switch */ ++ ++ ath79_register_m25p80_multi(&wzrhpg300nh2_flash_data); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); ++ ath79_register_mdio(0, ~(BIT(0))); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_register_eth(0); ++ ++ /* gpio13 is usb power. Turn it on. */ ++ gpio_request_one(13, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio), ++ wzrhpg300nh2_leds_gpio); ++ ath79_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wzrhpg300nh2_gpio_keys), ++ wzrhpg300nh2_gpio_keys); ++ ap9x_pci_setup_wmac_led_pin(0, 5); ++ ap9x_pci_setup_wmac_leds(0, wzrhpg300nh2_wmac_leds_gpio, ++ ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio)); ++ ++ ap91_pci_init(eeprom, mac0); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH2, "WZR-HP-G300NH2", ++ "Buffalo WZR-HP-G300NH2", wzrhpg300nh2_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g300nh.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g300nh.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,279 @@ ++/* ++ * Buffalo WZR-HP-G300NH board support ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-usb.h" ++#include "dev-wmac.h" ++#include "machtypes.h" ++ ++#define WZRHPG300NH_GPIO_LED_USB 0 ++#define WZRHPG300NH_GPIO_LED_DIAG 1 ++#define WZRHPG300NH_GPIO_LED_WIRELESS 6 ++#define WZRHPG300NH_GPIO_LED_SECURITY 17 ++#define WZRHPG300NH_GPIO_LED_ROUTER 18 ++ ++#define WZRHPG300NH_GPIO_RTL8366_SDA 19 ++#define WZRHPG300NH_GPIO_RTL8366_SCK 20 ++ ++#define WZRHPG300NH_GPIO_74HC153_S0 9 ++#define WZRHPG300NH_GPIO_74HC153_S1 11 ++#define WZRHPG300NH_GPIO_74HC153_1Y 12 ++#define WZRHPG300NH_GPIO_74HC153_2Y 14 ++ ++#define WZRHPG300NH_GPIO_EXP_BASE 32 ++#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0) ++#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1) ++#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2) ++#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3) ++#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5) ++#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6) ++#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7) ++ ++#define WZRHPG300NH_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL) ++ ++#define WZRHPG300NH_MAC_OFFSET 0x20c ++ ++static struct mtd_partition wzrhpg300nh_flash_partitions[] = { ++ { ++ .name = "u-boot", ++ .offset = 0, ++ .size = 0x0040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "u-boot-env", ++ .offset = 0x0040000, ++ .size = 0x0020000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x0060000, ++ .size = 0x1f60000, ++ }, { ++ .name = "user_property", ++ .offset = 0x1fc0000, ++ .size = 0x0020000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "art", ++ .offset = 0x1fe0000, ++ .size = 0x0020000, ++ .mask_flags = MTD_WRITEABLE, ++ } ++}; ++ ++static struct physmap_flash_data wzrhpg300nh_flash_data = { ++ .width = 2, ++ .parts = wzrhpg300nh_flash_partitions, ++ .nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions), ++}; ++ ++#define WZRHPG300NH_FLASH_BASE 0x1e000000 ++#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024) ++ ++static struct resource wzrhpg300nh_flash_resources[] = { ++ [0] = { ++ .start = WZRHPG300NH_FLASH_BASE, ++ .end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device wzrhpg300nh_flash_device = { ++ .name = "physmap-flash", ++ .id = -1, ++ .resource = wzrhpg300nh_flash_resources, ++ .num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources), ++ .dev = { ++ .platform_data = &wzrhpg300nh_flash_data, ++ } ++}; ++ ++static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = { ++ { ++ .name = "buffalo:orange:security", ++ .gpio = WZRHPG300NH_GPIO_LED_SECURITY, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:wireless", ++ .gpio = WZRHPG300NH_GPIO_LED_WIRELESS, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:green:router", ++ .gpio = WZRHPG300NH_GPIO_LED_ROUTER, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:red:diag", ++ .gpio = WZRHPG300NH_GPIO_LED_DIAG, ++ .active_low = 1, ++ }, { ++ .name = "buffalo:blue:usb", ++ .gpio = WZRHPG300NH_GPIO_LED_USB, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_RESET, ++ .active_low = 1, ++ }, { ++ .desc = "aoss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_AOSS, ++ .active_low = 1, ++ }, { ++ .desc = "usb", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_USB, ++ .active_low = 1, ++ }, { ++ .desc = "qos_on", ++ .type = EV_KEY, ++ .code = BTN_3, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_QOS_ON, ++ .active_low = 0, ++ }, { ++ .desc = "qos_off", ++ .type = EV_KEY, ++ .code = BTN_4, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF, ++ .active_low = 0, ++ }, { ++ .desc = "router_on", ++ .type = EV_KEY, ++ .code = BTN_5, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON, ++ .active_low = 0, ++ }, { ++ .desc = "router_auto", ++ .type = EV_KEY, ++ .code = BTN_6, ++ .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO, ++ .active_low = 0, ++ } ++}; ++ ++static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = { ++ .gpio_base = WZRHPG300NH_GPIO_EXP_BASE, ++ .gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0, ++ .gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1, ++ .gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y, ++ .gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y, ++}; ++ ++static struct platform_device wzrhpg300nh_74hc153_device = { ++ .name = NXP_74HC153_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &wzrhpg300nh_74hc153_data, ++ } ++}; ++ ++static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = { ++ .gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA, ++ .gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK, ++}; ++ ++static struct platform_device wzrhpg300nh_rtl8366s_device = { ++ .name = RTL8366S_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &wzrhpg300nh_rtl8366_data, ++ } ++}; ++ ++static struct platform_device wzrhpg300nh_rtl8366rb_device = { ++ .name = RTL8366RB_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &wzrhpg300nh_rtl8366_data, ++ } ++}; ++ ++static void __init wzrhpg300nh_setup(void) ++{ ++ u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); ++ u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; ++ bool hasrtl8366rb = false; ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB) ++ hasrtl8366rb = true; ++ ++ if (hasrtl8366rb) { ++ ath79_eth0_pll_data.pll_1000 = 0x1f000000; ++ ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; ++ ath79_eth1_pll_data.pll_1000 = 0x100; ++ ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; ++ } else { ++ ath79_eth0_pll_data.pll_1000 = 0x1e000100; ++ ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; ++ ath79_eth1_pll_data.pll_1000 = 0x1e000100; ++ ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; ++ } ++ ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ++ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth1_data.phy_mask = 0x10; ++ ++ ath79_register_eth(0); ++ ath79_register_eth(1); ++ ++ ath79_register_usb(); ++ ath79_register_wmac(eeprom, NULL); ++ ++ platform_device_register(&wzrhpg300nh_74hc153_device); ++ platform_device_register(&wzrhpg300nh_flash_device); ++ ++ if (hasrtl8366rb) ++ platform_device_register(&wzrhpg300nh_rtl8366rb_device); ++ else ++ platform_device_register(&wzrhpg300nh_rtl8366s_device); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio), ++ wzrhpg300nh_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wzrhpg300nh_gpio_keys), ++ wzrhpg300nh_gpio_keys); ++ ++} ++ ++MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH, "WZR-HP-G300NH", ++ "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g450h.c linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g450h.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-wzr-hp-g450h.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-wzr-hp-g450h.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,165 @@ ++/* ++ * Buffalo WZR-HP-G450G board support ++ * ++ * Copyright (C) 2011 Felix Fietkau ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "dev-usb.h" ++#include "machtypes.h" ++ ++#define WZRHPG450H_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define WZRHPG450H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG450H_KEYS_POLL_INTERVAL) ++ ++static struct mtd_partition wzrhpg450h_partitions[] = { ++ { ++ .name = "u-boot", ++ .offset = 0, ++ .size = 0x0040000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "u-boot-env", ++ .offset = 0x0040000, ++ .size = 0x0010000, ++ }, { ++ .name = "ART", ++ .offset = 0x0050000, ++ .size = 0x0010000, ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "firmware", ++ .offset = 0x0060000, ++ .size = 0x1f80000, ++ }, { ++ .name = "user_property", ++ .offset = 0x1fe0000, ++ .size = 0x0020000, ++ } ++}; ++ ++static struct flash_platform_data wzrhpg450h_flash_data = { ++ .parts = wzrhpg450h_partitions, ++ .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), ++}; ++ ++static struct gpio_led wzrhpg450h_leds_gpio[] __initdata = { ++ { ++ .name = "buffalo:red:diag", ++ .gpio = 14, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:orange:security", ++ .gpio = 13, ++ .active_low = 1, ++ }, ++}; ++ ++ ++static struct gpio_led wzrhpg450h_wmac_leds_gpio[] = { ++ { ++ .name = "buffalo:blue:movie_engine", ++ .gpio = 13, ++ .active_low = 1, ++ }, ++ { ++ .name = "buffalo:green:router", ++ .gpio = 14, ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_keys_button wzrhpg450h_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 6, ++ .active_low = 1, ++ }, { ++ .desc = "usb", ++ .type = EV_KEY, ++ .code = BTN_2, ++ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 1, ++ .active_low = 1, ++ }, { ++ .desc = "aoss", ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 8, ++ .active_low = 1, ++ }, { ++ .desc = "movie_engine", ++ .type = EV_KEY, ++ .code = BTN_6, ++ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 7, ++ .active_low = 0, ++ }, { ++ .desc = "router_off", ++ .type = EV_KEY, ++ .code = BTN_5, ++ .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = 12, ++ .active_low = 0, ++ } ++}; ++ ++ ++static void __init wzrhpg450h_init(void) ++{ ++ u8 *ee = (u8 *) KSEG1ADDR(0x1f051000); ++ u8 *mac = (u8 *) ee + 2; ++ ++ ath79_register_m25p80_multi(&wzrhpg450h_flash_data); ++ ++ ath79_register_mdio(0, ~BIT(0)); ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ++ ath79_eth0_data.speed = SPEED_1000; ++ ath79_eth0_data.duplex = DUPLEX_FULL; ++ ath79_eth0_data.phy_mask = BIT(0); ++ ++ ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio), ++ wzrhpg450h_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(wzrhpg450h_gpio_keys), ++ wzrhpg450h_gpio_keys); ++ ++ ath79_register_eth(0); ++ ++ gpio_request_one(16, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, ++ "USB power"); ++ ath79_register_usb(); ++ ++ ap91_pci_init(ee, NULL); ++ ap9x_pci_get_wmac_data(0)->tx_gain_buffalo = true; ++ ap9x_pci_get_wmac_data(1)->tx_gain_buffalo = true; ++ ap9x_pci_setup_wmac_led_pin(0, 15); ++ ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio, ++ ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); ++} ++ ++MIPS_MACHINE(ATH79_MACH_WZR_HP_G450H, "WZR-HP-G450H", "Buffalo WZR-HP-G450H", ++ wzrhpg450h_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/mach-zcn-1523h.c linux-4.1.13/arch/mips/ath79/mach-zcn-1523h.c +--- linux-4.1.13.orig/arch/mips/ath79/mach-zcn-1523h.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/mach-zcn-1523h.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,154 @@ ++/* ++ * Zcomax ZCN-1523H-2-8/5-16 board support ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include "common.h" ++#include "dev-eth.h" ++#include "dev-m25p80.h" ++#include "dev-ap9x-pci.h" ++#include "dev-gpio-buttons.h" ++#include "dev-leds-gpio.h" ++#include "machtypes.h" ++ ++#define ZCN_1523H_GPIO_BTN_RESET 0 ++#define ZCN_1523H_GPIO_LED_INIT 11 ++#define ZCN_1523H_GPIO_LED_LAN1 17 ++ ++#define ZCN_1523H_2_GPIO_LED_WEAK 13 ++#define ZCN_1523H_2_GPIO_LED_MEDIUM 14 ++#define ZCN_1523H_2_GPIO_LED_STRONG 15 ++ ++#define ZCN_1523H_5_GPIO_LAN2_POWER 1 ++#define ZCN_1523H_5_GPIO_LED_LAN2 13 ++#define ZCN_1523H_5_GPIO_LED_WEAK 14 ++#define ZCN_1523H_5_GPIO_LED_MEDIUM 15 ++#define ZCN_1523H_5_GPIO_LED_STRONG 16 ++ ++#define ZCN_1523H_KEYS_POLL_INTERVAL 20 /* msecs */ ++#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL) ++ ++static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = { ++ { ++ .desc = "reset", ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL, ++ .gpio = ZCN_1523H_GPIO_BTN_RESET, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led zcn_1523h_leds_gpio[] __initdata = { ++ { ++ .name = "zcn-1523h:amber:init", ++ .gpio = ZCN_1523H_GPIO_LED_INIT, ++ .active_low = 1, ++ }, { ++ .name = "zcn-1523h:green:lan1", ++ .gpio = ZCN_1523H_GPIO_LED_LAN1, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = { ++ { ++ .name = "zcn-1523h:red:weak", ++ .gpio = ZCN_1523H_2_GPIO_LED_WEAK, ++ .active_low = 1, ++ }, { ++ .name = "zcn-1523h:amber:medium", ++ .gpio = ZCN_1523H_2_GPIO_LED_MEDIUM, ++ .active_low = 1, ++ }, { ++ .name = "zcn-1523h:green:strong", ++ .gpio = ZCN_1523H_2_GPIO_LED_STRONG, ++ .active_low = 1, ++ } ++}; ++ ++static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = { ++ { ++ .name = "zcn-1523h:red:weak", ++ .gpio = ZCN_1523H_5_GPIO_LED_WEAK, ++ .active_low = 1, ++ }, { ++ .name = "zcn-1523h:amber:medium", ++ .gpio = ZCN_1523H_5_GPIO_LED_MEDIUM, ++ .active_low = 1, ++ }, { ++ .name = "zcn-1523h:green:strong", ++ .gpio = ZCN_1523H_5_GPIO_LED_STRONG, ++ .active_low = 1, ++ }, { ++ .name = "zcn-1523h:green:lan2", ++ .gpio = ZCN_1523H_5_GPIO_LED_LAN2, ++ .active_low = 1, ++ } ++}; ++ ++static void __init zcn_1523h_generic_setup(void) ++{ ++ u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004); ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | ++ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); ++ ++ ath79_register_m25p80(NULL); ++ ++ ath79_register_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio), ++ zcn_1523h_leds_gpio); ++ ++ ath79_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL, ++ ARRAY_SIZE(zcn_1523h_gpio_keys), ++ zcn_1523h_gpio_keys); ++ ++ ap91_pci_init(ee, mac); ++ ++ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ++ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); ++ ++ ath79_register_mdio(0, 0x0); ++ ++ /* LAN1 port */ ++ ath79_register_eth(0); ++} ++ ++static void __init zcn_1523h_2_setup(void) ++{ ++ zcn_1523h_generic_setup(); ++ ap9x_pci_setup_wmac_gpio(0, BIT(9), 0); ++ ++ ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio), ++ zcn_1523h_2_leds_gpio); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2", ++ zcn_1523h_2_setup); ++ ++static void __init zcn_1523h_5_setup(void) ++{ ++ zcn_1523h_generic_setup(); ++ ap9x_pci_setup_wmac_gpio(0, BIT(8), 0); ++ ++ ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio), ++ zcn_1523h_5_leds_gpio); ++ ++ /* LAN2 port */ ++ ath79_register_eth(1); ++} ++ ++MIPS_MACHINE(ATH79_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5", ++ zcn_1523h_5_setup); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/Makefile linux-4.1.13/arch/mips/ath79/Makefile +--- linux-4.1.13.orig/arch/mips/ath79/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/Makefile 2015-12-04 19:57:05.957975089 +0100 +@@ -17,18 +17,169 @@ + # Devices + # + obj-y += dev-common.o ++obj-$(CONFIG_ATH79_DEV_AP9X_PCI) += dev-ap9x-pci.o ++obj-$(CONFIG_ATH79_DEV_DSA) += dev-dsa.o ++obj-$(CONFIG_ATH79_DEV_ETH) += dev-eth.o + obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o + obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o ++obj-$(CONFIG_ATH79_DEV_M25P80) += dev-m25p80.o ++obj-$(CONFIG_ATH79_DEV_NFC) += dev-nfc.o + obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o + obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o + obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o + + # ++# Miscellaneous objects ++# ++obj-$(CONFIG_ATH79_NVRAM) += nvram.o ++obj-$(CONFIG_ATH79_PCI_ATH9K_FIXUP) += pci-ath9k-fixup.o ++obj-$(CONFIG_ATH79_ROUTERBOOT) += routerboot.o ++ ++# + # Machines + # ++obj-$(CONFIG_ATH79_MACH_ALFA_AP96) += mach-alfa-ap96.o ++obj-$(CONFIG_ATH79_MACH_ALFA_NX) += mach-alfa-nx.o ++obj-$(CONFIG_ATH79_MACH_ALL0258N) += mach-all0258n.o ++obj-$(CONFIG_ATH79_MACH_ALL0315N) += mach-all0315n.o ++obj-$(CONFIG_ATH79_MACH_ANTMINER_S1)+= mach-antminer-s1.o ++obj-$(CONFIG_ATH79_MACH_ANTMINER_S3)+= mach-antminer-s3.o ++obj-$(CONFIG_ATH79_MACH_ARDUINO_YUN) += mach-arduino-yun.o ++obj-$(CONFIG_ATH79_MACH_AP113) += mach-ap113.o + obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o ++obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o + obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o ++obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o ++obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o ++obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o + obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o ++obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o ++obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o ++obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o ++obj-$(CONFIG_ATH79_MACH_AW_NR580) += mach-aw-nr580.o ++obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)+= mach-bhu-bxu2000n2-a.o ++obj-$(CONFIG_ATH79_MACH_BSB) += mach-bsb.o ++obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o ++obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o ++obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o + obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o ++obj-$(CONFIG_ATH79_MACH_DLAN_HOTSPOT) += mach-dlan-hotspot.o ++obj-$(CONFIG_ATH79_MACH_DLAN_PRO_500_WP) += mach-dlan-pro-500-wp.o ++obj-$(CONFIG_ATH79_MACH_DLAN_PRO_1200_AC) += mach-dlan-pro-1200-ac.o ++obj-$(CONFIG_ATH79_MACH_DGL_5500_A1) += mach-dgl-5500-a1.o ++obj-$(CONFIG_ATH79_MACH_DHP_1565_A1) += mach-dhp-1565-a1.o ++obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o ++obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o ++obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o ++obj-$(CONFIG_ATH79_MACH_DIR_615_I1) += mach-dir-615-i1.o ++obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o ++obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o ++obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o ++obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o ++obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o ++obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o ++obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o ++obj-$(CONFIG_ATH79_MACH_EL_M150) += mach-el-m150.o ++obj-$(CONFIG_ATH79_MACH_EL_MINI) += mach-el-mini.o ++obj-$(CONFIG_ATH79_MACH_EPG5000) += mach-epg5000.o ++obj-$(CONFIG_ATH79_MACH_ESR1750) += mach-esr1750.o ++obj-$(CONFIG_ATH79_MACH_F9K1115V2) += mach-f9k1115v2.o ++obj-$(CONFIG_ATH79_MACH_GL_AR150) += mach-gl-ar150.o ++obj-$(CONFIG_ATH79_MACH_GL_AR300) += mach-gl-ar300.o ++obj-$(CONFIG_ATH79_MACH_GL_DOMINO) += mach-gl-domino.o ++obj-$(CONFIG_ATH79_MACH_GL_INET) += mach-gl-inet.o ++obj-$(CONFIG_ATH79_MACH_GS_MINIBOX_V1) += mach-gs-minibox-v1.o ++obj-$(CONFIG_ATH79_MACH_GS_OOLITE) += mach-gs-oolite.o ++obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o ++obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o ++obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o ++obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o ++obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o ++obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o ++obj-$(CONFIG_ATH79_MACH_MR16) += mach-mr16.o ++obj-$(CONFIG_ATH79_MACH_MR1750) += mach-mr1750.o ++obj-$(CONFIG_ATH79_MACH_MR600) += mach-mr600.o ++obj-$(CONFIG_ATH79_MACH_MR900) += mach-mr900.o ++obj-$(CONFIG_ATH79_MACH_MYNET_N600) += mach-mynet-n600.o ++obj-$(CONFIG_ATH79_MACH_MYNET_N750) += mach-mynet-n750.o ++obj-$(CONFIG_ATH79_MACH_MYNET_REXT) += mach-mynet-rext.o ++obj-$(CONFIG_ATH79_MACH_MZK_W04NU) += mach-mzk-w04nu.o ++obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += mach-mzk-w300nh.o ++obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o ++obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o ++obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o ++obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) += mach-onion-omega.o ++obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o + obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o ++obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o ++obj-$(CONFIG_ATH79_MACH_QIHOO_C301) += mach-qihoo-c301.o ++obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o ++obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o ++obj-$(CONFIG_ATH79_MACH_RB750) += mach-rb750.o ++obj-$(CONFIG_ATH79_MACH_RB91X) += mach-rb91x.o ++obj-$(CONFIG_ATH79_MACH_RB922) += mach-rb922.o ++obj-$(CONFIG_ATH79_MACH_RB95X) += mach-rb95x.o ++obj-$(CONFIG_ATH79_MACH_RB2011) += mach-rb2011.o ++obj-$(CONFIG_ATH79_MACH_RBSXTLITE) += mach-rbsxtlite.o ++obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o ++obj-$(CONFIG_ATH79_MACH_SMART_300) += mach-smart-300.o ++obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o ++obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o ++obj-$(CONFIG_ATH79_MACH_TEW_712BR) += mach-tew-712br.o ++obj-$(CONFIG_ATH79_MACH_TEW_732BR) += mach-tew-732br.o ++obj-$(CONFIG_ATH79_MACH_TL_MR11U) += mach-tl-mr11u.o ++obj-$(CONFIG_ATH79_MACH_TL_MR13U) += mach-tl-mr13u.o ++obj-$(CONFIG_ATH79_MACH_TL_MR3020) += mach-tl-mr3020.o ++obj-$(CONFIG_ATH79_MACH_TL_MR3X20) += mach-tl-mr3x20.o ++obj-$(CONFIG_ATH79_MACH_TL_WAX50RE) += mach-tl-wax50re.o ++obj-$(CONFIG_ATH79_MACH_TL_WA701ND_V2) += mach-tl-wa701nd-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WA7210N_V2) += mach-tl-wa7210n-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WA830RE_V2) += mach-tl-wa830re-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WA901ND) += mach-tl-wa901nd.o ++obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WDR3320_V2) += mach-tl-wdr3320-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WDR3500) += mach-tl-wdr3500.o ++obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o ++obj-$(CONFIG_ATH79_MACH_TL_WDR6500_V2) += mach-tl-wdr6500-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WR741ND) += mach-tl-wr741nd.o ++obj-$(CONFIG_ATH79_MACH_TL_WR741ND_V4) += mach-tl-wr741nd-v4.o ++obj-$(CONFIG_ATH79_MACH_TL_WR841N_V1) += mach-tl-wr841n.o ++obj-$(CONFIG_ATH79_MACH_TL_WR841N_V8) += mach-tl-wr841n-v8.o ++obj-$(CONFIG_ATH79_MACH_TL_WR841N_V9) += mach-tl-wr841n-v9.o ++obj-$(CONFIG_ATH79_MACH_TL_WR941ND) += mach-tl-wr941nd.o ++obj-$(CONFIG_ATH79_MACH_TL_WR941ND_V6) += mach-tl-wr941nd-v6.o ++obj-$(CONFIG_ATH79_MACH_TL_WR1041N_V2) += mach-tl-wr1041n-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WR1043ND) += mach-tl-wr1043nd.o ++obj-$(CONFIG_ATH79_MACH_TL_WR1043ND_V2) += mach-tl-wr1043nd-v2.o ++obj-$(CONFIG_ATH79_MACH_TL_WR2543N) += mach-tl-wr2543n.o ++obj-$(CONFIG_ATH79_MACH_TL_WR703N) += mach-tl-wr703n.o ++obj-$(CONFIG_ATH79_MACH_TL_WR720N_V3) += mach-tl-wr720n-v3.o ++obj-$(CONFIG_ATH79_MACH_TUBE2H) += mach-tube2h.o ++obj-$(CONFIG_ATH79_MACH_UBNT) += mach-ubnt.o + obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o ++obj-$(CONFIG_ATH79_MACH_WEIO) += mach-weio.o ++obj-$(CONFIG_ATH79_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o ++obj-$(CONFIG_ATH79_MACH_WLAE_AG300N) += mach-wlae-ag300n.o ++obj-$(CONFIG_ATH79_MACH_WLR8100) += mach-wlr8100.o ++obj-$(CONFIG_ATH79_MACH_WNDAP360) += mach-wndap360.o ++obj-$(CONFIG_ATH79_MACH_WNDR3700) += mach-wndr3700.o ++obj-$(CONFIG_ATH79_MACH_WNDR4300) += mach-wndr4300.o ++obj-$(CONFIG_ATH79_MACH_WNR2000) += mach-wnr2000.o ++obj-$(CONFIG_ATH79_MACH_WNR2000_V3) += mach-wnr2000-v3.o ++obj-$(CONFIG_ATH79_MACH_WNR2000_V4) += mach-wnr2000-v4.o ++obj-$(CONFIG_ATH79_MACH_WNR2200) += mach-wnr2200.o ++obj-$(CONFIG_ATH79_MACH_WP543) += mach-wp543.o ++obj-$(CONFIG_ATH79_MACH_WPE72) += mach-wpe72.o ++obj-$(CONFIG_ATH79_MACH_WPJ344) += mach-wpj344.o ++obj-$(CONFIG_ATH79_MACH_WPJ531) += mach-wpj531.o ++obj-$(CONFIG_ATH79_MACH_WPJ558) += mach-wpj558.o ++obj-$(CONFIG_ATH79_MACH_WRT160NL) += mach-wrt160nl.o ++obj-$(CONFIG_ATH79_MACH_WRT400N) += mach-wrt400n.o ++obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o ++obj-$(CONFIG_ATH79_MACH_WZR_HP_G300NH2) += mach-wzr-hp-g300nh2.o ++obj-$(CONFIG_ATH79_MACH_WZR_HP_AG300H) += mach-wzr-hp-ag300h.o ++obj-$(CONFIG_ATH79_MACH_WZR_HP_G450H) += mach-wzr-hp-g450h.o ++obj-$(CONFIG_ATH79_MACH_WZR_450HP2) += mach-wzr-450hp2.o ++obj-$(CONFIG_ATH79_MACH_ZCN_1523H) += mach-zcn-1523h.o ++obj-$(CONFIG_ATH79_MACH_CARAMBOLA2) += mach-carambola2.o ++obj-$(CONFIG_ATH79_MACH_NBG6716) += mach-nbg6716.o +diff -Nur linux-4.1.13.orig/arch/mips/ath79/nvram.c linux-4.1.13/arch/mips/ath79/nvram.c +--- linux-4.1.13.orig/arch/mips/ath79/nvram.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/nvram.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,80 @@ ++/* ++ * Atheros AR71xx minimal nvram support ++ * ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "nvram.h" ++ ++char *ath79_nvram_find_var(const char *name, const char *buf, unsigned buf_len) ++{ ++ unsigned len = strlen(name); ++ char *cur, *last; ++ ++ if (buf_len == 0 || len == 0) ++ return NULL; ++ ++ if (buf_len < len) ++ return NULL; ++ ++ if (len == 1) ++ return memchr(buf, (int) *name, buf_len); ++ ++ last = (char *) buf + buf_len - len; ++ for (cur = (char *) buf; cur <= last; cur++) ++ if (cur[0] == name[0] && memcmp(cur, name, len) == 0) ++ return cur + len; ++ ++ return NULL; ++} ++ ++int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, ++ const char *name, char *mac) ++{ ++ char *buf; ++ char *mac_str; ++ int ret; ++ int t; ++ ++ buf = vmalloc(nvram_len); ++ if (!buf) ++ return -ENOMEM; ++ ++ memcpy(buf, nvram, nvram_len); ++ buf[nvram_len - 1] = '\0'; ++ ++ mac_str = ath79_nvram_find_var(name, buf, nvram_len); ++ if (!mac_str) { ++ ret = -EINVAL; ++ goto free; ++ } ++ ++ if (strlen(mac_str) == 19 && mac_str[0] == '"' && mac_str[18] == '"') { ++ mac_str[18] = 0; ++ mac_str++; ++ } ++ ++ t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", ++ &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); ++ ++ if (t != 6) { ++ ret = -EINVAL; ++ goto free; ++ } ++ ++ ret = 0; ++ ++free: ++ vfree(buf); ++ return ret; ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/nvram.h linux-4.1.13/arch/mips/ath79/nvram.h +--- linux-4.1.13.orig/arch/mips/ath79/nvram.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/nvram.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,19 @@ ++/* ++ * Atheros AR71xx minimal nvram support ++ * ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_NVRAM_H ++#define _ATH79_NVRAM_H ++ ++char *ath79_nvram_find_var(const char *name, const char *buf, ++ unsigned buf_len); ++int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, ++ const char *name, char *mac); ++ ++#endif /* _ATH79_NVRAM_H */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.c linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.c +--- linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,126 @@ ++/* ++ * Atheros AP94 reference board PCI initialization ++ * ++ * Copyright (C) 2009-2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++struct ath9k_fixup { ++ u16 *cal_data; ++ unsigned slot; ++}; ++ ++static int ath9k_num_fixups; ++static struct ath9k_fixup ath9k_fixups[2]; ++ ++static void ath9k_pci_fixup(struct pci_dev *dev) ++{ ++ void __iomem *mem; ++ u16 *cal_data = NULL; ++ u16 cmd; ++ u32 bar0; ++ u32 val; ++ unsigned i; ++ ++ for (i = 0; i < ath9k_num_fixups; i++) { ++ if (ath9k_fixups[i].cal_data == NULL) ++ continue; ++ ++ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) ++ continue; ++ ++ cal_data = ath9k_fixups[i].cal_data; ++ break; ++ } ++ ++ if (cal_data == NULL) ++ return; ++ ++ if (*cal_data != 0xa55a) { ++ pr_err("pci %s: invalid calibration data\n", pci_name(dev)); ++ return; ++ } ++ ++ pr_info("pci %s: fixup device configuration\n", pci_name(dev)); ++ ++ mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); ++ if (!mem) { ++ pr_err("pci %s: ioremap error\n", pci_name(dev)); ++ return; ++ } ++ ++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); ++ ++ switch (ath79_soc) { ++ case ATH79_SOC_AR7161: ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ++ AR71XX_PCI_MEM_BASE); ++ break; ++ case ATH79_SOC_AR7240: ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); ++ break; ++ ++ case ATH79_SOC_AR7241: ++ case ATH79_SOC_AR7242: ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); ++ break; ++ case ATH79_SOC_AR9344: ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); ++ break; ++ ++ default: ++ BUG(); ++ } ++ ++ pci_read_config_word(dev, PCI_COMMAND, &cmd); ++ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; ++ pci_write_config_word(dev, PCI_COMMAND, cmd); ++ ++ /* set pointer to first reg address */ ++ cal_data += 3; ++ while (*cal_data != 0xffff) { ++ u32 reg; ++ reg = *cal_data++; ++ val = *cal_data++; ++ val |= (*cal_data++) << 16; ++ ++ __raw_writel(val, mem + reg); ++ udelay(100); ++ } ++ ++ pci_read_config_dword(dev, PCI_VENDOR_ID, &val); ++ dev->vendor = val & 0xffff; ++ dev->device = (val >> 16) & 0xffff; ++ ++ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); ++ dev->revision = val & 0xff; ++ dev->class = val >> 8; /* upper 3 bytes */ ++ ++ pci_read_config_word(dev, PCI_COMMAND, &cmd); ++ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); ++ pci_write_config_word(dev, PCI_COMMAND, cmd); ++ ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); ++ ++ iounmap(mem); ++} ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); ++ ++void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) ++{ ++ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) ++ return; ++ ++ ath9k_fixups[ath9k_num_fixups].slot = slot; ++ ath9k_fixups[ath9k_num_fixups].cal_data = cal_data; ++ ath9k_num_fixups++; ++} +diff -Nur linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.h linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.h +--- linux-4.1.13.orig/arch/mips/ath79/pci-ath9k-fixup.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/pci-ath9k-fixup.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,6 @@ ++#ifndef _PCI_ATH9K_FIXUP ++#define _PCI_ATH9K_FIXUP ++ ++void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init; ++ ++#endif /* _PCI_ATH9K_FIXUP */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/pci.c linux-4.1.13/arch/mips/ath79/pci.c +--- linux-4.1.13.orig/arch/mips/ath79/pci.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/pci.c 2015-12-04 19:57:05.593998902 +0100 +@@ -13,6 +13,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -25,6 +26,9 @@ + static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; + static unsigned ath79_pci_nr_irqs __initdata; + ++static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); ++static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); ++ + static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { + { + .slot = 17, +@@ -49,6 +53,15 @@ + } + }; + ++static const struct ath79_pci_irq qca953x_pci_irq_map[] __initconst = { ++ { ++ .bus = 0, ++ .slot = 0, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(0), ++ }, ++}; ++ + static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = { + { + .bus = 0, +@@ -64,6 +77,21 @@ + }, + }; + ++static const struct ath79_pci_irq qca956x_pci_irq_map[] __initconst = { ++ { ++ .bus = 0, ++ .slot = 0, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(0), ++ }, ++ { ++ .bus = 1, ++ .slot = 0, ++ .pin = 1, ++ .irq = ATH79_PCI_IRQ(1), ++ }, ++}; ++ + int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) + { + int irq = -1; +@@ -79,9 +107,15 @@ + soc_is_ar9344()) { + ath79_pci_irq_map = ar724x_pci_irq_map; + ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); ++ } else if (soc_is_qca953x()) { ++ ath79_pci_irq_map = qca953x_pci_irq_map; ++ ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map); + } else if (soc_is_qca955x()) { + ath79_pci_irq_map = qca955x_pci_irq_map; + ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); ++ } else if (soc_is_qca9561()) { ++ ath79_pci_irq_map = qca956x_pci_irq_map; ++ ath79_pci_nr_irqs = ARRAY_SIZE(qca956x_pci_irq_map); + } else { + pr_crit("pci %s: invalid irq map\n", + pci_name((struct pci_dev *) dev)); +@@ -212,12 +246,50 @@ + return pdev; + } + ++static inline bool ar71xx_is_pci_addr(unsigned long port) ++{ ++ unsigned long phys = CPHYSADDR(port); ++ ++ return (phys >= AR71XX_PCI_MEM_BASE && ++ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); ++} ++ ++static unsigned long ar71xx_pci_swizzle_b(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; ++} ++ ++static unsigned long ar71xx_pci_swizzle_w(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; ++} ++ ++unsigned long ath79_pci_swizzle_b(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_b) ++ return __ath79_pci_swizzle_b(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_b); ++ ++unsigned long ath79_pci_swizzle_w(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_w) ++ return __ath79_pci_swizzle_w(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_w); ++ + int __init ath79_register_pci(void) + { + struct platform_device *pdev = NULL; + + if (soc_is_ar71xx()) { + pdev = ath79_register_pci_ar71xx(); ++ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; ++ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; + } else if (soc_is_ar724x()) { + pdev = ath79_register_pci_ar724x(-1, + AR724X_PCI_CFG_BASE, +@@ -243,6 +315,15 @@ + AR724X_PCI_MEM_SIZE, + 0, + ATH79_IP2_IRQ(0)); ++ } else if (soc_is_qca9533()) { ++ pdev = ath79_register_pci_ar724x(0, ++ QCA953X_PCI_CFG_BASE0, ++ QCA953X_PCI_CTRL_BASE0, ++ QCA953X_PCI_CRP_BASE0, ++ QCA953X_PCI_MEM_BASE0, ++ QCA953X_PCI_MEM_SIZE, ++ 0, ++ ATH79_IP2_IRQ(0)); + } else if (soc_is_qca9558()) { + pdev = ath79_register_pci_ar724x(0, + QCA955X_PCI_CFG_BASE0, +@@ -261,6 +342,15 @@ + QCA955X_PCI_MEM_SIZE, + 1, + ATH79_IP3_IRQ(2)); ++ } else if (soc_is_qca9561()) { ++ pdev = ath79_register_pci_ar724x(0, ++ QCA956X_PCI_CFG_BASE1, ++ QCA956X_PCI_CTRL_BASE1, ++ QCA956X_PCI_CRP_BASE1, ++ QCA956X_PCI_MEM_BASE1, ++ QCA956X_PCI_MEM_SIZE, ++ 1, ++ ATH79_IP3_IRQ(2)); + } else { + /* No PCI support */ + return -ENODEV; +diff -Nur linux-4.1.13.orig/arch/mips/ath79/prom.c linux-4.1.13/arch/mips/ath79/prom.c +--- linux-4.1.13.orig/arch/mips/ath79/prom.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/prom.c 2015-12-04 19:57:05.482006229 +0100 +@@ -19,12 +19,114 @@ + #include + #include + #include ++#include + + #include "common.h" + ++static char ath79_cmdline_buf[COMMAND_LINE_SIZE] __initdata; ++ ++static void __init ath79_prom_append_cmdline(const char *name, ++ const char *value) ++{ ++ snprintf(ath79_cmdline_buf, sizeof(ath79_cmdline_buf), ++ " %s=%s", name, value); ++ strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); ++} ++ ++#ifdef CONFIG_IMAGE_CMDLINE_HACK ++extern char __image_cmdline[]; ++ ++static int __init ath79_use_image_cmdline(void) ++{ ++ char *p = __image_cmdline; ++ int replace = 0; ++ ++ if (*p == '-') { ++ replace = 1; ++ p++; ++ } ++ ++ if (*p == '\0') ++ return 0; ++ ++ if (replace) { ++ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); ++ } else { ++ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); ++ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); ++ } ++ ++ /* Validate and setup environment pointer */ ++ if (fw_arg2 < CKSEG0) ++ _fw_envp = NULL; ++ else ++ _fw_envp = (int *)fw_arg2; ++ ++ return 1; ++} ++#else ++static inline int ath79_use_image_cmdline(void) { return 0; } ++#endif ++ ++static int __init ath79_prom_init_myloader(void) ++{ ++ struct myloader_info *mylo; ++ char mac_buf[32]; ++ unsigned char *mac; ++ ++ mylo = myloader_get_info(); ++ if (!mylo) ++ return 0; ++ ++ switch (mylo->did) { ++ case DEVID_COMPEX_WP543: ++ ath79_prom_append_cmdline("board", "WP543"); ++ break; ++ case DEVID_COMPEX_WPE72: ++ ath79_prom_append_cmdline("board", "WPE72"); ++ break; ++ default: ++ pr_warn("prom: unknown device id: %x\n", mylo->did); ++ return 0; ++ } ++ ++ mac = mylo->macs[0]; ++ snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x", ++ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); ++ ++ ath79_prom_append_cmdline("ethaddr", mac_buf); ++ ++ ath79_use_image_cmdline(); ++ ++ return 1; ++} ++ + void __init prom_init(void) + { +- fw_init_cmdline(); ++ const char *env; ++ ++ if (ath79_prom_init_myloader()) ++ return; ++ ++ if (!ath79_use_image_cmdline()) ++ fw_init_cmdline(); ++ ++ env = fw_getenv("ethaddr"); ++ if (env) ++ ath79_prom_append_cmdline("ethaddr", env); ++ ++ env = fw_getenv("board"); ++ if (env) { ++ /* Workaround for buggy bootloaders */ ++ if (strcmp(env, "RouterStation") == 0 || ++ strcmp(env, "Ubiquiti AR71xx-based board") == 0) ++ env = "UBNT-RS"; ++ ++ if (strcmp(env, "RouterStation PRO") == 0) ++ env = "UBNT-RSPRO"; ++ ++ ath79_prom_append_cmdline("board", env); ++ } + + #ifdef CONFIG_BLK_DEV_INITRD + /* Read the initrd address from the firmware environment */ +@@ -34,6 +136,13 @@ + initrd_end = initrd_start + fw_getenvl("initrd_size"); + } + #endif ++ ++ if (strstr(arcs_cmdline, "board=750Gr3") || ++ strstr(arcs_cmdline, "board=951G") || ++ strstr(arcs_cmdline, "board=2011L") || ++ strstr(arcs_cmdline, "board=711Gr100") || ++ strstr(arcs_cmdline, "board=922gs")) ++ ath79_prom_append_cmdline("console", "ttyS0,115200"); + } + + void __init prom_free_prom_memory(void) +diff -Nur linux-4.1.13.orig/arch/mips/ath79/routerboot.c linux-4.1.13/arch/mips/ath79/routerboot.c +--- linux-4.1.13.orig/arch/mips/ath79/routerboot.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/routerboot.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,358 @@ ++/* ++ * RouterBoot helper routines ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define pr_fmt(fmt) "rb: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "routerboot.h" ++ ++#define RB_BLOCK_SIZE 0x1000 ++#define RB_ART_SIZE 0x10000 ++#define RB_MAGIC_ERD 0x00455244 /* extended radio data */ ++ ++static struct rb_info rb_info; ++ ++static u32 get_u32(void *buf) ++{ ++ u8 *p = buf; ++ ++ return ((u32) p[3] + ((u32) p[2] << 8) + ((u32) p[1] << 16) + ++ ((u32) p[0] << 24)); ++} ++ ++static u16 get_u16(void *buf) ++{ ++ u8 *p = buf; ++ ++ return (u16) p[1] + ((u16) p[0] << 8); ++} ++ ++__init int ++routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard) ++{ ++ u32 magic_ref = hard ? RB_MAGIC_HARD : RB_MAGIC_SOFT; ++ u32 magic; ++ u32 cur = *offset; ++ ++ while (cur < buflen) { ++ magic = get_u32(buf + cur); ++ if (magic == magic_ref) { ++ *offset = cur; ++ return 0; ++ } ++ ++ cur += 0x1000; ++ } ++ ++ return -ENOENT; ++} ++ ++__init int ++routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, ++ u8 **tag_data, u16 *tag_len) ++{ ++ uint32_t magic; ++ bool align = false; ++ int ret; ++ ++ if (buflen < 4) ++ return -EINVAL; ++ ++ magic = get_u32(buf); ++ switch (magic) { ++ case RB_MAGIC_ERD: ++ align = true; ++ /* fall trough */ ++ case RB_MAGIC_HARD: ++ /* skip magic value */ ++ buf += 4; ++ buflen -= 4; ++ break; ++ ++ case RB_MAGIC_SOFT: ++ if (buflen < 8) ++ return -EINVAL; ++ ++ /* skip magic and CRC value */ ++ buf += 8; ++ buflen -= 8; ++ ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ ret = -ENOENT; ++ while (buflen > 2) { ++ u16 id; ++ u16 len; ++ ++ len = get_u16(buf); ++ buf += 2; ++ buflen -= 2; ++ ++ if (buflen < 2) ++ break; ++ ++ id = get_u16(buf); ++ buf += 2; ++ buflen -= 2; ++ ++ if (id == RB_ID_TERMINATOR) ++ break; ++ ++ if (buflen < len) ++ break; ++ ++ if (id == tag_id) { ++ if (tag_len) ++ *tag_len = len; ++ if (tag_data) ++ *tag_data = buf; ++ ret = 0; ++ break; ++ } ++ ++ if (align) ++ len = (len + 3) / 4; ++ ++ buf += len; ++ buflen -= len; ++ } ++ ++ return ret; ++} ++ ++static inline int ++rb_find_hard_cfg_tag(u16 tag_id, u8 **tag_data, u16 *tag_len) ++{ ++ if (!rb_info.hard_cfg_data || ++ !rb_info.hard_cfg_size) ++ return -ENOENT; ++ ++ return routerboot_find_tag(rb_info.hard_cfg_data, ++ rb_info.hard_cfg_size, ++ tag_id, tag_data, tag_len); ++} ++ ++__init const char * ++rb_get_board_name(void) ++{ ++ u16 tag_len; ++ u8 *tag; ++ int err; ++ ++ err = rb_find_hard_cfg_tag(RB_ID_BOARD_NAME, &tag, &tag_len); ++ if (err) ++ return NULL; ++ ++ return tag; ++} ++ ++__init u32 ++rb_get_hw_options(void) ++{ ++ u16 tag_len; ++ u8 *tag; ++ int err; ++ ++ err = rb_find_hard_cfg_tag(RB_ID_HW_OPTIONS, &tag, &tag_len); ++ if (err) ++ return 0; ++ ++ return get_u32(tag); ++} ++ ++static void * __init ++__rb_get_wlan_data(u16 id) ++{ ++ u16 tag_len; ++ u8 *tag; ++ void *buf; ++ int err; ++ u32 magic; ++ size_t src_done; ++ size_t dst_done; ++ ++ err = rb_find_hard_cfg_tag(RB_ID_WLAN_DATA, &tag, &tag_len); ++ if (err) { ++ pr_err("no calibration data found\n"); ++ goto err; ++ } ++ ++ buf = kmalloc(RB_ART_SIZE, GFP_KERNEL); ++ if (buf == NULL) { ++ pr_err("no memory for calibration data\n"); ++ goto err; ++ } ++ ++ magic = get_u32(tag); ++ if (magic == RB_MAGIC_ERD) { ++ u8 *erd_data; ++ u16 erd_len; ++ ++ if (id == 0) ++ goto err_free; ++ ++ err = routerboot_find_tag(tag, tag_len, id, ++ &erd_data, &erd_len); ++ if (err) { ++ pr_err("no ERD data found for id %u\n", id); ++ goto err_free; ++ } ++ ++ dst_done = RB_ART_SIZE; ++ err = lzo1x_decompress_safe(erd_data, erd_len, buf, &dst_done); ++ if (err) { ++ pr_err("unable to decompress calibration data %d\n", ++ err); ++ goto err_free; ++ } ++ } else { ++ if (id != 0) ++ goto err_free; ++ ++ err = rle_decode((char *) tag, tag_len, buf, RB_ART_SIZE, ++ &src_done, &dst_done); ++ if (err) { ++ pr_err("unable to decode calibration data\n"); ++ goto err_free; ++ } ++ } ++ ++ return buf; ++ ++err_free: ++ kfree(buf); ++err: ++ return NULL; ++} ++ ++__init void * ++rb_get_wlan_data(void) ++{ ++ return __rb_get_wlan_data(0); ++} ++ ++__init void * ++rb_get_ext_wlan_data(u16 id) ++{ ++ return __rb_get_wlan_data(id); ++} ++ ++__init const struct rb_info * ++rb_init_info(void *data, unsigned int size) ++{ ++ unsigned int offset; ++ ++ if (size == 0 || (size % RB_BLOCK_SIZE) != 0) ++ return NULL; ++ ++ for (offset = 0; offset < size; offset += RB_BLOCK_SIZE) { ++ u32 magic; ++ ++ magic = get_u32(data + offset); ++ switch (magic) { ++ case RB_MAGIC_HARD: ++ rb_info.hard_cfg_offs = offset; ++ break; ++ ++ case RB_MAGIC_SOFT: ++ rb_info.soft_cfg_offs = offset; ++ break; ++ } ++ } ++ ++ if (!rb_info.hard_cfg_offs) { ++ pr_err("could not find a valid RouterBOOT hard config\n"); ++ return NULL; ++ } ++ ++ if (!rb_info.soft_cfg_offs) { ++ pr_err("could not find a valid RouterBOOT soft config\n"); ++ return NULL; ++ } ++ ++ rb_info.hard_cfg_size = RB_BLOCK_SIZE; ++ rb_info.hard_cfg_data = kmemdup(data + rb_info.hard_cfg_offs, ++ RB_BLOCK_SIZE, GFP_KERNEL); ++ if (!rb_info.hard_cfg_data) ++ return NULL; ++ ++ rb_info.board_name = rb_get_board_name(); ++ rb_info.hw_options = rb_get_hw_options(); ++ ++ return &rb_info; ++} ++ ++static char *rb_ext_wlan_data; ++ ++static ssize_t ++rb_ext_wlan_data_read(struct file *filp, struct kobject *kobj, ++ struct bin_attribute *attr, char *buf, ++ loff_t off, size_t count) ++{ ++ if (off + count > attr->size) ++ return -EFBIG; ++ ++ memcpy(buf, &rb_ext_wlan_data[off], count); ++ ++ return count; ++} ++ ++static const struct bin_attribute rb_ext_wlan_data_attr = { ++ .attr = { ++ .name = "ext_wlan_data", ++ .mode = S_IRUSR | S_IWUSR, ++ }, ++ .read = rb_ext_wlan_data_read, ++ .size = RB_ART_SIZE, ++}; ++ ++static int __init rb_sysfs_init(void) ++{ ++ struct kobject *rb_kobj; ++ int ret; ++ ++ rb_ext_wlan_data = rb_get_ext_wlan_data(1); ++ if (rb_ext_wlan_data == NULL) ++ return -ENOENT; ++ ++ rb_kobj = kobject_create_and_add("routerboot", firmware_kobj); ++ if (rb_kobj == NULL) { ++ ret = -ENOMEM; ++ pr_err("unable to create sysfs entry\n"); ++ goto err_free_wlan_data; ++ } ++ ++ ret = sysfs_create_bin_file(rb_kobj, &rb_ext_wlan_data_attr); ++ if (ret) { ++ pr_err("unable to create sysfs file, %d\n", ret); ++ goto err_put_kobj; ++ } ++ ++ return 0; ++ ++err_put_kobj: ++ kobject_put(rb_kobj); ++err_free_wlan_data: ++ kfree(rb_ext_wlan_data); ++ return ret; ++} ++ ++late_initcall(rb_sysfs_init); +diff -Nur linux-4.1.13.orig/arch/mips/ath79/routerboot.h linux-4.1.13/arch/mips/ath79/routerboot.h +--- linux-4.1.13.orig/arch/mips/ath79/routerboot.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/routerboot.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,63 @@ ++/* ++ * RouterBoot definitions ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _ATH79_ROUTERBOOT_H_ ++#define _ATH79_ROUTERBOOT_H_ ++ ++struct rb_info { ++ unsigned int hard_cfg_offs; ++ unsigned int hard_cfg_size; ++ void *hard_cfg_data; ++ unsigned int soft_cfg_offs; ++ ++ const char *board_name; ++ u32 hw_options; ++}; ++ ++#ifdef CONFIG_ATH79_ROUTERBOOT ++const struct rb_info *rb_init_info(void *data, unsigned int size); ++void *rb_get_wlan_data(void); ++void *rb_get_ext_wlan_data(u16 id); ++ ++int routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, ++ u8 **tag_data, u16 *tag_len); ++int routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard); ++#else ++static inline const struct rb_info * ++rb_init_info(void *data, unsigned int size) ++{ ++ return NULL; ++} ++ ++static inline void *rb_get_wlan_data(void) ++{ ++ return NULL; ++} ++ ++static inline void *rb_get_wlan_data(u16 id) ++{ ++ return NULL; ++} ++ ++static inline int ++routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, ++ u8 **tag_data, u16 *tag_len) ++{ ++ return -ENOENT; ++} ++ ++static inline int ++routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard) ++{ ++ return -ENOENT; ++} ++#endif ++ ++#endif /* _ATH79_ROUTERBOOT_H_ */ +diff -Nur linux-4.1.13.orig/arch/mips/ath79/setup.c linux-4.1.13/arch/mips/ath79/setup.c +--- linux-4.1.13.orig/arch/mips/ath79/setup.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/ath79/setup.c 2015-12-04 19:57:04.482071652 +0100 +@@ -40,6 +40,7 @@ + + static void ath79_restart(char *command) + { ++ local_irq_disable(); + ath79_device_reset_set(AR71XX_RESET_FULL_CHIP); + for (;;) + if (cpu_wait) +@@ -59,6 +60,7 @@ + u32 major; + u32 minor; + u32 rev = 0; ++ u32 ver = 1; + + id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID); + major = id & REV_ID_MAJOR_MASK; +@@ -151,6 +153,17 @@ + rev = id & AR934X_REV_ID_REVISION_MASK; + break; + ++ case REV_ID_MAJOR_QCA9533_V2: ++ ver = 2; ++ ath79_soc_rev = 2; ++ /* drop through */ ++ ++ case REV_ID_MAJOR_QCA9533: ++ ath79_soc = ATH79_SOC_QCA9533; ++ chip = "9533"; ++ rev = id & QCA953X_REV_ID_REVISION_MASK; ++ break; ++ + case REV_ID_MAJOR_QCA9556: + ath79_soc = ATH79_SOC_QCA9556; + chip = "9556"; +@@ -163,14 +176,30 @@ + rev = id & QCA955X_REV_ID_REVISION_MASK; + break; + ++ case REV_ID_MAJOR_TP9343: ++ ath79_soc = ATH79_SOC_TP9343; ++ chip = "9343"; ++ rev = id & QCA956X_REV_ID_REVISION_MASK; ++ break; ++ ++ case REV_ID_MAJOR_QCA9561: ++ ath79_soc = ATH79_SOC_QCA9561; ++ chip = "9561"; ++ rev = id & QCA956X_REV_ID_REVISION_MASK; ++ break; ++ + default: + panic("ath79: unknown SoC, id:0x%08x", id); + } + +- ath79_soc_rev = rev; ++ if (ver == 1) ++ ath79_soc_rev = rev; + +- if (soc_is_qca955x()) +- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", ++ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561()) ++ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", ++ chip, ver, rev); ++ else if (soc_is_tp9343()) ++ sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u", + chip, rev); + else + sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); +@@ -235,6 +264,8 @@ + mips_hpt_frequency = cpu_clk_rate / 2; + } + ++__setup("board=", mips_machtype_setup); ++ + static int __init ath79_setup(void) + { + ath79_gpio_init(); +diff -Nur linux-4.1.13.orig/arch/mips/fw/lib/cmdline.c linux-4.1.13/arch/mips/fw/lib/cmdline.c +--- linux-4.1.13.orig/arch/mips/fw/lib/cmdline.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/fw/lib/cmdline.c 2015-12-04 19:57:04.014102269 +0100 +@@ -35,6 +35,7 @@ + else + _fw_envp = (int *)fw_arg2; + ++ arcs_cmdline[0] = '\0'; + for (i = 1; i < fw_argc; i++) { + strlcat(arcs_cmdline, fw_argv(i), COMMAND_LINE_SIZE); + if (i < (fw_argc - 1)) +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/checksum.h linux-4.1.13/arch/mips/include/asm/checksum.h +--- linux-4.1.13.orig/arch/mips/include/asm/checksum.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/checksum.h 2015-12-04 19:57:05.913977967 +0100 +@@ -134,26 +134,30 @@ + const unsigned int *stop = word + ihl; + unsigned int csum; + int carry; ++ unsigned int w; + +- csum = word[0]; +- csum += word[1]; +- carry = (csum < word[1]); ++ csum = net_hdr_word(word++); ++ ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[2]; +- carry = (csum < word[2]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[3]; +- carry = (csum < word[3]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- word += 4; + do { +- csum += *word; +- carry = (csum < *word); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; +- word++; + } while (word != stop); + + return csum_fold(csum); +@@ -212,73 +216,6 @@ + return csum_fold(csum_partial(buff, len, 0)); + } + +-#define _HAVE_ARCH_IPV6_CSUM +-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, +- const struct in6_addr *daddr, +- __u32 len, unsigned short proto, +- __wsum sum) +-{ +- __wsum tmp; +- +- __asm__( +- " .set push # csum_ipv6_magic\n" +- " .set noreorder \n" +- " .set noat \n" +- " addu %0, %5 # proto (long in network byte order)\n" +- " sltu $1, %0, %5 \n" +- " addu %0, $1 \n" +- +- " addu %0, %6 # csum\n" +- " sltu $1, %0, %6 \n" +- " lw %1, 0(%2) # four words source address\n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 0(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " addu %0, $1 # Add final carry\n" +- " .set pop" +- : "=&r" (sum), "=&r" (tmp) +- : "r" (saddr), "r" (daddr), +- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); +- +- return csum_fold(sum); +-} +- + #include + #endif /* CONFIG_GENERIC_CSUM */ + +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/fw/myloader/myloader.h linux-4.1.13/arch/mips/include/asm/fw/myloader/myloader.h +--- linux-4.1.13.orig/arch/mips/include/asm/fw/myloader/myloader.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/fw/myloader/myloader.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,34 @@ ++/* ++ * Compex's MyLoader specific definitions ++ * ++ * Copyright (C) 2006-2008 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++ ++#ifndef _ASM_MIPS_FW_MYLOADER_H ++#define _ASM_MIPS_FW_MYLOADER_H ++ ++#include ++ ++struct myloader_info { ++ uint32_t vid; ++ uint32_t did; ++ uint32_t svid; ++ uint32_t sdid; ++ uint8_t macs[MYLO_ETHADDR_COUNT][6]; ++}; ++ ++#ifdef CONFIG_MYLOADER ++extern struct myloader_info *myloader_get_info(void) __init; ++#else ++static inline struct myloader_info *myloader_get_info(void) ++{ ++ return NULL; ++} ++#endif /* CONFIG_MYLOADER */ ++ ++#endif /* _ASM_MIPS_FW_MYLOADER_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ag71xx_platform.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ag71xx_platform.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ag71xx_platform.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ag71xx_platform.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,65 @@ ++/* ++ * Atheros AR71xx SoC specific platform data definitions ++ * ++ * Copyright (C) 2008-2012 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_MACH_ATH79_PLATFORM_H ++#define __ASM_MACH_ATH79_PLATFORM_H ++ ++#include ++#include ++#include ++#include ++ ++struct ag71xx_switch_platform_data { ++ u8 phy4_mii_en:1; ++ u8 phy_poll_mask; ++}; ++ ++struct ag71xx_platform_data { ++ phy_interface_t phy_if_mode; ++ u32 phy_mask; ++ int speed; ++ int duplex; ++ u32 reset_bit; ++ u8 mac_addr[ETH_ALEN]; ++ struct device *mii_bus_dev; ++ ++ u8 has_gbit:1; ++ u8 is_ar91xx:1; ++ u8 is_ar7240:1; ++ u8 is_ar724x:1; ++ u8 has_ar8216:1; ++ ++ struct ag71xx_switch_platform_data *switch_data; ++ ++ void (*ddr_flush)(void); ++ void (*set_speed)(int speed); ++ ++ u32 fifo_cfg1; ++ u32 fifo_cfg2; ++ u32 fifo_cfg3; ++ ++ unsigned int max_frame_len; ++ unsigned int desc_pktlen_mask; ++}; ++ ++struct ag71xx_mdio_platform_data { ++ u32 phy_mask; ++ u8 builtin_switch:1; ++ u8 is_ar7240:1; ++ u8 is_ar9330:1; ++ u8 is_ar934x:1; ++ unsigned long mdio_clock; ++ unsigned long ref_clock; ++ ++ void (*reset)(struct mii_bus *bus); ++}; ++ ++#endif /* __ASM_MACH_ATH79_PLATFORM_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2015-12-04 19:57:05.893979276 +0100 +@@ -20,6 +20,10 @@ + #include + + #define AR71XX_APB_BASE 0x18000000 ++#define AR71XX_GE0_BASE 0x19000000 ++#define AR71XX_GE0_SIZE 0x10000 ++#define AR71XX_GE1_BASE 0x1a000000 ++#define AR71XX_GE1_SIZE 0x10000 + #define AR71XX_EHCI_BASE 0x1b000000 + #define AR71XX_EHCI_SIZE 0x1000 + #define AR71XX_OHCI_BASE 0x1c000000 +@@ -39,6 +43,8 @@ + #define AR71XX_PLL_SIZE 0x100 + #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) + #define AR71XX_RESET_SIZE 0x100 ++#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000) ++#define AR71XX_MII_SIZE 0x100 + + #define AR71XX_PCI_MEM_BASE 0x10000000 + #define AR71XX_PCI_MEM_SIZE 0x07000000 +@@ -81,18 +87,39 @@ + + #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) + #define AR933X_UART_SIZE 0x14 ++#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define AR933X_GMAC_SIZE 0x04 + #define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) + #define AR933X_WMAC_SIZE 0x20000 + #define AR933X_EHCI_BASE 0x1b000000 + #define AR933X_EHCI_SIZE 0x1000 + ++#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define AR934X_GMAC_SIZE 0x14 + #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) + #define AR934X_WMAC_SIZE 0x20000 + #define AR934X_EHCI_BASE 0x1b000000 + #define AR934X_EHCI_SIZE 0x200 ++#define AR934X_NFC_BASE 0x1b000200 ++#define AR934X_NFC_SIZE 0xb8 + #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) + #define AR934X_SRIF_SIZE 0x1000 + ++#define QCA953X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA953X_GMAC_SIZE 0x14 ++#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) ++#define QCA953X_WMAC_SIZE 0x20000 ++#define QCA953X_EHCI_BASE 0x1b000000 ++#define QCA953X_EHCI_SIZE 0x200 ++#define QCA953X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) ++#define QCA953X_SRIF_SIZE 0x1000 ++ ++#define QCA953X_PCI_CFG_BASE0 0x14000000 ++#define QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) ++#define QCA953X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) ++#define QCA953X_PCI_MEM_BASE0 0x10000000 ++#define QCA953X_PCI_MEM_SIZE 0x02000000 ++ + #define QCA955X_PCI_MEM_BASE0 0x10000000 + #define QCA955X_PCI_MEM_BASE1 0x12000000 + #define QCA955X_PCI_MEM_SIZE 0x02000000 +@@ -106,11 +133,40 @@ + #define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) + #define QCA955X_PCI_CTRL_SIZE 0x100 + ++#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA955X_GMAC_SIZE 0x40 + #define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) + #define QCA955X_WMAC_SIZE 0x20000 + #define QCA955X_EHCI0_BASE 0x1b000000 + #define QCA955X_EHCI1_BASE 0x1b400000 + #define QCA955X_EHCI_SIZE 0x1000 ++#define QCA955X_NFC_BASE 0x1b800200 ++#define QCA955X_NFC_SIZE 0xb8 ++ ++#define QCA956X_PCI_MEM_BASE1 0x12000000 ++#define QCA956X_PCI_MEM_SIZE 0x02000000 ++#define QCA956X_PCI_CFG_BASE1 0x16000000 ++#define QCA956X_PCI_CFG_SIZE 0x1000 ++#define QCA956X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000) ++#define QCA956X_PCI_CRP_SIZE 0x1000 ++#define QCA956X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) ++#define QCA956X_PCI_CTRL_SIZE 0x100 ++ ++#define QCA956X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) ++#define QCA956X_WMAC_SIZE 0x20000 ++#define QCA956X_EHCI0_BASE 0x1b000000 ++#define QCA956X_EHCI1_BASE 0x1b400000 ++#define QCA956X_EHCI_SIZE 0x200 ++#define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) ++#define QCA956X_GMAC_SIZE 0x64 ++ ++#define AR9300_OTP_BASE 0x14000 ++#define AR9300_OTP_STATUS 0x15f18 ++#define AR9300_OTP_STATUS_TYPE 0x7 ++#define AR9300_OTP_STATUS_VALID 0x4 ++#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 ++#define AR9300_OTP_STATUS_SM_BUSY 0x1 ++#define AR9300_OTP_READ_DATA 0x15f1c + + /* + * DDR_CTRL block +@@ -149,6 +205,12 @@ + #define AR934X_DDR_REG_FLUSH_PCIE 0xa8 + #define AR934X_DDR_REG_FLUSH_WMAC 0xac + ++#define QCA953X_DDR_REG_FLUSH_GE0 0x9c ++#define QCA953X_DDR_REG_FLUSH_GE1 0xa0 ++#define QCA953X_DDR_REG_FLUSH_USB 0xa4 ++#define QCA953X_DDR_REG_FLUSH_PCIE 0xa8 ++#define QCA953X_DDR_REG_FLUSH_WMAC 0xac ++ + /* + * PLL block + */ +@@ -166,6 +228,9 @@ + #define AR71XX_AHB_DIV_SHIFT 20 + #define AR71XX_AHB_DIV_MASK 0x7 + ++#define AR71XX_ETH0_PLL_SHIFT 17 ++#define AR71XX_ETH1_PLL_SHIFT 19 ++ + #define AR724X_PLL_REG_CPU_CONFIG 0x00 + #define AR724X_PLL_REG_PCIE_CONFIG 0x18 + +@@ -178,6 +243,8 @@ + #define AR724X_DDR_DIV_SHIFT 22 + #define AR724X_DDR_DIV_MASK 0x3 + ++#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c ++ + #define AR913X_PLL_REG_CPU_CONFIG 0x00 + #define AR913X_PLL_REG_ETH_CONFIG 0x04 + #define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14 +@@ -190,6 +257,9 @@ + #define AR913X_AHB_DIV_SHIFT 19 + #define AR913X_AHB_DIV_MASK 0x1 + ++#define AR913X_ETH0_PLL_SHIFT 20 ++#define AR913X_ETH1_PLL_SHIFT 22 ++ + #define AR933X_PLL_CPU_CONFIG_REG 0x00 + #define AR933X_PLL_CLOCK_CTRL_REG 0x08 + +@@ -211,6 +281,8 @@ + #define AR934X_PLL_CPU_CONFIG_REG 0x00 + #define AR934X_PLL_DDR_CONFIG_REG 0x04 + #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 ++#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 ++#define AR934X_PLL_ETH_XMII_CONTROL_REG 0x2c + + #define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 + #define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +@@ -243,9 +315,51 @@ + #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) ++ ++#define QCA953X_PLL_CPU_CONFIG_REG 0x00 ++#define QCA953X_PLL_DDR_CONFIG_REG 0x04 ++#define QCA953X_PLL_CLK_CTRL_REG 0x08 ++#define QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 ++#define QCA953X_PLL_ETH_XMII_CONTROL_REG 0x2c ++#define QCA953X_PLL_ETH_SGMII_CONTROL_REG 0x48 ++ ++#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 ++#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f ++#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT 6 ++#define QCA953X_PLL_CPU_CONFIG_NINT_MASK 0x3f ++#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 ++#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f ++#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 ++#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 ++#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff ++#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT 10 ++#define QCA953X_PLL_DDR_CONFIG_NINT_MASK 0x3f ++#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 ++#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f ++#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 ++#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) ++#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) ++#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) ++#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 ++#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f ++#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 ++#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f ++#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 ++#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f ++#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) ++#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) ++#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) ++ + #define QCA955X_PLL_CPU_CONFIG_REG 0x00 + #define QCA955X_PLL_DDR_CONFIG_REG 0x04 + #define QCA955X_PLL_CLK_CTRL_REG 0x08 ++#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 ++#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 + + #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 + #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +@@ -278,6 +392,49 @@ + #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA956X_PLL_CPU_CONFIG_REG 0x00 ++#define QCA956X_PLL_CPU_CONFIG1_REG 0x04 ++#define QCA956X_PLL_DDR_CONFIG_REG 0x08 ++#define QCA956X_PLL_DDR_CONFIG1_REG 0x0c ++#define QCA956X_PLL_CLK_CTRL_REG 0x10 ++ ++#define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 ++#define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f ++#define QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 ++#define QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT 0 ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK 0x1f ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT 5 ++#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x1fff ++#define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT 18 ++#define QCA956X_PLL_CPU_CONFIG1_NINT_MASK 0x1ff ++ ++#define QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 ++#define QCA956X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f ++#define QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 ++#define QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 ++ ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT 0 ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK 0x1f ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT 5 ++#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x1fff ++#define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT 18 ++#define QCA956X_PLL_DDR_CONFIG1_NINT_MASK 0x1ff ++ ++#define QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) ++#define QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) ++#define QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) ++#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 ++#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f ++#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 ++#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f ++#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 ++#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f ++#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL BIT(20) ++#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) ++#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) ++ + /* + * USB_CONFIG block + */ +@@ -317,10 +474,19 @@ + #define AR934X_RESET_REG_BOOTSTRAP 0xb0 + #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac + ++#define QCA953X_RESET_REG_RESET_MODULE 0x1c ++#define QCA953X_RESET_REG_BOOTSTRAP 0xb0 ++#define QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac ++ + #define QCA955X_RESET_REG_RESET_MODULE 0x1c + #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 + #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac + ++#define QCA956X_RESET_REG_RESET_MODULE 0x1c ++#define QCA956X_RESET_REG_BOOTSTRAP 0xb0 ++#define QCA956X_RESET_REG_EXT_INT_STATUS 0xac ++ ++#define MISC_INT_MIPS_SI_TIMERINT_MASK BIT(28) + #define MISC_INT_ETHSW BIT(12) + #define MISC_INT_TIMER4 BIT(10) + #define MISC_INT_TIMER3 BIT(9) +@@ -370,16 +536,104 @@ + #define AR913X_RESET_USB_HOST BIT(5) + #define AR913X_RESET_USB_PHY BIT(4) + ++#define AR933X_RESET_GE1_MDIO BIT(23) ++#define AR933X_RESET_GE0_MDIO BIT(22) ++#define AR933X_RESET_GE1_MAC BIT(13) + #define AR933X_RESET_WMAC BIT(11) ++#define AR933X_RESET_GE0_MAC BIT(9) + #define AR933X_RESET_USB_HOST BIT(5) + #define AR933X_RESET_USB_PHY BIT(4) + #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) + ++#define AR934X_RESET_HOST BIT(31) ++#define AR934X_RESET_SLIC BIT(30) ++#define AR934X_RESET_HDMA BIT(29) ++#define AR934X_RESET_EXTERNAL BIT(28) ++#define AR934X_RESET_RTC BIT(27) ++#define AR934X_RESET_PCIE_EP_INT BIT(26) ++#define AR934X_RESET_CHKSUM_ACC BIT(25) ++#define AR934X_RESET_FULL_CHIP BIT(24) ++#define AR934X_RESET_GE1_MDIO BIT(23) ++#define AR934X_RESET_GE0_MDIO BIT(22) ++#define AR934X_RESET_CPU_NMI BIT(21) ++#define AR934X_RESET_CPU_COLD BIT(20) ++#define AR934X_RESET_HOST_RESET_INT BIT(19) ++#define AR934X_RESET_PCIE_EP BIT(18) ++#define AR934X_RESET_UART1 BIT(17) ++#define AR934X_RESET_DDR BIT(16) ++#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) ++#define AR934X_RESET_NANDF BIT(14) ++#define AR934X_RESET_GE1_MAC BIT(13) ++#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) + #define AR934X_RESET_USB_PHY_ANALOG BIT(11) ++#define AR934X_RESET_HOST_DMA_INT BIT(10) ++#define AR934X_RESET_GE0_MAC BIT(9) ++#define AR934X_RESET_ETH_SWITCH BIT(8) ++#define AR934X_RESET_PCIE_PHY BIT(7) ++#define AR934X_RESET_PCIE BIT(6) + #define AR934X_RESET_USB_HOST BIT(5) + #define AR934X_RESET_USB_PHY BIT(4) + #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) ++#define AR934X_RESET_LUT BIT(2) ++#define AR934X_RESET_MBOX BIT(1) ++#define AR934X_RESET_I2S BIT(0) ++ ++#define QCA953X_RESET_USB_EXT_PWR BIT(29) ++#define QCA953X_RESET_EXTERNAL BIT(28) ++#define QCA953X_RESET_RTC BIT(27) ++#define QCA953X_RESET_FULL_CHIP BIT(24) ++#define QCA953X_RESET_GE1_MDIO BIT(23) ++#define QCA953X_RESET_GE0_MDIO BIT(22) ++#define QCA953X_RESET_CPU_NMI BIT(21) ++#define QCA953X_RESET_CPU_COLD BIT(20) ++#define QCA953X_RESET_DDR BIT(16) ++#define QCA953X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) ++#define QCA953X_RESET_GE1_MAC BIT(13) ++#define QCA953X_RESET_ETH_SWITCH_ANALOG BIT(12) ++#define QCA953X_RESET_USB_PHY_ANALOG BIT(11) ++#define QCA953X_RESET_GE0_MAC BIT(9) ++#define QCA953X_RESET_ETH_SWITCH BIT(8) ++#define QCA953X_RESET_PCIE_PHY BIT(7) ++#define QCA953X_RESET_PCIE BIT(6) ++#define QCA953X_RESET_USB_HOST BIT(5) ++#define QCA953X_RESET_USB_PHY BIT(4) ++#define QCA953X_RESET_USBSUS_OVERRIDE BIT(3) ++ ++#define QCA955X_RESET_HOST BIT(31) ++#define QCA955X_RESET_SLIC BIT(30) ++#define QCA955X_RESET_HDMA BIT(29) ++#define QCA955X_RESET_EXTERNAL BIT(28) ++#define QCA955X_RESET_RTC BIT(27) ++#define QCA955X_RESET_PCIE_EP_INT BIT(26) ++#define QCA955X_RESET_CHKSUM_ACC BIT(25) ++#define QCA955X_RESET_FULL_CHIP BIT(24) ++#define QCA955X_RESET_GE1_MDIO BIT(23) ++#define QCA955X_RESET_GE0_MDIO BIT(22) ++#define QCA955X_RESET_CPU_NMI BIT(21) ++#define QCA955X_RESET_CPU_COLD BIT(20) ++#define QCA955X_RESET_HOST_RESET_INT BIT(19) ++#define QCA955X_RESET_PCIE_EP BIT(18) ++#define QCA955X_RESET_UART1 BIT(17) ++#define QCA955X_RESET_DDR BIT(16) ++#define QCA955X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) ++#define QCA955X_RESET_NANDF BIT(14) ++#define QCA955X_RESET_GE1_MAC BIT(13) ++#define QCA955X_RESET_SGMII_ANALOG BIT(12) ++#define QCA955X_RESET_USB_PHY_ANALOG BIT(11) ++#define QCA955X_RESET_HOST_DMA_INT BIT(10) ++#define QCA955X_RESET_GE0_MAC BIT(9) ++#define QCA955X_RESET_SGMII BIT(8) ++#define QCA955X_RESET_PCIE_PHY BIT(7) ++#define QCA955X_RESET_PCIE BIT(6) ++#define QCA955X_RESET_USB_HOST BIT(5) ++#define QCA955X_RESET_USB_PHY BIT(4) ++#define QCA955X_RESET_USBSUS_OVERRIDE BIT(3) ++#define QCA955X_RESET_LUT BIT(2) ++#define QCA955X_RESET_MBOX BIT(1) ++#define QCA955X_RESET_I2S BIT(0) + ++#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) ++#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) + #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) + + #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) +@@ -398,8 +652,17 @@ + #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) + #define AR934X_BOOTSTRAP_DDR1 BIT(0) + ++#define QCA953X_BOOTSTRAP_SW_OPTION2 BIT(12) ++#define QCA953X_BOOTSTRAP_SW_OPTION1 BIT(11) ++#define QCA953X_BOOTSTRAP_EJTAG_MODE BIT(5) ++#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4) ++#define QCA953X_BOOTSTRAP_SDRAM_DISABLED BIT(1) ++#define QCA953X_BOOTSTRAP_DDR1 BIT(0) ++ + #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) + ++#define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) ++ + #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) + #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) + #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) +@@ -418,6 +681,24 @@ + AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ + AR934X_PCIE_WMAC_INT_PCIE_RC3) + ++#define QCA953X_PCIE_WMAC_INT_WMAC_MISC BIT(0) ++#define QCA953X_PCIE_WMAC_INT_WMAC_TX BIT(1) ++#define QCA953X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) ++#define QCA953X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC BIT(4) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) ++#define QCA953X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) ++#define QCA953X_PCIE_WMAC_INT_WMAC_ALL \ ++ (QCA953X_PCIE_WMAC_INT_WMAC_MISC | QCA953X_PCIE_WMAC_INT_WMAC_TX | \ ++ QCA953X_PCIE_WMAC_INT_WMAC_RXLP | QCA953X_PCIE_WMAC_INT_WMAC_RXHP) ++ ++#define QCA953X_PCIE_WMAC_INT_PCIE_ALL \ ++ (QCA953X_PCIE_WMAC_INT_PCIE_RC | QCA953X_PCIE_WMAC_INT_PCIE_RC0 | \ ++ QCA953X_PCIE_WMAC_INT_PCIE_RC1 | QCA953X_PCIE_WMAC_INT_PCIE_RC2 | \ ++ QCA953X_PCIE_WMAC_INT_PCIE_RC3) ++ + #define QCA955X_EXT_INT_WMAC_MISC BIT(0) + #define QCA955X_EXT_INT_WMAC_TX BIT(1) + #define QCA955X_EXT_INT_WMAC_RXLP BIT(2) +@@ -449,6 +730,37 @@ + QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ + QCA955X_EXT_INT_PCIE_RC2_INT3) + ++#define QCA956X_EXT_INT_WMAC_MISC BIT(0) ++#define QCA956X_EXT_INT_WMAC_TX BIT(1) ++#define QCA956X_EXT_INT_WMAC_RXLP BIT(2) ++#define QCA956X_EXT_INT_WMAC_RXHP BIT(3) ++#define QCA956X_EXT_INT_PCIE_RC1 BIT(4) ++#define QCA956X_EXT_INT_PCIE_RC1_INT0 BIT(5) ++#define QCA956X_EXT_INT_PCIE_RC1_INT1 BIT(6) ++#define QCA956X_EXT_INT_PCIE_RC1_INT2 BIT(7) ++#define QCA956X_EXT_INT_PCIE_RC1_INT3 BIT(8) ++#define QCA956X_EXT_INT_PCIE_RC2 BIT(12) ++#define QCA956X_EXT_INT_PCIE_RC2_INT0 BIT(13) ++#define QCA956X_EXT_INT_PCIE_RC2_INT1 BIT(14) ++#define QCA956X_EXT_INT_PCIE_RC2_INT2 BIT(15) ++#define QCA956X_EXT_INT_PCIE_RC2_INT3 BIT(16) ++#define QCA956X_EXT_INT_USB1 BIT(24) ++#define QCA956X_EXT_INT_USB2 BIT(28) ++ ++#define QCA956X_EXT_INT_WMAC_ALL \ ++ (QCA956X_EXT_INT_WMAC_MISC | QCA956X_EXT_INT_WMAC_TX | \ ++ QCA956X_EXT_INT_WMAC_RXLP | QCA956X_EXT_INT_WMAC_RXHP) ++ ++#define QCA956X_EXT_INT_PCIE_RC1_ALL \ ++ (QCA956X_EXT_INT_PCIE_RC1 | QCA956X_EXT_INT_PCIE_RC1_INT0 | \ ++ QCA956X_EXT_INT_PCIE_RC1_INT1 | QCA956X_EXT_INT_PCIE_RC1_INT2 | \ ++ QCA956X_EXT_INT_PCIE_RC1_INT3) ++ ++#define QCA956X_EXT_INT_PCIE_RC2_ALL \ ++ (QCA956X_EXT_INT_PCIE_RC2 | QCA956X_EXT_INT_PCIE_RC2_INT0 | \ ++ QCA956X_EXT_INT_PCIE_RC2_INT1 | QCA956X_EXT_INT_PCIE_RC2_INT2 | \ ++ QCA956X_EXT_INT_PCIE_RC2_INT3) ++ + #define REV_ID_MAJOR_MASK 0xfff0 + #define REV_ID_MAJOR_AR71XX 0x00a0 + #define REV_ID_MAJOR_AR913X 0x00b0 +@@ -460,8 +772,12 @@ + #define REV_ID_MAJOR_AR9341 0x0120 + #define REV_ID_MAJOR_AR9342 0x1120 + #define REV_ID_MAJOR_AR9344 0x2120 ++#define REV_ID_MAJOR_QCA9533 0x0140 ++#define REV_ID_MAJOR_QCA9533_V2 0x0160 + #define REV_ID_MAJOR_QCA9556 0x0130 + #define REV_ID_MAJOR_QCA9558 0x1130 ++#define REV_ID_MAJOR_TP9343 0x0150 ++#define REV_ID_MAJOR_QCA9561 0x1150 + + #define AR71XX_REV_ID_MINOR_MASK 0x3 + #define AR71XX_REV_ID_MINOR_AR7130 0x0 +@@ -482,8 +798,12 @@ + + #define AR934X_REV_ID_REVISION_MASK 0xf + ++#define QCA953X_REV_ID_REVISION_MASK 0xf ++ + #define QCA955X_REV_ID_REVISION_MASK 0xf + ++#define QCA956X_REV_ID_REVISION_MASK 0xf ++ + /* + * SPI block + */ +@@ -520,16 +840,65 @@ + #define AR71XX_GPIO_REG_INT_PENDING 0x20 + #define AR71XX_GPIO_REG_INT_ENABLE 0x24 + #define AR71XX_GPIO_REG_FUNC 0x28 ++#define AR71XX_GPIO_REG_FUNC_2 0x30 + ++#define AR934X_GPIO_REG_OUT_FUNC0 0x2c ++#define AR934X_GPIO_REG_OUT_FUNC1 0x30 ++#define AR934X_GPIO_REG_OUT_FUNC2 0x34 ++#define AR934X_GPIO_REG_OUT_FUNC3 0x38 ++#define AR934X_GPIO_REG_OUT_FUNC4 0x3c ++#define AR934X_GPIO_REG_OUT_FUNC5 0x40 + #define AR934X_GPIO_REG_FUNC 0x6c + ++#define QCA953X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA953X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA953X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA953X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA953X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA953X_GPIO_REG_IN_ENABLE0 0x44 ++#define QCA953X_GPIO_REG_FUNC 0x6c ++ ++#define QCA953X_GPIO_OUT_MUX_SPI_CS1 10 ++#define QCA953X_GPIO_OUT_MUX_SPI_CS2 11 ++#define QCA953X_GPIO_OUT_MUX_SPI_CS0 9 ++#define QCA953X_GPIO_OUT_MUX_SPI_CLK 8 ++#define QCA953X_GPIO_OUT_MUX_SPI_MOSI 12 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK1 41 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK2 42 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK3 43 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK4 44 ++#define QCA953X_GPIO_OUT_MUX_LED_LINK5 45 ++ ++#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA955X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA955X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA955X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA955X_GPIO_REG_OUT_FUNC5 0x40 ++#define QCA955X_GPIO_REG_FUNC 0x6c ++ ++#define QCA956X_GPIO_REG_OUT_FUNC0 0x2c ++#define QCA956X_GPIO_REG_OUT_FUNC1 0x30 ++#define QCA956X_GPIO_REG_OUT_FUNC2 0x34 ++#define QCA956X_GPIO_REG_OUT_FUNC3 0x38 ++#define QCA956X_GPIO_REG_OUT_FUNC4 0x3c ++#define QCA956X_GPIO_REG_OUT_FUNC5 0x40 ++#define QCA956X_GPIO_REG_IN_ENABLE0 0x44 ++#define QCA956X_GPIO_REG_IN_ENABLE3 0x50 ++#define QCA956X_GPIO_REG_FUNC 0x6c ++ ++#define QCA956X_GPIO_OUT_MUX_GE0_MDO 32 ++#define QCA956X_GPIO_OUT_MUX_GE0_MDC 33 ++ + #define AR71XX_GPIO_COUNT 16 + #define AR7240_GPIO_COUNT 18 + #define AR7241_GPIO_COUNT 20 + #define AR913X_GPIO_COUNT 22 + #define AR933X_GPIO_COUNT 30 + #define AR934X_GPIO_COUNT 23 ++#define QCA953X_GPIO_COUNT 18 + #define QCA955X_GPIO_COUNT 24 ++#define QCA956X_GPIO_COUNT 23 + + /* + * SRIF block +@@ -552,4 +921,185 @@ + #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 + #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 + ++#define QCA953X_SRIF_CPU_DPLL1_REG 0x1c0 ++#define QCA953X_SRIF_CPU_DPLL2_REG 0x1c4 ++#define QCA953X_SRIF_CPU_DPLL3_REG 0x1c8 ++ ++#define QCA953X_SRIF_DDR_DPLL1_REG 0x240 ++#define QCA953X_SRIF_DDR_DPLL2_REG 0x244 ++#define QCA953X_SRIF_DDR_DPLL3_REG 0x248 ++ ++#define QCA953X_SRIF_DPLL1_REFDIV_SHIFT 27 ++#define QCA953X_SRIF_DPLL1_REFDIV_MASK 0x1f ++#define QCA953X_SRIF_DPLL1_NINT_SHIFT 18 ++#define QCA953X_SRIF_DPLL1_NINT_MASK 0x1ff ++#define QCA953X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff ++ ++#define QCA953X_SRIF_DPLL2_LOCAL_PLL BIT(30) ++#define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT 13 ++#define QCA953X_SRIF_DPLL2_OUTDIV_MASK 0x7 ++ ++#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) ++#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) ++#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) ++#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12) ++#define AR71XX_GPIO_FUNC_UART_EN BIT(8) ++#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4) ++#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0) ++ ++#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19) ++#define AR724X_GPIO_FUNC_SPI_EN BIT(18) ++#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14) ++#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) ++#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12) ++#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11) ++#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10) ++#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9) ++#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) ++#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) ++#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) ++#define AR724X_GPIO_FUNC_UART_EN BIT(1) ++#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) ++ ++#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9) ++ ++#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) ++#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) ++#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) ++#define AR913X_GPIO_FUNC_I2S_MCKEN BIT(19) ++#define AR913X_GPIO_FUNC_I2S1_EN BIT(18) ++#define AR913X_GPIO_FUNC_I2S0_EN BIT(17) ++#define AR913X_GPIO_FUNC_SLIC_EN BIT(16) ++#define AR913X_GPIO_FUNC_UART_RTSCTS_EN BIT(9) ++#define AR913X_GPIO_FUNC_UART_EN BIT(8) ++#define AR913X_GPIO_FUNC_USB_CLK_EN BIT(4) ++ ++#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) ++#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) ++#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) ++#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) ++#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) ++#define AR933X_GPIO_FUNC_SPI_EN BIT(18) ++#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) ++#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) ++#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) ++#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) ++#define AR933X_GPIO_FUNC_UART_EN BIT(1) ++#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) ++ ++#define AR934X_GPIO_FUNC_CLK_OBS7_EN BIT(9) ++#define AR934X_GPIO_FUNC_CLK_OBS6_EN BIT(8) ++#define AR934X_GPIO_FUNC_CLK_OBS5_EN BIT(7) ++#define AR934X_GPIO_FUNC_CLK_OBS4_EN BIT(6) ++#define AR934X_GPIO_FUNC_CLK_OBS3_EN BIT(5) ++#define AR934X_GPIO_FUNC_CLK_OBS2_EN BIT(4) ++#define AR934X_GPIO_FUNC_CLK_OBS1_EN BIT(3) ++#define AR934X_GPIO_FUNC_CLK_OBS0_EN BIT(2) ++#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1) ++ ++#define AR934X_GPIO_OUT_GPIO 0 ++#define AR934X_GPIO_OUT_SPI_CS1 7 ++#define AR934X_GPIO_OUT_LED_LINK0 41 ++#define AR934X_GPIO_OUT_LED_LINK1 42 ++#define AR934X_GPIO_OUT_LED_LINK2 43 ++#define AR934X_GPIO_OUT_LED_LINK3 44 ++#define AR934X_GPIO_OUT_LED_LINK4 45 ++#define AR934X_GPIO_OUT_EXT_LNA0 46 ++#define AR934X_GPIO_OUT_EXT_LNA1 47 ++ ++#define QCA955X_GPIO_OUT_GPIO 0 ++ ++/* ++ * MII_CTRL block ++ */ ++#define AR71XX_MII_REG_MII0_CTRL 0x00 ++#define AR71XX_MII_REG_MII1_CTRL 0x04 ++ ++#define AR71XX_MII_CTRL_IF_MASK 3 ++#define AR71XX_MII_CTRL_SPEED_SHIFT 4 ++#define AR71XX_MII_CTRL_SPEED_MASK 3 ++#define AR71XX_MII_CTRL_SPEED_10 0 ++#define AR71XX_MII_CTRL_SPEED_100 1 ++#define AR71XX_MII_CTRL_SPEED_1000 2 ++ ++#define AR71XX_MII0_CTRL_IF_GMII 0 ++#define AR71XX_MII0_CTRL_IF_MII 1 ++#define AR71XX_MII0_CTRL_IF_RGMII 2 ++#define AR71XX_MII0_CTRL_IF_RMII 3 ++ ++#define AR71XX_MII1_CTRL_IF_RGMII 0 ++#define AR71XX_MII1_CTRL_IF_RMII 1 ++ ++/* ++ * AR933X GMAC interface ++ */ ++#define AR933X_GMAC_REG_ETH_CFG 0x00 ++ ++#define AR933X_ETH_CFG_RGMII_GE0 BIT(0) ++#define AR933X_ETH_CFG_MII_GE0 BIT(1) ++#define AR933X_ETH_CFG_GMII_GE0 BIT(2) ++#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3) ++#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4) ++#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5) ++#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7) ++#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8) ++#define AR933X_ETH_CFG_RMII_GE0 BIT(9) ++#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 ++#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10) ++ ++/* ++ * AR934X GMAC Interface ++ */ ++#define AR934X_GMAC_REG_ETH_CFG 0x00 ++ ++#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0) ++#define AR934X_ETH_CFG_MII_GMAC0 BIT(1) ++#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2) ++#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3) ++#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4) ++#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5) ++#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6) ++#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7) ++#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9) ++#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10) ++#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11) ++#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12) ++#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) ++#define AR934X_ETH_CFG_RXD_DELAY BIT(14) ++#define AR934X_ETH_CFG_RXD_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_RXD_DELAY_SHIFT 14 ++#define AR934X_ETH_CFG_RDV_DELAY BIT(16) ++#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 ++ ++/* ++ * QCA953X GMAC Interface ++ */ ++#define QCA953X_GMAC_REG_ETH_CFG 0x00 ++ ++#define QCA953X_ETH_CFG_SW_ONLY_MODE BIT(6) ++#define QCA953X_ETH_CFG_SW_PHY_SWAP BIT(7) ++#define QCA953X_ETH_CFG_SW_APB_ACCESS BIT(9) ++#define QCA953X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) ++ ++/* ++ * QCA955X GMAC Interface ++ */ ++ ++#define QCA955X_GMAC_REG_ETH_CFG 0x00 ++ ++#define QCA955X_ETH_CFG_RGMII_EN BIT(0) ++#define QCA955X_ETH_CFG_GE0_SGMII BIT(6) ++ + #endif /* __ASM_MACH_AR71XX_REGS_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79.h 2015-12-04 19:57:04.482071652 +0100 +@@ -32,8 +32,11 @@ + ATH79_SOC_AR9341, + ATH79_SOC_AR9342, + ATH79_SOC_AR9344, ++ ATH79_SOC_QCA9533, + ATH79_SOC_QCA9556, + ATH79_SOC_QCA9558, ++ ATH79_SOC_TP9343, ++ ATH79_SOC_QCA9561, + }; + + extern enum ath79_soc_type ath79_soc; +@@ -100,6 +103,16 @@ + return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); + } + ++static inline int soc_is_qca9533(void) ++{ ++ return ath79_soc == ATH79_SOC_QCA9533; ++} ++ ++static inline int soc_is_qca953x(void) ++{ ++ return soc_is_qca9533(); ++} ++ + static inline int soc_is_qca9556(void) + { + return ath79_soc == ATH79_SOC_QCA9556; +@@ -115,7 +128,23 @@ + return soc_is_qca9556() || soc_is_qca9558(); + } + ++static inline int soc_is_tp9343(void) ++{ ++ return ath79_soc == ATH79_SOC_TP9343; ++} ++ ++static inline int soc_is_qca9561(void) ++{ ++ return ath79_soc == ATH79_SOC_QCA9561; ++} ++ ++static inline int soc_is_qca956x(void) ++{ ++ return soc_is_tp9343() || soc_is_qca9561(); ++} ++ + extern void __iomem *ath79_ddr_base; ++extern void __iomem *ath79_gpio_base; + extern void __iomem *ath79_pll_base; + extern void __iomem *ath79_reset_base; + +@@ -132,6 +161,7 @@ + static inline void ath79_reset_wr(unsigned reg, u32 val) + { + __raw_writel(val, ath79_reset_base + reg); ++ (void) __raw_readl(ath79_reset_base + reg); /* flush */ + } + + static inline u32 ath79_reset_rr(unsigned reg) +@@ -141,5 +171,9 @@ + + void ath79_device_reset_set(u32 mask); + void ath79_device_reset_clear(u32 mask); ++u32 ath79_device_reset_get(u32 mask); ++ ++void ath79_flash_acquire(void); ++void ath79_flash_release(void); + + #endif /* __ASM_MACH_ATH79_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h 2015-12-04 19:57:03.962105671 +0100 +@@ -16,8 +16,15 @@ + unsigned num_chipselect; + }; + ++enum ath79_spi_cs_type { ++ ATH79_SPI_CS_TYPE_INTERNAL, ++ ATH79_SPI_CS_TYPE_GPIO, ++}; ++ + struct ath79_spi_controller_data { +- unsigned gpio; ++ enum ath79_spi_cs_type cs_type; ++ unsigned cs_line; ++ bool is_flash; + }; + + #endif /* _ATH79_SPI_PLATFORM_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h linux-4.1.13/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h 2015-12-04 19:57:03.826114569 +0100 +@@ -36,6 +36,7 @@ + #define cpu_has_mdmx 0 + #define cpu_has_mips3d 0 + #define cpu_has_smartmips 0 ++#define cpu_has_rixi 0 + + #define cpu_has_mips32r1 1 + #define cpu_has_mips32r2 1 +@@ -43,6 +44,7 @@ + #define cpu_has_mips64r2 0 + + #define cpu_has_mipsmt 0 ++#define cpu_has_userlocal 0 + + #define cpu_has_64bits 0 + #define cpu_has_64bit_zero_reg 0 +@@ -51,5 +53,9 @@ + + #define cpu_dcache_line_size() 32 + #define cpu_icache_line_size() 32 ++#define cpu_has_vtag_icache 0 ++#define cpu_has_dc_aliases 1 ++#define cpu_has_ic_fills_f_dc 0 ++#define cpu_has_pindexed_dcache 0 + + #endif /* __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/irq.h linux-4.1.13/arch/mips/include/asm/mach-ath79/irq.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/irq.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/irq.h 2015-12-04 19:57:05.370013557 +0100 +@@ -10,7 +10,7 @@ + #define __ASM_MACH_ATH79_IRQ_H + + #define MIPS_CPU_IRQ_BASE 0 +-#define NR_IRQS 51 ++#define NR_IRQS 83 + + #define ATH79_CPU_IRQ(_x) (MIPS_CPU_IRQ_BASE + (_x)) + +@@ -30,6 +30,10 @@ + #define ATH79_IP3_IRQ_COUNT 3 + #define ATH79_IP3_IRQ(_x) (ATH79_IP3_IRQ_BASE + (_x)) + ++#define ATH79_GPIO_IRQ_BASE (ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT) ++#define ATH79_GPIO_IRQ_COUNT 32 ++#define ATH79_GPIO_IRQ(_x) (ATH79_GPIO_IRQ_BASE + (_x)) ++ + #include_next + + #endif /* __ASM_MACH_ATH79_IRQ_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mach-rb750.h linux-4.1.13/arch/mips/include/asm/mach-ath79/mach-rb750.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mach-rb750.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/mach-rb750.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,84 @@ ++/* ++ * MikroTik RouterBOARD 750 definitions ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++#ifndef _MACH_RB750_H ++#define _MACH_RB750_H ++ ++#include ++ ++#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ ++#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ ++#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ ++#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ ++#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ ++#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ ++#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ ++#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ ++#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ ++#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ ++#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ ++#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ ++#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ ++#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ ++#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ ++ ++#define RB750_GPIO_BTN_RESET 1 ++#define RB750_GPIO_SPI_CS0 2 ++#define RB750_GPIO_LED_ACT 12 ++#define RB750_GPIO_LED_PORT1 13 ++#define RB750_GPIO_LED_PORT2 14 ++#define RB750_GPIO_LED_PORT3 15 ++#define RB750_GPIO_LED_PORT4 16 ++#define RB750_GPIO_LED_PORT5 17 ++ ++#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) ++#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) ++#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) ++#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) ++#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) ++#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) ++#define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE) ++ ++#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) ++ ++#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ ++ RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) ++ ++#define RB7XX_GPIO_NAND_NCE 0 ++#define RB7XX_GPIO_MON 9 ++#define RB7XX_GPIO_LED_ACT 11 ++#define RB7XX_GPIO_USB_POWERON 13 ++ ++#define RB7XX_NAND_NCE BIT(RB7XX_GPIO_NAND_NCE) ++#define RB7XX_LED_ACT BIT(RB7XX_GPIO_LED_ACT) ++#define RB7XX_MONITOR BIT(RB7XX_GPIO_MON) ++#define RB7XX_USB_POWERON BIT(RB7XX_GPIO_USB_POWERON) ++ ++struct rb750_led_data { ++ char *name; ++ char *default_trigger; ++ u32 mask; ++ int active_low; ++}; ++ ++struct rb750_led_platform_data { ++ int num_leds; ++ struct rb750_led_data *leds; ++ void (*latch_change)(u32 clear, u32 set); ++}; ++ ++struct rb7xx_nand_platform_data { ++ u32 nce_line; ++ ++ void (*enable_pins)(void); ++ void (*disable_pins)(void); ++ void (*latch_change)(u32, u32); ++}; ++ ++#endif /* _MACH_RB750_H */ +\ No newline at end of file +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mangle-port.h linux-4.1.13/arch/mips/include/asm/mach-ath79/mangle-port.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/mangle-port.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/mangle-port.h 2015-12-04 19:57:03.970105148 +0100 +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H ++#define __ASM_MACH_ATH79_MANGLE_PORT_H ++ ++#ifdef CONFIG_PCI ++extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); ++extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); ++#else ++#define ath79_pci_swizzle_b(port) (port) ++#define ath79_pci_swizzle_w(port) (port) ++#endif ++ ++#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) ++#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) ++#define __swizzle_addr_l(port) (port) ++#define __swizzle_addr_q(port) (port) ++ ++# define ioswabb(a, x) (x) ++# define __mem_ioswabb(a, x) (x) ++# define ioswabw(a, x) (x) ++# define __mem_ioswabw(a, x) cpu_to_le16(x) ++# define ioswabl(a, x) (x) ++# define __mem_ioswabl(a, x) cpu_to_le32(x) ++# define ioswabq(a, x) (x) ++# define __mem_ioswabq(a, x) cpu_to_le64(x) ++ ++#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h linux-4.1.13/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h +--- linux-4.1.13.orig/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,48 @@ ++/* ++ * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This file was based on the patches for Linux 2.6.27.39 published by ++ * MikroTik for their RouterBoard 4xx series devices. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#define CPLD_GPIO_nLED1 0 ++#define CPLD_GPIO_nLED2 1 ++#define CPLD_GPIO_nLED3 2 ++#define CPLD_GPIO_nLED4 3 ++#define CPLD_GPIO_FAN 4 ++#define CPLD_GPIO_ALE 5 ++#define CPLD_GPIO_CLE 6 ++#define CPLD_GPIO_nCE 7 ++#define CPLD_GPIO_nLED5 8 ++ ++#define CPLD_NUM_GPIOS 9 ++ ++#define CPLD_CFG_nLED1 BIT(CPLD_GPIO_nLED1) ++#define CPLD_CFG_nLED2 BIT(CPLD_GPIO_nLED2) ++#define CPLD_CFG_nLED3 BIT(CPLD_GPIO_nLED3) ++#define CPLD_CFG_nLED4 BIT(CPLD_GPIO_nLED4) ++#define CPLD_CFG_FAN BIT(CPLD_GPIO_FAN) ++#define CPLD_CFG_ALE BIT(CPLD_GPIO_ALE) ++#define CPLD_CFG_CLE BIT(CPLD_GPIO_CLE) ++#define CPLD_CFG_nCE BIT(CPLD_GPIO_nCE) ++#define CPLD_CFG_nLED5 BIT(CPLD_GPIO_nLED5) ++ ++struct rb4xx_cpld_platform_data { ++ unsigned gpio_base; ++}; ++ ++extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value); ++extern int rb4xx_cpld_read(unsigned char *rx_buf, ++ const unsigned char *verify_buf, ++ unsigned cnt); ++extern int rb4xx_cpld_read_from(unsigned addr, ++ unsigned char *rx_buf, ++ const unsigned char *verify_buf, ++ unsigned cnt); ++extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count); +diff -Nur linux-4.1.13.orig/arch/mips/include/asm/mips_machine.h linux-4.1.13/arch/mips/include/asm/mips_machine.h +--- linux-4.1.13.orig/arch/mips/include/asm/mips_machine.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/include/asm/mips_machine.h 2015-12-04 19:57:03.826114569 +0100 +@@ -36,6 +36,18 @@ + .mach_setup = _setup, \ + }; + ++#define MIPS_MACHINE_NONAME(_type, _id, _setup) \ ++static const char machine_id_##_type[] __initconst \ ++ __aligned(1) = _id; \ ++static struct mips_machine machine_##_type \ ++ __used __section(.mips.machines.init) = \ ++{ \ ++ .mach_type = _type, \ ++ .mach_id = machine_id_##_type, \ ++ .mach_name = NULL, \ ++ .mach_setup = _setup, \ ++}; ++ + extern long __mips_machines_start; + extern long __mips_machines_end; + +diff -Nur linux-4.1.13.orig/arch/mips/Kconfig linux-4.1.13/arch/mips/Kconfig +--- linux-4.1.13.orig/arch/mips/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/Kconfig 2015-12-04 19:57:03.986104101 +0100 +@@ -1070,6 +1070,9 @@ + config MIPS_NILE4 + bool + ++config MYLOADER ++ bool ++ + config SYNC_R4K + bool + +diff -Nur linux-4.1.13.orig/arch/mips/Makefile linux-4.1.13/arch/mips/Makefile +--- linux-4.1.13.orig/arch/mips/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/arch/mips/Makefile 2015-12-04 19:57:03.982104363 +0100 +@@ -216,6 +216,7 @@ + # + libs-$(CONFIG_FW_ARC) += arch/mips/fw/arc/ + libs-$(CONFIG_FW_CFE) += arch/mips/fw/cfe/ ++libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/ + libs-$(CONFIG_FW_SNIPROM) += arch/mips/fw/sni/ + libs-y += arch/mips/fw/lib/ + +diff -Nur linux-4.1.13.orig/drivers/gpio/gpio-74x164.c linux-4.1.13/drivers/gpio/gpio-74x164.c +--- linux-4.1.13.orig/drivers/gpio/gpio-74x164.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/gpio/gpio-74x164.c 2015-12-04 19:57:03.930107765 +0100 +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -107,8 +108,18 @@ + static int gen_74x164_probe(struct spi_device *spi) + { + struct gen_74x164_chip *chip; ++ struct gen_74x164_chip_platform_data *pdata; ++ struct device_node *np; + int ret; + ++ pdata = spi->dev.platform_data; ++ np = spi->dev.of_node; ++ ++ if (!np && !pdata) { ++ dev_err(&spi->dev, "No configuration data available.\n"); ++ return -EINVAL; ++ } ++ + /* + * bits_per_word cannot be configured in platform data + */ +@@ -130,18 +141,28 @@ + chip->gpio_chip.set = gen_74x164_set_value; + chip->gpio_chip.base = -1; + +- if (of_property_read_u32(spi->dev.of_node, "registers-number", +- &chip->registers)) { +- dev_err(&spi->dev, +- "Missing registers-number property in the DT.\n"); +- return -EINVAL; ++ if (np) { ++ if (of_property_read_u32(spi->dev.of_node, "registers-number", &chip->registers)) { ++ dev_err(&spi->dev, "Missing registers-number property in the DT.\n"); ++ ret = -EINVAL; ++ goto exit_destroy; ++ } ++ } else if (pdata) { ++ chip->gpio_chip.base = pdata->base; ++ chip->registers = pdata->num_registers; + } + ++ if (!chip->registers) ++ chip->registers = 1; ++ + chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; + chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL); + if (!chip->buffer) + return -ENOMEM; + ++ if (pdata && pdata->init_data) ++ memcpy(chip->buffer, pdata->init_data, chip->registers); ++ + chip->gpio_chip.can_sleep = true; + chip->gpio_chip.dev = &spi->dev; + chip->gpio_chip.owner = THIS_MODULE; +@@ -174,17 +195,19 @@ + return 0; + } + ++#ifdef CONFIG_OF + static const struct of_device_id gen_74x164_dt_ids[] = { + { .compatible = "fairchild,74hc595" }, + {}, + }; + MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); ++#endif /* CONFIG_OF */ + + static struct spi_driver gen_74x164_driver = { + .driver = { + .name = "74x164", + .owner = THIS_MODULE, +- .of_match_table = gen_74x164_dt_ids, ++ .of_match_table = of_match_ptr(gen_74x164_dt_ids), + }, + .probe = gen_74x164_probe, + .remove = gen_74x164_remove, +diff -Nur linux-4.1.13.orig/drivers/gpio/gpio-latch.c linux-4.1.13/drivers/gpio/gpio-latch.c +--- linux-4.1.13.orig/drivers/gpio/gpio-latch.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/gpio/gpio-latch.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,220 @@ ++/* ++ * GPIO latch driver ++ * ++ * Copyright (C) 2014 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++struct gpio_latch_chip { ++ struct gpio_chip gc; ++ ++ struct mutex mutex; ++ struct mutex latch_mutex; ++ bool latch_enabled; ++ int le_gpio; ++ bool le_active_low; ++ int *gpios; ++}; ++ ++static inline struct gpio_latch_chip *to_gpio_latch_chip(struct gpio_chip *gc) ++{ ++ return container_of(gc, struct gpio_latch_chip, gc); ++} ++ ++static void gpio_latch_lock(struct gpio_latch_chip *glc, bool enable) ++{ ++ mutex_lock(&glc->mutex); ++ ++ if (enable) ++ glc->latch_enabled = true; ++ ++ if (glc->latch_enabled) ++ mutex_lock(&glc->latch_mutex); ++} ++ ++static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable) ++{ ++ if (glc->latch_enabled) ++ mutex_unlock(&glc->latch_mutex); ++ ++ if (disable) ++ glc->latch_enabled = true; ++ ++ mutex_unlock(&glc->mutex); ++} ++ ++static int ++gpio_latch_get(struct gpio_chip *gc, unsigned offset) ++{ ++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); ++ int ret; ++ ++ gpio_latch_lock(glc, false); ++ ret = gpio_get_value(glc->gpios[offset]); ++ gpio_latch_unlock(glc, false); ++ ++ return ret; ++} ++ ++static void ++gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value) ++{ ++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); ++ bool enable_latch = false; ++ bool disable_latch = false; ++ int gpio; ++ ++ gpio = glc->gpios[offset]; ++ ++ if (gpio == glc->le_gpio) { ++ enable_latch = value ^ glc->le_active_low; ++ disable_latch = !enable_latch; ++ } ++ ++ gpio_latch_lock(glc, enable_latch); ++ gpio_set_value(gpio, value); ++ gpio_latch_unlock(glc, disable_latch); ++} ++ ++static int ++gpio_latch_direction_input(struct gpio_chip *gc, unsigned offset) ++{ ++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); ++ int ret; ++ ++ gpio_latch_lock(glc, false); ++ ret = gpio_direction_input(glc->gpios[offset]); ++ gpio_latch_unlock(glc, false); ++ ++ return ret; ++} ++ ++static int ++gpio_latch_direction_output(struct gpio_chip *gc, unsigned offset, int value) ++{ ++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); ++ bool enable_latch = false; ++ bool disable_latch = false; ++ int gpio; ++ int ret; ++ ++ gpio = glc->gpios[offset]; ++ ++ if (gpio == glc->le_gpio) { ++ enable_latch = value ^ glc->le_active_low; ++ disable_latch = !enable_latch; ++ } ++ ++ gpio_latch_lock(glc, enable_latch); ++ ret = gpio_direction_output(gpio, value); ++ gpio_latch_unlock(glc, disable_latch); ++ ++ return ret; ++} ++ ++static int gpio_latch_probe(struct platform_device *pdev) ++{ ++ struct gpio_latch_chip *glc; ++ struct gpio_latch_platform_data *pdata; ++ struct gpio_chip *gc; ++ int size; ++ int ret; ++ int i; ++ ++ pdata = dev_get_platdata(&pdev->dev); ++ if (!pdata) ++ return -EINVAL; ++ ++ if (pdata->le_gpio_index >= pdata->num_gpios || ++ !pdata->num_gpios || ++ !pdata->gpios) ++ return -EINVAL; ++ ++ for (i = 0; i < pdata->num_gpios; i++) { ++ int gpio = pdata->gpios[i]; ++ ++ ret = devm_gpio_request(&pdev->dev, gpio, ++ GPIO_LATCH_DRIVER_NAME); ++ if (ret) ++ return ret; ++ } ++ ++ glc = devm_kzalloc(&pdev->dev, sizeof(*glc), GFP_KERNEL); ++ if (!glc) ++ return -ENOMEM; ++ ++ mutex_init(&glc->mutex); ++ mutex_init(&glc->latch_mutex); ++ ++ size = pdata->num_gpios * sizeof(glc->gpios[0]); ++ glc->gpios = devm_kzalloc(&pdev->dev, size , GFP_KERNEL); ++ if (!glc->gpios) ++ return -ENOMEM; ++ ++ memcpy(glc->gpios, pdata->gpios, size); ++ ++ glc->le_gpio = glc->gpios[pdata->le_gpio_index]; ++ glc->le_active_low = pdata->le_active_low; ++ ++ gc = &glc->gc; ++ ++ gc->label = GPIO_LATCH_DRIVER_NAME; ++ gc->base = pdata->base; ++ gc->can_sleep = true; ++ gc->ngpio = pdata->num_gpios; ++ gc->get = gpio_latch_get; ++ gc->set = gpio_latch_set; ++ gc->direction_input = gpio_latch_direction_input, ++ gc->direction_output = gpio_latch_direction_output; ++ ++ platform_set_drvdata(pdev, glc); ++ ++ ret = gpiochip_add(&glc->gc); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int gpio_latch_remove(struct platform_device *pdev) ++{ ++ struct gpio_latch_chip *glc = platform_get_drvdata(pdev); ++ ++ gpiochip_remove(&glc->gc); ++ return 0; ++} ++ ++ ++static struct platform_driver gpio_latch_driver = { ++ .probe = gpio_latch_probe, ++ .remove = gpio_latch_remove, ++ .driver = { ++ .name = GPIO_LATCH_DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init gpio_latch_init(void) ++{ ++ return platform_driver_register(&gpio_latch_driver); ++} ++ ++postcore_initcall(gpio_latch_init); ++ ++MODULE_DESCRIPTION("GPIO latch driver"); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" GPIO_LATCH_DRIVER_NAME); +diff -Nur linux-4.1.13.orig/drivers/gpio/gpio-nxp-74hc153.c linux-4.1.13/drivers/gpio/gpio-nxp-74hc153.c +--- linux-4.1.13.orig/drivers/gpio/gpio-nxp-74hc153.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/gpio/gpio-nxp-74hc153.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,251 @@ ++/* ++ * NXP 74HC153 - Dual 4-input multiplexer GPIO driver ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NXP_74HC153_NUM_GPIOS 8 ++#define NXP_74HC153_S0_MASK 0x1 ++#define NXP_74HC153_S1_MASK 0x2 ++#define NXP_74HC153_BANK_MASK 0x4 ++ ++struct nxp_74hc153_chip { ++ struct device *parent; ++ struct gpio_chip gpio_chip; ++ struct mutex lock; ++}; ++ ++static struct nxp_74hc153_chip *gpio_to_nxp(struct gpio_chip *gc) ++{ ++ return container_of(gc, struct nxp_74hc153_chip, gpio_chip); ++} ++ ++static int nxp_74hc153_direction_input(struct gpio_chip *gc, unsigned offset) ++{ ++ return 0; ++} ++ ++static int nxp_74hc153_direction_output(struct gpio_chip *gc, ++ unsigned offset, int val) ++{ ++ return -EINVAL; ++} ++ ++static int nxp_74hc153_get_value(struct gpio_chip *gc, unsigned offset) ++{ ++ struct nxp_74hc153_chip *nxp; ++ struct nxp_74hc153_platform_data *pdata; ++ unsigned s0; ++ unsigned s1; ++ unsigned pin; ++ int ret; ++ ++ nxp = gpio_to_nxp(gc); ++ pdata = nxp->parent->platform_data; ++ ++ s0 = !!(offset & NXP_74HC153_S0_MASK); ++ s1 = !!(offset & NXP_74HC153_S1_MASK); ++ pin = (offset & NXP_74HC153_BANK_MASK) ? pdata->gpio_pin_2y ++ : pdata->gpio_pin_1y; ++ ++ mutex_lock(&nxp->lock); ++ gpio_set_value(pdata->gpio_pin_s0, s0); ++ gpio_set_value(pdata->gpio_pin_s1, s1); ++ ret = gpio_get_value(pin); ++ mutex_unlock(&nxp->lock); ++ ++ return ret; ++} ++ ++static void nxp_74hc153_set_value(struct gpio_chip *gc, ++ unsigned offset, int val) ++{ ++ /* not supported */ ++} ++ ++static int nxp_74hc153_probe(struct platform_device *pdev) ++{ ++ struct nxp_74hc153_platform_data *pdata; ++ struct nxp_74hc153_chip *nxp; ++ struct gpio_chip *gc; ++ int err; ++ ++ pdata = pdev->dev.platform_data; ++ if (pdata == NULL) { ++ dev_dbg(&pdev->dev, "no platform data specified\n"); ++ return -EINVAL; ++ } ++ ++ nxp = kzalloc(sizeof(struct nxp_74hc153_chip), GFP_KERNEL); ++ if (nxp == NULL) { ++ dev_err(&pdev->dev, "no memory for private data\n"); ++ return -ENOMEM; ++ } ++ ++ err = gpio_request(pdata->gpio_pin_s0, dev_name(&pdev->dev)); ++ if (err) { ++ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", ++ pdata->gpio_pin_s0, err); ++ goto err_free_nxp; ++ } ++ ++ err = gpio_request(pdata->gpio_pin_s1, dev_name(&pdev->dev)); ++ if (err) { ++ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", ++ pdata->gpio_pin_s1, err); ++ goto err_free_s0; ++ } ++ ++ err = gpio_request(pdata->gpio_pin_1y, dev_name(&pdev->dev)); ++ if (err) { ++ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", ++ pdata->gpio_pin_1y, err); ++ goto err_free_s1; ++ } ++ ++ err = gpio_request(pdata->gpio_pin_2y, dev_name(&pdev->dev)); ++ if (err) { ++ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", ++ pdata->gpio_pin_2y, err); ++ goto err_free_1y; ++ } ++ ++ err = gpio_direction_output(pdata->gpio_pin_s0, 0); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to set direction of gpio %u, err=%d\n", ++ pdata->gpio_pin_s0, err); ++ goto err_free_2y; ++ } ++ ++ err = gpio_direction_output(pdata->gpio_pin_s1, 0); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to set direction of gpio %u, err=%d\n", ++ pdata->gpio_pin_s1, err); ++ goto err_free_2y; ++ } ++ ++ err = gpio_direction_input(pdata->gpio_pin_1y); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to set direction of gpio %u, err=%d\n", ++ pdata->gpio_pin_1y, err); ++ goto err_free_2y; ++ } ++ ++ err = gpio_direction_input(pdata->gpio_pin_2y); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to set direction of gpio %u, err=%d\n", ++ pdata->gpio_pin_2y, err); ++ goto err_free_2y; ++ } ++ ++ nxp->parent = &pdev->dev; ++ mutex_init(&nxp->lock); ++ ++ gc = &nxp->gpio_chip; ++ ++ gc->direction_input = nxp_74hc153_direction_input; ++ gc->direction_output = nxp_74hc153_direction_output; ++ gc->get = nxp_74hc153_get_value; ++ gc->set = nxp_74hc153_set_value; ++ gc->can_sleep = 1; ++ ++ gc->base = pdata->gpio_base; ++ gc->ngpio = NXP_74HC153_NUM_GPIOS; ++ gc->label = dev_name(nxp->parent); ++ gc->dev = nxp->parent; ++ gc->owner = THIS_MODULE; ++ ++ err = gpiochip_add(&nxp->gpio_chip); ++ if (err) { ++ dev_err(&pdev->dev, "unable to add gpio chip, err=%d\n", err); ++ goto err_free_2y; ++ } ++ ++ platform_set_drvdata(pdev, nxp); ++ return 0; ++ ++err_free_2y: ++ gpio_free(pdata->gpio_pin_2y); ++err_free_1y: ++ gpio_free(pdata->gpio_pin_1y); ++err_free_s1: ++ gpio_free(pdata->gpio_pin_s1); ++err_free_s0: ++ gpio_free(pdata->gpio_pin_s0); ++err_free_nxp: ++ kfree(nxp); ++ return err; ++} ++ ++static int nxp_74hc153_remove(struct platform_device *pdev) ++{ ++ struct nxp_74hc153_chip *nxp = platform_get_drvdata(pdev); ++ struct nxp_74hc153_platform_data *pdata = pdev->dev.platform_data; ++ ++ if (nxp) { ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) ++ int err; ++ ++ err = gpiochip_remove(&nxp->gpio_chip); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to remove gpio chip, err=%d\n", ++ err); ++ return err; ++ } ++#else ++ gpiochip_remove(&nxp->gpio_chip); ++#endif ++ gpio_free(pdata->gpio_pin_2y); ++ gpio_free(pdata->gpio_pin_1y); ++ gpio_free(pdata->gpio_pin_s1); ++ gpio_free(pdata->gpio_pin_s0); ++ ++ kfree(nxp); ++ platform_set_drvdata(pdev, NULL); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver nxp_74hc153_driver = { ++ .probe = nxp_74hc153_probe, ++ .remove = nxp_74hc153_remove, ++ .driver = { ++ .name = NXP_74HC153_DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init nxp_74hc153_init(void) ++{ ++ return platform_driver_register(&nxp_74hc153_driver); ++} ++subsys_initcall(nxp_74hc153_init); ++ ++static void __exit nxp_74hc153_exit(void) ++{ ++ platform_driver_unregister(&nxp_74hc153_driver); ++} ++module_exit(nxp_74hc153_exit); ++ ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC153"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" NXP_74HC153_DRIVER_NAME); +diff -Nur linux-4.1.13.orig/drivers/gpio/Kconfig linux-4.1.13/drivers/gpio/Kconfig +--- linux-4.1.13.orig/drivers/gpio/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/gpio/Kconfig 2015-12-04 19:57:03.934107503 +0100 +@@ -941,7 +941,7 @@ + + config GPIO_74X164 + tristate "74x164 serial-in/parallel-out 8-bits shift register" +- depends on SPI_MASTER && OF ++ depends on SPI_MASTER + help + Driver for 74x164 compatible serial-in/parallel-out 8-outputs + shift registers. This driver can be used to provide access +@@ -988,4 +988,17 @@ + + endmenu + ++comment "Other GPIO expanders" ++ ++config GPIO_NXP_74HC153 ++ tristate "NXP 74HC153 Dual 4-input multiplexer" ++ help ++ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This ++ provides a GPIO interface supporting input mode only. ++ ++config GPIO_LATCH ++ tristate "GPIO latch driver" ++ help ++ Say yes here to enable a GPIO latch driver. ++ + endif +diff -Nur linux-4.1.13.orig/drivers/gpio/Makefile linux-4.1.13/drivers/gpio/Makefile +--- linux-4.1.13.orig/drivers/gpio/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/gpio/Makefile 2015-12-04 19:57:03.934107503 +0100 +@@ -42,6 +42,7 @@ + obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o + obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o + obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o ++obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o + obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o + obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o + obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o +@@ -64,6 +65,7 @@ + obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o + obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o + obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o ++obj-$(CONFIG_GPIO_NXP_74HC153) += gpio-nxp-74hc153.o + obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o + obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o + obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o +diff -Nur linux-4.1.13.orig/drivers/leds/Kconfig linux-4.1.13/drivers/leds/Kconfig +--- linux-4.1.13.orig/drivers/leds/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/leds/Kconfig 2015-12-04 19:57:03.926108026 +0100 +@@ -534,6 +534,17 @@ + This option enables support for the 'White' LED block + on Qualcomm PM8941 PMICs. + ++config LEDS_WNDR3700_USB ++ tristate "NETGEAR WNDR3700 USB LED driver" ++ depends on LEDS_CLASS && ATH79_MACH_WNDR3700 ++ help ++ This option enables support for the USB LED found on the ++ NETGEAR WNDR3700 board. ++ ++config LEDS_RB750 ++ tristate "LED driver for the Mikrotik RouterBOARD 750" ++ depends on LEDS_CLASS && ATH79_MACH_RB750 ++ + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + +diff -Nur linux-4.1.13.orig/drivers/leds/leds-rb750.c linux-4.1.13/drivers/leds/leds-rb750.c +--- linux-4.1.13.orig/drivers/leds/leds-rb750.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/leds/leds-rb750.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,144 @@ ++/* ++ * LED driver for the RouterBOARD 750 ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define DRV_NAME "leds-rb750" ++ ++struct rb750_led_dev { ++ struct led_classdev cdev; ++ u32 mask; ++ int active_low; ++ void (*latch_change)(u32 clear, u32 set); ++}; ++ ++struct rb750_led_drvdata { ++ struct rb750_led_dev *led_devs; ++ int num_leds; ++}; ++ ++static inline struct rb750_led_dev *to_rbled(struct led_classdev *led_cdev) ++{ ++ return (struct rb750_led_dev *)container_of(led_cdev, ++ struct rb750_led_dev, cdev); ++} ++ ++static void rb750_led_brightness_set(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ struct rb750_led_dev *rbled = to_rbled(led_cdev); ++ int level; ++ ++ level = (value == LED_OFF) ? 0 : 1; ++ level ^= rbled->active_low; ++ ++ if (level) ++ rbled->latch_change(0, rbled->mask); ++ else ++ rbled->latch_change(rbled->mask, 0); ++} ++ ++static int rb750_led_probe(struct platform_device *pdev) ++{ ++ struct rb750_led_platform_data *pdata; ++ struct rb750_led_drvdata *drvdata; ++ int ret = 0; ++ int i; ++ ++ pdata = pdev->dev.platform_data; ++ if (!pdata) ++ return -EINVAL; ++ ++ drvdata = kzalloc(sizeof(struct rb750_led_drvdata) + ++ sizeof(struct rb750_led_dev) * pdata->num_leds, ++ GFP_KERNEL); ++ if (!drvdata) ++ return -ENOMEM; ++ ++ drvdata->num_leds = pdata->num_leds; ++ drvdata->led_devs = (struct rb750_led_dev *) &drvdata[1]; ++ ++ for (i = 0; i < drvdata->num_leds; i++) { ++ struct rb750_led_dev *rbled = &drvdata->led_devs[i]; ++ struct rb750_led_data *led_data = &pdata->leds[i]; ++ ++ rbled->cdev.name = led_data->name; ++ rbled->cdev.default_trigger = led_data->default_trigger; ++ rbled->cdev.brightness_set = rb750_led_brightness_set; ++ rbled->cdev.brightness = LED_OFF; ++ ++ rbled->mask = led_data->mask; ++ rbled->active_low = !!led_data->active_low; ++ rbled->latch_change = pdata->latch_change; ++ ++ ret = led_classdev_register(&pdev->dev, &rbled->cdev); ++ if (ret) ++ goto err; ++ } ++ ++ platform_set_drvdata(pdev, drvdata); ++ return 0; ++ ++err: ++ for (i = i - 1; i >= 0; i--) ++ led_classdev_unregister(&drvdata->led_devs[i].cdev); ++ ++ kfree(drvdata); ++ return ret; ++} ++ ++static int rb750_led_remove(struct platform_device *pdev) ++{ ++ struct rb750_led_drvdata *drvdata; ++ int i; ++ ++ drvdata = platform_get_drvdata(pdev); ++ for (i = 0; i < drvdata->num_leds; i++) ++ led_classdev_unregister(&drvdata->led_devs[i].cdev); ++ ++ kfree(drvdata); ++ return 0; ++} ++ ++static struct platform_driver rb750_led_driver = { ++ .probe = rb750_led_probe, ++ .remove = rb750_led_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++MODULE_ALIAS("platform:leds-rb750"); ++ ++static int __init rb750_led_init(void) ++{ ++ return platform_driver_register(&rb750_led_driver); ++} ++ ++static void __exit rb750_led_exit(void) ++{ ++ platform_driver_unregister(&rb750_led_driver); ++} ++ ++module_init(rb750_led_init); ++module_exit(rb750_led_exit); ++ ++MODULE_DESCRIPTION(DRV_NAME); ++MODULE_DESCRIPTION("LED driver for the RouterBOARD 750"); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/leds/leds-wndr3700-usb.c linux-4.1.13/drivers/leds/leds-wndr3700-usb.c +--- linux-4.1.13.orig/drivers/leds/leds-wndr3700-usb.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/leds/leds-wndr3700-usb.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,76 @@ ++/* ++ * USB LED driver for the NETGEAR WNDR3700 ++ * ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define DRIVER_NAME "wndr3700-led-usb" ++ ++static void wndr3700_usb_led_set(struct led_classdev *cdev, ++ enum led_brightness brightness) ++{ ++ if (brightness) ++ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); ++ else ++ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); ++} ++ ++static enum led_brightness wndr3700_usb_led_get(struct led_classdev *cdev) ++{ ++ return ath79_device_reset_get(AR71XX_RESET_GE1_PHY) ? LED_OFF : LED_FULL; ++} ++ ++static struct led_classdev wndr3700_usb_led = { ++ .name = "netgear:green:usb", ++ .brightness_set = wndr3700_usb_led_set, ++ .brightness_get = wndr3700_usb_led_get, ++}; ++ ++static int wndr3700_usb_led_probe(struct platform_device *pdev) ++{ ++ return led_classdev_register(&pdev->dev, &wndr3700_usb_led); ++} ++ ++static int wndr3700_usb_led_remove(struct platform_device *pdev) ++{ ++ led_classdev_unregister(&wndr3700_usb_led); ++ return 0; ++} ++ ++static struct platform_driver wndr3700_usb_led_driver = { ++ .probe = wndr3700_usb_led_probe, ++ .remove = wndr3700_usb_led_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init wndr3700_usb_led_init(void) ++{ ++ return platform_driver_register(&wndr3700_usb_led_driver); ++} ++ ++static void __exit wndr3700_usb_led_exit(void) ++{ ++ platform_driver_unregister(&wndr3700_usb_led_driver); ++} ++ ++module_init(wndr3700_usb_led_init); ++module_exit(wndr3700_usb_led_exit); ++ ++MODULE_DESCRIPTION("USB LED driver for the NETGEAR WNDR3700"); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" DRIVER_NAME); +diff -Nur linux-4.1.13.orig/drivers/leds/Makefile linux-4.1.13/drivers/leds/Makefile +--- linux-4.1.13.orig/drivers/leds/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/leds/Makefile 2015-12-04 19:57:03.926108026 +0100 +@@ -43,12 +43,14 @@ + obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o + obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o + obj-$(CONFIG_LEDS_PWM) += leds-pwm.o ++obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o + obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o + obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o + obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o + obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o + obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o + obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o ++obj-$(CONFIG_LEDS_RB750) += leds-rb750.o + obj-$(CONFIG_LEDS_NS2) += leds-ns2.o + obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o + obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o +diff -Nur linux-4.1.13.orig/drivers/Makefile linux-4.1.13/drivers/Makefile +--- linux-4.1.13.orig/drivers/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/Makefile 2015-12-04 19:57:03.890110382 +0100 +@@ -71,8 +71,8 @@ + obj-$(CONFIG_SCSI) += scsi/ + obj-$(CONFIG_ATA) += ata/ + obj-$(CONFIG_TARGET_CORE) += target/ +-obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPI) += spi/ ++obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPMI) += spmi/ + obj-y += hsi/ + obj-y += net/ +diff -Nur linux-4.1.13.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-4.1.13/drivers/mtd/chips/cfi_cmdset_0002.c +--- linux-4.1.13.orig/drivers/mtd/chips/cfi_cmdset_0002.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/chips/cfi_cmdset_0002.c 2015-12-04 19:57:03.878111167 +0100 +@@ -40,7 +40,7 @@ + #include + + #define AMD_BOOTLOC_BUG +-#define FORCE_WORD_WRITE 0 ++#define FORCE_WORD_WRITE 1 + + #define MAX_WORD_RETRIES 3 + +@@ -51,7 +51,9 @@ + + static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); + static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); ++#if !FORCE_WORD_WRITE + static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); ++#endif + static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *); + static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *); + static void cfi_amdstd_sync (struct mtd_info *); +@@ -202,6 +204,7 @@ + } + #endif + ++#if !FORCE_WORD_WRITE + static void fixup_use_write_buffers(struct mtd_info *mtd) + { + struct map_info *map = mtd->priv; +@@ -211,6 +214,7 @@ + mtd->_write = cfi_amdstd_write_buffers; + } + } ++#endif /* !FORCE_WORD_WRITE */ + + /* Atmel chips don't use the same PRI format as AMD chips */ + static void fixup_convert_atmel_pri(struct mtd_info *mtd) +@@ -1632,8 +1636,8 @@ + break; + } + +- if (chip_ready(map, adr)) +- break; ++ if (chip_good(map, adr, datum)) ++ goto enable_xip; + + /* Latency issues. Drop the lock, wait a while and retry */ + UDELAY(map, chip, adr, 1); +@@ -1649,6 +1653,8 @@ + + ret = -EIO; + } ++ ++ enable_xip: + xip_enable(map, chip, adr); + op_done: + if (mode == FL_OTP_WRITE) +@@ -1789,6 +1795,7 @@ + /* + * FIXME: interleaved mode not tested, and probably not supported! + */ ++#if !FORCE_WORD_WRITE + static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, + unsigned long adr, const u_char *buf, + int len) +@@ -1916,7 +1923,6 @@ + return ret; + } + +- + static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) + { +@@ -1991,6 +1997,7 @@ + + return 0; + } ++#endif /* !FORCE_WORD_WRITE */ + + /* + * Wait for the flash chip to become ready to write data +@@ -2226,7 +2233,6 @@ + return 0; + } + +- + /* + * Handle devices with one erase region, that only implement + * the chip erase command. +@@ -2290,8 +2296,8 @@ + chip->erase_suspended = 0; + } + +- if (chip_ready(map, adr)) +- break; ++ if (chip_good(map, adr, map_word_ff(map))) ++ goto op_done; + + if (time_after(jiffies, timeo)) { + printk(KERN_WARNING "MTD %s(): software timeout\n", +@@ -2311,6 +2317,7 @@ + ret = -EIO; + } + ++ op_done: + chip->state = FL_READY; + xip_enable(map, chip, adr); + DISABLE_VPP(map); +@@ -2379,9 +2386,9 @@ + chip->erase_suspended = 0; + } + +- if (chip_ready(map, adr)) { ++ if (chip_good(map, adr, map_word_ff(map))) { + xip_enable(map, chip, adr); +- break; ++ goto op_done; + } + + if (time_after(jiffies, timeo)) { +@@ -2403,6 +2410,7 @@ + ret = -EIO; + } + ++ op_done: + chip->state = FL_READY; + DISABLE_VPP(map); + put_chip(map, chip, adr); +diff -Nur linux-4.1.13.orig/drivers/mtd/chips/jedec_probe.c linux-4.1.13/drivers/mtd/chips/jedec_probe.c +--- linux-4.1.13.orig/drivers/mtd/chips/jedec_probe.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/chips/jedec_probe.c 2015-12-04 19:57:03.834114045 +0100 +@@ -148,6 +148,7 @@ + #define SST39LF160 0x2782 + #define SST39VF1601 0x234b + #define SST39VF3201 0x235b ++#define SST39VF6401B 0x236d + #define SST39WF1601 0x274b + #define SST39WF1602 0x274a + #define SST39LF512 0x00D4 +@@ -1569,6 +1570,18 @@ + ERASEINFO(0x10000,64), + } + }, { ++ .mfr_id = CFI_MFR_SST, ++ .dev_id = SST39VF6401B, ++ .name = "SST 39VF6401B", ++ .devtypes = CFI_DEVICETYPE_X16, ++ .uaddr = MTD_UADDR_0xAAAA_0x5555, ++ .dev_size = SIZE_8MiB, ++ .cmd_set = P_ID_AMD_STD, ++ .nr_regions = 1, ++ .regions = { ++ ERASEINFO(0x10000,128) ++ } ++ }, { + .mfr_id = CFI_MFR_ST, + .dev_id = M29F800AB, + .name = "ST M29F800AB", +diff -Nur linux-4.1.13.orig/drivers/mtd/cybertan_part.c linux-4.1.13/drivers/mtd/cybertan_part.c +--- linux-4.1.13.orig/drivers/mtd/cybertan_part.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/cybertan_part.c 2015-09-13 20:04:35.072523889 +0200 +@@ -0,0 +1,201 @@ ++/* ++ * Copyright (C) 2009 Christian Daniel ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ * ++ * TRX flash partition table. ++ * Based on ar7 map by Felix Fietkau ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct cybertan_header { ++ char magic[4]; ++ u8 res1[4]; ++ char fw_date[3]; ++ char fw_ver[3]; ++ char id[4]; ++ char hw_ver; ++ char unused; ++ u8 flags[2]; ++ u8 res2[10]; ++}; ++ ++#define TRX_PARTS 6 ++#define TRX_MAGIC 0x30524448 ++#define TRX_MAX_OFFSET 3 ++ ++struct trx_header { ++ uint32_t magic; /* "HDR0" */ ++ uint32_t len; /* Length of file including header */ ++ uint32_t crc32; /* 32-bit CRC from flag_version to end of file */ ++ uint32_t flag_version; /* 0:15 flags, 16:31 version */ ++ uint32_t offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */ ++}; ++ ++#define IH_MAGIC 0x27051956 /* Image Magic Number */ ++#define IH_NMLEN 32 /* Image Name Length */ ++ ++struct uimage_header { ++ uint32_t ih_magic; /* Image Header Magic Number */ ++ uint32_t ih_hcrc; /* Image Header CRC Checksum */ ++ uint32_t ih_time; /* Image Creation Timestamp */ ++ uint32_t ih_size; /* Image Data Size */ ++ uint32_t ih_load; /* Data» Load Address */ ++ uint32_t ih_ep; /* Entry Point Address */ ++ uint32_t ih_dcrc; /* Image Data CRC Checksum */ ++ uint8_t ih_os; /* Operating System */ ++ uint8_t ih_arch; /* CPU architecture */ ++ uint8_t ih_type; /* Image Type */ ++ uint8_t ih_comp; /* Compression Type */ ++ uint8_t ih_name[IH_NMLEN]; /* Image Name */ ++}; ++ ++struct firmware_header { ++ struct cybertan_header cybertan; ++ struct trx_header trx; ++ struct uimage_header uimage; ++} __packed; ++ ++#define UBOOT_LEN 0x40000 ++#define ART_LEN 0x10000 ++#define NVRAM_LEN 0x10000 ++ ++static int cybertan_parse_partitions(struct mtd_info *master, ++ struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data) ++{ ++ struct firmware_header *header; ++ struct trx_header *theader; ++ struct uimage_header *uheader; ++ struct mtd_partition *trx_parts; ++ size_t retlen; ++ unsigned int kernel_len; ++ unsigned int uboot_len; ++ unsigned int nvram_len; ++ unsigned int art_len; ++ int ret; ++ ++ uboot_len = max_t(unsigned int, master->erasesize, UBOOT_LEN); ++ nvram_len = max_t(unsigned int, master->erasesize, NVRAM_LEN); ++ art_len = max_t(unsigned int, master->erasesize, ART_LEN); ++ ++ trx_parts = kzalloc(TRX_PARTS * sizeof(struct mtd_partition), ++ GFP_KERNEL); ++ if (!trx_parts) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ header = vmalloc(sizeof(*header)); ++ if (!header) { ++ return -ENOMEM; ++ goto free_parts; ++ } ++ ++ ret = mtd_read(master, uboot_len, sizeof(*header), ++ &retlen, (void *) header); ++ if (ret) ++ goto free_hdr; ++ ++ if (retlen != sizeof(*header)) { ++ ret = -EIO; ++ goto free_hdr; ++ } ++ ++ theader = &header->trx; ++ if (le32_to_cpu(theader->magic) != TRX_MAGIC) { ++ printk(KERN_NOTICE "%s: no TRX header found\n", master->name); ++ goto free_hdr; ++ } ++ ++ uheader = &header->uimage; ++ if (uheader->ih_magic != IH_MAGIC) { ++ printk(KERN_NOTICE "%s: no uImage found\n", master->name); ++ goto free_hdr; ++ } ++ ++ kernel_len = le32_to_cpu(theader->offsets[1]) + ++ sizeof(struct cybertan_header); ++ ++ trx_parts[0].name = "u-boot"; ++ trx_parts[0].offset = 0; ++ trx_parts[0].size = uboot_len; ++ trx_parts[0].mask_flags = MTD_WRITEABLE; ++ ++ trx_parts[1].name = "kernel"; ++ trx_parts[1].offset = trx_parts[0].offset + trx_parts[0].size; ++ trx_parts[1].size = kernel_len; ++ trx_parts[1].mask_flags = 0; ++ ++ trx_parts[2].name = "rootfs"; ++ trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size; ++ trx_parts[2].size = master->size - uboot_len - nvram_len - art_len - ++ trx_parts[1].size; ++ trx_parts[2].mask_flags = 0; ++ ++ trx_parts[3].name = "nvram"; ++ trx_parts[3].offset = master->size - nvram_len - art_len; ++ trx_parts[3].size = nvram_len; ++ trx_parts[3].mask_flags = MTD_WRITEABLE; ++ ++ trx_parts[4].name = "art"; ++ trx_parts[4].offset = master->size - art_len; ++ trx_parts[4].size = art_len; ++ trx_parts[4].mask_flags = MTD_WRITEABLE; ++ ++ trx_parts[5].name = "firmware"; ++ trx_parts[5].offset = uboot_len; ++ trx_parts[5].size = master->size - uboot_len - nvram_len - art_len; ++ trx_parts[5].mask_flags = 0; ++ ++ vfree(header); ++ ++ *pparts = trx_parts; ++ return TRX_PARTS; ++ ++free_hdr: ++ vfree(header); ++free_parts: ++ kfree(trx_parts); ++out: ++ return ret; ++} ++ ++static struct mtd_part_parser cybertan_parser = { ++ .owner = THIS_MODULE, ++ .parse_fn = cybertan_parse_partitions, ++ .name = "cybertan", ++}; ++ ++static int __init cybertan_parser_init(void) ++{ ++ register_mtd_parser(&cybertan_parser); ++ ++ return 0; ++} ++ ++module_init(cybertan_parser_init); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Christian Daniel "); +diff -Nur linux-4.1.13.orig/drivers/mtd/devices/m25p80.c linux-4.1.13/drivers/mtd/devices/m25p80.c +--- linux-4.1.13.orig/drivers/mtd/devices/m25p80.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/devices/m25p80.c 2015-12-04 19:57:03.966105410 +0100 +@@ -139,10 +139,15 @@ + flash->command[0] = nor->read_opcode; + m25p_addr2cmd(nor, from, flash->command); + ++ if (dummy == 1) ++ t[0].dummy = true; ++ ++ t[0].type = SPI_TRANSFER_FLASH_READ_CMD; + t[0].tx_buf = flash->command; + t[0].len = m25p_cmdsz(nor) + dummy; + spi_message_add_tail(&t[0], &m); + ++ t[1].type = SPI_TRANSFER_FLASH_READ_DATA; + t[1].rx_buf = buf; + t[1].rx_nbits = m25p80_rx_nbits(nor); + t[1].len = len; +@@ -232,6 +237,7 @@ + if (ret) + return ret; + ++ memset(&ppdata, '\0', sizeof(ppdata)); + ppdata.of_node = spi->dev.of_node; + + return mtd_device_parse_register(&flash->mtd, NULL, &ppdata, +diff -Nur linux-4.1.13.orig/drivers/mtd/Kconfig linux-4.1.13/drivers/mtd/Kconfig +--- linux-4.1.13.orig/drivers/mtd/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/Kconfig 2015-12-04 19:57:03.850112998 +0100 +@@ -155,6 +155,12 @@ + This provides partitions parser for devices based on BCM47xx + boards. + ++config MTD_TPLINK_PARTS ++ tristate "TP-Link AR7XXX/AR9XXX partitioning support" ++ depends on ATH79 ++ ---help--- ++ TBD. ++ + comment "User Modules And Translation Layers" + + # +diff -Nur linux-4.1.13.orig/drivers/mtd/maps/physmap.c linux-4.1.13/drivers/mtd/maps/physmap.c +--- linux-4.1.13.orig/drivers/mtd/maps/physmap.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/maps/physmap.c 2015-12-04 19:57:03.830114307 +0100 +@@ -31,6 +31,66 @@ + int vpp_refcnt; + }; + ++static struct platform_device *physmap_map2pdev(struct map_info *map) ++{ ++ return (struct platform_device *) map->map_priv_1; ++} ++ ++static void physmap_lock(struct map_info *map) ++{ ++ struct platform_device *pdev; ++ struct physmap_flash_data *physmap_data; ++ ++ pdev = physmap_map2pdev(map); ++ physmap_data = pdev->dev.platform_data; ++ physmap_data->lock(pdev); ++} ++ ++static void physmap_unlock(struct map_info *map) ++{ ++ struct platform_device *pdev; ++ struct physmap_flash_data *physmap_data; ++ ++ pdev = physmap_map2pdev(map); ++ physmap_data = pdev->dev.platform_data; ++ physmap_data->unlock(pdev); ++} ++ ++static map_word physmap_flash_read_lock(struct map_info *map, unsigned long ofs) ++{ ++ map_word ret; ++ ++ physmap_lock(map); ++ ret = inline_map_read(map, ofs); ++ physmap_unlock(map); ++ ++ return ret; ++} ++ ++static void physmap_flash_write_lock(struct map_info *map, map_word d, ++ unsigned long ofs) ++{ ++ physmap_lock(map); ++ inline_map_write(map, d, ofs); ++ physmap_unlock(map); ++} ++ ++static void physmap_flash_copy_from_lock(struct map_info *map, void *to, ++ unsigned long from, ssize_t len) ++{ ++ physmap_lock(map); ++ inline_map_copy_from(map, to, from, len); ++ physmap_unlock(map); ++} ++ ++static void physmap_flash_copy_to_lock(struct map_info *map, unsigned long to, ++ const void *from, ssize_t len) ++{ ++ physmap_lock(map); ++ inline_map_copy_to(map, to, from, len); ++ physmap_unlock(map); ++} ++ + static int physmap_flash_remove(struct platform_device *dev) + { + struct physmap_flash_info *info; +@@ -153,6 +213,13 @@ + + simple_map_init(&info->map[i]); + ++ if (physmap_data->lock && physmap_data->unlock) { ++ info->map[i].read = physmap_flash_read_lock; ++ info->map[i].write = physmap_flash_write_lock; ++ info->map[i].copy_from = physmap_flash_copy_from_lock; ++ info->map[i].copy_to = physmap_flash_copy_to_lock; ++ } ++ + probe_type = rom_probe_types; + if (physmap_data->probe_type == NULL) { + for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) +diff -Nur linux-4.1.13.orig/drivers/mtd/nand/ar934x_nfc.c linux-4.1.13/drivers/mtd/nand/ar934x_nfc.c +--- linux-4.1.13.orig/drivers/mtd/nand/ar934x_nfc.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/nand/ar934x_nfc.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,1508 @@ ++/* ++ * Driver for the built-in NAND controller of the Atheros AR934x SoCs ++ * ++ * Copyright (C) 2011-2013 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define AR934X_NFC_REG_CMD 0x00 ++#define AR934X_NFC_REG_CTRL 0x04 ++#define AR934X_NFC_REG_STATUS 0x08 ++#define AR934X_NFC_REG_INT_MASK 0x0c ++#define AR934X_NFC_REG_INT_STATUS 0x10 ++#define AR934X_NFC_REG_ECC_CTRL 0x14 ++#define AR934X_NFC_REG_ECC_OFFSET 0x18 ++#define AR934X_NFC_REG_ADDR0_0 0x1c ++#define AR934X_NFC_REG_ADDR0_1 0x24 ++#define AR934X_NFC_REG_ADDR1_0 0x20 ++#define AR934X_NFC_REG_ADDR1_1 0x28 ++#define AR934X_NFC_REG_SPARE_SIZE 0x30 ++#define AR934X_NFC_REG_PROTECT 0x38 ++#define AR934X_NFC_REG_LOOKUP_EN 0x40 ++#define AR934X_NFC_REG_LOOKUP(_x) (0x44 + (_i) * 4) ++#define AR934X_NFC_REG_DMA_ADDR 0x64 ++#define AR934X_NFC_REG_DMA_COUNT 0x68 ++#define AR934X_NFC_REG_DMA_CTRL 0x6c ++#define AR934X_NFC_REG_MEM_CTRL 0x80 ++#define AR934X_NFC_REG_DATA_SIZE 0x84 ++#define AR934X_NFC_REG_READ_STATUS 0x88 ++#define AR934X_NFC_REG_TIME_SEQ 0x8c ++#define AR934X_NFC_REG_TIMINGS_ASYN 0x90 ++#define AR934X_NFC_REG_TIMINGS_SYN 0x94 ++#define AR934X_NFC_REG_FIFO_DATA 0x98 ++#define AR934X_NFC_REG_TIME_MODE 0x9c ++#define AR934X_NFC_REG_DMA_ADDR_OFFS 0xa0 ++#define AR934X_NFC_REG_FIFO_INIT 0xb0 ++#define AR934X_NFC_REG_GEN_SEQ_CTRL 0xb4 ++ ++#define AR934X_NFC_CMD_CMD_SEQ_S 0 ++#define AR934X_NFC_CMD_CMD_SEQ_M 0x3f ++#define AR934X_NFC_CMD_SEQ_1C 0x00 ++#define AR934X_NFC_CMD_SEQ_ERASE 0x0e ++#define AR934X_NFC_CMD_SEQ_12 0x0c ++#define AR934X_NFC_CMD_SEQ_1C1AXR 0x21 ++#define AR934X_NFC_CMD_SEQ_S 0x24 ++#define AR934X_NFC_CMD_SEQ_1C3AXR 0x27 ++#define AR934X_NFC_CMD_SEQ_1C5A1CXR 0x2a ++#define AR934X_NFC_CMD_SEQ_18 0x32 ++#define AR934X_NFC_CMD_INPUT_SEL_SIU 0 ++#define AR934X_NFC_CMD_INPUT_SEL_DMA BIT(6) ++#define AR934X_NFC_CMD_ADDR_SEL_0 0 ++#define AR934X_NFC_CMD_ADDR_SEL_1 BIT(7) ++#define AR934X_NFC_CMD_CMD0_S 8 ++#define AR934X_NFC_CMD_CMD0_M 0xff ++#define AR934X_NFC_CMD_CMD1_S 16 ++#define AR934X_NFC_CMD_CMD1_M 0xff ++#define AR934X_NFC_CMD_CMD2_S 24 ++#define AR934X_NFC_CMD_CMD2_M 0xff ++ ++#define AR934X_NFC_CTRL_ADDR_CYCLE0_M 0x7 ++#define AR934X_NFC_CTRL_ADDR_CYCLE0_S 0 ++#define AR934X_NFC_CTRL_SPARE_EN BIT(3) ++#define AR934X_NFC_CTRL_INT_EN BIT(4) ++#define AR934X_NFC_CTRL_ECC_EN BIT(5) ++#define AR934X_NFC_CTRL_BLOCK_SIZE_S 6 ++#define AR934X_NFC_CTRL_BLOCK_SIZE_M 0x3 ++#define AR934X_NFC_CTRL_BLOCK_SIZE_32 0 ++#define AR934X_NFC_CTRL_BLOCK_SIZE_64 1 ++#define AR934X_NFC_CTRL_BLOCK_SIZE_128 2 ++#define AR934X_NFC_CTRL_BLOCK_SIZE_256 3 ++#define AR934X_NFC_CTRL_PAGE_SIZE_S 8 ++#define AR934X_NFC_CTRL_PAGE_SIZE_M 0x7 ++#define AR934X_NFC_CTRL_PAGE_SIZE_256 0 ++#define AR934X_NFC_CTRL_PAGE_SIZE_512 1 ++#define AR934X_NFC_CTRL_PAGE_SIZE_1024 2 ++#define AR934X_NFC_CTRL_PAGE_SIZE_2048 3 ++#define AR934X_NFC_CTRL_PAGE_SIZE_4096 4 ++#define AR934X_NFC_CTRL_PAGE_SIZE_8192 5 ++#define AR934X_NFC_CTRL_PAGE_SIZE_16384 6 ++#define AR934X_NFC_CTRL_CUSTOM_SIZE_EN BIT(11) ++#define AR934X_NFC_CTRL_IO_WIDTH_8BITS 0 ++#define AR934X_NFC_CTRL_IO_WIDTH_16BITS BIT(12) ++#define AR934X_NFC_CTRL_LOOKUP_EN BIT(13) ++#define AR934X_NFC_CTRL_PROT_EN BIT(14) ++#define AR934X_NFC_CTRL_WORK_MODE_ASYNC 0 ++#define AR934X_NFC_CTRL_WORK_MODE_SYNC BIT(15) ++#define AR934X_NFC_CTRL_ADDR0_AUTO_INC BIT(16) ++#define AR934X_NFC_CTRL_ADDR1_AUTO_INC BIT(17) ++#define AR934X_NFC_CTRL_ADDR_CYCLE1_M 0x7 ++#define AR934X_NFC_CTRL_ADDR_CYCLE1_S 18 ++#define AR934X_NFC_CTRL_SMALL_PAGE BIT(21) ++ ++#define AR934X_NFC_DMA_CTRL_DMA_START BIT(7) ++#define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE 0 ++#define AR934X_NFC_DMA_CTRL_DMA_DIR_READ BIT(6) ++#define AR934X_NFC_DMA_CTRL_DMA_MODE_SG BIT(5) ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_S 2 ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_0 0 ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_1 1 ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_2 2 ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_3 3 ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_4 4 ++#define AR934X_NFC_DMA_CTRL_DMA_BURST_5 5 ++#define AR934X_NFC_DMA_CTRL_ERR_FLAG BIT(1) ++#define AR934X_NFC_DMA_CTRL_DMA_READY BIT(0) ++ ++#define AR934X_NFC_INT_DEV_RDY(_x) BIT(4 + (_x)) ++#define AR934X_NFC_INT_CMD_END BIT(1) ++ ++#define AR934X_NFC_ECC_CTRL_ERR_THRES_S 8 ++#define AR934X_NFC_ECC_CTRL_ERR_THRES_M 0x1f ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_S 5 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_M 0x7 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_2 0 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_4 1 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_6 2 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_8 3 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_10 4 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_12 5 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_14 6 ++#define AR934X_NFC_ECC_CTRL_ECC_CAP_16 7 ++#define AR934X_NFC_ECC_CTRL_ERR_OVER BIT(2) ++#define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT BIT(1) ++#define AR934X_NFC_ECC_CTRL_ERR_CORRECT BIT(0) ++ ++#define AR934X_NFC_ECC_OFFS_OFSET_M 0xffff ++ ++/* default timing values */ ++#define AR934X_NFC_TIME_SEQ_DEFAULT 0x7fff ++#define AR934X_NFC_TIMINGS_ASYN_DEFAULT 0x22 ++#define AR934X_NFC_TIMINGS_SYN_DEFAULT 0xf ++ ++#define AR934X_NFC_ID_BUF_SIZE 8 ++#define AR934X_NFC_DEV_READY_TIMEOUT 25 /* msecs */ ++#define AR934X_NFC_DMA_READY_TIMEOUT 25 /* msecs */ ++#define AR934X_NFC_DONE_TIMEOUT 1000 ++#define AR934X_NFC_DMA_RETRIES 20 ++ ++#define AR934X_NFC_USE_IRQ true ++#define AR934X_NFC_IRQ_MASK AR934X_NFC_INT_DEV_RDY(0) ++ ++#define AR934X_NFC_GENSEQ_SMALL_PAGE_READ 0x30043 ++ ++#undef AR934X_NFC_DEBUG_DATA ++#undef AR934X_NFC_DEBUG ++ ++struct ar934x_nfc; ++ ++static inline __attribute__ ((format (printf, 2, 3))) ++void _nfc_dbg(struct ar934x_nfc *nfc, const char *fmt, ...) ++{ ++} ++ ++#ifdef AR934X_NFC_DEBUG ++#define nfc_dbg(_nfc, fmt, ...) \ ++ dev_info((_nfc)->parent, fmt, ##__VA_ARGS__) ++#else ++#define nfc_dbg(_nfc, fmt, ...) \ ++ _nfc_dbg((_nfc), fmt, ##__VA_ARGS__) ++#endif /* AR934X_NFC_DEBUG */ ++ ++#ifdef AR934X_NFC_DEBUG_DATA ++static void ++nfc_debug_data(const char *label, void *data, int len) ++{ ++ print_hex_dump(KERN_WARNING, label, DUMP_PREFIX_OFFSET, 16, 1, ++ data, len, 0); ++} ++#else ++static inline void ++nfc_debug_data(const char *label, void *data, int len) {} ++#endif /* AR934X_NFC_DEBUG_DATA */ ++ ++struct ar934x_nfc { ++ struct mtd_info mtd; ++ struct nand_chip nand_chip; ++ struct device *parent; ++ void __iomem *base; ++ void (*select_chip)(int chip_no); ++ bool swap_dma; ++ int irq; ++ wait_queue_head_t irq_waitq; ++ ++ bool spurious_irq_expected; ++ u32 irq_status; ++ ++ u32 ctrl_reg; ++ u32 ecc_ctrl_reg; ++ u32 ecc_offset_reg; ++ u32 ecc_thres; ++ u32 ecc_oob_pos; ++ ++ bool small_page; ++ unsigned int addr_count0; ++ unsigned int addr_count1; ++ ++ u8 *buf; ++ dma_addr_t buf_dma; ++ unsigned int buf_size; ++ int buf_index; ++ ++ bool read_id; ++ ++ int erase1_page_addr; ++ ++ int rndout_page_addr; ++ int rndout_read_cmd; ++ ++ int seqin_page_addr; ++ int seqin_column; ++ int seqin_read_cmd; ++}; ++ ++static void ar934x_nfc_restart(struct ar934x_nfc *nfc); ++ ++static inline bool ++is_all_ff(u8 *buf, int len) ++{ ++ while (len--) ++ if (buf[len] != 0xff) ++ return false; ++ ++ return true; ++} ++ ++static inline void ++ar934x_nfc_wr(struct ar934x_nfc *nfc, unsigned reg, u32 val) ++{ ++ __raw_writel(val, nfc->base + reg); ++} ++ ++static inline u32 ++ar934x_nfc_rr(struct ar934x_nfc *nfc, unsigned reg) ++{ ++ return __raw_readl(nfc->base + reg); ++} ++ ++static inline struct ar934x_nfc_platform_data * ++ar934x_nfc_get_platform_data(struct ar934x_nfc *nfc) ++{ ++ return nfc->parent->platform_data; ++} ++ ++static inline struct ++ar934x_nfc *mtd_to_ar934x_nfc(struct mtd_info *mtd) ++{ ++ return container_of(mtd, struct ar934x_nfc, mtd); ++} ++ ++static inline bool ar934x_nfc_use_irq(struct ar934x_nfc *nfc) ++{ ++ return AR934X_NFC_USE_IRQ; ++} ++ ++static inline void ar934x_nfc_write_cmd_reg(struct ar934x_nfc *nfc, u32 cmd_reg) ++{ ++ wmb(); ++ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CMD, cmd_reg); ++ /* flush write */ ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_CMD); ++} ++ ++static bool ++__ar934x_nfc_dev_ready(struct ar934x_nfc *nfc) ++{ ++ u32 status; ++ ++ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_STATUS); ++ return (status & 0xff) == 0xff; ++} ++ ++static inline bool ++__ar934x_nfc_is_dma_ready(struct ar934x_nfc *nfc) ++{ ++ u32 status; ++ ++ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_DMA_CTRL); ++ return (status & AR934X_NFC_DMA_CTRL_DMA_READY) != 0; ++} ++ ++static int ++ar934x_nfc_wait_dev_ready(struct ar934x_nfc *nfc) ++{ ++ unsigned long timeout; ++ ++ timeout = jiffies + msecs_to_jiffies(AR934X_NFC_DEV_READY_TIMEOUT); ++ do { ++ if (__ar934x_nfc_dev_ready(nfc)) ++ return 0; ++ } while time_before(jiffies, timeout); ++ ++ nfc_dbg(nfc, "timeout waiting for device ready, status:%08x int:%08x\n", ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_STATUS), ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS)); ++ return -ETIMEDOUT; ++} ++ ++static int ++ar934x_nfc_wait_dma_ready(struct ar934x_nfc *nfc) ++{ ++ unsigned long timeout; ++ ++ timeout = jiffies + msecs_to_jiffies(AR934X_NFC_DMA_READY_TIMEOUT); ++ do { ++ if (__ar934x_nfc_is_dma_ready(nfc)) ++ return 0; ++ } while time_before(jiffies, timeout); ++ ++ nfc_dbg(nfc, "timeout waiting for DMA ready, dma_ctrl:%08x\n", ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_DMA_CTRL)); ++ return -ETIMEDOUT; ++} ++ ++static int ++ar934x_nfc_wait_irq(struct ar934x_nfc *nfc) ++{ ++ long timeout; ++ int ret; ++ ++ timeout = wait_event_timeout(nfc->irq_waitq, ++ (nfc->irq_status & AR934X_NFC_IRQ_MASK) != 0, ++ msecs_to_jiffies(AR934X_NFC_DEV_READY_TIMEOUT)); ++ ++ ret = 0; ++ if (!timeout) { ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_MASK, 0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); ++ /* flush write */ ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); ++ ++ nfc_dbg(nfc, ++ "timeout waiting for interrupt, status:%08x\n", ++ nfc->irq_status); ++ ret = -ETIMEDOUT; ++ } ++ ++ nfc->irq_status = 0; ++ return ret; ++} ++ ++static int ++ar934x_nfc_wait_done(struct ar934x_nfc *nfc) ++{ ++ int ret; ++ ++ if (ar934x_nfc_use_irq(nfc)) ++ ret = ar934x_nfc_wait_irq(nfc); ++ else ++ ret = ar934x_nfc_wait_dev_ready(nfc); ++ ++ if (ret) ++ return ret; ++ ++ return ar934x_nfc_wait_dma_ready(nfc); ++} ++ ++static int ++ar934x_nfc_alloc_buf(struct ar934x_nfc *nfc, unsigned size) ++{ ++ nfc->buf = dma_alloc_coherent(nfc->parent, size, ++ &nfc->buf_dma, GFP_KERNEL); ++ if (nfc->buf == NULL) { ++ dev_err(nfc->parent, "no memory for DMA buffer\n"); ++ return -ENOMEM; ++ } ++ ++ nfc->buf_size = size; ++ nfc_dbg(nfc, "buf:%p size:%u\n", nfc->buf, nfc->buf_size); ++ ++ return 0; ++} ++ ++static void ++ar934x_nfc_free_buf(struct ar934x_nfc *nfc) ++{ ++ dma_free_coherent(nfc->parent, nfc->buf_size, nfc->buf, nfc->buf_dma); ++} ++ ++static void ++ar934x_nfc_get_addr(struct ar934x_nfc *nfc, int column, int page_addr, ++ u32 *addr0, u32 *addr1) ++{ ++ u32 a0, a1; ++ ++ a0 = 0; ++ a1 = 0; ++ ++ if (column == -1) { ++ /* ERASE1 */ ++ a0 = (page_addr & 0xffff) << 16; ++ a1 = (page_addr >> 16) & 0xf; ++ } else if (page_addr != -1) { ++ /* SEQIN, READ0, etc.. */ ++ ++ /* TODO: handle 16bit bus width */ ++ if (nfc->small_page) { ++ a0 = column & 0xff; ++ a0 |= (page_addr & 0xff) << 8; ++ a0 |= ((page_addr >> 8) & 0xff) << 16; ++ a0 |= ((page_addr >> 16) & 0xff) << 24; ++ } else { ++ a0 = column & 0x0FFF; ++ a0 |= (page_addr & 0xffff) << 16; ++ ++ if (nfc->addr_count0 > 4) ++ a1 = (page_addr >> 16) & 0xf; ++ } ++ } ++ ++ *addr0 = a0; ++ *addr1 = a1; ++} ++ ++static void ++ar934x_nfc_send_cmd(struct ar934x_nfc *nfc, unsigned command) ++{ ++ u32 cmd_reg; ++ ++ cmd_reg = AR934X_NFC_CMD_INPUT_SEL_SIU | AR934X_NFC_CMD_ADDR_SEL_0 | ++ AR934X_NFC_CMD_SEQ_1C; ++ cmd_reg |= (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; ++ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); ++ ++ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); ++ ar934x_nfc_wait_dev_ready(nfc); ++} ++ ++static int ++ar934x_nfc_do_rw_command(struct ar934x_nfc *nfc, int column, int page_addr, ++ int len, u32 cmd_reg, u32 ctrl_reg, bool write) ++{ ++ u32 addr0, addr1; ++ u32 dma_ctrl; ++ int dir; ++ int err; ++ int retries = 0; ++ ++ WARN_ON(len & 3); ++ ++ if (WARN_ON(len > nfc->buf_size)) ++ dev_err(nfc->parent, "len=%d > buf_size=%d", len, nfc->buf_size); ++ ++ if (write) { ++ dma_ctrl = AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE; ++ dir = DMA_TO_DEVICE; ++ } else { ++ dma_ctrl = AR934X_NFC_DMA_CTRL_DMA_DIR_READ; ++ dir = DMA_FROM_DEVICE; ++ } ++ ++ ar934x_nfc_get_addr(nfc, column, page_addr, &addr0, &addr1); ++ ++ dma_ctrl |= AR934X_NFC_DMA_CTRL_DMA_START | ++ (AR934X_NFC_DMA_CTRL_DMA_BURST_3 << ++ AR934X_NFC_DMA_CTRL_DMA_BURST_S); ++ ++ cmd_reg |= AR934X_NFC_CMD_INPUT_SEL_DMA | AR934X_NFC_CMD_ADDR_SEL_0; ++ ctrl_reg |= AR934X_NFC_CTRL_INT_EN; ++ ++ nfc_dbg(nfc, "%s a0:%08x a1:%08x len:%x cmd:%08x dma:%08x ctrl:%08x\n", ++ (write) ? "write" : "read", ++ addr0, addr1, len, cmd_reg, dma_ctrl, ctrl_reg); ++ ++retry: ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_0, addr0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_1, addr1); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_ADDR, nfc->buf_dma); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_COUNT, len); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DATA_SIZE, len); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, ctrl_reg); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_CTRL, dma_ctrl); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ECC_CTRL, nfc->ecc_ctrl_reg); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ECC_OFFSET, nfc->ecc_offset_reg); ++ ++ if (ar934x_nfc_use_irq(nfc)) { ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_MASK, AR934X_NFC_IRQ_MASK); ++ /* flush write */ ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_MASK); ++ } ++ ++ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); ++ err = ar934x_nfc_wait_done(nfc); ++ if (err) { ++ dev_dbg(nfc->parent, "%s operation stuck at page %d\n", ++ (write) ? "write" : "read", page_addr); ++ ++ ar934x_nfc_restart(nfc); ++ if (retries++ < AR934X_NFC_DMA_RETRIES) ++ goto retry; ++ ++ dev_err(nfc->parent, "%s operation failed on page %d\n", ++ (write) ? "write" : "read", page_addr); ++ } ++ ++ return err; ++} ++ ++static int ++ar934x_nfc_send_readid(struct ar934x_nfc *nfc, unsigned command) ++{ ++ u32 cmd_reg; ++ int err; ++ ++ nfc_dbg(nfc, "readid, cmd:%02x\n", command); ++ ++ cmd_reg = AR934X_NFC_CMD_SEQ_1C1AXR; ++ cmd_reg |= (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; ++ ++ err = ar934x_nfc_do_rw_command(nfc, -1, -1, AR934X_NFC_ID_BUF_SIZE, ++ cmd_reg, nfc->ctrl_reg, false); ++ ++ nfc_debug_data("[id] ", nfc->buf, AR934X_NFC_ID_BUF_SIZE); ++ ++ return err; ++} ++ ++static int ++ar934x_nfc_send_read(struct ar934x_nfc *nfc, unsigned command, int column, ++ int page_addr, int len) ++{ ++ u32 cmd_reg; ++ int err; ++ ++ nfc_dbg(nfc, "read, column=%d page=%d len=%d\n", ++ column, page_addr, len); ++ ++ cmd_reg = (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; ++ ++ if (nfc->small_page) { ++ cmd_reg |= AR934X_NFC_CMD_SEQ_18; ++ } else { ++ cmd_reg |= NAND_CMD_READSTART << AR934X_NFC_CMD_CMD1_S; ++ cmd_reg |= AR934X_NFC_CMD_SEQ_1C5A1CXR; ++ } ++ ++ err = ar934x_nfc_do_rw_command(nfc, column, page_addr, len, ++ cmd_reg, nfc->ctrl_reg, false); ++ ++ nfc_debug_data("[data] ", nfc->buf, len); ++ ++ return err; ++} ++ ++static void ++ar934x_nfc_send_erase(struct ar934x_nfc *nfc, unsigned command, int column, ++ int page_addr) ++{ ++ u32 addr0, addr1; ++ u32 ctrl_reg; ++ u32 cmd_reg; ++ ++ ar934x_nfc_get_addr(nfc, column, page_addr, &addr0, &addr1); ++ ++ ctrl_reg = nfc->ctrl_reg; ++ if (nfc->small_page) { ++ /* override number of address cycles for the erase command */ ++ ctrl_reg &= ~(AR934X_NFC_CTRL_ADDR_CYCLE0_M << ++ AR934X_NFC_CTRL_ADDR_CYCLE0_S); ++ ctrl_reg &= ~(AR934X_NFC_CTRL_ADDR_CYCLE1_M << ++ AR934X_NFC_CTRL_ADDR_CYCLE1_S); ++ ctrl_reg &= ~(AR934X_NFC_CTRL_SMALL_PAGE); ++ ctrl_reg |= (nfc->addr_count0 + 1) << ++ AR934X_NFC_CTRL_ADDR_CYCLE0_S; ++ } ++ ++ cmd_reg = NAND_CMD_ERASE1 << AR934X_NFC_CMD_CMD0_S; ++ cmd_reg |= command << AR934X_NFC_CMD_CMD1_S; ++ cmd_reg |= AR934X_NFC_CMD_SEQ_ERASE; ++ ++ nfc_dbg(nfc, "erase page %d, a0:%08x a1:%08x cmd:%08x ctrl:%08x\n", ++ page_addr, addr0, addr1, cmd_reg, ctrl_reg); ++ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, ctrl_reg); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_0, addr0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_1, addr1); ++ ++ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); ++ ar934x_nfc_wait_dev_ready(nfc); ++} ++ ++static int ++ar934x_nfc_send_write(struct ar934x_nfc *nfc, unsigned command, int column, ++ int page_addr, int len) ++{ ++ u32 cmd_reg; ++ ++ nfc_dbg(nfc, "write, column=%d page=%d len=%d\n", ++ column, page_addr, len); ++ ++ nfc_debug_data("[data] ", nfc->buf, len); ++ ++ cmd_reg = NAND_CMD_SEQIN << AR934X_NFC_CMD_CMD0_S; ++ cmd_reg |= command << AR934X_NFC_CMD_CMD1_S; ++ cmd_reg |= AR934X_NFC_CMD_SEQ_12; ++ ++ return ar934x_nfc_do_rw_command(nfc, column, page_addr, len, ++ cmd_reg, nfc->ctrl_reg, true); ++} ++ ++static void ++ar934x_nfc_read_status(struct ar934x_nfc *nfc) ++{ ++ u32 cmd_reg; ++ u32 status; ++ ++ cmd_reg = NAND_CMD_STATUS << AR934X_NFC_CMD_CMD0_S; ++ cmd_reg |= AR934X_NFC_CMD_SEQ_S; ++ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); ++ ++ ar934x_nfc_write_cmd_reg(nfc, cmd_reg); ++ ar934x_nfc_wait_dev_ready(nfc); ++ ++ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_READ_STATUS); ++ ++ nfc_dbg(nfc, "read status, cmd:%08x status:%02x\n", ++ cmd_reg, (status & 0xff)); ++ ++ if (nfc->swap_dma) ++ nfc->buf[0 ^ 3] = status; ++ else ++ nfc->buf[0] = status; ++} ++ ++static void ++ar934x_nfc_cmdfunc(struct mtd_info *mtd, unsigned int command, int column, ++ int page_addr) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ struct nand_chip *nand = mtd->priv; ++ ++ nfc->read_id = false; ++ if (command != NAND_CMD_PAGEPROG) ++ nfc->buf_index = 0; ++ ++ switch (command) { ++ case NAND_CMD_RESET: ++ ar934x_nfc_send_cmd(nfc, command); ++ break; ++ ++ case NAND_CMD_READID: ++ nfc->read_id = true; ++ ar934x_nfc_send_readid(nfc, command); ++ break; ++ ++ case NAND_CMD_READ0: ++ case NAND_CMD_READ1: ++ if (nfc->small_page) { ++ ar934x_nfc_send_read(nfc, command, column, page_addr, ++ mtd->writesize + mtd->oobsize); ++ } else { ++ ar934x_nfc_send_read(nfc, command, 0, page_addr, ++ mtd->writesize + mtd->oobsize); ++ nfc->buf_index = column; ++ nfc->rndout_page_addr = page_addr; ++ nfc->rndout_read_cmd = command; ++ } ++ break; ++ ++ case NAND_CMD_READOOB: ++ if (nfc->small_page) ++ ar934x_nfc_send_read(nfc, NAND_CMD_READOOB, ++ column, page_addr, ++ mtd->oobsize); ++ else ++ ar934x_nfc_send_read(nfc, NAND_CMD_READ0, ++ mtd->writesize, page_addr, ++ mtd->oobsize); ++ break; ++ ++ case NAND_CMD_RNDOUT: ++ if (WARN_ON(nfc->small_page)) ++ break; ++ ++ /* emulate subpage read */ ++ ar934x_nfc_send_read(nfc, nfc->rndout_read_cmd, 0, ++ nfc->rndout_page_addr, ++ mtd->writesize + mtd->oobsize); ++ nfc->buf_index = column; ++ break; ++ ++ case NAND_CMD_ERASE1: ++ nfc->erase1_page_addr = page_addr; ++ break; ++ ++ case NAND_CMD_ERASE2: ++ ar934x_nfc_send_erase(nfc, command, -1, nfc->erase1_page_addr); ++ break; ++ ++ case NAND_CMD_STATUS: ++ ar934x_nfc_read_status(nfc); ++ break; ++ ++ case NAND_CMD_SEQIN: ++ if (nfc->small_page) { ++ /* output read command */ ++ if (column >= mtd->writesize) { ++ column -= mtd->writesize; ++ nfc->seqin_read_cmd = NAND_CMD_READOOB; ++ } else if (column < 256) { ++ nfc->seqin_read_cmd = NAND_CMD_READ0; ++ } else { ++ column -= 256; ++ nfc->seqin_read_cmd = NAND_CMD_READ1; ++ } ++ } else { ++ nfc->seqin_read_cmd = NAND_CMD_READ0; ++ } ++ nfc->seqin_column = column; ++ nfc->seqin_page_addr = page_addr; ++ break; ++ ++ case NAND_CMD_PAGEPROG: ++ if (nand->ecc.mode == NAND_ECC_HW) { ++ /* the data is already written */ ++ break; ++ } ++ ++ if (nfc->small_page) ++ ar934x_nfc_send_cmd(nfc, nfc->seqin_read_cmd); ++ ++ ar934x_nfc_send_write(nfc, command, nfc->seqin_column, ++ nfc->seqin_page_addr, ++ nfc->buf_index); ++ break; ++ ++ default: ++ dev_err(nfc->parent, ++ "unsupported command: %x, column:%d page_addr=%d\n", ++ command, column, page_addr); ++ break; ++ } ++} ++ ++static int ++ar934x_nfc_dev_ready(struct mtd_info *mtd) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ ++ return __ar934x_nfc_dev_ready(nfc); ++} ++ ++static void ++ar934x_nfc_select_chip(struct mtd_info *mtd, int chip_no) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ ++ if (nfc->select_chip) ++ nfc->select_chip(chip_no); ++} ++ ++static u8 ++ar934x_nfc_read_byte(struct mtd_info *mtd) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ u8 data; ++ ++ WARN_ON(nfc->buf_index >= nfc->buf_size); ++ ++ if (nfc->swap_dma || nfc->read_id) ++ data = nfc->buf[nfc->buf_index ^ 3]; ++ else ++ data = nfc->buf[nfc->buf_index]; ++ ++ nfc->buf_index++; ++ ++ return data; ++} ++ ++static void ++ar934x_nfc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ int i; ++ ++ WARN_ON(nfc->buf_index + len > nfc->buf_size); ++ ++ if (nfc->swap_dma) { ++ for (i = 0; i < len; i++) { ++ nfc->buf[nfc->buf_index ^ 3] = buf[i]; ++ nfc->buf_index++; ++ } ++ } else { ++ for (i = 0; i < len; i++) { ++ nfc->buf[nfc->buf_index] = buf[i]; ++ nfc->buf_index++; ++ } ++ } ++} ++ ++static void ++ar934x_nfc_read_buf(struct mtd_info *mtd, u8 *buf, int len) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ int buf_index; ++ int i; ++ ++ WARN_ON(nfc->buf_index + len > nfc->buf_size); ++ ++ buf_index = nfc->buf_index; ++ ++ if (nfc->swap_dma || nfc->read_id) { ++ for (i = 0; i < len; i++) { ++ buf[i] = nfc->buf[buf_index ^ 3]; ++ buf_index++; ++ } ++ } else { ++ for (i = 0; i < len; i++) { ++ buf[i] = nfc->buf[buf_index]; ++ buf_index++; ++ } ++ } ++ ++ nfc->buf_index = buf_index; ++} ++ ++static inline void ++ar934x_nfc_enable_hwecc(struct ar934x_nfc *nfc) ++{ ++ nfc->ctrl_reg |= AR934X_NFC_CTRL_ECC_EN; ++ nfc->ctrl_reg &= ~AR934X_NFC_CTRL_CUSTOM_SIZE_EN; ++} ++ ++static inline void ++ar934x_nfc_disable_hwecc(struct ar934x_nfc *nfc) ++{ ++ nfc->ctrl_reg &= ~AR934X_NFC_CTRL_ECC_EN; ++ nfc->ctrl_reg |= AR934X_NFC_CTRL_CUSTOM_SIZE_EN; ++} ++ ++static int ++ar934x_nfc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, ++ int page) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ int err; ++ ++ nfc_dbg(nfc, "read_oob: page:%d\n", page); ++ ++ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, mtd->writesize, page, ++ mtd->oobsize); ++ if (err) ++ return err; ++ ++ memcpy(chip->oob_poi, nfc->buf, mtd->oobsize); ++ ++ return 0; ++} ++ ++static int ++ar934x_nfc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, ++ int page) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ ++ nfc_dbg(nfc, "write_oob: page:%d\n", page); ++ ++ memcpy(nfc->buf, chip->oob_poi, mtd->oobsize); ++ ++ return ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, mtd->writesize, ++ page, mtd->oobsize); ++} ++ ++static int ++ar934x_nfc_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, ++ u8 *buf, int oob_required, int page) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ int len; ++ int err; ++ ++ nfc_dbg(nfc, "read_page_raw: page:%d oob:%d\n", page, oob_required); ++ ++ len = mtd->writesize; ++ if (oob_required) ++ len += mtd->oobsize; ++ ++ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, 0, page, len); ++ if (err) ++ return err; ++ ++ memcpy(buf, nfc->buf, mtd->writesize); ++ ++ if (oob_required) ++ memcpy(chip->oob_poi, &nfc->buf[mtd->writesize], mtd->oobsize); ++ ++ return 0; ++} ++ ++static int ++ar934x_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip, ++ u8 *buf, int oob_required, int page) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ u32 ecc_ctrl; ++ int max_bitflips = 0; ++ bool ecc_failed; ++ bool ecc_corrected; ++ int err; ++ ++ nfc_dbg(nfc, "read_page: page:%d oob:%d\n", page, oob_required); ++ ++ ar934x_nfc_enable_hwecc(nfc); ++ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, 0, page, ++ mtd->writesize); ++ ar934x_nfc_disable_hwecc(nfc); ++ ++ if (err) ++ return err; ++ ++ /* TODO: optimize to avoid memcpy */ ++ memcpy(buf, nfc->buf, mtd->writesize); ++ ++ /* read the ECC status */ ++ ecc_ctrl = ar934x_nfc_rr(nfc, AR934X_NFC_REG_ECC_CTRL); ++ ecc_failed = ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_UNCORRECT; ++ ecc_corrected = ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_CORRECT; ++ ++ if (oob_required || ecc_failed) { ++ err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, mtd->writesize, ++ page, mtd->oobsize); ++ if (err) ++ return err; ++ ++ if (oob_required) ++ memcpy(chip->oob_poi, nfc->buf, mtd->oobsize); ++ } ++ ++ if (ecc_failed) { ++ /* ++ * The hardware ECC engine reports uncorrectable errors ++ * on empty pages. Check the ECC bytes and the data. If ++ * both contains 0xff bytes only, dont report a failure. ++ * ++ * TODO: prebuild a buffer with 0xff bytes and use memcmp ++ * for better performance? ++ */ ++ if (!is_all_ff(&nfc->buf[nfc->ecc_oob_pos], chip->ecc.total) || ++ !is_all_ff(buf, mtd->writesize)) ++ mtd->ecc_stats.failed++; ++ } else if (ecc_corrected) { ++ /* ++ * The hardware does not report the exact count of the ++ * corrected bitflips, use assumptions based on the ++ * threshold. ++ */ ++ if (ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_OVER) { ++ /* ++ * The number of corrected bitflips exceeds the ++ * threshold. Assume the maximum. ++ */ ++ max_bitflips = chip->ecc.strength * chip->ecc.steps; ++ } else { ++ max_bitflips = nfc->ecc_thres * chip->ecc.steps; ++ } ++ ++ mtd->ecc_stats.corrected += max_bitflips; ++ } ++ ++ return max_bitflips; ++} ++ ++static int ++ar934x_nfc_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, ++ const u8 *buf, int oob_required) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ int page; ++ int len; ++ ++ page = nfc->seqin_page_addr; ++ ++ nfc_dbg(nfc, "write_page_raw: page:%d oob:%d\n", page, oob_required); ++ ++ memcpy(nfc->buf, buf, mtd->writesize); ++ len = mtd->writesize; ++ ++ if (oob_required) { ++ memcpy(&nfc->buf[mtd->writesize], chip->oob_poi, mtd->oobsize); ++ len += mtd->oobsize; ++ } ++ ++ return ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, 0, page, len); ++} ++ ++static int ++ar934x_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip, ++ const u8 *buf, int oob_required) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ int page; ++ int err; ++ ++ page = nfc->seqin_page_addr; ++ ++ nfc_dbg(nfc, "write_page: page:%d oob:%d\n", page, oob_required); ++ ++ /* write OOB first */ ++ if (oob_required && ++ !is_all_ff(chip->oob_poi, mtd->oobsize)) { ++ err = ar934x_nfc_write_oob(mtd, chip, page); ++ if (err) ++ return err; ++ } ++ ++ /* TODO: optimize to avoid memcopy */ ++ memcpy(nfc->buf, buf, mtd->writesize); ++ ++ ar934x_nfc_enable_hwecc(nfc); ++ err = ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, 0, page, ++ mtd->writesize); ++ ar934x_nfc_disable_hwecc(nfc); ++ ++ return err; ++} ++ ++static void ++ar934x_nfc_hw_init(struct ar934x_nfc *nfc) ++{ ++ struct ar934x_nfc_platform_data *pdata; ++ ++ pdata = ar934x_nfc_get_platform_data(nfc); ++ if (pdata->hw_reset) { ++ pdata->hw_reset(true); ++ pdata->hw_reset(false); ++ } ++ ++ /* ++ * setup timings ++ * TODO: make it configurable via platform data ++ */ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIME_SEQ, ++ AR934X_NFC_TIME_SEQ_DEFAULT); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIMINGS_ASYN, ++ AR934X_NFC_TIMINGS_ASYN_DEFAULT); ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIMINGS_SYN, ++ AR934X_NFC_TIMINGS_SYN_DEFAULT); ++ ++ /* disable WP on all chips, and select chip 0 */ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_MEM_CTRL, 0xff00); ++ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_ADDR_OFFS, 0); ++ ++ /* initialize Control register */ ++ nfc->ctrl_reg = AR934X_NFC_CTRL_CUSTOM_SIZE_EN; ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); ++ ++ if (nfc->small_page) { ++ /* Setup generic sequence register for small page reads. */ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_GEN_SEQ_CTRL, ++ AR934X_NFC_GENSEQ_SMALL_PAGE_READ); ++ } ++} ++ ++static void ++ar934x_nfc_restart(struct ar934x_nfc *nfc) ++{ ++ u32 ctrl_reg; ++ ++ if (nfc->select_chip) ++ nfc->select_chip(-1); ++ ++ ctrl_reg = nfc->ctrl_reg; ++ ar934x_nfc_hw_init(nfc); ++ nfc->ctrl_reg = ctrl_reg; ++ ++ if (nfc->select_chip) ++ nfc->select_chip(0); ++ ++ ar934x_nfc_send_cmd(nfc, NAND_CMD_RESET); ++} ++ ++static irqreturn_t ++ar934x_nfc_irq_handler(int irq, void *data) ++{ ++ struct ar934x_nfc *nfc = data; ++ u32 status; ++ ++ status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); ++ ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); ++ /* flush write */ ++ ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); ++ ++ status &= ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_MASK); ++ if (status) { ++ nfc_dbg(nfc, "got IRQ, status:%08x\n", status); ++ ++ nfc->irq_status = status; ++ nfc->spurious_irq_expected = true; ++ wake_up(&nfc->irq_waitq); ++ } else { ++ if (nfc->spurious_irq_expected) { ++ nfc->spurious_irq_expected = false; ++ } else { ++ dev_warn(nfc->parent, "spurious interrupt\n"); ++ } ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int ++ar934x_nfc_init_tail(struct mtd_info *mtd) ++{ ++ struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); ++ struct nand_chip *chip = &nfc->nand_chip; ++ u32 ctrl; ++ u32 t; ++ int err; ++ ++ switch (mtd->oobsize) { ++ case 16: ++ case 64: ++ case 128: ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_SPARE_SIZE, mtd->oobsize); ++ break; ++ ++ default: ++ dev_err(nfc->parent, "unsupported OOB size: %d bytes\n", ++ mtd->oobsize); ++ return -ENXIO; ++ } ++ ++ ctrl = AR934X_NFC_CTRL_CUSTOM_SIZE_EN; ++ ++ switch (mtd->erasesize / mtd->writesize) { ++ case 32: ++ t = AR934X_NFC_CTRL_BLOCK_SIZE_32; ++ break; ++ ++ case 64: ++ t = AR934X_NFC_CTRL_BLOCK_SIZE_64; ++ break; ++ ++ case 128: ++ t = AR934X_NFC_CTRL_BLOCK_SIZE_128; ++ break; ++ ++ case 256: ++ t = AR934X_NFC_CTRL_BLOCK_SIZE_256; ++ break; ++ ++ default: ++ dev_err(nfc->parent, "unsupported block size: %u\n", ++ mtd->erasesize / mtd->writesize); ++ return -ENXIO; ++ } ++ ++ ctrl |= t << AR934X_NFC_CTRL_BLOCK_SIZE_S; ++ ++ switch (mtd->writesize) { ++ case 256: ++ nfc->small_page = 1; ++ t = AR934X_NFC_CTRL_PAGE_SIZE_256; ++ break; ++ ++ case 512: ++ nfc->small_page = 1; ++ t = AR934X_NFC_CTRL_PAGE_SIZE_512; ++ break; ++ ++ case 1024: ++ t = AR934X_NFC_CTRL_PAGE_SIZE_1024; ++ break; ++ ++ case 2048: ++ t = AR934X_NFC_CTRL_PAGE_SIZE_2048; ++ break; ++ ++ case 4096: ++ t = AR934X_NFC_CTRL_PAGE_SIZE_4096; ++ break; ++ ++ case 8192: ++ t = AR934X_NFC_CTRL_PAGE_SIZE_8192; ++ break; ++ ++ case 16384: ++ t = AR934X_NFC_CTRL_PAGE_SIZE_16384; ++ break; ++ ++ default: ++ dev_err(nfc->parent, "unsupported write size: %d bytes\n", ++ mtd->writesize); ++ return -ENXIO; ++ } ++ ++ ctrl |= t << AR934X_NFC_CTRL_PAGE_SIZE_S; ++ ++ if (nfc->small_page) { ++ ctrl |= AR934X_NFC_CTRL_SMALL_PAGE; ++ ++ if (chip->chipsize > (32 << 20)) { ++ nfc->addr_count0 = 4; ++ nfc->addr_count1 = 3; ++ } else if (chip->chipsize > (2 << 16)) { ++ nfc->addr_count0 = 3; ++ nfc->addr_count1 = 2; ++ } else { ++ nfc->addr_count0 = 2; ++ nfc->addr_count1 = 1; ++ } ++ } else { ++ if (chip->chipsize > (128 << 20)) { ++ nfc->addr_count0 = 5; ++ nfc->addr_count1 = 3; ++ } else if (chip->chipsize > (8 << 16)) { ++ nfc->addr_count0 = 4; ++ nfc->addr_count1 = 2; ++ } else { ++ nfc->addr_count0 = 3; ++ nfc->addr_count1 = 1; ++ } ++ } ++ ++ ctrl |= nfc->addr_count0 << AR934X_NFC_CTRL_ADDR_CYCLE0_S; ++ ctrl |= nfc->addr_count1 << AR934X_NFC_CTRL_ADDR_CYCLE1_S; ++ ++ nfc->ctrl_reg = ctrl; ++ ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); ++ ++ ar934x_nfc_free_buf(nfc); ++ err = ar934x_nfc_alloc_buf(nfc, mtd->writesize + mtd->oobsize); ++ ++ return err; ++} ++ ++static struct nand_ecclayout ar934x_nfc_oob_64_hwecc = { ++ .eccbytes = 28, ++ .eccpos = { ++ 20, 21, 22, 23, 24, 25, 26, ++ 27, 28, 29, 30, 31, 32, 33, ++ 34, 35, 36, 37, 38, 39, 40, ++ 41, 42, 43, 44, 45, 46, 47, ++ }, ++ .oobfree = { ++ { ++ .offset = 4, ++ .length = 16, ++ }, ++ { ++ .offset = 48, ++ .length = 16, ++ }, ++ }, ++}; ++ ++static int ++ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand_chip; ++ u32 ecc_cap; ++ u32 ecc_thres; ++ ++ if (!config_enabled(CONFIG_MTD_NAND_AR934X_HW_ECC)) { ++ dev_err(nfc->parent, "hardware ECC support is disabled\n"); ++ return -EINVAL; ++ } ++ ++ switch (nfc->mtd.writesize) { ++ case 2048: ++ /* ++ * Writing a subpage separately is not supported, because ++ * the controller only does ECC on full-page accesses. ++ */ ++ nand->options = NAND_NO_SUBPAGE_WRITE; ++ ++ nand->ecc.size = 512; ++ nand->ecc.bytes = 7; ++ nand->ecc.strength = 4; ++ nand->ecc.layout = &ar934x_nfc_oob_64_hwecc; ++ break; ++ ++ default: ++ dev_err(nfc->parent, ++ "hardware ECC is not available for %d byte pages\n", ++ nfc->mtd.writesize); ++ return -EINVAL; ++ } ++ ++ BUG_ON(!nand->ecc.layout); ++ ++ switch (nand->ecc.strength) { ++ case 4: ++ ecc_cap = AR934X_NFC_ECC_CTRL_ECC_CAP_4; ++ ecc_thres = 4; ++ break; ++ ++ default: ++ dev_err(nfc->parent, "unsupported ECC strength %u\n", ++ nand->ecc.strength); ++ return -EINVAL; ++ } ++ ++ nfc->ecc_thres = ecc_thres; ++ nfc->ecc_oob_pos = nand->ecc.layout->eccpos[0]; ++ ++ nfc->ecc_ctrl_reg = ecc_cap << AR934X_NFC_ECC_CTRL_ECC_CAP_S; ++ nfc->ecc_ctrl_reg |= ecc_thres << AR934X_NFC_ECC_CTRL_ERR_THRES_S; ++ ++ nfc->ecc_offset_reg = nfc->mtd.writesize + nfc->ecc_oob_pos; ++ ++ nand->ecc.mode = NAND_ECC_HW; ++ nand->ecc.read_page = ar934x_nfc_read_page; ++ nand->ecc.read_page_raw = ar934x_nfc_read_page_raw; ++ nand->ecc.write_page = ar934x_nfc_write_page; ++ nand->ecc.write_page_raw = ar934x_nfc_write_page_raw; ++ nand->ecc.read_oob = ar934x_nfc_read_oob; ++ nand->ecc.write_oob = ar934x_nfc_write_oob; ++ ++ return 0; ++} ++ ++static int ++ar934x_nfc_probe(struct platform_device *pdev) ++{ ++ static const char *part_probes[] = { "cmdlinepart", NULL, }; ++ struct ar934x_nfc_platform_data *pdata; ++ struct ar934x_nfc *nfc; ++ struct resource *res; ++ struct mtd_info *mtd; ++ struct nand_chip *nand; ++ struct mtd_part_parser_data ppdata; ++ int ret; ++ ++ pdata = pdev->dev.platform_data; ++ if (pdata == NULL) { ++ dev_err(&pdev->dev, "no platform data defined\n"); ++ return -EINVAL; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "failed to get I/O memory\n"); ++ return -EINVAL; ++ } ++ ++ nfc = devm_kzalloc(&pdev->dev, sizeof(struct ar934x_nfc), GFP_KERNEL); ++ if (!nfc) { ++ dev_err(&pdev->dev, "failed to allocate driver data\n"); ++ return -ENOMEM; ++ } ++ ++ nfc->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(nfc->base)) { ++ dev_err(&pdev->dev, "failed to remap I/O memory\n"); ++ return PTR_ERR(nfc->base); ++ } ++ ++ nfc->irq = platform_get_irq(pdev, 0); ++ if (nfc->irq < 0) { ++ dev_err(&pdev->dev, "no IRQ resource specified\n"); ++ return -EINVAL; ++ } ++ ++ init_waitqueue_head(&nfc->irq_waitq); ++ ret = request_irq(nfc->irq, ar934x_nfc_irq_handler, 0, ++ dev_name(&pdev->dev), nfc); ++ if (ret) { ++ dev_err(&pdev->dev, "requast_irq failed, err:%d\n", ret); ++ return ret; ++ } ++ ++ nfc->parent = &pdev->dev; ++ nfc->select_chip = pdata->select_chip; ++ nfc->swap_dma = pdata->swap_dma; ++ ++ nand = &nfc->nand_chip; ++ mtd = &nfc->mtd; ++ ++ mtd->priv = nand; ++ mtd->owner = THIS_MODULE; ++ if (pdata->name) ++ mtd->name = pdata->name; ++ else ++ mtd->name = dev_name(&pdev->dev); ++ ++ nand->chip_delay = 25; ++ ++ nand->dev_ready = ar934x_nfc_dev_ready; ++ nand->cmdfunc = ar934x_nfc_cmdfunc; ++ nand->read_byte = ar934x_nfc_read_byte; ++ nand->write_buf = ar934x_nfc_write_buf; ++ nand->read_buf = ar934x_nfc_read_buf; ++ nand->select_chip = ar934x_nfc_select_chip; ++ ++ ret = ar934x_nfc_alloc_buf(nfc, AR934X_NFC_ID_BUF_SIZE); ++ if (ret) ++ goto err_free_irq; ++ ++ platform_set_drvdata(pdev, nfc); ++ ++ ar934x_nfc_hw_init(nfc); ++ ++ ret = nand_scan_ident(mtd, 1, NULL); ++ if (ret) { ++ dev_err(&pdev->dev, "nand_scan_ident failed, err:%d\n", ret); ++ goto err_free_buf; ++ } ++ ++ ret = ar934x_nfc_init_tail(mtd); ++ if (ret) { ++ dev_err(&pdev->dev, "init tail failed, err:%d\n", ret); ++ goto err_free_buf; ++ } ++ ++ if (pdata->scan_fixup) { ++ ret = pdata->scan_fixup(mtd); ++ if (ret) ++ goto err_free_buf; ++ } ++ ++ switch (pdata->ecc_mode) { ++ case AR934X_NFC_ECC_SOFT: ++ nand->ecc.mode = NAND_ECC_SOFT; ++ break; ++ ++ case AR934X_NFC_ECC_SOFT_BCH: ++ nand->ecc.mode = NAND_ECC_SOFT_BCH; ++ break; ++ ++ case AR934X_NFC_ECC_HW: ++ ret = ar934x_nfc_setup_hwecc(nfc); ++ if (ret) ++ goto err_free_buf; ++ ++ break; ++ ++ default: ++ dev_err(nfc->parent, "unknown ECC mode %d\n", pdata->ecc_mode); ++ return -EINVAL; ++ } ++ ++ ret = nand_scan_tail(mtd); ++ if (ret) { ++ dev_err(&pdev->dev, "scan tail failed, err:%d\n", ret); ++ goto err_free_buf; ++ } ++ ++ memset(&ppdata, '\0', sizeof(ppdata)); ++ ret = mtd_device_parse_register(mtd, part_probes, &ppdata, ++ pdata->parts, pdata->nr_parts); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to register mtd, err:%d\n", ret); ++ goto err_free_buf; ++ } ++ ++ return 0; ++ ++err_free_buf: ++ ar934x_nfc_free_buf(nfc); ++err_free_irq: ++ free_irq(nfc->irq, nfc); ++ return ret; ++} ++ ++static int ++ar934x_nfc_remove(struct platform_device *pdev) ++{ ++ struct ar934x_nfc *nfc; ++ ++ nfc = platform_get_drvdata(pdev); ++ if (nfc) { ++ nand_release(&nfc->mtd); ++ ar934x_nfc_free_buf(nfc); ++ free_irq(nfc->irq, nfc); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver ar934x_nfc_driver = { ++ .probe = ar934x_nfc_probe, ++ .remove = ar934x_nfc_remove, ++ .driver = { ++ .name = AR934X_NFC_DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++module_platform_driver(ar934x_nfc_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_DESCRIPTION("Atheros AR934x NAND Flash Controller driver"); ++MODULE_ALIAS("platform:" AR934X_NFC_DRIVER_NAME); +diff -Nur linux-4.1.13.orig/drivers/mtd/nand/Kconfig linux-4.1.13/drivers/mtd/nand/Kconfig +--- linux-4.1.13.orig/drivers/mtd/nand/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/nand/Kconfig 2015-12-04 19:57:03.882110905 +0100 +@@ -530,4 +530,24 @@ + help + Enables support for NAND controller on Hisilicon SoC Hip04. + ++config MTD_NAND_RB4XX ++ tristate "NAND flash driver for RouterBoard 4xx series" ++ depends on MTD_NAND && ATH79_MACH_RB4XX ++ ++config MTD_NAND_RB750 ++ tristate "NAND flash driver for the RouterBoard 750" ++ depends on MTD_NAND && ATH79_MACH_RB750 ++ ++config MTD_NAND_RB91X ++ tristate "NAND flash driver for the RouterBOARD 91x series" ++ depends on MTD_NAND && ATH79_MACH_RB91X ++ ++config MTD_NAND_AR934X ++ tristate "NAND flash driver for the Qualcomm Atheros AR934x/QCA955x SoCs" ++ depends on (SOC_AR934X || SOC_QCA955X) ++ ++config MTD_NAND_AR934X_HW_ECC ++ bool "Hardware ECC support for the AR934X NAND Controller (EXPERIMENTAL)" ++ depends on MTD_NAND_AR934X ++ + endif # MTD_NAND +diff -Nur linux-4.1.13.orig/drivers/mtd/nand/Makefile linux-4.1.13/drivers/mtd/nand/Makefile +--- linux-4.1.13.orig/drivers/mtd/nand/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/nand/Makefile 2015-12-04 19:57:03.882110905 +0100 +@@ -13,6 +13,7 @@ + obj-$(CONFIG_MTD_NAND_DENALI) += denali.o + obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o + obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o ++obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nfc.o + obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o + obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o + obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o +@@ -32,6 +33,9 @@ + obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o + obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o + obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o ++obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o ++obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o ++obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o + obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o + obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o + obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o +diff -Nur linux-4.1.13.orig/drivers/mtd/nand/rb4xx_nand.c linux-4.1.13/drivers/mtd/nand/rb4xx_nand.c +--- linux-4.1.13.orig/drivers/mtd/nand/rb4xx_nand.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/nand/rb4xx_nand.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,305 @@ ++/* ++ * NAND flash driver for the MikroTik RouterBoard 4xx series ++ * ++ * Copyright (C) 2008-2011 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This file was based on the driver for Linux 2.6.22 published by ++ * MikroTik for their RouterBoard 4xx series devices. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define DRV_NAME "rb4xx-nand" ++#define DRV_VERSION "0.2.0" ++#define DRV_DESC "NAND flash driver for RouterBoard 4xx series" ++ ++#define RB4XX_NAND_GPIO_READY 5 ++#define RB4XX_NAND_GPIO_ALE 37 ++#define RB4XX_NAND_GPIO_CLE 38 ++#define RB4XX_NAND_GPIO_NCE 39 ++ ++struct rb4xx_nand_info { ++ struct nand_chip chip; ++ struct mtd_info mtd; ++}; ++ ++/* ++ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader ++ * will not be able to find the kernel that we load. ++ */ ++static struct nand_ecclayout rb4xx_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static struct mtd_partition rb4xx_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, ++ { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, ++ { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static int rb4xx_nand_dev_ready(struct mtd_info *mtd) ++{ ++ return gpio_get_value_cansleep(RB4XX_NAND_GPIO_READY); ++} ++ ++static void rb4xx_nand_write_cmd(unsigned char cmd) ++{ ++ unsigned char data = cmd; ++ int err; ++ ++ err = rb4xx_cpld_write(&data, 1); ++ if (err) ++ pr_err("rb4xx_nand: write cmd failed, err=%d\n", err); ++} ++ ++static void rb4xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, ++ unsigned int ctrl) ++{ ++ if (ctrl & NAND_CTRL_CHANGE) { ++ gpio_set_value_cansleep(RB4XX_NAND_GPIO_CLE, ++ (ctrl & NAND_CLE) ? 1 : 0); ++ gpio_set_value_cansleep(RB4XX_NAND_GPIO_ALE, ++ (ctrl & NAND_ALE) ? 1 : 0); ++ gpio_set_value_cansleep(RB4XX_NAND_GPIO_NCE, ++ (ctrl & NAND_NCE) ? 0 : 1); ++ } ++ ++ if (cmd != NAND_CMD_NONE) ++ rb4xx_nand_write_cmd(cmd); ++} ++ ++static unsigned char rb4xx_nand_read_byte(struct mtd_info *mtd) ++{ ++ unsigned char data = 0; ++ int err; ++ ++ err = rb4xx_cpld_read(&data, NULL, 1); ++ if (err) { ++ pr_err("rb4xx_nand: read data failed, err=%d\n", err); ++ data = 0xff; ++ } ++ ++ return data; ++} ++ ++static void rb4xx_nand_write_buf(struct mtd_info *mtd, const unsigned char *buf, ++ int len) ++{ ++ int err; ++ ++ err = rb4xx_cpld_write(buf, len); ++ if (err) ++ pr_err("rb4xx_nand: write buf failed, err=%d\n", err); ++} ++ ++static void rb4xx_nand_read_buf(struct mtd_info *mtd, unsigned char *buf, ++ int len) ++{ ++ int err; ++ ++ err = rb4xx_cpld_read(buf, NULL, len); ++ if (err) ++ pr_err("rb4xx_nand: read buf failed, err=%d\n", err); ++} ++ ++static int rb4xx_nand_probe(struct platform_device *pdev) ++{ ++ struct rb4xx_nand_info *info; ++ int ret; ++ ++ printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); ++ ++ ret = gpio_request(RB4XX_NAND_GPIO_READY, "NAND RDY"); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to request gpio %d\n", ++ RB4XX_NAND_GPIO_READY); ++ goto err; ++ } ++ ++ ret = gpio_direction_input(RB4XX_NAND_GPIO_READY); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to set input mode on gpio %d\n", ++ RB4XX_NAND_GPIO_READY); ++ goto err_free_gpio_ready; ++ } ++ ++ ret = gpio_request(RB4XX_NAND_GPIO_ALE, "NAND ALE"); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to request gpio %d\n", ++ RB4XX_NAND_GPIO_ALE); ++ goto err_free_gpio_ready; ++ } ++ ++ ret = gpio_direction_output(RB4XX_NAND_GPIO_ALE, 0); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", ++ RB4XX_NAND_GPIO_ALE); ++ goto err_free_gpio_ale; ++ } ++ ++ ret = gpio_request(RB4XX_NAND_GPIO_CLE, "NAND CLE"); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to request gpio %d\n", ++ RB4XX_NAND_GPIO_CLE); ++ goto err_free_gpio_ale; ++ } ++ ++ ret = gpio_direction_output(RB4XX_NAND_GPIO_CLE, 0); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", ++ RB4XX_NAND_GPIO_CLE); ++ goto err_free_gpio_cle; ++ } ++ ++ ret = gpio_request(RB4XX_NAND_GPIO_NCE, "NAND NCE"); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to request gpio %d\n", ++ RB4XX_NAND_GPIO_NCE); ++ goto err_free_gpio_cle; ++ } ++ ++ ret = gpio_direction_output(RB4XX_NAND_GPIO_NCE, 1); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", ++ RB4XX_NAND_GPIO_ALE); ++ goto err_free_gpio_nce; ++ } ++ ++ info = kzalloc(sizeof(*info), GFP_KERNEL); ++ if (!info) { ++ dev_err(&pdev->dev, "rb4xx-nand: no memory for private data\n"); ++ ret = -ENOMEM; ++ goto err_free_gpio_nce; ++ } ++ ++ info->chip.priv = &info; ++ info->mtd.priv = &info->chip; ++ info->mtd.owner = THIS_MODULE; ++ ++ info->chip.cmd_ctrl = rb4xx_nand_cmd_ctrl; ++ info->chip.dev_ready = rb4xx_nand_dev_ready; ++ info->chip.read_byte = rb4xx_nand_read_byte; ++ info->chip.write_buf = rb4xx_nand_write_buf; ++ info->chip.read_buf = rb4xx_nand_read_buf; ++ ++ info->chip.chip_delay = 25; ++ info->chip.ecc.mode = NAND_ECC_SOFT; ++ ++ platform_set_drvdata(pdev, info); ++ ++ ret = nand_scan_ident(&info->mtd, 1, NULL); ++ if (ret) { ++ ret = -ENXIO; ++ goto err_free_info; ++ } ++ ++ if (info->mtd.writesize == 512) ++ info->chip.ecc.layout = &rb4xx_nand_ecclayout; ++ ++ ret = nand_scan_tail(&info->mtd); ++ if (ret) { ++ return -ENXIO; ++ goto err_set_drvdata; ++ } ++ ++ mtd_device_register(&info->mtd, rb4xx_nand_partitions, ++ ARRAY_SIZE(rb4xx_nand_partitions)); ++ if (ret) ++ goto err_release_nand; ++ ++ return 0; ++ ++err_release_nand: ++ nand_release(&info->mtd); ++err_set_drvdata: ++ platform_set_drvdata(pdev, NULL); ++err_free_info: ++ kfree(info); ++err_free_gpio_nce: ++ gpio_free(RB4XX_NAND_GPIO_NCE); ++err_free_gpio_cle: ++ gpio_free(RB4XX_NAND_GPIO_CLE); ++err_free_gpio_ale: ++ gpio_free(RB4XX_NAND_GPIO_ALE); ++err_free_gpio_ready: ++ gpio_free(RB4XX_NAND_GPIO_READY); ++err: ++ return ret; ++} ++ ++static int rb4xx_nand_remove(struct platform_device *pdev) ++{ ++ struct rb4xx_nand_info *info = platform_get_drvdata(pdev); ++ ++ nand_release(&info->mtd); ++ platform_set_drvdata(pdev, NULL); ++ kfree(info); ++ gpio_free(RB4XX_NAND_GPIO_NCE); ++ gpio_free(RB4XX_NAND_GPIO_CLE); ++ gpio_free(RB4XX_NAND_GPIO_ALE); ++ gpio_free(RB4XX_NAND_GPIO_READY); ++ ++ return 0; ++} ++ ++static struct platform_driver rb4xx_nand_driver = { ++ .probe = rb4xx_nand_probe, ++ .remove = rb4xx_nand_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init rb4xx_nand_init(void) ++{ ++ return platform_driver_register(&rb4xx_nand_driver); ++} ++ ++static void __exit rb4xx_nand_exit(void) ++{ ++ platform_driver_unregister(&rb4xx_nand_driver); ++} ++ ++module_init(rb4xx_nand_init); ++module_exit(rb4xx_nand_exit); ++ ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_AUTHOR("Imre Kaloz "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/mtd/nand/rb750_nand.c linux-4.1.13/drivers/mtd/nand/rb750_nand.c +--- linux-4.1.13.orig/drivers/mtd/nand/rb750_nand.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/nand/rb750_nand.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,354 @@ ++/* ++ * NAND flash driver for the MikroTik RouterBOARD 750 ++ * ++ * Copyright (C) 2010-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define DRV_NAME "rb750-nand" ++#define DRV_VERSION "0.1.0" ++#define DRV_DESC "NAND flash driver for the RouterBOARD 750" ++ ++#define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0) ++#define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE) ++#define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE) ++#define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE) ++#define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE) ++#define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY) ++ ++#define RB750_NAND_DATA_SHIFT 1 ++#define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT) ++#define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY) ++#define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \ ++ RB750_NAND_NRE | RB750_NAND_NWE) ++ ++struct rb750_nand_info { ++ struct nand_chip chip; ++ struct mtd_info mtd; ++ struct rb7xx_nand_platform_data *pdata; ++}; ++ ++static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) ++{ ++ return container_of(mtd, struct rb750_nand_info, mtd); ++} ++ ++/* ++ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader ++ * will not be able to find the kernel that we load. ++ */ ++static struct nand_ecclayout rb750_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static struct mtd_partition rb750_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static void rb750_nand_write(const u8 *buf, unsigned len) ++{ ++ void __iomem *base = ath79_gpio_base; ++ u32 out; ++ u32 t; ++ unsigned i; ++ ++ /* set data lines to output mode */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); ++ ++ out = __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE); ++ for (i = 0; i != len; i++) { ++ u32 data; ++ ++ data = buf[i]; ++ data <<= RB750_NAND_DATA_SHIFT; ++ data |= out; ++ __raw_writel(data, base + AR71XX_GPIO_REG_OUT); ++ ++ __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ } ++ ++ /* set data lines to input mode */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_OE); ++} ++ ++static void rb750_nand_read(u8 *read_buf, unsigned len) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned i; ++ ++ for (i = 0; i < len; i++) { ++ u8 data; ++ ++ /* activate RE line */ ++ __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_CLEAR); ++ ++ /* read input lines */ ++ data = __raw_readl(base + AR71XX_GPIO_REG_IN) >> ++ RB750_NAND_DATA_SHIFT; ++ ++ /* deactivate RE line */ ++ __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET); ++ ++ read_buf[i] = data; ++ } ++} ++ ++static void rb750_nand_select_chip(struct mtd_info *mtd, int chip) ++{ ++ struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd); ++ void __iomem *base = ath79_gpio_base; ++ u32 t; ++ ++ if (chip >= 0) { ++ rbinfo->pdata->enable_pins(); ++ ++ /* set input mode for data lines */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ __raw_writel(t & ~RB750_NAND_INPUT_BITS, ++ base + AR71XX_GPIO_REG_OE); ++ ++ /* deactivate RE and WE lines */ ++ __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE, ++ base + AR71XX_GPIO_REG_SET); ++ /* flush write */ ++ (void) __raw_readl(base + AR71XX_GPIO_REG_SET); ++ ++ /* activate CE line */ ++ __raw_writel(rbinfo->pdata->nce_line, ++ base + AR71XX_GPIO_REG_CLEAR); ++ } else { ++ /* deactivate CE line */ ++ __raw_writel(rbinfo->pdata->nce_line, ++ base + AR71XX_GPIO_REG_SET); ++ /* flush write */ ++ (void) __raw_readl(base + AR71XX_GPIO_REG_SET); ++ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY, ++ base + AR71XX_GPIO_REG_OE); ++ ++ rbinfo->pdata->disable_pins(); ++ } ++} ++ ++static int rb750_nand_dev_ready(struct mtd_info *mtd) ++{ ++ void __iomem *base = ath79_gpio_base; ++ ++ return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY); ++} ++ ++static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, ++ unsigned int ctrl) ++{ ++ if (ctrl & NAND_CTRL_CHANGE) { ++ void __iomem *base = ath79_gpio_base; ++ u32 t; ++ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ ++ t &= ~(RB750_NAND_CLE | RB750_NAND_ALE); ++ t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0; ++ t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0; ++ ++ __raw_writel(t, base + AR71XX_GPIO_REG_OUT); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ } ++ ++ if (cmd != NAND_CMD_NONE) { ++ u8 t = cmd; ++ rb750_nand_write(&t, 1); ++ } ++} ++ ++static u8 rb750_nand_read_byte(struct mtd_info *mtd) ++{ ++ u8 data = 0; ++ rb750_nand_read(&data, 1); ++ return data; ++} ++ ++static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) ++{ ++ rb750_nand_read(buf, len); ++} ++ ++static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) ++{ ++ rb750_nand_write(buf, len); ++} ++ ++static void __init rb750_nand_gpio_init(struct rb750_nand_info *info) ++{ ++ void __iomem *base = ath79_gpio_base; ++ u32 out; ++ u32 t; ++ ++ out = __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ ++ /* setup output levels */ ++ __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE, ++ base + AR71XX_GPIO_REG_SET); ++ ++ __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE, ++ base + AR71XX_GPIO_REG_CLEAR); ++ ++ /* setup input lines */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE); ++ ++ /* setup output lines */ ++ t = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ t |= RB750_NAND_OUTPUT_BITS; ++ t |= info->pdata->nce_line; ++ __raw_writel(t, base + AR71XX_GPIO_REG_OE); ++ ++ info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0); ++} ++ ++static int rb750_nand_probe(struct platform_device *pdev) ++{ ++ struct rb750_nand_info *info; ++ struct rb7xx_nand_platform_data *pdata; ++ int ret; ++ ++ printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); ++ ++ pdata = pdev->dev.platform_data; ++ if (!pdata) ++ return -EINVAL; ++ ++ info = kzalloc(sizeof(*info), GFP_KERNEL); ++ if (!info) ++ return -ENOMEM; ++ ++ info->chip.priv = &info; ++ info->mtd.priv = &info->chip; ++ info->mtd.owner = THIS_MODULE; ++ ++ info->chip.select_chip = rb750_nand_select_chip; ++ info->chip.cmd_ctrl = rb750_nand_cmd_ctrl; ++ info->chip.dev_ready = rb750_nand_dev_ready; ++ info->chip.read_byte = rb750_nand_read_byte; ++ info->chip.write_buf = rb750_nand_write_buf; ++ info->chip.read_buf = rb750_nand_read_buf; ++ ++ info->chip.chip_delay = 25; ++ info->chip.ecc.mode = NAND_ECC_SOFT; ++ ++ info->pdata = pdata; ++ ++ platform_set_drvdata(pdev, info); ++ ++ rb750_nand_gpio_init(info); ++ ++ ret = nand_scan_ident(&info->mtd, 1, NULL); ++ if (ret) { ++ ret = -ENXIO; ++ goto err_free_info; ++ } ++ ++ if (info->mtd.writesize == 512) ++ info->chip.ecc.layout = &rb750_nand_ecclayout; ++ ++ ret = nand_scan_tail(&info->mtd); ++ if (ret) { ++ return -ENXIO; ++ goto err_set_drvdata; ++ } ++ ++ ret = mtd_device_register(&info->mtd, rb750_nand_partitions, ++ ARRAY_SIZE(rb750_nand_partitions)); ++ if (ret) ++ goto err_release_nand; ++ ++ return 0; ++ ++err_release_nand: ++ nand_release(&info->mtd); ++err_set_drvdata: ++ platform_set_drvdata(pdev, NULL); ++err_free_info: ++ kfree(info); ++ return ret; ++} ++ ++static int rb750_nand_remove(struct platform_device *pdev) ++{ ++ struct rb750_nand_info *info = platform_get_drvdata(pdev); ++ ++ nand_release(&info->mtd); ++ platform_set_drvdata(pdev, NULL); ++ kfree(info); ++ ++ return 0; ++} ++ ++static struct platform_driver rb750_nand_driver = { ++ .probe = rb750_nand_probe, ++ .remove = rb750_nand_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init rb750_nand_init(void) ++{ ++ return platform_driver_register(&rb750_nand_driver); ++} ++ ++static void __exit rb750_nand_exit(void) ++{ ++ platform_driver_unregister(&rb750_nand_driver); ++} ++ ++module_init(rb750_nand_init); ++module_exit(rb750_nand_exit); ++ ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/mtd/nand/rb91x_nand.c linux-4.1.13/drivers/mtd/nand/rb91x_nand.c +--- linux-4.1.13.orig/drivers/mtd/nand/rb91x_nand.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/nand/rb91x_nand.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,377 @@ ++/* ++ * NAND flash driver for the MikroTik RouterBOARD 91x series ++ * ++ * Copyright (C) 2013-2014 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define DRV_DESC "NAND flash driver for the RouterBOARD 91x series" ++ ++#define RB91X_NAND_NRWE BIT(12) ++ ++#define RB91X_NAND_DATA_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) |\ ++ BIT(13) | BIT(14) | BIT(15)) ++ ++#define RB91X_NAND_INPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_RDY) ++#define RB91X_NAND_OUTPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE) ++ ++#define RB91X_NAND_LOW_DATA_MASK 0x1f ++#define RB91X_NAND_HIGH_DATA_MASK 0xe0 ++#define RB91X_NAND_HIGH_DATA_SHIFT 8 ++ ++struct rb91x_nand_info { ++ struct nand_chip chip; ++ struct mtd_info mtd; ++ struct device *dev; ++ ++ int gpio_nce; ++ int gpio_ale; ++ int gpio_cle; ++ int gpio_rdy; ++ int gpio_read; ++ int gpio_nrw; ++ int gpio_nle; ++}; ++ ++static inline struct rb91x_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) ++{ ++ return container_of(mtd, struct rb91x_nand_info, mtd); ++} ++ ++/* ++ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader ++ * will not be able to find the kernel that we load. ++ */ ++static struct nand_ecclayout rb91x_nand_ecclayout = { ++ .eccbytes = 6, ++ .eccpos = { 8, 9, 10, 13, 14, 15 }, ++ .oobavail = 9, ++ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } ++}; ++ ++static struct mtd_partition rb91x_nand_partitions[] = { ++ { ++ .name = "booter", ++ .offset = 0, ++ .size = (256 * 1024), ++ .mask_flags = MTD_WRITEABLE, ++ }, { ++ .name = "kernel", ++ .offset = (256 * 1024), ++ .size = (4 * 1024 * 1024) - (256 * 1024), ++ }, { ++ .name = "rootfs", ++ .offset = MTDPART_OFS_NXTBLK, ++ .size = MTDPART_SIZ_FULL, ++ }, ++}; ++ ++static void rb91x_nand_write(struct rb91x_nand_info *rbni, ++ const u8 *buf, ++ unsigned len) ++{ ++ void __iomem *base = ath79_gpio_base; ++ u32 oe_reg; ++ u32 out_reg; ++ u32 out; ++ unsigned i; ++ ++ /* enable the latch */ ++ gpio_set_value_cansleep(rbni->gpio_nle, 0); ++ ++ oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ ++ /* set data lines to output mode */ ++ __raw_writel(oe_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE), ++ base + AR71XX_GPIO_REG_OE); ++ ++ out = out_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE); ++ for (i = 0; i != len; i++) { ++ u32 data; ++ ++ data = (buf[i] & RB91X_NAND_HIGH_DATA_MASK) << ++ RB91X_NAND_HIGH_DATA_SHIFT; ++ data |= buf[i] & RB91X_NAND_LOW_DATA_MASK; ++ data |= out; ++ __raw_writel(data, base + AR71XX_GPIO_REG_OUT); ++ ++ /* deactivate WE line */ ++ data |= RB91X_NAND_NRWE; ++ __raw_writel(data, base + AR71XX_GPIO_REG_OUT); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ } ++ ++ /* restore registers */ ++ __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); ++ __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ ++ /* disable the latch */ ++ gpio_set_value_cansleep(rbni->gpio_nle, 1); ++} ++ ++static void rb91x_nand_read(struct rb91x_nand_info *rbni, ++ u8 *read_buf, ++ unsigned len) ++{ ++ void __iomem *base = ath79_gpio_base; ++ u32 oe_reg; ++ u32 out_reg; ++ unsigned i; ++ ++ /* enable read mode */ ++ gpio_set_value_cansleep(rbni->gpio_read, 1); ++ ++ /* enable latch */ ++ gpio_set_value_cansleep(rbni->gpio_nle, 0); ++ ++ /* save registers */ ++ oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); ++ out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ ++ /* set data lines to input mode */ ++ __raw_writel(oe_reg | RB91X_NAND_DATA_BITS, ++ base + AR71XX_GPIO_REG_OE); ++ ++ for (i = 0; i < len; i++) { ++ u32 in; ++ u8 data; ++ ++ /* activate RE line */ ++ __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_CLEAR); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_CLEAR); ++ ++ /* read input lines */ ++ in = __raw_readl(base + AR71XX_GPIO_REG_IN); ++ ++ /* deactivate RE line */ ++ __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_SET); ++ ++ data = (in & RB91X_NAND_LOW_DATA_MASK); ++ data |= (in >> RB91X_NAND_HIGH_DATA_SHIFT) & ++ RB91X_NAND_HIGH_DATA_MASK; ++ ++ read_buf[i] = data; ++ } ++ ++ /* restore registers */ ++ __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); ++ __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); ++ /* flush write */ ++ __raw_readl(base + AR71XX_GPIO_REG_OUT); ++ ++ /* disable latch */ ++ gpio_set_value_cansleep(rbni->gpio_nle, 1); ++ ++ /* disable read mode */ ++ gpio_set_value_cansleep(rbni->gpio_read, 0); ++} ++ ++static int rb91x_nand_dev_ready(struct mtd_info *mtd) ++{ ++ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); ++ ++ return gpio_get_value_cansleep(rbni->gpio_rdy); ++} ++ ++static void rb91x_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, ++ unsigned int ctrl) ++{ ++ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); ++ ++ if (ctrl & NAND_CTRL_CHANGE) { ++ gpio_set_value_cansleep(rbni->gpio_cle, ++ (ctrl & NAND_CLE) ? 1 : 0); ++ gpio_set_value_cansleep(rbni->gpio_ale, ++ (ctrl & NAND_ALE) ? 1 : 0); ++ gpio_set_value_cansleep(rbni->gpio_nce, ++ (ctrl & NAND_NCE) ? 0 : 1); ++ } ++ ++ if (cmd != NAND_CMD_NONE) { ++ u8 t = cmd; ++ ++ rb91x_nand_write(rbni, &t, 1); ++ } ++} ++ ++static u8 rb91x_nand_read_byte(struct mtd_info *mtd) ++{ ++ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); ++ u8 data = 0xff; ++ ++ rb91x_nand_read(rbni, &data, 1); ++ ++ return data; ++} ++ ++static void rb91x_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) ++{ ++ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); ++ ++ rb91x_nand_read(rbni, buf, len); ++} ++ ++static void rb91x_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) ++{ ++ struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); ++ ++ rb91x_nand_write(rbni, buf, len); ++} ++ ++static int rb91x_nand_gpio_init(struct rb91x_nand_info *info) ++{ ++ int ret; ++ ++ /* ++ * Ensure that the LATCH is disabled before initializing ++ * control lines. ++ */ ++ ret = devm_gpio_request_one(info->dev, info->gpio_nle, ++ GPIOF_OUT_INIT_HIGH, "LATCH enable"); ++ if (ret) ++ return ret; ++ ++ ret = devm_gpio_request_one(info->dev, info->gpio_nce, ++ GPIOF_OUT_INIT_HIGH, "NAND nCE"); ++ if (ret) ++ return ret; ++ ++ ret = devm_gpio_request_one(info->dev, info->gpio_nrw, ++ GPIOF_OUT_INIT_HIGH, "NAND nRW"); ++ if (ret) ++ return ret; ++ ++ ret = devm_gpio_request_one(info->dev, info->gpio_cle, ++ GPIOF_OUT_INIT_LOW, "NAND CLE"); ++ if (ret) ++ return ret; ++ ++ ret = devm_gpio_request_one(info->dev, info->gpio_ale, ++ GPIOF_OUT_INIT_LOW, "NAND ALE"); ++ if (ret) ++ return ret; ++ ++ ret = devm_gpio_request_one(info->dev, info->gpio_read, ++ GPIOF_OUT_INIT_LOW, "NAND READ"); ++ if (ret) ++ return ret; ++ ++ ret = devm_gpio_request_one(info->dev, info->gpio_rdy, ++ GPIOF_IN, "NAND RDY"); ++ return ret; ++} ++ ++static int rb91x_nand_probe(struct platform_device *pdev) ++{ ++ struct rb91x_nand_info *rbni; ++ struct rb91x_nand_platform_data *pdata; ++ int ret; ++ ++ pr_info(DRV_DESC "\n"); ++ ++ pdata = dev_get_platdata(&pdev->dev); ++ if (!pdata) ++ return -EINVAL; ++ ++ rbni = devm_kzalloc(&pdev->dev, sizeof(*rbni), GFP_KERNEL); ++ if (!rbni) ++ return -ENOMEM; ++ ++ rbni->dev = &pdev->dev; ++ rbni->gpio_nce = pdata->gpio_nce; ++ rbni->gpio_ale = pdata->gpio_ale; ++ rbni->gpio_cle = pdata->gpio_cle; ++ rbni->gpio_read = pdata->gpio_read; ++ rbni->gpio_nrw = pdata->gpio_nrw; ++ rbni->gpio_rdy = pdata->gpio_rdy; ++ rbni->gpio_nle = pdata->gpio_nle; ++ ++ rbni->chip.priv = &rbni; ++ rbni->mtd.priv = &rbni->chip; ++ rbni->mtd.owner = THIS_MODULE; ++ ++ rbni->chip.cmd_ctrl = rb91x_nand_cmd_ctrl; ++ rbni->chip.dev_ready = rb91x_nand_dev_ready; ++ rbni->chip.read_byte = rb91x_nand_read_byte; ++ rbni->chip.write_buf = rb91x_nand_write_buf; ++ rbni->chip.read_buf = rb91x_nand_read_buf; ++ ++ rbni->chip.chip_delay = 25; ++ rbni->chip.ecc.mode = NAND_ECC_SOFT; ++ ++ platform_set_drvdata(pdev, rbni); ++ ++ ret = rb91x_nand_gpio_init(rbni); ++ if (ret) ++ return ret; ++ ++ ret = nand_scan_ident(&rbni->mtd, 1, NULL); ++ if (ret) ++ return ret; ++ ++ if (rbni->mtd.writesize == 512) ++ rbni->chip.ecc.layout = &rb91x_nand_ecclayout; ++ ++ ret = nand_scan_tail(&rbni->mtd); ++ if (ret) ++ return ret; ++ ++ ret = mtd_device_register(&rbni->mtd, rb91x_nand_partitions, ++ ARRAY_SIZE(rb91x_nand_partitions)); ++ if (ret) ++ goto err_release_nand; ++ ++ return 0; ++ ++err_release_nand: ++ nand_release(&rbni->mtd); ++ return ret; ++} ++ ++static int rb91x_nand_remove(struct platform_device *pdev) ++{ ++ struct rb91x_nand_info *info = platform_get_drvdata(pdev); ++ ++ nand_release(&info->mtd); ++ ++ return 0; ++} ++ ++static struct platform_driver rb91x_nand_driver = { ++ .probe = rb91x_nand_probe, ++ .remove = rb91x_nand_remove, ++ .driver = { ++ .name = RB91X_NAND_DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++module_platform_driver(rb91x_nand_driver); ++ ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/mtd/redboot.c linux-4.1.13/drivers/mtd/redboot.c +--- linux-4.1.13.orig/drivers/mtd/redboot.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/redboot.c 2015-12-04 19:57:03.870111690 +0100 +@@ -76,12 +76,18 @@ + static char nullstring[] = "unallocated"; + #endif + ++ buf = vmalloc(master->erasesize); ++ if (!buf) ++ return -ENOMEM; ++ ++ restart: + if ( directory < 0 ) { + offset = master->size + directory * master->erasesize; + while (mtd_block_isbad(master, offset)) { + if (!offset) { + nogood: + printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); ++ vfree(buf); + return -EIO; + } + offset -= master->erasesize; +@@ -94,10 +100,6 @@ + goto nogood; + } + } +- buf = vmalloc(master->erasesize); +- +- if (!buf) +- return -ENOMEM; + + printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", + master->name, offset); +@@ -170,6 +172,11 @@ + } + if (i == numslots) { + /* Didn't find it */ ++ if (offset + master->erasesize < master->size) { ++ /* not at the end of the flash yet, maybe next block :) */ ++ directory++; ++ goto restart; ++ } + printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", + master->name); + ret = 0; +diff -Nur linux-4.1.13.orig/drivers/mtd/tplinkpart.c linux-4.1.13/drivers/mtd/tplinkpart.c +--- linux-4.1.13.orig/drivers/mtd/tplinkpart.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/mtd/tplinkpart.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,222 @@ ++/* ++ * Copyright (C) 2011 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define TPLINK_NUM_PARTS 5 ++#define TPLINK_HEADER_V1 0x01000000 ++#define TPLINK_HEADER_V2 0x02000000 ++#define MD5SUM_LEN 16 ++ ++#define TPLINK_ART_LEN 0x10000 ++#define TPLINK_KERNEL_OFFS 0x20000 ++#define TPLINK_64K_KERNEL_OFFS 0x10000 ++ ++struct tplink_fw_header { ++ uint32_t version; /* header version */ ++ char vendor_name[24]; ++ char fw_version[36]; ++ uint32_t hw_id; /* hardware id */ ++ uint32_t hw_rev; /* hardware revision */ ++ uint32_t unk1; ++ uint8_t md5sum1[MD5SUM_LEN]; ++ uint32_t unk2; ++ uint8_t md5sum2[MD5SUM_LEN]; ++ uint32_t unk3; ++ uint32_t kernel_la; /* kernel load address */ ++ uint32_t kernel_ep; /* kernel entry point */ ++ uint32_t fw_length; /* total length of the firmware */ ++ uint32_t kernel_ofs; /* kernel data offset */ ++ uint32_t kernel_len; /* kernel data length */ ++ uint32_t rootfs_ofs; /* rootfs data offset */ ++ uint32_t rootfs_len; /* rootfs data length */ ++ uint32_t boot_ofs; /* bootloader data offset */ ++ uint32_t boot_len; /* bootloader data length */ ++ uint8_t pad[360]; ++} __attribute__ ((packed)); ++ ++static struct tplink_fw_header * ++tplink_read_header(struct mtd_info *mtd, size_t offset) ++{ ++ struct tplink_fw_header *header; ++ size_t header_len; ++ size_t retlen; ++ int ret; ++ u32 t; ++ ++ header = vmalloc(sizeof(*header)); ++ if (!header) ++ goto err; ++ ++ header_len = sizeof(struct tplink_fw_header); ++ ret = mtd_read(mtd, offset, header_len, &retlen, ++ (unsigned char *) header); ++ if (ret) ++ goto err_free_header; ++ ++ if (retlen != header_len) ++ goto err_free_header; ++ ++ /* sanity checks */ ++ t = be32_to_cpu(header->version); ++ if ((t != TPLINK_HEADER_V1) && (t != TPLINK_HEADER_V2)) ++ goto err_free_header; ++ ++ t = be32_to_cpu(header->kernel_ofs); ++ if (t != header_len) ++ goto err_free_header; ++ ++ return header; ++ ++err_free_header: ++ vfree(header); ++err: ++ return NULL; ++} ++ ++static int tplink_check_rootfs_magic(struct mtd_info *mtd, size_t offset) ++{ ++ u32 magic; ++ size_t retlen; ++ int ret; ++ ++ ret = mtd_read(mtd, offset, sizeof(magic), &retlen, ++ (unsigned char *) &magic); ++ if (ret) ++ return ret; ++ ++ if (retlen != sizeof(magic)) ++ return -EIO; ++ ++ if (le32_to_cpu(magic) != SQUASHFS_MAGIC && ++ magic != 0x19852003) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int tplink_parse_partitions_offset(struct mtd_info *master, ++ struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data, ++ size_t offset) ++{ ++ struct mtd_partition *parts; ++ struct tplink_fw_header *header; ++ int nr_parts; ++ size_t art_offset; ++ size_t rootfs_offset; ++ size_t squashfs_offset; ++ int ret; ++ ++ nr_parts = TPLINK_NUM_PARTS; ++ parts = kzalloc(nr_parts * sizeof(struct mtd_partition), GFP_KERNEL); ++ if (!parts) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ header = tplink_read_header(master, offset); ++ if (!header) { ++ pr_notice("%s: no TP-Link header found\n", master->name); ++ ret = -ENODEV; ++ goto err_free_parts; ++ } ++ ++ squashfs_offset = offset + sizeof(struct tplink_fw_header) + ++ be32_to_cpu(header->kernel_len); ++ ++ ret = tplink_check_rootfs_magic(master, squashfs_offset); ++ if (ret == 0) ++ rootfs_offset = squashfs_offset; ++ else ++ rootfs_offset = offset + be32_to_cpu(header->rootfs_ofs); ++ ++ art_offset = master->size - TPLINK_ART_LEN; ++ ++ parts[0].name = "u-boot"; ++ parts[0].offset = 0; ++ parts[0].size = offset; ++ parts[0].mask_flags = MTD_WRITEABLE; ++ ++ parts[1].name = "kernel"; ++ parts[1].offset = offset; ++ parts[1].size = rootfs_offset - offset; ++ ++ parts[2].name = "rootfs"; ++ parts[2].offset = rootfs_offset; ++ parts[2].size = art_offset - rootfs_offset; ++ ++ parts[3].name = "art"; ++ parts[3].offset = art_offset; ++ parts[3].size = TPLINK_ART_LEN; ++ parts[3].mask_flags = MTD_WRITEABLE; ++ ++ parts[4].name = "firmware"; ++ parts[4].offset = offset; ++ parts[4].size = art_offset - offset; ++ ++ vfree(header); ++ ++ *pparts = parts; ++ return nr_parts; ++ ++err_free_parts: ++ kfree(parts); ++err: ++ *pparts = NULL; ++ return ret; ++} ++ ++static int tplink_parse_partitions(struct mtd_info *master, ++ struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data) ++{ ++ return tplink_parse_partitions_offset(master, pparts, data, ++ TPLINK_KERNEL_OFFS); ++} ++ ++static int tplink_parse_64k_partitions(struct mtd_info *master, ++ struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data) ++{ ++ return tplink_parse_partitions_offset(master, pparts, data, ++ TPLINK_64K_KERNEL_OFFS); ++} ++ ++static struct mtd_part_parser tplink_parser = { ++ .owner = THIS_MODULE, ++ .parse_fn = tplink_parse_partitions, ++ .name = "tp-link", ++}; ++ ++static struct mtd_part_parser tplink_64k_parser = { ++ .owner = THIS_MODULE, ++ .parse_fn = tplink_parse_64k_partitions, ++ .name = "tp-link-64k", ++}; ++ ++static int __init tplink_parser_init(void) ++{ ++ register_mtd_parser(&tplink_parser); ++ register_mtd_parser(&tplink_64k_parser); ++ ++ return 0; ++} ++ ++module_init(tplink_parser_init); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Gabor Juhos "); +diff -Nur linux-4.1.13.orig/drivers/net/dsa/Kconfig linux-4.1.13/drivers/net/dsa/Kconfig +--- linux-4.1.13.orig/drivers/net/dsa/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/dsa/Kconfig 2015-12-04 19:57:03.886110643 +0100 +@@ -13,6 +13,13 @@ + This enables support for the Marvell 88E6060 ethernet switch + chip. + ++config NET_DSA_MV88E6063 ++ bool "Marvell 88E6063 ethernet switch chip support" ++ select NET_DSA_TAG_TRAILER ++ ---help--- ++ This enables support for the Marvell 88E6063 ethernet switch ++ chip ++ + config NET_DSA_MV88E6XXX_NEED_PPU + bool + default n +diff -Nur linux-4.1.13.orig/drivers/net/dsa/Makefile linux-4.1.13/drivers/net/dsa/Makefile +--- linux-4.1.13.orig/drivers/net/dsa/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/dsa/Makefile 2015-12-04 19:57:03.886110643 +0100 +@@ -1,4 +1,5 @@ + obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o ++obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o + obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o + mv88e6xxx_drv-y += mv88e6xxx.o + ifdef CONFIG_NET_DSA_MV88E6123_61_65 +diff -Nur linux-4.1.13.orig/drivers/net/dsa/mv88e6063.c linux-4.1.13/drivers/net/dsa/mv88e6063.c +--- linux-4.1.13.orig/drivers/net/dsa/mv88e6063.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/dsa/mv88e6063.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,311 @@ ++/* ++ * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips ++ * Copyright (c) 2009 Gabor Juhos ++ * ++ * This driver was base on: net/dsa/mv88e6060.c ++ * net/dsa/mv88e6063.c - Driver for Marvell 88e6060 switch chips ++ * Copyright (c) 2008-2009 Marvell Semiconductor ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define REG_BASE 0x10 ++#define REG_PHY(p) (REG_BASE + (p)) ++#define REG_PORT(p) (REG_BASE + 8 + (p)) ++#define REG_GLOBAL (REG_BASE + 0x0f) ++#define NUM_PORTS 7 ++ ++static int reg_read(struct dsa_switch *ds, int addr, int reg) ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) ++ return mdiobus_read(ds->master_mii_bus, addr, reg); ++#else ++ struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); ++ return mdiobus_read(bus, addr, reg); ++#endif ++} ++ ++#define REG_READ(addr, reg) \ ++ ({ \ ++ int __ret; \ ++ \ ++ __ret = reg_read(ds, addr, reg); \ ++ if (__ret < 0) \ ++ return __ret; \ ++ __ret; \ ++ }) ++ ++ ++static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) ++ return mdiobus_write(ds->master_mii_bus, addr, reg, val); ++#else ++ struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds->master_dev); ++ return mdiobus_write(bus, addr, reg, val); ++#endif ++} ++ ++#define REG_WRITE(addr, reg, val) \ ++ ({ \ ++ int __ret; \ ++ \ ++ __ret = reg_write(ds, addr, reg, val); \ ++ if (__ret < 0) \ ++ return __ret; \ ++ }) ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) ++static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) ++{ ++#else ++static char *mv88e6063_probe(struct device *host_dev, int sw_addr) ++{ ++ struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev); ++#endif ++ int ret; ++ ++ ret = mdiobus_read(bus, REG_PORT(0), 0x03); ++ if (ret >= 0) { ++ ret &= 0xfff0; ++ if (ret == 0x1530) ++ return "Marvell 88E6063"; ++ } ++ ++ return NULL; ++} ++ ++static int mv88e6063_switch_reset(struct dsa_switch *ds) ++{ ++ int i; ++ int ret; ++ ++ /* ++ * Set all ports to the disabled state. ++ */ ++ for (i = 0; i < NUM_PORTS; i++) { ++ ret = REG_READ(REG_PORT(i), 0x04); ++ REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc); ++ } ++ ++ /* ++ * Wait for transmit queues to drain. ++ */ ++ msleep(2); ++ ++ /* ++ * Reset the switch. ++ */ ++ REG_WRITE(REG_GLOBAL, 0x0a, 0xa130); ++ ++ /* ++ * Wait up to one second for reset to complete. ++ */ ++ for (i = 0; i < 1000; i++) { ++ ret = REG_READ(REG_GLOBAL, 0x00); ++ if ((ret & 0x8000) == 0x0000) ++ break; ++ ++ msleep(1); ++ } ++ if (i == 1000) ++ return -ETIMEDOUT; ++ ++ return 0; ++} ++ ++static int mv88e6063_setup_global(struct dsa_switch *ds) ++{ ++ /* ++ * Disable discarding of frames with excessive collisions, ++ * set the maximum frame size to 1536 bytes, and mask all ++ * interrupt sources. ++ */ ++ REG_WRITE(REG_GLOBAL, 0x04, 0x0800); ++ ++ /* ++ * Enable automatic address learning, set the address ++ * database size to 1024 entries, and set the default aging ++ * time to 5 minutes. ++ */ ++ REG_WRITE(REG_GLOBAL, 0x0a, 0x2130); ++ ++ return 0; ++} ++ ++static int mv88e6063_setup_port(struct dsa_switch *ds, int p) ++{ ++ int addr = REG_PORT(p); ++ ++ /* ++ * Do not force flow control, disable Ingress and Egress ++ * Header tagging, disable VLAN tunneling, and set the port ++ * state to Forwarding. Additionally, if this is the CPU ++ * port, enable Ingress and Egress Trailer tagging mode. ++ */ ++ REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003); ++ ++ /* ++ * Port based VLAN map: give each port its own address ++ * database, allow the CPU port to talk to each of the 'real' ++ * ports, and allow each of the 'real' ports to only talk to ++ * the CPU port. ++ */ ++ REG_WRITE(addr, 0x06, ++ ((p & 0xf) << 12) | ++ (dsa_is_cpu_port(ds, p) ? ++ ds->phys_port_mask : ++ (1 << ds->dst->cpu_port))); ++ ++ /* ++ * Port Association Vector: when learning source addresses ++ * of packets, add the address to the address database using ++ * a port bitmap that has only the bit for this port set and ++ * the other bits clear. ++ */ ++ REG_WRITE(addr, 0x0b, 1 << p); ++ ++ return 0; ++} ++ ++static int mv88e6063_setup(struct dsa_switch *ds) ++{ ++ int i; ++ int ret; ++ ++ ret = mv88e6063_switch_reset(ds); ++ if (ret < 0) ++ return ret; ++ ++ /* @@@ initialise atu */ ++ ++ ret = mv88e6063_setup_global(ds); ++ if (ret < 0) ++ return ret; ++ ++ for (i = 0; i < NUM_PORTS; i++) { ++ ret = mv88e6063_setup_port(ds, i); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int mv88e6063_set_addr(struct dsa_switch *ds, u8 *addr) ++{ ++ REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]); ++ REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]); ++ REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]); ++ ++ return 0; ++} ++ ++static int mv88e6063_port_to_phy_addr(int port) ++{ ++ if (port >= 0 && port <= NUM_PORTS) ++ return REG_PHY(port); ++ return -1; ++} ++ ++static int mv88e6063_phy_read(struct dsa_switch *ds, int port, int regnum) ++{ ++ int addr; ++ ++ addr = mv88e6063_port_to_phy_addr(port); ++ if (addr == -1) ++ return 0xffff; ++ ++ return reg_read(ds, addr, regnum); ++} ++ ++static int ++mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) ++{ ++ int addr; ++ ++ addr = mv88e6063_port_to_phy_addr(port); ++ if (addr == -1) ++ return 0xffff; ++ ++ return reg_write(ds, addr, regnum, val); ++} ++ ++static void mv88e6063_poll_link(struct dsa_switch *ds) ++{ ++ int i; ++ ++ for (i = 0; i < DSA_MAX_PORTS; i++) { ++ struct net_device *dev; ++ int uninitialized_var(port_status); ++ int link; ++ int speed; ++ int duplex; ++ int fc; ++ ++ dev = ds->ports[i]; ++ if (dev == NULL) ++ continue; ++ ++ link = 0; ++ if (dev->flags & IFF_UP) { ++ port_status = reg_read(ds, REG_PORT(i), 0x00); ++ if (port_status < 0) ++ continue; ++ ++ link = !!(port_status & 0x1000); ++ } ++ ++ if (!link) { ++ if (netif_carrier_ok(dev)) { ++ printk(KERN_INFO "%s: link down\n", dev->name); ++ netif_carrier_off(dev); ++ } ++ continue; ++ } ++ ++ speed = (port_status & 0x0100) ? 100 : 10; ++ duplex = (port_status & 0x0200) ? 1 : 0; ++ fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; ++ ++ if (!netif_carrier_ok(dev)) { ++ printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " ++ "flow control %sabled\n", dev->name, ++ speed, duplex ? "full" : "half", ++ fc ? "en" : "dis"); ++ netif_carrier_on(dev); ++ } ++ } ++} ++ ++static struct dsa_switch_driver mv88e6063_switch_driver = { ++ .tag_protocol = htons(ETH_P_TRAILER), ++ .probe = mv88e6063_probe, ++ .setup = mv88e6063_setup, ++ .set_addr = mv88e6063_set_addr, ++ .phy_read = mv88e6063_phy_read, ++ .phy_write = mv88e6063_phy_write, ++ .poll_link = mv88e6063_poll_link, ++}; ++ ++static int __init mv88e6063_init(void) ++{ ++ register_switch_driver(&mv88e6063_switch_driver); ++ return 0; ++} ++module_init(mv88e6063_init); ++ ++static void __exit mv88e6063_cleanup(void) ++{ ++ unregister_switch_driver(&mv88e6063_switch_driver); ++} ++module_exit(mv88e6063_cleanup); +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,1229 @@ ++/* ++ * Driver for the built-in ethernet switch of the Atheros AR7240 SoC ++ * Copyright (c) 2010 Gabor Juhos ++ * Copyright (c) 2010 Felix Fietkau ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "ag71xx.h" ++ ++#define BITM(_count) (BIT(_count) - 1) ++#define BITS(_shift, _count) (BITM(_count) << _shift) ++ ++#define AR7240_REG_MASK_CTRL 0x00 ++#define AR7240_MASK_CTRL_REVISION_M BITM(8) ++#define AR7240_MASK_CTRL_VERSION_M BITM(8) ++#define AR7240_MASK_CTRL_VERSION_S 8 ++#define AR7240_MASK_CTRL_VERSION_AR7240 0x01 ++#define AR7240_MASK_CTRL_VERSION_AR934X 0x02 ++#define AR7240_MASK_CTRL_SOFT_RESET BIT(31) ++ ++#define AR7240_REG_MAC_ADDR0 0x20 ++#define AR7240_REG_MAC_ADDR1 0x24 ++ ++#define AR7240_REG_FLOOD_MASK 0x2c ++#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) ++ ++#define AR7240_REG_GLOBAL_CTRL 0x30 ++#define AR7240_GLOBAL_CTRL_MTU_M BITM(11) ++#define AR9340_GLOBAL_CTRL_MTU_M BITM(14) ++ ++#define AR7240_REG_VTU 0x0040 ++#define AR7240_VTU_OP BITM(3) ++#define AR7240_VTU_OP_NOOP 0x0 ++#define AR7240_VTU_OP_FLUSH 0x1 ++#define AR7240_VTU_OP_LOAD 0x2 ++#define AR7240_VTU_OP_PURGE 0x3 ++#define AR7240_VTU_OP_REMOVE_PORT 0x4 ++#define AR7240_VTU_ACTIVE BIT(3) ++#define AR7240_VTU_FULL BIT(4) ++#define AR7240_VTU_PORT BITS(8, 4) ++#define AR7240_VTU_PORT_S 8 ++#define AR7240_VTU_VID BITS(16, 12) ++#define AR7240_VTU_VID_S 16 ++#define AR7240_VTU_PRIO BITS(28, 3) ++#define AR7240_VTU_PRIO_S 28 ++#define AR7240_VTU_PRIO_EN BIT(31) ++ ++#define AR7240_REG_VTU_DATA 0x0044 ++#define AR7240_VTUDATA_MEMBER BITS(0, 10) ++#define AR7240_VTUDATA_VALID BIT(11) ++ ++#define AR7240_REG_ATU 0x50 ++#define AR7240_ATU_FLUSH_ALL 0x1 ++ ++#define AR7240_REG_AT_CTRL 0x5c ++#define AR7240_AT_CTRL_AGE_TIME BITS(0, 15) ++#define AR7240_AT_CTRL_AGE_EN BIT(17) ++#define AR7240_AT_CTRL_LEARN_CHANGE BIT(18) ++#define AR7240_AT_CTRL_RESERVED BIT(19) ++#define AR7240_AT_CTRL_ARP_EN BIT(20) ++ ++#define AR7240_REG_TAG_PRIORITY 0x70 ++ ++#define AR7240_REG_SERVICE_TAG 0x74 ++#define AR7240_SERVICE_TAG_M BITM(16) ++ ++#define AR7240_REG_CPU_PORT 0x78 ++#define AR7240_MIRROR_PORT_S 4 ++#define AR7240_CPU_PORT_EN BIT(8) ++ ++#define AR7240_REG_MIB_FUNCTION0 0x80 ++#define AR7240_MIB_TIMER_M BITM(16) ++#define AR7240_MIB_AT_HALF_EN BIT(16) ++#define AR7240_MIB_BUSY BIT(17) ++#define AR7240_MIB_FUNC_S 24 ++#define AR7240_MIB_FUNC_M BITM(3) ++#define AR7240_MIB_FUNC_NO_OP 0x0 ++#define AR7240_MIB_FUNC_FLUSH 0x1 ++#define AR7240_MIB_FUNC_CAPTURE 0x3 ++ ++#define AR7240_REG_MDIO_CTRL 0x98 ++#define AR7240_MDIO_CTRL_DATA_M BITM(16) ++#define AR7240_MDIO_CTRL_REG_ADDR_S 16 ++#define AR7240_MDIO_CTRL_PHY_ADDR_S 21 ++#define AR7240_MDIO_CTRL_CMD_WRITE 0 ++#define AR7240_MDIO_CTRL_CMD_READ BIT(27) ++#define AR7240_MDIO_CTRL_MASTER_EN BIT(30) ++#define AR7240_MDIO_CTRL_BUSY BIT(31) ++ ++#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) ++ ++#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00) ++#define AR7240_PORT_STATUS_SPEED_S 0 ++#define AR7240_PORT_STATUS_SPEED_M BITM(2) ++#define AR7240_PORT_STATUS_SPEED_10 0 ++#define AR7240_PORT_STATUS_SPEED_100 1 ++#define AR7240_PORT_STATUS_SPEED_1000 2 ++#define AR7240_PORT_STATUS_TXMAC BIT(2) ++#define AR7240_PORT_STATUS_RXMAC BIT(3) ++#define AR7240_PORT_STATUS_TXFLOW BIT(4) ++#define AR7240_PORT_STATUS_RXFLOW BIT(5) ++#define AR7240_PORT_STATUS_DUPLEX BIT(6) ++#define AR7240_PORT_STATUS_LINK_UP BIT(8) ++#define AR7240_PORT_STATUS_LINK_AUTO BIT(9) ++#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10) ++ ++#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04) ++#define AR7240_PORT_CTRL_STATE_M BITM(3) ++#define AR7240_PORT_CTRL_STATE_DISABLED 0 ++#define AR7240_PORT_CTRL_STATE_BLOCK 1 ++#define AR7240_PORT_CTRL_STATE_LISTEN 2 ++#define AR7240_PORT_CTRL_STATE_LEARN 3 ++#define AR7240_PORT_CTRL_STATE_FORWARD 4 ++#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7) ++#define AR7240_PORT_CTRL_VLAN_MODE_S 8 ++#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0 ++#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1 ++#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2 ++#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3 ++#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10) ++#define AR7240_PORT_CTRL_HEADER BIT(11) ++#define AR7240_PORT_CTRL_MAC_LOOP BIT(12) ++#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13) ++#define AR7240_PORT_CTRL_LEARN BIT(14) ++#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15) ++#define AR7240_PORT_CTRL_MIRROR_TX BIT(16) ++#define AR7240_PORT_CTRL_MIRROR_RX BIT(17) ++ ++#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08) ++ ++#define AR7240_PORT_VLAN_DEFAULT_ID_S 0 ++#define AR7240_PORT_VLAN_DEST_PORTS_S 16 ++#define AR7240_PORT_VLAN_MODE_S 30 ++#define AR7240_PORT_VLAN_MODE_PORT_ONLY 0 ++#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK 1 ++#define AR7240_PORT_VLAN_MODE_VLAN_ONLY 2 ++#define AR7240_PORT_VLAN_MODE_SECURE 3 ++ ++ ++#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100) ++ ++#define AR7240_STATS_RXBROAD 0x00 ++#define AR7240_STATS_RXPAUSE 0x04 ++#define AR7240_STATS_RXMULTI 0x08 ++#define AR7240_STATS_RXFCSERR 0x0c ++#define AR7240_STATS_RXALIGNERR 0x10 ++#define AR7240_STATS_RXRUNT 0x14 ++#define AR7240_STATS_RXFRAGMENT 0x18 ++#define AR7240_STATS_RX64BYTE 0x1c ++#define AR7240_STATS_RX128BYTE 0x20 ++#define AR7240_STATS_RX256BYTE 0x24 ++#define AR7240_STATS_RX512BYTE 0x28 ++#define AR7240_STATS_RX1024BYTE 0x2c ++#define AR7240_STATS_RX1518BYTE 0x30 ++#define AR7240_STATS_RXMAXBYTE 0x34 ++#define AR7240_STATS_RXTOOLONG 0x38 ++#define AR7240_STATS_RXGOODBYTE 0x3c ++#define AR7240_STATS_RXBADBYTE 0x44 ++#define AR7240_STATS_RXOVERFLOW 0x4c ++#define AR7240_STATS_FILTERED 0x50 ++#define AR7240_STATS_TXBROAD 0x54 ++#define AR7240_STATS_TXPAUSE 0x58 ++#define AR7240_STATS_TXMULTI 0x5c ++#define AR7240_STATS_TXUNDERRUN 0x60 ++#define AR7240_STATS_TX64BYTE 0x64 ++#define AR7240_STATS_TX128BYTE 0x68 ++#define AR7240_STATS_TX256BYTE 0x6c ++#define AR7240_STATS_TX512BYTE 0x70 ++#define AR7240_STATS_TX1024BYTE 0x74 ++#define AR7240_STATS_TX1518BYTE 0x78 ++#define AR7240_STATS_TXMAXBYTE 0x7c ++#define AR7240_STATS_TXOVERSIZE 0x80 ++#define AR7240_STATS_TXBYTE 0x84 ++#define AR7240_STATS_TXCOLLISION 0x8c ++#define AR7240_STATS_TXABORTCOL 0x90 ++#define AR7240_STATS_TXMULTICOL 0x94 ++#define AR7240_STATS_TXSINGLECOL 0x98 ++#define AR7240_STATS_TXEXCDEFER 0x9c ++#define AR7240_STATS_TXDEFER 0xa0 ++#define AR7240_STATS_TXLATECOL 0xa4 ++ ++#define AR7240_PORT_CPU 0 ++#define AR7240_NUM_PORTS 6 ++#define AR7240_NUM_PHYS 5 ++ ++#define AR7240_PHY_ID1 0x004d ++#define AR7240_PHY_ID2 0xd041 ++ ++#define AR934X_PHY_ID1 0x004d ++#define AR934X_PHY_ID2 0xd042 ++ ++#define AR7240_MAX_VLANS 16 ++ ++#define AR934X_REG_OPER_MODE0 0x04 ++#define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) ++#define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) ++ ++#define AR934X_REG_OPER_MODE1 0x08 ++#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) ++ ++#define AR934X_REG_FLOOD_MASK 0x2c ++#define AR934X_FLOOD_MASK_MC_DP(_p) BIT(16 + (_p)) ++#define AR934X_FLOOD_MASK_BC_DP(_p) BIT(25 + (_p)) ++ ++#define AR934X_REG_QM_CTRL 0x3c ++#define AR934X_QM_CTRL_ARP_EN BIT(15) ++ ++#define AR934X_REG_AT_CTRL 0x5c ++#define AR934X_AT_CTRL_AGE_TIME BITS(0, 15) ++#define AR934X_AT_CTRL_AGE_EN BIT(17) ++#define AR934X_AT_CTRL_LEARN_CHANGE BIT(18) ++ ++#define AR934X_MIB_ENABLE BIT(30) ++ ++#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) ++ ++#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08) ++#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0 ++#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN BIT(12) ++#define AR934X_PORT_VLAN1_PORT_TLS_MODE BIT(13) ++#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN BIT(14) ++#define AR934X_PORT_VLAN1_PORT_CLONE_EN BIT(15) ++#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16 ++#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN BIT(28) ++#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29 ++ ++#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c) ++#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16 ++#define AR934X_PORT_VLAN2_8021Q_MODE_S 30 ++#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0 ++#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1 ++#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2 ++#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3 ++ ++#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) ++ ++struct ar7240sw_port_stat { ++ unsigned long rx_broadcast; ++ unsigned long rx_pause; ++ unsigned long rx_multicast; ++ unsigned long rx_fcs_error; ++ unsigned long rx_align_error; ++ unsigned long rx_runt; ++ unsigned long rx_fragments; ++ unsigned long rx_64byte; ++ unsigned long rx_128byte; ++ unsigned long rx_256byte; ++ unsigned long rx_512byte; ++ unsigned long rx_1024byte; ++ unsigned long rx_1518byte; ++ unsigned long rx_maxbyte; ++ unsigned long rx_toolong; ++ unsigned long rx_good_byte; ++ unsigned long rx_bad_byte; ++ unsigned long rx_overflow; ++ unsigned long filtered; ++ ++ unsigned long tx_broadcast; ++ unsigned long tx_pause; ++ unsigned long tx_multicast; ++ unsigned long tx_underrun; ++ unsigned long tx_64byte; ++ unsigned long tx_128byte; ++ unsigned long tx_256byte; ++ unsigned long tx_512byte; ++ unsigned long tx_1024byte; ++ unsigned long tx_1518byte; ++ unsigned long tx_maxbyte; ++ unsigned long tx_oversize; ++ unsigned long tx_byte; ++ unsigned long tx_collision; ++ unsigned long tx_abortcol; ++ unsigned long tx_multicol; ++ unsigned long tx_singlecol; ++ unsigned long tx_excdefer; ++ unsigned long tx_defer; ++ unsigned long tx_xlatecol; ++}; ++ ++struct ar7240sw { ++ struct mii_bus *mii_bus; ++ struct ag71xx_switch_platform_data *swdata; ++ struct switch_dev swdev; ++ int num_ports; ++ u8 ver; ++ bool vlan; ++ u16 vlan_id[AR7240_MAX_VLANS]; ++ u8 vlan_table[AR7240_MAX_VLANS]; ++ u8 vlan_tagged; ++ u16 pvid[AR7240_NUM_PORTS]; ++ char buf[80]; ++ ++ rwlock_t stats_lock; ++ struct ar7240sw_port_stat port_stats[AR7240_NUM_PORTS]; ++}; ++ ++struct ar7240sw_hw_stat { ++ char string[ETH_GSTRING_LEN]; ++ int sizeof_stat; ++ int reg; ++}; ++ ++static DEFINE_MUTEX(reg_mutex); ++ ++static inline int sw_is_ar7240(struct ar7240sw *as) ++{ ++ return as->ver == AR7240_MASK_CTRL_VERSION_AR7240; ++} ++ ++static inline int sw_is_ar934x(struct ar7240sw *as) ++{ ++ return as->ver == AR7240_MASK_CTRL_VERSION_AR934X; ++} ++ ++static inline u32 ar7240sw_port_mask(struct ar7240sw *as, int port) ++{ ++ return BIT(port); ++} ++ ++static inline u32 ar7240sw_port_mask_all(struct ar7240sw *as) ++{ ++ return BIT(as->swdev.ports) - 1; ++} ++ ++static inline u32 ar7240sw_port_mask_but(struct ar7240sw *as, int port) ++{ ++ return ar7240sw_port_mask_all(as) & ~BIT(port); ++} ++ ++static inline u16 mk_phy_addr(u32 reg) ++{ ++ return 0x17 & ((reg >> 4) | 0x10); ++} ++ ++static inline u16 mk_phy_reg(u32 reg) ++{ ++ return (reg << 1) & 0x1e; ++} ++ ++static inline u16 mk_high_addr(u32 reg) ++{ ++ return (reg >> 7) & 0x1ff; ++} ++ ++static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg) ++{ ++ unsigned long flags; ++ u16 phy_addr; ++ u16 phy_reg; ++ u32 hi, lo; ++ ++ reg = (reg & 0xfffffffc) >> 2; ++ phy_addr = mk_phy_addr(reg); ++ phy_reg = mk_phy_reg(reg); ++ ++ local_irq_save(flags); ++ ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); ++ lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg); ++ hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1); ++ local_irq_restore(flags); ++ ++ return (hi << 16) | lo; ++} ++ ++static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val) ++{ ++ unsigned long flags; ++ u16 phy_addr; ++ u16 phy_reg; ++ ++ reg = (reg & 0xfffffffc) >> 2; ++ phy_addr = mk_phy_addr(reg); ++ phy_reg = mk_phy_reg(reg); ++ ++ local_irq_save(flags); ++ ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); ++ ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16)); ++ ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff)); ++ local_irq_restore(flags); ++} ++ ++static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr) ++{ ++ u32 ret; ++ ++ mutex_lock(®_mutex); ++ ret = __ar7240sw_reg_read(mii, reg_addr); ++ mutex_unlock(®_mutex); ++ ++ return ret; ++} ++ ++static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val) ++{ ++ mutex_lock(®_mutex); ++ __ar7240sw_reg_write(mii, reg_addr, reg_val); ++ mutex_unlock(®_mutex); ++} ++ ++static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val) ++{ ++ u32 t; ++ ++ mutex_lock(®_mutex); ++ t = __ar7240sw_reg_read(mii, reg); ++ t &= ~mask; ++ t |= val; ++ __ar7240sw_reg_write(mii, reg, t); ++ mutex_unlock(®_mutex); ++ ++ return t; ++} ++ ++static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val) ++{ ++ u32 t; ++ ++ mutex_lock(®_mutex); ++ t = __ar7240sw_reg_read(mii, reg); ++ t |= val; ++ __ar7240sw_reg_write(mii, reg, t); ++ mutex_unlock(®_mutex); ++} ++ ++static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, ++ unsigned timeout) ++{ ++ int i; ++ ++ for (i = 0; i < timeout; i++) { ++ u32 t; ++ ++ t = __ar7240sw_reg_read(mii, reg); ++ if ((t & mask) == val) ++ return 0; ++ ++ usleep_range(1000, 2000); ++ } ++ ++ return -ETIMEDOUT; ++} ++ ++static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, ++ unsigned timeout) ++{ ++ int ret; ++ ++ mutex_lock(®_mutex); ++ ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout); ++ mutex_unlock(®_mutex); ++ return ret; ++} ++ ++u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, ++ unsigned reg_addr) ++{ ++ u32 t, val = 0xffff; ++ int err; ++ ++ if (phy_addr >= AR7240_NUM_PHYS) ++ return 0xffff; ++ ++ mutex_lock(®_mutex); ++ t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | ++ (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | ++ AR7240_MDIO_CTRL_MASTER_EN | ++ AR7240_MDIO_CTRL_BUSY | ++ AR7240_MDIO_CTRL_CMD_READ; ++ ++ __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); ++ err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, ++ AR7240_MDIO_CTRL_BUSY, 0, 5); ++ if (!err) ++ val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL); ++ mutex_unlock(®_mutex); ++ ++ return val & AR7240_MDIO_CTRL_DATA_M; ++} ++ ++int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, ++ unsigned reg_addr, u16 reg_val) ++{ ++ u32 t; ++ int ret; ++ ++ if (phy_addr >= AR7240_NUM_PHYS) ++ return -EINVAL; ++ ++ mutex_lock(®_mutex); ++ t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | ++ (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | ++ AR7240_MDIO_CTRL_MASTER_EN | ++ AR7240_MDIO_CTRL_BUSY | ++ AR7240_MDIO_CTRL_CMD_WRITE | ++ reg_val; ++ ++ __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); ++ ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, ++ AR7240_MDIO_CTRL_BUSY, 0, 5); ++ mutex_unlock(®_mutex); ++ ++ return ret; ++} ++ ++static int ar7240sw_capture_stats(struct ar7240sw *as) ++{ ++ struct mii_bus *mii = as->mii_bus; ++ int port; ++ int ret; ++ ++ write_lock(&as->stats_lock); ++ ++ /* Capture the hardware statistics for all ports */ ++ ar7240sw_reg_rmw(mii, AR7240_REG_MIB_FUNCTION0, ++ (AR7240_MIB_FUNC_M << AR7240_MIB_FUNC_S), ++ (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S)); ++ ++ /* Wait for the capturing to complete. */ ++ ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0, ++ AR7240_MIB_BUSY, 0, 10); ++ ++ if (ret) ++ goto unlock; ++ ++ for (port = 0; port < AR7240_NUM_PORTS; port++) { ++ unsigned int base; ++ struct ar7240sw_port_stat *stats; ++ ++ base = AR7240_REG_STATS_BASE(port); ++ stats = &as->port_stats[port]; ++ ++#define READ_STAT(_r) ar7240sw_reg_read(mii, base + AR7240_STATS_ ## _r) ++ ++ stats->rx_good_byte += READ_STAT(RXGOODBYTE); ++ stats->tx_byte += READ_STAT(TXBYTE); ++ ++#undef READ_STAT ++ } ++ ++ ret = 0; ++ ++unlock: ++ write_unlock(&as->stats_lock); ++ return ret; ++} ++ ++static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port) ++{ ++ ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port), ++ AR7240_PORT_CTRL_STATE_DISABLED); ++} ++ ++static void ar7240sw_setup(struct ar7240sw *as) ++{ ++ struct mii_bus *mii = as->mii_bus; ++ ++ /* Enable CPU port, and disable mirror port */ ++ ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT, ++ AR7240_CPU_PORT_EN | ++ (15 << AR7240_MIRROR_PORT_S)); ++ ++ /* Setup TAG priority mapping */ ++ ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50); ++ ++ if (sw_is_ar934x(as)) { ++ /* Enable aging, MAC replacing */ ++ ar7240sw_reg_write(mii, AR934X_REG_AT_CTRL, ++ 0x2b /* 5 min age time */ | ++ AR934X_AT_CTRL_AGE_EN | ++ AR934X_AT_CTRL_LEARN_CHANGE); ++ /* Enable ARP frame acknowledge */ ++ ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL, ++ AR934X_QM_CTRL_ARP_EN); ++ /* Enable Broadcast/Multicast frames transmitted to the CPU */ ++ ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK, ++ AR934X_FLOOD_MASK_BC_DP(0) | ++ AR934X_FLOOD_MASK_MC_DP(0)); ++ ++ /* setup MTU */ ++ ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, ++ AR9340_GLOBAL_CTRL_MTU_M, ++ AR9340_GLOBAL_CTRL_MTU_M); ++ ++ /* Enable MIB counters */ ++ ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0, ++ AR934X_MIB_ENABLE); ++ ++ } else { ++ /* Enable ARP frame acknowledge, aging, MAC replacing */ ++ ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL, ++ AR7240_AT_CTRL_RESERVED | ++ 0x2b /* 5 min age time */ | ++ AR7240_AT_CTRL_AGE_EN | ++ AR7240_AT_CTRL_ARP_EN | ++ AR7240_AT_CTRL_LEARN_CHANGE); ++ /* Enable Broadcast frames transmitted to the CPU */ ++ ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, ++ AR7240_FLOOD_MASK_BROAD_TO_CPU); ++ ++ /* setup MTU */ ++ ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, ++ AR7240_GLOBAL_CTRL_MTU_M, ++ AR7240_GLOBAL_CTRL_MTU_M); ++ } ++ ++ /* setup Service TAG */ ++ ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); ++} ++ ++/* inspired by phy_poll_reset in drivers/net/phy/phy_device.c */ ++static int ++ar7240sw_phy_poll_reset(struct mii_bus *bus) ++{ ++ const unsigned int sleep_msecs = 20; ++ int ret, elapsed, i; ++ ++ for (elapsed = sleep_msecs; elapsed <= 600; ++ elapsed += sleep_msecs) { ++ msleep(sleep_msecs); ++ for (i = 0; i < AR7240_NUM_PHYS; i++) { ++ ret = ar7240sw_phy_read(bus, i, MII_BMCR); ++ if (ret < 0) ++ return ret; ++ if (ret & BMCR_RESET) ++ break; ++ if (i == AR7240_NUM_PHYS - 1) { ++ usleep_range(1000, 2000); ++ return 0; ++ } ++ } ++ } ++ return -ETIMEDOUT; ++} ++ ++static int ar7240sw_reset(struct ar7240sw *as) ++{ ++ struct mii_bus *mii = as->mii_bus; ++ int ret; ++ int i; ++ ++ /* Set all ports to disabled state. */ ++ for (i = 0; i < AR7240_NUM_PORTS; i++) ++ ar7240sw_disable_port(as, i); ++ ++ /* Wait for transmit queues to drain. */ ++ usleep_range(2000, 3000); ++ ++ /* Reset the switch. */ ++ ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL, ++ AR7240_MASK_CTRL_SOFT_RESET); ++ ++ ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, ++ AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); ++ ++ /* setup PHYs */ ++ for (i = 0; i < AR7240_NUM_PHYS; i++) { ++ ar7240sw_phy_write(mii, i, MII_ADVERTISE, ++ ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ++ ADVERTISE_PAUSE_ASYM); ++ ar7240sw_phy_write(mii, i, MII_BMCR, ++ BMCR_RESET | BMCR_ANENABLE); ++ } ++ ret = ar7240sw_phy_poll_reset(mii); ++ if (ret) ++ return ret; ++ ++ ar7240sw_setup(as); ++ return ret; ++} ++ ++static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask) ++{ ++ struct mii_bus *mii = as->mii_bus; ++ u32 ctrl; ++ u32 vid, mode; ++ ++ ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN | ++ AR7240_PORT_CTRL_SINGLE_VLAN; ++ ++ if (port == AR7240_PORT_CPU) { ++ ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), ++ AR7240_PORT_STATUS_SPEED_1000 | ++ AR7240_PORT_STATUS_TXFLOW | ++ AR7240_PORT_STATUS_RXFLOW | ++ AR7240_PORT_STATUS_TXMAC | ++ AR7240_PORT_STATUS_RXMAC | ++ AR7240_PORT_STATUS_DUPLEX); ++ } else { ++ ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), ++ AR7240_PORT_STATUS_LINK_AUTO); ++ } ++ ++ /* Set the default VID for this port */ ++ if (as->vlan) { ++ vid = as->vlan_id[as->pvid[port]]; ++ mode = AR7240_PORT_VLAN_MODE_SECURE; ++ } else { ++ vid = port; ++ mode = AR7240_PORT_VLAN_MODE_PORT_ONLY; ++ } ++ ++ if (as->vlan) { ++ if (as->vlan_tagged & BIT(port)) ++ ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD << ++ AR7240_PORT_CTRL_VLAN_MODE_S; ++ else ++ ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP << ++ AR7240_PORT_CTRL_VLAN_MODE_S; ++ } else { ++ ctrl |= AR7240_PORT_CTRL_VLAN_MODE_KEEP << ++ AR7240_PORT_CTRL_VLAN_MODE_S; ++ } ++ ++ if (!portmask) { ++ if (port == AR7240_PORT_CPU) ++ portmask = ar7240sw_port_mask_but(as, AR7240_PORT_CPU); ++ else ++ portmask = ar7240sw_port_mask(as, AR7240_PORT_CPU); ++ } ++ ++ /* allow the port to talk to all other ports, but exclude its ++ * own ID to prevent frames from being reflected back to the ++ * port that they came from */ ++ portmask &= ar7240sw_port_mask_but(as, port); ++ ++ ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl); ++ if (sw_is_ar934x(as)) { ++ u32 vlan1, vlan2; ++ ++ vlan1 = (vid << AR934X_PORT_VLAN1_DEFAULT_CVID_S); ++ vlan2 = (portmask << AR934X_PORT_VLAN2_PORT_VID_MEM_S) | ++ (mode << AR934X_PORT_VLAN2_8021Q_MODE_S); ++ ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN1(port), vlan1); ++ ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN2(port), vlan2); ++ } else { ++ u32 vlan; ++ ++ vlan = vid | (mode << AR7240_PORT_VLAN_MODE_S) | ++ (portmask << AR7240_PORT_VLAN_DEST_PORTS_S); ++ ++ ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan); ++ } ++} ++ ++static int ar7240_set_addr(struct ar7240sw *as, u8 *addr) ++{ ++ struct mii_bus *mii = as->mii_bus; ++ u32 t; ++ ++ t = (addr[4] << 8) | addr[5]; ++ ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t); ++ ++ t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; ++ ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t); ++ ++ return 0; ++} ++ ++static int ++ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ as->vlan_id[val->port_vlan] = val->value.i; ++ return 0; ++} ++ ++static int ++ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ val->value.i = as->vlan_id[val->port_vlan]; ++ return 0; ++} ++ ++static int ++ar7240_set_pvid(struct switch_dev *dev, int port, int vlan) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ ++ /* make sure no invalid PVIDs get set */ ++ ++ if (vlan >= dev->vlans) ++ return -EINVAL; ++ ++ as->pvid[port] = vlan; ++ return 0; ++} ++ ++static int ++ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ *vlan = as->pvid[port]; ++ return 0; ++} ++ ++static int ++ar7240_get_ports(struct switch_dev *dev, struct switch_val *val) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ u8 ports = as->vlan_table[val->port_vlan]; ++ int i; ++ ++ val->len = 0; ++ for (i = 0; i < as->swdev.ports; i++) { ++ struct switch_port *p; ++ ++ if (!(ports & (1 << i))) ++ continue; ++ ++ p = &val->value.ports[val->len++]; ++ p->id = i; ++ if (as->vlan_tagged & (1 << i)) ++ p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); ++ else ++ p->flags = 0; ++ } ++ return 0; ++} ++ ++static int ++ar7240_set_ports(struct switch_dev *dev, struct switch_val *val) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ u8 *vt = &as->vlan_table[val->port_vlan]; ++ int i, j; ++ ++ *vt = 0; ++ for (i = 0; i < val->len; i++) { ++ struct switch_port *p = &val->value.ports[i]; ++ ++ if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ++ as->vlan_tagged |= (1 << p->id); ++ else { ++ as->vlan_tagged &= ~(1 << p->id); ++ as->pvid[p->id] = val->port_vlan; ++ ++ /* make sure that an untagged port does not ++ * appear in other vlans */ ++ for (j = 0; j < AR7240_MAX_VLANS; j++) { ++ if (j == val->port_vlan) ++ continue; ++ as->vlan_table[j] &= ~(1 << p->id); ++ } ++ } ++ ++ *vt |= 1 << p->id; ++ } ++ return 0; ++} ++ ++static int ++ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ as->vlan = !!val->value.i; ++ return 0; ++} ++ ++static int ++ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ val->value.i = as->vlan; ++ return 0; ++} ++ ++static void ++ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val) ++{ ++ struct mii_bus *mii = as->mii_bus; ++ ++ if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5)) ++ return; ++ ++ if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) { ++ val &= AR7240_VTUDATA_MEMBER; ++ val |= AR7240_VTUDATA_VALID; ++ ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val); ++ } ++ op |= AR7240_VTU_ACTIVE; ++ ar7240sw_reg_write(mii, AR7240_REG_VTU, op); ++} ++ ++static int ++ar7240_hw_apply(struct switch_dev *dev) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ u8 portmask[AR7240_NUM_PORTS]; ++ int i, j; ++ ++ /* flush all vlan translation unit entries */ ++ ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0); ++ ++ memset(portmask, 0, sizeof(portmask)); ++ if (as->vlan) { ++ /* calculate the port destination masks and load vlans ++ * into the vlan translation unit */ ++ for (j = 0; j < AR7240_MAX_VLANS; j++) { ++ u8 vp = as->vlan_table[j]; ++ ++ if (!vp) ++ continue; ++ ++ for (i = 0; i < as->swdev.ports; i++) { ++ u8 mask = (1 << i); ++ if (vp & mask) ++ portmask[i] |= vp & ~mask; ++ } ++ ++ ar7240_vtu_op(as, ++ AR7240_VTU_OP_LOAD | ++ (as->vlan_id[j] << AR7240_VTU_VID_S), ++ as->vlan_table[j]); ++ } ++ } else { ++ /* vlan disabled: ++ * isolate all ports, but connect them to the cpu port */ ++ for (i = 0; i < as->swdev.ports; i++) { ++ if (i == AR7240_PORT_CPU) ++ continue; ++ ++ portmask[i] = 1 << AR7240_PORT_CPU; ++ portmask[AR7240_PORT_CPU] |= (1 << i); ++ } ++ } ++ ++ /* update the port destination mask registers and tag settings */ ++ for (i = 0; i < as->swdev.ports; i++) ++ ar7240sw_setup_port(as, i, portmask[i]); ++ ++ return 0; ++} ++ ++static int ++ar7240_reset_switch(struct switch_dev *dev) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ ar7240sw_reset(as); ++ return 0; ++} ++ ++static int ++ar7240_get_port_link(struct switch_dev *dev, int port, ++ struct switch_port_link *link) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ struct mii_bus *mii = as->mii_bus; ++ u32 status; ++ ++ if (port > AR7240_NUM_PORTS) ++ return -EINVAL; ++ ++ status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); ++ link->aneg = !!(status & AR7240_PORT_STATUS_LINK_AUTO); ++ if (link->aneg) { ++ link->link = !!(status & AR7240_PORT_STATUS_LINK_UP); ++ if (!link->link) ++ return 0; ++ } else { ++ link->link = true; ++ } ++ ++ link->duplex = !!(status & AR7240_PORT_STATUS_DUPLEX); ++ link->tx_flow = !!(status & AR7240_PORT_STATUS_TXFLOW); ++ link->rx_flow = !!(status & AR7240_PORT_STATUS_RXFLOW); ++ switch (status & AR7240_PORT_STATUS_SPEED_M) { ++ case AR7240_PORT_STATUS_SPEED_10: ++ link->speed = SWITCH_PORT_SPEED_10; ++ break; ++ case AR7240_PORT_STATUS_SPEED_100: ++ link->speed = SWITCH_PORT_SPEED_100; ++ break; ++ case AR7240_PORT_STATUS_SPEED_1000: ++ link->speed = SWITCH_PORT_SPEED_1000; ++ break; ++ } ++ ++ return 0; ++} ++ ++static int ++ar7240_get_port_stats(struct switch_dev *dev, int port, ++ struct switch_port_stats *stats) ++{ ++ struct ar7240sw *as = sw_to_ar7240(dev); ++ ++ if (port > AR7240_NUM_PORTS) ++ return -EINVAL; ++ ++ ar7240sw_capture_stats(as); ++ ++ read_lock(&as->stats_lock); ++ stats->rx_bytes = as->port_stats[port].rx_good_byte; ++ stats->tx_bytes = as->port_stats[port].tx_byte; ++ read_unlock(&as->stats_lock); ++ ++ return 0; ++} ++ ++static struct switch_attr ar7240_globals[] = { ++ { ++ .type = SWITCH_TYPE_INT, ++ .name = "enable_vlan", ++ .description = "Enable VLAN mode", ++ .set = ar7240_set_vlan, ++ .get = ar7240_get_vlan, ++ .max = 1 ++ }, ++}; ++ ++static struct switch_attr ar7240_port[] = { ++}; ++ ++static struct switch_attr ar7240_vlan[] = { ++ { ++ .type = SWITCH_TYPE_INT, ++ .name = "vid", ++ .description = "VLAN ID", ++ .set = ar7240_set_vid, ++ .get = ar7240_get_vid, ++ .max = 4094, ++ }, ++}; ++ ++static const struct switch_dev_ops ar7240_ops = { ++ .attr_global = { ++ .attr = ar7240_globals, ++ .n_attr = ARRAY_SIZE(ar7240_globals), ++ }, ++ .attr_port = { ++ .attr = ar7240_port, ++ .n_attr = ARRAY_SIZE(ar7240_port), ++ }, ++ .attr_vlan = { ++ .attr = ar7240_vlan, ++ .n_attr = ARRAY_SIZE(ar7240_vlan), ++ }, ++ .get_port_pvid = ar7240_get_pvid, ++ .set_port_pvid = ar7240_set_pvid, ++ .get_vlan_ports = ar7240_get_ports, ++ .set_vlan_ports = ar7240_set_ports, ++ .apply_config = ar7240_hw_apply, ++ .reset_switch = ar7240_reset_switch, ++ .get_port_link = ar7240_get_port_link, ++ .get_port_stats = ar7240_get_port_stats, ++}; ++ ++static struct ar7240sw *ar7240_probe(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ struct mii_bus *mii = ag->mii_bus; ++ struct ar7240sw *as; ++ struct switch_dev *swdev; ++ u32 ctrl; ++ u16 phy_id1; ++ u16 phy_id2; ++ int i; ++ ++ phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1); ++ phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2); ++ if ((phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) && ++ (phy_id1 != AR934X_PHY_ID1 || phy_id2 != AR934X_PHY_ID2)) { ++ pr_err("%s: unknown phy id '%04x:%04x'\n", ++ dev_name(&mii->dev), phy_id1, phy_id2); ++ return NULL; ++ } ++ ++ as = kzalloc(sizeof(*as), GFP_KERNEL); ++ if (!as) ++ return NULL; ++ ++ as->mii_bus = mii; ++ as->swdata = pdata->switch_data; ++ ++ swdev = &as->swdev; ++ ++ ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL); ++ as->ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & ++ AR7240_MASK_CTRL_VERSION_M; ++ ++ if (sw_is_ar7240(as)) { ++ swdev->name = "AR7240/AR9330 built-in switch"; ++ swdev->ports = AR7240_NUM_PORTS - 1; ++ } else if (sw_is_ar934x(as)) { ++ swdev->name = "AR934X built-in switch"; ++ ++ if (pdata->phy_if_mode == PHY_INTERFACE_MODE_GMII) { ++ ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, ++ AR934X_OPER_MODE0_MAC_GMII_EN); ++ } else if (pdata->phy_if_mode == PHY_INTERFACE_MODE_MII) { ++ ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, ++ AR934X_OPER_MODE0_PHY_MII_EN); ++ } else { ++ pr_err("%s: invalid PHY interface mode\n", ++ dev_name(&mii->dev)); ++ goto err_free; ++ } ++ ++ if (as->swdata->phy4_mii_en) { ++ ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, ++ AR934X_REG_OPER_MODE1_PHY4_MII_EN); ++ swdev->ports = AR7240_NUM_PORTS - 1; ++ } else { ++ swdev->ports = AR7240_NUM_PORTS; ++ } ++ } else { ++ pr_err("%s: unsupported chip, ctrl=%08x\n", ++ dev_name(&mii->dev), ctrl); ++ goto err_free; ++ } ++ ++ swdev->cpu_port = AR7240_PORT_CPU; ++ swdev->vlans = AR7240_MAX_VLANS; ++ swdev->ops = &ar7240_ops; ++ ++ if (register_switch(&as->swdev, ag->dev) < 0) ++ goto err_free; ++ ++ pr_info("%s: Found an %s\n", dev_name(&mii->dev), swdev->name); ++ ++ /* initialize defaults */ ++ for (i = 0; i < AR7240_MAX_VLANS; i++) ++ as->vlan_id[i] = i; ++ ++ as->vlan_table[0] = ar7240sw_port_mask_all(as); ++ ++ return as; ++ ++err_free: ++ kfree(as); ++ return NULL; ++} ++ ++static void link_function(struct work_struct *work) { ++ struct ag71xx *ag = container_of(work, struct ag71xx, link_work.work); ++ struct ar7240sw *as = ag->phy_priv; ++ unsigned long flags; ++ u8 mask; ++ int i; ++ int status = 0; ++ ++ mask = ~as->swdata->phy_poll_mask; ++ for (i = 0; i < AR7240_NUM_PHYS; i++) { ++ int link; ++ ++ if (!(mask & BIT(i))) ++ continue; ++ ++ link = ar7240sw_phy_read(ag->mii_bus, i, MII_BMSR); ++ if (link & BMSR_LSTATUS) { ++ status = 1; ++ break; ++ } ++ } ++ ++ spin_lock_irqsave(&ag->lock, flags); ++ if (status != ag->link) { ++ ag->link = status; ++ ag71xx_link_adjust(ag); ++ } ++ spin_unlock_irqrestore(&ag->lock, flags); ++ ++ schedule_delayed_work(&ag->link_work, HZ / 2); ++} ++ ++void ag71xx_ar7240_start(struct ag71xx *ag) ++{ ++ struct ar7240sw *as = ag->phy_priv; ++ ++ ar7240sw_reset(as); ++ ++ ag->speed = SPEED_1000; ++ ag->duplex = 1; ++ ++ ar7240_set_addr(as, ag->dev->dev_addr); ++ ar7240_hw_apply(&as->swdev); ++ ++ schedule_delayed_work(&ag->link_work, HZ / 10); ++} ++ ++void ag71xx_ar7240_stop(struct ag71xx *ag) ++{ ++ cancel_delayed_work_sync(&ag->link_work); ++} ++ ++int ag71xx_ar7240_init(struct ag71xx *ag) ++{ ++ struct ar7240sw *as; ++ ++ as = ar7240_probe(ag); ++ if (!as) ++ return -ENODEV; ++ ++ ag->phy_priv = as; ++ ar7240sw_reset(as); ++ ++ rwlock_init(&as->stats_lock); ++ INIT_DELAYED_WORK(&ag->link_work, link_function); ++ ++ return 0; ++} ++ ++void ag71xx_ar7240_cleanup(struct ag71xx *ag) ++{ ++ struct ar7240sw *as = ag->phy_priv; ++ ++ if (!as) ++ return; ++ ++ unregister_switch(&as->swdev); ++ kfree(as); ++ ag->phy_priv = NULL; ++} +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,44 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * Special support for the Atheros ar8216 switch chip ++ * ++ * Copyright (C) 2009-2010 Gabor Juhos ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "ag71xx.h" ++ ++#define AR8216_PACKET_TYPE_MASK 0xf ++#define AR8216_PACKET_TYPE_NORMAL 0 ++ ++#define AR8216_HEADER_LEN 2 ++ ++void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) ++{ ++ skb_push(skb, AR8216_HEADER_LEN); ++ skb->data[0] = 0x10; ++ skb->data[1] = 0x80; ++} ++ ++int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, ++ int pktlen) ++{ ++ u8 type; ++ ++ type = skb->data[1] & AR8216_PACKET_TYPE_MASK; ++ switch (type) { ++ case AR8216_PACKET_TYPE_NORMAL: ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ skb_pull(skb, AR8216_HEADER_LEN); ++ return 0; ++} +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,285 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * ++ * Copyright (C) 2008-2010 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++ ++#include "ag71xx.h" ++ ++static struct dentry *ag71xx_debugfs_root; ++ ++static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file) ++{ ++ file->private_data = inode->i_private; ++ return 0; ++} ++ ++void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) ++{ ++ if (status) ++ ag->debug.int_stats.total++; ++ if (status & AG71XX_INT_TX_PS) ++ ag->debug.int_stats.tx_ps++; ++ if (status & AG71XX_INT_TX_UR) ++ ag->debug.int_stats.tx_ur++; ++ if (status & AG71XX_INT_TX_BE) ++ ag->debug.int_stats.tx_be++; ++ if (status & AG71XX_INT_RX_PR) ++ ag->debug.int_stats.rx_pr++; ++ if (status & AG71XX_INT_RX_OF) ++ ag->debug.int_stats.rx_of++; ++ if (status & AG71XX_INT_RX_BE) ++ ag->debug.int_stats.rx_be++; ++} ++ ++static ssize_t read_file_int_stats(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++#define PR_INT_STAT(_label, _field) \ ++ len += snprintf(buf + len, sizeof(buf) - len, \ ++ "%20s: %10lu\n", _label, ag->debug.int_stats._field); ++ ++ struct ag71xx *ag = file->private_data; ++ char buf[256]; ++ unsigned int len = 0; ++ ++ PR_INT_STAT("TX Packet Sent", tx_ps); ++ PR_INT_STAT("TX Underrun", tx_ur); ++ PR_INT_STAT("TX Bus Error", tx_be); ++ PR_INT_STAT("RX Packet Received", rx_pr); ++ PR_INT_STAT("RX Overflow", rx_of); ++ PR_INT_STAT("RX Bus Error", rx_be); ++ len += snprintf(buf + len, sizeof(buf) - len, "\n"); ++ PR_INT_STAT("Total", total); ++ ++ return simple_read_from_buffer(user_buf, count, ppos, buf, len); ++#undef PR_INT_STAT ++} ++ ++static const struct file_operations ag71xx_fops_int_stats = { ++ .open = ag71xx_debugfs_generic_open, ++ .read = read_file_int_stats, ++ .owner = THIS_MODULE ++}; ++ ++void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) ++{ ++ struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; ++ ++ if (rx) { ++ stats->rx_count++; ++ stats->rx_packets += rx; ++ if (rx <= AG71XX_NAPI_WEIGHT) ++ stats->rx[rx]++; ++ if (rx > stats->rx_packets_max) ++ stats->rx_packets_max = rx; ++ } ++ ++ if (tx) { ++ stats->tx_count++; ++ stats->tx_packets += tx; ++ if (tx <= AG71XX_NAPI_WEIGHT) ++ stats->tx[tx]++; ++ if (tx > stats->tx_packets_max) ++ stats->tx_packets_max = tx; ++ } ++} ++ ++static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ struct ag71xx *ag = file->private_data; ++ struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; ++ char *buf; ++ unsigned int buflen; ++ unsigned int len = 0; ++ unsigned long rx_avg = 0; ++ unsigned long tx_avg = 0; ++ int ret; ++ int i; ++ ++ buflen = 2048; ++ buf = kmalloc(buflen, GFP_KERNEL); ++ if (!buf) ++ return -ENOMEM; ++ ++ if (stats->rx_count) ++ rx_avg = stats->rx_packets / stats->rx_count; ++ ++ if (stats->tx_count) ++ tx_avg = stats->tx_packets / stats->tx_count; ++ ++ len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n", ++ "len", "rx", "tx"); ++ ++ for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++) ++ len += snprintf(buf + len, buflen - len, ++ "%3d: %10lu %10lu\n", ++ i, stats->rx[i], stats->tx[i]); ++ ++ len += snprintf(buf + len, buflen - len, "\n"); ++ ++ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", ++ "sum", stats->rx_count, stats->tx_count); ++ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", ++ "avg", rx_avg, tx_avg); ++ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", ++ "max", stats->rx_packets_max, stats->tx_packets_max); ++ len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", ++ "pkt", stats->rx_packets, stats->tx_packets); ++ ++ ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); ++ kfree(buf); ++ ++ return ret; ++} ++ ++static const struct file_operations ag71xx_fops_napi_stats = { ++ .open = ag71xx_debugfs_generic_open, ++ .read = read_file_napi_stats, ++ .owner = THIS_MODULE ++}; ++ ++#define DESC_PRINT_LEN 64 ++ ++static ssize_t read_file_ring(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos, ++ struct ag71xx *ag, ++ struct ag71xx_ring *ring, ++ unsigned desc_reg) ++{ ++ char *buf; ++ unsigned int buflen; ++ unsigned int len = 0; ++ unsigned long flags; ++ ssize_t ret; ++ int curr; ++ int dirty; ++ u32 desc_hw; ++ int i; ++ ++ buflen = (ring->size * DESC_PRINT_LEN); ++ buf = kmalloc(buflen, GFP_KERNEL); ++ if (!buf) ++ return -ENOMEM; ++ ++ len += snprintf(buf + len, buflen - len, ++ "Idx ... %-8s %-8s %-8s %-8s . %-10s\n", ++ "desc", "next", "data", "ctrl", "timestamp"); ++ ++ spin_lock_irqsave(&ag->lock, flags); ++ ++ curr = (ring->curr % ring->size); ++ dirty = (ring->dirty % ring->size); ++ desc_hw = ag71xx_rr(ag, desc_reg); ++ for (i = 0; i < ring->size; i++) { ++ struct ag71xx_buf *ab = &ring->buf[i]; ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); ++ u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size; ++ ++ len += snprintf(buf + len, buflen - len, ++ "%3d %c%c%c %08x %08x %08x %08x %c %10lu\n", ++ i, ++ (i == curr) ? 'C' : ' ', ++ (i == dirty) ? 'D' : ' ', ++ (desc_hw == desc_dma) ? 'H' : ' ', ++ desc_dma, ++ desc->next, ++ desc->data, ++ desc->ctrl, ++ (desc->ctrl & DESC_EMPTY) ? 'E' : '*', ++ ab->timestamp); ++ } ++ ++ spin_unlock_irqrestore(&ag->lock, flags); ++ ++ ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); ++ kfree(buf); ++ ++ return ret; ++} ++ ++static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ struct ag71xx *ag = file->private_data; ++ ++ return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring, ++ AG71XX_REG_TX_DESC); ++} ++ ++static const struct file_operations ag71xx_fops_tx_ring = { ++ .open = ag71xx_debugfs_generic_open, ++ .read = read_file_tx_ring, ++ .owner = THIS_MODULE ++}; ++ ++static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ struct ag71xx *ag = file->private_data; ++ ++ return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring, ++ AG71XX_REG_RX_DESC); ++} ++ ++static const struct file_operations ag71xx_fops_rx_ring = { ++ .open = ag71xx_debugfs_generic_open, ++ .read = read_file_rx_ring, ++ .owner = THIS_MODULE ++}; ++ ++void ag71xx_debugfs_exit(struct ag71xx *ag) ++{ ++ debugfs_remove_recursive(ag->debug.debugfs_dir); ++} ++ ++int ag71xx_debugfs_init(struct ag71xx *ag) ++{ ++ struct device *dev = &ag->pdev->dev; ++ ++ ag->debug.debugfs_dir = debugfs_create_dir(dev_name(dev), ++ ag71xx_debugfs_root); ++ if (!ag->debug.debugfs_dir) { ++ dev_err(dev, "unable to create debugfs directory\n"); ++ return -ENOENT; ++ } ++ ++ debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir, ++ ag, &ag71xx_fops_int_stats); ++ debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir, ++ ag, &ag71xx_fops_napi_stats); ++ debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir, ++ ag, &ag71xx_fops_tx_ring); ++ debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir, ++ ag, &ag71xx_fops_rx_ring); ++ ++ return 0; ++} ++ ++int ag71xx_debugfs_root_init(void) ++{ ++ if (ag71xx_debugfs_root) ++ return -EBUSY; ++ ++ ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); ++ if (!ag71xx_debugfs_root) ++ return -ENOENT; ++ ++ return 0; ++} ++ ++void ag71xx_debugfs_root_exit(void) ++{ ++ debugfs_remove(ag71xx_debugfs_root); ++ ag71xx_debugfs_root = NULL; ++} +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,130 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * ++ * Copyright (C) 2008-2010 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "ag71xx.h" ++ ++static int ag71xx_ethtool_get_settings(struct net_device *dev, ++ struct ethtool_cmd *cmd) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ struct phy_device *phydev = ag->phy_dev; ++ ++ if (!phydev) ++ return -ENODEV; ++ ++ return phy_ethtool_gset(phydev, cmd); ++} ++ ++static int ag71xx_ethtool_set_settings(struct net_device *dev, ++ struct ethtool_cmd *cmd) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ struct phy_device *phydev = ag->phy_dev; ++ ++ if (!phydev) ++ return -ENODEV; ++ ++ return phy_ethtool_sset(phydev, cmd); ++} ++ ++static void ag71xx_ethtool_get_drvinfo(struct net_device *dev, ++ struct ethtool_drvinfo *info) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ strcpy(info->driver, ag->pdev->dev.driver->name); ++ strcpy(info->version, AG71XX_DRV_VERSION); ++ strcpy(info->bus_info, dev_name(&ag->pdev->dev)); ++} ++ ++static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ return ag->msg_enable; ++} ++ ++static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ ag->msg_enable = msg_level; ++} ++ ++static void ag71xx_ethtool_get_ringparam(struct net_device *dev, ++ struct ethtool_ringparam *er) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX; ++ er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX; ++ er->rx_mini_max_pending = 0; ++ er->rx_jumbo_max_pending = 0; ++ ++ er->tx_pending = ag->tx_ring.size; ++ er->rx_pending = ag->rx_ring.size; ++ er->rx_mini_pending = 0; ++ er->rx_jumbo_pending = 0; ++ ++ if (ag->tx_ring.desc_split) ++ er->tx_pending /= AG71XX_TX_RING_DS_PER_PKT; ++} ++ ++static int ag71xx_ethtool_set_ringparam(struct net_device *dev, ++ struct ethtool_ringparam *er) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ unsigned tx_size; ++ unsigned rx_size; ++ int err; ++ ++ if (er->rx_mini_pending != 0|| ++ er->rx_jumbo_pending != 0 || ++ er->rx_pending == 0 || ++ er->tx_pending == 0) ++ return -EINVAL; ++ ++ tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ? ++ er->tx_pending : AG71XX_TX_RING_SIZE_MAX; ++ ++ rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ? ++ er->rx_pending : AG71XX_RX_RING_SIZE_MAX; ++ ++ if (netif_running(dev)) { ++ err = dev->netdev_ops->ndo_stop(dev); ++ if (err) ++ return err; ++ } ++ ++ if (ag->tx_ring.desc_split) ++ tx_size *= AG71XX_TX_RING_DS_PER_PKT; ++ ++ ag->tx_ring.size = tx_size; ++ ag->rx_ring.size = rx_size; ++ ++ if (netif_running(dev)) ++ err = dev->netdev_ops->ndo_open(dev); ++ ++ return err; ++} ++ ++struct ethtool_ops ag71xx_ethtool_ops = { ++ .set_settings = ag71xx_ethtool_set_settings, ++ .get_settings = ag71xx_ethtool_get_settings, ++ .get_drvinfo = ag71xx_ethtool_get_drvinfo, ++ .get_msglevel = ag71xx_ethtool_get_msglevel, ++ .set_msglevel = ag71xx_ethtool_set_msglevel, ++ .get_ringparam = ag71xx_ethtool_get_ringparam, ++ .set_ringparam = ag71xx_ethtool_set_ringparam, ++ .get_link = ethtool_op_get_link, ++}; +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx.h linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx.h 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,485 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * ++ * Copyright (C) 2008-2010 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __AG71XX_H ++#define __AG71XX_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#define AG71XX_DRV_NAME "ag71xx" ++#define AG71XX_DRV_VERSION "0.5.35" ++ ++#define AG71XX_NAPI_WEIGHT 64 ++#define AG71XX_OOM_REFILL (1 + HZ/10) ++ ++#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE) ++#define AG71XX_INT_TX (AG71XX_INT_TX_PS) ++#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF) ++ ++#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX) ++#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL) ++ ++#define AG71XX_TX_MTU_LEN 1540 ++ ++#define AG71XX_TX_RING_SPLIT 512 ++#define AG71XX_TX_RING_DS_PER_PKT DIV_ROUND_UP(AG71XX_TX_MTU_LEN, \ ++ AG71XX_TX_RING_SPLIT) ++#define AG71XX_TX_RING_SIZE_DEFAULT 48 ++#define AG71XX_RX_RING_SIZE_DEFAULT 128 ++ ++#define AG71XX_TX_RING_SIZE_MAX 48 ++#define AG71XX_RX_RING_SIZE_MAX 128 ++ ++#ifdef CONFIG_AG71XX_DEBUG ++#define DBG(fmt, args...) pr_debug(fmt, ## args) ++#else ++#define DBG(fmt, args...) do {} while (0) ++#endif ++ ++#define ag71xx_assert(_cond) \ ++do { \ ++ if (_cond) \ ++ break; \ ++ printk("%s,%d: assertion failed\n", __FILE__, __LINE__); \ ++ BUG(); \ ++} while (0) ++ ++struct ag71xx_desc { ++ u32 data; ++ u32 ctrl; ++#define DESC_EMPTY BIT(31) ++#define DESC_MORE BIT(24) ++#define DESC_PKTLEN_M 0xfff ++ u32 next; ++ u32 pad; ++} __attribute__((aligned(4))); ++ ++struct ag71xx_buf { ++ union { ++ struct sk_buff *skb; ++ void *rx_buf; ++ }; ++ union { ++ dma_addr_t dma_addr; ++ unsigned long timestamp; ++ }; ++ unsigned int len; ++}; ++ ++struct ag71xx_ring { ++ struct ag71xx_buf *buf; ++ u8 *descs_cpu; ++ dma_addr_t descs_dma; ++ u16 desc_split; ++ u16 desc_size; ++ unsigned int curr; ++ unsigned int dirty; ++ unsigned int size; ++}; ++ ++struct ag71xx_mdio { ++ struct mii_bus *mii_bus; ++ int mii_irq[PHY_MAX_ADDR]; ++ void __iomem *mdio_base; ++ struct ag71xx_mdio_platform_data *pdata; ++}; ++ ++struct ag71xx_int_stats { ++ unsigned long rx_pr; ++ unsigned long rx_be; ++ unsigned long rx_of; ++ unsigned long tx_ps; ++ unsigned long tx_be; ++ unsigned long tx_ur; ++ unsigned long total; ++}; ++ ++struct ag71xx_napi_stats { ++ unsigned long napi_calls; ++ unsigned long rx_count; ++ unsigned long rx_packets; ++ unsigned long rx_packets_max; ++ unsigned long tx_count; ++ unsigned long tx_packets; ++ unsigned long tx_packets_max; ++ ++ unsigned long rx[AG71XX_NAPI_WEIGHT + 1]; ++ unsigned long tx[AG71XX_NAPI_WEIGHT + 1]; ++}; ++ ++struct ag71xx_debug { ++ struct dentry *debugfs_dir; ++ ++ struct ag71xx_int_stats int_stats; ++ struct ag71xx_napi_stats napi_stats; ++}; ++ ++struct ag71xx { ++ void __iomem *mac_base; ++ ++ spinlock_t lock; ++ struct platform_device *pdev; ++ struct net_device *dev; ++ struct napi_struct napi; ++ u32 msg_enable; ++ ++ struct ag71xx_desc *stop_desc; ++ dma_addr_t stop_desc_dma; ++ ++ struct ag71xx_ring rx_ring; ++ struct ag71xx_ring tx_ring; ++ ++ struct mii_bus *mii_bus; ++ struct phy_device *phy_dev; ++ void *phy_priv; ++ ++ unsigned int link; ++ unsigned int speed; ++ int duplex; ++ ++ unsigned int max_frame_len; ++ unsigned int desc_pktlen_mask; ++ unsigned int rx_buf_size; ++ ++ struct work_struct restart_work; ++ struct delayed_work link_work; ++ struct timer_list oom_timer; ++ ++#ifdef CONFIG_AG71XX_DEBUG_FS ++ struct ag71xx_debug debug; ++#endif ++}; ++ ++extern struct ethtool_ops ag71xx_ethtool_ops; ++void ag71xx_link_adjust(struct ag71xx *ag); ++ ++int ag71xx_mdio_driver_init(void) __init; ++void ag71xx_mdio_driver_exit(void); ++ ++int ag71xx_phy_connect(struct ag71xx *ag); ++void ag71xx_phy_disconnect(struct ag71xx *ag); ++void ag71xx_phy_start(struct ag71xx *ag); ++void ag71xx_phy_stop(struct ag71xx *ag); ++ ++static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag) ++{ ++ return ag->pdev->dev.platform_data; ++} ++ ++static inline int ag71xx_desc_empty(struct ag71xx_desc *desc) ++{ ++ return (desc->ctrl & DESC_EMPTY) != 0; ++} ++ ++static inline struct ag71xx_desc * ++ag71xx_ring_desc(struct ag71xx_ring *ring, int idx) ++{ ++ return (struct ag71xx_desc *) &ring->descs_cpu[idx * ring->desc_size]; ++} ++ ++/* Register offsets */ ++#define AG71XX_REG_MAC_CFG1 0x0000 ++#define AG71XX_REG_MAC_CFG2 0x0004 ++#define AG71XX_REG_MAC_IPG 0x0008 ++#define AG71XX_REG_MAC_HDX 0x000c ++#define AG71XX_REG_MAC_MFL 0x0010 ++#define AG71XX_REG_MII_CFG 0x0020 ++#define AG71XX_REG_MII_CMD 0x0024 ++#define AG71XX_REG_MII_ADDR 0x0028 ++#define AG71XX_REG_MII_CTRL 0x002c ++#define AG71XX_REG_MII_STATUS 0x0030 ++#define AG71XX_REG_MII_IND 0x0034 ++#define AG71XX_REG_MAC_IFCTL 0x0038 ++#define AG71XX_REG_MAC_ADDR1 0x0040 ++#define AG71XX_REG_MAC_ADDR2 0x0044 ++#define AG71XX_REG_FIFO_CFG0 0x0048 ++#define AG71XX_REG_FIFO_CFG1 0x004c ++#define AG71XX_REG_FIFO_CFG2 0x0050 ++#define AG71XX_REG_FIFO_CFG3 0x0054 ++#define AG71XX_REG_FIFO_CFG4 0x0058 ++#define AG71XX_REG_FIFO_CFG5 0x005c ++#define AG71XX_REG_FIFO_RAM0 0x0060 ++#define AG71XX_REG_FIFO_RAM1 0x0064 ++#define AG71XX_REG_FIFO_RAM2 0x0068 ++#define AG71XX_REG_FIFO_RAM3 0x006c ++#define AG71XX_REG_FIFO_RAM4 0x0070 ++#define AG71XX_REG_FIFO_RAM5 0x0074 ++#define AG71XX_REG_FIFO_RAM6 0x0078 ++#define AG71XX_REG_FIFO_RAM7 0x007c ++ ++#define AG71XX_REG_TX_CTRL 0x0180 ++#define AG71XX_REG_TX_DESC 0x0184 ++#define AG71XX_REG_TX_STATUS 0x0188 ++#define AG71XX_REG_RX_CTRL 0x018c ++#define AG71XX_REG_RX_DESC 0x0190 ++#define AG71XX_REG_RX_STATUS 0x0194 ++#define AG71XX_REG_INT_ENABLE 0x0198 ++#define AG71XX_REG_INT_STATUS 0x019c ++ ++#define AG71XX_REG_FIFO_DEPTH 0x01a8 ++#define AG71XX_REG_RX_SM 0x01b0 ++#define AG71XX_REG_TX_SM 0x01b4 ++ ++#define MAC_CFG1_TXE BIT(0) /* Tx Enable */ ++#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */ ++#define MAC_CFG1_RXE BIT(2) /* Rx Enable */ ++#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */ ++#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */ ++#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */ ++#define MAC_CFG1_LB BIT(8) /* Loopback mode */ ++#define MAC_CFG1_SR BIT(31) /* Soft Reset */ ++ ++#define MAC_CFG2_FDX BIT(0) ++#define MAC_CFG2_CRC_EN BIT(1) ++#define MAC_CFG2_PAD_CRC_EN BIT(2) ++#define MAC_CFG2_LEN_CHECK BIT(4) ++#define MAC_CFG2_HUGE_FRAME_EN BIT(5) ++#define MAC_CFG2_IF_1000 BIT(9) ++#define MAC_CFG2_IF_10_100 BIT(8) ++ ++#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */ ++#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */ ++#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */ ++#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */ ++#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */ ++#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \ ++ | FIFO_CFG0_TXS | FIFO_CFG0_TXF) ++ ++#define FIFO_CFG0_ENABLE_SHIFT 8 ++ ++#define FIFO_CFG4_DE BIT(0) /* Drop Event */ ++#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */ ++#define FIFO_CFG4_FC BIT(2) /* False Carrier */ ++#define FIFO_CFG4_CE BIT(3) /* Code Error */ ++#define FIFO_CFG4_CR BIT(4) /* CRC error */ ++#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */ ++#define FIFO_CFG4_LO BIT(6) /* Length out of range */ ++#define FIFO_CFG4_OK BIT(7) /* Packet is OK */ ++#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */ ++#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */ ++#define FIFO_CFG4_DR BIT(10) /* Dribble */ ++#define FIFO_CFG4_LE BIT(11) /* Long Event */ ++#define FIFO_CFG4_CF BIT(12) /* Control Frame */ ++#define FIFO_CFG4_PF BIT(13) /* Pause Frame */ ++#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */ ++#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */ ++#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */ ++#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */ ++ ++#define FIFO_CFG5_DE BIT(0) /* Drop Event */ ++#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */ ++#define FIFO_CFG5_FC BIT(2) /* False Carrier */ ++#define FIFO_CFG5_CE BIT(3) /* Code Error */ ++#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */ ++#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */ ++#define FIFO_CFG5_OK BIT(6) /* Packet is OK */ ++#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */ ++#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */ ++#define FIFO_CFG5_DR BIT(9) /* Dribble */ ++#define FIFO_CFG5_CF BIT(10) /* Control Frame */ ++#define FIFO_CFG5_PF BIT(11) /* Pause Frame */ ++#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */ ++#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */ ++#define FIFO_CFG5_LE BIT(14) /* Long Event */ ++#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */ ++#define FIFO_CFG5_16 BIT(16) /* unknown */ ++#define FIFO_CFG5_17 BIT(17) /* unknown */ ++#define FIFO_CFG5_SF BIT(18) /* Short Frame */ ++#define FIFO_CFG5_BM BIT(19) /* Byte Mode */ ++ ++#define AG71XX_INT_TX_PS BIT(0) ++#define AG71XX_INT_TX_UR BIT(1) ++#define AG71XX_INT_TX_BE BIT(3) ++#define AG71XX_INT_RX_PR BIT(4) ++#define AG71XX_INT_RX_OF BIT(6) ++#define AG71XX_INT_RX_BE BIT(7) ++ ++#define MAC_IFCTL_SPEED BIT(16) ++ ++#define MII_CFG_CLK_DIV_4 0 ++#define MII_CFG_CLK_DIV_6 2 ++#define MII_CFG_CLK_DIV_8 3 ++#define MII_CFG_CLK_DIV_10 4 ++#define MII_CFG_CLK_DIV_14 5 ++#define MII_CFG_CLK_DIV_20 6 ++#define MII_CFG_CLK_DIV_28 7 ++#define MII_CFG_CLK_DIV_34 8 ++#define MII_CFG_CLK_DIV_42 9 ++#define MII_CFG_CLK_DIV_50 10 ++#define MII_CFG_CLK_DIV_58 11 ++#define MII_CFG_CLK_DIV_66 12 ++#define MII_CFG_CLK_DIV_74 13 ++#define MII_CFG_CLK_DIV_82 14 ++#define MII_CFG_CLK_DIV_98 15 ++#define MII_CFG_RESET BIT(31) ++ ++#define MII_CMD_WRITE 0x0 ++#define MII_CMD_READ 0x1 ++#define MII_ADDR_SHIFT 8 ++#define MII_IND_BUSY BIT(0) ++#define MII_IND_INVALID BIT(2) ++ ++#define TX_CTRL_TXE BIT(0) /* Tx Enable */ ++ ++#define TX_STATUS_PS BIT(0) /* Packet Sent */ ++#define TX_STATUS_UR BIT(1) /* Tx Underrun */ ++#define TX_STATUS_BE BIT(3) /* Bus Error */ ++ ++#define RX_CTRL_RXE BIT(0) /* Rx Enable */ ++ ++#define RX_STATUS_PR BIT(0) /* Packet Received */ ++#define RX_STATUS_OF BIT(2) /* Rx Overflow */ ++#define RX_STATUS_BE BIT(3) /* Bus Error */ ++ ++static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg) ++{ ++ switch (reg) { ++ case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: ++ case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_TX_SM: ++ case AG71XX_REG_MII_CFG: ++ break; ++ ++ default: ++ BUG(); ++ } ++} ++ ++static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) ++{ ++ ag71xx_check_reg_offset(ag, reg); ++ ++ __raw_writel(value, ag->mac_base + reg); ++ /* flush write */ ++ (void) __raw_readl(ag->mac_base + reg); ++} ++ ++static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) ++{ ++ ag71xx_check_reg_offset(ag, reg); ++ ++ return __raw_readl(ag->mac_base + reg); ++} ++ ++static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) ++{ ++ void __iomem *r; ++ ++ ag71xx_check_reg_offset(ag, reg); ++ ++ r = ag->mac_base + reg; ++ __raw_writel(__raw_readl(r) | mask, r); ++ /* flush write */ ++ (void)__raw_readl(r); ++} ++ ++static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) ++{ ++ void __iomem *r; ++ ++ ag71xx_check_reg_offset(ag, reg); ++ ++ r = ag->mac_base + reg; ++ __raw_writel(__raw_readl(r) & ~mask, r); ++ /* flush write */ ++ (void) __raw_readl(r); ++} ++ ++static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints) ++{ ++ ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); ++} ++ ++static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) ++{ ++ ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); ++} ++ ++#ifdef CONFIG_AG71XX_AR8216_SUPPORT ++void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); ++int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, ++ int pktlen); ++static inline int ag71xx_has_ar8216(struct ag71xx *ag) ++{ ++ return ag71xx_get_pdata(ag)->has_ar8216; ++} ++#else ++static inline void ag71xx_add_ar8216_header(struct ag71xx *ag, ++ struct sk_buff *skb) ++{ ++} ++ ++static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag, ++ struct sk_buff *skb, ++ int pktlen) ++{ ++ return 0; ++} ++static inline int ag71xx_has_ar8216(struct ag71xx *ag) ++{ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_AG71XX_DEBUG_FS ++int ag71xx_debugfs_root_init(void); ++void ag71xx_debugfs_root_exit(void); ++int ag71xx_debugfs_init(struct ag71xx *ag); ++void ag71xx_debugfs_exit(struct ag71xx *ag); ++void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status); ++void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx); ++#else ++static inline int ag71xx_debugfs_root_init(void) { return 0; } ++static inline void ag71xx_debugfs_root_exit(void) {} ++static inline int ag71xx_debugfs_init(struct ag71xx *ag) { return 0; } ++static inline void ag71xx_debugfs_exit(struct ag71xx *ag) {} ++static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, ++ u32 status) {} ++static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, ++ int rx, int tx) {} ++#endif /* CONFIG_AG71XX_DEBUG_FS */ ++ ++void ag71xx_ar7240_start(struct ag71xx *ag); ++void ag71xx_ar7240_stop(struct ag71xx *ag); ++int ag71xx_ar7240_init(struct ag71xx *ag); ++void ag71xx_ar7240_cleanup(struct ag71xx *ag); ++ ++int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg); ++void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val); ++ ++u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, ++ unsigned reg_addr); ++int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, ++ unsigned reg_addr, u16 reg_val); ++ ++#endif /* _AG71XX_H */ +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,1406 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * ++ * Copyright (C) 2008-2010 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "ag71xx.h" ++ ++#define AG71XX_DEFAULT_MSG_ENABLE \ ++ (NETIF_MSG_DRV \ ++ | NETIF_MSG_PROBE \ ++ | NETIF_MSG_LINK \ ++ | NETIF_MSG_TIMER \ ++ | NETIF_MSG_IFDOWN \ ++ | NETIF_MSG_IFUP \ ++ | NETIF_MSG_RX_ERR \ ++ | NETIF_MSG_TX_ERR) ++ ++static int ag71xx_msg_level = -1; ++ ++module_param_named(msg_level, ag71xx_msg_level, int, 0); ++MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); ++ ++#define ETH_SWITCH_HEADER_LEN 2 ++ ++static inline unsigned int ag71xx_max_frame_len(unsigned int mtu) ++{ ++ return ETH_SWITCH_HEADER_LEN + ETH_HLEN + VLAN_HLEN + mtu + ETH_FCS_LEN; ++} ++ ++static void ag71xx_dump_dma_regs(struct ag71xx *ag) ++{ ++ DBG("%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_TX_CTRL), ++ ag71xx_rr(ag, AG71XX_REG_TX_DESC), ++ ag71xx_rr(ag, AG71XX_REG_TX_STATUS)); ++ ++ DBG("%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_RX_CTRL), ++ ag71xx_rr(ag, AG71XX_REG_RX_DESC), ++ ag71xx_rr(ag, AG71XX_REG_RX_STATUS)); ++} ++ ++static void ag71xx_dump_regs(struct ag71xx *ag) ++{ ++ DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_MAC_CFG1), ++ ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), ++ ag71xx_rr(ag, AG71XX_REG_MAC_IPG), ++ ag71xx_rr(ag, AG71XX_REG_MAC_HDX), ++ ag71xx_rr(ag, AG71XX_REG_MAC_MFL)); ++ DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), ++ ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1), ++ ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2)); ++ DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); ++ DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); ++} ++ ++static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr) ++{ ++ DBG("%s: %s intr=%08x %s%s%s%s%s%s\n", ++ ag->dev->name, label, intr, ++ (intr & AG71XX_INT_TX_PS) ? "TXPS " : "", ++ (intr & AG71XX_INT_TX_UR) ? "TXUR " : "", ++ (intr & AG71XX_INT_TX_BE) ? "TXBE " : "", ++ (intr & AG71XX_INT_RX_PR) ? "RXPR " : "", ++ (intr & AG71XX_INT_RX_OF) ? "RXOF " : "", ++ (intr & AG71XX_INT_RX_BE) ? "RXBE " : ""); ++} ++ ++static void ag71xx_ring_free(struct ag71xx_ring *ring) ++{ ++ kfree(ring->buf); ++ ++ if (ring->descs_cpu) ++ dma_free_coherent(NULL, ring->size * ring->desc_size, ++ ring->descs_cpu, ring->descs_dma); ++} ++ ++static int ag71xx_ring_alloc(struct ag71xx_ring *ring) ++{ ++ int err; ++ ++ ring->desc_size = sizeof(struct ag71xx_desc); ++ if (ring->desc_size % cache_line_size()) { ++ DBG("ag71xx: ring %p, desc size %u rounded to %u\n", ++ ring, ring->desc_size, ++ roundup(ring->desc_size, cache_line_size())); ++ ring->desc_size = roundup(ring->desc_size, cache_line_size()); ++ } ++ ++ ring->descs_cpu = dma_alloc_coherent(NULL, ring->size * ring->desc_size, ++ &ring->descs_dma, GFP_ATOMIC); ++ if (!ring->descs_cpu) { ++ err = -ENOMEM; ++ goto err; ++ } ++ ++ ++ ring->buf = kzalloc(ring->size * sizeof(*ring->buf), GFP_KERNEL); ++ if (!ring->buf) { ++ err = -ENOMEM; ++ goto err; ++ } ++ ++ return 0; ++ ++err: ++ return err; ++} ++ ++static void ag71xx_ring_tx_clean(struct ag71xx *ag) ++{ ++ struct ag71xx_ring *ring = &ag->tx_ring; ++ struct net_device *dev = ag->dev; ++ u32 bytes_compl = 0, pkts_compl = 0; ++ ++ while (ring->curr != ring->dirty) { ++ struct ag71xx_desc *desc; ++ u32 i = ring->dirty % ring->size; ++ ++ desc = ag71xx_ring_desc(ring, i); ++ if (!ag71xx_desc_empty(desc)) { ++ desc->ctrl = 0; ++ dev->stats.tx_errors++; ++ } ++ ++ if (ring->buf[i].skb) { ++ bytes_compl += ring->buf[i].len; ++ pkts_compl++; ++ dev_kfree_skb_any(ring->buf[i].skb); ++ } ++ ring->buf[i].skb = NULL; ++ ring->dirty++; ++ } ++ ++ /* flush descriptors */ ++ wmb(); ++ ++ netdev_completed_queue(dev, pkts_compl, bytes_compl); ++} ++ ++static void ag71xx_ring_tx_init(struct ag71xx *ag) ++{ ++ struct ag71xx_ring *ring = &ag->tx_ring; ++ int i; ++ ++ for (i = 0; i < ring->size; i++) { ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); ++ ++ desc->next = (u32) (ring->descs_dma + ++ ring->desc_size * ((i + 1) % ring->size)); ++ ++ desc->ctrl = DESC_EMPTY; ++ ring->buf[i].skb = NULL; ++ } ++ ++ /* flush descriptors */ ++ wmb(); ++ ++ ring->curr = 0; ++ ring->dirty = 0; ++ netdev_reset_queue(ag->dev); ++} ++ ++static void ag71xx_ring_rx_clean(struct ag71xx *ag) ++{ ++ struct ag71xx_ring *ring = &ag->rx_ring; ++ int i; ++ ++ if (!ring->buf) ++ return; ++ ++ for (i = 0; i < ring->size; i++) ++ if (ring->buf[i].rx_buf) { ++ dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr, ++ ag->rx_buf_size, DMA_FROM_DEVICE); ++ kfree(ring->buf[i].rx_buf); ++ } ++} ++ ++static int ag71xx_buffer_offset(struct ag71xx *ag) ++{ ++ int offset = NET_SKB_PAD; ++ ++ /* ++ * On AR71xx/AR91xx packets must be 4-byte aligned. ++ * ++ * When using builtin AR8216 support, hardware adds a 2-byte header, ++ * so we don't need any extra alignment in that case. ++ */ ++ if (!ag71xx_get_pdata(ag)->is_ar724x || ag71xx_has_ar8216(ag)) ++ return offset; ++ ++ return offset + NET_IP_ALIGN; ++} ++ ++static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf, ++ int offset) ++{ ++ struct ag71xx_ring *ring = &ag->rx_ring; ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, buf - &ring->buf[0]); ++ void *data; ++ ++ data = kmalloc(ag->rx_buf_size + ++ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)), ++ GFP_ATOMIC); ++ if (!data) ++ return false; ++ ++ buf->rx_buf = data; ++ buf->dma_addr = dma_map_single(&ag->dev->dev, data, ag->rx_buf_size, ++ DMA_FROM_DEVICE); ++ desc->data = (u32) buf->dma_addr + offset; ++ return true; ++} ++ ++static int ag71xx_ring_rx_init(struct ag71xx *ag) ++{ ++ struct ag71xx_ring *ring = &ag->rx_ring; ++ unsigned int i; ++ int ret; ++ int offset = ag71xx_buffer_offset(ag); ++ ++ ret = 0; ++ for (i = 0; i < ring->size; i++) { ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); ++ ++ desc->next = (u32) (ring->descs_dma + ++ ring->desc_size * ((i + 1) % ring->size)); ++ ++ DBG("ag71xx: RX desc at %p, next is %08x\n", ++ desc, desc->next); ++ } ++ ++ for (i = 0; i < ring->size; i++) { ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); ++ ++ if (!ag71xx_fill_rx_buf(ag, &ring->buf[i], offset)) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ desc->ctrl = DESC_EMPTY; ++ } ++ ++ /* flush descriptors */ ++ wmb(); ++ ++ ring->curr = 0; ++ ring->dirty = 0; ++ ++ return ret; ++} ++ ++static int ag71xx_ring_rx_refill(struct ag71xx *ag) ++{ ++ struct ag71xx_ring *ring = &ag->rx_ring; ++ unsigned int count; ++ int offset = ag71xx_buffer_offset(ag); ++ ++ count = 0; ++ for (; ring->curr - ring->dirty > 0; ring->dirty++) { ++ struct ag71xx_desc *desc; ++ unsigned int i; ++ ++ i = ring->dirty % ring->size; ++ desc = ag71xx_ring_desc(ring, i); ++ ++ if (!ring->buf[i].rx_buf && ++ !ag71xx_fill_rx_buf(ag, &ring->buf[i], offset)) ++ break; ++ ++ desc->ctrl = DESC_EMPTY; ++ count++; ++ } ++ ++ /* flush descriptors */ ++ wmb(); ++ ++ DBG("%s: %u rx descriptors refilled\n", ag->dev->name, count); ++ ++ return count; ++} ++ ++static int ag71xx_rings_init(struct ag71xx *ag) ++{ ++ int ret; ++ ++ ret = ag71xx_ring_alloc(&ag->tx_ring); ++ if (ret) ++ return ret; ++ ++ ag71xx_ring_tx_init(ag); ++ ++ ret = ag71xx_ring_alloc(&ag->rx_ring); ++ if (ret) ++ return ret; ++ ++ ret = ag71xx_ring_rx_init(ag); ++ return ret; ++} ++ ++static void ag71xx_rings_cleanup(struct ag71xx *ag) ++{ ++ ag71xx_ring_rx_clean(ag); ++ ag71xx_ring_free(&ag->rx_ring); ++ ++ ag71xx_ring_tx_clean(ag); ++ netdev_reset_queue(ag->dev); ++ ag71xx_ring_free(&ag->tx_ring); ++} ++ ++static unsigned char *ag71xx_speed_str(struct ag71xx *ag) ++{ ++ switch (ag->speed) { ++ case SPEED_1000: ++ return "1000"; ++ case SPEED_100: ++ return "100"; ++ case SPEED_10: ++ return "10"; ++ } ++ ++ return "?"; ++} ++ ++static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) ++{ ++ u32 t; ++ ++ t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16) ++ | (((u32) mac[3]) << 8) | ((u32) mac[2]); ++ ++ ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); ++ ++ t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16); ++ ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); ++} ++ ++static void ag71xx_dma_reset(struct ag71xx *ag) ++{ ++ u32 val; ++ int i; ++ ++ ag71xx_dump_dma_regs(ag); ++ ++ /* stop RX and TX */ ++ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); ++ ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); ++ ++ /* ++ * give the hardware some time to really stop all rx/tx activity ++ * clearing the descriptors too early causes random memory corruption ++ */ ++ mdelay(1); ++ ++ /* clear descriptor addresses */ ++ ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); ++ ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); ++ ++ /* clear pending RX/TX interrupts */ ++ for (i = 0; i < 256; i++) { ++ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); ++ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); ++ } ++ ++ /* clear pending errors */ ++ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); ++ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); ++ ++ val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); ++ if (val) ++ pr_alert("%s: unable to clear DMA Rx status: %08x\n", ++ ag->dev->name, val); ++ ++ val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); ++ ++ /* mask out reserved bits */ ++ val &= ~0xff000000; ++ ++ if (val) ++ pr_alert("%s: unable to clear DMA Tx status: %08x\n", ++ ag->dev->name, val); ++ ++ ag71xx_dump_dma_regs(ag); ++} ++ ++#define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \ ++ MAC_CFG1_SRX | MAC_CFG1_STX) ++ ++#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT) ++ ++#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \ ++ FIFO_CFG4_CE | FIFO_CFG4_CR | FIFO_CFG4_LM | \ ++ FIFO_CFG4_LO | FIFO_CFG4_OK | FIFO_CFG4_MC | \ ++ FIFO_CFG4_BC | FIFO_CFG4_DR | FIFO_CFG4_LE | \ ++ FIFO_CFG4_CF | FIFO_CFG4_PF | FIFO_CFG4_UO | \ ++ FIFO_CFG4_VT) ++ ++#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \ ++ FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \ ++ FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \ ++ FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \ ++ FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \ ++ FIFO_CFG5_17 | FIFO_CFG5_SF) ++ ++static void ag71xx_hw_stop(struct ag71xx *ag) ++{ ++ /* disable all interrupts and stop the rx/tx engine */ ++ ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); ++ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); ++ ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); ++} ++ ++static void ag71xx_hw_setup(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ ++ /* setup MAC configuration registers */ ++ ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT); ++ ++ ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, ++ MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK); ++ ++ /* setup max frame length to zero */ ++ ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0); ++ ++ /* setup FIFO configuration registers */ ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); ++ if (pdata->is_ar724x) { ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1); ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2); ++ } else { ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000); ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff); ++ } ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); ++} ++ ++static void ag71xx_hw_init(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ u32 reset_mask = pdata->reset_bit; ++ ++ ag71xx_hw_stop(ag); ++ ++ if (pdata->is_ar724x) { ++ u32 reset_phy = reset_mask; ++ ++ reset_phy &= AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY; ++ reset_mask &= ~(AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY); ++ ++ ath79_device_reset_set(reset_phy); ++ msleep(50); ++ ath79_device_reset_clear(reset_phy); ++ msleep(200); ++ } ++ ++ ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); ++ udelay(20); ++ ++ ath79_device_reset_set(reset_mask); ++ msleep(100); ++ ath79_device_reset_clear(reset_mask); ++ msleep(200); ++ ++ ag71xx_hw_setup(ag); ++ ++ ag71xx_dma_reset(ag); ++} ++ ++static void ag71xx_fast_reset(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ struct net_device *dev = ag->dev; ++ u32 reset_mask = pdata->reset_bit; ++ u32 rx_ds, tx_ds; ++ u32 mii_reg; ++ ++ reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC; ++ ++ mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); ++ rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); ++ tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC); ++ ++ ath79_device_reset_set(reset_mask); ++ udelay(10); ++ ath79_device_reset_clear(reset_mask); ++ udelay(10); ++ ++ ag71xx_dma_reset(ag); ++ ag71xx_hw_setup(ag); ++ ++ /* setup max frame length */ ++ ag71xx_wr(ag, AG71XX_REG_MAC_MFL, ++ ag71xx_max_frame_len(ag->dev->mtu)); ++ ++ ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); ++ ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds); ++ ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); ++ ++ ag71xx_hw_set_macaddr(ag, dev->dev_addr); ++} ++ ++static void ag71xx_hw_start(struct ag71xx *ag) ++{ ++ /* start RX engine */ ++ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); ++ ++ /* enable interrupts */ ++ ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); ++} ++ ++void ag71xx_link_adjust(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ u32 cfg2; ++ u32 ifctl; ++ u32 fifo5; ++ u32 fifo3; ++ ++ if (!ag->link) { ++ ag71xx_hw_stop(ag); ++ netif_carrier_off(ag->dev); ++ if (netif_msg_link(ag)) ++ pr_info("%s: link down\n", ag->dev->name); ++ return; ++ } ++ ++ if (pdata->is_ar724x) ++ ag71xx_fast_reset(ag); ++ ++ cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); ++ cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX); ++ cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0; ++ ++ ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); ++ ifctl &= ~(MAC_IFCTL_SPEED); ++ ++ fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); ++ fifo5 &= ~FIFO_CFG5_BM; ++ ++ switch (ag->speed) { ++ case SPEED_1000: ++ cfg2 |= MAC_CFG2_IF_1000; ++ fifo5 |= FIFO_CFG5_BM; ++ break; ++ case SPEED_100: ++ cfg2 |= MAC_CFG2_IF_10_100; ++ ifctl |= MAC_IFCTL_SPEED; ++ break; ++ case SPEED_10: ++ cfg2 |= MAC_CFG2_IF_10_100; ++ break; ++ default: ++ BUG(); ++ return; ++ } ++ ++ if (pdata->is_ar91xx) ++ fifo3 = 0x00780fff; ++ else if (pdata->is_ar724x) ++ fifo3 = pdata->fifo_cfg3; ++ else ++ fifo3 = 0x008001ff; ++ ++ if (ag->tx_ring.desc_split) { ++ fifo3 &= 0xffff; ++ fifo3 |= ((2048 - ag->tx_ring.desc_split) / 4) << 16; ++ } ++ ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, fifo3); ++ ++ if (pdata->set_speed) ++ pdata->set_speed(ag->speed); ++ ++ ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); ++ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); ++ ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); ++ ag71xx_hw_start(ag); ++ ++ netif_carrier_on(ag->dev); ++ if (netif_msg_link(ag)) ++ pr_info("%s: link up (%sMbps/%s duplex)\n", ++ ag->dev->name, ++ ag71xx_speed_str(ag), ++ (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); ++ ++ DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); ++ ++ DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), ++ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); ++ ++ DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x\n", ++ ag->dev->name, ++ ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), ++ ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL)); ++} ++ ++static int ag71xx_open(struct net_device *dev) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ unsigned int max_frame_len; ++ int ret; ++ ++ max_frame_len = ag71xx_max_frame_len(dev->mtu); ++ ag->rx_buf_size = max_frame_len + NET_SKB_PAD + NET_IP_ALIGN; ++ ++ /* setup max frame length */ ++ ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len); ++ ++ ret = ag71xx_rings_init(ag); ++ if (ret) ++ goto err; ++ ++ napi_enable(&ag->napi); ++ ++ netif_carrier_off(dev); ++ ag71xx_phy_start(ag); ++ ++ ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); ++ ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); ++ ++ ag71xx_hw_set_macaddr(ag, dev->dev_addr); ++ ++ netif_start_queue(dev); ++ ++ return 0; ++ ++err: ++ ag71xx_rings_cleanup(ag); ++ return ret; ++} ++ ++static int ag71xx_stop(struct net_device *dev) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ unsigned long flags; ++ ++ netif_carrier_off(dev); ++ ag71xx_phy_stop(ag); ++ ++ spin_lock_irqsave(&ag->lock, flags); ++ ++ netif_stop_queue(dev); ++ ++ ag71xx_hw_stop(ag); ++ ag71xx_dma_reset(ag); ++ ++ napi_disable(&ag->napi); ++ del_timer_sync(&ag->oom_timer); ++ ++ spin_unlock_irqrestore(&ag->lock, flags); ++ ++ ag71xx_rings_cleanup(ag); ++ ++ return 0; ++} ++ ++static int ag71xx_fill_dma_desc(struct ag71xx_ring *ring, u32 addr, int len) ++{ ++ int i; ++ struct ag71xx_desc *desc; ++ int ndesc = 0; ++ int split = ring->desc_split; ++ ++ if (!split) ++ split = len; ++ ++ while (len > 0) { ++ unsigned int cur_len = len; ++ ++ i = (ring->curr + ndesc) % ring->size; ++ desc = ag71xx_ring_desc(ring, i); ++ ++ if (!ag71xx_desc_empty(desc)) ++ return -1; ++ ++ if (cur_len > split) { ++ cur_len = split; ++ ++ /* ++ * TX will hang if DMA transfers <= 4 bytes, ++ * make sure next segment is more than 4 bytes long. ++ */ ++ if (len <= split + 4) ++ cur_len -= 4; ++ } ++ ++ desc->data = addr; ++ addr += cur_len; ++ len -= cur_len; ++ ++ if (len > 0) ++ cur_len |= DESC_MORE; ++ ++ /* prevent early tx attempt of this descriptor */ ++ if (!ndesc) ++ cur_len |= DESC_EMPTY; ++ ++ desc->ctrl = cur_len; ++ ndesc++; ++ } ++ ++ return ndesc; ++} ++ ++static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, ++ struct net_device *dev) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ struct ag71xx_ring *ring = &ag->tx_ring; ++ struct ag71xx_desc *desc; ++ dma_addr_t dma_addr; ++ int i, n, ring_min; ++ ++ if (ag71xx_has_ar8216(ag)) ++ ag71xx_add_ar8216_header(ag, skb); ++ ++ if (skb->len <= 4) { ++ DBG("%s: packet len is too small\n", ag->dev->name); ++ goto err_drop; ++ } ++ ++ dma_addr = dma_map_single(&dev->dev, skb->data, skb->len, ++ DMA_TO_DEVICE); ++ ++ i = ring->curr % ring->size; ++ desc = ag71xx_ring_desc(ring, i); ++ ++ /* setup descriptor fields */ ++ n = ag71xx_fill_dma_desc(ring, (u32) dma_addr, skb->len & ag->desc_pktlen_mask); ++ if (n < 0) ++ goto err_drop_unmap; ++ ++ i = (ring->curr + n - 1) % ring->size; ++ ring->buf[i].len = skb->len; ++ ring->buf[i].skb = skb; ++ ring->buf[i].timestamp = jiffies; ++ ++ netdev_sent_queue(dev, skb->len); ++ ++ desc->ctrl &= ~DESC_EMPTY; ++ ring->curr += n; ++ ++ /* flush descriptor */ ++ wmb(); ++ ++ ring_min = 2; ++ if (ring->desc_split) ++ ring_min *= AG71XX_TX_RING_DS_PER_PKT; ++ ++ if (ring->curr - ring->dirty >= ring->size - ring_min) { ++ DBG("%s: tx queue full\n", dev->name); ++ netif_stop_queue(dev); ++ } ++ ++ DBG("%s: packet injected into TX queue\n", ag->dev->name); ++ ++ /* enable TX engine */ ++ ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); ++ ++ return NETDEV_TX_OK; ++ ++err_drop_unmap: ++ dma_unmap_single(&dev->dev, dma_addr, skb->len, DMA_TO_DEVICE); ++ ++err_drop: ++ dev->stats.tx_dropped++; ++ ++ dev_kfree_skb(skb); ++ return NETDEV_TX_OK; ++} ++ ++static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ int ret; ++ ++ switch (cmd) { ++ case SIOCETHTOOL: ++ if (ag->phy_dev == NULL) ++ break; ++ ++ spin_lock_irq(&ag->lock); ++ ret = phy_ethtool_ioctl(ag->phy_dev, (void *) ifr->ifr_data); ++ spin_unlock_irq(&ag->lock); ++ return ret; ++ ++ case SIOCSIFHWADDR: ++ if (copy_from_user ++ (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) ++ return -EFAULT; ++ return 0; ++ ++ case SIOCGIFHWADDR: ++ if (copy_to_user ++ (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) ++ return -EFAULT; ++ return 0; ++ ++ case SIOCGMIIPHY: ++ case SIOCGMIIREG: ++ case SIOCSMIIREG: ++ if (ag->phy_dev == NULL) ++ break; ++ ++ return phy_mii_ioctl(ag->phy_dev, ifr, cmd); ++ ++ default: ++ break; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static void ag71xx_oom_timer_handler(unsigned long data) ++{ ++ struct net_device *dev = (struct net_device *) data; ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ napi_schedule(&ag->napi); ++} ++ ++static void ag71xx_tx_timeout(struct net_device *dev) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ if (netif_msg_tx_err(ag)) ++ pr_info("%s: tx timeout\n", ag->dev->name); ++ ++ schedule_work(&ag->restart_work); ++} ++ ++static void ag71xx_restart_work_func(struct work_struct *work) ++{ ++ struct ag71xx *ag = container_of(work, struct ag71xx, restart_work); ++ ++ if (ag71xx_get_pdata(ag)->is_ar724x) { ++ ag->link = 0; ++ ag71xx_link_adjust(ag); ++ return; ++ } ++ ++ ag71xx_stop(ag->dev); ++ ag71xx_open(ag->dev); ++} ++ ++static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp) ++{ ++ u32 rx_sm, tx_sm, rx_fd; ++ ++ if (likely(time_before(jiffies, timestamp + HZ/10))) ++ return false; ++ ++ if (!netif_carrier_ok(ag->dev)) ++ return false; ++ ++ rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); ++ if ((rx_sm & 0x7) == 0x3 && ((rx_sm >> 4) & 0x7) == 0x6) ++ return true; ++ ++ tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); ++ rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); ++ if (((tx_sm >> 4) & 0x7) == 0 && ((rx_sm & 0x7) == 0) && ++ ((rx_sm >> 4) & 0x7) == 0 && rx_fd == 0) ++ return true; ++ ++ return false; ++} ++ ++static int ag71xx_tx_packets(struct ag71xx *ag) ++{ ++ struct ag71xx_ring *ring = &ag->tx_ring; ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ int sent = 0; ++ int bytes_compl = 0; ++ int n = 0; ++ ++ DBG("%s: processing TX ring\n", ag->dev->name); ++ ++ while (ring->dirty + n != ring->curr) { ++ unsigned int i = (ring->dirty + n) % ring->size; ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); ++ struct sk_buff *skb = ring->buf[i].skb; ++ ++ if (!ag71xx_desc_empty(desc)) { ++ if (pdata->is_ar7240 && ++ ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp)) ++ schedule_work(&ag->restart_work); ++ break; ++ } ++ ++ n++; ++ if (!skb) ++ continue; ++ ++ dev_kfree_skb_any(skb); ++ ring->buf[i].skb = NULL; ++ ++ bytes_compl += ring->buf[i].len; ++ ++ sent++; ++ ring->dirty += n; ++ ++ while (n > 0) { ++ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); ++ n--; ++ } ++ } ++ ++ DBG("%s: %d packets sent out\n", ag->dev->name, sent); ++ ++ ag->dev->stats.tx_bytes += bytes_compl; ++ ag->dev->stats.tx_packets += sent; ++ ++ if (!sent) ++ return 0; ++ ++ netdev_completed_queue(ag->dev, sent, bytes_compl); ++ if ((ring->curr - ring->dirty) < (ring->size * 3) / 4) ++ netif_wake_queue(ag->dev); ++ ++ return sent; ++} ++ ++static int ag71xx_rx_packets(struct ag71xx *ag, int limit) ++{ ++ struct net_device *dev = ag->dev; ++ struct ag71xx_ring *ring = &ag->rx_ring; ++ int offset = ag71xx_buffer_offset(ag); ++ unsigned int pktlen_mask = ag->desc_pktlen_mask; ++ int done = 0; ++ ++ DBG("%s: rx packets, limit=%d, curr=%u, dirty=%u\n", ++ dev->name, limit, ring->curr, ring->dirty); ++ ++ while (done < limit) { ++ unsigned int i = ring->curr % ring->size; ++ struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); ++ struct sk_buff *skb; ++ int pktlen; ++ int err = 0; ++ ++ if (ag71xx_desc_empty(desc)) ++ break; ++ ++ if ((ring->dirty + ring->size) == ring->curr) { ++ ag71xx_assert(0); ++ break; ++ } ++ ++ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); ++ ++ pktlen = desc->ctrl & pktlen_mask; ++ pktlen -= ETH_FCS_LEN; ++ ++ dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, ++ ag->rx_buf_size, DMA_FROM_DEVICE); ++ ++ dev->stats.rx_packets++; ++ dev->stats.rx_bytes += pktlen; ++ ++ skb = build_skb(ring->buf[i].rx_buf, 0); ++ if (!skb) { ++ kfree(ring->buf[i].rx_buf); ++ goto next; ++ } ++ ++ skb_reserve(skb, offset); ++ skb_put(skb, pktlen); ++ ++ if (ag71xx_has_ar8216(ag)) ++ err = ag71xx_remove_ar8216_header(ag, skb, pktlen); ++ ++ if (err) { ++ dev->stats.rx_dropped++; ++ kfree_skb(skb); ++ } else { ++ skb->dev = dev; ++ skb->ip_summed = CHECKSUM_NONE; ++ skb->protocol = eth_type_trans(skb, dev); ++ netif_receive_skb(skb); ++ } ++ ++next: ++ ring->buf[i].rx_buf = NULL; ++ done++; ++ ++ ring->curr++; ++ } ++ ++ ag71xx_ring_rx_refill(ag); ++ ++ DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n", ++ dev->name, ring->curr, ring->dirty, done); ++ ++ return done; ++} ++ ++static int ag71xx_poll(struct napi_struct *napi, int limit) ++{ ++ struct ag71xx *ag = container_of(napi, struct ag71xx, napi); ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ struct net_device *dev = ag->dev; ++ struct ag71xx_ring *rx_ring; ++ unsigned long flags; ++ u32 status; ++ int tx_done; ++ int rx_done; ++ ++ pdata->ddr_flush(); ++ tx_done = ag71xx_tx_packets(ag); ++ ++ DBG("%s: processing RX ring\n", dev->name); ++ rx_done = ag71xx_rx_packets(ag, limit); ++ ++ ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done); ++ ++ rx_ring = &ag->rx_ring; ++ if (rx_ring->buf[rx_ring->dirty % rx_ring->size].rx_buf == NULL) ++ goto oom; ++ ++ status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); ++ if (unlikely(status & RX_STATUS_OF)) { ++ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); ++ dev->stats.rx_fifo_errors++; ++ ++ /* restart RX */ ++ ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); ++ } ++ ++ if (rx_done < limit) { ++ if (status & RX_STATUS_PR) ++ goto more; ++ ++ status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); ++ if (status & TX_STATUS_PS) ++ goto more; ++ ++ DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n", ++ dev->name, rx_done, tx_done, limit); ++ ++ napi_complete(napi); ++ ++ /* enable interrupts */ ++ spin_lock_irqsave(&ag->lock, flags); ++ ag71xx_int_enable(ag, AG71XX_INT_POLL); ++ spin_unlock_irqrestore(&ag->lock, flags); ++ return rx_done; ++ } ++ ++more: ++ DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n", ++ dev->name, rx_done, tx_done, limit); ++ return limit; ++ ++oom: ++ if (netif_msg_rx_err(ag)) ++ pr_info("%s: out of memory\n", dev->name); ++ ++ mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); ++ napi_complete(napi); ++ return 0; ++} ++ ++static irqreturn_t ag71xx_interrupt(int irq, void *dev_id) ++{ ++ struct net_device *dev = dev_id; ++ struct ag71xx *ag = netdev_priv(dev); ++ u32 status; ++ ++ status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); ++ ag71xx_dump_intr(ag, "raw", status); ++ ++ if (unlikely(!status)) ++ return IRQ_NONE; ++ ++ if (unlikely(status & AG71XX_INT_ERR)) { ++ if (status & AG71XX_INT_TX_BE) { ++ ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); ++ dev_err(&dev->dev, "TX BUS error\n"); ++ } ++ if (status & AG71XX_INT_RX_BE) { ++ ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); ++ dev_err(&dev->dev, "RX BUS error\n"); ++ } ++ } ++ ++ if (likely(status & AG71XX_INT_POLL)) { ++ ag71xx_int_disable(ag, AG71XX_INT_POLL); ++ DBG("%s: enable polling mode\n", dev->name); ++ napi_schedule(&ag->napi); ++ } ++ ++ ag71xx_debugfs_update_int_stats(ag, status); ++ ++ return IRQ_HANDLED; ++} ++ ++#ifdef CONFIG_NET_POLL_CONTROLLER ++/* ++ * Polling 'interrupt' - used by things like netconsole to send skbs ++ * without having to re-enable interrupts. It's not called while ++ * the interrupt routine is executing. ++ */ ++static void ag71xx_netpoll(struct net_device *dev) ++{ ++ disable_irq(dev->irq); ++ ag71xx_interrupt(dev->irq, dev); ++ enable_irq(dev->irq); ++} ++#endif ++ ++static int ag71xx_change_mtu(struct net_device *dev, int new_mtu) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ unsigned int max_frame_len; ++ ++ max_frame_len = ag71xx_max_frame_len(new_mtu); ++ if (new_mtu < 68 || max_frame_len > ag->max_frame_len) ++ return -EINVAL; ++ ++ if (netif_running(dev)) ++ return -EBUSY; ++ ++ dev->mtu = new_mtu; ++ return 0; ++} ++ ++static const struct net_device_ops ag71xx_netdev_ops = { ++ .ndo_open = ag71xx_open, ++ .ndo_stop = ag71xx_stop, ++ .ndo_start_xmit = ag71xx_hard_start_xmit, ++ .ndo_do_ioctl = ag71xx_do_ioctl, ++ .ndo_tx_timeout = ag71xx_tx_timeout, ++ .ndo_change_mtu = ag71xx_change_mtu, ++ .ndo_set_mac_address = eth_mac_addr, ++ .ndo_validate_addr = eth_validate_addr, ++#ifdef CONFIG_NET_POLL_CONTROLLER ++ .ndo_poll_controller = ag71xx_netpoll, ++#endif ++}; ++ ++static const char *ag71xx_get_phy_if_mode_name(phy_interface_t mode) ++{ ++ switch (mode) { ++ case PHY_INTERFACE_MODE_MII: ++ return "MII"; ++ case PHY_INTERFACE_MODE_GMII: ++ return "GMII"; ++ case PHY_INTERFACE_MODE_RMII: ++ return "RMII"; ++ case PHY_INTERFACE_MODE_RGMII: ++ return "RGMII"; ++ case PHY_INTERFACE_MODE_SGMII: ++ return "SGMII"; ++ default: ++ break; ++ } ++ ++ return "unknown"; ++} ++ ++ ++static int ag71xx_probe(struct platform_device *pdev) ++{ ++ struct net_device *dev; ++ struct resource *res; ++ struct ag71xx *ag; ++ struct ag71xx_platform_data *pdata; ++ int err; ++ ++ pdata = pdev->dev.platform_data; ++ if (!pdata) { ++ dev_err(&pdev->dev, "no platform data specified\n"); ++ err = -ENXIO; ++ goto err_out; ++ } ++ ++ if (pdata->mii_bus_dev == NULL && pdata->phy_mask) { ++ dev_err(&pdev->dev, "no MII bus device specified\n"); ++ err = -EINVAL; ++ goto err_out; ++ } ++ ++ dev = alloc_etherdev(sizeof(*ag)); ++ if (!dev) { ++ dev_err(&pdev->dev, "alloc_etherdev failed\n"); ++ err = -ENOMEM; ++ goto err_out; ++ } ++ ++ if (!pdata->max_frame_len || !pdata->desc_pktlen_mask) ++ return -EINVAL; ++ ++ SET_NETDEV_DEV(dev, &pdev->dev); ++ ++ ag = netdev_priv(dev); ++ ag->pdev = pdev; ++ ag->dev = dev; ++ ag->msg_enable = netif_msg_init(ag71xx_msg_level, ++ AG71XX_DEFAULT_MSG_ENABLE); ++ spin_lock_init(&ag->lock); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base"); ++ if (!res) { ++ dev_err(&pdev->dev, "no mac_base resource found\n"); ++ err = -ENXIO; ++ goto err_out; ++ } ++ ++ ag->mac_base = ioremap_nocache(res->start, res->end - res->start + 1); ++ if (!ag->mac_base) { ++ dev_err(&pdev->dev, "unable to ioremap mac_base\n"); ++ err = -ENOMEM; ++ goto err_free_dev; ++ } ++ ++ dev->irq = platform_get_irq(pdev, 0); ++ err = request_irq(dev->irq, ag71xx_interrupt, ++ 0x0, ++ dev->name, dev); ++ if (err) { ++ dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq); ++ goto err_unmap_base; ++ } ++ ++ dev->base_addr = (unsigned long)ag->mac_base; ++ dev->netdev_ops = &ag71xx_netdev_ops; ++ dev->ethtool_ops = &ag71xx_ethtool_ops; ++ ++ INIT_WORK(&ag->restart_work, ag71xx_restart_work_func); ++ ++ init_timer(&ag->oom_timer); ++ ag->oom_timer.data = (unsigned long) dev; ++ ag->oom_timer.function = ag71xx_oom_timer_handler; ++ ++ ag->tx_ring.size = AG71XX_TX_RING_SIZE_DEFAULT; ++ ag->rx_ring.size = AG71XX_RX_RING_SIZE_DEFAULT; ++ ++ ag->max_frame_len = pdata->max_frame_len; ++ ag->desc_pktlen_mask = pdata->desc_pktlen_mask; ++ ++ if (!pdata->is_ar724x && !pdata->is_ar91xx) { ++ ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT; ++ ag->tx_ring.size *= AG71XX_TX_RING_DS_PER_PKT; ++ } ++ ++ ag->stop_desc = dma_alloc_coherent(NULL, ++ sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL); ++ ++ if (!ag->stop_desc) ++ goto err_free_irq; ++ ++ ag->stop_desc->data = 0; ++ ag->stop_desc->ctrl = 0; ++ ag->stop_desc->next = (u32) ag->stop_desc_dma; ++ ++ memcpy(dev->dev_addr, pdata->mac_addr, ETH_ALEN); ++ ++ netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); ++ ++ ag71xx_dump_regs(ag); ++ ++ ag71xx_hw_init(ag); ++ ++ ag71xx_dump_regs(ag); ++ ++ err = ag71xx_phy_connect(ag); ++ if (err) ++ goto err_free_desc; ++ ++ err = ag71xx_debugfs_init(ag); ++ if (err) ++ goto err_phy_disconnect; ++ ++ platform_set_drvdata(pdev, dev); ++ ++ err = register_netdev(dev); ++ if (err) { ++ dev_err(&pdev->dev, "unable to register net device\n"); ++ goto err_debugfs_exit; ++ } ++ ++ pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n", ++ dev->name, dev->base_addr, dev->irq, ++ ag71xx_get_phy_if_mode_name(pdata->phy_if_mode)); ++ ++ return 0; ++ ++err_debugfs_exit: ++ ag71xx_debugfs_exit(ag); ++err_phy_disconnect: ++ ag71xx_phy_disconnect(ag); ++err_free_desc: ++ dma_free_coherent(NULL, sizeof(struct ag71xx_desc), ag->stop_desc, ++ ag->stop_desc_dma); ++err_free_irq: ++ free_irq(dev->irq, dev); ++err_unmap_base: ++ iounmap(ag->mac_base); ++err_free_dev: ++ kfree(dev); ++err_out: ++ platform_set_drvdata(pdev, NULL); ++ return err; ++} ++ ++static int ag71xx_remove(struct platform_device *pdev) ++{ ++ struct net_device *dev = platform_get_drvdata(pdev); ++ ++ if (dev) { ++ struct ag71xx *ag = netdev_priv(dev); ++ ++ ag71xx_debugfs_exit(ag); ++ ag71xx_phy_disconnect(ag); ++ unregister_netdev(dev); ++ free_irq(dev->irq, dev); ++ iounmap(ag->mac_base); ++ kfree(dev); ++ platform_set_drvdata(pdev, NULL); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver ag71xx_driver = { ++ .probe = ag71xx_probe, ++ .remove = ag71xx_remove, ++ .driver = { ++ .name = AG71XX_DRV_NAME, ++ } ++}; ++ ++static int __init ag71xx_module_init(void) ++{ ++ int ret; ++ ++ ret = ag71xx_debugfs_root_init(); ++ if (ret) ++ goto err_out; ++ ++ ret = ag71xx_mdio_driver_init(); ++ if (ret) ++ goto err_debugfs_exit; ++ ++ ret = platform_driver_register(&ag71xx_driver); ++ if (ret) ++ goto err_mdio_exit; ++ ++ return 0; ++ ++err_mdio_exit: ++ ag71xx_mdio_driver_exit(); ++err_debugfs_exit: ++ ag71xx_debugfs_root_exit(); ++err_out: ++ return ret; ++} ++ ++static void __exit ag71xx_module_exit(void) ++{ ++ platform_driver_unregister(&ag71xx_driver); ++ ag71xx_mdio_driver_exit(); ++ ag71xx_debugfs_root_exit(); ++} ++ ++module_init(ag71xx_module_init); ++module_exit(ag71xx_module_exit); ++ ++MODULE_VERSION(AG71XX_DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_AUTHOR("Imre Kaloz "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" AG71XX_DRV_NAME); +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,318 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * ++ * Copyright (C) 2008-2010 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "ag71xx.h" ++ ++#define AG71XX_MDIO_RETRY 1000 ++#define AG71XX_MDIO_DELAY 5 ++ ++static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg, ++ u32 value) ++{ ++ void __iomem *r; ++ ++ r = am->mdio_base + reg; ++ __raw_writel(value, r); ++ ++ /* flush write */ ++ (void) __raw_readl(r); ++} ++ ++static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg) ++{ ++ return __raw_readl(am->mdio_base + reg); ++} ++ ++static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am) ++{ ++ DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n", ++ am->mii_bus->name, ++ ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG), ++ ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD), ++ ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR)); ++ DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n", ++ am->mii_bus->name, ++ ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL), ++ ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS), ++ ag71xx_mdio_rr(am, AG71XX_REG_MII_IND)); ++} ++ ++static int ag71xx_mdio_wait_busy(struct ag71xx_mdio *am) ++{ ++ int i; ++ ++ for (i = 0; i < AG71XX_MDIO_RETRY; i++) { ++ u32 busy; ++ ++ udelay(AG71XX_MDIO_DELAY); ++ ++ busy = ag71xx_mdio_rr(am, AG71XX_REG_MII_IND); ++ if (!busy) ++ return 0; ++ ++ udelay(AG71XX_MDIO_DELAY); ++ } ++ ++ pr_err("%s: MDIO operation timed out\n", am->mii_bus->name); ++ ++ return -ETIMEDOUT; ++} ++ ++int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg) ++{ ++ int err; ++ int ret; ++ ++ err = ag71xx_mdio_wait_busy(am); ++ if (err) ++ return 0xffff; ++ ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, ++ ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ); ++ ++ err = ag71xx_mdio_wait_busy(am); ++ if (err) ++ return 0xffff; ++ ++ ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff; ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); ++ ++ DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret); ++ ++ return ret; ++} ++ ++void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val) ++{ ++ DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val); ++ ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, ++ ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val); ++ ++ ag71xx_mdio_wait_busy(am); ++} ++ ++static const u32 ar71xx_mdio_div_table[] = { ++ 4, 4, 6, 8, 10, 14, 20, 28, ++}; ++ ++static const u32 ar7240_mdio_div_table[] = { ++ 2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96, ++}; ++ ++static const u32 ar933x_mdio_div_table[] = { ++ 4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98, ++}; ++ ++static int ag71xx_mdio_get_divider(struct ag71xx_mdio *am, u32 *div) ++{ ++ unsigned long ref_clock, mdio_clock; ++ const u32 *table; ++ int ndivs; ++ int i; ++ ++ ref_clock = am->pdata->ref_clock; ++ mdio_clock = am->pdata->mdio_clock; ++ ++ if (!ref_clock || !mdio_clock) ++ return -EINVAL; ++ ++ if (am->pdata->is_ar9330 || am->pdata->is_ar934x) { ++ table = ar933x_mdio_div_table; ++ ndivs = ARRAY_SIZE(ar933x_mdio_div_table); ++ } else if (am->pdata->is_ar7240) { ++ table = ar7240_mdio_div_table; ++ ndivs = ARRAY_SIZE(ar7240_mdio_div_table); ++ } else { ++ table = ar71xx_mdio_div_table; ++ ndivs = ARRAY_SIZE(ar71xx_mdio_div_table); ++ } ++ ++ for (i = 0; i < ndivs; i++) { ++ unsigned long t; ++ ++ t = ref_clock / table[i]; ++ if (t <= mdio_clock) { ++ *div = i; ++ return 0; ++ } ++ } ++ ++ dev_err(&am->mii_bus->dev, "no divider found for %lu/%lu\n", ++ ref_clock, mdio_clock); ++ return -ENOENT; ++} ++ ++static int ag71xx_mdio_reset(struct mii_bus *bus) ++{ ++ struct ag71xx_mdio *am = bus->priv; ++ u32 t; ++ int err; ++ ++ err = ag71xx_mdio_get_divider(am, &t); ++ if (err) { ++ /* fallback */ ++ if (am->pdata->is_ar7240) ++ t = MII_CFG_CLK_DIV_6; ++ else if (am->pdata->builtin_switch && !am->pdata->is_ar934x) ++ t = MII_CFG_CLK_DIV_10; ++ else if (!am->pdata->builtin_switch && am->pdata->is_ar934x) ++ t = MII_CFG_CLK_DIV_58; ++ else ++ t = MII_CFG_CLK_DIV_28; ++ } ++ ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); ++ udelay(100); ++ ++ ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t); ++ udelay(100); ++ ++ if (am->pdata->reset) ++ am->pdata->reset(bus); ++ ++ return 0; ++} ++ ++static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg) ++{ ++ struct ag71xx_mdio *am = bus->priv; ++ ++ if (am->pdata->builtin_switch) ++ return ar7240sw_phy_read(bus, addr, reg); ++ else ++ return ag71xx_mdio_mii_read(am, addr, reg); ++} ++ ++static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val) ++{ ++ struct ag71xx_mdio *am = bus->priv; ++ ++ if (am->pdata->builtin_switch) ++ ar7240sw_phy_write(bus, addr, reg, val); ++ else ++ ag71xx_mdio_mii_write(am, addr, reg, val); ++ return 0; ++} ++ ++static int ag71xx_mdio_probe(struct platform_device *pdev) ++{ ++ struct ag71xx_mdio_platform_data *pdata; ++ struct ag71xx_mdio *am; ++ struct resource *res; ++ int i; ++ int err; ++ ++ pdata = pdev->dev.platform_data; ++ if (!pdata) { ++ dev_err(&pdev->dev, "no platform data specified\n"); ++ return -EINVAL; ++ } ++ ++ am = kzalloc(sizeof(*am), GFP_KERNEL); ++ if (!am) { ++ err = -ENOMEM; ++ goto err_out; ++ } ++ ++ am->pdata = pdata; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) { ++ dev_err(&pdev->dev, "no iomem resource found\n"); ++ err = -ENXIO; ++ goto err_out; ++ } ++ ++ am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1); ++ if (!am->mdio_base) { ++ dev_err(&pdev->dev, "unable to ioremap registers\n"); ++ err = -ENOMEM; ++ goto err_free_mdio; ++ } ++ ++ am->mii_bus = mdiobus_alloc(); ++ if (am->mii_bus == NULL) { ++ err = -ENOMEM; ++ goto err_iounmap; ++ } ++ ++ am->mii_bus->name = "ag71xx_mdio"; ++ am->mii_bus->read = ag71xx_mdio_read; ++ am->mii_bus->write = ag71xx_mdio_write; ++ am->mii_bus->reset = ag71xx_mdio_reset; ++ am->mii_bus->irq = am->mii_irq; ++ am->mii_bus->priv = am; ++ am->mii_bus->parent = &pdev->dev; ++ snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); ++ am->mii_bus->phy_mask = pdata->phy_mask; ++ ++ for (i = 0; i < PHY_MAX_ADDR; i++) ++ am->mii_irq[i] = PHY_POLL; ++ ++ ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0); ++ ++ err = mdiobus_register(am->mii_bus); ++ if (err) ++ goto err_free_bus; ++ ++ ag71xx_mdio_dump_regs(am); ++ ++ platform_set_drvdata(pdev, am); ++ return 0; ++ ++err_free_bus: ++ mdiobus_free(am->mii_bus); ++err_iounmap: ++ iounmap(am->mdio_base); ++err_free_mdio: ++ kfree(am); ++err_out: ++ return err; ++} ++ ++static int ag71xx_mdio_remove(struct platform_device *pdev) ++{ ++ struct ag71xx_mdio *am = platform_get_drvdata(pdev); ++ ++ if (am) { ++ mdiobus_unregister(am->mii_bus); ++ mdiobus_free(am->mii_bus); ++ iounmap(am->mdio_base); ++ kfree(am); ++ platform_set_drvdata(pdev, NULL); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver ag71xx_mdio_driver = { ++ .probe = ag71xx_mdio_probe, ++ .remove = ag71xx_mdio_remove, ++ .driver = { ++ .name = "ag71xx-mdio", ++ } ++}; ++ ++int __init ag71xx_mdio_driver_init(void) ++{ ++ return platform_driver_register(&ag71xx_mdio_driver); ++} ++ ++void ag71xx_mdio_driver_exit(void) ++{ ++ platform_driver_unregister(&ag71xx_mdio_driver); ++} +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,235 @@ ++/* ++ * Atheros AR71xx built-in ethernet mac driver ++ * ++ * Copyright (C) 2008-2010 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Based on Atheros' AG7100 driver ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include "ag71xx.h" ++ ++static void ag71xx_phy_link_adjust(struct net_device *dev) ++{ ++ struct ag71xx *ag = netdev_priv(dev); ++ struct phy_device *phydev = ag->phy_dev; ++ unsigned long flags; ++ int status_change = 0; ++ ++ spin_lock_irqsave(&ag->lock, flags); ++ ++ if (phydev->link) { ++ if (ag->duplex != phydev->duplex ++ || ag->speed != phydev->speed) { ++ status_change = 1; ++ } ++ } ++ ++ if (phydev->link != ag->link) ++ status_change = 1; ++ ++ ag->link = phydev->link; ++ ag->duplex = phydev->duplex; ++ ag->speed = phydev->speed; ++ ++ if (status_change) ++ ag71xx_link_adjust(ag); ++ ++ spin_unlock_irqrestore(&ag->lock, flags); ++} ++ ++void ag71xx_phy_start(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ ++ if (ag->phy_dev) { ++ phy_start(ag->phy_dev); ++ } else if (pdata->mii_bus_dev && pdata->switch_data) { ++ ag71xx_ar7240_start(ag); ++ } else { ++ ag->link = 1; ++ ag71xx_link_adjust(ag); ++ } ++} ++ ++void ag71xx_phy_stop(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ unsigned long flags; ++ ++ if (ag->phy_dev) ++ phy_stop(ag->phy_dev); ++ else if (pdata->mii_bus_dev && pdata->switch_data) ++ ag71xx_ar7240_stop(ag); ++ ++ spin_lock_irqsave(&ag->lock, flags); ++ if (ag->link) { ++ ag->link = 0; ++ ag71xx_link_adjust(ag); ++ } ++ spin_unlock_irqrestore(&ag->lock, flags); ++} ++ ++static int ag71xx_phy_connect_fixed(struct ag71xx *ag) ++{ ++ struct device *dev = &ag->pdev->dev; ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ int ret = 0; ++ ++ /* use fixed settings */ ++ switch (pdata->speed) { ++ case SPEED_10: ++ case SPEED_100: ++ case SPEED_1000: ++ break; ++ default: ++ dev_err(dev, "invalid speed specified\n"); ++ ret = -EINVAL; ++ break; ++ } ++ ++ dev_dbg(dev, "using fixed link parameters\n"); ++ ++ ag->duplex = pdata->duplex; ++ ag->speed = pdata->speed; ++ ++ return ret; ++} ++ ++static int ag71xx_phy_connect_multi(struct ag71xx *ag) ++{ ++ struct device *dev = &ag->pdev->dev; ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ struct phy_device *phydev = NULL; ++ int phy_addr; ++ int ret = 0; ++ ++ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { ++ if (!(pdata->phy_mask & (1 << phy_addr))) ++ continue; ++ ++ if (ag->mii_bus->phy_map[phy_addr] == NULL) ++ continue; ++ ++ DBG("%s: PHY found at %s, uid=%08x\n", ++ dev_name(dev), ++ dev_name(&ag->mii_bus->phy_map[phy_addr]->dev), ++ ag->mii_bus->phy_map[phy_addr]->phy_id); ++ ++ if (phydev == NULL) ++ phydev = ag->mii_bus->phy_map[phy_addr]; ++ } ++ ++ if (!phydev) { ++ dev_err(dev, "no PHY found with phy_mask=%08x\n", ++ pdata->phy_mask); ++ return -ENODEV; ++ } ++ ++ ag->phy_dev = phy_connect(ag->dev, dev_name(&phydev->dev), ++ &ag71xx_phy_link_adjust, ++ pdata->phy_if_mode); ++ ++ if (IS_ERR(ag->phy_dev)) { ++ dev_err(dev, "could not connect to PHY at %s\n", ++ dev_name(&phydev->dev)); ++ return PTR_ERR(ag->phy_dev); ++ } ++ ++ /* mask with MAC supported features */ ++ if (pdata->has_gbit) ++ phydev->supported &= PHY_GBIT_FEATURES; ++ else ++ phydev->supported &= PHY_BASIC_FEATURES; ++ ++ phydev->advertising = phydev->supported; ++ ++ dev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n", ++ dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); ++ ++ ag->link = 0; ++ ag->speed = 0; ++ ag->duplex = -1; ++ ++ return ret; ++} ++ ++static int dev_is_class(struct device *dev, void *class) ++{ ++ if (dev->class != NULL && !strcmp(dev->class->name, class)) ++ return 1; ++ ++ return 0; ++} ++ ++static struct device *dev_find_class(struct device *parent, char *class) ++{ ++ if (dev_is_class(parent, class)) { ++ get_device(parent); ++ return parent; ++ } ++ ++ return device_find_child(parent, class, dev_is_class); ++} ++ ++static struct mii_bus *dev_to_mii_bus(struct device *dev) ++{ ++ struct device *d; ++ ++ d = dev_find_class(dev, "mdio_bus"); ++ if (d != NULL) { ++ struct mii_bus *bus; ++ ++ bus = to_mii_bus(d); ++ put_device(d); ++ ++ return bus; ++ } ++ ++ return NULL; ++} ++ ++int ag71xx_phy_connect(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ ++ if (pdata->mii_bus_dev == NULL || ++ pdata->mii_bus_dev->bus == NULL ) ++ return ag71xx_phy_connect_fixed(ag); ++ ++ ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev); ++ if (ag->mii_bus == NULL) { ++ dev_err(&ag->pdev->dev, "unable to find MII bus on device '%s'\n", ++ dev_name(pdata->mii_bus_dev)); ++ return -ENODEV; ++ } ++ ++ /* Reset the mdio bus explicitly */ ++ if (ag->mii_bus->reset) { ++ mutex_lock(&ag->mii_bus->mdio_lock); ++ ag->mii_bus->reset(ag->mii_bus); ++ mutex_unlock(&ag->mii_bus->mdio_lock); ++ } ++ ++ if (pdata->switch_data) ++ return ag71xx_ar7240_init(ag); ++ ++ if (pdata->phy_mask) ++ return ag71xx_phy_connect_multi(ag); ++ ++ return ag71xx_phy_connect_fixed(ag); ++} ++ ++void ag71xx_phy_disconnect(struct ag71xx *ag) ++{ ++ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); ++ ++ if (pdata->switch_data) ++ ag71xx_ar7240_cleanup(ag); ++ else if (ag->phy_dev) ++ phy_disconnect(ag->phy_dev); ++} +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Kconfig linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Kconfig +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Kconfig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Kconfig 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,33 @@ ++config AG71XX ++ tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" ++ depends on ATH79 ++ select PHYLIB ++ help ++ If you wish to compile a kernel for AR7XXX/91XXX and enable ++ ethernet support, then you should always answer Y to this. ++ ++if AG71XX ++ ++config AG71XX_DEBUG ++ bool "Atheros AR71xx built-in ethernet driver debugging" ++ default n ++ help ++ Atheros AR71xx built-in ethernet driver debugging messages. ++ ++config AG71XX_DEBUG_FS ++ bool "Atheros AR71xx built-in ethernet driver debugfs support" ++ depends on DEBUG_FS ++ default n ++ help ++ Say Y, if you need access to various statistics provided by ++ the ag71xx driver. ++ ++config AG71XX_AR8216_SUPPORT ++ bool "special support for the Atheros AR8216 switch" ++ default n ++ default y if ATH79_MACH_WNR2000 || ATH79_MACH_MZK_W04NU ++ help ++ Say 'y' here if you want to enable special support for the ++ Atheros AR8216 switch found on some boards. ++ ++endif +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Makefile linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Makefile +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/ag71xx/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/ag71xx/Makefile 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,15 @@ ++# ++# Makefile for the Atheros AR71xx built-in ethernet macs ++# ++ ++ag71xx-y += ag71xx_main.o ++ag71xx-y += ag71xx_ethtool.o ++ag71xx-y += ag71xx_phy.o ++ag71xx-y += ag71xx_mdio.o ++ag71xx-y += ag71xx_ar7240.o ++ ++ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o ++ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT) += ag71xx_ar8216.o ++ ++obj-$(CONFIG_AG71XX) += ag71xx.o ++ +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/Kconfig linux-4.1.13/drivers/net/ethernet/atheros/Kconfig +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/Kconfig 2015-12-04 19:57:03.882110905 +0100 +@@ -5,7 +5,7 @@ + config NET_VENDOR_ATHEROS + bool "Atheros devices" + default y +- depends on PCI ++ depends on (PCI || ATH79) + ---help--- + If you have a network (Ethernet) card belonging to this class, say Y + and read the Ethernet-HOWTO, available from +@@ -80,4 +80,6 @@ + To compile this driver as a module, choose M here. The module + will be called alx. + ++source drivers/net/ethernet/atheros/ag71xx/Kconfig ++ + endif # NET_VENDOR_ATHEROS +diff -Nur linux-4.1.13.orig/drivers/net/ethernet/atheros/Makefile linux-4.1.13/drivers/net/ethernet/atheros/Makefile +--- linux-4.1.13.orig/drivers/net/ethernet/atheros/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/ethernet/atheros/Makefile 2015-12-04 19:57:03.882110905 +0100 +@@ -2,6 +2,7 @@ + # Makefile for the Atheros network device drivers. + # + ++obj-$(CONFIG_AG71XX) += ag71xx/ + obj-$(CONFIG_ATL1) += atlx/ + obj-$(CONFIG_ATL2) += atlx/ + obj-$(CONFIG_ATL1E) += atl1e/ +diff -Nur linux-4.1.13.orig/drivers/net/phy/at803x.c linux-4.1.13/drivers/net/phy/at803x.c +--- linux-4.1.13.orig/drivers/net/phy/at803x.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/at803x.c 2015-12-04 19:57:03.890110382 +0100 +@@ -12,12 +12,14 @@ + */ + + #include ++#include + #include + #include + #include + #include + #include + #include ++#include + + #define AT803X_INTR_ENABLE 0x12 + #define AT803X_INTR_STATUS 0x13 +@@ -34,8 +36,16 @@ + #define AT803X_INER 0x0012 + #define AT803X_INER_INIT 0xec00 + #define AT803X_INSR 0x0013 ++ ++#define AT803X_PCS_SMART_EEE_CTRL3 0x805D ++#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_MASK 0x3 ++#define AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT 12 ++#define AT803X_SMART_EEE_CTRL3_LPI_EN BIT(8) ++ + #define AT803X_DEBUG_ADDR 0x1D + #define AT803X_DEBUG_DATA 0x1E ++#define AT803X_DBG0_REG 0x00 ++#define AT803X_DEBUG_RGMII_RX_CLK_DLY BIT(8) + #define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05 + #define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8) + +@@ -50,6 +60,7 @@ + struct at803x_priv { + bool phy_reset:1; + struct gpio_desc *gpiod_reset; ++ int prev_speed; + }; + + struct at803x_context { +@@ -61,6 +72,43 @@ + u16 led_control; + }; + ++static u16 ++at803x_dbg_reg_rmw(struct phy_device *phydev, u16 reg, u16 clear, u16 set) ++{ ++ struct mii_bus *bus = phydev->bus; ++ int val; ++ ++ mutex_lock(&bus->mdio_lock); ++ ++ bus->write(bus, phydev->addr, AT803X_DEBUG_ADDR, reg); ++ val = bus->read(bus, phydev->addr, AT803X_DEBUG_DATA); ++ if (val < 0) { ++ val = 0xffff; ++ goto out; ++ } ++ ++ val &= ~clear; ++ val |= set; ++ bus->write(bus, phydev->addr, AT803X_DEBUG_DATA, val); ++ ++out: ++ mutex_unlock(&bus->mdio_lock); ++ return val; ++} ++ ++static inline void ++at803x_dbg_reg_set(struct phy_device *phydev, u16 reg, u16 set) ++{ ++ at803x_dbg_reg_rmw(phydev, reg, 0, set); ++} ++ ++static inline void ++at803x_dbg_reg_clr(struct phy_device *phydev, u16 reg, u16 clear) ++{ ++ at803x_dbg_reg_rmw(phydev, reg, clear, 0); ++} ++ ++ + /* save relevant PHY registers to private copy */ + static void at803x_context_save(struct phy_device *phydev, + struct at803x_context *context) +@@ -209,8 +257,16 @@ + return 0; + } + ++static void at803x_disable_smarteee(struct phy_device *phydev) ++{ ++ phy_write_mmd(phydev, MDIO_MMD_PCS, AT803X_PCS_SMART_EEE_CTRL3, ++ 1 << AT803X_SMART_EEE_CTRL3_LPI_TX_DELAY_SEL_SHIFT); ++ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, 0); ++} ++ + static int at803x_config_init(struct phy_device *phydev) + { ++ struct at803x_platform_data *pdata; + int ret; + + ret = genphy_config_init(phydev); +@@ -228,6 +284,26 @@ + return ret; + } + ++ pdata = dev_get_platdata(&phydev->dev); ++ if (pdata) { ++ if (pdata->disable_smarteee) ++ at803x_disable_smarteee(phydev); ++ ++ if (pdata->enable_rgmii_rx_delay) ++ at803x_dbg_reg_set(phydev, AT803X_DBG0_REG, ++ AT803X_DEBUG_RGMII_RX_CLK_DLY); ++ else ++ at803x_dbg_reg_clr(phydev, AT803X_DBG0_REG, ++ AT803X_DEBUG_RGMII_RX_CLK_DLY); ++ ++ if (pdata->enable_rgmii_tx_delay) ++ at803x_dbg_reg_set(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL, ++ AT803X_DEBUG_RGMII_TX_CLK_DLY); ++ else ++ at803x_dbg_reg_clr(phydev, AT803X_DEBUG_SYSTEM_MODE_CTRL, ++ AT803X_DEBUG_RGMII_TX_CLK_DLY); ++ } ++ + return 0; + } + +@@ -259,6 +335,8 @@ + static void at803x_link_change_notify(struct phy_device *phydev) + { + struct at803x_priv *priv = phydev->priv; ++ struct at803x_platform_data *pdata; ++ pdata = dev_get_platdata(&phydev->dev); + + /* + * Conduct a hardware reset for AT8030 every time a link loss is +@@ -289,6 +367,26 @@ + priv->phy_reset = false; + } + } ++ if (pdata && pdata->fixup_rgmii_tx_delay && ++ phydev->speed != priv->prev_speed) { ++ switch (phydev->speed) { ++ case SPEED_10: ++ case SPEED_100: ++ at803x_dbg_reg_set(phydev, ++ AT803X_DEBUG_SYSTEM_MODE_CTRL, ++ AT803X_DEBUG_RGMII_TX_CLK_DLY); ++ break; ++ case SPEED_1000: ++ at803x_dbg_reg_clr(phydev, ++ AT803X_DEBUG_SYSTEM_MODE_CTRL, ++ AT803X_DEBUG_RGMII_TX_CLK_DLY); ++ break; ++ default: ++ break; ++ } ++ ++ priv->prev_speed = phydev->speed; ++ } + } + + static struct phy_driver at803x_driver[] = { +diff -Nur linux-4.1.13.orig/drivers/net/phy/Kconfig linux-4.1.13/drivers/net/phy/Kconfig +--- linux-4.1.13.orig/drivers/net/phy/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/Kconfig 2015-12-04 21:33:39.755626859 +0100 +@@ -12,6 +12,16 @@ + + if PHYLIB + ++config SWCONFIG ++ tristate "Switch configuration API" ++ ---help--- ++ Switch configuration API using netlink. This allows ++ you to configure the VLAN features of certain switches. ++ ++config SWCONFIG_LEDS ++ bool "Switch LED trigger support" ++ depends on (SWCONFIG && LEDS_TRIGGERS) ++ + comment "MII PHY device drivers" + + config AT803X_PHY +diff -Nur linux-4.1.13.orig/drivers/net/phy/Makefile linux-4.1.13/drivers/net/phy/Makefile +--- linux-4.1.13.orig/drivers/net/phy/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/Makefile 2015-12-04 21:33:39.775625531 +0100 +@@ -3,6 +3,7 @@ + libphy-objs := phy.o phy_device.o mdio_bus.o + + obj-$(CONFIG_PHYLIB) += libphy.o ++obj-$(CONFIG_SWCONFIG) += swconfig.o + obj-$(CONFIG_MARVELL_PHY) += marvell.o + obj-$(CONFIG_DAVICOM_PHY) += davicom.o + obj-$(CONFIG_CICADA_PHY) += cicada.o +diff -Nur linux-4.1.13.orig/drivers/net/phy/mdio-bitbang.c linux-4.1.13/drivers/net/phy/mdio-bitbang.c +--- linux-4.1.13.orig/drivers/net/phy/mdio-bitbang.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/mdio-bitbang.c 2015-12-04 19:57:05.909978229 +0100 +@@ -17,6 +17,7 @@ + * kind, whether express or implied. + */ + ++#include + #include + #include + #include +@@ -156,7 +157,9 @@ + { + struct mdiobb_ctrl *ctrl = bus->priv; + int ret, i; ++ long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); +@@ -165,26 +168,21 @@ + + ctrl->ops->set_mdio_dir(ctrl, 0); + +- /* check the turnaround bit: the PHY should be driving it to zero */ +- if (mdiobb_get_bit(ctrl) != 0) { +- /* PHY didn't drive TA low -- flush any bits it +- * may be trying to send. +- */ +- for (i = 0; i < 32; i++) +- mdiobb_get_bit(ctrl); +- +- return 0xffff; +- } ++ mdiobb_get_bit(ctrl); + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return ret; + } + + static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) + { + struct mdiobb_ctrl *ctrl = bus->priv; ++ long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); +@@ -199,6 +197,8 @@ + + ctrl->ops->set_mdio_dir(ctrl, 0); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return 0; + } + +diff -Nur linux-4.1.13.orig/drivers/net/phy/phy.c linux-4.1.13/drivers/net/phy/phy.c +--- linux-4.1.13.orig/drivers/net/phy/phy.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/phy.c 2015-12-04 20:31:10.856994541 +0100 +@@ -357,6 +357,50 @@ + } + EXPORT_SYMBOL(phy_ethtool_gset); + ++int phy_ethtool_ioctl(struct phy_device *phydev, void *useraddr) ++{ ++ u32 cmd; ++ int tmp; ++ struct ethtool_cmd ecmd = { ETHTOOL_GSET }; ++ struct ethtool_value edata = { ETHTOOL_GLINK }; ++ ++ if (get_user(cmd, (u32 *) useraddr)) ++ return -EFAULT; ++ ++ switch (cmd) { ++ case ETHTOOL_GSET: ++ phy_ethtool_gset(phydev, &ecmd); ++ if (copy_to_user(useraddr, &ecmd, sizeof(ecmd))) ++ return -EFAULT; ++ return 0; ++ ++ case ETHTOOL_SSET: ++ if (copy_from_user(&ecmd, useraddr, sizeof(ecmd))) ++ return -EFAULT; ++ return phy_ethtool_sset(phydev, &ecmd); ++ ++ case ETHTOOL_NWAY_RST: ++ /* if autoneg is off, it's an error */ ++ tmp = phy_read(phydev, MII_BMCR); ++ if (tmp & BMCR_ANENABLE) { ++ tmp |= (BMCR_ANRESTART); ++ phy_write(phydev, MII_BMCR, tmp); ++ return 0; ++ } ++ return -EINVAL; ++ ++ case ETHTOOL_GLINK: ++ edata.data = (phy_read(phydev, ++ MII_BMSR) & BMSR_LSTATUS) ? 1 : 0; ++ if (copy_to_user(useraddr, &edata, sizeof(edata))) ++ return -EFAULT; ++ return 0; ++ } ++ ++ return -EOPNOTSUPP; ++} ++EXPORT_SYMBOL(phy_ethtool_ioctl); ++ + /** + * phy_mii_ioctl - generic PHY MII ioctl interface + * @phydev: the phy_device struct +diff -Nur linux-4.1.13.orig/drivers/net/phy/swconfig.c linux-4.1.13/drivers/net/phy/swconfig.c +--- linux-4.1.13.orig/drivers/net/phy/swconfig.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/swconfig.c 2015-12-04 21:18:34.855186030 +0100 +@@ -0,0 +1,1153 @@ ++/* ++ * swconfig.c: Switch configuration API ++ * ++ * Copyright (C) 2008 Felix Fietkau ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SWCONFIG_DEVNAME "switch%d" ++ ++#include "swconfig_leds.c" ++ ++MODULE_AUTHOR("Felix Fietkau "); ++MODULE_LICENSE("GPL"); ++ ++static int swdev_id; ++static struct list_head swdevs; ++static DEFINE_SPINLOCK(swdevs_lock); ++struct swconfig_callback; ++ ++struct swconfig_callback { ++ struct sk_buff *msg; ++ struct genlmsghdr *hdr; ++ struct genl_info *info; ++ int cmd; ++ ++ /* callback for filling in the message data */ ++ int (*fill)(struct swconfig_callback *cb, void *arg); ++ ++ /* callback for closing the message before sending it */ ++ int (*close)(struct swconfig_callback *cb, void *arg); ++ ++ struct nlattr *nest[4]; ++ int args[4]; ++}; ++ ++/* defaults */ ++ ++static int ++swconfig_get_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ int ret; ++ if (val->port_vlan >= dev->vlans) ++ return -EINVAL; ++ ++ if (!dev->ops->get_vlan_ports) ++ return -EOPNOTSUPP; ++ ++ ret = dev->ops->get_vlan_ports(dev, val); ++ return ret; ++} ++ ++static int ++swconfig_set_vlan_ports(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct switch_port *ports = val->value.ports; ++ const struct switch_dev_ops *ops = dev->ops; ++ int i; ++ ++ if (val->port_vlan >= dev->vlans) ++ return -EINVAL; ++ ++ /* validate ports */ ++ if (val->len > dev->ports) ++ return -EINVAL; ++ ++ if (!ops->set_vlan_ports) ++ return -EOPNOTSUPP; ++ ++ for (i = 0; i < val->len; i++) { ++ if (ports[i].id >= dev->ports) ++ return -EINVAL; ++ ++ if (ops->set_port_pvid && ++ !(ports[i].flags & (1 << SWITCH_PORT_FLAG_TAGGED))) ++ ops->set_port_pvid(dev, ports[i].id, val->port_vlan); ++ } ++ ++ return ops->set_vlan_ports(dev, val); ++} ++ ++static int ++swconfig_set_pvid(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ if (val->port_vlan >= dev->ports) ++ return -EINVAL; ++ ++ if (!dev->ops->set_port_pvid) ++ return -EOPNOTSUPP; ++ ++ return dev->ops->set_port_pvid(dev, val->port_vlan, val->value.i); ++} ++ ++static int ++swconfig_get_pvid(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ if (val->port_vlan >= dev->ports) ++ return -EINVAL; ++ ++ if (!dev->ops->get_port_pvid) ++ return -EOPNOTSUPP; ++ ++ return dev->ops->get_port_pvid(dev, val->port_vlan, &val->value.i); ++} ++ ++static const char * ++swconfig_speed_str(enum switch_port_speed speed) ++{ ++ switch (speed) { ++ case SWITCH_PORT_SPEED_10: ++ return "10baseT"; ++ case SWITCH_PORT_SPEED_100: ++ return "100baseT"; ++ case SWITCH_PORT_SPEED_1000: ++ return "1000baseT"; ++ default: ++ break; ++ } ++ ++ return "unknown"; ++} ++ ++static int ++swconfig_get_link(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct switch_port_link link; ++ int len; ++ int ret; ++ ++ if (val->port_vlan >= dev->ports) ++ return -EINVAL; ++ ++ if (!dev->ops->get_port_link) ++ return -EOPNOTSUPP; ++ ++ memset(&link, 0, sizeof(link)); ++ ret = dev->ops->get_port_link(dev, val->port_vlan, &link); ++ if (ret) ++ return ret; ++ ++ memset(dev->buf, 0, sizeof(dev->buf)); ++ ++ if (link.link) ++ len = snprintf(dev->buf, sizeof(dev->buf), ++ "port:%d link:up speed:%s %s-duplex %s%s%s%s%s", ++ val->port_vlan, ++ swconfig_speed_str(link.speed), ++ link.duplex ? "full" : "half", ++ link.tx_flow ? "txflow " : "", ++ link.rx_flow ? "rxflow " : "", ++ link.eee & ADVERTISED_100baseT_Full ? "eee100 " : "", ++ link.eee & ADVERTISED_1000baseT_Full ? "eee1000 " : "", ++ link.aneg ? "auto" : ""); ++ else ++ len = snprintf(dev->buf, sizeof(dev->buf), "port:%d link:down", ++ val->port_vlan); ++ ++ val->value.s = dev->buf; ++ val->len = len; ++ ++ return 0; ++} ++ ++static int ++swconfig_apply_config(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ /* don't complain if not supported by the switch driver */ ++ if (!dev->ops->apply_config) ++ return 0; ++ ++ return dev->ops->apply_config(dev); ++} ++ ++static int ++swconfig_reset_switch(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ /* don't complain if not supported by the switch driver */ ++ if (!dev->ops->reset_switch) ++ return 0; ++ ++ return dev->ops->reset_switch(dev); ++} ++ ++enum global_defaults { ++ GLOBAL_APPLY, ++ GLOBAL_RESET, ++}; ++ ++enum vlan_defaults { ++ VLAN_PORTS, ++}; ++ ++enum port_defaults { ++ PORT_PVID, ++ PORT_LINK, ++}; ++ ++static struct switch_attr default_global[] = { ++ [GLOBAL_APPLY] = { ++ .type = SWITCH_TYPE_NOVAL, ++ .name = "apply", ++ .description = "Activate changes in the hardware", ++ .set = swconfig_apply_config, ++ }, ++ [GLOBAL_RESET] = { ++ .type = SWITCH_TYPE_NOVAL, ++ .name = "reset", ++ .description = "Reset the switch", ++ .set = swconfig_reset_switch, ++ } ++}; ++ ++static struct switch_attr default_port[] = { ++ [PORT_PVID] = { ++ .type = SWITCH_TYPE_INT, ++ .name = "pvid", ++ .description = "Primary VLAN ID", ++ .set = swconfig_set_pvid, ++ .get = swconfig_get_pvid, ++ }, ++ [PORT_LINK] = { ++ .type = SWITCH_TYPE_STRING, ++ .name = "link", ++ .description = "Get port link information", ++ .set = NULL, ++ .get = swconfig_get_link, ++ } ++}; ++ ++static struct switch_attr default_vlan[] = { ++ [VLAN_PORTS] = { ++ .type = SWITCH_TYPE_PORTS, ++ .name = "ports", ++ .description = "VLAN port mapping", ++ .set = swconfig_set_vlan_ports, ++ .get = swconfig_get_vlan_ports, ++ }, ++}; ++ ++static const struct switch_attr * ++swconfig_find_attr_by_name(const struct switch_attrlist *alist, ++ const char *name) ++{ ++ int i; ++ ++ for (i = 0; i < alist->n_attr; i++) ++ if (strcmp(name, alist->attr[i].name) == 0) ++ return &alist->attr[i]; ++ ++ return NULL; ++} ++ ++static void swconfig_defaults_init(struct switch_dev *dev) ++{ ++ const struct switch_dev_ops *ops = dev->ops; ++ ++ dev->def_global = 0; ++ dev->def_vlan = 0; ++ dev->def_port = 0; ++ ++ if (ops->get_vlan_ports || ops->set_vlan_ports) ++ set_bit(VLAN_PORTS, &dev->def_vlan); ++ ++ if (ops->get_port_pvid || ops->set_port_pvid) ++ set_bit(PORT_PVID, &dev->def_port); ++ ++ if (ops->get_port_link && ++ !swconfig_find_attr_by_name(&ops->attr_port, "link")) ++ set_bit(PORT_LINK, &dev->def_port); ++ ++ /* always present, can be no-op */ ++ set_bit(GLOBAL_APPLY, &dev->def_global); ++ set_bit(GLOBAL_RESET, &dev->def_global); ++} ++ ++ ++static struct genl_family switch_fam = { ++ .id = GENL_ID_GENERATE, ++ .name = "switch", ++ .hdrsize = 0, ++ .version = 1, ++ .maxattr = SWITCH_ATTR_MAX, ++}; ++ ++static const struct nla_policy switch_policy[SWITCH_ATTR_MAX+1] = { ++ [SWITCH_ATTR_ID] = { .type = NLA_U32 }, ++ [SWITCH_ATTR_OP_ID] = { .type = NLA_U32 }, ++ [SWITCH_ATTR_OP_PORT] = { .type = NLA_U32 }, ++ [SWITCH_ATTR_OP_VLAN] = { .type = NLA_U32 }, ++ [SWITCH_ATTR_OP_VALUE_INT] = { .type = NLA_U32 }, ++ [SWITCH_ATTR_OP_VALUE_STR] = { .type = NLA_NUL_STRING }, ++ [SWITCH_ATTR_OP_VALUE_PORTS] = { .type = NLA_NESTED }, ++ [SWITCH_ATTR_TYPE] = { .type = NLA_U32 }, ++}; ++ ++static const struct nla_policy port_policy[SWITCH_PORT_ATTR_MAX+1] = { ++ [SWITCH_PORT_ID] = { .type = NLA_U32 }, ++ [SWITCH_PORT_FLAG_TAGGED] = { .type = NLA_FLAG }, ++}; ++ ++static inline void ++swconfig_lock(void) ++{ ++ spin_lock(&swdevs_lock); ++} ++ ++static inline void ++swconfig_unlock(void) ++{ ++ spin_unlock(&swdevs_lock); ++} ++ ++static struct switch_dev * ++swconfig_get_dev(struct genl_info *info) ++{ ++ struct switch_dev *dev = NULL; ++ struct switch_dev *p; ++ int id; ++ ++ if (!info->attrs[SWITCH_ATTR_ID]) ++ goto done; ++ ++ id = nla_get_u32(info->attrs[SWITCH_ATTR_ID]); ++ swconfig_lock(); ++ list_for_each_entry(p, &swdevs, dev_list) { ++ if (id != p->id) ++ continue; ++ ++ dev = p; ++ break; ++ } ++ if (dev) ++ mutex_lock(&dev->sw_mutex); ++ else ++ pr_debug("device %d not found\n", id); ++ swconfig_unlock(); ++done: ++ return dev; ++} ++ ++static inline void ++swconfig_put_dev(struct switch_dev *dev) ++{ ++ mutex_unlock(&dev->sw_mutex); ++} ++ ++static int ++swconfig_dump_attr(struct swconfig_callback *cb, void *arg) ++{ ++ struct switch_attr *op = arg; ++ struct genl_info *info = cb->info; ++ struct sk_buff *msg = cb->msg; ++ int id = cb->args[0]; ++ void *hdr; ++ ++ hdr = genlmsg_put(msg, info->snd_portid, info->snd_seq, &switch_fam, ++ NLM_F_MULTI, SWITCH_CMD_NEW_ATTR); ++ if (IS_ERR(hdr)) ++ return -1; ++ ++ if (nla_put_u32(msg, SWITCH_ATTR_OP_ID, id)) ++ goto nla_put_failure; ++ if (nla_put_u32(msg, SWITCH_ATTR_OP_TYPE, op->type)) ++ goto nla_put_failure; ++ if (nla_put_string(msg, SWITCH_ATTR_OP_NAME, op->name)) ++ goto nla_put_failure; ++ if (op->description) ++ if (nla_put_string(msg, SWITCH_ATTR_OP_DESCRIPTION, ++ op->description)) ++ goto nla_put_failure; ++ ++ genlmsg_end(msg, hdr); ++ return msg->len; ++nla_put_failure: ++ genlmsg_cancel(msg, hdr); ++ return -EMSGSIZE; ++} ++ ++/* spread multipart messages across multiple message buffers */ ++static int ++swconfig_send_multipart(struct swconfig_callback *cb, void *arg) ++{ ++ struct genl_info *info = cb->info; ++ int restart = 0; ++ int err; ++ ++ do { ++ if (!cb->msg) { ++ cb->msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); ++ if (cb->msg == NULL) ++ goto error; ++ } ++ ++ if (!(cb->fill(cb, arg) < 0)) ++ break; ++ ++ /* fill failed, check if this was already the second attempt */ ++ if (restart) ++ goto error; ++ ++ /* try again in a new message, send the current one */ ++ restart = 1; ++ if (cb->close) { ++ if (cb->close(cb, arg) < 0) ++ goto error; ++ } ++ err = genlmsg_reply(cb->msg, info); ++ cb->msg = NULL; ++ if (err < 0) ++ goto error; ++ ++ } while (restart); ++ ++ return 0; ++ ++error: ++ if (cb->msg) ++ nlmsg_free(cb->msg); ++ return -1; ++} ++ ++static int ++swconfig_list_attrs(struct sk_buff *skb, struct genl_info *info) ++{ ++ struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); ++ const struct switch_attrlist *alist; ++ struct switch_dev *dev; ++ struct swconfig_callback cb; ++ int err = -EINVAL; ++ int i; ++ ++ /* defaults */ ++ struct switch_attr *def_list; ++ unsigned long *def_active; ++ int n_def; ++ ++ dev = swconfig_get_dev(info); ++ if (!dev) ++ return -EINVAL; ++ ++ switch (hdr->cmd) { ++ case SWITCH_CMD_LIST_GLOBAL: ++ alist = &dev->ops->attr_global; ++ def_list = default_global; ++ def_active = &dev->def_global; ++ n_def = ARRAY_SIZE(default_global); ++ break; ++ case SWITCH_CMD_LIST_VLAN: ++ alist = &dev->ops->attr_vlan; ++ def_list = default_vlan; ++ def_active = &dev->def_vlan; ++ n_def = ARRAY_SIZE(default_vlan); ++ break; ++ case SWITCH_CMD_LIST_PORT: ++ alist = &dev->ops->attr_port; ++ def_list = default_port; ++ def_active = &dev->def_port; ++ n_def = ARRAY_SIZE(default_port); ++ break; ++ default: ++ WARN_ON(1); ++ goto out; ++ } ++ ++ memset(&cb, 0, sizeof(cb)); ++ cb.info = info; ++ cb.fill = swconfig_dump_attr; ++ for (i = 0; i < alist->n_attr; i++) { ++ if (alist->attr[i].disabled) ++ continue; ++ cb.args[0] = i; ++ err = swconfig_send_multipart(&cb, (void *) &alist->attr[i]); ++ if (err < 0) ++ goto error; ++ } ++ ++ /* defaults */ ++ for (i = 0; i < n_def; i++) { ++ if (!test_bit(i, def_active)) ++ continue; ++ cb.args[0] = SWITCH_ATTR_DEFAULTS_OFFSET + i; ++ err = swconfig_send_multipart(&cb, (void *) &def_list[i]); ++ if (err < 0) ++ goto error; ++ } ++ swconfig_put_dev(dev); ++ ++ if (!cb.msg) ++ return 0; ++ ++ return genlmsg_reply(cb.msg, info); ++ ++error: ++ if (cb.msg) ++ nlmsg_free(cb.msg); ++out: ++ swconfig_put_dev(dev); ++ return err; ++} ++ ++static const struct switch_attr * ++swconfig_lookup_attr(struct switch_dev *dev, struct genl_info *info, ++ struct switch_val *val) ++{ ++ struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); ++ const struct switch_attrlist *alist; ++ const struct switch_attr *attr = NULL; ++ int attr_id; ++ ++ /* defaults */ ++ struct switch_attr *def_list; ++ unsigned long *def_active; ++ int n_def; ++ ++ if (!info->attrs[SWITCH_ATTR_OP_ID]) ++ goto done; ++ ++ switch (hdr->cmd) { ++ case SWITCH_CMD_SET_GLOBAL: ++ case SWITCH_CMD_GET_GLOBAL: ++ alist = &dev->ops->attr_global; ++ def_list = default_global; ++ def_active = &dev->def_global; ++ n_def = ARRAY_SIZE(default_global); ++ break; ++ case SWITCH_CMD_SET_VLAN: ++ case SWITCH_CMD_GET_VLAN: ++ alist = &dev->ops->attr_vlan; ++ def_list = default_vlan; ++ def_active = &dev->def_vlan; ++ n_def = ARRAY_SIZE(default_vlan); ++ if (!info->attrs[SWITCH_ATTR_OP_VLAN]) ++ goto done; ++ val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_VLAN]); ++ if (val->port_vlan >= dev->vlans) ++ goto done; ++ break; ++ case SWITCH_CMD_SET_PORT: ++ case SWITCH_CMD_GET_PORT: ++ alist = &dev->ops->attr_port; ++ def_list = default_port; ++ def_active = &dev->def_port; ++ n_def = ARRAY_SIZE(default_port); ++ if (!info->attrs[SWITCH_ATTR_OP_PORT]) ++ goto done; ++ val->port_vlan = nla_get_u32(info->attrs[SWITCH_ATTR_OP_PORT]); ++ if (val->port_vlan >= dev->ports) ++ goto done; ++ break; ++ default: ++ WARN_ON(1); ++ goto done; ++ } ++ ++ if (!alist) ++ goto done; ++ ++ attr_id = nla_get_u32(info->attrs[SWITCH_ATTR_OP_ID]); ++ if (attr_id >= SWITCH_ATTR_DEFAULTS_OFFSET) { ++ attr_id -= SWITCH_ATTR_DEFAULTS_OFFSET; ++ if (attr_id >= n_def) ++ goto done; ++ if (!test_bit(attr_id, def_active)) ++ goto done; ++ attr = &def_list[attr_id]; ++ } else { ++ if (attr_id >= alist->n_attr) ++ goto done; ++ attr = &alist->attr[attr_id]; ++ } ++ ++ if (attr->disabled) ++ attr = NULL; ++ ++done: ++ if (!attr) ++ pr_debug("attribute lookup failed\n"); ++ val->attr = attr; ++ return attr; ++} ++ ++static int ++swconfig_parse_ports(struct sk_buff *msg, struct nlattr *head, ++ struct switch_val *val, int max) ++{ ++ struct nlattr *nla; ++ int rem; ++ ++ val->len = 0; ++ nla_for_each_nested(nla, head, rem) { ++ struct nlattr *tb[SWITCH_PORT_ATTR_MAX+1]; ++ struct switch_port *port = &val->value.ports[val->len]; ++ ++ if (val->len >= max) ++ return -EINVAL; ++ ++ if (nla_parse_nested(tb, SWITCH_PORT_ATTR_MAX, nla, ++ port_policy)) ++ return -EINVAL; ++ ++ if (!tb[SWITCH_PORT_ID]) ++ return -EINVAL; ++ ++ port->id = nla_get_u32(tb[SWITCH_PORT_ID]); ++ if (tb[SWITCH_PORT_FLAG_TAGGED]) ++ port->flags |= (1 << SWITCH_PORT_FLAG_TAGGED); ++ val->len++; ++ } ++ ++ return 0; ++} ++ ++static int ++swconfig_set_attr(struct sk_buff *skb, struct genl_info *info) ++{ ++ const struct switch_attr *attr; ++ struct switch_dev *dev; ++ struct switch_val val; ++ int err = -EINVAL; ++ ++ dev = swconfig_get_dev(info); ++ if (!dev) ++ return -EINVAL; ++ ++ memset(&val, 0, sizeof(val)); ++ attr = swconfig_lookup_attr(dev, info, &val); ++ if (!attr || !attr->set) ++ goto error; ++ ++ val.attr = attr; ++ switch (attr->type) { ++ case SWITCH_TYPE_NOVAL: ++ break; ++ case SWITCH_TYPE_INT: ++ if (!info->attrs[SWITCH_ATTR_OP_VALUE_INT]) ++ goto error; ++ val.value.i = ++ nla_get_u32(info->attrs[SWITCH_ATTR_OP_VALUE_INT]); ++ break; ++ case SWITCH_TYPE_STRING: ++ if (!info->attrs[SWITCH_ATTR_OP_VALUE_STR]) ++ goto error; ++ val.value.s = ++ nla_data(info->attrs[SWITCH_ATTR_OP_VALUE_STR]); ++ break; ++ case SWITCH_TYPE_PORTS: ++ val.value.ports = dev->portbuf; ++ memset(dev->portbuf, 0, ++ sizeof(struct switch_port) * dev->ports); ++ ++ /* TODO: implement multipart? */ ++ if (info->attrs[SWITCH_ATTR_OP_VALUE_PORTS]) { ++ err = swconfig_parse_ports(skb, ++ info->attrs[SWITCH_ATTR_OP_VALUE_PORTS], ++ &val, dev->ports); ++ if (err < 0) ++ goto error; ++ } else { ++ val.len = 0; ++ err = 0; ++ } ++ break; ++ default: ++ goto error; ++ } ++ ++ err = attr->set(dev, attr, &val); ++error: ++ swconfig_put_dev(dev); ++ return err; ++} ++ ++static int ++swconfig_close_portlist(struct swconfig_callback *cb, void *arg) ++{ ++ if (cb->nest[0]) ++ nla_nest_end(cb->msg, cb->nest[0]); ++ return 0; ++} ++ ++static int ++swconfig_send_port(struct swconfig_callback *cb, void *arg) ++{ ++ const struct switch_port *port = arg; ++ struct nlattr *p = NULL; ++ ++ if (!cb->nest[0]) { ++ cb->nest[0] = nla_nest_start(cb->msg, cb->cmd); ++ if (!cb->nest[0]) ++ return -1; ++ } ++ ++ p = nla_nest_start(cb->msg, SWITCH_ATTR_PORT); ++ if (!p) ++ goto error; ++ ++ if (nla_put_u32(cb->msg, SWITCH_PORT_ID, port->id)) ++ goto nla_put_failure; ++ if (port->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) { ++ if (nla_put_flag(cb->msg, SWITCH_PORT_FLAG_TAGGED)) ++ goto nla_put_failure; ++ } ++ ++ nla_nest_end(cb->msg, p); ++ return 0; ++ ++nla_put_failure: ++ nla_nest_cancel(cb->msg, p); ++error: ++ nla_nest_cancel(cb->msg, cb->nest[0]); ++ return -1; ++} ++ ++static int ++swconfig_send_ports(struct sk_buff **msg, struct genl_info *info, int attr, ++ const struct switch_val *val) ++{ ++ struct swconfig_callback cb; ++ int err = 0; ++ int i; ++ ++ if (!val->value.ports) ++ return -EINVAL; ++ ++ memset(&cb, 0, sizeof(cb)); ++ cb.cmd = attr; ++ cb.msg = *msg; ++ cb.info = info; ++ cb.fill = swconfig_send_port; ++ cb.close = swconfig_close_portlist; ++ ++ cb.nest[0] = nla_nest_start(cb.msg, cb.cmd); ++ for (i = 0; i < val->len; i++) { ++ err = swconfig_send_multipart(&cb, &val->value.ports[i]); ++ if (err) ++ goto done; ++ } ++ err = val->len; ++ swconfig_close_portlist(&cb, NULL); ++ *msg = cb.msg; ++ ++done: ++ return err; ++} ++ ++static int ++swconfig_get_attr(struct sk_buff *skb, struct genl_info *info) ++{ ++ struct genlmsghdr *hdr = nlmsg_data(info->nlhdr); ++ const struct switch_attr *attr; ++ struct switch_dev *dev; ++ struct sk_buff *msg = NULL; ++ struct switch_val val; ++ int err = -EINVAL; ++ int cmd = hdr->cmd; ++ ++ dev = swconfig_get_dev(info); ++ if (!dev) ++ return -EINVAL; ++ ++ memset(&val, 0, sizeof(val)); ++ attr = swconfig_lookup_attr(dev, info, &val); ++ if (!attr || !attr->get) ++ goto error; ++ ++ if (attr->type == SWITCH_TYPE_PORTS) { ++ val.value.ports = dev->portbuf; ++ memset(dev->portbuf, 0, ++ sizeof(struct switch_port) * dev->ports); ++ } ++ ++ err = attr->get(dev, attr, &val); ++ if (err) ++ goto error; ++ ++ msg = nlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); ++ if (!msg) ++ goto error; ++ ++ hdr = genlmsg_put(msg, info->snd_portid, info->snd_seq, &switch_fam, ++ 0, cmd); ++ if (IS_ERR(hdr)) ++ goto nla_put_failure; ++ ++ switch (attr->type) { ++ case SWITCH_TYPE_INT: ++ if (nla_put_u32(msg, SWITCH_ATTR_OP_VALUE_INT, val.value.i)) ++ goto nla_put_failure; ++ break; ++ case SWITCH_TYPE_STRING: ++ if (nla_put_string(msg, SWITCH_ATTR_OP_VALUE_STR, val.value.s)) ++ goto nla_put_failure; ++ break; ++ case SWITCH_TYPE_PORTS: ++ err = swconfig_send_ports(&msg, info, ++ SWITCH_ATTR_OP_VALUE_PORTS, &val); ++ if (err < 0) ++ goto nla_put_failure; ++ break; ++ default: ++ pr_debug("invalid type in attribute\n"); ++ err = -EINVAL; ++ goto error; ++ } ++ genlmsg_end(msg, hdr); ++ err = msg->len; ++ if (err < 0) ++ goto nla_put_failure; ++ ++ swconfig_put_dev(dev); ++ return genlmsg_reply(msg, info); ++ ++nla_put_failure: ++ if (msg) ++ nlmsg_free(msg); ++error: ++ swconfig_put_dev(dev); ++ if (!err) ++ err = -ENOMEM; ++ return err; ++} ++ ++static int ++swconfig_send_switch(struct sk_buff *msg, u32 pid, u32 seq, int flags, ++ const struct switch_dev *dev) ++{ ++ struct nlattr *p = NULL, *m = NULL; ++ void *hdr; ++ int i; ++ ++ hdr = genlmsg_put(msg, pid, seq, &switch_fam, flags, ++ SWITCH_CMD_NEW_ATTR); ++ if (IS_ERR(hdr)) ++ return -1; ++ ++ if (nla_put_u32(msg, SWITCH_ATTR_ID, dev->id)) ++ goto nla_put_failure; ++ if (nla_put_string(msg, SWITCH_ATTR_DEV_NAME, dev->devname)) ++ goto nla_put_failure; ++ if (nla_put_string(msg, SWITCH_ATTR_ALIAS, dev->alias)) ++ goto nla_put_failure; ++ if (nla_put_string(msg, SWITCH_ATTR_NAME, dev->name)) ++ goto nla_put_failure; ++ if (nla_put_u32(msg, SWITCH_ATTR_VLANS, dev->vlans)) ++ goto nla_put_failure; ++ if (nla_put_u32(msg, SWITCH_ATTR_PORTS, dev->ports)) ++ goto nla_put_failure; ++ if (nla_put_u32(msg, SWITCH_ATTR_CPU_PORT, dev->cpu_port)) ++ goto nla_put_failure; ++ ++ m = nla_nest_start(msg, SWITCH_ATTR_PORTMAP); ++ if (!m) ++ goto nla_put_failure; ++ for (i = 0; i < dev->ports; i++) { ++ p = nla_nest_start(msg, SWITCH_ATTR_PORTS); ++ if (!p) ++ continue; ++ if (dev->portmap[i].s) { ++ if (nla_put_string(msg, SWITCH_PORTMAP_SEGMENT, ++ dev->portmap[i].s)) ++ goto nla_put_failure; ++ if (nla_put_u32(msg, SWITCH_PORTMAP_VIRT, ++ dev->portmap[i].virt)) ++ goto nla_put_failure; ++ } ++ nla_nest_end(msg, p); ++ } ++ nla_nest_end(msg, m); ++ genlmsg_end(msg, hdr); ++ return msg->len; ++nla_put_failure: ++ genlmsg_cancel(msg, hdr); ++ return -EMSGSIZE; ++} ++ ++static int swconfig_dump_switches(struct sk_buff *skb, ++ struct netlink_callback *cb) ++{ ++ struct switch_dev *dev; ++ int start = cb->args[0]; ++ int idx = 0; ++ ++ swconfig_lock(); ++ list_for_each_entry(dev, &swdevs, dev_list) { ++ if (++idx <= start) ++ continue; ++ if (swconfig_send_switch(skb, NETLINK_CB(cb->skb).portid, ++ cb->nlh->nlmsg_seq, NLM_F_MULTI, ++ dev) < 0) ++ break; ++ } ++ swconfig_unlock(); ++ cb->args[0] = idx; ++ ++ return skb->len; ++} ++ ++static int ++swconfig_done(struct netlink_callback *cb) ++{ ++ return 0; ++} ++ ++static struct genl_ops swconfig_ops[] = { ++ { ++ .cmd = SWITCH_CMD_LIST_GLOBAL, ++ .doit = swconfig_list_attrs, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_LIST_VLAN, ++ .doit = swconfig_list_attrs, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_LIST_PORT, ++ .doit = swconfig_list_attrs, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_GET_GLOBAL, ++ .doit = swconfig_get_attr, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_GET_VLAN, ++ .doit = swconfig_get_attr, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_GET_PORT, ++ .doit = swconfig_get_attr, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_SET_GLOBAL, ++ .doit = swconfig_set_attr, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_SET_VLAN, ++ .doit = swconfig_set_attr, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_SET_PORT, ++ .doit = swconfig_set_attr, ++ .policy = switch_policy, ++ }, ++ { ++ .cmd = SWITCH_CMD_GET_SWITCH, ++ .dumpit = swconfig_dump_switches, ++ .policy = switch_policy, ++ .done = swconfig_done, ++ } ++}; ++ ++#ifdef CONFIG_OF ++void ++of_switch_load_portmap(struct switch_dev *dev) ++{ ++ struct device_node *port; ++ ++ if (!dev->of_node) ++ return; ++ ++ for_each_child_of_node(dev->of_node, port) { ++ const __be32 *prop; ++ const char *segment; ++ int size, phys; ++ ++ if (!of_device_is_compatible(port, "swconfig,port")) ++ continue; ++ ++ if (of_property_read_string(port, "swconfig,segment", &segment)) ++ continue; ++ ++ prop = of_get_property(port, "swconfig,portmap", &size); ++ if (!prop) ++ continue; ++ ++ if (size != (2 * sizeof(*prop))) { ++ pr_err("%s: failed to parse port mapping\n", ++ port->name); ++ continue; ++ } ++ ++ phys = be32_to_cpup(prop++); ++ if ((phys < 0) | (phys >= dev->ports)) { ++ pr_err("%s: physical port index out of range\n", ++ port->name); ++ continue; ++ } ++ ++ dev->portmap[phys].s = kstrdup(segment, GFP_KERNEL); ++ dev->portmap[phys].virt = be32_to_cpup(prop); ++ pr_debug("Found port: %s, physical: %d, virtual: %d\n", ++ segment, phys, dev->portmap[phys].virt); ++ } ++} ++#endif ++ ++int ++register_switch(struct switch_dev *dev, struct net_device *netdev) ++{ ++ struct switch_dev *sdev; ++ const int max_switches = 8 * sizeof(unsigned long); ++ unsigned long in_use = 0; ++ int err; ++ int i; ++ ++ INIT_LIST_HEAD(&dev->dev_list); ++ if (netdev) { ++ dev->netdev = netdev; ++ if (!dev->alias) ++ dev->alias = netdev->name; ++ } ++ BUG_ON(!dev->alias); ++ ++ if (dev->ports > 0) { ++ dev->portbuf = kzalloc(sizeof(struct switch_port) * ++ dev->ports, GFP_KERNEL); ++ if (!dev->portbuf) ++ return -ENOMEM; ++ dev->portmap = kzalloc(sizeof(struct switch_portmap) * ++ dev->ports, GFP_KERNEL); ++ if (!dev->portmap) { ++ kfree(dev->portbuf); ++ return -ENOMEM; ++ } ++ } ++ swconfig_defaults_init(dev); ++ mutex_init(&dev->sw_mutex); ++ swconfig_lock(); ++ dev->id = ++swdev_id; ++ ++ list_for_each_entry(sdev, &swdevs, dev_list) { ++ if (!sscanf(sdev->devname, SWCONFIG_DEVNAME, &i)) ++ continue; ++ if (i < 0 || i > max_switches) ++ continue; ++ ++ set_bit(i, &in_use); ++ } ++ i = find_first_zero_bit(&in_use, max_switches); ++ ++ if (i == max_switches) { ++ swconfig_unlock(); ++ return -ENFILE; ++ } ++ ++#ifdef CONFIG_OF ++ if (dev->ports) ++ of_switch_load_portmap(dev); ++#endif ++ ++ /* fill device name */ ++ snprintf(dev->devname, IFNAMSIZ, SWCONFIG_DEVNAME, i); ++ ++ list_add_tail(&dev->dev_list, &swdevs); ++ swconfig_unlock(); ++ ++ err = swconfig_create_led_trigger(dev); ++ if (err) ++ return err; ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(register_switch); ++ ++void ++unregister_switch(struct switch_dev *dev) ++{ ++ swconfig_destroy_led_trigger(dev); ++ kfree(dev->portbuf); ++ mutex_lock(&dev->sw_mutex); ++ swconfig_lock(); ++ list_del(&dev->dev_list); ++ swconfig_unlock(); ++ mutex_unlock(&dev->sw_mutex); ++} ++EXPORT_SYMBOL_GPL(unregister_switch); ++ ++ ++static int __init ++swconfig_init(void) ++{ ++ int err; ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)) ++ int i; ++#endif ++ ++ INIT_LIST_HEAD(&swdevs); ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)) ++ err = genl_register_family(&switch_fam); ++ if (err) ++ return err; ++ ++ for (i = 0; i < ARRAY_SIZE(swconfig_ops); i++) { ++ err = genl_register_ops(&switch_fam, &swconfig_ops[i]); ++ if (err) ++ goto unregister; ++ } ++ return 0; ++ ++unregister: ++ genl_unregister_family(&switch_fam); ++ return err; ++#else ++ err = genl_register_family_with_ops(&switch_fam, swconfig_ops); ++ if (err) ++ return err; ++ return 0; ++#endif ++} ++ ++static void __exit ++swconfig_exit(void) ++{ ++ genl_unregister_family(&switch_fam); ++} ++ ++module_init(swconfig_init); ++module_exit(swconfig_exit); ++ +diff -Nur linux-4.1.13.orig/drivers/net/phy/swconfig_leds.c linux-4.1.13/drivers/net/phy/swconfig_leds.c +--- linux-4.1.13.orig/drivers/net/phy/swconfig_leds.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/net/phy/swconfig_leds.c 2015-12-04 21:45:30.824406773 +0100 +@@ -0,0 +1,354 @@ ++/* ++ * swconfig_led.c: LED trigger support for the switch configuration API ++ * ++ * Copyright (C) 2011 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ */ ++ ++#ifdef CONFIG_SWCONFIG_LEDS ++ ++#include ++#include ++#include ++#include ++ ++#define SWCONFIG_LED_TIMER_INTERVAL (HZ / 10) ++#define SWCONFIG_LED_NUM_PORTS 32 ++ ++struct switch_led_trigger { ++ struct led_trigger trig; ++ struct switch_dev *swdev; ++ ++ struct delayed_work sw_led_work; ++ u32 port_mask; ++ u32 port_link; ++ unsigned long port_traffic[SWCONFIG_LED_NUM_PORTS]; ++}; ++ ++struct swconfig_trig_data { ++ struct led_classdev *led_cdev; ++ struct switch_dev *swdev; ++ ++ rwlock_t lock; ++ u32 port_mask; ++ ++ bool prev_link; ++ unsigned long prev_traffic; ++ enum led_brightness prev_brightness; ++}; ++ ++static void ++swconfig_trig_set_brightness(struct swconfig_trig_data *trig_data, ++ enum led_brightness brightness) ++{ ++ led_set_brightness(trig_data->led_cdev, brightness); ++ trig_data->prev_brightness = brightness; ++} ++ ++static void ++swconfig_trig_update_port_mask(struct led_trigger *trigger) ++{ ++ struct list_head *entry; ++ struct switch_led_trigger *sw_trig; ++ u32 port_mask; ++ ++ if (!trigger) ++ return; ++ ++ sw_trig = (void *) trigger; ++ ++ port_mask = 0; ++ read_lock(&trigger->leddev_list_lock); ++ list_for_each(entry, &trigger->led_cdevs) { ++ struct led_classdev *led_cdev; ++ struct swconfig_trig_data *trig_data; ++ ++ led_cdev = list_entry(entry, struct led_classdev, trig_list); ++ trig_data = led_cdev->trigger_data; ++ if (trig_data) { ++ read_lock(&trig_data->lock); ++ port_mask |= trig_data->port_mask; ++ read_unlock(&trig_data->lock); ++ } ++ } ++ read_unlock(&trigger->leddev_list_lock); ++ ++ sw_trig->port_mask = port_mask; ++ ++ if (port_mask) ++ schedule_delayed_work(&sw_trig->sw_led_work, ++ SWCONFIG_LED_TIMER_INTERVAL); ++ else ++ cancel_delayed_work_sync(&sw_trig->sw_led_work); ++} ++ ++static ssize_t ++swconfig_trig_port_mask_store(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ struct led_classdev *led_cdev = dev_get_drvdata(dev); ++ struct swconfig_trig_data *trig_data = led_cdev->trigger_data; ++ unsigned long port_mask; ++ ssize_t ret = -EINVAL; ++ char *after; ++ size_t count; ++ ++ port_mask = simple_strtoul(buf, &after, 16); ++ count = after - buf; ++ ++ if (*after && isspace(*after)) ++ count++; ++ ++ if (count == size) { ++ bool changed; ++ ++ write_lock(&trig_data->lock); ++ ++ changed = (trig_data->port_mask != port_mask); ++ if (changed) { ++ trig_data->port_mask = port_mask; ++ if (port_mask == 0) ++ swconfig_trig_set_brightness(trig_data, LED_OFF); ++ } ++ ++ write_unlock(&trig_data->lock); ++ ++ if (changed) ++ swconfig_trig_update_port_mask(led_cdev->trigger); ++ ++ ret = count; ++ } ++ ++ return ret; ++} ++ ++static ssize_t ++swconfig_trig_port_mask_show(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ struct led_classdev *led_cdev = dev_get_drvdata(dev); ++ struct swconfig_trig_data *trig_data = led_cdev->trigger_data; ++ ++ read_lock(&trig_data->lock); ++ sprintf(buf, "%#x\n", trig_data->port_mask); ++ read_unlock(&trig_data->lock); ++ ++ return strlen(buf) + 1; ++} ++ ++static DEVICE_ATTR(port_mask, 0644, swconfig_trig_port_mask_show, ++ swconfig_trig_port_mask_store); ++ ++static void ++swconfig_trig_activate(struct led_classdev *led_cdev) ++{ ++ struct switch_led_trigger *sw_trig; ++ struct swconfig_trig_data *trig_data; ++ int err; ++ ++ if (led_cdev->trigger->activate != swconfig_trig_activate) ++ return; ++ ++ trig_data = kzalloc(sizeof(struct swconfig_trig_data), GFP_KERNEL); ++ if (!trig_data) ++ return; ++ ++ sw_trig = (void *) led_cdev->trigger; ++ ++ rwlock_init(&trig_data->lock); ++ trig_data->led_cdev = led_cdev; ++ trig_data->swdev = sw_trig->swdev; ++ led_cdev->trigger_data = trig_data; ++ ++ err = device_create_file(led_cdev->dev, &dev_attr_port_mask); ++ if (err) ++ goto err_free; ++ ++ return; ++ ++err_free: ++ led_cdev->trigger_data = NULL; ++ kfree(trig_data); ++} ++ ++static void ++swconfig_trig_deactivate(struct led_classdev *led_cdev) ++{ ++ struct swconfig_trig_data *trig_data; ++ ++ swconfig_trig_update_port_mask(led_cdev->trigger); ++ ++ trig_data = (void *) led_cdev->trigger_data; ++ if (trig_data) { ++ device_remove_file(led_cdev->dev, &dev_attr_port_mask); ++ kfree(trig_data); ++ } ++} ++ ++static void ++swconfig_trig_led_event(struct switch_led_trigger *sw_trig, ++ struct led_classdev *led_cdev) ++{ ++ struct swconfig_trig_data *trig_data; ++ u32 port_mask; ++ bool link; ++ ++ trig_data = led_cdev->trigger_data; ++ if (!trig_data) ++ return; ++ ++ read_lock(&trig_data->lock); ++ port_mask = trig_data->port_mask; ++ read_unlock(&trig_data->lock); ++ ++ link = !!(sw_trig->port_link & port_mask); ++ if (!link) { ++ if (link != trig_data->prev_link) ++ swconfig_trig_set_brightness(trig_data, LED_OFF); ++ } else { ++ unsigned long traffic; ++ int i; ++ ++ traffic = 0; ++ for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) { ++ if (port_mask & (1 << i)) ++ traffic += sw_trig->port_traffic[i]; ++ } ++ ++ if (trig_data->prev_brightness != LED_FULL) ++ swconfig_trig_set_brightness(trig_data, LED_FULL); ++ else if (traffic != trig_data->prev_traffic) ++ swconfig_trig_set_brightness(trig_data, LED_OFF); ++ ++ trig_data->prev_traffic = traffic; ++ } ++ ++ trig_data->prev_link = link; ++} ++ ++static void ++swconfig_trig_update_leds(struct switch_led_trigger *sw_trig) ++{ ++ struct list_head *entry; ++ struct led_trigger *trigger; ++ ++ trigger = &sw_trig->trig; ++ read_lock(&trigger->leddev_list_lock); ++ list_for_each(entry, &trigger->led_cdevs) { ++ struct led_classdev *led_cdev; ++ ++ led_cdev = list_entry(entry, struct led_classdev, trig_list); ++ swconfig_trig_led_event(sw_trig, led_cdev); ++ } ++ read_unlock(&trigger->leddev_list_lock); ++} ++ ++static void ++swconfig_led_work_func(struct work_struct *work) ++{ ++ struct switch_led_trigger *sw_trig; ++ struct switch_dev *swdev; ++ u32 port_mask; ++ u32 link; ++ int i; ++ ++ sw_trig = container_of(work, struct switch_led_trigger, ++ sw_led_work.work); ++ ++ port_mask = sw_trig->port_mask; ++ swdev = sw_trig->swdev; ++ ++ link = 0; ++ for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) { ++ u32 port_bit; ++ ++ port_bit = BIT(i); ++ if ((port_mask & port_bit) == 0) ++ continue; ++ ++ if (swdev->ops->get_port_link) { ++ struct switch_port_link port_link; ++ ++ memset(&port_link, '\0', sizeof(port_link)); ++ swdev->ops->get_port_link(swdev, i, &port_link); ++ ++ if (port_link.link) ++ link |= port_bit; ++ } ++ ++ if (swdev->ops->get_port_stats) { ++ struct switch_port_stats port_stats; ++ ++ memset(&port_stats, '\0', sizeof(port_stats)); ++ swdev->ops->get_port_stats(swdev, i, &port_stats); ++ sw_trig->port_traffic[i] = port_stats.tx_bytes + ++ port_stats.rx_bytes; ++ } ++ } ++ ++ sw_trig->port_link = link; ++ ++ swconfig_trig_update_leds(sw_trig); ++ ++ schedule_delayed_work(&sw_trig->sw_led_work, ++ SWCONFIG_LED_TIMER_INTERVAL); ++} ++ ++static int ++swconfig_create_led_trigger(struct switch_dev *swdev) ++{ ++ struct switch_led_trigger *sw_trig; ++ int err; ++ ++ if (!swdev->ops->get_port_link) ++ return 0; ++ ++ sw_trig = kzalloc(sizeof(struct switch_led_trigger), GFP_KERNEL); ++ if (!sw_trig) ++ return -ENOMEM; ++ ++ sw_trig->swdev = swdev; ++ sw_trig->trig.name = swdev->devname; ++ sw_trig->trig.activate = swconfig_trig_activate; ++ sw_trig->trig.deactivate = swconfig_trig_deactivate; ++ ++ INIT_DELAYED_WORK(&sw_trig->sw_led_work, swconfig_led_work_func); ++ ++ err = led_trigger_register(&sw_trig->trig); ++ if (err) ++ goto err_free; ++ ++ swdev->led_trigger = sw_trig; ++ ++ return 0; ++ ++err_free: ++ kfree(sw_trig); ++ return err; ++} ++ ++static void ++swconfig_destroy_led_trigger(struct switch_dev *swdev) ++{ ++ struct switch_led_trigger *sw_trig; ++ ++ sw_trig = swdev->led_trigger; ++ if (sw_trig) { ++ cancel_delayed_work_sync(&sw_trig->sw_led_work); ++ led_trigger_unregister(&sw_trig->trig); ++ kfree(sw_trig); ++ } ++} ++ ++#else /* SWCONFIG_LEDS */ ++static inline int ++swconfig_create_led_trigger(struct switch_dev *swdev) { return 0; } ++ ++static inline void ++swconfig_destroy_led_trigger(struct switch_dev *swdev) { } ++#endif /* CONFIG_SWCONFIG_LEDS */ +diff -Nur linux-4.1.13.orig/drivers/spi/Kconfig linux-4.1.13/drivers/spi/Kconfig +--- linux-4.1.13.orig/drivers/spi/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/spi/Kconfig 2015-12-04 19:57:03.922108288 +0100 +@@ -59,6 +59,14 @@ + help + This is the driver for the Altera SPI Controller. + ++config SPI_AP83 ++ tristate "Atheros AP83 specific SPI Controller" ++ depends on SPI_MASTER && ATH79_MACH_AP83 ++ select SPI_BITBANG ++ help ++ This is a specific SPI controller driver for the Atheros AP83 ++ reference board. ++ + config SPI_ATH79 + tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" + depends on ATH79 && GPIOLIB +@@ -448,6 +456,12 @@ + This driver can also be built as a module. If so, the module + will be called spi_qup. + ++config SPI_RB4XX ++ tristate "Mikrotik RB4XX SPI master" ++ depends on SPI_MASTER && ATH79_MACH_RB4XX ++ help ++ SPI controller driver for the Mikrotik RB4xx series boards. ++ + config SPI_S3C24XX + tristate "Samsung S3C24XX series SPI" + depends on ARCH_S3C24XX +@@ -661,6 +675,18 @@ + sysfs interface, with each line presented as a kind of GPIO + exposing both switch control and diagnostic feedback. + ++config SPI_RB4XX_CPLD ++ tristate "MikroTik RB4XX CPLD driver" ++ depends on ATH79_MACH_RB4XX ++ help ++ SPI driver for the Xilinx CPLD chip present on the ++ MikroTik RB4xx boards. ++ ++config SPI_VSC7385 ++ tristate "Vitesse VSC7385 ethernet switch driver" ++ help ++ SPI driver for the Vitesse VSC7385 ethernet switch. ++ + # + # Add new SPI protocol masters in alphabetical order above this line + # +diff -Nur linux-4.1.13.orig/drivers/spi/Makefile linux-4.1.13/drivers/spi/Makefile +--- linux-4.1.13.orig/drivers/spi/Makefile 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/spi/Makefile 2015-12-04 19:57:03.922108288 +0100 +@@ -12,6 +12,7 @@ + # SPI master controller drivers (bus) + obj-$(CONFIG_SPI_ALTERA) += spi-altera.o + obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o ++obj-$(CONFIG_SPI_AP83) += spi-ap83.o + obj-$(CONFIG_SPI_ATH79) += spi-ath79.o + obj-$(CONFIG_SPI_AU1550) += spi-au1550.o + obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o +@@ -64,6 +65,8 @@ + spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_DMA) += spi-pxa2xx-dma.o + obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o + obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o ++obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o ++obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o + obj-$(CONFIG_SPI_QUP) += spi-qup.o + obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o + obj-$(CONFIG_SPI_RSPI) += spi-rspi.o +@@ -86,6 +89,7 @@ + obj-$(CONFIG_SPI_TLE62X0) += spi-tle62x0.o + obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o + obj-$(CONFIG_SPI_TXX9) += spi-txx9.o ++obj-$(CONFIG_SPI_VSC7385) += spi-vsc7385.o + obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o + obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o + obj-$(CONFIG_SPI_XTENSA_XTFPGA) += spi-xtensa-xtfpga.o +diff -Nur linux-4.1.13.orig/drivers/spi/spi-ap83.c linux-4.1.13/drivers/spi/spi-ap83.c +--- linux-4.1.13.orig/drivers/spi/spi-ap83.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/spi/spi-ap83.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,283 @@ ++/* ++ * Atheros AP83 board specific SPI Controller driver ++ * ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define DRV_DESC "Atheros AP83 board SPI Controller driver" ++#define DRV_VERSION "0.1.0" ++#define DRV_NAME "ap83-spi" ++ ++#define AP83_SPI_CLK_HIGH (1 << 23) ++#define AP83_SPI_CLK_LOW 0 ++#define AP83_SPI_MOSI_HIGH (1 << 22) ++#define AP83_SPI_MOSI_LOW 0 ++ ++#define AP83_SPI_GPIO_CS 1 ++#define AP83_SPI_GPIO_MISO 3 ++ ++struct ap83_spi { ++ struct spi_bitbang bitbang; ++ void __iomem *base; ++ u32 addr; ++ ++ struct platform_device *pdev; ++}; ++ ++static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg) ++{ ++ return __raw_readl(sp->base + reg); ++} ++ ++static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi) ++{ ++ return spi_master_get_devdata(spi->master); ++} ++ ++static inline void setsck(struct spi_device *spi, int val) ++{ ++ struct ap83_spi *sp = spidev_to_sp(spi); ++ ++ if (val) ++ sp->addr |= AP83_SPI_CLK_HIGH; ++ else ++ sp->addr &= ~AP83_SPI_CLK_HIGH; ++ ++ dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n", ++ sp->addr, (val) ? "HIGH" : "LOW"); ++ ++ ap83_spi_rr(sp, sp->addr); ++} ++ ++static inline void setmosi(struct spi_device *spi, int val) ++{ ++ struct ap83_spi *sp = spidev_to_sp(spi); ++ ++ if (val) ++ sp->addr |= AP83_SPI_MOSI_HIGH; ++ else ++ sp->addr &= ~AP83_SPI_MOSI_HIGH; ++ ++ dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n", ++ sp->addr, (val) ? "HIGH" : "LOW"); ++ ++ ap83_spi_rr(sp, sp->addr); ++} ++ ++static inline u32 getmiso(struct spi_device *spi) ++{ ++ u32 ret; ++ ++ ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0; ++ dev_dbg(&spi->dev, "get MISO: %d\n", ret); ++ ++ return ret; ++} ++ ++static inline void do_spidelay(struct spi_device *spi, unsigned nsecs) ++{ ++ ndelay(nsecs); ++} ++ ++static void ap83_spi_chipselect(struct spi_device *spi, int on) ++{ ++ struct ap83_spi *sp = spidev_to_sp(spi); ++ ++ dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1); ++ ++ if (on) { ++ ath79_flash_acquire(); ++ ++ sp->addr = 0; ++ ap83_spi_rr(sp, sp->addr); ++ ++ gpio_set_value(AP83_SPI_GPIO_CS, 0); ++ } else { ++ gpio_set_value(AP83_SPI_GPIO_CS, 1); ++ ath79_flash_release(); ++ } ++} ++ ++#define spidelay(nsecs) \ ++ do { \ ++ /* Steal the spi_device pointer from our caller. \ ++ * The bitbang-API should probably get fixed here... */ \ ++ do_spidelay(spi, nsecs); \ ++ } while (0) ++ ++#define EXPAND_BITBANG_TXRX ++#include ++#include "spi-bitbang-txrx.h" ++ ++static u32 ap83_spi_txrx_mode0(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits); ++ return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); ++} ++ ++static u32 ap83_spi_txrx_mode1(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits); ++ return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); ++} ++ ++static u32 ap83_spi_txrx_mode2(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits); ++ return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); ++} ++ ++static u32 ap83_spi_txrx_mode3(struct spi_device *spi, ++ unsigned nsecs, u32 word, u8 bits) ++{ ++ dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits); ++ return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); ++} ++ ++static int ap83_spi_probe(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct ap83_spi *sp; ++ struct ap83_spi_platform_data *pdata; ++ struct resource *r; ++ int ret; ++ ++ ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso"); ++ if (ret) { ++ dev_err(&pdev->dev, "gpio request failed for MISO\n"); ++ return ret; ++ } ++ ++ ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs"); ++ if (ret) { ++ dev_err(&pdev->dev, "gpio request failed for CS\n"); ++ goto err_free_miso; ++ } ++ ++ ret = gpio_direction_input(AP83_SPI_GPIO_MISO); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to set direction of MISO\n"); ++ goto err_free_cs; ++ } ++ ++ ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0); ++ if (ret) { ++ dev_err(&pdev->dev, "unable to set direction of CS\n"); ++ goto err_free_cs; ++ } ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(*sp)); ++ if (master == NULL) { ++ dev_err(&pdev->dev, "failed to allocate spi master\n"); ++ return -ENOMEM; ++ } ++ ++ sp = spi_master_get_devdata(master); ++ platform_set_drvdata(pdev, sp); ++ ++ pdata = pdev->dev.platform_data; ++ ++ sp->bitbang.master = spi_master_get(master); ++ sp->bitbang.chipselect = ap83_spi_chipselect; ++ sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0; ++ sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1; ++ sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2; ++ sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3; ++ ++ sp->bitbang.master->bus_num = pdev->id; ++ sp->bitbang.master->num_chipselect = 1; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (r == NULL) { ++ ret = -ENOENT; ++ goto err_spi_put; ++ } ++ ++ sp->base = ioremap_nocache(r->start, r->end - r->start + 1); ++ if (!sp->base) { ++ ret = -ENXIO; ++ goto err_spi_put; ++ } ++ ++ ret = spi_bitbang_start(&sp->bitbang); ++ if (!ret) ++ goto err_unmap; ++ ++ dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start); ++ ++ return 0; ++ ++err_unmap: ++ iounmap(sp->base); ++err_spi_put: ++ platform_set_drvdata(pdev, NULL); ++ spi_master_put(sp->bitbang.master); ++ ++err_free_cs: ++ gpio_free(AP83_SPI_GPIO_CS); ++err_free_miso: ++ gpio_free(AP83_SPI_GPIO_MISO); ++ return ret; ++} ++ ++static int ap83_spi_remove(struct platform_device *pdev) ++{ ++ struct ap83_spi *sp = platform_get_drvdata(pdev); ++ ++ spi_bitbang_stop(&sp->bitbang); ++ iounmap(sp->base); ++ platform_set_drvdata(pdev, NULL); ++ spi_master_put(sp->bitbang.master); ++ ++ return 0; ++} ++ ++static struct platform_driver ap83_spi_drv = { ++ .probe = ap83_spi_probe, ++ .remove = ap83_spi_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init ap83_spi_init(void) ++{ ++ return platform_driver_register(&ap83_spi_drv); ++} ++module_init(ap83_spi_init); ++ ++static void __exit ap83_spi_exit(void) ++{ ++ platform_driver_unregister(&ap83_spi_drv); ++} ++module_exit(ap83_spi_exit); ++ ++MODULE_ALIAS("platform:" DRV_NAME); ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/spi/spi-ath79.c linux-4.1.13/drivers/spi/spi-ath79.c +--- linux-4.1.13.orig/drivers/spi/spi-ath79.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/spi/spi-ath79.c 2015-12-04 19:57:03.966105410 +0100 +@@ -33,6 +33,13 @@ + #define ATH79_SPI_RRW_DELAY_FACTOR 12000 + #define MHZ (1000 * 1000) + ++#define ATH79_SPI_CS_LINE_MAX 2 ++ ++enum ath79_spi_state { ++ ATH79_SPI_STATE_WAIT_CMD = 0, ++ ATH79_SPI_STATE_WAIT_READ, ++}; ++ + struct ath79_spi { + struct spi_bitbang bitbang; + u32 ioc_base; +@@ -40,6 +47,11 @@ + void __iomem *base; + struct clk *clk; + unsigned rrw_delay; ++ ++ enum ath79_spi_state state; ++ u32 clk_div; ++ unsigned long read_addr; ++ unsigned long ahb_rate; + }; + + static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg) +@@ -67,6 +79,7 @@ + { + struct ath79_spi *sp = ath79_spidev_to_sp(spi); + int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active; ++ struct ath79_spi_controller_data *cdata = spi->controller_data; + + if (is_active) { + /* set initial clock polarity */ +@@ -78,20 +91,24 @@ + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } + +- if (spi->chip_select) { +- struct ath79_spi_controller_data *cdata = spi->controller_data; +- +- /* SPI is normally active-low */ +- gpio_set_value(cdata->gpio, cs_high); +- } else { ++ switch (cdata->cs_type) { ++ case ATH79_SPI_CS_TYPE_INTERNAL: + if (cs_high) +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; ++ sp->ioc_base |= AR71XX_SPI_IOC_CS(cdata->cs_line); + else +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; ++ sp->ioc_base &= ~AR71XX_SPI_IOC_CS(cdata->cs_line); + + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); +- } ++ break; + ++ case ATH79_SPI_CS_TYPE_GPIO: ++ /* SPI is normally active-low */ ++ if (gpio_cansleep(cdata->cs_line)) ++ gpio_set_value_cansleep(cdata->cs_line, cs_high); ++ else ++ gpio_set_value(cdata->cs_line, cs_high); ++ break; ++ } + } + + static void ath79_spi_enable(struct ath79_spi *sp) +@@ -102,9 +119,6 @@ + /* save CTRL register */ + sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); + sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); +- +- /* TODO: setup speed? */ +- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); + } + + static void ath79_spi_disable(struct ath79_spi *sp) +@@ -118,24 +132,30 @@ + static int ath79_spi_setup_cs(struct spi_device *spi) + { + struct ath79_spi_controller_data *cdata; ++ unsigned long flags; + int status; + + cdata = spi->controller_data; +- if (spi->chip_select && !cdata) ++ if (!cdata) + return -EINVAL; + + status = 0; +- if (spi->chip_select) { +- unsigned long flags; ++ switch (cdata->cs_type) { ++ case ATH79_SPI_CS_TYPE_INTERNAL: ++ if (cdata->cs_line > ATH79_SPI_CS_LINE_MAX) ++ status = -EINVAL; ++ break; + ++ case ATH79_SPI_CS_TYPE_GPIO: + flags = GPIOF_DIR_OUT; + if (spi->mode & SPI_CS_HIGH) + flags |= GPIOF_INIT_LOW; + else + flags |= GPIOF_INIT_HIGH; + +- status = gpio_request_one(cdata->gpio, flags, ++ status = gpio_request_one(cdata->cs_line, flags, + dev_name(&spi->dev)); ++ break; + } + + return status; +@@ -143,9 +163,19 @@ + + static void ath79_spi_cleanup_cs(struct spi_device *spi) + { +- if (spi->chip_select) { +- struct ath79_spi_controller_data *cdata = spi->controller_data; +- gpio_free(cdata->gpio); ++ struct ath79_spi_controller_data *cdata; ++ ++ cdata = spi->controller_data; ++ if (!cdata) ++ return; ++ ++ switch (cdata->cs_type) { ++ case ATH79_SPI_CS_TYPE_INTERNAL: ++ /* nothing to do */ ++ break; ++ case ATH79_SPI_CS_TYPE_GPIO: ++ gpio_free(cdata->cs_line); ++ break; + } + } + +@@ -201,6 +231,114 @@ + return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); + } + ++static int ath79_spi_do_read_flash_data(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(spi); ++ ++ /* disable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); ++ ++ memcpy_fromio(t->rx_buf, sp->base + sp->read_addr, t->len); ++ ++ /* enable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); ++ ++ /* restore IOC register */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); ++ ++ return t->len; ++} ++ ++static int ath79_spi_do_read_flash_cmd(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(spi); ++ int len; ++ const u8 *p; ++ ++ sp->read_addr = 0; ++ ++ len = t->len - 1; ++ ++ if (t->dummy) ++ len -= 1; ++ ++ p = t->tx_buf; ++ ++ while (len--) { ++ p++; ++ sp->read_addr <<= 8; ++ sp->read_addr |= *p; ++ } ++ ++ return t->len; ++} ++ ++static bool ath79_spi_is_read_cmd(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ return t->type == SPI_TRANSFER_FLASH_READ_CMD; ++} ++ ++static bool ath79_spi_is_data_read(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ return t->type == SPI_TRANSFER_FLASH_READ_DATA; ++} ++ ++static int ath79_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(spi); ++ int ret; ++ ++ switch (sp->state) { ++ case ATH79_SPI_STATE_WAIT_CMD: ++ if (ath79_spi_is_read_cmd(spi, t)) { ++ ret = ath79_spi_do_read_flash_cmd(spi, t); ++ sp->state = ATH79_SPI_STATE_WAIT_READ; ++ } else { ++ ret = spi_bitbang_bufs(spi, t); ++ } ++ break; ++ ++ case ATH79_SPI_STATE_WAIT_READ: ++ if (ath79_spi_is_data_read(spi, t)) { ++ ret = ath79_spi_do_read_flash_data(spi, t); ++ } else { ++ dev_warn(&spi->dev, "flash data read expected\n"); ++ ret = -EIO; ++ } ++ sp->state = ATH79_SPI_STATE_WAIT_CMD; ++ break; ++ ++ default: ++ BUG(); ++ } ++ ++ return ret; ++} ++ ++static int ath79_spi_setup_transfer(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(spi); ++ struct ath79_spi_controller_data *cdata; ++ int ret; ++ ++ ret = spi_bitbang_setup_transfer(spi, t); ++ if (ret) ++ return ret; ++ ++ cdata = spi->controller_data; ++ if (cdata->is_flash) ++ sp->bitbang.txrx_bufs = ath79_spi_txrx_bufs; ++ else ++ sp->bitbang.txrx_bufs = spi_bitbang_bufs; ++ ++ return ret; ++} ++ + static int ath79_spi_probe(struct platform_device *pdev) + { + struct spi_master *master; +@@ -210,6 +348,10 @@ + unsigned long rate; + int ret; + ++ pdata = pdev->dev.platform_data; ++ if (!pdata) ++ return -EINVAL; ++ + master = spi_alloc_master(&pdev->dev, sizeof(*sp)); + if (master == NULL) { + dev_err(&pdev->dev, "failed to allocate spi master\n"); +@@ -219,20 +361,18 @@ + sp = spi_master_get_devdata(master); + platform_set_drvdata(pdev, sp); + +- pdata = dev_get_platdata(&pdev->dev); ++ sp->state = ATH79_SPI_STATE_WAIT_CMD; + + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); + master->setup = ath79_spi_setup; + master->cleanup = ath79_spi_cleanup; +- if (pdata) { +- master->bus_num = pdata->bus_num; +- master->num_chipselect = pdata->num_chipselect; +- } ++ master->bus_num = pdata->bus_num; ++ master->num_chipselect = pdata->num_chipselect; + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; + sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0; +- sp->bitbang.setup_transfer = spi_bitbang_setup_transfer; ++ sp->bitbang.setup_transfer = ath79_spi_setup_transfer; + sp->bitbang.flags = SPI_CS_HIGH; + + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); +@@ -257,7 +397,8 @@ + if (ret) + goto err_put_master; + +- rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); ++ sp->ahb_rate = clk_get_rate(sp->clk); ++ rate = DIV_ROUND_UP(sp->ahb_rate, MHZ); + if (!rate) { + ret = -EINVAL; + goto err_clk_disable; +diff -Nur linux-4.1.13.orig/drivers/spi/spi-bitbang.c linux-4.1.13/drivers/spi/spi-bitbang.c +--- linux-4.1.13.orig/drivers/spi/spi-bitbang.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/spi/spi-bitbang.c 2015-12-04 19:57:03.934107503 +0100 +@@ -230,13 +230,14 @@ + } + EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); + +-static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) ++int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) + { + struct spi_bitbang_cs *cs = spi->controller_state; + unsigned nsecs = cs->nsecs; + + return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); + } ++EXPORT_SYMBOL_GPL(spi_bitbang_bufs); + + /*----------------------------------------------------------------------*/ + +diff -Nur linux-4.1.13.orig/drivers/spi/spi-rb4xx.c linux-4.1.13/drivers/spi/spi-rb4xx.c +--- linux-4.1.13.orig/drivers/spi/spi-rb4xx.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/spi/spi-rb4xx.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,507 @@ ++/* ++ * SPI controller driver for the Mikrotik RB4xx boards ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This file was based on the patches for Linux 2.6.27.39 published by ++ * MikroTik for their RouterBoard 4xx series devices. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define DRV_NAME "rb4xx-spi" ++#define DRV_DESC "Mikrotik RB4xx SPI controller driver" ++#define DRV_VERSION "0.1.0" ++ ++#define SPI_CTRL_FASTEST 0x40 ++#define SPI_FLASH_HZ 33333334 ++#define SPI_CPLD_HZ 33333334 ++ ++#define CPLD_CMD_READ_FAST 0x0b ++ ++#undef RB4XX_SPI_DEBUG ++ ++struct rb4xx_spi { ++ void __iomem *base; ++ struct spi_master *master; ++ ++ unsigned spi_ctrl_flash; ++ unsigned spi_ctrl_fread; ++ ++ struct clk *ahb_clk; ++ unsigned long ahb_freq; ++ ++ spinlock_t lock; ++ struct list_head queue; ++ int busy:1; ++ int cs_wait; ++}; ++ ++static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1; ++ ++#ifdef RB4XX_SPI_DEBUG ++static inline void do_spi_delay(void) ++{ ++ ndelay(20000); ++} ++#else ++static inline void do_spi_delay(void) { } ++#endif ++ ++static inline void do_spi_init(struct spi_device *spi) ++{ ++ unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1; ++ ++ if (!(spi->mode & SPI_CS_HIGH)) ++ cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 : ++ AR71XX_SPI_IOC_CS0; ++ ++ spi_clk_low = cs; ++} ++ ++static inline void do_spi_finish(void __iomem *base) ++{ ++ do_spi_delay(); ++ __raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1, ++ base + AR71XX_SPI_REG_IOC); ++} ++ ++static inline void do_spi_clk(void __iomem *base, int bit) ++{ ++ unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0); ++ ++ do_spi_delay(); ++ __raw_writel(bval, base + AR71XX_SPI_REG_IOC); ++ do_spi_delay(); ++ __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); ++} ++ ++static void do_spi_byte(void __iomem *base, unsigned char byte) ++{ ++ do_spi_clk(base, byte >> 7); ++ do_spi_clk(base, byte >> 6); ++ do_spi_clk(base, byte >> 5); ++ do_spi_clk(base, byte >> 4); ++ do_spi_clk(base, byte >> 3); ++ do_spi_clk(base, byte >> 2); ++ do_spi_clk(base, byte >> 1); ++ do_spi_clk(base, byte); ++ ++ pr_debug("spi_byte sent 0x%02x got 0x%02x\n", ++ (unsigned)byte, ++ (unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS)); ++} ++ ++static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1, ++ unsigned bit2) ++{ ++ unsigned bval = (spi_clk_low | ++ ((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) | ++ ((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0)); ++ do_spi_delay(); ++ __raw_writel(bval, base + AR71XX_SPI_REG_IOC); ++ do_spi_delay(); ++ __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); ++} ++ ++static void do_spi_byte_fast(void __iomem *base, unsigned char byte) ++{ ++ do_spi_clk_fast(base, byte >> 7, byte >> 6); ++ do_spi_clk_fast(base, byte >> 5, byte >> 4); ++ do_spi_clk_fast(base, byte >> 3, byte >> 2); ++ do_spi_clk_fast(base, byte >> 1, byte >> 0); ++ ++ pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n", ++ (unsigned)byte, ++ (unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS)); ++} ++ ++static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t) ++{ ++ const unsigned char *rxv_ptr = NULL; ++ const unsigned char *tx_ptr = t->tx_buf; ++ unsigned char *rx_ptr = t->rx_buf; ++ unsigned i; ++ ++ pr_debug("spi_txrx len %u tx %u rx %u\n", ++ t->len, ++ (t->tx_buf ? 1 : 0), ++ (t->rx_buf ? 1 : 0)); ++ ++ if (t->verify) { ++ rxv_ptr = tx_ptr; ++ tx_ptr = NULL; ++ } ++ ++ for (i = 0; i < t->len; ++i) { ++ unsigned char sdata = tx_ptr ? tx_ptr[i] : 0; ++ ++ if (t->fast_write) ++ do_spi_byte_fast(base, sdata); ++ else ++ do_spi_byte(base, sdata); ++ ++ if (rx_ptr) { ++ rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff; ++ } else if (rxv_ptr) { ++ unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS); ++ if (rxv_ptr[i] != c) ++ return i; ++ } ++ } ++ ++ return i; ++} ++ ++static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi, ++ struct spi_message *m) ++{ ++ struct spi_transfer *t; ++ const unsigned char *tx_ptr; ++ unsigned addr; ++ void __iomem *base = rbspi->base; ++ ++ /* check for exactly two transfers */ ++ if (list_empty(&m->transfers) || ++ list_is_last(m->transfers.next, &m->transfers) || ++ !list_is_last(m->transfers.next->next, &m->transfers)) { ++ return -1; ++ } ++ ++ /* first transfer contains command and address */ ++ t = list_entry(m->transfers.next, ++ struct spi_transfer, transfer_list); ++ ++ if (t->len != 5 || t->tx_buf == NULL) ++ return -1; ++ ++ tx_ptr = t->tx_buf; ++ if (tx_ptr[0] != CPLD_CMD_READ_FAST) ++ return -1; ++ ++ addr = tx_ptr[1]; ++ addr = tx_ptr[2] | (addr << 8); ++ addr = tx_ptr[3] | (addr << 8); ++ addr += (unsigned) base; ++ ++ m->actual_length += t->len; ++ ++ /* second transfer contains data itself */ ++ t = list_entry(m->transfers.next->next, ++ struct spi_transfer, transfer_list); ++ ++ if (t->tx_buf && !t->verify) ++ return -1; ++ ++ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); ++ __raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL); ++ __raw_writel(0, base + AR71XX_SPI_REG_FS); ++ ++ if (t->rx_buf) { ++ memcpy(t->rx_buf, (const void *)addr, t->len); ++ } else if (t->tx_buf) { ++ unsigned char buf[t->len]; ++ memcpy(buf, (const void *)addr, t->len); ++ if (memcmp(t->tx_buf, buf, t->len) != 0) ++ m->status = -EMSGSIZE; ++ } ++ m->actual_length += t->len; ++ ++ if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) { ++ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); ++ __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); ++ __raw_writel(0, base + AR71XX_SPI_REG_FS); ++ } ++ ++ return 0; ++} ++ ++static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m) ++{ ++ struct spi_transfer *t = NULL; ++ void __iomem *base = rbspi->base; ++ ++ m->status = 0; ++ if (list_empty(&m->transfers)) ++ return -1; ++ ++ if (m->fast_read) ++ if (rb4xx_spi_read_fast(rbspi, m) == 0) ++ return -1; ++ ++ __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); ++ __raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL); ++ do_spi_init(m->spi); ++ ++ list_for_each_entry(t, &m->transfers, transfer_list) { ++ int len; ++ ++ len = rb4xx_spi_txrx(base, t); ++ if (len != t->len) { ++ m->status = -EMSGSIZE; ++ break; ++ } ++ m->actual_length += len; ++ ++ if (t->cs_change) { ++ if (list_is_last(&t->transfer_list, &m->transfers)) { ++ /* wait for continuation */ ++ return m->spi->chip_select; ++ } ++ do_spi_finish(base); ++ ndelay(100); ++ } ++ } ++ ++ do_spi_finish(base); ++ __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); ++ __raw_writel(0, base + AR71XX_SPI_REG_FS); ++ return -1; ++} ++ ++static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi, ++ unsigned long *flags) ++{ ++ int cs = rbspi->cs_wait; ++ ++ rbspi->busy = 1; ++ while (!list_empty(&rbspi->queue)) { ++ struct spi_message *m; ++ ++ list_for_each_entry(m, &rbspi->queue, queue) ++ if (cs < 0 || cs == m->spi->chip_select) ++ break; ++ ++ if (&m->queue == &rbspi->queue) ++ break; ++ ++ list_del_init(&m->queue); ++ spin_unlock_irqrestore(&rbspi->lock, *flags); ++ ++ cs = rb4xx_spi_msg(rbspi, m); ++ m->complete(m->context); ++ ++ spin_lock_irqsave(&rbspi->lock, *flags); ++ } ++ ++ rbspi->cs_wait = cs; ++ rbspi->busy = 0; ++ ++ if (cs >= 0) { ++ /* TODO: add timer to unlock cs after 1s inactivity */ ++ } ++} ++ ++static int rb4xx_spi_transfer(struct spi_device *spi, ++ struct spi_message *m) ++{ ++ struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); ++ unsigned long flags; ++ ++ m->actual_length = 0; ++ m->status = -EINPROGRESS; ++ ++ spin_lock_irqsave(&rbspi->lock, flags); ++ list_add_tail(&m->queue, &rbspi->queue); ++ if (rbspi->busy || ++ (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) { ++ /* job will be done later */ ++ spin_unlock_irqrestore(&rbspi->lock, flags); ++ return 0; ++ } ++ ++ /* process job in current context */ ++ rb4xx_spi_process_queue_locked(rbspi, &flags); ++ spin_unlock_irqrestore(&rbspi->lock, flags); ++ ++ return 0; ++} ++ ++static int rb4xx_spi_setup(struct spi_device *spi) ++{ ++ struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); ++ unsigned long flags; ++ ++ if (spi->mode & ~(SPI_CS_HIGH)) { ++ dev_err(&spi->dev, "mode %x not supported\n", ++ (unsigned) spi->mode); ++ return -EINVAL; ++ } ++ ++ if (spi->bits_per_word != 8 && spi->bits_per_word != 0) { ++ dev_err(&spi->dev, "bits_per_word %u not supported\n", ++ (unsigned) spi->bits_per_word); ++ return -EINVAL; ++ } ++ ++ spin_lock_irqsave(&rbspi->lock, flags); ++ if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) { ++ rbspi->cs_wait = -1; ++ rb4xx_spi_process_queue_locked(rbspi, &flags); ++ } ++ spin_unlock_irqrestore(&rbspi->lock, flags); ++ ++ return 0; ++} ++ ++static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max, ++ const char *name) ++{ ++ unsigned div; ++ ++ div = (rbspi->ahb_freq - 1) / (2 * hz_max); ++ ++ /* ++ * CPU has a bug at (div == 0) - first bit read is random ++ */ ++ if (div == 0) ++ ++div; ++ ++ if (name) { ++ unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000; ++ unsigned div_real = 2 * (div + 1); ++ pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n", ++ name, ++ ahb_khz / div_real, ++ ahb_khz, div_real); ++ } ++ ++ return SPI_CTRL_FASTEST + div; ++} ++ ++static int rb4xx_spi_probe(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct rb4xx_spi *rbspi; ++ struct resource *r; ++ int err = 0; ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(*rbspi)); ++ if (master == NULL) { ++ dev_err(&pdev->dev, "no memory for spi_master\n"); ++ err = -ENOMEM; ++ goto err_out; ++ } ++ ++ master->bus_num = 0; ++ master->num_chipselect = 3; ++ master->setup = rb4xx_spi_setup; ++ master->transfer = rb4xx_spi_transfer; ++ ++ rbspi = spi_master_get_devdata(master); ++ ++ rbspi->ahb_clk = clk_get(&pdev->dev, "ahb"); ++ if (IS_ERR(rbspi->ahb_clk)) { ++ err = PTR_ERR(rbspi->ahb_clk); ++ goto err_put_master; ++ } ++ ++ err = clk_enable(rbspi->ahb_clk); ++ if (err) ++ goto err_clk_put; ++ ++ rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk); ++ if (!rbspi->ahb_freq) { ++ err = -EINVAL; ++ goto err_clk_disable; ++ } ++ ++ platform_set_drvdata(pdev, rbspi); ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (r == NULL) { ++ err = -ENOENT; ++ goto err_clk_disable; ++ } ++ ++ rbspi->base = ioremap(r->start, r->end - r->start + 1); ++ if (!rbspi->base) { ++ err = -ENXIO; ++ goto err_clk_disable; ++ } ++ ++ rbspi->master = master; ++ rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH"); ++ rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD"); ++ rbspi->cs_wait = -1; ++ ++ spin_lock_init(&rbspi->lock); ++ INIT_LIST_HEAD(&rbspi->queue); ++ ++ err = spi_register_master(master); ++ if (err) { ++ dev_err(&pdev->dev, "failed to register SPI master\n"); ++ goto err_iounmap; ++ } ++ ++ return 0; ++ ++err_iounmap: ++ iounmap(rbspi->base); ++err_clk_disable: ++ clk_disable(rbspi->ahb_clk); ++err_clk_put: ++ clk_put(rbspi->ahb_clk); ++err_put_master: ++ platform_set_drvdata(pdev, NULL); ++ spi_master_put(master); ++err_out: ++ return err; ++} ++ ++static int rb4xx_spi_remove(struct platform_device *pdev) ++{ ++ struct rb4xx_spi *rbspi = platform_get_drvdata(pdev); ++ ++ iounmap(rbspi->base); ++ clk_disable(rbspi->ahb_clk); ++ clk_put(rbspi->ahb_clk); ++ platform_set_drvdata(pdev, NULL); ++ spi_master_put(rbspi->master); ++ ++ return 0; ++} ++ ++static struct platform_driver rb4xx_spi_drv = { ++ .probe = rb4xx_spi_probe, ++ .remove = rb4xx_spi_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init rb4xx_spi_init(void) ++{ ++ return platform_driver_register(&rb4xx_spi_drv); ++} ++subsys_initcall(rb4xx_spi_init); ++ ++static void __exit rb4xx_spi_exit(void) ++{ ++ platform_driver_unregister(&rb4xx_spi_drv); ++} ++ ++module_exit(rb4xx_spi_exit); ++ ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/spi/spi-rb4xx-cpld.c linux-4.1.13/drivers/spi/spi-rb4xx-cpld.c +--- linux-4.1.13.orig/drivers/spi/spi-rb4xx-cpld.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/spi/spi-rb4xx-cpld.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,441 @@ ++/* ++ * SPI driver for the CPLD chip on the Mikrotik RB4xx boards ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This file was based on the patches for Linux 2.6.27.39 published by ++ * MikroTik for their RouterBoard 4xx series devices. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define DRV_NAME "spi-rb4xx-cpld" ++#define DRV_DESC "RB4xx CPLD driver" ++#define DRV_VERSION "0.1.0" ++ ++#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */ ++#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */ ++#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */ ++#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */ ++#define CPLD_CMD_LED5_ON 0x0c /* send cmd */ ++#define CPLD_CMD_LED5_OFF 0x0d /* send cmd */ ++ ++struct rb4xx_cpld { ++ struct spi_device *spi; ++ struct mutex lock; ++ struct gpio_chip chip; ++ unsigned int config; ++}; ++ ++static struct rb4xx_cpld *rb4xx_cpld; ++ ++static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip) ++{ ++ return container_of(chip, struct rb4xx_cpld, chip); ++} ++ ++static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd) ++{ ++ struct spi_transfer t[1]; ++ struct spi_message m; ++ unsigned char tx_buf[1]; ++ int err; ++ ++ spi_message_init(&m); ++ memset(&t, 0, sizeof(t)); ++ ++ t[0].tx_buf = tx_buf; ++ t[0].len = sizeof(tx_buf); ++ spi_message_add_tail(&t[0], &m); ++ ++ tx_buf[0] = cmd; ++ ++ err = spi_sync(cpld->spi, &m); ++ return err; ++} ++ ++static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config) ++{ ++ struct spi_transfer t[1]; ++ struct spi_message m; ++ unsigned char cmd[2]; ++ int err; ++ ++ spi_message_init(&m); ++ memset(&t, 0, sizeof(t)); ++ ++ t[0].tx_buf = cmd; ++ t[0].len = sizeof(cmd); ++ spi_message_add_tail(&t[0], &m); ++ ++ cmd[0] = CPLD_CMD_WRITE_CFG; ++ cmd[1] = config; ++ ++ err = spi_sync(cpld->spi, &m); ++ return err; ++} ++ ++static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask, ++ unsigned value) ++{ ++ unsigned int config; ++ int err; ++ ++ config = cpld->config & ~mask; ++ config |= value; ++ ++ if ((cpld->config ^ config) & 0xff) { ++ err = rb4xx_cpld_write_cfg(cpld, config); ++ if (err) ++ return err; ++ } ++ ++ if ((cpld->config ^ config) & CPLD_CFG_nLED5) { ++ err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON : ++ CPLD_CMD_LED5_OFF); ++ if (err) ++ return err; ++ } ++ ++ cpld->config = config; ++ return 0; ++} ++ ++int rb4xx_cpld_change_cfg(unsigned mask, unsigned value) ++{ ++ int ret; ++ ++ if (rb4xx_cpld == NULL) ++ return -ENODEV; ++ ++ mutex_lock(&rb4xx_cpld->lock); ++ ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value); ++ mutex_unlock(&rb4xx_cpld->lock); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg); ++ ++int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf, ++ const unsigned char *verify_buf, unsigned count) ++{ ++ const unsigned char cmd[5] = { ++ CPLD_CMD_READ_FAST, ++ (addr >> 16) & 0xff, ++ (addr >> 8) & 0xff, ++ addr & 0xff, ++ 0 ++ }; ++ struct spi_transfer t[2] = { ++ { ++ .tx_buf = &cmd, ++ .len = 5, ++ }, ++ { ++ .tx_buf = verify_buf, ++ .rx_buf = rx_buf, ++ .len = count, ++ .verify = (verify_buf != NULL), ++ }, ++ }; ++ struct spi_message m; ++ ++ if (rb4xx_cpld == NULL) ++ return -ENODEV; ++ ++ spi_message_init(&m); ++ m.fast_read = 1; ++ spi_message_add_tail(&t[0], &m); ++ spi_message_add_tail(&t[1], &m); ++ return spi_sync(rb4xx_cpld->spi, &m); ++} ++EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from); ++ ++#if 0 ++int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf, ++ unsigned count) ++{ ++ struct spi_transfer t[2]; ++ struct spi_message m; ++ unsigned char cmd[2]; ++ ++ if (rb4xx_cpld == NULL) ++ return -ENODEV; ++ ++ spi_message_init(&m); ++ memset(&t, 0, sizeof(t)); ++ ++ /* send command */ ++ t[0].tx_buf = cmd; ++ t[0].len = sizeof(cmd); ++ spi_message_add_tail(&t[0], &m); ++ ++ cmd[0] = CPLD_CMD_READ_NAND; ++ cmd[1] = 0; ++ ++ /* read data */ ++ t[1].rx_buf = buf; ++ t[1].len = count; ++ spi_message_add_tail(&t[1], &m); ++ ++ return spi_sync(rb4xx_cpld->spi, &m); ++} ++#else ++int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf, ++ unsigned count) ++{ ++ static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 }; ++ struct spi_transfer t[2] = { ++ { ++ .tx_buf = &cmd, ++ .len = 2, ++ }, { ++ .tx_buf = verify_buf, ++ .rx_buf = rx_buf, ++ .len = count, ++ .verify = (verify_buf != NULL), ++ }, ++ }; ++ struct spi_message m; ++ ++ if (rb4xx_cpld == NULL) ++ return -ENODEV; ++ ++ spi_message_init(&m); ++ spi_message_add_tail(&t[0], &m); ++ spi_message_add_tail(&t[1], &m); ++ return spi_sync(rb4xx_cpld->spi, &m); ++} ++#endif ++EXPORT_SYMBOL_GPL(rb4xx_cpld_read); ++ ++int rb4xx_cpld_write(const unsigned char *buf, unsigned count) ++{ ++#if 0 ++ struct spi_transfer t[3]; ++ struct spi_message m; ++ unsigned char cmd[1]; ++ ++ if (rb4xx_cpld == NULL) ++ return -ENODEV; ++ ++ memset(&t, 0, sizeof(t)); ++ spi_message_init(&m); ++ ++ /* send command */ ++ t[0].tx_buf = cmd; ++ t[0].len = sizeof(cmd); ++ spi_message_add_tail(&t[0], &m); ++ ++ cmd[0] = CPLD_CMD_WRITE_NAND; ++ ++ /* write data */ ++ t[1].tx_buf = buf; ++ t[1].len = count; ++ spi_message_add_tail(&t[1], &m); ++ ++ /* send idle */ ++ t[2].len = 1; ++ spi_message_add_tail(&t[2], &m); ++ ++ return spi_sync(rb4xx_cpld->spi, &m); ++#else ++ static const unsigned char cmd = CPLD_CMD_WRITE_NAND; ++ struct spi_transfer t[3] = { ++ { ++ .tx_buf = &cmd, ++ .len = 1, ++ }, { ++ .tx_buf = buf, ++ .len = count, ++ .fast_write = 1, ++ }, { ++ .len = 1, ++ .fast_write = 1, ++ }, ++ }; ++ struct spi_message m; ++ ++ if (rb4xx_cpld == NULL) ++ return -ENODEV; ++ ++ spi_message_init(&m); ++ spi_message_add_tail(&t[0], &m); ++ spi_message_add_tail(&t[1], &m); ++ spi_message_add_tail(&t[2], &m); ++ return spi_sync(rb4xx_cpld->spi, &m); ++#endif ++} ++EXPORT_SYMBOL_GPL(rb4xx_cpld_write); ++ ++static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset) ++{ ++ struct rb4xx_cpld *cpld = gpio_to_cpld(chip); ++ int ret; ++ ++ mutex_lock(&cpld->lock); ++ ret = (cpld->config >> offset) & 1; ++ mutex_unlock(&cpld->lock); ++ ++ return ret; ++} ++ ++static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset, ++ int value) ++{ ++ struct rb4xx_cpld *cpld = gpio_to_cpld(chip); ++ ++ mutex_lock(&cpld->lock); ++ __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); ++ mutex_unlock(&cpld->lock); ++} ++ ++static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip, ++ unsigned offset) ++{ ++ return -EOPNOTSUPP; ++} ++ ++static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip, ++ unsigned offset, ++ int value) ++{ ++ struct rb4xx_cpld *cpld = gpio_to_cpld(chip); ++ int ret; ++ ++ mutex_lock(&cpld->lock); ++ ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); ++ mutex_unlock(&cpld->lock); ++ ++ return ret; ++} ++ ++static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base) ++{ ++ int err; ++ ++ /* init config */ ++ cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 | ++ CPLD_CFG_nLED4 | CPLD_CFG_nCE; ++ rb4xx_cpld_write_cfg(cpld, cpld->config); ++ ++ /* setup GPIO chip */ ++ cpld->chip.label = DRV_NAME; ++ ++ cpld->chip.get = rb4xx_cpld_gpio_get; ++ cpld->chip.set = rb4xx_cpld_gpio_set; ++ cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input; ++ cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output; ++ ++ cpld->chip.base = base; ++ cpld->chip.ngpio = CPLD_NUM_GPIOS; ++ cpld->chip.can_sleep = 1; ++ cpld->chip.dev = &cpld->spi->dev; ++ cpld->chip.owner = THIS_MODULE; ++ ++ err = gpiochip_add(&cpld->chip); ++ if (err) ++ dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n", ++ err); ++ ++ return err; ++} ++ ++static int rb4xx_cpld_probe(struct spi_device *spi) ++{ ++ struct rb4xx_cpld *cpld; ++ struct rb4xx_cpld_platform_data *pdata; ++ int err; ++ ++ pdata = spi->dev.platform_data; ++ if (!pdata) { ++ dev_dbg(&spi->dev, "no platform data\n"); ++ return -EINVAL; ++ } ++ ++ cpld = kzalloc(sizeof(*cpld), GFP_KERNEL); ++ if (!cpld) { ++ dev_err(&spi->dev, "no memory for private data\n"); ++ return -ENOMEM; ++ } ++ ++ mutex_init(&cpld->lock); ++ cpld->spi = spi_dev_get(spi); ++ dev_set_drvdata(&spi->dev, cpld); ++ ++ spi->mode = SPI_MODE_0; ++ spi->bits_per_word = 8; ++ err = spi_setup(spi); ++ if (err) { ++ dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); ++ goto err_drvdata; ++ } ++ ++ err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base); ++ if (err) ++ goto err_drvdata; ++ ++ rb4xx_cpld = cpld; ++ ++ return 0; ++ ++err_drvdata: ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(cpld); ++ ++ return err; ++} ++ ++static int rb4xx_cpld_remove(struct spi_device *spi) ++{ ++ struct rb4xx_cpld *cpld; ++ ++ rb4xx_cpld = NULL; ++ cpld = dev_get_drvdata(&spi->dev); ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(cpld); ++ ++ return 0; ++} ++ ++static struct spi_driver rb4xx_cpld_driver = { ++ .driver = { ++ .name = DRV_NAME, ++ .bus = &spi_bus_type, ++ .owner = THIS_MODULE, ++ }, ++ .probe = rb4xx_cpld_probe, ++ .remove = rb4xx_cpld_remove, ++}; ++ ++static int __init rb4xx_cpld_init(void) ++{ ++ return spi_register_driver(&rb4xx_cpld_driver); ++} ++module_init(rb4xx_cpld_init); ++ ++static void __exit rb4xx_cpld_exit(void) ++{ ++ spi_unregister_driver(&rb4xx_cpld_driver); ++} ++module_exit(rb4xx_cpld_exit); ++ ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); +diff -Nur linux-4.1.13.orig/drivers/spi/spi-vsc7385.c linux-4.1.13/drivers/spi/spi-vsc7385.c +--- linux-4.1.13.orig/drivers/spi/spi-vsc7385.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/drivers/spi/spi-vsc7385.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,621 @@ ++/* ++ * SPI driver for the Vitesse VSC7385 ethernet switch ++ * ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * Parts of this file are based on Atheros' 2.6.15 BSP ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRV_NAME "spi-vsc7385" ++#define DRV_DESC "Vitesse VSC7385 Gbit ethernet switch driver" ++#define DRV_VERSION "0.1.0" ++ ++#define VSC73XX_BLOCK_MAC 0x1 ++#define VSC73XX_BLOCK_2 0x2 ++#define VSC73XX_BLOCK_MII 0x3 ++#define VSC73XX_BLOCK_4 0x4 ++#define VSC73XX_BLOCK_5 0x5 ++#define VSC73XX_BLOCK_SYSTEM 0x7 ++ ++#define VSC73XX_SUBBLOCK_PORT_0 0 ++#define VSC73XX_SUBBLOCK_PORT_1 1 ++#define VSC73XX_SUBBLOCK_PORT_2 2 ++#define VSC73XX_SUBBLOCK_PORT_3 3 ++#define VSC73XX_SUBBLOCK_PORT_4 4 ++#define VSC73XX_SUBBLOCK_PORT_MAC 6 ++ ++/* MAC Block registers */ ++#define VSC73XX_MAC_CFG 0x0 ++#define VSC73XX_ADVPORTM 0x19 ++#define VSC73XX_RXOCT 0x50 ++#define VSC73XX_TXOCT 0x51 ++#define VSC73XX_C_RX0 0x52 ++#define VSC73XX_C_RX1 0x53 ++#define VSC73XX_C_RX2 0x54 ++#define VSC73XX_C_TX0 0x55 ++#define VSC73XX_C_TX1 0x56 ++#define VSC73XX_C_TX2 0x57 ++#define VSC73XX_C_CFG 0x58 ++ ++/* MAC_CFG register bits */ ++#define VSC73XX_MAC_CFG_WEXC_DIS (1 << 31) ++#define VSC73XX_MAC_CFG_PORT_RST (1 << 29) ++#define VSC73XX_MAC_CFG_TX_EN (1 << 28) ++#define VSC73XX_MAC_CFG_SEED_LOAD (1 << 27) ++#define VSC73XX_MAC_CFG_FDX (1 << 18) ++#define VSC73XX_MAC_CFG_GIGE (1 << 17) ++#define VSC73XX_MAC_CFG_RX_EN (1 << 16) ++#define VSC73XX_MAC_CFG_VLAN_DBLAWR (1 << 15) ++#define VSC73XX_MAC_CFG_VLAN_AWR (1 << 14) ++#define VSC73XX_MAC_CFG_100_BASE_T (1 << 13) ++#define VSC73XX_MAC_CFG_TX_IPG(x) (((x) & 0x1f) << 6) ++#define VSC73XX_MAC_CFG_MAC_RX_RST (1 << 5) ++#define VSC73XX_MAC_CFG_MAC_TX_RST (1 << 4) ++#define VSC73XX_MAC_CFG_BIT2 (1 << 2) ++#define VSC73XX_MAC_CFG_CLK_SEL(x) ((x) & 0x3) ++ ++/* ADVPORTM register bits */ ++#define VSC73XX_ADVPORTM_IFG_PPM (1 << 7) ++#define VSC73XX_ADVPORTM_EXC_COL_CONT (1 << 6) ++#define VSC73XX_ADVPORTM_EXT_PORT (1 << 5) ++#define VSC73XX_ADVPORTM_INV_GTX (1 << 4) ++#define VSC73XX_ADVPORTM_ENA_GTX (1 << 3) ++#define VSC73XX_ADVPORTM_DDR_MODE (1 << 2) ++#define VSC73XX_ADVPORTM_IO_LOOPBACK (1 << 1) ++#define VSC73XX_ADVPORTM_HOST_LOOPBACK (1 << 0) ++ ++/* MII Block registers */ ++#define VSC73XX_MII_STAT 0x0 ++#define VSC73XX_MII_CMD 0x1 ++#define VSC73XX_MII_DATA 0x2 ++ ++/* System Block registers */ ++#define VSC73XX_ICPU_SIPAD 0x01 ++#define VSC73XX_ICPU_CLOCK_DELAY 0x05 ++#define VSC73XX_ICPU_CTRL 0x10 ++#define VSC73XX_ICPU_ADDR 0x11 ++#define VSC73XX_ICPU_SRAM 0x12 ++#define VSC73XX_ICPU_MBOX_VAL 0x15 ++#define VSC73XX_ICPU_MBOX_SET 0x16 ++#define VSC73XX_ICPU_MBOX_CLR 0x17 ++#define VSC73XX_ICPU_CHIPID 0x18 ++#define VSC73XX_ICPU_GPIO 0x34 ++ ++#define VSC73XX_ICPU_CTRL_CLK_DIV (1 << 8) ++#define VSC73XX_ICPU_CTRL_SRST_HOLD (1 << 7) ++#define VSC73XX_ICPU_CTRL_BOOT_EN (1 << 3) ++#define VSC73XX_ICPU_CTRL_EXT_ACC_EN (1 << 2) ++#define VSC73XX_ICPU_CTRL_CLK_EN (1 << 1) ++#define VSC73XX_ICPU_CTRL_SRST (1 << 0) ++ ++#define VSC73XX_ICPU_CHIPID_ID_SHIFT 12 ++#define VSC73XX_ICPU_CHIPID_ID_MASK 0xffff ++#define VSC73XX_ICPU_CHIPID_REV_SHIFT 28 ++#define VSC73XX_ICPU_CHIPID_REV_MASK 0xf ++#define VSC73XX_ICPU_CHIPID_ID_7385 0x7385 ++#define VSC73XX_ICPU_CHIPID_ID_7395 0x7395 ++ ++#define VSC73XX_CMD_MODE_READ 0 ++#define VSC73XX_CMD_MODE_WRITE 1 ++#define VSC73XX_CMD_MODE_SHIFT 4 ++#define VSC73XX_CMD_BLOCK_SHIFT 5 ++#define VSC73XX_CMD_BLOCK_MASK 0x7 ++#define VSC73XX_CMD_SUBBLOCK_MASK 0xf ++ ++#define VSC7385_CLOCK_DELAY ((3 << 4) | 3) ++#define VSC7385_CLOCK_DELAY_MASK ((3 << 4) | 3) ++ ++#define VSC73XX_ICPU_CTRL_STOP (VSC73XX_ICPU_CTRL_SRST_HOLD | \ ++ VSC73XX_ICPU_CTRL_BOOT_EN | \ ++ VSC73XX_ICPU_CTRL_EXT_ACC_EN) ++ ++#define VSC73XX_ICPU_CTRL_START (VSC73XX_ICPU_CTRL_CLK_DIV | \ ++ VSC73XX_ICPU_CTRL_BOOT_EN | \ ++ VSC73XX_ICPU_CTRL_CLK_EN | \ ++ VSC73XX_ICPU_CTRL_SRST) ++ ++#define VSC7385_ADVPORTM_MASK (VSC73XX_ADVPORTM_IFG_PPM | \ ++ VSC73XX_ADVPORTM_EXC_COL_CONT | \ ++ VSC73XX_ADVPORTM_EXT_PORT | \ ++ VSC73XX_ADVPORTM_INV_GTX | \ ++ VSC73XX_ADVPORTM_ENA_GTX | \ ++ VSC73XX_ADVPORTM_DDR_MODE | \ ++ VSC73XX_ADVPORTM_IO_LOOPBACK | \ ++ VSC73XX_ADVPORTM_HOST_LOOPBACK) ++ ++#define VSC7385_ADVPORTM_INIT (VSC73XX_ADVPORTM_EXT_PORT | \ ++ VSC73XX_ADVPORTM_ENA_GTX | \ ++ VSC73XX_ADVPORTM_DDR_MODE) ++ ++#define VSC7385_MAC_CFG_RESET (VSC73XX_MAC_CFG_PORT_RST | \ ++ VSC73XX_MAC_CFG_MAC_RX_RST | \ ++ VSC73XX_MAC_CFG_MAC_TX_RST) ++ ++#define VSC73XX_MAC_CFG_INIT (VSC73XX_MAC_CFG_TX_EN | \ ++ VSC73XX_MAC_CFG_FDX | \ ++ VSC73XX_MAC_CFG_GIGE | \ ++ VSC73XX_MAC_CFG_RX_EN) ++ ++#define VSC73XX_RESET_DELAY 100 ++ ++struct vsc7385 { ++ struct spi_device *spi; ++ struct mutex lock; ++ struct vsc7385_platform_data *pdata; ++}; ++ ++static int vsc7385_is_addr_valid(u8 block, u8 subblock) ++{ ++ switch (block) { ++ case VSC73XX_BLOCK_MAC: ++ switch (subblock) { ++ case 0 ... 4: ++ case 6: ++ return 1; ++ } ++ break; ++ ++ case VSC73XX_BLOCK_2: ++ case VSC73XX_BLOCK_SYSTEM: ++ switch (subblock) { ++ case 0: ++ return 1; ++ } ++ break; ++ ++ case VSC73XX_BLOCK_MII: ++ case VSC73XX_BLOCK_4: ++ case VSC73XX_BLOCK_5: ++ switch (subblock) { ++ case 0 ... 1: ++ return 1; ++ } ++ break; ++ } ++ ++ return 0; ++} ++ ++static inline u8 vsc7385_make_addr(u8 mode, u8 block, u8 subblock) ++{ ++ u8 ret; ++ ++ ret = (block & VSC73XX_CMD_BLOCK_MASK) << VSC73XX_CMD_BLOCK_SHIFT; ++ ret |= (mode & 1) << VSC73XX_CMD_MODE_SHIFT; ++ ret |= subblock & VSC73XX_CMD_SUBBLOCK_MASK; ++ ++ return ret; ++} ++ ++static int vsc7385_read(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, ++ u32 *value) ++{ ++ u8 cmd[4]; ++ u8 buf[4]; ++ struct spi_transfer t[2]; ++ struct spi_message m; ++ int err; ++ ++ if (!vsc7385_is_addr_valid(block, subblock)) ++ return -EINVAL; ++ ++ spi_message_init(&m); ++ ++ memset(&t, 0, sizeof(t)); ++ ++ t[0].tx_buf = cmd; ++ t[0].len = sizeof(cmd); ++ spi_message_add_tail(&t[0], &m); ++ ++ t[1].rx_buf = buf; ++ t[1].len = sizeof(buf); ++ spi_message_add_tail(&t[1], &m); ++ ++ cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_READ, block, subblock); ++ cmd[1] = reg; ++ cmd[2] = 0; ++ cmd[3] = 0; ++ ++ mutex_lock(&vsc->lock); ++ err = spi_sync(vsc->spi, &m); ++ mutex_unlock(&vsc->lock); ++ ++ if (err) ++ return err; ++ ++ *value = (((u32) buf[0]) << 24) | (((u32) buf[1]) << 16) | ++ (((u32) buf[2]) << 8) | ((u32) buf[3]); ++ ++ return 0; ++} ++ ++ ++static int vsc7385_write(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, ++ u32 value) ++{ ++ u8 cmd[2]; ++ u8 buf[4]; ++ struct spi_transfer t[2]; ++ struct spi_message m; ++ int err; ++ ++ if (!vsc7385_is_addr_valid(block, subblock)) ++ return -EINVAL; ++ ++ spi_message_init(&m); ++ ++ memset(&t, 0, sizeof(t)); ++ ++ t[0].tx_buf = cmd; ++ t[0].len = sizeof(cmd); ++ spi_message_add_tail(&t[0], &m); ++ ++ t[1].tx_buf = buf; ++ t[1].len = sizeof(buf); ++ spi_message_add_tail(&t[1], &m); ++ ++ cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_WRITE, block, subblock); ++ cmd[1] = reg; ++ ++ buf[0] = (value >> 24) & 0xff; ++ buf[1] = (value >> 16) & 0xff; ++ buf[2] = (value >> 8) & 0xff; ++ buf[3] = value & 0xff; ++ ++ mutex_lock(&vsc->lock); ++ err = spi_sync(vsc->spi, &m); ++ mutex_unlock(&vsc->lock); ++ ++ return err; ++} ++ ++static inline int vsc7385_write_verify(struct vsc7385 *vsc, u8 block, ++ u8 subblock, u8 reg, u32 value, ++ u32 read_mask, u32 read_val) ++{ ++ struct spi_device *spi = vsc->spi; ++ u32 t; ++ int err; ++ ++ err = vsc7385_write(vsc, block, subblock, reg, value); ++ if (err) ++ return err; ++ ++ err = vsc7385_read(vsc, block, subblock, reg, &t); ++ if (err) ++ return err; ++ ++ if ((t & read_mask) != read_val) { ++ dev_err(&spi->dev, "register write error\n"); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static inline int vsc7385_set_clock_delay(struct vsc7385 *vsc, u32 val) ++{ ++ return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_CLOCK_DELAY, val); ++} ++ ++static inline int vsc7385_get_clock_delay(struct vsc7385 *vsc, u32 *val) ++{ ++ return vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_CLOCK_DELAY, val); ++} ++ ++static inline int vsc7385_icpu_stop(struct vsc7385 *vsc) ++{ ++ return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, ++ VSC73XX_ICPU_CTRL_STOP); ++} ++ ++static inline int vsc7385_icpu_start(struct vsc7385 *vsc) ++{ ++ return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, ++ VSC73XX_ICPU_CTRL_START); ++} ++ ++static inline int vsc7385_icpu_reset(struct vsc7385 *vsc) ++{ ++ int rc; ++ ++ rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_ADDR, ++ 0x0000); ++ if (rc) ++ dev_err(&vsc->spi->dev, ++ "could not reset microcode, err=%d\n", rc); ++ ++ return rc; ++} ++ ++static int vsc7385_upload_ucode(struct vsc7385 *vsc) ++{ ++ struct spi_device *spi = vsc->spi; ++ const struct firmware *firmware; ++ char *ucode_name; ++ unsigned char *dp; ++ unsigned int curVal; ++ int i; ++ int diffs; ++ int rc; ++ ++ ucode_name = (vsc->pdata->ucode_name) ? vsc->pdata->ucode_name ++ : "vsc7385_ucode.bin"; ++ rc = request_firmware(&firmware, ucode_name, &spi->dev); ++ if (rc) { ++ dev_err(&spi->dev, "request_firmware failed, err=%d\n", ++ rc); ++ return rc; ++ } ++ ++ rc = vsc7385_icpu_stop(vsc); ++ if (rc) ++ goto out; ++ ++ rc = vsc7385_icpu_reset(vsc); ++ if (rc) ++ goto out; ++ ++ dev_info(&spi->dev, "uploading microcode...\n"); ++ ++ dp = (unsigned char *) firmware->data; ++ for (i = 0; i < firmware->size; i++) { ++ rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_SRAM, *dp++); ++ if (rc) { ++ dev_err(&spi->dev, "could not load microcode, err=%d\n", ++ rc); ++ goto out; ++ } ++ } ++ ++ rc = vsc7385_icpu_reset(vsc); ++ if (rc) ++ goto out; ++ ++ dev_info(&spi->dev, "verifying microcode...\n"); ++ ++ dp = (unsigned char *) firmware->data; ++ diffs = 0; ++ for (i = 0; i < firmware->size; i++) { ++ rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_SRAM, &curVal); ++ if (rc) { ++ dev_err(&spi->dev, "could not read microcode %d\n", ++ rc); ++ goto out; ++ } ++ ++ if (curVal > 0xff) { ++ dev_err(&spi->dev, "bad val read: %04x : %02x %02x\n", ++ i, *dp, curVal); ++ rc = -EIO; ++ goto out; ++ } ++ ++ if ((curVal & 0xff) != *dp) { ++ diffs++; ++ dev_err(&spi->dev, "verify error: %04x : %02x %02x\n", ++ i, *dp, curVal); ++ ++ if (diffs > 4) ++ break; ++ } ++ dp++; ++ } ++ ++ if (diffs) { ++ dev_err(&spi->dev, "microcode verification failed\n"); ++ rc = -EIO; ++ goto out; ++ } ++ ++ dev_info(&spi->dev, "microcode uploaded\n"); ++ ++ rc = vsc7385_icpu_start(vsc); ++ ++out: ++ release_firmware(firmware); ++ return rc; ++} ++ ++static int vsc7385_setup(struct vsc7385 *vsc) ++{ ++ struct vsc7385_platform_data *pdata = vsc->pdata; ++ u32 t; ++ int err; ++ ++ err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_CLOCK_DELAY, ++ VSC7385_CLOCK_DELAY, ++ VSC7385_CLOCK_DELAY_MASK, ++ VSC7385_CLOCK_DELAY); ++ if (err) ++ goto err; ++ ++ err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_MAC, ++ VSC73XX_SUBBLOCK_PORT_MAC, VSC73XX_ADVPORTM, ++ VSC7385_ADVPORTM_INIT, ++ VSC7385_ADVPORTM_MASK, ++ VSC7385_ADVPORTM_INIT); ++ if (err) ++ goto err; ++ ++ err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, ++ VSC73XX_MAC_CFG, VSC7385_MAC_CFG_RESET); ++ if (err) ++ goto err; ++ ++ t = VSC73XX_MAC_CFG_INIT; ++ t |= VSC73XX_MAC_CFG_TX_IPG(pdata->mac_cfg.tx_ipg); ++ t |= VSC73XX_MAC_CFG_CLK_SEL(pdata->mac_cfg.clk_sel); ++ if (pdata->mac_cfg.bit2) ++ t |= VSC73XX_MAC_CFG_BIT2; ++ ++ err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, ++ VSC73XX_MAC_CFG, t); ++ if (err) ++ goto err; ++ ++ return 0; ++ ++err: ++ return err; ++} ++ ++static int vsc7385_detect(struct vsc7385 *vsc) ++{ ++ struct spi_device *spi = vsc->spi; ++ u32 t; ++ u32 id; ++ u32 rev; ++ int err; ++ ++ err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_MBOX_VAL, &t); ++ if (err) { ++ dev_err(&spi->dev, "unable to read mailbox, err=%d\n", err); ++ return err; ++ } ++ ++ if (t == 0xffffffff) { ++ dev_dbg(&spi->dev, "assert chip reset\n"); ++ if (vsc->pdata->reset) ++ vsc->pdata->reset(); ++ ++ } ++ ++ err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, ++ VSC73XX_ICPU_CHIPID, &t); ++ if (err) { ++ dev_err(&spi->dev, "unable to read chip id, err=%d\n", err); ++ return err; ++ } ++ ++ id = (t >> VSC73XX_ICPU_CHIPID_ID_SHIFT) & VSC73XX_ICPU_CHIPID_ID_MASK; ++ switch (id) { ++ case VSC73XX_ICPU_CHIPID_ID_7385: ++ case VSC73XX_ICPU_CHIPID_ID_7395: ++ break; ++ default: ++ dev_err(&spi->dev, "unsupported chip, id=%04x\n", id); ++ return -ENODEV; ++ } ++ ++ rev = (t >> VSC73XX_ICPU_CHIPID_REV_SHIFT) & ++ VSC73XX_ICPU_CHIPID_REV_MASK; ++ dev_info(&spi->dev, "VSC%04X (rev. %d) switch found\n", id, rev); ++ ++ return 0; ++} ++ ++static int vsc7385_probe(struct spi_device *spi) ++{ ++ struct vsc7385 *vsc; ++ struct vsc7385_platform_data *pdata; ++ int err; ++ ++ printk(KERN_INFO DRV_DESC " version " DRV_VERSION"\n"); ++ ++ pdata = spi->dev.platform_data; ++ if (!pdata) { ++ dev_err(&spi->dev, "no platform data specified\n"); ++ return -ENODEV; ++ } ++ ++ vsc = kzalloc(sizeof(*vsc), GFP_KERNEL); ++ if (!vsc) { ++ dev_err(&spi->dev, "no memory for private data\n"); ++ return -ENOMEM; ++ } ++ ++ mutex_init(&vsc->lock); ++ vsc->pdata = pdata; ++ vsc->spi = spi_dev_get(spi); ++ dev_set_drvdata(&spi->dev, vsc); ++ ++ spi->mode = SPI_MODE_0; ++ spi->bits_per_word = 8; ++ err = spi_setup(spi); ++ if (err) { ++ dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); ++ goto err_drvdata; ++ } ++ ++ err = vsc7385_detect(vsc); ++ if (err) { ++ dev_err(&spi->dev, "no chip found, err=%d\n", err); ++ goto err_drvdata; ++ } ++ ++ err = vsc7385_upload_ucode(vsc); ++ if (err) ++ goto err_drvdata; ++ ++ err = vsc7385_setup(vsc); ++ if (err) ++ goto err_drvdata; ++ ++ return 0; ++ ++err_drvdata: ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(vsc); ++ return err; ++} ++ ++static int vsc7385_remove(struct spi_device *spi) ++{ ++ struct vsc7385_data *vsc; ++ ++ vsc = dev_get_drvdata(&spi->dev); ++ dev_set_drvdata(&spi->dev, NULL); ++ kfree(vsc); ++ ++ return 0; ++} ++ ++static struct spi_driver vsc7385_driver = { ++ .driver = { ++ .name = DRV_NAME, ++ .bus = &spi_bus_type, ++ .owner = THIS_MODULE, ++ }, ++ .probe = vsc7385_probe, ++ .remove = vsc7385_remove, ++}; ++ ++static int __init vsc7385_init(void) ++{ ++ return spi_register_driver(&vsc7385_driver); ++} ++module_init(vsc7385_init); ++ ++static void __exit vsc7385_exit(void) ++{ ++ spi_unregister_driver(&vsc7385_driver); ++} ++module_exit(vsc7385_exit); ++ ++MODULE_DESCRIPTION(DRV_DESC); ++MODULE_VERSION(DRV_VERSION); ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_LICENSE("GPL v2"); ++ +diff -Nur linux-4.1.13.orig/drivers/tty/serial/serial_core.c linux-4.1.13/drivers/tty/serial/serial_core.c +--- linux-4.1.13.orig/drivers/tty/serial/serial_core.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/tty/serial/serial_core.c 2015-12-04 19:57:05.897979014 +0100 +@@ -164,6 +164,8 @@ + if (retval == 0) { + if (uart_console(uport) && uport->cons->cflag) { + tty->termios.c_cflag = uport->cons->cflag; ++ tty->termios.c_ospeed = uport->cons->baud; ++ tty->termios.c_ispeed = uport->cons->baud; + uport->cons->cflag = 0; + } + /* +@@ -1901,7 +1903,7 @@ + { 4800, B4800 }, + { 2400, B2400 }, + { 1200, B1200 }, +- { 0, B38400 } ++ { 0, BOTHER } + }; + + /** +@@ -1940,10 +1942,13 @@ + * Construct a cflag setting. + */ + for (i = 0; baud_rates[i].rate; i++) +- if (baud_rates[i].rate <= baud) ++ if (baud_rates[i].rate == baud) + break; + + termios.c_cflag |= baud_rates[i].cflag; ++ if (!baud_rates[i].rate) { ++ termios.c_ospeed = baud; ++ } + + if (bits == 7) + termios.c_cflag |= CS7; +@@ -1973,8 +1978,10 @@ + * Allow the setting of the UART parameters with a NULL console + * too: + */ +- if (co) ++ if (co) { + co->cflag = termios.c_cflag; ++ co->baud = baud; ++ } + + return 0; + } +diff -Nur linux-4.1.13.orig/drivers/usb/host/ehci-hcd.c linux-4.1.13/drivers/usb/host/ehci-hcd.c +--- linux-4.1.13.orig/drivers/usb/host/ehci-hcd.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/usb/host/ehci-hcd.c 2015-12-04 19:57:03.974104886 +0100 +@@ -252,6 +252,37 @@ + command |= CMD_RESET; + dbg_cmd (ehci, "reset", command); + ehci_writel(ehci, command, &ehci->regs->command); ++ ++ if (ehci->qca_force_host_mode) { ++ u32 usbmode; ++ ++ udelay(1000); ++ ++ usbmode = ehci_readl(ehci, &ehci->regs->usbmode); ++ usbmode |= USBMODE_CM_HC | (1 << 4); ++ ehci_writel(ehci, usbmode, &ehci->regs->usbmode); ++ ++ ehci_dbg(ehci, "forced host mode, usbmode: %08x\n", ++ ehci_readl(ehci, &ehci->regs->usbmode)); ++ } ++ ++ if (ehci->qca_force_16bit_ptw) { ++ u32 port_status; ++ ++ udelay(1000); ++ ++ /* enable 16-bit UTMI interface */ ++ port_status = ehci_readl(ehci, &ehci->regs->port_status[0]); ++ port_status |= BIT(28); ++ ehci_writel(ehci, port_status, &ehci->regs->port_status[0]); ++ ++ ehci_dbg(ehci, "16-bit UTMI interface enabled, status: %08x\n", ++ ehci_readl(ehci, &ehci->regs->port_status[0])); ++ } ++ ++ if (ehci->reset_notifier) ++ ehci->reset_notifier(ehci_to_hcd(ehci)); ++ + ehci->rh_state = EHCI_RH_HALTED; + ehci->next_statechange = jiffies; + retval = ehci_handshake(ehci, &ehci->regs->command, +diff -Nur linux-4.1.13.orig/drivers/usb/host/ehci-platform.c linux-4.1.13/drivers/usb/host/ehci-platform.c +--- linux-4.1.13.orig/drivers/usb/host/ehci-platform.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/usb/host/ehci-platform.c 2015-12-04 19:57:03.978104624 +0100 +@@ -49,6 +49,14 @@ + + static const char hcd_name[] = "ehci-platform"; + ++static void ehci_platform_reset_notifier(struct usb_hcd *hcd) ++{ ++ struct platform_device *pdev = to_platform_device(hcd->self.controller); ++ struct usb_ehci_pdata *pdata = pdev->dev.platform_data; ++ ++ pdata->reset_notifier(pdev); ++} ++ + static int ehci_platform_reset(struct usb_hcd *hcd) + { + struct platform_device *pdev = to_platform_device(hcd->self.controller); +diff -Nur linux-4.1.13.orig/drivers/watchdog/ath79_wdt.c linux-4.1.13/drivers/watchdog/ath79_wdt.c +--- linux-4.1.13.orig/drivers/watchdog/ath79_wdt.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/drivers/watchdog/ath79_wdt.c 2015-12-04 19:57:04.398077147 +0100 +@@ -114,10 +114,14 @@ + + static int ath79_wdt_set_timeout(int val) + { +- if (val < 1 || val > max_timeout) ++ if (val < 1) + return -EINVAL; + +- timeout = val; ++ if (val > max_timeout) ++ timeout = max_timeout; ++ else ++ timeout = val; ++ + ath79_wdt_keepalive(); + + return 0; +diff -Nur linux-4.1.13.orig/include/linux/console.h linux-4.1.13/include/linux/console.h +--- linux-4.1.13.orig/include/linux/console.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/console.h 2015-12-04 19:57:05.901978752 +0100 +@@ -127,6 +127,7 @@ + short flags; + short index; + int cflag; ++ int baud; + void *data; + struct console *next; + }; +diff -Nur linux-4.1.13.orig/include/linux/ipv6.h linux-4.1.13/include/linux/ipv6.h +--- linux-4.1.13.orig/include/linux/ipv6.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/ipv6.h 2015-12-04 19:57:05.917977705 +0100 +@@ -5,6 +5,7 @@ + + #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) + #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) ++ + /* + * This structure contains configuration options per IPv6 link. + */ +diff -Nur linux-4.1.13.orig/include/linux/mtd/physmap.h linux-4.1.13/include/linux/mtd/physmap.h +--- linux-4.1.13.orig/include/linux/mtd/physmap.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/mtd/physmap.h 2015-12-04 19:57:03.830114307 +0100 +@@ -25,6 +25,8 @@ + unsigned int width; + int (*init)(struct platform_device *); + void (*exit)(struct platform_device *); ++ void (*lock)(struct platform_device *); ++ void (*unlock)(struct platform_device *); + void (*set_vpp)(struct platform_device *, int); + unsigned int nr_parts; + unsigned int pfow_base; +diff -Nur linux-4.1.13.orig/include/linux/myloader.h linux-4.1.13/include/linux/myloader.h +--- linux-4.1.13.orig/include/linux/myloader.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/myloader.h 2015-12-04 20:10:00.684874021 +0100 +@@ -0,0 +1,121 @@ ++/* ++ * Compex's MyLoader specific definitions ++ * ++ * Copyright (C) 2006-2008 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++ ++#ifndef _MYLOADER_H_ ++#define _MYLOADER_H_ ++ ++/* Myloader specific magic numbers */ ++#define MYLO_MAGIC_SYS_PARAMS 0x20021107 ++#define MYLO_MAGIC_PARTITIONS 0x20021103 ++#define MYLO_MAGIC_BOARD_PARAMS 0x20021103 ++ ++/* Vendor ID's (seems to be same as the PCI vendor ID's) */ ++#define VENID_COMPEX 0x11F6 ++ ++/* Devices based on the ADM5120 */ ++#define DEVID_COMPEX_NP27G 0x0078 ++#define DEVID_COMPEX_NP28G 0x044C ++#define DEVID_COMPEX_NP28GHS 0x044E ++#define DEVID_COMPEX_WP54Gv1C 0x0514 ++#define DEVID_COMPEX_WP54G 0x0515 ++#define DEVID_COMPEX_WP54AG 0x0546 ++#define DEVID_COMPEX_WPP54AG 0x0550 ++#define DEVID_COMPEX_WPP54G 0x0555 ++ ++/* Devices based on the Atheros AR2317 */ ++#define DEVID_COMPEX_NP25G 0x05E6 ++#define DEVID_COMPEX_WPE53G 0x05DC ++ ++/* Devices based on the Atheros AR71xx */ ++#define DEVID_COMPEX_WP543 0x0640 ++#define DEVID_COMPEX_WPE72 0x0672 ++ ++/* Devices based on the IXP422 */ ++#define DEVID_COMPEX_WP18 0x047E ++#define DEVID_COMPEX_NP18A 0x0489 ++ ++/* Other devices */ ++#define DEVID_COMPEX_NP26G8M 0x03E8 ++#define DEVID_COMPEX_NP26G16M 0x03E9 ++ ++struct mylo_partition { ++ uint16_t flags; /* partition flags */ ++ uint16_t type; /* type of the partition */ ++ uint32_t addr; /* relative address of the partition from the ++ flash start */ ++ uint32_t size; /* size of the partition in bytes */ ++ uint32_t param; /* if this is the active partition, the ++ MyLoader load code to this address */ ++}; ++ ++#define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition, ++ * MyLoader loads firmware from here */ ++#define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */ ++#define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */ ++#define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM ++ * before decompression */ ++#define PARTITION_FLAG_LZMA 0x0100 /* partition data compressed by LZMA */ ++#define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */ ++ ++#define PARTITION_TYPE_FREE 0 ++#define PARTITION_TYPE_USED 1 ++ ++#define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the ++ partition table */ ++ ++struct mylo_partition_table { ++ uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */ ++ uint32_t res0; /* unknown/unused */ ++ uint32_t res1; /* unknown/unused */ ++ uint32_t res2; /* unknown/unused */ ++ struct mylo_partition partitions[MYLO_MAX_PARTITIONS]; ++}; ++ ++struct mylo_partition_header { ++ uint32_t len; /* length of the partition data */ ++ uint32_t crc; /* CRC value of the partition data */ ++}; ++ ++struct mylo_system_params { ++ uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */ ++ uint32_t res0; ++ uint32_t res1; ++ uint32_t mylo_ver; ++ uint16_t vid; /* Vendor ID */ ++ uint16_t did; /* Device ID */ ++ uint16_t svid; /* Sub Vendor ID */ ++ uint16_t sdid; /* Sub Device ID */ ++ uint32_t rev; /* device revision */ ++ uint32_t fwhi; ++ uint32_t fwlo; ++ uint32_t tftp_addr; ++ uint32_t prog_start; ++ uint32_t flash_size; /* size of boot FLASH in bytes */ ++ uint32_t dram_size; /* size of onboard RAM in bytes */ ++}; ++ ++struct mylo_eth_addr { ++ uint8_t mac[6]; ++ uint8_t csum[2]; ++}; ++ ++#define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address ++ in the board parameters */ ++ ++struct mylo_board_params { ++ uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */ ++ uint32_t res0; ++ uint32_t res1; ++ uint32_t res2; ++ struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT]; ++}; ++ ++#endif /* _MYLOADER_H_*/ +diff -Nur linux-4.1.13.orig/include/linux/nxp_74hc153.h linux-4.1.13/include/linux/nxp_74hc153.h +--- linux-4.1.13.orig/include/linux/nxp_74hc153.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/nxp_74hc153.h 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,24 @@ ++/* ++ * NXP 74HC153 - Dual 4-input multiplexer defines ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef _NXP_74HC153_H ++#define _NXP_74HC153_H ++ ++#define NXP_74HC153_DRIVER_NAME "nxp-74hc153" ++ ++struct nxp_74hc153_platform_data { ++ unsigned gpio_base; ++ unsigned gpio_pin_s0; ++ unsigned gpio_pin_s1; ++ unsigned gpio_pin_1y; ++ unsigned gpio_pin_2y; ++}; ++ ++#endif /* _NXP_74HC153_H */ +diff -Nur linux-4.1.13.orig/include/linux/phy.h linux-4.1.13/include/linux/phy.h +--- linux-4.1.13.orig/include/linux/phy.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/phy.h 2015-12-04 20:31:10.916990579 +0100 +@@ -762,6 +762,7 @@ + void phy_stop_machine(struct phy_device *phydev); + int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); + int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); ++int phy_ethtool_ioctl(struct phy_device *phydev, void *useraddr); + int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); + int phy_start_interrupts(struct phy_device *phydev); + void phy_print_status(struct phy_device *phydev); +diff -Nur linux-4.1.13.orig/include/linux/platform/ar934x_nfc.h linux-4.1.13/include/linux/platform/ar934x_nfc.h +--- linux-4.1.13.orig/include/linux/platform/ar934x_nfc.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/platform/ar934x_nfc.h 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,39 @@ ++/* ++ * Platform data definition for the built-in NAND controller of the ++ * Atheros AR934x SoCs ++ * ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef _AR934X_NFC_PLATFORM_H ++#define _AR934X_NFC_PLATFORM_H ++ ++#define AR934X_NFC_DRIVER_NAME "ar934x-nfc" ++ ++struct mtd_info; ++struct mtd_partition; ++ ++enum ar934x_nfc_ecc_mode { ++ AR934X_NFC_ECC_SOFT = 0, ++ AR934X_NFC_ECC_HW, ++ AR934X_NFC_ECC_SOFT_BCH, ++}; ++ ++struct ar934x_nfc_platform_data { ++ const char *name; ++ struct mtd_partition *parts; ++ int nr_parts; ++ ++ bool swap_dma; ++ enum ar934x_nfc_ecc_mode ecc_mode; ++ ++ void (*hw_reset)(bool active); ++ void (*select_chip)(int chip_no); ++ int (*scan_fixup)(struct mtd_info *mtd); ++}; ++ ++#endif /* _AR934X_NFC_PLATFORM_H */ +diff -Nur linux-4.1.13.orig/include/linux/platform_data/gpio-latch.h linux-4.1.13/include/linux/platform_data/gpio-latch.h +--- linux-4.1.13.orig/include/linux/platform_data/gpio-latch.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/platform_data/gpio-latch.h 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,14 @@ ++#ifndef _GPIO_LATCH_H_ ++#define _GPIO_LATCH_H_ ++ ++#define GPIO_LATCH_DRIVER_NAME "gpio-latch" ++ ++struct gpio_latch_platform_data { ++ int base; ++ int num_gpios; ++ int *gpios; ++ int le_gpio_index; ++ bool le_active_low; ++}; ++ ++#endif /* _GPIO_LATCH_H_ */ +diff -Nur linux-4.1.13.orig/include/linux/platform_data/phy-at803x.h linux-4.1.13/include/linux/platform_data/phy-at803x.h +--- linux-4.1.13.orig/include/linux/platform_data/phy-at803x.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/platform_data/phy-at803x.h 2015-12-04 19:57:03.890110382 +0100 +@@ -0,0 +1,11 @@ ++#ifndef _PHY_AT803X_PDATA_H ++#define _PHY_AT803X_PDATA_H ++ ++struct at803x_platform_data { ++ int disable_smarteee:1; ++ int enable_rgmii_tx_delay:1; ++ int enable_rgmii_rx_delay:1; ++ int fixup_rgmii_tx_delay:1; ++}; ++ ++#endif /* _PHY_AT803X_PDATA_H */ +diff -Nur linux-4.1.13.orig/include/linux/platform_data/rb91x_nand.h linux-4.1.13/include/linux/platform_data/rb91x_nand.h +--- linux-4.1.13.orig/include/linux/platform_data/rb91x_nand.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/platform_data/rb91x_nand.h 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,16 @@ ++#ifndef _RB91X_NAND_H_ ++#define _RB91X_NAND_H_ ++ ++#define RB91X_NAND_DRIVER_NAME "rb91x-nand" ++ ++struct rb91x_nand_platform_data { ++ int gpio_nce; /* chip enable, active low */ ++ int gpio_ale; /* address latch enable */ ++ int gpio_cle; /* command latch enable */ ++ int gpio_rdy; ++ int gpio_read; ++ int gpio_nrw; /* read/write enable, active low */ ++ int gpio_nle; /* latch enable, active low */ ++}; ++ ++#endif /* _RB91X_NAND_H_ */ +\ No newline at end of file +diff -Nur linux-4.1.13.orig/include/linux/rle.h linux-4.1.13/include/linux/rle.h +--- linux-4.1.13.orig/include/linux/rle.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/rle.h 2015-12-04 19:57:03.830114307 +0100 +@@ -0,0 +1,18 @@ ++#ifndef _RLE_H_ ++#define _RLE_H_ ++ ++#ifdef CONFIG_RLE_DECOMPRESS ++int rle_decode(const unsigned char *src, size_t srclen, ++ unsigned char *dst, size_t dstlen, ++ size_t *src_done, size_t *dst_done); ++#else ++static inline int ++rle_decode(const unsigned char *src, size_t srclen, ++ unsigned char *dst, size_t dstlen, ++ size_t *src_done, size_t *dst_done) ++{ ++ return -ENOTSUPP; ++} ++#endif /* CONFIG_RLE_DECOMPRESS */ ++ ++#endif /* _RLE_H_ */ +diff -Nur linux-4.1.13.orig/include/linux/spi/74x164.h linux-4.1.13/include/linux/spi/74x164.h +--- linux-4.1.13.orig/include/linux/spi/74x164.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/spi/74x164.h 2015-12-04 19:57:03.930107765 +0100 +@@ -0,0 +1,13 @@ ++#ifndef LINUX_SPI_74X164_H ++#define LINUX_SPI_74X164_H ++ ++struct gen_74x164_chip_platform_data { ++ /* number assigned to the first GPIO */ ++ unsigned base; ++ /* number of chained registers */ ++ unsigned num_registers; ++ /* address of a buffer containing initial data */ ++ u8 *init_data; ++}; ++ ++#endif +diff -Nur linux-4.1.13.orig/include/linux/spi/flash.h linux-4.1.13/include/linux/spi/flash.h +--- linux-4.1.13.orig/include/linux/spi/flash.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/spi/flash.h 2015-12-04 19:57:03.854112737 +0100 +@@ -24,6 +24,7 @@ + unsigned int nr_parts; + + char *type; ++ const char **part_probes; + + /* we'll likely add more ... use JEDEC IDs, etc */ + }; +diff -Nur linux-4.1.13.orig/include/linux/spi/spi_bitbang.h linux-4.1.13/include/linux/spi/spi_bitbang.h +--- linux-4.1.13.orig/include/linux/spi/spi_bitbang.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/spi/spi_bitbang.h 2015-12-04 19:57:03.934107503 +0100 +@@ -39,6 +39,7 @@ + extern void spi_bitbang_cleanup(struct spi_device *spi); + extern int spi_bitbang_setup_transfer(struct spi_device *spi, + struct spi_transfer *t); ++extern int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t); + + /* start or stop queue processing */ + extern int spi_bitbang_start(struct spi_bitbang *spi); +diff -Nur linux-4.1.13.orig/include/linux/spi/spi.h linux-4.1.13/include/linux/spi/spi.h +--- linux-4.1.13.orig/include/linux/spi/spi.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/spi/spi.h 2015-12-04 19:57:03.966105410 +0100 +@@ -506,6 +506,12 @@ + + /*---------------------------------------------------------------------------*/ + ++enum spi_transfer_type { ++ SPI_TRANSFER_GENERIC = 0, ++ SPI_TRANSFER_FLASH_READ_CMD, ++ SPI_TRANSFER_FLASH_READ_DATA, ++}; ++ + /* + * I/O INTERFACE between SPI controller and protocol drivers + * +@@ -618,12 +624,16 @@ + unsigned cs_change:1; + unsigned tx_nbits:3; + unsigned rx_nbits:3; ++ unsigned verify:1; ++ unsigned fast_write:1; + #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ + #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ + #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ + u8 bits_per_word; + u16 delay_usecs; + u32 speed_hz; ++ enum spi_transfer_type type; ++ bool dummy; + + struct list_head transfer_list; + }; +@@ -663,6 +673,7 @@ + struct spi_device *spi; + + unsigned is_dma_mapped:1; ++ unsigned fast_read:1; + + /* REVISIT: we might want a flag affecting the behavior of the + * last transfer ... allowing things like "read 16 bit length L" +diff -Nur linux-4.1.13.orig/include/linux/spi/vsc7385.h linux-4.1.13/include/linux/spi/vsc7385.h +--- linux-4.1.13.orig/include/linux/spi/vsc7385.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/spi/vsc7385.h 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,19 @@ ++/* ++ * Platform data definition for the Vitesse VSC7385 ethernet switch driver ++ * ++ * Copyright (C) 2009 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++struct vsc7385_platform_data { ++ void (*reset)(void); ++ char *ucode_name; ++ struct { ++ u32 tx_ipg:5; ++ u32 bit2:1; ++ u32 clk_sel:3; ++ } mac_cfg; ++}; +diff -Nur linux-4.1.13.orig/include/linux/switch.h linux-4.1.13/include/linux/switch.h +--- linux-4.1.13.orig/include/linux/switch.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/linux/switch.h 2015-12-04 20:52:15.735681740 +0100 +@@ -0,0 +1,169 @@ ++/* ++ * switch.h: Switch configuration API ++ * ++ * Copyright (C) 2008 Felix Fietkau ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++#ifndef _LINUX_SWITCH_H ++#define _LINUX_SWITCH_H ++ ++#include ++#include ++ ++struct switch_dev; ++struct switch_op; ++struct switch_val; ++struct switch_attr; ++struct switch_attrlist; ++struct switch_led_trigger; ++ ++int register_switch(struct switch_dev *dev, struct net_device *netdev); ++void unregister_switch(struct switch_dev *dev); ++ ++/** ++ * struct switch_attrlist - attribute list ++ * ++ * @n_attr: number of attributes ++ * @attr: pointer to the attributes array ++ */ ++struct switch_attrlist { ++ int n_attr; ++ const struct switch_attr *attr; ++}; ++ ++enum switch_port_speed { ++ SWITCH_PORT_SPEED_UNKNOWN = 0, ++ SWITCH_PORT_SPEED_10 = 10, ++ SWITCH_PORT_SPEED_100 = 100, ++ SWITCH_PORT_SPEED_1000 = 1000, ++}; ++ ++struct switch_port_link { ++ bool link; ++ bool duplex; ++ bool aneg; ++ bool tx_flow; ++ bool rx_flow; ++ enum switch_port_speed speed; ++ /* in ethtool adv_t format */ ++ u32 eee; ++}; ++ ++struct switch_port_stats { ++ unsigned long tx_bytes; ++ unsigned long rx_bytes; ++}; ++ ++/** ++ * struct switch_dev_ops - switch driver operations ++ * ++ * @attr_global: global switch attribute list ++ * @attr_port: port attribute list ++ * @attr_vlan: vlan attribute list ++ * ++ * Callbacks: ++ * ++ * @get_vlan_ports: read the port list of a VLAN ++ * @set_vlan_ports: set the port list of a VLAN ++ * ++ * @get_port_pvid: get the primary VLAN ID of a port ++ * @set_port_pvid: set the primary VLAN ID of a port ++ * ++ * @apply_config: apply all changed settings to the switch ++ * @reset_switch: resetting the switch ++ */ ++struct switch_dev_ops { ++ struct switch_attrlist attr_global, attr_port, attr_vlan; ++ ++ int (*get_vlan_ports)(struct switch_dev *dev, struct switch_val *val); ++ int (*set_vlan_ports)(struct switch_dev *dev, struct switch_val *val); ++ ++ int (*get_port_pvid)(struct switch_dev *dev, int port, int *val); ++ int (*set_port_pvid)(struct switch_dev *dev, int port, int val); ++ ++ int (*apply_config)(struct switch_dev *dev); ++ int (*reset_switch)(struct switch_dev *dev); ++ ++ int (*get_port_link)(struct switch_dev *dev, int port, ++ struct switch_port_link *link); ++ int (*get_port_stats)(struct switch_dev *dev, int port, ++ struct switch_port_stats *stats); ++}; ++ ++struct switch_dev { ++ struct device_node *of_node; ++ const struct switch_dev_ops *ops; ++ /* will be automatically filled */ ++ char devname[IFNAMSIZ]; ++ ++ const char *name; ++ /* NB: either alias or netdev must be set */ ++ const char *alias; ++ struct net_device *netdev; ++ ++ int ports; ++ int vlans; ++ int cpu_port; ++ ++ /* the following fields are internal for swconfig */ ++ int id; ++ struct list_head dev_list; ++ unsigned long def_global, def_port, def_vlan; ++ ++ struct mutex sw_mutex; ++ struct switch_port *portbuf; ++ struct switch_portmap *portmap; ++ ++ char buf[128]; ++ ++#ifdef CONFIG_SWCONFIG_LEDS ++ struct switch_led_trigger *led_trigger; ++#endif ++}; ++ ++struct switch_port { ++ u32 id; ++ u32 flags; ++}; ++ ++struct switch_portmap { ++ u32 virt; ++ const char *s; ++}; ++ ++struct switch_val { ++ const struct switch_attr *attr; ++ int port_vlan; ++ int len; ++ union { ++ const char *s; ++ u32 i; ++ struct switch_port *ports; ++ } value; ++}; ++ ++struct switch_attr { ++ int disabled; ++ int type; ++ const char *name; ++ const char *description; ++ ++ int (*set)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val); ++ int (*get)(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val); ++ ++ /* for driver internal use */ ++ int id; ++ int ofs; ++ int max; ++}; ++ ++#endif /* _LINUX_SWITCH_H */ +diff -Nur linux-4.1.13.orig/include/linux/types.h linux-4.1.13/include/linux/types.h +--- linux-4.1.13.orig/include/linux/types.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/types.h 2015-12-04 19:57:05.925977182 +0100 +@@ -215,5 +215,11 @@ + /* clocksource cycle base type */ + typedef u64 cycle_t; + ++struct net_hdr_word { ++ u32 words[1]; ++} __attribute__((packed, aligned(2))); ++ ++#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) ++ + #endif /* __ASSEMBLY__ */ + #endif /* _LINUX_TYPES_H */ +diff -Nur linux-4.1.13.orig/include/linux/usb/ehci_pdriver.h linux-4.1.13/include/linux/usb/ehci_pdriver.h +--- linux-4.1.13.orig/include/linux/usb/ehci_pdriver.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/linux/usb/ehci_pdriver.h 2015-12-04 20:18:56.085517295 +0100 +@@ -49,6 +49,8 @@ + unsigned no_io_watchdog:1; + unsigned reset_on_resume:1; + unsigned dma_mask_64:1; ++ unsigned qca_force_host_mode:1; ++ unsigned qca_force_16bit_ptw:1; + + /* Turn on all power and clocks */ + int (*power_on)(struct platform_device *pdev); +@@ -58,6 +60,7 @@ + * turn off everything else */ + void (*power_suspend)(struct platform_device *pdev); + int (*pre_setup)(struct usb_hcd *hcd); ++ void (*reset_notifier)(struct platform_device *pdev); + }; + + #endif /* __USB_CORE_EHCI_PDRIVER_H */ +diff -Nur linux-4.1.13.orig/include/net/addrconf.h linux-4.1.13/include/net/addrconf.h +--- linux-4.1.13.orig/include/net/addrconf.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/net/addrconf.h 2015-12-04 19:57:05.929976920 +0100 +@@ -43,7 +43,7 @@ + __be32 reserved2; + + struct in6_addr prefix; +-}; ++} __attribute__((packed, aligned(2))); + + + #include +diff -Nur linux-4.1.13.orig/include/net/inet_ecn.h linux-4.1.13/include/net/inet_ecn.h +--- linux-4.1.13.orig/include/net/inet_ecn.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/net/inet_ecn.h 2015-12-04 19:57:05.929976920 +0100 +@@ -115,13 +115,13 @@ + { + if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) + return 0; +- *(__be32*)iph |= htonl(INET_ECN_CE << 20); ++ net_hdr_word(iph) |= htonl(INET_ECN_CE << 20); + return 1; + } + + static inline void IP6_ECN_clear(struct ipv6hdr *iph) + { +- *(__be32*)iph &= ~htonl(INET_ECN_MASK << 20); ++ net_hdr_word(iph) &= ~htonl(INET_ECN_MASK << 20); + } + + static inline void ipv6_copy_dscp(unsigned int dscp, struct ipv6hdr *inner) +diff -Nur linux-4.1.13.orig/include/net/ipv6.h linux-4.1.13/include/net/ipv6.h +--- linux-4.1.13.orig/include/net/ipv6.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/net/ipv6.h 2015-12-04 19:57:05.929976920 +0100 +@@ -107,7 +107,7 @@ + __u8 reserved; + __be16 frag_off; + __be32 identification; +-}; ++} __attribute__((packed, aligned(2))); + + #define IP6_MF 0x0001 + #define IP6_OFFSET 0xFFF8 +@@ -396,8 +396,8 @@ + } + #endif + #endif +- addr[0] = wh; +- addr[1] = wl; ++ net_hdr_word(&addr[0]) = wh; ++ net_hdr_word(&addr[1]) = wl; + } + + static inline void ipv6_addr_set(struct in6_addr *addr, +@@ -456,6 +456,8 @@ + const __be32 *a1 = addr1->s6_addr32; + const __be32 *a2 = addr2->s6_addr32; + unsigned int pdw, pbi; ++ /* Used for last <32-bit fraction of prefix */ ++ u32 pbia1, pbia2; + + /* check complete u32 in prefix */ + pdw = prefixlen >> 5; +@@ -464,7 +466,9 @@ + + /* check incomplete u32 in prefix */ + pbi = prefixlen & 0x1f; +- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) ++ pbia1 = net_hdr_word(&a1[pdw]); ++ pbia2 = net_hdr_word(&a2[pdw]); ++ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) + return false; + + return true; +@@ -607,13 +611,13 @@ + */ + static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) + { +- const __be32 *a1 = token1, *a2 = token2; ++ const struct in6_addr *a1 = token1, *a2 = token2; + int i; + + addrlen >>= 2; + + for (i = 0; i < addrlen; i++) { +- __be32 xb = a1[i] ^ a2[i]; ++ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; + if (xb) + return i * 32 + 31 - __fls(ntohl(xb)); + } +@@ -739,17 +743,18 @@ + static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, + __be32 flowlabel) + { +- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; ++ net_hdr_word((__be32 *)hdr) = ++ htonl(0x60000000 | (tclass << 20)) | flowlabel; + } + + static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; + } + + static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; + } + + static inline u8 ip6_tclass(__be32 flowinfo) +diff -Nur linux-4.1.13.orig/include/net/ndisc.h linux-4.1.13/include/net/ndisc.h +--- linux-4.1.13.orig/include/net/ndisc.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/net/ndisc.h 2015-12-04 19:57:05.929976920 +0100 +@@ -76,7 +76,7 @@ + struct icmp6hdr icmph; + __be32 reachable_time; + __be32 retrans_timer; +-}; ++} __attribute__((packed, aligned(2))); + + struct rd_msg { + struct icmp6hdr icmph; +@@ -148,10 +148,10 @@ + { + const u32 *p32 = pkey; + +- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + +- (p32[1] * hash_rnd[1]) + +- (p32[2] * hash_rnd[2]) + +- (p32[3] * hash_rnd[3])); ++ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + ++ (net_hdr_word(&p32[1]) * hash_rnd[1]) + ++ (net_hdr_word(&p32[2]) * hash_rnd[2]) + ++ (net_hdr_word(&p32[3]) * hash_rnd[3])); + } + + static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) +diff -Nur linux-4.1.13.orig/include/net/neighbour.h linux-4.1.13/include/net/neighbour.h +--- linux-4.1.13.orig/include/net/neighbour.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/net/neighbour.h 2015-12-04 19:57:05.933976659 +0100 +@@ -262,8 +262,10 @@ + const u32 *n32 = (const u32 *)n->primary_key; + const u32 *p32 = pkey; + +- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | +- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; ++ return ((n32[0] ^ net_hdr_word(&p32[0])) | ++ (n32[1] ^ net_hdr_word(&p32[1])) | ++ (n32[2] ^ net_hdr_word(&p32[2])) | ++ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; + } + + static inline struct neighbour *___neigh_lookup_noref( +diff -Nur linux-4.1.13.orig/include/net/secure_seq.h linux-4.1.13/include/net/secure_seq.h +--- linux-4.1.13.orig/include/net/secure_seq.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/net/secure_seq.h 2015-12-04 19:57:05.929976920 +0100 +@@ -2,6 +2,7 @@ + #define _NET_SECURE_SEQ + + #include ++#include + + u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); + u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, +diff -Nur linux-4.1.13.orig/include/uapi/linux/icmp.h linux-4.1.13/include/uapi/linux/icmp.h +--- linux-4.1.13.orig/include/uapi/linux/icmp.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/icmp.h 2015-12-04 19:57:05.917977705 +0100 +@@ -80,7 +80,7 @@ + __be16 mtu; + } frag; + } un; +-}; ++} __attribute__((packed, aligned(2))); + + + /* +diff -Nur linux-4.1.13.orig/include/uapi/linux/icmpv6.h linux-4.1.13/include/uapi/linux/icmpv6.h +--- linux-4.1.13.orig/include/uapi/linux/icmpv6.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/icmpv6.h 2015-12-04 19:57:05.929976920 +0100 +@@ -76,7 +76,7 @@ + #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other + #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime + #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref +-}; ++} __attribute__((packed, aligned(2))); + + + #define ICMPV6_ROUTER_PREF_LOW 0x3 +diff -Nur linux-4.1.13.orig/include/uapi/linux/if_pppox.h linux-4.1.13/include/uapi/linux/if_pppox.h +--- linux-4.1.13.orig/include/uapi/linux/if_pppox.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/if_pppox.h 2015-12-04 19:57:05.933976659 +0100 +@@ -47,6 +47,7 @@ + */ + struct pptp_addr { + __u16 call_id; ++ __u16 pad; + struct in_addr sin_addr; + }; + +diff -Nur linux-4.1.13.orig/include/uapi/linux/igmp.h linux-4.1.13/include/uapi/linux/igmp.h +--- linux-4.1.13.orig/include/uapi/linux/igmp.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/igmp.h 2015-12-04 19:57:05.929976920 +0100 +@@ -32,7 +32,7 @@ + __u8 code; /* For newer IGMP */ + __sum16 csum; + __be32 group; +-}; ++} __attribute__((packed, aligned(2))); + + /* V3 group record types [grec_type] */ + #define IGMPV3_MODE_IS_INCLUDE 1 +@@ -48,7 +48,7 @@ + __be16 grec_nsrcs; + __be32 grec_mca; + __be32 grec_src[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_report { + __u8 type; +@@ -57,7 +57,7 @@ + __be16 resv2; + __be16 ngrec; + struct igmpv3_grec grec[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_query { + __u8 type; +@@ -78,7 +78,7 @@ + __u8 qqic; + __be16 nsrcs; + __be32 srcs[0]; +-}; ++} __attribute__((packed, aligned(2))); + + #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ + #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ +diff -Nur linux-4.1.13.orig/include/uapi/linux/in6.h linux-4.1.13/include/uapi/linux/in6.h +--- linux-4.1.13.orig/include/uapi/linux/in6.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/in6.h 2015-12-04 19:57:05.917977705 +0100 +@@ -42,7 +42,7 @@ + #define s6_addr16 in6_u.u6_addr16 + #define s6_addr32 in6_u.u6_addr32 + #endif +-}; ++} __attribute__((packed, aligned(2))); + #endif /* __UAPI_DEF_IN6_ADDR */ + + #if __UAPI_DEF_SOCKADDR_IN6 +diff -Nur linux-4.1.13.orig/include/uapi/linux/in.h linux-4.1.13/include/uapi/linux/in.h +--- linux-4.1.13.orig/include/uapi/linux/in.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/in.h 2015-12-04 19:57:57.978571564 +0100 +@@ -78,7 +78,7 @@ + /* Internet address. */ + struct in_addr { + __be32 s_addr; +-}; ++} __attribute__((packed, aligned(2))); + + #define IP_TOS 1 + #define IP_TTL 2 +diff -Nur linux-4.1.13.orig/include/uapi/linux/ip.h linux-4.1.13/include/uapi/linux/ip.h +--- linux-4.1.13.orig/include/uapi/linux/ip.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/ip.h 2015-12-04 19:57:05.913977967 +0100 +@@ -102,7 +102,7 @@ + __be32 saddr; + __be32 daddr; + /*The options start here. */ +-}; ++} __attribute__((packed, aligned(2))); + + + struct ip_auth_hdr { +diff -Nur linux-4.1.13.orig/include/uapi/linux/ipv6.h linux-4.1.13/include/uapi/linux/ipv6.h +--- linux-4.1.13.orig/include/uapi/linux/ipv6.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/ipv6.h 2015-12-04 19:57:05.913977967 +0100 +@@ -129,7 +129,7 @@ + + struct in6_addr saddr; + struct in6_addr daddr; +-}; ++} __attribute__((packed, aligned(2))); + + + /* index values for the variables in ipv6_devconf */ +diff -Nur linux-4.1.13.orig/include/uapi/linux/Kbuild linux-4.1.13/include/uapi/linux/Kbuild +--- linux-4.1.13.orig/include/uapi/linux/Kbuild 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/Kbuild 2015-12-04 21:33:39.775625531 +0100 +@@ -380,6 +380,7 @@ + header-y += string.h + header-y += suspend_ioctls.h + header-y += swab.h ++header-y += switch.h + header-y += synclink.h + header-y += sysctl.h + header-y += sysinfo.h +diff -Nur linux-4.1.13.orig/include/uapi/linux/netfilter_arp/arp_tables.h linux-4.1.13/include/uapi/linux/netfilter_arp/arp_tables.h +--- linux-4.1.13.orig/include/uapi/linux/netfilter_arp/arp_tables.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/netfilter_arp/arp_tables.h 2015-12-04 19:57:05.933976659 +0100 +@@ -68,7 +68,7 @@ + __u8 flags; + /* Inverse flags */ + __u16 invflags; +-}; ++} __attribute__((aligned(4))); + + /* Values for "flag" field in struct arpt_ip (general arp structure). + * No flags defined yet. +diff -Nur linux-4.1.13.orig/include/uapi/linux/switch.h linux-4.1.13/include/uapi/linux/switch.h +--- linux-4.1.13.orig/include/uapi/linux/switch.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/switch.h 2015-12-04 20:52:30.298718052 +0100 +@@ -0,0 +1,103 @@ ++/* ++ * switch.h: Switch configuration API ++ * ++ * Copyright (C) 2008 Felix Fietkau ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#ifndef _UAPI_LINUX_SWITCH_H ++#define _UAPI_LINUX_SWITCH_H ++ ++#include ++#include ++#include ++#include ++#ifndef __KERNEL__ ++#include ++#include ++#include ++#endif ++ ++/* main attributes */ ++enum { ++ SWITCH_ATTR_UNSPEC, ++ /* global */ ++ SWITCH_ATTR_TYPE, ++ /* device */ ++ SWITCH_ATTR_ID, ++ SWITCH_ATTR_DEV_NAME, ++ SWITCH_ATTR_ALIAS, ++ SWITCH_ATTR_NAME, ++ SWITCH_ATTR_VLANS, ++ SWITCH_ATTR_PORTS, ++ SWITCH_ATTR_PORTMAP, ++ SWITCH_ATTR_CPU_PORT, ++ /* attributes */ ++ SWITCH_ATTR_OP_ID, ++ SWITCH_ATTR_OP_TYPE, ++ SWITCH_ATTR_OP_NAME, ++ SWITCH_ATTR_OP_PORT, ++ SWITCH_ATTR_OP_VLAN, ++ SWITCH_ATTR_OP_VALUE_INT, ++ SWITCH_ATTR_OP_VALUE_STR, ++ SWITCH_ATTR_OP_VALUE_PORTS, ++ SWITCH_ATTR_OP_DESCRIPTION, ++ /* port lists */ ++ SWITCH_ATTR_PORT, ++ SWITCH_ATTR_MAX ++}; ++ ++enum { ++ /* port map */ ++ SWITCH_PORTMAP_PORTS, ++ SWITCH_PORTMAP_SEGMENT, ++ SWITCH_PORTMAP_VIRT, ++ SWITCH_PORTMAP_MAX ++}; ++ ++/* commands */ ++enum { ++ SWITCH_CMD_UNSPEC, ++ SWITCH_CMD_GET_SWITCH, ++ SWITCH_CMD_NEW_ATTR, ++ SWITCH_CMD_LIST_GLOBAL, ++ SWITCH_CMD_GET_GLOBAL, ++ SWITCH_CMD_SET_GLOBAL, ++ SWITCH_CMD_LIST_PORT, ++ SWITCH_CMD_GET_PORT, ++ SWITCH_CMD_SET_PORT, ++ SWITCH_CMD_LIST_VLAN, ++ SWITCH_CMD_GET_VLAN, ++ SWITCH_CMD_SET_VLAN ++}; ++ ++/* data types */ ++enum switch_val_type { ++ SWITCH_TYPE_UNSPEC, ++ SWITCH_TYPE_INT, ++ SWITCH_TYPE_STRING, ++ SWITCH_TYPE_PORTS, ++ SWITCH_TYPE_NOVAL, ++}; ++ ++/* port nested attributes */ ++enum { ++ SWITCH_PORT_UNSPEC, ++ SWITCH_PORT_ID, ++ SWITCH_PORT_FLAG_TAGGED, ++ SWITCH_PORT_ATTR_MAX ++}; ++ ++#define SWITCH_ATTR_DEFAULTS_OFFSET 0x1000 ++ ++ ++#endif /* _UAPI_LINUX_SWITCH_H */ +diff -Nur linux-4.1.13.orig/include/uapi/linux/tcp.h linux-4.1.13/include/uapi/linux/tcp.h +--- linux-4.1.13.orig/include/uapi/linux/tcp.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/tcp.h 2015-12-04 19:57:05.913977967 +0100 +@@ -54,7 +54,7 @@ + __be16 window; + __sum16 check; + __be16 urg_ptr; +-}; ++} __attribute__((packed, aligned(2))); + + /* + * The union cast uses a gcc extension to avoid aliasing problems +@@ -64,7 +64,7 @@ + union tcp_word_hdr { + struct tcphdr hdr; + __be32 words[5]; +-}; ++} __attribute__((packed, aligned(2))); + + #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) + +diff -Nur linux-4.1.13.orig/include/uapi/linux/udp.h linux-4.1.13/include/uapi/linux/udp.h +--- linux-4.1.13.orig/include/uapi/linux/udp.h 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/include/uapi/linux/udp.h 2015-12-04 19:57:05.917977705 +0100 +@@ -24,7 +24,7 @@ + __be16 dest; + __be16 len; + __sum16 check; +-}; ++} __attribute__((packed, aligned(2))); + + /* UDP socket options */ + #define UDP_CORK 1 /* Never send partially complete segments */ +diff -Nur linux-4.1.13.orig/lib/Kconfig linux-4.1.13/lib/Kconfig +--- linux-4.1.13.orig/lib/Kconfig 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/lib/Kconfig 2015-12-04 19:57:03.826114569 +0100 +@@ -235,6 +235,9 @@ + + source "lib/xz/Kconfig" + ++config RLE_DECOMPRESS ++ tristate ++ + # + # These all provide a common interface (hence the apparent duplication with + # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) +diff -Nur linux-4.1.13.orig/lib/rle.c linux-4.1.13/lib/rle.c +--- linux-4.1.13.orig/lib/rle.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/lib/rle.c 2015-12-04 19:57:03.830114307 +0100 +@@ -0,0 +1,78 @@ ++/* ++ * RLE decoding routine ++ * ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++int rle_decode(const unsigned char *src, size_t srclen, ++ unsigned char *dst, size_t dstlen, ++ size_t *src_done, size_t *dst_done) ++{ ++ size_t srcpos, dstpos; ++ int ret; ++ ++ srcpos = 0; ++ dstpos = 0; ++ ret = -EINVAL; ++ ++ /* sanity checks */ ++ if (!src || !srclen || !dst || !dstlen) ++ goto out; ++ ++ while (1) { ++ char count; ++ ++ if (srcpos >= srclen) ++ break; ++ ++ count = (char) src[srcpos++]; ++ if (count == 0) { ++ ret = 0; ++ break; ++ } ++ ++ if (count > 0) { ++ unsigned char c; ++ ++ if (srcpos >= srclen) ++ break; ++ ++ c = src[srcpos++]; ++ ++ while (count--) { ++ if (dstpos >= dstlen) ++ break; ++ ++ dst[dstpos++] = c; ++ } ++ } else { ++ count *= -1; ++ ++ while (count--) { ++ if (srcpos >= srclen) ++ break; ++ if (dstpos >= dstlen) ++ break; ++ dst[dstpos++] = src[srcpos++]; ++ } ++ } ++ } ++ ++out: ++ if (src_done) ++ *src_done = srcpos; ++ if (dst_done) ++ *dst_done = dstpos; ++ ++ return ret; ++} ++ ++EXPORT_SYMBOL_GPL(rle_decode); +diff -Nur linux-4.1.13.orig/net/core/flow_dissector.c linux-4.1.13/net/core/flow_dissector.c +--- linux-4.1.13.orig/net/core/flow_dissector.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/core/flow_dissector.c 2015-12-04 19:57:05.929976920 +0100 +@@ -53,7 +53,7 @@ + ports = __skb_header_pointer(skb, thoff + poff, + sizeof(_ports), data, hlen, &_ports); + if (ports) +- return *ports; ++ return (__be32)net_hdr_word(ports); + } + + return 0; +diff -Nur linux-4.1.13.orig/net/core/secure_seq.c linux-4.1.13/net/core/secure_seq.c +--- linux-4.1.13.orig/net/core/secure_seq.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/core/secure_seq.c 2015-12-04 19:57:05.929976920 +0100 +@@ -46,11 +46,12 @@ + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u32 i; ++ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; + + net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) +- secret[i] = net_secret[i] + (__force u32)daddr[i]; ++ secret[i] = net_secret[i] + (__force u32)daddr6->s6_addr32[i]; + secret[4] = net_secret[4] + + (((__force u16)sport << 16) + (__force u16)dport); + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) +@@ -68,11 +69,12 @@ + u32 secret[MD5_MESSAGE_BYTES / 4]; + u32 hash[MD5_DIGEST_WORDS]; + u32 i; ++ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; + + net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) +- secret[i] = net_secret[i] + (__force u32) daddr[i]; ++ secret[i] = net_secret[i] + (__force u32) daddr6->s6_addr32[i]; + secret[4] = net_secret[4] + (__force u32)dport; + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) + secret[i] = net_secret[i]; +@@ -150,11 +152,12 @@ + u32 hash[MD5_DIGEST_WORDS]; + u64 seq; + u32 i; ++ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; + + net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) +- secret[i] = net_secret[i] + daddr[i]; ++ secret[i] = net_secret[i] + daddr6->s6_addr32[i]; + secret[4] = net_secret[4] + + (((__force u16)sport << 16) + (__force u16)dport); + for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) +diff -Nur linux-4.1.13.orig/net/dsa/mv88e6063.c linux-4.1.13/net/dsa/mv88e6063.c +--- linux-4.1.13.orig/net/dsa/mv88e6063.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-4.1.13/net/dsa/mv88e6063.c 2015-09-13 20:04:35.076523692 +0200 +@@ -0,0 +1,294 @@ ++/* ++ * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips ++ * Copyright (c) 2009 Gabor Juhos ++ * ++ * This driver was base on: net/dsa/mv88e6060.c ++ * net/dsa/mv88e6063.c - Driver for Marvell 88e6060 switch chips ++ * Copyright (c) 2008-2009 Marvell Semiconductor ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include "dsa_priv.h" ++ ++#define REG_BASE 0x10 ++#define REG_PHY(p) (REG_BASE + (p)) ++#define REG_PORT(p) (REG_BASE + 8 + (p)) ++#define REG_GLOBAL (REG_BASE + 0x0f) ++#define NUM_PORTS 7 ++ ++static int reg_read(struct dsa_switch *ds, int addr, int reg) ++{ ++ return mdiobus_read(ds->master_mii_bus, addr, reg); ++} ++ ++#define REG_READ(addr, reg) \ ++ ({ \ ++ int __ret; \ ++ \ ++ __ret = reg_read(ds, addr, reg); \ ++ if (__ret < 0) \ ++ return __ret; \ ++ __ret; \ ++ }) ++ ++ ++static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) ++{ ++ return mdiobus_write(ds->master_mii_bus, addr, reg, val); ++} ++ ++#define REG_WRITE(addr, reg, val) \ ++ ({ \ ++ int __ret; \ ++ \ ++ __ret = reg_write(ds, addr, reg, val); \ ++ if (__ret < 0) \ ++ return __ret; \ ++ }) ++ ++static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) ++{ ++ int ret; ++ ++ ret = mdiobus_read(bus, REG_PORT(0), 0x03); ++ if (ret >= 0) { ++ ret &= 0xfff0; ++ if (ret == 0x1530) ++ return "Marvell 88E6063"; ++ } ++ ++ return NULL; ++} ++ ++static int mv88e6063_switch_reset(struct dsa_switch *ds) ++{ ++ int i; ++ int ret; ++ ++ /* ++ * Set all ports to the disabled state. ++ */ ++ for (i = 0; i < NUM_PORTS; i++) { ++ ret = REG_READ(REG_PORT(i), 0x04); ++ REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc); ++ } ++ ++ /* ++ * Wait for transmit queues to drain. ++ */ ++ msleep(2); ++ ++ /* ++ * Reset the switch. ++ */ ++ REG_WRITE(REG_GLOBAL, 0x0a, 0xa130); ++ ++ /* ++ * Wait up to one second for reset to complete. ++ */ ++ for (i = 0; i < 1000; i++) { ++ ret = REG_READ(REG_GLOBAL, 0x00); ++ if ((ret & 0x8000) == 0x0000) ++ break; ++ ++ msleep(1); ++ } ++ if (i == 1000) ++ return -ETIMEDOUT; ++ ++ return 0; ++} ++ ++static int mv88e6063_setup_global(struct dsa_switch *ds) ++{ ++ /* ++ * Disable discarding of frames with excessive collisions, ++ * set the maximum frame size to 1536 bytes, and mask all ++ * interrupt sources. ++ */ ++ REG_WRITE(REG_GLOBAL, 0x04, 0x0800); ++ ++ /* ++ * Enable automatic address learning, set the address ++ * database size to 1024 entries, and set the default aging ++ * time to 5 minutes. ++ */ ++ REG_WRITE(REG_GLOBAL, 0x0a, 0x2130); ++ ++ return 0; ++} ++ ++static int mv88e6063_setup_port(struct dsa_switch *ds, int p) ++{ ++ int addr = REG_PORT(p); ++ ++ /* ++ * Do not force flow control, disable Ingress and Egress ++ * Header tagging, disable VLAN tunneling, and set the port ++ * state to Forwarding. Additionally, if this is the CPU ++ * port, enable Ingress and Egress Trailer tagging mode. ++ */ ++ REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003); ++ ++ /* ++ * Port based VLAN map: give each port its own address ++ * database, allow the CPU port to talk to each of the 'real' ++ * ports, and allow each of the 'real' ports to only talk to ++ * the CPU port. ++ */ ++ REG_WRITE(addr, 0x06, ++ ((p & 0xf) << 12) | ++ (dsa_is_cpu_port(ds, p) ? ++ ds->phys_port_mask : ++ (1 << ds->dst->cpu_port))); ++ ++ /* ++ * Port Association Vector: when learning source addresses ++ * of packets, add the address to the address database using ++ * a port bitmap that has only the bit for this port set and ++ * the other bits clear. ++ */ ++ REG_WRITE(addr, 0x0b, 1 << p); ++ ++ return 0; ++} ++ ++static int mv88e6063_setup(struct dsa_switch *ds) ++{ ++ int i; ++ int ret; ++ ++ ret = mv88e6063_switch_reset(ds); ++ if (ret < 0) ++ return ret; ++ ++ /* @@@ initialise atu */ ++ ++ ret = mv88e6063_setup_global(ds); ++ if (ret < 0) ++ return ret; ++ ++ for (i = 0; i < NUM_PORTS; i++) { ++ ret = mv88e6063_setup_port(ds, i); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int mv88e6063_set_addr(struct dsa_switch *ds, u8 *addr) ++{ ++ REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]); ++ REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]); ++ REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]); ++ ++ return 0; ++} ++ ++static int mv88e6063_port_to_phy_addr(int port) ++{ ++ if (port >= 0 && port <= NUM_PORTS) ++ return REG_PHY(port); ++ return -1; ++} ++ ++static int mv88e6063_phy_read(struct dsa_switch *ds, int port, int regnum) ++{ ++ int addr; ++ ++ addr = mv88e6063_port_to_phy_addr(port); ++ if (addr == -1) ++ return 0xffff; ++ ++ return reg_read(ds, addr, regnum); ++} ++ ++static int ++mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) ++{ ++ int addr; ++ ++ addr = mv88e6063_port_to_phy_addr(port); ++ if (addr == -1) ++ return 0xffff; ++ ++ return reg_write(ds, addr, regnum, val); ++} ++ ++static void mv88e6063_poll_link(struct dsa_switch *ds) ++{ ++ int i; ++ ++ for (i = 0; i < DSA_MAX_PORTS; i++) { ++ struct net_device *dev; ++ int uninitialized_var(port_status); ++ int link; ++ int speed; ++ int duplex; ++ int fc; ++ ++ dev = ds->ports[i]; ++ if (dev == NULL) ++ continue; ++ ++ link = 0; ++ if (dev->flags & IFF_UP) { ++ port_status = reg_read(ds, REG_PORT(i), 0x00); ++ if (port_status < 0) ++ continue; ++ ++ link = !!(port_status & 0x1000); ++ } ++ ++ if (!link) { ++ if (netif_carrier_ok(dev)) { ++ printk(KERN_INFO "%s: link down\n", dev->name); ++ netif_carrier_off(dev); ++ } ++ continue; ++ } ++ ++ speed = (port_status & 0x0100) ? 100 : 10; ++ duplex = (port_status & 0x0200) ? 1 : 0; ++ fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; ++ ++ if (!netif_carrier_ok(dev)) { ++ printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " ++ "flow control %sabled\n", dev->name, ++ speed, duplex ? "full" : "half", ++ fc ? "en" : "dis"); ++ netif_carrier_on(dev); ++ } ++ } ++} ++ ++static struct dsa_switch_driver mv88e6063_switch_driver = { ++ .tag_protocol = htons(ETH_P_TRAILER), ++ .probe = mv88e6063_probe, ++ .setup = mv88e6063_setup, ++ .set_addr = mv88e6063_set_addr, ++ .phy_read = mv88e6063_phy_read, ++ .phy_write = mv88e6063_phy_write, ++ .poll_link = mv88e6063_poll_link, ++}; ++ ++static int __init mv88e6063_init(void) ++{ ++ register_switch_driver(&mv88e6063_switch_driver); ++ return 0; ++} ++module_init(mv88e6063_init); ++ ++static void __exit mv88e6063_cleanup(void) ++{ ++ unregister_switch_driver(&mv88e6063_switch_driver); ++} ++module_exit(mv88e6063_cleanup); +diff -Nur linux-4.1.13.orig/net/dsa/tag_trailer.c linux-4.1.13/net/dsa/tag_trailer.c +--- linux-4.1.13.orig/net/dsa/tag_trailer.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/dsa/tag_trailer.c 2015-12-04 19:57:03.886110643 +0100 +@@ -84,7 +84,7 @@ + + trailer = skb_tail_pointer(skb) - 4; + if (trailer[0] != 0x80 || (trailer[1] & 0xf8) != 0x00 || +- (trailer[3] & 0xef) != 0x00 || trailer[3] != 0x00) ++ (trailer[2] & 0xef) != 0x00 || (trailer[3] & 0xfe) != 0x00) + goto out_drop; + + source_port = trailer[1] & 7; +diff -Nur linux-4.1.13.orig/net/ipv4/af_inet.c linux-4.1.13/net/ipv4/af_inet.c +--- linux-4.1.13.orig/net/ipv4/af_inet.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv4/af_inet.c 2015-12-04 19:57:05.925977182 +0100 +@@ -1323,8 +1323,8 @@ + if (unlikely(ip_fast_csum((u8 *)iph, 5))) + goto out_unlock; + +- id = ntohl(*(__be32 *)&iph->id); +- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); ++ id = ntohl(net_hdr_word(&iph->id)); ++ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); + id >>= 16; + + for (p = *head; p; p = p->next) { +diff -Nur linux-4.1.13.orig/net/ipv4/igmp.c linux-4.1.13/net/ipv4/igmp.c +--- linux-4.1.13.orig/net/ipv4/igmp.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv4/igmp.c 2015-12-04 19:57:05.929976920 +0100 +@@ -496,7 +496,7 @@ + if (!skb) + return NULL; + psrc = (__be32 *)skb_put(skb, sizeof(__be32)); +- *psrc = psf->sf_inaddr; ++ net_hdr_word(psrc) = psf->sf_inaddr; + scount++; stotal++; + if ((type == IGMPV3_ALLOW_NEW_SOURCES || + type == IGMPV3_BLOCK_OLD_SOURCES) && psf->sf_crcount) { +diff -Nur linux-4.1.13.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c linux-4.1.13/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c +--- linux-4.1.13.orig/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c 2015-12-04 19:57:05.917977705 +0100 +@@ -41,8 +41,8 @@ + if (ap == NULL) + return false; + +- tuple->src.u3.ip = ap[0]; +- tuple->dst.u3.ip = ap[1]; ++ tuple->src.u3.ip = net_hdr_word(ap++); ++ tuple->dst.u3.ip = net_hdr_word(ap); + + return true; + } +diff -Nur linux-4.1.13.orig/net/ipv4/route.c linux-4.1.13/net/ipv4/route.c +--- linux-4.1.13.orig/net/ipv4/route.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv4/route.c 2015-12-04 19:57:05.925977182 +0100 +@@ -450,7 +450,7 @@ + else if (skb) + pkey = &ip_hdr(skb)->daddr; + +- n = __ipv4_neigh_lookup(dev, *(__force u32 *)pkey); ++ n = __ipv4_neigh_lookup(dev, net_hdr_word(pkey)); + if (n) + return n; + return neigh_create(&arp_tbl, pkey, dev); +diff -Nur linux-4.1.13.orig/net/ipv4/tcp_input.c linux-4.1.13/net/ipv4/tcp_input.c +--- linux-4.1.13.orig/net/ipv4/tcp_input.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv4/tcp_input.c 2015-12-04 19:57:05.933976659 +0100 +@@ -3760,14 +3760,16 @@ + { + const __be32 *ptr = (const __be32 *)(th + 1); + +- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) +- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { ++ if (net_hdr_word(ptr) == ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { + tp->rx_opt.saw_tstamp = 1; + ++ptr; +- tp->rx_opt.rcv_tsval = ntohl(*ptr); ++ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); + ++ptr; +- if (*ptr) +- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ if (net_hdr_word(ptr)) ++ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - ++ tp->tsoffset; + else + tp->rx_opt.rcv_tsecr = 0; + return true; +diff -Nur linux-4.1.13.orig/net/ipv4/tcp_output.c linux-4.1.13/net/ipv4/tcp_output.c +--- linux-4.1.13.orig/net/ipv4/tcp_output.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv4/tcp_output.c 2015-12-04 19:57:05.929976920 +0100 +@@ -452,48 +452,53 @@ + u16 options = opts->options; /* mungable copy */ + + if (unlikely(OPTION_MD5 & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); + /* overload cookie hash location */ + opts->hash_location = (__u8 *)ptr; + ptr += 4; + } + + if (unlikely(opts->mss)) { +- *ptr++ = htonl((TCPOPT_MSS << 24) | +- (TCPOLEN_MSS << 16) | +- opts->mss); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | ++ opts->mss); + } + + if (likely(OPTION_TS & options)) { + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | +- (TCPOLEN_SACK_PERM << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_SACK_PERM << 24) | ++ (TCPOLEN_SACK_PERM << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + options &= ~OPTION_SACK_ADVERTISE; + } else { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + } +- *ptr++ = htonl(opts->tsval); +- *ptr++ = htonl(opts->tsecr); ++ net_hdr_word(ptr++) = htonl(opts->tsval); ++ net_hdr_word(ptr++) = htonl(opts->tsecr); + } + + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK_PERM << 8) | +- TCPOLEN_SACK_PERM); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK_PERM << 8) | ++ TCPOLEN_SACK_PERM); + } + + if (unlikely(OPTION_WSCALE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_WINDOW << 16) | +- (TCPOLEN_WINDOW << 8) | +- opts->ws); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_WINDOW << 16) | ++ (TCPOLEN_WINDOW << 8) | ++ opts->ws); + } + + if (unlikely(opts->num_sack_blocks)) { +@@ -501,16 +506,17 @@ + tp->duplicate_sack : tp->selective_acks; + int this_sack; + +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK << 8) | +- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK << 8) | ++ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * + TCPOLEN_SACK_PERBLOCK))); + + for (this_sack = 0; this_sack < opts->num_sack_blocks; + ++this_sack) { +- *ptr++ = htonl(sp[this_sack].start_seq); +- *ptr++ = htonl(sp[this_sack].end_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); + } + + tp->rx_opt.dsack = 0; +@@ -523,13 +529,14 @@ + + if (foc->exp) { + len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; +- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | ++ net_hdr_word(ptr) = ++ htonl((TCPOPT_EXP << 24) | (len << 16) | + TCPOPT_FASTOPEN_MAGIC); + p += TCPOLEN_EXP_FASTOPEN_BASE; + } else { + len = TCPOLEN_FASTOPEN_BASE + foc->len; +- *p++ = TCPOPT_FASTOPEN; +- *p++ = len; ++ net_hdr_word(p++) = TCPOPT_FASTOPEN; ++ net_hdr_word(p++) = len; + } + + memcpy(p, foc->val, foc->len); +diff -Nur linux-4.1.13.orig/net/ipv6/datagram.c linux-4.1.13/net/ipv6/datagram.c +--- linux-4.1.13.orig/net/ipv6/datagram.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/datagram.c 2015-12-04 19:57:05.921977444 +0100 +@@ -424,7 +424,7 @@ + ipv6_iface_scope_id(&sin->sin6_addr, + IP6CB(skb)->iif); + } else { +- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), ++ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), + &sin->sin6_addr); + sin->sin6_scope_id = 0; + } +@@ -761,12 +761,12 @@ + } + + if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { +- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { ++ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { + err = -EINVAL; + goto exit_f; + } + } +- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); ++ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); + break; + + case IPV6_2292HOPOPTS: +diff -Nur linux-4.1.13.orig/net/ipv6/exthdrs.c linux-4.1.13/net/ipv6/exthdrs.c +--- linux-4.1.13.orig/net/ipv6/exthdrs.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/exthdrs.c 2015-12-04 19:57:05.921977444 +0100 +@@ -573,7 +573,7 @@ + goto drop; + } + +- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); ++ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); + if (pkt_len <= IPV6_MAXPLEN) { + IP6_INC_STATS_BH(net, ipv6_skb_idev(skb), + IPSTATS_MIB_INHDRERRORS); +diff -Nur linux-4.1.13.orig/net/ipv6/ip6_fib.c linux-4.1.13/net/ipv6/ip6_fib.c +--- linux-4.1.13.orig/net/ipv6/ip6_fib.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/ip6_fib.c 2015-12-04 19:57:05.929976920 +0100 +@@ -137,7 +137,7 @@ + * See include/asm-generic/bitops/le.h. + */ + return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & +- addr[fn_bit >> 5]; ++ net_hdr_word(&addr[fn_bit >> 5]); + } + + static struct fib6_node *node_alloc(void) +diff -Nur linux-4.1.13.orig/net/ipv6/ip6_gre.c linux-4.1.13/net/ipv6/ip6_gre.c +--- linux-4.1.13.orig/net/ipv6/ip6_gre.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/ip6_gre.c 2015-12-04 19:57:05.921977444 +0100 +@@ -394,7 +394,7 @@ + + t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr, + flags & GRE_KEY ? +- *(((__be32 *)p) + (grehlen / 4) - 1) : 0, ++ net_hdr_word(((__be32 *)p) + (grehlen / 4) - 1) : 0, + p[1]); + if (!t) + return; +@@ -476,11 +476,11 @@ + offset += 4; + } + if (flags&GRE_KEY) { +- key = *(__be32 *)(h + offset); ++ key = net_hdr_word(h + offset); + offset += 4; + } + if (flags&GRE_SEQ) { +- seqno = ntohl(*(__be32 *)(h + offset)); ++ seqno = ntohl(net_hdr_word(h + offset)); + offset += 4; + } + } +@@ -745,7 +745,7 @@ + + if (tunnel->parms.o_flags&GRE_SEQ) { + ++tunnel->o_seqno; +- *ptr = htonl(tunnel->o_seqno); ++ net_hdr_word(ptr) = htonl(tunnel->o_seqno); + ptr--; + } + if (tunnel->parms.o_flags&GRE_KEY) { +@@ -841,7 +841,7 @@ + + dsfield = ipv6_get_dsfield(ipv6h); + if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) +- fl6.flowlabel |= (*(__be32 *) ipv6h & IPV6_TCLASS_MASK); ++ fl6.flowlabel |= net_hdr_word(ipv6h) & IPV6_TCLASS_MASK; + if (t->parms.flags & IP6_TNL_F_USE_ORIG_FLOWLABEL) + fl6.flowlabel |= ip6_flowlabel(ipv6h); + if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) +diff -Nur linux-4.1.13.orig/net/ipv6/ip6_offload.c linux-4.1.13/net/ipv6/ip6_offload.c +--- linux-4.1.13.orig/net/ipv6/ip6_offload.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/ip6_offload.c 2015-12-04 19:57:05.929976920 +0100 +@@ -221,7 +221,7 @@ + continue; + + iph2 = (struct ipv6hdr *)(p->data + off); +- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; ++ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); + + /* All fields must match except length and Traffic Class. + * XXX skbs on the gro_list have all been parsed and pulled +diff -Nur linux-4.1.13.orig/net/ipv6/ip6_tunnel.c linux-4.1.13/net/ipv6/ip6_tunnel.c +--- linux-4.1.13.orig/net/ipv6/ip6_tunnel.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/ip6_tunnel.c 2015-12-04 19:57:05.921977444 +0100 +@@ -1190,7 +1190,7 @@ + + dsfield = ipv6_get_dsfield(ipv6h); + if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) +- fl6.flowlabel |= (*(__be32 *) ipv6h & IPV6_TCLASS_MASK); ++ fl6.flowlabel |= net_hdr_word(ipv6h) & IPV6_TCLASS_MASK; + if (t->parms.flags & IP6_TNL_F_USE_ORIG_FLOWLABEL) + fl6.flowlabel |= ip6_flowlabel(ipv6h); + if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) +diff -Nur linux-4.1.13.orig/net/ipv6/netfilter/nf_log_ipv6.c linux-4.1.13/net/ipv6/netfilter/nf_log_ipv6.c +--- linux-4.1.13.orig/net/ipv6/netfilter/nf_log_ipv6.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/netfilter/nf_log_ipv6.c 2015-12-04 19:57:05.933976659 +0100 +@@ -66,9 +66,9 @@ + /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ + nf_log_buf_add(m, "LEN=%Zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", + ntohs(ih->payload_len) + sizeof(struct ipv6hdr), +- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, ++ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, + ih->hop_limit, +- (ntohl(*(__be32 *)ih) & 0x000fffff)); ++ (ntohl(net_hdr_word(ih)) & 0x000fffff)); + + fragment = 0; + ptr = ip6hoff + sizeof(struct ipv6hdr); +diff -Nur linux-4.1.13.orig/net/ipv6/tcp_ipv6.c linux-4.1.13/net/ipv6/tcp_ipv6.c +--- linux-4.1.13.orig/net/ipv6/tcp_ipv6.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/ipv6/tcp_ipv6.c 2015-12-04 19:57:05.917977705 +0100 +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -772,10 +773,10 @@ + topt = (__be32 *)(t1 + 1); + + if (tsecr) { +- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); +- *topt++ = htonl(tsval); +- *topt++ = htonl(tsecr); ++ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); ++ put_unaligned_be32(tsval, topt++); ++ put_unaligned_be32(tsecr, topt++); + } + + #ifdef CONFIG_TCP_MD5SIG +diff -Nur linux-4.1.13.orig/net/netfilter/nf_conntrack_proto_tcp.c linux-4.1.13/net/netfilter/nf_conntrack_proto_tcp.c +--- linux-4.1.13.orig/net/netfilter/nf_conntrack_proto_tcp.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/netfilter/nf_conntrack_proto_tcp.c 2015-12-04 19:57:05.929976920 +0100 +@@ -453,7 +453,7 @@ + + /* Fast path for timestamp-only option */ + if (length == TCPOLEN_TSTAMP_ALIGNED +- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) ++ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) + | (TCPOPT_NOP << 16) + | (TCPOPT_TIMESTAMP << 8) + | TCPOLEN_TIMESTAMP)) +diff -Nur linux-4.1.13.orig/net/sched/cls_u32.c linux-4.1.13/net/sched/cls_u32.c +--- linux-4.1.13.orig/net/sched/cls_u32.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/sched/cls_u32.c 2015-12-04 19:57:05.929976920 +0100 +@@ -151,7 +151,7 @@ + data = skb_header_pointer(skb, toff, 4, &hdata); + if (!data) + goto out; +- if ((*data ^ key->val) & key->mask) { ++ if ((net_hdr_word(data) ^ key->val) & key->mask) { + n = rcu_dereference_bh(n->next); + goto next_knode; + } +@@ -204,8 +204,8 @@ + &hdata); + if (!data) + goto out; +- sel = ht->divisor & u32_hash_fold(*data, &n->sel, +- n->fshift); ++ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), ++ &n->sel, n->fshift); + } + if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) + goto next_ht; +diff -Nur linux-4.1.13.orig/net/xfrm/xfrm_input.c linux-4.1.13/net/xfrm/xfrm_input.c +--- linux-4.1.13.orig/net/xfrm/xfrm_input.c 2015-11-09 23:34:10.000000000 +0100 ++++ linux-4.1.13/net/xfrm/xfrm_input.c 2015-12-04 19:57:05.929976920 +0100 +@@ -154,8 +154,8 @@ + if (!pskb_may_pull(skb, hlen)) + return -EINVAL; + +- *spi = *(__be32 *)(skb_transport_header(skb) + offset); +- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); ++ *spi = net_hdr_word(skb_transport_header(skb) + offset); ++ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); + return 0; + } + diff --git a/target/or1k/patches/4.1.30/ld-or1k.patch b/target/or1k/patches/4.1.30/ld-or1k.patch deleted file mode 100644 index 81c9db6c2..000000000 --- a/target/or1k/patches/4.1.30/ld-or1k.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -Nur linux-4.1.6.orig/arch/openrisc/kernel/vmlinux.lds.S linux-4.1.6/arch/openrisc/kernel/vmlinux.lds.S ---- linux-4.1.6.orig/arch/openrisc/kernel/vmlinux.lds.S 2015-08-17 05:52:51.000000000 +0200 -+++ linux-4.1.6/arch/openrisc/kernel/vmlinux.lds.S 2015-09-01 22:02:13.224692884 +0200 -@@ -30,7 +30,7 @@ - #include - #include - --OUTPUT_FORMAT("elf32-or32", "elf32-or32", "elf32-or32") -+OUTPUT_FORMAT("elf32-or1k", "elf32-or1k", "elf32-or1k") - jiffies = jiffies_64 + 4; - - SECTIONS diff --git a/target/or1k/patches/4.1.35/ld-or1k.patch b/target/or1k/patches/4.1.35/ld-or1k.patch new file mode 100644 index 000000000..81c9db6c2 --- /dev/null +++ b/target/or1k/patches/4.1.35/ld-or1k.patch @@ -0,0 +1,12 @@ +diff -Nur linux-4.1.6.orig/arch/openrisc/kernel/vmlinux.lds.S linux-4.1.6/arch/openrisc/kernel/vmlinux.lds.S +--- linux-4.1.6.orig/arch/openrisc/kernel/vmlinux.lds.S 2015-08-17 05:52:51.000000000 +0200 ++++ linux-4.1.6/arch/openrisc/kernel/vmlinux.lds.S 2015-09-01 22:02:13.224692884 +0200 +@@ -30,7 +30,7 @@ + #include + #include + +-OUTPUT_FORMAT("elf32-or32", "elf32-or32", "elf32-or32") ++OUTPUT_FORMAT("elf32-or1k", "elf32-or1k", "elf32-or1k") + jiffies = jiffies_64 + 4; + + SECTIONS -- cgit v1.2.3